[U-Boot] very urgent
May I ask if you would be eligible to pursue a Business Proposal of $19.7m with me if you dont mind? Let me know if you are interested. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Ns16550 doesn't send anything
Hi, I port u-boot last version on my board with SH7785. My board has no serial port (SCIF's are not connected). Therefore i try to communicate over a pci2s-card which has a ns16650 chip. i debug with Lauterbach-Debugger and can see the character in THR/RHR register. i can receive the character but can not send any character. though I write the character in the THR-register. i have no more idea. Thanks, for any clue Best regards, S.Altunbas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 0/2] ORIGEN Board Support
Adds support for ORIGEN board with MMC Booting. Chander Kashyap (2): ARMV7: Add support for Samsung ORIGEN board ORIGEN: Add MMC SPL support MAINTAINERS |1 + board/samsung/origen/Makefile | 64 board/samsung/origen/lowlevel_init.S | 357 +++ board/samsung/origen/mem_setup.S | 421 ++ board/samsung/origen/mmc_boot.c | 58 +++ board/samsung/origen/origen.c | 109 ++ board/samsung/origen/origen_setup.h | 546 + board/samsung/origen/tools/mkv310_image.c | 126 +++ boards.cfg|1 + include/configs/origen.h | 168 + spl/Makefile | 10 + 11 files changed, 1861 insertions(+), 0 deletions(-) create mode 100644 board/samsung/origen/Makefile create mode 100644 board/samsung/origen/lowlevel_init.S create mode 100644 board/samsung/origen/mem_setup.S create mode 100644 board/samsung/origen/mmc_boot.c create mode 100644 board/samsung/origen/origen.c create mode 100644 board/samsung/origen/origen_setup.h create mode 100644 board/samsung/origen/tools/mkv310_image.c create mode 100644 include/configs/origen.h -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 2/2] ORIGEN: Add MMC SPL support
Adds mmc boot support.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes for v2:
- Added Dirk Behme's patch
- SMDKV310: Fix host compilation of mkv310_image
Changes for v3:
- None
Changes for v4:
- None
Changes for v5:
- Use spl framwork for mmc spl support
- Removed typedef for function pointer
(API to copy u-boot from mmc to ram)
board/samsung/origen/Makefile | 20 +-
board/samsung/origen/mmc_boot.c | 58 +
board/samsung/origen/tools/mkv310_image.c | 126 +
include/configs/origen.h |8 ++
spl/Makefile | 10 +++
5 files changed, 221 insertions(+), 1 deletions(-)
create mode 100644 board/samsung/origen/mmc_boot.c
create mode 100644 board/samsung/origen/tools/mkv310_image.c
diff --git a/board/samsung/origen/Makefile b/board/samsung/origen/Makefile
index 65eff91..f5c6507 100644
--- a/board/samsung/origen/Makefile
+++ b/board/samsung/origen/Makefile
@@ -26,16 +26,34 @@ LIB = $(obj)lib$(BOARD).o
SOBJS := mem_setup.o
SOBJS += lowlevel_init.o
+
+ifndef CONFIG_SPL_BUILD
COBJS += origen.o
+endif
+
+ifdef CONFIG_SPL_BUILD
+COBJS += mmc_boot.o
+endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-all:$(obj).depend $(LIB)
+ALL+=$(obj).depend $(LIB)
+
+ifdef CONFIG_SPL_BUILD
+ALL+= tools/mk$(BOARD)spl.exe
+endif
+
+all: $(ALL)
$(LIB):$(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
+ifdef CONFIG_SPL_BUILD
+tools/mk$(BOARD)spl.exe: tools/mkv310_image.c
+ $(HOSTCC) tools/mkv310_image.c -o tools/mk$(BOARD)spl.exe
+endif
+
#
# defines $(obj).depend target
diff --git a/board/samsung/origen/mmc_boot.c b/board/samsung/origen/mmc_boot.c
new file mode 100644
index 000..072f161
--- /dev/null
+++ b/board/samsung/origen/mmc_boot.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#includecommon.h
+#includeconfig.h
+
+/*
+* Copy U-boot from mmc to RAM:
+* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
+* Pointer to API (Data transfer from mmc to ram)
+*/
+void copy_uboot_to_ram(void)
+{
+ u32 (*copy_bl2)(u32, u32, u32) = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+
+ copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
+}
+
+void board_init_f(unsigned long bootflag)
+{
+ __attribute__((noreturn)) void (*uboot)(void);
+ copy_uboot_to_ram();
+
+ /* Jump to U-Boot image */
+ uboot = (void *)CONFIG_SYS_TEXT_BASE;
+ (*uboot)();
+ /* Never returns Here */
+}
+
+/* Place Holders */
+void board_init_r(gd_t *id, ulong dest_addr)
+{
+ /* Function attribute is no-return */
+ /* This Function never executes */
+ while (1)
+ ;
+}
+
+void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {}
diff --git a/board/samsung/origen/tools/mkv310_image.c
b/board/samsung/origen/tools/mkv310_image.c
new file mode 100644
index 000..158aab5
--- /dev/null
+++ b/board/samsung/origen/tools/mkv310_image.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include stdio.h
+#include stdlib.h
+#include unistd.h
+#include fcntl.h
+#include errno.h
[U-Boot] [PATCH v5 1/2] ARMV7: Add support for Samsung ORIGEN board
Origen board is based upon S5PV310 SoC which is similiar to
S5PC210 SoC.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes for v2:
- None
Changes for v3:
- Board entry added Alphabetically in boards.cfg
- Used get_Ram_size function to calculate ram size
Changes for v4:
- CONFIG_MACH_TYPE defined to initialise MACH_TYPE in generic way
- Used s5p_gpio_* functions for gpio operations
Changes for v5:
- Used Symbolic names for hard-coded macros
- Used get_ram_size() while initialising gd-bd-bi_dram[].size
MAINTAINERS |1 +
board/samsung/origen/Makefile| 46 +++
board/samsung/origen/lowlevel_init.S | 357 ++
board/samsung/origen/mem_setup.S | 421 ++
board/samsung/origen/origen.c| 109 +++
board/samsung/origen/origen_setup.h | 546 ++
boards.cfg |1 +
include/configs/origen.h | 160 ++
8 files changed, 1641 insertions(+), 0 deletions(-)
create mode 100644 board/samsung/origen/Makefile
create mode 100644 board/samsung/origen/lowlevel_init.S
create mode 100644 board/samsung/origen/mem_setup.S
create mode 100644 board/samsung/origen/origen.c
create mode 100644 board/samsung/origen/origen_setup.h
create mode 100644 include/configs/origen.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 6e6affa..8526642 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -709,6 +709,7 @@ Minkyu Kang mk7.k...@samsung.com
Chander Kashyap k.chan...@samsung.com
+ origen ARM ARMV7 (S5PC210 SoC)
SMDKV310ARM ARMV7 (S5PC210 SoC)
Torsten Koschorrek koschor...@synertronixx.de
diff --git a/board/samsung/origen/Makefile b/board/samsung/origen/Makefile
new file mode 100644
index 000..65eff91
--- /dev/null
+++ b/board/samsung/origen/Makefile
@@ -0,0 +1,46 @@
+#
+# Copyright (C) 2011 Samsung Electronics
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+SOBJS := mem_setup.o
+SOBJS += lowlevel_init.o
+COBJS += origen.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:$(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/origen/lowlevel_init.S
b/board/samsung/origen/lowlevel_init.S
new file mode 100644
index 000..ddca1e2
--- /dev/null
+++ b/board/samsung/origen/lowlevel_init.S
@@ -0,0 +1,357 @@
+/*
+ * Lowlevel setup for ORIGEN board based on S5PV310
+ *
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include config.h
+#include version.h
+#include asm/arch/cpu.h
+#include origen_setup.h
+/*
+ * Register usages:
+ *
+ * r5 has zero always
+ * r7 has GPIO part1 base 0x1140
+ * r6 has GPIO part2 base 0x1100
+ */
+
+_TEXT_BASE:
+ .word CONFIG_SYS_TEXT_BASE
+
+ .globl lowlevel_init
+lowlevel_init:
+ push{lr}
+
+ /* r5 has always zero */
+ mov r5, #0
+ ldr r7, =S5PC210_GPIO_PART1_BASE
+ ldr r6, =S5PC210_GPIO_PART2_BASE
Re: [U-Boot] [PATCH 0/3] ARM: Clean arm/lib/cache.c, modify ARM1136 and ARM926 accordingly
Hi Marek, On 08/18/2011 06:51 PM, Marek Vasut wrote: On Thursday, August 11, 2011 04:19:43 AM Hong Xu wrote: This series try to clean the code of arch/arm/lib/cache.c Move ARM1136 cache operations into cpu/arm1136/cache.c Add ARM926EJS cache operations into cpu/arm926ejs/cache.c Hi, any updates? Quite busy in the passed days ;-) And just turned back. V2 patches are on the way BR, Eric Thanks, cheers! Hong Xu (3): ARM: Clean arch/arm/lib/cache.c ARM: ARM1136 - Remove flush_cache from arch/arm/lib/cache.c ARM: ARM926EJS - Add cache operations arch/arm/cpu/arm1136/Makefile |2 +- arch/arm/cpu/arm1136/cache.c| 33 + arch/arm/cpu/arm926ejs/Makefile |2 +- arch/arm/cpu/arm926ejs/cache.c | 142 +++ arch/arm/lib/cache.c| 55 +--- 5 files changed, 208 insertions(+), 26 deletions(-) create mode 100644 arch/arm/cpu/arm1136/cache.c create mode 100644 arch/arm/cpu/arm926ejs/cache.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] omap4: fix pad configuration settings for SDP and Panda
Signed-off-by: Aneesh V ane...@ti.com
Signed-off-by: Sebastien Jan s-...@ti.com
Signed-off-by: David Anders x0132...@ti.com
---
board/ti/panda/panda_mux_data.h | 41 --
board/ti/sdp4430/sdp4430_mux_data.h |9 ++-
2 files changed, 22 insertions(+), 28 deletions(-)
diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h
index 16cc0ad..63448b6 100644
--- a/board/ti/panda/panda_mux_data.h
+++ b/board/ti/panda/panda_mux_data.h
@@ -23,8 +23,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
-#ifndef _SDP4430_MUX_DATA_H
-#define _SDP4430_MUX_DATA_H
+#ifndef _PANDA_MUX_DATA_H_
+#define _PANDA_MUX_DATA_H_
#include asm/arch/mux_omap4.h
@@ -43,7 +43,7 @@ const struct pad_conf_entry
core_padconf_array_non_essential[] = {
{GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},/*
kpd_row7 */
{GPMC_A20, (IEN | M3)}, /*
gpio_44 */
{GPMC_A21, (M3)}, /*
gpio_45 */
- {GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)},/*
kpd_col6 */
+ {GPMC_A22, (M3)}, /*
gpio_46 */
{GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)},/*
kpd_col7 */
{GPMC_A24, (PTD | M3)}, /*
gpio_48 */
{GPMC_A25, (PTD | M3)}, /*
gpio_49 */
@@ -57,9 +57,9 @@ const struct pad_conf_entry
core_padconf_array_non_essential[] = {
{GPMC_NBE0_CLE, (M3)}, /*
gpio_59 */
{GPMC_NBE1, (PTD | M3)},/*
gpio_60 */
{GPMC_WAIT0, (PTU | IEN | M3)}, /*
gpio_61 */
- {GPMC_WAIT1, (IEN | M3)}, /*
gpio_62 */
+ {GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /*
gpio_62 */
{C2C_DATA11, (PTD | M3)}, /*
gpio_100 */
- {C2C_DATA12, (M1)}, /*
dsi1_te0 */
+ {C2C_DATA12, (PTU | IEN | M3)}, /*
gpio_101 */
{C2C_DATA13, (PTD | M3)}, /*
gpio_102 */
{C2C_DATA14, (M1)}, /*
dsi2_te0 */
{C2C_DATA15, (PTD | M3)}, /*
gpio_104 */
@@ -104,8 +104,8 @@ const struct pad_conf_entry
core_padconf_array_non_essential[] = {
{ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /*
abe_mcbsp2_dr */
{ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /*
abe_mcbsp2_dx */
{ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},/*
abe_mcbsp2_fsx */
- {ABE_MCBSP1_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /*
abe_mcbsp1_clkx */
- {ABE_MCBSP1_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /*
abe_mcbsp1_dr */
+ {ABE_MCBSP1_CLKX, (IEN | M0)}, /*
abe_mcbsp1_clkx */
+ {ABE_MCBSP1_DR, (IEN | M0)},/*
abe_mcbsp1_dr */
{ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /*
abe_mcbsp1_dx */
{ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},/*
abe_mcbsp1_fsx */
{ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /*
abe_pdm_ul_data */
@@ -115,7 +115,7 @@ const struct pad_conf_entry
core_padconf_array_non_essential[] = {
{ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},/*
abe_clks */
{ABE_DMIC_CLK1, (M0)}, /*
abe_dmic_clk1 */
{ABE_DMIC_DIN1, (IEN | M0)},/*
abe_dmic_din1 */
- {ABE_DMIC_DIN2, (IEN | M0)},/*
abe_dmic_din2 */
+ {ABE_DMIC_DIN2, (PTU | IEN | M3)}, /*
gpio_121 */
{ABE_DMIC_DIN3, (IEN | M0)},/*
abe_dmic_din3 */
{UART2_CTS, (PTU | IEN | M0)}, /*
uart2_cts */
{UART2_RTS, (M0)}, /*
uart2_rts */
@@ -141,7 +141,7 @@ const struct pad_conf_entry
core_padconf_array_non_essential[] = {
{MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /*
mcspi4_cs0 */
{UART4_RX, (IEN | M0)}, /*
uart4_rx */
{UART4_TX, (M0)}, /*
uart4_tx */
- {USBB2_ULPITLL_CLK, (PTD | IEN | M3)}, /*
gpio_157 */
+ {USBB2_ULPITLL_CLK, (IEN | M3)},/*
gpio_157 */
{USBB2_ULPITLL_STP, (IEN | M5)},
[U-Boot] [PATCH] mmc:dcache:samsung: D cache invalidate/flush for Samsung MMC DMA buffers
This commit is fixing the problem with DMA (SDMA in Samsung MMC controller)
transfer for D Cache enabled.
The D Cache corresponding to the DMA buffer shall be flushed before
transfer and invalidated when transfer is completed.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
CC: Andy Fleming aflem...@gmail.com
CC: Albert ARIBAUD albert.u.b...@aribaud.net
---
drivers/mmc/s5p_mmc.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/s5p_mmc.c b/drivers/mmc/s5p_mmc.c
index f136813..6bc2eb5 100644
--- a/drivers/mmc/s5p_mmc.c
+++ b/drivers/mmc/s5p_mmc.c
@@ -54,6 +54,9 @@ static void mmc_prepare_data(struct mmc_host *host, struct
mmc_data *data)
/* We do not handle DMA boundaries, so set it to max (512 KiB) */
writew((7 12) | (data-blocksize 0xFFF), host-reg-blksize);
writew(data-blocks, host-reg-blkcnt);
+
+ flush_dcache_range((u32)data-dest,
+ (u32)data-dest + (data-blocks * data-blocksize));
}
static void mmc_set_transfer_mode(struct mmc_host *host, struct mmc_data *data)
@@ -237,6 +240,10 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
break;
} else if (mask (1 1)) {
/* Transfer Complete */
+ invalidate_dcache_range((u32)data-dest,
+ (u32)data-dest +
+ (data-blocks *
+data-blocksize));
debug(r/w is done\n);
break;
}
--
1.7.2.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3 v2] ARM: Clean arch/arm/lib/cache.c
The default cache operations defined in arch/arm/lib/cache.c
do not perform any real cache operation, and instead a WARNING
will be emitted.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Since V1
Modified copyright line
Used `debug' to replace `printf'
arch/arm/lib/cache.c | 58 +++--
1 files changed, 32 insertions(+), 26 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 92b61a2..ce9b712 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -1,6 +1,5 @@
/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ * (C) Copyright 2011 Atmel Corporation
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -20,36 +19,43 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
+#include linux/compiler.h
+#include common.h
-/* for now: just dummy functions to satisfy the linker */
+#define EMIT_WARNING debug(WARNING: %s - CPU cache operation is not \
+implemented!\n, __func__)
-#include common.h
+/*
+ * Default implementations
+ *
+ * Warn user if CPU code does not implement necessary cache functions
+ */
+void __weak flush_cache(unsigned long start, unsigned long size)
+{
+ EMIT_WARNING;
+}
-void __flush_cache(unsigned long start, unsigned long size)
+void __weak flush_dcache_all(void)
{
-#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
- void arm1136_cache_flush(void);
+ EMIT_WARNING;
+}
- arm1136_cache_flush();
-#endif
-#ifdef CONFIG_ARM926EJS
- /* test and clean, page 2-23 of arm926ejs manual */
- asm(0: mrc p15, 0, r15, c7, c10, 3\n\t bne 0b\n : : : memory);
- /* disable write buffer as well (page 2-22) */
- asm(mcr p15, 0, %0, c7, c10, 4 : : r (0));
-#endif
- return;
+void __weak flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ EMIT_WARNING;
}
-void flush_cache(unsigned long start, unsigned long size)
- __attribute__((weak, alias(__flush_cache)));
-/*
- * Default implementation:
- * do a range flush for the entire range
- */
-void __flush_dcache_all(void)
+void __weak invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+ EMIT_WARNING;
+}
+
+void __weak invalidate_dcache_all(void)
+{
+ EMIT_WARNING;
+}
+
+void __weak invalidate_icache_all(void)
{
- flush_cache(0, ~0);
+ EMIT_WARNING;
}
-void flush_dcache_all(void)
- __attribute__((weak, alias(__flush_dcache_all)));
--
1.7.6
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3 v2] ARM: ARM1136 - Remove flush_cache from arch/arm/lib/cache.c
arch/arm/lib/cache.c is cleaned and no real cache operation will be
defined in this file. A new file arch/arm/cpu/arm1136/cache.c is
created. This file will define the real cache operations.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Since V2
Removed redundant ifdef for CONFIG_OMAP2420 || CONFIG_ARM1136
arch/arm/cpu/arm1136/Makefile |2 +-
arch/arm/cpu/arm1136/cache.c | 31 +++
2 files changed, 32 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm1136/cache.c
diff --git a/arch/arm/cpu/arm1136/Makefile b/arch/arm/cpu/arm1136/Makefile
index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm1136/Makefile
+++ b/arch/arm/cpu/arm1136/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).o
START = start.o
-COBJS = cpu.o
+COBJS = cpu.o cache.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/arm1136/cache.c b/arch/arm/cpu/arm1136/cache.c
new file mode 100644
index 000..30aa99d
--- /dev/null
+++ b/arch/arm/cpu/arm1136/cache.c
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+void flush_cache(unsigned long start, unsigned long size)
+{
+ void arm1136_cache_flush(void);
+
+ arm1136_cache_flush();
+}
--
1.7.6
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Since V1
Modified copyright line
Fix for compiling warnings
Changed the way to use CONFIG_SYS_CACHELINE_SIZE
When unaligned buffer detected, emit ERROR instead of WARNING
Do not make a common v5,v6 cache file. It seems arm946 is lack of
Test-and-Clean DCache operation. And maybe more differents...
arch/arm/cpu/arm926ejs/Makefile |2 +-
arch/arm/cpu/arm926ejs/cache.c | 135 +++
2 files changed, 136 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/cache.c
diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile
index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).o
START = start.o
-COBJS = cpu.o
+COBJS = cpu.o cache.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
new file mode 100644
index 000..756c9b1
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2011 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#define FLUSH_CACHE_OP 0
+#define INVALIDATE_CACHE_OP1
+
+#ifndef CONFIG_SYS_CACHELINE_SIZE
+/*
+ * ARM926EJ-S Technical Reference Manual, Chap 2.3.1 Table 2-9
+ * only b'10, aka. 32 bytes cache line len is valid
+ */
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+/*
+ * Flush or Invalidate DCache respectively
+ */
+static void cache_range_op(unsigned long start, unsigned long stop, int op)
+{
+ unsigned long mva;
+
+ if (op INVALIDATE_CACHE_OP) {
+ printf(ERROR: %s - Invalid cache operation, op: %d!\n,
+ __func__, op);
+ return;
+ }
+
+ mva = start;
+ if ((mva (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - start address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, start,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round up starting address */
+ mva = (mva | (CONFIG_SYS_CACHELINE_SIZE - 1)) + 1;
+ }
+ if ((stop (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - stop address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, stop,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round down ending address */
+ stop = ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ }
+
+ while (mva stop) {
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c14, 1\n : : r(mva));
+ else
+ asm(mcr p15, 0, %0, c7, c6, 1\n : : r(mva));
+
+ mva += CONFIG_SYS_CACHELINE_SIZE;
+ }
+
+ /* Drain WB if necessary */
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c10, 4\n : : r (0));
+}
+
+/*
+ * The buffer range to be flushed is [start, stop)
+ */
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ cache_range_op(start, stop, FLUSH_CACHE_OP);
+}
+
+void flush_dcache_all(void)
+{
+ /*
+* ARM926EJ-S Technical Reference Manual, Chap 2.3.8
+* Clean Invalidate the entire DCache
+*/
+ asm(0: mrc p15, 0, r15, c7, c14, 3\n\t bne 0b\n : : : memory);
+ /* Drain WB */
+ asm(mcr p15, 0, %0, c7, c10, 4\n : : r (0));
+}
+
+void flush_cache(unsigned long start, unsigned long size)
+{
+ flush_dcache_range(start, start + size);
+}
+
+/*
+ * The buffer range to be invalidated is [start, stop)
+ */
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+ cache_range_op(start, stop, INVALIDATE_CACHE_OP);
+}
+
+void
[U-Boot] [PATCH] mmc:dcache: Cache line size aligned internal MMC buffers
MMC operations are performed on cache line size aligned buffers.
In the current MMC implementation it is allowed to pass buffer
with arbitrary alignment.
In this patch assumption has been made, that it is better to align the buffer
on the MMC framework boundary, than in a number of u-boot subsystems, which are
using MMC.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Andy Fleming aflem...@gmail.com
CC: Albert ARIBAUD albert.u.b...@aribaud.net
---
drivers/mmc/mmc.c | 30 +++---
1 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 5f79a17..47e94c8 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -263,6 +263,7 @@ mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t
blkcnt, const void*src)
struct mmc_cmd cmd;
struct mmc_data data;
int timeout = 1000;
+ void *cache_align_buf;
if ((start + blkcnt) mmc-block_dev.lba) {
printf(MMC: block number 0x%lx exceeds max(0x%lx)\n,
@@ -283,13 +284,22 @@ mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t
blkcnt, const void*src)
cmd.resp_type = MMC_RSP_R1;
cmd.flags = 0;
- data.src = src;
+ cache_align_buf = memalign(get_dcache_line_size(),
+ mmc-write_bl_len * blkcnt);
+
+ if (!cache_align_buf)
+ return -ENOMEM;
+
+ memcpy(cache_align_buf, src, mmc-write_bl_len * blkcnt);
+
+ data.src = cache_align_buf;
data.blocks = blkcnt;
data.blocksize = mmc-write_bl_len;
data.flags = MMC_DATA_WRITE;
if (mmc_send_cmd(mmc, cmd, data)) {
printf(mmc write failed\n);
+ free(cache_align_buf);
return 0;
}
@@ -303,6 +313,7 @@ mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t
blkcnt, const void*src)
cmd.flags = 0;
if (mmc_send_cmd(mmc, cmd, NULL)) {
printf(mmc fail to send stop cmd\n);
+ free(cache_align_buf);
return 0;
}
@@ -310,6 +321,7 @@ mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t
blkcnt, const void*src)
mmc_send_status(mmc, timeout);
}
+ free(cache_align_buf);
return blkcnt;
}
@@ -342,6 +354,7 @@ int mmc_read_blocks(struct mmc *mmc, void *dst, ulong
start, lbaint_t blkcnt)
struct mmc_cmd cmd;
struct mmc_data data;
int timeout = 1000;
+ void *cache_align_buf;
if (blkcnt 1)
cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
@@ -356,13 +369,21 @@ int mmc_read_blocks(struct mmc *mmc, void *dst, ulong
start, lbaint_t blkcnt)
cmd.resp_type = MMC_RSP_R1;
cmd.flags = 0;
- data.dest = dst;
+ cache_align_buf = memalign(get_dcache_line_size(),
+ mmc-read_bl_len * blkcnt);
+
+ if (!cache_align_buf)
+ return -ENOMEM;
+
+ data.dest = cache_align_buf;
data.blocks = blkcnt;
data.blocksize = mmc-read_bl_len;
data.flags = MMC_DATA_READ;
- if (mmc_send_cmd(mmc, cmd, data))
+ if (mmc_send_cmd(mmc, cmd, data)) {
+ free(cache_align_buf);
return 0;
+ }
if (blkcnt 1) {
cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
@@ -371,6 +392,7 @@ int mmc_read_blocks(struct mmc *mmc, void *dst, ulong
start, lbaint_t blkcnt)
cmd.flags = 0;
if (mmc_send_cmd(mmc, cmd, NULL)) {
printf(mmc fail to send stop cmd\n);
+ free(cache_align_buf);
return 0;
}
@@ -378,6 +400,8 @@ int mmc_read_blocks(struct mmc *mmc, void *dst, ulong
start, lbaint_t blkcnt)
mmc_send_status(mmc, timeout);
}
+ memcpy(dst, cache_align_buf, mmc-read_bl_len * blkcnt);
+ free(cache_align_buf);
return blkcnt;
}
--
1.7.2.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] ARM: Clean arm/lib/cache.c, modify ARM1136 and ARM926 accordingly
On Friday, August 19, 2011 10:39:14 AM Hong Xu wrote: Hi Marek, On 08/18/2011 06:51 PM, Marek Vasut wrote: On Thursday, August 11, 2011 04:19:43 AM Hong Xu wrote: This series try to clean the code of arch/arm/lib/cache.c Move ARM1136 cache operations into cpu/arm1136/cache.c Add ARM926EJS cache operations into cpu/arm926ejs/cache.c Hi, any updates? Quite busy in the passed days ;-) And just turned back. V2 patches are on the way Hi, I just tested your patches yesterday and they seem to work. Just those two compile issues, but you're doing great ;-) BR, Eric Thanks, cheers! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3 v2] ARM: Clean arch/arm/lib/cache.c
On Friday, August 19, 2011 11:23:13 AM Hong Xu wrote:
The default cache operations defined in arch/arm/lib/cache.c
do not perform any real cache operation, and instead a WARNING
will be emitted.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
You can add my:
Tested-by: Marek Vasut marek.va...@gmail.com
Acked-by: Marek Vasut marek.va...@gmail.com
Cheers!
---
Since V1
Modified copyright line
Used `debug' to replace `printf'
arch/arm/lib/cache.c | 58
+++-- 1 files changed, 32
insertions(+), 26 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 92b61a2..ce9b712 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -1,6 +1,5 @@
/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ * (C) Copyright 2011 Atmel Corporation
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -20,36 +19,43 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
+#include linux/compiler.h
+#include common.h
-/* for now: just dummy functions to satisfy the linker */
+#define EMIT_WARNING debug(WARNING: %s - CPU cache operation is not \
+implemented!\n, __func__)
-#include common.h
+/*
+ * Default implementations
+ *
+ * Warn user if CPU code does not implement necessary cache functions
+ */
+void __weak flush_cache(unsigned long start, unsigned long size)
+{
+ EMIT_WARNING;
+}
-void __flush_cache(unsigned long start, unsigned long size)
+void __weak flush_dcache_all(void)
{
-#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
- void arm1136_cache_flush(void);
+ EMIT_WARNING;
+}
- arm1136_cache_flush();
-#endif
-#ifdef CONFIG_ARM926EJS
- /* test and clean, page 2-23 of arm926ejs manual */
- asm(0: mrc p15, 0, r15, c7, c10, 3\n\t bne 0b\n : : : memory);
- /* disable write buffer as well (page 2-22) */
- asm(mcr p15, 0, %0, c7, c10, 4 : : r (0));
-#endif
- return;
+void __weak flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ EMIT_WARNING;
}
-void flush_cache(unsigned long start, unsigned long size)
- __attribute__((weak, alias(__flush_cache)));
-/*
- * Default implementation:
- * do a range flush for the entire range
- */
-void __flush_dcache_all(void)
+void __weak invalidate_dcache_range(unsigned long start, unsigned long
stop) +{
+ EMIT_WARNING;
+}
+
+void __weak invalidate_dcache_all(void)
+{
+ EMIT_WARNING;
+}
+
+void __weak invalidate_icache_all(void)
{
- flush_cache(0, ~0);
+ EMIT_WARNING;
}
-void flush_dcache_all(void)
- __attribute__((weak, alias(__flush_dcache_all)));
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3 v2] ARM: ARM1136 - Remove flush_cache from arch/arm/lib/cache.c
On Friday, August 19, 2011 11:23:14 AM Hong Xu wrote:
arch/arm/lib/cache.c is cleaned and no real cache operation will be
defined in this file. A new file arch/arm/cpu/arm1136/cache.c is
created. This file will define the real cache operations.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Since V2
Removed redundant ifdef for CONFIG_OMAP2420 || CONFIG_ARM1136
arch/arm/cpu/arm1136/Makefile |2 +-
arch/arm/cpu/arm1136/cache.c | 31 +++
2 files changed, 32 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm1136/cache.c
diff --git a/arch/arm/cpu/arm1136/Makefile b/arch/arm/cpu/arm1136/Makefile
index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm1136/Makefile
+++ b/arch/arm/cpu/arm1136/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).o
START= start.o
-COBJS= cpu.o
+COBJS= cpu.o cache.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/arm1136/cache.c b/arch/arm/cpu/arm1136/cache.c
new file mode 100644
index 000..30aa99d
--- /dev/null
+++ b/arch/arm/cpu/arm1136/cache.c
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+void flush_cache(unsigned long start, unsigned long size)
+{
+ void arm1136_cache_flush(void);
Whoa this void on the left side is strange ;-)
+
+ arm1136_cache_flush();
+}
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
On Friday, August 19, 2011 11:23:15 AM Hong Xu wrote:
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
You can add my:
Tested-by: Marek Vasut marek.va...@gmail.com
Acked-by: Marek Vasut marek.va...@gmail.com
Cheers!
---
Since V1
Modified copyright line
Fix for compiling warnings
Changed the way to use CONFIG_SYS_CACHELINE_SIZE
When unaligned buffer detected, emit ERROR instead of WARNING
Do not make a common v5,v6 cache file. It seems arm946 is lack of
Test-and-Clean DCache operation. And maybe more differents...
arch/arm/cpu/arm926ejs/Makefile |2 +-
arch/arm/cpu/arm926ejs/cache.c | 135
+++ 2 files changed, 136
insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/cache.c
diff --git a/arch/arm/cpu/arm926ejs/Makefile
b/arch/arm/cpu/arm926ejs/Makefile index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).o
START= start.o
-COBJS= cpu.o
+COBJS= cpu.o cache.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/arm926ejs/cache.c
b/arch/arm/cpu/arm926ejs/cache.c new file mode 100644
index 000..756c9b1
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2011 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#define FLUSH_CACHE_OP 0
+#define INVALIDATE_CACHE_OP 1
+
+#ifndef CONFIG_SYS_CACHELINE_SIZE
+/*
+ * ARM926EJ-S Technical Reference Manual, Chap 2.3.1 Table 2-9
+ * only b'10, aka. 32 bytes cache line len is valid
+ */
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+/*
+ * Flush or Invalidate DCache respectively
+ */
+static void cache_range_op(unsigned long start, unsigned long stop, int
op) +{
+ unsigned long mva;
+
+ if (op INVALIDATE_CACHE_OP) {
+ printf(ERROR: %s - Invalid cache operation, op: %d!\n,
+ __func__, op);
+ return;
+ }
+
+ mva = start;
+ if ((mva (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - start address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, start,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round up starting address */
+ mva = (mva | (CONFIG_SYS_CACHELINE_SIZE - 1)) + 1;
+ }
+ if ((stop (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - stop address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, stop,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round down ending address */
+ stop = ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ }
+
+ while (mva stop) {
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c14, 1\n : : r(mva));
+ else
+ asm(mcr p15, 0, %0, c7, c6, 1\n : : r(mva));
+
+ mva += CONFIG_SYS_CACHELINE_SIZE;
+ }
+
+ /* Drain WB if necessary */
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c10, 4\n : : r (0));
+}
+
+/*
+ * The buffer range to be flushed is [start, stop)
+ */
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ cache_range_op(start, stop, FLUSH_CACHE_OP);
+}
+
+void flush_dcache_all(void)
+{
+ /*
+ * ARM926EJ-S Technical Reference Manual, Chap 2.3.8
+ * Clean Invalidate the entire DCache
+ */
+ asm(0: mrc p15, 0, r15, c7, c14, 3\n\t bne 0b\n : : : memory);
+ /* Drain WB */
+ asm(mcr p15, 0, %0, c7, c10, 4\n : : r (0));
+}
+
+void flush_cache(unsigned long start, unsigned long size)
+{
+ flush_dcache_range(start,
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
Hi Hong,
On Friday 19 August 2011 02:53 PM, Hong Xu wrote:
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
How about converting as much as possible of these to armv5/armv6 generic
code as I mentioned in this thread:
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/105385/focus=105526
On a quick look everything below except the flush_dcache_all() seems
to be armv5 generic.
best regards,
Aneesh
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Since V1
Modified copyright line
Fix for compiling warnings
Changed the way to use CONFIG_SYS_CACHELINE_SIZE
When unaligned buffer detected, emit ERROR instead of WARNING
Do not make a common v5,v6 cache file. It seems arm946 is lack of
Test-and-Clean DCache operation. And maybe more differents...
arch/arm/cpu/arm926ejs/Makefile |2 +-
arch/arm/cpu/arm926ejs/cache.c | 135
+++
2 files changed, 136 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/cache.c
diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile
index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).o
START= start.o
-COBJS= cpu.o
+COBJS= cpu.o cache.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
new file mode 100644
index 000..756c9b1
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2011 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#define FLUSH_CACHE_OP 0
+#define INVALIDATE_CACHE_OP 1
+
+#ifndef CONFIG_SYS_CACHELINE_SIZE
+/*
+ * ARM926EJ-S Technical Reference Manual, Chap 2.3.1 Table 2-9
+ * only b'10, aka. 32 bytes cache line len is valid
+ */
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+/*
+ * Flush or Invalidate DCache respectively
+ */
+static void cache_range_op(unsigned long start, unsigned long stop, int op)
+{
+ unsigned long mva;
+
+ if (op INVALIDATE_CACHE_OP) {
+ printf(ERROR: %s - Invalid cache operation, op: %d!\n,
+ __func__, op);
+ return;
+ }
+
+ mva = start;
+ if ((mva (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - start address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, start,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round up starting address */
+ mva = (mva | (CONFIG_SYS_CACHELINE_SIZE - 1)) + 1;
+ }
+ if ((stop (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - stop address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, stop,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round down ending address */
+ stop = ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ }
+
+ while (mva stop) {
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c14, 1\n : : r(mva));
+ else
+ asm(mcr p15, 0, %0, c7, c6, 1\n : : r(mva));
+
+ mva += CONFIG_SYS_CACHELINE_SIZE;
+ }
+
+ /* Drain WB if necessary */
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c10, 4\n : : r (0));
+}
+
+/*
+ * The buffer range to be flushed is [start, stop)
+ */
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ cache_range_op(start, stop, FLUSH_CACHE_OP);
+}
+
+void flush_dcache_all(void)
+{
+ /*
+ * ARM926EJ-S Technical Reference Manual, Chap 2.3.8
+ * Clean Invalidate the entire DCache
+ */
+ asm(0: mrc p15, 0, r15, c7, c14, 3\n\t bne 0b\n :
Re: [U-Boot] [STATUS] ARM
Hi Albert, On Friday 19 August 2011 03:39 AM, Albert ARIBAUD wrote: Hi all, This week-end I intend to go through the board removal patch set and apply those patches in it that still fail to compile with the current u-boot-arm/master tree. So: 1) if there are any pull requests to u-voot-arm/master in the works, please try to submit them soon or at lease let me know, and 2) if there are any board fix patches posted after merge window closure and still pending, please also let me know (those before the merge window closure should all be in u-boot-arm by now). I have these patches that fix couple of build issues with OMAP platforms. I am hoping that Sandeep will pull these soon. 1. http://patchwork.ozlabs.org/patch/107678/ 2. http://patchwork.ozlabs.org/patch/108865/ best regards, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
On Friday, August 19, 2011 11:37:29 AM Aneesh V wrote:
Hi Hong,
On Friday 19 August 2011 02:53 PM, Hong Xu wrote:
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
How about converting as much as possible of these to armv5/armv6 generic
code as I mentioned in this thread:
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/105385/focus=105526
On a quick look everything below except the flush_dcache_all() seems
to be armv5 generic.
I'd be _VERY_ careful here. And this seems doesn't sound very convincing. Are
you dead sure it won't break any v5 CPU we support?
Cheers
best regards,
Aneesh
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Since V1
Modified copyright line
Fix for compiling warnings
Changed the way to use CONFIG_SYS_CACHELINE_SIZE
When unaligned buffer detected, emit ERROR instead of WARNING
Do not make a common v5,v6 cache file. It seems arm946 is lack of
Test-and-Clean DCache operation. And maybe more differents...
arch/arm/cpu/arm926ejs/Makefile |2 +-
arch/arm/cpu/arm926ejs/cache.c | 135
+++ 2 files changed, 136
insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/cache.c
diff --git a/arch/arm/cpu/arm926ejs/Makefile
b/arch/arm/cpu/arm926ejs/Makefile index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).o
START = start.o
-COBJS = cpu.o
+COBJS = cpu.o cache.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/arm926ejs/cache.c
b/arch/arm/cpu/arm926ejs/cache.c new file mode 100644
index 000..756c9b1
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2011 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#define FLUSH_CACHE_OP 0
+#define INVALIDATE_CACHE_OP1
+
+#ifndef CONFIG_SYS_CACHELINE_SIZE
+/*
+ * ARM926EJ-S Technical Reference Manual, Chap 2.3.1 Table 2-9
+ * only b'10, aka. 32 bytes cache line len is valid
+ */
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+/*
+ * Flush or Invalidate DCache respectively
+ */
+static void cache_range_op(unsigned long start, unsigned long stop, int
op) +{
+ unsigned long mva;
+
+ if (op INVALIDATE_CACHE_OP) {
+ printf(ERROR: %s - Invalid cache operation, op: %d!\n,
+ __func__, op);
+ return;
+ }
+
+ mva = start;
+ if ((mva (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - start address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, start,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round up starting address */
+ mva = (mva | (CONFIG_SYS_CACHELINE_SIZE - 1)) + 1;
+ }
+ if ((stop (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - stop address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, stop,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round down ending address */
+ stop = ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ }
+
+ while (mva stop) {
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c14, 1\n : : r(mva));
+ else
+ asm(mcr p15, 0, %0, c7, c6, 1\n : : r(mva));
+
+ mva += CONFIG_SYS_CACHELINE_SIZE;
+ }
+
+ /* Drain WB if necessary */
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c10, 4\n : : r (0));
+}
+
+/*
+ * The buffer range to be flushed is [start, stop)
+ */
+void flush_dcache_range(unsigned long
Re: [U-Boot] [PATCH 2/3 v2] ARM: ARM1136 - Remove flush_cache from arch/arm/lib/cache.c
Hi Marek,
On 08/19/2011 05:40 PM, Marek Vasut wrote:
On Friday, August 19, 2011 11:23:14 AM Hong Xu wrote:
arch/arm/lib/cache.c is cleaned and no real cache operation will be
defined in this file. A new file arch/arm/cpu/arm1136/cache.c is
created. This file will define the real cache operations.
Signed-off-by: Hong Xuhong...@atmel.com
Tested-by: Elen Songelen.s...@atmel.com
CC: Albert Aribaudalbert.u.b...@aribaud.net
---
Since V2
Removed redundant ifdef for CONFIG_OMAP2420 || CONFIG_ARM1136
arch/arm/cpu/arm1136/Makefile |2 +-
arch/arm/cpu/arm1136/cache.c | 31 +++
2 files changed, 32 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm1136/cache.c
diff --git a/arch/arm/cpu/arm1136/Makefile b/arch/arm/cpu/arm1136/Makefile
index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm1136/Makefile
+++ b/arch/arm/cpu/arm1136/Makefile
[...]
+ */
+
+#includecommon.h
+
+void flush_cache(unsigned long start, unsigned long size)
+{
+void arm1136_cache_flush(void);
Whoa this void on the left side is strange ;-)
Just copied from original file. ;-)
Move it out and change to extern void arm1136_cache_flush(void);, OK
for you?
BR,
Eric
+
+arm1136_cache_flush();
+}
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
Hi Hong, On Fri, Aug 19, 2011 at 5:23 PM, Hong Xu hong...@atmel.com wrote: Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations into this file. Signed-off-by: Hong Xu hong...@atmel.com Tested-by: Elen Song elen.s...@atmel.com CC: Albert Aribaud albert.u.b...@aribaud.net --- Since V1 Modified copyright line Fix for compiling warnings Changed the way to use CONFIG_SYS_CACHELINE_SIZE When unaligned buffer detected, emit ERROR instead of WARNING Do not make a common v5,v6 cache file. It seems arm946 is lack of Test-and-Clean DCache operation. And maybe more differents... arch/arm/cpu/arm926ejs/Makefile | 2 +- arch/arm/cpu/arm926ejs/cache.c | 135 +++ 2 files changed, 136 insertions(+), 1 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/cache.c This patch series don't works for me. My board is also arm926ejs based, and its configure as dkb_config; The error message as below: ERROR: cache_range_op op: 0 - stop address 0x1fe7c028 not aligned to cache line size(32 bytes) ERROR: cache_range_op op: 0 - start address 0x1fe7be30 not aligned to cache line size(32 bytes) ERROR: cache_range_op op: 0 - stop address 0x1fe7c030 not aligned to cache line size(32 bytes) ERROR: cache_range_op op: 0 - start address 0x1fe7be28 not aligned to cache line size(32 bytes) ERROR: cache_range_op op: 0 - stop address 0x1fe7c028 not aligned to cache line size(32 bytes) Do you have any hint for this? Best regards, Lei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
Hi Wen, On 08/19/2011 06:17 PM, Lei Wen wrote: Hi Hong, On Fri, Aug 19, 2011 at 5:23 PM, Hong Xuhong...@atmel.com wrote: Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations into this file. Signed-off-by: Hong Xuhong...@atmel.com Tested-by: Elen Songelen.s...@atmel.com CC: Albert Aribaudalbert.u.b...@aribaud.net --- Since V1 Modified copyright line Fix for compiling warnings Changed the way to use CONFIG_SYS_CACHELINE_SIZE When unaligned buffer detected, emit ERROR instead of WARNING Do not make a common v5,v6 cache file. It seems arm946 is lack of Test-and-Clean DCache operation. And maybe more differents... arch/arm/cpu/arm926ejs/Makefile |2 +- arch/arm/cpu/arm926ejs/cache.c | 135 +++ 2 files changed, 136 insertions(+), 1 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/cache.c This patch series don't works for me. My board is also arm926ejs based, and its configure as dkb_config; The error message as below: ERROR: cache_range_op op: 0 - stop address 0x1fe7c028 not aligned to cache line size(32 bytes) ERROR: cache_range_op op: 0 - start address 0x1fe7be30 not aligned to cache line size(32 bytes) ERROR: cache_range_op op: 0 - stop address 0x1fe7c030 not aligned to cache line size(32 bytes) ERROR: cache_range_op op: 0 - start address 0x1fe7be28 not aligned to cache line size(32 bytes) ERROR: cache_range_op op: 0 - stop address 0x1fe7c028 not aligned to cache line size(32 bytes) The APIs need the buffer address passed is cache-line size aligned. You shall take the alignment into account in your driver code. Try to use memalign() or something similar in your driver code? BR, Eric Do you have any hint for this? Best regards, Lei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
Hi Hong, On Fri, Aug 19, 2011 at 5:23 PM, Hong Xu hong...@atmel.com wrote: Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations into this file. Signed-off-by: Hong Xu hong...@atmel.com Tested-by: Elen Song elen.s...@atmel.com CC: Albert Aribaud albert.u.b...@aribaud.net --- Since V1 Modified copyright line Fix for compiling warnings Changed the way to use CONFIG_SYS_CACHELINE_SIZE When unaligned buffer detected, emit ERROR instead of WARNING Do not make a common v5,v6 cache file. It seems arm946 is lack of Test-and-Clean DCache operation. And maybe more differents... arch/arm/cpu/arm926ejs/Makefile | 2 +- arch/arm/cpu/arm926ejs/cache.c | 135 +++ 2 files changed, 136 insertions(+), 1 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/cache.c diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index 930e0d1..5b5f330 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).o START = start.o -COBJS = cpu.o +COBJS = cpu.o cache.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c new file mode 100644 index 000..756c9b1 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -0,0 +1,135 @@ +/* + * (C) Copyright 2011 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include common.h + +#define FLUSH_CACHE_OP 0 +#define INVALIDATE_CACHE_OP 1 + +#ifndef CONFIG_SYS_CACHELINE_SIZE +/* + * ARM926EJ-S Technical Reference Manual, Chap 2.3.1 Table 2-9 + * only b'10, aka. 32 bytes cache line len is valid + */ +#define CONFIG_SYS_CACHELINE_SIZE 32 I think we shouldn't make such assumption here. You could refer to Lukasz's patch over armv7: http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/105772 And you also should export one method as: get_dcache_line_size(), so that we could malloc cache aligned buffer in mmc.c. Best regards, Lei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
Hi Marek, On Friday 19 August 2011 03:16 PM, Marek Vasut wrote: On Friday, August 19, 2011 11:37:29 AM Aneesh V wrote: Hi Hong, On Friday 19 August 2011 02:53 PM, Hong Xu wrote: Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations into this file. How about converting as much as possible of these to armv5/armv6 generic code as I mentioned in this thread: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/105385/focus=105526 On a quick look everything below except the flush_dcache_all() seems to be armv5 generic. I'd be _VERY_ careful here. And this seems doesn't sound very convincing. Are you dead sure it won't break any v5 CPU we support? What Hong has used is operations mentioned in the ARMv5 architecture and these are not marked as IMPLEMENTATION DEFINED. So, compliant implementations should implement those CP15 operations. They may enhance the operations by adding their own like ARM926EJS seems to be doing with 'flush d-cache all'. However, I think that's immaterial. Hong can provide this as a library and define a CONFIG_* flag to enable it. Let the platform maintainers decide whether to use it or not. IMHO, it will definitely be an improvement over what we have today. best regards, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
On Friday, August 19, 2011 12:43:30 PM Aneesh V wrote: Hi Marek, On Friday 19 August 2011 03:16 PM, Marek Vasut wrote: On Friday, August 19, 2011 11:37:29 AM Aneesh V wrote: Hi Hong, On Friday 19 August 2011 02:53 PM, Hong Xu wrote: Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations into this file. How about converting as much as possible of these to armv5/armv6 generic code as I mentioned in this thread: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/105385/focus=1055 26 On a quick look everything below except the flush_dcache_all() seems to be armv5 generic. I'd be _VERY_ careful here. And this seems doesn't sound very convincing. Are you dead sure it won't break any v5 CPU we support? What Hong has used is operations mentioned in the ARMv5 architecture and these are not marked as IMPLEMENTATION DEFINED. So, compliant implementations should implement those CP15 operations. They may enhance the operations by adding their own like ARM926EJS seems to be doing with 'flush d-cache all'. However, I think that's immaterial. Hong can provide this as a library and define a CONFIG_* flag to enable it. Let the platform maintainers decide whether to use it or not. IMHO, it will definitely be an improvement over what we have today. Hi, It certainly will, but I'm quite relucant to that as it'll also -- since CONFIG_SYS_DCACHE_OFF and CONFIG_SYS_ICACHE_OFF isn't defined by default -- break some things. Even though what I said is not exactly an argument for what you said. If you're firm all ARMv5 implement it this way, I'm all for it being done the way you suggest it! Thanks best regards, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3 v2] ARM: ARM1136 - Remove flush_cache from arch/arm/lib/cache.c
On Friday, August 19, 2011 11:59:16 AM Hong Xu wrote:
Hi Marek,
On 08/19/2011 05:40 PM, Marek Vasut wrote:
On Friday, August 19, 2011 11:23:14 AM Hong Xu wrote:
arch/arm/lib/cache.c is cleaned and no real cache operation will be
defined in this file. A new file arch/arm/cpu/arm1136/cache.c is
created. This file will define the real cache operations.
Signed-off-by: Hong Xuhong...@atmel.com
Tested-by: Elen Songelen.s...@atmel.com
CC: Albert Aribaudalbert.u.b...@aribaud.net
---
Since V2
Removed redundant ifdef for CONFIG_OMAP2420 || CONFIG_ARM1136
arch/arm/cpu/arm1136/Makefile |2 +-
arch/arm/cpu/arm1136/cache.c | 31 +++
2 files changed, 32 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm1136/cache.c
diff --git a/arch/arm/cpu/arm1136/Makefile
b/arch/arm/cpu/arm1136/Makefile index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm1136/Makefile
+++ b/arch/arm/cpu/arm1136/Makefile
[...]
+ */
+
+#includecommon.h
+
+void flush_cache(unsigned long start, unsigned long size)
+{
+ void arm1136_cache_flush(void);
Whoa this void on the left side is strange ;-)
Just copied from original file. ;-)
Move it out and change to extern void arm1136_cache_flush(void);, OK
for you?
No externs please. I'd just pull it from start.S into the cache.c.
BR,
Eric
+
+ arm1136_cache_flush();
+}
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mx53: ddr3: Update DD3 initialization
Updated mx53 ddr3 script in order to align with the latest Freescale version from July 8, 2011: -change ESDREF[REF_SEL]=01 (for 32KHz), from incorrect setting of 00 (64KHz) -change DDR3 MR0 write to setmem /32 0x63fd901c = 0x052080b0 from 0x092080b0. This changes write recovery from 8 clocks to 6 clocks (in line with ESDCFG1[tWR]) Signed-off-by: Lily Zhang r58...@freescale.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- board/freescale/mx53ard/imximage_dd3.cfg |6 +++--- board/freescale/mx53loco/imximage.cfg|6 +++--- board/freescale/mx53smd/imximage.cfg |6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/board/freescale/mx53ard/imximage_dd3.cfg b/board/freescale/mx53ard/imximage_dd3.cfg index 0f298ab..50e05af 100644 --- a/board/freescale/mx53ard/imximage_dd3.cfg +++ b/board/freescale/mx53ard/imximage_dd3.cfg @@ -83,14 +83,14 @@ DATA 4 0x63fd9004 0x0002002d DATA 4 0x63fd901c 0x8032 DATA 4 0x63fd901c 0x8033 DATA 4 0x63fd901c 0x00028031 -DATA 4 0x63fd901c 0x092080b0 +DATA 4 0x63fd901c 0x052080b0 DATA 4 0x63fd901c 0x04008040 DATA 4 0x63fd901c 0x803a DATA 4 0x63fd901c 0x803b DATA 4 0x63fd901c 0x00028039 -DATA 4 0x63fd901c 0x09208138 +DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 -DATA 4 0x63fd9020 0x1800 +DATA 4 0x63fd9020 0x5800 DATA 4 0x63fd9040 0x04b80003 DATA 4 0x63fd9058 0x0007 DATA 4 0x63fd901C 0x diff --git a/board/freescale/mx53loco/imximage.cfg b/board/freescale/mx53loco/imximage.cfg index ce9c8fc..f30258e 100644 --- a/board/freescale/mx53loco/imximage.cfg +++ b/board/freescale/mx53loco/imximage.cfg @@ -83,14 +83,14 @@ DATA 4 0x63fd9004 0x0002002d DATA 4 0x63fd901c 0x8032 DATA 4 0x63fd901c 0x8033 DATA 4 0x63fd901c 0x00028031 -DATA 4 0x63fd901c 0x092080b0 +DATA 4 0x63fd901c 0x052080b0 DATA 4 0x63fd901c 0x04008040 DATA 4 0x63fd901c 0x803a DATA 4 0x63fd901c 0x803b DATA 4 0x63fd901c 0x00028039 -DATA 4 0x63fd901c 0x09208138 +DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 -DATA 4 0x63fd9020 0x1800 +DATA 4 0x63fd9020 0x5800 DATA 4 0x63fd9040 0x04b80003 DATA 4 0x63fd9058 0x0007 DATA 4 0x63fd901c 0x diff --git a/board/freescale/mx53smd/imximage.cfg b/board/freescale/mx53smd/imximage.cfg index 0f298ab..50e05af 100644 --- a/board/freescale/mx53smd/imximage.cfg +++ b/board/freescale/mx53smd/imximage.cfg @@ -83,14 +83,14 @@ DATA 4 0x63fd9004 0x0002002d DATA 4 0x63fd901c 0x8032 DATA 4 0x63fd901c 0x8033 DATA 4 0x63fd901c 0x00028031 -DATA 4 0x63fd901c 0x092080b0 +DATA 4 0x63fd901c 0x052080b0 DATA 4 0x63fd901c 0x04008040 DATA 4 0x63fd901c 0x803a DATA 4 0x63fd901c 0x803b DATA 4 0x63fd901c 0x00028039 -DATA 4 0x63fd901c 0x09208138 +DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 -DATA 4 0x63fd9020 0x1800 +DATA 4 0x63fd9020 0x5800 DATA 4 0x63fd9040 0x04b80003 DATA 4 0x63fd9058 0x0007 DATA 4 0x63fd901C 0x -- 1.6.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Add 'sf update' command to do smart SPI flash update
This adds a new SPI flash command which only rewrites blocks if the contents
need to change. This can speed up SPI flash programming when much of the
data is unchanged from what is already there.
Signed-off-by: Simon Glass s...@chromium.org
---
common/cmd_sf.c | 75 +-
1 files changed, 73 insertions(+), 2 deletions(-)
diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index 11a491d..4a807eb 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -6,6 +6,7 @@
*/
#include common.h
+#include malloc.h
#include spi_flash.h
#include asm/io.h
@@ -109,6 +110,70 @@ static int do_spi_flash_probe(int argc, char * const
argv[])
return 0;
}
+/**
+ * Update an area of SPI flash by erasing and writing any blocks which need
+ * to change. Existing blocks with the correct data are left unchanged.
+ *
+ * @param flashflash context pointer
+ * @param offset flash offset to write
+ * @param len number of bytes to write
+ * @param buf buffer to write from
+ */
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *oper;
+ int err = 0;
+ char *cmp_buf = NULL;
+ size_t cmp_size = 0;
+ size_t todo;/* number of bytes to do in this pass */
+ size_t skipped, written;/* statistics */
+
+ for (skipped = written = 0; !err len 0;
+ buf += todo, offset += todo, len -= todo) {
+ todo = min(len, flash-sector_size);
+ debug(offset=%#x, sector_size=%#x, todo=%#x\n,
+ offset, flash-sector_size, todo);
+ if (!err) {
+ oper = malloc;
+ if (todo cmp_size) {
+ if (cmp_buf)
+ free(cmp_buf);
+ cmp_buf = malloc(todo);
+ cmp_size = todo;
+ }
+ err = cmp_buf == NULL;
+ }
+ if (!err) {
+ oper = read;
+ err = spi_flash_read(flash, offset, todo, cmp_buf);
+ }
+ if (!err) {
+ if (0 == memcmp(cmp_buf, buf, todo)) {
+ debug(Skip region %x size %x: no change\n,
+ offset, todo);
+ skipped += todo;
+ continue;
+ }
+ }
+ if (!err) {
+ oper = erase;
+ err = spi_flash_erase(flash, offset, todo);
+ }
+ if (!err) {
+ oper = write;
+ err = spi_flash_write(flash, offset, todo, buf);
+ written += todo;
+ }
+ }
+ printf(%d bytes written, %d bytes skipped\n, written, skipped);
+ if (err)
+ printf(SPI flash %s failed\n, oper);
+ if (cmp_buf)
+ free(cmp_buf);
+ return err;
+}
+
static int do_spi_flash_read_write(int argc, char * const argv[])
{
unsigned long addr;
@@ -137,7 +202,9 @@ static int do_spi_flash_read_write(int argc, char * const
argv[])
return 1;
}
- if (strcmp(argv[0], read) == 0)
+ if (strcmp(argv[0], update) == 0)
+ ret = spi_flash_update(flash, offset, len, buf);
+ else if (strcmp(argv[0], read) == 0)
ret = spi_flash_read(flash, offset, len, buf);
else
ret = spi_flash_write(flash, offset, len, buf);
@@ -203,7 +270,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[
return 1;
}
- if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0)
+ if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0 ||
+ strcmp(cmd, update) == 0)
ret = do_spi_flash_read_write(argc, argv);
else if (strcmp(cmd, erase) == 0)
ret = do_spi_flash_erase(argc, argv);
@@ -229,4 +297,7 @@ U_BOOT_CMD(
at `addr' to flash at `offset'\n
sf erase offset [+]len - erase `len' bytes from `offset'\n
`+len' round up `len' to block size
+ sf update addr offset len - erase and write `len' bytes from
+ memory\n
+at `addr' to flash at `offset'\n
);
--
1.7.3.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc:dcache: Cache line size aligned internal MMC buffers
On Friday, August 19, 2011 05:25:13 Lukasz Majewski wrote: + cache_align_buf = memalign(get_dcache_line_size(), nowhere do i see get_dcache_line_size() defined also, what is the code size increase with your patch ? -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
On Friday 19 August 2011 06:25 PM, Marek Vasut wrote:
On Friday, August 19, 2011 12:43:30 PM Aneesh V wrote:
Hi Marek,
On Friday 19 August 2011 03:16 PM, Marek Vasut wrote:
On Friday, August 19, 2011 11:37:29 AM Aneesh V wrote:
Hi Hong,
On Friday 19 August 2011 02:53 PM, Hong Xu wrote:
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
How about converting as much as possible of these to armv5/armv6 generic
code as I mentioned in this thread:
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/105385/focus=1055
26
On a quick look everything below except the flush_dcache_all() seems
to be armv5 generic.
I'd be _VERY_ careful here. And this seems doesn't sound very
convincing. Are you dead sure it won't break any v5 CPU we support?
What Hong has used is operations mentioned in the ARMv5 architecture
and these are not marked as IMPLEMENTATION DEFINED. So, compliant
implementations should implement those CP15 operations. They may
enhance the operations by adding their own like ARM926EJS seems to be
doing with 'flush d-cache all'.
However, I think that's immaterial. Hong can provide this as a library
and define a CONFIG_* flag to enable it. Let the platform maintainers
decide whether to use it or not. IMHO, it will definitely be an
improvement over what we have today.
Hi,
It certainly will, but I'm quite relucant to that as it'll also -- since
CONFIG_SYS_DCACHE_OFF and CONFIG_SYS_ICACHE_OFF isn't defined by default --
break
some things. Even though what I said is not exactly an argument for what you
said.
If you're firm all ARMv5 implement it this way, I'm all for it being done the
way
you suggest it!
I can not vouch for all the CPUs. But I checked one more - ARM946ES.
This one is also implementing all the standard operations that Hong has
used('flush d-cache all' used by Hong is not a standard armv5
operation - that seems to be a 926ejs specific one).
best regards,
Aneesh
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations
Hi Hong,
On Friday 19 August 2011 02:53 PM, Hong Xu wrote:
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Since V1
Modified copyright line
Fix for compiling warnings
Changed the way to use CONFIG_SYS_CACHELINE_SIZE
When unaligned buffer detected, emit ERROR instead of WARNING
Do not make a common v5,v6 cache file. It seems arm946 is lack of
Test-and-Clean DCache operation. And maybe more differents...
arch/arm/cpu/arm926ejs/Makefile |2 +-
arch/arm/cpu/arm926ejs/cache.c | 135
+++
2 files changed, 136 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/cache.c
diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile
index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).o
START= start.o
-COBJS= cpu.o
+COBJS= cpu.o cache.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
new file mode 100644
index 000..756c9b1
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2011 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#define FLUSH_CACHE_OP 0
+#define INVALIDATE_CACHE_OP 1
+
+#ifndef CONFIG_SYS_CACHELINE_SIZE
+/*
+ * ARM926EJ-S Technical Reference Manual, Chap 2.3.1 Table 2-9
+ * only b'10, aka. 32 bytes cache line len is valid
+ */
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+/*
+ * Flush or Invalidate DCache respectively
+ */
+static void cache_range_op(unsigned long start, unsigned long stop, int op)
+{
+ unsigned long mva;
+
+ if (op INVALIDATE_CACHE_OP) {
+ printf(ERROR: %s - Invalid cache operation, op: %d!\n,
+ __func__, op);
+ return;
+ }
+
+ mva = start;
+ if ((mva (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - start address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, start,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round up starting address */
+ mva = (mva | (CONFIG_SYS_CACHELINE_SIZE - 1)) + 1;
+ }
+ if ((stop (CONFIG_SYS_CACHELINE_SIZE - 1)) != 0) {
+ printf(ERROR: %s op: %d - stop address 0x%08lx not aligned
+ to cache line size(%d bytes)\n, __func__, op, stop,
+ CONFIG_SYS_CACHELINE_SIZE);
+ /* Round down ending address */
+ stop = ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ }
+
+ while (mva stop) {
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c14, 1\n : : r(mva));
+ else
+ asm(mcr p15, 0, %0, c7, c6, 1\n : : r(mva));
+
+ mva += CONFIG_SYS_CACHELINE_SIZE;
+ }
+
+ /* Drain WB if necessary */
+ if (op == FLUSH_CACHE_OP)
+ asm(mcr p15, 0, %0, c7, c10, 4\n : : r (0));
+}
+
+/*
+ * The buffer range to be flushed is [start, stop)
+ */
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ cache_range_op(start, stop, FLUSH_CACHE_OP);
+}
+
+void flush_dcache_all(void)
+{
+ /*
+ * ARM926EJ-S Technical Reference Manual, Chap 2.3.8
+ * Clean Invalidate the entire DCache
+ */
+ asm(0: mrc p15, 0, r15, c7, c14, 3\n\t bne 0b\n : : : memory);
+ /* Drain WB */
+ asm(mcr p15, 0, %0, c7, c10, 4\n : : r (0));
While looking at the manuals for the armv5 compatibility I stumbled
upon the following in Chapter 2.3.8. Are you sure your flush_dcache_all
implementation is correct? I suspect the above is flushing only one
Re: [U-Boot] [PATCH] Add 'sf update' command to do smart SPI flash update
On Friday, August 19, 2011 09:47:04 Simon Glass wrote:
This adds a new SPI flash command which only rewrites blocks if the
contents need to change. This can speed up SPI flash programming when much
of the data is unchanged from what is already there.
sounds good
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *oper;
i wonder if there'd be any code size difference if we had:
static const char * const opers[] = {
malloc,
read,
...
};
const char *oper;
...
oper = 0;
...
++oper;
...
++oper;
...
printf(...%s..., ..., opers[oper]);
i hope it'd be slightly smaller as you would be loading up a small int in the
for loop and not an entire pointer ...
+ int err = 0;
+ char *cmp_buf = NULL;
+ size_t cmp_size = 0;
+ size_t todo;/* number of bytes to do in this pass */
+ size_t skipped, written;/* statistics */
+
+ for (skipped = written = 0; !err len 0;
+ buf += todo, offset += todo, len -= todo) {
+ todo = min(len, flash-sector_size);
+ debug(offset=%#x, sector_size=%#x, todo=%#x\n,
+ offset, flash-sector_size, todo);
+ if (!err) {
why do you need to check err here ? you already have !err in the for loop
constraint, err starts off at 0, and there is no setting of err between the
top of the for loop and this point.
+ if (!err) {
+ oper = read;
+ err = spi_flash_read(flash, offset, todo, cmp_buf);
+ }
all this error checking makes my head spin. i wonder if it'd look any better
using the (more normal?) style:
err = ...;
if (err)
break;
err = ...;
if (err)
break;
you could then also drop !err from the for loop constraint, and the initial
err = 0. not that big of a deal if the code size is the same ...
+ if (!err) {
+ if (0 == memcmp(cmp_buf, buf, todo)) {
please reverse the sides of this compare. this is unusual style for the
linux/u-boot projects.
+ if (cmp_buf)
+ free(cmp_buf);
the if() isn't necessary ... free(NULL) works fine and would add extra
overhead only in the (uncommon) failure case. same goes for the malloc()
logic earlier in this func.
+ sf update addr offset len - erase and write `len' bytes from
+ memory\n
please don't split the string constant on non-\n boundaries
-mike
signature.asc
Description: This is a digitally signed message part.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ubifs: Fix bad free() sequence in ubifs_finddir()
On Thursday 28 July 2011 15:27:22 Wolfgang Denk wrote: Free private_data member element before freeing file structure. This was causing malloc to crash. Also remove unnecessary variable assigments as file structure gets free'd as well. Applied to u-boot-ubi/master. Thanks. Best regards, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-ubi/master
Hi Wolfgang, please pull the following fix: The following changes since commit fa82f871c8dbc9a15e8dc274b3f99dd5fa0da458: Convert ISO-8859 files to UTF-8 (2011-08-04 23:34:02 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-ubi.git master Wolfgang Denk (1): ubifs: Fix bad free() sequence in ubifs_finddir() fs/ubifs/ubifs.c |6 ++ 1 files changed, 2 insertions(+), 4 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc:dcache: Cache line size aligned internal MMC buffers
Hi Mike, On Fri, 19 Aug 2011 09:57:10 -0400 Mike Frysinger vap...@gentoo.org wrote: On Friday, August 19, 2011 05:25:13 Lukasz Majewski wrote: + cache_align_buf = memalign(get_dcache_line_size(), nowhere do i see get_dcache_line_size() defined also, what is the code size increase with your patch ? -mike Please look to the following post: http://patchwork.ozlabs.org/patch/110501/ and another related with this issue: http://patchwork.ozlabs.org/patch/110300/ Code size overhead (s5p_goni target): Without proposed changes: 167928 B (u-boot.bin) With changes: 168208 B (u-boot.bin) Delta: 280 B -- Best regards, Lukasz Majewski Samsung Poland RD Center Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc460: read get_sys_info from CPR registers instead of STRP registers
Marri, On Friday 05 August 2011 19:45:05 Tirumala Marri wrote: As mentioned before, we might otherwise remove the dead code. [marri] Sorry I was on vacation last month. We do still need this code as PPC460 is still used by many companies. We are working in submitting the New patch set to fix most of the issues. Any idea roughly, when we might expect such patches? Thanks. Best regards, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc:dcache: Cache line size aligned internal MMC buffers
On Friday, August 19, 2011 11:28:18 Lukasz Majewski wrote: On Fri, 19 Aug 2011 09:57:10 -0400 Mike Frysinger wrote: On Friday, August 19, 2011 05:25:13 Lukasz Majewski wrote: + cache_align_buf = memalign(get_dcache_line_size(), nowhere do i see get_dcache_line_size() defined Please look to the following post: http://patchwork.ozlabs.org/patch/110501/ and another related with this issue: http://patchwork.ozlabs.org/patch/110300/ if you're posting patches with dependencies, you need to mention them explicitly (below the --- area), or send proper patch series ([PATCH N/M]). ignoring that, this patch will break all arches except arm. that's bad mmmkay. you probably need to move that weak def out of arm's cache.c and into like lib/cache.c. also, what is the code size increase with your patch ? Code size overhead (s5p_goni target): Without proposed changes: 167928 B (u-boot.bin) With changes: 168208 B (u-boot.bin) Delta: 280 B np if it gives significant (more than system noise) speedups. any details on that ? -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [u-boot PATCH] arm, lib/bootm.c: Exclude HIGHMEM from being used by u-boot
Reserve any memory above 768MB to prevent u-boot from relocating fdt or initrd
data into memory that Linux cannot reference during early boot. Code taken (with
modifications) from the powerpc bootm.c.
Signed-off-by: David A. Long dave.l...@linaro.org
---
arch/arm/lib/bootm.c | 24 +++-
1 files changed, 23 insertions(+), 1 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 802e833..437ef35 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -32,6 +32,10 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifndef CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE
+#define CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE (768*1024*1024)
+#endif
+
#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
defined (CONFIG_CMDLINE_TAG) || \
defined (CONFIG_INITRD_TAG) || \
@@ -60,7 +64,25 @@ static int bootm_linux_fdt(int machid, bootm_headers_t
*images);
void arch_lmb_reserve(struct lmb *lmb)
{
- ulong sp;
+ phys_size_t bootm_size;
+ ulong size, sp, bootmap_base;
+
+ bootmap_base = getenv_bootm_low();
+ bootm_size = getenv_bootm_size();
+
+#ifdef DEBUG
+ if (((u64)bootmap_base + bootm_size)
+ (CONFIG_SYS_SDRAM_BASE + (u64) gd-ram_size))
+ puts(WARNING: bootm_low + bootm_size exceed total memory\n);
+#endif
+
+ size = min(bootm_size, CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE);
+
+ if (size bootm_size) {
+ ulong base = bootmap_base + size;
+ printf(WARNING: adjusting available memory to %lx\n, size);
+ lmb_reserve(lmb, base, bootm_size - size);
+ }
/*
* Booting a (Linux) kernel image
--
1.7.4.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add 'sf update' command to do smart SPI flash update
Hi Mike,
On Fri, Aug 19, 2011 at 9:14 AM, Mike Frysinger vap...@gentoo.org wrote:
On Friday, August 19, 2011 09:47:04 Simon Glass wrote:
This adds a new SPI flash command which only rewrites blocks if the
contents need to change. This can speed up SPI flash programming when much
of the data is unchanged from what is already there.
sounds good
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *oper;
i wonder if there'd be any code size difference if we had:
static const char * const opers[] = {
malloc,
read,
...
};
const char *oper;
...
oper = 0;
...
++oper;
...
++oper;
...
printf(...%s..., ..., opers[oper]);
i hope it'd be slightly smaller as you would be loading up a small int in the
for loop and not an entire pointer ...
It's exactly the same code/data size on ARM, but perhaps smaller on a
different architecture. I like that approach anyway so will change it.
+ int err = 0;
+ char *cmp_buf = NULL;
+ size_t cmp_size = 0;
+ size_t todo; /* number of bytes to do in this pass */
+ size_t skipped, written; /* statistics */
+
+ for (skipped = written = 0; !err len 0;
+ buf += todo, offset += todo, len -= todo) {
+ todo = min(len, flash-sector_size);
+ debug(offset=%#x, sector_size=%#x, todo=%#x\n,
+ offset, flash-sector_size, todo);
+ if (!err) {
why do you need to check err here ? you already have !err in the for loop
constraint, err starts off at 0, and there is no setting of err between the
top of the for loop and this point.
It's a hangover from previous code - will remove it.
+ if (!err) {
+ oper = read;
+ err = spi_flash_read(flash, offset, todo, cmp_buf);
+ }
all this error checking makes my head spin. i wonder if it'd look any better
using the (more normal?) style:
err = ...;
if (err)
break;
err = ...;
if (err)
break;
you could then also drop !err from the for loop constraint, and the initial
err = 0. not that big of a deal if the code size is the same ...
Ick. I will send a new patch with the code in a function and see what
you think about that. It is 0x88 bytes smaller on ARM than this patch.
+ if (!err) {
+ if (0 == memcmp(cmp_buf, buf, todo)) {
please reverse the sides of this compare. this is unusual style for the
linux/u-boot projects.
ok
+ if (cmp_buf)
+ free(cmp_buf);
the if() isn't necessary ... free(NULL) works fine and would add extra
overhead only in the (uncommon) failure case. same goes for the malloc()
logic earlier in this func.
OK.
+ sf update addr offset len - erase and write `len' bytes from
+ memory\n
please don't split the string constant on non-\n boundaries
ok, will go over 80cols.
-mike
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add 'sf update' command to do smart SPI flash update
On Friday, August 19, 2011 14:07:16 Simon Glass wrote:
On Fri, Aug 19, 2011 at 9:14 AM, Mike Frysinger wrote:
On Friday, August 19, 2011 09:47:04 Simon Glass wrote:
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *oper;
i wonder if there'd be any code size difference if we had:
static const char * const opers[] = {
malloc,
read,
...
};
const char *oper;
...
oper = 0;
...
++oper;
...
++oper;
...
printf(...%s..., ..., opers[oper]);
i hope it'd be slightly smaller as you would be loading up a small int in
the for loop and not an entire pointer ...
It's exactly the same code/data size on ARM, but perhaps smaller on a
different architecture. I like that approach anyway so will change it.
i know on Blackfin at least, doing something like:
i = 0;
will expand into a 16bit insn:
R0 = 0;
and the follow up:
++i;
will be another 16bit insn:
R0 += 1;
while something like:
void *foo = foo;
will expand into two 32bit insns:
P0.L = _some_label_for_string;
P0.H = _some_label_for_string;
and since there will be no known relationship between the diff strings at the
C - asm stage (since string placement is done by the linker), each string
load will be a sep pointer load.
i imagine that the normal ARM insn set sucks at this kind of code density, but
i'd think their reworks (like thumb and friends) would be much better.
do we leverage thumb at all in ARM u-boot ? or am i crazy/stupid for thinking
this could possibly be a good thing ?
-mike
signature.asc
Description: This is a digitally signed message part.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [STATUS] ARM
On 19.08.2011 11:38, Aneesh V wrote: Hi Albert, On Friday 19 August 2011 03:39 AM, Albert ARIBAUD wrote: Hi all, This week-end I intend to go through the board removal patch set and apply those patches in it that still fail to compile with the current u-boot-arm/master tree. So: 1) if there are any pull requests to u-voot-arm/master in the works, please try to submit them soon or at lease let me know, and Please don't miss http://lists.denx.de/pipermail/u-boot/2011-August/098795.html 2) if there are any board fix patches posted after merge window closure and still pending, please also let me know (those before the merge window closure should all be in u-boot-arm by now). I have these patches that fix couple of build issues with OMAP platforms. I am hoping that Sandeep will pull these soon. 1. http://patchwork.ozlabs.org/patch/107678/ 2. http://patchwork.ozlabs.org/patch/108865/ Yes, please don't miss these two patches. Additionally, http://patchwork.ozlabs.org/patch/109264/ is needed to fix an issue introduced with the patch mkimage: Add OMAP boot image support. IMHO with these patches all boards in ./MAKEALL ARMV7 should build fine, without any warnings. At least the last time I tried it some days ago ;) So, if you find additional (new?) issues or if you are about removing any _ARMv7_ board, please let us know before that we could check. Many thanks and best regards Dirk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] Add 'sf update' command to do smart SPI flash update
This adds a new SPI flash command which only rewrites blocks if the contents
need to change. This can speed up SPI flash programming when much of the
data is unchanged from what is already there.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
-Moved loop into a function
-Moved malloc outside loop
-Other minor changes from review comments
common/cmd_sf.c | 82 +-
1 files changed, 80 insertions(+), 2 deletions(-)
diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index 11a491d..e69dc1e 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -6,6 +6,7 @@
*/
#include common.h
+#include malloc.h
#include spi_flash.h
#include asm/io.h
@@ -109,6 +110,78 @@ static int do_spi_flash_probe(int argc, char * const
argv[])
return 0;
}
+/**
+ * Write a block of data to SPI flash, first checking if it is different from
+ * what is already there.
+ *
+ * If the data being written is the same, then *skipped is incremented by len.
+ *
+ * @param flashflash context pointer
+ * @param offset flash offset to write
+ * @param len number of bytes to write
+ * @param buf buffer to write from
+ * @param cmp_buf read buffer to use to compare data
+ * @param skipped Count of skipped data (incremented by this function)
+ * @return NULL if OK, else a string containing the stage which failed
+ */
+static const char *write_block(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf, char *cmp_buf, size_t *skipped)
+{
+ debug(offset=%#x, sector_size=%#x, len=%#x\n,
+ offset, flash-sector_size, len);
+ if (spi_flash_read(flash, offset, len, cmp_buf))
+ returnread;
+ if (memcmp(cmp_buf, buf, len) == 0) {
+ debug(Skip region %x size %x: no change\n,
+ offset, len);
+ *skipped += len;
+ return NULL;
+ }
+ if (spi_flash_erase(flash, offset, len))
+ return erase;
+ if (spi_flash_write(flash, offset, len, buf))
+ return write;
+ return NULL;
+}
+
+/**
+ * Update an area of SPI flash by erasing and writing any blocks which need
+ * to change. Existing blocks with the correct data are left unchanged.
+ *
+ * @param flashflash context pointer
+ * @param offset flash offset to write
+ * @param len number of bytes to write
+ * @param buf buffer to write from
+ * @return 0 if ok, 1 on error
+ */
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *err_oper = NULL;
+ char *cmp_buf;
+ const char *end = buf + len;
+ size_t todo;/* number of bytes to do in this pass */
+ size_t skipped; /* statistics */
+
+ cmp_buf = malloc(flash-sector_size);
+ if (cmp_buf) {
+ for (skipped = 0; buf end; buf += todo, offset += todo) {
+ todo = min(end - buf, flash-sector_size);
+ err_oper = write_block(flash, offset, todo, buf,
+ cmp_buf, skipped);
+ }
+ } else {
+ err_oper = malloc;
+ }
+ free(cmp_buf);
+ if (err_oper) {
+ printf(SPI flash %s failed\n, err_oper);
+ return 1;
+ }
+ printf(%d bytes written, %d bytes skipped\n, len - skipped, skipped);
+ return 0;
+}
+
static int do_spi_flash_read_write(int argc, char * const argv[])
{
unsigned long addr;
@@ -137,7 +210,9 @@ static int do_spi_flash_read_write(int argc, char * const
argv[])
return 1;
}
- if (strcmp(argv[0], read) == 0)
+ if (strcmp(argv[0], update) == 0)
+ ret = spi_flash_update(flash, offset, len, buf);
+ else if (strcmp(argv[0], read) == 0)
ret = spi_flash_read(flash, offset, len, buf);
else
ret = spi_flash_write(flash, offset, len, buf);
@@ -203,7 +278,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[
return 1;
}
- if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0)
+ if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0 ||
+ strcmp(cmd, update) == 0)
ret = do_spi_flash_read_write(argc, argv);
else if (strcmp(cmd, erase) == 0)
ret = do_spi_flash_erase(argc, argv);
@@ -229,4 +305,6 @@ U_BOOT_CMD(
at `addr' to flash at `offset'\n
sf erase offset [+]len - erase `len' bytes from `offset'\n
`+len' round up `len' to block size
+ sf update addr offset len - erase and write `len' bytes from
memory\n
+at `addr' to flash at `offset'\n
Re: [U-Boot] please pull u-boot-samsung/master
Hi Minkyu, Le 19/08/2011 07:34, Minkyu Kang a écrit : Dear Albert ARIBAUD, The following changes since commit 6477396323193c04ebb510dd2786173da31f4911: arm: fix bd pointer dereference prior initialization (2011-08-17 18:10:34 +0200) are available in the git repository at: git://git.denx.de/u-boot-samsung master Anton Staaf (1): mmc: S5P: Support DMA restarts at buffer boundaries Chander Kashyap (3): SMDKV310: Fix build error for smdkv310 board SMDKV310: Fix undefined reference error SMDKV310: MMC SPL: Remove unwanted dummy functions Dirk Behme (1): SMDKV310: Fix host compilation of mkv310_image Łukasz Majewski (2): gpio:samsung s5p_ suffix add for GPIO functions gpio:samsung: s5p_ suffix add for GPIO functions (C210_universal) arch/arm/include/asm/arch-s5pc1xx/gpio.h | 16 +- arch/arm/include/asm/arch-s5pc2xx/gpio.h | 16 +- board/samsung/goni/goni.c |8 +++--- board/samsung/smdkc100/smdkc100.c |2 +- board/samsung/smdkv310/smdkv310.c | 10 +++--- board/samsung/universal_c210/universal.c | 28 ++-- drivers/gpio/s5p_gpio.c| 20 +++--- drivers/mmc/s5p_mmc.c | 15 --- mmc_spl/board/samsung/smdkv310/Makefile|1 + mmc_spl/board/samsung/smdkv310/mmc_boot.c | 28 +--- .../board/samsung/smdkv310/tools/mkv310_image.c|1 + mmc_spl/board/samsung/smdkv310/u-boot.lds |2 + 12 files changed, 66 insertions(+), 81 deletions(-) Applied to u-boot-arm/master, thanks! Score is now down to 200 boards built, 69 with warnings or errors. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add 'sf update' command to do smart SPI flash update
Hi Mike,
On Fri, Aug 19, 2011 at 12:19 PM, Mike Frysinger vap...@gentoo.org wrote:
On Friday, August 19, 2011 14:07:16 Simon Glass wrote:
On Fri, Aug 19, 2011 at 9:14 AM, Mike Frysinger wrote:
On Friday, August 19, 2011 09:47:04 Simon Glass wrote:
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *oper;
i wonder if there'd be any code size difference if we had:
static const char * const opers[] = {
malloc,
read,
...
};
const char *oper;
...
oper = 0;
...
++oper;
...
++oper;
...
printf(...%s..., ..., opers[oper]);
i hope it'd be slightly smaller as you would be loading up a small int in
the for loop and not an entire pointer ...
It's exactly the same code/data size on ARM, but perhaps smaller on a
different architecture. I like that approach anyway so will change it.
i know on Blackfin at least, doing something like:
i = 0;
will expand into a 16bit insn:
R0 = 0;
and the follow up:
++i;
will be another 16bit insn:
R0 += 1;
while something like:
void *foo = foo;
will expand into two 32bit insns:
P0.L = _some_label_for_string;
P0.H = _some_label_for_string;
and since there will be no known relationship between the diff strings at the
C - asm stage (since string placement is done by the linker), each string
load will be a sep pointer load.
i imagine that the normal ARM insn set sucks at this kind of code density, but
i'd think their reworks (like thumb and friends) would be much better.
Well it's just a literal pool access on ARM, so a single instruction
on both ARM and Thumb. Not sure how else the compiler would do it...
do we leverage thumb at all in ARM u-boot ? or am i crazy/stupid for thinking
this could possibly be a good thing ?
-mike
No we don't. IMO if available we should use Thumb 2 instead of ARM
most of the time - it is a lot smaller and runs about the same speed.
Regards,
Simon
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add 'sf update' command to do smart SPI flash update
On Friday, August 19, 2011 14:25:46 Simon Glass wrote:
On Fri, Aug 19, 2011 at 12:19 PM, Mike Frysinger wrote:
On Friday, August 19, 2011 14:07:16 Simon Glass wrote:
On Fri, Aug 19, 2011 at 9:14 AM, Mike Frysinger wrote:
On Friday, August 19, 2011 09:47:04 Simon Glass wrote:
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *oper;
i wonder if there'd be any code size difference if we had:
static const char * const opers[] = {
malloc,
read,
...
};
const char *oper;
...
oper = 0;
...
++oper;
...
++oper;
...
printf(...%s..., ..., opers[oper]);
i hope it'd be slightly smaller as you would be loading up a small int
in the for loop and not an entire pointer ...
It's exactly the same code/data size on ARM, but perhaps smaller on a
different architecture. I like that approach anyway so will change it.
i know on Blackfin at least, doing something like:
i = 0;
will expand into a 16bit insn:
R0 = 0;
and the follow up:
++i;
will be another 16bit insn:
R0 += 1;
while something like:
void *foo = foo;
will expand into two 32bit insns:
P0.L = _some_label_for_string;
P0.H = _some_label_for_string;
and since there will be no known relationship between the diff strings at
the C - asm stage (since string placement is done by the linker), each
string load will be a sep pointer load.
i imagine that the normal ARM insn set sucks at this kind of code
density, but i'd think their reworks (like thumb and friends) would be
much better.
Well it's just a literal pool access on ARM, so a single instruction
on both ARM and Thumb. Not sure how else the compiler would do it...
i'm not as well versed in ARM lingo as you to understand what literal pool
access means ...
-mike
signature.asc
Description: This is a digitally signed message part.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Add 'sf update' command to do smart SPI flash update
On Friday, August 19, 2011 14:19:42 Simon Glass wrote: +static const char *write_block(struct spi_flash *flash, u32 offset, + size_t len, const char *buf, char *cmp_buf, size_t *skipped) spi_flash_update_block is probably a better name. after all, you're doing more (and sometimes less) than writing a block. + returnread; need a space in the middle there + printf(SPI flash %s failed\n, err_oper); how about: SPI flash update failed in %s step running 'sf update' on the command line would be obvious where the problem is coming from, but if you have a bunch of sf commands in a script and only see one error, it's probably confusing to quickly pick out where the error occurred. - if (strcmp(argv[0], read) == 0) + if (strcmp(argv[0], update) == 0) + ret = spi_flash_update(flash, offset, len, buf); + else if (strcmp(argv[0], read) == 0) ret = spi_flash_read(flash, offset, len, buf); ... - if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0) + if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0 || + strcmp(cmd, update) == 0) ret = do_spi_flash_read_write(argc, argv); else if (strcmp(cmd, erase) == 0) ret = do_spi_flash_erase(argc, argv); these duplicate strcmp's make me wonder if a follow up patch should turn these into a tokenize step first and then later code works off that rest looks fine -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add 'sf update' command to do smart SPI flash update
On Fri, Aug 19, 2011 at 12:57 PM, Mike Frysinger vap...@gentoo.org wrote:
On Friday, August 19, 2011 14:25:46 Simon Glass wrote:
On Fri, Aug 19, 2011 at 12:19 PM, Mike Frysinger wrote:
On Friday, August 19, 2011 14:07:16 Simon Glass wrote:
On Fri, Aug 19, 2011 at 9:14 AM, Mike Frysinger wrote:
On Friday, August 19, 2011 09:47:04 Simon Glass wrote:
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *oper;
i wonder if there'd be any code size difference if we had:
static const char * const opers[] = {
malloc,
read,
...
};
const char *oper;
...
oper = 0;
...
++oper;
...
++oper;
...
printf(...%s..., ..., opers[oper]);
i hope it'd be slightly smaller as you would be loading up a small int
in the for loop and not an entire pointer ...
It's exactly the same code/data size on ARM, but perhaps smaller on a
different architecture. I like that approach anyway so will change it.
i know on Blackfin at least, doing something like:
i = 0;
will expand into a 16bit insn:
R0 = 0;
and the follow up:
++i;
will be another 16bit insn:
R0 += 1;
while something like:
void *foo = foo;
will expand into two 32bit insns:
P0.L = _some_label_for_string;
P0.H = _some_label_for_string;
and since there will be no known relationship between the diff strings at
the C - asm stage (since string placement is done by the linker), each
string load will be a sep pointer load.
i imagine that the normal ARM insn set sucks at this kind of code
density, but i'd think their reworks (like thumb and friends) would be
much better.
Well it's just a literal pool access on ARM, so a single instruction
on both ARM and Thumb. Not sure how else the compiler would do it...
i'm not as well versed in ARM lingo as you to understand what literal pool
access means ...
-mike
Hi Mike,
:-) It's just a pool of literals, basically in this case a list of
string pointers, placed close to the PC address so that you can easily
access them with a PC-relative load. It's not an ARM think though -
lots of CPUs use them. The alternative is to encode the full address
in the instruction, so I suppose it's this:
ldr r0, fred(which turns into ldr r0, [pc, #offset of fred])
fred:
DCD 0x12345678
instead of:
mov r0, #0x12345678
Regards,
Simon
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Add 'sf update' command to do smart SPI flash update
Hi Mike, On Fri, Aug 19, 2011 at 1:03 PM, Mike Frysinger vap...@gentoo.org wrote: On Friday, August 19, 2011 14:19:42 Simon Glass wrote: +static const char *write_block(struct spi_flash *flash, u32 offset, + size_t len, const char *buf, char *cmp_buf, size_t *skipped) spi_flash_update_block is probably a better name. after all, you're doing more (and sometimes less) than writing a block. + returnread; need a space in the middle there Done + printf(SPI flash %s failed\n, err_oper); how about: SPI flash update failed in %s step running 'sf update' on the command line would be obvious where the problem is coming from, but if you have a bunch of sf commands in a script and only see one error, it's probably confusing to quickly pick out where the error occurred. Done - if (strcmp(argv[0], read) == 0) + if (strcmp(argv[0], update) == 0) + ret = spi_flash_update(flash, offset, len, buf); + else if (strcmp(argv[0], read) == 0) ret = spi_flash_read(flash, offset, len, buf); ... - if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0) + if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0 || + strcmp(cmd, update) == 0) ret = do_spi_flash_read_write(argc, argv); else if (strcmp(cmd, erase) == 0) ret = do_spi_flash_erase(argc, argv); these duplicate strcmp's make me wonder if a follow up patch should turn these into a tokenize step first and then later code works off that Yes I agree. Still the sf code is quite a bit cleaner than March. rest looks fine -mike Thanks, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] Add 'sf update' command to do smart SPI flash update
This adds a new SPI flash command which only rewrites blocks if the contents
need to change. This can speed up SPI flash programming when much of the
data is unchanged from what is already there.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
-Moved loop into a function
-Moved malloc outside loop
-Other minor changes from review comments
Changes in v3:
-Change error message
-Style and function name change
common/cmd_sf.c | 82 +-
1 files changed, 80 insertions(+), 2 deletions(-)
diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index 11a491d..69f04e5 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -6,6 +6,7 @@
*/
#include common.h
+#include malloc.h
#include spi_flash.h
#include asm/io.h
@@ -109,6 +110,78 @@ static int do_spi_flash_probe(int argc, char * const
argv[])
return 0;
}
+/**
+ * Write a block of data to SPI flash, first checking if it is different from
+ * what is already there.
+ *
+ * If the data being written is the same, then *skipped is incremented by len.
+ *
+ * @param flashflash context pointer
+ * @param offset flash offset to write
+ * @param len number of bytes to write
+ * @param buf buffer to write from
+ * @param cmp_buf read buffer to use to compare data
+ * @param skipped Count of skipped data (incremented by this function)
+ * @return NULL if OK, else a string containing the stage which failed
+ */
+static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf, char *cmp_buf, size_t *skipped)
+{
+ debug(offset=%#x, sector_size=%#x, len=%#x\n,
+ offset, flash-sector_size, len);
+ if (spi_flash_read(flash, offset, len, cmp_buf))
+ return read;
+ if (memcmp(cmp_buf, buf, len) == 0) {
+ debug(Skip region %x size %x: no change\n,
+ offset, len);
+ *skipped += len;
+ return NULL;
+ }
+ if (spi_flash_erase(flash, offset, len))
+ return erase;
+ if (spi_flash_write(flash, offset, len, buf))
+ return write;
+ return NULL;
+}
+
+/**
+ * Update an area of SPI flash by erasing and writing any blocks which need
+ * to change. Existing blocks with the correct data are left unchanged.
+ *
+ * @param flashflash context pointer
+ * @param offset flash offset to write
+ * @param len number of bytes to write
+ * @param buf buffer to write from
+ * @return 0 if ok, 1 on error
+ */
+static int spi_flash_update(struct spi_flash *flash, u32 offset,
+ size_t len, const char *buf)
+{
+ const char *err_oper = NULL;
+ char *cmp_buf;
+ const char *end = buf + len;
+ size_t todo;/* number of bytes to do in this pass */
+ size_t skipped; /* statistics */
+
+ cmp_buf = malloc(flash-sector_size);
+ if (cmp_buf) {
+ for (skipped = 0; buf end; buf += todo, offset += todo) {
+ todo = min(end - buf, flash-sector_size);
+ err_oper = spi_flash_update_block(flash, offset, todo,
+ buf, cmp_buf, skipped);
+ }
+ } else {
+ err_oper = malloc;
+ }
+ free(cmp_buf);
+ if (err_oper) {
+ printf(SPI flash failed in %s step\n, err_oper);
+ return 1;
+ }
+ printf(%d bytes written, %d bytes skipped\n, len - skipped, skipped);
+ return 0;
+}
+
static int do_spi_flash_read_write(int argc, char * const argv[])
{
unsigned long addr;
@@ -137,7 +210,9 @@ static int do_spi_flash_read_write(int argc, char * const
argv[])
return 1;
}
- if (strcmp(argv[0], read) == 0)
+ if (strcmp(argv[0], update) == 0)
+ ret = spi_flash_update(flash, offset, len, buf);
+ else if (strcmp(argv[0], read) == 0)
ret = spi_flash_read(flash, offset, len, buf);
else
ret = spi_flash_write(flash, offset, len, buf);
@@ -203,7 +278,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[
return 1;
}
- if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0)
+ if (strcmp(cmd, read) == 0 || strcmp(cmd, write) == 0 ||
+ strcmp(cmd, update) == 0)
ret = do_spi_flash_read_write(argc, argv);
else if (strcmp(cmd, erase) == 0)
ret = do_spi_flash_erase(argc, argv);
@@ -229,4 +305,6 @@ U_BOOT_CMD(
at `addr' to flash at `offset'\n
sf erase offset [+]len - erase `len' bytes from `offset'\n
`+len' round up `len' to block size
+ sf update addr offset len - erase and write
[U-Boot] [PATCH 1/2] fat: root directory cluster only makes sense for FAT32
The root directory cluster field only exists in a FAT32 boot sector, so the
'root_cluster' variable in do_fat_read() contains garbage in case of FAT12/16.
Make it contain 0 instead as this is what is passed to get_vfatname() in that
case anyway.
Signed-off-by: Sergei Shtylyov sshtyl...@mvista.com
---
Slight optimization atop of commit 3831530dcb7b71329c272ccd6181f8038b6a6dd0
(VFAT: fix processing of scattered long file name entries).
The patch was generated atop of the below patches posted earlier:
http://marc.info/?l=u-bootm=131283284822789
http://marc.info/?l=u-bootm=131283289722891
fs/fat/fat.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
Index: u-boot/fs/fat/fat.c
===
--- u-boot.orig/fs/fat/fat.c
+++ u-boot/fs/fat/fat.c
@@ -788,7 +788,7 @@ do_fat_read (const char *filename, void
int files = 0, dirs = 0;
long ret = -1;
int firsttime;
- __u32 root_cluster;
+ __u32 root_cluster = 0;
int rootdir_size = 0;
int j;
@@ -797,12 +797,12 @@ do_fat_read (const char *filename, void
return -1;
}
- root_cluster = bs.root_cluster;
-
- if (mydata-fatsize == 32)
+ if (mydata-fatsize == 32) {
+ root_cluster = bs.root_cluster;
mydata-fatlength = bs.fat32_length;
- else
+ } else {
mydata-fatlength = bs.fat_length;
+ }
mydata-fat_sect = bs.reserved;
@@ -904,9 +904,7 @@ do_fat_read (const char *filename, void
((dir_slot
*)dentptr)-alias_checksum;
get_vfatname(mydata,
-(mydata-fatsize == 32) ?
-root_cluster :
-0,
+root_cluster,
do_fat_read_block,
dentptr, l_name);
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] fat: replace LINEAR_PREFETCH_SIZE with PREFETCH_BLOCKS
Currently in do_fat_read() when reading FAT sectors, we have to divide down
LINEAR_PREFETCH_SIZE by the sector size, whereas it's defined as 2 sectors
worth of bytes. In order to avoid redundant multiplication/division, introduce
#define PREFETCH_BLOCKS instead of #define LINEAR_PREFETCH_SIZE.
Signed-off-by: Sergei Shtylyov sshtyl...@mvista.com
---
Slight optimization atop of commit 3831530dcb7b71329c272ccd6181f8038b6a6dd0
(VFAT: fix processing of scattered long file name entries) and my recently
submitted patch fixing crash with big sector size.
The patch was generated atop of the below patches posted earlier:
http://marc.info/?l=u-bootm=131283284822789
http://marc.info/?l=u-bootm=131283289722891
fs/fat/fat.c |9 -
include/fat.h |2 +-
2 files changed, 5 insertions(+), 6 deletions(-)
Index: u-boot/fs/fat/fat.c
===
--- u-boot.orig/fs/fat/fat.c
+++ u-boot/fs/fat/fat.c
@@ -440,10 +440,9 @@ get_vfatname (fsdata *mydata, int curclu
{
dir_entry *realdent;
dir_slot *slotptr = (dir_slot *)retdent;
- __u8 *buflimit = cluster + ((curclust == 0) ?
- LINEAR_PREFETCH_SIZE :
- (mydata-clust_size * mydata-sect_size)
- );
+ __u8 *buflimit = cluster + mydata-sect_size * ((curclust == 0) ?
+ PREFETCH_BLOCKS :
+ mydata-clust_size);
__u8 counter = (slotptr-id ~LAST_LONG_ENTRY_MASK) 0xff;
int idx = 0;
@@ -880,7 +879,7 @@ do_fat_read (const char *filename, void
if (disk_read(cursect,
(mydata-fatsize == 32) ?
(mydata-clust_size) :
- LINEAR_PREFETCH_SIZE / mydata-sect_size,
+ PREFETCH_BLOCKS,
do_fat_read_block) 0) {
debug(Error: reading rootdir block\n);
goto exit;
Index: u-boot/include/fat.h
===
--- u-boot.orig/include/fat.h
+++ u-boot/include/fat.h
@@ -33,7 +33,7 @@
/* Maximum Long File Name length supported here is 128 UTF-16 code units */
#define VFAT_MAXLEN_BYTES 256 /* Maximum LFN buffer in bytes */
#define VFAT_MAXSEQ9 /* Up to 9 of 13 2-byte UTF-16 entries */
-#define LINEAR_PREFETCH_SIZE (mydata-sect_size*2) /* Prefetch buffer size */
+#define PREFETCH_BLOCKS2
#define MAX_CLUSTSIZE 65536
#define DIRENTSPERBLOCK(mydata-sect_size / sizeof(dir_entry))
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] NAND: Really ignore bad blocks when scrubbing
On 08/16/2011 12:03 PM, Marek Vasut wrote:
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/mtd/nand/nand_base.c |2 +-
drivers/mtd/nand/nand_util.c |1 +
include/linux/mtd/mtd.h |1 +
3 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a5f872e..3093067 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2224,7 +2224,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct
erase_info *instr,
/*
* heck if we have a bad block, we do not erase bad blocks !
*/
- if (nand_block_checkbad(mtd, ((loff_t) page)
+ if (!instr-scrub nand_block_checkbad(mtd, ((loff_t) page)
chip-page_shift, 0, allowbbt)) {
printk(KERN_WARNING nand_erase: attempt to erase a
bad block at page 0x%08x\n, page);
Changelog should describe why the existing mechanism of overriding the
block_bad method is insufficient (I think there may be issues if you try
to scrub before the bbt is first built) -- and if this supersedes that
mechanism, that mechanism should be removed.
-Scott
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Small refactor to remove duplicate serial code
This tidies up duplicate code, and checks that default_serial_console() does
in fact produce a device.
Signed-off-by: Simon Glass s...@chromium.org
---
common/serial.c | 64 +-
1 files changed, 20 insertions(+), 44 deletions(-)
diff --git a/common/serial.c b/common/serial.c
index 995d268..7bfc861 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -158,73 +158,49 @@ void serial_reinit_all (void)
}
}
-int serial_init (void)
+static struct serial_device *get_current(void)
{
- if (!(gd-flags GD_FLG_RELOC) || !serial_current) {
- struct serial_device *dev = default_serial_console ();
+ struct serial_device *dev;
- return dev-init ();
- }
+ if (!(gd-flags GD_FLG_RELOC) || !serial_current) {
+ dev = default_serial_console();
+
+ /* We must have a console device */
+ if (!dev)
+ panic(Cannot find console);
+ } else
+ dev = serial_current;
+ return dev;
+}
- return serial_current-init ();
+int serial_init(void)
+{
+ return get_current()-init();
}
void serial_setbrg (void)
{
- if (!(gd-flags GD_FLG_RELOC) || !serial_current) {
- struct serial_device *dev = default_serial_console ();
-
- dev-setbrg ();
- return;
- }
-
- serial_current-setbrg ();
+ get_current()-setbrg();
}
int serial_getc (void)
{
- if (!(gd-flags GD_FLG_RELOC) || !serial_current) {
- struct serial_device *dev = default_serial_console ();
-
- return dev-getc ();
- }
-
- return serial_current-getc ();
+ return get_current()-getc();
}
int serial_tstc (void)
{
- if (!(gd-flags GD_FLG_RELOC) || !serial_current) {
- struct serial_device *dev = default_serial_console ();
-
- return dev-tstc ();
- }
-
- return serial_current-tstc ();
+ return get_current()-tstc();
}
void serial_putc (const char c)
{
- if (!(gd-flags GD_FLG_RELOC) || !serial_current) {
- struct serial_device *dev = default_serial_console ();
-
- dev-putc (c);
- return;
- }
-
- serial_current-putc (c);
+ get_current()-putc(c);
}
void serial_puts (const char *s)
{
- if (!(gd-flags GD_FLG_RELOC) || !serial_current) {
- struct serial_device *dev = default_serial_console ();
-
- dev-puts (s);
- return;
- }
-
- serial_current-puts (s);
+ get_current()-puts(s);
}
#if CONFIG_POST CONFIG_SYS_POST_UART
--
1.7.3.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] Add 'sf update' command to do smart SPI flash update
On Friday, August 19, 2011 15:28:48 Simon Glass wrote: This adds a new SPI flash command which only rewrites blocks if the contents need to change. This can speed up SPI flash programming when much of the data is unchanged from what is already there. looks good to me. i'll give it a spin on a board of mine and then push into my sf branch. i really should write a spi flash simulation so i could just test this from gdb ... -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 5/7]Timer: Remove reset_timer() for non-Nios2 arches
On Tuesday, July 26, 2011 08:53:37 Wolfgang Denk wrote: Dear Graeme Russ, In message 1310809000-3402-1-git-send-email-graeme.r...@gmail.com you wrote: Signed-off-by: Graeme Russ graeme.r...@gmail.com --- Changes since v2: - Added Signed-off-by Changes since v1 ((WIP) [Timer]API Rewrite): - Rebased to 68d4230c3ccce96a72c5b99e48399bf1796fe3c6 arch/arm/cpu/arm1136/mx31/timer.c|5 - arch/arm/cpu/arm1136/mx35/timer.c|5 - arch/arm/cpu/arm1136/omap24xx/timer.c|5 - arch/arm/cpu/arm1176/s3c64xx/timer.c |5 - arch/arm/cpu/arm1176/tnetv107x/timer.c |9 - arch/arm/cpu/arm720t/interrupts.c|5 - arch/arm/cpu/arm920t/a320/timer.c|6 -- arch/arm/cpu/arm920t/at91/timer.c|6 -- arch/arm/cpu/arm920t/at91rm9200/timer.c |6 -- arch/arm/cpu/arm920t/ep93xx/timer.c |5 - arch/arm/cpu/arm920t/imx/timer.c |6 -- arch/arm/cpu/arm920t/ks8695/timer.c |7 +-- arch/arm/cpu/arm920t/s3c24x0/timer.c |6 -- arch/arm/cpu/arm925t/timer.c |6 -- arch/arm/cpu/arm926ejs/armada100/timer.c |5 - arch/arm/cpu/arm926ejs/davinci/timer.c |5 - arch/arm/cpu/arm926ejs/kirkwood/timer.c |5 - arch/arm/cpu/arm926ejs/mb86r0x/timer.c |5 - arch/arm/cpu/arm926ejs/mx25/timer.c |5 - arch/arm/cpu/arm926ejs/mx27/timer.c |5 - arch/arm/cpu/arm926ejs/nomadik/timer.c | 12 +--- arch/arm/cpu/arm926ejs/omap/timer.c |6 -- arch/arm/cpu/arm926ejs/orion5x/timer.c |5 - arch/arm/cpu/arm926ejs/pantheon/timer.c |5 - arch/arm/cpu/arm926ejs/spear/timer.c |6 -- arch/arm/cpu/arm926ejs/versatile/timer.c |6 -- arch/arm/cpu/armv7/mx5/timer.c |5 - arch/arm/cpu/armv7/omap-common/timer.c |5 - arch/arm/cpu/armv7/s5p-common/timer.c|5 - arch/arm/cpu/armv7/tegra2/timer.c|5 - arch/arm/cpu/ixp/timer.c |5 - arch/arm/cpu/lh7a40x/timer.c |6 -- arch/arm/cpu/pxa/timer.c |7 +-- arch/arm/cpu/s3c44b0/timer.c |6 -- arch/arm/cpu/sa1100/timer.c |5 - arch/avr32/cpu/interrupts.c |7 --- arch/blackfin/cpu/interrupts.c |5 - arch/m68k/cpu/mcf547x_8x/slicetimer.c|5 - arch/m68k/lib/time.c |5 - arch/microblaze/cpu/timer.c |7 +-- arch/mips/cpu/mips32/time.c |6 -- arch/powerpc/lib/interrupts.c|5 - arch/sh/lib/time.c |7 --- arch/sh/lib/time_sh2.c |8 arch/sparc/lib/interrupts.c |7 +-- arch/x86/lib/timer.c |5 - board/armltd/integrator/timer.c |5 - board/armltd/vexpress/ca9x4_ct_vxp.c |5 - board/nvidia/common/board.c |1 - 49 files changed, 9 insertions(+), 270 deletions(-) Applied, thanks. Wolfgang: is there something wrong with your application process ? it seems that Graeme had a proper s-o-b tag in his patch on the mailing list, but the patch that's actually in git is missing it (as are some others). any idea ? -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] Add 'sf update' command to do smart SPI flash update
On Fri, Aug 19, 2011 at 3:15 PM, Mike Frysinger vap...@gentoo.org wrote: On Friday, August 19, 2011 15:28:48 Simon Glass wrote: This adds a new SPI flash command which only rewrites blocks if the contents need to change. This can speed up SPI flash programming when much of the data is unchanged from what is already there. looks good to me. i'll give it a spin on a board of mine and then push into my sf branch. i really should write a spi flash simulation so i could just test this from gdb ... Hi Mike, Thanks. Funny you should say that. I rather badly need a way of testing the higher level U-Boot code (from the commands down to where it calls architecture/driver code). I am drafting up an email to send to the list with some thoughts on the matter. Regards, Simon -mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Small refactor to remove duplicate serial code
On Friday, August 19, 2011 17:09:43 Simon Glass wrote: This tidies up duplicate code, and checks that default_serial_console() does in fact produce a device. Signed-off-by: Simon Glass s...@chromium.org Acked-by: Mike Frysinger vap...@gentoo.org -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] NAND: Really ignore bad blocks when scrubbing
On Friday, August 19, 2011 10:08:33 PM Scott Wood wrote:
On 08/16/2011 12:03 PM, Marek Vasut wrote:
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/mtd/nand/nand_base.c |2 +-
drivers/mtd/nand/nand_util.c |1 +
include/linux/mtd/mtd.h |1 +
3 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a5f872e..3093067 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2224,7 +2224,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct
erase_info *instr,
/*
* heck if we have a bad block, we do not erase bad blocks !
*/
- if (nand_block_checkbad(mtd, ((loff_t) page)
+ if (!instr-scrub nand_block_checkbad(mtd, ((loff_t) page)
chip-page_shift, 0, allowbbt)) {
printk(KERN_WARNING nand_erase: attempt to erase a
bad block at page 0x%08x\n, page);
Changelog should describe why the existing mechanism of overriding the
block_bad method is insufficient (I think there may be issues if you try
to scrub before the bbt is first built) -- and if this supersedes that
mechanism, that mechanism should be removed.
Indeed, this completely ignores the BBT, unlike the previous way. From my
understanding, scrub should behave this way, right ?
-Scott
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] NAND: Really ignore bad blocks when scrubbing
On 08/19/2011 04:47 PM, Marek Vasut wrote: On Friday, August 19, 2011 10:08:33 PM Scott Wood wrote: Changelog should describe why the existing mechanism of overriding the block_bad method is insufficient (I think there may be issues if you try to scrub before the bbt is first built) -- and if this supersedes that mechanism, that mechanism should be removed. Indeed, this completely ignores the BBT, unlike the previous way. From my understanding, scrub should behave this way, right ? Yes. This is a more straightforward approach, but the changelog should explain why the change is being made, and the patch should remove the nand_block_bad_scrub() hack that is now unnecessary. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] nested defines coding style
Hi all, I couldn't (easily) find a doc for coding style regarding defines in u-boot. I commenly don't indent preprocessor macro's, but when reading code from some one else code I tend to prefer single space indentation for these (before the #). Is there a standard for this in u-boot? Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] Add 'sf update' command to do smart SPI flash update
On Friday, August 19, 2011 17:25:10 Simon Glass wrote: On Fri, Aug 19, 2011 at 3:15 PM, Mike Frysinger wrote: On Friday, August 19, 2011 15:28:48 Simon Glass wrote: This adds a new SPI flash command which only rewrites blocks if the contents need to change. This can speed up SPI flash programming when much of the data is unchanged from what is already there. looks good to me. i'll give it a spin on a board of mine and then push into my sf branch. i really should write a spi flash simulation so i could just test this from gdb ... Funny you should say that. I rather badly need a way of testing the higher level U-Boot code (from the commands down to where it calls architecture/driver code). I am drafting up an email to send to the list with some thoughts on the matter. when i wrote the blackfin system level port of the gnu sim, it was so i could do this (and i thought it'd be bad-ass). i often use the gnu sim to do initial testing (sometimes down to the driver level) before i get around to loading up on actual hardware. $ bfin-elf-run --env operating --model bf537 ./u-boot U-Boot 2011.06-00375-g23ffb39-dirty (Aug 14 2011 - 16:54:03) CPU: ADSP bf537-0.2 (Detected Rev: 0.0) (bypass boot) Board: ADI BF537 stamp board Support: http://blackfin.uclinux.org/ Clock: VCO: 500 MHz, Core: 500 MHz, System: 125 MHz RAM: 64 MiB Flash: ## Unknown flash on Bank 1 - Size = 0x = 0 MB 0 Bytes MMC: *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial KGDB: [on serial] ready Warning: Generating 'random' MAC address Net: bfin_mac Hit any key to stop autoboot: 5 0 bfin help sf sf - SPI flash sub-system Usage: sf probe [bus:]cs [hz] [mode] - init flash device on given SPI bus and chip select sf read addr offset len - read `len' bytes starting at `offset' to memory at `addr' sf write addr offset len- write `len' bytes from memory at `addr' to flash at `offset' sf erase offset [+]len - erase `len' bytes from `offset' `+len' round up `len' to block size bfin -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] nested defines coding style
On Friday, August 19, 2011 17:57:50 Jeroen Hofstee wrote: I couldn't (easily) find a doc for coding style regarding defines in u-boot. I commenly don't indent preprocessor macro's, but when reading code from some one else code I tend to prefer single space indentation for these (before the #). Is there a standard for this in u-boot? i prefer: #if 1 # if 2 # if 3 ... # else ... # endif # endif #endif but doing this without the space after the # is acceptable. these two styles are your only options, but i dont believe there is a rule as to which you pick other than if you're the maintainer of the code in question, use whichever you like. also, please dont hijack threads. start a new e-mail from scratch ... dont just hit reply to any old e-mail and erase the subject/body. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Fix compilation for OMAP3 EVM
Signed-off-by: Vincent Stehlé vincent.ste...@laposte.net --- board/ti/evm/evm.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 30c1c57..d0604e9 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -33,7 +33,6 @@ #include asm/arch/mem.h #include asm/arch/mux.h #include asm/arch/sys_proto.h -#include asm/arch/gpio.h #include i2c.h #include asm/mach-types.h #include evm.h -- 1.7.2.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] NAND: Really ignore bad blocks when scrubbing
On Friday, August 19, 2011 11:55:30 PM Scott Wood wrote: On 08/19/2011 04:47 PM, Marek Vasut wrote: On Friday, August 19, 2011 10:08:33 PM Scott Wood wrote: Changelog should describe why the existing mechanism of overriding the block_bad method is insufficient (I think there may be issues if you try to scrub before the bbt is first built) -- and if this supersedes that mechanism, that mechanism should be removed. Indeed, this completely ignores the BBT, unlike the previous way. From my understanding, scrub should behave this way, right ? Yes. This is a more straightforward approach, but the changelog should explain why the change is being made, and the patch should remove the nand_block_bad_scrub() hack that is now unnecessary. V2 on the way. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] NAND: Really ignore bad blocks when scrubbing
This patch avoids BBT completely when scrubbing, not even initial BBT scan
happens.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/mtd/nand/nand_base.c |2 +-
drivers/mtd/nand/nand_util.c | 22 +-
include/linux/mtd/mtd.h |1 +
3 files changed, 7 insertions(+), 18 deletions(-)
V2: get rid of the nand_block_bad_scrub() hack.
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a5f872e..3093067 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2224,7 +2224,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct
erase_info *instr,
/*
* heck if we have a bad block, we do not erase bad blocks !
*/
- if (nand_block_checkbad(mtd, ((loff_t) page)
+ if (!instr-scrub nand_block_checkbad(mtd, ((loff_t) page)
chip-page_shift, 0, allowbbt)) {
printk(KERN_WARNING nand_erase: attempt to erase a
bad block at page 0x%08x\n, page);
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c
index 81bf366..0c3b7f7 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/nand_util.c
@@ -57,12 +57,6 @@ typedef struct mtd_infomtd_info_t;
#define cpu_to_je16(x) (x)
#define cpu_to_je32(x) (x)
-/*/
-static int nand_block_bad_scrub(struct mtd_info *mtd, loff_t ofs, int getchip)
-{
- return 0;
-}
-
/**
* nand_erase_opts: - erase NAND flash with support for various options
* (jffs2 formating)
@@ -82,10 +76,10 @@ int nand_erase_opts(nand_info_t *meminfo, const
nand_erase_options_t *opts)
int bbtest = 1;
int result;
int percent_complete = -1;
- int (*nand_block_bad_old)(struct mtd_info *, loff_t, int) = NULL;
const char *mtd_device = meminfo-name;
struct mtd_oob_ops oob_opts;
struct nand_chip *chip = meminfo-priv;
+ struct nand_chip *priv_nand = meminfo-priv;
if ((opts-offset (meminfo-writesize - 1)) != 0) {
printf(Attempt to erase non page aligned data\n);
@@ -110,11 +104,9 @@ int nand_erase_opts(nand_info_t *meminfo, const
nand_erase_options_t *opts)
* and disable bad block table while erasing.
*/
if (opts-scrub) {
- struct nand_chip *priv_nand = meminfo-priv;
-
- nand_block_bad_old = priv_nand-block_bad;
- priv_nand-block_bad = nand_block_bad_scrub;
- /* we don't need the bad block table anymore...
+ erase.scrub = opts-scrub;
+ /*
+* We don't need the bad block table anymore...
* after scrub, there are no bad blocks left!
*/
if (priv_nand-bbt) {
@@ -204,12 +196,8 @@ int nand_erase_opts(nand_info_t *meminfo, const
nand_erase_options_t *opts)
if (!opts-quiet)
printf(\n);
- if (nand_block_bad_old) {
- struct nand_chip *priv_nand = meminfo-priv;
-
- priv_nand-block_bad = nand_block_bad_old;
+ if (opts-scrub)
priv_nand-scan_bbt(meminfo);
- }
return 0;
}
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 3b18d7d..13a711d 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -55,6 +55,7 @@ struct erase_info {
u_long priv;
u_char state;
struct erase_info *next;
+ int scrub;
};
struct mtd_erase_region_info {
--
1.7.5.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 5/7]Timer: Remove reset_timer() for non-Nios2 arches
Mike, On Saturday, August 20, 2011, Mike Frysinger vap...@gentoo.org wrote: On Tuesday, July 26, 2011 08:53:37 Wolfgang Denk wrote: Dear Graeme Russ, In message 1310809000-3402-1-git-send-email-graeme.r...@gmail.com you wrote: Signed-off-by: Graeme Russ graeme.r...@gmail.com --- Changes since v2: - Added Signed-off-by Changes since v1 ((WIP) [Timer]API Rewrite): - Rebased to 68d4230c3ccce96a72c5b99e48399bf1796fe3c6 arch/arm/cpu/arm1136/mx31/timer.c|5 - arch/arm/cpu/arm1136/mx35/timer.c|5 - arch/arm/cpu/arm1136/omap24xx/timer.c|5 - arch/arm/cpu/arm1176/s3c64xx/timer.c |5 - arch/arm/cpu/arm1176/tnetv107x/timer.c |9 - arch/arm/cpu/arm720t/interrupts.c|5 - arch/arm/cpu/arm920t/a320/timer.c|6 -- arch/arm/cpu/arm920t/at91/timer.c|6 -- arch/arm/cpu/arm920t/at91rm9200/timer.c |6 -- arch/arm/cpu/arm920t/ep93xx/timer.c |5 - arch/arm/cpu/arm920t/imx/timer.c |6 -- arch/arm/cpu/arm920t/ks8695/timer.c |7 +-- arch/arm/cpu/arm920t/s3c24x0/timer.c |6 -- arch/arm/cpu/arm925t/timer.c |6 -- arch/arm/cpu/arm926ejs/armada100/timer.c |5 - arch/arm/cpu/arm926ejs/davinci/timer.c |5 - arch/arm/cpu/arm926ejs/kirkwood/timer.c |5 - arch/arm/cpu/arm926ejs/mb86r0x/timer.c |5 - arch/arm/cpu/arm926ejs/mx25/timer.c |5 - arch/arm/cpu/arm926ejs/mx27/timer.c |5 - arch/arm/cpu/arm926ejs/nomadik/timer.c | 12 +--- arch/arm/cpu/arm926ejs/omap/timer.c |6 -- arch/arm/cpu/arm926ejs/orion5x/timer.c |5 - arch/arm/cpu/arm926ejs/pantheon/timer.c |5 - arch/arm/cpu/arm926ejs/spear/timer.c |6 -- arch/arm/cpu/arm926ejs/versatile/timer.c |6 -- arch/arm/cpu/armv7/mx5/timer.c |5 - arch/arm/cpu/armv7/omap-common/timer.c |5 - arch/arm/cpu/armv7/s5p-common/timer.c|5 - arch/arm/cpu/armv7/tegra2/timer.c|5 - arch/arm/cpu/ixp/timer.c |5 - arch/arm/cpu/lh7a40x/timer.c |6 -- arch/arm/cpu/pxa/timer.c |7 +-- arch/arm/cpu/s3c44b0/timer.c |6 -- arch/arm/cpu/sa1100/timer.c |5 - arch/avr32/cpu/interrupts.c |7 --- arch/blackfin/cpu/interrupts.c |5 - arch/m68k/cpu/mcf547x_8x/slicetimer.c|5 - arch/m68k/lib/time.c |5 - arch/microblaze/cpu/timer.c |7 +-- Wolfgang: is there something wrong with your application process ? it seems that Graeme had a proper s-o-b tag in his patch on the mailing list, but the patch that's actually in git is missing it (as are some others). any idea ? I wonder if git needs a blank line between the sob and --- Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 5/7]Timer: Remove reset_timer() for non-Nios2 arches
On Friday, August 19, 2011 18:55:38 Graeme Russ wrote: I wonder if git needs a blank line between the sob and --- mine never have -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] DreamPlug - progress?
Hi all, I have a Globalscale Dreamplug I wish to accomplish the following: * Backup original uboot * Verify original uboot * Flash patched uboot to SPI Any roadblocks? I couldn't confirm, either via this list or looking at commits whether Dreamplug support ever made it back into mainline uboot... Thanks, Adam Baxter ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Fix compilation for OMAP3 EVM
On 20.08.2011 00:37, Vincent wrote: Signed-off-by: Vincent Stehlévincent.ste...@laposte.net --- board/ti/evm/evm.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 30c1c57..d0604e9 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -33,7 +33,6 @@ #includeasm/arch/mem.h #includeasm/arch/mux.h #includeasm/arch/sys_proto.h -#includeasm/arch/gpio.h #includei2c.h #includeasm/mach-types.h #include evm.h On which branch do you see this issue? u-boot master? Which error do you see? Does http://patchwork.ozlabs.org/patch/107678/ fix the issue you see, too? Thanks Dirk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
