Re: [U-Boot] [PATCH 1/2] env: set individual variables to default

[Gerlando Falauto]

On 09/28/2011 11:08 PM, Wolfgang Denk wrote:
 Dear Gerlando Falauto,

 In message4e82e6ca.9030...@keymile.com  you wrote:

 env import -n name[,..] [other_flags] addr [size]

 ?

 Uhm, wouldn't that make the syntax completely unrelated to all other
 commands, leading to confusion?

 How about something like:

 env import [-f] [flags] addr [size] [-n name[ ...]]
 env default [-f] -a|-n name[ ...]
 env set [-f] name [val ...]

 No.  That's even worse.

You mean that options should always precede the main argument?

 If you don't like the comma separation,we
 could as well accept multiple -n args:

 env import -n name [-n name1 ... ] [other_flags] addr [size]

It's not that I don't like comma separation. It's just that maybe the 
syntax should be consistent between commands... that's all.
But since it's a very unusual (and possibly unused) command, I am 
probably worrying too much.

 Where:
-a in env default would be the way to prevent the inadverent user
   from wrecking the environment by mistake.

 What does -a stand for?  all ?

Yes. Any comments on this?
How should we implement env default for the whole env?
1) env default
2) env deafult -a
3) env default all

 Slightly off-topic: how about variables starting with -?

 Should be no problem in general, except for the pathological cases
 like variable names -f etc.   But there has to be a penalty for such
 stupid names :-)

I can't think of any shell or programming language allowing for 
variables starting with - or digits...

Thasnks,
Gerlando Falauto
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[U-Boot] omap3_beagle problem booting kernel on latest u-boot

[John Rigby]

Aneesh, Dirk, Jason:

During our monthly release testing of Linaro images we discovered that
the kernel was pretty unreliable with the latest upstream u-boot.
After bisecting we found that reverting this patch fixes the problem

commit 45bf05854bc94ed8bae9e9114292895b990327ea
Author: Aneesh V ane...@ti.com
Date:   Thu Jun 16 23:30:53 2011 +

armv7: adapt omap3 to the new cache maintenance framework

adapt omap3 to the new layered cache maintenance framework

Signed-off-by: Aneesh V ane...@ti.com

No idea why because we tried disabling cache by adding
CONFIG_SYS_DCACHE_OFF to the board config but that did not seem to fix
the problem.  The problem in the kernel was general instability
usually ending in the rootfs not being mounted.  Sometimes random
kernel crashes have been observed.  We have never made it to a shell
prompt before reverting.

If we figure anything else out we will let you know.

--john
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Re: [U-Boot] [PATCH v2] image: push default arch values to arch headers

[Thomas Chou]

Hi Mike,

On 09/27/2011 03:58 AM, Mike Frysinger wrote:
 This pushes the ugly duplicated arch ifdef lists we maintain in various
 image related files out to the arch headers themselves.

 Signed-off-by: Mike Frysingervap...@gentoo.org
 ---
 v2
   - add a friendly #error when the define is missing

Compiled and tested on nios2 boards using gcc4 and gcc3 with McNutt's 
Add missing header for gcc3 patch applied. Thanks.

Tested-by: Thomas Chou tho...@wytron.com.tw

Best regards,
Thomas
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Re: [U-Boot] [PATCH] mx31: provide readable WEIM CS accessor

[Helmut Raiger]

On 09/28/2011 05:14 PM, Stefano Babic wrote
 Is there a reason to embed this function in imx-regs.h ? Why not in
 ./arch/arm/cpu/arm1136/mx31/generic.c, where I think this function
 belongs ?

I took it from the kernel where it is done that way and didn't ask why. 
I'll move it.

 We are trying to get consistency among the several i.MX SOCs. For this
 reason, a general function should not have a specific SOC prefix.
 You introduce now a new accessor to set up the WEIM registers. We have
 not yet such as function, but we can have then for other SOCs, too.
 Rename your function as mxc_setup_weimcs(), and when an accessor will be
 supplied for MX5 (or MX*), the same name must be used.

 +unsigned int upper, unsigned int lower, unsigned int add)
 +{
 +writel(upper, WEIM_CSCR_U(cs));
 +writel(lower, WEIM_CSCR_L(cs));
 +writel(add, WEIM_CSCR_A(cs));
 +}
 You are using offests to access registers. Why not to set a structure as:

 struct weim_regs {
   u32 upper;
   u32 lower;
   u32 adder;
   u32 reserved;
 }

 and then :

 struct weim {
   struct weim_regs cs[6];
 };

 ...or something like that.

 Passing the register values to the function makes the accessor too
 striclty bound to the mx31. But if you pass a struct weim*, that is void
 mxc_setup_weimcs(struct weim *), we can have the same accessor (with a
 different implementation, of course) for the other SOCs, too. I can
 imagine we can have MX5 (at the moment I see only the mx53ard) using the
 same way to set up the WEIM interface.

I used the writel register access to assure correct memory barriers, but 
this might not be a problem with the CS registers. However passing the 
complete set of chip selects wouldn't work, as only a few will be setup 
in the function, while others aren't touched (we could pass a bitmap to 
select which ones should be set, but this seems flamboyant).

What about:

void mxc_setup_weimcs(int cs, const struct mxc_weimcs *cs)
{
...
}

void some_board_init_func(void)
{
 /* CS5: CPLD incl. network controller */
 static const struct mxc_weimcs cs5 = {
 /*sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
 CSCR_U(0, 0,  0,  0,  0,  0,   0,  0,  3, 24, 0,  4,  3),
 /*   oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
 CSCR_L(2,  2,   2,   5,  2,  0,  5,  2,  0,  0,   0,   1),
 /*  ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
 CSCR_A(2,   2,  2,  2,  0,  0,  2,  2,  0,  0,  0,  0,   0,  0)
 };

 mxc_setup_weimcs(5, cs5);
}

This should still work for different SOCs (with different struct 
mxc_weimcs). CSCR_U et al. will be mx31 specific defines.

Helmut


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Re: [U-Boot] [PATCH] mx31: provide readable WEIM CS accessor

[Stefano Babic]

On 09/29/2011 08:32 AM, Helmut Raiger wrote:
 On 09/28/2011 05:14 PM, Stefano Babic wrote
 Is there a reason to embed this function in imx-regs.h ? Why not in
 ./arch/arm/cpu/arm1136/mx31/generic.c, where I think this function
 belongs ?

 I took it from the kernel where it is done that way and didn't ask why.
 I'll move it.
 
 We are trying to get consistency among the several i.MX SOCs. For this
 reason, a general function should not have a specific SOC prefix.
 You introduce now a new accessor to set up the WEIM registers. We have
 not yet such as function, but we can have then for other SOCs, too.
 Rename your function as mxc_setup_weimcs(), and when an accessor will be
 supplied for MX5 (or MX*), the same name must be used.

 +unsigned int upper, unsigned int lower, unsigned int add)
 +{
 +writel(upper, WEIM_CSCR_U(cs));
 +writel(lower, WEIM_CSCR_L(cs));
 +writel(add, WEIM_CSCR_A(cs));
 +}
 You are using offests to access registers. Why not to set a structure as:

 struct weim_regs {
 u32 upper;
 u32 lower;
 u32 adder;
 u32 reserved;
 }

 and then :

 struct weim {
 struct weim_regs cs[6];
 };

 ...or something like that.

 Passing the register values to the function makes the accessor too
 striclty bound to the mx31. But if you pass a struct weim*,

Note: I understand now the misunderstanding. I want to pass a struct
weim_regs *, not weim*.

 that is void
 mxc_setup_weimcs(struct weim *), we can have the same accessor (with a
 different implementation, of course) for the other SOCs, too. I can
 imagine we can have MX5 (at the moment I see only the mx53ard) using the
 same way to set up the WEIM interface.
 
 I used the writel register access to assure correct memory barriers,

This is ok

 but
 this might not be a problem with the CS registers. However passing the
 complete set of chip selects wouldn't work,

This is not what I meant. I want that the function change only one
chipselect, not all chipselects in one shot.

 as only a few will be setup
 in the function, while others aren't touched (we could pass a bitmap to
 select which ones should be set, but this seems flamboyant).

No bitmap please...

 
 What about:
 
 void mxc_setup_weimcs(int cs, const struct mxc_weimcs *cs)
 {
 ...
 }

This is what I meant ! Only to check the names: mxc_weimcs is what I
described as weim_regs, right ? And this structure can be specified for
each SOC.

 
 void some_board_init_func(void)
 {
 /* CS5: CPLD incl. network controller */
 static const struct mxc_weimcs cs5 = {
 /*sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
 CSCR_U(0, 0,  0,  0,  0,  0,   0,  0,  3, 24, 0,  4,  3),
 /*   oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
 CSCR_L(2,  2,   2,   5,  2,  0,  5,  2,  0,  0,   0,   1),
 /*  ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
 CSCR_A(2,   2,  2,  2,  0,  0,  2,  2,  0,  0,  0,  0,   0,  0)
 };
 
 mxc_setup_weimcs(5, cs5);

Yes, right

 }
 
 This should still work for different SOCs (with different struct
 mxc_weimcs).

Exactly.

 CSCR_U et al. will be mx31 specific defines.

This is not a problem - other SOCc have or can have a different layout.
It is correct to define these macro into imx-regs.h, as you already did.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH] mx31: provide readable WEIM CS accessor

[Helmut Raiger]

On 09/28/2011 05:14 PM, Stefano Babic wrote:
 +#ifndef __ASSEMBLER__
 +static inline void mx31_setup_weimcs(int cs,
 Is there a reason to embed this function in imx-regs.h ? Why not in
 ./arch/arm/cpu/arm1136/mx31/generic.c, where I think this function
 belongs ?


I re-checked, it makes a lot of sense to inline this function as it 
results into 3 simple register writes (addresses are compile time 
calculated if 'cs' is a constant)!

Helmut




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Re: [U-Boot] [PATCH v2] net: emaclite: Use dynamic allocation

[Michal Simek]

Mike Frysinger wrote:
 Acked-by: Mike Frysinger vap...@gentoo.org
 -mike

Applied to git://git.denx.de/u-boot-microblaze.git emaclite branch

Thanks,
Michal


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w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
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[U-Boot] [PATCH 0/3] fix: regression in SMDK6400

[Simon Schwarz]

This is a fix for a regression introduced by my patch 
55f429bb39614a16b1bacc9a8bea9ac01a60bfc8 to u-boot-ti/next

The issue is described here:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873

Simon Schwarz (3):
  nand: Remove static modifier from common functions
  nand: Add common functions to nand.h
  Fix regression in SMDK6400

 drivers/mtd/nand/nand_base.c |6 +++---
 drivers/mtd/nand/s3c64xx.c   |   26 --
 include/nand.h   |   10 +++---
 nand_spl/board/samsung/smdk6400/Makefile |9 ++---
 4 files changed, 16 insertions(+), 35 deletions(-)

-- 
1.7.4.1

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[U-Boot] [PATCH 1/3] nand: Remove static modifier from common functions

[Simon Schwarz]

Removed static modifiers from functions that were often duplicated in
SPL implementations.

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com
---
 drivers/mtd/nand/nand_base.c |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index e7dfcb1..109d2cf 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -133,7 +133,7 @@ static void nand_release_device (struct mtd_info *mtd)
  *
  * Default read function for 8bit buswith
  */
-static uint8_t nand_read_byte(struct mtd_info *mtd)
+uint8_t nand_read_byte(struct mtd_info *mtd)
 {
struct nand_chip *chip = mtd-priv;
return readb(chip-IO_ADDR_R);
@@ -196,7 +196,7 @@ static void nand_select_chip(struct mtd_info *mtd, int 
chipnr)
  *
  * Default write function for 8bit buswith
  */
-static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
+void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 {
int i;
struct nand_chip *chip = mtd-priv;
@@ -249,7 +249,7 @@ static int nand_verify_buf(struct mtd_info *mtd, const 
uint8_t *buf, int len)
  *
  * Default write function for 16bit buswith
  */
-static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
+void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
 {
int i;
struct nand_chip *chip = mtd-priv;
-- 
1.7.4.1

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[U-Boot] [PATCH 2/3] nand: Add common functions to nand.h

[Simon Schwarz]

Functions often used in SPL are now part of nand.h.

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com
---
 include/nand.h |   10 +++---
 1 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/include/nand.h b/include/nand.h
index b4140794..980408a 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -135,9 +135,6 @@ int nand_get_lock_status(nand_info_t *meminfo, loff_t 
offset);
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst);
 void nand_deselect(void);
 
-void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
-void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
-
 #ifdef CONFIG_SYS_NAND_SELECT_DEVICE
 void board_nand_select_device(struct nand_chip *nand, int chip);
 #endif
@@ -154,3 +151,10 @@ __attribute__((noreturn)) void nand_boot(void);
 #define ENV_OFFSET_SIZE 8
 int get_nand_env_oob(nand_info_t *nand, unsigned long *result);
 #endif
+
+/* Standard NAND functions from nand_base.c */
+void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len);
+void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len);
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
+uint8_t nand_read_byte(struct mtd_info *mtd);
-- 
1.7.4.1

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[U-Boot] [PATCH 3/3] Fix regression in SMDK6400

[Simon Schwarz]

s3c64xx.c implemented its own nand_read_byte, nand_write_buf and
nand_read_buf functions. This provoked a regression when these functions
were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8.

This deletes these duplicated functions from s3c64xx.c and adds the generic
implementations in nand_base.c to the spl Makefile. It also adds
-ffcuntion-sections and -gc-sections to the compilation flags of the SPL to
avoid errors originating from unused functions in nand_base.c.

Description of the regression:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com
---
 drivers/mtd/nand/s3c64xx.c   |   26 --
 nand_spl/board/samsung/smdk6400/Makefile |9 ++---
 2 files changed, 6 insertions(+), 29 deletions(-)

diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
index 084e475..7260537 100644
--- a/drivers/mtd/nand/s3c64xx.c
+++ b/drivers/mtd/nand/s3c64xx.c
@@ -60,32 +60,6 @@ static void print_oob(const char *header, struct mtd_info 
*mtd)
 }
 #endif /* S3C_NAND_DEBUG */
 
-#ifdef CONFIG_NAND_SPL
-static u_char nand_read_byte(struct mtd_info *mtd)
-{
-   struct nand_chip *this = mtd-priv;
-   return readb(this-IO_ADDR_R);
-}
-
-static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
-{
-   int i;
-   struct nand_chip *this = mtd-priv;
-
-   for (i = 0; i  len; i++)
-   writeb(buf[i], this-IO_ADDR_W);
-}
-
-static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
-{
-   int i;
-   struct nand_chip *this = mtd-priv;
-
-   for (i = 0; i  len; i++)
-   buf[i] = readb(this-IO_ADDR_R);
-}
-#endif
-
 static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
 {
int ctrl = readl(NFCONT);
diff --git a/nand_spl/board/samsung/smdk6400/Makefile 
b/nand_spl/board/samsung/smdk6400/Makefile
index 2f9c307..c9e75ba 100644
--- a/nand_spl/board/samsung/smdk6400/Makefile
+++ b/nand_spl/board/samsung/smdk6400/Makefile
@@ -33,12 +33,12 @@ nandobj := $(OBJTREE)/nand_spl/
 
 LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
 LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
-  $(LDFLAGS_FINAL)
+   $(LDFLAGS_FINAL) -gc-sections
 AFLAGS += -DCONFIG_NAND_SPL
-CFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL -ffunction-sections
 
 SOBJS  = start.o cpu_init.o lowlevel_init.o
-COBJS  = nand_boot.o nand_ecc.o s3c64xx.o smdk6400_nand_spl.o
+COBJS  = nand_boot.o nand_ecc.o s3c64xx.o smdk6400_nand_spl.o nand_base.o
 
 SRCS   := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
@@ -98,6 +98,9 @@ $(obj)smdk6400_nand_spl.c:
@rm -f $@
@ln -s $(TOPDIR)/board/samsung/smdk6400/smdk6400_nand_spl.c $@
 
+$(obj)nand_base.c:
+   @rm -f $@
+   @ln -s $(TOPDIR)/drivers/mtd/nand/nand_base.c $@
 #
 
 $(obj)%.o: $(obj)%.S
-- 
1.7.4.1

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[U-Boot] [PATCH V6 1/6] removed static from images in cmd_bootm.c

[Simon Schwarz]

This removes static modifier from images variable in cmd_bootm.c.

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com

---
V6 changes:
- removed the mention of savebp from commit message
---
 common/cmd_bootm.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 8909ee7..cec6e7b 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -156,7 +156,7 @@ static boot_os_fn *boot_os[] = {
 #endif
 };
 
-static bootm_headers_t images; /* pointers to os/initrd/fdt images */
+bootm_headers_t images;/* pointers to os/initrd/fdt images */
 
 /* Allow for arch specific config before we boot */
 void __arch_preboot_os(void)
-- 
1.7.4.1

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[U-Boot] [PATCH V6 0/6] SPL Linux boot

[Simon Schwarz]

Adds direct Linux boot to SPL. It implements a spl export command to save
ATAGS or FDT to NAND flash. The kernel image has to be in place for this!

Changes in V5:
- Rebased on u-boot-ti
- fixed MAKEALL warnings and errors 
- adapted to general gpio interface
Changes in V6:
- Change old commit message

based on:
- The new SPL layout 
- OMAP3 new SPL layout 
  (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105260)
- CONFIG_MACH_TYPE fix
  (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105809)
- Prep subcommand patch for arm
  (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/106725)

Related to:
- http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102669 

Simon Schwarz (6):
  removed static from images in cmd_bootm.c
  Add cmd_spl command
  devkit8000/spl: init GPMC for dm9000 in SPL
  omap-common/spl: Add linux boot to SPL
  omap-common: Add NAND SPL linux booting
  omap-common: fixes BSS overwriting problem

 arch/arm/cpu/armv7/omap-common/spl.c  |   49 +++-
 arch/arm/cpu/armv7/omap-common/spl_nand.c |   63 +++--
 arch/arm/include/asm/omap_common.h|2 +
 board/timll/devkit8000/devkit8000.c   |   31 +++-
 common/Makefile   |1 +
 common/cmd_bootm.c|2 +-
 common/cmd_spl.c  |  214 +
 doc/README.commands.spl   |   31 
 include/cmd_spl.h |   30 
 include/configs/devkit8000.h  |   16 ++-
 10 files changed, 410 insertions(+), 29 deletions(-)
 create mode 100644 common/cmd_spl.c
 create mode 100644 doc/README.commands.spl
 create mode 100644 include/cmd_spl.h

-- 
1.7.4.1

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[U-Boot] [PATCH V6 2/6] Add cmd_spl command

[Simon Schwarz]

This adds a spl command to the u-boot.

Related config:
CONFIG_CMD_CPL
activate/deactivate the command
CONFIG_CMD_SPL_NAND_OFS
Offset in NAND to use

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com
---

V2 changes:
CHG corrected bootm call. Now bootm is called with five parameters including
Address of FDT in RAM. This fixes the hang on savebp fdt call.
ADD debug output of the actual bootm parameter call
CHG help message

V3 changes:
FIX added missing brackets

V4 changes:
CHG Corrected argument number in comments
CHG added check for CONFIG_OF_LIBFDT
CHG squashed the README to this commit
DEL define description from commit message - unused in this patch
CHG renamed to spl now with subcommand export, very different now
ADD New call style with subcommands.
CHG added printf where the image is located
CHG Patched README to reflect changes
CHG parameter count
CHG usage message
---
 common/Makefile  |1 +
 common/cmd_spl.c |  214 ++
 doc/README.commands.spl  |   31 ++
 include/cmd_spl.h|   30 ++
 include/configs/devkit8000.h |7 ++
 5 files changed, 283 insertions(+), 0 deletions(-)
 create mode 100644 common/cmd_spl.c
 create mode 100644 doc/README.commands.spl
 create mode 100644 include/cmd_spl.h

diff --git a/common/Makefile b/common/Makefile
index 2edbd71..8b3321e 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -160,6 +160,7 @@ COBJS-$(CONFIG_USB_STORAGE) += usb_storage.o
 endif
 COBJS-$(CONFIG_CMD_XIMG) += cmd_ximg.o
 COBJS-$(CONFIG_YAFFS2) += cmd_yaffs2.o
+COBJS-$(CONFIG_CMD_SPL) += cmd_spl.o
 
 # others
 COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o
diff --git a/common/cmd_spl.c b/common/cmd_spl.c
new file mode 100644
index 000..51fc680
--- /dev/null
+++ b/common/cmd_spl.c
@@ -0,0 +1,214 @@
+/* Copyright (C) 2011
+ * Corscience GmbH  Co. KG - Simon Schwarz schw...@corscience.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include command.h
+#include cmd_spl.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Calls bootm with the parameters given */
+int call_bootm(int argc, char * const argv[], char *subcommand[])
+{
+   char *bootm_argv[5];
+   char command[] = do_bootm;
+
+   int i = 0;
+   int ret = 0;
+
+   /* create paramter array */
+   bootm_argv[0] = command;
+   switch (argc) {
+   case 3:
+   bootm_argv[4] = argv[2]; /* fdt addr */
+   case 2:
+   bootm_argv[3] = argv[1]; /* initrd addr */
+   case 1:
+   bootm_argv[2] = argv[0]; /* kernel addr */
+   }
+
+
+   /* - do the work - */
+   /* exec subcommands of do_bootm to init the images
+* data structure */
+   while (subcommand[i] != '\0') {
+   bootm_argv[1] = subcommand[i];
+   debug(args: %s, %s, %s, %s, %s, %d\n, bootm_argv[0],
+   bootm_argv[1], bootm_argv[2], bootm_argv[3],
+   bootm_argv[4], argc);
+   ret = do_bootm(find_cmd(do_bootm), 0, argc+2,
+   bootm_argv);
+   debug(Subcommand retcode: %d\n, ret);
+   i++;
+   }
+
+   if (ret) {
+   printf(ERROR prep subcommand failed!\n);
+   return -1;
+   }
+
+   return 0;
+}
+
+/* assemble the bootm paramteres for fdt creation */
+int spl_export_fdt(int argc, char * const argv[])
+{
+#ifdef CONFIG_OF_LIBFDT
+   /* Create subcommand string */
+   char *subcommand[] = {start, loados,
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
+   ramdisk,
+#endif
+   fdt, cmdline, bdt, prep, '\0'};
+
+   /* inspect paramters and execute bootm */
+   argc--;
+   argv++;
+   if (call_bootm(argc, argv, subcommand))
+   return -1;
+
+   printf(Argument image is now in RAM: 0x%p\n,
+   (void *)images.ft_addr);
+   return 0;
+#else
+   printf(Das U-Boot was build without fdt support - aborting\n);
+   return -1;
+#endif
+}
+
+/* assemble the bootm patameters for atags creation */
+int spl_export_atags(int argc, char * const argv[])
+{
+#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
+   

[U-Boot] [PATCH V6 5/6] omap-common: Add NAND SPL linux booting

[Simon Schwarz]

This implements booting of Linux from NAND in SPL

Related config parameters:
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
Offset in NAND of direct boot kernel image to use in SPL
CONFIG_SYS_SPL_ARGS_ADDR
Address where the kernel boot arguments are expected - this is
normally RAM-start + 0x100 (on ARM)

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com
---

V2 changes:
nothing

V3 changes:
nothing

V4 changes:
ADD define description to commit message
CHG renaming some defines - renaming SAVEBP SPL
---
 arch/arm/cpu/armv7/omap-common/spl_nand.c |   62 +---
 1 files changed, 46 insertions(+), 16 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/spl_nand.c 
b/arch/arm/cpu/armv7/omap-common/spl_nand.c
index af02a59..93f5183 100644
--- a/arch/arm/cpu/armv7/omap-common/spl_nand.c
+++ b/arch/arm/cpu/armv7/omap-common/spl_nand.c
@@ -24,6 +24,7 @@
 #include asm/u-boot.h
 #include asm/utils.h
 #include asm/arch/sys_proto.h
+#include asm/io.h
 #include nand.h
 #include timestamp_autogenerated.h
 #include version_autogenerated.h
@@ -33,6 +34,7 @@
 void spl_nand_load_image(void)
 {
struct image_header *header;
+   int *src, *dst;
switch (omap_boot_mode()) {
case NAND_MODE_HW_ECC:
debug(spl: nand - using hw ecc\n);
@@ -46,26 +48,54 @@ void spl_nand_load_image(void)
 
/*use CONFIG_SYS_TEXT_BASE as temporary storage area */
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+#ifdef CONFIG_SPL_OS_BOOT
+   if (!spl_uboot_key()) {
+   /* load parameter image */
+   /* load to temp position since nand_spl_load_image reads
+* a whole block which is typically larger than
+* CONFIG_CMD_SAVEBP_WRITE_SIZE therefore may overwrite
+* following sections like BSS */
+   nand_spl_load_image(CONFIG_CMD_SPL_NAND_OFS,
+   CONFIG_CMD_SPL_WRITE_SIZE,
+   (void *)CONFIG_SYS_TEXT_BASE);
+   /* copy to destintion */
+   for (dst = (int *)CONFIG_SYS_SPL_ARGS_ADDR,
+   src = (int *)CONFIG_SYS_TEXT_BASE;
+   src  (int *)(CONFIG_SYS_TEXT_BASE +
+   CONFIG_CMD_SPL_WRITE_SIZE);
+   src++, dst++) {
+   writel(readl(src), dst);
+   }
 
+   /* load linux */
+   nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
+   CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+   spl_parse_image_header(header);
+   nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
+   spl_image.size, (void *)spl_image.load_addr);
+   } else
+#endif
+   {
 #ifdef CONFIG_NAND_ENV_DST
-   nand_spl_load_image(CONFIG_ENV_OFFSET,
-   CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
-   spl_parse_image_header(header);
-   nand_spl_load_image(CONFIG_ENV_OFFSET, spl_image.size,
-   (void *)image_load_addr);
+   nand_spl_load_image(CONFIG_ENV_OFFSET,
+   CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+   spl_parse_image_header(header);
+   nand_spl_load_image(CONFIG_ENV_OFFSET, spl_image.size,
+   (void *)spl_image.load_addr);
 #ifdef CONFIG_ENV_OFFSET_REDUND
-   nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
-   CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
-   spl_parse_image_header(header);
-   nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, spl_image.size,
-   (void *)image_load_addr);
+   nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
+   CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+   spl_parse_image_header(header);
+   nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, spl_image.size,
+   (void *)spl_image.load_addr);
 #endif
 #endif
-   /* Load u-boot */
-   nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
-   CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
-   spl_parse_image_header(header);
-   nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
-   spl_image.size, (void *)spl_image.load_addr);
+   /* Load u-boot */
+   nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+   CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+   spl_parse_image_header(header);
+   nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+   spl_image.size, (void *)spl_image.load_addr);
+   }
nand_deselect();
 }
-- 
1.7.4.1

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[U-Boot] [PATCH V6 4/6] omap-common/spl: Add linux boot to SPL

[Simon Schwarz]

This adds Linux booting to the SPL

This depends on CONFIG_MACH_TYPE patch by Igor Grinberg
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105809)

Related CONFIGs:
CONFIG_SPL_OS_BOOT
Activates/Deactivates the OS booting feature
CONFIG_SPL_OS_BOOT_KEY
defines the IO-pin number u-boot switch - if pressed u-boot is booted
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
Offset in NAND of direct boot kernel image to use in SPL
CONFIG_SYS_SPL_ARGS_ADDR
Address where the kernel boot arguments are expected - this is normaly
RAM-begin + 0x100

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com
---

V2 changes:
nothing

V3 changes:
nothing

V4 changes:
CHG Using CONFIG_MACH_TYPE now.
DEL CONFIG_SYS_SPL_MACHID
CHG Use CONFIG_MACH_TYPE for machine id config - This makes the patch
depending on the patch linked above

V5 changes:
FIX compile errors for OMAP4
REBASE u-boot-ti adapted new general gpio interface
---
 arch/arm/cpu/armv7/omap-common/spl.c |   49 -
 include/configs/devkit8000.h |9 +-
 2 files changed, 54 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/spl.c 
b/arch/arm/cpu/armv7/omap-common/spl.c
index c76fea6..a7afd0a 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -35,6 +35,7 @@
 #include asm/arch/mmc_host_def.h
 #include i2c.h
 #include image.h
+#include asm/gpio.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -63,6 +64,25 @@ void board_init_f(ulong dummy)
relocate_code(CONFIG_SPL_STACK, gdata, CONFIG_SPL_TEXT_BASE);
 }
 
+/* Return the value of the U-boot key
+ *
+ * RETURN
+ * 0 if not pressed
+ * positiv if pressed
+ */
+#ifdef CONFIG_SPL_OS_BOOT
+int spl_uboot_key(void)
+{
+   int val = 0;
+   if (!gpio_request(CONFIG_SPL_OS_BOOT_KEY, U-Boot key)) {
+   gpio_direction_input(CONFIG_SPL_OS_BOOT_KEY);
+   val = gpio_get_value(CONFIG_SPL_OS_BOOT_KEY);
+   gpio_free(CONFIG_SPL_OS_BOOT_KEY);
+   }
+   return !val;
+}
+#endif
+
 void spl_parse_image_header(const struct image_header *header)
 {
u32 header_size = sizeof(struct image_header);
@@ -90,7 +110,25 @@ void spl_parse_image_header(const struct image_header 
*header)
}
 }
 
-static void jump_to_image_no_args(void)
+/* This function jumps to an image with argument. Normally an FDT or ATAGS
+ * image.
+ * arg: Pointer to paramter image in RAM
+ */
+#ifdef CONFIG_SPL_OS_BOOT
+void jump_to_image_linux(void *arg)
+{
+   debug(Entering kernel arg pointer: 0x%X\n, arg);
+   typedef void (*image_entry_arg_t)(int, int, void *)
+   __attribute__ ((noreturn));
+   image_entry_arg_t image_entry =
+   (image_entry_arg_t) spl_image.entry_point;
+   /* cleanup_before_linux(); */ /*write SPL function for that*/
+   image_entry(0, CONFIG_MACH_TYPE, arg);
+}
+void jump_to_image_linux(void *) __attribute__ ((noreturn));
+#endif
+
+void jump_to_image_no_args(void)
 {
typedef void (*image_entry_noargs_t)(void)__attribute__ ((noreturn));
image_entry_noargs_t image_entry =
@@ -99,8 +137,8 @@ static void jump_to_image_no_args(void)
debug(image entry point: 0x%X\n, spl_image.entry_point);
image_entry();
 }
-
 void jump_to_image_no_args(void) __attribute__ ((noreturn));
+
 void board_init_r(gd_t *id, ulong dummy)
 {
u32 boot_device;
@@ -134,6 +172,13 @@ void board_init_r(gd_t *id, ulong dummy)
debug(Jumping to U-Boot\n);
jump_to_image_no_args();
break;
+#ifdef CONFIG_SPL_OS_BOOT
+   case IH_OS_LINUX:
+   debug(Jumping to Linux\n);
+   spl_board_prepare_for_linux();
+   jump_to_image_linux((void *)CONFIG_SYS_SPL_ARGS_ADDR);
+   break;
+#endif
default:
puts(Unsupported OS image.. Jumping nevertheless..\n);
jump_to_image_no_args();
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 629efb0..5d1014b 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -37,7 +37,9 @@
 #define CONFIG_OMAP34301   /* which is in a 3430 */
 #define CONFIG_OMAP3_DEVKIT80001   /* working with DevKit8000 */
 
-#defineCONFIG_SYS_TEXT_BASE0x80008000
+#define CONFIG_MACH_TYPE   MACH_TYPE_DEVKIT8000
+
+#defineCONFIG_SYS_TEXT_BASE0x8010
 
 #define CONFIG_SDRC/* The chip has SDRC controller */
 
@@ -329,7 +331,7 @@
 #define CONFIG_SPL_MAX_SIZE0xB400  /* 45 K */
 #define CONFIG_SPL_STACK   LOW_LEVEL_SRAM_STACK
 
-#define CONFIG_SPL_BSS_START_ADDR  0x8000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_START_ADDR  0x8500 /* leave space for bootargs*/
 #define CONFIG_SPL_BSS_MAX_SIZE0x8
 
 /* NAND boot config */
@@ -359,6 +361,9 @@
 #define CONFIG_CMD_SPL_WRITE_SIZE  0x400 

[U-Boot] [PATCH V6 3/6] devkit8000/spl: init GPMC for dm9000 in SPL

[Simon Schwarz]

Linux crashes if the GPMC isn't configured for the dm9000.

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com
---

V2 changes:
nothing

V3 changes:
nothing
---
 arch/arm/include/asm/omap_common.h  |2 ++
 board/timll/devkit8000/devkit8000.c |   31 +++
 2 files changed, 25 insertions(+), 8 deletions(-)

diff --git a/arch/arm/include/asm/omap_common.h 
b/arch/arm/include/asm/omap_common.h
index 015cede..0906f49 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -77,6 +77,8 @@ u32 omap_boot_mode(void);
 
 /* SPL common function s*/
 void spl_parse_image_header(const struct image_header *header);
+int spl_uboot_key(void);
+void spl_board_prepare_for_linux(void);
 
 /* NAND SPL functions */
 void spl_nand_load_image(void);
diff --git a/board/timll/devkit8000/devkit8000.c 
b/board/timll/devkit8000/devkit8000.c
index f50d113..9124569 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -63,6 +63,18 @@ int board_init(void)
return 0;
 }
 
+/* Configure GPMC registers for DM9000 */
+static void gpmc_dm9000_config(void)
+{
+   writel(NET_GPMC_CONFIG1, gpmc_cfg-cs[6].config1);
+   writel(NET_GPMC_CONFIG2, gpmc_cfg-cs[6].config2);
+   writel(NET_GPMC_CONFIG3, gpmc_cfg-cs[6].config3);
+   writel(NET_GPMC_CONFIG4, gpmc_cfg-cs[6].config4);
+   writel(NET_GPMC_CONFIG5, gpmc_cfg-cs[6].config5);
+   writel(NET_GPMC_CONFIG6, gpmc_cfg-cs[6].config6);
+   writel(NET_GPMC_CONFIG7, gpmc_cfg-cs[6].config7);
+}
+
 /*
  * Routine: misc_init_r
  * Description: Configure board specific parts
@@ -81,14 +93,7 @@ int misc_init_r(void)
 #endif
 
 #ifdef CONFIG_DRIVER_DM9000
-   /* Configure GPMC registers for DM9000 */
-   writel(NET_GPMC_CONFIG1, gpmc_cfg-cs[6].config1);
-   writel(NET_GPMC_CONFIG2, gpmc_cfg-cs[6].config2);
-   writel(NET_GPMC_CONFIG3, gpmc_cfg-cs[6].config3);
-   writel(NET_GPMC_CONFIG4, gpmc_cfg-cs[6].config4);
-   writel(NET_GPMC_CONFIG5, gpmc_cfg-cs[6].config5);
-   writel(NET_GPMC_CONFIG6, gpmc_cfg-cs[6].config6);
-   writel(NET_GPMC_CONFIG7, gpmc_cfg-cs[6].config7);
+   gpmc_dm9000_config();
 
/* Use OMAP DIE_ID as MAC address */
if (!eth_getenv_enetaddr(ethaddr, enetaddr)) {
@@ -138,3 +143,13 @@ int board_eth_init(bd_t *bis)
return dm9000_initialize(bis);
 }
 #endif
+
+#ifdef CONFIG_SPL_OS_BOOT
+/* do board specific preperation before SPL
+ * Linux boot */
+void spl_board_prepare_for_linux(void)
+{
+   gpmc_dm9000_config();
+}
+
+#endif
-- 
1.7.4.1

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[U-Boot] [PATCH V6 6/6] omap-common: fixes BSS overwriting problem

[Simon Schwarz]

spl_nand overwrote BSS section because it reads a whole block everytime. Now
loads the block to spare area and just copy the needed junk to destination.
Whole block read is necessary for ecc check!

Signed-off-by: Simon Schwarz simonschwarz...@gmail.com
---

V2 changes:
nothing

V3 changes:
nothing
---
 arch/arm/cpu/armv7/omap-common/spl_nand.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/spl_nand.c 
b/arch/arm/cpu/armv7/omap-common/spl_nand.c
index 93f5183..ec56565 100644
--- a/arch/arm/cpu/armv7/omap-common/spl_nand.c
+++ b/arch/arm/cpu/armv7/omap-common/spl_nand.c
@@ -72,7 +72,8 @@ void spl_nand_load_image(void)
CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
spl_parse_image_header(header);
nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
-   spl_image.size, (void *)spl_image.load_addr);
+   spl_image.size,
+   (void *)spl_image.load_addr - sizeof(header));
} else
 #endif
{
-- 
1.7.4.1

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Re: [U-Boot] omap3_beagle problem booting kernel on latest u-boot

[Aneesh V]

John,

My primary suspect would be cache. But the fact that
CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check
this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.

regards,
Aneesh


On Thursday 29 September 2011 11:50 AM, John Rigby wrote:
 Aneesh, Dirk, Jason:

 During our monthly release testing of Linaro images we discovered that
 the kernel was pretty unreliable with the latest upstream u-boot.
 After bisecting we found that reverting this patch fixes the problem

 commit 45bf05854bc94ed8bae9e9114292895b990327ea
 Author: Aneesh Vane...@ti.com
 Date:   Thu Jun 16 23:30:53 2011 +

  armv7: adapt omap3 to the new cache maintenance framework

  adapt omap3 to the new layered cache maintenance framework

  Signed-off-by: Aneesh Vane...@ti.com

 No idea why because we tried disabling cache by adding
 CONFIG_SYS_DCACHE_OFF to the board config but that did not seem to fix
 the problem.  The problem in the kernel was general instability
 usually ending in the rootfs not being mounted.  Sometimes random
 kernel crashes have been observed.  We have never made it to a shell
 prompt before reverting.

 If we figure anything else out we will let you know.

 --john

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Re: [U-Boot] [PATCH] mx31: provide readable WEIM CS accessor

[Stefano Babic]

On 09/29/2011 09:30 AM, Helmut Raiger wrote:
 On 09/28/2011 05:14 PM, Stefano Babic wrote:
 +#ifndef __ASSEMBLER__
 +static inline void mx31_setup_weimcs(int cs,
 Is there a reason to embed this function in imx-regs.h ? Why not in
 ./arch/arm/cpu/arm1136/mx31/generic.c, where I think this function
 belongs ?

 
 I re-checked, it makes a lot of sense to inline this function as it
 results into 3 simple register writes (addresses are compile time
 calculated if 'cs' is a constant)!

Well, this is correct, but I wonder if this is the right function to be
optimized. I cannot imagine that this function runs a lot of times. It
is used to initialize the chipselects, and it is normally called not
more as one time for each chip select, or less. For the i.MX31, not more
as 6 times.

What I am trying in any case to avoid is that the code becomes messy.
And I am trying to have the code as consistent as possible among the
several i.MX SOCs. The i.MX31 is the older, and only part of code was
cleaned up. You see for example a lot of accesses using the __REG macro
inside the i.MX31 code, and this is not accepted for new code.So there
are some unwritten rules, that can be acquired reading the code for
the i.MX processors.

- each i.MX SOC has a imx-regs.h file, where the registers and the
layout of the SOC is described. Neither functions nor prototypes must be
inserted here.

- for clock related defines, a crm_regs.h file is defined

- common prototypes are put in sys_proto.h (same name as other ARM SOCs,
see OMAP/TI/s5p).

So please do not put inline functions inside imx-regs.h, and feel free
to add a sys_proto.h (check for the same file for MX35/MX5) for your
purposes.

Best regards,
Stefano Babic

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[U-Boot] [PATCH v3 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava ferma...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Remy Bohmer li...@bohmer.net
Cc: Stefano Babic sba...@denx.de
---
Changes for v2:
   - introduce temporary variable in ulpi_write
   - whitespace changes
Changes for v3:
- add protection against multiple inclusion of efika.h

 board/efikamx/Makefile  |3 +
 board/efikamx/efika.h   |   33 
 board/efikamx/efikamx-usb.c |  423 +++
 board/efikamx/efikamx.c |3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 478 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)lib$(BOARD).o
 
 COBJS  := efikamx.o
+ifdef  CONFIG_CMD_USB
+COBJS  += efikamx-usb.o
+endif
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 000..efda329
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2011 Jana Rapava ferma...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef EFIKA_H
+#define EFIKA_H
+
+/*
+ * EHCI USB
+ */
+#ifdef CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * Copyright (C) 2011 Jana Rapava ferma...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include usb.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/mx5x_pins.h
+#include asm/arch/iomux.h
+#include asm/gpio.h
+#include usb/ehci-fsl.h
+#include errno.h
+#include watchdog.h
+
+#include usb/ehci.h
+#include usb/ehci-core.h
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG (PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+   PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+   PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+   /*
+* Configure USBH1 pads
+*/
+   mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+   mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, 

Re: [U-Boot] [PATCH] arm, davinci: add missing LSPC define for MMC/SD1

[Heiko Schocher]

Hello Laurence,

Laurence Withers wrote:
 On Wed, Sep 28, 2011 at 07:40:41AM +0200, Heiko Schocher wrote:
 diff --git a/arch/arm/include/asm/arch-davinci/hardware.h 
 b/arch/arm/include/asm/arch-davinci/hardware.h
 index 24ae49d..a6cb07c 100644
 --- a/arch/arm/include/asm/arch-davinci/hardware.h
 +++ b/arch/arm/include/asm/arch-davinci/hardware.h
 @@ -260,6 +260,7 @@ typedef volatile unsigned int *  dv_reg_p;
  #define DAVINCI_LPSC_UART2  (DAVINCI_LPSC_PSC1_BASE + 13)
  #define DAVINCI_LPSC_LCDC   (DAVINCI_LPSC_PSC1_BASE + 16)
  #define DAVINCI_LPSC_ePWM   (DAVINCI_LPSC_PSC1_BASE + 17)
 +#define DAVINCI_LPSC_MMCSD1 (DAVINCI_LPSC_PSC1_BASE + 18)
  #define DAVINCI_LPSC_eCAP   (DAVINCI_LPSC_PSC1_BASE + 20)
  #define DAVINCI_LPSC_L3_CBA_RAM (DAVINCI_LPSC_PSC1_BASE + 31)
 
 Dear Heiko,
 
 DAVINCI_LPSC_MMC_SD1 already exists; look a few lines further down, under
 /* DA850-specific peripherals */ .
 
 This was added in commit 732590b3.

Indeed, missed this ... thanks!

bye,
Heiko
-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH] NAND: davinci: choose correct 1-bit h/w ECC reg

[Laurence Withers]

On Wed, Sep 28, 2011 at 12:58:45PM +0400, Sergei Shtylyov wrote:
You need to sign off your patch. Add this line to the changelog:
 
 Signed-off-by: Laurence Withers lwith...@guralp.com

Thanks, I have reposted v2. Please ignore the posting with the unaltered
subject line; I only realised after sending that I had forgotten it.

Bye for now,
-- 
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Direct tel:+447753988197 or tel:+44408643   Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
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Re: [U-Boot] [PATCH v3 4/4] usb: add USB support for Efika

[Marek Vasut]

 This commit adds USB support for EfikaMX and EfikaSB.
 
 Signed-off-by: Jana Rapava ferma...@gmail.com
 Signed-off-by: Marek Vasut marek.va...@gmail.com
 Cc: Remy Bohmer li...@bohmer.net
 Cc: Stefano Babic sba...@denx.de
 ---
 Changes for v2:
               - introduce temporary variable in ulpi_write
               - whitespace changes
 Changes for v3:
     - add protection against multiple inclusion of efika.h
 
   board/efikamx/Makefile           |       3 +
   board/efikamx/efika.h             |     33 
   board/efikamx/efikamx-usb.c |   423
 +++ board/efikamx/efikamx.c       
 |       3 + include/configs/efikamx.h     |     16 ++
   5 files changed, 478 insertions(+), 0 deletions(-)
   create mode 100644 board/efikamx/efika.h
   create mode 100644 board/efikamx/efikamx-usb.c
 

Dear Jana Rapava,

[...]

 +#ifndef EFIKA_H
 +#define EFIKA_H

__BOARD_EFIKAMX_EFIKA_H__ to make it more distinguishable.

BR, MV
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[U-Boot] [PATCH v4 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava ferma...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Remy Bohmer li...@bohmer.net
Cc: Stefano Babic sba...@denx.de
---
Changes for v2:
  - introduce temporary variable in ulpi_write
  - whitespace changes
Changes for v3:
   - add protection against multiple inclusion of efika.h
Changes for v4:
- rename multiple inclusion protection macro in efika.h

 board/efikamx/Makefile  |3 +
 board/efikamx/efika.h   |   33 
 board/efikamx/efikamx-usb.c |  423 +++
 board/efikamx/efikamx.c |3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 478 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)lib$(BOARD).o
 
 COBJS  := efikamx.o
+ifdef  CONFIG_CMD_USB
+COBJS  += efikamx-usb.o
+endif
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 000..f5a09e3
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2011 Jana Rapava ferma...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BOARD_EFIKAMX_EFIKA_H__
+#define __BOARD_EFIKAMX_EFIKA_H__
+
+/*
+ * EHCI USB
+ */
+#ifdef CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * Copyright (C) 2011 Jana Rapava ferma...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include usb.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/mx5x_pins.h
+#include asm/arch/iomux.h
+#include asm/gpio.h
+#include usb/ehci-fsl.h
+#include errno.h
+#include watchdog.h
+
+#include usb/ehci.h
+#include usb/ehci-core.h
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG (PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+   PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+   PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+   /*
+* Configure USBH1 pads
+*/
+   mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+   mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+

[U-Boot] [PATCH v2] NAND: davinci: choose correct 1-bit h/w ECC reg

[Laurence Withers]

In nand_davinci_readecc(), select the correct NANDFnECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.

Note this now matches the usage in nand_davinci_enable_hwecc(), which
already had the correct handling, and allows refactoring to a single
function encapsulating the register read.

Without this fix, writing NAND pages to a chip not wired to CS2 would
result in in the ECC calculation always returning FF for each
512-byte segment, and reading back a correctly written page (one with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.

Signed-off-by: Laurence Withers lwith...@guralp.com
---
Changes for v2:
  Add Signed-off-by to commit message.
---
 drivers/mtd/nand/davinci_nand.c |   26 +-
 1 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index d41579c..e8506dd 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -176,12 +176,22 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, 
int cmd,
 
 #ifdef CONFIG_SYS_NAND_HW_ECC
 
+static u_int32_t nand_davinci_readecc(struct mtd_info *mtd)
+{
+   u_int32_t   ecc = 0;
+
+   ecc = __raw_readl((davinci_emif_regs-nandfecc[
+   CONFIG_SYS_NAND_CS - 2]));
+
+   return ecc;
+}
+
 static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
 {
u_int32_t   val;
 
-   (void)__raw_readl((davinci_emif_regs-nandfecc[
-   CONFIG_SYS_NAND_CS - 2]));
+   /* reading the ECC result register resets the ECC calculation */
+   nand_davinci_readecc(mtd);
 
val = __raw_readl(davinci_emif_regs-nandfcr);
val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS);
@@ -189,22 +199,12 @@ static void nand_davinci_enable_hwecc(struct mtd_info 
*mtd, int mode)
__raw_writel(val, davinci_emif_regs-nandfcr);
 }
 
-static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region)
-{
-   u_int32_t   ecc = 0;
-
-   ecc = __raw_readl((davinci_emif_regs-nandfecc[region - 1]));
-
-   return ecc;
-}
-
 static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u_char *ecc_code)
 {
u_int32_t   tmp;
-   const int region = 1;
 
-   tmp = nand_davinci_readecc(mtd, region);
+   tmp = nand_davinci_readecc(mtd);
 
/* Squeeze 4 bytes ECC into 3 bytes by removing RESERVED bits
 * and shifting. RESERVED bits are 31 to 28 and 15 to 12. */
-- 
1.7.2.5

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[U-Boot] [PATCH] NAND: davinci: choose correct 1-bit h/w ECC reg

[Laurence Withers]

In nand_davinci_readecc(), select the correct NANDFnECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.

Note this now matches the usage in nand_davinci_enable_hwecc(), which
already had the correct handling, and allows refactoring to a single
function encapsulating the register read.

Without this fix, writing NAND pages to a chip not wired to CS2 would
result in in the ECC calculation always returning FF for each
512-byte segment, and reading back a correctly written page (one with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.

Signed-off-by: Laurence Withers lwith...@guralp.com
---
Changes for v2:
  Add Signed-off-by to commit message.
---
 drivers/mtd/nand/davinci_nand.c |   26 +-
 1 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index d41579c..e8506dd 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -176,12 +176,22 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, 
int cmd,
 
 #ifdef CONFIG_SYS_NAND_HW_ECC
 
+static u_int32_t nand_davinci_readecc(struct mtd_info *mtd)
+{
+   u_int32_t   ecc = 0;
+
+   ecc = __raw_readl((davinci_emif_regs-nandfecc[
+   CONFIG_SYS_NAND_CS - 2]));
+
+   return ecc;
+}
+
 static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
 {
u_int32_t   val;
 
-   (void)__raw_readl((davinci_emif_regs-nandfecc[
-   CONFIG_SYS_NAND_CS - 2]));
+   /* reading the ECC result register resets the ECC calculation */
+   nand_davinci_readecc(mtd);
 
val = __raw_readl(davinci_emif_regs-nandfcr);
val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS);
@@ -189,22 +199,12 @@ static void nand_davinci_enable_hwecc(struct mtd_info 
*mtd, int mode)
__raw_writel(val, davinci_emif_regs-nandfcr);
 }
 
-static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region)
-{
-   u_int32_t   ecc = 0;
-
-   ecc = __raw_readl((davinci_emif_regs-nandfecc[region - 1]));
-
-   return ecc;
-}
-
 static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u_char *ecc_code)
 {
u_int32_t   tmp;
-   const int region = 1;
 
-   tmp = nand_davinci_readecc(mtd, region);
+   tmp = nand_davinci_readecc(mtd);
 
/* Squeeze 4 bytes ECC into 3 bytes by removing RESERVED bits
 * and shifting. RESERVED bits are 31 to 28 and 15 to 12. */
-- 
1.7.2.5

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Re: [U-Boot] [PATCH] arm, davinci: add missing LSPC define for MMC/SD1

[Laurence Withers]

On Wed, Sep 28, 2011 at 07:40:41AM +0200, Heiko Schocher wrote:
 diff --git a/arch/arm/include/asm/arch-davinci/hardware.h 
 b/arch/arm/include/asm/arch-davinci/hardware.h
 index 24ae49d..a6cb07c 100644
 --- a/arch/arm/include/asm/arch-davinci/hardware.h
 +++ b/arch/arm/include/asm/arch-davinci/hardware.h
 @@ -260,6 +260,7 @@ typedef volatile unsigned int *   dv_reg_p;
  #define DAVINCI_LPSC_UART2   (DAVINCI_LPSC_PSC1_BASE + 13)
  #define DAVINCI_LPSC_LCDC(DAVINCI_LPSC_PSC1_BASE + 16)
  #define DAVINCI_LPSC_ePWM(DAVINCI_LPSC_PSC1_BASE + 17)
 +#define DAVINCI_LPSC_MMCSD1  (DAVINCI_LPSC_PSC1_BASE + 18)
  #define DAVINCI_LPSC_eCAP(DAVINCI_LPSC_PSC1_BASE + 20)
  #define DAVINCI_LPSC_L3_CBA_RAM  (DAVINCI_LPSC_PSC1_BASE + 31)

Dear Heiko,

DAVINCI_LPSC_MMC_SD1 already exists; look a few lines further down, under
/* DA850-specific peripherals */ .

This was added in commit 732590b3.

Bye for now,
-- 
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643   Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
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Re: [U-Boot] [PATCH v4 4/4] usb: add USB support for Efika

[Marek Vasut]

 This commit adds USB support for EfikaMX and EfikaSB.
 
 Signed-off-by: Jana Rapava ferma...@gmail.com
 Signed-off-by: Marek Vasut marek.va...@gmail.com
 Cc: Remy Bohmer li...@bohmer.net
 Cc: Stefano Babic sba...@denx.de
 ---
 Changes for v2:
             - introduce temporary variable in ulpi_write
             - whitespace changes
 Changes for v3:
               - add protection against multiple inclusion of efika.h
 Changes for v4:
     - rename multiple inclusion protection macro in efika.h
 
   board/efikamx/Makefile           |       3 +
   board/efikamx/efika.h             |     33 
   board/efikamx/efikamx-usb.c |   423
 +++ board/efikamx/efikamx.c       
 |       3 + include/configs/efikamx.h     |     16 ++
   5 files changed, 478 insertions(+), 0 deletions(-)
   create mode 100644 board/efikamx/efika.h
   create mode 100644 board/efikamx/efikamx-usb.c


Dear Jana Rapava, 

[...]

 +#ifndef __BOARD_EFIKAMX_EFIKA_H__
 +#define __BOARD_EFIKAMX_EFIKA_H__
 +
 +/*
 + * EHCI USB
 + */
 +#ifdef    CONFIG_CMD_USB
 +void setup_iomux_usb(void);
 +#else
 +static inline void setup_iomux_usb(void) { }
 +#endif

Is the ifndef actually unterminated? Did you even compile-test this?
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[U-Boot] [PATCH v5 4/4] Add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava ferma...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Remy Bohmer li...@bohmer.net
Cc: Stefano Babic sba...@denx.de
---
Changes for v2:
 - introduce temporary variable in ulpi_write
 - whitespace changes
Changes for v3:
  - add protection against multiple inclusion of efika.h
Changes for v4:
   - rename multiple inclusion protection macro in efika.h
Changes for v5:
- fix unterminated #ifndef in efika.h

 board/efikamx/Makefile  |3 +
 board/efikamx/efika.h   |   35 
 board/efikamx/efikamx-usb.c |  423 +++
 board/efikamx/efikamx.c |3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 480 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)lib$(BOARD).o
 
 COBJS  := efikamx.o
+ifdef  CONFIG_CMD_USB
+COBJS  += efikamx-usb.o
+endif
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 000..fec9ee0
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2011 Jana Rapava ferma...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BOARD_EFIKAMX_EFIKA_H__
+#define __BOARD_EFIKAMX_EFIKA_H__
+
+/*
+ * EHCI USB
+ */
+#ifdef CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
+
+#endif /* __BOARD_EFIKAMX_EFIKA_H__ */
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * Copyright (C) 2011 Jana Rapava ferma...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include usb.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/mx5x_pins.h
+#include asm/arch/iomux.h
+#include asm/gpio.h
+#include usb/ehci-fsl.h
+#include errno.h
+#include watchdog.h
+
+#include usb/ehci.h
+#include usb/ehci-core.h
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG (PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+   PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+   PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+   /*
+* Configure USBH1 pads
+*/
+   mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+   mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+   

Re: [U-Boot] [U-Boot-Users] Wireless Ethernet

[Wolfgang Denk]

Dear Marek Vasut,

In message 201109290335.42615.marek.va...@gmail.com you wrote:
 On Wednesday, September 28, 2011 09:21:57 AM Farooque, Fayaz wrote:
  Does u boot have support for wifi devices?. We need to have a setup in
  which kernel is booted through tftpboot with a wireless network
  connection. Please help me.
 
 
 No, there's no 80211 stack in uboot, you're welcome to add it (I'd really be 
 interested to see such work).

I see little chance to add this to U-Boot.  Keep in mind that we are a
boot loader.  It is way easier just to boot into Linux to have WLAN
connectivity.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
I can't say I've ever been lost, but I was bewildered once for  three
days. - Daniel Boone (Attributed)
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[U-Boot] [2011.09-rc2] Fix for compile error with gcc3

[rhabarber1848]

Hi,

compiling U-Boot 2011.09-rc2 with gcc-3.4.6 fails with this error:

In file included from u-boot-2011.09-rc2/include/linux/compiler.h:40,
 from serial.c:29:
u-boot-2011.09-rc2/include/linux/compiler-gcc.h:87:30: linux/compiler-gcc3.h: No
such file or directory

Adding compiler-gcc3.h from Linux kernel source to
u-boot-2011.09-rc2/include/linux/ fixes this gcc3-only problem.

Kind regards, rhabarber1848

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[U-Boot] [PATCH V2] mx31: provide readable WEIM CS accessor

[Helmut Raiger]

mxc_setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.

Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
  V2:
added sys_proto.h for mx31
introduced mxc_setup_weimcs(), which is SOC independent
not inlined any more (codesize increased by 60-90 bytes)
---
 arch/arm/include/asm/arch-mx31/imx-regs.h   |   26 +++-
 arch/arm/include/asm/arch-mx31/sys_proto.h  |   35 +++
 board/davedenx/qong/qong.c  |   87 ++-
 board/freescale/mx31ads/mx31ads.c   |   15 -
 board/freescale/mx31pdk/mx31pdk.c   |   14 -
 board/imx31_phycore/imx31_phycore.c |   41 ++---
 board/logicpd/imx31_litekit/imx31_litekit.c |   28 +++--
 7 files changed, 167 insertions(+), 79 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h

diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h 
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..d631a10 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -534,10 +534,30 @@ enum iomux_pins {
 #define ESDCTL_BL(x)   ((x)  7)
 #define ESDCTL_PRCT(x) ((x)  0)
 
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+   cnc, wsc, ew, wws, edc) \
+   ((sp)  31 | (wp)  30 | (bcd)  28 | (psz)  22 | (pme)  21 |\
+(sync)  20 | (dol)  16 | (cnc)  14 | (wsc)  8 | (ew)  7 |\
+(wws)  4 | (edc)  0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+   csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+   ((oea)  28 | (oen)  24 | (ebwa)  20 | (ebwn)  16 |\
+(csa)  12 | (ebc)  11 | (dsz)  8 | (csn)  4 |\
+(psr)  3 | (cre)  2 | (wrap)  1 | (csen)  0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+   wwu, age, cnc2, fce) \
+   ((ebra)  28 | (ebrn)  24 | (rwa)  20 | (rwn)  16 |\
+(mum)  15 | (lah)  13 | (lbn)  10 | (lba)  8 |\
+(dww)  6 | (dct)  4 | (wwu)  3 |\
+(age)  2 | (cnc2)  1 | (fce)  0)
+
 #define WEIM_BASE  0xb8002000
-#define CSCR_U(x)  (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x)  (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x)  (WEIM_BASE + 8 + (x) * 0x10)
+#define WEIM_CSCR_U(x) (WEIM_BASE + (x) * 0x10)
+#define WEIM_CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
+#define WEIM_CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
 
 #define IOMUXC_BASE0x43FAC000
 #define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h 
b/arch/arm/include/asm/arch-mx31/sys_proto.h
new file mode 100644
index 000..7600303
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SYS_PROTO_H_
+#define _SYS_PROTO_H_
+
+struct mxc_weimcs {
+   u32 upper;
+   u32 lower;
+   u32 additional;
+};
+
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
+
+#endif
diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c
index 99432ed..b9133bc 100644
--- a/board/davedenx/qong/qong.c
+++ b/board/davedenx/qong/qong.c
@@ -25,7 +25,7 @@
 #include netdev.h
 #include asm/arch/clock.h
 #include asm/arch/imx-regs.h
-#include asm/io.h
+#include asm/arch/sys_proto.h
 #include nand.h
 #include fsl_pmic.h
 #include asm/gpio.h
@@ -61,11 +61,17 @@ static void qong_fpga_reset(void)
 int board_early_init_f (void)
 {
 #ifdef CONFIG_QONG_FPGA
-   /* CS1: FPGA/Network Controller/GPIO */
-   /* 16-bit, no DTACK */
-   __REG(CSCR_U(1)) = 0x0A01;
-   __REG(CSCR_L(1)) = 0x20040501;
-   __REG(CSCR_A(1)) = 0x04020C00;
+   /* CS1: FPGA/Network Controller/GPIO, 16-bit, no DTACK */
+   

[U-Boot] [Resend PATCH V2 (forgot generic.c)] mx31: provide readable WEIM CS accessor

[Helmut Raiger]

setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.

Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
  V2:
added sys_proto.h for mx31
introduced mxc_setup_weimcs(), which is SOC independent
not inlined any more (codesize increased by 60-90 bytes)
---
 arch/arm/cpu/arm1136/mx31/generic.c |9 +++
 arch/arm/include/asm/arch-mx31/imx-regs.h   |   26 +++-
 arch/arm/include/asm/arch-mx31/sys_proto.h  |   35 +++
 board/davedenx/qong/qong.c  |   87 ++-
 board/freescale/mx31ads/mx31ads.c   |   15 -
 board/freescale/mx31pdk/mx31pdk.c   |   14 -
 board/imx31_phycore/imx31_phycore.c |   41 ++---
 board/logicpd/imx31_litekit/imx31_litekit.c |   28 +++--
 8 files changed, 176 insertions(+), 79 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h

diff --git a/arch/arm/cpu/arm1136/mx31/generic.c 
b/arch/arm/cpu/arm1136/mx31/generic.c
index e3a4d1b..29af156 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -25,6 +25,8 @@
 #include asm/arch/imx-regs.h
 #include asm/arch/clock.h
 #include asm/io.h
+#include asm/arch/sys_proto.h
+
 
 static u32 mx31_decode_pll(u32 reg, u32 infreq)
 {
@@ -126,6 +128,13 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
 
 }
 
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
+{
+   writel(weimcs-upper, WEIM_CSCR_U(cs));
+   writel(weimcs-lower, WEIM_CSCR_L(cs));
+   writel(weimcs-additional, WEIM_CSCR_A(cs));
+}
+
 struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h 
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..d631a10 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -534,10 +534,30 @@ enum iomux_pins {
 #define ESDCTL_BL(x)   ((x)  7)
 #define ESDCTL_PRCT(x) ((x)  0)
 
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+   cnc, wsc, ew, wws, edc) \
+   ((sp)  31 | (wp)  30 | (bcd)  28 | (psz)  22 | (pme)  21 |\
+(sync)  20 | (dol)  16 | (cnc)  14 | (wsc)  8 | (ew)  7 |\
+(wws)  4 | (edc)  0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+   csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+   ((oea)  28 | (oen)  24 | (ebwa)  20 | (ebwn)  16 |\
+(csa)  12 | (ebc)  11 | (dsz)  8 | (csn)  4 |\
+(psr)  3 | (cre)  2 | (wrap)  1 | (csen)  0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+   wwu, age, cnc2, fce) \
+   ((ebra)  28 | (ebrn)  24 | (rwa)  20 | (rwn)  16 |\
+(mum)  15 | (lah)  13 | (lbn)  10 | (lba)  8 |\
+(dww)  6 | (dct)  4 | (wwu)  3 |\
+(age)  2 | (cnc2)  1 | (fce)  0)
+
 #define WEIM_BASE  0xb8002000
-#define CSCR_U(x)  (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x)  (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x)  (WEIM_BASE + 8 + (x) * 0x10)
+#define WEIM_CSCR_U(x) (WEIM_BASE + (x) * 0x10)
+#define WEIM_CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
+#define WEIM_CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
 
 #define IOMUXC_BASE0x43FAC000
 #define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h 
b/arch/arm/include/asm/arch-mx31/sys_proto.h
new file mode 100644
index 000..7600303
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SYS_PROTO_H_
+#define _SYS_PROTO_H_
+
+struct mxc_weimcs {
+   u32 upper;
+   u32 lower;
+   

[U-Boot] ucdragon.com

[Alex]

Preferred Domain Availability Notice:
ucdragon.com will be listed for auction in a few days.  This domain might be 
useful for you, since you own a domain similar to ucdragon.com
To express interest in owning this domain, fill out the simple form here: 
http://LUSHSTYLE.COM/c5a380a4a667468a.3001
 
Sincerely,Alexander
1113 Murfreesboro Rd
Ste 106-207
Franklin, TN  37064 
If you do not want more of these messages, please click the link above and 
follow instructions at the bottom of the page
 
 
Impatience never commanded success.

- Edwin H. Chapin 

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Re: [U-Boot] [2011.09-rc2] Fix for compile error with gcc3

[Scott McNutt]

Hi rhabarber1848,

A patch was recently submitted:

http://patchwork.ozlabs.org/patch/116180

Thanks,
--Scott

rhabarber1848 wrote:
 Hi,
 
 compiling U-Boot 2011.09-rc2 with gcc-3.4.6 fails with this error:
 
 In file included from u-boot-2011.09-rc2/include/linux/compiler.h:40,
  from serial.c:29:
 u-boot-2011.09-rc2/include/linux/compiler-gcc.h:87:30: linux/compiler-gcc3.h: 
 No
 such file or directory
 
 Adding compiler-gcc3.h from Linux kernel source to
 u-boot-2011.09-rc2/include/linux/ fixes this gcc3-only problem.
 
 Kind regards, rhabarber1848
 
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Re: [U-Boot] [U-Boot-Users] Wireless Ethernet

[Farooque, Fayaz]

I understand that. But it would be very handy in diskless booting where the 
bootloader has to get the kernel from a server. 

-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de] 
Sent: Thursday, September 29, 2011 5:30 PM
To: Marek Vasut
Cc: u-boot@lists.denx.de; Farooque, Fayaz
Subject: Re: [U-Boot] [U-Boot-Users] Wireless Ethernet

Dear Marek Vasut,

In message 201109290335.42615.marek.va...@gmail.com you wrote:
 On Wednesday, September 28, 2011 09:21:57 AM Farooque, Fayaz wrote:
  Does u boot have support for wifi devices?. We need to have a setup in
  which kernel is booted through tftpboot with a wireless network
  connection. Please help me.
 
 
 No, there's no 80211 stack in uboot, you're welcome to add it (I'd really be 
 interested to see such work).

I see little chance to add this to U-Boot.  Keep in mind that we are a
boot loader.  It is way easier just to boot into Linux to have WLAN
connectivity.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] ignore soc asm-offsets.s

[Laurence Withers]

On Mon, Sep 12, 2011 at 12:47:24AM -0400, Mike Frysinger wrote:
 Recent commit a4814a69d3bca6ee05f4bfc4 cleaned up generation of
 asm-offsets.s for SoC dirs, but missed adding it to the ignore
 list which makes it show up in `git status`.
 
 Signed-off-by: Mike Frysinger vap...@gentoo.org
 ---
  .gitignore |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)
 
 diff --git a/.gitignore b/.gitignore
 index dbf545f..2a82cd9 100644
 --- a/.gitignore
 +++ b/.gitignore
 @@ -46,6 +46,7 @@
  
  /include/generated/
  /lib/asm-offsets.s
 +/arch/*/cpu/asm-offsets.s
  
  # stgit generated dirs
  patches-*

Dear Mike,

There appear to be some SoCs which have further subdirectories, e.g.:

lwithers@rhodium u-boot $ git status
# On branch lw-diamond
# Untracked files:
#   (use git add file... to include in what will be committed)
#
#   arch/arm/cpu/arm926ejs/davinci/asm-offsets.s
nothing added to commit but untracked files present (use git add to track)

We could ignore all files named asm-offsets.s , or perhaps all files under
arch ?

Bye for now,
-- 
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Direct tel:+447753988197 or tel:+44408643   Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
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Re: [U-Boot] Regd U-Boot Architecture

[Detlev Zundel]

Hi Mayur,

 Can anybody will provide me some documents/information/link related
 with the U-Boot Architecture.
 I'm just starting with U-Boot.

If I google for U-Boot I find this as the first link:

http://www.denx.de/wiki/U-Boot

If you need more than the documents/information/links this provides,
then please ask specific questions.

Cheers
  Detlev

-- 
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und - wie wir sehen werden -  oft sinnlosen Fragen wie Wo wohnst du?, Was
bist du?, Welche Religion?, Welche Rasse?, Welche Nationalität? alle-
samt heute für logische Fragen gehalten.   -- Richard Buckminster Fuller
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Re: [U-Boot] Is it necessary that uboot(mips) should read status register($12) before setting it

[Detlev Zundel]

Hi Bruce,

 MIPS Uboot works OK.Part of the code is as below.

Congratulations.  Although I'm not sure what I'm congratulating on ;)

 And my questions:
 1.read status register($12) and save value to $10,but don't use the value in
 $10 to do anything.
 Because uboot overwrite $10.

 2.Is it right?I can delete this code mfc0 $10,$12 from uboot.

I'm sorry, but I don;t know what to make of this. Can you tell us if
this code is from U-Boot and if so, in which file?  Also can't you try
for yourself if U-Boot still works after removing this instruction?

What exactly do you want us to tell you?

Cheers
  Detlev

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be about the  popularity of the GNU Hurd,  or even the popularity of the GNU
system.  I would wish for all software users to have  reedom and value free-
dom.   -- Richard Stallman e1oipab-00016e...@fencepost.gnu.org
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Re: [U-Boot] [Resend PATCH V2 (forgot generic.c)] mx31: provide readable WEIM CS accessor

[Stefano Babic]

On 09/29/2011 02:25 PM, Helmut Raiger wrote:
 setup_weimcs() and some macros are added to support the setup
 for i.MX31 WEIM chip selects. As a compromise between verbosity
 and readability an ASCII-art'ish bit comment is used instead of
 bitfields.
 All i.MX31 boards have been patched to use this approach using a
 helper program to verify the changes.
 
 Signed-off-by: Helmut Raiger helmut.rai...@hale.at
 ---
   V2:
   added sys_proto.h for mx31
   introduced mxc_setup_weimcs(), which is SOC independent
   not inlined any more (codesize increased by 60-90 bytes)
 ---
  arch/arm/cpu/arm1136/mx31/generic.c |9 +++

Ah, ok, I now I can find the implementation ;-)

I have only a couple of open points...

  arch/arm/include/asm/arch-mx31/imx-regs.h   |   26 +++-
  arch/arm/include/asm/arch-mx31/sys_proto.h  |   35 +++
  board/davedenx/qong/qong.c  |   87 
 ++-
  board/freescale/mx31ads/mx31ads.c   |   15 -
  board/freescale/mx31pdk/mx31pdk.c   |   14 -
  board/imx31_phycore/imx31_phycore.c |   41 ++---
  board/logicpd/imx31_litekit/imx31_litekit.c |   28 +++--
  8 files changed, 176 insertions(+), 79 deletions(-)
  create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h
 
 diff --git a/arch/arm/cpu/arm1136/mx31/generic.c 
 b/arch/arm/cpu/arm1136/mx31/generic.c
 index e3a4d1b..29af156 100644
 --- a/arch/arm/cpu/arm1136/mx31/generic.c
 +++ b/arch/arm/cpu/arm1136/mx31/generic.c
 @@ -25,6 +25,8 @@
  #include asm/arch/imx-regs.h
  #include asm/arch/clock.h
  #include asm/io.h
 +#include asm/arch/sys_proto.h
 +

Drop newline

  
  static u32 mx31_decode_pll(u32 reg, u32 infreq)
  {
 @@ -126,6 +128,13 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
  
  }
  
 +void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
 +{
 + writel(weimcs-upper, WEIM_CSCR_U(cs));
 + writel(weimcs-lower, WEIM_CSCR_L(cs));
 + writel(weimcs-additional, WEIM_CSCR_A(cs));
 +}

Even if more hidden, the access is always made with base + offset,
instead of defining a structure.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH] MX51: vision2: Set global macros

[Stefano Babic]

On 09/29/2011 03:34 AM, Marek Vasut wrote:
 On Wednesday, September 28, 2011 12:09:17 PM Stefano Babic wrote:
 Adapt vision2 to the current u-boot version. Drop
 own macros to set global data and use the common ones.

 Signed-off-by: Stefano Babic sba...@denx.de
 ---
  include/configs/vision2.h |   17 +
  1 files changed, 9 insertions(+), 8 deletions(-)

 diff --git a/include/configs/vision2.h b/include/configs/vision2.h
 index 16ed975..c07cee4 100644
 --- a/include/configs/vision2.h
 +++ b/include/configs/vision2.h
 @@ -192,14 +192,15 @@
  #define PHYS_SDRAM_1_SIZE   (256 * 1024 * 1024)
  #define PHYS_SDRAM_2CSD1_BASE_ADDR
  #define PHYS_SDRAM_2_SIZE   (256 * 1024 * 1024)
 -#define CONFIG_SYS_SDRAM_BASE   0x9000
 -#define CONFIG_SYS_INIT_RAM_ADDR0x1FFE8000
 -
 -#define CONFIG_SYS_INIT_RAM_SIZE(64 * 1024)
 -#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - \
 -GENERATED_GBL_DATA_SIZE)
 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
 -CONFIG_SYS_GBL_DATA_OFFSET)
 +#define CONFIG_SYS_SDRAM_BASE   (PHYS_SDRAM_1)
 +#define CONFIG_SYS_INIT_RAM_ADDR(IRAM_BASE_ADDR)
 +#define CONFIG_SYS_INIT_RAM_SIZE(IRAM_SIZE)
 
 Arent the parentheses redundant here?

I will drop in V2.

Best regards,
Stefano Babic

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Re: [U-Boot] [Resend PATCH V2 (forgot generic.c)] mx31: provide readable WEIM CS accessor

[Helmut Raiger]

On 09/29/2011 03:21 PM, Stefano Babic wrote:


   static u32 mx31_decode_pll(u32 reg, u32 infreq)
   {
 @@ -126,6 +128,13 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)

   }

 +void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
 +{
 +writel(weimcs-upper, WEIM_CSCR_U(cs));
 +writel(weimcs-lower, WEIM_CSCR_L(cs));
 +writel(weimcs-additional, WEIM_CSCR_A(cs));
 +}
 Even if more hidden, the access is always made with base + offset,
 instead of defining a structure.


Do you really thing this is more readable:

 in imx_regs.h ---

struct mx31_weim_cscr {
 u32 upper;
 u32 lower;
 u32 additional;
 u32 reserved;
};

struct mx31_weim {
 struct mx31_weim_cscr cscr[6];
};

-- in generic.c --

void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
{
 struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
 struct mx31_weim_cscr *cscr = weim-cscr[cs];

 writel(weimcs-upper, cscr-upper);
 writel(weimcs-lower, cscr-lower);
 writel(weimcs-additional, cscr-additional);
}


It seems pretty clumsy to me, but for sure a matter of taste.
Helmut



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Re: [U-Boot] [Resend PATCH V2 (forgot generic.c)] mx31: provide readable WEIM CS accessor

[Stefano Babic]

On 09/29/2011 04:01 PM, Helmut Raiger wrote:
 On 09/29/2011 03:21 PM, Stefano Babic wrote:


   static u32 mx31_decode_pll(u32 reg, u32 infreq)
   {
 @@ -126,6 +128,13 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)

   }

 +void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
 +{
 +writel(weimcs-upper, WEIM_CSCR_U(cs));
 +writel(weimcs-lower, WEIM_CSCR_L(cs));
 +writel(weimcs-additional, WEIM_CSCR_A(cs));
 +}
 Even if more hidden, the access is always made with base + offset,
 instead of defining a structure.

 
 Do you really thing this is more readable:
 
  in imx_regs.h ---
 
 struct mx31_weim_cscr {
 u32 upper;
 u32 lower;
 u32 additional;
 u32 reserved;
 };
 
 struct mx31_weim {
 struct mx31_weim_cscr cscr[6];
 };
 
 -- in generic.c --
 
 void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
 {
 struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
 struct mx31_weim_cscr *cscr = weim-cscr[cs];
 
 writel(weimcs-upper, cscr-upper);
 writel(weimcs-lower, cscr-lower);
 writel(weimcs-additional, cscr-additional);
 }
 
 
 It seems pretty clumsy to me, but for sure a matter of taste.
 Helmut

Check in the ML and also in code - more as a question of taste, this is
a coding style rule in u-boot.

Best regards,
Stefano Babic

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Re: [U-Boot] [U-Boot-Users] Wireless Ethernet

[Marek Vasut]

On Thursday, September 29, 2011 02:36:04 PM Farooque, Fayaz wrote:
 I understand that. But it would be very handy in diskless booting where the
 bootloader has to get the kernel from a server.
 

Why not use kexec then ?
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Re: [U-Boot] [PATCH] ignore soc asm-offsets.s

[Mike Frysinger]

On Thursday, September 29, 2011 08:40:33 Laurence Withers wrote:
 On Mon, Sep 12, 2011 at 12:47:24AM -0400, Mike Frysinger wrote:
  Recent commit a4814a69d3bca6ee05f4bfc4 cleaned up generation of
  asm-offsets.s for SoC dirs, but missed adding it to the ignore
  list which makes it show up in `git status`.
  
  --- a/.gitignore
  +++ b/.gitignore
  
   /lib/asm-offsets.s
  +/arch/*/cpu/asm-offsets.s
 
 There appear to be some SoCs which have further subdirectories, e.g.:
 
 lwithers@rhodium u-boot $ git status
 # On branch lw-diamond
 # Untracked files:
 #   (use git add file... to include in what will be committed)
 #
 #   arch/arm/cpu/arm926ejs/davinci/asm-offsets.s
 nothing added to commit but untracked files present (use git add to
 track)
 
 We could ignore all files named asm-offsets.s , or perhaps all files under
 arch ?

off the top of my head, i can't see a problem with ignoring asm-offsets.s in 
the whole tree.  want to send a patch and see what Wolfgang says ?
-mike


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Re: [U-Boot] [PATCH v5 4/4] Add USB support for Efika

[Marek Vasut]

On Thursday, September 29, 2011 01:09:57 PM Jana Rapava wrote:
 This commit adds USB support for EfikaMX and EfikaSB.
 
 Signed-off-by: Jana Rapava ferma...@gmail.com
 Signed-off-by: Marek Vasut marek.va...@gmail.com
 Cc: Remy Bohmer li...@bohmer.net
 Cc: Stefano Babic sba...@denx.de
 ---
 Changes for v2:
  - introduce temporary variable in ulpi_write
  - whitespace changes
 Changes for v3:
   - add protection against multiple inclusion of efika.h
 Changes for v4:
- rename multiple inclusion protection macro in efika.h
 Changes for v5:
   - fix unterminated #ifndef in efika.h
 

Looks ok,

Acked-by: Marek Vasut marek.va...@gmail.com
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[U-Boot] [PATCH V3] mx31: provide readable WEIM CS accessor

[Helmut Raiger]

setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.

Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2:
added sys_proto.h for mx31
introduced mxc_setup_weimcs(), which is SOC independent
not inlined any more (codesize increased by 60-90 bytes)
V3:
modified register access according to the coding style
---
 arch/arm/cpu/arm1136/mx31/generic.c |9 +++
 arch/arm/include/asm/arch-mx31/imx-regs.h   |   35 ++-
 arch/arm/include/asm/arch-mx31/sys_proto.h  |   35 +++
 board/davedenx/qong/qong.c  |   87 ++-
 board/freescale/mx31ads/mx31ads.c   |   15 -
 board/freescale/mx31pdk/mx31pdk.c   |   14 -
 board/imx31_phycore/imx31_phycore.c |   41 ++---
 board/logicpd/imx31_litekit/imx31_litekit.c |   28 +++--
 8 files changed, 185 insertions(+), 79 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h

diff --git a/arch/arm/cpu/arm1136/mx31/generic.c 
b/arch/arm/cpu/arm1136/mx31/generic.c
index e3a4d1b..29af156 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -25,6 +25,8 @@
 #include asm/arch/imx-regs.h
 #include asm/arch/clock.h
 #include asm/io.h
+#include asm/arch/sys_proto.h
+
 
 static u32 mx31_decode_pll(u32 reg, u32 infreq)
 {
@@ -126,6 +128,13 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
 
 }
 
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
+{
+   writel(weimcs-upper, WEIM_CSCR_U(cs));
+   writel(weimcs-lower, WEIM_CSCR_L(cs));
+   writel(weimcs-additional, WEIM_CSCR_A(cs));
+}
+
 struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h 
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..02b471f 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -470,6 +470,18 @@ enum iomux_pins {
 #define CCM_RCSR_NF16B (1  31)
 #define CCM_RCSR_NFMS  (1  30)
 
+/* WEIM CS control registers */
+struct mx31_weim_cscr {
+   u32 upper;
+   u32 lower;
+   u32 additional;
+   u32 reserved;
+};
+
+struct mx31_weim {
+   struct mx31_weim_cscr cscr[6];
+};
+
 #endif
 
 #define __REG(x) (*((volatile u32 *)(x)))
@@ -534,10 +546,27 @@ enum iomux_pins {
 #define ESDCTL_BL(x)   ((x)  7)
 #define ESDCTL_PRCT(x) ((x)  0)
 
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+   cnc, wsc, ew, wws, edc) \
+   ((sp)  31 | (wp)  30 | (bcd)  28 | (psz)  22 | (pme)  21 |\
+(sync)  20 | (dol)  16 | (cnc)  14 | (wsc)  8 | (ew)  7 |\
+(wws)  4 | (edc)  0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+   csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+   ((oea)  28 | (oen)  24 | (ebwa)  20 | (ebwn)  16 |\
+(csa)  12 | (ebc)  11 | (dsz)  8 | (csn)  4 |\
+(psr)  3 | (cre)  2 | (wrap)  1 | (csen)  0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+   wwu, age, cnc2, fce) \
+   ((ebra)  28 | (ebrn)  24 | (rwa)  20 | (rwn)  16 |\
+(mum)  15 | (lah)  13 | (lbn)  10 | (lba)  8 |\
+(dww)  6 | (dct)  4 | (wwu)  3 |\
+(age)  2 | (cnc2)  1 | (fce)  0)
+
 #define WEIM_BASE  0xb8002000
-#define CSCR_U(x)  (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x)  (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x)  (WEIM_BASE + 8 + (x) * 0x10)
 
 #define IOMUXC_BASE0x43FAC000
 #define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h 
b/arch/arm/include/asm/arch-mx31/sys_proto.h
new file mode 100644
index 000..7600303
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU 

Re: [U-Boot] altbootcmd and failbootcmd

[Thomas Johnson]

Thanks for all your help on this.

My board has on it some static Magneto Ram and I have placed the
bootcounter in this, I have it all working fine now thanks.

Rgds

Tom Johnson

-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de] 
Sent: 28 September 2011 10:01 PM
To: Kim Phillips
Cc: Detlev Zundel; U-Boot@lists.denx.de; Thomas Johnson
Subject: Re: [U-Boot] altbootcmd and failbootcmd

Dear Kim Phillips,

In message 20110927154026.f2570285.kim.phill...@freescale.com you
wrote:

 I don't know that there is such storage space on the 8313.

It can be memory (including OCM or static SRAM), but it can also be
register(s) if these are guaranteed to keep their values over rest
(frequently timer registers behave that way), or some location inan
EEPROM or ...

Best regards,

Wolfgang Denk

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the realm of scientific observation, luck is granted only to those
who are prepared. - Louis Pasteur
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Re: [U-Boot] [PATCH V3] mx31: provide readable WEIM CS accessor

[Helmut Raiger]

forget the patch, I'll resend.

... clearly a matter of under caffeination.

Helmut



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Re: [U-Boot] [PATCH V3] mx31: provide readable WEIM CS accessor

[Stefano Babic]

On 09/29/2011 05:11 PM, Helmut Raiger wrote:
 
 forget the patch, I'll resend.
 
 ... clearly a matter of under caffeination.
 

Do not worry, I have the same problem...

Stefano


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Re: [U-Boot] omap3_beagle problem booting kernel on latest u-boot

[John Rigby]

On Thu, Sep 29, 2011 at 3:09 AM, Aneesh V ane...@ti.com wrote:
 John,

 My primary suspect would be cache. But the fact that
 CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check
 this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.


Ok, verified that CONFIG_SYS_DCACHE_OFF is defined and also added
CONFIG_SYS_L2CACHE_OFF.  And it still fails.

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[U-Boot] [Resend PATCH V3] mx31: provide readable WEIM CS accessor

[Helmut Raiger]

setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.

Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2:
added sys_proto.h for mx31
introduced mxc_setup_weimcs(), which is SOC independent
not inlined any more (codesize increased by 60-90 bytes)
V3:
modified register access according to the coding style
---
 arch/arm/cpu/arm1136/mx31/generic.c |   11 
 arch/arm/include/asm/arch-mx31/imx-regs.h   |   35 ++-
 arch/arm/include/asm/arch-mx31/sys_proto.h  |   35 +++
 board/davedenx/qong/qong.c  |   86 ++
 board/freescale/mx31ads/mx31ads.c   |   14 -
 board/freescale/mx31pdk/mx31pdk.c   |   14 -
 board/imx31_phycore/imx31_phycore.c |   41 ++---
 board/logicpd/imx31_litekit/imx31_litekit.c |   28 +++--
 8 files changed, 187 insertions(+), 77 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h

diff --git a/arch/arm/cpu/arm1136/mx31/generic.c 
b/arch/arm/cpu/arm1136/mx31/generic.c
index e3a4d1b..32e8f23 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -25,6 +25,7 @@
 #include asm/arch/imx-regs.h
 #include asm/arch/clock.h
 #include asm/io.h
+#include asm/arch/sys_proto.h
 
 static u32 mx31_decode_pll(u32 reg, u32 infreq)
 {
@@ -126,6 +127,16 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
 
 }
 
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
+{
+   struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
+   struct mx31_weim_cscr *cscr = weim-cscr[cs];
+
+   writel(weimcs-upper, cscr-upper);
+   writel(weimcs-lower, cscr-lower);
+   writel(weimcs-additional, cscr-additional);
+}
+
 struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h 
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..02b471f 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -470,6 +470,18 @@ enum iomux_pins {
 #define CCM_RCSR_NF16B (1  31)
 #define CCM_RCSR_NFMS  (1  30)
 
+/* WEIM CS control registers */
+struct mx31_weim_cscr {
+   u32 upper;
+   u32 lower;
+   u32 additional;
+   u32 reserved;
+};
+
+struct mx31_weim {
+   struct mx31_weim_cscr cscr[6];
+};
+
 #endif
 
 #define __REG(x) (*((volatile u32 *)(x)))
@@ -534,10 +546,27 @@ enum iomux_pins {
 #define ESDCTL_BL(x)   ((x)  7)
 #define ESDCTL_PRCT(x) ((x)  0)
 
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+   cnc, wsc, ew, wws, edc) \
+   ((sp)  31 | (wp)  30 | (bcd)  28 | (psz)  22 | (pme)  21 |\
+(sync)  20 | (dol)  16 | (cnc)  14 | (wsc)  8 | (ew)  7 |\
+(wws)  4 | (edc)  0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+   csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+   ((oea)  28 | (oen)  24 | (ebwa)  20 | (ebwn)  16 |\
+(csa)  12 | (ebc)  11 | (dsz)  8 | (csn)  4 |\
+(psr)  3 | (cre)  2 | (wrap)  1 | (csen)  0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+   wwu, age, cnc2, fce) \
+   ((ebra)  28 | (ebrn)  24 | (rwa)  20 | (rwn)  16 |\
+(mum)  15 | (lah)  13 | (lbn)  10 | (lba)  8 |\
+(dww)  6 | (dct)  4 | (wwu)  3 |\
+(age)  2 | (cnc2)  1 | (fce)  0)
+
 #define WEIM_BASE  0xb8002000
-#define CSCR_U(x)  (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x)  (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x)  (WEIM_BASE + 8 + (x) * 0x10)
 
 #define IOMUXC_BASE0x43FAC000
 #define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h 
b/arch/arm/include/asm/arch-mx31/sys_proto.h
new file mode 100644
index 000..7600303
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  

Re: [U-Boot] [PATCH 0/3] fix: regression in SMDK6400

[Scott Wood]

On 09/29/2011 02:44 AM, Simon Schwarz wrote:
 This is a fix for a regression introduced by my patch 
 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8 to u-boot-ti/next
 
 The issue is described here:
 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873
 
 Simon Schwarz (3):
   nand: Remove static modifier from common functions
   nand: Add common functions to nand.h
   Fix regression in SMDK6400
 
  drivers/mtd/nand/nand_base.c |6 +++---
  drivers/mtd/nand/s3c64xx.c   |   26 --
  include/nand.h   |   10 +++---
  nand_spl/board/samsung/smdk6400/Makefile |9 ++---
  4 files changed, 16 insertions(+), 35 deletions(-)
 

Acked-by: Scott Wood scottw...@freescale.com

I guess this will be taken by the ti tree, since it fixes a problem
there?  I assume patch 3 won't apply to what's currently in mainline.

-Scott

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Re: [U-Boot] [2011.09-rc2] Fix for compile error with gcc3

[Marek Vasut]

On Thursday, September 29, 2011 02:13:28 PM rhabarber1848 wrote:
 Hi,
 
 compiling U-Boot 2011.09-rc2 with gcc-3.4.6 fails with this error:
 
 In file included from u-boot-2011.09-rc2/include/linux/compiler.h:40,
  from serial.c:29:
 u-boot-2011.09-rc2/include/linux/compiler-gcc.h:87:30:
 linux/compiler-gcc3.h: No such file or directory
 
 Adding compiler-gcc3.h from Linux kernel source to
 u-boot-2011.09-rc2/include/linux/ fixes this gcc3-only problem.

Hi,

why do you still use gcc3, do you have any special reason for that ? Can you 
update to gcc4?

Cheers
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Re: [U-Boot] [RFC PATCH] arm: provide a CONFIG flag for disabling relocation

[Andreas Bießmann]

Dear Albert,

Am 21.09.2011 um 14:31 schrieb Andreas Bießmann:

 Dear Albert,
 
 Am Mi 21 Sep 2011 14:03:09 CEST schrieb Albert ARIBAUD:
 Le 21/09/2011 13:20, Andreas Bießmann a écrit :
 Dear GROYER, Anthony,
 Dear Albert,
 
 Am Mi 21 Sep 2011 12:51:33 CEST schrieb Albert ARIBAUD:
 Le 21/09/2011 11:29, GROYER, Anthony a écrit :

snip

 No the code does register save before copy_loop and restore them right
 afterwards. Therefore even r8 could be used in the copy_loop cause it is
 preserved on the (newly created) stack. Have a look at a/a/c/pxa/start.S
 from line 241 (relocate_code) to 263 (end of copy_loop).
 But I guess the ldmia/stmia instructions could even use r3-r11, only
 r0-r2 needs to be preserved for loop counting.
 I wonder if this could improve the copy_loop ... will try to test it
 these days, if no one else can do it (Anthony?).

Simon, who has just finished his bachelor thesis did this test for me (thanks 
to this way ...).
It seems using more register for ldmia/stmia does _not_ improve the copy
time that much. Simon measured 10.8 ms for r9-r10 and 10.65 ms for r3-r10 
(unfortunately
I do not know which system he tested, but I guess devkit8000).

best regards

Andreas Bießmann


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Re: [U-Boot] [PATCH V3] part: show efi partition name when print out partition info

[Marek Vasut]

On Thursday, September 29, 2011 04:14:40 AM Lei Wen wrote:
 Hi Wolfgang,
 
 On Thu, Sep 8, 2011 at 12:11 PM, Lei Wen lei...@marvell.com wrote:
  Previous output:

[...]

 
 How about merge this patch included in 2011.09 release? :)
 
 Thanks,
 Lei

Hi Lei,

I can't speak for Wolfgang, but I think we're pretty late in rc2 now.
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Re: [U-Boot] Is it necessary that uboot(mips) should read status register($12) before setting it

[Marek Vasut]

On Wednesday, September 28, 2011 11:09:05 AM RdrouterUboot Router wrote:
 Hi all,
 
 MIPS Uboot works OK.Part of the code is as below.
 
 And my questions:
 1.read status register($12) and save value to $10,but don't use the value
 in $10 to do anything.
 Because uboot overwrite $10.
 
 2.Is it right?I can delete this code mfc0 $10,$12 from uboot.
 
 Thanks.
 
 Bruce
 

I don't see this code in uboot at all ... what version do you use ?
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[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava ferma...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Remy Bohmer li...@bohmer.net
Cc: Stefano Babic sba...@denx.de

Acked-by: Marek Vasut marek.va...@gmail.com
---
Changes for v2:
- introduce temporary variable in ulpi_write
- whitespace changes
Changes for v3:
 - add protection against multiple inclusion of efika.h
Changes for v4:
  - rename multiple inclusion protection macro in efika.h
Changes for v5:
   - fix unterminated #ifndef in efika.h
Changes for v6:
- add Acked-by
- no changes

 board/efikamx/Makefile  |3 +
 board/efikamx/efika.h   |   35 
 board/efikamx/efikamx-usb.c |  423 +++
 board/efikamx/efikamx.c |3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 480 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)lib$(BOARD).o
 
 COBJS  := efikamx.o
+ifdef  CONFIG_CMD_USB
+COBJS  += efikamx-usb.o
+endif
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 000..fec9ee0
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2011 Jana Rapava ferma...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BOARD_EFIKAMX_EFIKA_H__
+#define __BOARD_EFIKAMX_EFIKA_H__
+
+/*
+ * EHCI USB
+ */
+#ifdef CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
+
+#endif /* __BOARD_EFIKAMX_EFIKA_H__ */
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * Copyright (C) 2011 Jana Rapava ferma...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include usb.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/mx5x_pins.h
+#include asm/arch/iomux.h
+#include asm/gpio.h
+#include usb/ehci-fsl.h
+#include errno.h
+#include watchdog.h
+
+#include usb/ehci.h
+#include usb/ehci-core.h
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG (PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+   PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+   PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+   /*
+* Configure USBH1 pads
+*/
+   mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+   mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+   mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+   mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+  

Re: [U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Marek Vasut]

On Thursday, September 29, 2011 06:44:25 PM Jana Rapava wrote:
 This commit adds USB support for EfikaMX and EfikaSB.
 
 Signed-off-by: Jana Rapava ferma...@gmail.com
 Signed-off-by: Marek Vasut marek.va...@gmail.com
 Cc: Remy Bohmer li...@bohmer.net
 Cc: Stefano Babic sba...@denx.de
 
 Acked-by: Marek Vasut marek.va...@gmail.com


You're not supposed to resend with only ackedby added
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Re: [U-Boot] [U-Boot-Users] Wireless Ethernet

[Wolfgang Denk]

Dear Farooque, Fayaz,

Please do not top post / full quote.


In message e917df04a266c94facb0f2938f81fd751a75206...@echoexcc1.sats.corp you 
wrote:
 I understand that. But it would be very handy in diskless booting where the
  bootloader has to get the kernel from a server. 

Boot a minimal Linux kernel, and then use kexec.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [Resend PATCH V2 (forgot generic.c)] mx31: provide readable WEIM CS accessor

[Wolfgang Denk]

Dear Helmut Raiger,

In message 4e847a4e.5000...@hale.at you wrote:

 Do you really thing this is more readable:

Not only that, butthe compiler has much better chances for type
checking, too.

 It seems pretty clumsy to me, but for sure a matter of taste.

Then please go on and fix.

Best regards,

Wolfgang Denk

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Violets are blue
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Re: [U-Boot] omap3_beagle problem booting kernel on latest u-boot

[Aneesh V]

John,

On Thursday 29 September 2011 09:00 PM, John Rigby wrote:

On Thu, Sep 29, 2011 at 3:09 AM, Aneesh Vane...@ti.com  wrote:

John,

My primary suspect would be cache. But the fact that
CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check
this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.



Ok, verified that CONFIG_SYS_DCACHE_OFF is defined and also added
CONFIG_SYS_L2CACHE_OFF.  And it still fails.


Could you try something like below(also attached). I suspect issues
with cache invalidation before Linux.

---
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 1b4e808..6907ff6 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -248,13 +248,6 @@ static void v7_inval_tlb(void)
CP15ISB;
 }
-void invalidate_dcache_all(void)
-{
-   v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
-
-   v7_outer_cache_inval_all();
-}
-
 /*
  * Performs a clean  invalidation of the entire data cache
  * at all levels
@@ -306,9 +299,6 @@ void  flush_cache(unsigned long start, unsigned long 
size)

flush_dcache_range(start, start + size);
 }
 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
-void invalidate_dcache_all(void)
-{
-}

 void flush_dcache_all(void)
 {
@@ -356,6 +346,14 @@ void invalidate_icache_all(void)
 }
 #endif

+
+void invalidate_dcache_all(void)
+{
+   v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
+
+   omap3_invalidate_l2_cache_secure();
+}
+
 /*
  * Stub implementations for outer cache operations
  */
diff --git a/arch/arm/cpu/armv7/omap3/board.c 
b/arch/arm/cpu/armv7/omap3/board.c

index 0448bc9..7221f5a 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -360,9 +360,8 @@ static void omap3_setup_aux_cr(void)
omap3_update_aux_cr_secure(0xE0, 0);
 }

-#ifndef CONFIG_SYS_L2CACHE_OFF
 /* Invalidate the entire L2 cache from secure mode */
-static void omap3_invalidate_l2_cache_secure(void)
+void omap3_invalidate_l2_cache_secure(void)
 {
if (get_device_type() == GP_DEVICE) {
omap3_gp_romcode_call(OMAP3_GP_ROMCODE_API_L2_INVAL,
@@ -376,6 +375,7 @@ static void omap3_invalidate_l2_cache_secure(void)
}
 }

+#ifndef CONFIG_SYS_L2CACHE_OFF
 void v7_outer_cache_enable(void)
 {
/* Set L2EN */
--
1.7.1





--john


From 58dd1c5642e0cf936b38345cc1c8b5f250d3672b Mon Sep 17 00:00:00 2001
From: a0393566local a0393566local@ula0393566.(none)
Date: Thu, 29 Sep 2011 23:58:13 +0530
Subject: [PATCH] omap3: workaround for omap3 cache issue

Signed-off-by: None None
---
 arch/arm/cpu/armv7/cache_v7.c|   18 --
 arch/arm/cpu/armv7/omap3/board.c |4 ++--
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 1b4e808..6907ff6 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -248,13 +248,6 @@ static void v7_inval_tlb(void)
 	CP15ISB;
 }
 
-void invalidate_dcache_all(void)
-{
-	v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
-
-	v7_outer_cache_inval_all();
-}
-
 /*
  * Performs a clean  invalidation of the entire data cache
  * at all levels
@@ -306,9 +299,6 @@ void  flush_cache(unsigned long start, unsigned long size)
 	flush_dcache_range(start, start + size);
 }
 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
-void invalidate_dcache_all(void)
-{
-}
 
 void flush_dcache_all(void)
 {
@@ -356,6 +346,14 @@ void invalidate_icache_all(void)
 }
 #endif
 
+
+void invalidate_dcache_all(void)
+{
+	v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
+
+	omap3_invalidate_l2_cache_secure();
+}
+
 /*
  * Stub implementations for outer cache operations
  */
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 0448bc9..7221f5a 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -360,9 +360,8 @@ static void omap3_setup_aux_cr(void)
 	omap3_update_aux_cr_secure(0xE0, 0);
 }
 
-#ifndef CONFIG_SYS_L2CACHE_OFF
 /* Invalidate the entire L2 cache from secure mode */
-static void omap3_invalidate_l2_cache_secure(void)
+void omap3_invalidate_l2_cache_secure(void)
 {
 	if (get_device_type() == GP_DEVICE) {
 		omap3_gp_romcode_call(OMAP3_GP_ROMCODE_API_L2_INVAL,
@@ -376,6 +375,7 @@ static void omap3_invalidate_l2_cache_secure(void)
 	}
 }
 
+#ifndef CONFIG_SYS_L2CACHE_OFF
 void v7_outer_cache_enable(void)
 {
 	/* Set L2EN */
-- 
1.7.1

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[U-Boot] [STATUS] v2011.09 released, Merge Window is OPEN

[Wolfgang Denk]

Hello all,

U-Boot v2011.09 has been released and is available from the git
repository and the FTP server.

KNOWN ISSUES:

- Some ARM boards / drivers still have problems when caches are
  enabled and/or have therefore disabled caches in their config files.

- We still have not found a new network custodian yet.  Are there any
  volunteers?

The Merge Window for the next release (v2011.12) is open until
Sat Oct 15, 2011, 23:59:59 CEST = 16 days remaining. 

The next release v2011.12 is scheduled for December 12, 2011. 


A little statistics [1] - changes since release v2011.06:

Processed 645 csets from 120 developers
24 employers found
A total of 37905 lines added, 45961 removed (delta -8056)

Developers with the most changesets
Wolfgang Denk   76 (11.8%)
Mike Frysinger  47 (7.3%)
Aneesh V45 (7.0%)
Stefano Babic   32 (5.0%)
Andreas Bießmann   19 (2.9%)
Holger Brunck   16 (2.5%)
Kumar Gala  15 (2.3%)
Jason Kridner   13 (2.0%)
Matthias Weisser12 (1.9%)
Nagabhushana Netagunte  11 (1.7%)
...

Developers with the most changed lines
Wolfgang Denk 26425 (35.0%)
Aneesh V  7493 (9.9%)
Andreas Bießmann 3587 (4.7%)
Niklaus Giger 3112 (4.1%)
Simon Glass   1987 (2.6%)
Chander Kashyap   1876 (2.5%)
Mingkai Hu1698 (2.2%)
Andre Schwarz 1525 (2.0%)
Mike Frysinger1477 (2.0%)
Phil Edworthy 1369 (1.8%)
...

Developers with the most lines removed
Wolfgang Denk 25412 (55.3%)
Niklaus Giger 3112 (6.8%)
Andreas Bießmann 2797 (6.1%)
Albert ARIBAUD 813 (1.8%)
Tom Rini   722 (1.6%)
Graeme Russ636 (1.4%)
Jason Jin  532 (1.2%)
David Müller (ELSOFT AG)  409 (0.9%)
Linus Walleij  284 (0.6%)
Holger Brunck  247 (0.5%)
...

Developers with the most signoffs (total 295)
Sandeep Paulraj101 (34.2%)
Kumar Gala  39 (13.2%)
Joel A Fernandes21 (7.1%)
Valentin Longchamp  13 (4.4%)
Minkyu Kang 10 (3.4%)
Koen Kooi   10 (3.4%)
Reinhard Meyer   9 (3.1%)
Kim Phillips 8 (2.7%)
Scott Wood   7 (2.4%)
Nobuhiro Iwamatsu6 (2.0%)
...

Developers with the most reviews (total 2)
Vipin Kumar  2 (100.0%)

Developers with the most test credits (total 12)
Eric Benard  4 (33.3%)
Kumar Gala   1 (8.3%)
Minkyu Kang  1 (8.3%)
Thomas Chou  1 (8.3%)
Michal Simek 1 (8.3%)
Igor Grinberg1 (8.3%)
Heiko Schocher   1 (8.3%)
Fabio Estevam1 (8.3%)
Lei Wen  1 (8.3%)

Developers who gave the most tested-by credits (total 12)
Simon Glass  7 (58.3%)
Mike Frysinger   2 (16.7%)
Peter Korsgaard  1 (8.3%)
Marek Vasut  1 (8.3%)
John Rigby   1 (8.3%)

Developers with the most report credits (total 2)
Graeme Russ  1 (50.0%)
Ed Swarthout 1 (50.0%)

Developers who gave the most report credits (total 2)
Mike Frysinger   1 (50.0%)
Andy Fleming 1 (50.0%)

Top changeset contributors by employer
(Unknown)  198 (30.7%)
DENX Software Engineering  126 (19.5%)
Texas Instruments   99 (15.3%)
Freescale   80 (12.4%)
Analog Devices  47 (7.3%)
Keymile 18 (2.8%)
Matrix Vision   13 (2.0%)
Renesas Technology  10 (1.6%)
Atmel7 (1.1%)
Graeme Russ  7 (1.1%)
...

Top lines changed by employer
DENX Software Engineering 28311 (37.5%)
(Unknown) 21085 (27.9%)
Texas Instruments 9965 (13.2%)
Freescale 5729 (7.6%)
Renesas Technology2275 (3.0%)
Analog Devices1923 (2.5%)
Matrix Vision 1580 (2.1%)
Marvell947 (1.3%)
Graeme Russ943 (1.2%)
Keymile942 (1.2%)
...

Employers with the most signoffs (total 295)
Texas Instruments  128 (43.4%)
Freescale   65 (22.0%)
(Unknown)   49 (16.6%)
Keymile 17 (5.8%)
Samsung 14 (4.7%)
DENX Software Engineering6 (2.0%)
Nobuhiro Iwamatsu6 (2.0%)
Analog Devices   4 (1.4%)
Custom IDEAS 2 (0.7%)
Matrix Vision1 (0.3%)
...

Employers with the most hackers (total 125)
(Unknown)   62 (49.6%)
Freescale   16 (12.8%)
Texas Instruments   13 (10.4%)
DENX Software Engineering5 (4.0%)
Keymile  4 (3.2%)
Matrix Vision3 (2.4%)
Renesas Technology   3 (2.4%)
Samsung 

Re: [U-Boot] [STATUS] Ready for -rc2?

[Jason]

Albert, Prafulla,

On Wed, Sep 28, 2011 at 08:42:42AM +0200, Albert ARIBAUD wrote:
 Hi all,
 
 On 21/09/2011 23:34, Jason wrote:
 Albert, Prafulla,
 
 On Wed, Sep 21, 2011 at 11:00:42PM +0200, Wolfgang Denk wrote:
 In message20110920215703.gb7...@titan.lakedaemon.net  you wrote:
 
 On Tue, Sep 20, 2011 at 10:17:34PM +0200, Wolfgang Denk wrote:
 Hello everybody,
 
 are we ready for a -rc2 (so we don;t have to shift the release date
 any further), or are there any important fixes still missing?
 
 Not a bugfix, but since it had been originally submitted before the
 merge window, you had mentioned it might be possible [1] to get it in:
 
 [PATCH v8] dreamplug: initial board support.
 http://patchwork.ozlabs.org/patch/115270/
 
 The main reason for the lateness was hammering out how to use a
 MACH_TYPE_XXX that isn't in mainline Linux yet.  We didn't get it
 settled until 18 Sept. [2].  Otherwise, it would've been in sooner...
 
 Please?  :-)
 
 It is up to the respective custodians in the chain (Prafulla, Albert)
 to apply and send pull requests.
 
 Any hope of making 2011.09?
 
 thx,
 
 Jason.
 
 Pinging this up for my information: this does not appear to be in
 u-boot-marvell ATM.
 
 Prafulla, do you intend to pick this up? If not, then I can pick it
 up directly in u-boot-arm today (or Wolfgang can pick it up if he
 prefers).

Looks like it didn't make it.  So, I've rebased it against v2011.09 and
did a quick test.  There's really no significant changes.  Should I roll
a v9 for the rebase?  I'm inclined to think it's unnecessary...

thx,

Jason.
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[U-Boot] Pull request u-boot-blackfin.git (sf branch)

[Mike Frysinger]

The following changes since commit 1d5e7fb403257d62f0f2419cb83fdf6b0f02f215:

  Prepare v2011.09 (2011-09-29 21:11:15 +0200)

are available in the git repository at:
  git://www.denx.de/git/u-boot-blackfin.git sf

All have been posted to the list already.

Shaohui Xie (1):
  sf: eon: add support for EN25Q32B parts

Simon Glass (1):
  cmd_sf: add update subcommand to do smart SPI flash update

 common/cmd_sf.c   |   86 +++--
 drivers/mtd/spi/eon.c |8 
 2 files changed, 91 insertions(+), 3 deletions(-)
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[U-Boot] Pull request u-boot-blackfin.git (post branch)

[Mike Frysinger]

The following changes since commit 1d5e7fb403257d62f0f2419cb83fdf6b0f02f215:

  Prepare v2011.09 (2011-09-29 21:11:15 +0200)

are available in the git repository at:
  git://www.denx.de/git/u-boot-blackfin.git post

All have been posted to the list already.

Mike Frysinger (6):
  Blackfin: bf537-stamp: convert to gpio post hotkey
  Blackfin: post: drop custom test list
  Blackfin: bf537-stamp: drop uart/flash post tests
  Blackfin: post: generalize led/button tests with GPIOs
  Blackfin: bf537-stamp/bf548-ezkit: update POST flash block range
  Blackfin: uart: implement loop callback for post

 arch/blackfin/cpu/serial.c |   40 ++
 arch/blackfin/include/asm/config.h |   18 +++
 arch/blackfin/lib/Makefile |2 +-
 arch/blackfin/lib/post.c   |   85 
 arch/blackfin/lib/tests.c  |  250 
 board/bf537-stamp/Makefile |2 +-
 board/bf537-stamp/post-memory.c|   63 +-
 board/bf537-stamp/post.c   |  174 -
 include/configs/bf537-stamp.h  |   11 ++-
 include/configs/bf548-ezkit.h  |   10 +-
 include/configs/bfin_adi_common.h  |1 -
 post/tests.c   |2 +
 12 files changed, 165 insertions(+), 493 deletions(-)
 create mode 100644 arch/blackfin/lib/post.c
 delete mode 100644 arch/blackfin/lib/tests.c
 delete mode 100644 board/bf537-stamp/post.c
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Re: [U-Boot] [PATCH V4] console: Implement pre-console buffer

[Graeme Russ]

Hi Vadim,

On Wed, Sep 28, 2011 at 12:55 AM, Vadim Bendebury vben...@chromium.org wrote:
 On Tue, Sep 27, 2011 at 4:22 AM, Graeme Russ graeme.r...@gmail.com wrote:
 Hi Vadim,

 On 27/09/11 08:50, Vadim Bendebury wrote:
 On Wed, Aug 31, 2011 at 5:58 AM, Graeme Russ graeme.r...@gmail.com wrote:

[snip]

 Typically, the pre-console buffer would exist in the CPU cache (or similar
 non-(S)DRAM location)

 hi Graeme,

 Actually, there are many cases when u-boot starts running with memory
 fully initialized - ARM platforms is one case and coreboot/u-boot
 combination on x86 is another, but in general, yes, this buffer could
 be mapped to the internal CPU memory nailed to a fixed address.

And we have to satisfy the 'absolute majority', not the 'many' or the
'simply majority'. And I'm not sure it's always true that ARM platforms
have fully initialised SDRAM when U-Boot starts

 - all console output needs to be saved, not just until the moment when
 the console hardware is initialized.

 That could be a _huge_ amount of info and highly variable. Remember, the
 available space for a pre-console buffer could be tiny. If this is needed,
 then maybe look at forking stdio instead (one branch to console, one branch
 to you console buffer)


 Sure, if the room in the preallocated buffer is not enough, only the
 most recent data fitting in the space would be kept.

 I don't quite understand what you mean by forking stdio. I was

Search for CONFIG_CONSOLE_MUX - There appears to be support for sending
stdout to multiple output devices:

static void console_putc(int file, const char c)
{
int i;
struct stdio_dev *dev;

for (i = 0; i  cd_count[file]; i++) {
dev = console_devices[file][i];
if (dev-putc != NULL)
dev-putc(c);
}
}


I don't know have to register additional devices though

 thinking about introducing a separate driver for this memory stored
 console output, but sjg@ explained that while running from ROM u-boot
 supports only one console interface, so there is no way to have
 console stream sent to more than one driver before relocation.

Yes, while running from ROM your options are very limited, but if you have
a console buffer big enough to get you into RAM you can do lot more

 I could work on top of this patch and send another one once this one
 has been accepted. May I suggest an improvement though:

 is it really necessary to store the index in the global data
 structure. This requires editing all these .h files adding another
 unsighty  conditionally compiled field. Why not to store the index as
 the first word in the buffer allocated for this temp storage?

 I like this - but instead:

 struct pre_con_buff {
int idx;
char *buffer[CONFIG_PRE_CON_BUF_SZ];
 }

 struct pre_con_buff *pre_con_buffer;

 pre_con_buffer = (struct pre_con_buff *)CONFIG_PRE_CON_BUF_ADDR;


 yes, this is exactly what I meant,


Thinking more about this, I think I prefer the current patch for two
reasons:

 1) gd is guaranteed to be cleared - The memory holding the buffer is not
so you would need to initialise it somehow - That could mean splitting
the init for each arch
 2) pre_con_buffer is larger than CONFIG_PRE_CON_BUF_SZ. This will need to
be taken into consideration if the buffer is being crammed into a very
tightly crafted memory map - Forgetting to take this into account is
going to cause lots of pain. Now you could do:

struct pre_con_buff {
u16 idx;
char *buffer[CONFIG_PRE_CON_BUF_SZ - 2];
}

but the buffer size should really be a power two (so the compiler
optimises the divides into shifts) - So now we have to define
CONFIG_PRE_CON_BUF_SZ as say 258. It's starting to get messy


Regards,

Graeme
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Re: [U-Boot] [PATCH V4] console: Implement pre-console buffer

[Vadim Bendebury]

On Thu, Sep 29, 2011 at 4:15 PM, Graeme Russ graeme.r...@gmail.com wrote:
 Hi Vadim,

 On Wed, Sep 28, 2011 at 12:55 AM, Vadim Bendebury vben...@chromium.org 
 wrote:
 On Tue, Sep 27, 2011 at 4:22 AM, Graeme Russ graeme.r...@gmail.com wrote:
 Hi Vadim,

 On 27/09/11 08:50, Vadim Bendebury wrote:
 On Wed, Aug 31, 2011 at 5:58 AM, Graeme Russ graeme.r...@gmail.com wrote:

 [snip]

 Typically, the pre-console buffer would exist in the CPU cache (or similar
 non-(S)DRAM location)

 hi Graeme,

 Actually, there are many cases when u-boot starts running with memory
 fully initialized - ARM platforms is one case and coreboot/u-boot
 combination on x86 is another, but in general, yes, this buffer could
 be mapped to the internal CPU memory nailed to a fixed address.

 And we have to satisfy the 'absolute majority', not the 'many' or the
 'simply majority'. And I'm not sure it's always true that ARM platforms
 have fully initialised SDRAM when U-Boot starts

 - all console output needs to be saved, not just until the moment when
 the console hardware is initialized.

 That could be a _huge_ amount of info and highly variable. Remember, the
 available space for a pre-console buffer could be tiny. If this is needed,
 then maybe look at forking stdio instead (one branch to console, one branch
 to you console buffer)


 Sure, if the room in the preallocated buffer is not enough, only the
 most recent data fitting in the space would be kept.

 I don't quite understand what you mean by forking stdio. I was

 Search for CONFIG_CONSOLE_MUX - There appears to be support for sending
 stdout to multiple output devices:

 static void console_putc(int file, const char c)
 {
        int i;
        struct stdio_dev *dev;

        for (i = 0; i  cd_count[file]; i++) {
                dev = console_devices[file][i];
                if (dev-putc != NULL)
                dev-putc(c);
        }
 }


 I don't know have to register additional devices though


hi Graeme,

sure, I understand how the console mux works, i was not sure you were
referring to it.


 thinking about introducing a separate driver for this memory stored
 console output, but sjg@ explained that while running from ROM u-boot
 supports only one console interface, so there is no way to have
 console stream sent to more than one driver before relocation.

 Yes, while running from ROM your options are very limited, but if you have
 a console buffer big enough to get you into RAM you can do lot more

 I could work on top of this patch and send another one once this one
 has been accepted. May I suggest an improvement though:

 is it really necessary to store the index in the global data
 structure. This requires editing all these .h files adding another
 unsighty  conditionally compiled field. Why not to store the index as
 the first word in the buffer allocated for this temp storage?

 I like this - but instead:

 struct pre_con_buff {
        int idx;
        char *buffer[CONFIG_PRE_CON_BUF_SZ];
 }

 struct pre_con_buff *pre_con_buffer;

 pre_con_buffer = (struct pre_con_buff *)CONFIG_PRE_CON_BUF_ADDR;


 yes, this is exactly what I meant,


 Thinking more about this, I think I prefer the current patch for two
 reasons:

  1) gd is guaranteed to be cleared - The memory holding the buffer is not
    so you would need to initialise it somehow - That could mean splitting
    the init for each arch

doesn't each console type have an init routine? this would be a place
to initialize the header.

  2) pre_con_buffer is larger than CONFIG_PRE_CON_BUF_SZ. This will need to
    be taken into consideration if the buffer is being crammed into a very
    tightly crafted memory map - Forgetting to take this into account is
    going to cause lots of pain. Now you could do:

        struct pre_con_buff {
                u16 idx;
                char *buffer[CONFIG_PRE_CON_BUF_SZ - 2];
        }


I actually have just implemented this for coreboot.  It has its own
idiosyncrasies of course, the console buffer needs to be kept in three
different places and the contents copied three times on the way up.

I used this structure for the log buffer:

struct pre_con_buff {
         u16 size;
 u16 idx;
 char buffer[0]
};

Then, the initialization code  would just get the memory area address
and size, overlay this structure on top of it and set the size field
to

area size - sizeof(struct pre_con_buff)

yes, this results in a non power of two buffer size, but IMO the
convenience of keeping everything in one place and  (and not changing
multiple .h files) is worth the lost performance of not being able to
utilize power of two arithmetic optimization (which I think is
negligible in any case).

cheers,
/vb


    but the buffer size should really be a power two (so the compiler
    optimises the divides into shifts) - So now we have to define
    CONFIG_PRE_CON_BUF_SZ as say 258. It's starting to get messy


 Regards,

 Graeme

___

Re: [U-Boot] [PATCH V4] console: Implement pre-console buffer

[Graeme Russ]

Hi Vladim

On Fri, Sep 30, 2011 at 9:39 AM, Vadim Bendebury vben...@chromium.org wrote:
 On Thu, Sep 29, 2011 at 4:15 PM, Graeme Russ graeme.r...@gmail.com wrote:
 Hi Vadim,

 On Wed, Sep 28, 2011 at 12:55 AM, Vadim Bendebury vben...@chromium.org 
 wrote:
 On Tue, Sep 27, 2011 at 4:22 AM, Graeme Russ graeme.r...@gmail.com wrote:
 Hi Vadim,

 On 27/09/11 08:50, Vadim Bendebury wrote:
 On Wed, Aug 31, 2011 at 5:58 AM, Graeme Russ graeme.r...@gmail.com 
 wrote:


[snip]


  1) gd is guaranteed to be cleared - The memory holding the buffer is not
so you would need to initialise it somehow - That could mean splitting
the init for each arch

 doesn't each console type have an init routine? this would be a place
 to initialize the header.

The point is that with pre-console buffer, we have a storage location for
console output even before any console init routine is run - console is
available as soon as gd is cleared (which is _very_ early indeed)

  2) pre_con_buffer is larger than CONFIG_PRE_CON_BUF_SZ. This will need to
be taken into consideration if the buffer is being crammed into a very
tightly crafted memory map - Forgetting to take this into account is
going to cause lots of pain. Now you could do:

struct pre_con_buff {
u16 idx;
char *buffer[CONFIG_PRE_CON_BUF_SZ - 2];
}


 I actually have just implemented this for coreboot.  It has its own
 idiosyncrasies of course, the console buffer needs to be kept in three
 different places and the contents copied three times on the way up.

Ouch!

 I used this structure for the log buffer:

 struct pre_con_buff {
  u16 size;
 u16 idx;
 char buffer[0]
 };

 Then, the initialization code  would just get the memory area address
 and size, overlay this structure on top of it and set the size field
 to

 area size - sizeof(struct pre_con_buff)

For U-Boot, that sounds like a lot of stuffing around to save two bytes
in gd

 yes, this results in a non power of two buffer size, but IMO the
 convenience of keeping everything in one place and  (and not changing
 multiple .h files) is worth the lost performance of not being able to
 utilize power of two arithmetic optimization (which I think is
 negligible in any case).

In an embedded bootloader, every clock counts :) - You desktop junkies are
too used to long boot times ;)

but the buffer size should really be a power two (so the compiler
optimises the divides into shifts) - So now we have to define
CONFIG_PRE_CON_BUF_SZ as say 258. It's starting to get messy

And messier (at least in the context of U-Boot - YMMV)

Regards,

Graeme
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Re: [U-Boot] [PATCH V3] part: show efi partition name when print out partition info

[Lei Wen]

On Fri, Sep 30, 2011 at 12:16 AM, Marek Vasut marek.va...@gmail.com wrote:
 On Thursday, September 29, 2011 04:14:40 AM Lei Wen wrote:
 Hi Wolfgang,

 On Thu, Sep 8, 2011 at 12:11 PM, Lei Wen lei...@marvell.com wrote:
  Previous output:

 [...]


 How about merge this patch included in 2011.09 release? :)

 Thanks,
 Lei

 Hi Lei,

 I can't speak for Wolfgang, but I think we're pretty late in rc2 now.

Em... I understand...
How about queue this patch for the next v2011.12 release?
I just don't know how the patches is managed in uboot now. The
patchwork also cannot get enough info for this.

Thanks,
Lei
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[U-Boot] U-Boot: using nand write to flash an ubi image, ubi part fails

[Lars Michael]

--- On Thu, 29/9/11, Aaron Williams aaron.willi...@cavium.com wrote:
 From: Aaron Williams aaron.willi...@cavium.com
 Subject: Re: [U-Boot] U-Boot: using nand write to flash an ubi image, ubi 
 part fails
 To: u-boot@lists.denx.de
 Cc: Lars Michael lh_p...@yahoo.com
 Date: Thursday, 29 September, 2011, 4:11
 Hi Lars,
 
 Were you ever successful in getting UBI to work in U-Boot?
 I am in a similar 
 boat. I have UBI working beautifully in Linux (2.6.32.27)
 but so far I've had 
 no luck in U-Boot.
 
 -Aaron

Hi Aaron,

Good question, I am not able to write a ubi image (created by ubinize) 
and then attatch to it from U-Boot. I found that I need the free space
fixup patch. My U-Boot is rather old (2009.08) and I can not easily
apply that patch due to too many other changes. So for now, I must
write the image from Linux, do the fixup and then U-Boot is able to
attach. 

Regards,
- Lars 

 On Monday, July 18, 2011 02:29:08 AM Lars Michael wrote:
  Hello Ben,
  
  --- On Wed, 1/6/11, Ben Gardiner bengardi...@nanometrics.ca
 wrote:
Using mkfs.ubifs and ubinize I have created
 an image
   
   with 5 volumes. In Linux I could flash it using
 ubiformat
   /dev/mtd1 -f /root/ubi.img and attach it using
 ubiattach
   /dev/ubi_ctrl -m 1. It worked.
   
In production I would prefer to write the
 image from
   
   U-Boot. So in U-Boot I used nand erase then
 nand write
   to flash the image. Then I want to attach by ubi
 part
   command - but this fails: UBI error: ubi_init:
 UBI error:
   cannot initialize UBI, error -17
   
[...]
I realize that the U-Boot 'nand erase' does
 not
   
   preserve the erase counters. So what would be the
 correct
   way to erase and write in U-Boot? And why is the
 ubiformat
   not able to correct the problems?
   
   It's true that the ECs are not preserved. But
 it's also
   true that
   trailing pages of 0xff are not trimmed either.
 You
   definitely need to
   drop trailing 0xff pages when writing ubinized
 images
   containing UBIFS
   volumes. To do this you can use either the new
 'nand write'
   variant,
   .trimffs [1] which is currently patches that have
 been
   Acked. Or you
   can use the free-space-fixup feature which is
 available in
   the
   ubifs-2.6 tree and requires that you use a
 mkfs.ubifs built
   from the
   the mtd-utils tree.
  
  Ok, I have updated my mtd-utils and recompiled the
 mkfs.ubifs to get
  support for the free-space-fixup feature. Next I have
 pulled
  all ubi updates from the 2.6.29 backport tree which
 gave med 154 patches
  including the fixup.
  
  Now I can build the image, ubiformat, ubiattach and
 mount with success.
  After a reboot I can ubiattach and mount with
 success.
  
  Next step is to get it to work in U-Boot too.
  
  Thanks and regards,
  - Lars
  
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 -- 
 Aaron Williams aaron.willi...@cavium.com
  (408) 943-7198
 
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[U-Boot] U-Boot: using nand write to flash an ubi image, ubi part fails

[Lars Michael]

--- On Thu, 29/9/11, Matthew L. Creech mlcre...@gmail.com wrote:
 On Wed, Jun 1, 2011 at 3:57 AM, Lars
 Michael lh_p...@yahoo.com wrote:
  Using mkfs.ubifs and ubinize I have created an image
 with 5 volumes. In Linux I could flash it using ubiformat
 /dev/mtd1 -f /root/ubi.img and attach it using ubiattach
 /dev/ubi_ctrl -m 1. It worked.
 
  In production I would prefer to write the image from
 U-Boot. So in U-Boot I used nand erase then nand write
 to flash the image. Then I want to attach by ubi part
 command - but this fails: UBI error: ubi_init: UBI error:
 cannot initialize UBI, error -17
 
 
 Basically, this isn't a valid combination: nand write
 doesn't know
 anything about UBI, and a UBIFS image isn't suitable for
 flashing
 directly to NAND - it expects to sit on top of UBI.

Hi Matthew,

I agree, which is why I used ubinize to create a UBI image (with 5 UBIFS 
images) and then tried to write that image.

 There are 2 ways to get it working:
 
 1. Don't use nand write.  If U-Boot is built with
 UBI support, you
 can use ubi write to write a UBI image to flash.  I
 _think_ you can
 use this to overwrite an existing volume with a new image,
 preserving
 ECs (haven't tried it myself).  It certainly works
 fine to write a new
 image to blank flash.

 2. Use the ubinize tool to create an image suitable for
 writing
 directly to NAND.  This takes a UBIFS image and
 wraps it to turn it
 into a UBI image, which you can then use with nand
 write.

This is what I am doing (or plan to do). But to get it to work, I need
the space fixup feature for the nand write in U-Boot. I got that feature in 
Linux, so in Linux it works. Unfortunately it is not easy to patch 
that one in my 2009.08 U-Boot.

Thanks for your comments.

Regards
Lars
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