[U-Boot] [PATCH] USB: S5P: Add ehci support
This patch adds ehci driver support for s5p.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/include/asm/arch-exynos/ehci-s5p.h | 66
drivers/usb/host/Makefile |1 +
drivers/usb/host/ehci-s5p.c | 113 +++
3 files changed, 180 insertions(+), 0 deletions(-)
create mode 100755 arch/arm/include/asm/arch-exynos/ehci-s5p.h
create mode 100644 drivers/usb/host/ehci-s5p.c
diff --git a/arch/arm/include/asm/arch-exynos/ehci-s5p.h
b/arch/arm/include/asm/arch-exynos/ehci-s5p.h
new file mode 100755
index 000..68feb85
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/ehci-s5p.h
@@ -0,0 +1,66 @@
+/*
+ * SAMSUNG S5P USB HOST EHCI Controller
+ *
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * Vivek Gautam gautam.vi...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__
+#define __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__
+
+#define CLK_24MHZ 5
+
+#define HOST_CTRL0_PHYSWRSTALL (1 31)
+#define HOST_CTRL0_COMMONON_N (1 9)
+#define HOST_CTRL0_SIDDQ (1 6)
+#define HOST_CTRL0_FORCESLEEP (1 5)
+#define HOST_CTRL0_FORCESUSPEND(1 4)
+#define HOST_CTRL0_WORDINTERFACE (1 3)
+#define HOST_CTRL0_UTMISWRST (1 2)
+#define HOST_CTRL0_LINKSWRST (1 1)
+#define HOST_CTRL0_PHYSWRST(1 0)
+
+#define HOST_CTRL0_FSEL_MASK (7 16)
+
+#define EHCICTRL_ENAINCRXALIGN (1 29)
+#define EHCICTRL_ENAINCR4 (1 28)
+#define EHCICTRL_ENAINCR8 (1 27)
+#define EHCICTRL_ENAINCR16 (1 26)
+
+/* Register map for PHY control */
+struct s5p_usb_phy {
+ unsigned int usbphyctrl0;
+ unsigned int usbphytune0;
+ unsigned int reserved1[2];
+ unsigned int hsicphyctrl1;
+ unsigned int hsicphytune1;
+ unsigned int reserved2[2];
+ unsigned int hsicphyctrl2;
+ unsigned int hsicphytune2;
+ unsigned int reserved3[2];
+ unsigned int ehcictrl;
+ unsigned int ohcictrl;
+ unsigned int usbotgsys;
+ unsigned int reserved4;
+ unsigned int usbotgtune;
+};
+
+/* Switch on the VBUS power. */
+int board_usb_vbus_init(void);
+
+#endif /* __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__ */
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 0d4657e..59c3e57 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -50,6 +50,7 @@ COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
COBJS-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
COBJS-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
+COBJS-$(CONFIG_USB_EHCI_S5P) += ehci-s5p.o
COBJS-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
COBJS-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c
new file mode 100644
index 000..ac9f061
--- /dev/null
+++ b/drivers/usb/host/ehci-s5p.c
@@ -0,0 +1,113 @@
+/*
+ * SAMSUNG S5P USB HOST EHCI Controller
+ *
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * Vivek Gautam gautam.vi...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include usb.h
+#include asm/arch/cpu.h
+#include asm/arch/ehci-s5p.h
+#include ehci.h
+#include ehci-core.h
+
+/* Setup the EHCI host controller. */
+static void
[U-Boot] [PATCH 1/2] kirkwood: Rename dns325 to dnskw
So we can re-use DNS-325 configuration for the DNS-320 without things getting
confusing, rename all common parts from dns325 to dnskw, and use a config
option to configure DNS-325 specifics.
Signed-off-by: Jamie Lentin j...@lentin.co.uk
Cc: prafu...@marvell.com
Cc: albert.u.b...@aribaud.net
---
board/d-link/{dns325 = dnskw}/Makefile|2 +-
board/d-link/{dns325/dns325.c = dnskw/dnskw.c}| 10
board/d-link/{dns325/dns325.h = dnskw/dnskw.h}| 24
.../kwbimage.cfg = dnskw/kwbimage.dns325.cfg} |0
boards.cfg |2 +-
include/configs/{dns325.h = dnskw.h} | 11 ++---
6 files changed, 29 insertions(+), 20 deletions(-)
rename board/d-link/{dns325 = dnskw}/Makefile (98%)
rename board/d-link/{dns325/dns325.c = dnskw/dnskw.c} (94%)
rename board/d-link/{dns325/dns325.h = dnskw/dnskw.h} (73%)
rename board/d-link/{dns325/kwbimage.cfg = dnskw/kwbimage.dns325.cfg} (100%)
rename include/configs/{dns325.h = dnskw.h} (95%)
diff --git a/board/d-link/dns325/Makefile b/board/d-link/dnskw/Makefile
similarity index 98%
rename from board/d-link/dns325/Makefile
rename to board/d-link/dnskw/Makefile
index 35da21a..174127e 100644
--- a/board/d-link/dns325/Makefile
+++ b/board/d-link/dnskw/Makefile
@@ -30,7 +30,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
-COBJS := dns325.o
+COBJS := dnskw.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/d-link/dns325/dns325.c b/board/d-link/dnskw/dnskw.c
similarity index 94%
rename from board/d-link/dns325/dns325.c
rename to board/d-link/dnskw/dnskw.c
index 990d79f..28ce1ba 100644
--- a/board/d-link/dns325/dns325.c
+++ b/board/d-link/dnskw/dnskw.c
@@ -33,15 +33,15 @@
#include asm/arch/kirkwood.h
#include asm/arch/mpp.h
#include asm/arch/gpio.h
-#include dns325.h
+#include dnskw.h
DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
/* Gpio configuration */
- kw_config_gpio(DNS325_OE_VAL_LOW, DNS325_OE_VAL_HIGH,
- DNS325_OE_LOW, DNS325_OE_HIGH);
+ kw_config_gpio(DNSKW_OE_VAL_LOW, DNSKW_OE_VAL_HIGH,
+ DNSKW_OE_LOW, DNSKW_OE_HIGH);
/* Multi-Purpose Pins Functionality configuration */
u32 kwmpp_config[] = {
@@ -99,9 +99,9 @@ int board_early_init_f(void)
};
kirkwood_mpp_conf(kwmpp_config);
- kw_gpio_set_blink(DNS325_GPIO_LED_POWER , 1);
+ kw_gpio_set_blink(DNSKW_GPIO_LED_POWER , 1);
- kw_gpio_set_value(DNS325_GPIO_SATA0_EN , 1);
+ kw_gpio_set_value(DNSKW_GPIO_SATA0_EN , 1);
return 0;
}
diff --git a/board/d-link/dns325/dns325.h b/board/d-link/dnskw/dnskw.h
similarity index 73%
rename from board/d-link/dns325/dns325.h
rename to board/d-link/dnskw/dnskw.h
index 7859cea..4b11cb6 100644
--- a/board/d-link/dns325/dns325.h
+++ b/board/d-link/dnskw/dnskw.h
@@ -26,18 +26,22 @@
* MA 02110-1301 USA
*/
-#ifndef __DNS325_H
-#define __DNS325_H
+#ifndef __DNSKW_H
+#define __DNSKW_H
/* GPIO configuration */
-#define DNS325_OE_LOW 0x
-#define DNS325_OE_HIGH 0x00039604
-#define DNS325_OE_VAL_LOW 0x3800 /* disable leds */
-#define DNS325_OE_VAL_HIGH 0x0800 /* disable leds */
+#define DNSKW_OE_LOW 0x
+#define DNSKW_OE_HIGH 0x00039604
-#define DNS325_GPIO_LED_POWER 26
-#define DNS325_GPIO_SATA0_EN 39
-#define DNS325_GPIO_SATA1_EN 40
+#define DNSKW_GPIO_LED_POWER 26
+#define DNSKW_GPIO_SATA0_EN39
+#define DNSKW_GPIO_SATA1_EN40
+
+/* DNS-325 specific configuration */
+#ifdef CONFIG_BOARD_IS_DNS325
+#define DNSKW_OE_VAL_LOW 0x3800 /* disable leds */
+#define DNSKW_OE_VAL_HIGH 0x0800 /* disable leds */
+#endif /* CONFIG_BOARD_IS_DNS325 */
/* PHY related */
#define MV88E1116_MAC_CTRL_REG 21
@@ -45,4 +49,4 @@
#define MV88E1116_RGMII_TXTM_CTRL (1 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 5)
-#endif /* __DNS325_H */
+#endif /* __DNSKW_H */
diff --git a/board/d-link/dns325/kwbimage.cfg
b/board/d-link/dnskw/kwbimage.dns325.cfg
similarity index 100%
rename from board/d-link/dns325/kwbimage.cfg
rename to board/d-link/dnskw/kwbimage.dns325.cfg
diff --git a/boards.cfg b/boards.cfg
index 3cf75c3..f7ffa9b 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -136,7 +136,7 @@ hawkboardarm arm926ejs
da8xxevmdavinci
hawkboard_uart arm arm926ejs da8xxevm
davincidavinci hawkboard:UART_U_BOOT
enbw_cmc arm arm926ejs enbw_cmcenbw
davinci
calimain arm arm926ejs calimain
omicrondavinci
-dns325 arm arm926ejs -
[U-Boot] [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320
Extend dnskw to support the D-Link DNS-320 ShareCenter NAS also. For more information on this NAS, see:- http://jamie.lentin.co.uk/devices/dlink-dns320 http://dns323.kood.org/dns-320 http://sharecenter.dlink.com/products/DNS-320 Signed-off-by: Jamie Lentin j...@lentin.co.uk Cc: prafu...@marvell.com Cc: albert.u.b...@aribaud.net --- MAINTAINERS|4 + board/d-link/dnskw/dnskw.c |8 +- board/d-link/dnskw/dnskw.h |6 + board/d-link/dnskw/kwbimage.dns320.cfg | 207 boards.cfg |1 + include/configs/dnskw.h| 10 ++ 6 files changed, 232 insertions(+), 4 deletions(-) create mode 100644 board/d-link/dnskw/kwbimage.dns320.cfg diff --git a/MAINTAINERS b/MAINTAINERS index 708ded7..0da6384 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -669,6 +669,10 @@ Igor Grinberg grinb...@compulab.co.il cm-t35 ARM ARMV7 (OMAP3xx Soc) +Jamie Lentin j...@lentin.co.uk + + dns320 ARM926EJS (Kirkwood SoC) + Stefan Herbrechtsmeier ste...@code.herbrechtsmeier.net dns325 ARM926EJS (Kirkwood SoC) diff --git a/board/d-link/dnskw/dnskw.c b/board/d-link/dnskw/dnskw.c index 28ce1ba..0c0a754 100644 --- a/board/d-link/dnskw/dnskw.c +++ b/board/d-link/dnskw/dnskw.c @@ -58,8 +58,8 @@ int board_early_init_f(void) MPP10_UART0_TXD, MPP11_UART0_RXD, MPP12_SD_CLK, - MPP13_SD_CMD, - MPP14_SD_D0, + MPP13_UART1_TXD,/* Custom ...*/ + MPP14_UART1_RXD,/* ... controller */ MPP15_SD_D1, MPP16_SD_D2, MPP17_SD_D3, @@ -74,13 +74,13 @@ int board_early_init_f(void) MPP26_GPIO, /* power led */ MPP27_GPIO, /* sata0(right) error led */ MPP28_GPIO, /* sata1(left) error led */ - MPP29_GPIO, /* usb error led */ + MPP29_GPIO, /* usb error led (dns-325) */ MPP30_GPIO, MPP31_GPIO, MPP32_GPIO, MPP33_GPIO, MPP34_GPIO, /* power key */ - MPP35_GPIO, + MPP35_GPIO, /* usb error led (dns-320) */ MPP36_GPIO, MPP37_GPIO, MPP38_GPIO, diff --git a/board/d-link/dnskw/dnskw.h b/board/d-link/dnskw/dnskw.h index 4b11cb6..8886050 100644 --- a/board/d-link/dnskw/dnskw.h +++ b/board/d-link/dnskw/dnskw.h @@ -43,6 +43,12 @@ #define DNSKW_OE_VAL_HIGH 0x0800 /* disable leds */ #endif /* CONFIG_BOARD_IS_DNS325 */ +/* DNS-320 specific configuration */ +#ifdef CONFIG_BOARD_IS_DNS320 +#define DNSKW_OE_VAL_LOW 0x3800 /* disable leds */ +#define DNSKW_OE_VAL_HIGH 0x0808 /* disable leds */ +#endif /* CONFIG_BOARD_IS_DNS320 */ + /* PHY related */ #define MV88E1116_MAC_CTRL_REG 21 #define MV88E1116_PGADR_REG22 diff --git a/board/d-link/dnskw/kwbimage.dns320.cfg b/board/d-link/dnskw/kwbimage.dns320.cfg new file mode 100644 index 000..5fb4052 --- /dev/null +++ b/board/d-link/dnskw/kwbimage.dns320.cfg @@ -0,0 +1,207 @@ +# +# Copyright (C) 2012 +# Jamie Lentin j...@lentin.co.uk +# +# Based on dns325 support: +# Copyright (C) 2011 +# Stefan Herbrechtsmeier ste...@code.herbrechtsmeier.net +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=3 @ 200MHz +DATA 0xFFD01400 0x43000618 # DDR Configuration register +# bit13-0: 0x618 DDR2 clks refresh rate +# bit23-14: 0 required +# bit24:1 enable exit self refresh mode on DDR access +# bit25:1 required +#
[U-Boot] [PATCH 0/2] Generalise dns325 support and include dns320
As suggested by Prafulla Wadaskar, generalise dns325 support so that the dns320
can be supported by the same code.
NB: The patch uses git renaming to change dns325 to dnskw, so cannot be applied
with regular patch(1). Let me know if I shouldn't be submitting in this form.
Jamie Lentin (2):
kirkwood: Rename dns325 to dnskw
kirkwood: Add support for the D-Link DNS-320
MAINTAINERS|4 +
board/d-link/{dns325 = dnskw}/Makefile|2 +-
board/d-link/{dns325/dns325.c = dnskw/dnskw.c}| 18 +-
board/d-link/{dns325/dns325.h = dnskw/dnskw.h}| 30 ++-
board/d-link/dnskw/kwbimage.dns320.cfg | 207
.../kwbimage.cfg = dnskw/kwbimage.dns325.cfg} |0
boards.cfg |3 +-
include/configs/{dns325.h = dnskw.h} | 21 +-
8 files changed, 261 insertions(+), 24 deletions(-)
rename board/d-link/{dns325 = dnskw}/Makefile (98%)
rename board/d-link/{dns325/dns325.c = dnskw/dnskw.c} (90%)
rename board/d-link/{dns325/dns325.h = dnskw/dnskw.h} (65%)
create mode 100644 board/d-link/dnskw/kwbimage.dns320.cfg
rename board/d-link/{dns325/kwbimage.cfg = dnskw/kwbimage.dns325.cfg} (100%)
rename include/configs/{dns325.h = dnskw.h} (89%)
--
1.7.10
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[U-Boot] Question about U-Boot env variable substitution
Hi
I would be grateful for some help with environment variable substitution in
U-Boot please.
I have:
= printenv
[snip]
bootargs=console=ttyS0,115200 root=/dev/nfs rw
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off
nfsroot=${serverip}:${rootpath}
[snip]
bootcmd=run flashboot_nohv_mount_nfs
[snip]
flashboot_nohv_mount_nfs=setenv bdev /dev/ram; run bootargs; bootm $kern_flash
$rfs_flash $fdt_flash
[snip]
ipaddr etc. are also defined.
When I leave the system to autoboot I see:
[0.00] Kernel command line: console=ttyS0,115200 root=/dev/nfs rw
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off
nfsroot=${serverip}:${rootpath}
So environment variable substitution is not happening.
What am I doing wrong please?
Best regards
David
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Re: [U-Boot] [PATCH] doc: cleanup - move board READMEs into respective board directories
Dear Wolfgang, 2012/4/30 Wolfgang Denk w...@denx.de: Also drop a few files referring to no longer / not yet supported boards. Signed-off-by: Wolfgang Denk w...@denx.de Cc: Prafulla Wadaskar prafu...@marvell.com Cc: Stefan Roese s...@denx.de Cc: Kim Phillips kim.phill...@freescale.com Cc: Andy Fleming aflem...@gmail.com Cc: Jason Jin jason@freescale.com Cc: Stefano Babic sba...@denx.de Cc: Daniel Schwierzeck daniel.schwierz...@googlemail.com --- Acked-by: Daniel Schwierzeck daniel.schwierz...@googlemail.com -- Best regards, Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question about U-Boot env variable substitution
I have fixed this now.
Best regards
David
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
boun...@lists.denx.de] On Behalf Of David Aldrich
Sent: 01 May 2012 13:29
To: u-boot@lists.denx.de
Subject: [U-Boot] Question about U-Boot env variable substitution
Hi
I would be grateful for some help with environment variable substitution in
U-Boot please.
I have:
= printenv
[snip]
bootargs=console=ttyS0,115200 root=/dev/nfs rw
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:of
f nfsroot=${serverip}:${rootpath} [snip] bootcmd=run
flashboot_nohv_mount_nfs [snip] flashboot_nohv_mount_nfs=setenv
bdev /dev/ram; run bootargs; bootm $kern_flash $rfs_flash $fdt_flash [snip]
ipaddr etc. are also defined.
When I leave the system to autoboot I see:
[0.00] Kernel command line: console=ttyS0,115200 root=/dev/nfs rw
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:of
f nfsroot=${serverip}:${rootpath}
So environment variable substitution is not happening.
What am I doing wrong please?
Best regards
David
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Re: [U-Boot] Question about U-Boot env variable substitution
Dear David Aldrich,
In message 41302a7145ac054fa7a96cfd03835a0a114...@ex10mbx02.eu.nec.com you
wrote:
I would be grateful for some help with environment variable substitution in
U-Boot please.
Make sure to read the manual, and the FAQ section, especially
http://www.denx.de/wiki/view/DULG/CommandLineParsing
I have:
= printenv
[snip]
bootargs=console=ttyS0,115200 root=/dev/nfs rw
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off
nfsroot=${serverip}:${rootpath}
...
When I leave the system to autoboot I see:
[0.00] Kernel command line: console=ttyS0,115200 root=/dev/nfs rw
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off
nfsroot=${serverip}:${rootpath}
So environment variable substitution is not happening.
Why (and where) should it happen? The bootm command will just pass
the content of the bootargs variable as command line to the Linux
kernel - it will not modify it in any way.
If you want variable substitution to take place, you must invoce the
shell - one way or another. The recommended and usually most
efficient way is to (iteratively) build the kernel command line (i. e.
the bootargs variable) dynamically; in this process you also get the
variables substituted as you want it.
See the examples in the manual, or many of the built-in default
environment settings, for example in include/configs/amcc-common.h
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Why is an average signature file longer than an average Perl script??
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[U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.
V3 returns immediately from setup_sata() if enable_sata_clock()
returns an error.
V4 removes extra #include and addresses a style issue as discussed
on the ML.
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 31 +
include/configs/mx6qsabrelite.h | 13 ++
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 1d09a72..cdd2f15 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,7 @@
#include asm/arch/imx-regs.h
#include asm/arch/mx6x_pins.h
#include asm/arch/iomux-v3.h
+#include asm/arch/clock.h
#include asm/errno.h
#include asm/gpio.h
#include mmc.h
@@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
return 0;
}
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+ struct iomuxc_base_regs *const iomuxc_regs
+ = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+ int ret = enable_sata_clock();
+ if (ret)
+ return ret;
+
+ clrsetbits_le32(iomuxc_regs-gpr[13],
+ IOMUXC_GPR13_SATA_MASK,
+ IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+ |IOMUXC_GPR13_SATA_PHY_7_SATA2M
+ |IOMUXC_GPR13_SATA_SPEED_3G
+ |(3IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+ |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+ |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+ |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+ |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+ |IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+ return 0 ;
+}
+#endif
+
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -283,6 +310,10 @@ int board_init(void)
setup_spi();
#endif
+#ifdef CONFIG_CMD_SATA
+ setup_sata();
+#endif
+
return 0;
}
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index f52c3c7..1d92dd0 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -71,6 +71,19 @@
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_DWC_AHSATA_PORT_ID 0
+#define CONFIG_DWC_AHSATA_BASE_ADDRSATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
--
1.7.9
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Re: [U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings
Dear Eric Nelson,
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.
V3 returns immediately from setup_sata() if enable_sata_clock()
returns an error.
V4 removes extra #include and addresses a style issue as discussed
on the ML.
It's still there ;-)
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 31
+ include/configs/mx6qsabrelite.h |
13 ++
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 1d09a72..cdd2f15
100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,7 @@
#include asm/arch/imx-regs.h
#include asm/arch/mx6x_pins.h
#include asm/arch/iomux-v3.h
+#include asm/arch/clock.h
#include asm/errno.h
#include asm/gpio.h
#include mmc.h
@@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
return 0;
}
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+ struct iomuxc_base_regs *const iomuxc_regs
+ = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+ int ret = enable_sata_clock();
+ if (ret)
+ return ret;
+
+ clrsetbits_le32(iomuxc_regs-gpr[13],
+ IOMUXC_GPR13_SATA_MASK,
+ IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+ |IOMUXC_GPR13_SATA_PHY_7_SATA2M
+ |IOMUXC_GPR13_SATA_SPEED_3G
+ |(3IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+ |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+ |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+ |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+ |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+ |IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+ return 0 ; here :-)
+}
+#endif
+
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -283,6 +310,10 @@ int board_init(void)
setup_spi();
#endif
+#ifdef CONFIG_CMD_SATA
+ setup_sata();
+#endif
+
return 0;
}
diff --git a/include/configs/mx6qsabrelite.h
b/include/configs/mx6qsabrelite.h index f52c3c7..1d92dd0 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -71,6 +71,19 @@
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_DWC_AHSATA_PORT_ID0
+#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
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Re: [U-Boot] [PATCH V4 5/8] i.MX25: usb: Set PORTSCx register
Dear Stefano Babic, On 19/04/2012 10:55, Timo Ketola wrote: The USB controller in i.MX25 has a PORTSCx registers which should be set. In this regard it is similar to the controller in i.MX31. As this file is compiled only with i.MX25 and -31, #ifdef check can be removed. Signed-off-by: Timo Ketola t...@exertus.fi --- Acked-by: Stefano Babic sba...@denx.de Stefano, will you apply these two USB patches please? Best regards, Stefano Babic Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings
On 05/01/2012 12:25 PM, Marek Vasut wrote: Dear Eric Nelson, Signed-off-by: Eric Nelsoneric.nel...@boundarydevices.com --- V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand. V3 returns immediately from setup_sata() if enable_sata_clock() returns an error. V4 removes extra #include and addresses a style issue as discussed on the ML. It's still there ;-) snip + |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V + |IOMUXC_GPR13_SATA_PHY_1_SLOW); + + return 0 ; here :-) My eyes are clearly not as finely tuned as yours... thought to self What are the odd that I could tweak checkpatch.pl without introducing another style issue? /thought to self V5 forthcoming... ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] usb:gadget:composite: Support for composite gadget framework
Dear Lukasz Majewski,
This patch set provides support for composite gadget framework.
Files from Linux kernel (2.6.36) - namely composite.{c|h} have been
ported.
Some extra compatibility code has been added as well.
Lukasz Majewski (4):
usb:gadget:composite Composite framework - files from Linux kernel
usb:gadget:composite: Linux composite.{h/c} code adjustement for
u-boot
usb:gadget: Wrapper for extracting usb_gadget from linux's device
usb:gadget: Extend device struct to device_data pointer
I just pushed new u-boot-usb (rebased on current u-boot head), can you please
rebase your patches ?
Is it correct to assume I can drop the following patches as we'll be seeing new
revision?
[U-Boot,6/6] usb:g_dnl: Support for g_dnl download usb gadget for TRATS board
2012-04-12 Łukasz Majewski marex Under Review
[U-Boot,5/6] usb:g_dnl: Support for g_dnl download usb gadget for GONI board
2012-04-12 Łukasz Majewski marex Under Review
[U-Boot,4/6] usb:command: Support for USB Download command 2012-04-12
Łukasz Majewski marex Under Review
[U-Boot,3/6] usb:g_dnl:thor: THOR protocol back end support for f_usbd_thor
function2012-04-12 Łukasz Majewski marex Under Review
[U-Boot,2/6] usb:g_dnl:f_usbd_thor: USB Download function to support THOR
protocol2012-04-12 Łukasz Majewski marex Under Review
[U-Boot,1/6] usb:composite:g_dnl: Composite gadget (g_dnl) for USB downloading
functions 2012-04-12 Łukasz Majewski marex Under Review
[U-Boot] usb:udc:samsung Add functions for storing private gadget data in UDC
driver 2012-04-12 Łukasz Majewski marex Under Review
[U-Boot,4/4] usb:gadget: Extend device struct to device_data pointer
2012-04-12 Łukasz Majewski marex Under Review
[U-Boot,3/4] usb:gadget: Wrapper for extracting usb_gadget from linux's device
2012-04-12 Łukasz Majewski marex Under Review
[U-Boot,2/4] usb:gadget:composite: Linux composite.{h/c} code adjustement for u-
boot2012-04-12 Łukasz Majewski marex Under Review
[U-Boot,1/4] usb:gadget:composite Composite framework - files from Linux kernel
2012-04-12 Łukasz Majewski marex Under Review
[U-Boot] usb:udc: Remove duplicated USB definitions from
include/linux/usb/ch9.h
file2012-04-12 Łukasz Majewski marex Under Review
drivers/usb/gadget/composite.c | 1253
include/linux/usb/composite.h |
417 +
include/linux/usb/gadget.h |6 +
3 files changed, 1676 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/gadget/composite.c
create mode 100644 include/linux/usb/composite.h
Best regards,
Marek Vasut
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[U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.
V3 returns immediately from setup_sata() if enable_sata_clock()
returns an error.
V4 removes extra #include and addresses a style issue as discussed
on the ML.
V5 addresses another (hopefully last) style issue.
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 31 +
include/configs/mx6qsabrelite.h | 13 ++
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 1d09a72..cdd2f15 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,7 @@
#include asm/arch/imx-regs.h
#include asm/arch/mx6x_pins.h
#include asm/arch/iomux-v3.h
+#include asm/arch/clock.h
#include asm/errno.h
#include asm/gpio.h
#include mmc.h
@@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
return 0;
}
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+ struct iomuxc_base_regs *const iomuxc_regs
+ = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+ int ret = enable_sata_clock();
+ if (ret)
+ return ret;
+
+ clrsetbits_le32(iomuxc_regs-gpr[13],
+ IOMUXC_GPR13_SATA_MASK,
+ IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+ |IOMUXC_GPR13_SATA_PHY_7_SATA2M
+ |IOMUXC_GPR13_SATA_SPEED_3G
+ |(3IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+ |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+ |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+ |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+ |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+ |IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+ return 0;
+}
+#endif
+
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -283,6 +310,10 @@ int board_init(void)
setup_spi();
#endif
+#ifdef CONFIG_CMD_SATA
+ setup_sata();
+#endif
+
return 0;
}
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index f52c3c7..1d92dd0 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -71,6 +71,19 @@
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_DWC_AHSATA_PORT_ID 0
+#define CONFIG_DWC_AHSATA_BASE_ADDRSATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
--
1.7.9
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Re: [U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings
Dear Eric Nelson,
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.
V3 returns immediately from setup_sata() if enable_sata_clock()
returns an error.
V4 removes extra #include and addresses a style issue as discussed
on the ML.
V5 addresses another (hopefully last) style issue.
Sorry for torturing you so much :-)
Acked-by: Marek Vasut ma...@denx.de
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 31
+ include/configs/mx6qsabrelite.h |
13 ++
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 1d09a72..cdd2f15
100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,7 @@
#include asm/arch/imx-regs.h
#include asm/arch/mx6x_pins.h
#include asm/arch/iomux-v3.h
+#include asm/arch/clock.h
#include asm/errno.h
#include asm/gpio.h
#include mmc.h
@@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
return 0;
}
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+ struct iomuxc_base_regs *const iomuxc_regs
+ = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+ int ret = enable_sata_clock();
+ if (ret)
+ return ret;
+
+ clrsetbits_le32(iomuxc_regs-gpr[13],
+ IOMUXC_GPR13_SATA_MASK,
+ IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+ |IOMUXC_GPR13_SATA_PHY_7_SATA2M
+ |IOMUXC_GPR13_SATA_SPEED_3G
+ |(3IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+ |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+ |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+ |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+ |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+ |IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+ return 0;
+}
+#endif
+
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -283,6 +310,10 @@ int board_init(void)
setup_spi();
#endif
+#ifdef CONFIG_CMD_SATA
+ setup_sata();
+#endif
+
return 0;
}
diff --git a/include/configs/mx6qsabrelite.h
b/include/configs/mx6qsabrelite.h index f52c3c7..1d92dd0 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -71,6 +71,19 @@
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_DWC_AHSATA_PORT_ID0
+#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
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Re: [U-Boot] [U-boot] Help: Tegra250 board(harmony) Ethernet driver
On Tue, Apr 24, 2012 at 12:53:15AM -0700, YONGKI KIM wrote: Hello everyone. I am trying to port the Ethernet driver to *tegra250 development board(harmony board)* but I have the problem. Harmony has a SMSC LAN9514 integrated USB hub/ethernet controller. There's a driver for it in drivers/usb/eth/smsc95xx.c -Allen -- nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings
On 05/01/2012 01:09 PM, Marek Vasut wrote: Dear Eric Nelson, Signed-off-by: Eric Nelsoneric.nel...@boundarydevices.com --- V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand. V3 returns immediately from setup_sata() if enable_sata_clock() returns an error. V4 removes extra #include and addresses a style issue as discussed on the ML. V5 addresses another (hopefully last) style issue. Sorry for torturing you so much :-) No worries. I think I have a high threshold... Acked-by: Marek Vasutma...@denx.de Thanks for the ack. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] GPIO: Extend the cmd_gpio API by gpio_{from, to}_string()
The gpio_from_string() call shall parse the incoming GPIO name taken
from the command line and return the GPIO number used within U-Boot or
return -1 on error.
The gpio_to_string() on the other hand allows nicer reporting of GPIO
name in the output of cmd_gpio.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Mike Frysinger vap...@gentoo.org
Cc: Stefano Babic sba...@denx.de
---
common/cmd_gpio.c | 27 +++
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/common/cmd_gpio.c b/common/cmd_gpio.c
index 47eee89..12870ef 100644
--- a/common/cmd_gpio.c
+++ b/common/cmd_gpio.c
@@ -15,6 +15,22 @@
#define name_to_gpio(name) simple_strtoul(name, NULL, 10)
#endif
+int __gpio_from_string(const char *name)
+{
+ return name_to_gpio(name);
+}
+
+int gpio_from_string(const char *name)
+ __attribute__((weak, alias(__gpio_from_string)));
+
+int __gpio_to_string(int gpio, char *buf, int buflen)
+{
+ return 0;
+}
+
+int gpio_to_string(int gpio, char *buf, int buflen)
+ __attribute__((weak, alias(__gpio_from_string)));
+
enum gpio_cmd {
GPIO_INPUT,
GPIO_SET,
@@ -27,7 +43,9 @@ static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[])
int gpio;
enum gpio_cmd sub_cmd;
ulong value;
- const char *str_cmd, *str_gpio;
+ const char *str_cmd;
+ char str_gpio[16] = { 0 };
+ int ret;
#ifdef gpio_status
if (argc == 2 !strcmp(argv[1], status)) {
@@ -40,7 +58,6 @@ static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[])
show_usage:
return CMD_RET_USAGE;
str_cmd = argv[1];
- str_gpio = argv[2];
/* parse the behavior */
switch (*str_cmd) {
@@ -52,7 +69,7 @@ static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[])
}
/* turn the gpio name into a gpio number */
- gpio = name_to_gpio(str_gpio);
+ gpio = gpio_from_string(argv[2]);
if (gpio 0)
goto show_usage;
@@ -75,8 +92,10 @@ static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
}
gpio_direction_output(gpio, value);
}
+
+ ret = gpio_to_string(gpio, str_gpio, sizeof(str_gpio));
printf(gpio: pin %s (gpio %i) value is %lu\n,
- str_gpio, gpio, value);
+ ret ? str_gpio : argv[2], gpio, value);
gpio_free(gpio);
--
1.7.10
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[U-Boot] [PATCH 2/2] GPIO: Implement gpio_{from, to}_string on M28EVK
Implement the above two functions. The format of input parameters is
x_y, where x is the bank number and y is the pin number in that bank.
Example:
= gpio i 3_13
gpio: pin 3_13 (gpio 107) value is 0
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Mike Frysinger vap...@gentoo.org
Cc: Stefano Babic sba...@denx.de
---
drivers/gpio/mxs_gpio.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 38dbc81..988b105 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -130,3 +130,35 @@ int gpio_free(unsigned gpio)
{
return 0;
}
+
+int gpio_from_string(const char *cname)
+{
+ char *name = (char *)cname;
+ char *bank, *pin, *endp;
+ int b, p;
+
+ bank = strtok(name, _);
+ if (!bank)
+ return -1;
+
+ pin = strtok(NULL, _);
+ if (!pin)
+ return -1;
+
+ b = simple_strtol(bank, endp, 10);
+ if (*endp != '\0')
+ return -1;
+
+ p = simple_strtol(pin, endp, 10);
+ if (*endp != '\0')
+ return -1;
+
+ return MXS_IOMUX_PAD(b, p, 0, 0, 0, 0);
+}
+
+int gpio_to_string(int gpio, char *buf, int buflen)
+{
+ int ret;
+ ret = snprintf(buf, buflen, %i_%i, PAD_BANK(gpio), PAD_PIN(gpio));
+ return ret buflen;
+}
--
1.7.10
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[U-Boot] [PATCH 00/13] M28EVK/i.MX28 improvements
These are some improvements that were stuck in my tree for a while, time to expunge them, please consider applying. Tested on: * DENX M28EVK v2.0 * DENX M28EVK v1.1 * Mysterious board #1 ... * Unnamed board #2 ... Marek Vasut (13): FEC: Abstract out register setup M28EVK: Implement support for new board V2.0 M28EVK: Add SD update command i.MX28: Improve passing of data from SPL to U-Boot i.MX28: Implement boot pads sampling and reporting i.MX28: Add LCDIF register definitions i.MX28: Shut down the LCD controller before reset i.MX28: Add LRADC register definitions i.MX28: Add LRADC init to i.MX28 SPL i.MX28: Reorder battery status functions in SPL i.MX28: Add battery boot components to SPL i.MX28: Check if WP detection is implemented at all i.MX28: Avoid redefining serial_put[cs]() arch/arm/cpu/arm926ejs/mx28/Makefile |2 +- arch/arm/cpu/arm926ejs/mx28/mx28.c | 29 +- arch/arm/cpu/arm926ejs/mx28/mx28_init.h |4 + arch/arm/cpu/arm926ejs/mx28/spl_boot.c | 57 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c | 86 ++ arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 10 +- arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 224 ++- arch/arm/include/asm/arch-mx28/imx-regs.h|2 + arch/arm/include/asm/arch-mx28/regs-lcdif.h | 212 ++ arch/arm/include/asm/arch-mx28/regs-lradc.h | 400 ++ arch/arm/include/asm/arch-mx28/sys_proto.h | 30 ++ board/denx/m28evk/m28evk.c | 20 +- board/denx/m28evk/spl_boot.c |8 +- drivers/mmc/mxsmmc.c |3 +- drivers/net/fec_mxc.c| 84 +++--- include/configs/m28evk.h | 10 + include/configs/mx28evk.h|1 + 17 files changed, 1043 insertions(+), 139 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c create mode 100644 arch/arm/include/asm/arch-mx28/regs-lcdif.h create mode 100644 arch/arm/include/asm/arch-mx28/regs-lradc.h Cc: Detlev Zundel d...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sbabic@denxde Cc: Wolfgang Denk w...@denx.de -- 1.7.10 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/13] M28EVK: Add SD update command
Add update_sd_firmware command to easily reload the SD card of
m28evk kit. This comes handy when the board boots from SD card.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sbabic@denxde
Cc: Wolfgang Denk w...@denx.de
---
include/configs/m28evk.h |9 +
1 file changed, 9 insertions(+)
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 012381a..c40d2a8 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -286,6 +286,7 @@
#defineCONFIG_EXTRA_ENV_SETTINGS
\
update_nand_full_filename=u-boot.nand\0 \
update_nand_firmware_filename=u-boot.sb\0 \
+ update_sd_firmware_filename=u-boot.sd\0 \
update_nand_firmware_maxsz=0x10\0 \
update_nand_stride=0x40\0 /* MX28 datasheet ch. 12.12 */ \
update_nand_count=0x4\0 /* MX28 datasheet ch. 12.12 */ \
@@ -312,6 +313,14 @@
nand erase ${fcb_sz} ${fw_sz} ; \
nand write ${loadaddr} ${fcb_sz} ${filesize} ;\
nand write ${loadaddr} ${fw_off} ${filesize} ;\
+ fi\0 \
+ update_sd_firmware= /* Update the SD firmware partition */ \
+ if mmc rescan ; then \
+ if tftp ${update_sd_firmware_filename} ; then \
+ setexpr fw_sz ${filesize} / 0x200 ; /* SD block size */ \
+ setexpr fw_sz ${fw_sz} + 1 ; \
+ mmc write ${loadaddr} 0x800 ${fw_sz} ;\
+ fi ; \
fi\0
#endif /* __M28_H__ */
--
1.7.10
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[U-Boot] [PATCH 02/13] M28EVK: Implement support for new board V2.0
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sbabic@denxde
Cc: Wolfgang Denk w...@denx.de
---
board/denx/m28evk/m28evk.c | 20 +++-
board/denx/m28evk/spl_boot.c |8 ++--
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c
index 53df476..3d28ea8 100644
--- a/board/denx/m28evk/m28evk.c
+++ b/board/denx/m28evk/m28evk.c
@@ -90,6 +90,8 @@ int board_mmc_init(bd_t *bis)
{
/* Configure WP as input. */
gpio_direction_input(MX28_PAD_AUART2_CTS__GPIO_3_10);
+ /* Turn on the power to the card. */
+ gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
return mxsmmc_initialize(bis, 0, m28_mmc_wp);
}
@@ -103,10 +105,18 @@ int board_mmc_init(bd_t *bis)
int fecmxc_mii_postcall(int phy)
{
+#ifdefined(CONFIG_DENX_M28_V11) || defined(CONFIG_DENX_M28_V10)
+ /* KZ8031 PHY on old boards. */
+ const uint32_t freq = 0x0080;
+#else
+ /* KZ8021 PHY on new boards. */
+ const uint32_t freq = 0x;
+#endif
+
miiphy_write(FEC1, phy, MII_BMCR, 0x9000);
miiphy_write(FEC1, phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202);
if (phy == 3)
- miiphy_write(FEC1, 3, MII_PHY_CTRL2, 0x8180);
+ miiphy_write(FEC1, 3, MII_PHY_CTRL2, 0x8100 | freq);
return 0;
}
@@ -123,6 +133,14 @@ int board_eth_init(bd_t *bis)
CLKCTRL_ENET_TIME_SEL_MASK | CLKCTRL_ENET_CLK_OUT_EN,
CLKCTRL_ENET_TIME_SEL_RMII_CLK);
+#if !defined(CONFIG_DENX_M28_V11) !defined(CONFIG_DENX_M28_V10)
+ /* Reset the new PHY */
+ gpio_direction_output(MX28_PAD_AUART2_RTS__GPIO_3_11, 0);
+ udelay(1);
+ gpio_set_value(MX28_PAD_AUART2_RTS__GPIO_3_11, 1);
+ udelay(1);
+#endif
+
ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
if (ret) {
printf(FEC MXS: Unable to init FEC0\n);
diff --git a/board/denx/m28evk/spl_boot.c b/board/denx/m28evk/spl_boot.c
index a04fe18..7a12592 100644
--- a/board/denx/m28evk/spl_boot.c
+++ b/board/denx/m28evk/spl_boot.c
@@ -109,8 +109,9 @@ const iomux_cfg_t iomux_setup[] = {
(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
MX28_PAD_SSP0_SCK__SSP0_SCK |
(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
- MX28_PAD_PWM3__GPIO_3_28 | MUX_CONFIG_SSP0, /* Power .. FIXME */
- MX28_PAD_AUART2_CTS__GPIO_3_10, /* WP ... FIXME */
+ MX28_PAD_PWM3__GPIO_3_28 | MUX_CONFIG_SSP0 |
+ (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), /* Power */
+ MX28_PAD_AUART2_CTS__GPIO_3_10, /* WP */
/* GPMI NAND */
MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI,
@@ -147,6 +148,9 @@ const iomux_cfg_t iomux_setup[] = {
MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
+#if !defined(CONFIG_DENX_M28_V11) !defined(CONFIG_DENX_M28_V10)
+ MX28_PAD_AUART2_RTS__GPIO_3_11, /* PHY reset */
+#endif
/* I2C */
MX28_PAD_I2C0_SCL__I2C0_SCL,
--
1.7.10
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[U-Boot] [PATCH 01/13] FEC: Abstract out register setup
Abstract out common register setup. This also configured r_cntrl
to correct value at registration time.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sbabic@denxde
Cc: Wolfgang Denk w...@denx.de
---
drivers/net/fec_mxc.c | 84 ++---
1 file changed, 38 insertions(+), 46 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index d8db9f0..04750c5 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -398,6 +398,42 @@ static void fec_eth_phy_config(struct eth_device *dev)
#endif
}
+/*
+ * Do initial configuration of the FEC registers
+ */
+static void fec_reg_setup(struct fec_priv *fec)
+{
+ uint32_t rcntrl;
+
+ /*
+* Set interrupt mask register
+*/
+ writel(0x, fec-eth-imask);
+
+ /*
+* Clear FEC-Lite interrupt event register(IEVENT)
+*/
+ writel(0x, fec-eth-ievent);
+
+
+ /*
+* Set FEC-Lite receive control register(R_CNTRL):
+*/
+
+ /* Start with frame length = 1518, common for all modes. */
+ rcntrl = PKTSIZE FEC_RCNTRL_MAX_FL_SHIFT;
+ if (fec-xcv_type == SEVENWIRE)
+ rcntrl |= FEC_RCNTRL_FCE;
+ else if (fec-xcv_type == RGMII)
+ rcntrl |= FEC_RCNTRL_RGMII;
+ else if (fec-xcv_type == RMII)
+ rcntrl |= FEC_RCNTRL_RMII;
+ else/* MII mode */
+ rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE;
+
+ writel(rcntrl, fec-eth-r_cntrl);
+}
+
/**
* Start the FEC engine
* @param[in] dev Our device to handle
@@ -512,7 +548,6 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
{
struct fec_priv *fec = (struct fec_priv *)dev-priv;
uint32_t mib_ptr = (uint32_t)fec-eth-rmon_t_drop;
- uint32_t rcntrl;
uint32_t size;
int i, ret;
@@ -560,33 +595,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
(unsigned)fec-rbd_base + size);
}
- /*
-* Set interrupt mask register
-*/
- writel(0x, fec-eth-imask);
-
- /*
-* Clear FEC-Lite interrupt event register(IEVENT)
-*/
- writel(0x, fec-eth-ievent);
-
-
- /*
-* Set FEC-Lite receive control register(R_CNTRL):
-*/
-
- /* Start with frame length = 1518, common for all modes. */
- rcntrl = PKTSIZE FEC_RCNTRL_MAX_FL_SHIFT;
- if (fec-xcv_type == SEVENWIRE)
- rcntrl |= FEC_RCNTRL_FCE;
- else if (fec-xcv_type == RGMII)
- rcntrl |= FEC_RCNTRL_RGMII;
- else if (fec-xcv_type == RMII)
- rcntrl |= FEC_RCNTRL_RMII;
- else/* MII mode */
- rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE;
-
- writel(rcntrl, fec-eth-r_cntrl);
+ fec_reg_setup(fec);
if (fec-xcv_type == MII10 || fec-xcv_type == MII100)
fec_mii_setspeed(fec);
@@ -933,24 +942,7 @@ static int fec_probe(bd_t *bd, int dev_id, int phy_id,
uint32_t base_addr)
udelay(10);
}
- /*
-* Set interrupt mask register
-*/
- writel(0x, fec-eth-imask);
-
- /*
-* Clear FEC-Lite interrupt event register(IEVENT)
-*/
- writel(0x, fec-eth-ievent);
-
- /*
-* Set FEC-Lite receive control register(R_CNTRL):
-*/
- /*
-* Frame length=1518; MII mode;
-*/
- writel((PKTSIZE FEC_RCNTRL_MAX_FL_SHIFT) | FEC_RCNTRL_FCE |
- FEC_RCNTRL_MII_MODE, fec-eth-r_cntrl);
+ fec_reg_setup(fec);
fec_mii_setspeed(fec);
if (dev_id == -1) {
--
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[U-Boot] [PATCH 04/13] i.MX28: Improve passing of data from SPL to U-Boot
Pass memory size from SPL via structure located in SRAM instead of SCRATCH
registers. This allows passing more data about boot from SPL to U-Boot, like the
boot mode pads configuration.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/mx28.c | 16 +---
arch/arm/cpu/arm926ejs/mx28/mx28_init.h|1 +
arch/arm/cpu/arm926ejs/mx28/spl_boot.c |7 +++
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 10 +++---
arch/arm/include/asm/arch-mx28/sys_proto.h |4
5 files changed, 20 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index dc0338d..54a68e1 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -279,22 +279,16 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
int mx28_dram_init(void)
{
- struct mx28_digctl_regs *digctl_regs =
- (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
- uint32_t sz[2];
+ struct mx28_spl_data *data = (struct mx28_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) ~0xf);
- sz[0] = readl(digctl_regs-hw_digctl_scratch0);
- sz[1] = readl(digctl_regs-hw_digctl_scratch1);
-
- if (sz[0] != sz[1]) {
+ if (data-mem_dram_size == 0) {
printf(MX28:\n
- Error, the RAM size in HW_DIGCTRL_SCRATCH0 and\n
- HW_DIGCTRL_SCRATCH1 is not the same. Please\n
- verify these two registers contain valid RAM size!\n);
+ Error, the RAM size passed up from SPL is 0!\n);
hang();
}
- gd-ram_size = sz[0];
+ gd-ram_size = data-mem_dram_size;
return 0;
}
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
b/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
index 98d3631..8eac958 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
@@ -37,5 +37,6 @@ static inline void mx28_power_wait_pswitch(void) { }
#endif
void mx28_mem_init(void);
+uint32_t mx28_mem_get_size(void);
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index dfb8309..37e1eb7 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -28,6 +28,7 @@
#include asm/io.h
#include asm/arch/iomux-mx28.h
#include asm/arch/imx-regs.h
+#include asm/arch/sys_proto.h
#include mx28_init.h
@@ -49,9 +50,15 @@ void early_delay(int delay)
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
+ struct mx28_spl_data *data = (struct mx28_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) ~0xf);
+
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init();
+
mx28_mem_init();
+ data-mem_dram_size = mx28_mem_get_size();
+
mx28_power_wait_pswitch();
}
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 911bbef..4f62142 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -173,10 +173,8 @@ void mx28_mem_setup_vddd(void)
power_regs-hw_power_vdddctrl);
}
-void mx28_mem_get_size(void)
+uint32_t mx28_mem_get_size(void)
{
- struct mx28_digctl_regs *digctl_regs =
- (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
uint32_t sz, da;
uint32_t *vt = (uint32_t *)0x20;
/* The following is subs pc, r14, #4, used as return from DABT. */
@@ -187,11 +185,11 @@ void mx28_mem_get_size(void)
vt[4] = data_abort_memdetect_handler;
sz = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
- writel(sz, digctl_regs-hw_digctl_scratch0);
- writel(sz, digctl_regs-hw_digctl_scratch1);
/* Restore the old DABT handler. */
vt[4] = da;
+
+ return sz;
}
void mx28_mem_init(void)
@@ -239,6 +237,4 @@ void mx28_mem_init(void)
early_delay(1);
mx28_mem_setup_cpu_and_hbus();
-
- mx28_mem_get_size();
}
diff --git a/arch/arm/include/asm/arch-mx28/sys_proto.h
b/arch/arm/include/asm/arch-mx28/sys_proto.h
index 15d8de3..04f2e4d 100644
--- a/arch/arm/include/asm/arch-mx28/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx28/sys_proto.h
@@ -39,6 +39,10 @@ void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size);
#endif
+struct mx28_spl_data {
+ uint32_tmem_dram_size;
+};
+
int mx28_dram_init(void);
#endif /* __MX28_H__ */
--
1.7.10
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[U-Boot] [PATCH 05/13] i.MX28: Implement boot pads sampling and reporting
This patch implements code that samples i.MX28 boot pads and reports boot mode
accordingly.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/mx28.c |4 +++
arch/arm/cpu/arm926ejs/mx28/spl_boot.c | 48
arch/arm/include/asm/arch-mx28/sys_proto.h | 26 +++
include/configs/m28evk.h |1 +
include/configs/mx28evk.h |1 +
5 files changed, 80 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index 54a68e1..865dbb3 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -185,8 +185,12 @@ int arch_cpu_init(void)
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
+ struct mx28_spl_data *data = (struct mx28_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) ~0xf);
+
printf(Freescale i.MX28 family at %d MHz\n,
mxc_get_clock(MXC_ARM_CLK) / 100);
+ printf(BOOT: %s\n, mx28_boot_modes[data-boot_mode_idx].mode);
return 0;
}
#endif
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index 37e1eb7..c9b4566 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -29,6 +29,7 @@
#include asm/arch/iomux-mx28.h
#include asm/arch/imx-regs.h
#include asm/arch/sys_proto.h
+#include asm/gpio.h
#include mx28_init.h
@@ -47,11 +48,56 @@ void early_delay(int delay)
;
}
+#defineMUX_CONFIG_BOOTMODE_PAD (MXS_PAD_3V3 | MXS_PAD_4MA |
MXS_PAD_NOPULL)
+const iomux_cfg_t iomux_boot[] = {
+ MX28_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
+};
+
+uint8_t mx28_get_bootmode_index(void)
+{
+ uint8_t bootmode = 0;
+ int i;
+ uint8_t masked;
+
+ /* Setup IOMUX of bootmode pads to GPIO */
+ mxs_iomux_setup_multiple_pads(iomux_boot, ARRAY_SIZE(iomux_boot));
+
+ /* Setup bootmode pins as GPIO input */
+ gpio_direction_input(MX28_PAD_LCD_D00__GPIO_1_0);
+ gpio_direction_input(MX28_PAD_LCD_D01__GPIO_1_1);
+ gpio_direction_input(MX28_PAD_LCD_D02__GPIO_1_2);
+ gpio_direction_input(MX28_PAD_LCD_D03__GPIO_1_3);
+ gpio_direction_input(MX28_PAD_LCD_D04__GPIO_1_4);
+ gpio_direction_input(MX28_PAD_LCD_D05__GPIO_1_5);
+
+ /* Read bootmode pads */
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D00__GPIO_1_0) ? 1 : 0) 0;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D01__GPIO_1_1) ? 1 : 0) 1;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D02__GPIO_1_2) ? 1 : 0) 2;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) 3;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D04__GPIO_1_4) ? 1 : 0) 4;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) 5;
+
+ for (i = 0; i ARRAY_SIZE(mx28_boot_modes); i++) {
+ masked = bootmode mx28_boot_modes[i].boot_mask;
+ if (masked == mx28_boot_modes[i].boot_pads)
+ break;
+ }
+
+ return i;
+}
+
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
struct mx28_spl_data *data = (struct mx28_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) ~0xf);
+ uint8_t bootmode = mx28_get_bootmode_index();
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init();
@@ -59,6 +105,8 @@ void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
mx28_mem_init();
data-mem_dram_size = mx28_mem_get_size();
+ data-boot_mode_idx = bootmode;
+
mx28_power_wait_pswitch();
}
diff --git a/arch/arm/include/asm/arch-mx28/sys_proto.h
b/arch/arm/include/asm/arch-mx28/sys_proto.h
index 04f2e4d..e701c64 100644
--- a/arch/arm/include/asm/arch-mx28/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx28/sys_proto.h
@@ -39,7 +39,33 @@ void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size);
#endif
+struct mx28_pair {
+ uint8_t boot_pads;
+ uint8_t boot_mask;
+ const char *mode;
+};
+
+static const struct mx28_pair mx28_boot_modes[] = {
+ { 0x00, 0x0f, USB #0 },
+ { 0x01, 0x1f, I2C #0, master, 3V3 },
+ { 0x11, 0x1f, I2C #0, master, 1V8 },
+ { 0x02, 0x1f, SSP SPI #2, master, 3V3 NOR },
+ { 0x12, 0x1f, SSP SPI #2,
[U-Boot] [PATCH 07/13] i.MX28: Shut down the LCD controller before reset
If the LCD controller is on before the CPU goes into reset, the traffic on LCDIF
data pins interferes with the BootROM's boot mode sampling. So shut the
controller down.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam feste...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/mx28.c |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index 865dbb3..a82ff25 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -51,9 +51,16 @@ void reset_cpu(ulong ignored) __attribute__((noreturn));
void reset_cpu(ulong ignored)
{
-
struct mx28_rtc_regs *rtc_regs =
(struct mx28_rtc_regs *)MXS_RTC_BASE;
+ struct mx28_lcdif_regs *lcdif_regs =
+ (struct mx28_lcdif_regs *)MXS_LCDIF_BASE;
+
+ /*
+* Shut down the LCD controller as it interferes with BootROM boot mode
+* pads sampling.
+*/
+ writel(LCDIF_CTRL_RUN, lcdif_regs-hw_lcdif_ctrl_clr);
/* Wait 1 uS before doing the actual watchdog reset */
writel(1, rtc_regs-hw_rtc_watchdog);
--
1.7.10
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/13] i.MX28: Add LCDIF register definitions
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam feste...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/include/asm/arch-mx28/imx-regs.h |1 +
arch/arm/include/asm/arch-mx28/regs-lcdif.h | 212 +++
2 files changed, 213 insertions(+)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-lcdif.h
diff --git a/arch/arm/include/asm/arch-mx28/imx-regs.h
b/arch/arm/include/asm/arch-mx28/imx-regs.h
index f9e6c53..581bf0a 100644
--- a/arch/arm/include/asm/arch-mx28/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx28/imx-regs.h
@@ -30,6 +30,7 @@
#include asm/arch/regs-digctl.h
#include asm/arch/regs-gpmi.h
#include asm/arch/regs-i2c.h
+#include asm/arch/regs-lcdif.h
#include asm/arch/regs-ocotp.h
#include asm/arch/regs-pinctrl.h
#include asm/arch/regs-power.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-lcdif.h
b/arch/arm/include/asm/arch-mx28/regs-lcdif.h
new file mode 100644
index 000..cb47e41
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-lcdif.h
@@ -0,0 +1,212 @@
+/*
+ * Freescale i.MX28 LCDIF Register Definitions
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __MX28_REGS_LCDIF_H__
+#define __MX28_REGS_LCDIF_H__
+
+#include asm/arch/regs-common.h
+
+#ifndef__ASSEMBLY__
+struct mx28_lcdif_regs {
+ mx28_reg_32(hw_lcdif_ctrl) /* 0x00 */
+ mx28_reg_32(hw_lcdif_ctrl1) /* 0x10 */
+ mx28_reg_32(hw_lcdif_ctrl2) /* 0x20 */
+ mx28_reg_32(hw_lcdif_transfer_count)/* 0x30 */
+ mx28_reg_32(hw_lcdif_cur_buf) /* 0x40 */
+ mx28_reg_32(hw_lcdif_next_buf) /* 0x50 */
+ mx28_reg_32(hw_lcdif_timing)/* 0x60 */
+ mx28_reg_32(hw_lcdif_vdctrl0) /* 0x70 */
+ mx28_reg_32(hw_lcdif_vdctrl1) /* 0x80 */
+ mx28_reg_32(hw_lcdif_vdctrl2) /* 0x90 */
+ mx28_reg_32(hw_lcdif_vdctrl3) /* 0xa0 */
+ mx28_reg_32(hw_lcdif_vdctrl4) /* 0xb0 */
+ mx28_reg_32(hw_lcdif_dvictrl0) /* 0xc0 */
+ mx28_reg_32(hw_lcdif_dvictrl1) /* 0xd0 */
+ mx28_reg_32(hw_lcdif_dvictrl2) /* 0xe0 */
+ mx28_reg_32(hw_lcdif_dvictrl3) /* 0xf0 */
+ mx28_reg_32(hw_lcdif_dvictrl4) /* 0x100 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl0)/* 0x110 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl1)/* 0x120 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl2)/* 0x130 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl3)/* 0x140 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl4)/* 0x150 */
+ mx28_reg_32(hw_lcdif_csc_offset)/* 0x160 */
+ mx28_reg_32(hw_lcdif_csc_limit) /* 0x170 */
+ mx28_reg_32(hw_lcdif_data) /* 0x180 */
+ mx28_reg_32(hw_lcdif_bm_error_stat) /* 0x190 */
+ mx28_reg_32(hw_lcdif_crc_stat) /* 0x1a0 */
+ mx28_reg_32(hw_lcdif_lcdif_stat)/* 0x1b0 */
+ mx28_reg_32(hw_lcdif_version) /* 0x1c0 */
+ mx28_reg_32(hw_lcdif_debug0)/* 0x1d0 */
+ mx28_reg_32(hw_lcdif_debug1)/* 0x1e0 */
+ mx28_reg_32(hw_lcdif_debug2)/* 0x1f0 */
+};
+#endif
+
+#defineLCDIF_CTRL_SFTRST (1
31)
+#defineLCDIF_CTRL_CLKGATE (1
30)
+#defineLCDIF_CTRL_YCBCR422_INPUT (1
29)
+#defineLCDIF_CTRL_READ_WRITEB (1
28)
+#defineLCDIF_CTRL_WAIT_FOR_VSYNC_EDGE (1
27)
+#defineLCDIF_CTRL_DATA_SHIFT_DIR (1
26)
+#defineLCDIF_CTRL_SHIFT_NUM_BITS_MASK (0x1f
21)
+#defineLCDIF_CTRL_SHIFT_NUM_BITS_OFFSET21
+#defineLCDIF_CTRL_DVI_MODE (1
20)
+#define
[U-Boot] [PATCH 08/13] i.MX28: Add LRADC register definitions
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sbabic@denxde
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/include/asm/arch-mx28/imx-regs.h |1 +
arch/arm/include/asm/arch-mx28/regs-lradc.h | 400 +++
2 files changed, 401 insertions(+)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-lradc.h
diff --git a/arch/arm/include/asm/arch-mx28/imx-regs.h
b/arch/arm/include/asm/arch-mx28/imx-regs.h
index 581bf0a..37d0a93 100644
--- a/arch/arm/include/asm/arch-mx28/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx28/imx-regs.h
@@ -31,6 +31,7 @@
#include asm/arch/regs-gpmi.h
#include asm/arch/regs-i2c.h
#include asm/arch/regs-lcdif.h
+#include asm/arch/regs-lradc.h
#include asm/arch/regs-ocotp.h
#include asm/arch/regs-pinctrl.h
#include asm/arch/regs-power.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-lradc.h
b/arch/arm/include/asm/arch-mx28/regs-lradc.h
new file mode 100644
index 000..16e2bbf
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-lradc.h
@@ -0,0 +1,400 @@
+/*
+ * Freescale i.MX28 LRADC Register Definitions
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __MX28_REGS_LRADC_H__
+#define __MX28_REGS_LRADC_H__
+
+#include asm/arch/regs-common.h
+
+#ifndef__ASSEMBLY__
+struct mx28_lradc_regs {
+ mx28_reg_32(hw_lradc_ctrl0);
+ mx28_reg_32(hw_lradc_ctrl1);
+ mx28_reg_32(hw_lradc_ctrl2);
+ mx28_reg_32(hw_lradc_ctrl3);
+ mx28_reg_32(hw_lradc_status);
+ mx28_reg_32(hw_lradc_ch0);
+ mx28_reg_32(hw_lradc_ch1);
+ mx28_reg_32(hw_lradc_ch2);
+ mx28_reg_32(hw_lradc_ch3);
+ mx28_reg_32(hw_lradc_ch4);
+ mx28_reg_32(hw_lradc_ch5);
+ mx28_reg_32(hw_lradc_ch6);
+ mx28_reg_32(hw_lradc_ch7);
+ mx28_reg_32(hw_lradc_delay0);
+ mx28_reg_32(hw_lradc_delay1);
+ mx28_reg_32(hw_lradc_delay2);
+ mx28_reg_32(hw_lradc_delay3);
+ mx28_reg_32(hw_lradc_debug0);
+ mx28_reg_32(hw_lradc_debug1);
+ mx28_reg_32(hw_lradc_conversion);
+ mx28_reg_32(hw_lradc_ctrl4);
+ mx28_reg_32(hw_lradc_treshold0);
+ mx28_reg_32(hw_lradc_treshold1);
+ mx28_reg_32(hw_lradc_version);
+};
+#endif
+
+#defineLRADC_CTRL0_SFTRST (1
31)
+#defineLRADC_CTRL0_CLKGATE (1
30)
+#defineLRADC_CTRL0_ONCHIP_GROUNDREF(1
26)
+#defineLRADC_CTRL0_BUTTON1_DETECT_ENABLE (1
25)
+#defineLRADC_CTRL0_BUTTON0_DETECT_ENABLE (1
24)
+#defineLRADC_CTRL0_TOUCH_DETECT_ENABLE (1
23)
+#defineLRADC_CTRL0_TOUCH_SCREEN_TYPE (1
22)
+#defineLRADC_CTRL0_YNLRSW (1
21)
+#defineLRADC_CTRL0_YPLLSW_MASK (0x3
19)
+#defineLRADC_CTRL0_YPLLSW_OFFSET 19
+#defineLRADC_CTRL0_XNURSW_MASK (0x3
17)
+#defineLRADC_CTRL0_XNURSW_OFFSET 17
+#defineLRADC_CTRL0_XPULSW (1
16)
+#defineLRADC_CTRL0_SCHEDULE_MASK 0xff
+#defineLRADC_CTRL0_SCHEDULE_OFFSET 0
+
+#defineLRADC_CTRL1_BUTTON1_DETECT_IRQ_EN (1
28)
+#defineLRADC_CTRL1_BUTTON0_DETECT_IRQ_EN (1
27)
+#defineLRADC_CTRL1_THRESHOLD1_DETECT_IRQ_EN(1
26)
+#defineLRADC_CTRL1_THRESHOLD0_DETECT_IRQ_EN(1
25)
+#defineLRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1
24)
+#defineLRADC_CTRL1_LRADC7_IRQ_EN (1
23)
+#defineLRADC_CTRL1_LRADC6_IRQ_EN (1
[U-Boot] [PATCH 09/13] i.MX28: Add LRADC init to i.MX28 SPL
From: Marek Vasut marek.va...@gmail.com
This code is part of battery boot support for i.MX28.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sbabic@denxde
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/Makefile |2 +-
arch/arm/cpu/arm926ejs/mx28/mx28_init.h |3 +
arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c | 86 ++
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 10 +++
4 files changed, 100 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
diff --git a/arch/arm/cpu/arm926ejs/mx28/Makefile
b/arch/arm/cpu/arm926ejs/mx28/Makefile
index a2e3f77..674a3af 100644
--- a/arch/arm/cpu/arm926ejs/mx28/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx28/Makefile
@@ -28,7 +28,7 @@ LIB = $(obj)lib$(SOC).o
COBJS = clock.o mx28.o iomux.o timer.o
ifdef CONFIG_SPL_BUILD
-COBJS += spl_boot.o spl_mem_init.o spl_power_init.o
+COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
endif
SRCS := $(START:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
b/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
index 8eac958..e3a4493 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
@@ -39,4 +39,7 @@ static inline void mx28_power_wait_pswitch(void) { }
void mx28_mem_init(void);
uint32_t mx28_mem_get_size(void);
+void mx28_lradc_init(void);
+void mx28_lradc_enable_batt_measurement(void);
+
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
new file mode 100644
index 000..88a603c
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
@@ -0,0 +1,86 @@
+/*
+ * Freescale i.MX28 Battery measurement init
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include config.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+
+#include mx28_init.h
+
+void mx28_lradc_init(void)
+{
+ struct mx28_lradc_regs *regs = (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+
+ writel(LRADC_CTRL0_SFTRST, regs-hw_lradc_ctrl0_clr);
+ writel(LRADC_CTRL0_CLKGATE, regs-hw_lradc_ctrl0_clr);
+ writel(LRADC_CTRL0_ONCHIP_GROUNDREF, regs-hw_lradc_ctrl0_clr);
+
+ clrsetbits_le32(regs-hw_lradc_ctrl3,
+ LRADC_CTRL3_CYCLE_TIME_MASK,
+ LRADC_CTRL3_CYCLE_TIME_6MHZ);
+
+ clrsetbits_le32(regs-hw_lradc_ctrl4,
+ LRADC_CTRL4_LRADC7SELECT_MASK |
+ LRADC_CTRL4_LRADC6SELECT_MASK,
+ LRADC_CTRL4_LRADC7SELECT_CHANNEL7 |
+ LRADC_CTRL4_LRADC6SELECT_CHANNEL10);
+}
+
+void mx28_lradc_enable_batt_measurement(void)
+{
+ struct mx28_lradc_regs *regs = (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+
+ /* Check if the channel is present at all. */
+ if (!(readl(regs-hw_lradc_status) LRADC_STATUS_CHANNEL7_PRESENT))
+ return;
+
+ writel(LRADC_CTRL1_LRADC7_IRQ_EN, regs-hw_lradc_ctrl1_clr);
+ writel(LRADC_CTRL1_LRADC7_IRQ, regs-hw_lradc_ctrl1_clr);
+
+ clrsetbits_le32(regs-hw_lradc_conversion,
+ LRADC_CONVERSION_SCALE_FACTOR_MASK,
+ LRADC_CONVERSION_SCALE_FACTOR_LI_ION);
+ writel(LRADC_CONVERSION_AUTOMATIC, regs-hw_lradc_conversion_set);
+
+ /* Configure the channel. */
+ writel((1 7) LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
+ regs-hw_lradc_ctrl2_clr);
+ writel(0x, regs-hw_lradc_ch7_clr);
+ clrbits_le32(regs-hw_lradc_ch7, LRADC_CH_NUM_SAMPLES_MASK);
+ writel(LRADC_CH_ACCUMULATE, regs-hw_lradc_ch7_clr);
+
+ /* Schedule the channel. */
+ writel(1 7, regs-hw_lradc_ctrl0_set);
+
+ /* Start the channel sampling. */
+ writel(((1 7) LRADC_DELAY_TRIGGER_LRADCS_OFFSET) |
+ ((1 3) LRADC_DELAY_TRIGGER_DELAYS_OFFSET) |
+ 100, regs-hw_lradc_delay3);
+
+ writel(0x,
[U-Boot] [PATCH 11/13] i.MX28: Add battery boot components to SPL
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 100 +++---
1 file changed, 92 insertions(+), 8 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index ac942b4..4b09b0c 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -45,11 +45,11 @@ void mx28_power_clock2pll(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- writel(CLKCTRL_PLL0CTRL0_POWER,
- clkctrl_regs-hw_clkctrl_pll0ctrl0_set);
+ setbits_le32(clkctrl_regs-hw_clkctrl_pll0ctrl0,
+ CLKCTRL_PLL0CTRL0_POWER);
early_delay(100);
- writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
- clkctrl_regs-hw_clkctrl_clkseq_clr);
+ setbits_le32(clkctrl_regs-hw_clkctrl_clkseq,
+ CLKCTRL_CLKSEQ_BYPASS_CPU);
}
void mx28_power_clear_auto_restart(void)
@@ -455,9 +455,14 @@ void mx28_power_enable_4p2(void)
mx28_power_init_4p2_regulator();
/* Shutdown battery (none present) */
- clrbits_le32(power_regs-hw_power_dcdc4p2, POWER_DCDC4P2_BO_MASK);
- writel(POWER_CTRL_DCDC4P2_BO_IRQ, power_regs-hw_power_ctrl_clr);
- writel(POWER_CTRL_ENIRQ_DCDC4P2_BO, power_regs-hw_power_ctrl_clr);
+ if (!mx28_is_batt_ready()) {
+ clrbits_le32(power_regs-hw_power_dcdc4p2,
+ POWER_DCDC4P2_BO_MASK);
+ writel(POWER_CTRL_DCDC4P2_BO_IRQ,
+ power_regs-hw_power_ctrl_clr);
+ writel(POWER_CTRL_ENIRQ_DCDC4P2_BO,
+ power_regs-hw_power_ctrl_clr);
+ }
mx28_power_init_dcdc_4p2_source();
@@ -515,6 +520,50 @@ void mx28_powerdown(void)
power_regs-hw_power_reset);
}
+void mx28_batt_boot(void)
+{
+ struct mx28_power_regs *power_regs =
+ (struct mx28_power_regs *)MXS_POWER_BASE;
+
+ clrbits_le32(power_regs-hw_power_5vctrl, POWER_5VCTRL_PWDN_5VBRNOUT);
+ clrbits_le32(power_regs-hw_power_5vctrl, POWER_5VCTRL_ENABLE_DCDC);
+
+ clrbits_le32(power_regs-hw_power_dcdc4p2,
+ POWER_DCDC4P2_ENABLE_DCDC | POWER_DCDC4P2_ENABLE_4P2);
+ writel(POWER_CHARGE_ENABLE_LOAD, power_regs-hw_power_charge_clr);
+
+ /* 5V to battery handoff. */
+ setbits_le32(power_regs-hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
+ early_delay(30);
+ clrbits_le32(power_regs-hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
+
+ writel(POWER_CTRL_ENIRQ_DCDC4P2_BO, power_regs-hw_power_ctrl_clr);
+
+ clrsetbits_le32(power_regs-hw_power_minpwr,
+ POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS);
+
+ mx28_power_set_linreg();
+
+ clrbits_le32(power_regs-hw_power_vdddctrl,
+ POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG);
+
+ clrbits_le32(power_regs-hw_power_vddactrl,
+ POWER_VDDACTRL_DISABLE_FET | POWER_VDDACTRL_ENABLE_LINREG);
+
+ clrbits_le32(power_regs-hw_power_vddioctrl,
+ POWER_VDDIOCTRL_DISABLE_FET);
+
+ setbits_le32(power_regs-hw_power_5vctrl,
+ POWER_5VCTRL_PWD_CHARGE_4P2_MASK);
+
+ setbits_le32(power_regs-hw_power_5vctrl,
+ POWER_5VCTRL_ENABLE_DCDC);
+
+ clrsetbits_le32(power_regs-hw_power_5vctrl,
+ POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
+ 0x8 POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
+}
+
void mx28_handle_5v_conflict(void)
{
struct mx28_power_regs *power_regs =
@@ -539,6 +588,11 @@ void mx28_handle_5v_conflict(void)
mx28_powerdown();
break;
}
+
+ if (tmp POWER_STS_PSWITCH_MASK) {
+ mx28_batt_boot();
+ break;
+ }
}
}
@@ -595,12 +649,42 @@ void mx28_switch_vddd_to_dcdc_source(void)
void mx28_power_configure_power_source(void)
{
+ int batt_ready, batt_good;
+ struct mx28_power_regs *power_regs =
+ (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mx28_lradc_regs *lradc_regs =
+ (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+
mx28_src_power_init();
- mx28_5v_boot();
+ batt_ready = mx28_is_batt_ready();
+
+ if (readl(power_regs-hw_power_sts) POWER_STS_VDD5V_GT_VDDIO) {
+ batt_good = mx28_is_batt_good();
+ if (batt_ready) {
+ /* 5V source detected, good battery detected. */
+ mx28_batt_boot();
+ } else {
+ if (batt_good)
[U-Boot] [PATCH 10/13] i.MX28: Reorder battery status functions in SPL
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sbabic@denxde
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 120 --
1 file changed, 56 insertions(+), 64 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index dfb62eb..ac942b4 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -104,6 +104,62 @@ void mx28_power_set_linreg(void)
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW);
}
+int mx28_get_batt_volt(void)
+{
+ struct mx28_power_regs *power_regs =
+ (struct mx28_power_regs *)MXS_POWER_BASE;
+ uint32_t volt = readl(power_regs-hw_power_battmonitor);
+ volt = POWER_BATTMONITOR_BATT_VAL_MASK;
+ volt = POWER_BATTMONITOR_BATT_VAL_OFFSET;
+ volt *= 8;
+ return volt;
+}
+
+int mx28_is_batt_ready(void)
+{
+ return (mx28_get_batt_volt() = 3600);
+}
+
+int mx28_is_batt_good(void)
+{
+ struct mx28_power_regs *power_regs =
+ (struct mx28_power_regs *)MXS_POWER_BASE;
+ uint32_t volt = mx28_get_batt_volt();
+
+ if ((volt = 2400) (volt = 4300))
+ return 1;
+
+ clrsetbits_le32(power_regs-hw_power_5vctrl,
+ POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
+ 0x3 POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
+ writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK,
+ power_regs-hw_power_5vctrl_clr);
+
+ clrsetbits_le32(power_regs-hw_power_charge,
+ POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
+ POWER_CHARGE_STOP_ILIMIT_10MA | 0x3);
+
+ writel(POWER_CHARGE_PWD_BATTCHRG, power_regs-hw_power_charge_clr);
+ writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK,
+ power_regs-hw_power_5vctrl_clr);
+
+ early_delay(50);
+
+ volt = mx28_get_batt_volt();
+
+ if (volt = 3500)
+ return 0;
+
+ if (volt = 2400)
+ return 1;
+
+ writel(POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
+ power_regs-hw_power_charge_clr);
+ writel(POWER_CHARGE_PWD_BATTCHRG, power_regs-hw_power_charge_set);
+
+ return 0;
+}
+
void mx28_power_setup_5v_detect(void)
{
struct mx28_power_regs *power_regs =
@@ -486,22 +542,6 @@ void mx28_handle_5v_conflict(void)
}
}
-int mx28_get_batt_volt(void)
-{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
- uint32_t volt = readl(power_regs-hw_power_battmonitor);
- volt = POWER_BATTMONITOR_BATT_VAL_MASK;
- volt = POWER_BATTMONITOR_BATT_VAL_OFFSET;
- volt *= 8;
- return volt;
-}
-
-int mx28_is_batt_ready(void)
-{
- return (mx28_get_batt_volt() = 3600);
-}
-
void mx28_5v_boot(void)
{
struct mx28_power_regs *power_regs =
@@ -553,54 +593,6 @@ void mx28_switch_vddd_to_dcdc_source(void)
POWER_VDDDCTRL_DISABLE_STEPPING);
}
-int mx28_is_batt_good(void)
-{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
- uint32_t volt;
-
- volt = readl(power_regs-hw_power_battmonitor);
- volt = POWER_BATTMONITOR_BATT_VAL_MASK;
- volt = POWER_BATTMONITOR_BATT_VAL_OFFSET;
- volt *= 8;
-
- if ((volt = 2400) (volt = 4300))
- return 1;
-
- clrsetbits_le32(power_regs-hw_power_5vctrl,
- POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
- 0x3 POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
- writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK,
- power_regs-hw_power_5vctrl_clr);
-
- clrsetbits_le32(power_regs-hw_power_charge,
- POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
- POWER_CHARGE_STOP_ILIMIT_10MA | 0x3);
-
- writel(POWER_CHARGE_PWD_BATTCHRG, power_regs-hw_power_charge_clr);
- writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK,
- power_regs-hw_power_5vctrl_clr);
-
- early_delay(50);
-
- volt = readl(power_regs-hw_power_battmonitor);
- volt = POWER_BATTMONITOR_BATT_VAL_MASK;
- volt = POWER_BATTMONITOR_BATT_VAL_OFFSET;
- volt *= 8;
-
- if (volt = 3500)
- return 0;
-
- if (volt = 2400)
- return 1;
-
- writel(POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
- power_regs-hw_power_charge_clr);
- writel(POWER_CHARGE_PWD_BATTCHRG, power_regs-hw_power_charge_set);
-
- return 0;
-}
-
void mx28_power_configure_power_source(void)
{
mx28_src_power_init();
--
1.7.10
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[U-Boot] [PATCH 12/13] i.MX28: Check if WP detection is implemented at all
If the WP function is NULL, simply assume the card is always RW.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
drivers/mmc/mxsmmc.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 35c6bda..c7200ee 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -133,7 +133,8 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
/* READ or WRITE */
if (data-flags MMC_DATA_READ) {
ctrl0 |= SSP_CTRL0_READ;
- } else if (priv-mmc_is_wp(mmc-block_dev.dev)) {
+ } else if (priv-mmc_is_wp
+ priv-mmc_is_wp(mmc-block_dev.dev)) {
printf(MMC%d: Can not write a locked card!\n,
mmc-block_dev.dev);
return UNUSABLE_ERR;
--
1.7.10
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[U-Boot] [PATCH 13/13] i.MX28: Avoid redefining serial_put[cs]()
Do not define serial_putc() and serial_puts() calls if
CONFIG_SPL_SERIAL_SUPPORT is set.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/spl_boot.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index c9b4566..a6dfca3 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -123,8 +123,10 @@ inline void board_init_r(gd_t *id, ulong dest_addr)
;
}
+#ifndef CONFIG_SPL_SERIAL_SUPPORT
void serial_putc(const char c) {}
void serial_puts(const char *s) {}
+#endif
void hang(void) __attribute__ ((noreturn));
void hang(void)
{
--
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Re: [U-Boot] [PATCH 00/13] M28EVK/i.MX28 improvements
These are some improvements that were stuck in my tree for a while, time to expunge them, please consider applying. Ignore this series, typo mangled Stefano's address, will resend. Tested on: * DENX M28EVK v2.0 * DENX M28EVK v1.1 * Mysterious board #1 ... * Unnamed board #2 ... Marek Vasut (13): FEC: Abstract out register setup M28EVK: Implement support for new board V2.0 M28EVK: Add SD update command i.MX28: Improve passing of data from SPL to U-Boot i.MX28: Implement boot pads sampling and reporting i.MX28: Add LCDIF register definitions i.MX28: Shut down the LCD controller before reset i.MX28: Add LRADC register definitions i.MX28: Add LRADC init to i.MX28 SPL i.MX28: Reorder battery status functions in SPL i.MX28: Add battery boot components to SPL i.MX28: Check if WP detection is implemented at all i.MX28: Avoid redefining serial_put[cs]() arch/arm/cpu/arm926ejs/mx28/Makefile |2 +- arch/arm/cpu/arm926ejs/mx28/mx28.c | 29 +- arch/arm/cpu/arm926ejs/mx28/mx28_init.h |4 + arch/arm/cpu/arm926ejs/mx28/spl_boot.c | 57 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c | 86 ++ arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 10 +- arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 224 ++- arch/arm/include/asm/arch-mx28/imx-regs.h|2 + arch/arm/include/asm/arch-mx28/regs-lcdif.h | 212 ++ arch/arm/include/asm/arch-mx28/regs-lradc.h | 400 ++ arch/arm/include/asm/arch-mx28/sys_proto.h | 30 ++ board/denx/m28evk/m28evk.c | 20 +- board/denx/m28evk/spl_boot.c |8 +- drivers/mmc/mxsmmc.c |3 +- drivers/net/fec_mxc.c| 84 +++--- include/configs/m28evk.h | 10 + include/configs/mx28evk.h|1 + 17 files changed, 1043 insertions(+), 139 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c create mode 100644 arch/arm/include/asm/arch-mx28/regs-lcdif.h create mode 100644 arch/arm/include/asm/arch-mx28/regs-lradc.h Cc: Detlev Zundel d...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sbabic@denxde Cc: Wolfgang Denk w...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 02/13] M28EVK: Implement support for new board V2.0
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
board/denx/m28evk/m28evk.c | 20 +++-
board/denx/m28evk/spl_boot.c |8 ++--
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c
index 53df476..3d28ea8 100644
--- a/board/denx/m28evk/m28evk.c
+++ b/board/denx/m28evk/m28evk.c
@@ -90,6 +90,8 @@ int board_mmc_init(bd_t *bis)
{
/* Configure WP as input. */
gpio_direction_input(MX28_PAD_AUART2_CTS__GPIO_3_10);
+ /* Turn on the power to the card. */
+ gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
return mxsmmc_initialize(bis, 0, m28_mmc_wp);
}
@@ -103,10 +105,18 @@ int board_mmc_init(bd_t *bis)
int fecmxc_mii_postcall(int phy)
{
+#ifdefined(CONFIG_DENX_M28_V11) || defined(CONFIG_DENX_M28_V10)
+ /* KZ8031 PHY on old boards. */
+ const uint32_t freq = 0x0080;
+#else
+ /* KZ8021 PHY on new boards. */
+ const uint32_t freq = 0x;
+#endif
+
miiphy_write(FEC1, phy, MII_BMCR, 0x9000);
miiphy_write(FEC1, phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202);
if (phy == 3)
- miiphy_write(FEC1, 3, MII_PHY_CTRL2, 0x8180);
+ miiphy_write(FEC1, 3, MII_PHY_CTRL2, 0x8100 | freq);
return 0;
}
@@ -123,6 +133,14 @@ int board_eth_init(bd_t *bis)
CLKCTRL_ENET_TIME_SEL_MASK | CLKCTRL_ENET_CLK_OUT_EN,
CLKCTRL_ENET_TIME_SEL_RMII_CLK);
+#if !defined(CONFIG_DENX_M28_V11) !defined(CONFIG_DENX_M28_V10)
+ /* Reset the new PHY */
+ gpio_direction_output(MX28_PAD_AUART2_RTS__GPIO_3_11, 0);
+ udelay(1);
+ gpio_set_value(MX28_PAD_AUART2_RTS__GPIO_3_11, 1);
+ udelay(1);
+#endif
+
ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
if (ret) {
printf(FEC MXS: Unable to init FEC0\n);
diff --git a/board/denx/m28evk/spl_boot.c b/board/denx/m28evk/spl_boot.c
index a04fe18..7a12592 100644
--- a/board/denx/m28evk/spl_boot.c
+++ b/board/denx/m28evk/spl_boot.c
@@ -109,8 +109,9 @@ const iomux_cfg_t iomux_setup[] = {
(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
MX28_PAD_SSP0_SCK__SSP0_SCK |
(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
- MX28_PAD_PWM3__GPIO_3_28 | MUX_CONFIG_SSP0, /* Power .. FIXME */
- MX28_PAD_AUART2_CTS__GPIO_3_10, /* WP ... FIXME */
+ MX28_PAD_PWM3__GPIO_3_28 | MUX_CONFIG_SSP0 |
+ (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), /* Power */
+ MX28_PAD_AUART2_CTS__GPIO_3_10, /* WP */
/* GPMI NAND */
MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI,
@@ -147,6 +148,9 @@ const iomux_cfg_t iomux_setup[] = {
MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
+#if !defined(CONFIG_DENX_M28_V11) !defined(CONFIG_DENX_M28_V10)
+ MX28_PAD_AUART2_RTS__GPIO_3_11, /* PHY reset */
+#endif
/* I2C */
MX28_PAD_I2C0_SCL__I2C0_SCL,
--
1.7.10
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[U-Boot] [PATCH 00/13] M28EVK/i.MX28 improvements
These are some improvements that were stuck in my tree for a while, time to expunge them, please consider applying. Tested on: * DENX M28EVK v2.0 * DENX M28EVK v1.1 * Mysterious board #1 ... * Unnamed board #2 ... Marek Vasut (13): FEC: Abstract out register setup M28EVK: Implement support for new board V2.0 M28EVK: Add SD update command i.MX28: Improve passing of data from SPL to U-Boot i.MX28: Implement boot pads sampling and reporting i.MX28: Add LCDIF register definitions i.MX28: Shut down the LCD controller before reset i.MX28: Add LRADC register definitions i.MX28: Add LRADC init to i.MX28 SPL i.MX28: Reorder battery status functions in SPL i.MX28: Add battery boot components to SPL i.MX28: Check if WP detection is implemented at all i.MX28: Avoid redefining serial_put[cs]() arch/arm/cpu/arm926ejs/mx28/Makefile |2 +- arch/arm/cpu/arm926ejs/mx28/mx28.c | 29 +- arch/arm/cpu/arm926ejs/mx28/mx28_init.h |4 + arch/arm/cpu/arm926ejs/mx28/spl_boot.c | 57 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c | 86 ++ arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 10 +- arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 224 ++- arch/arm/include/asm/arch-mx28/imx-regs.h|2 + arch/arm/include/asm/arch-mx28/regs-lcdif.h | 212 ++ arch/arm/include/asm/arch-mx28/regs-lradc.h | 400 ++ arch/arm/include/asm/arch-mx28/sys_proto.h | 30 ++ board/denx/m28evk/m28evk.c | 20 +- board/denx/m28evk/spl_boot.c |8 +- drivers/mmc/mxsmmc.c |3 +- drivers/net/fec_mxc.c| 84 +++--- include/configs/m28evk.h | 10 + include/configs/mx28evk.h|1 + 17 files changed, 1043 insertions(+), 139 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c create mode 100644 arch/arm/include/asm/arch-mx28/regs-lcdif.h create mode 100644 arch/arm/include/asm/arch-mx28/regs-lradc.h Cc: Detlev Zundel d...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de -- 1.7.10 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 01/13] FEC: Abstract out register setup
Abstract out common register setup. This also configured r_cntrl
to correct value at registration time.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
drivers/net/fec_mxc.c | 84 ++---
1 file changed, 38 insertions(+), 46 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index d8db9f0..04750c5 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -398,6 +398,42 @@ static void fec_eth_phy_config(struct eth_device *dev)
#endif
}
+/*
+ * Do initial configuration of the FEC registers
+ */
+static void fec_reg_setup(struct fec_priv *fec)
+{
+ uint32_t rcntrl;
+
+ /*
+* Set interrupt mask register
+*/
+ writel(0x, fec-eth-imask);
+
+ /*
+* Clear FEC-Lite interrupt event register(IEVENT)
+*/
+ writel(0x, fec-eth-ievent);
+
+
+ /*
+* Set FEC-Lite receive control register(R_CNTRL):
+*/
+
+ /* Start with frame length = 1518, common for all modes. */
+ rcntrl = PKTSIZE FEC_RCNTRL_MAX_FL_SHIFT;
+ if (fec-xcv_type == SEVENWIRE)
+ rcntrl |= FEC_RCNTRL_FCE;
+ else if (fec-xcv_type == RGMII)
+ rcntrl |= FEC_RCNTRL_RGMII;
+ else if (fec-xcv_type == RMII)
+ rcntrl |= FEC_RCNTRL_RMII;
+ else/* MII mode */
+ rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE;
+
+ writel(rcntrl, fec-eth-r_cntrl);
+}
+
/**
* Start the FEC engine
* @param[in] dev Our device to handle
@@ -512,7 +548,6 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
{
struct fec_priv *fec = (struct fec_priv *)dev-priv;
uint32_t mib_ptr = (uint32_t)fec-eth-rmon_t_drop;
- uint32_t rcntrl;
uint32_t size;
int i, ret;
@@ -560,33 +595,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
(unsigned)fec-rbd_base + size);
}
- /*
-* Set interrupt mask register
-*/
- writel(0x, fec-eth-imask);
-
- /*
-* Clear FEC-Lite interrupt event register(IEVENT)
-*/
- writel(0x, fec-eth-ievent);
-
-
- /*
-* Set FEC-Lite receive control register(R_CNTRL):
-*/
-
- /* Start with frame length = 1518, common for all modes. */
- rcntrl = PKTSIZE FEC_RCNTRL_MAX_FL_SHIFT;
- if (fec-xcv_type == SEVENWIRE)
- rcntrl |= FEC_RCNTRL_FCE;
- else if (fec-xcv_type == RGMII)
- rcntrl |= FEC_RCNTRL_RGMII;
- else if (fec-xcv_type == RMII)
- rcntrl |= FEC_RCNTRL_RMII;
- else/* MII mode */
- rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE;
-
- writel(rcntrl, fec-eth-r_cntrl);
+ fec_reg_setup(fec);
if (fec-xcv_type == MII10 || fec-xcv_type == MII100)
fec_mii_setspeed(fec);
@@ -933,24 +942,7 @@ static int fec_probe(bd_t *bd, int dev_id, int phy_id,
uint32_t base_addr)
udelay(10);
}
- /*
-* Set interrupt mask register
-*/
- writel(0x, fec-eth-imask);
-
- /*
-* Clear FEC-Lite interrupt event register(IEVENT)
-*/
- writel(0x, fec-eth-ievent);
-
- /*
-* Set FEC-Lite receive control register(R_CNTRL):
-*/
- /*
-* Frame length=1518; MII mode;
-*/
- writel((PKTSIZE FEC_RCNTRL_MAX_FL_SHIFT) | FEC_RCNTRL_FCE |
- FEC_RCNTRL_MII_MODE, fec-eth-r_cntrl);
+ fec_reg_setup(fec);
fec_mii_setspeed(fec);
if (dev_id == -1) {
--
1.7.10
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[U-Boot] [PATCH 06/13] i.MX28: Add LCDIF register definitions
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam feste...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/include/asm/arch-mx28/imx-regs.h |1 +
arch/arm/include/asm/arch-mx28/regs-lcdif.h | 212 +++
2 files changed, 213 insertions(+)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-lcdif.h
diff --git a/arch/arm/include/asm/arch-mx28/imx-regs.h
b/arch/arm/include/asm/arch-mx28/imx-regs.h
index f9e6c53..581bf0a 100644
--- a/arch/arm/include/asm/arch-mx28/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx28/imx-regs.h
@@ -30,6 +30,7 @@
#include asm/arch/regs-digctl.h
#include asm/arch/regs-gpmi.h
#include asm/arch/regs-i2c.h
+#include asm/arch/regs-lcdif.h
#include asm/arch/regs-ocotp.h
#include asm/arch/regs-pinctrl.h
#include asm/arch/regs-power.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-lcdif.h
b/arch/arm/include/asm/arch-mx28/regs-lcdif.h
new file mode 100644
index 000..cb47e41
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-lcdif.h
@@ -0,0 +1,212 @@
+/*
+ * Freescale i.MX28 LCDIF Register Definitions
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __MX28_REGS_LCDIF_H__
+#define __MX28_REGS_LCDIF_H__
+
+#include asm/arch/regs-common.h
+
+#ifndef__ASSEMBLY__
+struct mx28_lcdif_regs {
+ mx28_reg_32(hw_lcdif_ctrl) /* 0x00 */
+ mx28_reg_32(hw_lcdif_ctrl1) /* 0x10 */
+ mx28_reg_32(hw_lcdif_ctrl2) /* 0x20 */
+ mx28_reg_32(hw_lcdif_transfer_count)/* 0x30 */
+ mx28_reg_32(hw_lcdif_cur_buf) /* 0x40 */
+ mx28_reg_32(hw_lcdif_next_buf) /* 0x50 */
+ mx28_reg_32(hw_lcdif_timing)/* 0x60 */
+ mx28_reg_32(hw_lcdif_vdctrl0) /* 0x70 */
+ mx28_reg_32(hw_lcdif_vdctrl1) /* 0x80 */
+ mx28_reg_32(hw_lcdif_vdctrl2) /* 0x90 */
+ mx28_reg_32(hw_lcdif_vdctrl3) /* 0xa0 */
+ mx28_reg_32(hw_lcdif_vdctrl4) /* 0xb0 */
+ mx28_reg_32(hw_lcdif_dvictrl0) /* 0xc0 */
+ mx28_reg_32(hw_lcdif_dvictrl1) /* 0xd0 */
+ mx28_reg_32(hw_lcdif_dvictrl2) /* 0xe0 */
+ mx28_reg_32(hw_lcdif_dvictrl3) /* 0xf0 */
+ mx28_reg_32(hw_lcdif_dvictrl4) /* 0x100 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl0)/* 0x110 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl1)/* 0x120 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl2)/* 0x130 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl3)/* 0x140 */
+ mx28_reg_32(hw_lcdif_csc_coeffctrl4)/* 0x150 */
+ mx28_reg_32(hw_lcdif_csc_offset)/* 0x160 */
+ mx28_reg_32(hw_lcdif_csc_limit) /* 0x170 */
+ mx28_reg_32(hw_lcdif_data) /* 0x180 */
+ mx28_reg_32(hw_lcdif_bm_error_stat) /* 0x190 */
+ mx28_reg_32(hw_lcdif_crc_stat) /* 0x1a0 */
+ mx28_reg_32(hw_lcdif_lcdif_stat)/* 0x1b0 */
+ mx28_reg_32(hw_lcdif_version) /* 0x1c0 */
+ mx28_reg_32(hw_lcdif_debug0)/* 0x1d0 */
+ mx28_reg_32(hw_lcdif_debug1)/* 0x1e0 */
+ mx28_reg_32(hw_lcdif_debug2)/* 0x1f0 */
+};
+#endif
+
+#defineLCDIF_CTRL_SFTRST (1
31)
+#defineLCDIF_CTRL_CLKGATE (1
30)
+#defineLCDIF_CTRL_YCBCR422_INPUT (1
29)
+#defineLCDIF_CTRL_READ_WRITEB (1
28)
+#defineLCDIF_CTRL_WAIT_FOR_VSYNC_EDGE (1
27)
+#defineLCDIF_CTRL_DATA_SHIFT_DIR (1
26)
+#defineLCDIF_CTRL_SHIFT_NUM_BITS_MASK (0x1f
21)
+#defineLCDIF_CTRL_SHIFT_NUM_BITS_OFFSET21
+#defineLCDIF_CTRL_DVI_MODE (1
20)
+#define
[U-Boot] [PATCH 03/13] M28EVK: Add SD update command
Add update_sd_firmware command to easily reload the SD card of
m28evk kit. This comes handy when the board boots from SD card.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
include/configs/m28evk.h |9 +
1 file changed, 9 insertions(+)
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 012381a..c40d2a8 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -286,6 +286,7 @@
#defineCONFIG_EXTRA_ENV_SETTINGS
\
update_nand_full_filename=u-boot.nand\0 \
update_nand_firmware_filename=u-boot.sb\0 \
+ update_sd_firmware_filename=u-boot.sd\0 \
update_nand_firmware_maxsz=0x10\0 \
update_nand_stride=0x40\0 /* MX28 datasheet ch. 12.12 */ \
update_nand_count=0x4\0 /* MX28 datasheet ch. 12.12 */ \
@@ -312,6 +313,14 @@
nand erase ${fcb_sz} ${fw_sz} ; \
nand write ${loadaddr} ${fcb_sz} ${filesize} ;\
nand write ${loadaddr} ${fw_off} ${filesize} ;\
+ fi\0 \
+ update_sd_firmware= /* Update the SD firmware partition */ \
+ if mmc rescan ; then \
+ if tftp ${update_sd_firmware_filename} ; then \
+ setexpr fw_sz ${filesize} / 0x200 ; /* SD block size */ \
+ setexpr fw_sz ${fw_sz} + 1 ; \
+ mmc write ${loadaddr} 0x800 ${fw_sz} ;\
+ fi ; \
fi\0
#endif /* __M28_H__ */
--
1.7.10
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[U-Boot] [PATCH 05/13] i.MX28: Implement boot pads sampling and reporting
This patch implements code that samples i.MX28 boot pads and reports boot mode
accordingly.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/mx28.c |4 +++
arch/arm/cpu/arm926ejs/mx28/spl_boot.c | 48
arch/arm/include/asm/arch-mx28/sys_proto.h | 26 +++
include/configs/m28evk.h |1 +
include/configs/mx28evk.h |1 +
5 files changed, 80 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index 54a68e1..865dbb3 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -185,8 +185,12 @@ int arch_cpu_init(void)
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
+ struct mx28_spl_data *data = (struct mx28_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) ~0xf);
+
printf(Freescale i.MX28 family at %d MHz\n,
mxc_get_clock(MXC_ARM_CLK) / 100);
+ printf(BOOT: %s\n, mx28_boot_modes[data-boot_mode_idx].mode);
return 0;
}
#endif
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index 37e1eb7..c9b4566 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -29,6 +29,7 @@
#include asm/arch/iomux-mx28.h
#include asm/arch/imx-regs.h
#include asm/arch/sys_proto.h
+#include asm/gpio.h
#include mx28_init.h
@@ -47,11 +48,56 @@ void early_delay(int delay)
;
}
+#defineMUX_CONFIG_BOOTMODE_PAD (MXS_PAD_3V3 | MXS_PAD_4MA |
MXS_PAD_NOPULL)
+const iomux_cfg_t iomux_boot[] = {
+ MX28_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD,
+ MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
+};
+
+uint8_t mx28_get_bootmode_index(void)
+{
+ uint8_t bootmode = 0;
+ int i;
+ uint8_t masked;
+
+ /* Setup IOMUX of bootmode pads to GPIO */
+ mxs_iomux_setup_multiple_pads(iomux_boot, ARRAY_SIZE(iomux_boot));
+
+ /* Setup bootmode pins as GPIO input */
+ gpio_direction_input(MX28_PAD_LCD_D00__GPIO_1_0);
+ gpio_direction_input(MX28_PAD_LCD_D01__GPIO_1_1);
+ gpio_direction_input(MX28_PAD_LCD_D02__GPIO_1_2);
+ gpio_direction_input(MX28_PAD_LCD_D03__GPIO_1_3);
+ gpio_direction_input(MX28_PAD_LCD_D04__GPIO_1_4);
+ gpio_direction_input(MX28_PAD_LCD_D05__GPIO_1_5);
+
+ /* Read bootmode pads */
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D00__GPIO_1_0) ? 1 : 0) 0;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D01__GPIO_1_1) ? 1 : 0) 1;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D02__GPIO_1_2) ? 1 : 0) 2;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) 3;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D04__GPIO_1_4) ? 1 : 0) 4;
+ bootmode |= (gpio_get_value(MX28_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) 5;
+
+ for (i = 0; i ARRAY_SIZE(mx28_boot_modes); i++) {
+ masked = bootmode mx28_boot_modes[i].boot_mask;
+ if (masked == mx28_boot_modes[i].boot_pads)
+ break;
+ }
+
+ return i;
+}
+
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
struct mx28_spl_data *data = (struct mx28_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) ~0xf);
+ uint8_t bootmode = mx28_get_bootmode_index();
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init();
@@ -59,6 +105,8 @@ void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
mx28_mem_init();
data-mem_dram_size = mx28_mem_get_size();
+ data-boot_mode_idx = bootmode;
+
mx28_power_wait_pswitch();
}
diff --git a/arch/arm/include/asm/arch-mx28/sys_proto.h
b/arch/arm/include/asm/arch-mx28/sys_proto.h
index 04f2e4d..e701c64 100644
--- a/arch/arm/include/asm/arch-mx28/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx28/sys_proto.h
@@ -39,7 +39,33 @@ void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size);
#endif
+struct mx28_pair {
+ uint8_t boot_pads;
+ uint8_t boot_mask;
+ const char *mode;
+};
+
+static const struct mx28_pair mx28_boot_modes[] = {
+ { 0x00, 0x0f, USB #0 },
+ { 0x01, 0x1f, I2C #0, master, 3V3 },
+ { 0x11, 0x1f, I2C #0, master, 1V8 },
+ { 0x02, 0x1f, SSP SPI #2, master, 3V3 NOR },
+ { 0x12, 0x1f, SSP SPI #2,
[U-Boot] [PATCH 07/13] i.MX28: Shut down the LCD controller before reset
If the LCD controller is on before the CPU goes into reset, the traffic on LCDIF
data pins interferes with the BootROM's boot mode sampling. So shut the
controller down.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam feste...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/mx28.c |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index 865dbb3..a82ff25 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -51,9 +51,16 @@ void reset_cpu(ulong ignored) __attribute__((noreturn));
void reset_cpu(ulong ignored)
{
-
struct mx28_rtc_regs *rtc_regs =
(struct mx28_rtc_regs *)MXS_RTC_BASE;
+ struct mx28_lcdif_regs *lcdif_regs =
+ (struct mx28_lcdif_regs *)MXS_LCDIF_BASE;
+
+ /*
+* Shut down the LCD controller as it interferes with BootROM boot mode
+* pads sampling.
+*/
+ writel(LCDIF_CTRL_RUN, lcdif_regs-hw_lcdif_ctrl_clr);
/* Wait 1 uS before doing the actual watchdog reset */
writel(1, rtc_regs-hw_rtc_watchdog);
--
1.7.10
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[U-Boot] [PATCH 04/13] i.MX28: Improve passing of data from SPL to U-Boot
Pass memory size from SPL via structure located in SRAM instead of SCRATCH
registers. This allows passing more data about boot from SPL to U-Boot, like the
boot mode pads configuration.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/mx28.c | 16 +---
arch/arm/cpu/arm926ejs/mx28/mx28_init.h|1 +
arch/arm/cpu/arm926ejs/mx28/spl_boot.c |7 +++
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 10 +++---
arch/arm/include/asm/arch-mx28/sys_proto.h |4
5 files changed, 20 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index dc0338d..54a68e1 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -279,22 +279,16 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
int mx28_dram_init(void)
{
- struct mx28_digctl_regs *digctl_regs =
- (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
- uint32_t sz[2];
+ struct mx28_spl_data *data = (struct mx28_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) ~0xf);
- sz[0] = readl(digctl_regs-hw_digctl_scratch0);
- sz[1] = readl(digctl_regs-hw_digctl_scratch1);
-
- if (sz[0] != sz[1]) {
+ if (data-mem_dram_size == 0) {
printf(MX28:\n
- Error, the RAM size in HW_DIGCTRL_SCRATCH0 and\n
- HW_DIGCTRL_SCRATCH1 is not the same. Please\n
- verify these two registers contain valid RAM size!\n);
+ Error, the RAM size passed up from SPL is 0!\n);
hang();
}
- gd-ram_size = sz[0];
+ gd-ram_size = data-mem_dram_size;
return 0;
}
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
b/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
index 98d3631..8eac958 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
@@ -37,5 +37,6 @@ static inline void mx28_power_wait_pswitch(void) { }
#endif
void mx28_mem_init(void);
+uint32_t mx28_mem_get_size(void);
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index dfb8309..37e1eb7 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -28,6 +28,7 @@
#include asm/io.h
#include asm/arch/iomux-mx28.h
#include asm/arch/imx-regs.h
+#include asm/arch/sys_proto.h
#include mx28_init.h
@@ -49,9 +50,15 @@ void early_delay(int delay)
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
+ struct mx28_spl_data *data = (struct mx28_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) ~0xf);
+
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init();
+
mx28_mem_init();
+ data-mem_dram_size = mx28_mem_get_size();
+
mx28_power_wait_pswitch();
}
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 911bbef..4f62142 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -173,10 +173,8 @@ void mx28_mem_setup_vddd(void)
power_regs-hw_power_vdddctrl);
}
-void mx28_mem_get_size(void)
+uint32_t mx28_mem_get_size(void)
{
- struct mx28_digctl_regs *digctl_regs =
- (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
uint32_t sz, da;
uint32_t *vt = (uint32_t *)0x20;
/* The following is subs pc, r14, #4, used as return from DABT. */
@@ -187,11 +185,11 @@ void mx28_mem_get_size(void)
vt[4] = data_abort_memdetect_handler;
sz = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
- writel(sz, digctl_regs-hw_digctl_scratch0);
- writel(sz, digctl_regs-hw_digctl_scratch1);
/* Restore the old DABT handler. */
vt[4] = da;
+
+ return sz;
}
void mx28_mem_init(void)
@@ -239,6 +237,4 @@ void mx28_mem_init(void)
early_delay(1);
mx28_mem_setup_cpu_and_hbus();
-
- mx28_mem_get_size();
}
diff --git a/arch/arm/include/asm/arch-mx28/sys_proto.h
b/arch/arm/include/asm/arch-mx28/sys_proto.h
index 15d8de3..04f2e4d 100644
--- a/arch/arm/include/asm/arch-mx28/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx28/sys_proto.h
@@ -39,6 +39,10 @@ void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size);
#endif
+struct mx28_spl_data {
+ uint32_tmem_dram_size;
+};
+
int mx28_dram_init(void);
#endif /* __MX28_H__ */
--
1.7.10
___
U-Boot mailing list
[U-Boot] [PATCH 08/13] i.MX28: Add LRADC register definitions
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/include/asm/arch-mx28/imx-regs.h |1 +
arch/arm/include/asm/arch-mx28/regs-lradc.h | 400 +++
2 files changed, 401 insertions(+)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-lradc.h
diff --git a/arch/arm/include/asm/arch-mx28/imx-regs.h
b/arch/arm/include/asm/arch-mx28/imx-regs.h
index 581bf0a..37d0a93 100644
--- a/arch/arm/include/asm/arch-mx28/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx28/imx-regs.h
@@ -31,6 +31,7 @@
#include asm/arch/regs-gpmi.h
#include asm/arch/regs-i2c.h
#include asm/arch/regs-lcdif.h
+#include asm/arch/regs-lradc.h
#include asm/arch/regs-ocotp.h
#include asm/arch/regs-pinctrl.h
#include asm/arch/regs-power.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-lradc.h
b/arch/arm/include/asm/arch-mx28/regs-lradc.h
new file mode 100644
index 000..16e2bbf
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-lradc.h
@@ -0,0 +1,400 @@
+/*
+ * Freescale i.MX28 LRADC Register Definitions
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __MX28_REGS_LRADC_H__
+#define __MX28_REGS_LRADC_H__
+
+#include asm/arch/regs-common.h
+
+#ifndef__ASSEMBLY__
+struct mx28_lradc_regs {
+ mx28_reg_32(hw_lradc_ctrl0);
+ mx28_reg_32(hw_lradc_ctrl1);
+ mx28_reg_32(hw_lradc_ctrl2);
+ mx28_reg_32(hw_lradc_ctrl3);
+ mx28_reg_32(hw_lradc_status);
+ mx28_reg_32(hw_lradc_ch0);
+ mx28_reg_32(hw_lradc_ch1);
+ mx28_reg_32(hw_lradc_ch2);
+ mx28_reg_32(hw_lradc_ch3);
+ mx28_reg_32(hw_lradc_ch4);
+ mx28_reg_32(hw_lradc_ch5);
+ mx28_reg_32(hw_lradc_ch6);
+ mx28_reg_32(hw_lradc_ch7);
+ mx28_reg_32(hw_lradc_delay0);
+ mx28_reg_32(hw_lradc_delay1);
+ mx28_reg_32(hw_lradc_delay2);
+ mx28_reg_32(hw_lradc_delay3);
+ mx28_reg_32(hw_lradc_debug0);
+ mx28_reg_32(hw_lradc_debug1);
+ mx28_reg_32(hw_lradc_conversion);
+ mx28_reg_32(hw_lradc_ctrl4);
+ mx28_reg_32(hw_lradc_treshold0);
+ mx28_reg_32(hw_lradc_treshold1);
+ mx28_reg_32(hw_lradc_version);
+};
+#endif
+
+#defineLRADC_CTRL0_SFTRST (1
31)
+#defineLRADC_CTRL0_CLKGATE (1
30)
+#defineLRADC_CTRL0_ONCHIP_GROUNDREF(1
26)
+#defineLRADC_CTRL0_BUTTON1_DETECT_ENABLE (1
25)
+#defineLRADC_CTRL0_BUTTON0_DETECT_ENABLE (1
24)
+#defineLRADC_CTRL0_TOUCH_DETECT_ENABLE (1
23)
+#defineLRADC_CTRL0_TOUCH_SCREEN_TYPE (1
22)
+#defineLRADC_CTRL0_YNLRSW (1
21)
+#defineLRADC_CTRL0_YPLLSW_MASK (0x3
19)
+#defineLRADC_CTRL0_YPLLSW_OFFSET 19
+#defineLRADC_CTRL0_XNURSW_MASK (0x3
17)
+#defineLRADC_CTRL0_XNURSW_OFFSET 17
+#defineLRADC_CTRL0_XPULSW (1
16)
+#defineLRADC_CTRL0_SCHEDULE_MASK 0xff
+#defineLRADC_CTRL0_SCHEDULE_OFFSET 0
+
+#defineLRADC_CTRL1_BUTTON1_DETECT_IRQ_EN (1
28)
+#defineLRADC_CTRL1_BUTTON0_DETECT_IRQ_EN (1
27)
+#defineLRADC_CTRL1_THRESHOLD1_DETECT_IRQ_EN(1
26)
+#defineLRADC_CTRL1_THRESHOLD0_DETECT_IRQ_EN(1
25)
+#defineLRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1
24)
+#defineLRADC_CTRL1_LRADC7_IRQ_EN (1
23)
+#defineLRADC_CTRL1_LRADC6_IRQ_EN (1
[U-Boot] [PATCH 09/13] i.MX28: Add LRADC init to i.MX28 SPL
From: Marek Vasut marek.va...@gmail.com
This code is part of battery boot support for i.MX28.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/Makefile |2 +-
arch/arm/cpu/arm926ejs/mx28/mx28_init.h |3 +
arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c | 86 ++
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 10 +++
4 files changed, 100 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
diff --git a/arch/arm/cpu/arm926ejs/mx28/Makefile
b/arch/arm/cpu/arm926ejs/mx28/Makefile
index a2e3f77..674a3af 100644
--- a/arch/arm/cpu/arm926ejs/mx28/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx28/Makefile
@@ -28,7 +28,7 @@ LIB = $(obj)lib$(SOC).o
COBJS = clock.o mx28.o iomux.o timer.o
ifdef CONFIG_SPL_BUILD
-COBJS += spl_boot.o spl_mem_init.o spl_power_init.o
+COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
endif
SRCS := $(START:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
b/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
index 8eac958..e3a4493 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28_init.h
@@ -39,4 +39,7 @@ static inline void mx28_power_wait_pswitch(void) { }
void mx28_mem_init(void);
uint32_t mx28_mem_get_size(void);
+void mx28_lradc_init(void);
+void mx28_lradc_enable_batt_measurement(void);
+
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
new file mode 100644
index 000..88a603c
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
@@ -0,0 +1,86 @@
+/*
+ * Freescale i.MX28 Battery measurement init
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include config.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+
+#include mx28_init.h
+
+void mx28_lradc_init(void)
+{
+ struct mx28_lradc_regs *regs = (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+
+ writel(LRADC_CTRL0_SFTRST, regs-hw_lradc_ctrl0_clr);
+ writel(LRADC_CTRL0_CLKGATE, regs-hw_lradc_ctrl0_clr);
+ writel(LRADC_CTRL0_ONCHIP_GROUNDREF, regs-hw_lradc_ctrl0_clr);
+
+ clrsetbits_le32(regs-hw_lradc_ctrl3,
+ LRADC_CTRL3_CYCLE_TIME_MASK,
+ LRADC_CTRL3_CYCLE_TIME_6MHZ);
+
+ clrsetbits_le32(regs-hw_lradc_ctrl4,
+ LRADC_CTRL4_LRADC7SELECT_MASK |
+ LRADC_CTRL4_LRADC6SELECT_MASK,
+ LRADC_CTRL4_LRADC7SELECT_CHANNEL7 |
+ LRADC_CTRL4_LRADC6SELECT_CHANNEL10);
+}
+
+void mx28_lradc_enable_batt_measurement(void)
+{
+ struct mx28_lradc_regs *regs = (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+
+ /* Check if the channel is present at all. */
+ if (!(readl(regs-hw_lradc_status) LRADC_STATUS_CHANNEL7_PRESENT))
+ return;
+
+ writel(LRADC_CTRL1_LRADC7_IRQ_EN, regs-hw_lradc_ctrl1_clr);
+ writel(LRADC_CTRL1_LRADC7_IRQ, regs-hw_lradc_ctrl1_clr);
+
+ clrsetbits_le32(regs-hw_lradc_conversion,
+ LRADC_CONVERSION_SCALE_FACTOR_MASK,
+ LRADC_CONVERSION_SCALE_FACTOR_LI_ION);
+ writel(LRADC_CONVERSION_AUTOMATIC, regs-hw_lradc_conversion_set);
+
+ /* Configure the channel. */
+ writel((1 7) LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
+ regs-hw_lradc_ctrl2_clr);
+ writel(0x, regs-hw_lradc_ch7_clr);
+ clrbits_le32(regs-hw_lradc_ch7, LRADC_CH_NUM_SAMPLES_MASK);
+ writel(LRADC_CH_ACCUMULATE, regs-hw_lradc_ch7_clr);
+
+ /* Schedule the channel. */
+ writel(1 7, regs-hw_lradc_ctrl0_set);
+
+ /* Start the channel sampling. */
+ writel(((1 7) LRADC_DELAY_TRIGGER_LRADCS_OFFSET) |
+ ((1 3) LRADC_DELAY_TRIGGER_DELAYS_OFFSET) |
+ 100, regs-hw_lradc_delay3);
+
+ writel(0x,
[U-Boot] [PATCH 10/13] i.MX28: Reorder battery status functions in SPL
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 120 --
1 file changed, 56 insertions(+), 64 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index dfb62eb..ac942b4 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -104,6 +104,62 @@ void mx28_power_set_linreg(void)
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW);
}
+int mx28_get_batt_volt(void)
+{
+ struct mx28_power_regs *power_regs =
+ (struct mx28_power_regs *)MXS_POWER_BASE;
+ uint32_t volt = readl(power_regs-hw_power_battmonitor);
+ volt = POWER_BATTMONITOR_BATT_VAL_MASK;
+ volt = POWER_BATTMONITOR_BATT_VAL_OFFSET;
+ volt *= 8;
+ return volt;
+}
+
+int mx28_is_batt_ready(void)
+{
+ return (mx28_get_batt_volt() = 3600);
+}
+
+int mx28_is_batt_good(void)
+{
+ struct mx28_power_regs *power_regs =
+ (struct mx28_power_regs *)MXS_POWER_BASE;
+ uint32_t volt = mx28_get_batt_volt();
+
+ if ((volt = 2400) (volt = 4300))
+ return 1;
+
+ clrsetbits_le32(power_regs-hw_power_5vctrl,
+ POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
+ 0x3 POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
+ writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK,
+ power_regs-hw_power_5vctrl_clr);
+
+ clrsetbits_le32(power_regs-hw_power_charge,
+ POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
+ POWER_CHARGE_STOP_ILIMIT_10MA | 0x3);
+
+ writel(POWER_CHARGE_PWD_BATTCHRG, power_regs-hw_power_charge_clr);
+ writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK,
+ power_regs-hw_power_5vctrl_clr);
+
+ early_delay(50);
+
+ volt = mx28_get_batt_volt();
+
+ if (volt = 3500)
+ return 0;
+
+ if (volt = 2400)
+ return 1;
+
+ writel(POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
+ power_regs-hw_power_charge_clr);
+ writel(POWER_CHARGE_PWD_BATTCHRG, power_regs-hw_power_charge_set);
+
+ return 0;
+}
+
void mx28_power_setup_5v_detect(void)
{
struct mx28_power_regs *power_regs =
@@ -486,22 +542,6 @@ void mx28_handle_5v_conflict(void)
}
}
-int mx28_get_batt_volt(void)
-{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
- uint32_t volt = readl(power_regs-hw_power_battmonitor);
- volt = POWER_BATTMONITOR_BATT_VAL_MASK;
- volt = POWER_BATTMONITOR_BATT_VAL_OFFSET;
- volt *= 8;
- return volt;
-}
-
-int mx28_is_batt_ready(void)
-{
- return (mx28_get_batt_volt() = 3600);
-}
-
void mx28_5v_boot(void)
{
struct mx28_power_regs *power_regs =
@@ -553,54 +593,6 @@ void mx28_switch_vddd_to_dcdc_source(void)
POWER_VDDDCTRL_DISABLE_STEPPING);
}
-int mx28_is_batt_good(void)
-{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
- uint32_t volt;
-
- volt = readl(power_regs-hw_power_battmonitor);
- volt = POWER_BATTMONITOR_BATT_VAL_MASK;
- volt = POWER_BATTMONITOR_BATT_VAL_OFFSET;
- volt *= 8;
-
- if ((volt = 2400) (volt = 4300))
- return 1;
-
- clrsetbits_le32(power_regs-hw_power_5vctrl,
- POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
- 0x3 POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
- writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK,
- power_regs-hw_power_5vctrl_clr);
-
- clrsetbits_le32(power_regs-hw_power_charge,
- POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
- POWER_CHARGE_STOP_ILIMIT_10MA | 0x3);
-
- writel(POWER_CHARGE_PWD_BATTCHRG, power_regs-hw_power_charge_clr);
- writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK,
- power_regs-hw_power_5vctrl_clr);
-
- early_delay(50);
-
- volt = readl(power_regs-hw_power_battmonitor);
- volt = POWER_BATTMONITOR_BATT_VAL_MASK;
- volt = POWER_BATTMONITOR_BATT_VAL_OFFSET;
- volt *= 8;
-
- if (volt = 3500)
- return 0;
-
- if (volt = 2400)
- return 1;
-
- writel(POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
- power_regs-hw_power_charge_clr);
- writel(POWER_CHARGE_PWD_BATTCHRG, power_regs-hw_power_charge_set);
-
- return 0;
-}
-
void mx28_power_configure_power_source(void)
{
mx28_src_power_init();
--
1.7.10
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[U-Boot] [PATCH 12/13] i.MX28: Check if WP detection is implemented at all
If the WP function is NULL, simply assume the card is always RW.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
drivers/mmc/mxsmmc.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 35c6bda..c7200ee 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -133,7 +133,8 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
/* READ or WRITE */
if (data-flags MMC_DATA_READ) {
ctrl0 |= SSP_CTRL0_READ;
- } else if (priv-mmc_is_wp(mmc-block_dev.dev)) {
+ } else if (priv-mmc_is_wp
+ priv-mmc_is_wp(mmc-block_dev.dev)) {
printf(MMC%d: Can not write a locked card!\n,
mmc-block_dev.dev);
return UNUSABLE_ERR;
--
1.7.10
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[U-Boot] [PATCH 11/13] i.MX28: Add battery boot components to SPL
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 100 +++---
1 file changed, 92 insertions(+), 8 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index ac942b4..4b09b0c 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -45,11 +45,11 @@ void mx28_power_clock2pll(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- writel(CLKCTRL_PLL0CTRL0_POWER,
- clkctrl_regs-hw_clkctrl_pll0ctrl0_set);
+ setbits_le32(clkctrl_regs-hw_clkctrl_pll0ctrl0,
+ CLKCTRL_PLL0CTRL0_POWER);
early_delay(100);
- writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
- clkctrl_regs-hw_clkctrl_clkseq_clr);
+ setbits_le32(clkctrl_regs-hw_clkctrl_clkseq,
+ CLKCTRL_CLKSEQ_BYPASS_CPU);
}
void mx28_power_clear_auto_restart(void)
@@ -455,9 +455,14 @@ void mx28_power_enable_4p2(void)
mx28_power_init_4p2_regulator();
/* Shutdown battery (none present) */
- clrbits_le32(power_regs-hw_power_dcdc4p2, POWER_DCDC4P2_BO_MASK);
- writel(POWER_CTRL_DCDC4P2_BO_IRQ, power_regs-hw_power_ctrl_clr);
- writel(POWER_CTRL_ENIRQ_DCDC4P2_BO, power_regs-hw_power_ctrl_clr);
+ if (!mx28_is_batt_ready()) {
+ clrbits_le32(power_regs-hw_power_dcdc4p2,
+ POWER_DCDC4P2_BO_MASK);
+ writel(POWER_CTRL_DCDC4P2_BO_IRQ,
+ power_regs-hw_power_ctrl_clr);
+ writel(POWER_CTRL_ENIRQ_DCDC4P2_BO,
+ power_regs-hw_power_ctrl_clr);
+ }
mx28_power_init_dcdc_4p2_source();
@@ -515,6 +520,50 @@ void mx28_powerdown(void)
power_regs-hw_power_reset);
}
+void mx28_batt_boot(void)
+{
+ struct mx28_power_regs *power_regs =
+ (struct mx28_power_regs *)MXS_POWER_BASE;
+
+ clrbits_le32(power_regs-hw_power_5vctrl, POWER_5VCTRL_PWDN_5VBRNOUT);
+ clrbits_le32(power_regs-hw_power_5vctrl, POWER_5VCTRL_ENABLE_DCDC);
+
+ clrbits_le32(power_regs-hw_power_dcdc4p2,
+ POWER_DCDC4P2_ENABLE_DCDC | POWER_DCDC4P2_ENABLE_4P2);
+ writel(POWER_CHARGE_ENABLE_LOAD, power_regs-hw_power_charge_clr);
+
+ /* 5V to battery handoff. */
+ setbits_le32(power_regs-hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
+ early_delay(30);
+ clrbits_le32(power_regs-hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
+
+ writel(POWER_CTRL_ENIRQ_DCDC4P2_BO, power_regs-hw_power_ctrl_clr);
+
+ clrsetbits_le32(power_regs-hw_power_minpwr,
+ POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS);
+
+ mx28_power_set_linreg();
+
+ clrbits_le32(power_regs-hw_power_vdddctrl,
+ POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG);
+
+ clrbits_le32(power_regs-hw_power_vddactrl,
+ POWER_VDDACTRL_DISABLE_FET | POWER_VDDACTRL_ENABLE_LINREG);
+
+ clrbits_le32(power_regs-hw_power_vddioctrl,
+ POWER_VDDIOCTRL_DISABLE_FET);
+
+ setbits_le32(power_regs-hw_power_5vctrl,
+ POWER_5VCTRL_PWD_CHARGE_4P2_MASK);
+
+ setbits_le32(power_regs-hw_power_5vctrl,
+ POWER_5VCTRL_ENABLE_DCDC);
+
+ clrsetbits_le32(power_regs-hw_power_5vctrl,
+ POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
+ 0x8 POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
+}
+
void mx28_handle_5v_conflict(void)
{
struct mx28_power_regs *power_regs =
@@ -539,6 +588,11 @@ void mx28_handle_5v_conflict(void)
mx28_powerdown();
break;
}
+
+ if (tmp POWER_STS_PSWITCH_MASK) {
+ mx28_batt_boot();
+ break;
+ }
}
}
@@ -595,12 +649,42 @@ void mx28_switch_vddd_to_dcdc_source(void)
void mx28_power_configure_power_source(void)
{
+ int batt_ready, batt_good;
+ struct mx28_power_regs *power_regs =
+ (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mx28_lradc_regs *lradc_regs =
+ (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+
mx28_src_power_init();
- mx28_5v_boot();
+ batt_ready = mx28_is_batt_ready();
+
+ if (readl(power_regs-hw_power_sts) POWER_STS_VDD5V_GT_VDDIO) {
+ batt_good = mx28_is_batt_good();
+ if (batt_ready) {
+ /* 5V source detected, good battery detected. */
+ mx28_batt_boot();
+ } else {
+ if (batt_good)
[U-Boot] [PATCH 13/13] i.MX28: Avoid redefining serial_put[cs]()
Do not define serial_putc() and serial_puts() calls if
CONFIG_SPL_SERIAL_SUPPORT is set.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/spl_boot.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index c9b4566..a6dfca3 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -123,8 +123,10 @@ inline void board_init_r(gd_t *id, ulong dest_addr)
;
}
+#ifndef CONFIG_SPL_SERIAL_SUPPORT
void serial_putc(const char c) {}
void serial_puts(const char *s) {}
+#endif
void hang(void) __attribute__ ((noreturn));
void hang(void)
{
--
1.7.10
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Re: [U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings
Dear Eric Nelson, On 05/01/2012 12:25 PM, Marek Vasut wrote: Dear Eric Nelson, Signed-off-by: Eric Nelsoneric.nel...@boundarydevices.com --- V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand. V3 returns immediately from setup_sata() if enable_sata_clock() returns an error. V4 removes extra #include and addresses a style issue as discussed on the ML. It's still there ;-) snip + |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V + |IOMUXC_GPR13_SATA_PHY_1_SLOW); + + return 0 ; here :-) My eyes are clearly not as finely tuned as yours... 1 dioptry on left eye, lazy-eye blindness on the right one ;-) thought to self What are the odd that I could tweak checkpatch.pl without introducing another style issue? /thought to self That'd be awesome. V5 forthcoming... Thanks :) Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] USB: S5P: Add ehci support
Dear Rajeshwari Shinde,
This patch adds ehci driver support for s5p.
It'd be awesome if you CCed me ;-)
Also, it might be worth CCing Lukasz?
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/include/asm/arch-exynos/ehci-s5p.h | 66
drivers/usb/host/Makefile |1 +
drivers/usb/host/ehci-s5p.c | 113
+++ 3 files changed, 180 insertions(+), 0
deletions(-)
create mode 100755 arch/arm/include/asm/arch-exynos/ehci-s5p.h
create mode 100644 drivers/usb/host/ehci-s5p.c
diff --git a/arch/arm/include/asm/arch-exynos/ehci-s5p.h
b/arch/arm/include/asm/arch-exynos/ehci-s5p.h new file mode 100755
index 000..68feb85
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/ehci-s5p.h
@@ -0,0 +1,66 @@
+/*
+ * SAMSUNG S5P USB HOST EHCI Controller
+ *
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * Vivek Gautam gautam.vi...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__
+#define __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__
+
+#define CLK_24MHZ5
+
+#define HOST_CTRL0_PHYSWRSTALL (1 31)
+#define HOST_CTRL0_COMMONON_N(1 9)
+#define HOST_CTRL0_SIDDQ (1 6)
+#define HOST_CTRL0_FORCESLEEP(1 5)
+#define HOST_CTRL0_FORCESUSPEND (1 4)
+#define HOST_CTRL0_WORDINTERFACE (1 3)
+#define HOST_CTRL0_UTMISWRST (1 2)
+#define HOST_CTRL0_LINKSWRST (1 1)
+#define HOST_CTRL0_PHYSWRST (1 0)
+
+#define HOST_CTRL0_FSEL_MASK (7 16)
+
+#define EHCICTRL_ENAINCRXALIGN (1 29)
+#define EHCICTRL_ENAINCR4(1 28)
+#define EHCICTRL_ENAINCR8(1 27)
+#define EHCICTRL_ENAINCR16 (1 26)
+
+/* Register map for PHY control */
+struct s5p_usb_phy {
+ unsigned int usbphyctrl0;
+ unsigned int usbphytune0;
+ unsigned int reserved1[2];
+ unsigned int hsicphyctrl1;
+ unsigned int hsicphytune1;
+ unsigned int reserved2[2];
+ unsigned int hsicphyctrl2;
+ unsigned int hsicphytune2;
+ unsigned int reserved3[2];
+ unsigned int ehcictrl;
+ unsigned int ohcictrl;
+ unsigned int usbotgsys;
+ unsigned int reserved4;
+ unsigned int usbotgtune;
+};
+
+/* Switch on the VBUS power. */
+int board_usb_vbus_init(void);
+
+#endif /* __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__ */
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 0d4657e..59c3e57 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -50,6 +50,7 @@ COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
COBJS-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
COBJS-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
+COBJS-$(CONFIG_USB_EHCI_S5P) += ehci-s5p.o
COBJS-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
COBJS-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c
new file mode 100644
index 000..ac9f061
--- /dev/null
+++ b/drivers/usb/host/ehci-s5p.c
@@ -0,0 +1,113 @@
+/*
+ * SAMSUNG S5P USB HOST EHCI Controller
+ *
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * Vivek Gautam gautam.vi...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
[U-Boot] [PATCH] powerpc/85xx: fix NAND boot linker scripts for -fpic
GOT is now handled the way the main u-boot.lds does it. Without this,
the boot hangs when built with newer GCC (since 4.6). Older toolchains
hid the issue by converting -fpic to -fPIC.
Signed-off-by: Scott Wood scottw...@freescale.com
---
arch/powerpc/cpu/mpc85xx/u-boot-nand.lds |5 +++--
arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds |4 +++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds
b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds
index b1a1dac..8ba9399 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds
@@ -51,13 +51,14 @@ SECTIONS
PROVIDE (erotext = .);
.reloc :
{
-KEEP(*(.got))
_GOT2_TABLE_ = .;
KEEP(*(.got2))
+KEEP(*(.got))
+PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
_FIXUP_TABLE_ = .;
KEEP(*(.fixup))
}
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) 2;
+ __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) 2) - 1;
__fixup_entries = (. - _FIXUP_TABLE_) 2;
.data:
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds
b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds
index 852f9aa..668158f 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds
@@ -37,10 +37,12 @@ SECTIONS
.reloc : {
_GOT2_TABLE_ = .;
KEEP(*(.got2))
+ KEEP(*(.got))
+ PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
_FIXUP_TABLE_ = .;
KEEP(*(.fixup))
}
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) 2;
+ __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) 2) - 1;
__fixup_entries = (. - _FIXUP_TABLE_) 2;
. = ALIGN(8);
--
1.7.7.rc3.4.g8d714
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Re: [U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings
On 05/01/2012 02:11 PM, Marek Vasut wrote: Dear Eric Nelson, On 05/01/2012 12:25 PM, Marek Vasut wrote: Dear Eric Nelson, Signed-off-by: Eric Nelsoneric.nel...@boundarydevices.com --- V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand. V3 returns immediately from setup_sata() if enable_sata_clock() returns an error. V4 removes extra #include and addresses a style issue as discussed on the ML. It's still there ;-) snip + |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V + |IOMUXC_GPR13_SATA_PHY_1_SLOW); + + return 0 ; here :-) My eyes are clearly not as finely tuned as yours... 1 dioptry on left eye, lazy-eye blindness on the right one ;-) For all that, you seem to see quite well! thought to self What are the odd that I could tweak checkpatch.pl without introducing another style issue? /thought to self That'd be awesome. Forthcoming... ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] checkpatch: warn of whitespace before semicolon at end of line.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
tools/checkpatch.pl |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/tools/checkpatch.pl b/tools/checkpatch.pl
index 2048a44..0caffcb 100755
--- a/tools/checkpatch.pl
+++ b/tools/checkpatch.pl
@@ -3139,6 +3139,12 @@ sub process {
Statements terminations use 1 semicolon\n .
$herecurr);
}
+# check for multiple semicolons
+ if ($line =~ /\s+;$/) {
+ WARN(SPACEBEFORE_SEMICOLON,
+Blank before semicolon\n . $herecurr);
+ }
+
# check for gcc specific __FUNCTION__
if ($line =~ /__FUNCTION__/) {
WARN(USE_FUNC,
--
1.7.9
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Re: [U-Boot] [PATCH] checkpatch: warn of whitespace before semicolon at end of line.
Dear Eric Nelson,
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
tools/checkpatch.pl |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/tools/checkpatch.pl b/tools/checkpatch.pl
index 2048a44..0caffcb 100755
--- a/tools/checkpatch.pl
+++ b/tools/checkpatch.pl
@@ -3139,6 +3139,12 @@ sub process {
Statements terminations use 1 semicolon\n .
$herecurr);
}
+# check for multiple semicolons
Are you sure about the comment ^ ;-)
+ if ($line =~ /\s+;$/) {
+ WARN(SPACEBEFORE_SEMICOLON,
+ Blank before semicolon\n . $herecurr);
+ }
+
# check for gcc specific __FUNCTION__
if ($line =~ /__FUNCTION__/) {
WARN(USE_FUNC,
Best regards,
Marek Vasut
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[U-Boot] [PATCH V2] checkpatch: warn of whitespace before semicolon at end of line.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
tools/checkpatch.pl |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/tools/checkpatch.pl b/tools/checkpatch.pl
index 2048a44..0caffcb 100755
--- a/tools/checkpatch.pl
+++ b/tools/checkpatch.pl
@@ -3139,6 +3139,12 @@ sub process {
Statements terminations use 1 semicolon\n .
$herecurr);
}
+# check for whitespace before semicolon (not allowed at end-of-line)
+ if ($line =~ /\s+;$/) {
+ WARN(SPACEBEFORE_SEMICOLON,
+Blank before semicolon\n . $herecurr);
+ }
+
# check for gcc specific __FUNCTION__
if ($line =~ /__FUNCTION__/) {
WARN(USE_FUNC,
--
1.7.9
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Re: [U-Boot] [PATCH V2] checkpatch: warn of whitespace before semicolon at end of line.
Dear Eric Nelson,
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
tools/checkpatch.pl |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/tools/checkpatch.pl b/tools/checkpatch.pl
index 2048a44..0caffcb 100755
--- a/tools/checkpatch.pl
+++ b/tools/checkpatch.pl
@@ -3139,6 +3139,12 @@ sub process {
Statements terminations use 1 semicolon\n .
$herecurr);
}
+# check for whitespace before semicolon (not allowed at end-of-line)
+ if ($line =~ /\s+;$/) {
+ WARN(SPACEBEFORE_SEMICOLON,
+ Blank before semicolon\n . $herecurr);
+ }
+
# check for gcc specific __FUNCTION__
if ($line =~ /__FUNCTION__/) {
WARN(USE_FUNC,
Coolness, now let's also CC the linux (upstream) checkpatch author, to get it
properly upstreamed :)
For me, add
Acked-by: Marek Vasut ma...@denx.de
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH V2] checkpatch: warn of whitespace before semicolon at end of line.
On 05/01/2012 04:11 PM, Marek Vasut wrote:
Dear Eric Nelson,
Signed-off-by: Eric Nelsoneric.nel...@boundarydevices.com
---
tools/checkpatch.pl |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/tools/checkpatch.pl b/tools/checkpatch.pl
index 2048a44..0caffcb 100755
--- a/tools/checkpatch.pl
+++ b/tools/checkpatch.pl
@@ -3139,6 +3139,12 @@ sub process {
Statements terminations use 1 semicolon\n .
$herecurr);
}
+# check for whitespace before semicolon (not allowed at end-of-line)
+ if ($line =~ /\s+;$/) {
+ WARN(SPACEBEFORE_SEMICOLON,
+Blank before semicolon\n . $herecurr);
+ }
+
# check for gcc specific __FUNCTION__
if ($line =~ /__FUNCTION__/) {
WARN(USE_FUNC,
Coolness, now let's also CC the linux (upstream) checkpatch author, to get it
properly upstreamed :)
That looks to be Andy.
It's not clear to me that this is a style violation though:
http://www.kernel.org/doc/Documentation/CodingStyle
Andy, we're discussing the inclusion of a test in checkpatch for
space before semicolon at the end-of line to catch my bad habits
like this:
return 0 ;
For me, add
Acked-by: Marek Vasutma...@denx.de
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Re: [U-Boot] [PATCH 2/2 v8] Add support for MINI2440 (s3c2440).
On 30 April 2012 22:38, Gabriel Huau cont...@huau-gabriel.fr wrote: Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr --- Changes for v2: - Coding style cleanup - Remove unnecessary files modification - Remove unnecessary board configuration set Changes for v3: - Coding style cleanup - Move some macro definition from lowlevel_init.S to a new header - Remove some magic bloat with I/O board initialization - Add a pll_delay and replace loop by it - Somme cleanup in the configuration file - Cancel modifications on an SoC specific header - Add my name to copyright Changes for v4: - Move dram init to dram_init() instead low_levelinit - Remove u -boot env from configuration file and change the address of initial SP - Remove PLL init, now it's SoC specific Changes for v5: - Clean up configuration file - Add a MAINTAINERS entry - Add a README.mini2440 file - Use gpio/iomux interface in case of magic numbers - Use get_ram_size() Changes for v6: - Coding style cleanup - Remove some unused define in the board config Changes for v7: - Cleanup coding style - Changement of the commit message Changes for v8: - Replace define[tab] by define[space] MAINTAINERS | 4 + board/friendlyarm/mini2440/Makefile | 44 board/friendlyarm/mini2440/mini2440.c | 134 board/friendlyarm/mini2440/mini2440.h | 144 + boards.cfg | 1 + doc/README.mini2440 | 28 + include/configs/mini2440.h | 186 + 7 files changed, 541 insertions(+) create mode 100644 board/friendlyarm/mini2440/Makefile create mode 100644 board/friendlyarm/mini2440/mini2440.c create mode 100644 board/friendlyarm/mini2440/mini2440.h create mode 100644 doc/README.mini2440 create mode 100644 include/configs/mini2440.h diff --git a/MAINTAINERS b/MAINTAINERS index 708ded7..2611fb5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -566,6 +566,10 @@ Unknown / orphaned boards: # Board CPU # # +Gabriel HUAU cont...@huau-gabriel.fr + + mini2440 s3c2440 + Please keep this list to alphabetically. (by last name) Albert ARIBAUD albert.u.b...@aribaud.net edminiv2 ARM926EJS (Orion5x SoC) Thanks. Minkyu Kang. -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2 v9] ARM : Add support for MINI2440 (s3c2440).
On 30 April 2012 23:11, Gabriel Huau cont...@huau-gabriel.fr wrote: Support of the MINI2440 board from FriendlyARM from an old version of u-boot : http://repo.or.cz/r/u-boot-openmoko/mini2440.git Currently, supporting only boot from NOR. Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr --- Changes for v2: - Coding style cleanup - Remove unnecessary files modification - Remove unnecessary board configuration set Changes for v3: - Coding style cleanup - Move some macro definition from lowlevel_init.S to a new header - Remove some magic bloat with I/O board initialization - Add a pll_delay and replace loop by it - Somme cleanup in the configuration file - Cancel modifications on an SoC specific header - Add my name to copyright Changes for v4: - Move dram init to dram_init() instead low_levelinit - Remove u -boot env from configuration file and change the address of initial SP - Remove PLL init, now it's SoC specific Changes for v5: - Clean up configuration file - Add a MAINTAINERS entry - Add a README.mini2440 file - Use gpio/iomux interface in case of magic numbers - Use get_ram_size() Changes for v6: - Coding style cleanup - Remove some unused define in the board config Changes for v7: - Cleanup coding style - Changement of the commit message Changes for v8: - Replace define[tab] by define[space] Changes for v9: - Add a nice commit message MAINTAINERS | 4 + board/friendlyarm/mini2440/Makefile | 44 board/friendlyarm/mini2440/mini2440.c | 134 board/friendlyarm/mini2440/mini2440.h | 144 + boards.cfg | 1 + doc/README.mini2440 | 28 + include/configs/mini2440.h | 186 + 7 files changed, 541 insertions(+) create mode 100644 board/friendlyarm/mini2440/Makefile create mode 100644 board/friendlyarm/mini2440/mini2440.c create mode 100644 board/friendlyarm/mini2440/mini2440.h create mode 100644 doc/README.mini2440 create mode 100644 include/configs/mini2440.h diff --git a/MAINTAINERS b/MAINTAINERS index 708ded7..2611fb5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -566,6 +566,10 @@ Unknown / orphaned boards: # Board CPU # # +Gabriel HUAU cont...@huau-gabriel.fr + + mini2440 s3c2440 + Please keep this list to alphabetically. (by last name) Albert ARIBAUD albert.u.b...@aribaud.net edminiv2 ARM926EJS (Orion5x SoC) Thanks. Minkyu Kang. -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2 v4] ARM : Add GPIO Driver and IOMUX definition for S3C2440
Dear Gabriel Huau,
On 30 April 2012 23:11, Gabriel Huau cont...@huau-gabriel.fr wrote:
It's now possible to use the gpio driver interface
for s3c2440. This patch add iomux definitions too.
Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr
---
Changes for v2:
- Modification of the coding style
- Add my email address to copyright
- Remove a typedef
- Move some defines to driver file
Changes for v3:
- Cleanup coding style
- Changement of the commit message
Changes for v4:
- Add a nice commit message
arch/arm/include/asm/arch-s3c24x0/gpio.h | 171
arch/arm/include/asm/arch-s3c24x0/iomux.h | 200
+
drivers/gpio/Makefile | 1 +
drivers/gpio/s3c2440_gpio.c | 94 ++
4 files changed, 466 insertions(+)
create mode 100644 arch/arm/include/asm/arch-s3c24x0/gpio.h
create mode 100644 arch/arm/include/asm/arch-s3c24x0/iomux.h
create mode 100644 drivers/gpio/s3c2440_gpio.c
diff --git a/drivers/gpio/s3c2440_gpio.c b/drivers/gpio/s3c2440_gpio.c
new file mode 100644
index 000..12a9043
--- /dev/null
+++ b/drivers/gpio/s3c2440_gpio.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2012
+ * Gabriel Huau cont...@huau-gabriel.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include common.h
+#include asm/arch/s3c2440.h
+#include asm/gpio.h
+#include asm/io.h
+
+#define GPIO_INPUT 0x0
+#define GPIO_OUTPUT 0x1
+
+/* 0x4 means that we want DAT and not CON register */
+#define GPIO_PORT(x) x) 5) 0x3) + 0x4)
+#define GPIO_BIT(x) ((x) 0x3f)
+
+/*
+ * It's how we calculate the full port address
+ * We have to get the number of the port + 1 (Port A is at 0x5601 ...)
+ * We move it at the second digit, and finally we add 0x4 because we want
+ * to modify GPIO DAT and not CON
+ */
+#define GPIO_FULLPORT(x) (S3C24X0_GPIO_BASE | ((GPIO_PORT(gpio) + 1) 1))
+
+int gpio_set_value(unsigned gpio, int value)
+{
+ unsigned l = readl(GPIO_FULLPORT(gpio));
+ unsigned port = GPIO_FULLPORT(gpio);
+
+ /*
+ * All GPIO Port have a configuration on
+ * 2 bits excepted the first GPIO (A) which
+ * have only 1 bit of configuration.
+ */
+ if (value)
+ if (!GPIO_PORT(gpio))
+ l |= (0x1 GPIO_BIT(gpio));
+ else
+ l |= (0x3 GPIO_BIT(gpio));
+ else
+ if (!GPIO_PORT(gpio))
+ l = ~(0x1 GPIO_BIT(gpio));
+ else
+ l = ~(0x3 GPIO_BIT(gpio));
Need brace at this if..else statement.
+ return writel(port, l);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ unsigned l = readl(GPIO_FULLPORT(gpio));
+
+ if (GPIO_PORT(gpio) == 0) /* PORT A */
+ return (l GPIO_BIT(gpio)) 0x1;
+ return (l GPIO_BIT(gpio)) 0x3;
+}
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ return writel(GPIO_FULLPORT(gpio), GPIO_INPUT GPIO_BIT(gpio));
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ writel(GPIO_FULLPORT(gpio), GPIO_OUTPUT GPIO_BIT(gpio));
+ return gpio_set_value(gpio, value);
+}
--
1.7.9.5
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[U-Boot] [PATCH] disk: generate GUID Partiton Tables
This patch manipulates GUID Papartition Tables.
I send this patch on behalf of Gwuieon Jin.
Signed-off-by: Gwuieon Jin ge@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
disk/part_efi.c | 107 +++
disk/part_efi.h |2 +
include/part.h |2 +
3 files changed, 111 insertions(+), 0 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index b6cda57..ce25ad5 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -433,4 +433,111 @@ static int is_pte_valid(gpt_entry * pte)
return 1;
}
}
+
+void set_gpt_table(block_dev_desc_t *dev_desc, unsigned int part_start_lba,
+ int parts, unsigned int *blocks, unsigned int *part_offset)
+{
+ legacy_mbr protective_mbr;
+ gpt_header p_gpt_head, s_gpt_head;
+ gpt_entry p_gpt_entry[GPT_ENTRY_NUMBERS],
+ s_gpt_entry[GPT_ENTRY_NUMBERS];
+ efi_guid_t disk_uuid, part_uuid;
+ unsigned long crc32_tmp, tmp_val;
+ unsigned int size = 0;
+ unsigned int offset = part_start_lba;
+ int i;
+
+ memset(protective_mbr, 0, sizeof(legacy_mbr));
+ memset(p_gpt_head, 0, sizeof(gpt_header));
+ memset(s_gpt_head, 0, sizeof(gpt_header));
+ memset(p_gpt_entry, 0, GPT_ENTRY_NUMBERS * sizeof(gpt_entry));
+ memset(s_gpt_entry, 0, GPT_ENTRY_NUMBERS * sizeof(gpt_entry));
+
+ /* protective MBR (LBA0) */
+ *(unsigned short *) protective_mbr.signature = MSDOS_MBR_SIGNATURE;
+ protective_mbr.partition_record[0].sys_ind = EFI_PMBR_OSTYPE_EFI_GPT;
+ tmp_val = 1UL;
+ memcpy(protective_mbr.partition_record[0].start_sect, tmp_val, 4);
+ tmp_val = (unsigned long) (dev_desc-lba - 1);
+ memcpy(protective_mbr.partition_record[0].nr_sects, tmp_val, 4);
+ dev_desc-block_write(dev_desc-dev, 0, 1, protective_mbr);
+
+ /* primary GPT header (LBA1) */
+ *(unsigned long long *) p_gpt_head.signature = GPT_HEADER_SIGNATURE;
+ *(unsigned long *) p_gpt_head.revision = GPT_HEADER_REVISION_V1;
+ *(unsigned long *) p_gpt_head.header_size = sizeof(gpt_header);
+ *(unsigned long long *) p_gpt_head.my_lba = 1;
+ *(unsigned long long *) p_gpt_head.alternate_lba = dev_desc-lba - 1;
+ *(unsigned long long *) p_gpt_head.first_usable_lba = 34;
+ *(unsigned long long *) p_gpt_head.last_usable_lba = dev_desc-lba - 34;
+ *(unsigned long long *) p_gpt_head.partition_entry_lba = 2;
+ *(unsigned long *) p_gpt_head.num_partition_entries = GPT_ENTRY_NUMBERS;
+ *(unsigned long *) p_gpt_head.sizeof_partition_entry = GPT_ENTRY_SIZE;
+ *(unsigned long *) p_gpt_head.header_crc32 = 0;
+ *(unsigned long *) p_gpt_head.partition_entry_array_crc32 = 0;
+
+ /* primary partition entrys (LBA2-33) */
+ for (i = 0; i parts; i++) {
+ memcpy(p_gpt_entry[i].partition_type_guid.b,
+ PARTITION_BASIC_DATA_GUID, 16);
+
+ *(unsigned long long *) p_gpt_entry[i].starting_lba = offset;
+ /* allocate remaining memory in last partition */
+ if (i != parts - 1)
+ *(unsigned long long *) p_gpt_entry[i].ending_lba =
+ offset + blocks[i] - 1;
+ else
+ *(unsigned long long *) p_gpt_entry[i].ending_lba =
+ dev_desc-lba - 33;
+ memset(p_gpt_entry[i].attributes, 0,
+ sizeof(gpt_entry_attributes));
+ part_offset[i] = offset;
+ offset += blocks[i];
+ }
+
+ crc32_tmp = efi_crc32((const unsigned char *)p_gpt_entry,
+ le32_to_int(p_gpt_head.num_partition_entries) *
+ le32_to_int(p_gpt_head.sizeof_partition_entry));
+ memcpy(p_gpt_head.partition_entry_array_crc32, crc32_tmp,
+ sizeof(crc32_tmp));
+
+ crc32_tmp = efi_crc32((const unsigned char *)p_gpt_head,
+ le32_to_int(p_gpt_head.header_size));
+ memcpy(p_gpt_head.header_crc32, crc32_tmp, sizeof(crc32_tmp));
+
+ dev_desc-block_write(dev_desc-dev, 1, 1, p_gpt_head);
+ dev_desc-block_write(dev_desc-dev, 2, 32, p_gpt_entry);
+
+ /* secondary partition entrys */
+ memcpy(s_gpt_entry, p_gpt_entry,
+ GPT_ENTRY_NUMBERS * sizeof(gpt_entry));
+
+ /* secondary gpt header */
+ memcpy(s_gpt_head, p_gpt_head, sizeof(gpt_header));
+ *(unsigned long long *) s_gpt_head.my_lba =
+ le64_to_int(p_gpt_head.alternate_lba);
+ *(unsigned long long *) s_gpt_head.alternate_lba =
+ le64_to_int(p_gpt_head.my_lba);
+ *(unsigned long long *) s_gpt_head.partition_entry_lba =
+ le64_to_int(p_gpt_head.last_usable_lba) + 1;
+ *(unsigned long *) s_gpt_head.header_crc32 = 0;
+
Re: [U-Boot] [PATCH 0/2] Replace yaffs2 with new version
On Monday 30 April 2012 16:40:16 Wolfgang Denk wrote: Dear Charles Manning, In message 1335739336-2942-1-git-send-email-cdhmann...@gmail.com you wrote: This patch set replaces fs/yaffs2 with a new version. This new version is faster and also adds the ability to dynamically add yaffs2 mount points which makes configuration far simpler. Sorry, but it doesn't work like this. You cannot remove all code in one patch and re-add it in another, as this will break bisectability. This must be done in a single commit. Also, please run your new code through checkpatch, and clean it up before resubmitting. Current status is: Ok, so one huge patch that passes (or close) checkpatch will be acceptable? I have spent the last couple of days cleaning things up so I hope it will be. I am having problems with the yaffs git server so when that is sorted, I'll make another u-boot patch and send that. -- CHarles ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2 v4] ARM : Add GPIO Driver and IOMUX definition for S3C2440
Dear Minkyu Kang,
Dear Gabriel Huau,
On 30 April 2012 23:11, Gabriel Huau cont...@huau-gabriel.fr wrote:
It's now possible to use the gpio driver interface
for s3c2440. This patch add iomux definitions too.
Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr
---
Changes for v2:
- Modification of the coding style
- Add my email address to copyright
- Remove a typedef
- Move some defines to driver file
Changes for v3:
- Cleanup coding style
- Changement of the commit message
Changes for v4:
- Add a nice commit message
arch/arm/include/asm/arch-s3c24x0/gpio.h | 171
arch/arm/include/asm/arch-s3c24x0/iomux.h |
200 + drivers/gpio/Makefile
|1 +
drivers/gpio/s3c2440_gpio.c | 94 ++
4 files changed, 466 insertions(+)
create mode 100644 arch/arm/include/asm/arch-s3c24x0/gpio.h
create mode 100644 arch/arm/include/asm/arch-s3c24x0/iomux.h
create mode 100644 drivers/gpio/s3c2440_gpio.c
diff --git a/drivers/gpio/s3c2440_gpio.c b/drivers/gpio/s3c2440_gpio.c
new file mode 100644
index 000..12a9043
--- /dev/null
+++ b/drivers/gpio/s3c2440_gpio.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2012
+ * Gabriel Huau cont...@huau-gabriel.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include common.h
+#include asm/arch/s3c2440.h
+#include asm/gpio.h
+#include asm/io.h
+
+#define GPIO_INPUT 0x0
+#define GPIO_OUTPUT 0x1
+
+/* 0x4 means that we want DAT and not CON register */
+#define GPIO_PORT(x) x) 5) 0x3) + 0x4)
+#define GPIO_BIT(x)((x) 0x3f)
+
+/*
+ * It's how we calculate the full port address
+ * We have to get the number of the port + 1 (Port A is at 0x5601
...) + * We move it at the second digit, and finally we add 0x4 because
we want + * to modify GPIO DAT and not CON
+ */
+#define GPIO_FULLPORT(x) (S3C24X0_GPIO_BASE | ((GPIO_PORT(gpio) + 1)
1)) +
+int gpio_set_value(unsigned gpio, int value)
+{
+ unsigned l = readl(GPIO_FULLPORT(gpio));
+ unsigned port = GPIO_FULLPORT(gpio);
+
+ /*
+* All GPIO Port have a configuration on
+* 2 bits excepted the first GPIO (A) which
+* have only 1 bit of configuration.
+*/
+ if (value)
+ if (!GPIO_PORT(gpio))
+ l |= (0x1 GPIO_BIT(gpio));
+ else
+ l |= (0x3 GPIO_BIT(gpio));
+ else
+ if (!GPIO_PORT(gpio))
+ l = ~(0x1 GPIO_BIT(gpio));
+ else
+ l = ~(0x3 GPIO_BIT(gpio));
Need brace at this if..else statement.
I wanted to ask why, but ... C isn't python, good point ;-)
+ return writel(port, l);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ unsigned l = readl(GPIO_FULLPORT(gpio));
+
+ if (GPIO_PORT(gpio) == 0) /* PORT A */
+ return (l GPIO_BIT(gpio)) 0x1;
+ return (l GPIO_BIT(gpio)) 0x3;
+}
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ return writel(GPIO_FULLPORT(gpio), GPIO_INPUT GPIO_BIT(gpio));
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ writel(GPIO_FULLPORT(gpio), GPIO_OUTPUT GPIO_BIT(gpio));
+ return gpio_set_value(gpio, value);
+}
--
1.7.9.5
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[U-Boot] [PATCH] OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree
From: Jon Hunter jon-hun...@ti.com For OMAP4 boards, such as the panda-es, that have 1GB of memory the linux kernel fails to locate the device tree blob on boot. The reason being is that u-boot is copying the DT blob to the upper part of RAM when booting the kernel and the kernel is unable to access the blob. By setting the fdt_high variable to either 0x (to prevent the copy) or 0xac00 (704MB boundary of memory for OMAP4) the kernel is able to locate the DT blob and boot. Based upon following patch by Dirk Behme set the fdt_high variable to allow booting with device tree on OMAP4 boards. 7e9603e i.mx6q: configs: Add fdt_high and initrd_high variables Cc: Sricharan R r.sricha...@ti.com Cc: Sandeep Paulraj s-paul...@ti.com Cc: Tom Rini tr...@ti.com Signed-off-by: Jon Hunter jon-hun...@ti.com --- include/configs/omap4_common.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index a989721..d31cbb5 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -151,6 +151,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ loadaddr=0x8200\0 \ console=ttyO2,115200n8\0 \ + fdt_high=0x\0 \ usbtty=cdc_acm\0 \ vram=16M\0 \ mmcdev=0\0 \ -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] uboot and ZFS
Sorry if I am posting some kind of FAQ here, I recently picked up a Cubox (arm) which uses uboot. Added ZFS to Linux and made it have a ZFS root filesystem. The only drawback is the small boot partition of ext2/fat to read uImage and initrd. So I am curious about adding ZFS support to uboot. Looking at the sources http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=tree in particular, the ext2 work, I see it was once imported from GRUB. Comparing that with https://github.com/pendor/grub-zfs/tree/master/grub-core/fs/zfs which is a fork for ZFS support to GRUB. At first glance, it would suggest that it should be feasible to add ZFS to uboot. But since I only have 'usage-level knowledge' of both boot systems, I am unaware of any show-stoppers. Perhaps memory/object-size is an issue? The ext2 code is some ~1100 lines in uboot, but ZFS is 2700 lines in GRUB. Or any of a thousand other issues I am unaware about. Anyone already attempted such a project? Any resources available for such porting? Will I even be able to run my own version of uboot on the Cubox? Lund -- Jorgen Lundman | lund...@lundman.net Unix Administrator | +81 (0)3 -5456-2687 ext 1017 (work) Shibuya-ku, Tokyo| +81 (0)90-5578-8500 (cell) Japan| +81 (0)3 -3375-1767 (home) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
