[U-Boot] mpc85xx: Memory diagnostics run with cache enabled?
Hello List, I'm taking a look at the memory diagnostics, specially for PowerPC mpc85xx family CPUs. It seems to me that currently all the memory diagnostics on mpc85xx are run with cache enabled, and memory mapped using cache-enabled TLB entries. Isn't it true that in such a case all the memory reads / writes would actually land up in cache (unless they are spaced out), and the memory diagnostics won't really be reliable? Are the memory diagnostics written with keeping in mind that the cache may be enabled? The diagnostic code (post/drivers/memory.c) does give architecture code (arch/powerpc/cpu/mpc85xx/cpu.c) a chance to prepare for running memory diagnostics, but it does not look like the CPU code is really disabling the cache. What am I missing? Thanks, Rajat ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] openrisc: Work around potential relocation issues
When reset code is in flash, the jump instructions emitted by the compiler are
relative instead of absolute jumps.
A fix to the reset code to make correct jumps to the beginning of code
relocated to RAM have also been added.
Signed-off-by: Julius Baxter juliusbax...@gmail.com
---
arch/openrisc/cpu/cpu.c |6 +-
arch/openrisc/cpu/start.S | 13 -
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/openrisc/cpu/cpu.c b/arch/openrisc/cpu/cpu.c
index 25cd624..73ecc6f 100644
--- a/arch/openrisc/cpu/cpu.c
+++ b/arch/openrisc/cpu/cpu.c
@@ -151,7 +151,11 @@ extern void __reset(void);
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
disable_interrupts();
- __reset();
+ /* Code the jump to __reset here as the compiler is prone to
+ emitting a bad jump instruction if the function is in flash */
+ __asm__(l.movhi r1,hi(__reset); \
+ l.ori r1,r1,lo(__reset); \
+ l.jr r1);
/* not reached, __reset does not return */
return 0;
}
diff --git a/arch/openrisc/cpu/start.S b/arch/openrisc/cpu/start.S
index 3a42717..39c80e1 100644
--- a/arch/openrisc/cpu/start.S
+++ b/arch/openrisc/cpu/start.S
@@ -26,8 +26,11 @@
#define HANDLE_EXCEPTION \
l.addi r1, r1, -EXCEPTION_STACK_SIZE ;\
+ l.sw0x00(r1), r2;\
l.sw0x1c(r1), r9;\
- l.jal _exception_handler ;\
+ l.movhi r2,hi(_exception_handler) ;\
+ l.ori r2,r2,lo(_exception_handler);\
+ l.jalr r2 ;\
l.nop ;\
l.lwz r9, 0x1c(r1);\
l.addi r1, r1, EXCEPTION_STACK_SIZE;\
@@ -79,8 +82,9 @@ __reset:
l.bnf .L_relocvectors
l.addi r4,r4, 4
#endif
-
- l.j _start
+ l.movhi r4,hi(_start)
+ l.ori r4,r4,lo(_start)
+ l.jrr4
l.nop
/* bus error */
@@ -262,8 +266,7 @@ _start:
.type _exception_handler,@function
_exception_handler:
- /* Store state (r9 already saved)*/
- l.sw0x00(r1), r2
+ /* Store state (r2 and r9 already saved)*/
l.sw0x04(r1), r3
l.sw0x08(r1), r4
l.sw0x0c(r1), r5
--
1.7.4.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] mx6qsabrelite: add i2c support
On 25/04/2012 05:33, Troy Kisky wrote: Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 11 +++ include/configs/mx6qsabrelite.h |8 2 files changed, 19 insertions(+), 0 deletions(-) Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] mxc_i2c: specify i2c base address in config file
On 25/04/2012 05:33, Troy Kisky wrote: The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com --- Hi Troy, arch/arm/include/asm/arch-mx31/imx-regs.h |7 +++ arch/arm/include/asm/arch-mx35/imx-regs.h |2 +- drivers/i2c/mxc_i2c.c | 25 - include/configs/flea3.h |2 +- include/configs/imx31_phycore.h |3 ++- include/configs/mx35pdk.h |2 +- include/configs/mx53ard.h |2 +- include/configs/mx53evk.h |2 +- include/configs/mx53smd.h |2 +- 9 files changed, 19 insertions(+), 28 deletions(-) Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] mxc_i2c: remove setting speed at each start
On 06/05/2012 01:06, Marek Vasut wrote: Dear Troy Kisky, On 5/5/2012 2:36 PM, Marek Vasut wrote: Dear Troy Kisky, On 5/5/2012 6:08 AM, Marek Vasut wrote: Dear Troy Kisky, On 4/24/2012 8:33 PM, Troy Kisky wrote: Other then being very weird, this code was also wrong. For example, say I set speed to 100K. I'll read back the speed as 85937. But the speed is really 85937.5, so we I reset the speed to 85937, I'll get 73660.7. After a couple of transactions my speed is now exactly 68750 so it will remain there. Signed-off-by: Troy Kiskytroy.ki...@boundarydevices.com --- drivers/i2c/mxc_i2c.c |6 -- 1 files changed, 0 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 416ffee..fc68062 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -231,12 +231,6 @@ int i2c_imx_start(void) struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE; unsigned int temp = 0; int result; - int speed = i2c_get_bus_speed(); - u8 clk_idx = i2c_imx_get_clk(speed); - u8 idx = i2c_clk_div[clk_idx][1]; - - /* Store divider value */ - writeb(idx,i2c_regs-ifdr); /* Enable I2C controller */ writeb(0,i2c_regs-i2sr); Marek would you care to ack/nak this? It is deleting code that you added. Ok, who will set the controller speed if you remove this? i2c_init is the only function that writes the ifdr register after this patch. And i2c_init() is called on every boot. Correct? This is fine because this register is not affected by a software reset. I take it you verified this or that you're sure here :) I haven't looked at every reference manual, but if some oddball chip needs it reinitialized after a software reset, then the fix should go into the i2c_reset function, not i2c_imx_start. And this patch would not be introducing a regression for the oddball chip anyway. Ok, everything was already clear, and I can also add my: Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] USB on mx53loco
On 05/05/2012 23:20, Fabio Estevam wrote: Hi Stefano and Wolfgang, On Wed, May 2, 2012 at 5:56 PM, stefano babic sba...@denx.de wrote: Am 02/05/2012 20:48, schrieb Fabio Estevam: Hi Wolfgang, Have you tested USB host functionality on a mx53loco with a Freescale MC34708 PMIC ? No, I tested on a board with the Dialog PMIC, and it worked flawlessy. Maybe someone else tesetd with a newer board.. I managed to get USB working in the mx53loco board with FSL PMIC. I needed to turn on VUSB regulator output of mc34708. Ok, this explains why it did not work ! Will submit the patches after my initial Dialog PMIC series get applied. Clear. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] mx53loco: Allow to print CPU information at a later stage
On 30/04/2012 20:12, Fabio Estevam wrote: Print CPU information within board_late_init(). This is in preparation for adding 1GHz support, which requires programming a PMIC via I2C. As I2C is only available after relocation, print the CPU information later at board_late_init(), so that the CPU frequency can be printed correctly. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Yes, we already talked about this issue, I resend my: Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] mx53loco: Add support for 1GHz operation for DA9053-based boards
On 30/04/2012 20:12, Fabio Estevam wrote: There are two types of mx53loco boards: initial boards were built with a Dialog DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC. Add DA9053 PMIC support and adjust the required voltages and clocks for running the CPU at 1GHz. Tested on both versions of mx53loco boards. In the case of a MC34708-based board the CPU operating voltage remains at 800MHz. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Acked-by : Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] mx53loco: Add support for 1GHz operation for DA9053-based boards
On 30/04/2012 20:12, Fabio Estevam wrote: There are two types of mx53loco boards: initial boards were built with a Dialog DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC. Add DA9053 PMIC support and adjust the required voltages and clocks for running the CPU at 1GHz. Tested on both versions of mx53loco boards. In the case of a MC34708-based board the CPU operating voltage remains at 800MHz. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Applied to u-boot-imx, thanks Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] mx5: Add clock config interface
On 30/04/2012 20:12, Fabio Estevam wrote: mx5: Add clock config interface Add clock config interface support, so that we can configure CPU or DDR clock in the later init Signed-off-by: Jason Liu jason@linaro.org Signed-off-by: Eric Miao eric.m...@linaro.org Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] mx53loco: Allow to print CPU information at a later stage
On 30/04/2012 20:12, Fabio Estevam wrote: Print CPU information within board_late_init(). This is in preparation for adding 1GHz support, which requires programming a PMIC via I2C. As I2C is only available after relocation, print the CPU information later at board_late_init(), so that the CPU frequency can be printed correctly. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] M28: Enable FDT support
On 03/05/2012 17:47, Marek Vasut wrote: This will eventually be needed with Linux 3.5, which will be the point when MXS will be switched to FDT. Signed-off-by: Marek Vasut ma...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Fabio Estevam feste...@gmail.com --- include/configs/m28evk.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 7e1661e..b419516 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -43,6 +43,8 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_MISC_INIT +#define CONFIG_OF_LIBFDT This is independent from the series, and can be applied directly. Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] M28: Enable FDT support
Dear Stefano Babic, On 03/05/2012 17:47, Marek Vasut wrote: This will eventually be needed with Linux 3.5, which will be the point when MXS will be switched to FDT. Signed-off-by: Marek Vasut ma...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Fabio Estevam feste...@gmail.com --- include/configs/m28evk.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 7e1661e..b419516 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -43,6 +43,8 @@ #defineCONFIG_ARCH_CPU_INIT #defineCONFIG_ARCH_MISC_INIT +#define CONFIG_OF_LIBFDT This is independent from the series, and can be applied directly. Applied to u-boot-imx, thanks. I think the series was cleared either way, wasn't it? Best regards, Stefano Babic Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [resent] New chapter in i.MX51 datasheet an issue?
On 04/05/2012 12:08, David Jander wrote: Hi all, Hi David, I discovered a bug in u-boot, that got evident after Freescale updated the i.MX51 datasheets to revision 5 in March this year. I don't know if it is a serious problem or not, but if I believe the wording of the datasheet many of the boards that use a i.MX51 processor and running u-boot as of latest git, can potentially suffer permanent damage, whatever that means. I am referring to the new paragraphs at the end of chapter 4.3.4 of the datasheet, and the wrong interpretation of the meaning of the HVE bit in the iomuxc.h header file of u-boot here: arch/arm/include/asm/arch-mx5/iomux.h: ... 69 PAD_CTL_DRV_VOT_LOW = 0x0 13, /* Low voltage mode */ 70 PAD_CTL_DRV_VOT_HIGH = 0x1 13,/* High voltage mode */ ... Agree. The header defines the bit wrongly. It seems to me that the Reference Manual is correct. It is from 24/2/2010 and it was not updated. After a reset, value is set to 1, and this means low-voltage for the most pins. According to the reference manual, the correct meaning of this bit is negated: Bit 13: High / Low Output Voltage Range. This bit selects the output voltage mode for SD2_CMD. 0 High output voltage mode 1 Low output voltage mode Added to the new paragraph in the datasheet: The UHVIO type of I/O cells have to be configured properly according to their supply voltage level, in order to prevent permanent damage to them and in order to not degrade their timing performance. Seems like we may have a problem here! I would like to know if anyone is aware of this? Does anyone know of a board that is actually destroyed this way? At the moment, we have no problems and I can explain why. The only boards setting these pins (for SD card) are mx51evk and vision2. Both are setting PAD_CTL_DRV_VOT_HIGH, and because the define is wrong, they are really setting the pin to low output voltage mode. For other boards and other pins, voltage is not explicitely set : this means they work in low voltage mode after a reset. To fix arch/arm/include/asm/arch-mx5/iomux.h and synchronize it with the documentation, we need also to change mx51evk / vision2, setting the pins to PAD_CTL_DRV_VOT_LOW, and they will work as now. We can also drop completely PAD_CTL_DRV_VOT_HIGH from these two boards and use the reset value. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] M28: Enable FDT support
On 06/05/2012 18:12, Marek Vasut wrote: Dear Stefano Babic, I think the series was cleared either way, wasn't it? I am slowly applying all free of comments patches to u-boot-imx, and reviewing what I have not yet done. So this one is completely independent and I could apply without many thoughts ;-) But I am approaching to the other patches, so do not despair ;-) Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4 V2] i.MX28: Add delay after CPU bypass is cleared
On 03/05/2012 17:47, Marek Vasut wrote: This solves issues when larger amount of DRAM is used. Behave the same in case of CPU bypass as we do in case of EMI bypass, wait 15 ms. We need to wait until the clock domain stabilizes. Signed-off-by: Marek Vasut ma...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Fabio Estevam feste...@gmail.com --- V2: Change the description, this issue seemed to have been caused by not waiting after frobbing with the CPU bypass, it was unrelated to memory, but had a direct impact, causing trouble. This was yet another X-File of the imx-bootlets, sigh. arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index 0d13537..a9b1bb6 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c @@ -149,6 +149,8 @@ void mx28_mem_setup_cpu_and_hbus(void) /* Disable CPU bypass */ writel(CLKCTRL_CLKSEQ_BYPASS_CPU, clkctrl_regs-hw_clkctrl_clkseq_clr); + + early_delay(15000); Is there some influence (I assume that from your commit message) between size of the RAM and amount of time to wait ? Then yes, with boards with even more memory (this patch touches a common MX28 file) this delay is not enough. Should we correlate the delay maybe with PHYS_SDRAM_1_SIZE (maybe early_delay(15000 * (PHYS_SDRAM_1_SIZE / 512MB)) ? Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4 V2] i.MX28: Add delay after CPU bypass is cleared
Dear Stefano Babic, On 03/05/2012 17:47, Marek Vasut wrote: This solves issues when larger amount of DRAM is used. Behave the same in case of CPU bypass as we do in case of EMI bypass, wait 15 ms. We need to wait until the clock domain stabilizes. Signed-off-by: Marek Vasut ma...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Fabio Estevam feste...@gmail.com --- V2: Change the description, this issue seemed to have been caused by not waiting after frobbing with the CPU bypass, it was unrelated to memory, but had a direct impact, causing trouble. This was yet another X-File of the imx-bootlets, sigh. arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index 0d13537..a9b1bb6 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c @@ -149,6 +149,8 @@ void mx28_mem_setup_cpu_and_hbus(void) /* Disable CPU bypass */ writel(CLKCTRL_CLKSEQ_BYPASS_CPU, clkctrl_regs-hw_clkctrl_clkseq_clr); + + early_delay(15000); Is there some influence (I assume that from your commit message) between size of the RAM and amount of time to wait ? Nope Then yes, with boards with even more memory (this patch touches a common MX28 file) this delay is not enough. Should we correlate the delay maybe with PHYS_SDRAM_1_SIZE (maybe early_delay(15000 * (PHYS_SDRAM_1_SIZE / 512MB)) ? There was a new version of this patch explaining how I got to this delay (or how FSL hid it from me). Best regards, Stefano Babic Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Regarding BDI2000 connection problem with MPC8280 based board
Dear sir, I'm trying BDI 2000 to connect MPC8280 Board buts its showing time out and i'm new to BDI 2000. Please suggest me on this regards. Regards Thiru N ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/5] imx-common: Factor out get_ahb_clk()
Hi Dirk, On Sun, Apr 29, 2012 at 3:15 PM, Fabio Estevam feste...@gmail.com wrote: I sent v2 which should fix the problem you reported in v1. When you have a chance, could you please try this version and let us know if it fixes the issues you reported previously? Thanks, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] USB: ehci-mx6: Fix broken IO access
On 02/05/2012 16:36, Wolfgang Grandegger wrote: To get USB working again on the i.MX6, this patch fixes a bug introduced with commit 522b2a0 Add proper IO accessors for mx6 usb registers.. At that occasion, I also added the missing __iomem directive. Cc: Marek Vasut ma...@denx.de CC: Fabio Estevam feste...@gmail.com Signed-off-by: Wolfgang Grandegger w...@denx.de --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX28: Add delay after CPU bypass is cleared
On 04/05/2012 13:32, Marek Vasut wrote: This solves issues when larger amount of DRAM is used, like 256MB. Behave the same in case of CPU bypass as we do in case of EMI bypass, but wait 15 ms. We need to wait until the clock domain stabilizes. This issue seemed to have been caused by not waiting after frobbing with the CPU bypass, it was unrelated to memory, but had a direct impact, causing trouble. This was yet another X-File of the imx-bootlets, sigh. The conclusion is, trying a semi-random delay (there is delay after the EMI bypass change), the issue is fixed. Another possible explanation is that we do not do the simple memory test FSL does in their imx-bootlets (1000 R/W cycles to/from piece of the memory, while also outputing something on the serial port). This might have caused the similar delay in the imx-bootlets and therefore they didn't need to add this explicitly. For now, this seems good fix enough, but to me, whole that memory init code in imx-bootlets is completely flunked and it'd need deeper investigation. Signed-off-by: Marek Vasut ma...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Fabio Estevam feste...@gmail.com --- arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |2 ++ 1 file changed, 2 insertions(+) V2: Change the description, this issue seemed to have been caused by not waiting after frobbing with the CPU bypass, it was unrelated to memory, but had a direct impact, causing trouble. This was yet another X-File of the imx-bootlets, sigh. V3: Add more conspiracy theories into the commit message. diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index 0d13537..9fa5d29 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c @@ -149,6 +149,8 @@ void mx28_mem_setup_cpu_and_hbus(void) /* Disable CPU bypass */ writel(CLKCTRL_CLKSEQ_BYPASS_CPU, clkctrl_regs-hw_clkctrl_clkseq_clr); + + early_delay(15000); } It is fine with me Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX28: Add delay after CPU bypass is cleared
Dear Stefano Babic, On 04/05/2012 13:32, Marek Vasut wrote: This solves issues when larger amount of DRAM is used, like 256MB. Behave the same in case of CPU bypass as we do in case of EMI bypass, but wait 15 ms. We need to wait until the clock domain stabilizes. This issue seemed to have been caused by not waiting after frobbing with the CPU bypass, it was unrelated to memory, but had a direct impact, causing trouble. This was yet another X-File of the imx-bootlets, sigh. The conclusion is, trying a semi-random delay (there is delay after the EMI bypass change), the issue is fixed. Another possible explanation is that we do not do the simple memory test FSL does in their imx-bootlets (1000 R/W cycles to/from piece of the memory, while also outputing something on the serial port). This might have caused the similar delay in the imx-bootlets and therefore they didn't need to add this explicitly. Yes Stefano ... I meant this patch ... and the above explanation :-( This is all so messed up :-/ For now, this seems good fix enough, but to me, whole that memory init code in imx-bootlets is completely flunked and it'd need deeper investigation. Signed-off-by: Marek Vasut ma...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Fabio Estevam feste...@gmail.com --- arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |2 ++ 1 file changed, 2 insertions(+) V2: Change the description, this issue seemed to have been caused by not waiting after frobbing with the CPU bypass, it was unrelated to memory, but had a direct impact, causing trouble. This was yet another X-File of the imx-bootlets, sigh. V3: Add more conspiracy theories into the commit message. diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index 0d13537..9fa5d29 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c @@ -149,6 +149,8 @@ void mx28_mem_setup_cpu_and_hbus(void) /* Disable CPU bypass */ writel(CLKCTRL_CLKSEQ_BYPASS_CPU, clkctrl_regs-hw_clkctrl_clkseq_clr); + + early_delay(15000); } It is fine with me Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] M28: Enable FDT support
Dear Stefano Babic, On 06/05/2012 18:12, Marek Vasut wrote: Dear Stefano Babic, I think the series was cleared either way, wasn't it? I am slowly applying all free of comments patches to u-boot-imx, and reviewing what I have not yet done. So this one is completely independent and I could apply without many thoughts ;-) But I am approaching to the other patches, so do not despair ;-) I think I made another series for you that should be clear. This series should be clear after DZU gulps down the previous explanation of crapiness :( Stefano Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx28evk: add NAND support
On 17/04/2012 12:35, Lauri Hintsala wrote: NAND support is not enabled by default because Eval Kit is not delivered with NAND chip. To enable NAND support add CONFIG_CMD_NAND to board config. Signed-off-by: Lauri Hintsala lauri.hints...@bluegiga.com --- Applied to u-boot-imx, thanks Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] i.MX6: Add ANATOP regulator init
On 02/05/2012 14:12, Dirk Behme wrote: Init the core regulator voltage to 1.2V. This is required for the correct functioning of the GPU and when the ARM LDO is set to 1.225V. This is a workaround to fix some memory clock jitter. Note: This should be but can't be done in the DCD. The bootloader prevents access to the ANATOP registers. Signed-off-by: Dirk Behme dirk.be...@de.bosch.com CC: Jason Chen b02...@freescale.com CC: Jason Liu r64...@freescale.com CC: Ranjani Vaidyanathan ra5...@freescale.com CC: Stefano Babic sba...@denx.de CC: Fabio Estevam feste...@gmail.com --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()
On 28/04/2012 17:29, Eric Nelson wrote:
Hi Dirk,
I tried to address this global/non-const by making it explicitly public,
but Stefano nacked the patch:
http://patchwork.ozlabs.org/patch/144712/
As it stands, the compiler won't generate an external reference for the
local above, so it should be good.
It seems ok. However, this conflicts with
imx-common: Factor out get_ahb_clk()
sent by Fabio Estevam.
Reason is only the modified structure name : I made these changes to
your patch:
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 3255771..52d5dc4 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -296,8 +296,8 @@ int enable_sata_clock(void)
{
u32 reg = 0;
s32 timeout = 10;
- struct imx_ccm_reg *const imx_ccm
- = (struct imx_ccm_reg *) CCM_BASE_ADDR;
+ struct mxc_ccm_reg *const imx_ccm
+ = (struct mxc_ccm_reg *) CCM_BASE_ADDR;
/* Enable sata clock */
Change is trivial, but please take a look.
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings
On 01/05/2012 21:55, Eric Nelson wrote:
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.
V3 returns immediately from setup_sata() if enable_sata_clock()
returns an error.
V4 removes extra #include and addresses a style issue as discussed
on the ML.
V5 addresses another (hopefully last) style issue.
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 31
+
include/configs/mx6qsabrelite.h | 13 ++
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 1d09a72..cdd2f15 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,7 @@
#include asm/arch/imx-regs.h
#include asm/arch/mx6x_pins.h
#include asm/arch/iomux-v3.h
+#include asm/arch/clock.h
#include asm/errno.h
#include asm/gpio.h
#include mmc.h
@@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
return 0;
}
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+ struct iomuxc_base_regs *const iomuxc_regs
+ = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+ int ret = enable_sata_clock();
+ if (ret)
+ return ret;
+
+ clrsetbits_le32(iomuxc_regs-gpr[13],
+ IOMUXC_GPR13_SATA_MASK,
+ IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+ |IOMUXC_GPR13_SATA_PHY_7_SATA2M
+ |IOMUXC_GPR13_SATA_SPEED_3G
+ |(3IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+ |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+ |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+ |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+ |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+ |IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+ return 0;
+}
+#endif
+
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -283,6 +310,10 @@ int board_init(void)
setup_spi();
#endif
+#ifdef CONFIG_CMD_SATA
+ setup_sata();
+#endif
+
return 0;
}
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index f52c3c7..1d92dd0 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -71,6 +71,19 @@
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_DWC_AHSATA_PORT_ID0
+#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
Acked-by: stefano Babic sba...@denx.de
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings
On 01/05/2012 21:55, Eric Nelson wrote: Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com --- V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand. V3 returns immediately from setup_sata() if enable_sata_clock() returns an error. V4 removes extra #include and addresses a style issue as discussed on the ML. V5 addresses another (hopefully last) style issue. Hi Eric, applied after rebasing on current u-boot-imx. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 2/8] i.MX25: This architecture has a GPIO4 too
On 19/04/2012 10:55, Timo Ketola wrote: Signed-off-by: Timo Ketola t...@exertus.fi --- Changes in v2: - Dropped patches 2 and 3 so this one changed from 4 to 2 - Rebased to u-boot-imx next - Fixed too long line Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 4/8] imx: nand: Support flash based BBT
On 19/04/2012 10:55, Timo Ketola wrote: Signed-off-by: Timo Ketola t...@exertus.fi --- Changes in v4: - Removed blank lines inside #ifdef - Manipulate 'this-options' with '|=' instead of '=' Changes in v3: - Changed the subject - Changed the BBT pattern offsets (patch 4); They are now zero as in Linux Changes in v2: - Dropped patches 2, 3 and 6 so this one changed from 7 to 4 - Rebased to u-boot-imx next Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 5/8] i.MX25: usb: Set PORTSCx register
On 19/04/2012 10:55, Timo Ketola wrote: The USB controller in i.MX25 has a PORTSCx registers which should be set. In this regard it is similar to the controller in i.MX31. As this file is compiled only with i.MX25 and -31, #ifdef check can be removed. Signed-off-by: Timo Ketola t...@exertus.fi --- Changes in v4: - Reworded subject to shorten it - Added commit message - Changed the fix from adding i.MX25 to removing the check altogether Changes in v2: - Dropped patches 2, 3 and 6 so this one changed from 8 to 5 - Rebased to u-boot-imx next drivers/usb/host/ehci-mxc.c |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 6/8] imx: usb: There is no such register
On 19/04/2012 10:55, Timo Ketola wrote: The reference manual of i.MX25 (nor i.MX31) does not define such register. This seems to access read only UH2_CAPLENGTH register (if CONFIG_MXC_USB_PORT is zero). Signed-off-by: Timo Ketola t...@exertus.fi --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 7/8] i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
On 19/04/2012 10:55, Timo Ketola wrote: types.h must be included in imx-regs.h if one wants to include imx-regs.h in a board configuration file. That for one's part is necessary, if one wants to use addresses defined in imx-regs.h. For example, fsl_esdhc.c needs CONFIG_SYS_FSL_ESDHC_ADDR defined and a proper thing is to define it with IMX_MMC_SDHCx_BASE in board configuration file. This patch fixes the build in that case. Signed-off-by: Timo Ketola t...@exertus.fi --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 1/8] i.MX25: esdhc: Add mxc_get_clock infrastructure
On 19/04/2012 10:55, Timo Ketola wrote: Defining CONFIG_FSL_ESDHC brings in a call to get_clocks, so let's implement get_clocks function. This is how it seems to be implemented elsewhere. Signed-off-by: Timo Ketola t...@exertus.fi --- Changes in v4: - Rewrapped commit message Changes in v2: - Rebased to u-boot-imx next arch/arm/cpu/arm926ejs/mx25/generic.c | 27 +++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++ 2 files changed, 50 insertions(+), 0 deletions(-) Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()
Hi Stefano,
On 05/06/2012 10:04 AM, Stefano Babic wrote:
On 28/04/2012 17:29, Eric Nelson wrote:
Hi Dirk,
I tried to address this global/non-const by making it explicitly public,
but Stefano nacked the patch:
http://patchwork.ozlabs.org/patch/144712/
As it stands, the compiler won't generate an external reference for the
local above, so it should be good.
It seems ok. However, this conflicts with
imx-common: Factor out get_ahb_clk()
sent by Fabio Estevam.
Reason is only the modified structure name : I made these changes to
your patch:
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 3255771..52d5dc4 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -296,8 +296,8 @@ int enable_sata_clock(void)
{
u32 reg = 0;
s32 timeout = 10;
- struct imx_ccm_reg *const imx_ccm
- = (struct imx_ccm_reg *) CCM_BASE_ADDR;
+ struct mxc_ccm_reg *const imx_ccm
+ = (struct mxc_ccm_reg *) CCM_BASE_ADDR;
/* Enable sata clock */
Change is trivial, but please take a look.
This is clearly fine, but it has me laughing because I never
remember what 'mxc' stands for.
Regards,
Eric
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] kwboot: boot Marvell Kirkwood SoCs over a serial link
On Wed, May 2, 2012 at 2:16 PM, Luka Perkov ub...@lukaperkov.net wrote:
The kwboot program boots boards based on Marvell's Kirkwood platform
via Xmodem over their integrated UART.
Signed-off-by: Daniel Stodden daniel.stod...@googlemail.com
Acked-by: Luka Perkov ub...@lukaperkov.net
---
Changes from version v1:
* fix man page
* minor cosmetic fixes in tools/kwboot.c
I changed things pointed out on v1 of this patch which was originally
made by Daniel.
@ Daniel, Luka, Prafulla, etal :
I've tried kwboot on two of my devices, and as I was expecting:
- it worked perfectly with the v1.21 BootROM device (a Seagate GoFlex
Net) : Nicely done, well implemented, and the timing seems to be a
non-issue w/ kwboot. Other previous applications for UARTbooting have
seemed to me to be less reliable - only booting 50% or 75% of the
time. I tried it with kwboot a dozen times or more and it was
successful each time, The -p patch-for-UART-booting option is a nice
feature.
- it did not seem to work w/ v1.11 BootROM devices (a Pogoplug
V2/E02, Seagate Dockstar) {previous utilities/picocom-hacks showed the
same behavior - the bootROM version 1.11 apparently has some
difference/defect/shortcoming that does not allow this function to
work as the docs suggest it should. Too bad no one has pointed out
exactly what the issue is, or found a patch/workaround it make this
work on v1.11 BootROM devices.}. NOTE: It did _not_ adversely
affect the device otherwise. I'd seen a post on a thread at another
site that suggested that performing this procedure on a v1.11 device
could corrupt the NAND - this was __not__ the case w/ my attempts
(about a dozen trials, with UART uboot.kwb's and also using the -p
patch option w/ NAND files.
Prafulla, do you have any insight into the differences in between 1.11
and 1.21 that would help in this issue?
regards,
Dave
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()
Hi Eric, On Sun, May 6, 2012 at 2:42 PM, Eric Nelson eric.nel...@boundarydevices.com wrote: This is clearly fine, but it has me laughing because I never remember what 'mxc' stands for. Yes, this can cause confunsion. The 'mxc' term is frequently used in the kernel/u-boot and has the same meaning as 'imx'. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()
On 05/06/2012 11:08 AM, Fabio Estevam wrote: Hi Eric, On Sun, May 6, 2012 at 2:42 PM, Eric Nelson eric.nel...@boundarydevices.com wrote: This is clearly fine, but it has me laughing because I never remember what 'mxc' stands for. Yes, this can cause confunsion. The 'mxc' term is frequently used in the kernel/u-boot and has the same meaning as 'imx'. Mobile Extreme Confusion? :) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] kwboot: boot Marvell Kirkwood SoCs over a serial link
-Original Message-
From: David Purdy [mailto:david.c.pu...@gmail.com]
Sent: 06 May 2012 23:24
To: u-boot@lists.denx.de; daniel.stod...@googlemail.com; Prafulla
Wadaskar; Luka Perkov; drea...@doukki.net
Subject: Re: [U-Boot] [PATCH v2] kwboot: boot Marvell Kirkwood SoCs
over a serial link
On Wed, May 2, 2012 at 2:16 PM, Luka Perkov ub...@lukaperkov.net
wrote:
The kwboot program boots boards based on Marvell's Kirkwood platform
via Xmodem over their integrated UART.
Signed-off-by: Daniel Stodden daniel.stod...@googlemail.com
Acked-by: Luka Perkov ub...@lukaperkov.net
---
Changes from version v1:
* fix man page
* minor cosmetic fixes in tools/kwboot.c
I changed things pointed out on v1 of this patch which was
originally
made by Daniel.
@ Daniel, Luka, Prafulla, etal :
I've tried kwboot on two of my devices, and as I was expecting:
- it worked perfectly with the v1.21 BootROM device (a Seagate GoFlex
Net) : Nicely done, well implemented, and the timing seems to be a
non-issue w/ kwboot. Other previous applications for UARTbooting have
seemed to me to be less reliable - only booting 50% or 75% of the
time. I tried it with kwboot a dozen times or more and it was
successful each time, The -p patch-for-UART-booting option is a nice
feature.
- it did not seem to work w/ v1.11 BootROM devices (a Pogoplug
V2/E02, Seagate Dockstar) {previous utilities/picocom-hacks showed the
same behavior - the bootROM version 1.11 apparently has some
difference/defect/shortcoming that does not allow this function to
work as the docs suggest it should. Too bad no one has pointed out
exactly what the issue is, or found a patch/workaround it make this
work on v1.11 BootROM devices.}. NOTE: It did _not_ adversely
affect the device otherwise. I'd seen a post on a thread at another
site that suggested that performing this procedure on a v1.11 device
could corrupt the NAND - this was __not__ the case w/ my attempts
(about a dozen trials, with UART uboot.kwb's and also using the -p
patch option w/ NAND files.
Prafulla, do you have any insight into the differences in between 1.11
and 1.21 that would help in this issue?
Hi Dave
I really don't have any specific insight of UART boot.
I know Kirkwood expose this feature, and really very useful.
I will check the utility at my end too.
I would love to pull this patch as soon as it matures, need ack from all of you
on its functionality and code too :-D
Regards..
Prafulla . . .
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
Hi, Sorry, reply is late. 2012/4/19 Albert ARIBAUD albert.u.b...@aribaud.net: Le 19/04/2012 08:44, Albert ARIBAUD a écrit : Hi Nobuhiro Iwamatsu, Le 18/04/2012 04:41, Nobuhiro Iwamatsu a écrit : With almost all the architecture and board BOARD_LATE_INIT does not use. CONFIG_BOARD_LATE_INIT is used instead. This changed CONFIG_BOARD_LATE_INIT from BOARD_LATE_INIT. I think the commit message above is redundant with the commit summary, especially for a trivial one-line change. Can you just post a V2 patch with the same code change and commit summary, but without the commit message? ... actually, you could apply this to all your elementary patches re BOARD_LATE_INIT, and then submit them in a single patch set. I thought that I would resend to one patch collectively. However, these were already taken into your repository. Thank you. Best regards, Nobuhiro -- Nobuhiro Iwamatsu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
