Re: [U-Boot] [PATCH V2 01/25] mxc_i2c: fix i2c_imx_stop

[Marek Vasut]

Dear Troy Kisky,

> On 7/5/2012 12:53 PM, Troy Kisky wrote:
> > Instead of clearing 2 bits, all the other
> > bits were set because '|=' was used instead
> > of '&='.
> > 
> > Signed-off-by: Troy Kisky 
> > Acked-by: Marek Vasut 
> > Acked-by: Stefano Babic 
> > 
> > ---
> > V2: add acks
> > ---
> > 
> >   drivers/i2c/mxc_i2c.c |2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
> > index fc68062..c0c45fd 100644
> > --- a/drivers/i2c/mxc_i2c.c
> > +++ b/drivers/i2c/mxc_i2c.c
> > @@ -264,7 +264,7 @@ void i2c_imx_stop(void)
> > 
> > /* Stop I2C transaction */
> > temp = readb(&i2c_regs->i2cr);
> > 
> > -   temp |= ~(I2CR_MSTA | I2CR_MTX);
> > +   temp &= ~(I2CR_MSTA | I2CR_MTX);
> > 
> > writeb(temp, &i2c_regs->i2cr);
> > 
> > i2c_imx_bus_busy(0);
> 
> This series was tested on a sabrelite and a i.mx51 board

Sigh, I should test it on the efikamx board. It has some i2c chip that's hard 
to 
talk to since it's quite sensitive to the behavior of the bus. But since I'm 
dead busy now, I'll just trust you. I'm glad you found it, Troy :)

> Thanks
> Troy

Best regards,
Marek Vasut
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[U-Boot] [PATCH v4] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

[Tetsuyuki Kobayashi]

save_boot_params_default() in cpu.c accesses uninitialized stack area
when it compiled with -O0 (not optimized).

Signed-off-by: Tetsuyuki Kobayashi 
---
Hi Tom, Albert,

I rewrite them in asm language and put it to start.S.
No warning now.
I tested it quickly on my kzm9g board.

Changes for v2:
 - include  and use __naked instead of __attribute__((naked))

Changes for v3:
 - move __naked after void
 - reformat comments

Changes for v4:
 - v3 causes following warnings
  cpu.c: In function 'save_boot_params_default':
  cpu.c:48:1: warning: -fstack-usage not supported for this target [enabled by 
default]
 - move save_boot_params_default() and save_boot_params() from cpu.c to start.S
   and write them in asm language

 arch/arm/cpu/armv7/cpu.c   |7 ---
 arch/arm/cpu/armv7/start.S |   15 +++
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index c6fa8ef..b0677f4 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -37,13 +37,6 @@
 #include 
 #include 
 
-void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
-{
-}
-
-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
-   __attribute__((weak, alias("save_boot_params_default")));
-
 int cleanup_before_linux(void)
 {
/*
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 261835b..4feade5 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -350,6 +350,21 @@ ENTRY(cpu_init_crit)
 ENDPROC(cpu_init_crit)
 #endif
 
+/*
+ *
+ * void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)   
+ *
+ * Stack pointer is not yet initialized
+ * Don't save anything to stack even if compiled with -O0
+ * 
+ */
+ENTRY(save_boot_params_default)
+   bx  lr  @ back to my caller
+ENDPROC(save_boot_params_default)
+
+   .weak   save_boot_params
+   .setsave_boot_params, save_boot_params_default
+
 #ifndef CONFIG_SPL_BUILD
 /*
  *
--
1.7.9.5 
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Re: [U-Boot] [PATCH] armv7: Fix to mistake clean the memory space

[Albert ARIBAUD]

Hi Zhong,

On Thu,  5 Jul 2012 22:35:15 +0800, Zhong Hongbo  wrote:
> From: Zhong Hongbo 
> 
> In currently, when __bss_start is equal to __bss_end__,
> The bss loop will clear all the things in memory space.
> 
> But just only when __bss_end__ greater than __bss_start__,
> we do the clear bss section operation.
> 
> Signed-off-by: Hongbo Zhong 
> ---
>  arch/arm/cpu/armv7/start.S |9 ++---
>  1 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index 22a3ced..2e583ee 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -259,10 +259,13 @@ clear_bss:
>  #endif
>   mov r2, #0x /* clear*/
>  
> -clbss_l:str  r2, [r0]/* clear loop...*/
> +clbss_l:
> + cmp r1, r0
> + bls clbss_end
> + str r2, [r0]/* clear loop...*/
>   add r0, r0, #4
> - cmp r0, r1
> - bne clbss_l
> + b   clbss_l
> +clbss_end:
>  
>  /*
>   * We are done. Do not return, instead branch to second part of board

Just checking: that's the same as your 'infinite' patch, right?

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH] arm/s5pxx: Fix get_timer_masked to get the time.

[Jaehoon Chung]

Hi Minkyu,

I tested on trats-board.
I think it's working fine.

Tested-by: Jaehoon Chung

Best Regards,
Jaehoon Chung

On 07/06/2012 11:13 AM, Minkyu Kang wrote:

> Dear Jaehoon and Donghwa,
> 
> On 5 July 2012 20:55, Zhong Hongbo  wrote:
>> Hi Minkyu,
>>
>> Could you help me to review it?
>>
>> Thanks,
>> hongbo
>>
>> On 07/03/2012 07:50 AM, Zhong Hongbo wrote:
>>> From: Zhong Hongbo 
>>>
>>> In general, The get_timer_masked function get the system time,
>>> no the number of ticks. Such as the nand_wait_ready will use
>>> get_timer_masked to delay the operations. And change the system
>>> time to adopt to the CONFIG_SYS_HZ.
>>>
>>> Signed-off-by: Hongbo Zhong 
>>> ---
>>>  arch/arm/cpu/armv7/s5p-common/pwm.c   |2 +-
>>>  arch/arm/cpu/armv7/s5p-common/timer.c |   20 
>>>  2 files changed, 17 insertions(+), 5 deletions(-)
>>>
> 
> Could please test this patch.
> 
> Thanks.
> Minkyu Kang.


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[U-Boot] [PATCH v4] arm : Atmel : add at91sam9x5ek board support

[Bo Shen]

Add at91sam9x5ek board support, this board support the following SoCs
  AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35

Using at91sam9x5ek_nandflash to configure for the board
Now only supports NAND with software ECC boot up

Signed-off-by: Bo Shen 
---
This patch is based on git://git.denx.de/u-boot-atmel.git

Changed since v3
  Remove CONFIG_NET_MULTI which was globally removed
  Remove CONFIG_RESET_PHY_R related part which is empty unused function

Changed since v1 and v2
  Modify the code according to Andreas's suggestion
---
 MAINTAINERS|3 +
 arch/arm/cpu/arm926ejs/at91/Makefile   |1 +
 arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c   |  232 
 arch/arm/cpu/arm926ejs/at91/clock.c|   12 +-
 arch/arm/include/asm/arch-at91/at91sam9_matrix.h   |2 +
 arch/arm/include/asm/arch-at91/at91sam9x5.h|  170 
 arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h |   91 ++
 arch/arm/include/asm/arch-at91/hardware.h  |2 +
 board/atmel/at91sam9x5ek/Makefile  |   52 
 board/atmel/at91sam9x5ek/at91sam9x5ek.c|  293 
 board/atmel/at91sam9x5ek/config.mk |1 +
 boards.cfg |1 +
 drivers/net/macb.c |4 +-
 include/configs/at91sam9x5ek.h |  183 
 14 files changed, 1043 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
 create mode 100644 arch/arm/include/asm/arch-at91/at91sam9x5.h
 create mode 100644 arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h
 create mode 100644 board/atmel/at91sam9x5ek/Makefile
 create mode 100644 board/atmel/at91sam9x5ek/at91sam9x5ek.c
 create mode 100644 board/atmel/at91sam9x5ek/config.mk
 create mode 100644 include/configs/at91sam9x5ek.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 6438e1c..a2fccbf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -660,6 +660,9 @@ Sedji Gaouaou
at91sam9g10ek   ARM926EJS (AT91SAM9G10 SoC)
at91sam9m10g45ekARM926EJS (AT91SAM9G45 SoC)
 
+Bo Shen 
+   at91sam9x5ekARM926EJS (AT91SAM9G15,G25,G35,X25,X35 SoC)
+
 Simon Guinot 
 
inetspace_v2ARM926EJS (Kirkwood SoC)
diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile 
b/arch/arm/cpu/arm926ejs/at91/Makefile
index f333753..346e58f 100644
--- a/arch/arm/cpu/arm926ejs/at91/Makefile
+++ b/arch/arm/cpu/arm926ejs/at91/Makefile
@@ -35,6 +35,7 @@ COBJS-$(CONFIG_AT91SAM9263)   += at91sam9263_devices.o
 COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o
 COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o
 COBJS-$(CONFIG_AT91SAM9G45)+= at91sam9m10g45_devices.o
+COBJS-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o
 COBJS-$(CONFIG_AT91_EFLASH)+= eflash.o
 COBJS-$(CONFIG_AT91_LED)   += led.o
 COBJS-y += clock.o
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c 
b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
new file mode 100644
index 000..7558ca2
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
@@ -0,0 +1,232 @@
+/*
+ * Copyright (C) 2012 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+unsigned int get_chip_id(void)
+{
+   /* The 0x40 is the offset of cidr in DBGU */
+   return readl(ATMEL_BASE_DBGU + 0x40) & ~ARCH_ID_VERSION_MASK;
+}
+
+unsigned int get_extension_chip_id(void)
+{
+   /* The 0x44 is the offset of exid in DBGU */
+   return readl(ATMEL_BASE_DBGU + 0x44);
+}
+
+unsigned int has_emac1()
+{
+   return cpu_is_at91sam9x25();
+}
+
+unsigned int has_emac0()
+{
+   return !(cpu_is_at91sam9g15());
+}
+
+unsigned int has_lcdc()
+{
+   return cpu_is_at91sam9g15() || cpu_is_at91sam9g35()
+   || cpu_is_at91sam9x35();
+}
+
+char *get_cpu_name()
+{
+   unsigned int extension_id = get_extension_chip_id();
+
+   if (cpu_is_at91sam9x5()) {
+   switch (extension_id) {
+   case ARCH_EXID_AT91SAM9G15:
+   return CONFIG_SYS_AT91_G15_C

Re: [U-Boot] [PATCH] arm/s5pxx: Fix get_timer_masked to get the time.

[Minkyu Kang]

Dear Jaehoon and Donghwa,

On 5 July 2012 20:55, Zhong Hongbo  wrote:
> Hi Minkyu,
>
> Could you help me to review it?
>
> Thanks,
> hongbo
>
> On 07/03/2012 07:50 AM, Zhong Hongbo wrote:
>> From: Zhong Hongbo 
>>
>> In general, The get_timer_masked function get the system time,
>> no the number of ticks. Such as the nand_wait_ready will use
>> get_timer_masked to delay the operations. And change the system
>> time to adopt to the CONFIG_SYS_HZ.
>>
>> Signed-off-by: Hongbo Zhong 
>> ---
>>  arch/arm/cpu/armv7/s5p-common/pwm.c   |2 +-
>>  arch/arm/cpu/armv7/s5p-common/timer.c |   20 
>>  2 files changed, 17 insertions(+), 5 deletions(-)
>>

Could please test this patch.

Thanks.
Minkyu Kang.
-- 
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Re: [U-Boot] [PATCH 2/2] net: abort network initialization if the PHY driver fails

[Tabi Timur-B04825]

Nobuhiro Iwamatsu wrote:

>> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
>> index eee41d7..7a3d16b 100644
>> --- a/drivers/net/fec_mxc.c
>> +++ b/drivers/net/fec_mxc.c
>> @@ -510,7 +510,12 @@ static int fec_open(struct eth_device *edev)
>>  fec_eth_phy_config(edev);
>>  if (fec->phydev) {
>>  /* Start up the PHY */
>> -   phy_startup(fec->phydev);
>> +   int ret = phy_startup(fec->phydev);
>> +   if (ret) {
>> +   printf("Could not initialize PHY %s\n",
>> +  fm_eth->phydev->dev->name);
>
> Probably this is fec, not fm_eth.

Thanks.  I thought I was being diligent, and I ran MAKEALL, but I guess it 
wasn't enough.

>> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
>> index 7854a04..d777144 100644
>> --- a/drivers/net/xilinx_axi_emac.c
>> +++ b/drivers/net/xilinx_axi_emac.c
>> @@ -272,7 +272,11 @@ static int setup_phy(struct eth_device *dev)
>>  phydev->advertising = phydev->supported;
>>  priv->phydev = phydev;
>>  phy_config(phydev);
>> -   phy_startup(phydev);
>> +   if (phy_startup(phydev)) {
>> +   printf("axiemac: could not initialize PHY %s\n",
>> +  phydev->dev->name);
>> +   return 0;
>> +   }
>>
>>  switch (phydev->speed) {
>>  case 1000:
>
> Why doesn't this driver use a ret variable?
> Other driver's patch used this.

Because setup_phy() returns either 0 (failure) or 1 (success).

-- 
Timur Tabi
Linux kernel developer at Freescale


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Re: [U-Boot] [PATCH v3 6/7] tegra: nand: Add Tegra NAND driver

[Scott Wood]

On 07/04/2012 02:46 AM, Jim Lin wrote:
>> -Original Message-
>> From: Scott Wood [mailto:scottw...@freescale.com] 
>> Sent: Thursday, April 26, 2012 6:17 AM
>> To: Simon Glass
>> Cc: U-Boot Mailing List; Tom Warren; Stephen Warren; Jim Lin; Stephen Warren
>> Subject: Re: [PATCH v3 6/7] tegra: nand: Add Tegra NAND driver
>>
>> On 04/17/2012 01:50 PM, Simon Glass wrote:
>>> +static void write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
>>> +{
>>> +   int i, j, l;
>>> +   struct nand_chip *chip = mtd->priv;
>>> +   struct nand_drv *info;
>>> +
>>> +   info = (struct nand_drv *)chip->priv;
>>> +
>>> +   for (i = 0; i < len / 4; i++) {
>>> +   l = ((int *)buf)[i];
>>
>> If you're assuming the buffer is 32-bit aligned, comment it.  Ideally
>> these assumptions should be stated in the interface itself...
> This doesn't mean that buf needs to be 32-bit aligned.
> It only says each write is 32-bit.

OK, didn't realize modern ARM could deal with unaligned accesses.

>> Should also comment that there's an endian dependency here.
> What do you mean? Could you explain more or have an example?

You load a value using host endianness, and store it using a little
endian accessor.  This would be fine if it represented a real 32-bit
integer, but it's really a sequence of bytes that should not be swapped.

It's not a big deal if you don't see the driver ever being used with a
big endian host, but a comment would be nice.

>>> +/**
>>> + * Board-specific NAND initialization
>>> + *
>>> + * @param nand nand chip info structure
>>> + * @return 0, after initialized, -1 on error
>>> + */
>>> +int board_nand_init(struct nand_chip *nand)
>>
>> Please consider using CONFIG_SYS_NAND_SELF_INIT.
> So far I don't see the demand.

I'd like to see the old way go away eventually.

> ---
> This email message is for the sole use of the intended recipient(s) and may 
> contain
> confidential information.  Any unauthorized review, use, disclosure or 
> distribution
> is prohibited.  If you are not the intended recipient, please contact the 
> sender by
> reply email and destroy all copies of the original message.
> ---

Please try to get rid of this.  This is a public mailing list.

-Scott

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Re: [U-Boot] [PATCH 2/2] net: abort network initialization if the PHY driver fails

[Nobuhiro Iwamatsu]

Hi,

2012/7/6 Timur Tabi :
> Now that phy_startup() can return an actual error code, check for that error
> code and abort network initialization if the PHY fails.
>
> Signed-off-by: Timur Tabi 
> ---
>  drivers/net/fec_mxc.c |7 ++-
>  drivers/net/fm/eth.c  |9 -
>  drivers/net/sh_eth.c  |6 +-
>  drivers/net/tsec.c|8 +++-
>  drivers/net/xilinx_axi_emac.c |6 +-
>  drivers/net/xilinx_ll_temac.c |8 +++-
>  6 files changed, 38 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
> index eee41d7..7a3d16b 100644
> --- a/drivers/net/fec_mxc.c
> +++ b/drivers/net/fec_mxc.c
> @@ -510,7 +510,12 @@ static int fec_open(struct eth_device *edev)
> fec_eth_phy_config(edev);
> if (fec->phydev) {
> /* Start up the PHY */
> -   phy_startup(fec->phydev);
> +   int ret = phy_startup(fec->phydev);
> +   if (ret) {
> +   printf("Could not initialize PHY %s\n",
> +  fm_eth->phydev->dev->name);

Probably this is fec, not fm_eth.

> +   return ret;
> +   }
> speed = fec->phydev->speed;
> } else {
> speed = _100BASET;
> diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
> index f34f4db..2b616ad 100644
> --- a/drivers/net/fm/eth.c
> +++ b/drivers/net/fm/eth.c
> @@ -363,6 +363,9 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd)
>  {
> struct fm_eth *fm_eth;
> struct fsl_enet_mac *mac;
> +#ifdef CONFIG_PHYLIB
> +   int ret;
> +#endif
>
> fm_eth = (struct fm_eth *)dev->priv;
> mac = fm_eth->mac;
> @@ -384,7 +387,11 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd)
> fmc_tx_port_graceful_stop_disable(fm_eth);
>
>  #ifdef CONFIG_PHYLIB
> -   phy_startup(fm_eth->phydev);
> +   ret = phy_startup(fm_eth->phydev);
> +   if (ret) {
> +   printf("%s: Could not initialize\n", 
> fm_eth->phydev->dev->name);
> +   return ret;
> +   }
>  #else
> fm_eth->phydev->speed = SPEED_1000;
> fm_eth->phydev->link = 1;
> diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
> index bb57e4d..268d884 100644
> --- a/drivers/net/sh_eth.c
> +++ b/drivers/net/sh_eth.c
> @@ -415,7 +415,11 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t 
> *bd)
> goto err_phy_cfg;
> }
> phy = port_info->phydev;
> -   phy_startup(phy);
> +   ret = phy_startup(phy);
> +   if (ret) {
> +   printf(SHETHER_NAME ": phy startup failure\n");
> +   return ret;
> +   }
>
> val = 0;
>
> diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
> index 3c1c8f0..f5e314b 100644
> --- a/drivers/net/tsec.c
> +++ b/drivers/net/tsec.c
> @@ -480,6 +480,7 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
> int i;
> struct tsec_private *priv = (struct tsec_private *)dev->priv;
> tsec_t *regs = priv->regs;
> +   int ret;
>
> /* Make sure the controller is stopped */
> tsec_halt(dev);
> @@ -511,7 +512,12 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
> startup_tsec(dev);
>
> /* Start up the PHY */
> -   phy_startup(priv->phydev);
> +   ret = phy_startup(priv->phydev);
> +   if (ret) {
> +   printf("Could not initialize PHY %s\n",
> +  priv->phydev->dev->name);
> +   return ret;
> +   }
>
> adjust_link(priv, priv->phydev);
>
> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
> index 7854a04..d777144 100644
> --- a/drivers/net/xilinx_axi_emac.c
> +++ b/drivers/net/xilinx_axi_emac.c
> @@ -272,7 +272,11 @@ static int setup_phy(struct eth_device *dev)
> phydev->advertising = phydev->supported;
> priv->phydev = phydev;
> phy_config(phydev);
> -   phy_startup(phydev);
> +   if (phy_startup(phydev)) {
> +   printf("axiemac: could not initialize PHY %s\n",
> +  phydev->dev->name);
> +   return 0;
> +   }
>
> switch (phydev->speed) {
> case 1000:

Why doesn't this driver use a ret variable?
Other driver's patch used this.

> diff --git a/drivers/net/xilinx_ll_temac.c b/drivers/net/xilinx_ll_temac.c
> index 27dafc1..b67153b 100644
> --- a/drivers/net/xilinx_ll_temac.c
> +++ b/drivers/net/xilinx_ll_temac.c
> @@ -232,6 +232,7 @@ static void ll_temac_halt(struct eth_device *dev)
>  static int ll_temac_init(struct eth_device *dev, bd_t *bis)
>  {
> struct ll_temac *ll_temac = dev->priv;
> +   int ret;
>
> printf("%s: Xilinx XPS LocalLink Tri-Mode Ether MAC #%d at 0x%08X.\n",
> dev->name, dev->index, dev->iobase);
> @@ -240,7 +241,12 @@ static int ll_temac_init(struct eth_device *dev, bd_t 
> *

Re: [U-Boot] [PATCH 0/3] arm: rmobile: kzm9g: enable booting Linux kernel

[Nobuhiro Iwamatsu]

HI,

2012/7/5 Tetsuyuki Kobayashi :
> Hello, Iwamatu-san
>
> I rebased u-boot-sh.git arm/rmobile branch and reworked my patches.
> After this patch set, LTSI kernel can boot on KZM-A9-GT board.
>
> But I found it is not stable. It needs more work.
>
>
> Tetsuyuki Kobayashi (3):
>   arm: rmobile: kzm9g: Modify sdram area
>   arm: rmobile: kzm9g: Adjust low level hardware setting
>   arm: rmobile: kzm9g: change prompt to board specific
>
>  arch/arm/include/asm/arch-rmobile/sh73a0.h |4 +++-
>  board/kmc/kzm9g/kzm9g.c|2 ++
>  include/configs/kzm9g.h|7 ---
>  3 files changed, 9 insertions(+), 4 deletions(-)
>

Applied to my rmobile repository. Thanks.
BTW, do you become a maintainer of kzm9g board?
If it becomes a maintainer, please send the patch to MAINTAINERS file.

Best regards,
  Nobuhiro

-- 
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   iwamatsu at {nigauri.org / debian.org}
   GPG ID: 40AD1FA6
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Re: [U-Boot] U-boot Porting

[Aaron Williams]

Hi Zahid,

I am in charge of U-Boot for OCTEON MIPS. I have not pushed the changes 
back upstream since the amount of code is enormous (over 430K lines of 
code!). Granted, a huge percentage of that is from generated register 
files but it is still a huge amount of code. Just the DRAM 
initialization code is 9600 lines of code for DDR2 and DDR3 support.


We also do things that no other architecture does with U-Boot such as we 
always run in TLB mapped memory. The code is available under GPL but you 
need to contact supp...@cavium.com. With the TLB mapping it no longer 
matters where U-Boot is loaded in memory. The same U-Boot binary image 
can start executing at any 64K flash boundary in the first 4MB of flash 
(so we support the same image as a failsafe and standard bootloader), 
any 4MB boundary in RAM (when booted over PCI or eJTAG) and out of L2 
cache (our top of trunk copies itself from flash to the L2 cache very 
early on to speed up memory initialization). The TLB mapping also allows 
U-Boot to be copied to the very top of memory since KSEG0 is rather 
limited to only 256MB. This is essential since we can support many GB of 
RAM which otherwise requires 64-bit addressing.


I need to push some of my changes back upstream since I have added some 
drivers for some temperature sensors, power monitors, fixed the AHCI 
driver and added a few features over the standard U-Boot (such as 
dynamically generated prompt support).


-Aaron

On 07/05/2012 04:42 AM, sayed zahid wrote:

Hi ,
I have basic knowledge of porting u-boot to a new board. But now i have got
a task to port u-boot on cavium mips based board. As i know that mips
architecture is already supported, but will it support all cavium octeon
mips variants? Please put some light on this. I would be glad if you guys,
give my some idea to where to start with or suggest some documents which
will help me understand and port on a new architecture
Regards
Zahid



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Software Engineer
Cavium, Inc.
(408) 943-7198  (510) 789-8988 (cell)

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Re: [U-Boot] U-boot Porting

[Aaron Williams]

Hi Andreas,

We have been shipping 2011.03 for some time and internally are planning 
to use 2012.07 when it is released since we are tracking the top of 
trunk. We have made a lot of improvements since then and added a lot of 
new capabilities.


-Aaron

On 07/05/2012 06:18 AM, Andreas Bießmann wrote:

Dear sayed zahid,

On 05.07.2012 13:42, sayed zahid wrote:

Hi ,
I have basic knowledge of porting u-boot to a new board. But now i have got
a task to port u-boot on cavium mips based board. As i know that mips
architecture is already supported, but will it support all cavium octeon
mips variants?

I guess no. I had to work with some non mainlined version of u-boot
provided by cavium a year ago (or something around that). At that time
we got a

---8<---
abiessmann@azuregos % git grep U_BOOT_VERSION include/version.h
include/version.h:#define   U_BOOT_VERSION  "U-Boot 1.1.1"
--->8---

:(

AFAIR there was a lot of basic stuff missing in mainline U-Boot to get
Cavium mips64 running at that time so I didn't start to port these
proprietary changes (well it would not have been accepted the way it was
written down; beside that cavium forced us to sign a NDA for that piece
of GPL code).

I have not followed their open source efforts since then, but I saw a
lot of work on the linux-mips list by David Daney and I think Aaron
Williams is working for Cavium too and is on this list. Maybe one of
them can comment?


Please put some light on this. I would be glad if you guys,
give my some idea to where to start with or suggest some documents which
will help me understand and port on a new architecture

You should not hesitate to contact their support and ask for proper
mainline support of u-boot ;)

Enough Cavium bashing.

Regarding your question for documents, I'm sorry I can not help you
here. I recommend start working with some mainlined device which is
comparable, get firm with the architecture, try to find commonalities,
get the new cpu in u-boot step by step.

Best regards

Andreas Bießmann




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Cavium, Inc.
(408) 943-7198  (510) 789-8988 (cell)

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[U-Boot] [PATCH] rmobile: kzm9g: Fix warnin in cmp_loop function

[Nobuhiro Iwamatsu]

cmp_loop function was used from the structure of register.
And for the member of this structure, volatile is defined.
Since a volatile declaration of cmp_loop function is not made
by argument, made warning by compiler. This fixes this problem.

Signed-off-by: Nobuhiro Iwamatsu 
---
 board/kmc/kzm9g/kzm9g.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index ad72c8d..8d7c61a 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -48,7 +48,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PORT34CR (0xE6051022)
 #define PORT35CR (0xE6051023)
 
-static int cmp_loop(u32 *addr, u32 data, u32 cmp)
+static int cmp_loop(volatile u32 *addr, u32 data, u32 cmp)
 {
int err = -1;
int timeout = 100;
-- 
1.7.10

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[U-Boot] [PATCH] arm: rmobile: Support build with gcc-4.6 or later

[Nobuhiro Iwamatsu]

Latest rmobile code was tested by using old gcc (gcc-4.4).
When we use gcc-4.6 (or later), the build is made, but does not work.
This solves a problem not to work by add -march=armv5 to compiple option
when we built in gcc-4.6 (or later).
I tested by linaro's compiler version 2012.04-20120426.

Signed-off-by: Nobuhiro Iwamatsu 
---
 arch/arm/cpu/armv7/rmobile/config.mk   |   26 ++
 arch/arm/cpu/armv7/rmobile/lowlevel_init.S |2 --
 2 files changed, 26 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/rmobile/config.mk

diff --git a/arch/arm/cpu/armv7/rmobile/config.mk 
b/arch/arm/cpu/armv7/rmobile/config.mk
new file mode 100644
index 000..1da0227
--- /dev/null
+++ b/arch/arm/cpu/armv7/rmobile/config.mk
@@ -0,0 +1,26 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, 
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
+
+# Make ARMv5 to allow more compilers to work, even though its v7a.
+PLATFORM_CPPFLAGS += -march=armv5
diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init.S 
b/arch/arm/cpu/armv7/rmobile/lowlevel_init.S
index 4f2ed02..daf6659 100644
--- a/arch/arm/cpu/armv7/rmobile/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init.S
@@ -49,8 +49,6 @@ wait_interrupt:
str r2, [r1]
 
 wait_loop:
-   wfi
-
ldr r2, [r1, #0xC]
str r2, [r1, #0x10]
 
-- 
1.7.10

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[U-Boot] [PATCH] net: make net_rand.h inclusion depend on BOOTP_RANDOM_DELAY

[Kim Phillips]

commit "net: use common rand()/srand() functions" introduced the following
build warning on the current u-boot-arm tree:

$ ./MAKEALL MPC8313ERDB_66
Configuring for MPC8313ERDB_66 - Board: MPC8313ERDB, Options: SYS_66MHZ
   textdata bss dec hex filename
 271988   13976   41768  327732   50034 ./u-boot
In file included from bootp.c:15:0:
net_rand.h: In function 'srand_mac':
net_rand.h:40:2: warning: implicit declaration of function 'srand' 
[-Wimplicit-function-declaration]

adding this dependency fixes it.

Cc: Michael Walle 
Cc: Joe Hershberger 
Signed-off-by: Kim Phillips 
---
 net/bootp.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/net/bootp.c b/net/bootp.c
index 0f0867b..87e30ab 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -12,12 +12,14 @@
 #include 
 #include 
 #include "bootp.h"
-#include "net_rand.h"
 #include "tftp.h"
 #include "nfs.h"
 #ifdef CONFIG_STATUS_LED
 #include 
 #endif
+#ifdef CONFIG_BOOTP_RANDOM_DELAY
+#include "net_rand.h"
+#endif
 
 #define BOOTP_VENDOR_MAGIC 0x63825363  /* RFC1048 Magic Cookie */
 
-- 
1.7.11.1

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Re: [U-Boot] U-boot Porting

[Daniel Schwierzeck]

Hi Sayed,

2012/7/5 Andreas Bießmann :
> Dear sayed zahid,
>
> On 05.07.2012 13:42, sayed zahid wrote:
>> Hi ,
>> I have basic knowledge of porting u-boot to a new board. But now i have got
>> a task to port u-boot on cavium mips based board. As i know that mips
>> architecture is already supported, but will it support all cavium octeon
>> mips variants?
>
> I guess no. I had to work with some non mainlined version of u-boot
> provided by cavium a year ago (or something around that). At that time
> we got a
>
> ---8<---
> abiessmann@azuregos % git grep U_BOOT_VERSION include/version.h
> include/version.h:#define   U_BOOT_VERSION  "U-Boot 1.1.1"
> --->8---
>
> :(
>
> AFAIR there was a lot of basic stuff missing in mainline U-Boot to get
> Cavium mips64 running at that time so I didn't start to port these
> proprietary changes (well it would not have been accepted the way it was
> written down; beside that cavium forced us to sign a NDA for that piece
> of GPL code).
>
> I have not followed their open source efforts since then, but I saw a
> lot of work on the linux-mips list by David Daney and I think Aaron
> Williams is working for Cavium too and is on this list. Maybe one of
> them can comment?
>
>> Please put some light on this. I would be glad if you guys,
>> give my some idea to where to start with or suggest some documents which
>> will help me understand and port on a new architecture
>
> You should not hesitate to contact their support and ask for proper
> mainline support of u-boot ;)
>

AFAIK Aaron Williams is actively working on that issue. You can find
some infos in the
mailing list archives:

http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/88757/focus=88759
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/94220/focus=94229

Best regards,
Daniel
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Re: [U-Boot] [PATCH v2 1/5] arm: rmobile: Add basic support for Renesas R-Mobile

[Nobuhiro Iwamatsu]

Hi,

Tetsuyuki Kobayashi さんは書きました:

Thank you, Iwamatu-san.

But I am afraid that [PATCH v2 2/5] is missing. I didn't recieve it.



This mail was blocked by Mailing List system. Size of Mail is too big.
If you can show patchwork, you can get from that.
  http://patchwork.ozlabs.org/patch/169095/


Best regards,
  Nobuhiro

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[U-Boot] [PATCH v3] arm: rmobile: Add supoprt for KMC KZM-A9-GT board

[Nobuhiro Iwamatsu]

The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM,
USB, Ethernet, and more.

This patch supports the following functions:
- 512MB DDR2-SDRAM
- 16MB NOR Flash memory
- Serial console (SCIF)
- Ethernet (SCIM)
- I2C

Signed-off-by: Nobuhiro Iwamatsu 
---
 V3: Fix operator in LIFEC_SEC_SRC_BIT.
 Change __KZM_A9_GT_H from __KZM9G_H to __KZM9G_H.
 
 MAINTAINERS   |4 +
 arch/arm/include/asm/mach-types.h |2 +
 board/kmc/kzm9g/Makefile  |   50 +
 board/kmc/kzm9g/kzm9g.c   |  372 +
 boards.cfg|1 +
 include/configs/kzm9g.h   |  168 +
 6 files changed, 597 insertions(+)
 create mode 100644 board/kmc/kzm9g/Makefile
 create mode 100644 board/kmc/kzm9g/kzm9g.c
 create mode 100644 include/configs/kzm9g.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 17befd0..cb51ecd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -944,6 +944,10 @@ Vladimir Zapolskiy 
 
devkit3250  lpc32xx
 
+Nobuhiro Iwamatsu 
+
+   kzm9g   SH73A0 (RMOBILE SoC)
+
 -
 
 Unknown / orphaned boards:
diff --git a/arch/arm/include/asm/mach-types.h 
b/arch/arm/include/asm/mach-types.h
index 2d5c3bc..98c992c 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -1106,6 +1106,8 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_ATDGP318 3494
 #define MACH_TYPE_OMAP5_SEVM   3777
 
+#define MACH_TYPE_KZM9G4140
+
 #ifdef CONFIG_ARCH_EBSA110
 # ifdef machine_arch_type
 #  undef machine_arch_type
diff --git a/board/kmc/kzm9g/Makefile b/board/kmc/kzm9g/Makefile
new file mode 100644
index 000..bae79f5
--- /dev/null
+++ b/board/kmc/kzm9g/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2012 Nobuhiro Iwamatsu 
+# (C) Copyright 2012 Renesas Solutions Corp.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := kzm9g.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj) .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
new file mode 100644
index 000..ad72c8d
--- /dev/null
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -0,0 +1,372 @@
+/*
+ * (C) Copyright 2012 Nobuhiro Iwamatsu 
+ * (C) Copyright 2012 Renesas Solutions Corp.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CS0BCR_D (0x06C00400)
+#define CS4BCR_D (0x06C00400)
+#define CS0WCR_D (0x55062C42)
+#define CS4WCR_D (0x19051443)
+#define CMNCR_BROMMD0   (1 << 21)
+#define CMNCR_BROMMD1   (1 << 22)
+#define CMNCR_BROMMD   (CMNCR_BROMMD0|CMNCR_BROMMD1)
+#define VCLKCR1_D  (0x27)
+
+#define SMSTPCR1_CMT0  (1 << 24)
+#define SMSTPCR1_I2C0  (1 << 16)
+#define SMSTPCR3_USB   (1 <

Re: [U-Boot] [PATCH v2 5/5] arm: rmobile: Add supoprt for KMC KZM-A9-GT board

[Nobuhiro Iwamatsu]

Hi,

Thank you for your review.

2012/7/5 Tetsuyuki Kobayashi :
> Hello, Iwamatsu-san
>
>
> (2012/07/05 16:01), Nobuhiro Iwamatsu wrote:
>
>> diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
>> new file mode 100644
>> index 000..3f38f69
>> --- /dev/null
>> +++ b/board/kmc/kzm9g/kzm9g.c
>
> [...]
>>
>> +void s_init(void)
>> +{
>
> [...]
>
>> +   /* Secure control register Init */
>> +   #define LIFEC_SEC_SRC_BIT   (1 < 15)
>> +   writel(readl(LIFEC_SEC_SRC) & ~LIFEC_SEC_SRC_BIT, LIFEC_SEC_SRC);
>
>
> (1 < 15) ?
> It seems strange. typo of (1 << 15) ?
>
>
> -   actux1:FLASH1X8
>>
>> diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
>> new file mode 100644
>> index 000..62ecadc
>> --- /dev/null
>> +++ b/include/configs/kzm9g.h
>
> [...]
>
>> +
>> +#ifndef __KZM_A9_GT_H
>> +#define __KZM_A9_GT_H
>
>
> Trivial.
> __KZM9G_H
>
>> +#endif /* __KZM_A9_GT_H */
>>
> __KZM9G_H
>
>

Thanks, I will fix these.

Best regards,
  Nobuhiro

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Re: [U-Boot] [PATCH v8 2/4] net: use common rand()/srand() functions

[Michael Walle]

Am Donnerstag 05 Juli 2012, 20:18:12 schrieb Kim Phillips:
> On Mon, 4 Jun 2012 15:10:55 -0500
> 
> Joe Hershberger  wrote:
> > On Fri, Jun 1, 2012 at 3:39 PM, Michael Walle  wrote:
> > > Replace rand() with the functions from lib/. The link-local network
> > > code stores its own seed, derived from the MAC address. Thus making it
> > > independent from calls to srand() in other modules.
> > > 
> > > Signed-off-by: Michael Walle 
> > > Cc: Joe Hershberger 
> > > ---
> > 
> > Acked-by: Joe Hershberger 
> 
> build-testing mpc83xx on the current u-boot-arm tree
> (v1.3.4-10940-gb003588, which contains this patch) produces the
> following new warning:
> 
> $ ./MAKEALL MPC8313ERDB_66
> Configuring for MPC8313ERDB_66 - Board: MPC8313ERDB, Options: SYS_66MHZ
>text  data bss dec hex filename
>  271988 13976   41768  327732   50034 ./u-boot
> In file included from bootp.c:15:0:
> net_rand.h: In function 'srand_mac':
> net_rand.h:40:2: warning: implicit declaration of function 'srand'
> [-Wimplicit-function-declaration]
> 
> How do we fix this?

sth like that for example?

diff --git a/net/bootp.c b/net/bootp.c
index 0f0867b..87e30ab 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -12,12 +12,14 @@
 #include 
 #include 
 #include "bootp.h"
-#include "net_rand.h"
 #include "tftp.h"
 #include "nfs.h"
 #ifdef CONFIG_STATUS_LED
 #include 
 #endif
+#ifdef CONFIG_BOOTP_RANDOM_DELAY
+#include "net_rand.h"
+#endif
 

-- 
Michael
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Re: [U-Boot] Please pull u-boot-staging.git/s...@denx.de

[Albert ARIBAUD]

Hi Stefan,

On Thu, 5 Jul 2012 15:10:26 +0200, Stefan Roese  wrote:
> Hi Albert,
> 
> as you seem to be working on U-Boot patches right now, here another short 
> reminder from me. ;)
> 
> Thanks,
> Stefan

Can you rebase this on current uboot-arm? Sorry for the inconvenience.

Amicalement,
-- 
Albert.
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Re: [U-Boot] Please pull u-boot-ti/master

[Albert ARIBAUD]

Hi Tom,

On Thu, 5 Jul 2012 09:18:38 -0700, Tom Rini  wrote:
> Hi Albert,
> 
> The following changes since commit 863ba81c70d8ca8dc49e0c5a28a1fd0fb23ca62d:
> 
>   arm: bugfix: Move vector table before jumping relocated code (2012-07-05 
> 14:01:28 +0200)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-ti master
> 
> for you to fetch changes up to 5af86f75c46f15ae7d499593d52cd7db998b8428:
> 
>   cm-t35: fix incorrect NAND_ECC layout selection (2012-07-05 09:05:53 -0700)

Applied to u-boot-arm/master, thanks.

Note: Ubuntu's Linaro toolchain still builds 280 boards clean, although some
'attention' messages are emitted which escape the build system's warning
detection.

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH 1/2] Remove unused CONFIG_STACKSIZE

[Rob Herring]

Albert,

On 07/05/2012 05:10 AM, Albert ARIBAUD wrote:
> Hi Rob,
> 
> On Thu, 28 Jun 2012 08:54:10 -0500, Rob Herring 
> wrote:
>> From: Rob Herring 
>>
>> CONFIG_STACKSIZE is not referenced anywhere except on AVR32, but
>> present in most ARM boards. The IRQ and FIQ stacks are not setup in
>> start.S, but arch/arm/lib/board.c, so also remove those comments.
> 
> Not sure I understand the last point. Can you clarify? How does this
> relate to keeping FIQ / IRQ stack size declarations in config files?
> E.g.:

The irq and fiq stack sizes are setup in arch/arm/lib/board.c, not
start.S as the comment suggested.

There's only 2 boards that turn on USE_IRQ and I'm not convinced they
would actually work after a brief look. Perhaps we should just remove
all the defines except from those 2 boards.

Rob

>> diff --git a/include/configs/SX1.h b/include/configs/SX1.h
>> index ea09368..1c4f305 100644
>> --- a/include/configs/SX1.h
>> +++ b/include/configs/SX1.h
>> @@ -141,10 +141,7 @@
>>  
>>  /*---
>>   * Stack sizes
>> - *
>> - * The stack sizes are set up in start.S using the settings below
>>   */
>> -#define CONFIG_STACKSIZE(128*1024)  /* regular stack */
>>  #ifdef CONFIG_USE_IRQ
>>  #define CONFIG_STACKSIZE_IRQ(4*1024)/* IRQ stack */
>>  #define CONFIG_STACKSIZE_FIQ(4*1024)/* FIQ stack */
> 
> These are kept, which seems to not match or explain the commit msg.
> 
> Amicalement,
> 

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Re: [U-Boot] [PATCH] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

[Marek Vasut]

Dear Ilya Yanok,

> Hi Marek,
> 
> On Thu, Jul 5, 2012 at 11:58 PM, Marek Vasut  wrote:
> > > Yep. I even thought about this but decided not to do... can't recall
> > > why. Now I think it's really a good idea.
> > > 
> > > > Maybe we should create DEFINE_ALIGNED_VARIABLE as a common.h macro?
> > 
> > Like what's in common.h -- ALLOC_CACHE_ALIGN_BUFFER ?
> 
> Yes, but for static variables and not hard-bound to ARCH_DMA_MINALIGN.

Good idea :)

> > > Hm.. Maybe. Ideas? ;) Actually I also thought about moving all this
> > > stuff to a single proper aligned buffer and do flush/invalidate for a
> > > whole buffer at once. It can save us some space... but it's BSS
> > > anyway... Don't know if it's worth it...
> > 
> > But if you copy stuff back and forth, it'll cause performance hit.
> 
> No, you talk about full bounce-buffering support and meant only one big
> buffer for internal structs.

Sure, but the internal structs can be aligned on their own, so there's no need 
for a buffer.

> Regards, Ilya.

Best regards,
Marek Vasut
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[U-Boot] [PATCH 2/2] net: abort network initialization if the PHY driver fails

[Timur Tabi]

Now that phy_startup() can return an actual error code, check for that error
code and abort network initialization if the PHY fails.

Signed-off-by: Timur Tabi 
---
 drivers/net/fec_mxc.c |7 ++-
 drivers/net/fm/eth.c  |9 -
 drivers/net/sh_eth.c  |6 +-
 drivers/net/tsec.c|8 +++-
 drivers/net/xilinx_axi_emac.c |6 +-
 drivers/net/xilinx_ll_temac.c |8 +++-
 6 files changed, 38 insertions(+), 6 deletions(-)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index eee41d7..7a3d16b 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -510,7 +510,12 @@ static int fec_open(struct eth_device *edev)
fec_eth_phy_config(edev);
if (fec->phydev) {
/* Start up the PHY */
-   phy_startup(fec->phydev);
+   int ret = phy_startup(fec->phydev);
+   if (ret) {
+   printf("Could not initialize PHY %s\n",
+  fm_eth->phydev->dev->name);
+   return ret;
+   }
speed = fec->phydev->speed;
} else {
speed = _100BASET;
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index f34f4db..2b616ad 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -363,6 +363,9 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd)
 {
struct fm_eth *fm_eth;
struct fsl_enet_mac *mac;
+#ifdef CONFIG_PHYLIB
+   int ret;
+#endif
 
fm_eth = (struct fm_eth *)dev->priv;
mac = fm_eth->mac;
@@ -384,7 +387,11 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd)
fmc_tx_port_graceful_stop_disable(fm_eth);
 
 #ifdef CONFIG_PHYLIB
-   phy_startup(fm_eth->phydev);
+   ret = phy_startup(fm_eth->phydev);
+   if (ret) {
+   printf("%s: Could not initialize\n", fm_eth->phydev->dev->name);
+   return ret;
+   }
 #else
fm_eth->phydev->speed = SPEED_1000;
fm_eth->phydev->link = 1;
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index bb57e4d..268d884 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -415,7 +415,11 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
goto err_phy_cfg;
}
phy = port_info->phydev;
-   phy_startup(phy);
+   ret = phy_startup(phy);
+   if (ret) {
+   printf(SHETHER_NAME ": phy startup failure\n");
+   return ret;
+   }
 
val = 0;
 
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3c1c8f0..f5e314b 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -480,6 +480,7 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
int i;
struct tsec_private *priv = (struct tsec_private *)dev->priv;
tsec_t *regs = priv->regs;
+   int ret;
 
/* Make sure the controller is stopped */
tsec_halt(dev);
@@ -511,7 +512,12 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
startup_tsec(dev);
 
/* Start up the PHY */
-   phy_startup(priv->phydev);
+   ret = phy_startup(priv->phydev);
+   if (ret) {
+   printf("Could not initialize PHY %s\n",
+  priv->phydev->dev->name);
+   return ret;
+   }
 
adjust_link(priv, priv->phydev);
 
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 7854a04..d777144 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -272,7 +272,11 @@ static int setup_phy(struct eth_device *dev)
phydev->advertising = phydev->supported;
priv->phydev = phydev;
phy_config(phydev);
-   phy_startup(phydev);
+   if (phy_startup(phydev)) {
+   printf("axiemac: could not initialize PHY %s\n",
+  phydev->dev->name);
+   return 0;
+   }
 
switch (phydev->speed) {
case 1000:
diff --git a/drivers/net/xilinx_ll_temac.c b/drivers/net/xilinx_ll_temac.c
index 27dafc1..b67153b 100644
--- a/drivers/net/xilinx_ll_temac.c
+++ b/drivers/net/xilinx_ll_temac.c
@@ -232,6 +232,7 @@ static void ll_temac_halt(struct eth_device *dev)
 static int ll_temac_init(struct eth_device *dev, bd_t *bis)
 {
struct ll_temac *ll_temac = dev->priv;
+   int ret;
 
printf("%s: Xilinx XPS LocalLink Tri-Mode Ether MAC #%d at 0x%08X.\n",
dev->name, dev->index, dev->iobase);
@@ -240,7 +241,12 @@ static int ll_temac_init(struct eth_device *dev, bd_t *bis)
return -1;
 
/* Start up the PHY */
-   phy_startup(ll_temac->phydev);
+   ret = phy_startup(ll_temac->phydev);
+   if (ret) {
+   printf("%s: Could not initialize PHY %s\n",
+  dev->name, ll_temac->phydev->dev->name);
+   return ret;
+   }
 
if (!ll_temac_adjust_link(dev)) {

[U-Boot] [PATCH 1/2] phylib: phy_startup() should return an error code on failure

[Timur Tabi]

phy_startup() calls the PHY driver's startup function, but it ignores the
return code from that function, and so it never returns any failures.

Signed-off-by: Timur Tabi 
---
 drivers/net/phy/phy.c |5 -
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 7d327f7..baef60f 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -723,10 +723,13 @@ struct phy_device *phy_connect(struct mii_dev *bus, int 
addr,
return phydev;
 }
 
+/*
+ * Start the PHY.  Returns 0 on success, or a negative error code.
+ */
 int phy_startup(struct phy_device *phydev)
 {
if (phydev->drv->startup)
-   phydev->drv->startup(phydev);
+   return phydev->drv->startup(phydev);
 
return 0;
 }
-- 
1.7.3.4


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[U-Boot] [PATCH V2 22/25] i.mx: iomux-v3.c: move to imx-common directory

[Troy Kisky]

Signed-off-by: Troy Kisky 
---
v2: no change
---
 arch/arm/cpu/armv7/imx-common/Makefile|2 +-
 arch/arm/cpu/armv7/{mx6 => imx-common}/iomux-v3.c |0
 arch/arm/cpu/armv7/mx6/Makefile   |2 +-
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename arch/arm/cpu/armv7/{mx6 => imx-common}/iomux-v3.c (100%)

diff --git a/arch/arm/cpu/armv7/imx-common/Makefile 
b/arch/arm/cpu/armv7/imx-common/Makefile
index e5ff375..53296fa 100644
--- a/arch/arm/cpu/armv7/imx-common/Makefile
+++ b/arch/arm/cpu/armv7/imx-common/Makefile
@@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
 
 LIB = $(obj)libimx-common.o
 
-COBJS  = timer.o cpu.o speed.o
+COBJS  = iomux-v3.o timer.o cpu.o speed.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/arm/cpu/armv7/mx6/iomux-v3.c 
b/arch/arm/cpu/armv7/imx-common/iomux-v3.c
similarity index 100%
rename from arch/arm/cpu/armv7/mx6/iomux-v3.c
rename to arch/arm/cpu/armv7/imx-common/iomux-v3.c
diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile
index b0da028..cbce411 100644
--- a/arch/arm/cpu/armv7/mx6/Makefile
+++ b/arch/arm/cpu/armv7/mx6/Makefile
@@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(SOC).o
 
-COBJS  = soc.o clock.o iomux-v3.o
+COBJS  = soc.o clock.o
 SOBJS   = lowlevel_init.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-- 
1.7.9.5

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[U-Boot] [PATCH V2 16/25] mxc_i2c: add i2c_regs argument to i2c_imx_stop

[Troy Kisky]

This is prep work for CONFIG_I2C_MULTI_BUS.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 

---
v2: add ack
---
 drivers/i2c/mxc_i2c.c |   19 +++
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index cbb0fff..44a04b5 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -201,10 +201,9 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 /*
  * Stop I2C transaction
  */
-void i2c_imx_stop(void)
+static void i2c_imx_stop(struct mxc_i2c_regs *i2c_regs)
 {
int ret;
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
unsigned int temp = readb(&i2c_regs->i2cr);
 
temp &= ~(I2CR_MSTA | I2CR_MTX);
@@ -271,7 +270,7 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
ret = i2c_init_transfer_(i2c_regs, chip, addr, alen);
if (ret >= 0)
return 0;
-   i2c_imx_stop();
+   i2c_imx_stop(i2c_regs);
if (ret == -ENODEV)
return ret;
 
@@ -305,7 +304,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
 
ret = tx_byte(i2c_regs, (chip << 1) | 1);
if (ret < 0) {
-   i2c_imx_stop();
+   i2c_imx_stop(i2c_regs);
return ret;
}
 
@@ -322,7 +321,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
for (i = 0; i < len; i++) {
ret = wait_for_sr_state(i2c_regs, ST_IIF);
if (ret < 0) {
-   i2c_imx_stop();
+   i2c_imx_stop(i2c_regs);
return ret;
}
 
@@ -331,7 +330,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
 * controller from generating another clock cycle
 */
if (i == (len - 1)) {
-   i2c_imx_stop();
+   i2c_imx_stop(i2c_regs);
} else if (i == (len - 2)) {
temp = readb(&i2c_regs->i2cr);
temp |= I2CR_TX_NO_AK;
@@ -340,9 +339,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
writeb(0, &i2c_regs->i2sr);
buf[i] = readb(&i2c_regs->i2dr);
}
-
-   i2c_imx_stop();
-
+   i2c_imx_stop(i2c_regs);
return 0;
 }
 
@@ -364,9 +361,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, 
int len)
if (ret < 0)
break;
}
-
-   i2c_imx_stop();
-
+   i2c_imx_stop(i2c_regs);
return ret;
 }
 
-- 
1.7.9.5

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[U-Boot] [PATCH V2 13/25] mxc_i2c: change slave addr if conflicts with destination.

[Troy Kisky]

The i2c controller cannot be both master and slave in the
same transaction.

Signed-off-by: Troy Kisky 

---
v2: no change
---
 drivers/i2c/mxc_i2c.c |2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 1a5e379..ba2aad3 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -223,6 +223,8 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
/* Wait for controller to be stable */
udelay(50);
}
+   if (readb(&i2c_regs->iadr) == (chip << 1))
+   writeb((chip << 1) ^ 2, &i2c_regs->iadr);
writeb(0, &i2c_regs->i2sr);
ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
if (ret < 0)
-- 
1.7.9.5

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[U-Boot] [PATCH V2 21/25] i.mx: iomux-v3.h: move to imx-common include directory

[Troy Kisky]

Signed-off-by: Troy Kisky 

---
v2: no change
---
 arch/arm/cpu/armv7/mx6/iomux-v3.c  |2 +-
 arch/arm/include/asm/arch-mx6/mx6x_pins.h  |2 +-
 .../asm/{arch-mx6 => imx-common}/iomux-v3.h|0
 board/freescale/mx6qarm2/mx6qarm2.c|2 +-
 board/freescale/mx6qsabrelite/mx6qsabrelite.c  |2 +-
 drivers/usb/host/ehci-mx6.c|2 +-
 6 files changed, 5 insertions(+), 5 deletions(-)
 rename arch/arm/include/asm/{arch-mx6 => imx-common}/iomux-v3.h (100%)

diff --git a/arch/arm/cpu/armv7/mx6/iomux-v3.c 
b/arch/arm/cpu/armv7/mx6/iomux-v3.c
index a0c4b15..da093fb 100644
--- a/arch/arm/cpu/armv7/mx6/iomux-v3.c
+++ b/arch/arm/cpu/armv7/mx6/iomux-v3.c
@@ -23,7 +23,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 static void *base = (void *)IOMUXC_BASE_ADDR;
 
diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h 
b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
index afaa068..c0bb494 100644
--- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
@@ -22,7 +22,7 @@
 #ifndef __ASM_ARCH_MX6_MX6X_PINS_H__
 #define __ASM_ARCH_MX6_MX6X_PINS_H__
 
-#include 
+#include 
 
 /* Use to set PAD control */
 #define PAD_CTL_HYS(1 << 16)
diff --git a/arch/arm/include/asm/arch-mx6/iomux-v3.h 
b/arch/arm/include/asm/imx-common/iomux-v3.h
similarity index 100%
rename from arch/arm/include/asm/arch-mx6/iomux-v3.h
rename to arch/arm/include/asm/imx-common/iomux-v3.h
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c 
b/board/freescale/mx6qarm2/mx6qarm2.c
index 1367b88..340c4c4 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -24,9 +24,9 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c 
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 72b4b54..74ce84c 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -24,9 +24,9 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 5dec673..f2523f6 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -22,7 +22,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "ehci.h"
 #include "ehci-core.h"
-- 
1.7.9.5

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[U-Boot] [PATCH V2 15/25] mxc_i2c: add retries

[Troy Kisky]

Retry unexpected hardware errors. This
will not retry a received NAK.

Signed-off-by: Troy Kisky 

---
v2: if i2c_init_transfer_ returns no error, then return 0
---
 drivers/i2c/mxc_i2c.c |   36 +++-
 1 file changed, 27 insertions(+), 9 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 093a73f..cbb0fff 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -218,7 +218,7 @@ void i2c_imx_stop(void)
  * Send start signal, chip address and
  * write register address
  */
-static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
+static int i2c_init_transfer_(struct mxc_i2c_regs *i2c_regs,
uchar chip, uint addr, int alen)
 {
unsigned int temp;
@@ -235,7 +235,7 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
writeb(0, &i2c_regs->i2sr);
ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
if (ret < 0)
-   goto exit;
+   return ret;
 
/* Start I2C transaction */
temp = readb(&i2c_regs->i2cr);
@@ -244,7 +244,7 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 
ret = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
if (ret < 0)
-   goto exit;
+   return ret;
 
temp |= I2CR_MTX | I2CR_TX_NO_AK;
writeb(temp, &i2c_regs->i2cr);
@@ -252,18 +252,36 @@ static int i2c_init_transfer(struct mxc_i2c_regs 
*i2c_regs,
/* write slave address */
ret = tx_byte(i2c_regs, chip << 1);
if (ret < 0)
-   goto exit;
+   return ret;
 
while (alen--) {
ret = tx_byte(i2c_regs, (addr >> (alen * 8)) & 0xff);
if (ret < 0)
-   goto exit;
+   return ret;
}
return 0;
-exit:
-   i2c_imx_stop();
-   /* Disable I2C controller */
-   writeb(0, &i2c_regs->i2cr);
+}
+
+static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
+   uchar chip, uint addr, int alen)
+{
+   int retry;
+   int ret;
+   for (retry = 0; retry < 3; retry++) {
+   ret = i2c_init_transfer_(i2c_regs, chip, addr, alen);
+   if (ret >= 0)
+   return 0;
+   i2c_imx_stop();
+   if (ret == -ENODEV)
+   return ret;
+
+   printf("%s: failed for chip 0x%x retry=%d\n", __func__, chip,
+   retry);
+   if (ret != -ERESTART)
+   writeb(0, &i2c_regs->i2cr); /* Disable controller */
+   udelay(100);
+   }
+   printf("%s: give up i2c_regs=%p\n", __func__, i2c_regs);
return ret;
 }
 
-- 
1.7.9.5

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[U-Boot] [PATCH V2 20/25] iomux-v3: remove include of mx6x_pins.h

[Troy Kisky]

This include is not needed.

Signed-off-by: Troy Kisky 

---
v2: no change
---
 arch/arm/cpu/armv7/mx6/iomux-v3.c |1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/mx6/iomux-v3.c 
b/arch/arm/cpu/armv7/mx6/iomux-v3.c
index 8785532..a0c4b15 100644
--- a/arch/arm/cpu/armv7/mx6/iomux-v3.c
+++ b/arch/arm/cpu/armv7/mx6/iomux-v3.c
@@ -23,7 +23,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 static void *base = (void *)IOMUXC_BASE_ADDR;
-- 
1.7.9.5

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[U-Boot] [PATCH V2 24/25] imx-common: add i2c.c for bus recovery support

[Troy Kisky]

Signed-off-by: Troy Kisky 

---
v2: do nothing if bus is already idle
print failure message if appropriate
change enable_i2c_clock to enable_i2c_clk
clear non-idle bus before calling bus_i2c_init.
wait .2 seconds for bus to clear before returning error
fix compiler warnings
---
 arch/arm/cpu/armv7/imx-common/Makefile|4 +-
 arch/arm/cpu/armv7/imx-common/i2c.c   |   98 +
 arch/arm/cpu/armv7/mx5/clock.c|   20 ++
 arch/arm/cpu/armv7/mx6/clock.c|   20 ++
 arch/arm/include/asm/arch-mx5/clock.h |1 +
 arch/arm/include/asm/arch-mx6/clock.h |1 +
 arch/arm/include/asm/imx-common/mxc_i2c.h |   42 +
 7 files changed, 185 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv7/imx-common/i2c.c
 create mode 100644 arch/arm/include/asm/imx-common/mxc_i2c.h

diff --git a/arch/arm/cpu/armv7/imx-common/Makefile 
b/arch/arm/cpu/armv7/imx-common/Makefile
index 53296fa..bf36be5 100644
--- a/arch/arm/cpu/armv7/imx-common/Makefile
+++ b/arch/arm/cpu/armv7/imx-common/Makefile
@@ -27,7 +27,9 @@ include $(TOPDIR)/config.mk
 
 LIB = $(obj)libimx-common.o
 
-COBJS  = iomux-v3.o timer.o cpu.o speed.o
+COBJS-y= iomux-v3.o timer.o cpu.o speed.o
+COBJS-$(CONFIG_I2C_MXC) += i2c.o
+COBJS  := $(sort $(COBJS-y))
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/arm/cpu/armv7/imx-common/i2c.c 
b/arch/arm/cpu/armv7/imx-common/i2c.c
new file mode 100644
index 000..e32062d
--- /dev/null
+++ b/arch/arm/cpu/armv7/imx-common/i2c.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2012 Boundary Devices Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int toggle_scl(void *priv)
+{
+   int i;
+   int sda, scl;
+   ulong elapsed, start_time;
+   struct i2c_pads_info *p = (struct i2c_pads_info *)priv;
+   int ret = 0;
+
+   gpio_direction_input(p->sda.gp);
+   gpio_direction_input(p->scl.gp);
+
+   imx_iomux_v3_setup_pad(p->sda.gpio_mode);
+   imx_iomux_v3_setup_pad(p->scl.gpio_mode);
+
+   sda = gpio_get_value(p->sda.gp);
+   scl = gpio_get_value(p->scl.gp);
+   if ((sda & scl) == 1)
+   goto exit;  /* Bus is idle already */
+
+   printf("%s: sda=%d scl=%d sda.gp=0x%x scl.gp=0x%x\n", __func__,
+   sda, scl, p->sda.gp, p->scl.gp);
+   /* Send high and low on the SCL line */
+   for (i = 0; i < 9; i++) {
+   gpio_direction_output(p->scl.gp, 0);
+   udelay(50);
+   gpio_direction_input(p->scl.gp);
+   udelay(50);
+   }
+   start_time = get_timer(0);
+   for (;;) {
+   sda = gpio_get_value(p->sda.gp);
+   scl = gpio_get_value(p->scl.gp);
+   if ((sda & scl) == 1)
+   break;
+   WATCHDOG_RESET();
+   elapsed = get_timer(start_time);
+   if (elapsed > (CONFIG_SYS_HZ / 5)) {/* .2 seconds */
+   ret = -EBUSY;
+   printf("%s: toggle failed to clear bus, sda=%d "
+   "scl=%d\n", __func__, sda, scl);
+   break;
+   }
+   }
+exit:
+   imx_iomux_v3_setup_pad(p->sda.i2c_mode);
+   imx_iomux_v3_setup_pad(p->scl.i2c_mode);
+   return ret;
+}
+
+static void * const i2c_bases[] = {
+   (void *)I2C1_BASE_ADDR,
+   (void *)I2C2_BASE_ADDR,
+#ifdef I2C3_BASE_ADDR
+   (void *)I2C3_BASE_ADDR,
+#endif
+};
+
+/* i2c_index can be from 0 - 2 */
+void setup_i2c(unsigned i2c_index, int speed, int slave_addr,
+   struct i2c_pads_info *p)
+{
+   if (i2c_index >= ARRAY_SIZE(i2c_bases))
+   return;
+   /* Enable i2c clock */
+   enable_i2c_clk(1, i2c_index);
+   /* Make sure bus is idle */
+   toggle_scl(p);
+   bus_i2c_init(i2c_bases[i2c_index], speed, slave_addr, toggle_scl, p);
+}
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index e92f106..c2220b0 100644
--- a/arch/arm/cpu/armv7/mx5/cloc

[U-Boot] [PATCH V2 17/25] mxc_i2c: prep work for multiple busses support

[Troy Kisky]

Signed-off-by: Troy Kisky 

---
v2: moved global data to static ram section available before ram
is initialized and removed typedef as suggested by Marek Vasut
and Heiko Schocher

make toggle_fn return int.
---
 drivers/i2c/mxc_i2c.c |  125 -
 1 file changed, 104 insertions(+), 21 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 44a04b5..d5448d8 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -59,9 +59,7 @@ struct mxc_i2c_regs {
 #define I2SR_IIF   (1 << 1)
 #define I2SR_RX_NO_AK  (1 << 0)
 
-#ifdef CONFIG_SYS_I2C_BASE
-#define I2C_BASE   CONFIG_SYS_I2C_BASE
-#else
+#if defined(CONFIG_HARD_I2C) && !defined(CONFIG_SYS_I2C_BASE)
 #error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"
 #endif
 
@@ -115,11 +113,11 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
 }
 
 /*
- * Init I2C Bus
+ * Set I2C Bus speed
  */
-void i2c_init(int speed, int unused)
+int bus_i2c_set_bus_speed(void *base, int speed)
 {
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
+   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
u8 clk_idx = i2c_imx_get_clk(speed);
u8 idx = i2c_clk_div[clk_idx][1];
 
@@ -129,23 +127,15 @@ void i2c_init(int speed, int unused)
/* Reset module */
writeb(0, &i2c_regs->i2cr);
writeb(0, &i2c_regs->i2sr);
-}
-
-/*
- * Set I2C Speed
- */
-int i2c_set_bus_speed(unsigned int speed)
-{
-   i2c_init(speed, 0);
return 0;
 }
 
 /*
  * Get I2C Speed
  */
-unsigned int i2c_get_bus_speed(void)
+unsigned int bus_i2c_get_bus_speed(void *base)
 {
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
+   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
u8 clk_idx = readb(&i2c_regs->ifdr);
u8 clk_div;
 
@@ -287,12 +277,13 @@ static int i2c_init_transfer(struct mxc_i2c_regs 
*i2c_regs,
 /*
  * Read data from I2C device
  */
-int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+int bus_i2c_read(void *base, uchar chip, uint addr, int alen, uchar *buf,
+   int len)
 {
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
int ret;
unsigned int temp;
int i;
+   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 
ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
if (ret < 0)
@@ -346,11 +337,12 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
 /*
  * Write data to I2C device
  */
-int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+int bus_i2c_write(void *base, uchar chip, uint addr, int alen,
+   const uchar *buf, int len)
 {
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
int ret;
int i;
+   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 
ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
if (ret < 0)
@@ -365,10 +357,101 @@ int i2c_write(uchar chip, uint addr, int alen, uchar 
*buf, int len)
return ret;
 }
 
+struct i2c_parms {
+   void *base;
+   void *toggle_data;
+   int (*toggle_fn)(void *p);
+};
+
+struct sram_data {
+   unsigned curr_i2c_bus;
+   struct i2c_parms i2c_data[3];
+};
+
+/*
+ * For SPL boot some boards need i2c before SDRAM is initialized so force
+ * variables to live in SRAM
+ */
+static struct sram_data __attribute__((section(".data"))) srdata;
+
+void *get_base(void)
+{
+#ifdef CONFIG_SYS_I2C_BASE
+#ifdef CONFIG_I2C_MULTI_BUS
+   void *ret = srdata.i2c_data[srdata.curr_i2c_bus].base;
+   if (ret)
+   return ret;
+#endif
+   return (void *)CONFIG_SYS_I2C_BASE;
+#elif defined(CONFIG_I2C_MULTI_BUS)
+   return srdata.i2c_data[srdata.curr_i2c_bus].base;
+#else
+   return srdata.i2c_data[0].base;
+#endif
+}
+
+int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+   return bus_i2c_read(get_base(), chip, addr, alen, buf, len);
+}
+
+int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+   return bus_i2c_write(get_base(), chip, addr, alen, buf, len);
+}
+
 /*
  * Test if a chip at a given address responds (probe the chip)
  */
 int i2c_probe(uchar chip)
 {
-   return i2c_write(chip, 0, 0, NULL, 0);
+   return bus_i2c_write(get_base(), chip, 0, 0, NULL, 0);
+}
+
+void bus_i2c_init(void *base, int speed, int unused,
+   int (*toggle_fn)(void *p), void *toggle_data)
+{
+   int i = 0;
+   struct i2c_parms *p = srdata.i2c_data;
+   if (!base)
+   return;
+   for (;;) {
+   if (!p->base || (p->base == base)) {
+   p->base = base;
+   if (toggle_fn) {
+   p->toggle_fn = toggle_fn;
+   p->toggle_data = toggle_data;
+   }
+   break;
+   }

[U-Boot] [PATCH V2 23/25] i.mx53: add definition for I2C3_BASE_ADDR

[Troy Kisky]

Signed-off-by: Troy Kisky 

---
v2: no change
---
 arch/arm/include/asm/arch-mx5/imx-regs.h |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h 
b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 4fa6658..caf5d21 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -93,6 +93,7 @@
 #define GPIO5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000DC000)
 #define GPIO6_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E)
 #define GPIO7_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E4000)
+#define I2C3_BASE_ADDR (AIPS1_BASE_ADDR + 0x000EC000)
 #endif
 /*
  * AIPS 2
-- 
1.7.9.5

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[U-Boot] [PATCH V2 14/25] mxc_i2c: check for arbitration lost

[Troy Kisky]

No need to continue waiting if arbitration lost.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 

---
v2: add ack
---
 drivers/i2c/mxc_i2c.c |7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index ba2aad3..093a73f 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -55,6 +55,7 @@ struct mxc_i2c_regs {
 
 #define I2SR_ICF   (1 << 7)
 #define I2SR_IBB   (1 << 5)
+#define I2SR_IAL   (1 << 4)
 #define I2SR_IIF   (1 << 1)
 #define I2SR_RX_NO_AK  (1 << 0)
 
@@ -165,6 +166,12 @@ static int wait_for_sr_state(struct mxc_i2c_regs 
*i2c_regs, unsigned state)
ulong start_time = get_timer(0);
for (;;) {
sr = readb(&i2c_regs->i2sr);
+   if (sr & I2SR_IAL) {
+   writeb(sr & ~I2SR_IAL, &i2c_regs->i2sr);
+   printf("%s: Arbitration lost sr=%x cr=%x state=%x\n",
+   __func__, sr, readb(&i2c_regs->i2cr), state);
+   return -ERESTART;
+   }
if ((sr & (state >> 8)) == (unsigned char)state)
return sr;
WATCHDOG_RESET();
-- 
1.7.9.5

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Re: [U-Boot] [PATCH] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

[Ilya Yanok]

Hi Marek,

On Thu, Jul 5, 2012 at 11:58 PM, Marek Vasut  wrote:

>
> >
> > Yep. I even thought about this but decided not to do... can't recall why.
> > Now I think it's really a good idea.
>
> > > Maybe we should create DEFINE_ALIGNED_VARIABLE as a common.h macro?
> Like what's in common.h -- ALLOC_CACHE_ALIGN_BUFFER ?
>

Yes, but for static variables and not hard-bound to ARCH_DMA_MINALIGN.


> > Hm.. Maybe. Ideas? ;) Actually I also thought about moving all this stuff
> > to a single proper aligned buffer and do flush/invalidate for a whole
> > buffer at once. It can save us some space... but it's BSS anyway... Don't
> > know if it's worth it...
>
> But if you copy stuff back and forth, it'll cause performance hit.
>

No, you talk about full bounce-buffering support and meant only one big
buffer for internal structs.

Regards, Ilya.
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Re: [U-Boot] [PATCH V2 01/25] mxc_i2c: fix i2c_imx_stop

[Troy Kisky]

On 7/5/2012 12:53 PM, Troy Kisky wrote:

Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 
Acked-by: Stefano Babic 

---
V2: add acks
---
  drivers/i2c/mxc_i2c.c |2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index fc68062..c0c45fd 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
  
  	/* Stop I2C transaction */

temp = readb(&i2c_regs->i2cr);
-   temp |= ~(I2CR_MSTA | I2CR_MTX);
+   temp &= ~(I2CR_MSTA | I2CR_MTX);
writeb(temp, &i2c_regs->i2cr);
  
  	i2c_imx_bus_busy(0);

This series was tested on a sabrelite and a i.mx51 board

Thanks
Troy


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Re: [U-Boot] [PATCH] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

[Marek Vasut]

Dear Ilya Yanok,

> Hi Marek,
> 
> On Thu, Jul 5, 2012 at 12:24 AM, Marek Vasut  wrote:
> > > -static struct QH qh_list __attribute__((aligned(32)));
> > > +static char __qh_list[ALIGN(sizeof(struct QH), USB_DMA_MINALIGN)]
> > > + __attribute__((aligned(USB_DMA_MINALIGN)));
> > > +static struct QH *qh_list = (struct QH *)__qh_list;
> > 
> > Maybe we should create DEFINE_ALIGNED_VARIABLE as a common.h macro?
> 
> Yep. I even thought about this but decided not to do... can't recall why.
> Now I think it's really a good idea.

Like what's in common.h -- ALLOC_CACHE_ALIGN_BUFFER ?

[..]

> Hm.. Maybe. Ideas? ;) Actually I also thought about moving all this stuff
> to a single proper aligned buffer and do flush/invalidate for a whole
> buffer at once. It can save us some space... but it's BSS anyway... Don't
> know if it's worth it...

But if you copy stuff back and forth, it'll cause performance hit.

> Regards, Ilya.

Best regards,
Marek Vasut
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[U-Boot] [PATCH V2 12/25] mxc_i2c: don't disable controller after every transaction

[Troy Kisky]

This helps in a multiple bus master environment which
is why I also added a wait for bus idle.

Signed-off-by: Troy Kisky 

---
v2: no change
---
 drivers/i2c/mxc_i2c.c |   28 +---
 1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 717bc7a..1a5e379 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -192,24 +192,19 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 }
 
 /*
- * Stop the controller
+ * Stop I2C transaction
  */
 void i2c_imx_stop(void)
 {
int ret;
struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-   unsigned int temp = 0;
+   unsigned int temp = readb(&i2c_regs->i2cr);
 
-   /* Stop I2C transaction */
-   temp = readb(&i2c_regs->i2cr);
temp &= ~(I2CR_MSTA | I2CR_MTX);
writeb(temp, &i2c_regs->i2cr);
-
ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
if (ret < 0)
printf("%s:trigger stop failed\n", __func__);
-   /* Disable I2C controller */
-   writeb(0, &i2c_regs->i2cr);
 }
 
 /*
@@ -223,11 +218,15 @@ static int i2c_init_transfer(struct mxc_i2c_regs 
*i2c_regs,
int ret;
 
/* Enable I2C controller */
+   if (!(readb(&i2c_regs->i2cr) & I2CR_IEN)) {
+   writeb(I2CR_IEN, &i2c_regs->i2cr);
+   /* Wait for controller to be stable */
+   udelay(50);
+   }
writeb(0, &i2c_regs->i2sr);
-   writeb(I2CR_IEN, &i2c_regs->i2cr);
-
-   /* Wait for controller to be stable */
-   udelay(50);
+   ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
+   if (ret < 0)
+   goto exit;
 
/* Start I2C transaction */
temp = readb(&i2c_regs->i2cr);
@@ -254,6 +253,8 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
return 0;
 exit:
i2c_imx_stop();
+   /* Disable I2C controller */
+   writeb(0, &i2c_regs->i2cr);
return ret;
 }
 
@@ -303,10 +304,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
 * controller from generating another clock cycle
 */
if (i == (len - 1)) {
-   temp = readb(&i2c_regs->i2cr);
-   temp &= ~(I2CR_MSTA | I2CR_MTX);
-   writeb(temp, &i2c_regs->i2cr);
-   wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
+   i2c_imx_stop();
} else if (i == (len - 2)) {
temp = readb(&i2c_regs->i2cr);
temp |= I2CR_TX_NO_AK;
-- 
1.7.9.5

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[U-Boot] [PATCH V2 03/25] mxc_i2c: create tx_byte function

[Troy Kisky]

Use tx_byte function instead of having 3 copies
of the code.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 

---
v2: add ack
change ret to integer from unsigned
---
 drivers/i2c/mxc_i2c.c |   82 +++--
 1 file changed, 24 insertions(+), 58 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 0b46c9c..d147dd5 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -33,6 +33,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -207,17 +208,21 @@ int i2c_imx_trx_complete(void)
udelay(1);
}
 
-   return 1;
+   return -ETIMEDOUT;
 }
 
-/*
- * Check if the transaction was ACKed
- */
-int i2c_imx_acked(void)
+static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 {
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
+   int ret;
 
-   return readb(&i2c_regs->i2sr) & I2SR_RX_NO_AK;
+   writeb(byte, &i2c_regs->i2dr);
+   ret = i2c_imx_trx_complete();
+   if (ret < 0)
+   return ret;
+   ret = readb(&i2c_regs->i2sr);
+   if (ret & I2SR_RX_NO_AK)
+   return -ENODEV;
+   return 0;
 }
 
 /*
@@ -271,30 +276,6 @@ void i2c_imx_stop(void)
 }
 
 /*
- * Set chip address and access mode
- *
- * read = 1: READ access
- * read = 0: WRITE access
- */
-int i2c_imx_set_chip_addr(uchar chip, int read)
-{
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-   int ret;
-
-   writeb((chip << 1) | read, &i2c_regs->i2dr);
-
-   ret = i2c_imx_trx_complete();
-   if (ret)
-   return ret;
-
-   ret = i2c_imx_acked();
-   if (ret)
-   return ret;
-
-   return ret;
-}
-
-/*
  * Write register address
  */
 int i2c_imx_set_reg_addr(uint addr, int alen)
@@ -303,14 +284,8 @@ int i2c_imx_set_reg_addr(uint addr, int alen)
int ret = 0;
 
while (alen--) {
-   writeb((addr >> (alen * 8)) & 0xff, &i2c_regs->i2dr);
-
-   ret = i2c_imx_trx_complete();
-   if (ret)
-   break;
-
-   ret = i2c_imx_acked();
-   if (ret)
+   ret = tx_byte(i2c_regs, (addr >> (alen * 8)) & 0xff);
+   if (ret < 0)
break;
}
 
@@ -322,18 +297,15 @@ int i2c_imx_set_reg_addr(uint addr, int alen)
  */
 int i2c_probe(uchar chip)
 {
+   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
int ret;
 
ret = i2c_imx_start();
if (ret)
return ret;
 
-   ret = i2c_imx_set_chip_addr(chip, 0);
-   if (ret)
-   return ret;
-
+   ret = tx_byte(i2c_regs, chip << 1);
i2c_imx_stop();
-
return ret;
 }
 
@@ -352,8 +324,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
return ret;
 
/* write slave address */
-   ret = i2c_imx_set_chip_addr(chip, 0);
-   if (ret)
+   ret = tx_byte(i2c_regs, chip << 1);
+   if (ret < 0)
return ret;
 
ret = i2c_imx_set_reg_addr(addr, alen);
@@ -364,8 +336,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
temp |= I2CR_RSTA;
writeb(temp, &i2c_regs->i2cr);
 
-   ret = i2c_imx_set_chip_addr(chip, 1);
-   if (ret)
+   ret = tx_byte(i2c_regs, (chip << 1) | 1);
+   if (ret < 0)
return ret;
 
/* setup bus to read data */
@@ -419,8 +391,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, 
int len)
return ret;
 
/* write slave address */
-   ret = i2c_imx_set_chip_addr(chip, 0);
-   if (ret)
+   ret = tx_byte(i2c_regs, chip << 1);
+   if (ret < 0)
return ret;
 
ret = i2c_imx_set_reg_addr(addr, alen);
@@ -428,14 +400,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, 
int len)
return ret;
 
for (i = 0; i < len; i++) {
-   writeb(buf[i], &i2c_regs->i2dr);
-
-   ret = i2c_imx_trx_complete();
-   if (ret)
-   return ret;
-
-   ret = i2c_imx_acked();
-   if (ret)
+   ret = tx_byte(i2c_regs, buf[i]);
+   if (ret < 0)
return ret;
}
 
-- 
1.7.9.5

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[U-Boot] [PATCH V2 01/25] mxc_i2c: fix i2c_imx_stop

[Troy Kisky]

Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 
Acked-by: Stefano Babic 

---
V2: add acks
---
 drivers/i2c/mxc_i2c.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index fc68062..c0c45fd 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
 
/* Stop I2C transaction */
temp = readb(&i2c_regs->i2cr);
-   temp |= ~(I2CR_MSTA | I2CR_MTX);
+   temp &= ~(I2CR_MSTA | I2CR_MTX);
writeb(temp, &i2c_regs->i2cr);
 
i2c_imx_bus_busy(0);
-- 
1.7.9.5

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[U-Boot] [PATCH V2 11/25] mxc_i2c: place i2c_reset code inline

[Troy Kisky]

imx_reset is only referenced once so
move to that location.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 

---
v2: add ack
---
 drivers/i2c/mxc_i2c.c |   15 +++
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 9efa9bd..717bc7a 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -114,17 +114,6 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
 }
 
 /*
- * Reset I2C Controller
- */
-void i2c_reset(void)
-{
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-
-   writeb(0, &i2c_regs->i2cr); /* Reset module */
-   writeb(0, &i2c_regs->i2sr);
-}
-
-/*
  * Init I2C Bus
  */
 void i2c_init(int speed, int unused)
@@ -136,7 +125,9 @@ void i2c_init(int speed, int unused)
/* Store divider value */
writeb(idx, &i2c_regs->ifdr);
 
-   i2c_reset();
+   /* Reset module */
+   writeb(0, &i2c_regs->i2cr);
+   writeb(0, &i2c_regs->i2sr);
 }
 
 /*
-- 
1.7.9.5

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[U-Boot] [PATCH V2 09/25] mxc_i2c: remove redundant read

[Troy Kisky]

wait_for_sr_state returns i2sr on success
so no need to read again.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 

---
v2: add ack
---
 drivers/i2c/mxc_i2c.c |1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 01a6408..83c2fab 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -195,7 +195,6 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
ret = wait_for_sr_state(i2c_regs, ST_IIF);
if (ret < 0)
return ret;
-   ret = readb(&i2c_regs->i2sr);
if (ret & I2SR_RX_NO_AK)
return -ENODEV;
return 0;
-- 
1.7.9.5

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[U-Boot] [PATCH V2 25/25] mx6qsabrelite: add i2c multi-bus support

[Troy Kisky]

This includes bus recovery support.

Signed-off-by: Troy Kisky 

---
v2: no change
---
 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   50 +++--
 include/configs/mx6qsabrelite.h   |6 +--
 2 files changed, 48 insertions(+), 8 deletions(-)

diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c 
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 74ce84c..29c6630 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -72,9 +73,48 @@ iomux_v3_cfg_t uart2_pads[] = {
MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-iomux_v3_cfg_t i2c3_pads[] = {
-   MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL),
-   MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL),
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+
+/* I2C1, SGTL5000 */
+struct i2c_pads_info i2c_pad_info0 = {
+   .scl = {
+   .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
+   .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC,
+   .gp = GPIO_NUMBER(3, 21)
+   },
+   .sda = {
+   .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
+   .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC,
+   .gp = GPIO_NUMBER(3, 28)
+   }
+};
+
+/* I2C2 Camera, MIPI */
+struct i2c_pads_info i2c_pad_info1 = {
+   .scl = {
+   .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
+   .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC,
+   .gp = GPIO_NUMBER(4, 12)
+   },
+   .sda = {
+   .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
+   .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC,
+   .gp = GPIO_NUMBER(4, 13)
+   }
+};
+
+/* I2C3, J15 - RGB connector */
+struct i2c_pads_info i2c_pad_info2 = {
+   .scl = {
+   .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC,
+   .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC,
+   .gp = GPIO_NUMBER(1, 5)
+   },
+   .sda = {
+   .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC,
+   .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC,
+   .gp = GPIO_NUMBER(7, 11)
+   }
 };
 
 iomux_v3_cfg_t usdhc3_pads[] = {
@@ -292,7 +332,9 @@ int board_init(void)
 #ifdef CONFIG_MXC_SPI
setup_spi();
 #endif
-   imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
+   setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0);
+   setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+   setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
 
return 0;
 }
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index df2b735..c3c6be2 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -60,11 +60,9 @@
 
 /* I2C Configs */
 #define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MULTI_BUS
 #define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C3_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED10
-#define CONFIG_SYS_I2C_SLAVE0xfe
+#define CONFIG_SYS_I2C_SPEED   10
 
 /* MMC Configs */
 #define CONFIG_FSL_ESDHC
-- 
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[U-Boot] [PATCH V2 05/25] mxc_i2c: create i2c_init_transfer

[Troy Kisky]

Initial code of i2c_read and i2c_write
is identical, move to subroutine.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 
Acked-by: Stefano Babic 

---
v2: add ack
---
 drivers/i2c/mxc_i2c.c |   44 ++--
 1 file changed, 18 insertions(+), 26 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 57027ad..4ce695a 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -275,19 +275,29 @@ void i2c_imx_stop(void)
 }
 
 /*
- * Write register address
+ * Send start signal, chip address and
+ * write register address
  */
-int i2c_imx_set_reg_addr(uint addr, int alen)
+static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
+   uchar chip, uint addr, int alen)
 {
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-   int ret = 0;
+   int ret = i2c_imx_start();
+   if (ret)
+   goto exit;
+
+   /* write slave address */
+   ret = tx_byte(i2c_regs, chip << 1);
+   if (ret < 0)
+   goto exit;
 
while (alen--) {
ret = tx_byte(i2c_regs, (addr >> (alen * 8)) & 0xff);
if (ret < 0)
-   break;
+   goto exit;
}
-
+   return 0;
+exit:
+   i2c_imx_stop();
return ret;
 }
 
@@ -318,19 +328,10 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
unsigned int temp;
int i;
 
-   ret = i2c_imx_start();
-   if (ret)
-   return ret;
-
-   /* write slave address */
-   ret = tx_byte(i2c_regs, chip << 1);
+   ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
if (ret < 0)
return ret;
 
-   ret = i2c_imx_set_reg_addr(addr, alen);
-   if (ret)
-   return ret;
-
temp = readb(&i2c_regs->i2cr);
temp |= I2CR_RSTA;
writeb(temp, &i2c_regs->i2cr);
@@ -387,19 +388,10 @@ int i2c_write(uchar chip, uint addr, int alen, uchar 
*buf, int len)
int ret;
int i;
 
-   ret = i2c_imx_start();
-   if (ret)
-   return ret;
-
-   /* write slave address */
-   ret = tx_byte(i2c_regs, chip << 1);
+   ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
if (ret < 0)
return ret;
 
-   ret = i2c_imx_set_reg_addr(addr, alen);
-   if (ret)
-   return ret;
-
for (i = 0; i < len; i++) {
ret = tx_byte(i2c_regs, buf[i]);
if (ret < 0)
-- 
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[U-Boot] [PATCH V2 02/25] mxc_i2c: remove ifdef of CONFIG_HARD_I2C

[Troy Kisky]

This is always selected when CONFIG_I2C_MXC is
selected, so it adds no value.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 

---
v2: add ack
---
 drivers/i2c/mxc_i2c.c |6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index c0c45fd..0b46c9c 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -31,12 +31,9 @@
  */
 
 #include 
-#include 
-
-#if defined(CONFIG_HARD_I2C)
-
 #include 
 #include 
+#include 
 #include 
 
 struct mxc_i2c_regs {
@@ -446,4 +443,3 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, 
int len)
 
return ret;
 }
-#endif /* CONFIG_HARD_I2C */
-- 
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[U-Boot] [PATCH V2 10/25] mxc_i2c: place imx_start code inline

[Troy Kisky]

imx_start is only referenced once so
move to that location.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 

---
v2: add ack
---
 drivers/i2c/mxc_i2c.c |   53 +++--
 1 file changed, 20 insertions(+), 33 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 83c2fab..9efa9bd 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -201,37 +201,6 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 }
 
 /*
- * Start the controller
- */
-int i2c_imx_start(void)
-{
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-   unsigned int temp = 0;
-   int result;
-
-   /* Enable I2C controller */
-   writeb(0, &i2c_regs->i2sr);
-   writeb(I2CR_IEN, &i2c_regs->i2cr);
-
-   /* Wait controller to be stable */
-   udelay(50);
-
-   /* Start I2C transaction */
-   temp = readb(&i2c_regs->i2cr);
-   temp |= I2CR_MSTA;
-   writeb(temp, &i2c_regs->i2cr);
-
-   result = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
-   if (result < 0)
-   return result;
-
-   temp |= I2CR_MTX | I2CR_TX_NO_AK;
-   writeb(temp, &i2c_regs->i2cr);
-
-   return 0;
-}
-
-/*
  * Stop the controller
  */
 void i2c_imx_stop(void)
@@ -259,10 +228,28 @@ void i2c_imx_stop(void)
 static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
uchar chip, uint addr, int alen)
 {
-   int ret = i2c_imx_start();
-   if (ret)
+   unsigned int temp;
+   int ret;
+
+   /* Enable I2C controller */
+   writeb(0, &i2c_regs->i2sr);
+   writeb(I2CR_IEN, &i2c_regs->i2cr);
+
+   /* Wait for controller to be stable */
+   udelay(50);
+
+   /* Start I2C transaction */
+   temp = readb(&i2c_regs->i2cr);
+   temp |= I2CR_MSTA;
+   writeb(temp, &i2c_regs->i2cr);
+
+   ret = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
+   if (ret < 0)
goto exit;
 
+   temp |= I2CR_MTX | I2CR_TX_NO_AK;
+   writeb(temp, &i2c_regs->i2cr);
+
/* write slave address */
ret = tx_byte(i2c_regs, chip << 1);
if (ret < 0)
-- 
1.7.9.5

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[U-Boot] [PATCH V2 18/25] mxc_i2c: add bus recovery support

[Troy Kisky]

Add support for calling a function that will toggle the
SCL line to return the bus to idle condition.

The actual toggling function is added in a later patch.

Signed-off-by: Troy Kisky 

---
v2: commit log change, global data in sram section.
make toggle_i2c return int
---
 drivers/i2c/mxc_i2c.c |   26 ++
 1 file changed, 26 insertions(+)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index d5448d8..41849d3 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -251,6 +251,8 @@ static int i2c_init_transfer_(struct mxc_i2c_regs *i2c_regs,
return 0;
 }
 
+static int toggle_i2c(void *base);
+
 static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
uchar chip, uint addr, int alen)
 {
@@ -269,6 +271,8 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
if (ret != -ERESTART)
writeb(0, &i2c_regs->i2cr); /* Disable controller */
udelay(100);
+   if (toggle_i2c(i2c_regs) < 0)
+   break;
}
printf("%s: give up i2c_regs=%p\n", __func__, i2c_regs);
return ret;
@@ -390,6 +394,28 @@ void *get_base(void)
 #endif
 }
 
+static struct i2c_parms *i2c_get_parms(void *base)
+{
+   int i = 0;
+   struct i2c_parms *p = srdata.i2c_data;
+   while (i < ARRAY_SIZE(srdata.i2c_data)) {
+   if (p->base == base)
+   return p;
+   p++;
+   i++;
+   }
+   printf("Invalid I2C base: %p\n", base);
+   return NULL;
+}
+
+static int toggle_i2c(void *base)
+{
+   struct i2c_parms *p = i2c_get_parms(base);
+   if (p && p->toggle_fn)
+   return p->toggle_fn(p->toggle_data);
+   return 0;
+}
+
 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 {
return bus_i2c_read(get_base(), chip, addr, alen, buf, len);
-- 
1.7.9.5

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[U-Boot] [PATCH V2 07/25] mxc_i2c.c: code i2c_probe as a 0 length i2c_write

[Troy Kisky]

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 
Acked-by: Stefano Babic 

---
v2: add acks
change comment
---
---
 drivers/i2c/mxc_i2c.c |   25 -
 1 file changed, 8 insertions(+), 17 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 55a688a..626e13e 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -302,23 +302,6 @@ exit:
 }
 
 /*
- * Try if a chip add given address responds (probe the chip)
- */
-int i2c_probe(uchar chip)
-{
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-   int ret;
-
-   ret = i2c_imx_start();
-   if (ret)
-   return ret;
-
-   ret = tx_byte(i2c_regs, chip << 1);
-   i2c_imx_stop();
-   return ret;
-}
-
-/*
  * Read data from I2C device
  */
 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
@@ -406,3 +389,11 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, 
int len)
 
return ret;
 }
+
+/*
+ * Test if a chip at a given address responds (probe the chip)
+ */
+int i2c_probe(uchar chip)
+{
+   return i2c_write(chip, 0, 0, NULL, 0);
+}
-- 
1.7.9.5

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[U-Boot] [PATCH V2 06/25] mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write

[Troy Kisky]

Signed-off-by: Troy Kisky 
---
 drivers/i2c/mxc_i2c.c |   10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 4ce695a..55a688a 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -337,8 +337,10 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
writeb(temp, &i2c_regs->i2cr);
 
ret = tx_byte(i2c_regs, (chip << 1) | 1);
-   if (ret < 0)
+   if (ret < 0) {
+   i2c_imx_stop();
return ret;
+   }
 
/* setup bus to read data */
temp = readb(&i2c_regs->i2cr);
@@ -352,8 +354,10 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
/* read data */
for (i = 0; i < len; i++) {
ret = i2c_imx_trx_complete();
-   if (ret)
+   if (ret) {
+   i2c_imx_stop();
return ret;
+   }
 
/*
 * It must generate STOP before read I2DR to prevent
@@ -395,7 +399,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, 
int len)
for (i = 0; i < len; i++) {
ret = tx_byte(i2c_regs, buf[i]);
if (ret < 0)
-   return ret;
+   break;
}
 
i2c_imx_stop();
-- 
1.7.9.5

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[U-Boot] [PATCH V2 19/25] mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support

[Troy Kisky]

Signed-off-by: Troy Kisky 

---
v2: global data in sram section
---
 drivers/i2c/mxc_i2c.c |   17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 41849d3..2017399 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -416,6 +416,23 @@ static int toggle_i2c(void *base)
return 0;
 }
 
+#ifdef CONFIG_I2C_MULTI_BUS
+unsigned int i2c_get_bus_num(void)
+{
+   return srdata.curr_i2c_bus;
+}
+
+int i2c_set_bus_num(unsigned bus_idx)
+{
+   if (bus_idx >= ARRAY_SIZE(srdata.i2c_data))
+   return -1;
+   if (!srdata.i2c_data[bus_idx].base)
+   return -1;
+   srdata.curr_i2c_bus = bus_idx;
+   return 0;
+}
+#endif
+
 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 {
return bus_i2c_read(get_base(), chip, addr, alen, buf, len);
-- 
1.7.9.5

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[U-Boot] [PATCH V2 08/25] mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state

[Troy Kisky]

Not using udelay gives a more accurate timeout. The current implementation of 
udelay
in imx-common does not seem to wait at all for a udelay(1).

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 


V2: Added WATCHDOG_RESET as suggested by Marek Vasut
add error message when stop fails

mxc_i2c: code i2c_probe as a 0 length i2c_write

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 
Acked-by: Stefano Babic 

---
v2: add acks
---
 drivers/i2c/mxc_i2c.c |   80 ++---
 1 file changed, 29 insertions(+), 51 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 626e13e..01a6408 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 
 struct mxc_i2c_regs {
uint32_tiadr;
@@ -63,8 +64,6 @@ struct mxc_i2c_regs {
 #error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"
 #endif
 
-#define I2C_MAX_TIMEOUT1
-
 static u16 i2c_clk_div[50][2] = {
{ 22,   0x20 }, { 24,   0x21 }, { 26,   0x22 }, { 28,   0x23 },
{ 30,   0x00 }, { 32,   0x24 }, { 36,   0x25 }, { 40,   0x26 },
@@ -164,48 +163,26 @@ unsigned int i2c_get_bus_speed(void)
return mxc_get_clock(MXC_IPG_PERCLK) / i2c_clk_div[clk_div][0];
 }
 
-/*
- * Wait for bus to be busy (or free if for_busy = 0)
- *
- * for_busy = 1: Wait for IBB to be asserted
- * for_busy = 0: Wait for IBB to be de-asserted
- */
-int i2c_imx_bus_busy(int for_busy)
-{
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-   unsigned int temp;
-
-   int timeout = I2C_MAX_TIMEOUT;
-
-   while (timeout--) {
-   temp = readb(&i2c_regs->i2sr);
-
-   if (for_busy && (temp & I2SR_IBB))
-   return 0;
-   if (!for_busy && !(temp & I2SR_IBB))
-   return 0;
-
-   udelay(1);
-   }
-
-   return 1;
-}
+#define ST_BUS_IDLE (0 | (I2SR_IBB << 8))
+#define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB << 8))
+#define ST_IIF (I2SR_IIF | (I2SR_IIF << 8))
 
-/*
- * Wait for transaction to complete
- */
-int i2c_imx_trx_complete(void)
+static int wait_for_sr_state(struct mxc_i2c_regs *i2c_regs, unsigned state)
 {
-   struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-   int timeout = I2C_MAX_TIMEOUT;
-
-   while (timeout--) {
-   if (readb(&i2c_regs->i2sr) & I2SR_IIF)
-   return 0;
-
-   udelay(1);
+   unsigned sr;
+   ulong elapsed;
+   ulong start_time = get_timer(0);
+   for (;;) {
+   sr = readb(&i2c_regs->i2sr);
+   if ((sr & (state >> 8)) == (unsigned char)state)
+   return sr;
+   WATCHDOG_RESET();
+   elapsed = get_timer(start_time);
+   if (elapsed > (CONFIG_SYS_HZ / 10)) /* .1 seconds */
+   break;
}
-
+   printf("%s: failed sr=%x cr=%x state=%x\n", __func__,
+   sr, readb(&i2c_regs->i2cr), state);
return -ETIMEDOUT;
 }
 
@@ -215,7 +192,7 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 
writeb(0, &i2c_regs->i2sr);
writeb(byte, &i2c_regs->i2dr);
-   ret = i2c_imx_trx_complete();
+   ret = wait_for_sr_state(i2c_regs, ST_IIF);
if (ret < 0)
return ret;
ret = readb(&i2c_regs->i2sr);
@@ -245,8 +222,8 @@ int i2c_imx_start(void)
temp |= I2CR_MSTA;
writeb(temp, &i2c_regs->i2cr);
 
-   result = i2c_imx_bus_busy(1);
-   if (result)
+   result = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
+   if (result < 0)
return result;
 
temp |= I2CR_MTX | I2CR_TX_NO_AK;
@@ -260,6 +237,7 @@ int i2c_imx_start(void)
  */
 void i2c_imx_stop(void)
 {
+   int ret;
struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
unsigned int temp = 0;
 
@@ -268,8 +246,9 @@ void i2c_imx_stop(void)
temp &= ~(I2CR_MSTA | I2CR_MTX);
writeb(temp, &i2c_regs->i2cr);
 
-   i2c_imx_bus_busy(0);
-
+   ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
+   if (ret < 0)
+   printf("%s:trigger stop failed\n", __func__);
/* Disable I2C controller */
writeb(0, &i2c_regs->i2cr);
 }
@@ -336,8 +315,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
 
/* read data */
for (i = 0; i < len; i++) {
-   ret = i2c_imx_trx_complete();
-   if (ret) {
+   ret = wait_for_sr_state(i2c_regs, ST_IIF);
+   if (ret < 0) {
i2c_imx_stop();
return ret;
}
@@ -350,20 +329,19 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
temp = readb(&i2c_regs->i2cr);
temp &= ~(I2CR_MSTA | I2CR_MTX);
writeb(temp,

[U-Boot] [PATCH V2 04/25] mxc_i2c: clear i2sr before waiting for bit

[Troy Kisky]

Let's clear the sr register before waiting for
bit to be set, instead of clearing it after
hardware sets it. No real operational difference here,
but allows combining of i2c_imx_trx_complete and
i2c_imx_bus_busy in later patches.

Signed-off-by: Troy Kisky 
Acked-by: Marek Vasut 

---
v2: add ack
add clear of i2sr in i2c_read
---
 drivers/i2c/mxc_i2c.c |9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index d147dd5..57027ad 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -200,10 +200,8 @@ int i2c_imx_trx_complete(void)
int timeout = I2C_MAX_TIMEOUT;
 
while (timeout--) {
-   if (readb(&i2c_regs->i2sr) & I2SR_IIF) {
-   writeb(0, &i2c_regs->i2sr);
+   if (readb(&i2c_regs->i2sr) & I2SR_IIF)
return 0;
-   }
 
udelay(1);
}
@@ -215,6 +213,7 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 {
int ret;
 
+   writeb(0, &i2c_regs->i2sr);
writeb(byte, &i2c_regs->i2dr);
ret = i2c_imx_trx_complete();
if (ret < 0)
@@ -346,7 +345,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
if (len == 1)
temp |= I2CR_TX_NO_AK;
writeb(temp, &i2c_regs->i2cr);
-   readb(&i2c_regs->i2dr);
+   writeb(0, &i2c_regs->i2sr);
+   readb(&i2c_regs->i2dr); /* dummy read to clear ICF */
 
/* read data */
for (i = 0; i < len; i++) {
@@ -369,6 +369,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, 
int len)
writeb(temp, &i2c_regs->i2cr);
}
 
+   writeb(0, &i2c_regs->i2sr);
buf[i] = readb(&i2c_regs->i2dr);
}
 
-- 
1.7.9.5

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[U-Boot] [PATCH 11/11 v2] snowball: Adding board specific cache cleanup routine

[mathieu . poirier]

From: "Mathieu J. Poirier" 

Following ARM's reference manuel for initializing the cache - the
kernel won't boot otherwise.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
Changes for v2:
   - Using correct I/O access function.
   - Added cache controller address offsets for clarity.
---
 arch/arm/cpu/armv7/u8500/cpu.c |   26 ++
 1 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
index 02bb332..6f95c30 100644
--- a/arch/arm/cpu/armv7/u8500/cpu.c
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -36,6 +36,14 @@
 #define CPUID_DB8500V2 0x412fc091
 #define ASICID_DB8500V11   0x008500A1
 
+#define CACHE_CONTR_BASE   0xA0412000
+/* Cache controller register offsets
+ * as found in ARM's technical reference manual
+ */
+#define CACHE_INVAL_BY_WAY (CACHE_CONTR_BASE + 0x77C)
+#define CACHE_LOCKDOWN_BY_D(CACHE_CONTR_BASE + 0X900)
+#define CACHE_LOCKDOWN_BY_I(CACHE_CONTR_BASE + 0X904)
+
 static unsigned int read_asicid(void);
 
 static inline unsigned int read_cpuid(void)
@@ -73,6 +81,24 @@ static unsigned int read_asicid(void)
return readl(address);
 }
 
+void cpu_cache_initialization(void)
+{
+   unsigned int value;
+   /* invalidate all cache entries */
+   writel(0x, CACHE_INVAL_BY_WAY);
+
+   /* ways are set to '0' when they are totally
+* cleaned and invalidated
+*/
+   do {
+   value = readl(CACHE_INVAL_BY_WAY);
+   } while (value & 0xFF);
+
+   /* Invalidate register 9 D and I lockdown */
+   writel(0xFF, CACHE_LOCKDOWN_BY_D);
+   writel(0xFF, CACHE_LOCKDOWN_BY_I);
+}
+
 #ifdef CONFIG_ARCH_CPU_INIT
 /*
  * SOC specific cpu init
-- 
1.7.5.4

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[U-Boot] [PATCH 02/11 v2] u8500: Moving prcmu to cpu directory

[mathieu . poirier]

From: "Mathieu J. Poirier" 

This is to allow the prcmu functions to be used by multiple
u8500-based processors.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
Changes for v2:
   - Fixed white space errors.
---
 arch/arm/cpu/armv7/u8500/Makefile   |2 +-
 arch/arm/cpu/armv7/u8500/prcmu.c|  164 ++
 arch/arm/include/asm/arch-u8500/prcmu.h |   55 ++
 board/st-ericsson/u8500/Makefile|2 +-
 board/st-ericsson/u8500/prcmu-fw.h  |   55 --
 board/st-ericsson/u8500/prcmu.c |  165 ---
 board/st-ericsson/u8500/u8500_href.c|2 +-
 7 files changed, 222 insertions(+), 223 deletions(-)

diff --git a/arch/arm/cpu/armv7/u8500/Makefile 
b/arch/arm/cpu/armv7/u8500/Makefile
index 270aa40..77accde 100644
--- a/arch/arm/cpu/armv7/u8500/Makefile
+++ b/arch/arm/cpu/armv7/u8500/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(SOC).o
 
-COBJS  = timer.o clock.o
+COBJS  = timer.o clock.o prcmu.o
 SOBJS  = lowlevel.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/u8500/prcmu.c b/arch/arm/cpu/armv7/u8500/prcmu.c
new file mode 100644
index 000..b256d27
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/prcmu.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2009 ST-Ericsson SA
+ *
+ * Adapted from the Linux version:
+ * Author: Kumar Sanghvi 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ */
+
+/*
+ * NOTE: This currently does not support the I2C workaround access method.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* CPU mailbox registers */
+#define PRCM_MBOX_CPU_VAL (U8500_PRCMU_BASE + 0x0fc)
+#define PRCM_MBOX_CPU_SET (U8500_PRCMU_BASE + 0x100)
+#define PRCM_MBOX_CPU_CLR (U8500_PRCMU_BASE + 0x104)
+
+static int prcmu_is_ready(void)
+{
+   int ready = readb(PRCM_XP70_CUR_PWR_STATE) == AP_EXECUTE;
+   if (!ready)
+   printf("PRCMU firmware not ready\n");
+   return ready;
+}
+
+static int _wait_for_req_complete(int num)
+{
+   int timeout = 1000;
+
+   /* checking any already on-going transaction */
+   while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout)
+   timeout--;
+
+   timeout = 1000;
+
+   /* Set an interrupt to XP70 */
+   writel(1 << num, PRCM_MBOX_CPU_SET);
+
+   while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout)
+   timeout--;
+
+   if (!timeout) {
+   printf("PRCMU operation timed out\n");
+   return -1;
+   }
+
+   return 0;
+}
+
+/**
+ * prcmu_i2c_read - PRCMU - 4500 communication using PRCMU I2C
+ * @reg: - db8500 register bank to be accessed
+ * @slave:  - db8500 register to be accessed
+ * Returns: ACK_MB5  value containing the status
+ */
+int prcmu_i2c_read(u8 reg, u16 slave)
+{
+   uint8_t i2c_status;
+   uint8_t i2c_val;
+
+   if (!prcmu_is_ready())
+   return -1;
+
+   debug("\nprcmu_4500_i2c_read:bank=%x;reg=%x;\n",
+   reg, slave);
+
+   /* prepare the data for mailbox 5 */
+   writeb((reg << 1) | I2CREAD, PRCM_REQ_MB5_I2COPTYPE_REG);
+   writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
+   writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
+   writeb(0, PRCM_REQ_MB5_I2CVAL);
+
+   _wait_for_req_complete(REQ_MB5);
+
+   /* retrieve values */
+   debug("ack-mb5:transfer status = %x\n",
+   readb(PRCM_ACK_MB5_STATUS));
+   debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1);
+   debug("ack-mb5:slave_add = %x\n",
+   readb(PRCM_ACK_MB5_SLAVE));
+   debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL));
+
+   i2c_status = readb(PRCM_ACK_MB5_STATUS);
+   i2c_val = readb(PRCM_ACK_MB5_VAL);
+
+   if (i2c_status == I2C_RD_OK)
+   return i2c_val;
+   else {
+
+   printf("prcmu_i2c_read:read return status= %d\n",
+   i2c_status);
+   return -1;
+   }
+
+}
+
+/**
+ * prcmu_i2c_write - PRCMU-db8500 communication usi

[U-Boot] [PATCH 05/11 v2] snowball: Moving to ux500.v2 addess scheme for PRCMU access

[mathieu . poirier]

From: "Mathieu J. Poirier" 

Addresses between ux500.v1 and ux500.v2 have changed slightly,
hence mandating a review of the PRCMU access methods.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
Changes for v2:
   - Refactored to apply cleanly over previous v2 changes.
---
 arch/arm/cpu/armv7/u8500/prcmu.c   |   91 +++-
 arch/arm/include/asm/arch-u8500/hardware.h |2 +-
 arch/arm/include/asm/arch-u8500/prcmu.h|   10 ++-
 3 files changed, 71 insertions(+), 32 deletions(-)

diff --git a/arch/arm/cpu/armv7/u8500/prcmu.c b/arch/arm/cpu/armv7/u8500/prcmu.c
index 4918bbc..934428f 100644
--- a/arch/arm/cpu/armv7/u8500/prcmu.c
+++ b/arch/arm/cpu/armv7/u8500/prcmu.c
@@ -36,9 +36,10 @@
 #include 
 
 /* CPU mailbox registers */
-#define PRCM_MBOX_CPU_VAL (U8500_PRCMU_BASE + 0x0fc)
-#define PRCM_MBOX_CPU_SET (U8500_PRCMU_BASE + 0x100)
-#define PRCM_MBOX_CPU_CLR (U8500_PRCMU_BASE + 0x104)
+#define PRCMU_I2C_WRITE(slave)  \
+   (((slave) << 1) | I2CWRITE | (1 << 6))
+#define PRCMU_I2C_READ(slave) \
+   (((slave) << 1) | I2CREAD | (1 << 6))
 
 #define I2C_MBOX_BIT(1 << 5)
 
@@ -50,26 +51,39 @@ static int prcmu_is_ready(void)
return ready;
 }
 
-static int _wait_for_req_complete(int num)
+static int wait_for_i2c_mbx_rdy(void)
 {
-   int timeout = 1000;
+   int timeout = 1;
 
-   /* checking any already on-going transaction */
-   while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout)
+   if (readl(PRCM_ARM_IT1_VAL) & I2C_MBOX_BIT) {
+   printf("prcmu: warning i2c mailbox was not acked\n");
+   /* clear mailbox 5 ack irq */
+   writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);
+   }
+
+   /* check any already on-going transaction */
+   while ((readl(PRCM_MBOX_CPU_VAL) & I2C_MBOX_BIT) && timeout)
timeout--;
 
-   timeout = 1000;
+   if (timeout == 0)
+   return -1;
+
+   return 0;
+}
+
+static int wait_for_i2c_req_done(void)
+{
+   int timeout = 1;
 
/* Set an interrupt to XP70 */
-   writel(1 << num, PRCM_MBOX_CPU_SET);
+   writel(I2C_MBOX_BIT, PRCM_MBOX_CPU_SET);
 
-   while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout)
+   /* wait for mailbox 5 (i2c) ack */
+   while (!(readl(PRCM_ARM_IT1_VAL) & I2C_MBOX_BIT) && timeout)
timeout--;
 
-   if (!timeout) {
-   printf("PRCMU operation timed out\n");
+   if (timeout == 0)
return -1;
-   }
 
return 0;
 }
@@ -84,6 +98,7 @@ int prcmu_i2c_read(u8 reg, u16 slave)
 {
uint8_t i2c_status;
uint8_t i2c_val;
+   int ret;
 
if (!prcmu_is_ready())
return -1;
@@ -91,13 +106,23 @@ int prcmu_i2c_read(u8 reg, u16 slave)
debug("\nprcmu_4500_i2c_read:bank=%x;reg=%x;\n",
reg, slave);
 
+   ret = wait_for_i2c_mbx_rdy();
+   if (ret) {
+   printf("prcmu_i2c_read: mailbox became not ready\n");
+   return ret;
+   }
+
/* prepare the data for mailbox 5 */
-   writeb((reg << 1) | I2CREAD, PRCM_REQ_MB5_I2COPTYPE_REG);
+   writeb(PRCMU_I2C_READ(reg), PRCM_REQ_MB5_I2COPTYPE_REG);
writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
writeb(0, PRCM_REQ_MB5_I2CVAL);
 
-   _wait_for_req_complete(REQ_MB5);
+   ret = wait_for_i2c_req_done();
+   if (ret) {
+   printf("prcmu_i2c_read: mailbox request timed out\n");
+   return ret;
+   }
 
/* retrieve values */
debug("ack-mb5:transfer status = %x\n",
@@ -109,16 +134,14 @@ int prcmu_i2c_read(u8 reg, u16 slave)
 
i2c_status = readb(PRCM_ACK_MB5_STATUS);
i2c_val = readb(PRCM_ACK_MB5_VAL);
+   /* clear mailbox 5 ack irq */
+   writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);
 
if (i2c_status == I2C_RD_OK)
return i2c_val;
-   else {
-
-   printf("prcmu_i2c_read:read return status= %d\n",
-   i2c_status);
-   return -1;
-   }
 
+   printf("prcmu_i2c_read:read return status= %d\n", i2c_status);
+   return -1;
 }
 
 /**
@@ -131,6 +154,7 @@ int prcmu_i2c_read(u8 reg, u16 slave)
 int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
 {
uint8_t i2c_status;
+   int ret;
 
if (!prcmu_is_ready())
return -1;
@@ -138,14 +162,23 @@ int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
debug("\nprcmu_4500_i2c_write:bank=%x;reg=%x;\n",
reg, slave);
 
+   ret = wait_for_i2c_mbx_rdy();
+   if (ret) {
+   printf("prcmu_i2c_write: mailbox became not ready\n");
+   return ret;
+   }
+
/* prepare the data for mailbox 5 */
-   writeb((reg << 1) | I2CWRITE, PRCM_REQ_MB5_I2COPTYPE_REG);
+   writeb(PRCMU_I2C_WRITE(reg), PRCM_REQ_MB5_I2COPTYPE_REG);

Re: [U-Boot] [PATCH] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

[Marek Vasut]

Dear Ilya Yanok,

> Hi Tom,
> 
> On Thu, Jul 5, 2012 at 9:15 PM, Tom Rini  wrote:
> > On Wed, Jul 04, 2012 at 05:03:59PM +0400, Ilya Yanok wrote:
> > `
> > 
> > > From: Tom Rini 
> > > 
> > > The USB spec says that 32 bytes is the minimum required alignment.
> > > However on some platforms we have a larger minimum requirement for
> > > cache coherency.  In those cases, use that value rather than the USB
> > > spec minimum.  We add a cpp check to  to define
> > > USB_DMA_MINALIGN and make use of it in ehci-hcd.c and musb_core.h.  We
> > > cannot use MAX() here as we are not allowed to have tests inside of
> > > align(...).
> > > 
> > > Cc: Marek Vasut 
> > > Signed-off-by: Tom Rini 
> > > [ilya.yanok]: fix size alignment, drop (incorrect) rounding
> > > when invalidating the buffer. If we got unaligned buffer from the
> > > upper layer -- that's definetely a bug so it's good to buzz
> > > about it. But we have to align the buffer length -- upper layers
> > > should take care to reserve enough space.
> > > Signed-off-by: Ilya Yanok 
> > 
> > So trying this on ethernet still gives a handful of unaligned areas.  Do
> 
>  Not surprised. USB Ethernet drivers are unfixed wrt cache alignment.

Well I fixed the ASIX, but now that I think about it, the fix might not be 
enough.

> you have a beagleboard xM available?


> Unfortunately no.

Any ARMv7 chip shall be OK.

> 
> Regards, Ilya.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

[Ilya Yanok]

Hi Marek,

On Thu, Jul 5, 2012 at 12:24 AM, Marek Vasut  wrote:

>
> > -static struct QH qh_list __attribute__((aligned(32)));
> > +static char __qh_list[ALIGN(sizeof(struct QH), USB_DMA_MINALIGN)]
> > + __attribute__((aligned(USB_DMA_MINALIGN)));
> > +static struct QH *qh_list = (struct QH *)__qh_list;
>
>
> Maybe we should create DEFINE_ALIGNED_VARIABLE as a common.h macro?
>

Yep. I even thought about this but decided not to do... can't recall why.
Now I think it's really a good idea.


>
> >  static struct descriptor {
> >   struct usb_hub_descriptor hub;
> > @@ -172,13 +174,13 @@ static int ehci_td_buffer(struct qTD *td, void
> *buf,
> > size_t sz) {
> >   uint32_t delta, next;
> >   uint32_t addr = (uint32_t)buf;
> > - size_t rsz = roundup(sz, 32);
> > + size_t rsz = roundup(sz, USB_DMA_MINALIGN);
> >   int idx;
> >
> >   if (sz != rsz)
> >   debug("EHCI-HCD: Misaligned buffer size (%08x)\n", sz);
> >
> > - if (addr & 31)
> > + if (addr != ALIGN(addr, USB_DMA_MINALIGN))
> >   debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
>
> Good :)
>

Well, thinking more about this, it's actually a wrong place to check
this... It can be setup packet buffer, which can be unaligned (this is ok
cause it's only flushed and never invalidated). And size can always be
unaligned...



> >   /* Flush dcache */
> > - flush_dcache_range((uint32_t)&qh_list,
> > - (uint32_t)&qh_list + sizeof(struct QH));
> > - flush_dcache_range((uint32_t)&qh, (uint32_t)&qh + sizeof(struct
> QH));
> > - flush_dcache_range((uint32_t)qtd, (uint32_t)qtd + sizeof(qtd));
> > + flush_dcache_range((uint32_t)qh_list,
> > + (uint32_t)qh_list + ALIGN(sizeof(struct QH),
> USB_DMA_MINALIGN));
> > + flush_dcache_range((uint32_t)qh, (uint32_t)qh +
> > + ALIGN(sizeof(struct QH), USB_DMA_MINALIGN));
> > + flush_dcache_range((uint32_t)qtd, (uint32_t)qtd +
> > + ALIGN(3*sizeof(*qtd), USB_DMA_MINALIGN));
>
> Maybe we should make a macro for those things here to prevent such
> spaghetti of
> code ?
>

Hm.. Maybe. Ideas? ;) Actually I also thought about moving all this stuff
to a single proper aligned buffer and do flush/invalidate for a whole
buffer at once. It can save us some space... but it's BSS anyway... Don't
know if it's worth it...

Regards, Ilya.
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Re: [U-Boot] [PATCH] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

[Ilya Yanok]

Hi Tom,

On Thu, Jul 5, 2012 at 9:15 PM, Tom Rini  wrote:

> On Wed, Jul 04, 2012 at 05:03:59PM +0400, Ilya Yanok wrote:
> `
> > From: Tom Rini 
> >
> > The USB spec says that 32 bytes is the minimum required alignment.
> > However on some platforms we have a larger minimum requirement for cache
> > coherency.  In those cases, use that value rather than the USB spec
> > minimum.  We add a cpp check to  to define USB_DMA_MINALIGN and
> > make use of it in ehci-hcd.c and musb_core.h.  We cannot use MAX() here
> > as we are not allowed to have tests inside of align(...).
> >
> > Cc: Marek Vasut 
> > Signed-off-by: Tom Rini 
> > [ilya.yanok]: fix size alignment, drop (incorrect) rounding
> > when invalidating the buffer. If we got unaligned buffer from the
> > upper layer -- that's definetely a bug so it's good to buzz
> > about it. But we have to align the buffer length -- upper layers
> > should take care to reserve enough space.
> > Signed-off-by: Ilya Yanok 
>
> So trying this on ethernet still gives a handful of unaligned areas.  Do
>

 Not surprised. USB Ethernet drivers are unfixed wrt cache alignment.

you have a beagleboard xM available?
>

Unfortunately no.

Regards, Ilya.
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Re: [U-Boot] [PATCH v8 2/4] net: use common rand()/srand() functions

[Kim Phillips]

On Mon, 4 Jun 2012 15:10:55 -0500
Joe Hershberger  wrote:

> On Fri, Jun 1, 2012 at 3:39 PM, Michael Walle  wrote:
> > Replace rand() with the functions from lib/. The link-local network code
> > stores its own seed, derived from the MAC address. Thus making it
> > independent from calls to srand() in other modules.
> >
> > Signed-off-by: Michael Walle 
> > Cc: Joe Hershberger 
> > ---
> 
> Acked-by: Joe Hershberger 

build-testing mpc83xx on the current u-boot-arm tree
(v1.3.4-10940-gb003588, which contains this patch) produces the
following new warning:

$ ./MAKEALL MPC8313ERDB_66
Configuring for MPC8313ERDB_66 - Board: MPC8313ERDB, Options: SYS_66MHZ
   textdata bss dec hex filename
 271988   13976   41768  327732   50034 ./u-boot
In file included from bootp.c:15:0:
net_rand.h: In function 'srand_mac':
net_rand.h:40:2: warning: implicit declaration of function 'srand' 
[-Wimplicit-function-declaration]

How do we fix this?

Kim

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Re: [U-Boot] i.MX35PDK: Starting U-Boot from serial NOR-Flash

[Fabio Estevam]

Hi Michael,

On Thu, Jul 5, 2012 at 6:09 AM, Hornung, Michael  wrote:
> Hi Fabio,
>
> thank you very much for your reply.
>
>> With these values you can create a correct imximage.cfg file for mx35pdk.
>
> Thank you, I'll try my best.
>
>>> $ ./tools/mkimage -n ./board/freescale/mx35pdk/imximage.cfg -T imximage -e 
>>> 0xA000 -d u-boot.bin u-boot.imx

The best way to generate 'u-boot.imx' is to simply do 'make
u-boot.imx' and then you don't need to pass the above line manually.

> Can you tell me which address I have to append to the -e switch of the 
> mkimage program? I think that my choice (0xA000) is
> incorrect since it is /CS0 memory region of the WEIM. Is it 0x1000 for 
> internal RAM? And if so, do I have to change the following
> define within "include/configs/mx35pdk.h", too?
>
> /* Set TEXT at the beginning of the NOR flash */
> #define CONFIG_SYS_TEXT_BASE0xA000

In internal mode you should do:

#define CONFIG_LOADADDR 0x8080
#define CONFIG_SYS_TEXT_BASE0x8780

for mx35.

You probably will need to skip the RAM init in
board/freescale/mx35pdk/lowlevel_init.S

For a quick test I would remove the call to 'setup_sdram' there,
because RAM will be inited by the values from your created
imximage.cfg file.

After you managed to boot from internal mode, then we can think on how
to properly handle both internal and external boot modes. Maybe we
will need to create another mx35pdk target so that we can handle the
internal mode.

>> So my suggestion for you is to try to boot from internal boot mode first. 
>> Try booting from SD card first as this would be easier.
>
> Could you please give a short explanation, why it is easier to boot from SD 
> than from serial NOR?

Well, I don't have SPI NOR populated on my board ;-)

Besides that, flashing an SD card is much simpler. Please read
doc/README.imximage

Booting from SD is the mode we support by default on other
mx25/mx51/mx53/mx6 boards.

Regards,

Fabio Estevam
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Re: [U-Boot] [PATCH v3 00/11] updates for Keymile Marvell boards

[Prafulla Wadaskar]

> -Original Message-
> From: Holger Brunck [mailto:holger.bru...@keymile.com]
> Sent: 05 July 2012 20:35
> To: u-boot@lists.denx.de
> Cc: Holger Brunck; Valentin Longchamp; Prafulla Wadaskar
> Subject: [PATCH v3 00/11] updates for Keymile Marvell boards
> 
> Changes for v3 in general:
>  - remove the managed switch driver as requested on the ML
> 
> cc: Holger Brunck 
> cc: Valentin Longchamp 
> cc: Prafulla Wadaskar 
> 
> Holger Brunck (6):
>   arm/km: add kmnusa board support
>   arm/km: add kmcoge5un board support
>   arm/km: convert mgcoge3un target to km_kirkwood
>   arm/km: remove portl2.h and use km_kirkwood instead
>   arm/km: cleanup km_kirkwood boards
>   arm/km: remove calls to kw_gpio_* in board_early_init_f
> 
> Thomas Herzmann (1):
>   arm/km: add implementation for read_dip_switch
> 
> Valentin Longchamp (4):
>   arm/km: enable BOCO2 FPGA download support
>   arm/km: redefine piggy 4 reg names to avoid conflicts
>   arm/km: skip FPGA config when already configured
>   arm/km: support the 2 PCIe fpga resets
> 
>  MAINTAINERS|2 +
>  board/keymile/common/common.h  |5 +
>  board/keymile/km_arm/Makefile  |4 +
>  board/keymile/km_arm/fpga_config.c |  256
> 
>  board/keymile/km_arm/km_arm.c  |  104 +++---
>  board/keymile/km_arm/kwbimage_128M16_1.cfg |  296
> 
>  board/keymile/km_arm/kwbimage_256M8_1.cfg  |  296
> 
>  boards.cfg |   10 +-
>  include/configs/km/km_arm.h|   48 -
>  include/configs/km_kirkwood.h  |  141 --
>  include/configs/mgcoge3un.h|   87 
>  include/configs/portl2.h   |   85 
>  12 files changed, 1103 insertions(+), 231 deletions(-)
>  create mode 100644 board/keymile/km_arm/fpga_config.c
>  create mode 100644 board/keymile/km_arm/kwbimage_128M16_1.cfg
>  create mode 100644 board/keymile/km_arm/kwbimage_256M8_1.cfg
>  delete mode 100644 include/configs/mgcoge3un.h
>  delete mode 100644 include/configs/portl2.h


Applied this patch series to u-boot-marvell.git master branch

Regards...
Prafulla . . .
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Re: [U-Boot] [PATCH v4] arm/km: add kmnusa board support

[Prafulla Wadaskar]

> -Original Message-
> From: Holger Brunck [mailto:holger.bru...@keymile.com]
> Sent: 05 July 2012 21:08
> To: u-boot@lists.denx.de
> Cc: Holger Brunck; Valentin Longchamp; Gerlando Falauto; Prafulla
> Wadaskar
> Subject: [PATCH v4] arm/km: add kmnusa board support
> 
> This board is similar to portl2, but it has the u-boot environment
> in a SPI NOR flash and not in an i2c eeprom like portl2 have.
> 
> Some other details:
>  - IVM EEPROM is at adress: pca9547:70:9
>  - PCI is enabled
>  - PIGGY4 is connected via MV88E6352 simple switch. There is no phy
>between the simple switch and the kirkwood.
> 
> Signed-off-by: Holger Brunck 
> Signed-off-by: Valentin Longchamp 
> cc: Gerlando Falauto 
> cc: Prafulla Wadaskar 
> ---
> changes for v4:
>   - the wrong kwbimage_128M16_1.cfg file was picked up
> this was already present in v2 due to the renaming issue
> now fixed
> changes for v3:
>   - rebase to current master
>   - use reset_phy funtion as on mgcoge3un
> changes for v2:
>   - rename 128M16-1.cfg to kwbimage_128M16_1.cfg
> 


Applied this patch to u-boot-marvell.git master branch

Regards...
Prafulla . . .

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[U-Boot] Pull request for u-boot-marvell.git

[Prafulla Wadaskar]

Dear Albert,

Please pull
The following changes since commit 863ba81c70d8ca8dc49e0c5a28a1fd0fb23ca62d:
  Tetsuyuki Kobayashi (1):
arm: bugfix: Move vector table before jumping relocated code

are available in the git repository at:

  u-boot-marvell.git master branch.

Holger Brunck (6):
  arm/km: add kmnusa board support
  arm/km: add kmcoge5un board support
  arm/km: convert mgcoge3un target to km_kirkwood
  arm/km: remove portl2.h and use km_kirkwood instead
  arm/km: cleanup km_kirkwood boards
  arm/km: remove calls to kw_gpio_* in board_early_init_f

Thomas Herzmann (1):
  arm/km: add implementation for read_dip_switch

Valentin Longchamp (4):
  arm/km: enable BOCO2 FPGA download support
  arm/km: redefine piggy 4 reg names to avoid conflicts
  arm/km: skip FPGA config when already configured
  arm/km: support the 2 PCIe fpga resets

 MAINTAINERS|2 +
 board/keymile/common/common.h  |5 +
 board/keymile/km_arm/Makefile  |4 +
 board/keymile/km_arm/fpga_config.c |  256 
 board/keymile/km_arm/km_arm.c  |  104 +++---
 board/keymile/km_arm/kwbimage_128M16_1.cfg |  294 +++
 board/keymile/km_arm/kwbimage_256M8_1.cfg  |  296 
 boards.cfg |   10 +-
 include/configs/km/km_arm.h|   48 -
 include/configs/km_kirkwood.h  |  141 --
 include/configs/mgcoge3un.h|   87 
 include/configs/portl2.h   |   85 
 12 files changed, 1101 insertions(+), 231 deletions(-)
 create mode 100644 board/keymile/km_arm/fpga_config.c
 create mode 100644 board/keymile/km_arm/kwbimage_128M16_1.cfg
 create mode 100644 board/keymile/km_arm/kwbimage_256M8_1.cfg
 delete mode 100644 include/configs/mgcoge3un.h
 delete mode 100644 include/configs/portl2.h

Regards...
Prafulla . . .
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Re: [U-Boot] [PATCH] armv7: Fix infinite loop for the spl boot

[Albert ARIBAUD (by way of Albert ARIBAUD]

Hi Zhong Hongbo,

On Thu, 05 Jul 2012 19:53:46 +0800, Zhong Hongbo 
wrote:
> Hi Albert,
> 
> Could you applied the patch to the arm tree?
> 
> Thanks,
> hongbo
> On 07/03/2012 07:46 AM, Zhong Hongbo wrote:
> > From: Zhong Hongbo 
> > 
> > In the spl booting step, When __bss_start is equal to __bss_end__,
> > The loop will clear all the things in CPU space. If there are have
> > the same address for this symbol, To skip the clear bss section.
> > 
> > Signed-off-by: Hongbo Zhong 
> > ---
> >  arch/arm/cpu/armv7/start.S |3 +++
> >  1 files changed, 3 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> > index 76ccef1..c72f337 100644
> > --- a/arch/arm/cpu/armv7/start.S
> > +++ b/arch/arm/cpu/armv7/start.S
> > @@ -258,6 +258,8 @@ clear_bss:
> > /* No relocation for SPL */
> > ldr r0, =__bss_start
> > ldr r1, =__bss_end__
> > +   cmp r0, r1
> > +   beq skip_clbss
> >  #else
> > ldr r0, _bss_start_ofs
> > ldr r1, _bss_end_ofs
> > @@ -271,6 +273,7 @@ clbss_l:str r2, [r0]/*
> > clear loop...   */ add  r0, r0, #4
> > cmp r0, r1
> > bne clbss_l
> > +skip_clbss:

Clearly the loop was wrong in that it should implement a "for (r0 =
start; r0 < end; r0++)" but actually implements a "for (r0 =
start; r0 != end; r0++)".

I'd rather the loop be fixed to match the intended implementation
rather than worked around. Please rewrite your patch to turn:

> clbss_l:str r2, [r0]  /* clear loop...*/
> add r0, r0, #4
> cmp r0, r1
> bne clbss_l

Into something like

> clbss_l:cmp r0, r1
> blo clbss_d
> str r2, [r0]  /* clear loop...*/
> add r0, r0, #4
> b   clbss_l
> clbss_d:

Also, as Andreas points out, make sure the same fix is applied to all ARM 
start.S files which need it.

Thanks in advance.

Amicalement,
-- 
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Re: [U-Boot] [PATCH v4 0/3] AM335x: Add USB support in u-boot.

[Tom Rini]

On 07/04/2012 05:29 PM, Marek Vasut wrote:
> Dear Tom Rini,
> 
> [...]
> 
 This is as per my understanding. It could also cause confusions
 to some due to name. maybe :)
>>>
>>> I'm no omap guru, Tom is. Tom?
>>
>> I think what we need to do is take a shot at converting am35x.c and
>> am335x.c into a 'ti_musb.[ch]' and per-family header files that give
>> the register layout, etc, etc.  We need to see how maintainable or not
>> such a setup will be.
> 
> Good, will you please poke into it, guys?

If Harman doesn't, Ilya will.

-- 
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Re: [U-Boot] [PATCH] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

[Tom Rini]

On Wed, Jul 04, 2012 at 05:03:59PM +0400, Ilya Yanok wrote:
`
> From: Tom Rini 
> 
> The USB spec says that 32 bytes is the minimum required alignment.
> However on some platforms we have a larger minimum requirement for cache
> coherency.  In those cases, use that value rather than the USB spec
> minimum.  We add a cpp check to  to define USB_DMA_MINALIGN and
> make use of it in ehci-hcd.c and musb_core.h.  We cannot use MAX() here
> as we are not allowed to have tests inside of align(...).
> 
> Cc: Marek Vasut 
> Signed-off-by: Tom Rini 
> [ilya.yanok]: fix size alignment, drop (incorrect) rounding
> when invalidating the buffer. If we got unaligned buffer from the
> upper layer -- that's definetely a bug so it's good to buzz
> about it. But we have to align the buffer length -- upper layers
> should take care to reserve enough space.
> Signed-off-by: Ilya Yanok 

So trying this on ethernet still gives a handful of unaligned areas.  Do
you have a beagleboard xM available?

-- 
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Re: [U-Boot] [PATCH v3] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

[Albert ARIBAUD]

Hi Tom,

On Thu, 5 Jul 2012 09:18:28 -0700, Tom Rini  wrote:
> On Thu, Jul 05, 2012 at 01:57:26PM +0200, Albert ARIBAUD wrote:
> > Hi Tetsuyuki,
> > 
> > On Fri, 29 Jun 2012 18:36:21 +0900, Tetsuyuki Kobayashi
> >  wrote:
> > > save_boot_params_default() in cpu.c accesses uninitialized stack area
> > > when it compiled with -O0 (not optimized).
> > > 
> > > Signed-off-by: Tetsuyuki Kobayashi 
> > > ---
> > > Changes for v2:
> > >  - include  and use __naked instead of
> > > __attribute__((naked))
> > > 
> > > Changes for v3:
> > >  - move __naked after void
> > >  - reformat comments
> > > 
> > >  arch/arm/cpu/armv7/cpu.c |8 +++-
> > >  1 file changed, 7 insertions(+), 1 deletion(-)
> > 
> > Applied to u-boot-arm/master, thanks.
> 
> Oh no...
> cpu.c: In function 'save_boot_params_default':
> cpu.c:48:1: warning: -fstack-usage not supported for this target [enabled by 
> default]
> 
> Last time we made a const uint32 out of the instruction instead (see
> 494931a).  I don't think that's appropriate here however.  Maybe we can
> declare the function weak in assembly instead, then we won't need the
> naked part and won't have this warning.

Meanwhile I'll remove this patch from my tree.

Amicalement,
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[U-Boot] Please pull u-boot-ti/master

[Tom Rini]

Hi Albert,

The following changes since commit 863ba81c70d8ca8dc49e0c5a28a1fd0fb23ca62d:

  arm: bugfix: Move vector table before jumping relocated code (2012-07-05 
14:01:28 +0200)

are available in the git repository at:

  git://git.denx.de/u-boot-ti master

for you to fetch changes up to 5af86f75c46f15ae7d499593d52cd7db998b8428:

  cm-t35: fix incorrect NAND_ECC layout selection (2012-07-05 09:05:53 -0700)


Lokesh Vutla (3):
  ARM: OMAP3+: Detect reset type
  OMAP4+: Handle sdram init after warm reset
  OMAP4+: Force DDR in self-refresh after warm reset

Nikita Kiryanov (1):
  cm-t35: fix incorrect NAND_ECC layout selection

Rajashekhara, Sudhakar (1):
  da850/omap-l138: Enable auto negotiation in RMII mode

SRICHARAN R (5):
  ARM: OMAP4+: Move external phy initialisations to arch specific place.
  ARM: OMAP4/5: Move gpmc clocks to essential group.
  ARM: OMAP4/5: Move USB clocks to essential group.
  ARM: OMAP4/5: Move USB pads to essential list.
  ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls.

Sebastien Jan (1):
  omap4: Use a smaller M,N couple for IVA DPLL

Steve Sakoman (3):
  omap: emif: deal with rams that return duplicate mr data on all byte lanes
  omap: emif: fix bug in manufacturer code test
  omap: am33xx: accomodate input clocks other than 24 Mhz

 arch/arm/cpu/armv7/omap-common/emif-common.c |   72 --
 arch/arm/cpu/armv7/omap-common/hwinit-common.c   |4 ++
 arch/arm/cpu/armv7/omap-common/reset.c   |5 ++
 arch/arm/cpu/armv7/omap4/clocks.c|   14 ++---
 arch/arm/cpu/armv7/omap4/sdram_elpida.c  |1 -
 arch/arm/cpu/armv7/omap5/clocks.c|8 +--
 arch/arm/cpu/armv7/omap5/sdram.c |   31 ++
 arch/arm/include/asm/arch-am33xx/clocks_am33xx.h |   10 +--
 arch/arm/include/asm/arch-am33xx/cpu.h   |2 +
 arch/arm/include/asm/arch-omap3/cpu.h|2 +
 arch/arm/include/asm/arch-omap3/sys_proto.h  |1 +
 arch/arm/include/asm/arch-omap4/cpu.h|2 +
 arch/arm/include/asm/arch-omap4/sys_proto.h  |2 +
 arch/arm/include/asm/arch-omap5/cpu.h|2 +
 arch/arm/include/asm/arch-omap5/sys_proto.h  |2 +
 arch/arm/include/asm/emif.h  |2 +
 board/ti/omap5_evm/mux_data.h|   18 +++---
 board/ti/sdp4430/sdp4430_mux_data.h  |   25 
 drivers/net/davinci_emac.c   |8 +++
 include/configs/cm_t35.h |2 +-
 include/configs/omap4_common.h   |5 --
 include/configs/omap5_evm.h  |2 -
 22 files changed, 140 insertions(+), 80 deletions(-)

Please take this for the pull request that goes to Wolfgang for -rc1 if
possible.  If you can't, I've got other stuff I need to sort over that
should go in for the release as well but I want to get this out now.

Everyone else that's posted TI-related patches, if your patch isn't here
but is assigned to me in patchwork I haven't lost it and will place it
in either master or next soon.  If your patch isn't assigned to me,
please move it to me (you should be able to manage your own patches) and
email me the link either way.  Thanks!


-- 
Tom


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Re: [U-Boot] [PATCH v3] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

[Tom Rini]

On Thu, Jul 05, 2012 at 01:57:26PM +0200, Albert ARIBAUD wrote:
> Hi Tetsuyuki,
> 
> On Fri, 29 Jun 2012 18:36:21 +0900, Tetsuyuki Kobayashi
>  wrote:
> > save_boot_params_default() in cpu.c accesses uninitialized stack area
> > when it compiled with -O0 (not optimized).
> > 
> > Signed-off-by: Tetsuyuki Kobayashi 
> > ---
> > Changes for v2:
> >  - include  and use __naked instead of
> > __attribute__((naked))
> > 
> > Changes for v3:
> >  - move __naked after void
> >  - reformat comments
> > 
> >  arch/arm/cpu/armv7/cpu.c |8 +++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> Applied to u-boot-arm/master, thanks.

Oh no...
cpu.c: In function 'save_boot_params_default':
cpu.c:48:1: warning: -fstack-usage not supported for this target [enabled by 
default]

Last time we made a const uint32 out of the instruction instead (see
494931a).  I don't think that's appropriate here however.  Maybe we can
declare the function weak in assembly instead, then we won't need the
naked part and won't have this warning.

-- 
Tom


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Re: [U-Boot] [PATCH] armv7: Fix to mistake clean the memory space

[Andreas Bießmann]

On 05.07.2012 17:38, Andreas Bießmann wrote:



>> -clbss_l:str r2, [r0]/* clear loop...*/
>> +clbss_l:
>> +cmp r1, r0
>> +bls clbss_end
>> +str r2, [r0]/* clear loop...*/
>>  add r0, r0, #4
>> -cmp r0, r1
>> -bne clbss_l
>> +b   clbss_l
>> +clbss_end:
> 
> Looks sane, I maybe had checked before clbss_l, jumped over clear loop
> if r0 and r1 equal (to emphasize the fact that this is a check for entry
> correctness) and wouldn't change the loop at all. To be more precise we
> could also check if end is after start.

Well, I just realized you do check for less ;)
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Re: [U-Boot] [PATCH 1/2] kirkwood: implement kw_sdram_bs_set()

[Marek Vasut]

Dear Gerlando Falauto,

> On 07/05/2012 05:38 PM, Marek Vasut wrote:
> > Dear Gerlando Falauto,
> > 
> >> Some boards might be equipped with different SDRAM configurations.
> >> When that is the case, CPU CS Window Size Register (CS[0]n Size) should
> >> be set to the biggest value through board.cfg file; then its value
> >> can be fixed at runtime according to the detected SDRAM size.
> >> 
> >> Therefore, implement kw_sdram_bs_set(), to be called for instance within
> >> board_early_init_f().
> > 
> > [..]
> > 
> >> +/*
> >> + * kw_sdram_bs_set - writes SDRAM Bank size
> >> + */
> >> +void kw_sdram_bs_set(enum memory_bank bank, u32 size)
> > 
> > The enum is declared somewhere, right ?
> 
> Yes, in arch/arm/include/asm/arch-kirkwood/cpu.h.
> 
> It's the same enum also used by other functions {declared, defined}
> within the same {header, source} file, like:
> 
> u32 kw_sdram_bs(enum memory_bank bank)

Good, add my

Reviewed-by: Marek Vasut 

> 
> Best regards,
> Gerlando

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 03/14] arm/km: convert mgcoge3un target to km_kirkwood

[Holger Brunck]

On 07/05/2012 03:48 PM, Prafulla Wadaskar wrote:
>>
>> And if I resend the remaining eleven patches in the same order as
>> beneath
>> these are:
>> [U-Boot,v2,01/14] arm/km: add kmnusa board support
>> [U-Boot,v2,02/14] arm/km: add kmcoge5un board support
>> [U-Boot,v2,03/14] arm/km: convert mgcoge3un target to km_kirkwood
>> [U-Boot,v2,04/14] arm/km: remove portl2.h and use km_kirkwood instead
>> [U-Boot,v2,06/14] arm/km: enable BOCO2 FPGA download support
>> [U-Boot,v2,07/14] arm/km: cleanup km_kirkwood boards
>> [U-Boot,v2,08/14] arm/km: redefine piggy 4 reg names to avoid
>> conflicts
>> [U-Boot,v2,11/14] arm/km: skip FPGA config when already configured
>> [U-Boot,v2,12/14] arm/km: support the 2 PCIe fpga resets
>> [U-Boot,v2,13/14] arm/km: add implementation for read_dip_switch
>> [U-Boot,v2,14/14] arm/km: remove calls to kw_gpio_* in
>> board_early_init_f
>>
>> as another patch serie do you accept this?
> 
> YES.
> 

ok done.

Unfortunately after sending v3 I saw that already in v2 I introduced a bug
during renaming the kwbimage.cfg in the first patch. I already sent a patch wich
corrected this as a v4. But only this patch as v4 because the other ten patches
don't need to be changed, because  of this.

Regards
Holger
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Re: [U-Boot] [PATCH 1/2] kirkwood: implement kw_sdram_bs_set()

[Gerlando Falauto]

On 07/05/2012 05:38 PM, Marek Vasut wrote:

Dear Gerlando Falauto,


Some boards might be equipped with different SDRAM configurations.
When that is the case, CPU CS Window Size Register (CS[0]n Size) should
be set to the biggest value through board.cfg file; then its value
can be fixed at runtime according to the detected SDRAM size.

Therefore, implement kw_sdram_bs_set(), to be called for instance within
board_early_init_f().


[..]


+/*
+ * kw_sdram_bs_set - writes SDRAM Bank size
+ */
+void kw_sdram_bs_set(enum memory_bank bank, u32 size)


The enum is declared somewhere, right ?

Yes, in arch/arm/include/asm/arch-kirkwood/cpu.h.

It's the same enum also used by other functions {declared, defined} 
within the same {header, source} file, like:


u32 kw_sdram_bs(enum memory_bank bank)

Best regards,
Gerlando
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Re: [U-Boot] [PATCH 1/2] kirkwood: implement kw_sdram_bs_set()

[Marek Vasut]

Dear Gerlando Falauto,

> Some boards might be equipped with different SDRAM configurations.
> When that is the case, CPU CS Window Size Register (CS[0]n Size) should
> be set to the biggest value through board.cfg file; then its value
> can be fixed at runtime according to the detected SDRAM size.
> 
> Therefore, implement kw_sdram_bs_set(), to be called for instance within
> board_early_init_f().
> 
[..]

> +/*
> + * kw_sdram_bs_set - writes SDRAM Bank size
> + */
> +void kw_sdram_bs_set(enum memory_bank bank, u32 size)

The enum is declared somewhere, right ?

[...]

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] armv7: Fix to mistake clean the memory space

[Andreas Bießmann]

Dear Zhong Hongbo,

this is arm related and should therefore apply to all the different
arch/arm/cpu/*/start.S (as long as they have SPL support).

On 05.07.2012 16:35, Zhong Hongbo wrote:
> From: Zhong Hongbo 
> 
> In currently, when __bss_start is equal to __bss_end__,
> The bss loop will clear all the things in memory space.

I ask myself why there is no bss at all. Have you just initialized data
in your spl code?

> 
> But just only when __bss_end__ greater than __bss_start__,
> we do the clear bss section operation.
> 
> Signed-off-by: Hongbo Zhong 
> ---
>  arch/arm/cpu/armv7/start.S |9 ++---
>  1 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index 22a3ced..2e583ee 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -259,10 +259,13 @@ clear_bss:
>  #endif
>   mov r2, #0x /* clear*/
>  
> -clbss_l:str  r2, [r0]/* clear loop...*/
> +clbss_l:
> + cmp r1, r0
> + bls clbss_end
> + str r2, [r0]/* clear loop...*/
>   add r0, r0, #4
> - cmp r0, r1
> - bne clbss_l
> + b   clbss_l
> +clbss_end:

Looks sane, I maybe had checked before clbss_l, jumped over clear loop
if r0 and r1 equal (to emphasize the fact that this is a check for entry
correctness) and wouldn't change the loop at all. To be more precise we
could also check if end is after start.

>  
>  /*
>   * We are done. Do not return, instead branch to second part of board
> 

Best regards

Andreas Bießmann
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[U-Boot] [PATCH v4] arm/km: add kmnusa board support

[Holger Brunck]

This board is similar to portl2, but it has the u-boot environment
in a SPI NOR flash and not in an i2c eeprom like portl2 have.

Some other details:
 - IVM EEPROM is at adress: pca9547:70:9
 - PCI is enabled
 - PIGGY4 is connected via MV88E6352 simple switch. There is no phy
   between the simple switch and the kirkwood.

Signed-off-by: Holger Brunck 
Signed-off-by: Valentin Longchamp 
cc: Gerlando Falauto 
cc: Prafulla Wadaskar 
---
changes for v4:
  - the wrong kwbimage_128M16_1.cfg file was picked up
this was already present in v2 due to the renaming issue
now fixed
changes for v3:
  - rebase to current master
  - use reset_phy funtion as on mgcoge3un
changes for v2:
  - rename 128M16-1.cfg to kwbimage_128M16_1.cfg

 MAINTAINERS|1 +
 board/keymile/km_arm/km_arm.c  |7 +-
 board/keymile/km_arm/kwbimage_128M16_1.cfg |  294 
 boards.cfg |1 +
 include/configs/km/km_arm.h|   44 -
 include/configs/km_kirkwood.h  |   67 ++-
 6 files changed, 391 insertions(+), 23 deletions(-)
 create mode 100644 board/keymile/km_arm/kwbimage_128M16_1.cfg

diff --git a/MAINTAINERS b/MAINTAINERS
index ce9fc9d..864a827 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -740,6 +740,7 @@ Sergey Lapin 
 Valentin Longchamp 
 
km_kirkwood ARM926EJS (Kirkwood SoC)
+   kmnusa  ARM926EJS (Kirkwood SoC)
mgcoge3un   ARM926EJS (Kirkwood SoC)
portl2  ARM926EJS (Kirkwood SoC)
 
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index cb3402b..e77c5ad 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -134,10 +134,11 @@ int startup_allowed(void)
 }
 #endif
 
-#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2))
+#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2)| \
+   defined(CONFIG_KM_PIGGY4_88E6352))
 /*
- * These two boards have always ethernet present. Its connected to the mv
- * switch.
+ * All boards with PIGGY4 connected via a simple switch have ethernet always
+ * present.
  */
 int ethernet_present(void)
 {
diff --git a/board/keymile/km_arm/kwbimage_128M16_1.cfg 
b/board/keymile/km_arm/kwbimage_128M16_1.cfg
new file mode 100644
index 000..bcce907
--- /dev/null
+++ b/board/keymile/km_arm/kwbimage_128M16_1.cfg
@@ -0,0 +1,294 @@
+#
+# (C) Copyright 2010
+# Heiko Schocher, DENX Software Engineering, h...@denx.de.
+#
+# (C) Copyright 2012
+# Valentin Longchamp, Keymile AG, valentin.longch...@keymile.com
+# Stefan Bigler, Keymile AG, stefan.big...@keymile.com
+#
+# (C) Copyright 2012
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM  spi # Boot from SPI flash
+
+DATA 0xFFD1 0x0111 # MPP Control 0 Register
+# bit 3-0:   2, MPPSel0  SPI_CSn  (1=NF_IO[2])
+# bit 7-4:   2, MPPSel1  SPI_SI   (1=NF_IO[3])
+# bit 12-8:  2, MPPSel2  SPI_SCK  (1=NF_IO[4])
+# bit 15-12: 2, MPPSel3  SPI_SO   (1=NF_IO[5])
+# bit 19-16: 1, MPPSel4  NF_IO[6]
+# bit 23-20: 1, MPPSel5  NF_IO[7]
+# bit 27-24: 1, MPPSel6  SYSRST_O
+# bit 31-28: 0, MPPSel7  GPO[7]
+
+DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
+# bit 3-0:   0, MPPSel8 GPIO[8]
+# bit 7-4:   0, MPPSel9  GPIO[9]
+# bit 12-8:  3, MPPSel10 UA0_TXD
+# bit 15-12: 3, MPPSel11 UA0_RXD
+# bit 19-16: 0, MPPSel12 not connected
+# bit 23-20: 3, MPPSel13 UA1_TXD
+# bit 27-24: 3, MPPSel14 UA1_RXD
+# bit 31-28: 0, MPPSel15 GPIO[15]
+
+DATA 0xFFD10008 0x1100 # MPP Control 2 Register
+# bit 3-0:   0, MPPSel16 GPIO[16]
+# bit 7-4:   0, MPPSel17 not connected
+# bit 12-8:  1, MPPSel18 NF_IO[0]
+# bit 15-12: 1, MPPSel19 NF_IO[1]
+# bit 19-16: 0, MPPSel20 GPIO[20]
+# bit 23-20: 0, MPPSel21 GPIO[21]
+# bit 27-24: 0, MPPSel22 GPIO[22]
+# bit 31-28: 0, MPPSel23 GPIO[23]
+
+# MPP Control 3-6 Register untouched (MPP24-49)
+
+DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register
+# bit 2-0:   3, Reserved
+# bit 5-3:   3, Reserved
+# bit 6: 0, Reserved
+# bit 7: 0, RGMII-pads voltage = 3.3V
+# bit 10-8:  3, Reserved
+# bit 13

Re: [U-Boot] ARM CONFIG_OF_CONTROL status

[Stephen Warren]

On 07/04/2012 12:02 AM, Michal Simek wrote:
...
> What is the problem to add the latest dtc?

To really make use of device tree you need a recent dtc, but we've had
pushback requiring a recent dtc because people may not have it
installed. I asked Wolfgang a while back whether we could just put a
copy of dtc into the U-Boot source tree to avoid this issue, just like
the kernel did, but simply haven't received any response. Perhaps the
best thing is to just send a patch to do this; patches often get more
responses than non-patch email.
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Re: [U-Boot] USB detection

[Marek Vasut]

Dear Albert ARIBAUD,

> Hi Manukumar,
> 
> On Thu, 05 Jul 2012 15:57:49 +0530, Manukumar
> 
>  wrote:
> > Hello,
> > 
> > I have connected USB hard disk to P1020RB
> 
> Which board is this? Neither "git grep -i P1020RB" nor "find . iname
> '*P1020RB*'" yield any result.

Ain't it P1020RDB?

> > and in command prompt(u-boot) i used
> > command
> > => usb start
> > (Re)start USB...
> > USB:   Register 10011 NbrPorts 1
> > USB EHCI 1.00
> > scanning bus for devices... 3 USB Device(s) found
> > 
> >scanning bus for storage devices... 1 Storage Device(s) found
> > 
> > => usb dev
> > 
> > USB device 0: Vendor: Seagate  Rev: 0130 Prod: Portable
> > 
> > Type: Hard Disk
> > Capacity: 476940.0 MB = 465.7 GB (976773168 x 512)
> > 
> > and USB got detected.
> > 
> > but If i used the same command in our custom board
> > => usb start
> > (Re)start USB...
> > USB:   Register 10011 NbrPorts 1
> > USB EHCI 1.00
> > scanning bus for devices... 1 USB Device(s) found
> > 
> >scanning bus for storage devices... 0 Storage Device(s) found
> > 
> > => usb dev
> > 
> > USB device -1: device type unknown
> > 
> > 
> > How do resolve this issue and why the device is not detecting my USB
> > hard disk.?

This happens with mainline u-boot, right? Can you try older version of uboot 
and 
then git bisect to find the offending change please?

> Considering that you're trying this on a custom board, and assuming
> "P1020RB" is a nickname for a board supported in mainline U-Boot, there
> are two possibilities:
> 
> 1) the custom board uses exactly the same U-Boot (source, configuration
> and binaries) as P1020RB, and the issue is in HW, in which case we can
> barely help;
> 
> 2) the custom board uses a custom U-Boot, and we can barely help too,
> as this issue is not about (recent) mainline U-Boot code.
> 
> > manukumar
> > signal-networks
> 
> Amicalement,

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2] arm: cm4008, cm41xx: Fix ROM relocation

[Andreas Bießmann]

Dear Yann Vernier,

On 05.07.2012 15:22, Yann Vernier wrote:
> Changed CONFIG_SYS_TEXT_BASE to actual address (required for
> board_init_f) and moved it into cm4008.h, along with a warning that it
> must match CONFIG_SYS_FLASH_BASE (since lowlevel_init relocates there).
> lowlevel_init now uses CONFIG_SYS_FLASH_BASE to map ROM, although the
> second bank is still mapped at 0x0240-0x027f.
> ---
> Changes for v2:
>- Update to use CONFIG_SYS_FLASH_ constants only (no PHYS_FLASH)
>- Use tabs where appropriate
>- Update cm41xx also
>- Explain the lowlevel_init change
> 
> Signed-off-by: Yann Vernier 
> ---
>  arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |9 +++--
>  board/cm4008/config.mk  |1 -
>  board/cm41xx/config.mk  |1 -
>  include/configs/cm4008.h|7 ---
>  include/configs/cm41xx.h|7 ---
>  5 files changed, 15 insertions(+), 10 deletions(-)
>  delete mode 100644 board/cm4008/config.mk
>  delete mode 100644 board/cm41xx/config.mk
> 
> diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S 
> b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> index df13de6..7bb9ede 100644
> --- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> +++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> @@ -92,11 +92,16 @@ lowlevel_init:
>* ram from address 0, and flash at 32MB.
>*/
>   ldr r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL0)
> + /* Remap flash memory to 768MB size, such that it covers
> +both 0 (boot) and 512MB (run) regions */
>   ldr r2, =0xbfc00040
>   str r2, [r1]/* large flash map */
> - ldr pc, =(highflash+0x0200-0x00f0)  /* jump to high flash 
> address */
> + /* Relies on CONFIG_SYS_FLASH_BASE==CONFIG_SYS_TEXT_BASE */
> + ldr pc, =(highflash)/* jump to high flash address */
>  highflash:
> - ldr r2, =0x8fe00040
> + /* Move ROM to high address, and reconfigure to 4MiB size */
> + ldr r2, =(((CONFIG_SYS_FLASH_BASE+0x3f)<<(22-16))|  \
> +   (CONFIG_SYS_FLASH_BASE>>(16-12))|0x40)

again some magic ... Well I do not know this architecture in detail and
can nothing say about the register footprint. I just hope somebody with
access to tech spec of this cpu is able to understand how 'Move ROM to
high address, and reconfigure to 4MiB size' is related to this magic.

Beside that I tend to ack this patch. Yann, have you some proposal to
resolve my doubts?

>   str r2, [r1]/* remap flash range */
>  
>   /*
> diff --git a/board/cm4008/config.mk b/board/cm4008/config.mk
> deleted file mode 100644
> index 0d5923b..000
> --- a/board/cm4008/config.mk
> +++ /dev/null
> @@ -1 +0,0 @@
> -CONFIG_SYS_TEXT_BASE = 0x00f0
> diff --git a/board/cm41xx/config.mk b/board/cm41xx/config.mk
> deleted file mode 100644
> index 0d5923b..000
> --- a/board/cm41xx/config.mk
> +++ /dev/null
> @@ -1 +0,0 @@
> -CONFIG_SYS_TEXT_BASE = 0x00f0
> diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h
> index 18b37d7..3518206 100644
> --- a/include/configs/cm4008.h
> +++ b/include/configs/cm4008.h
> @@ -115,9 +115,10 @@
>  
>  #define CONFIG_SYS_INIT_SP_ADDR  0x0002 /* lowest 128k of RAM */
>  
> -#define PHYS_FLASH_1 0x0200 /* Flash Bank #1 */
> -#define PHYS_FLASH_SECT_SIZE0x0002 /* 128 KB sectors (x1) */
> -#define CONFIG_SYS_FLASH_BASEPHYS_FLASH_1
> +/* CONFIG_SYS_TEXT_BASE and CONFIG_SYS_FLASH_BASE must match for both
> +   relocation in lowlevel_init.S and function array in board.c */
> +#define CONFIG_SYS_TEXT_BASE 0x0200
> +#define CONFIG_SYS_FLASH_BASECONFIG_SYS_TEXT_BASE
>  
>  #define CONFIG_SYS_FLASH_CFI
>  #define CONFIG_FLASH_CFI_DRIVER  1
> diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h
> index 3f46b12..5f2d445 100644
> --- a/include/configs/cm41xx.h
> +++ b/include/configs/cm41xx.h
> @@ -115,9 +115,10 @@
>  
>  #define CONFIG_SYS_INIT_SP_ADDR  0x0002 /* lowest 128k of RAM */
>  
> -#define PHYS_FLASH_1 0x0200 /* Flash Bank #1 */
> -#define PHYS_FLASH_SECT_SIZE0x0002 /* 128 KB sectors (x1) */
> -#define CONFIG_SYS_FLASH_BASEPHYS_FLASH_1
> +/* CONFIG_SYS_TEXT_BASE and CONFIG_SYS_FLASH_BASE must match for both
> +   relocation in lowlevel_init.S and function array in board.c */
> +#define CONFIG_SYS_TEXT_BASE 0x0200
> +#define CONFIG_SYS_FLASH_BASECONFIG_SYS_TEXT_BASE
>  
>  #define CONFIG_SYS_FLASH_CFI
>  #define CONFIG_FLASH_CFI_DRIVER  1
> 

Best regards

Andreas Bießmann
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[U-Boot] [PATCH v3 11/11] arm/km: remove calls to kw_gpio_* in board_early_init_f

[Holger Brunck]

These functions tried to access two static tables before relocation
(board_early_init_f is executed before relocation). But these static
tables lie in the bss section which is not valid before relocation.
These accesses then overwrote some parts of u-boot binary before it was
relocated. For the kmnusa build, this results in a corrupted important
env variable (bootcmd) but it may be that some other parts of the u-boot
binary are corrupted.

This patch solves this problem by moving all the kw_gpio_* calls to
board_init, which should be early enough in the boot sequence. The only
calls that could not be moved is the one for the SOFT (bitbang) I2C, and
they have been replaced by a direct access to the GPIO dataout Control
register to set the two GPIOs as output.

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Prafulla Wadaskar 
---
changes for v3:
  -  nothing
changes for v2:
  - fix comment syntax

 board/keymile/km_arm/km_arm.c |   43 ++--
 include/configs/km/km_arm.h   |1 +
 2 files changed, 29 insertions(+), 15 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index eb691f9..ac290fa 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -243,38 +243,51 @@ int misc_init_r(void)
 
 int board_early_init_f(void)
 {
+#if defined(CONFIG_SOFT_I2C)
u32 tmp;
 
+   /* set the 2 bitbang i2c pins as output gpios */
+   tmp = readl(KW_GPIO0_BASE + 4);
+   writel(tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS) , KW_GPIO0_BASE + 4);
+#endif
+
kirkwood_mpp_conf(kwmpp_config, NULL);
+   return 0;
+}
 
+int board_init(void)
+{
/*
-* The FLASH_GPIO_PIN switches between using a
+* arch number of board
+*/
+   gd->bd->bi_arch_number = MACH_TYPE_KM_KIRKWOOD;
+
+   /* address of boot parameters */
+   gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+
+   /*
+* The KM_FLASH_GPIO_PIN switches between using a
 * NAND or a SPI FLASH. Set this pin on start
 * to NAND mode.
 */
-   tmp = readl(KW_GPIO0_BASE);
-   writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
-   tmp = readl(KW_GPIO0_BASE + 4);
-   writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4);
+   kw_gpio_set_valid(KM_FLASH_GPIO_PIN, 1);
+   kw_gpio_direction_output(KM_FLASH_GPIO_PIN, 1);
 
 #if defined(CONFIG_SOFT_I2C)
-   /* init the GPIO for I2C Bitbang driver */
+   /*
+* Reinit the GPIO for I2C Bitbang driver so that the now
+* available gpio framework is consistent. The calls to
+* direction output in are not necessary, they are already done in
+* board_early_init_f
+*/
kw_gpio_set_valid(KM_KIRKWOOD_SDA_PIN, 1);
kw_gpio_set_valid(KM_KIRKWOOD_SCL_PIN, 1);
-   kw_gpio_direction_output(KM_KIRKWOOD_SDA_PIN, 0);
-   kw_gpio_direction_output(KM_KIRKWOOD_SCL_PIN, 0);
 #endif
+
 #if defined(CONFIG_SYS_EEPROM_WREN)
kw_gpio_set_valid(KM_KIRKWOOD_ENV_WP, 38);
kw_gpio_direction_output(KM_KIRKWOOD_ENV_WP, 1);
 #endif
-   return 0;
-}
-
-int board_init(void)
-{
-   /* address of boot parameters */
-   gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
 
 #if defined(CONFIG_KM_FPGA_CONFIG)
trigger_fpga_config();
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 1a5f04b..3aa5ca1 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -192,6 +192,7 @@ int get_sda(void);
 int get_scl(void);
 #define KM_KIRKWOOD_SDA_PIN8
 #define KM_KIRKWOOD_SCL_PIN9
+#define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300
 #define KM_KIRKWOOD_ENV_WP 38
 
 #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
-- 
1.7.1

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[U-Boot] [PATCH v3 08/11] arm/km: skip FPGA config when already configured

[Holger Brunck]

From: Valentin Longchamp 

In order to be able to perform board resets without interrupting the
traffic, the configuration of an already properly configured FPGA is
skipped.

This is because some PCIe FPGAs embed some other function that must
continue to work over reset.

It is then the responsibility of the application to trigger a
reconfiguration when needed. This is done by lowering the FPGA_INIT_B
pin for delaying the configuration to u-boot @ next reboot, and then
lower the FPGA_PROGRAM_B signal.

Signed-off-by: Valentin Longchamp 
---
changes for v2 and v3: simply rebased

 board/keymile/km_arm/fpga_config.c |   41 +++-
 1 files changed, 40 insertions(+), 1 deletions(-)

diff --git a/board/keymile/km_arm/fpga_config.c 
b/board/keymile/km_arm/fpga_config.c
index 4356b9a..8ac6393 100644
--- a/board/keymile/km_arm/fpga_config.c
+++ b/board/keymile/km_arm/fpga_config.c
@@ -96,12 +96,43 @@ static int boco_set_bits(u8 reg, u8 flags)
 #define SPI_REG0x06
 #define CFG_EEPROM 0x02
 #define FPGA_PROG  0x04
+#define FPGA_INIT_B0x10
 #define FPGA_DONE  0x20
 
+static int fpga_done()
+{
+   int ret = 0;
+   u8 regval;
+
+   /* this is only supported with the boco2 design */
+   if (!check_boco2())
+   return 0;
+
+   ret = i2c_read(BOCO_ADDR, SPI_REG, 1, ®val, 1);
+   if (ret) {
+   printf("%s: error reading the BOCO @%#x !!\n",
+   __func__, SPI_REG);
+   return 0;
+   }
+
+   return regval & FPGA_DONE ? 1 : 0;
+}
+
+int skip;
+
 int trigger_fpga_config(void)
 {
int ret = 0;
 
+   /* if the FPGA is already configured, we do not want to
+* reconfigure it */
+   skip = 0;
+   if (fpga_done()) {
+   printf("PCIe FPGA config: skipped\n");
+   skip = 1;
+   return 0;
+   }
+
if (check_boco2()) {
/* we have a BOCO2, this has to be triggered here */
 
@@ -111,7 +142,7 @@ int trigger_fpga_config(void)
return ret;
 
/* trigger the config start */
-   ret = boco_clear_bits(SPI_REG, FPGA_PROG);
+   ret = boco_clear_bits(SPI_REG, FPGA_PROG | FPGA_INIT_B);
if (ret)
return ret;
 
@@ -123,6 +154,11 @@ int trigger_fpga_config(void)
if (ret)
return ret;
 
+   /* finally, raise INIT_B to remove the config delay */
+   ret = boco_set_bits(SPI_REG, FPGA_INIT_B);
+   if (ret)
+   return ret;
+
} else {
/* we do it the old way, with the gpio pin */
kw_gpio_set_valid(KM_XLX_PROGRAM_B_PIN, 1);
@@ -141,6 +177,9 @@ int wait_for_fpga_config(void)
u8 spictrl;
u32 timeout = 2;
 
+   if (skip)
+   return 0;
+
if (!check_boco2()) {
/* we do not have BOCO2, this is not really used */
return 0;
-- 
1.7.1

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[U-Boot] [PATCH v3 02/11] arm/km: add kmcoge5un board support

[Holger Brunck]

For u-boot this board is similar to mgcoge3un. But some differences
are present. We have a different SDRAM on it and therefore a new
SDRAM config file. Additionaly this board has a direct MAC/MAC
connection from the kirkwood to a marvell simple switch without a
phy inbetween, this needs a new configuration for the mvgbe driver.


Signed-off-by: Holger Brunck 
Signed-off-by: Valentin Longchamp 
cc: Gerlando Falauto 
cc: Prafulla Wadaskar 

---
changes for v3:
 - rebase to current master
 - fix typo for  define in post_hotkeys_pressed introduced due to rebasing
   for v2
changes for v2:
 - rename KMCOGE5UN to KM_COGE5UN
 - rename 256M8-1.cfg -> kwbimage_256M8_1.cfg
 - squash 17/20 arm/km: fix testpin detection for kmcoge5un into this
   commit because it should come with the board support patch

 MAINTAINERS   |1 +
 board/keymile/km_arm/km_arm.c |4 +
 board/keymile/km_arm/kwbimage_256M8_1.cfg |  296 +
 boards.cfg|1 +
 include/configs/km_kirkwood.h |   16 ++-
 5 files changed, 316 insertions(+), 2 deletions(-)
 create mode 100644 board/keymile/km_arm/kwbimage_256M8_1.cfg

diff --git a/MAINTAINERS b/MAINTAINERS
index 864a827..e42a327 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -742,6 +742,7 @@ Valentin Longchamp 
km_kirkwood ARM926EJS (Kirkwood SoC)
kmnusa  ARM926EJS (Kirkwood SoC)
mgcoge3un   ARM926EJS (Kirkwood SoC)
+   kmcoge5un   ARM926EJS (Kirkwood SoC)
portl2  ARM926EJS (Kirkwood SoC)
 
 Nishanth Menon 
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index e77c5ad..498bc36 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -457,7 +457,11 @@ int get_scl(void)
 
 int post_hotkeys_pressed(void)
 {
+#if defined(CONFIG_KM_COGE5UN)
+   return kw_gpio_get_value(KM_POST_EN_L);
+#else
return !kw_gpio_get_value(KM_POST_EN_L);
+#endif
 }
 
 ulong post_word_load(void)
diff --git a/board/keymile/km_arm/kwbimage_256M8_1.cfg 
b/board/keymile/km_arm/kwbimage_256M8_1.cfg
new file mode 100644
index 000..3e1237b
--- /dev/null
+++ b/board/keymile/km_arm/kwbimage_256M8_1.cfg
@@ -0,0 +1,296 @@
+#
+# (C) Copyright 2012
+# Stefan Bigler, Keymile AG, stefan.big...@keymile.com
+# Norbert Mayer, Keymile AG, norbert.ma...@keymile.com
+# Deepak Patel, XENTECH Limited, deepak.pa...@xentech.co.uk
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+# This configuration applies to COGE5 design (ARM-part)
+# Two 8-Bit devices are connected on the 16-Bit bus on the same
+# chip-select. The supported devices are
+#   MT47H256M8EB-3IT:C
+#   MT47H256M8EB-25EIT:C
+
+# Boot Media configurations
+BOOT_FROM  spi # Boot from SPI flash
+
+DATA 0xFFD1 0x0111 # MPP Control 0 Register
+# bit 3-0:   2, MPPSel0  SPI_CSn  (1=NF_IO[2])
+# bit 7-4:   2, MPPSel1  SPI_MOSI (1=NF_IO[3])
+# bit 12-8:  2, MPPSel2  SPI_SCK  (1=NF_IO[4])
+# bit 15-12: 2, MPPSel3  SPI_MISO (1=NF_IO[5])
+# bit 19-16: 1, MPPSel4  NF_IO[6]
+# bit 23-20: 1, MPPSel5  NF_IO[7]
+# bit 27-24: 1, MPPSel6  SYSRST_O
+# bit 31-28: 0, MPPSel7  GPO[7]
+
+DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
+# bit 3-0:   0, MPPSel8 GPIO[8] CPU_SDA bitbanged
+# bit 7-4:   0, MPPSel9  GPIO[9] CPU_SCL bitbanged
+# bit 12-8:  3, MPPSel10 UA0_TXD
+# bit 15-12: 3, MPPSel11 UA0_RXD
+# bit 19-16: 0, MPPSel12 not connected
+# bit 23-20: 3, MPPSel13 GPIO[14]
+# bit 27-24: 3, MPPSel14 GPIO[15]
+# bit 31-28: 0, MPPSel15 GPIO[16] BOOT_FL_SEL (SPI-MUX Signal)
+
+DATA 0xFFD10008 0x1100 # MPP Control 2 Register
+# bit 3-0:   0, MPPSel16 GPIO[16]
+# bit 7-4:   0, MPPSel17 not connected
+# bit 11-8:  1, MPPSel18 NF_IO[0]
+# bit 15-12: 1, MPPSel19 NF_IO[1]
+# bit 19-16: 0, MPPSel20 GPIO[20]
+# bit 23-20: 0, MPPSel21 GPIO[21]
+# bit 27-24: 0, MPPSel22 GPIO[22]
+# bit 31-28: 0, MPPSel23 GPIO[23]
+
+# MPP Control 3-6 Register untouched (MPP24-49)
+
+DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register
+# bit 2-0:   3, Reserved
+# bit 5-3:   3, Reserved
+# bit 6: 0, 

[U-Boot] [PATCH v3 00/11] updates for Keymile Marvell boards

[Holger Brunck]

Changes for v3 in general:
 - remove the managed switch driver as requested on the ML

cc: Holger Brunck 
cc: Valentin Longchamp 
cc: Prafulla Wadaskar 

Holger Brunck (6):
  arm/km: add kmnusa board support
  arm/km: add kmcoge5un board support
  arm/km: convert mgcoge3un target to km_kirkwood
  arm/km: remove portl2.h and use km_kirkwood instead
  arm/km: cleanup km_kirkwood boards
  arm/km: remove calls to kw_gpio_* in board_early_init_f

Thomas Herzmann (1):
  arm/km: add implementation for read_dip_switch

Valentin Longchamp (4):
  arm/km: enable BOCO2 FPGA download support
  arm/km: redefine piggy 4 reg names to avoid conflicts
  arm/km: skip FPGA config when already configured
  arm/km: support the 2 PCIe fpga resets

 MAINTAINERS|2 +
 board/keymile/common/common.h  |5 +
 board/keymile/km_arm/Makefile  |4 +
 board/keymile/km_arm/fpga_config.c |  256 
 board/keymile/km_arm/km_arm.c  |  104 +++---
 board/keymile/km_arm/kwbimage_128M16_1.cfg |  296 
 board/keymile/km_arm/kwbimage_256M8_1.cfg  |  296 
 boards.cfg |   10 +-
 include/configs/km/km_arm.h|   48 -
 include/configs/km_kirkwood.h  |  141 --
 include/configs/mgcoge3un.h|   87 
 include/configs/portl2.h   |   85 
 12 files changed, 1103 insertions(+), 231 deletions(-)
 create mode 100644 board/keymile/km_arm/fpga_config.c
 create mode 100644 board/keymile/km_arm/kwbimage_128M16_1.cfg
 create mode 100644 board/keymile/km_arm/kwbimage_256M8_1.cfg
 delete mode 100644 include/configs/mgcoge3un.h
 delete mode 100644 include/configs/portl2.h

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[U-Boot] [PATCH v3 01/11] arm/km: add kmnusa board support

[Holger Brunck]

This board is similar to portl2, but it has the u-boot environment
in a SPI NOR flash and not in an i2c eeprom like portl2 have.

Some other details:
 - IVM EEPROM is at adress: pca9547:70:9
 - PCI is enabled
 - PIGGY4 is connected via MV88E6352 simple switch. There is no phy
   between the simple switch and the kirkwood.


Signed-off-by: Holger Brunck 
Signed-off-by: Valentin Longchamp 
cc: Gerlando Falauto 
cc: Prafulla Wadaskar 
---
changes for v3:
  - rebase to current master
  - use reset_phy funtion as on mgcoge3un
changes for v2:
  - rename 128M16-1.cfg to kwbimage_128M16_1.cfg

 MAINTAINERS|1 +
 board/keymile/km_arm/km_arm.c  |7 +-
 board/keymile/km_arm/kwbimage_128M16_1.cfg |  296 
 boards.cfg |1 +
 include/configs/km/km_arm.h|   44 -
 include/configs/km_kirkwood.h  |   67 ++-
 6 files changed, 393 insertions(+), 23 deletions(-)
 create mode 100644 board/keymile/km_arm/kwbimage_128M16_1.cfg

diff --git a/MAINTAINERS b/MAINTAINERS
index ce9fc9d..864a827 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -740,6 +740,7 @@ Sergey Lapin 
 Valentin Longchamp 
 
km_kirkwood ARM926EJS (Kirkwood SoC)
+   kmnusa  ARM926EJS (Kirkwood SoC)
mgcoge3un   ARM926EJS (Kirkwood SoC)
portl2  ARM926EJS (Kirkwood SoC)
 
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index cb3402b..e77c5ad 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -134,10 +134,11 @@ int startup_allowed(void)
 }
 #endif
 
-#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2))
+#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2)| \
+   defined(CONFIG_KM_PIGGY4_88E6352))
 /*
- * These two boards have always ethernet present. Its connected to the mv
- * switch.
+ * All boards with PIGGY4 connected via a simple switch have ethernet always
+ * present.
  */
 int ethernet_present(void)
 {
diff --git a/board/keymile/km_arm/kwbimage_128M16_1.cfg 
b/board/keymile/km_arm/kwbimage_128M16_1.cfg
new file mode 100644
index 000..3e1237b
--- /dev/null
+++ b/board/keymile/km_arm/kwbimage_128M16_1.cfg
@@ -0,0 +1,296 @@
+#
+# (C) Copyright 2012
+# Stefan Bigler, Keymile AG, stefan.big...@keymile.com
+# Norbert Mayer, Keymile AG, norbert.ma...@keymile.com
+# Deepak Patel, XENTECH Limited, deepak.pa...@xentech.co.uk
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+# This configuration applies to COGE5 design (ARM-part)
+# Two 8-Bit devices are connected on the 16-Bit bus on the same
+# chip-select. The supported devices are
+#   MT47H256M8EB-3IT:C
+#   MT47H256M8EB-25EIT:C
+
+# Boot Media configurations
+BOOT_FROM  spi # Boot from SPI flash
+
+DATA 0xFFD1 0x0111 # MPP Control 0 Register
+# bit 3-0:   2, MPPSel0  SPI_CSn  (1=NF_IO[2])
+# bit 7-4:   2, MPPSel1  SPI_MOSI (1=NF_IO[3])
+# bit 12-8:  2, MPPSel2  SPI_SCK  (1=NF_IO[4])
+# bit 15-12: 2, MPPSel3  SPI_MISO (1=NF_IO[5])
+# bit 19-16: 1, MPPSel4  NF_IO[6]
+# bit 23-20: 1, MPPSel5  NF_IO[7]
+# bit 27-24: 1, MPPSel6  SYSRST_O
+# bit 31-28: 0, MPPSel7  GPO[7]
+
+DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
+# bit 3-0:   0, MPPSel8 GPIO[8] CPU_SDA bitbanged
+# bit 7-4:   0, MPPSel9  GPIO[9] CPU_SCL bitbanged
+# bit 12-8:  3, MPPSel10 UA0_TXD
+# bit 15-12: 3, MPPSel11 UA0_RXD
+# bit 19-16: 0, MPPSel12 not connected
+# bit 23-20: 3, MPPSel13 GPIO[14]
+# bit 27-24: 3, MPPSel14 GPIO[15]
+# bit 31-28: 0, MPPSel15 GPIO[16] BOOT_FL_SEL (SPI-MUX Signal)
+
+DATA 0xFFD10008 0x1100 # MPP Control 2 Register
+# bit 3-0:   0, MPPSel16 GPIO[16]
+# bit 7-4:   0, MPPSel17 not connected
+# bit 11-8:  1, MPPSel18 NF_IO[0]
+# bit 15-12: 1, MPPSel19 NF_IO[1]
+# bit 19-16: 0, MPPSel20 GPIO[20]
+# bit 23-20: 0, MPPSel21 GPIO[21]
+# bit 27-24: 0, MPPSel22 GPIO[22]
+# bit 31-28: 0, MPPSel23 GPIO[23]
+
+# MPP Control 3-6 Register untouched (MPP24-49)
+
+DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register
+# bit 2-0:   3, Reserved
+# bit 5-3:   3, Reserved
+# bit 6: 0, Reserve

[U-Boot] [PATCH v3 09/11] arm/km: support the 2 PCIe fpga resets

[Holger Brunck]

From: Valentin Longchamp 

The PCIe FPGAs now have to support 2 resets: one for the non traffic
affecting part (PCIe) and one for the traffic affecting part.

When the FPGA is not reconfigured, we only reset the PCIe part.

Signed-off-by: Valentin Longchamp 
---
changes for v2 and v3: simply rebased

 board/keymile/km_arm/fpga_config.c |   13 +
 1 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/board/keymile/km_arm/fpga_config.c 
b/board/keymile/km_arm/fpga_config.c
index 8ac6393..fcc5fe6 100644
--- a/board/keymile/km_arm/fpga_config.c
+++ b/board/keymile/km_arm/fpga_config.c
@@ -99,7 +99,7 @@ static int boco_set_bits(u8 reg, u8 flags)
 #define FPGA_INIT_B0x10
 #define FPGA_DONE  0x20
 
-static int fpga_done()
+static int fpga_done(void)
 {
int ret = 0;
u8 regval;
@@ -206,25 +206,30 @@ int wait_for_fpga_config(void)
 }
 
 #define PRST1  0x4
-#define BRIDGE_RST 0x4
+#define PCIE_RST   0x10
+#define TRAFFIC_RST0x04
 
 int fpga_reset(void)
 {
int ret = 0;
+   u8 resets;
 
if (!check_boco2()) {
/* we do not have BOCO2, this is not really used */
return 0;
}
 
-   ret = boco_clear_bits(PRST1, BRIDGE_RST);
+   /* if we have skipped, we only want to reset the PCIe part */
+   resets = skip ? PCIE_RST : PCIE_RST | TRAFFIC_RST;
+
+   ret = boco_clear_bits(PRST1, resets);
if (ret)
return ret;
 
/* small delay for the pulse */
udelay(10);
 
-   ret = boco_set_bits(PRST1, BRIDGE_RST);
+   ret = boco_set_bits(PRST1, resets);
if (ret)
return ret;
 
-- 
1.7.1

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[U-Boot] [PATCH v3 06/11] arm/km: cleanup km_kirkwood boards

[Holger Brunck]

Remove config options from boards.cfg and simply add one switch
per board and differ afterwards in km_kirkwood.h between the features.
More boards are upcoming and therefore it's easier to have this
at one place.

Signed-off-by: Holger Brunck 
Signed-off-by: Valentin Longchamp 
cc: Gerlando Falauto 
cc: Prafulla Wadaskar 
---
changes for v2 and v3: simply rebased

 boards.cfg|4 ++--
 include/configs/km_kirkwood.h |7 ++-
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/boards.cfg b/boards.cfg
index 26c0a99..a864ac5 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -140,8 +140,8 @@ pogo_e02 arm arm926ejs   -  
 clouden
 dns325   arm arm926ejs   -   
d-link kirkwood
 lschlv2  arm arm926ejs   lsxl
buffalokirkwoodlsxl:LSCHLV2
 lsxhlarm arm926ejs   lsxl
buffalokirkwoodlsxl:LSXHL
-km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD,KM_DISABLE_PCI
-km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_PCI,KM_FPGA_CONFIG
+km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD
+km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_PCI
 kmnusa   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_NUSA
 mgcoge3unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_MGCOGE3UN
 kmcoge5unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_COGE5UN
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index 0a61b7d..a95c665 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -37,15 +37,20 @@
 #ifndef _CONFIG_KM_KIRKWOOD_H
 #define _CONFIG_KM_KIRKWOOD_H
 
+/* KM_KIRKWOOD */
 #if defined(CONFIG_KM_KIRKWOOD)
 #define CONFIG_IDENT_STRING"\nKeymile Kirkwood"
 #define CONFIG_HOSTNAMEkm_kirkwood
-#undef  CONFIG_KIRKWOOD_PCIE_INIT
+#define CONFIG_KM_DISABLE_PCIE
 #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
+
+/* KM_KIRKWOOD_PCI */
 #elif defined(CONFIG_KM_KIRKWOOD_PCI)
 #define CONFIG_IDENT_STRING"\nKeymile Kirkwood PCI"
 #define CONFIG_HOSTNAMEkm_kirkwood_pci
 #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
+#define CONFIG_KM_FPGA_CONFIG
+
 /* KM_NUSA */
 #elif defined(CONFIG_KM_NUSA)
 #define KM_IVM_BUS "pca9547:70:9"  /* I2C2 (Mux-Port 1)*/
-- 
1.7.1

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[U-Boot] [PATCH v3 05/11] arm/km: enable BOCO2 FPGA download support

[Holger Brunck]

From: Valentin Longchamp 

This adds a first support of the FPGA download for a PCIe FPGA based
on the BOCO2 CPLD.

This takes place in 3 steps, all done accessing the SPICTRL reg of the
BOCO2:
1) start the FPGA config with an access to the FPGA_PROG bit
2) later in the boot sequence, wait for the FPGA_DONE bit to toggle to 1
   for the end of the FPGA configuration (with a timeout)
3) reset the FPGA
4) finally remove the access to its config EEPROM from the FPGA so that
   the CPU can update the FPGA configuration when the kernel is running

The boards with a PCIe FPGA but without BOCO2 still are supported.

The config option name is CONFIG_KM_FPGA_CONFIG

Signed-off-by: Valentin Longchamp 
Signed-off-by: Holger Brunck 
cc: Gerlando Falauto 
cc: Prafulla Wadaskar 
---
changes for v2 and v3: simply rebased

 board/keymile/common/common.h  |5 +
 board/keymile/km_arm/Makefile  |4 +
 board/keymile/km_arm/fpga_config.c |  212 
 board/keymile/km_arm/km_arm.c  |   21 +++-
 boards.cfg |2 +-
 include/configs/km/km_arm.h|3 +
 include/configs/km_kirkwood.h  |8 +-
 7 files changed, 245 insertions(+), 10 deletions(-)
 create mode 100644 board/keymile/km_arm/fpga_config.c

diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h
index f457aa3..aab706e 100644
--- a/board/keymile/common/common.h
+++ b/board/keymile/common/common.h
@@ -131,6 +131,11 @@ struct bfticu_iomap {
 int ethernet_present(void);
 int ivm_read_eeprom(void);
 
+int trigger_fpga_config(void);
+int wait_for_fpga_config(void);
+int fpga_reset(void);
+int toggle_eeprom_spi_bus(void);
+
 int set_km_env(void);
 int fdt_set_node_and_value(void *blob,
char *nodename,
diff --git a/board/keymile/km_arm/Makefile b/board/keymile/km_arm/Makefile
index aa51255..13d485a 100644
--- a/board/keymile/km_arm/Makefile
+++ b/board/keymile/km_arm/Makefile
@@ -31,6 +31,10 @@ LIB  = $(obj)lib$(BOARD).o
 
 COBJS  := $(BOARD).o ../common/common.o ../common/ivm.o
 
+ifdef CONFIG_KM_FPGA_CONFIG
+COBJS  += fpga_config.o
+endif
+
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
 SOBJS  := $(addprefix $(obj),$(SOBJS))
diff --git a/board/keymile/km_arm/fpga_config.c 
b/board/keymile/km_arm/fpga_config.c
new file mode 100644
index 000..4356b9a
--- /dev/null
+++ b/board/keymile/km_arm/fpga_config.c
@@ -0,0 +1,212 @@
+/*
+ * (C) Copyright 2012
+ * Valentin Lontgchamp, Keymile AG, valentin.longch...@keymile.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include 
+#include 
+#include 
+
+/* GPIO Pin from kirkwood connected to PROGRAM_B pin of the xilinx FPGA */
+#define KM_XLX_PROGRAM_B_PIN39
+
+#define BOCO_ADDR  0x10
+
+#define ID_REG 0x00
+#define BOCO2_ID   0x5b
+
+static int check_boco2(void)
+{
+   int ret;
+   u8 id;
+
+   ret = i2c_read(BOCO_ADDR, ID_REG, 1, &id, 1);
+   if (ret) {
+   printf("%s: error reading the BOCO id !!\n", __func__);
+   return ret;
+   }
+
+   return (id == BOCO2_ID);
+}
+
+static int boco_clear_bits(u8 reg, u8 flags)
+{
+   int ret;
+   u8 regval;
+
+   /* give access to the EEPROM from FPGA */
+   ret = i2c_read(BOCO_ADDR, reg, 1, ®val, 1);
+   if (ret) {
+   printf("%s: error reading the BOCO @%#x !!\n",
+   __func__, reg);
+   return ret;
+   }
+   regval &= ~flags;
+   ret = i2c_write(BOCO_ADDR, reg, 1, ®val, 1);
+   if (ret) {
+   printf("%s: error writing the BOCO @%#x !!\n",
+   __func__, reg);
+   return ret;
+   }
+
+   return 0;
+}
+
+static int boco_set_bits(u8 reg, u8 flags)
+{
+   int ret;
+   u8 regval;
+
+   /* give access to the EEPROM from FPGA */
+   ret = i2c_read(BOCO_ADDR, reg, 1, ®val, 1);
+   if (ret) {
+   printf("%s: error reading the BOCO @%#x !!\n",
+   __func__, reg);
+   return ret;
+   }
+   regval |= flags;
+   ret = i2c_write(BOCO_ADDR, reg, 1, ®val, 1);
+   if (ret) {
+   printf("%

[U-Boot] [PATCH v3 10/11] arm/km: add implementation for read_dip_switch

[Holger Brunck]

From: Thomas Herzmann 

Add a function to read the dip_switch on kmcoge5un. If the
switch is set the actual_bank is set to 0 and this SW is
booted.

Signed-off-by: Thomas Herzmann 
Signed-off-by: Holger Brunck 
---
changes for v2 and v3: rebased

 board/keymile/km_arm/km_arm.c |   14 +-
 include/configs/km_kirkwood.h |3 ---
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 50c95c6..eb691f9 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -285,12 +285,24 @@ int board_init(void)
 
 int board_late_init(void)
 {
+#if defined(CONFIG_KMCOGE5UN)
+/* I/O pin to erase flash RGPP09 = MPP43 */
+#define KM_FLASH_ERASE_ENABLE  43
+   u8 dip_switch = kw_gpio_get_value(KM_FLASH_ERASE_ENABLE);
+
+   /* if pin 1 do full erase */
+   if (dip_switch != 0) {
+   /* start bootloader */
+   puts("DIP:   Enabled\n");
+   setenv("actual_bank", "0");
+   }
+#endif
+
 #if defined(CONFIG_KM_FPGA_CONFIG)
wait_for_fpga_config();
fpga_reset();
toggle_eeprom_spi_bus();
 #endif
-
return 0;
 }
 
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index a95c665..fba181f 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -171,8 +171,5 @@
 #undef  CONFIG_KIRKWOOD_PCIE_INIT
 #endif
 
-#ifndef CONFIG_KM_FPGA_CONFIG
-#undef  BOARD_LATE_INIT
-#endif
 
 #endif /* _CONFIG_KM_KIRKWOOD */
-- 
1.7.1

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[U-Boot] [PATCH v3 04/11] arm/km: remove portl2.h and use km_kirkwood instead

[Holger Brunck]

The additional headerfile is unneeded here, we can use the generic
km_kirkwood.h instead. And we can use the better config option
KM_PIGGY4_88E6061 for the specific features for boards with this
design in km_arm.c.


Signed-off-by: Holger Brunck 
Signed-off-by: Valentin Longchamp 
cc: Gerlando Falauto 
cc: Prafulla Wadaskar 
---
changes for v2 and v3: simply rebased

 board/keymile/km_arm/km_arm.c |2 +-
 boards.cfg|2 +-
 include/configs/km_kirkwood.h |8 
 include/configs/portl2.h  |   85 -
 4 files changed, 10 insertions(+), 87 deletions(-)
 delete mode 100644 include/configs/portl2.h

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index c88292f..835b72d 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -317,7 +317,7 @@ void dram_init_banksize(void)
}
 }
 
-#if (defined(CONFIG_KM_MGCOGE3UN)|defined(CONFIG_PORTL2))
+#if (defined(CONFIG_KM_PIGGY4_88E6061))
 
 #definePHY_LED_SEL 0x18
 #define PHY_LED0_LINK  (0x5)
diff --git a/boards.cfg b/boards.cfg
index 003c2af..db7902f 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -145,7 +145,7 @@ km_kirkwood_pci  arm arm926ejs   km_arm 
 keymile
 kmnusa   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_NUSA
 mgcoge3unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_MGCOGE3UN
 kmcoge5unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_COGE5UN
-portl2   arm arm926ejs   km_arm  
keymilekirkwood
+portl2   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_PORTL2
 inetspace_v2 arm arm926ejs   netspace_v2 LaCie 
 kirkwood   lacie_kw:INETSPACE_V2
 net2big_v2   arm arm926ejs   net2big_v2  LaCie 
 kirkwood   lacie_kw:NET2BIG_V2
 netspace_max_v2  arm arm926ejs   netspace_v2 LaCie 
 kirkwood   lacie_kw:NETSPACE_MAX_V2
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index f5b9d27..44a3e7a 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -83,6 +83,14 @@
 #define CONFIG_HOSTNAMEkmcoge5un
 #define CONFIG_KM_DISABLE_PCIE
 #define CONFIG_KM_PIGGY4_88E6352
+
+/* KM_PORTL2 */
+#elif defined(CONFIG_KM_PORTL2)
+#define CONFIG_IDENT_STRING"\nKeymile Port-L2"
+#define CONFIG_HOSTNAMEportl2
+#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
+#define CONFIG_KM_PIGGY4_88E6061
+
 #else
 #error ("Board unsupported")
 #endif
diff --git a/include/configs/portl2.h b/include/configs/portl2.h
deleted file mode 100644
index e436cfe..000
--- a/include/configs/portl2.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2009
- * Marvell Semiconductor 
- * Prafulla Wadaskar 
- *
- * (C) Copyright 2009
- * Stefan Roese, DENX Software Engineering, s...@denx.de.
- *
- * (C) Copyright 2010-2011
- * Holger Brunck, Keymile GmbH Hannover, holger.bru...@keymile.com.
- * Valentin Longchamp, Keymile AG Bern, valentin.longch...@keymile.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/* for linking errors see
- * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
-
-#ifndef _CONFIG_PORTL2_H
-#define _CONFIG_PORTL2_H
-
-/* include common defines/options for all arm based Keymile boards */
-#include "km/km_arm.h"
-
-/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING"\nKeymile Port-L2"
-#define CONFIG_HOSTNAMEportl2
-#define CONFIG_PORTL2
-
-#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
-/*
- * Note: This is only valid for HW > P1A if you got an outdated P1A
- *   use KM_ENV_BUS  "pca9544a:70:a"
- */
-#define KM_ENV_BUS "pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
-
-/*
- * portl2 has a fixed link to the XMPP backplane
- * with 100MB full du

[U-Boot] [PATCH v3 03/11] arm/km: convert mgcoge3un target to km_kirkwood

[Holger Brunck]

Use the generic header km_kirkwood.h and get rid of the
board specific header.

changes for v2: rebased because of changes in other patches

Signed-off-by: Holger Brunck 
Signed-off-by: Valentin Longchamp 
cc: Gerlando Falauto 
cc: Prafulla Wadaskar 
---
changes for v2 and v3: rebased because of changes in other patches

 board/keymile/km_arm/km_arm.c |9 ++--
 boards.cfg|2 +-
 include/configs/km_kirkwood.h |   46 +
 include/configs/mgcoge3un.h   |   87 -
 4 files changed, 51 insertions(+), 93 deletions(-)
 delete mode 100644 include/configs/mgcoge3un.h

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 498bc36..c88292f 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -114,7 +114,7 @@ u32 kwmpp_config[] = {
0
 };
 
-#if defined(CONFIG_MGCOGE3UN)
+#if defined(CONFIG_KM_MGCOGE3UN)
 /*
  * Wait for startup OK from mgcoge3ne
  */
@@ -134,8 +134,7 @@ int startup_allowed(void)
 }
 #endif
 
-#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2)| \
-   defined(CONFIG_KM_PIGGY4_88E6352))
+#if (defined(CONFIG_KM_PIGGY4_88E6061)|defined(CONFIG_KM_PIGGY4_88E6352))
 /*
  * All boards with PIGGY4 connected via a simple switch have ethernet always
  * present.
@@ -203,7 +202,7 @@ int misc_init_r(void)
printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
gd->bd->bi_arch_number = mach_type;
}
-#if defined(CONFIG_MGCOGE3UN)
+#if defined(CONFIG_KM_MGCOGE3UN)
char *wait_for_ne;
wait_for_ne = getenv("waitforne");
if (wait_for_ne != NULL) {
@@ -318,7 +317,7 @@ void dram_init_banksize(void)
}
 }
 
-#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2))
+#if (defined(CONFIG_KM_MGCOGE3UN)|defined(CONFIG_PORTL2))
 
 #definePHY_LED_SEL 0x18
 #define PHY_LED0_LINK  (0x5)
diff --git a/boards.cfg b/boards.cfg
index 808f85b..003c2af 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -143,7 +143,7 @@ lsxhlarm arm926ejs   lsxl   
 buffalo
 km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD,KM_DISABLE_PCI
 km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_PCI,KM_RECONFIG_XLX
 kmnusa   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_NUSA
-mgcoge3unarm arm926ejs   km_arm  
keymilekirkwood
+mgcoge3unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_MGCOGE3UN
 kmcoge5unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_COGE5UN
 portl2   arm arm926ejs   km_arm  
keymilekirkwood
 inetspace_v2 arm arm926ejs   netspace_v2 LaCie 
 kirkwood   lacie_kw:INETSPACE_V2
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index d839a02..f5b9d27 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -58,6 +58,20 @@
 #define CONFIG_KM_FPGA_CONFIG
 #define CONFIG_KM_PIGGY4_88E6352
 
+/* KM_MGCOGE3UN */
+#elif defined(CONFIG_KM_MGCOGE3UN)
+#define CONFIG_IDENT_STRING"\nKeymile COGE3UN"
+#define CONFIG_HOSTNAMEmgcoge3un
+#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
+#undef CONFIG_SYS_KWD_CONFIG
+#define CONFIG_SYS_KWD_CONFIG \
+   $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
+#define CONFIG_KM_BOARD_EXTRA_ENV  "waitforne=true\0"
+#define CONFIG_PIGGY_MAC_ADRESS_OFFSET  3
+#define CONFIG_KM_DISABLE_PCIE
+#define CONFIG_KM_PIGGY4_88E6061
+
+/* KMCOGE5UN */
 #elif defined(CONFIG_KM_COGE5UN)
 #define CONFIG_IDENT_STRING"\nKeymile COGE5UN"
 #define KM_IVM_BUS "pca9547:70:9"  /* I2C2 (Mux-Port 1)*/
@@ -111,7 +125,39 @@
 
 #endif
 
+#ifdef CONFIG_KM_PIGGY4_88E6061
+/*
+ * Some keymile boards like mgcoge3un have their PIGGY4 connected via
+ * an Marvell 88E6061 simple switch.
+ * In this case we have to change the default settings for the
+ * ethernet phy connected to the kirkwood.
+ * In this case 100MB full duplex and autoneg off
+ */
+#define PORT_SERIAL_CONTROL_VALUE  ( \
+   MVGBE_FORCE_LINK_PASS   | \
+   MVGBE_DIS_AUTO_NEG_FOR_DUPLX| \
+   MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL| \
+   MVGBE_ADV_NO_FLOW_CTRL  | \
+   MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
+   MVGBE_FORCE_BP_MODE_NO_JAM  | \
+   (1 << 9) /* Reserved bit has to be 1 */ | \
+   MVGBE_DO_NOT_FORCE_LINK_FAIL| \
+   MVGBE_DIS_AUTO_NEG_SPEED_GMII   | \
+   MVGBE_DTE_A

[U-Boot] [PATCH v3 07/11] arm/km: redefine piggy 4 reg names to avoid conflicts

[Holger Brunck]

From: Valentin Longchamp 

Some very similar #defines for reg addresses are used in a later patch
(managed_switch support for km_arm).

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Prafulla Wadaskar 
---
changes for v2 and v3: simply rebased

 board/keymile/km_arm/km_arm.c |   22 +++---
 1 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index e348697..50c95c6 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -328,13 +328,13 @@ void dram_init_banksize(void)
 
 #if (defined(CONFIG_KM_PIGGY4_88E6061))
 
-#definePHY_LED_SEL 0x18
-#define PHY_LED0_LINK  (0x5)
-#define PHY_LED1_ACT   (0x8<<4)
-#define PHY_LED2_INT   (0xe<<8)
-#definePHY_SPEC_CTRL   0x1c
+#definePHY_LED_SEL_REG 0x18
+#define PHY_LED0_LINK  (0x5)
+#define PHY_LED1_ACT   (0x8<<4)
+#define PHY_LED2_INT   (0xe<<8)
+#definePHY_SPEC_CTRL_REG   0x1c
 #define PHY_RGMII_CLK_STABLE   (0x1<<10)
-#define PHY_CLSA   (0x1<<1)
+#define PHY_CLSA   (0x1<<1)
 
 /* Configure and enable MV88E3018 PHY */
 void reset_phy(void)
@@ -346,15 +346,15 @@ void reset_phy(void)
return;
 
/* RGMII clk transition on data stable */
-   if (miiphy_read(name, CONFIG_PHY_BASE_ADR, PHY_SPEC_CTRL, ®) != 0)
+   if (!miiphy_read(name, CONFIG_PHY_BASE_ADR, PHY_SPEC_CTRL_REG, ®))
printf("Error reading PHY spec ctrl reg\n");
-   if (miiphy_write(name, CONFIG_PHY_BASE_ADR, PHY_SPEC_CTRL,
-   reg | PHY_RGMII_CLK_STABLE | PHY_CLSA) != 0)
+   if (!miiphy_write(name, CONFIG_PHY_BASE_ADR, PHY_SPEC_CTRL_REG,
+   reg | PHY_RGMII_CLK_STABLE | PHY_CLSA))
printf("Error writing PHY spec ctrl reg\n");
 
/* leds setup */
-   if (miiphy_write(name, CONFIG_PHY_BASE_ADR, PHY_LED_SEL,
-   PHY_LED0_LINK | PHY_LED1_ACT | PHY_LED2_INT) != 0)
+   if (!miiphy_write(name, CONFIG_PHY_BASE_ADR, PHY_LED_SEL_REG,
+   PHY_LED0_LINK | PHY_LED1_ACT | PHY_LED2_INT))
printf("Error writing PHY LED reg\n");
 
/* reset the phy */
-- 
1.7.1

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Re: [U-Boot] [PATCH v2] arm: cm4008, cm41xx: use common cfi_flash support

[Andreas Bießmann]

Dear Yann Vernier,

a simple small change request.

On 05.07.2012 15:11, Yann Vernier wrote:
> This change allows use of other flash chips than the two supported by
> the cm4008 flash.c. Tested with Micrel KSZ8695X demo board.
> ---
> Changes for v2:
>- Update cm41xx also
>- Remove unused board specific flash code
> 
> Signed-off-by: Yann Vernier 
> ---
>  board/cm4008/Makefile|2 +-
>  board/cm4008/flash.c |  410 
> --
>  board/cm41xx/Makefile|2 +-
>  board/cm41xx/flash.c |  410 
> --
>  include/configs/cm4008.h |4 +
>  include/configs/cm41xx.h |4 +
>  6 files changed, 10 insertions(+), 822 deletions(-)
>  delete mode 100644 board/cm4008/flash.c
>  delete mode 100644 board/cm41xx/flash.c
> 



> diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h
> index 58b0f4b..18b37d7 100644
> --- a/include/configs/cm4008.h
> +++ b/include/configs/cm4008.h
> @@ -119,6 +119,10 @@
>  #define PHYS_FLASH_SECT_SIZE0x0002 /* 128 KB sectors (x1) */
>  #define CONFIG_SYS_FLASH_BASEPHYS_FLASH_1
>  
> +#define CONFIG_SYS_FLASH_CFI
> +#define CONFIG_FLASH_CFI_DRIVER  1

Do not define to 1 where it is not required, just define.

> +#define CONFIG_SYS_FLASH_CFI_WIDTH   FLASH_CFI_8BIT
> +
>  /*---
>   * FLASH and environment organization
>   */
> diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h
> index d29040c..3f46b12 100644
> --- a/include/configs/cm41xx.h
> +++ b/include/configs/cm41xx.h
> @@ -119,6 +119,10 @@
>  #define PHYS_FLASH_SECT_SIZE0x0002 /* 128 KB sectors (x1) */
>  #define CONFIG_SYS_FLASH_BASEPHYS_FLASH_1
>  
> +#define CONFIG_SYS_FLASH_CFI
> +#define CONFIG_FLASH_CFI_DRIVER  1

same here

> +#define CONFIG_SYS_FLASH_CFI_WIDTH   FLASH_CFI_8BIT
> +
>  /*---
>   * FLASH and environment organization
>   */
> 

Best regards

Andreas Bießmann
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Re: [U-Boot] [PATCH v2] arm: cm4008, cm41xx: set gd->ram_size in dram_init

[Andreas Bießmann]

On 05.07.2012 14:11, Yann Vernier wrote:
> Leave dram_init_banksize to set up the bank info data.
> ram_size was previously uninitialized. Also, generalize
> lowlevel assembly to support more RAM options.
> 
> Signed-off-by: Yann Vernier 
> ---
> Changes for v2:
>- Update to use CONFIG_SYS_SDRAM_ constants
>- Update cm41xx also
>- Map SDRAM to match configuration
> ---
>  arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |8 +++-
>  board/cm4008/cm4008.c   |5 +++--
>  board/cm41xx/cm41xx.c   |5 +++--
>  include/configs/cm4008.h|5 ++---
>  include/configs/cm41xx.h|5 ++---
>  5 files changed, 13 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S 
> b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> index e9f1227..df13de6 100644
> --- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> +++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> @@ -131,11 +131,9 @@ highflash:
>* before relocating, we have to setup RAM timing
>*/
>   ldr r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL0)
> -#if (PHYS_SDRAM_1_SIZE == 0x0200)
> - ldr r2, =0x7fce /* 32MB */
> -#else
> - ldr r2, =0x3fce /* 16MB */
> -#endif
> + /* 8 column address bits, 4 banks, 32 bits data width */
> + ldr r2, 
> =((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE-0x1)<<(22-16) | \
> +   (CONFIG_SYS_SDRAM_BASE>>(16-12) | 0x00e))

ugh ... magic. Will it work for every possible setting?
How about one setting CONFIG_SYS_SDRAM_BASE != 0x0? I the base address
related to register content in any way?

Would be great to have a little documentation here why it is shifted
that way, unfortunately I can not find a KS8695 spec in the net. Don't
get me wrong it is ok to do so. I think it is way better than hard
coding the values like before but would be great to understand why it is
done that way.

Best regards

Andreas Bießmann
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[U-Boot] [PATCH] armv7: Fix to mistake clean the memory space

[Zhong Hongbo]

From: Zhong Hongbo 

In currently, when __bss_start is equal to __bss_end__,
The bss loop will clear all the things in memory space.

But just only when __bss_end__ greater than __bss_start__,
we do the clear bss section operation.

Signed-off-by: Hongbo Zhong 
---
 arch/arm/cpu/armv7/start.S |9 ++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 22a3ced..2e583ee 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -259,10 +259,13 @@ clear_bss:
 #endif
mov r2, #0x /* clear*/
 
-clbss_l:strr2, [r0]/* clear loop...*/
+clbss_l:
+   cmp r1, r0
+   bls clbss_end
+   str r2, [r0]/* clear loop...*/
add r0, r0, #4
-   cmp r0, r1
-   bne clbss_l
+   b   clbss_l
+clbss_end:
 
 /*
  * We are done. Do not return, instead branch to second part of board
-- 
1.7.5.4

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[U-Boot] [PATCH 1/2] kirkwood: implement kw_sdram_bs_set()

[Gerlando Falauto]

Some boards might be equipped with different SDRAM configurations.
When that is the case, CPU CS Window Size Register (CS[0]n Size) should
be set to the biggest value through board.cfg file; then its value
can be fixed at runtime according to the detected SDRAM size.

Therefore, implement kw_sdram_bs_set(), to be called for instance within
board_early_init_f().

Signed-off-by: Gerlando Falauto 
Cc: Marek Vasut 
Cc: Prafulla Wadaskar 
Cc: Wolfgang Denk 
Cc: Valentin Longchamp 
Cc: Holger Brunck 
---
 arch/arm/cpu/arm926ejs/kirkwood/dram.c   |   23 +++
 arch/arm/include/asm/arch-kirkwood/cpu.h |2 ++
 2 files changed, 25 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c 
b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
index 181b3e7..d938578 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
@@ -32,6 +32,12 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define KW_REG_CPUCS_WIN_BAR(x)(KW_REGISTER(0x1500) + (x * 
0x08))
 #define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08))
+
+#define KW_REG_CPUCS_WIN_ENABLE(1 << 0)
+#define KW_REG_CPUCS_WIN_WR_PROTECT(1 << 1)
+#define KW_REG_CPUCS_WIN_WIN0_CS(x)(((x) & 0x3) << 2)
+#define KW_REG_CPUCS_WIN_SIZE(x)   (((x) & 0xff) << 24)
+
 /*
  * kw_sdram_bar - reads SDRAM Base Address Register
  */
@@ -62,6 +68,23 @@ u32 kw_sdram_bs(enum memory_bank bank)
return result;
 }
 
+/*
+ * kw_sdram_bs_set - writes SDRAM Bank size
+ */
+void kw_sdram_bs_set(enum memory_bank bank, u32 size)
+{
+   /* Read current register value */
+   u32 reg = readl(KW_REG_CPUCS_WIN_SZ(bank));
+
+   /* Clear window size */
+   reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF);
+
+   /* Set new window size */
+   reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24);
+
+   writel(reg, KW_REG_CPUCS_WIN_SZ(bank));
+}
+
 #ifndef CONFIG_SYS_BOARD_DRAM_INIT
 int dram_init(void)
 {
diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h 
b/arch/arm/include/asm/arch-kirkwood/cpu.h
index d28c51a..807154e 100644
--- a/arch/arm/include/asm/arch-kirkwood/cpu.h
+++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
@@ -159,6 +159,8 @@ void reset_cpu(unsigned long ignored);
 unsigned char get_random_hex(void);
 unsigned int kw_sdram_bar(enum memory_bank bank);
 unsigned int kw_sdram_bs(enum memory_bank bank);
+void kw_sdram_bs_set(enum memory_bank bank, u32 size);
+
 int kw_config_adr_windows(void);
 void kw_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
unsigned int gpp0_oe, unsigned int gpp1_oe);
-- 
1.7.1

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[U-Boot] [PATCH 2/2] km_arm: enable SDRAM window size fixup

[Gerlando Falauto]

Size of the SDRAM chips might differ between any two (otherwise
identical) instances of the same board.

So change board_early_init_f() to use km_sdram_bs_set(), in order to
fixup the window size register at runtime, according to the detected
SDRAM size.

Signed-off-by: Gerlando Falauto 
Cc: Valentin Longchamp 
Cc: Holger Brunck 
---
 board/keymile/km_arm/km_arm.c |   12 
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index cb3402b..d531c08 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -241,10 +241,22 @@ int misc_init_r(void)
return 0;
 }
 
+static void dram_size_fixup(void)
+{
+   u32 size;
+
+   /* probe currently equipped RAM size */
+   size = get_ram_size((void *)kw_sdram_bar(0), kw_sdram_bs(0));
+
+   /* fixup SDRAM window size accordingly */
+   kw_sdram_bs_set(0, size);
+}
+
 int board_early_init_f(void)
 {
u32 tmp;
 
+   dram_size_fixup();
kirkwood_mpp_conf(kwmpp_config, NULL);
 
/*
-- 
1.7.1

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[U-Boot] Building U-Boot image with predefined environment

[trh178]

I am taking over a project originally done by somebody else and not
documented at all. I am not very familiar with U-Boot in general, so I am
effectively starting from scratch.

My current issue is this: I have a U-Boot image that I can load onto my
board that, upon start, says it is autobooting and then immediately prompts
the user for 'ethaddr'. After you give it an ethaddr, it will get an IP via
dhcp and, using tftp, get the rest of the environment/kernel/filesystem from
a local server. I cannot use this image anymore though. I had to make a
slight change to the config file for U-Boot.

I have successfully rebuilt U-boot and flashed it onto the board. When it
boots now though, it says it will autoboot in 3 seconds (instead of 1
previously), and then it fails autoboot because of a bad magic number and
drops me into the UBoot> prompt. It does not prompt me for an 'ethaddr'.
This leads me to believe that the previous image was built with a very basic
predefined environment (e.g. 'do this if you dont have an ethaddr set, or
else if you do then get an ip via dhcp, etc...). I know that after I get an
IP address the board uses tftp to load the full environment because, along
with a kernel.img and a filesystem.img, there is also a bootscript.img on
the tftp server.

My lack of knowledge led me to only one solution. The first image that works
right now must have been built with a basic environment script included? Is
this possible? and if so, how do I do this? It seems like if I can get my
NEW image to act as the old one on startup, then once it HAS an ip address,
the full environment can be loaded via tftp like before.

Thanks ahead of time for the help,
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Re: [U-Boot] [PATCH v2 03/14] arm/km: convert mgcoge3un target to km_kirkwood

[Prafulla Wadaskar]

> -Original Message-
> From: Holger Brunck [mailto:holger.bru...@keymile.com]
> Sent: 05 July 2012 19:14
> To: Prafulla Wadaskar
> Cc: Wolfgang Denk; u-boot@lists.denx.de; Valentin Longchamp
> Subject: Re: [U-Boot] [PATCH v2 03/14] arm/km: convert mgcoge3un
> target to km_kirkwood
> 
> On 07/05/2012 02:09 PM, Prafulla Wadaskar wrote:
> >>>
> >>> To avoid any further confusion let's keep aside all the past.
> >>> 1. Pls post the new patch series that is just targeted for
> bugfixes
> >> and updates (no addition of new boards or drivers)
> >>
> >> Ok so there are again no inputs to specific patches and no change
> >> request for a
> >> specific patch (beside the input to the managed switch). What you
> do
> >> is to
> >> rephrase a requirement for patch series in general. So there seems
> to
> >> be a rule
> >> that if you a) add new boards and b) cleanup and maintain existing
> >> boards in the
> >> same patch serie the patches needs to be in a special order. Please
> >> show me the
> >> pointer in u-boot guidlines to this if there is one. I know that
> such
> >> tasks
> >> should be seperated  into different patches what this serie
> defenitely
> >> does. If
> >> not please discuss this as a new requirement with other custodians
> as
> >> Wolfgang
> >> suggested in the same thread. I don't think that such a requirement
> >> would be a
> >> benefit for board maintainers and custodians, because code
> maintaining
> >> and
> >> improvement is always a good thing. Your requirement in practice
> would
> >> mean,
> >> stop code maintaining for board series during the time you need to
> add
> >> new boards.
> >
> > Dear Holger,
> >
> > I think custodian should pull entire patch series if all the patches
> in the series are ACKED.
> > If any patch within patch series is NACKED, the patch series does
> not stand valid to pull.
> > Someone may correct me if I am wrong.
> >
> 
> yes of course this is a common rule. But what has this to do with my
> question above?
> 
> >>
> >>> 2. You may post anther patch series for addition of new boards
> which
> >> does not have any dependencies (if you have such)
> >>> 3. You may post a standalone patch for a switch driver, needed ack
> >> from Joe, that might go to u-boot-net.git
> >>
> >> Ok we can remove this very limited driver from the patch serie.
> >>
> >> So what we can do is providing a patch serie where the driver for
> this
> >> managed
> >> switch is not in. But as far as I understood this does not be in
> >> accordance what
> >> you requested?
> >
> > Ideally, the answer is same as above. There will be no issues if all
> patches in the patch series are ACKED.
> >
> 
> and whats the answer here on my question?
> 
> Again. You NAK the simple driver in our own board code. Ok. So the
> question here
> is if I remove the three patches which are concerning this driver.
> This are:
> [U-Boot,v2,05/14] arm/km: correct init of 88e6352 switch in the
> reset_phy function
> [U-Boot,v2,09/14] arm/km: add support for external switch
> configuration
> [U-Boot,v2,10/14] arm/km: enable external switch configuration for
> kmnusa
> 
> And if I resend the remaining eleven patches in the same order as
> beneath
> these are:
> [U-Boot,v2,01/14] arm/km: add kmnusa board support
> [U-Boot,v2,02/14] arm/km: add kmcoge5un board support
> [U-Boot,v2,03/14] arm/km: convert mgcoge3un target to km_kirkwood
> [U-Boot,v2,04/14] arm/km: remove portl2.h and use km_kirkwood instead
> [U-Boot,v2,06/14] arm/km: enable BOCO2 FPGA download support
> [U-Boot,v2,07/14] arm/km: cleanup km_kirkwood boards
> [U-Boot,v2,08/14] arm/km: redefine piggy 4 reg names to avoid
> conflicts
> [U-Boot,v2,11/14] arm/km: skip FPGA config when already configured
> [U-Boot,v2,12/14] arm/km: support the 2 PCIe fpga resets
> [U-Boot,v2,13/14] arm/km: add implementation for read_dip_switch
> [U-Boot,v2,14/14] arm/km: remove calls to kw_gpio_* in
> board_early_init_f
> 
> as another patch serie do you accept this?

YES.

> 
> We already have so many different patch series for this serie on
> patchwork that
> I want to be sure that I don't generate another one which will also be
> unacceptable. I think this is already reviewed. But if you have still
> other
> inputs then let me know and refer to the specific patch. Thanks.

I don't have any further inputs.

Regards..
Prafulla . . .
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