Re: [U-Boot] [PATCH v2 0/5] arm: rmobile: kzm9g: enable booting Linux kernel
Hi, Iwamatsu-san I found another bug and fixed it right now. I will add another patch in this patch series. I will post v3 soon. Please wait to apply v2. (2012/07/07 20:23), Tetsuyuki Kobayashi wrote: Hi, Iwamatsu-san I made v2 patch set for kzm9g. Please revert my previous 3 patches and apply this patch set. After this patch set, LTSI kernel can boot on KZM-A9-GT board. It seems stable as before. Tetsuyuki Kobayashi (5): arm: rmobile: kzm9g: Modify sdram area arm: rmobile: kzm9g: Adjust low level hardware setting arm: rmobile: kzm9g: change prompt to board specific arm: rmobile: kzm9g: Add dummy member to struct sh73a0_rwdt MAINTAINERS: Add Tetsuyuki Kobayshi for kzm9g MAINTAINERS|1 + arch/arm/include/asm/arch-rmobile/sh73a0.h |6 +- board/kmc/kzm9g/kzm9g.c|2 ++ include/configs/kzm9g.h|7 --- 4 files changed, 12 insertions(+), 4 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [STATUS] ARM - many build problems
On Mon, Jul 09, 2012 at 12:25:27AM +0200, Wolfgang Denk wrote: > Hi all, > > after merging the latest ARM pull request, a large number of boards is > broken: > > - SUMMARY > Boards compiled: 302 > Boards with errors: 6 ( harmony seaboard ventana whistler paz00 > trimslice ) > Boards with warnings but no errors: 49 ( ca9x4_ct_vxp am335x_evm > highbank efikamx efikasb mx51evk mx53ard mx53evk mx53loco mx53smd > ima3-mx53 vision2 mx6qarm2 mx6qsabrelite cm_t35 omap3_overo > omap3_pandora dig297 igep0020 igep0030 am3517_evm mt_ventoux > omap3_zoom1 omap3_zoom2 omap3_logic omap3_mvblx am3517_crane > omap3_beagle omap3_evm omap3_evm_quick_mmc omap3_evm_quick_nand > omap3_sdp3430 devkit8000 mcx tricorder twister omap4_panda > omap4_sdp4430 omap5_evm s5p_goni smdkc100 origen s5pc210_universal > smdk5250 smdkv310 trats u8500_href plutux medcom ) > -- > > The hard errors (harmony seaboard ventana whistler paz00 trimslice ) > all look like this - mind the "/bin/sh: line 1: exit: too many > arguments" error: > > > Configuring for harmony board... > make[1]: *** [/work/wd/tmp-arm/dts/dt.dtb] Error 1 > make: *** [/work/wd/tmp-arm/u-boot.dtb] Error 2 >textdata bss dec hex filename > 2251144264 278692 508070 7c0a6 /work/wd/tmp-arm/u-boot > cpu.c: In function 'save_boot_params_default': > cpu.c:48:1: warning: -fstack-usage not supported for this target > [enabled by default] > /bin/sh: line 1: exit: too many arguments > make[1]: *** [/work/wd/tmp-arm/dts/dt.dtb] Error 1 > make: *** [/work/wd/tmp-arm/u-boot.dtb] Error 2 > make: *** Waiting for unfinished jobs These have been fixed in tegra/master by the following commit: commit 329b71b234fd2dcc60a1369d411e4b55a8117df9 Author: Stephen Warren Date: Fri Jun 8 12:28:17 2012 + fdt: send all dtc output to stderr Commit 896bbb5 "fdt: avoid bad MAKEALL status" added logic to capture the result code from dtc by echoing $? to stdout and capturing it using $(). However, dtc emits some diagnostics to stderr and some to stdout. The diagnostics send to stdout ended up getting captured via $() rather than being echo'd to the user. This caused those diagnostics to be passed to the exit command, which would then fail with the following cryptic error message: /bin/sh: line 1: exit: too many arguments Solve this by redirecting all dtc output to stderr so that $() does not capture it. This allows the user to see the actual error message from dtc. Cc: Wolfgang Denk Cc: Simon Glass Cc: albert.u.b...@aribaud.net Cc: Tom Warren Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren Thierry pgp7Z6O7O898L.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 7/8] arm/davinci: spl - boot device selection
Hi Mikhail,
On Mon, Jul 9, 2012 at 9:01 AM, Mikhail Kshevetskiy
wrote:
> This patch allow us to have a universal spl that detects a boot
> device and select a corresponding boot algorithm for main u-boot part
> (SOC_DA8XX only)
>
> This patch create copy copy of drivers/mtd/nand/nand_spl_load.c and
> drivers/mtd/spi/spi_spl_load.c for the following reasons:
> * avoid jump to main u-boot code just after its loading (required
>for the next patch: spl - add compressed u-boot image support)
> * makes a structure similar to omap3 sources
>
> Signed-off-by: Mikhail Kshevetskiy
> ---
> Change for v2:
> * fix checkpatch warnings
> * defines for constants
> * use readl() to read a BOOTCFG_REG
> * improve patch description
> ---
> arch/arm/cpu/arm926ejs/davinci/Makefile |5 ++
> arch/arm/cpu/arm926ejs/davinci/spl.c | 91
> +++---
> arch/arm/cpu/arm926ejs/davinci/spl_mmc.c | 39 ++
> arch/arm/cpu/arm926ejs/davinci/spl_nand.c| 11 +++
> arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c | 25 ++
> arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c | 42 ++
> arch/arm/include/asm/arch-davinci/davinci_boot.h | 50
> include/configs/cam_enc_4xx.h| 12 +--
> include/configs/da850evm.h | 19 +++--
> include/configs/hawkboard.h | 11 +--
> 10 files changed, 275 insertions(+), 30 deletions(-)
> create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_mmc.c
> create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_nand.c
> create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c
> create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c
> create mode 100644 arch/arm/include/asm/arch-davinci/davinci_boot.h
>
> diff --git a/arch/arm/cpu/arm926ejs/davinci/Makefile
> b/arch/arm/cpu/arm926ejs/davinci/Makefile
> index da7efac..12bd37a 100644
> --- a/arch/arm/cpu/arm926ejs/davinci/Makefile
> +++ b/arch/arm/cpu/arm926ejs/davinci/Makefile
> @@ -40,6 +40,11 @@ ifdef CONFIG_SPL_BUILD
> COBJS-y+= spl.o
> COBJS-$(CONFIG_SOC_DM365) += dm365_lowlevel.o
> COBJS-$(CONFIG_SOC_DA8XX) += da850_lowlevel.o
> +
> +COBJS-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
> +COBJS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += spl_spi_flash.o
> +COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
> +COBJS-$(CONFIG_SPL_MMC_SUPPORT)+= spl_mmc.o
> endif
>
> SOBJS = reset.o
> diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c
> b/arch/arm/cpu/arm926ejs/davinci/spl.c
> index 74632e5..50b4bbc 100644
> --- a/arch/arm/cpu/arm926ejs/davinci/spl.c
> +++ b/arch/arm/cpu/arm926ejs/davinci/spl.c
> @@ -25,9 +25,11 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> +#include
>
> #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
>
> @@ -72,25 +74,92 @@ void board_init_f(ulong dummy)
> relocate_code(CONFIG_SPL_STACK, NULL, CONFIG_SPL_TEXT_BASE);
> }
>
> +u32 davinci_boot_device(void){
> +#ifdef CONFIG_SOC_DA8XX
> + u32 bootmode = readl(BOOTCFG_REG) & BOOTCFG_REG_DEVICE_MASK;
> + switch (bootmode) {
> + case BOOTCFG_DEVICE_NAND8:
> + case BOOTCFG_DEVICE_NAND16:
> + return BOOT_DEVICE_TYPE_NAND;
> + case BOOTCFG_DEVICE_SPI0_FLASH:
> + case BOOTCFG_DEVICE_SPI1_FLASH:
> + return BOOT_DEVICE_TYPE_SPI_FLASH;
> + case BOOTCFG_DEVICE_UART0:
> + case BOOTCFG_DEVICE_UART1:
> + case BOOTCFG_DEVICE_UART2:
> + return BOOT_DEVICE_TYPE_UART;
> + case BOOTCFG_DEVICE_MMC_OR_SD0:
> + return BOOT_DEVICE_TYPE_MMC;
> + default:
> + return BOOT_DEVICE_TYPE_NONE;
> + }
> +#else
> +#ifdef
> +#endif CONFIG_SPL_NAND_SUPPORT
> + return BOOT_DEVICE_TYPE_NAND;
> +#endif
> +#ifdef BOOT_DEVICE_SPI_FLASH
> + return BOOT_DEVICE_TYPE_SPI_FLASH;
> +#endif
> +#ifdef CONFIG_SPL_YMODEM_SUPPORT
> + return BOOT_DEVICE_TYPE_UART;
> +#endif
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> + return BOOT_DEVICE_TYPE_MMC;
> +#endif
> +}
> +
> void board_init_r(gd_t *id, ulong dummy)
> {
> -#ifdef CONFIG_SPL_NAND_LOAD
> - nand_init();
> - puts("Nand boot...\n");
> - nand_boot();
> -#endif
> -#ifdef CONFIG_SPL_SPI_LOAD
> - mem_malloc_init(CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN,
> - CONFIG_SYS_MALLOC_LEN);
> + u32 boot_device;
> + void (*uboot)(void) __noreturn;
> +
> + mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
> + CONFIG_SYS_SPL_MALLOC_SIZE);
>
> gd = &gdata;
> gd->bd = &bdata;
> gd->flags |= GD_FLG_RELOC;
> +#ifdef CONFIG_SPL_SERIAL_SUPPORT
> gd->baudrate = CONFIG_BAUDRATE;
> - serial_init(); /* serial communications setup */
> + serial_init();
> gd->have_console = 1;
> +#endif
>
> - puts("SPI boot...\n");
> - spi_boot();
> + bo
[U-Boot] [PATCH V2 8/8] arm/davinci: spl - add compressed u-boot image support
Motivation:
* we have a board with 128 Kb spi flash, so normal u-boot.ais does not
fit on it.
This patch add support of compressed 2-nd u-boot stage. To create a compressed
ais image its required:
* define CONFIG_SPL_GUNZIP_SUPPORT --- enable compressed ais image supports
* define CONFIG_SPL_GUNZIP_MAX_SIZE --- define a maximum size of compressed
u-boot part
* define CONFIG_SPL_GUNZIP_LOAD_ADDR --- memory address to load compressed
u-boot part (CONFIG_SPL_GUNZIP_LOAD_ADDR region should not overlap with
CONFIG_SYS_TEXT_BASE region)
* use: make u-boot-gzip.ais to get a compressed ais image
Signed-off-by: Mikhail Kshevetskiy
---
Change for v2:
* fix checkpatch warnings
* fix merge conflict with upstream u-boot sources
* improve patch description
---
Makefile | 14 ++
arch/arm/cpu/arm926ejs/davinci/spl.c |7 +++
arch/arm/cpu/arm926ejs/davinci/spl_mmc.c |7 ++-
arch/arm/cpu/arm926ejs/davinci/spl_nand.c |7 ++-
arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c |7 ++-
arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c|4
lib/Makefile |1 +
spl/Makefile |1 +
8 files changed, 45 insertions(+), 3 deletions(-)
diff --git a/Makefile b/Makefile
index 85e36ec..cf16824 100644
--- a/Makefile
+++ b/Makefile
@@ -452,6 +452,20 @@ $(obj)u-boot.ais: $(obj)spl/u-boot-spl.bin
$(obj)u-boot.bin
$(obj)u-boot.ais
rm $(obj)spl/u-boot-spl{,-pad}.ais
+$(obj)u-boot-gzip.ais: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+ $(obj)tools/mkimage -s -n /dev/null -T aisimage \
+ -e $(CONFIG_SPL_TEXT_BASE) \
+ -d $(obj)spl/u-boot-spl.bin \
+ $(obj)spl/u-boot-spl.ais
+ $(OBJCOPY) ${OBJCFLAGS} -I binary \
+ --pad-to=$(CONFIG_SPL_MAX_SIZE) -O binary \
+ $(obj)spl/u-boot-spl.ais $(obj)spl/u-boot-spl-pad.ais
+ cp $(obj)u-boot.bin $(obj)spl/u-boot.bin
+ gzip $(obj)spl/u-boot.bin
+ cat $(obj)spl/u-boot-spl-pad.ais $(obj)spl/u-boot.bin.gz > \
+ $(obj)u-boot-gzip.ais
+ rm $(obj)spl/u-boot-spl{,-pad}.ais $(obj)spl/u-boot.bin.gz
+
$(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
elftosb -zdf imx28 -c $(TOPDIR)/board/$(BOARDDIR)/u-boot.bd \
-o $(obj)u-boot.sb
diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c
b/arch/arm/cpu/arm926ejs/davinci/spl.c
index 50b4bbc..041df5b 100644
--- a/arch/arm/cpu/arm926ejs/davinci/spl.c
+++ b/arch/arm/cpu/arm926ejs/davinci/spl.c
@@ -111,6 +111,7 @@ u32 davinci_boot_device(void){
void board_init_r(gd_t *id, ulong dummy)
{
+ int size;
u32 boot_device;
void (*uboot)(void) __noreturn;
@@ -159,6 +160,12 @@ void board_init_r(gd_t *id, ulong dummy)
break;
}
+#ifdef CONFIG_SPL_GUNZIP_SUPPORT
+ size = CONFIG_SPL_GUNZIP_MAX_SIZE;
+ gunzip((void *)CONFIG_SYS_TEXT_BASE, 512 * 1024,
+ (void *)CONFIG_SPL_GUNZIP_LOAD_ADDR, &size);
+#endif
+
puts("Jump to U-Boot image...\n");
uboot = (void *) CONFIG_SYS_TEXT_BASE;
(*uboot)();
diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c
b/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c
index 1a551e9..fa67f1a 100644
--- a/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c
+++ b/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c
@@ -28,7 +28,12 @@ void spl_mmc_load_image(void)
ret = mmc->block_dev.block_read(0,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS,
- (void *) CONFIG_SYS_TEXT_BASE);
+#ifndef CONFIG_SPL_GUNZIP_SUPPORT
+ (void *) CONFIG_SYS_TEXT_BASE
+#else
+ (void *) CONFIG_SPL_GUNZIP_LOAD_ADDR
+#endif
+ );
if (ret < 0) {
printf("spl: mmc blk read err - %d\n", ret);
hang();
diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
index bad1e8f..4bf3e6a 100644
--- a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
+++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
@@ -6,6 +6,11 @@ void spl_nand_load_image(void)
nand_init();
nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
CONFIG_SYS_NAND_U_BOOT_SIZE,
- (void *) CONFIG_SYS_TEXT_BASE);
+#ifndef CONFIG_SPL_GUNZIP_SUPPORT
+ (void *) CONFIG_SYS_TEXT_BASE
+#else
+ (void *) CONFIG_SPL_GUNZIP_LOAD_ADDR
+#endif
+ );
debug("Loaded %d bytes from NAND flash\n", CONFIG_SYS_NAND_U_BOOT_SIZE);
}
diff --git a/arch/arm/cpu/arm926ejs/d
[U-Boot] [PATCH V2 7/8] arm/davinci: spl - boot device selection
This patch allow us to have a universal spl that detects a boot
device and select a corresponding boot algorithm for main u-boot part
(SOC_DA8XX only)
This patch create copy copy of drivers/mtd/nand/nand_spl_load.c and
drivers/mtd/spi/spi_spl_load.c for the following reasons:
* avoid jump to main u-boot code just after its loading (required
for the next patch: spl - add compressed u-boot image support)
* makes a structure similar to omap3 sources
Signed-off-by: Mikhail Kshevetskiy
---
Change for v2:
* fix checkpatch warnings
* defines for constants
* use readl() to read a BOOTCFG_REG
* improve patch description
---
arch/arm/cpu/arm926ejs/davinci/Makefile |5 ++
arch/arm/cpu/arm926ejs/davinci/spl.c | 91 +++---
arch/arm/cpu/arm926ejs/davinci/spl_mmc.c | 39 ++
arch/arm/cpu/arm926ejs/davinci/spl_nand.c| 11 +++
arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c | 25 ++
arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c | 42 ++
arch/arm/include/asm/arch-davinci/davinci_boot.h | 50
include/configs/cam_enc_4xx.h| 12 +--
include/configs/da850evm.h | 19 +++--
include/configs/hawkboard.h | 11 +--
10 files changed, 275 insertions(+), 30 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_mmc.c
create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_nand.c
create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c
create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c
create mode 100644 arch/arm/include/asm/arch-davinci/davinci_boot.h
diff --git a/arch/arm/cpu/arm926ejs/davinci/Makefile
b/arch/arm/cpu/arm926ejs/davinci/Makefile
index da7efac..12bd37a 100644
--- a/arch/arm/cpu/arm926ejs/davinci/Makefile
+++ b/arch/arm/cpu/arm926ejs/davinci/Makefile
@@ -40,6 +40,11 @@ ifdef CONFIG_SPL_BUILD
COBJS-y+= spl.o
COBJS-$(CONFIG_SOC_DM365) += dm365_lowlevel.o
COBJS-$(CONFIG_SOC_DA8XX) += da850_lowlevel.o
+
+COBJS-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
+COBJS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += spl_spi_flash.o
+COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
+COBJS-$(CONFIG_SPL_MMC_SUPPORT)+= spl_mmc.o
endif
SOBJS = reset.o
diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c
b/arch/arm/cpu/arm926ejs/davinci/spl.c
index 74632e5..50b4bbc 100644
--- a/arch/arm/cpu/arm926ejs/davinci/spl.c
+++ b/arch/arm/cpu/arm926ejs/davinci/spl.c
@@ -25,9 +25,11 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -72,25 +74,92 @@ void board_init_f(ulong dummy)
relocate_code(CONFIG_SPL_STACK, NULL, CONFIG_SPL_TEXT_BASE);
}
+u32 davinci_boot_device(void){
+#ifdef CONFIG_SOC_DA8XX
+ u32 bootmode = readl(BOOTCFG_REG) & BOOTCFG_REG_DEVICE_MASK;
+ switch (bootmode) {
+ case BOOTCFG_DEVICE_NAND8:
+ case BOOTCFG_DEVICE_NAND16:
+ return BOOT_DEVICE_TYPE_NAND;
+ case BOOTCFG_DEVICE_SPI0_FLASH:
+ case BOOTCFG_DEVICE_SPI1_FLASH:
+ return BOOT_DEVICE_TYPE_SPI_FLASH;
+ case BOOTCFG_DEVICE_UART0:
+ case BOOTCFG_DEVICE_UART1:
+ case BOOTCFG_DEVICE_UART2:
+ return BOOT_DEVICE_TYPE_UART;
+ case BOOTCFG_DEVICE_MMC_OR_SD0:
+ return BOOT_DEVICE_TYPE_MMC;
+ default:
+ return BOOT_DEVICE_TYPE_NONE;
+ }
+#else
+#ifdef
+#endif CONFIG_SPL_NAND_SUPPORT
+ return BOOT_DEVICE_TYPE_NAND;
+#endif
+#ifdef BOOT_DEVICE_SPI_FLASH
+ return BOOT_DEVICE_TYPE_SPI_FLASH;
+#endif
+#ifdef CONFIG_SPL_YMODEM_SUPPORT
+ return BOOT_DEVICE_TYPE_UART;
+#endif
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ return BOOT_DEVICE_TYPE_MMC;
+#endif
+}
+
void board_init_r(gd_t *id, ulong dummy)
{
-#ifdef CONFIG_SPL_NAND_LOAD
- nand_init();
- puts("Nand boot...\n");
- nand_boot();
-#endif
-#ifdef CONFIG_SPL_SPI_LOAD
- mem_malloc_init(CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN,
- CONFIG_SYS_MALLOC_LEN);
+ u32 boot_device;
+ void (*uboot)(void) __noreturn;
+
+ mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
+ CONFIG_SYS_SPL_MALLOC_SIZE);
gd = &gdata;
gd->bd = &bdata;
gd->flags |= GD_FLG_RELOC;
+#ifdef CONFIG_SPL_SERIAL_SUPPORT
gd->baudrate = CONFIG_BAUDRATE;
- serial_init(); /* serial communications setup */
+ serial_init();
gd->have_console = 1;
+#endif
- puts("SPI boot...\n");
- spi_boot();
+ boot_device = davinci_boot_device();
+ debug("boot device - %d\n", boot_device);
+ switch (boot_device) {
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_TYPE_NAND:
+ puts("Booting from nand flash ...\n");
+ spl_nand_load_image();
+ break;
+#endif
+#ifdef CONFIG_SPL_SPI_FLA
[U-Boot] [PATCH V2 6/8] MMC: u-boot-spl may be compiled without partition support
Signed-off-by: Mikhail Kshevetskiy --- Change for v2: * fix checkpatch warnings --- drivers/mmc/mmc.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index aebe578..69df64a 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1253,7 +1253,9 @@ int mmc_startup(struct mmc *mmc) (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, (mmc->cid[2] >> 24) & 0xf); +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) init_part(&mmc->block_dev); +#endif return 0; } -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 5/8] mtd/spi: add sst25l driver
Current SST driver does not support well this types of flash, so
introduce a new one.
This code is a combination of sst.c driver from u-boot and sst25l.c
driver from linux-3.3 release. I try to make a code as close to linux
driver as it was possible.
Signed-off-by: Mikhail Kshevetskiy
---
Change for v2:
* fix checkpatch warnings
* improve patch description
---
drivers/mtd/spi/Makefile |3 +-
drivers/mtd/spi/spi_flash.c |3 +
drivers/mtd/spi/spi_flash_internal.h |1 +
drivers/mtd/spi/sst25l.c | 372 ++
4 files changed, 378 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/spi/sst25l.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 90f8392..9285bf7 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -34,7 +34,8 @@ COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o
COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
COBJS-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.o
COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o
-COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o
+COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o
+COBJS-$(CONFIG_SPI_FLASH_SST25L) += sst25l.o
COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o
COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o
COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 530b7b3..d2da542 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -285,6 +285,9 @@ static const struct {
#ifdef CONFIG_SPI_FLASH_SST
{ 0, 0xbf, spi_flash_probe_sst, },
#endif
+#ifdef CONFIG_SPI_FLASH_SST25L
+ { 0, 0xbf, spi_flash_probe_sst25l, },
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO
{ 0, 0x20, spi_flash_probe_stmicro, },
#endif
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/spi_flash_internal.h
index b8bd5d5..89d9036 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -98,6 +98,7 @@ struct spi_flash *spi_flash_probe_atmel(struct spi_slave
*spi, u8 *idcode);
struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode);
+struct spi_flash *spi_flash_probe_sst25l(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode);
diff --git a/drivers/mtd/spi/sst25l.c b/drivers/mtd/spi/sst25l.c
new file mode 100644
index 000..9d7be0d
--- /dev/null
+++ b/drivers/mtd/spi/sst25l.c
@@ -0,0 +1,372 @@
+/*
+ * Driver for SST25L SPI Flash chips
+ *
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ * Copyright 2008, Network Appliance Inc.
+ * Jason McMullan
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (tsi-chung.l...@freescale.com)
+ * Copyright (c) 2008-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include
+#include
+#include
+#include
+
+#include "spi_flash_internal.h"
+
+#define SST25L_CMD_WRSR0x01/* Write status register */
+#define SST25L_CMD_WRDI0x04/* Write disable */
+#define SST25L_CMD_RDSR0x05/* Read status register */
+#define SST25L_CMD_WREN0x06/* Write enable */
+#define SST25L_CMD_READ0x03/* High speed read */
+
+#define SST25L_CMD_EWSR0x50/* Enable write status register
*/
+#define SST25L_CMD_SECTOR_ERASE0x20/* Erase sector */
+#define SST25L_CMD_READ_ID 0x90/* Read device ID */
+#define SST25L_CMD_AAI_PROGRAM 0xaf/* Auto address increment */
+
+#define SST25L_STATUS_BUSY (1 << 0)/* Chip is busy */
+#define SST25L_STATUS_WREN (1 << 1)/* Write enabled */
+#define SST25L_STATUS_BP0 (1 << 2)/* Block protection 0 */
+#define SST25L_STATUS_BP1 (1 << 3)/* Block protection 1 */
+
+struct flash_info {
+ const char *name;
+ u16 device_id;
+ u32 page_size;
+ u32 nr_pages;
+ u32 erase_size;
+};
+
+struct sst25l_spi_flash {
+ struct spi_flashflash;
+ const struct flash_info *flash_info;
+};
+
+#define to_sst25l_spi_flash(x) container_of(x, struct sst25l_spi_flash, flash)
+
+static struct flash_info sst25l_flash_info[] = {
+ {"sst25vf010a", 0xbf49, 256, 512, 4096},
+ {"sst25lf020a", 0xbf43, 256, 1024, 4096},
+ {"sst25lf040a", 0xbf44, 256, 2048, 4096},
+};
+
+static inline int spi_write_sync(struct spi_slave *spi,
+ const u8 *data, size_t len)
+{
+ return spi_xfer(sp
[U-Boot] [PATCH V2 4/8] mtd/spi/spi_flash: support CMD_READ_ID=0x90 case
current code does not support spi flashes that have 0x90 read_id command,
so fix this
Signed-off-by: Mikhail Kshevetskiy
---
Change for v2:
* fix checkpatch warnings
---
drivers/mtd/spi/spi_flash.c | 66 +++---
drivers/mtd/spi/spi_flash_internal.h |1 +
2 files changed, 47 insertions(+), 20 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index f689cc4..530b7b3 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -306,13 +306,44 @@ static const struct {
};
#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
+struct spi_flash *spi_analize_flash_probe(struct spi_slave *spi,
+ u8 *idcode, size_t idcode_len, u8 *id)
+{
+ struct spi_flash *flash = NULL;
+ int i, shift;
+ u8 *idp;
+
+#ifdef DEBUG
+ printf("SF: Got idcodes\n");
+ print_buffer(0, idcode, 1, idcode_len, 0);
+#endif
+
+ /* count the number of continuation bytes */
+ for (shift = 0, idp = idcode;
+shift < idcode_len && *idp == 0x7f;
+++shift, ++idp)
+ continue;
+
+ *id = *idp;
+ /* search the table for matches in shift and id */
+ for (i = 0; i < ARRAY_SIZE(flashes); ++i)
+ if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
+ /* we have a match, call probe */
+ flash = flashes[i].probe(spi, idp);
+ if (flash)
+ break;
+ }
+
+ return flash;
+}
+
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode)
{
struct spi_slave *spi;
struct spi_flash *flash = NULL;
- int ret, i, shift;
- u8 idcode[IDCODE_LEN], *idp;
+ u8 cmd[4], idcode[IDCODE_LEN], id;
+ int ret;
spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
if (!spi) {
@@ -331,28 +362,23 @@ struct spi_flash *spi_flash_probe(unsigned int bus,
unsigned int cs,
if (ret)
goto err_read_id;
-#ifdef DEBUG
- printf("SF: Got idcodes\n");
- print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
+ flash = spi_analize_flash_probe(spi, idcode, sizeof(idcode), &id);
+ if (id == 0xff) {
+ /* try CMD_READ_ID_NEW command */
+ cmd[0] = CMD_READ_ID_NEW;
+ spi_flash_addr(0x00, cmd);
- /* count the number of continuation bytes */
- for (shift = 0, idp = idcode;
-shift < IDCODE_CONT_LEN && *idp == 0x7f;
-++shift, ++idp)
- continue;
+ ret = spi_flash_cmd_read(spi, cmd, sizeof(cmd),
+ idcode, sizeof(idcode));
+ if (ret)
+ goto err_read_id;
- /* search the table for matches in shift and id */
- for (i = 0; i < ARRAY_SIZE(flashes); ++i)
- if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
- /* we have a match, call probe */
- flash = flashes[i].probe(spi, idp);
- if (flash)
- break;
- }
+ flash = spi_analize_flash_probe(spi,
+ idcode, sizeof(idcode), &id);
+ }
if (!flash) {
- printf("SF: Unsupported manufacturer %02x\n", *idp);
+ printf("SF: Unsupported manufacturer %02x\n", id);
goto err_manufacturer_probe;
}
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/spi_flash_internal.h
index 91e036a..b8bd5d5 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -14,6 +14,7 @@
/* Common commands */
#define CMD_READ_ID0x9f
+#define CMD_READ_ID_NEW0x90
#define CMD_READ_ARRAY_SLOW0x03
#define CMD_READ_ARRAY_FAST0x0b
--
1.7.10.4
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[U-Boot] [PATCH V2 2/8] arm/davinci/da850: add uart0 pinmux
Signed-off-by: Mikhail Kshevetskiy
---
Change for v2:
* fix checkpatch warnings
---
arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c |5 +
arch/arm/include/asm/arch-davinci/hardware.h|1 +
arch/arm/include/asm/arch-davinci/pinmux_defs.h |1 +
3 files changed, 7 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
index fa07fb5..dbae5fa 100644
--- a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
+++ b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
@@ -35,6 +35,11 @@ const struct pinmux_config spi1_pins_scs0[] = {
};
/* UART pin muxer settings */
+const struct pinmux_config uart0_pins_txrx[] = {
+ { pinmux(3), 2, 4 }, /* UART0_RXD */
+ { pinmux(3), 2, 5 }, /* UART0_TXD */
+};
+
const struct pinmux_config uart1_pins_txrx[] = {
{ pinmux(4), 2, 6 }, /* UART1_RXD */
{ pinmux(4), 2, 7 }, /* UART1_TXD */
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index 56e5743..76aca24 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -447,6 +447,7 @@ struct davinci_pllc_regs {
/* Clock IDs */
enum davinci_clk_ids {
DAVINCI_SPI0_CLKID = 2,
+ DAVINCI_UART0_CLKID = 2,
DAVINCI_UART2_CLKID = 2,
DAVINCI_MMC_CLKID = 2,
DAVINCI_MDIO_CLKID = 4,
diff --git a/arch/arm/include/asm/arch-davinci/pinmux_defs.h
b/arch/arm/include/asm/arch-davinci/pinmux_defs.h
index 07aceaa..eddb3f7 100644
--- a/arch/arm/include/asm/arch-davinci/pinmux_defs.h
+++ b/arch/arm/include/asm/arch-davinci/pinmux_defs.h
@@ -28,6 +28,7 @@ extern const struct pinmux_config spi1_pins_base[3];
extern const struct pinmux_config spi1_pins_scs0[1];
/* UART pin muxer settings */
+extern const struct pinmux_config uart0_pins_txrx[2];
extern const struct pinmux_config uart1_pins_txrx[2];
extern const struct pinmux_config uart2_pins_txrx[2];
extern const struct pinmux_config uart2_pins_rtscts[2];
--
1.7.10.4
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[U-Boot] [PATCH V2 3/8] serial/ns16550: ns16550 has a different register layout on SOC_DA8XX
also fix NS16550_init() as we need 16x divider
Signed-off-by: Mikhail Kshevetskiy
Acked-by: Christian Riesch
Tested-by: Christian Riesch
---
Change for v2:
* fix checkpatch warnings
---
drivers/serial/ns16550.c |2 +-
include/ns16550.h|9 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 0c23955..facadd2 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -52,7 +52,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
serial_out(UART_LCRVAL, &com_port->lcr);
#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
- defined(CONFIG_AM33XX)
+ defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX)
#if defined(CONFIG_APTIX)
/* /13 mode so Aptix 6MHz can hit 115200 */
diff --git a/include/ns16550.h b/include/ns16550.h
index e9d2eda..51cb5b4 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -46,6 +46,14 @@ struct NS16550 {
UART_REG(lsr); /* 5 */
UART_REG(msr); /* 6 */
UART_REG(spr); /* 7 */
+#ifdef CONFIG_SOC_DA8XX
+ UART_REG(reg8); /* 8 */
+ UART_REG(reg9); /* 9 */
+ UART_REG(revid1); /* A */
+ UART_REG(revid2); /* B */
+ UART_REG(pwr_mgmt); /* C */
+ UART_REG(mdr1); /* D */
+#else
UART_REG(mdr1); /* 8 */
UART_REG(reg9); /* 9 */
UART_REG(regA); /* A */
@@ -58,6 +66,7 @@ struct NS16550 {
UART_REG(ssr); /* 11*/
UART_REG(reg12);/* 12*/
UART_REG(osc_12m_sel); /* 13*/
+#endif
};
#define thr rbr
--
1.7.10.4
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[U-Boot] [PATCH V2 1/8] arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138
follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of
OMAP-L138 DSP+ARM Processor Technical Reference Manual
Signed-off-by: Mikhail Kshevetskiy
Acked-by: Christian Riesch
Tested-by: Christian Riesch
---
Change for v2:
* fix checkpatch warnings
---
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 26 +--
arch/arm/include/asm/arch-davinci/hardware.h|1 +
2 files changed, 20 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
index df7d6a2..ff2e2e3 100644
--- a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
+++ b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
@@ -190,13 +190,21 @@ int da850_ddr_setup(void)
setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_LOCK);
setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_POWERDWN);
-
- setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN);
}
-
+ setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN);
writel(CONFIG_SYS_DA850_DDR2_DDRPHYCR, &dv_ddr2_regs_ctrl->ddrphycr);
- clrbits_le32(&davinci_syscfg1_regs->ddr_slew,
- (1 << DDR_SLEW_CMOSEN_BIT));
+
+ if (CONFIG_SYS_DA850_DDR2_SDBCR & (1 << DV_DDR_SDCR_DDR2EN_SHIFT)) {
+ /* DDR2 */
+ clrbits_le32(&davinci_syscfg1_regs->ddr_slew,
+ (1 << DDR_SLEW_DDR_PDENA_BIT) |
+ (1 << DDR_SLEW_CMOSEN_BIT));
+ } else {
+ /* MOBILE DDR */
+ setbits_le32(&davinci_syscfg1_regs->ddr_slew,
+ (1 << DDR_SLEW_DDR_PDENA_BIT) |
+ (1 << DDR_SLEW_CMOSEN_BIT));
+ }
/*
* SDRAM Configuration Register (SDCR):
@@ -216,7 +224,11 @@ int da850_ddr_setup(void)
writel(tmp, &dv_ddr2_regs_ctrl->sdbcr);
/* write memory configuration and timing */
- writel(CONFIG_SYS_DA850_DDR2_SDBCR2, &dv_ddr2_regs_ctrl->sdbcr2);
+ if (!(CONFIG_SYS_DA850_DDR2_SDBCR & (1 << DV_DDR_SDCR_DDR2EN_SHIFT))) {
+ /* MOBILE DDR only*/
+ writel(CONFIG_SYS_DA850_DDR2_SDBCR2,
+ &dv_ddr2_regs_ctrl->sdbcr2);
+ }
writel(CONFIG_SYS_DA850_DDR2_SDTIMR, &dv_ddr2_regs_ctrl->sdtimr);
writel(CONFIG_SYS_DA850_DDR2_SDTIMR2, &dv_ddr2_regs_ctrl->sdtimr2);
@@ -240,7 +252,7 @@ int da850_ddr_setup(void)
/* disable self refresh */
clrbits_le32(&dv_ddr2_regs_ctrl->sdrcr,
- DV_DDR_SDRCR_LPMODEN | DV_DDR_SDRCR_LPMODEN);
+ DV_DDR_SDRCR_LPMODEN | DV_DDR_SDRCR_MCLKSTOPEN);
writel(CONFIG_SYS_DA850_DDR2_PBBPR, &dv_ddr2_regs_ctrl->pbbpr);
return 0;
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index b145c6e..56e5743 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -505,6 +505,7 @@ struct davinci_syscfg1_regs {
((struct davinci_syscfg1_regs *)DAVINCI_SYSCFG1_BASE)
#define DDR_SLEW_CMOSEN_BIT4
+#define DDR_SLEW_DDR_PDENA_BIT 5
#define VTP_POWERDWN (1 << 6)
#define VTP_LOCK (1 << 7)
--
1.7.10.4
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Re: [U-Boot] [STATUS] ARM - many build problems
Dear Wolfgang Denk, (07/09/2012 07:25 AM), Wolfgang Denk wrote: > cpu.c: In function 'save_boot_params_default': > cpu.c:48:1: warning: -fstack-usage not supported for this target > [enabled by default] > /bin/sh: line 1: exit: too many arguments > make[1]: *** [/work/wd/tmp-arm/dts/dt.dtb] Error 1 > make: *** [/work/wd/tmp-arm/u-boot.dtb] Error 2 > make: *** Waiting for unfinished jobs > > > The build warnings are all of the "warning: -fstack-usage not > supported for this target" kind also shown in this example. I am sorry for stopping your hands. My patch causes this warning. It is already pointed by Tom, but merged accidentally. [PATCH v3] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0 http://lists.denx.de/pipermail/u-boot/2012-July/127693.html Please revert this to stop warnings. I have posted the update patch. [PATCH v5] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0 http://lists.denx.de/pipermail/u-boot/2012-July/127844.html Tom, Albert, please review my v5 patch. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/4] mmc: Support designWare Controller
Hi Andy, Could you merge these series? If you don't mind, could we merge this at u-boot-samsung? To use the exynos5, must enable the DesignWare Controller for eMMC. Best Regards, Jaehoon Chung On 07/03/2012 04:57 PM, Jaehoon Chung wrote: > Include mmc:dw-mmc:support DesignWare MMC controller at this patchset. > dw-mmc.c is generic interface.(like sdhci.c) > For using dw-mmc controller, need to add the some samsung specific code. > Exynos specific code should be presented into exynos_dw_mmc.c > > If want to use with exynos5, must enable the dw-mmc.c. > > Changelog v2: > - Fixed the wrong argument for exynos_dwmci_init() > - Added CONFIG_DWMMC/CONFIG_EXYNOS_DWMMC at Makefile > - Changed host->mmc_clk instead of host->get_mmc_clk > - removed hard-coding value > : if need, we can set to host->fifoth_val > > Jaehoon Chung (4): > mmc: dw-mmc: support DesignWare MMC Controller > EXYNOS: clock: add the get_mmc_clk function > EXYNOS: mmc: support DesignWare Controller for Samsung-SoC > mmc: dw-mmc: add dw-mmc's confiuration at Makefile > > arch/arm/cpu/armv7/exynos/clock.c| 78 ++ > arch/arm/include/asm/arch-exynos/clk.h |1 + > arch/arm/include/asm/arch-exynos/dwmmc.h | 36 +++ > drivers/mmc/Makefile |3 + > drivers/mmc/dw_mmc.c | 400 > ++ > drivers/mmc/exynos_dw_mmc.c | 58 + > include/dwmmc.h | 186 ++ > 7 files changed, 762 insertions(+), 0 deletions(-) > create mode 100644 arch/arm/include/asm/arch-exynos/dwmmc.h > create mode 100644 drivers/mmc/dw_mmc.c > create mode 100644 drivers/mmc/exynos_dw_mmc.c > create mode 100644 include/dwmmc.h > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: bugfix: NetSetTimeout assumes CONFIG_SYS_HZ=1000
Dear Wolfgang Denk, (07/09/2012 04:58 AM), Wolfgang Denk wrote: > Dear Tetsuyuki Kobayashi, > > In message <4fe85b87.6090...@kmckk.co.jp> you wrote: >> NetSetTimeout sets incorrect value to timeDelta when CONFIG_SYS_HZ != 1000. > > Your patch is OK per se, but please note that it is a mandatory > requirement that CONFIG_SYS_HZ == 1000. So if you have any board > where this is not the case, this board needs to be fixed, too. Thank you for reviewing my patch. I didn't know that it is a mandatory requirement that CONFIG_SYS_HZ == 1000. I grep'ed for CONFIG_SYS_HZ in README and under doc/, but I could not find any description about it. $ grep -r CONFIG_SYS_HZ README doc/* doc/README.LED:(CONFIG_SYS_HZ / ) where is the frequency of the blink. Typical values And I couldn't find that what value should be return in ulong get_timer(ulong base); I hope "how to implement system timer" documented. Best regards, Tetsuyuki Kobayashi ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Compiling Uboot error：too many arguments
Dear Wolfgang Denk, > Dear Zhang Heron, > > In message you wrote: > > I met a problem when I compiled the Uboot source code for board > > > > trimslice as follows: > ... > > > rc=$( cat /home/zql/u-boot-arm/board/compulab/dts/tegra2-trimslice.dts | > > No such code exists in mainline U-Boot, so we cannot help you about > that. Please contact the support channels of wherever you received > that code from CCing Igor ;-) > Best regards, > > Wolfgang Denk Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] MX28: SPI: Pull out the PIO transfer function
Pull out all the PIO transfer logic into separate function,
so DMA can be added.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic
Cc: Wolfgang Denk
---
drivers/spi/mxs_spi.c | 72 +++--
1 file changed, 40 insertions(+), 32 deletions(-)
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index a47b25b..0459b3b 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -140,46 +140,19 @@ static void mxs_spi_end_xfer(struct mx28_ssp_regs
*ssp_regs)
writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
}
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
- const void *dout, void *din, unsigned long flags)
+static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
+ char *data, int length, int write, unsigned long flags)
{
- struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
- struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
- int len = bitlen / 8;
- char dummy;
- int write = 0;
- char *data = NULL;
-
- if (bitlen == 0) {
- if (flags & SPI_XFER_END) {
- din = (void *)&dummy;
- len = 1;
- } else
- return 0;
- }
-
- if (din && dout) {
- /* Half-duplex only */
- return -EINVAL;
- } else if (!din && !dout) {
- /* No data */
- return 0;
- } else if (dout) {
- data = (char *)dout;
- write = 1;
- } else if (din) {
- data = (char *)din;
- write = 0;
- }
+ struct mx28_ssp_regs *ssp_regs = slave->regs;
if (flags & SPI_XFER_BEGIN)
mxs_spi_start_xfer(ssp_regs);
- while (len--) {
+ while (length--) {
/* We transfer 1 byte */
writel(1, &ssp_regs->hw_ssp_xfer_size);
- if ((flags & SPI_XFER_END) && !len)
+ if ((flags & SPI_XFER_END) && !length)
mxs_spi_end_xfer(ssp_regs);
if (write)
@@ -219,4 +192,39 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
}
return 0;
+
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
+ int len = bitlen / 8;
+ char dummy;
+ int write = 0;
+ char *data = NULL;
+
+ if (bitlen == 0) {
+ if (flags & SPI_XFER_END) {
+ din = (void *)&dummy;
+ len = 1;
+ } else
+ return 0;
+ }
+
+ if (din && dout) {
+ /* Half-duplex only */
+ return -EINVAL;
+ } else if (!din && !dout) {
+ /* No data */
+ return 0;
+ } else if (dout) {
+ data = (char *)dout;
+ write = 1;
+ } else if (din) {
+ data = (char *)din;
+ write = 0;
+ }
+
+ return mxs_spi_xfer_pio(mxs_slave, data, len, write, flags);
}
--
1.7.10.4
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[U-Boot] [PATCH 3/3] MX28: SPI: Add DMA transfer support
The DMA transfers happen only if the transfered data are larger
than 512 bytes. Otherwise PIO is used. This is a small speed
optimization.
The DMA transfer doesn't work if unaligned transfer is requested
due to the limitation of the DMA controller. This has to be fixed
by introducing generic bounce buffer. Therefore the DMA feature
is now disabled by default.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic
Cc: Wolfgang Denk
---
drivers/spi/mxs_spi.c | 105 -
1 file changed, 104 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 0459b3b..aec7514 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -31,17 +31,32 @@
#include
#include
#include
+#include
#defineMXS_SPI_MAX_TIMEOUT 100
#defineMXS_SPI_PORT_OFFSET 0x2000
#define MXS_SSP_CHIPSELECT_MASK0x0030
#define MXS_SSP_CHIPSELECT_SHIFT 20
+#define MXS_SSP_SMALL_TRANSFER 512
+
+/*
+ * CONFIG_MXS_SPI_DMA_ENABLE: Experimental mixed PIO/DMA support for MXS SPI
+ *host. Use with utmost caution!
+ *
+ *Enabling this is not yet recommended since this
+ *still doesn't support transfers to/from unaligned
+ *addresses. Therefore this driver will not work
+ *for example with saving environment. This is
+ *caused by DMA alignment constraints on MXS.
+ */
+
struct mxs_spi_slave {
struct spi_slaveslave;
uint32_tmax_khz;
uint32_tmode;
struct mx28_ssp_regs*regs;
+ struct mxs_dma_desc *desc;
};
static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave)
@@ -69,6 +84,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
uint32_t addr;
struct mx28_ssp_regs *ssp_regs;
int reg;
+ struct mxs_dma_desc *desc;
if (!spi_cs_is_valid(bus, cs)) {
printf("mxs_spi: invalid bus %d / chip select %d\n", bus, cs);
@@ -79,6 +95,13 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
if (!mxs_slave)
return NULL;
+ desc = mxs_dma_desc_alloc();
+ if (!desc)
+ goto err_desc;
+
+ if (mxs_dma_init_channel(bus))
+ goto err_init;
+
addr = MXS_SSP0_BASE + (bus * MXS_SPI_PORT_OFFSET);
mxs_slave->slave.bus = bus;
@@ -86,6 +109,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
mxs_slave->max_khz = max_hz / 1000;
mxs_slave->mode = mode;
mxs_slave->regs = (struct mx28_ssp_regs *)addr;
+ mxs_slave->desc = desc;
ssp_regs = mxs_slave->regs;
reg = readl(&ssp_regs->hw_ssp_ctrl0);
@@ -94,11 +118,18 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
unsigned int cs,
writel(reg, &ssp_regs->hw_ssp_ctrl0);
return &mxs_slave->slave;
+
+err_init:
+ mxs_dma_desc_free(desc);
+err_desc:
+ free(mxs_slave);
+ return NULL;
}
void spi_free_slave(struct spi_slave *slave)
{
struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
+ mxs_dma_desc_free(mxs_slave->desc);
free(mxs_slave);
}
@@ -195,15 +226,81 @@ static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
}
+static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
+ char *data, int length, int write, unsigned long flags)
+{
+ struct mxs_dma_desc *desc = slave->desc;
+ struct mx28_ssp_regs *ssp_regs = slave->regs;
+ uint32_t ctrl0 = SSP_CTRL0_DATA_XFER;
+ uint32_t cache_data_count;
+ int dmach;
+
+ memset(desc, 0, sizeof(struct mxs_dma_desc));
+ desc->address = (dma_addr_t)desc;
+
+ if (flags & SPI_XFER_BEGIN)
+ ctrl0 |= SSP_CTRL0_LOCK_CS;
+ if (flags & SPI_XFER_END)
+ ctrl0 |= SSP_CTRL0_IGNORE_CRC;
+ if (!write)
+ ctrl0 |= SSP_CTRL0_READ;
+
+ writel(length, &ssp_regs->hw_ssp_xfer_size);
+
+ if (length % ARCH_DMA_MINALIGN)
+ cache_data_count = roundup(length, ARCH_DMA_MINALIGN);
+ else
+ cache_data_count = length;
+
+ if (!write) {
+ slave->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_WRITE;
+ slave->desc->cmd.address = (dma_addr_t)data;
+ } else {
+ slave->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ;
+ slave->desc->cmd.address = (dma_addr_t)data;
+
+ /* Flush data to DRAM so DMA can pick them up */
+ flush_dcache_range((uint32_t)data,
+ (uint32_t)(data + cache_data_count));
+ }
+
+ slave->desc->cmd.data |= MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM |
+
[U-Boot] [PATCH 1/3] MX28: SPI: Refactor spi_xfer a bit
This makes it easier to adapt for addition of DMA support.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic
Cc: Wolfgang Denk
---
drivers/spi/mxs_spi.c | 31 +--
1 file changed, 21 insertions(+), 10 deletions(-)
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 7859536..a47b25b 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -146,20 +146,31 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
int len = bitlen / 8;
- const char *tx = dout;
- char *rx = din;
char dummy;
+ int write = 0;
+ char *data = NULL;
if (bitlen == 0) {
if (flags & SPI_XFER_END) {
- rx = &dummy;
+ din = (void *)&dummy;
len = 1;
} else
return 0;
}
- if (!rx && !tx)
+ if (din && dout) {
+ /* Half-duplex only */
+ return -EINVAL;
+ } else if (!din && !dout) {
+ /* No data */
return 0;
+ } else if (dout) {
+ data = (char *)dout;
+ write = 1;
+ } else if (din) {
+ data = (char *)din;
+ write = 0;
+ }
if (flags & SPI_XFER_BEGIN)
mxs_spi_start_xfer(ssp_regs);
@@ -171,7 +182,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
if ((flags & SPI_XFER_END) && !len)
mxs_spi_end_xfer(ssp_regs);
- if (tx)
+ if (write)
writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_clr);
else
writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_set);
@@ -184,20 +195,20 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
return -ETIMEDOUT;
}
- if (tx)
- writel(*tx++, &ssp_regs->hw_ssp_data);
+ if (write)
+ writel(*data++, &ssp_regs->hw_ssp_data);
writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set);
- if (rx) {
+ if (!write) {
if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_status_reg,
SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) {
printf("MXS SPI: Timeout waiting for data\n");
return -ETIMEDOUT;
}
- *rx = readl(&ssp_regs->hw_ssp_data);
- rx++;
+ *data = readl(&ssp_regs->hw_ssp_data);
+ data++;
}
if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg,
--
1.7.10.4
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Re: [U-Boot] [PATCH] smsc95xx: align buffers to cache line size
Dear Ilya Yanok, > Dear Marek, > > On Mon, Jul 9, 2012 at 1:31 AM, Marek Vasut wrote: > > > non-ARMv7 system now to do some testing... > > > But it used to work without any alignment, right? (with disabled > > > dcache, > > > > of > > > > > course) > > > That makes me think that data buffers don't need any alignment (from > > > USB pov, not cache) and 32-byte alignment is required for internal > > > structs only. > > > > > > Hm.. I have to admit I'm not very much into USB specs and I don't have > > > > any > > See ehci-r10.pdf ... chapter 3.5 ... the buffer pointer has to be aligned > > too it > > seems. > > But in practice it works without any alignment... ok, you made me read the > spec ;) > page 55: "For the page 0 current offset interpretation, this field is the > byte offset into the current page" See the thread "[U-Boot] [PATCH] usb_storage: fix ehci driver max transfer size" So, if we compute the size over there correctly (I hope Stefan will send an updated patch soon), we'll still need it to be aligned to ARCH_DMA_MINALIGN so we can flush it. Bah, this is getting quite crazy, the deeper we go, the more bugs we meet! So, what I'd like to do is to see a patch from Stefan, it was really a good finding! Next up, we should finish this patchset for proper EHCI QH and qTD alignment. And finally, we need generic bounce buffer to use as a protection against crazy people who might want to load stuff to unaligned address. > Regards, Ilya. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] smsc95xx: align buffers to cache line size
Dear Marek, On Mon, Jul 9, 2012 at 1:31 AM, Marek Vasut wrote: > > non-ARMv7 system now to do some testing... > > But it used to work without any alignment, right? (with disabled dcache, > of > > course) > > That makes me think that data buffers don't need any alignment (from USB > > pov, not cache) and 32-byte alignment is required for internal structs > > only. > > > Hm.. I have to admit I'm not very much into USB specs and I don't have > any > See ehci-r10.pdf ... chapter 3.5 ... the buffer pointer has to be aligned > too it > seems. > But in practice it works without any alignment... ok, you made me read the spec ;) page 55: "For the page 0 current offset interpretation, this field is the byte offset into the current page" Regards, Ilya. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [STATUS] ARM - many build problems
Hi all, after merging the latest ARM pull request, a large number of boards is broken: - SUMMARY Boards compiled: 302 Boards with errors: 6 ( harmony seaboard ventana whistler paz00 trimslice ) Boards with warnings but no errors: 49 ( ca9x4_ct_vxp am335x_evm highbank efikamx efikasb mx51evk mx53ard mx53evk mx53loco mx53smd ima3-mx53 vision2 mx6qarm2 mx6qsabrelite cm_t35 omap3_overo omap3_pandora dig297 igep0020 igep0030 am3517_evm mt_ventoux omap3_zoom1 omap3_zoom2 omap3_logic omap3_mvblx am3517_crane omap3_beagle omap3_evm omap3_evm_quick_mmc omap3_evm_quick_nand omap3_sdp3430 devkit8000 mcx tricorder twister omap4_panda omap4_sdp4430 omap5_evm s5p_goni smdkc100 origen s5pc210_universal smdk5250 smdkv310 trats u8500_href plutux medcom ) -- The hard errors (harmony seaboard ventana whistler paz00 trimslice ) all look like this - mind the "/bin/sh: line 1: exit: too many arguments" error: Configuring for harmony board... make[1]: *** [/work/wd/tmp-arm/dts/dt.dtb] Error 1 make: *** [/work/wd/tmp-arm/u-boot.dtb] Error 2 textdata bss dec hex filename 2251144264 278692 508070 7c0a6 /work/wd/tmp-arm/u-boot cpu.c: In function 'save_boot_params_default': cpu.c:48:1: warning: -fstack-usage not supported for this target [enabled by default] /bin/sh: line 1: exit: too many arguments make[1]: *** [/work/wd/tmp-arm/dts/dt.dtb] Error 1 make: *** [/work/wd/tmp-arm/u-boot.dtb] Error 2 make: *** Waiting for unfinished jobs The build warnings are all of the "warning: -fstack-usage not supported for this target" kind also shown in this example. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A year spent in artificial intelligence is enough to make one believe in God. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
Dear Tom Rini, > On Sun, Jul 8, 2012 at 11:51 AM, Marek Vasut wrote: > > Dear Ilya Yanok, > > > >> Hi Marek, > >> > >> On Sun, Jul 8, 2012 at 7:08 AM, Marek Vasut wrote: > >> > >> [...] > >> > >> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c > >> > >> > index 04300be..5199560 100644 > >> > --- a/drivers/usb/host/ehci-hcd.c > >> > +++ b/drivers/usb/host/ehci-hcd.c > >> > @@ -34,7 +34,10 @@ struct ehci_hccr *hccr; /* R/O registers, not > >> > need for volatile */ > >> > > >> > volatile struct ehci_hcor *hcor; > >> > > >> > static uint16_t portreset; > >> > > >> > -static struct QH qh_list __attribute__((aligned(32))); > >> > +DEFINE_CACHE_ALIGN_BUFFER(struct QH, qh_list, 1); > >> > >> This will align on ARCH_DMA_MINALIGN, not USB_DMA_MINALIGN. In case of > >> ARCH_DMA_MINALIGN < 32 we will loose the 32-byte alignment required by > >> USB spec. > > > > That's true -- maybe we should create ALLOC_ALIGN_BUFFER() and > > ALLOC_CACHE_ALIGN_BUFFER() to be a special case of it ? > > Lets think. USB says "32byte min". Do we have other buses today that > apply similar constraints? If so, we should probably go about > abstracting into a __ALIGN_FOO(size, what) and do a general one and a > USB one that does 32 or cachline. If it's just USB that might be > overkill however... Let's do this, we dunno what craziness can befall us in the future. And having the macro handy won't hurt anyway. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] smsc95xx: align buffers to cache line size
Dear Ilya Yanok, > Dear Marek, > > On Sun, Jul 8, 2012 at 10:59 PM, Marek Vasut wrote: > > btw. this will fail with cache line < 32 . > > Hm.. I have to admit I'm not very much into USB specs and I don't have any > non-ARMv7 system now to do some testing... > But it used to work without any alignment, right? (with disabled dcache, of > course) > That makes me think that data buffers don't need any alignment (from USB > pov, not cache) and 32-byte alignment is required for internal structs > only. See ehci-r10.pdf ... chapter 3.5 ... the buffer pointer has to be aligned too it seems. > Regards, Ilya. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] ext2fs: fix warning: 'blocknxt' may be used uninitialized
Dear Kim Phillips, In message <20120703174156.a1082309c2b205216606a...@freescale.com> you wrote: > This warning was introduced in 436da3c "ext2load: increase read > speed": > > ext2fs.c: In function 'ext2fs_read_file': > ext2fs.c:458:19: warning: 'blocknxt' may be used uninitialized in this func= > tion [-Wuninitialized] > > this change makes it go away. > > Cc: Eric Nelson > Cc: Thierry Reding > Cc: Jason Cooper > Cc: Andreas Bie=DFmann > Cc: Reinhard Arlt > Signed-off-by: Kim Phillips > --- > v2: changed to Thierry's recommendation in: > > http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/134043 > > build-tested only - please ack > > fs/ext2/ext2fs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de ... not meant for the weak-at-heart: /^(?=.*one)(?=.*two)/ If you can follow that, you can use it. - Randal L. Schwartz in ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
On Sun, Jul 8, 2012 at 11:51 AM, Marek Vasut wrote: > Dear Ilya Yanok, > >> Hi Marek, >> >> On Sun, Jul 8, 2012 at 7:08 AM, Marek Vasut wrote: >> >> [...] >> >> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c >> >> > index 04300be..5199560 100644 >> > --- a/drivers/usb/host/ehci-hcd.c >> > +++ b/drivers/usb/host/ehci-hcd.c >> > @@ -34,7 +34,10 @@ struct ehci_hccr *hccr; /* R/O registers, not >> > need for volatile */ >> > >> > volatile struct ehci_hcor *hcor; >> > >> > static uint16_t portreset; >> > >> > -static struct QH qh_list __attribute__((aligned(32))); >> > +DEFINE_CACHE_ALIGN_BUFFER(struct QH, qh_list, 1); >> >> This will align on ARCH_DMA_MINALIGN, not USB_DMA_MINALIGN. In case of >> ARCH_DMA_MINALIGN < 32 we will loose the 32-byte alignment required by USB >> spec. > > That's true -- maybe we should create ALLOC_ALIGN_BUFFER() and > ALLOC_CACHE_ALIGN_BUFFER() to be a special case of it ? Lets think. USB says "32byte min". Do we have other buses today that apply similar constraints? If so, we should probably go about abstracting into a __ALIGN_FOO(size, what) and do a general one and a USB one that does 32 or cachline. If it's just USB that might be overkill however... -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 2/4] net: use common rand()/srand() functions
Dear Michael, In message <201207082236.18040.mich...@walle.cc> you wrote: > > Kim Philipps already posted a patch for this, see here: > http://patchwork.ozlabs.org/patch/169295/ I see. Tnx. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Am I your nanny? The kernel is there to support user programs, but it's a _resource_ handler, not a baby feeder. - Linus Torvalds in ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools: Fix mingw tools build
Dear Vladimir Yakovlev, In message <1341691506-17106-1-git-send-email-na...@inbox.ru> you wrote: > mkenvimage does not build due to missed os_support.o and unsupported > file modes S_IRGRP S_IWGRP. > Tested with mingw 4.2.1 on ubuntu 12.04. > > Signed-off-by: Vladimir Yakovlev > --- > tools/Makefile |3 ++- > tools/mkenvimage.c | 10 -- > 2 files changed, 10 insertions(+), 3 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de We, the unwilling, led by the unknowing, are doing the impossible for the ungrateful. We have done so much, for so long, with so little, we are now qualified to do anything with nothing. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: make net_rand.h inclusion depend on BOOTP_RANDOM_DELAY
Dear Kim Phillips, In message <20120705181932.351bb5e527cb14b435961...@freescale.com> you wrote: > commit "net: use common rand()/srand() functions" introduced the following > build warning on the current u-boot-arm tree: > > $ ./MAKEALL MPC8313ERDB_66 > Configuring for MPC8313ERDB_66 - Board: MPC8313ERDB, Options: SYS_66MHZ >text data bss dec hex filename > 271988 13976 41768 327732 50034 ./u-boot > In file included from bootp.c:15:0: > net_rand.h: In function 'srand_mac': > net_rand.h:40:2: warning: implicit declaration of function 'srand' > [-Wimplicit-function-declaration] > > adding this dependency fixes it. > > Cc: Michael Walle > Cc: Joe Hershberger > Signed-off-by: Kim Phillips > --- > net/bootp.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If it happens once, it's a bug. If it happens twice, it's a feature. If it happens more than twice, it's a design philosophy. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 2/4] net: use common rand()/srand() functions
Hi Wolfgang, Am Sonntag 08 Juli 2012, 22:31:36 schrieben Sie: > Dear Michael, > > In message <1338931997-13419-3-git-send-email- mich...@walle.cc> you wrote: > > Replace rand() with the functions from lib/. The link-local network code > > stores its own seed, derived from the MAC address. Thus making it > > independent from calls to srand() in other modules. > > > > Signed-off-by: Michael Walle > > Acked-by: Joe Hershberger > > --- > > > > include/common.h |4 ++- > > lib/Makefile |4 ++- > > net/Makefile |2 - > > net/link_local.c |7 +++-- > > net/net_rand.c | 68 > > -- net/net_rand.h > > | 31 +++- > > 6 files changed, 34 insertions(+), 82 deletions(-) > > delete mode 100644 net/net_rand.c > > This commit causes build warnings like these for a zillion of boards: > > net_rand.h:40:2: warning: implicit declaration of function 'srand' > [-Wimplicit-function-declaration] Kim Philipps already posted a patch for this, see here: http://patchwork.ozlabs.org/patch/169295/ and here: http://lists.denx.de/pipermail/u-boot/2012- July/127745.html -- Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 2/4] net: use common rand()/srand() functions
Dear Michael, In message <1338931997-13419-3-git-send-email-mich...@walle.cc> you wrote: > Replace rand() with the functions from lib/. The link-local network code > stores its own seed, derived from the MAC address. Thus making it > independent from calls to srand() in other modules. > > Signed-off-by: Michael Walle > Acked-by: Joe Hershberger > --- > include/common.h |4 ++- > lib/Makefile |4 ++- > net/Makefile |2 - > net/link_local.c |7 +++-- > net/net_rand.c | 68 > -- > net/net_rand.h | 31 +++- > 6 files changed, 34 insertions(+), 82 deletions(-) > delete mode 100644 net/net_rand.c This commit causes build warnings like these for a zillion of boards: net_rand.h:40:2: warning: implicit declaration of function 'srand' [-Wimplicit-function-declaration] Please fix! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Unix is supported by IBM, like a hanging man is supported by rope. - Don Libes & Sandy Ressler: _Life With Unix_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-arm/master
Dear Albert ARIBAUD, In message <20120707141238.6d578281@lilith> you wrote: > > The following changes since commit > 558cd995d6d3eaa94fb342d142289a1fa2f76ba3: > > tools/mkenvimage.c: fix basename(3) usage (2012-07-02 20:21:49 +0200) > > are available in the git repository at: > > git://git.denx.de/u-boot-arm master > > for you to fetch changes up to d702b0811df53a1fc2d8049e35431e4591d093c6: > > ARM: cache: Move the cp15 CR register read before flushing the cache. > (2012-07-07 14:07:44 +0200) > > > Alexandre Belloni (1): > AT91SAM9*: Change kernel address in dataflash to match u-boot's > size > > Amit Virdi (10): > st_smi: Return error in case TFF is not set > st_smi: Change SMI timeout values > st_smi: Enhance the error handling > st_smi: Change timeout loop implementation > SPEAr: Fix ARM relocation support > SPEAr: Eliminate dependency on Xloader table > SPEAr: Initialize SNOR in early_board_init_f > SPEAr: Remove CONFIG_MTD_NAND_VERIFY_WRITE to speed up NAND access > cleanup/SPEAr: Remove unnecessary parenthesis > cleanup/SPEAr: Define configuration flags more elegantly > > Andreas Bießmann (1): > ehci-atmel: fix compiler warning > > Armando Visconti (4): > st_smi: Removed no needed dependency on ST_M25Pxx_ID > st_smi: Change the flash probing method > st_smi: Fix bug in flash_print_info() > st_smi: Fixed page size for Winbond W25Q128FV flash > > Bo Shen (3): > Atmel : usb : add EHCI driver for Atmel SoC > AT91: at91sam9m10g45ek : Enable EHCI instead OHCI > ATMEL/PIO: Enable new feature of PIO on Atmel device > > Donghwa Lee (1): > TRATS: initialize panel_info data structure in board file > > Fabio Estevam (24): > mx53loco: Fix revision of Dialog boards > mx53: Fix mask for SATA reference clock > mx53loco: Remove unused SOBJS > mx53evk: Remove unused SOBJS > mx53ard: Remove unused SOBJS > mx53smd: Remove unused SOBJS > mx51evk: Remove unused SOBJS > efikamx: Remove unused SOBJS > vision2: Remove unused SOBJS > ima3-mx53: Remove unused SOBJS > mx6qarm2: Remove unused SOBJS > mx6qsabrelite: Remove unused SOBJS > mx53ard: Remove unused CONFIG_MII_GASKET > imx31_phycore: Remove CONFIG_SYS_I2C_SLAVE definition > mx35pdk: Remove CONFIG_SYS_I2C_SLAVE definition > mx53ard: Remove CONFIG_SYS_I2C_SLAVE definition > mx53evk: Remove CONFIG_SYS_I2C_SLAVE definition > mx53loco: Remove CONFIG_SYS_I2C_SLAVE definition > mx53smd: Remove CONFIG_SYS_I2C_SLAVE definition > mx28evk: Fix PSWITCH key position > mx28evk: Fix boot by adjusting HW_DRAM_CTL29 register > No need to define CONFIG_ARCH_CPU_INIT. > ARM: mx28: Remove CONFIG_ARCH_CPU_INIT > ARM: introduce arch_early_init_r() > > Heiko Schocher (1): > arm,davinci: update for enbw_cmc board > > Holger Brunck (13): > arm/km: add board type to boards.cfg > arm/km: add piggy mac adress offset for mgcoge3un > arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE > arm/km: use ARRAY_SIZE macro > arm/km: fix wrong comment in SDRAM config for mgcoge3un > arm/km: change maintainer for mgcoge3un > arm/km: remove CONFIG_RESET_PHY_R > arm/km: add kmnusa board support > arm/km: add kmcoge5un board support > arm/km: convert mgcoge3un target to km_kirkwood > arm/km: remove portl2.h and use km_kirkwood instead > arm/km: cleanup km_kirkwood boards > arm/km: remove calls to kw_gpio_* in board_early_init_f > > Igor Grinberg (1): > cm-t35: reduce the environment size > > Jason Liu (1): > i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctly > > Lokesh Vutla (10): > OMAP5: Adding correct Control id code for OMAP5430 > OMAP5: ADD chip detection for OMAP5432 SOC > OMAP5: Configure the io settings for omap5432 uevm board > OMAP5: ADD precalculated timings for ddr3 > OMAP5: EMIF: Add support for DDR3 device > OMAP5: DPLL core lock for OMAP5432 > OMAP5: Change voltages for omap5432 > ARM: OMAP3+: Detect reset type > OMAP4+: Handle sdram init after warm reset > OMAP4+: Force DDR in self-refresh after warm reset > > Lucas Stach (2): > tegra: sync SDIO1 pingroup enum name with TRM > tegra: add SDIO1 funcmux entry for UARTA > > Luka Perkov (1): > kwboot: boot kirkwood SoCs over a serial link > > Marek Vasut (3): > i.MX28: Add function to adjust memory parameters > Kirkwood: Add support for Ka-Ro TK71 > PXA: Enable CONFIG_PREBOOT on zipitz2 > > Michael Langer (1): > i.MX6 USDHC: Use the ESDHC clock > > Michael Walle (4): > lib: add rand() function > net: use common rand()/srand() functions > net: add helper to generate random mac address > Kirkwoo
Re: [U-Boot] [PATCH] Remove remaining mdelay() macros
Dear Anatolij Gustschin, In message <1335343403-4405-1-git-send-email-ag...@denx.de> you wrote: > Drop mdelay() macros since we already have a common mdelay() func. > > Signed-off-by: Anatolij Gustschin > --- > drivers/block/sata_sil.c |1 - > drivers/video/da8xx-fb.c |1 - > 2 files changed, 0 insertions(+), 2 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Due to lack of disk space, this fortune database has been discontinued. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: bugfix: NetSetTimeout assumes CONFIG_SYS_HZ=1000
Dear Tetsuyuki Kobayashi, In message <4fe85b87.6090...@kmckk.co.jp> you wrote: > NetSetTimeout sets incorrect value to timeDelta when CONFIG_SYS_HZ != 1000. Your patch is OK per se, but please note that it is a mandatory requirement that CONFIG_SYS_HZ == 1000. So if you have any board where this is not the case, this board needs to be fixed, too. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The management question ... is not _whether_ to build a pilot system and throw it away. You _will_ do that. The only question is whether to plan in advance to build a throwaway, or to promise to deliver the throwaway to customers. - Fred Brooks, "The Mythical Man Month" ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX28: bug fixes in PMU configuration code
Hi Marek, On Sun, Jul 8, 2012 at 4:15 PM, Marek Vasut wrote: > Fabio, can you give it a quick spin on mx28evk so we can roll this late into > this release maybe ? I don't have access to my mx28evk now and will be out of the office in the following 2 weeks. Maybe Otavio could test it on a mx28evk? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] smsc95xx: align buffers to cache line size
Dear Marek, On Sun, Jul 8, 2012 at 10:59 PM, Marek Vasut wrote: > btw. this will fail with cache line < 32 . > Hm.. I have to admit I'm not very much into USB specs and I don't have any non-ARMv7 system now to do some testing... But it used to work without any alignment, right? (with disabled dcache, of course) That makes me think that data buffers don't need any alignment (from USB pov, not cache) and 32-byte alignment is required for internal structs only. Regards, Ilya. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX28: bug fixes in PMU configuration code
Dear Stathis Voukelatos,
> Fixed some typos in the i.MX28 PMU code that sets up the VDDD
> and VDDIO power rails. In addition the VDDD and VDDIO brownout
> offset values should be divided by a step size before being
> programmed to the corresponding registers.
>
> Signed-off-by: Stathis Voukelatos
> Cc: Stefano Babic
> Cc: Marek Vasut
All right, yet another minus point for my responsiveness :-(
Tested-by: Marek Vasut
Acked-by: Marek Vasut
Fabio, can you give it a quick spin on mx28evk so we can roll this late into
this release maybe ?
> ---
> arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 12 ++--
> 1 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
> b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c index 4b09b0c..cc71af8
> 100644
> --- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
> +++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
> @@ -716,7 +716,7 @@ int mx28_get_vddio_power_source_off(void)
> tmp = readl(&power_regs->hw_power_vddioctrl);
> if (tmp & POWER_VDDIOCTRL_DISABLE_FET) {
> if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
> - POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
> + POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
> return 1;
> }
> }
> @@ -724,7 +724,7 @@ int mx28_get_vddio_power_source_off(void)
> if (!(readl(&power_regs->hw_power_5vctrl) &
> POWER_5VCTRL_ENABLE_DCDC)) {
> if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
> - POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
> + POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
> return 1;
> }
> }
> @@ -772,7 +772,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
> new_brownout) uint32_t cur_target, diff, bo_int = 0;
> uint32_t powered_by_linreg = 0;
>
> - new_brownout = new_target - new_brownout;
> + new_brownout = (new_target - new_brownout + 25) / 50;
>
> cur_target = readl(&power_regs->hw_power_vddioctrl);
> cur_target &= POWER_VDDIOCTRL_TRG_MASK;
> @@ -858,8 +858,8 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
> new_brownout) }
>
> clrsetbits_le32(&power_regs->hw_power_vddioctrl,
> - POWER_VDDDCTRL_BO_OFFSET_MASK,
> - new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
> + POWER_VDDIOCTRL_BO_OFFSET_MASK,
> + new_brownout << POWER_VDDIOCTRL_BO_OFFSET_OFFSET);
> }
>
> void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
> @@ -869,7 +869,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t
> new_brownout) uint32_t cur_target, diff, bo_int = 0;
> uint32_t powered_by_linreg = 0;
>
> - new_brownout = new_target - new_brownout;
> + new_brownout = (new_target - new_brownout + 12) / 25;
>
> cur_target = readl(&power_regs->hw_power_vdddctrl);
> cur_target &= POWER_VDDDCTRL_TRG_MASK;
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] smsc95xx: align buffers to cache line size
Dear Ilya Yanok,
> Align buffers passed to the USB code to cache line size so
> they can be DMAed safely.
>
> Signed-off-by: Ilya Yanok
> ---
> Depens on Marek's patch [1] for DEFINE_CACHE_ALIGN_BUFFER.
Isn't it your patch anyway? You should get the credit for that series, you know
...
btw. this will fail with cache line < 32 .
>
> [1] http://patchwork.ozlabs.org/patch/169619/
>
> drivers/usb/eth/smsc95xx.c | 13 +
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c
> index c7aebea..c62a8c1 100644
> --- a/drivers/usb/eth/smsc95xx.c
> +++ b/drivers/usb/eth/smsc95xx.c
> @@ -153,13 +153,15 @@ static int curr_eth_dev; /* index for name of next
> device detected */ static int smsc95xx_write_reg(struct ueth_data *dev,
> u32 index, u32 data) {
> int len;
> + ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
>
> cpu_to_le32s(&data);
> + tmpbuf[0] = data;
>
> len = usb_control_msg(dev->pusb_dev, usb_sndctrlpipe(dev->pusb_dev, 0),
> USB_VENDOR_REQUEST_WRITE_REGISTER,
> USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
> - 00, index, &data, sizeof(data), USB_CTRL_SET_TIMEOUT);
> + 00, index, tmpbuf, sizeof(data), USB_CTRL_SET_TIMEOUT);
> if (len != sizeof(data)) {
> debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d",
> index, data, len);
> @@ -171,11 +173,13 @@ static int smsc95xx_write_reg(struct ueth_data *dev,
> u32 index, u32 data) static int smsc95xx_read_reg(struct ueth_data *dev,
> u32 index, u32 *data) {
> int len;
> + ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
>
> len = usb_control_msg(dev->pusb_dev, usb_rcvctrlpipe(dev->pusb_dev, 0),
> USB_VENDOR_REQUEST_READ_REGISTER,
> USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
> - 00, index, data, sizeof(data), USB_CTRL_GET_TIMEOUT);
> + 00, index, tmpbuf, sizeof(data), USB_CTRL_GET_TIMEOUT);
> + *data = tmpbuf[0];
> if (len != sizeof(data)) {
> debug("smsc95xx_read_reg failed: index=%d, len=%d",
> index, len);
> @@ -664,7 +668,8 @@ static int smsc95xx_send(struct eth_device *eth, void*
> packet, int length) int actual_len;
> u32 tx_cmd_a;
> u32 tx_cmd_b;
> - unsigned char msg[PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)];
> + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
> + PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
>
> debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
> if (length > PKTSIZE)
> @@ -695,7 +700,7 @@ static int smsc95xx_send(struct eth_device *eth, void*
> packet, int length) static int smsc95xx_recv(struct eth_device *eth)
> {
> struct ueth_data *dev = (struct ueth_data *)eth->priv;
> - static unsigned char recv_buf[AX_RX_URB_SIZE];
> + DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, AX_RX_URB_SIZE);
> unsigned char *buf_ptr;
> int err;
> int actual_len;
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] usb_storage: fix ehci driver max transfer size
Dear Stefan Herbrechtsmeier, > Am 07.07.2012 23:58, schrieb Marek Vasut: > >> Am 04.07.2012 08:57, schrieb Schneider, Kolja: > Am 03.07.2012 20:10, schrieb Marek Vasut: > >> The commit 5dd95cf93dfffa1d19a1928990852aac9f55b9d9 'usb_storage: > >> Fix EHCI "out of buffer pointers" with CD-ROM' introduce a bug in > >> usb_storage as it wrongly assumes that every transfer can use 4k > >> per qt_buffer. This is wrong if the start address of the data > >> is not 4k aligned and leads to 'EHCI timed out on TD' messages > >> because of 'out of buffer pointers' in ehci_td_buffer function. > >> > >> Cc: Marek Vasut > >> Signed-off-by: Stefan Herbrechtsmeier > > > > Ok, first I have to admit I broke my promise to look into this ASAP, > > sorry > > about > > > it :-( > > No problem, as long as we get it into the next release. ;-) > > > Just curious, but shouldn't it be ((4096 * 5) / dev_desc->blk_sz) - 1 > > ? > > No, because the first blk need to be aligned with the 4096. In worst > case the blk is at the end of the 4096 range. If we assume that the > blk is aligned to blk_sz we can change it to ((4096 * 4) / > dev_desc->blk_sz) + 1. I skip the last blk (+ 1) because with 4096 > aligned first blk we unaligned the next transfer and add extra short > packages to each ehci transfer. > > If we want to maximise the usage we need to calculate the max_xfer_blk > depending on the start address of the first blk. > >>> > >>> I admit to not totally getting it. However, there are two things that > >>> come > > > > to my mind: > >>>- Doesn't the EHCI Specification mention exactly five buffers that > >>>can/should/must > >>> > >>> be used? > >> > >> Yes, you can use up to five 4096 byte buffers. > >> > >>>- I think I once stumbled across some comment that said as much as > > > > the > > > >>>blocks > >>> > >>> always having to be aligned anyway? > >> > >> The buffers must be aligned to a 4096 byte page. This means that you > >> have to use the first and last buffer to align your data to the next or > >> previous 4096 byte page boundary. > > > > All right, I managed to replicate the issue. This (or similar) doesn't > > work for you, right: > > > > usb read 0x4204 0x0 0x400 > > I observe the bug during > fatload usb 0 0x80 uImage > > ... > dev=0ffb0440, pipe=c8008283, buffer=00a9, length=20480, req=(null) > ... > dev=0ffb0440, pipe=c8008283, buffer=00a95000, length=20480, req=(null) > ... > dev=0ffb0440, pipe=c8008283, buffer=00a9a000, length=18432, req=(null) > ... > dev=0ffb0440, pipe=c8008283, buffer=00a9e800, length=20480, req=(null) > out of buffer pointers (2048 bytes left) > ... > > It looks like the file is fragmented. During load the start address > becomes unaligned and thereby the code wrongly tries to transfer more > blocks than possible. > > Before the above mentioned patch the max_xfer_blk was much smaller (20), > so that the problem never appears. > > > The proper solution would be to introduce a bounce buffer for such > > unaligned transfers. A proper, generic bounce buffer that can be > > configured to bounce on specified boundaries and warns about performance > > penalties. > > Why not limit the max_xfer_blk to the maximum save count [(4096 * 4) / > dev_desc->blksz)] or calculate the max_xfer_blk depending on the start > address of the transfer: > > max_xfer_blk = ((4096 * 5) - (start & ~4096) / dev_desc->blksz This looks like a much better solution ;-) Can you redo the patch for that? Also, there's some macro for that rounding in include/common.h > > Regards, > Stefan Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] common.h: Introduce DEFINE_CACHE_ALIGN_BUFFER
Dear Ilya Yanok, > Hi Marek, > > On Sun, Jul 8, 2012 at 7:08 AM, Marek Vasut wrote: > > This is the out-of-function-scope counterpart of > > ALLOC_CACHE_ALIGN_BUFFER. > > +#define DEFINE_CACHE_ALIGN_BUFFER(type, name, size)\ > > + static char __##name[roundup(size * sizeof(type), > > ARCH_DMA_MINALIGN)] \ > > + __aligned(ARCH_DMA_MINALIGN); \ > > We need linux/compiler.h (not included from common.h) for __aligned. Correct, but is it a good idea to include it in common.h ? Ilya, can you re-do this patchset and repost? > Regards, Ilya. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
Dear Ilya Yanok, > Hi Marek, > > On Sun, Jul 8, 2012 at 7:08 AM, Marek Vasut wrote: > > [...] > > diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c > > > index 04300be..5199560 100644 > > --- a/drivers/usb/host/ehci-hcd.c > > +++ b/drivers/usb/host/ehci-hcd.c > > @@ -34,7 +34,10 @@ struct ehci_hccr *hccr; /* R/O registers, not > > need for volatile */ > > > > volatile struct ehci_hcor *hcor; > > > > static uint16_t portreset; > > > > -static struct QH qh_list __attribute__((aligned(32))); > > +DEFINE_CACHE_ALIGN_BUFFER(struct QH, qh_list, 1); > > This will align on ARCH_DMA_MINALIGN, not USB_DMA_MINALIGN. In case of > ARCH_DMA_MINALIGN < 32 we will loose the 32-byte alignment required by USB > spec. That's true -- maybe we should create ALLOC_ALIGN_BUFFER() and ALLOC_CACHE_ALIGN_BUFFER() to be a special case of it ? > The same with other buffers. Otherwise looks great. > > Regards, Ilya. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-mpc85xx.git
Dear Andy Fleming, In message <1341613933-22669-1-git-send-email-aflem...@freescale.com> you wrote: > tools/mkenvimage.c: fix basename(3) usage (2012-07-02 20:21:49 +0200) > > are available in the git repository at: > git://www.denx.de/git/u-boot-mpc85xx.git master > > Prabhakar Kushwaha (8): > powerpc/mpc85xx:Add BSC9131/BSC9130/BSC9231 Processor Support > powerpc/mpc85xx:Add BSC9131 RDB Support > PATCH 1/4][v4] doc:Add documentation for e500 external debugger support > powerpc/85xx:Fix MSR[DE] bit in MSR to support debugger > powerpc/85xx:Make debug exception vector accessible > powerpc/85xx:Fix NAND code base to support debugger > powerpc/mpc85xx:Add debugger support for e500v2 SoC > powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting > > Shengzhou Liu (2): > powerpc/p1010rdb: update mux config of p1010rdb board > powerpc/p1010rdb: add readme document for p1010rdb > > Timur Tabi (4): > powerpc/85xx: minor clean-ups to the P2020DS board header file > powerpc/85xx: fdt_set_phy_handle() should return an error code > powerpc/85xx: clean up P1022DS board configuration header file > lib/powerpc: addrmap_phys_to_virt() should return a pointer > > York Sun (4): > powerpc/P4080: Check SVR for CPU22 workaround > powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER() > powerpc/mpc85xx: Workaround for erratum CPU_A011 > powerpc/mpc85xx: Fix Handling the lack of L2 cache on P2040/P2040E > > ramneek mehresh (1): > powerpc/85xx: Add USB device-tree fixup for various platforms > > MAINTAINERS |2 + > README|9 + > arch/powerpc/cpu/mpc85xx/Makefile |1 + > arch/powerpc/cpu/mpc85xx/cmd_errata.c | 13 +- > arch/powerpc/cpu/mpc85xx/cpu_init.c | 31 ++- > arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 32 ++- > arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 26 -- > arch/powerpc/cpu/mpc85xx/fdt.c| 11 +- > arch/powerpc/cpu/mpc85xx/p2041_serdes.c |4 +- > arch/powerpc/cpu/mpc85xx/release.S| 39 ++- > arch/powerpc/cpu/mpc85xx/start.S | 90 ++- > arch/powerpc/cpu/mpc8xxx/cpu.c| 43 +--- > arch/powerpc/include/asm/config_mpc85xx.h | 31 ++- > arch/powerpc/include/asm/immap_85xx.h | 119 - > arch/powerpc/include/asm/io.h |2 +- > arch/powerpc/include/asm/processor.h | 46 +--- > board/freescale/bsc9131rdb/Makefile | 53 > board/freescale/bsc9131rdb/README | 137 + > board/freescale/bsc9131rdb/bsc9131rdb.c | 83 ++ > board/freescale/bsc9131rdb/ddr.c | 187 + > board/freescale/bsc9131rdb/law.c | 31 ++ > board/freescale/bsc9131rdb/tlb.c | 67 + > board/freescale/common/fman.c | 36 ++-- > board/freescale/common/fman.h |2 +- > board/freescale/mpc8536ds/mpc8536ds.c |7 +- > board/freescale/p1010rdb/README | 212 ++ > board/freescale/p1010rdb/ddr.c|6 +- > board/freescale/p1010rdb/p1010rdb.c | 60 +++- > board/freescale/p1022ds/p1022ds.c |6 +- > board/freescale/p1023rds/p1023rds.c |5 +- > board/freescale/p1_p2_rdb/ddr.c |6 +- > board/freescale/p2020come/p2020come.c |4 +- > board/freescale/p2020ds/p2020ds.c |6 +- > board/freescale/p2041rdb/p2041rdb.c |6 +- > board/freescale/p3060qds/p3060qds.c |6 +- > boards.cfg|1 + > doc/README.mpc85xx| 166 +++ > include/addr_map.h|2 +- > include/configs/BSC9131RDB.h | 428 > + > include/configs/MPC8536DS.h |5 +- > include/configs/P1022DS.h | 48 ++-- > include/configs/P1023RDS.h|5 +- > include/configs/P2020COME.h |6 +- > include/configs/P2020DS.h | 27 +-- > include/configs/P2041RDB.h|8 +- > include/configs/corenet_ds.h |8 +- > lib/addr_map.c| 19 +- > 47 files changed, 1881 insertions(+), 261 deletions(-) > create mode 100644 board/freescale/bsc9131rdb/Makefile > create mode 100644 board/freescale/bsc9131rdb/README > create mode 100644 board/freescale/bsc9131rdb/bsc9131rdb.c > create mode 100644 board/freescale/bsc9131rdb/ddr.c > create mode 100644 board/freescale/bsc9131rdb/law.c > create mode 100644 board/freescale/bsc9131rdb/tlb.c > create mode 100644 board/freescale/p1010rdb/README > create mode 100644 doc/README.mpc85xx > create mode 100644 include/configs/BSC9131RDB.h Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office:
Re: [U-Boot] Compiling Uboot error：too many arguments
Dear Zhang Heron, In message you wrote: > > I met a problem when I compiled the Uboot source code for board > trimslice as follows: ... > rc=$( cat /home/zql/u-boot-arm/board/compulab/dts/tegra2-trimslice.dts | No such code exists in mainline U-Boot, so we cannot help you about that. Please contact the support channels of wherever you received that code from Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Nearly everyone is in favor of going to heaven but too many are hoping they'll live long enough to see an easing of the entrance requirements. Never appeal to a man's "better nature." he might not have one. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] smsc95xx: align buffers to cache line size
Align buffers passed to the USB code to cache line size so
they can be DMAed safely.
Signed-off-by: Ilya Yanok
---
Depens on Marek's patch [1] for DEFINE_CACHE_ALIGN_BUFFER.
[1] http://patchwork.ozlabs.org/patch/169619/
drivers/usb/eth/smsc95xx.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c
index c7aebea..c62a8c1 100644
--- a/drivers/usb/eth/smsc95xx.c
+++ b/drivers/usb/eth/smsc95xx.c
@@ -153,13 +153,15 @@ static int curr_eth_dev; /* index for name of next device
detected */
static int smsc95xx_write_reg(struct ueth_data *dev, u32 index, u32 data)
{
int len;
+ ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
cpu_to_le32s(&data);
+ tmpbuf[0] = data;
len = usb_control_msg(dev->pusb_dev, usb_sndctrlpipe(dev->pusb_dev, 0),
USB_VENDOR_REQUEST_WRITE_REGISTER,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
- 00, index, &data, sizeof(data), USB_CTRL_SET_TIMEOUT);
+ 00, index, tmpbuf, sizeof(data), USB_CTRL_SET_TIMEOUT);
if (len != sizeof(data)) {
debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d",
index, data, len);
@@ -171,11 +173,13 @@ static int smsc95xx_write_reg(struct ueth_data *dev, u32
index, u32 data)
static int smsc95xx_read_reg(struct ueth_data *dev, u32 index, u32 *data)
{
int len;
+ ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
len = usb_control_msg(dev->pusb_dev, usb_rcvctrlpipe(dev->pusb_dev, 0),
USB_VENDOR_REQUEST_READ_REGISTER,
USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
- 00, index, data, sizeof(data), USB_CTRL_GET_TIMEOUT);
+ 00, index, tmpbuf, sizeof(data), USB_CTRL_GET_TIMEOUT);
+ *data = tmpbuf[0];
if (len != sizeof(data)) {
debug("smsc95xx_read_reg failed: index=%d, len=%d",
index, len);
@@ -664,7 +668,8 @@ static int smsc95xx_send(struct eth_device *eth, void*
packet, int length)
int actual_len;
u32 tx_cmd_a;
u32 tx_cmd_b;
- unsigned char msg[PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)];
+ ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
+PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
if (length > PKTSIZE)
@@ -695,7 +700,7 @@ static int smsc95xx_send(struct eth_device *eth, void*
packet, int length)
static int smsc95xx_recv(struct eth_device *eth)
{
struct ueth_data *dev = (struct ueth_data *)eth->priv;
- static unsigned char recv_buf[AX_RX_URB_SIZE];
+ DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, AX_RX_URB_SIZE);
unsigned char *buf_ptr;
int err;
int actual_len;
--
1.7.9.5
___
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Re: [U-Boot] [PATCH 1/2] common.h: Introduce DEFINE_CACHE_ALIGN_BUFFER
Hi Marek, On Sun, Jul 8, 2012 at 7:08 AM, Marek Vasut wrote: > This is the out-of-function-scope counterpart of > ALLOC_CACHE_ALIGN_BUFFER. > +#define DEFINE_CACHE_ALIGN_BUFFER(type, name, size)\ > + static char __##name[roundup(size * sizeof(type), > ARCH_DMA_MINALIGN)] \ > + __aligned(ARCH_DMA_MINALIGN); \ > We need linux/compiler.h (not included from common.h) for __aligned. Regards, Ilya. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb_storage: fix ehci driver max transfer size
Am 07.07.2012 23:58, schrieb Marek Vasut: Am 04.07.2012 08:57, schrieb Schneider, Kolja: Am 03.07.2012 20:10, schrieb Marek Vasut: The commit 5dd95cf93dfffa1d19a1928990852aac9f55b9d9 'usb_storage: Fix EHCI "out of buffer pointers" with CD-ROM' introduce a bug in usb_storage as it wrongly assumes that every transfer can use 4k per qt_buffer. This is wrong if the start address of the data is not 4k aligned and leads to 'EHCI timed out on TD' messages because of 'out of buffer pointers' in ehci_td_buffer function. Cc: Marek Vasut Signed-off-by: Stefan Herbrechtsmeier Ok, first I have to admit I broke my promise to look into this ASAP, sorry about it :-( No problem, as long as we get it into the next release. ;-) Just curious, but shouldn't it be ((4096 * 5) / dev_desc->blk_sz) - 1 ? No, because the first blk need to be aligned with the 4096. In worst case the blk is at the end of the 4096 range. If we assume that the blk is aligned to blk_sz we can change it to ((4096 * 4) / dev_desc->blk_sz) + 1. I skip the last blk (+ 1) because with 4096 aligned first blk we unaligned the next transfer and add extra short packages to each ehci transfer. If we want to maximise the usage we need to calculate the max_xfer_blk depending on the start address of the first blk. I admit to not totally getting it. However, there are two things that come to my mind: -Doesn't the EHCI Specification mention exactly five buffers that can/should/must be used? Yes, you can use up to five 4096 byte buffers. -I think I once stumbled across some comment that said as much as the blocks always having to be aligned anyway? The buffers must be aligned to a 4096 byte page. This means that you have to use the first and last buffer to align your data to the next or previous 4096 byte page boundary. All right, I managed to replicate the issue. This (or similar) doesn't work for you, right: usb read 0x4204 0x0 0x400 I observe the bug during fatload usb 0 0x80 uImage ... dev=0ffb0440, pipe=c8008283, buffer=00a9, length=20480, req=(null) ... dev=0ffb0440, pipe=c8008283, buffer=00a95000, length=20480, req=(null) ... dev=0ffb0440, pipe=c8008283, buffer=00a9a000, length=18432, req=(null) ... dev=0ffb0440, pipe=c8008283, buffer=00a9e800, length=20480, req=(null) out of buffer pointers (2048 bytes left) ... It looks like the file is fragmented. During load the start address becomes unaligned and thereby the code wrongly tries to transfer more blocks than possible. Before the above mentioned patch the max_xfer_blk was much smaller (20), so that the problem never appears. The proper solution would be to introduce a bounce buffer for such unaligned transfers. A proper, generic bounce buffer that can be configured to bounce on specified boundaries and warns about performance penalties. Why not limit the max_xfer_blk to the maximum save count [(4096 * 4) / dev_desc->blksz)] or calculate the max_xfer_blk depending on the start address of the transfer: max_xfer_blk = ((4096 * 5) - (start & ~4096) / dev_desc->blksz Regards, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
Hi Marek, On Sun, Jul 8, 2012 at 7:08 AM, Marek Vasut wrote: [...] diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c > index 04300be..5199560 100644 > --- a/drivers/usb/host/ehci-hcd.c > +++ b/drivers/usb/host/ehci-hcd.c > @@ -34,7 +34,10 @@ struct ehci_hccr *hccr; /* R/O registers, not need > for volatile */ > volatile struct ehci_hcor *hcor; > > static uint16_t portreset; > -static struct QH qh_list __attribute__((aligned(32))); > +DEFINE_CACHE_ALIGN_BUFFER(struct QH, qh_list, 1); > This will align on ARCH_DMA_MINALIGN, not USB_DMA_MINALIGN. In case of ARCH_DMA_MINALIGN < 32 we will loose the 32-byte alignment required by USB spec. The same with other buffers. Otherwise looks great. Regards, Ilya. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
