Re: [U-Boot] [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
On Sat, Jul 21, 2012 at 4:02 PM, Marek Vasut ma...@denx.de wrote:
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Warren twar...@nvidia.com
Cc: Wolfgang Denk w...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: U-Boot DM u-boot...@lists.denx.de
Ooops.
Acked-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/armv7/tegra2/usb.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/usb.c b/arch/arm/cpu/armv7/tegra2/usb.c
index 5f2b243..ea7f701 100644
--- a/arch/arm/cpu/armv7/tegra2/usb.c
+++ b/arch/arm/cpu/armv7/tegra2/usb.c
@@ -158,7 +158,8 @@ static void set_host_mode(struct fdt_usb *config)
}
}
-void usbf_reset_controller(struct fdt_usb *config, struct usb_ctlr *usbctlr)
+static void usbf_reset_controller(struct fdt_usb *config,
+ struct usb_ctlr *usbctlr)
{
/* Reset the USB controller with 2us delay */
reset_periph(config-periph_id, 2);
@@ -382,8 +383,8 @@ int tegrausb_stop_port(void)
return 0;
}
-int fdt_decode_usb(const void *blob, int node, unsigned osc_frequency_mhz,
- struct fdt_usb *config)
+static int fdt_decode_usb(const void *blob, int node,
+ unsigned osc_frequency_mhz, struct fdt_usb *config)
{
const char *phy, *mode;
--
1.7.10.4
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Re: [U-Boot] [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
Dear Simon Glass, On Sat, Jul 21, 2012 at 4:02 PM, Marek Vasut ma...@denx.de wrote: Signed-off-by: Marek Vasut ma...@denx.de Cc: Simon Glass s...@chromium.org Cc: Tom Warren twar...@nvidia.com Cc: Wolfgang Denk w...@denx.de Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: U-Boot DM u-boot...@lists.denx.de Acked-by: Simon Glass s...@chromium.org Simon, can you please pick up this one separatelly through your tree? I already agreed with Tom to rip this apart as it's not really a series, but rather a dump of random patches and cleanups. This is basically the first chapter of my crusade towards making you crazy from breakage ... I mean ... cleaning up drivers scattered across arch/ directory and moving them to drivers/ directory ... Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/8 V7] EXYNOS5: Enable I2C support
This patch set enables I2C support for EXYNOS5. This patchset modifies the s3c24x0 I2C driver to use same for EXYNOS5. Multichannel support has been added to the s3c24x0 I2C driver. s3c24x0_i2c struct has been moved to a common place as it can used by different SOC's. Changes in V2: - Incorporated review comments from Simon Glass. - Aligned the pinmux functionality as per latest comments Changes in V3: - Incorporated review comments from Joonyoung Shim for I2C driver. Changes in V4: - Resolved build error for S3C2410. Changes in V5: - Pinmux setting moved to board file. - Multi Bus I2C offset calculation done based on EXYNOS_I2C_SPACE. - Peripheral id calculation removed from i2c driver. Changes in V6: - Incorporated review comments from Simon Glass. Changes in V7: - Incorporated review comments from Joonyoung Shim. Rajeshwari Shinde (8): EXYNOS: CLK: Add i2c clock EXYNOS: Add I2C base address. EXYNOS5: define EXYNOS5_I2C_SPACING EXYNOS: PINMUX: Add pinmux support for I2C I2C: Move struct s3c24x0_i2c to a common place. I2C: Modify the I2C driver for EXYNOS5 I2C: Add support for Multi channel CONFIG: SMDK5250: I2C: Enable I2C arch/arm/cpu/armv7/exynos/clock.c | 33 arch/arm/cpu/armv7/exynos/pinmux.c | 52 +++ arch/arm/include/asm/arch-exynos/clk.h |1 + arch/arm/include/asm/arch-exynos/cpu.h |5 + arch/arm/include/asm/arch-exynos/periph.h |8 + arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 10 -- board/samsung/smdk5250/smdk5250.c | 30 - drivers/i2c/s3c24x0_i2c.c | 221 +- drivers/i2c/s3c24x0_i2c.h | 33 include/configs/smdk5250.h | 10 ++ 10 files changed, 315 insertions(+), 88 deletions(-) create mode 100644 drivers/i2c/s3c24x0_i2c.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/8 V7] EXYNOS: CLK: Add i2c clock
This adds i2c clock information for EXYNOS5.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
changes in V2:
- Incorporated comments from Simon Glass which are removed extra
braces around (readl(clk-div_top1)) 24 and gave a tab space for
return statement.
Changes in V3:
- None
Changes in V4:
- None
Changes in V5:
- None.
Changes in V6:
- Incorporated review comments from Simon Glass.
Changes in V7:
- None.
arch/arm/cpu/armv7/exynos/clock.c | 33
arch/arm/include/asm/arch-exynos/clk.h |1 +
2 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 672598f..de3db8e 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -605,6 +605,29 @@ void exynos4_set_mipi_clk(void)
writel(cfg, clk-div_lcd0);
}
+/*
+ * I2C
+ *
+ * exynos5: obtaining the I2C clock
+ */
+static unsigned long exynos5_get_i2c_clk(void)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned long aclk_66, aclk_66_pre, sclk;
+ unsigned int ratio;
+
+ sclk = get_pll_clk(MPLL);
+
+ ratio = (readl(clk-div_top1)) 24;
+ ratio = 0x7;
+ aclk_66_pre = sclk / (ratio + 1);
+ ratio = readl(clk-div_top0);
+ ratio = 0x7;
+ aclk_66 = aclk_66_pre / (ratio + 1);
+ return aclk_66;
+}
+
unsigned long get_pll_clk(int pllreg)
{
if (cpu_is_exynos5())
@@ -621,6 +644,16 @@ unsigned long get_arm_clk(void)
return exynos4_get_arm_clk();
}
+unsigned long get_i2c_clk(void)
+{
+ if (cpu_is_exynos5()) {
+ return exynos5_get_i2c_clk();
+ } else {
+ debug(I2C clock is not set for this CPU\n);
+ return 0;
+ }
+}
+
unsigned long get_pwm_clk(void)
{
if (cpu_is_exynos5())
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index e99339a..5529025 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -31,6 +31,7 @@
unsigned long get_pll_clk(int pllreg);
unsigned long get_arm_clk(void);
+unsigned long get_i2c_clk(void);
unsigned long get_pwm_clk(void);
unsigned long get_uart_clk(int dev_index);
void set_mmc_clk(int dev_index, unsigned int div);
--
1.7.4.4
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[U-Boot] [PATCH 2/8 V7] EXYNOS: Add I2C base address.
This patch adds the base address for I2C. Signed-off-by: Alim Akhtar alim.akh...@samsung.com Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes in V2: - None Changes in V3: - None Changes in V4: - None Changes in V5: - None Changes in V6: - None Changes in V7: - None. arch/arm/include/asm/arch-exynos/cpu.h |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 0c341d4..ab46b70 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -49,6 +49,7 @@ #define EXYNOS4_USB_HOST_EHCI_BASE 0x1258 #define EXYNOS4_USBPHY_BASE0x125B #define EXYNOS4_UART_BASE 0x1380 +#define EXYNOS4_I2C_BASE 0x1386 #define EXYNOS4_ADC_BASE 0x1391 #define EXYNOS4_PWMTIMER_BASE 0x139D #define EXYNOS4_MODEM_BASE 0x13A0 @@ -76,6 +77,7 @@ #define EXYNOS5_MMC_BASE 0x1220 #define EXYNOS5_SROMC_BASE 0x1225 #define EXYNOS5_UART_BASE 0x12C0 +#define EXYNOS5_I2C_BASE 0x12C6 #define EXYNOS5_PWMTIMER_BASE 0x12DD #define EXYNOS5_GPIO_PART2_BASE0x1340 #define EXYNOS5_FIMD_BASE 0x1440 @@ -148,6 +150,7 @@ SAMSUNG_BASE(adc, ADC_BASE) SAMSUNG_BASE(clock, CLOCK_BASE) SAMSUNG_BASE(sysreg, SYSREG_BASE) SAMSUNG_BASE(fimd, FIMD_BASE) +SAMSUNG_BASE(i2c, I2C_BASE) SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE) SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE) SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/8 V7] EXYNOS: PINMUX: Add pinmux support for I2C
This patch adds pinmux code for I2C.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- Aligned the pinmux functionality as per the latest comments.
Changes in V3:
- None
Changes in V4:
- None
Changes in V5:
- None
Changes in V6:
- None
Changes in V7:
- None.
arch/arm/cpu/armv7/exynos/pinmux.c| 52 +
arch/arm/include/asm/arch-exynos/periph.h |8
2 files changed, 60 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 0e91a6c..7776add 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -188,6 +188,48 @@ static void exynos5_sromc_config(int flags)
}
}
+static void exynos5_i2c_config(int peripheral, int flags)
+{
+
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+
+ switch (peripheral) {
+ case PERIPH_ID_I2C0:
+ s5p_gpio_cfg_pin(gpio1-b3, 0, GPIO_FUNC(0x2));
+ s5p_gpio_cfg_pin(gpio1-b3, 1, GPIO_FUNC(0x2));
+ break;
+ case PERIPH_ID_I2C1:
+ s5p_gpio_cfg_pin(gpio1-b3, 2, GPIO_FUNC(0x2));
+ s5p_gpio_cfg_pin(gpio1-b3, 3, GPIO_FUNC(0x2));
+ break;
+ case PERIPH_ID_I2C2:
+ s5p_gpio_cfg_pin(gpio1-a0, 6, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(gpio1-a0, 7, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C3:
+ s5p_gpio_cfg_pin(gpio1-a1, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(gpio1-a1, 3, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C4:
+ s5p_gpio_cfg_pin(gpio1-a2, 0, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(gpio1-a2, 1, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C5:
+ s5p_gpio_cfg_pin(gpio1-a2, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(gpio1-a2, 3, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C6:
+ s5p_gpio_cfg_pin(gpio1-b1, 3, GPIO_FUNC(0x4));
+ s5p_gpio_cfg_pin(gpio1-b1, 4, GPIO_FUNC(0x4));
+ break;
+ case PERIPH_ID_I2C7:
+ s5p_gpio_cfg_pin(gpio1-b2, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(gpio1-b2, 3, GPIO_FUNC(0x3));
+ break;
+ }
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -205,6 +247,16 @@ static int exynos5_pinmux_config(int peripheral, int flags)
case PERIPH_ID_SROMC:
exynos5_sromc_config(flags);
break;
+ case PERIPH_ID_I2C0:
+ case PERIPH_ID_I2C1:
+ case PERIPH_ID_I2C2:
+ case PERIPH_ID_I2C3:
+ case PERIPH_ID_I2C4:
+ case PERIPH_ID_I2C5:
+ case PERIPH_ID_I2C6:
+ case PERIPH_ID_I2C7:
+ exynos5_i2c_config(peripheral, flags);
+ break;
default:
debug(%s: invalid peripheral %d, __func__, peripheral);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 5db25aa..b861d7d 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -30,6 +30,14 @@
*
*/
enum periph_id {
+ PERIPH_ID_I2C0,
+ PERIPH_ID_I2C1,
+ PERIPH_ID_I2C2,
+ PERIPH_ID_I2C3,
+ PERIPH_ID_I2C4,
+ PERIPH_ID_I2C5,
+ PERIPH_ID_I2C6,
+ PERIPH_ID_I2C7,
PERIPH_ID_SDMMC0,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
--
1.7.4.4
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[U-Boot] [PATCH 5/8 V7] I2C: Move struct s3c24x0_i2c to a common place.
struct s3c24x0_i2c is being moved to common local header file so that
the same can be used by s3c series and exynos series SoCs.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- None
Changes in V5:
- None
Changes in V6:
- None
Chnages in V7:
- None
arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 10
drivers/i2c/s3c24x0_i2c.h | 33 +++
2 files changed, 33 insertions(+), 10 deletions(-)
create mode 100644 drivers/i2c/s3c24x0_i2c.h
diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
index ca978c9..0f75c31 100644
--- a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
@@ -343,16 +343,6 @@ struct s3c24x0_watchdog {
u32 wtcnt;
};
-
-/* IIC (see manual chapter 20) */
-struct s3c24x0_i2c {
- u32 iiccon;
- u32 iicstat;
- u32 iicadd;
- u32 iicds;
-};
-
-
/* IIS (see manual chapter 21) */
struct s3c24x0_i2s {
#ifdef __BIG_ENDIAN
diff --git a/drivers/i2c/s3c24x0_i2c.h b/drivers/i2c/s3c24x0_i2c.h
new file mode 100644
index 000..2dd4b06
--- /dev/null
+++ b/drivers/i2c/s3c24x0_i2c.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _S3C24X0_I2C_H
+#define _S3C24X0_I2C_H
+
+struct s3c24x0_i2c {
+ u32 iiccon;
+ u32 iicstat;
+ u32 iicadd;
+ u32 iicds;
+ u32 iiclc;
+};
+#endif /* _S3C24X0_I2C_H */
--
1.7.4.4
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[U-Boot] [PATCH 6/8 V7] I2C: Modify the I2C driver for EXYNOS5
This patch modifies the S3C I2C driver to suppport EXYNOS5.
The cahnges made to driver are as follows:
- I2C base address is passed as a parameter to many
functions to avoid multiple #ifdef
- Channel initialisation is moved to a commom funation
as it is required by i2c_init.
- Hardcoding for I2CCON_ACKGEN removed.
- Replaced printf with debug.
- Checkpatch issues resolved.
- Pinmux setting will be done in board/samsung/smdk5250/smdk5250.c
to avoid repeated setting of gpio lines, as it have multi bus support.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- Removed #define for I2C cahnnels from hearder file except for I2C0.
- Incorporated review comments from Simon Glass.
Changes in V3:
- Incorporated review comments from Joonyoung Shim.
- Reduced the number of #ifdef by modifying get_i2c_base function.
- Removed duplicate code.
Changes in V4:
- Resolved build error for s3c2410.
Changes in V5:
- Pinmux setting will be done in board/samsung/smdk5250/smdk5250.c
to avoid repeated setting of gpio lines, as it have multi bus support.
- I2C bus offset calulation done based on EXYNOS_I2C_SPACING
- Peripharal related code removed.
Changes in V6:
- g_current_bus made common to all platforms.
Changes in V7:
- moved get_base_i2c after initialising g_current_bus to 0.
- Corrected to when waiting for previous transfer to finish in
i2c_init.
- i2c_ch_init uses the arguments passed in i2c_init.
drivers/i2c/s3c24x0_i2c.c | 194 +++--
1 files changed, 117 insertions(+), 77 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index ba6f39b..26c0755 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -27,10 +27,15 @@
*/
#include common.h
+#ifdef CONFIG_EXYNOS5
+#include asm/arch/clk.h
+#include asm/arch/cpu.h
+#else
#include asm/arch/s3c24x0_cpu.h
-
+#endif
#include asm/io.h
#include i2c.h
+#include s3c24x0_i2c.h
#ifdef CONFIG_HARD_I2C
@@ -45,6 +50,7 @@
#define I2CSTAT_BSY0x20/* Busy bit */
#define I2CSTAT_NACK 0x01/* Nack bit */
+#define I2CCON_ACKGEN 0x80/* Acknowledge generation */
#define I2CCON_IRPND 0x10/* Interrupt pending bit */
#define I2C_MODE_MT0xC0/* Master Transmit Mode */
#define I2C_MODE_MR0x80/* Master Receive Mode */
@@ -53,6 +59,10 @@
#define I2C_TIMEOUT 1 /* 1 second */
+
+static unsigned int g_current_bus; /* Stores Current I2C Bus */
+
+#ifndef CONFIG_EXYNOS5
static int GetI2CSDA(void)
{
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
@@ -77,16 +87,17 @@ static void SetI2CSCL(int x)
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
#ifdef CONFIG_S3C2410
- writel((readl(gpio-gpedat) ~0x4000) | (x 1) 14, gpio-gpedat);
+ writel((readl(gpio-gpedat) ~0x4000) |
+ (x 1) 14, gpio-gpedat);
#endif
#ifdef CONFIG_S3C2400
writel((readl(gpio-pgdat) ~0x0040) | (x 1) 6, gpio-pgdat);
#endif
}
+#endif
-static int WaitForXfer(void)
+static int WaitForXfer(struct s3c24x0_i2c *i2c)
{
- struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
int i;
i = I2C_TIMEOUT * 1;
@@ -98,35 +109,75 @@ static int WaitForXfer(void)
return (readl(i2c-iiccon) I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
}
-static int IsACK(void)
+static int IsACK(struct s3c24x0_i2c *i2c)
{
- struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
-
return !(readl(i2c-iicstat) I2CSTAT_NACK);
}
-static void ReadWriteByte(void)
+static void ReadWriteByte(struct s3c24x0_i2c *i2c)
{
- struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
-
writel(readl(i2c-iiccon) ~I2CCON_IRPND, i2c-iiccon);
}
+static struct s3c24x0_i2c *get_base_i2c(void)
+{
+#ifdef CONFIG_EXYNOS5
+ struct s3c24x0_i2c *i2c = (struct s3c24x0_i2c *)(samsung_get_base_i2c()
+ + (EXYNOS5_I2C_SPACING
+ * g_current_bus));
+ return i2c;
+#else
+ return s3c24x0_get_base_i2c();
+#endif
+}
+
+static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd)
+{
+ ulong freq, pres = 16, div;
+#ifdef CONFIG_EXYNOS5
+ freq = get_i2c_clk();
+#else
+ freq = get_PCLK();
+#endif
+ /* calculate prescaler and divisor values */
+ if ((freq / pres / (16 + 1)) speed)
+ /* set prescaler to 512 */
+ pres = 512;
+
+ div = 0;
+ while ((freq / pres / (div + 1)) speed)
+ div++;
+
+ /* set prescaler, divisor according to
[U-Boot] [PATCH 7/8 V7] I2C: Add support for Multi channel
This adds multiple i2c channel support for I2C.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- None
Changes in V5:
- Pinmux setting of all bus done during board init.
Changes in V6:
- None
Changes in V7:
- None
drivers/i2c/s3c24x0_i2c.c | 27 +++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 26c0755..9bc4c7f 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -158,6 +158,33 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c, int
speed, int slaveadd)
writel(I2C_MODE_MT | I2C_TXRX_ENA, i2c-iicstat);
}
+/*
+ * MULTI BUS I2C support
+ */
+
+#ifdef CONFIG_I2C_MULTI_BUS
+int i2c_set_bus_num(unsigned int bus)
+{
+ struct s3c24x0_i2c *i2c;
+
+ if ((bus 0) || (bus = CONFIG_MAX_I2C_NUM)) {
+ debug(Bad bus: %d\n, bus);
+ return -1;
+ }
+
+ g_current_bus = bus;
+ i2c = get_base_i2c();
+ i2c_ch_init(i2c, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+ return 0;
+}
+
+unsigned int i2c_get_bus_num(void)
+{
+ return g_current_bus;
+}
+#endif
+
void i2c_init(int speed, int slaveadd)
{
struct s3c24x0_i2c *i2c;
--
1.7.4.4
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[U-Boot] [PATCH 8/8 V7] CONFIG: SMDK5250: I2C: Enable I2C
This enables I2C support on smdk5250.
Pinmux setting moved to board file to avoid repeated setting of
gpio lines.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- None
Changes in V5:
- Pinmux setting of gpio lines moved to board_early_init_f.
Changes in V6:
- EXYNOS_I2C_SPACING moved to cpu.h
- board_i2c_init compiled only when CONFIG_DRIVER_S3C24X0_I2C is
defined.
Changes in V7:
- board_i2c_init compiled only when CONFIG_SYS_I2C_INIT_BOARD is
defined.
board/samsung/smdk5250/smdk5250.c | 30 +-
include/configs/smdk5250.h| 10 ++
2 files changed, 39 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index b593325..a5816e4 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -22,6 +22,7 @@
#include common.h
#include asm/io.h
+#include i2c.h
#include netdev.h
#include asm/arch/cpu.h
#include asm/arch/gpio.h
@@ -172,9 +173,36 @@ static int board_uart_init(void)
return 0;
}
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+static int board_i2c_init(void)
+{
+ int i, err;
+
+ for (i = 0; i CONFIG_MAX_I2C_NUM; i++) {
+ err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
+ PINMUX_FLAG_NONE);
+ if (err) {
+ debug(I2C%d not configured\n, (PERIPH_ID_I2C0 + i));
+ return err;
+ }
+ }
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ return 0;
+}
+#endif
+
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
- return board_uart_init();
+ int err;
+ err = board_uart_init();
+ if (err) {
+ debug(UART init failed\n);
+ return err;
+ }
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+ err = board_i2c_init();
+#endif
+ return err;
}
#endif
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index c0eaaf8..27dab76 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -198,6 +198,16 @@
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR - 0x100)
+/* I2C */
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_HARD_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C_SPEED 10 /* 100 Kbps */
+#define CONFIG_DRIVER_S3C24X0_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_MAX_I2C_NUM 8
+#define CONFIG_SYS_I2C_SLAVE0x0
+
/* Ethernet Controllor Driver */
#ifdef CONFIG_CMD_NET
#define CONFIG_SMC911X
--
1.7.4.4
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[U-Boot] [PATCH 3/8 V7] EXYNOS5: define EXYNOS5_I2C_SPACING
This patch defined EXYNOS5_I2C_SPACING used to calculate I2C channel base address. Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes in V6: - New patch. Changes in V7: - None arch/arm/include/asm/arch-exynos/cpu.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index ab46b70..0e6ea87 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -58,6 +58,8 @@ #define EXYNOS4_GPIO_PART4_BASEDEVICE_NOT_AVAILABLE /* EXYNOS5 */ +#define EXYNOS5_I2C_SPACING0x1 + #define EXYNOS5_GPIO_PART4_BASE0x0386 #define EXYNOS5_PRO_ID 0x1000 #define EXYNOS5_CLOCK_BASE 0x1001 -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V2 13/15] S3C6400: clear memory init variable
Dear Zhong Hongno, On 14 July 2012 01:11, Zhong Hongbo bocui...@gmail.com wrote: From: Zhong Hongbo bocui...@gmail.com Signed-off-by: Zhong Hongbo bocui...@gmail.com --- Change for V2: - None. --- arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 173 +-- board/samsung/smdk6400/lowlevel_init.S | 13 +-- board/samsung/smdk6400/mem_init.S | 114 +- 3 files changed, 63 insertions(+), 237 deletions(-) diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h index 8d12cfa..6e22cd5 100644 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h @@ -41,189 +41,18 @@ #include asm/hardware.h #define ELFIN_CLOCK_POWER_BASE 0x7e00f000 - -/* - * GPIO - */ #define ELFIN_GPIO_BASE0x7f008000 - -/* - * Bus Matrix - */ -#define ELFIN_MEM_SYS_CFG 0x7e00f120 - -#define S3C64XX_MEM_SYS_CFG_16BIT (1 12) - -/* - * Memory controller - */ #define ELFIN_SROM_BASE0x7000 - -/* - * SDRAM Controller - */ #define ELFIN_DMC0_BASE0x7e00 #define ELFIN_DMC1_BASE0x7e001000 - -#define INDEX_DMC_MEMC_STATUS 0x00 -#define INDEX_DMC_MEMC_CMD 0x04 -#define INDEX_DMC_DIRECT_CMD 0x08 -#define INDEX_DMC_MEMORY_CFG 0x0C -#define INDEX_DMC_REFRESH_PRD 0x10 -#define INDEX_DMC_CAS_LATENCY 0x14 -#define INDEX_DMC_T_DQSS 0x18 -#define INDEX_DMC_T_MRD0x1C -#define INDEX_DMC_T_RAS0x20 -#define INDEX_DMC_T_RC 0x24 -#define INDEX_DMC_T_RCD0x28 -#define INDEX_DMC_T_RFC0x2C -#define INDEX_DMC_T_RP 0x30 -#define INDEX_DMC_T_RRD0x34 -#define INDEX_DMC_T_WR 0x38 -#define INDEX_DMC_T_WTR0x3C -#define INDEX_DMC_T_XP 0x40 -#define INDEX_DMC_T_XSR0x44 -#define INDEX_DMC_T_ESR0x48 -#define INDEX_DMC_MEMORY_CFG2 0x4C -#define INDEX_DMC_CHIP_0_CFG 0x200 -#define INDEX_DMC_CHIP_1_CFG 0x204 -#define INDEX_DMC_CHIP_2_CFG 0x208 -#define INDEX_DMC_CHIP_3_CFG 0x20C -#define INDEX_DMC_USER_STATUS 0x300 -#define INDEX_DMC_USER_CONFIG 0x304 - -/* - * Memory Chip direct command - */ -#define DMC_NOP0 0x0c -#define DMC_NOP1 0x1c -#define DMC_PA00x00/* Precharge all */ -#define DMC_PA10x10 -#define DMC_AR00x04/* Autorefresh */ -#define DMC_AR10x14 -#define DMC_SDR_MR00x080032/* MRS, CAS 3, Burst Length 4 */ -#define DMC_SDR_MR10x180032 -#define DMC_DDR_MR00x080162 -#define DMC_DDR_MR10x180162 -#define DMC_mDDR_MR0 0x080032/* CAS 3, Burst Length 4 */ -#define DMC_mDDR_MR1 0x180032 -#define DMC_mSDR_EMR0 0x0a/* EMRS, DS:Full, PASR:Full Array */ -#define DMC_mSDR_EMR1 0x1a -#define DMC_DDR_EMR0 0x09 -#define DMC_DDR_EMR1 0x19 -#define DMC_mDDR_EMR0 0x0a/* DS:Full, PASR:Full Array */ -#define DMC_mDDR_EMR1 0x1a - -/* - * Definitions for memory configuration - * Set memory configuration - * active_chips= 1'b0 (1 chip) - * qos_master_chip = 3'b000(ARID[3:0]) - * memory burst= 3'b010(burst 4) - * stop_mem_clock = 1'b0(disable dynamical stop) - * auto_power_down = 1'b0(disable auto power-down mode) - * power_down_prd = 6'b00_(0 cycle for auto power-down) - * ap_bit = 1'b0 (bit position of auto-precharge is 10) - * row_bits= 3'b010(# row address 13) - * column_bits = 3'b010(# column address 10 ) - * - * Set user configuration - * 2'b10=SDRAM/mSDRAM, 2'b11=DDR, 2'b01=mDDR - * - * Set chip select for chip [n] - * row bank control, bank address 0x3000_ ~ 0x37ff_ - * CHIP_[n]_CFG=0x30F8, 30: ADDR[31:24], F8: Mask[31:24] - */ - -/* - * Nand flash controller - */ +#define ELFIN_MEM_SYS_CFG 0x7e00f120 #define ELFIN_NAND_BASE0x7020 - -/* - * Interrupt - */ #define ELFIN_VIC0_BASE_ADDR 0x7120 #define ELFIN_VIC1_BASE_ADDR 0x7130 - -/* - * Watchdog timer - */ #define ELFIN_WATCHDOG_BASE0x7E004000 - -/* - * UART - */ #define ELFIN_UART_BASE0x7F005000 - -/* - * PWM timer - */ #define ELFIN_TIMER_BASE 0x7F006000 -/*--- - * Physical Memory Map - */ -#define DMC1_MEM_CFG 0x00010012 /* burst 4, 13-bit row, 10-bit col */ -#define DMC1_MEM_CFG2 0xB45 -#define DMC1_CHIP0_CFG 0x150F8 /* 0x5000_~0x57ff_ (128 MiB) */ -#define DMC_DDR_32_CFG 0x0 /* 32bit, DDR */ - -/* Memory Parameters */ -/* DDR Parameters */ -#define DDR_tREFRESH 7800/* ns */ -#define
Re: [U-Boot] [V2 12/15] S3c64xx: clear GPIO, Interrupt, Watchdog variable.
Dear Zhong Hongbo On 14 July 2012 01:11, Zhong Hongbo bocui...@gmail.com wrote: From: Zhong Hongbo bocui...@gmail.com Signed-off-by: Zhong Hongbo bocui...@gmail.com --- Change for V2: - None. --- arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 260 --- board/samsung/smdk6400/lowlevel_init.S | 23 ++-- 2 files changed, 11 insertions(+), 272 deletions(-) diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 79d5ab3..02828e8 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -46,13 +46,13 @@ lowlevel_init: /* LED on only #8 */ ldr r0, =ELFIN_GPIO_BASE ldr r1, =0x5554 - str r1, [r0, #GPNCON_OFFSET] + str r1, [r0, #0x830]@ GPNCON_OFFSET ldr r1, =0x - str r1, [r0, #GPNPUD_OFFSET] + str r1, [r0, #0x838]@ GPNPUD_OFFSET ldr r1, =0xf000 - str r1, [r0, #GPNDAT_OFFSET] + str r1, [r0, #0x834]@ GPNDAT_OFFSET /* Disable Watchdog */ ldr r0, =0x7e00 @0x7e004000 @@ -61,7 +61,7 @@ lowlevel_init: str r1, [r0] /* External interrupt pending clear */ - ldr r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET) /*EINTPEND*/ + ldr r0, =(ELFIN_GPIO_BASE + 0x924) /*EINTPEND*/ ldr r1, [r0] str r1, [r0] @@ -70,18 +70,18 @@ lowlevel_init: /* Disable all interrupts (VIC0 and VIC1) */ mvn r3, #0x0 - str r3, [r0, #oINTMSK] - str r3, [r1, #oINTMSK] + str r3, [r0, #0x14] @ INTMSK + str r3, [r1, #0x14] /* Set all interrupts as IRQ */ mov r3, #0x0 - str r3, [r0, #oINTMOD] - str r3, [r1, #oINTMOD] + str r3, [r0, #0x0c] @ INTMOD + str r3, [r1, #0x0c] /* Pending Interrupt Clear */ mov r3, #0x0 - str r3, [r0, #oVECTADDR] - str r3, [r1, #oVECTADDR] + str r3, [r0, #0xf00]@ VECTADDR + str r3, [r1, #0xf00] #ifdef CONFIG_SPL_BUILD /* init system clock */ @@ -136,7 +136,6 @@ wakeup_reset: mov pc, r1 nop nop - /* * system_clock_init: Initialize core clock and bus clock. * void system_clock_init(void) @@ -241,7 +240,7 @@ uart_asm_init: /* set GPIO to enable UART */ ldr r0, =ELFIN_GPIO_BASE ldr r1, =0x220022 - str r1, [r0, #GPACON_OFFSET] + str r1, [r0, #0x0] @ GPACON_OFFSET mov pc, lr #endif Too many magic numbers. Please fix it globally. Thanks. Minkyu Kang. -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V2 11/15] S3C64XX: Switch to use read/writel to operation clock system
Dear Zhong Hongbo, On 14 July 2012 01:11, Zhong Hongbo bocui...@gmail.com wrote: From: Zhong Hongbo bocui...@gmail.com Switch to use read/writel function and clear the relevant variable. Signed-off-by: Zhong Hongbo bocui...@gmail.com --- Change for V2: - merge clock patch. - Change the type of return for s3c64xx_get_base_clock function. --- arch/arm/cpu/arm1176/s3c64xx/reset.S|4 +- arch/arm/cpu/arm1176/s3c64xx/speed.c| 50 +-- arch/arm/include/asm/arch-s3c64xx/clock.h | 147 ++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 219 +-- board/samsung/smdk6400/lowlevel_init.S | 64 - drivers/usb/host/s3c64xx-hcd.c | 30 - 6 files changed, 243 insertions(+), 271 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S b/arch/arm/cpu/arm1176/s3c64xx/reset.S index eae572e..9e5ee84 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/reset.S +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S @@ -26,9 +26,9 @@ .globl reset_cpu reset_cpu: ldr r1, =ELFIN_CLOCK_POWER_BASE - ldr r2, [r1, #SYS_ID_OFFSET] + ldr r2, [r1, #0x118]@ SYS_ID_OFFSET ldr r3, =0x and r2, r3, r2, lsr #12 - str r2, [r1, #SW_RST_OFFSET] + str r2, [r1, #0x114]@ SW_RST_OFFSET Don't use magic numbers. And I think this file can be converted to C file. _loop_forever: b _loop_forever diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 6cc7567..79d5ab3 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -106,7 +106,7 @@ lowlevel_init: #endif /* Wakeup support. Don't know if it's going to be used, untested. */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0x904) @ RST_STAT_OFFSET ldr r1, [r0] bic r1, r1, #0xfff7 cmp r1, #0x8 @@ -119,23 +119,24 @@ lowlevel_init: wakeup_reset: /* Clear wakeup status register */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET) + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0x908) @ WAKEUP_STAT_OFFSET ldr r1, [r0] str r1, [r0] /* LED test */ ldr r0, =ELFIN_GPIO_BASE ldr r1, =0x3000 - str r1, [r0, #GPNDAT_OFFSET] + str r1, [r0, #0x834]@ GPNDAT_OFFSET /* Load return address and jump to kernel */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET) + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0xa00) @ INF_REG0_OFFSET /* r1 = physical address of s3c6400_cpu_resume function */ ldr r1, [r0] /* Jump to kernel (sleep-s3c6400.S) */ mov pc, r1 nop nop + /* * system_clock_init: Initialize core clock and bus clock. * void system_clock_init(void) @@ -144,10 +145,10 @@ system_clock_init: ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */ #ifdef CONFIG_SYNC_MODE - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900]@ OTHERS_OFFSET mov r2, #0x40 orr r1, r1, r2 - str r1, [r0, #OTHERS_OFFSET] + str r1, [r0, #0x900] nop nop @@ -157,10 +158,10 @@ system_clock_init: ldr r2, =0x80 orr r1, r1, r2 - str r1, [r0, #OTHERS_OFFSET] + str r1, [r0, #0x900] check_syncack: - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900] ldr r2, =0xf00 and r1, r1, r2 cmp r1, #0xf00 @@ -177,69 +178,58 @@ check_syncack: * seem to make much sense on S3C6400. */ #ifndef CONFIG_S3C6400 - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900]@ OTHERS_OFFSET bic r1, r1, #0xC0 orr r1, r1, #0x40 - str r1, [r0, #OTHERS_OFFSET] + str r1, [r0, #0x900] wait_for_async: - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900]@ OTHERS_OFFSET and r1, r1, #0xf00 cmp r1, #0x0 bne wait_for_async #endif - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900]@ OTHERS_OFFSET bic r1, r1, #0x40 - str r1, [r0, #OTHERS_OFFSET] + str r1, [r0, #0x900] #endif mov r1, #0xff00 orr r1, r1, #0xff - str r1, [r0, #APLL_LOCK_OFFSET] - str r1, [r0, #MPLL_LOCK_OFFSET] + str r1, [r0, #0x0] @ APLL_LOCK_OFFSET + str r1, [r0, #0x4] @ MPLL_LOCK_OFFSET /* Set Clock Divider */ - ldr r1, [r0,
Re: [U-Boot] [PATCH] dts/Makefile: Turn off system-/gcc-specific predefined macros
On 07/19/2012 05:22 AM, Mike Frysinger wrote: On Friday 13 July 2012 09:03:40 Horst Kronstorfer wrote: Add '-undef' to DTS_CPPFLAGS to avoid unwanted expansion of dts content that matches system-specific or gcc-specific predefined macros. Example: A number of PowerPC related *.dts files in the kernel define a property named 'linux,network-index' which (w/o '-undef') is expanded to '1,network-index' by the preprocessor because of '#define linux 1.' i think you should use -ansi instead. that's what we use in other places for the same reason. -mike this would increase the probability of a name clash. -h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] spi: microblaze: Adds driver for Xilinx SPI controller
On 07/14/2012 12:30 AM, Stephan Linz wrote:
This is an improved version of the driver patch original
submitted by Graeme Smecher graeme.smec...@mail.mcgill.ca
The changes are:
- remove hard coded Xilinx BSP defines (XPAR_SPI_*) and
use CONFIG_SYS_SPI_BASE from config.h instead
- add extensive register struct definitions
- remove offset calculation for register access and
use the new register struct instead
- move default SPI controller configuration from
spi_setup_slave() to spi_claim_bus()
- add spi_set_speed()
- insert SPI controller deactivation in spi_release_bus()
- protect while loops in spi_xfer() with counter / timeouts
- support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP
Come from:
http://patchwork.ozlabs.org/patch/71797/
Applied with:
git apply -v --whitespace=fix --reject \
U-Boot-Adds-driver-for-Xilinx-xps_spi-SPI-controller.patch
not interesting in description.
Fix manual:
drivers/spi/Makefile
this too.
Signed-off-by: Stephan Linz l...@li-pro.net
---
drivers/spi/Makefile |1 +
drivers/spi/xilinx_spi.c | 210 ++
drivers/spi/xilinx_spi.h | 135 +
3 files changed, 346 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/xilinx_spi.c
create mode 100644 drivers/spi/xilinx_spi.h
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c967d87..3ae38e5 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -44,6 +44,7 @@ COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
COBJS-$(CONFIG_SH_SPI) += sh_spi.o
COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
COBJS-$(CONFIG_TEGRA2_SPI) += tegra2_spi.o
+COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
new file mode 100644
index 000..4d83bd3
--- /dev/null
+++ b/drivers/spi/xilinx_spi.c
@@ -0,0 +1,210 @@
+/*
+ * Xilinx SPI driver
+ *
+ * supports 8 bit SPI transfers only, with or w/o FIFO
+ *
+ * based on bfin_spi.c, by way of altera_spi.c
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ * Copyright (c) 2010 Thomas Chou tho...@wytron.com.tw
+ * Copyright (c) 2010 Graeme Smecher graeme.smec...@mail.mcgill.ca
+ * Copyright (c) 2012 Stephan Linz l...@li-pro.net
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ * [0]: http://www.xilinx.com/support/documentation
+ *
+ * [S]:[0]/ip_documentation/xps_spi.pdf
+ * [0]/ip_documentation/axi_spi_ds742.pdf
+ */
+#include config.h
+#include common.h
+#include malloc.h
+#include spi.h
+
+#include xilinx_spi.h
+
+#ifndef CONFIG_SYS_XILINX_SPI_LIST
+#define CONFIG_SYS_XILINX_SPI_LIST { CONFIG_SYS_SPI_BASE }
+#endif
+
+#ifndef CONFIG_XILINX_SPI_IDLE_VAL
+#define CONFIG_XILINX_SPI_IDLE_VAL 0xff
+#endif
+
+#define XILSPI_SPICR_DFLT_ON (SPICR_MANUAL_SS | \
+SPICR_MASTER_MODE | \
+SPICR_SPE)
+
+#define XILSPI_SPICR_DFLT_OFF (SPICR_MASTER_INHIBIT | \
+SPICR_MANUAL_SS)
+
+#define XILSPI_MAX_XFER_BITS 8
+
+static unsigned long xilinx_spi_base_list[] = CONFIG_SYS_XILINX_SPI_LIST;
+
+__attribute__((weak))
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus ARRAY_SIZE(xilinx_spi_base_list) cs 32;
+}
+
+__attribute__((weak))
+void spi_cs_activate(struct spi_slave *slave)
+{
+ struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
newline
+ writel(SPISSR_ACT(slave-cs), xilspi-regs-spissr);
+}
+
+__attribute__((weak))
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
newline
+ writel(SPISSR_OFF, xilspi-regs-spissr);
+}
+
+void spi_init(void)
+{
+ /* do nothing */
+}
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+ /* xilinx spi core does not support programmable speed */
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct xilinx_spi_slave *xilspi;
+ struct xilinx_spi_reg *regs;
+
+ if (!spi_cs_is_valid(bus, cs)) {
+ printf(XILSPI error: %s: unsupported bus %d / cs %d\n,
+ __func__, bus, cs);
+ return NULL;
+ }
+
+ xilspi = malloc(sizeof(*xilspi));
+ if (!xilspi) {
+ printf(XILSPI error: %s: malloc of SPI structure failed\n,
+ __func__);
+ return NULL;
+ }
+ xilspi-slave.bus = bus;
+ xilspi-slave.cs = cs;
+ xilspi-regs = (struct xilinx_spi_reg *)xilinx_spi_base_list[bus];
+ xilspi-freq = max_hz;
+ xilspi-mode = mode;
+ debug(%s: bus:%i cs:%i base:%p mode:%x max_hz:%d\n, __func__,
+ bus, cs,
Re: [U-Boot] [PATCH] net: Make sure the ethaddr is updated in net_init()
On Tue, July 24, 2012 01:11, Joe Hershberger wrote: NetConsole may call NetSendUDPPacket before NetLoop is called. This will cause the source MAC address (NetOurEther) to be wrong. Instead of only changing it in NetLoop, move it to NetLoopInit so that it is also updated when net_init() is called (especially by nc_start()). Signed-off-by: Joe Hershberger joe.hershber...@ni.com Reported-by: Michael Walle mich...@walle.cc --- net/net.c |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/net/net.c b/net/net.c index 9de7d92..e8ff066 100644 --- a/net/net.c +++ b/net/net.c @@ -256,6 +256,7 @@ static void NetInitLoop(void) #endif env_changed_id = env_id; } + memcpy(NetOurEther, eth_get_dev()-enetaddr, 6); return; } This was exactly my (quick) fix, too. Therefore, Acked-by: Michael Walle mich...@walle.cc ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Unable to power the USB Keyboard on u-boot
On Friday 20 July 2012 07:10 PM, Marek Vasut wrote: Dear Marek, Thanks for your reply.. Dear Atul Kumar, Dear All, I am trying to use usb keyboard on u-boot. I am using the u-boot stack which was shared by you. Can you help me to know where problem is going. I am sending some of debug prints which i found on my Beagle board xM. I have connected usb mouse and usb keyboard on same side of port, here usb mouse lights up but the keyboard does not powers on. Both keyboard and Mouse are from logitech. Please help me to make this up as i have scheduled demo. [...] What version of uboot is that? Try with latest u-boot git head, it should have the beagleboard/usb patches in there. Best regards, Marek Vasut I am using u-boot version 2011-12 shared by Mr. Govind (ti) which was 1st updated by him.. I have also tried with the latest git: u-boot-2012.07-rc1 but it is poping with error : v7_dcache_inval_range - start address is not aligned. Do we have any solution for this. As i have also tried with Externally powered usb hub but it does not even initializes with it. Although i can see the device Name in uusb tree. Any suggestion or solutions are always welcome. Thanks Regards Atul Kumar ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/5] ehci-hcd: Boost transfer speed
Am 23.07.2012 19:15, schrieb Benoît Thébaudeau: On Monday 23 July 2012 15:35:25 Stefan Herbrechtsmeier wrote: Am 20.07.2012 17:35, schrieb Benoît Thébaudeau: On Friday 20 July 2012 17:15:13 Stefan Herbrechtsmeier wrote: Am 20.07.2012 17:03, schrieb Benoît Thébaudeau: On Friday 20 July 2012 16:51:33 Stefan Herbrechtsmeier wrote: Am 20.07.2012 15:56, schrieb Benoît Thébaudeau: Dear Marek Vasut, On Friday 20 July 2012 15:44:01 Marek Vasut wrote: On Friday 20 July 2012 13:37:37 Stefan Herbrechtsmeier wrote: Am 20.07.2012 13:26, schrieb Benoît Thébaudeau: + int xfr_bytes = min(left_length, + (QT_BUFFER_CNT * 4096 - +((uint32_t)buf_ptr 4095)) + ~4095); Why you align the length to 4096? It's to guarantee that each transfer length is a multiple of the max packet length. Otherwise, early short packets are issued, which breaks the transfer and results in time-out error messages. Early short packets ? What do you mean? During a USB transfer, all packets must have a length of max packet length for the pipe/endpoint, except the final one that can be a short packet. Without the alignment I make for xfr_bytes, short packets can occur within a transfer, because the hardware starts a new packet for each new queued qTD it handles. But if I am right, the max packet length is 512 for bulk and 1024 for Interrupt transfer. There are indeed different max packet lengths for different transfer types, but it does not matter since the chosen alignment guarantees a multiple of all these possible max packet lengths. But thereby you limit the transfer to 4 qT buffers for unaligned transfers. Not exactly. The 5 qt_buffers are used for page-unaligned buffers, but that results in only 4 full pages of unaligned data, requiring 5 aligned pages. Sorry I mean 4 full pages of unaligned data. For page-aligned buffers, the 5 qt_buffers result in 5 full pages of aligned data. Sure. The unaligned case could be a little bit improved to always use as many packets as possible per qTD, but that would over-complicate things for a very negligible speed and memory gain. In my use case (fragmented file on usb storage) the gain would be nearly 20%. The reason is that the data are block aligned (512) and could be aligned to 4096 with the first transfer (5 qt_buffers). Can you explain where this gain would come from? In both cases, the data in USB transfers would be organized in the same way, and it would be accessed in memory also in the same way (regarding bursts). The only difference would be the fetch time of a little bit more qTDs, which is extremely fast and insignificant compared to the transfer time of the payload, which remains unchanged. You are right, the speed different will be minimal, only the memory usage will be lower. Moreover, in your use case, if you are e.g. using FAT, on the one hand, the buffers in fat.c are never aligned to more than the DMA min alignment, and on the other hand, if you can align your user buffers to 512 bytes, you can also align them directly to 4 kB. The user buffer is aligned to 4kB, but this doesn't matter as a file load from a storage device (ex. fatload) can be segmented in partial USB transfers. This can lead to any block aligned buffer for a partial transfer. My suggestion would be to truncate the xfr_bytes with the max wMaxPacketSize (1024) and for the qtd_count use: if ((uint32_t)buffer 1023)/* wMaxPacketSize unaligned */ qtd_count += DIV_ROUND_UP(((uint32_t)buffer 4095) + length, (QT_BUFFER_CNT - 1) * 4096); else/* wMaxPacketSize aligned */ qtd_count += DIV_ROUND_UP(((uint32_t)buffer 4095) + length, QT_BUFFER_CNT * 4096); This allows 50% of unaligned block data (512) to be transferred with min qTDs. That would also require a realignment-to-page stage. This is specific code for specific buffer alignment from the upper layers. We could also skip the realignment to page and always keep the same qTD transfer size except for the last one, by adding as many packets as possible for the buffer alignment. What you mean by realignment-to-page stage? But I still don't see a significant reason to complicate code to do that. I don't understand where you expect to complicate the code. You limit the size of one transfer (xfr_bytes) to (QT_BUFFER_CNT - 1) * 4kB for unaligned buffers. But you only need to limit it to a multiple of the maximal possible wMaxPacketSize (1kB) to make sure that you always send full packages. I only suggest to replace the causeless 4kB alignment with a reasonable 1kB alignment and adapte the qtd_count caluclation. int xfr_bytes = min(left_length, (QT_BUFFER_CNT * 4096 - ((uint32_t)buf_ptr 4095)) -
Re: [U-Boot] [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
On Sat, Jul 21, 2012 at 4:02 PM, Marek Vasut ma...@denx.de wrote:
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Warren twar...@nvidia.com
Cc: Wolfgang Denk w...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: U-Boot DM u-boot...@lists.denx.de
Acked-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/armv7/tegra2/usb.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/usb.c b/arch/arm/cpu/armv7/tegra2/usb.c
index 5f2b243..ea7f701 100644
--- a/arch/arm/cpu/armv7/tegra2/usb.c
+++ b/arch/arm/cpu/armv7/tegra2/usb.c
@@ -158,7 +158,8 @@ static void set_host_mode(struct fdt_usb *config)
}
}
-void usbf_reset_controller(struct fdt_usb *config, struct usb_ctlr *usbctlr)
+static void usbf_reset_controller(struct fdt_usb *config,
+ struct usb_ctlr *usbctlr)
{
/* Reset the USB controller with 2us delay */
reset_periph(config-periph_id, 2);
@@ -382,8 +383,8 @@ int tegrausb_stop_port(void)
return 0;
}
-int fdt_decode_usb(const void *blob, int node, unsigned osc_frequency_mhz,
- struct fdt_usb *config)
+static int fdt_decode_usb(const void *blob, int node,
+ unsigned osc_frequency_mhz, struct fdt_usb *config)
{
const char *phy, *mode;
--
1.7.10.4
___
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[U-Boot] RFC - PatchTrack Specification (revised)
A revised version of the spec (sorry, I would have used reply-to but something went amiss with gmail and I've lost the original) Regards, Graeme --- PatchTrack is designed to help alleviate some of the load from custodians managing an email based work flow accepting patches from a large community of contributors Core Concepts: PatchTrack monitors an email inbox which has been configured to receive emails from a group mailing list. PatchTrack scans incoming emails and determines, for each inbound email, if the email is: - A new single stand-alone patch - A new patch which is part of a series of patches (i.e. patch x of y) - A summary patch of a series of patches (i.e. patch 0 of y) - A revised version of an existing patch - A comment on an existing patch - A 'feedback tag' (Ack, Nack, Tested, etc.) for an existing patch Based upon the above determination of the incoming email, PatchTrack performs one of several 'Operation Sequences' Operation Sequence - New single stand-alone patch: - Determine which git repository the patch is intended to be applied to - Add the patch to the top of the 'patch stack' of the target repository NOTE: Patches are placed in the patch stack in the order they are received - Run the configurable set of sanity checks on the raw patch. A typical example is the checkpatch.pl script which checks the patch for correct style - Perform a dummy git-apply of the patch onto the HEAD of the target repository with all patches already on the repositories 'patch stack' applied - Record the results of the sanity checks and git-apply against the patch Operation Sequence - New patch which is part of a series: - As part 'New single stand-alone patch' NOTE: Patches within a series are added to the patch stack in the order specified in the series - Record patch as being part of a series Operation Sequence - Summary patch of a series - Group all patches of the series under this patch Operation Sequence - Revised version of existing patch - Remove existing patch from patch stack - Insert new patch into patch stack at same location as the removed patch - Run the configurable set of sanity checks on the raw patch. A typical example is the checkpatch.pl script which checks the patch for correct style - Perform a dummy git-apply of the patch onto the HEAD of the target repository with all patches already on the repositories 'patch stack' applied - Record the results of the sanity checks and git-apply against the patch The Patch Stack: The patch stack is a doubly linked-list of patches. The 'zeroth' patch is the HEAD of the associated git repository to which all subsequent patches on the stack are applied. The objective of the patch stack is to quickly visualise which patches pass some basic, pre-determined sanity checks. By performing these basic tests, the maintainers (and the community as a whole) is spared the trouble of wasting time on broken patches. For reference, the first patch after the 'zeroth' patch is defined as being at the bottom of the stack. There are two types of tests performed against each patch - Stand-alone and inter-dependent tests. Hmmm, 'static' and 'dynamic' ? Stand-alone test are valid no matter where the patch is in the patch stack. Typically, these tests validate coding style, correct signed-off-by lines, compatible licensing (if present in the patch), etc. Stand-alone tests only need to be performed once per patch (and re-run when a new revision of the patch is submitted) Inter-Dependent tests are tests for which the outcome will depend on the order of the patches in the patch-set (including the zeroth patch). The most typical inter-dependent test is the 'git-apply' test which checks that the patch will apply cleanly to the repository. Every time the patch stack is modified (patch added, removed, replaced, re-ordered, etc.) all inter- dependent tests are re-run for each patch in the patch stack. When a patch fails an inter-dependent test, it may not be necessary to stop running the inter-dependent tests on subsequent patches. For example, if the first patch in the stack fails to apply to the head of the repository, it is not necessarily true that all subsequent patches will also fail. Therefore, the patch is marked as being excluded from the inter-dependency chain. The web interface (see below) will allow a user to clearly see which patches have passed all of the stand-alone and inter-dependent tests. Web Interface In addition to processing inbound emails, PatchTrack includes web interface which allows a user to: - Visualise the state of the patch stack for a given repository * Passed sanity checks * Passed git-apply * Acked * Tested * Committed NOTE: The patch stack is displayed as a series of rows in a table - One row per patch. The colour of the row can be configured for each patch state. For example, 'Acked' might be blue and 'Committed' white - View the meta data of each
Re: [U-Boot] [V2 11/15] S3C64XX: Switch to use read/writel to operation clock system
On 07/24/2012 04:58 PM, Minkyu Kang wrote: Dear Zhong Hongbo, On 14 July 2012 01:11, Zhong Hongbo bocui...@gmail.com wrote: From: Zhong Hongbo bocui...@gmail.com Switch to use read/writel function and clear the relevant variable. Signed-off-by: Zhong Hongbo bocui...@gmail.com --- Change for V2: - merge clock patch. - Change the type of return for s3c64xx_get_base_clock function. --- arch/arm/cpu/arm1176/s3c64xx/reset.S|4 +- arch/arm/cpu/arm1176/s3c64xx/speed.c| 50 +-- arch/arm/include/asm/arch-s3c64xx/clock.h | 147 ++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 219 +-- board/samsung/smdk6400/lowlevel_init.S | 64 - drivers/usb/host/s3c64xx-hcd.c | 30 - 6 files changed, 243 insertions(+), 271 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S b/arch/arm/cpu/arm1176/s3c64xx/reset.S index eae572e..9e5ee84 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/reset.S +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S @@ -26,9 +26,9 @@ .globl reset_cpu reset_cpu: ldr r1, =ELFIN_CLOCK_POWER_BASE - ldr r2, [r1, #SYS_ID_OFFSET] + ldr r2, [r1, #0x118]@ SYS_ID_OFFSET ldr r3, =0x and r2, r3, r2, lsr #12 - str r2, [r1, #SW_RST_OFFSET] + str r2, [r1, #0x114]@ SW_RST_OFFSET Don't use magic numbers. Ok, I will keep the old method. And I think this file can be converted to C file. Yes, I will do it. _loop_forever: b _loop_forever diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 6cc7567..79d5ab3 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -106,7 +106,7 @@ lowlevel_init: #endif /* Wakeup support. Don't know if it's going to be used, untested. */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0x904) @ RST_STAT_OFFSET ldr r1, [r0] bic r1, r1, #0xfff7 cmp r1, #0x8 @@ -119,23 +119,24 @@ lowlevel_init: wakeup_reset: /* Clear wakeup status register */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET) + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0x908) @ WAKEUP_STAT_OFFSET ldr r1, [r0] str r1, [r0] /* LED test */ ldr r0, =ELFIN_GPIO_BASE ldr r1, =0x3000 - str r1, [r0, #GPNDAT_OFFSET] + str r1, [r0, #0x834]@ GPNDAT_OFFSET /* Load return address and jump to kernel */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET) + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0xa00) @ INF_REG0_OFFSET /* r1 = physical address of s3c6400_cpu_resume function */ ldr r1, [r0] /* Jump to kernel (sleep-s3c6400.S) */ mov pc, r1 nop nop + /* * system_clock_init: Initialize core clock and bus clock. * void system_clock_init(void) @@ -144,10 +145,10 @@ system_clock_init: ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */ #ifdef CONFIG_SYNC_MODE - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900]@ OTHERS_OFFSET mov r2, #0x40 orr r1, r1, r2 - str r1, [r0, #OTHERS_OFFSET] + str r1, [r0, #0x900] nop nop @@ -157,10 +158,10 @@ system_clock_init: ldr r2, =0x80 orr r1, r1, r2 - str r1, [r0, #OTHERS_OFFSET] + str r1, [r0, #0x900] check_syncack: - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900] ldr r2, =0xf00 and r1, r1, r2 cmp r1, #0xf00 @@ -177,69 +178,58 @@ check_syncack: * seem to make much sense on S3C6400. */ #ifndef CONFIG_S3C6400 - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900]@ OTHERS_OFFSET bic r1, r1, #0xC0 orr r1, r1, #0x40 - str r1, [r0, #OTHERS_OFFSET] + str r1, [r0, #0x900] wait_for_async: - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900]@ OTHERS_OFFSET and r1, r1, #0xf00 cmp r1, #0x0 bne wait_for_async #endif - ldr r1, [r0, #OTHERS_OFFSET] + ldr r1, [r0, #0x900]@ OTHERS_OFFSET bic r1, r1, #0x40 - str r1, [r0, #OTHERS_OFFSET] + str r1, [r0, #0x900] #endif mov r1, #0xff00 orr r1, r1, #0xff - str r1, [r0, #APLL_LOCK_OFFSET] - str r1, [r0, #MPLL_LOCK_OFFSET] + str r1, [r0, #0x0] @ APLL_LOCK_OFFSET + str
Re: [U-Boot] [V2 14/15] S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board
Hi Minkyu, On 07/24/2012 10:38 AM, Minkyu Kang wrote: Dear Zhong Hongbo, On 14 July 2012 01:11, Zhong Hongbo bocui...@gmail.com wrote: From: Zhong Hongbo bocui...@gmail.com Signed-off-by: Zhong Hongbo bocui...@gmail.com --- Change for V2: - New. --- arch/arm/cpu/arm1176/s3c64xx/pwm.c |2 +- arch/arm/cpu/arm1176/s3c64xx/reset.S|2 +- arch/arm/cpu/arm1176/s3c64xx/speed.c|2 +- arch/arm/cpu/arm1176/s3c64xx/srom.c |2 +- arch/arm/cpu/arm1176/s3c64xx/timer.c|2 +- arch/arm/include/asm/arch-s3c64xx/cpu.h | 83 ++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 84 --- board/samsung/smdk6400/lowlevel_init.S |2 +- board/samsung/smdk6400/mem_init.S |2 +- board/samsung/smdk6400/smdk6400.c |2 +- drivers/mtd/nand/s3c64xx.c |2 +- drivers/serial/s3c64xx.c|2 +- drivers/usb/host/s3c64xx-hcd.c |2 +- 13 files changed, 94 insertions(+), 95 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c b/arch/arm/cpu/arm1176/s3c64xx/pwm.c index d1d70ff..02822fc 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/pwm.c +++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c @@ -28,7 +28,7 @@ #include errno.h #include pwm.h #include asm/io.h -#include asm/arch/s3c6400.h +#include asm/arch/cpu.h #include asm/arch/pwm.h int pwm_enable(int pwm_id) diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S b/arch/arm/cpu/arm1176/s3c64xx/reset.S index 9e5ee84..ee96d6c 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/reset.S +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S @@ -21,7 +21,7 @@ * MA 02111-1307 USA */ -#include asm/arch/s3c6400.h +#include asm/arch/cpu.h .globl reset_cpu reset_cpu: diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c index 05b44b9..5e68090 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/speed.c +++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c @@ -32,7 +32,7 @@ #include common.h #include asm/io.h -#include asm/arch/s3c6400.h +#include asm/arch/cpu.h #include asm/arch/clock.h #define APLL 0 diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c b/arch/arm/cpu/arm1176/s3c64xx/srom.c index f1b2b34..92fb7af 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/srom.c +++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c @@ -25,7 +25,7 @@ #include common.h #include asm/io.h #include asm/arch/sromc.h -#include asm/arch/s3c6400.h +#include asm/arch/cpu.h /* * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the * band width control and bank control registers diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c index 47d7731..eebd0c0 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/timer.c +++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c @@ -25,7 +25,7 @@ #include common.h #include asm/io.h -#include asm/arch/s3c6400.h +#include asm/arch/cpu.h #include asm/arch/pwm.h #include pwm.h diff --git a/arch/arm/include/asm/arch-s3c64xx/cpu.h b/arch/arm/include/asm/arch-s3c64xx/cpu.h new file mode 100644 index 000..5c8dd9d --- /dev/null +++ b/arch/arm/include/asm/arch-s3c64xx/cpu.h @@ -0,0 +1,83 @@ +/* + * (C) Copyright 2007 + * Byungjae Lee, Samsung Erectronics, bj...@samsung.com. + * - only support for S3C6400 + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, l...@denx.de + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/ + * NAME: s3c64XX.h + * + * Based on S3C64XX User's manual Rev 0.0 + / + +#ifndef __ASM_ARCH_CPU_H__ +#define __ASM_ARCH_CPU_H__ + +#if defined(CONFIG_SYNC_MODE) defined(CONFIG_S3C6400) +#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration! +#endif + +#define S3C64XX_UART_CHANNELS 3 +#define S3C64XX_SPI_CHANNELS 2 + +#include asm/hardware.h + +#define ELFIN_CLOCK_POWER_BASE 0x7e00f000 +#define ELFIN_GPIO_BASE
Re: [U-Boot] [PATCH] dts/Makefile: Turn off system-/gcc-specific predefined macros
On Tuesday 24 July 2012 06:11:04 Horst Kronstorfer wrote: On 07/19/2012 05:22 AM, Mike Frysinger wrote: On Friday 13 July 2012 09:03:40 Horst Kronstorfer wrote: Add '-undef' to DTS_CPPFLAGS to avoid unwanted expansion of dts content that matches system-specific or gcc-specific predefined macros. Example: A number of PowerPC related *.dts files in the kernel define a property named 'linux,network-index' which (w/o '-undef') is expanded to '1,network-index' by the preprocessor because of '#define linux 1.' i think you should use -ansi instead. that's what we use in other places for the same reason. this would increase the probability of a name clash. no idea what you're talking about. have you actually looked at the output of `gcc -E -dD -ansi` ? -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Need help to get u-boot running on the taskit stamp9g20
On Sun, Jul 22, 2012 at 12:03:25AM +0200, Wolfgang Denk wrote:
Dear Markus Hubig,
In message 20120720142655.gb20...@imko.de you wrote:
And the only setting I found in my board support code (stamp9g20.h)
that is obviously realated to this malloc-thing is:
| #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE \
| + 128*1024, 0x1000)
| #define CONFIG_SYS_GBL_DATA_SIZE 128
See commit 25ddd1f and get rid of CONFIG_SYS_GBL_DATA_SIZE
but this values are all copied from the original (and once working)
patch from taskit ...
once working = now obsoleted.
Hmm OK. I got rid of this config setting. But I'm actually not a single
step further... I looked at every single commit of the at91sam9260ek code
to get a understanding what the problem is but didn't get a clue ...
Is it the nand? If I don't enable #DEBUG u-boot mostly stops at the
NAND: -Prompt. But the nand stuff in my stam9g20.c file is actually the
same as in at91sam9260ek.c:
| static void stamp9g20_nand_hw_init(void)
| {
| struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
| struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
| unsigned long csa;
|
| /* Assign CS3 to NAND/SmartMedia Interface */
| csa = readl(matrix-ebicsa);
| csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
| writel(csa, matrix-ebicsa);
|
| /* Configure SMC CS3 for NAND/SmartMedia */
| writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
| AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
| smc-cs[3].setup);
| writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
| AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
| smc-cs[3].pulse);
| writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
| smc-cs[3].cycle);
| writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
| AT91_SMC_MODE_EXNW_DISABLE |
| AT91_SMC_MODE_DBW_8 |
| AT91_SMC_MODE_TDF_CYCLE(2),
| smc-cs[3].mode);
|
| /* Configure RDY/BSY */
| at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
|
| /* Enable NandFlash */
| at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
|
| }
Is it a relocation problem? If I enable #DEBUG u-boot mostly stops at the
relocation prombt here:
| relocation Offset is: 0007c000
or here:
| relocation Offset is: 0007e000
| WARNING: Caches not enabled
| monitor flash len: 00035820
| Now running in RAM - U-Boot at: 23f7e000
I looked at every single byte on the internet an I found some information
that in order to get this bad-ass relocation to work, one needs to adapt
at91bootstrap to work with u-boot. Could this be my problem? At the moment
I'm using the original at91bootstrap from taskit.
Here is what I think the problem could, maybe, be:
1. Board gets powered on.
2. at91bootstrap magically starts.
3. It reads IMG_SIZE from IMG_ADDRESS and writes it to JUMP_ADDR in RAM.
- IMG_ADDRESS is where I write u-boot to inside NAND?
- IMG_SIZE should be the size of u-boot.bin? (exactly or is a bigger
size OK?)
- JUMP_ADDR is where u-boot is relocated to in RAM. Should be
CONFIG_SYS_TEXT_BASE?
4. at91bootstrap sets the PC to JUMP_ADDR and starts u-boot.
Since IMG_SIZE in at91bootstrap is not the size of my new u-boot.bin it
crashes after relocation!
I tried to build at91bootstrap_3.x from
https://github.com/linux4sam/at91bootstrap
but it didn't work. What is the preferred version to use? Orig from atmel? 3.x
2.x?
Cheers, Markus
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Re: [U-Boot] [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
Marek,
-Original Message-
From: Marek Vasut [mailto:ma...@denx.de]
Sent: Monday, July 23, 2012 11:24 PM
To: Simon Glass
Cc: u-boot@lists.denx.de; u-boot...@lists.denx.de; Tom Warren; Wolfgang
Denk; Albert Aribaud
Subject: Re: [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
Dear Simon Glass,
On Sat, Jul 21, 2012 at 4:02 PM, Marek Vasut ma...@denx.de wrote:
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Warren twar...@nvidia.com
Cc: Wolfgang Denk w...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: U-Boot DM u-boot...@lists.denx.de
Acked-by: Simon Glass s...@chromium.org
Simon, can you please pick up this one separatelly through your tree? I
already agreed with Tom to rip this apart as it's not really a series, but
rather a dump of random patches and cleanups. This is basically the first
chapter of my crusade towards making you crazy from breakage ... I mean ...
cleaning up drivers scattered across arch/ directory and moving them to
drivers/ directory ...
Simon doesn't manage the Tegra repo, I do. Simon is the most prodigious Tegra
submitter by far, but he's a Google employee, not an Nvidian.
I don't recall any conversation with you WRT this patch series ('rip this
apart'?), and see nothing in my archived U-Boot emails about it - is there
another Tom (Rini? or Rix?) that you had this convo with?
Regardless, I'll apply this to u-boot-tegra/master /next since the changes
are trivial. Note that any future Tegra changes will need to be rebased against
master, as Allen's SPL rewrite/rework caused a lot of files to move around.
Tom
--
nvpublic
Best regards,
Marek Vasut
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Re: [U-Boot] building tools/env
Had you find a solution to your problem. I have the same problem. Thanks, steverino2 wrote: hi there, I'm attempting to build u-boot 1.1.1 tools/env and the build is failed. Any ideas on best way to enable it in the build. Here's what I did so far first, update tools/Makefile TOOLSUBDIRS = env then top level build make clobber mrproper make octeon_cn3010_evb_hs5_config make all the build in tools/env fails due to missing include files linux/mtd/mtd.h zlib.h add to tools/env/Makefile CPPFLAGS += ../../include and include CPPFLAGS here: fw_printenv : $(SOURCES) $(HEADERS) $(CROSS_COMPILE)gcc -Wall $(CPPFLAGS) -DUSE_HOSTCC $(SOURCES) -o fw_printenv but this leads to build error on definitions of uint32_t, phys_addr_t and erase_info_t Any ideas on preferred way to build tools/env? thanks in advance! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- View this message in context: http://old.nabble.com/-U-Boot--building-tools-env-tp28669277p34205899.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] building tools/env
On Tuesday 24 July 2012 11:23:03 Nickos wrote: Had you find a solution to your problem. I have the same problem. this thread (and the source he was using) are ancient. please start a new thread describing *your* setup and the problems you're seeing. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] dfu:usb: Support for g_dnl composite download gadget.
On Monday 23 July 2012 11:25:25 Lukasz Majewski wrote:
Dear Mike Frysinger,
On Tuesday 03 July 2012 05:38:05 Lukasz Majewski wrote:
+{
+ int ret;
+ static char str[16];
+
+ memset(str, '\0', sizeof(str));
+
+ strncpy(str, shortname, sizeof(shortname));
no need for the memset.
The gadget can be called from many separate commands (e.g. command
dfu and command ums) and those commands can be executed without
power cycle. Thereof I need to be sure, that str is not polluted by
previous name.
that makes no sense. please read the documentation of the str*cpy functions
-- they do no analysis of the target string and merely copy the source to the
destination. thus this code is basically:
str[0] = '\0';
str[1] = '\0';
str[...] = '\0';
str[0] = shortname[0];
str[1] = shortname[1];
str[...] = shortname[...];
it should be fairly obvious now why that memset is pointless.
this strncpy looks broken -- the 3rd arg is
for how many bytes are available in the *dest* buffer, not how long
the source is.
After looking deeply into the source I admit that providing the
upper bound on the dest is more safe.
it isn't a matter of being safe, it's a matter of correctness
+ strncat(str, s, sizeof(str));
this is also incorrect. the length given to strncat is how many
bytes are left, not the total length.
I cannot agree. sizeof(str) return 16, which is the destination buffer
size.
which is wrong. please read the strncat specification.
since this string parsing logic is all just completely broken, i'd
suggest replacing it all with:
{
int ret;
/* We only allow dfu atm, so 3 should be enough */
static char name[sizeof(shortname) + 3];
if (strcmp(s, dfu)) {
printf(%s: unknown command: %s\n, __func__, s);
return -EINVAL;
}
strcpy(name, shortname);
strcat(name, s);
This is a very neat design, but it assumes that there will be only one
function (dfu in this case). For this particular function +3
applies, but what if another function (like usb_storage) will be
defined?
why does that matter ? the snippet i posted above is trivial to extend to
support any number of functions. increase the 3 to the max you care about,
and then add more strcmp() to the if statement.
I'm now working on another function - the USB Mass Storage (named
ums ;-) ).
Another issue is omitting the strncmp/strncpy functions and depending on
the: static char name[sizeof(shortname) + 3]; definition to prevent
buffer overflow.
your existing code is already full of bugs that don't prevent overflow, and
having the 3 right next to the dfu with a comment makes it pretty clear
what is going on.
-mike
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Re: [U-Boot] [PATCH 5/7] dfu:cmd: Support for DFU u-boot command
On Monday 23 July 2012 12:01:04 Lukasz Majewski wrote:
Dear Mike,
On Tuesday 03 July 2012 05:38:09 Lukasz Majewski wrote:
--- /dev/null
+++ b/common/cmd_dfu.c
+int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
static
It can be static (static int do_dfu). On the other hand the U_BOOT_CMD
macro defines:
int (*cmd)(struct cmd_tbl_s *, int, int, char * const []); at
struct cmd_tbl_s, which is int.
i don't understand what you're trying to say
+ static char *s = dfu;
no need to declare this static
Why not? The s ptr is further passed to g_dnl_init(s), so my intend was
to declare string in the data segment of this translation unit. In this
way the data under this ptr will not vanish.
except your g_dnl_init already copies the incoming string to local storage, so
where it is stored doesn't matter. further, the dfu is going to be in
.rodata (thus never going away), it is only the s pointer which will be
stored in .data, not the thing it points to.
had you done:
char s[] = { 'd', 'f', 'u', '\0', };
then you'd get 4 bytes on the stack
-mike
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Re: [U-Boot] RFC - PatchTrack Specification
Dear Graeme, In message CALButCK05e4VwWr3bzaSyBJiDNJD4OmQ+Szj=ks2j747xgv...@mail.gmail.com you wrote: Here's a quick-and-dirty specification for a patch tracking tool... Thanks a lot. I think this is worth for a depper discussion, and I would like to track the information (and agreements / disagreements) we have on the long list of items we have here. I added the porposal as page to the U-Boot wiki: http://www.denx.de/wiki/U-Boot/ToolsPatchTracking I propose to use this page to add updates as we go, hoping that this will ripe over time, and finally (hopefully soon) result in the fruits of an implementation. Thanks! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I haven't lost my mind -- it's backed up on tape somewhere. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] RFC - PatchTrack Specification (revised)
Dear Graeme Russ, In message CALButCJXJE+mo_W5=kyt8bto4e36-i5ajmcgre-cg0fyp1r...@mail.gmail.com you wrote: A revised version of the spec (sorry, I would have used reply-to but something went amiss with gmail and I've lost the original) http://www.denx.de/wiki/U-Boot/ToolsPatchTracking updated. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You Earth people glorified organized violence for forty centuries. But you imprison those who employ it privately. -- Spock, Dagger of the Mind, stardate 2715.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] usb: fallback safely when a configuration descriptor is too large
When a USB configuration descriptor was larger than our USB buffer
(512 bytes), we were skipping the full descriptor reading but then we
were still parsing and using it, triggering memory corruptions.
Now in that case, it just skips this device enumeration and displays the
appropriate message to the user, so he can fix the buffer if he wants.
This bug was triggered by some UVC webcams which have very large
configuration descriptors (e.g. a couple of kB) describing all their
supported video encodings.
Signed-off-by: Vincent Palatin vpala...@chromium.org
---
common/usb.c | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/common/usb.c b/common/usb.c
index 63a11c8..cfa1ad7 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -485,8 +485,8 @@ int usb_get_configuration_no(struct usb_device *dev,
tmp = le16_to_cpu(config-wTotalLength);
if (tmp USB_BUFSIZ) {
- USB_PRINTF(usb_get_configuration_no: failed to get \
- descriptor - too long: %d\n, tmp);
+ printf(usb_get_configuration_no: failed to get \
+ descriptor - too long: %d\n, tmp);
return -1;
}
@@ -921,7 +921,13 @@ int usb_new_device(struct usb_device *dev)
le16_to_cpus(dev-descriptor.idProduct);
le16_to_cpus(dev-descriptor.bcdDevice);
/* only support for one config for now */
- usb_get_configuration_no(dev, tmpbuf[0], 0);
+ err = usb_get_configuration_no(dev, tmpbuf[0], 0);
+ if (err 0) {
+ printf(usb_new_device: Cannot read configuration, \
+ skipping device %04x:%04x\n,
+ dev-descriptor.idVendor, dev-descriptor.idProduct);
+ return -1;
+ }
usb_parse_config(dev, tmpbuf[0], 0);
usb_set_maxpacket(dev);
/* we set the default configuration here */
--
1.7.7.3
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Re: [U-Boot] [PATCH 0/17] tegra: Add display driver and LCD support for Seaboard
On 07/18/2012 12:51 AM, Simon Glass wrote: +Tom, Stephen On Tue, Jul 17, 2012 at 5:11 PM, Thierry Reding thierry.red...@avionic-design.de wrote: On Sat, Jul 14, 2012 at 10:03:31AM +0200, Simon Glass wrote: Hi Christian, On Thu, Apr 19, 2012 at 2:41 PM, Christian Kroehnert christian.kroehn...@avionic-design.de wrote: ... In the display.c source file I implemented a bug fix, because I get garbled images on the LCD without this fix. I see this code: u32 m_value; m_value = readl(0x54202e04); m_value = ~0x2; writel(m_value, 0x54202e04); What register are you actually writing here? I can't find it in my manual, but maybe I just haven't seen that address. At the time I did look for that register as well but couldn't find anything. But I believe that we saw the garbled display issue that has been mentioned in another thread. If I remember correctly this particular register write was the fix for it. But I wasn't very much involved at the time, so maybe Christian can clarify. However I was going to test your newest version of the LCD patch series on our hardware and see if the issue is still there. Does anyone know what this register is for? I am reluctant to add this code to the patch without at least a comment. That address is an alias for DC_WIN_A_BYTE_SWAP_0 (offset 0x701), which is documented in the TRM. It seems unlikely this was solve the issue at hand, if I remember it correctly. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-net.git master
Hi Wolfgang, Please apply this fix for netconsole for the 2012.07 release. The following changes since commit 8b10652d6d9cc05023b5a6b73840078066f95a50: Wolfgang Denk (1): Prepare v2012.07-rc2 are available in the git repository at: git://git.denx.de/u-boot-net.git master Joe Hershberger (1): net: Make sure the ethaddr is updated in net_init() net/net.c |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-net.git next
The following changes since commit f41471e6a36e70e53bf4cbe4247ff4c0ba87e56f: benoit.thebaudeau@advans (1): net: fec_mxc: Fix MDC for xMII are available in the git repository at: git://git.denx.de/u-boot-net.git next Yoshihiro Shimoda (4): net: sh_eth: clean up for the SH7757's code net: sh_eth: add SH_ETH_TYPE_ condition net: sh_eth: modify the definitions of regsiter net: sh_eth: add support for SH7757's GETHER drivers/net/sh_eth.c | 139 -- drivers/net/sh_eth.h | 391 ++ 2 files changed, 299 insertions(+), 231 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] net: sh_eth: clean up for the SH7757's code
Hi Yoshihiro, On Mon, Jul 23, 2012 at 7:52 PM, Shimoda, Yoshihiro yoshihiro.shimoda...@renesas.com wrote: Hi, Thank you for the reply. I will wait until it is merged. Applied to next, thanks. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] net: sh_eth: add SH_ETH_TYPE_ condition
Hi Yoshihiro, On Tue, Jun 26, 2012 at 9:38 PM, Shimoda, Yoshihiro yoshihiro.shimoda...@renesas.com wrote: At the moment, the driver supports the following CPUs: - GETHER (Gigabit Ethernet) : SH7763, SH7734 - ETHER (Fast Ethernet): SH7724, SH7757 And the driver had the following #if: #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) #if !defined(CONFIG_CPU_SH7757) !defined(CONFIG_CPU_SH7724) - Those are for GETHER #if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) - This is for ETHER So, for clean up the code, this patch adds SH_ETH_TYPE_GETHER and SH_ETH_TYPE_ETHER. And then, the patch modifies the above #if. Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com --- Applied to next, thanks. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] net: sh_eth: modify the definitions of regsiter
Hi Yoshihiro, On Tue, Jun 26, 2012 at 9:38 PM, Shimoda, Yoshihiro yoshihiro.shimoda...@renesas.com wrote: The previous code had many similar definitions in each CPU. This patch borrows from the sh_eth driver of Linux kernel. Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com --- Applied to next, thanks. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] net: sh_eth: add support for SH7757's GETHER
Hi Yoshihiro, On Tue, Jun 26, 2012 at 9:38 PM, Shimoda, Yoshihiro yoshihiro.shimoda...@renesas.com wrote: SH7757 has 2 ETHERs and 2 GETHERs. This patch supports the SH7757's GETHER. If CONFIG_SH_ETHER_USE_GETHER is defined using SH7757, the driver handles the GETHER. Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com --- Applied to next, thanks. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] dts/Makefile: Turn off system-/gcc-specific predefined macros
On 07/24/2012 05:28 PM, Mike Frysinger wrote: On Tuesday 24 July 2012 06:11:04 Horst Kronstorfer wrote: On 07/19/2012 05:22 AM, Mike Frysinger wrote: On Friday 13 July 2012 09:03:40 Horst Kronstorfer wrote: Add '-undef' to DTS_CPPFLAGS to avoid unwanted expansion of dts content that matches system-specific or gcc-specific predefined macros. Example: A number of PowerPC related *.dts files in the kernel define a property named 'linux,network-index' which (w/o '-undef') is expanded to '1,network-index' by the preprocessor because of '#define linux 1.' i think you should use -ansi instead. that's what we use in other places for the same reason. this would increase the probability of a name clash. no idea what you're talking about. have you actually looked at the output of `gcc -E -dD -ansi` ? $ gcc -E -dM -ansi - /dev/null | wc -l 229 $ gcc -E -dM -undef - /dev/null | wc -l 2 -h -mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
Dear Tom Warren,
Marek,
-Original Message-
From: Marek Vasut [mailto:ma...@denx.de]
Sent: Monday, July 23, 2012 11:24 PM
To: Simon Glass
Cc: u-boot@lists.denx.de; u-boot...@lists.denx.de; Tom Warren; Wolfgang
Denk; Albert Aribaud
Subject: Re: [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
Dear Simon Glass,
On Sat, Jul 21, 2012 at 4:02 PM, Marek Vasut ma...@denx.de wrote:
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Warren twar...@nvidia.com
Cc: Wolfgang Denk w...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: U-Boot DM u-boot...@lists.denx.de
Acked-by: Simon Glass s...@chromium.org
Simon, can you please pick up this one separatelly through your tree? I
already agreed with Tom to rip this apart as it's not really a series,
but rather a dump of random patches and cleanups. This is basically the
first chapter of my crusade towards making you crazy from breakage ... I
mean ... cleaning up drivers scattered across arch/ directory and moving
them to drivers/ directory ...
Simon doesn't manage the Tegra repo, I do. Simon is the most prodigious
Tegra submitter by far, but he's a Google employee, not an Nvidian.
Hehe ... and I always kept torturing Simon about since I had trouble
remembering
this, sorry Simon ;-)
I don't recall any conversation with you WRT this patch series ('rip this
apart'?)
Well, let patches in this series be picked up by various people.
, and see nothing in my archived U-Boot emails about it - is there
another Tom (Rini? or Rix?) that you had this convo with?
About what?
Regardless, I'll apply this to u-boot-tegra/master /next since the
changes are trivial.
Ok, thanks
Note that any future Tegra changes will need to be
rebased against master, as Allen's SPL rewrite/rework caused a lot of
files to move around.
I don't expect more right now.
Tom
Best regards,
Marek Vasut
Best regards,
Marek Vasut
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Re: [U-Boot] Unable to power the USB Keyboard on u-boot
Dear atulronu, On Friday 20 July 2012 07:10 PM, Marek Vasut wrote: Dear Marek, Thanks for your reply.. Dear Atul Kumar, Dear All, I am trying to use usb keyboard on u-boot. I am using the u-boot stack which was shared by you. Can you help me to know where problem is going. I am sending some of debug prints which i found on my Beagle board xM. I have connected usb mouse and usb keyboard on same side of port, here usb mouse lights up but the keyboard does not powers on. Both keyboard and Mouse are from logitech. Please help me to make this up as i have scheduled demo. [...] What version of uboot is that? Try with latest u-boot git head, it should have the beagleboard/usb patches in there. Best regards, Marek Vasut I am using u-boot version 2011-12 shared by Mr. Govind (ti) which was 1st updated by him.. I have also tried with the latest git: u-boot-2012.07-rc1 but it is poping with error : v7_dcache_inval_range - start address is not aligned. Do we have any solution for this. Yes, latest git (-rc2 and soon to be released .07) has a fix for that. Tom? As i have also tried with Externally powered usb hub but it does not even initializes with it. Although i can see the device Name in uusb tree. Any suggestion or solutions are always welcome. Thanks Regards Atul Kumar Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] net: Make the netconsole buffer size configurable
Allow a board to configure a larger buffer for netconsole, but leave
the default.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
doc/README.NetConsole|2 ++
drivers/net/netconsole.c | 10 --
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/doc/README.NetConsole b/doc/README.NetConsole
index c8bcb90..73543e5 100644
--- a/doc/README.NetConsole
+++ b/doc/README.NetConsole
@@ -6,6 +6,8 @@ serial and network input/output devices by adjusting the
'stdin' and
set either of these variables to nc. Input and output can be
switched independently.
+CONFIG_NETCONSOLE_BUFFER_SIZE - Override the default buffer size
+
We use an environment variable 'ncip' to set the IP address and the
port of the destination. The format is ip_addr:port. If port is
omitted, the value of is used. If the env var doesn't exist, the
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 14243b8..6b4390e 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -28,7 +28,13 @@
DECLARE_GLOBAL_DATA_PTR;
-static char input_buffer[512];
+#ifdef CONFIG_NETCONSOLE_BUFFER_SIZE
+#define BUFFER_SIZE CONFIG_NETCONSOLE_BUFFER_SIZE
+#else
+#define BUFFER_SIZE 512
+#endif
+
+static char input_buffer[BUFFER_SIZE];
static int input_size; /* char count in input buffer */
static int input_offset; /* offset to valid chars in input buffer */
static int input_recursion;
@@ -203,7 +209,7 @@ static void nc_puts(const char *s)
len = strlen(s);
while (len) {
- int send_len = min(len, 512);
+ int send_len = min(len, BUFFER_SIZE);
nc_send_packet(s, send_len);
len -= send_len;
s += send_len;
--
1.6.0.2
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[U-Boot] [PATCH] net: Make netconsole src and dest ports configurable
It is desirable to use different port numbers for sending and receiving
packets with netconsole in the case where you have more than one device
on the local subnet with netconsole enabled for broadcast. When they
use the same port for both, any output from one will look like input to
the other. This is typlically not desirable.
This patch allows the input and output ports to be specified separately
in the environment.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
doc/README.NetConsole|3 +++
drivers/net/netconsole.c | 29 -
tools/netconsole | 18 +++---
3 files changed, 34 insertions(+), 16 deletions(-)
diff --git a/doc/README.NetConsole b/doc/README.NetConsole
index c8bcb90..070e86a 100644
--- a/doc/README.NetConsole
+++ b/doc/README.NetConsole
@@ -11,6 +11,9 @@ port of the destination. The format is ip_addr:port. If
port is
omitted, the value of is used. If the env var doesn't exist, the
broadcast address and port are used. If it is set to an IP
address of 0 (or 0.0.0.0) then no messages are sent to the network.
+The source / listening port can be configured separately by setting
+the 'ncinport' environment variable and the destination port can be
+configured by setting the 'ncoutport' environment variable.
For example, if your server IP is 192.168.1.1, you could use:
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 14243b8..86f5301 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -36,7 +36,8 @@ static int output_recursion;
static int net_timeout;
static uchar nc_ether[6]; /* server enet address */
static IPaddr_t nc_ip; /* server ip */
-static short nc_port; /* source/target port */
+static short nc_out_port; /* target output port */
+static short nc_in_port; /* source input port */
static const char *output_packet; /* used by first send udp */
static int output_packet_len;
@@ -71,7 +72,7 @@ void NcStart(void)
net_set_arp_handler(nc_wait_arp_handler);
pkt = (uchar *)NetTxPacket + NetEthHdrSize() + IP_UDP_HDR_SIZE;
memcpy(pkt, output_packet, output_packet_len);
- NetSendUDPPacket(nc_ether, nc_ip, nc_port, nc_port,
+ NetSendUDPPacket(nc_ether, nc_ip, nc_out_port, nc_in_port,
output_packet_len);
}
}
@@ -80,7 +81,7 @@ int nc_input_packet(uchar *pkt, unsigned dest, unsigned src,
unsigned len)
{
int end, chunk;
- if (dest != nc_port || !len)
+ if (dest != nc_in_port || !len)
return 0; /* not for us */
debug_cond(DEBUG_DEV_PKT, input: \%*.*s\\n, len, len, pkt);
@@ -139,7 +140,7 @@ static void nc_send_packet(const char *buf, int len)
memcpy(pkt, buf, len);
ether = nc_ether;
ip = nc_ip;
- NetSendUDPPacket(ether, ip, nc_port, nc_port, len);
+ NetSendUDPPacket(ether, ip, nc_out_port, nc_in_port, len);
if (inited)
eth_halt();
@@ -148,20 +149,30 @@ static void nc_send_packet(const char *buf, int len)
static int nc_start(void)
{
int netmask, our_ip;
+ char *p;
- nc_port = ; /* default port */
+ nc_out_port = ; /* default port */
+ nc_in_port = nc_out_port;
if (getenv(ncip)) {
- char *p;
nc_ip = getenv_IPaddr(ncip);
if (!nc_ip)
return -1; /* ncip is 0.0.0.0 */
p = strchr(getenv(ncip), ':');
- if (p != NULL)
- nc_port = simple_strtoul(p + 1, NULL, 10);
+ if (p != NULL) {
+ nc_out_port = simple_strtoul(p + 1, NULL, 10);
+ nc_in_port = nc_out_port;
+ }
} else
- nc_ip = ~0; /* ncip is not set */
+ nc_ip = ~0; /* ncip is not set, so broadcast */
+
+ p = getenv(ncoutport);
+ if (p != NULL)
+ nc_out_port = simple_strtoul(p, NULL, 10);
+ p = getenv(ncinport);
+ if (p != NULL)
+ nc_in_port = simple_strtoul(p, NULL, 10);
our_ip = getenv_IPaddr(ipaddr);
netmask = getenv_IPaddr(netmask);
diff --git a/tools/netconsole b/tools/netconsole
index c8109bb..b2b6edb 100755
--- a/tools/netconsole
+++ b/tools/netconsole
@@ -2,7 +2,7 @@
usage() {
(
- echo Usage: $0 board IP [board port]
+ echo Usage: $0 board-IP [board-port [board-in-port]]
echo
echo If port is not specified, '' will be used
[ -z $* ] exit 0
@@ -24,9 +24,13 @@ while [ -n $1 ] ; do
done
ip=$1
-port=${2:-}
+board_out_port=${2:-}
+board_in_port=${3:-$board_out_port}
-if [ -z ${ip} ] || [ -n $3 ] ; then
+echo Board out port: $board_out_port
+echo Board in port: $board_in_port
+
+if [ -z ${ip} ] || [ -n $4 ] ; then
usage Invalid number of arguments
fi
@@ -41,19
[U-Boot] [PATCH] net: Improve the speed of netconsole
Previously u-boot would initialize the network interface for every
network operation and then shut it down again. This makes sense for
most operations where the network in not known to be needed soon after
the operation is complete. In the case of netconsole, it will use the
network for every interaction with the shell or every printf. This
means that the network is being reinitialized very often. On many
devices, this intialization is very slow.
This patch checks for consecutive netconsole actions and leaves the
ethernet hardware initialized between them. It will still behave the
same old way for all other network operations and any time another
network operation happens between netconsole operations.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Stefano Babic sba...@denx.de
---
doc/README.NetConsole|3 +++
drivers/net/netconsole.c | 26 ++
include/net.h|6 ++
net/eth.c| 14 ++
net/net.c| 44 +++-
5 files changed, 84 insertions(+), 9 deletions(-)
diff --git a/doc/README.NetConsole b/doc/README.NetConsole
index c8bcb90..7a20bf5 100644
--- a/doc/README.NetConsole
+++ b/doc/README.NetConsole
@@ -6,6 +6,9 @@ serial and network input/output devices by adjusting the
'stdin' and
set either of these variables to nc. Input and output can be
switched independently.
+CONFIG_NETCONSOLE_PERSIST_ETH - Don't reinitialize the Ethernet driver
+ between consecutive calls to netconsole.
+
We use an environment variable 'ncip' to set the IP address and the
port of the destination. The format is ip_addr:port. If port is
omitted, the value of is used. If the env var doesn't exist, the
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 14243b8..0218302 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -131,8 +131,17 @@ static void nc_send_packet(const char *buf, int len)
}
if (eth-state != ETH_STATE_ACTIVE) {
- if (eth_init(gd-bd) 0)
- return;
+#ifdef CONFIG_NETCONSOLE_PERSIST_ETH
+ if (net_loop_last_protocol != NETCONS) {
+#endif
+ if (eth_init(gd-bd) 0)
+ return;
+#ifdef CONFIG_NETCONSOLE_PERSIST_ETH
+ net_loop_last_protocol = NETCONS;
+ } else {
+ eth_init_state_only(gd-bd);
+ }
+#endif
inited = 1;
}
pkt = (uchar *)NetTxPacket + NetEthHdrSize() + IP_UDP_HDR_SIZE;
@@ -141,8 +150,17 @@ static void nc_send_packet(const char *buf, int len)
ip = nc_ip;
NetSendUDPPacket(ether, ip, nc_port, nc_port, len);
- if (inited)
- eth_halt();
+ if (inited) {
+#ifdef CONFIG_NETCONSOLE_PERSIST_ETH
+ if (net_loop_last_protocol != NETCONS) {
+#endif
+ eth_halt();
+#ifdef CONFIG_NETCONSOLE_PERSIST_ETH
+ } else {
+ eth_halt_state_only();
+ }
+#endif
+ }
}
static int nc_start(void)
diff --git a/include/net.h b/include/net.h
index 6d2d6cd..0b75e10 100644
--- a/include/net.h
+++ b/include/net.h
@@ -151,6 +151,12 @@ extern int eth_rx(void); /* Check for
received packets */
extern void eth_halt(void);/* stop SCC */
extern char *eth_get_name(void); /* get name of current device */
+#ifdef CONFIG_NETCONSOLE_PERSIST_ETH
+extern int eth_init_state_only(bd_t *bis); /* Set active state */
+extern void eth_halt_state_only(void); /* Set passive state */
+extern enum proto_t net_loop_last_protocol;
+#endif
+
/*
* Set the hardware address for an ethernet interface based on 'eth%daddr'
* environment variable (or just 'ethaddr' if eth_number is 0).
diff --git a/net/eth.c b/net/eth.c
index d526264..54841b9 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -436,6 +436,20 @@ void eth_halt(void)
eth_current-state = ETH_STATE_PASSIVE;
}
+#ifdef CONFIG_NETCONSOLE_PERSIST_ETH
+int eth_init_state_only(bd_t *bis)
+{
+ eth_current-state = ETH_STATE_ACTIVE;
+
+ return 0;
+}
+
+void eth_halt_state_only(void)
+{
+ eth_current-state = ETH_STATE_PASSIVE;
+}
+#endif
+
int eth_send(void *packet, int length)
{
if (!eth_current)
diff --git a/net/net.c b/net/net.c
index 9de7d92..184c182 100644
--- a/net/net.c
+++ b/net/net.c
@@ -180,6 +180,14 @@ IPaddr_t NetNtpServerIP;
intNetTimeOffset;
#endif
+#ifdef CONFIG_NETCONSOLE_PERSIST_ETH
+/*
+ * Start with a default last protocol.
+ * We are only interested in NETCONS or not.
+ */
+enum proto_t net_loop_last_protocol = BOOTP;
+#endif
+
uchar PktBuf[(PKTBUFSRX+1) * PKTSIZE_ALIGN + PKTALIGN];
/* Receive packet */
@@ -314,12 +322,20 @@ int NetLoop(enum proto_t protocol)
bootstage_mark_name(BOOTSTAGE_ID_ETH_START,
Re: [U-Boot] Unable to power the USB Keyboard on u-boot
On 07/24/2012 12:44 PM, Marek Vasut wrote: Dear atulronu, On Friday 20 July 2012 07:10 PM, Marek Vasut wrote: Dear Marek, Thanks for your reply.. Dear Atul Kumar, Dear All, I am trying to use usb keyboard on u-boot. I am using the u-boot stack which was shared by you. Can you help me to know where problem is going. I am sending some of debug prints which i found on my Beagle board xM. I have connected usb mouse and usb keyboard on same side of port, here usb mouse lights up but the keyboard does not powers on. Both keyboard and Mouse are from logitech. Please help me to make this up as i have scheduled demo. [...] What version of uboot is that? Try with latest u-boot git head, it should have the beagleboard/usb patches in there. Best regards, Marek Vasut I am using u-boot version 2011-12 shared by Mr. Govind (ti) which was 1st updated by him.. I have also tried with the latest git: u-boot-2012.07-rc1 but it is poping with error : v7_dcache_inval_range - start address is not aligned. Do we have any solution for this. Yes, latest git (-rc2 and soon to be released .07) has a fix for that. Tom? I've gotten success reports from everyone I had that had found various breakage previously with the previous attempts. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
Marek,
-Original Message-
From: Marek Vasut [mailto:ma...@denx.de]
Sent: Tuesday, July 24, 2012 12:43 PM
To: Tom Warren
Cc: Simon Glass; u-boot@lists.denx.de; u-boot...@lists.denx.de; Wolfgang
Denk; Albert Aribaud
Subject: Re: [PATCH 08/10] dm: tegra: Staticize local functions in usb.c
Dear Tom Warren,
Marek,
-Original Message-
From: Marek Vasut [mailto:ma...@denx.de]
Sent: Monday, July 23, 2012 11:24 PM
To: Simon Glass
Cc: u-boot@lists.denx.de; u-boot...@lists.denx.de; Tom Warren;
Wolfgang Denk; Albert Aribaud
Subject: Re: [PATCH 08/10] dm: tegra: Staticize local functions in
usb.c
Dear Simon Glass,
On Sat, Jul 21, 2012 at 4:02 PM, Marek Vasut ma...@denx.de wrote:
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Warren twar...@nvidia.com
Cc: Wolfgang Denk w...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: U-Boot DM u-boot...@lists.denx.de
Acked-by: Simon Glass s...@chromium.org
Simon, can you please pick up this one separatelly through your
tree? I already agreed with Tom to rip this apart as it's not really
a series, but rather a dump of random patches and cleanups. This is
basically the first chapter of my crusade towards making you crazy
from breakage ... I mean ... cleaning up drivers scattered across
arch/ directory and moving them to drivers/ directory ...
Simon doesn't manage the Tegra repo, I do. Simon is the most
prodigious Tegra submitter by far, but he's a Google employee, not an
Nvidian.
Hehe ... and I always kept torturing Simon about since I had trouble
remembering this, sorry Simon ;-)
I don't recall any conversation with you WRT this patch series ('rip
this
apart'?)
Well, let patches in this series be picked up by various people.
, and see nothing in my archived U-Boot emails about it - is there
another Tom (Rini? or Rix?) that you had this convo with?
About what?
Regardless, I'll apply this to u-boot-tegra/master /next since the
changes are trivial.
Ok, thanks
Note that any future Tegra changes will need to be rebased against
master, as Allen's SPL rewrite/rework caused a lot of files to move
around.
I don't expect more right now.
Tom
Best regards,
Marek Vasut
Best regards,
Marek Vasut
Applied to u-boot-tegra/master (and /next).
Tom
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[U-Boot] [PATCH v3 3/8] am33xx: pin mux defintions for CPSW switch
From: Chandan Nath chandan.n...@ti.com
This patch adds pin mux settings for CPSW switch found on
TI AM335X based boards (MII and RGMII modes).
Signed-off-by: Chandan Nath chandan.n...@ti.com
[Ilya: split pinmux into separate patch]
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
arch/arm/include/asm/arch-am33xx/common_def.h |2 ++
board/ti/am335x/mux.c | 47 +
2 files changed, 49 insertions(+)
diff --git a/arch/arm/include/asm/arch-am33xx/common_def.h
b/arch/arm/include/asm/arch-am33xx/common_def.h
index aa3b554..5a7b0f3 100644
--- a/arch/arm/include/asm/arch-am33xx/common_def.h
+++ b/arch/arm/include/asm/arch-am33xx/common_def.h
@@ -19,5 +19,7 @@
extern void enable_uart0_pin_mux(void);
extern void enable_mmc0_pin_mux(void);
extern void enable_i2c0_pin_mux(void);
+extern void enable_mii1_pin_mux(void);
+extern void enable_rgmii1_pin_mux(void);
#endif/*__COMMON_DEF_H__ */
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index c696c0f..a1661e6 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -288,6 +288,43 @@ static struct module_pin_mux i2c1_pin_mux[] = {
{-1},
};
+static struct module_pin_mux rgmii1_pin_mux[] = {
+ {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */
+ {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE},/* RGMII1_RCTL */
+ {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
+ {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
+ {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */
+ {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */
+ {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */
+ {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */
+ {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE},/* RGMII1_RD3 */
+ {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE},/* RGMII1_RD2 */
+ {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE},/* RGMII1_RD1 */
+ {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE},/* RGMII1_RD0 */
+ {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
+ {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},/* MDIO_CLK */
+ {-1},
+};
+
+static struct module_pin_mux mii1_pin_mux[] = {
+ {OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
+ {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
+ {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE},/* MII1_RXDV */
+ {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
+ {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
+ {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
+ {OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
+ {OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
+ {OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
+ {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE},/* MII1_RXD3 */
+ {OFFSET(mii1_rxd2), MODE(0) | RXACTIVE},/* MII1_RXD2 */
+ {OFFSET(mii1_rxd1), MODE(0) | RXACTIVE},/* MII1_RXD1 */
+ {OFFSET(mii1_rxd0), MODE(0) | RXACTIVE},/* MII1_RXD0 */
+ {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
+ {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},/* MDIO_CLK */
+ {-1},
+};
+
/*
* Configure the pin mux for the module
*/
@@ -323,3 +360,13 @@ void enable_i2c1_pin_mux(void)
{
configure_module_pin_mux(i2c1_pin_mux);
}
+
+void enable_rgmii1_pin_mux(void)
+{
+ configure_module_pin_mux(rgmii1_pin_mux);
+}
+
+void enable_mii1_pin_mux(void)
+{
+ configure_module_pin_mux(mii1_pin_mux);
+}
--
1.7.9.5
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[U-Boot] [PATCH v3 4/8] am335x_evm: read the on-board EEPROM
Read the on-board EEPROM during startup to detect the version
of the board we are running on (as for now only BeagleBone vs
EVM detection is supported).
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
board/ti/am335x/evm.c | 72 +++--
1 file changed, 70 insertions(+), 2 deletions(-)
diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c
index 0d0affa..55e24a8 100644
--- a/board/ti/am335x/evm.c
+++ b/board/ti/am335x/evm.c
@@ -14,6 +14,7 @@
*/
#include common.h
+#include errno.h
#include asm/arch/cpu.h
#include asm/arch/hardware.h
#include asm/arch/common_def.h
@@ -22,17 +23,84 @@
DECLARE_GLOBAL_DATA_PTR;
/*
+ * I2C Address of on-board EEPROM
+ */
+#define I2C_BASE_BOARD_ADDR0x50
+
+#define NO_OF_MAC_ADDR 3
+#define ETH_ALEN 6
+
+#define NAME_LEN 8
+
+struct am335x_baseboard_id {
+ unsigned int magic;
+ char name[NAME_LEN];
+ char version[4];
+ char serial[12];
+ char config[32];
+ char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN];
+};
+
+static struct am335x_baseboard_id header;
+
+static inline int board_is_bone(void)
+{
+ return !strncmp(header.name, A335BONE, NAME_LEN);
+}
+
+/*
+ * Read header information from EEPROM into global structure.
+ */
+int read_eeprom(void)
+{
+ /* Check if baseboard eeprom is available */
+ if (i2c_probe(I2C_BASE_BOARD_ADDR)) {
+ printf(Could not probe the EEPROM; something fundamentally
+ wrong on the I2C bus.\n);
+ return -ENODEV;
+ }
+
+ /* read the eeprom using i2c */
+ if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 2, (uchar *)header,
+ sizeof(header))) {
+ printf(Could not read the EEPROM; something fundamentally
+wrong on the I2C bus.\n);
+ return -EIO;
+ }
+
+ if (header.magic != 0xEE3355AA) {
+ /*
+* read the eeprom using i2c again,
+* but use only a 1 byte address
+*/
+ if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 1, (uchar *)header,
+ sizeof(header))) {
+ printf(Could not read the EEPROM; something
+ fundamentally wrong on the I2C bus.\n);
+ return -EIO;
+ }
+
+ if (header.magic != 0xEE3355AA) {
+ printf(Incorrect magic number in EEPROM\n);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
+/*
* Basic board specific setup
*/
int board_init(void)
{
enable_uart0_pin_mux();
-#ifdef CONFIG_I2C
enable_i2c0_pin_mux();
enable_i2c1_pin_mux();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-#endif
+ if (read_eeprom() 0)
+ printf(Could not get board ID.\n);
gd-bd-bi_boot_params = PHYS_DRAM_1 + 0x100;
--
1.7.9.5
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[U-Boot] [PATCH v3 1/8] cpsw: add driver for cpsw ethernet device
From: Cyril Chemparathy cy...@ti.com
CPSW is an on-chip ethernet switch that is found on various SoCs from Texas
Instruments. This patch adds a simple driver (based on the Linux driver) for
this hardware module.
This patch also adds support to clean and flush dcache during packet send
and receive.
Changes by Sandhya: Added support to clean and flush dcache during packet
send/receive and added timeouts.
Signed-off-by: Cyril Chemparathy cy...@ti.com
Signed-off-by: Chandan Nath chandan.n...@ti.com
Signed-off-by: Satyanarayana, Sandhya sandhya.satyanaray...@ti.com
[Ilya: Cleaned cache handling, some style cleanup, some small
fixes, use of internal RAM for descriptors]
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
Changes in v2:
- fix timeout handling
- use internal RAM for descriptors
Changes in v3:
- change calls to miiphy_{speed,duplex}() to phy_startup()
- drop volatiles
- stop DMA on driver halt (fix by Mugunthan V N)
drivers/net/Makefile |1 +
drivers/net/cpsw.c | 991 ++
include/cpsw.h | 51 +++
3 files changed, 1043 insertions(+)
create mode 100644 drivers/net/cpsw.c
create mode 100644 include/cpsw.h
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 430f90c..011cd51 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -71,6 +71,7 @@ COBJS-$(CONFIG_SMC9) += smc9.o
COBJS-$(CONFIG_SMC911X) += smc911x.o
COBJS-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
COBJS-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
+COBJS-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
COBJS-$(CONFIG_FMAN_ENET) += fsl_mdio.o
COBJS-$(CONFIG_TSI108_ETH) += tsi108_eth.o
COBJS-$(CONFIG_ULI526X) += uli526x.o
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
new file mode 100644
index 000..af3d859
--- /dev/null
+++ b/drivers/net/cpsw.c
@@ -0,0 +1,991 @@
+/*
+ * CPSW Ethernet Switch Driver
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include common.h
+#include command.h
+#include net.h
+#include miiphy.h
+#include malloc.h
+#include net.h
+#include netdev.h
+#include cpsw.h
+#include asm/errno.h
+#include asm/io.h
+#include phy.h
+
+#define BITMASK(bits) (BIT(bits) - 1)
+#define PHY_REG_MASK 0x1f
+#define PHY_ID_MASK0x1f
+#define NUM_DESCS (PKTBUFSRX * 2)
+#define PKT_MIN60
+#define PKT_MAX(1500 + 14 + 4 + 4)
+#define CLEAR_BIT 1
+#define GIGABITEN BIT(7)
+#define FULLDUPLEXEN BIT(0)
+#define MIIEN BIT(15)
+
+/* DMA Registers */
+#define CPDMA_TXCONTROL0x004
+#define CPDMA_RXCONTROL0x014
+#define CPDMA_SOFTRESET0x01c
+#define CPDMA_RXFREE 0x0e0
+#define CPDMA_TXHDP_VER1 0x100
+#define CPDMA_TXHDP_VER2 0x200
+#define CPDMA_RXHDP_VER1 0x120
+#define CPDMA_RXHDP_VER2 0x220
+#define CPDMA_TXCP_VER10x140
+#define CPDMA_TXCP_VER20x240
+#define CPDMA_RXCP_VER10x160
+#define CPDMA_RXCP_VER20x260
+
+#define CPDMA_RAM_ADDR 0x4a102000
+
+/* Descriptor mode bits */
+#define CPDMA_DESC_SOP BIT(31)
+#define CPDMA_DESC_EOP BIT(30)
+#define CPDMA_DESC_OWNER BIT(29)
+#define CPDMA_DESC_EOQ BIT(28)
+
+/*
+ * This timeout definition is a worst-case ultra defensive measure against
+ * unexpected controller lock ups. Ideally, we should never ever hit this
+ * scenario in practice.
+ */
+#define MDIO_TIMEOUT100 /* msecs */
+#define CPDMA_TIMEOUT 100 /* msecs */
+
+struct cpsw_mdio_regs {
+ u32 version;
+ u32 control;
+#define CONTROL_IDLE BIT(31)
+#define CONTROL_ENABLE BIT(30)
+
+ u32 alive;
+ u32 link;
+ u32 linkintraw;
+ u32 linkintmasked;
+ u32 __reserved_0[2];
+ u32 userintraw;
+ u32 userintmasked;
+ u32 userintmaskset;
+ u32 userintmaskclr;
+ u32 __reserved_1[20];
+
+ struct {
+ u32 access;
+ u32 physel;
+#define USERACCESS_GO BIT(31)
+#define USERACCESS_WRITE BIT(30)
+#define USERACCESS_ACK BIT(29)
+#define USERACCESS_READ(0)
+#define USERACCESS_DATA(0x)
+ } user[0];
+};
+
+struct cpsw_regs {
+ u32 id_ver;
+ u32
[U-Boot] [PATCH v3 0/8] CPSW switch plus SPL net support
These patches add CPSW switch driver and enable support for it
on TI AM335x based boards. This version is rebased on top of
u-boot-ti/next. Also now CPSW driver uses internal controller
memory for DMA descriptors so coherent allocator is no longer
a requirement for this series.
The second part of the series provides support for networking in SPL.
These patches try to use network infrasctructure as is, without
trying to cut some minimal set of it, so the resulting SPL image
is quite big and only useful for boards with plenty of SRAM/OCRAM
(like TI AM335x based ones).
Changes in v2:
- fix timeout handling
- use internal RAM for descriptors
Changes in v3:
- add support for setting different VCI in SPL
- change calls to miiphy_{speed,duplex}() to phy_startup()
- drop volatiles
- fix whitespace problem
- set Vendor Class Identifier for SPL
- stop DMA on driver halt (fix by Mugunthan V N)
- use BOOTP in SPL regardless of CONFIG_CMD_DHCP
Chandan Nath (3):
am33xx: CPSW init and definitions
am33xx: pin mux defintions for CPSW switch
am335x_evm: CPSW support
Cyril Chemparathy (1):
cpsw: add driver for cpsw ethernet device
Ilya Yanok (4):
am335x_evm: read the on-board EEPROM
net/bootp: add VCI support for BOOTP also
OMAP: networking support for SPL
am335x_evm: enable networking in SPL
arch/arm/cpu/armv7/am33xx/clock.c |8 +-
arch/arm/cpu/armv7/omap-common/Makefile |3 +
arch/arm/cpu/armv7/omap-common/spl.c |5 +
arch/arm/cpu/armv7/omap-common/spl_eth.c | 50 ++
arch/arm/include/asm/arch-am33xx/common_def.h |2 +
arch/arm/include/asm/arch-am33xx/cpu.h| 11 +
arch/arm/include/asm/arch-am33xx/hardware.h |5 +
arch/arm/include/asm/omap_common.h|4 +
board/ti/am335x/evm.c | 175 -
board/ti/am335x/mux.c | 47 ++
common/Makefile |6 +
common/cmd_nvedit.c |6 +-
common/env_common.c |3 +-
drivers/net/Makefile |1 +
drivers/net/cpsw.c| 991 +
include/configs/am335x_evm.h | 26 +-
include/cpsw.h| 51 ++
lib/Makefile | 10 +-
lib/vsprintf.c|2 +-
net/bootp.c | 28 +-
net/net.c |3 +
spl/Makefile |3 +
22 files changed, 1424 insertions(+), 16 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_eth.c
create mode 100644 drivers/net/cpsw.c
create mode 100644 include/cpsw.h
--
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[U-Boot] [PATCH v3 7/8] OMAP: networking support for SPL
This patch adds support for networking in SPL. Some devices are
capable of loading SPL via network so it makes sense to load the
main U-Boot binary via network too. This patch tries to use
existing network code as much as possible. Unfortunately, it depends
on environment which in turn depends on other code so SPL size
is increased significantly. No effort was done to decouple network
code and environment so far.
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
Changes in v3:
- add support for setting different VCI in SPL
- use BOOTP in SPL regardless of CONFIG_CMD_DHCP
arch/arm/cpu/armv7/omap-common/Makefile |3 ++
arch/arm/cpu/armv7/omap-common/spl.c |5 +++
arch/arm/cpu/armv7/omap-common/spl_eth.c | 50 ++
arch/arm/include/asm/omap_common.h |4 +++
common/Makefile |6
common/cmd_nvedit.c |6 ++--
common/env_common.c |3 +-
lib/Makefile | 10 --
lib/vsprintf.c |2 +-
net/bootp.c | 10 +-
net/net.c|3 ++
spl/Makefile |3 ++
12 files changed, 98 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_eth.c
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile
b/arch/arm/cpu/armv7/omap-common/Makefile
index 1394c3f..4945bdf 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -56,6 +56,9 @@ endif
ifdef CONFIG_SPL_YMODEM_SUPPORT
COBJS += spl_ymodem.o
endif
+ifdef CONFIG_SPL_ETH_SUPPORT
+COBJS += spl_eth.o
+endif
endif
ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
b/arch/arm/cpu/armv7/omap-common/spl.c
index 4d1ac85..e7127fb 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -176,6 +176,11 @@ void board_init_r(gd_t *id, ulong dummy)
spl_ymodem_load_image();
break;
#endif
+#ifdef CONFIG_SPL_ETH_SUPPORT
+ case BOOT_DEVICE_CPGMAC:
+ spl_eth_load_image();
+ break;
+#endif
default:
printf(SPL: Un-supported Boot Device - %d!!!\n, boot_device);
hang();
diff --git a/arch/arm/cpu/armv7/omap-common/spl_eth.c
b/arch/arm/cpu/armv7/omap-common/spl_eth.c
new file mode 100644
index 000..21d6e77
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/spl_eth.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * (C) Copyright 2012
+ * Ilya Yanok ilya.ya...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include common.h
+#include net.h
+#include asm/omap_common.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void spl_eth_load_image(void)
+{
+ int rv;
+
+ env_init();
+ env_relocate();
+ setenv(autoload, yes);
+ load_addr = CONFIG_SYS_TEXT_BASE - sizeof(struct image_header);
+ rv = eth_initialize(gd-bd);
+ if (rv == 0) {
+ printf(No Ethernet devices found\n);
+ hang();
+ }
+ rv = NetLoop(BOOTP);
+ if (rv 0) {
+ printf(Problem booting with BOOTP\n);
+ hang();
+ }
+ spl_parse_image_header((struct image_header *)load_addr);
+}
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include/asm/omap_common.h
index 4e95eee..a433836 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -69,6 +69,7 @@ void preloader_console_init(void);
#define BOOT_DEVICE_MMC1 8
#define BOOT_DEVICE_MMC2 0
#define BOOT_DEVICE_UART 65
+#define BOOT_DEVICE_CPGMAC 70
#define BOOT_DEVICE_MMC2_2 0xFF
#endif
@@ -107,6 +108,9 @@ void spl_mmc_load_image(void);
/* YMODEM SPL functions */
void spl_ymodem_load_image(void);
+/* Ethernet SPL functions */
+void spl_eth_load_image(void);
+
#ifdef CONFIG_SPL_BOARD_INIT
void spl_board_init(void);
#endif
diff --git a/common/Makefile b/common/Makefile
index 483eb4d..d8b4b2a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -187,6 +187,12 @@ endif
ifdef CONFIG_SPL_BUILD
[U-Boot] [PATCH v3 5/8] am335x_evm: CPSW support
From: Chandan Nath chandan.n...@ti.com
This patch adds board-specific initialization for CPSW on
TI AM335X based boards. Tested on BeagleBone.
Signed-off-by: Chandan Nath chandan.n...@ti.com
[Ilya: split board-specific part into separate patch]
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
board/ti/am335x/evm.c| 91 ++
include/configs/am335x_evm.h | 20 +-
2 files changed, 110 insertions(+), 1 deletion(-)
diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c
index 55e24a8..b7eee80 100644
--- a/board/ti/am335x/evm.c
+++ b/board/ti/am335x/evm.c
@@ -15,13 +15,26 @@
#include common.h
#include errno.h
+#include asm/io.h
#include asm/arch/cpu.h
#include asm/arch/hardware.h
#include asm/arch/common_def.h
#include i2c.h
+#include miiphy.h
+#include cpsw.h
DECLARE_GLOBAL_DATA_PTR;
+#define UART_RESET (0x1 1)
+#define UART_CLK_RUNNING_MASK 0x1
+#define UART_SMART_IDLE_EN (0x1 0x3)
+
+/* MII mode defines */
+#define MII_MODE_ENABLE0x0
+#define RGMII_MODE_ENABLE 0xA
+
+struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
/*
* I2C Address of on-board EEPROM
*/
@@ -106,3 +119,81 @@ int board_init(void)
return 0;
}
+
+#ifdef CONFIG_DRIVER_TI_CPSW
+static void cpsw_control(int enabled)
+{
+ /* VTP can be added here */
+
+ return;
+}
+
+static struct cpsw_slave_data cpsw_slaves[] = {
+ {
+ .slave_reg_ofs = 0x208,
+ .sliver_reg_ofs = 0xd80,
+ .phy_id = 0,
+ },
+ {
+ .slave_reg_ofs = 0x308,
+ .sliver_reg_ofs = 0xdc0,
+ .phy_id = 1,
+ },
+};
+
+static struct cpsw_platform_data cpsw_data = {
+ .mdio_base = AM335X_CPSW_MDIO_BASE,
+ .cpsw_base = AM335X_CPSW_BASE,
+ .mdio_div = 0xff,
+ .channels = 8,
+ .cpdma_reg_ofs = 0x800,
+ .slaves = 1,
+ .slave_data = cpsw_slaves,
+ .ale_reg_ofs= 0xd00,
+ .ale_entries= 1024,
+ .host_port_reg_ofs = 0x108,
+ .hw_stats_reg_ofs = 0x900,
+ .mac_control= (1 5),
+ .control= cpsw_control,
+ .host_port_num = 0,
+ .version= CPSW_CTRL_VERSION_2,
+};
+
+int board_eth_init(bd_t *bis)
+{
+ uint8_t mac_addr[6];
+ uint32_t mac_hi, mac_lo;
+
+ if (!eth_getenv_enetaddr(ethaddr, mac_addr)) {
+ debug(ethaddr not set. Reading from E-fuse\n);
+ /* try reading mac address from efuse */
+ mac_lo = readl(cdev-macid0l);
+ mac_hi = readl(cdev-macid0h);
+ mac_addr[0] = mac_hi 0xFF;
+ mac_addr[1] = (mac_hi 0xFF00) 8;
+ mac_addr[2] = (mac_hi 0xFF) 16;
+ mac_addr[3] = (mac_hi 0xFF00) 24;
+ mac_addr[4] = mac_lo 0xFF;
+ mac_addr[5] = (mac_lo 0xFF00) 8;
+
+ if (is_valid_ether_addr(mac_addr))
+ eth_setenv_enetaddr(ethaddr, mac_addr);
+ else
+ return -1;
+ }
+
+ if (board_is_bone()) {
+ enable_mii1_pin_mux();
+ writel(MII_MODE_ENABLE, cdev-miisel);
+ cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
+ PHY_INTERFACE_MODE_MII;
+ } else {
+ enable_rgmii1_pin_mux();
+ writel(RGMII_MODE_ENABLE, cdev-miisel);
+ cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
+ PHY_INTERFACE_MODE_RGMII;
+ }
+
+ return cpsw_register(cpsw_data);
+}
+#endif
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 2b41c1c..2a3251b 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -21,11 +21,13 @@
#undef CONFIG_GZIP
#undef CONFIG_ZLIB
#undef CONFIG_SYS_HUSH_PARSER
-#undef CONFIG_CMD_NET
#include asm/arch/cpu.h
#include asm/arch/hardware.h
+#define CONFIG_DMA_COHERENT
+#define CONFIG_DMA_COHERENT_SIZE (1 20)
+
#define CONFIG_ENV_SIZE0x400
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 * 1024))
#define CONFIG_SYS_PROMPT U-Boot#
@@ -168,4 +170,20 @@
/* Unsupported features */
#undef CONFIG_USE_IRQ
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_DRIVER_TI_CPSW
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_GIGE
+#define CONFIG_PHYLIB
+
#endif /* ! __CONFIG_AM335X_EVM_H */
--
[U-Boot] [PATCH v3 6/8] net/bootp: add VCI support for BOOTP also
Vendor Class Identifier option is common to BOOTP and DHCP and
can be useful without PXE. So send VCI in both BOOTP and DHCP
requests if CONFIG_BOOTP_VCI_STRING is defined.
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
net/bootp.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/net/bootp.c b/net/bootp.c
index 0f0867b..a68f914 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -339,6 +339,14 @@ BootpTimeout(void)
}
}
+#define put_vci(e, str)\
+ do {\
+ *e++ = 60; \
+ *e++ = sizeof(str); \
+ memcpy(e, str, sizeof(str));\
+ e += sizeof(str); \
+ } while (0)
+
/*
* Initialize BOOTP extension fields in the request.
*/
@@ -435,12 +443,10 @@ static int DhcpExtended(u8 *e, int message_type, IPaddr_t
ServerID,
printf(Invalid pxeuuid: %s\n, uuid);
}
}
+#endif
- *e++ = 60; /* Vendor Class Identifier */
- vci_strlen = strlen(CONFIG_BOOTP_VCI_STRING);
- *e++ = vci_strlen;
- memcpy(e, CONFIG_BOOTP_VCI_STRING, vci_strlen);
- e += vci_strlen;
+#ifdef CONFIG_BOOTP_VCI_STRING
+ put_vci(e, CONFIG_VCI_STRING);
#endif
#if defined(CONFIG_BOOTP_VENDOREX)
@@ -527,6 +533,10 @@ static int BootpExtended(u8 *e)
*e++ = (576 - 312 + OPT_FIELD_SIZE) 0xff;
#endif
+#ifdef CONFIG_BOOTP_VCI_STRING
+ put_vci(e, CONFIG_VCI_STRING);
+#endif
+
#if defined(CONFIG_BOOTP_SUBNETMASK)
*e++ = 1; /* Subnet mask request */
*e++ = 4;
--
1.7.9.5
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[U-Boot] [PATCH v3 8/8] am335x_evm: enable networking in SPL
This patch adds support for networking in SPL on TI AM335x based
boards. Vendor Class Identifier used by SPL during BOOTP is
AM335x U-Boot SPL.
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
Changes in v3:
- set Vendor Class Identifier for SPL
board/ti/am335x/evm.c| 12
include/configs/am335x_evm.h |6 +-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c
index b7eee80..597fced 100644
--- a/board/ti/am335x/evm.c
+++ b/board/ti/am335x/evm.c
@@ -120,6 +120,18 @@ int board_init(void)
return 0;
}
+#ifdef CONFIG_SPL_BUILD
+int spl_board_init(void)
+{
+ enable_i2c0_pin_mux();
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ if (read_eeprom() 0)
+ printf(Could not get board ID.\n);
+
+ return 0;
+}
+#endif
+
#ifdef CONFIG_DRIVER_TI_CPSW
static void cpsw_control(int enabled)
{
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 2a3251b..22eefa4 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -128,8 +128,9 @@
/* Defines for SPL */
#define CONFIG_SPL
+#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_TEXT_BASE 0x402F0400
-#define CONFIG_SPL_MAX_SIZE(46 * 1024)
+#define CONFIG_SPL_MAX_SIZE(101 * 1024)
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
#define CONFIG_SPL_BSS_START_ADDR 0x8000
@@ -148,6 +149,9 @@
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_YMODEM_SUPPORT
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_NET_VCI_STRING AM335x U-Boot SPL
+#define CONFIG_SPL_ETH_SUPPORT
#define CONFIG_SPL_LDSCRIPT$(CPUDIR)/omap-common/u-boot-spl.lds
/*
--
1.7.9.5
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[U-Boot] [PATCH v3 2/8] am33xx: CPSW init and definitions
From: Chandan Nath chandan.n...@ti.com
This patch adds platform-specific initialization for CPSW
switch on TI AM33XX SoCs.
Signed-off-by: Chandan Nath chandan.n...@ti.com
[Ilya: split init out of original patch]
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
Changes in v3:
- fix whitespace problem
arch/arm/cpu/armv7/am33xx/clock.c |8 +++-
arch/arm/include/asm/arch-am33xx/cpu.h | 11 +++
arch/arm/include/asm/arch-am33xx/hardware.h |5 +
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c
b/arch/arm/cpu/armv7/am33xx/clock.c
index 16beb4f..e3c4fd8 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock.c
@@ -24,6 +24,7 @@
#define PRCM_MOD_EN0x2
#define PRCM_FORCE_WAKEUP 0x2
+#define PRCM_FUNCTL0x0
#define PRCM_EMIF_CLK_ACTIVITY BIT(2)
#define PRCM_L3_GCLK_ACTIVITY BIT(4)
@@ -38,7 +39,7 @@
#define CLK_MODE_SEL 0x7
#define CLK_MODE_MASK 0xfff8
#define CLK_DIV_SEL0xFFE0
-
+#define CPGMAC0_IDLE 0x3
const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
@@ -138,6 +139,11 @@ static void enable_per_clocks(void)
writel(PRCM_MOD_EN, cmper-i2c1clkctrl);
while (readl(cmper-i2c1clkctrl) != PRCM_MOD_EN)
;
+
+ /* Ethernet */
+ writel(PRCM_MOD_EN, cmper-cpgmac0clkctrl);
+ while ((readl(cmper-cpgmac0clkctrl) CPGMAC0_IDLE) != PRCM_FUNCTL)
+ ;
}
static void mpu_pll_config(void)
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
b/arch/arm/include/asm/arch-am33xx/cpu.h
index e63ab74..de9ee91 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -255,6 +255,17 @@ struct ctrl_stat {
#define OMAP_GPIO_CLEARDATAOUT 0x0190
#define OMAP_GPIO_SETDATAOUT 0x0194
+/* Control Device Register */
+struct ctrl_dev {
+ unsigned int deviceid; /* offset 0x00 */
+ unsigned int resv1[11];
+ unsigned int macid0l; /* offset 0x30 */
+ unsigned int macid0h; /* offset 0x34 */
+ unsigned int macid1l; /* offset 0x38 */
+ unsigned int macid1h; /* offset 0x3c */
+ unsigned int resv2[4];
+ unsigned int miisel;/* offset 0x50 */
+};
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL_STRICT_NAMES */
diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h
b/arch/arm/include/asm/arch-am33xx/hardware.h
index 0ec22eb..4b1c725 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware.h
@@ -46,6 +46,7 @@
/* Control Module Base Address */
#define CTRL_BASE 0x44E1
+#define CTRL_DEVICE_BASE 0x44E10600
/* PRCM Base Address */
#define PRCM_BASE 0x44E0
@@ -78,4 +79,8 @@
#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400)
#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE
+/* CPSW Config space */
+#define AM335X_CPSW_BASE 0x4A10
+#define AM335X_CPSW_MDIO_BASE 0x4A101000
+
#endif /* __AM33XX_HARDWARE_H */
--
1.7.9.5
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Re: [U-Boot] RFC - PatchTrack Specification (revised)
Hi Wolfgang, On Wed, Jul 25, 2012 at 4:41 AM, Wolfgang Denk w...@denx.de wrote: Dear Graeme Russ, In message CALButCJXJE+mo_W5=kyt8bto4e36-i5ajmcgre-cg0fyp1r...@mail.gmail.com you wrote: A revised version of the spec (sorry, I would have used reply-to but something went amiss with gmail and I've lost the original) http://www.denx.de/wiki/U-Boot/ToolsPatchTracking updated. Thanks - I've made a couple of minor tweaks Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 6/8] net/bootp: add VCI support for BOOTP also
Hi Ilya,
On Tue, Jul 24, 2012 at 5:22 PM, Ilya Yanok
ilya.ya...@cogentembedded.com wrote:
Vendor Class Identifier option is common to BOOTP and DHCP and
can be useful without PXE. So send VCI in both BOOTP and DHCP
requests if CONFIG_BOOTP_VCI_STRING is defined.
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
net/bootp.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/net/bootp.c b/net/bootp.c
index 0f0867b..a68f914 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -339,6 +339,14 @@ BootpTimeout(void)
}
}
+#define put_vci(e, str)\
+ do {\
+ *e++ = 60; \
Please keep the comment on the magic number.
+ *e++ = sizeof(str); \
Did you mean to change this from strlen() to sizeof()? These are not
the same thing.
+ memcpy(e, str, sizeof(str));\
+ e += sizeof(str); \
+ } while (0)
+
/*
* Initialize BOOTP extension fields in the request.
*/
@@ -435,12 +443,10 @@ static int DhcpExtended(u8 *e, int message_type,
IPaddr_t ServerID,
printf(Invalid pxeuuid: %s\n, uuid);
}
}
+#endif
- *e++ = 60; /* Vendor Class Identifier */
- vci_strlen = strlen(CONFIG_BOOTP_VCI_STRING);
If you aren't using this anymore, then you should remove size_t
vci_strlen; from the top of the file.
- *e++ = vci_strlen;
- memcpy(e, CONFIG_BOOTP_VCI_STRING, vci_strlen);
- e += vci_strlen;
+#ifdef CONFIG_BOOTP_VCI_STRING
+ put_vci(e, CONFIG_VCI_STRING);
#endif
#if defined(CONFIG_BOOTP_VENDOREX)
@@ -527,6 +533,10 @@ static int BootpExtended(u8 *e)
*e++ = (576 - 312 + OPT_FIELD_SIZE) 0xff;
#endif
+#ifdef CONFIG_BOOTP_VCI_STRING
+ put_vci(e, CONFIG_VCI_STRING);
+#endif
+
#if defined(CONFIG_BOOTP_SUBNETMASK)
*e++ = 1; /* Subnet mask request */
*e++ = 4;
--
1.7.9.5
-Joe
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[U-Boot] powerdown can't work (mx28)
Hi: I find that mx28_powerdown function can't power down mx28, and continue to load kernel I don't know whether this issue is on your side. My board is changed frommx28evk. Was mx28_powerdown function tested? Best Regards, Alex___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
