Re: [U-Boot] Problems with a P2020 board
Hi. For the bootcount register, we wanted something that was only reset at power on (or never reset). We didn't find a suitable register in the P2020, and freescale support seemed to agree that there was no such register. (I'm now using a couple of alarm registers fromthe I2C RTC, a hack...). I discovered what was wrong with the timer interrupts. I had switched on the watchdog, and it turns out that the code to reset the watchdog was wrong. It was doing a read-modify-write of the TSR register (OR-ing in the WOS flag), where it should have just been writing the WIS flag to the register. There is a patch in patchwork for this. Thanks for your help (and sorry, I should have posted this a while ago, but I've been out of the office). Mark Marshall. PS. I have also made progress with the third issue, eSPI acces. I think that I will submit a complete re-write of the fsl_espi code, it seems to be wrong. The RNE and TNF bit's only indicate that you can read or write and single 8-bit quantity, not a full 32-bits, which is assumed by the code. From: Joakim Tjernlund [joakim.tjernl...@transmode.se] Sent: 26 September 2012 14:09 Cc: Mark Marshall; mingkai...@freescale.com; u-boot@lists.denx.de Subject: Re: [U-Boot] Problems with a P2020 board Joakim Tjernlund/Transmode wrote on 2012/08/30 15:12:08: > > > > > Hi. > > > > We have a new board which we are suing with U-boot. The CPU is a P2020. > > I am having a few minor problems, and I was hoping to get some help. > > > > - Boot Count. We are keen to use the boot counter feature, but I > > am struggling to find a suitable register in the P2020. The file > > arch/powerpc/lib/bootcount.c list a few locations that work with > > other PowerPC chips, but I can't find any of those registers in the > > P2020 documentation. > > Me too on finding such a register Did you find a register? > > > > > - SPI Flash seems very slow. The SPI flash accesses all seem to be > > very > > slow. I can increase the SPI clock (to 40 MHz) and this helps, but the > > real problem is the code in drivers/spi/fsl_espi.c. Here there is an 80us > > delay after each 32-bit value is written to the TX FIFO. I don't understand > > why this delay is there? If I reduce it to 2 usec everything still works, > > and > > SPI Flash accesses are much faster. I can easily produce a patch to > > remove or reduce this delay, but I'd rather know why it was there in the > > first place? > > > > - Timer Interrupts seem to stop. Once U-boot has started the timer > > interrupts seem to stop. I have added a test command that prints out > > the timestamp variable (from arch/powerpc/lib/interrupts.c). I can > > see that when we enter the interactive loop this variable stops > > incrementing. I can add boot scripts that output this value, and it > > is incrementing until the console becomes interactive. Has anyone > > else seen a problem like this? I wonder if you found out the cause? We have recently seen that running LocalBus with 150MHz sometimes makes out board instable(complete freeze) So far we have no clue as it is hard to reproduce. 37,5 MHz works fine tough. > I have but only when running from our BDI2000/BDI3000 emulator. We figured > it was something with the emulator settings but I was never convinced. > If you find out why, please let me know. > Oh, we have a P2010 though. Jocke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] arm/km: add mv88e6352 configuration for kmnusa
> -Original Message-
> From: Prafulla Wadaskar
> Sent: 21 August 2012 12:01
> To: 'Valentin Longchamp'; u-boot@lists.denx.de
> Cc: Holger Brunck
> Subject: RE: [PATCH v2 1/2] arm/km: add mv88e6352 configuration for
> kmnusa
>
>
>
> > -Original Message-
> > From: Valentin Longchamp [mailto:valentin.longch...@keymile.com]
> > Sent: 17 August 2012 15:05
> > To: u-boot@lists.denx.de
> > Cc: Valentin Longchamp; Holger Brunck; Prafulla Wadaskar
> > Subject: [PATCH v2 1/2] arm/km: add mv88e6352 configuration for
> kmnusa
> >
> > The kmnusa board uses a mv88e6352 switch that is connected to the
> main
> > eth interface of the kirkwood. Therefore the switch must be
> configured
> > so that the kirkwood's egiga eth inferface can be used.
> >
> > Signed-off-by: Valentin Longchamp
> > Cc: Holger Brunck
> > Cc: Prafulla Wadaskar
> > ---
> > changes for v2:
> > - update comment to follow c-style commenting
> >
> > board/keymile/km_arm/km_arm.c | 65
> > +
> > 1 files changed, 65 insertions(+), 0 deletions(-)
> >
> > diff --git a/board/keymile/km_arm/km_arm.c
> > b/board/keymile/km_arm/km_arm.c
> > index 2b2ca39..604085d 100644
> > --- a/board/keymile/km_arm/km_arm.c
> > +++ b/board/keymile/km_arm/km_arm.c
> > @@ -385,6 +385,71 @@ void reset_phy(void)
> > /* reset the phy */
> > miiphy_reset(name, CONFIG_PHY_BASE_ADR);
> > }
> > +#elif defined(CONFIG_KM_PIGGY4_88E6352)
> > +
> > +#include
> > +
> > +#if defined(CONFIG_KM_NUSA)
> > +struct mv88e_sw_reg extsw_conf[] = {
> > + /*
> > +* port 0, PIGGY4, autoneg
> > +* first the fix for the 1000Mbits Autoneg, this is from
> > +* a Marvell errata, the regs are undocumented
> > +*/
> > + { PHY(0), PHY_PAGE, AN1000FIX_PAGE },
> > + { PHY(0), PHY_STATUS, AN1000FIX },
> > + { PHY(0), PHY_PAGE, 0 },
> > + /* now the real port and phy configuration */
> > + { PORT(0), PORT_PHY, NO_SPEED_FOR },
> > + { PORT(0), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
> > + { PHY(0), PHY_1000_CTRL, NO_ADV },
> > + { PHY(0), PHY_SPEC_CTRL, AUTO_MDIX_EN },
> > + { PHY(0), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
> > + FULL_DUPLEX },
> > + /* port 1, unused */
> > + { PORT(1), PORT_CTRL, PORT_DIS },
> > + { PHY(1), PHY_CTRL, PHY_PWR_DOWN },
> > + { PHY(1), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
> > + /* port 2, unused */
> > + { PORT(2), PORT_CTRL, PORT_DIS },
> > + { PHY(2), PHY_CTRL, PHY_PWR_DOWN },
> > + { PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
> > + /* port 3, unused */
> > + { PORT(3), PORT_CTRL, PORT_DIS },
> > + { PHY(3), PHY_CTRL, PHY_PWR_DOWN },
> > + { PHY(3), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
> > + /* port 4, ICNEV, SerDes, SGMII */
> > + { PORT(4), PORT_STATUS, NO_PHY_DETECT },
> > + { PORT(4), PORT_PHY, SPEED_1000_FOR },
> > + { PORT(4), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
> > + { PHY(4), PHY_CTRL, PHY_PWR_DOWN },
> > + { PHY(4), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
> > + /* port 5, CPU_RGMII */
> > + { PORT(5), PORT_PHY, RX_RGMII_TIM | TX_RGMII_TIM | FLOW_CTRL_EN |
> > + FLOW_CTRL_FOR | LINK_VAL | LINK_FOR | FULL_DPX |
> > + FULL_DPX_FOR | SPEED_1000_FOR },
> > + { PORT(5), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
> > + /* port 6, unused, this port has no phy */
> > + { PORT(6), PORT_CTRL, PORT_DIS },
> > +};
> > +#else
> > +struct mv88e_sw_reg extsw_conf[] = {};
> > +#endif
> > +
> > +void reset_phy(void)
> > +{
> > +#if defined(CONFIG_KM_MVEXTSW_ADDR)
> > + char *name = "egiga0";
> > +
> > + if (miiphy_set_current_dev(name))
> > + return;
> > +
> > + mv88e_sw_program(name, CONFIG_KM_MVEXTSW_ADDR, extsw_conf,
> > + ARRAY_SIZE(extsw_conf));
> > + mv88e_sw_reset(name, CONFIG_KM_MVEXTSW_ADDR);
> > +#endif
> > +}
> > +
> > #else
> > /* Configure and enable MV88E1118 PHY on the piggy*/
> > void reset_phy(void)
> > --
>
> Acked-By: Prafulla Wadaskar
Applied to u-boot-marvell.git master branch
Regards...
Prafulla . . .
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Re: [U-Boot] [PATCH 2/2] km_kirkwood: enable MV88E6352_SWITCH support for kmnusa
> -Original Message- > From: Valentin Longchamp [mailto:valentin.longch...@keymile.com] > Sent: 16 August 2012 16:55 > To: u-boot@lists.denx.de > Cc: holger.bru...@keymile.com; Prafulla Wadaskar; > valentin.longch...@keymile.com > Subject: [PATCH 2/2] km_kirkwood: enable MV88E6352_SWITCH support for > kmnusa > > This is required to configure the external 88e6352 switch on nusa. > > Signed-off-by: Valentin Longchamp > cc: Holger Brunck > cc: Prafulla Wadaskar > --- > include/configs/km_kirkwood.h |2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/include/configs/km_kirkwood.h > b/include/configs/km_kirkwood.h > index fba181f..762cc10 100644 > --- a/include/configs/km_kirkwood.h > +++ b/include/configs/km_kirkwood.h > @@ -62,6 +62,8 @@ > #define CONFIG_KM_ENV_IS_IN_SPI_NOR > #define CONFIG_KM_FPGA_CONFIG > #define CONFIG_KM_PIGGY4_88E6352 > +#define CONFIG_MV88E6352_SWITCH > +#define CONFIG_KM_MVEXTSW_ADDR 0x10 > > /* KM_MGCOGE3UN */ > #elif defined(CONFIG_KM_MGCOGE3UN) Applied to u-boot-marvell.git master branch Regards... Prafulla . . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] edminiv2: increase malloc len to 256K
> -Original Message- > From: u-boot-boun...@lists.denx.de [mailto:u-boot- > boun...@lists.denx.de] On Behalf Of Albert ARIBAUD > Sent: 22 September 2012 06:27 > To: u-boot@lists.denx.de > Subject: [U-Boot] [PATCH] edminiv2: increase malloc len to 256K > > Malloc len of 128K caused a warning from > ehci_hcd asking for more. > > Signed-off-by: Albert ARIBAUD > --- > Note: this has been tested on target -- actually, > target is now flashed with the merge of u-boot/arm > and u-boot master branches plus this patch. > > include/configs/edminiv2.h |2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h > index f2cfaf8..adb505e 100644 > --- a/include/configs/edminiv2.h > +++ b/include/configs/edminiv2.h > @@ -222,7 +222,7 @@ > /* > * Size of malloc() pool > */ > -#define CONFIG_SYS_MALLOC_LEN(1024 * 128) /* 128kB for malloc() > */ > +#define CONFIG_SYS_MALLOC_LEN(1024 * 256) /* 256kB for malloc() > */ > > /* > * Other required minimal configurations > -- Applied to u-boot-marvell.git master branch Regards.. Prafulla . . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] ARM: kirkwood/orion5x: Use reset_cpu definition in include/common.h
> -Original Message- > From: u-boot-boun...@lists.denx.de [mailto:u-boot- > boun...@lists.denx.de] On Behalf Of Pavel Machek > Sent: 25 September 2012 17:57 > To: dingu...@altera.com > Cc: ma...@denx.de; dinh.li...@gmail.com; cl...@altera.com; u- > b...@lists.denx.de; tr...@ti.com; s...@denx.de > Subject: Re: [U-Boot] [PATCH v4 2/2] ARM: kirkwood/orion5x: Use > reset_cpu definition in include/common.h > > Albert, could you apply this? > > It is trivial cleanup, and while marked 2/2, it is really independend. Applied to u-boot-marvell.git master branch Regards... Prafulla . . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH v2 1/5] env: Add support for callbacks to environment vars
Dear Joe Hershberger,
[...]
> + . = .;
> + __u_boot_env_clbk_start = .;
> + .u_boot_env_clbk : { *(.u_boot_env_clbk) }
> + __u_boot_env_clbk_end = .;
> +
> + . = ALIGN(4);
> +
[...]
Can you make some use of the LG-array patches ?
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v3 06/18] tegra: fdt: Add LCD definitions for Tegra
On Thu, Sep 27, 2012 at 04:37:41PM -0700, Simon Glass wrote: > Hi Stephen, > > On Thu, Sep 27, 2012 at 4:21 PM, Stephen Warren wrote: > > On 09/27/2012 02:27 PM, Simon Glass wrote: > >> On Thu, Sep 27, 2012 at 8:49 AM, Stephen Warren > >> wrote: > >>> On 09/27/2012 07:58 AM, Simon Glass wrote: > > ... > Really this is just a way of getting U-Boot and Linux to agree on the > address, by having U-Boot know the address that the kernel will happen > to use. It isn't very robust, but we have found it useful as a means > of avoiding problems in this area. > >>> > >>> Right, but again, why can't the display driver simply read the address > >>> out of the register; why is there a need to duplicate the data? > >>> > >>> I guess one possibility is that the register only gives the base address > >>> and not the size/mode of the allocated surface, but I don't recall if > >>> this proposed binding did that either? > >> > >> So here is my explanation: > >> > >> 1. U-Boot would normally put the display right near the top of memory. > >> Instead, it figures out where the kernel will put it (somehow this > >> seems to often be at a fixed address) and uses that address. > >> > >> 2. That means that U-Boot will now have the display exactly where the > >> kernel wants it. > > > > Oh, the DT property is telling U-Boot where to put the surface so that > > when the kernel determines where to put it, it'll already be there? > > > > That seems completely backwards. It's also extremely fragile; what if > > the kernel suddenly starts allocating at some other random address, > > which stops matching what U-Boot expects? > > The screen will flicker, or may fill up with junk as the kernel boots. > We did have that happen once when the driver changed. > > > > > Far better would be for U-Boot to put the surface wherever it wants, > > then manipulate the DT that's passed to the kernel to: > > > > a) Add a /memreserve/ so that memory doesn't get re-used for anything > > else during boot. > > > > b) Add a property to the display node indicating which memreserve > > represents the frame-buffer location. > > Yes, I believe the Tegra video driver we used (and I take your point > that it doesn't exist upstream so there is no point in discussing it > :-) always had to use the same frame buffer address. The memory was > statically allocated. Certainly this could be encoded in the fdt. > > > > > When the kernel boots, it can: > > > > * Copy the content from the U-Boot-allocated buffer to whatever display > > buffer the kernel allocated before writing the new address to the HW. > > > > * Undo the memory reservation triggered by the /memreserve/ to allow the > > memory to be re-used. > > > >> So what do you think? Should we remove this entirely, or is it a useful > >> hack? > > > > Yes, I think in its current form, it isn't useful. > > Thanks for the thorough response. Let's remove it, particularly as > there isn't even a kernel driver upstream yet. We've been discussing some of these issues for quite some time and came to the conclusion that the Tegra DRM driver should not be using static allocations like the previous drivers did. One of the reasons is that the amount of carveout memory needs to be fixed at boot time, which isn't going to suit a wide range of devices well. Another, perhaps more important reason is that starting with Tegra30 that's no longer necessary because of the SMMU. So in the end it wouldn't be possible to reliably determine the memory area where the kernel will put the framebuffer. If we want a flicker- free boot then we need to go with something more elaborate like what Stephen suggested. Thierry pgp01FiKND58b.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools: Add cleanpatch
Dear Fabio Estevam,
> From: Fabio Estevam
>
> There are some errors reported by checkpatch.pl that can be easily cleaned
> up by using the cleanpatch tool.
>
> Import the cleanpatch script from linux kernel 3.5.4 stable version.
Sweet %^)
Can you add the revision of the file from Linux kernel into the comment please?
I think if you run git log on the file, it's the first two or three lines you
put here (Author and Hash).
> Signed-off-by: Fabio Estevam
> ---
> tools/cleanpatch | 258
> ++ 1 file changed, 258
> insertions(+)
> create mode 100755 tools/cleanpatch
>
> diff --git a/tools/cleanpatch b/tools/cleanpatch
> new file mode 100755
> index 000..9680d03
> --- /dev/null
> +++ b/tools/cleanpatch
> @@ -0,0 +1,258 @@
> +#!/usr/bin/perl -w
> +#
> +# Clean a patch file -- or directory of patch files -- of stealth
> whitespace. +# WARNING: this can be a highly destructive operation. Use
> with caution. +#
> +
> +use bytes;
> +use File::Basename;
> +
> +# Default options
> +$max_width = 79;
> +
> +# Clean up space-tab sequences, either by removing spaces or
> +# replacing them with tabs.
> +sub clean_space_tabs($)
> +{
> +no bytes;# Tab alignment depends on characters
> +
> +my($li) = @_;
> +my($lo) = '';
> +my $pos = 0;
> +my $nsp = 0;
> +my($i, $c);
> +
> +for ($i = 0; $i < length($li); $i++) {
> + $c = substr($li, $i, 1);
> + if ($c eq "\t") {
> + my $npos = ($pos+$nsp+8) & ~7;
> + my $ntab = ($npos >> 3) - ($pos >> 3);
> + $lo .= "\t" x $ntab;
> + $pos = $npos;
> + $nsp = 0;
> + } elsif ($c eq "\n" || $c eq "\r") {
> + $lo .= " " x $nsp;
> + $pos += $nsp;
> + $nsp = 0;
> + $lo .= $c;
> + $pos = 0;
> + } elsif ($c eq " ") {
> + $nsp++;
> + } else {
> + $lo .= " " x $nsp;
> + $pos += $nsp;
> + $nsp = 0;
> + $lo .= $c;
> + $pos++;
> + }
> +}
> +$lo .= " " x $nsp;
> +return $lo;
> +}
> +
> +# Compute the visual width of a string
> +sub strwidth($) {
> +no bytes;# Tab alignment depends on characters
> +
> +my($li) = @_;
> +my($c, $i);
> +my $pos = 0;
> +my $mlen = 0;
> +
> +for ($i = 0; $i < length($li); $i++) {
> + $c = substr($li,$i,1);
> + if ($c eq "\t") {
> + $pos = ($pos+8) & ~7;
> + } elsif ($c eq "\n") {
> + $mlen = $pos if ($pos > $mlen);
> + $pos = 0;
> + } else {
> + $pos++;
> + }
> +}
> +
> +$mlen = $pos if ($pos > $mlen);
> +return $mlen;
> +}
> +
> +$name = basename($0);
> +
> +@files = ();
> +
> +while (defined($a = shift(@ARGV))) {
> +if ($a =~ /^-/) {
> + if ($a eq '-width' || $a eq '-w') {
> + $max_width = shift(@ARGV)+0;
> + } else {
> + print STDERR "Usage: $name [-width #] files...\n";
> + exit 1;
> + }
> +} else {
> + push(@files, $a);
> +}
> +}
> +
> +foreach $f ( @files ) {
> +print STDERR "$name: $f\n";
> +
> +if (! -f $f) {
> + print STDERR "$f: not a file\n";
> + next;
> +}
> +
> +if (!open(FILE, '+<', $f)) {
> + print STDERR "$name: Cannot open file: $f: $!\n";
> + next;
> +}
> +
> +binmode FILE;
> +
> +# First, verify that it is not a binary file; consider any file
> +# with a zero byte to be a binary file. Is there any better, or
> +# additional, heuristic that should be applied?
> +$is_binary = 0;
> +
> +while (read(FILE, $data, 65536) > 0) {
> + if ($data =~ /\0/) {
> + $is_binary = 1;
> + last;
> + }
> +}
> +
> +if ($is_binary) {
> + print STDERR "$name: $f: binary file\n";
> + next;
> +}
> +
> +seek(FILE, 0, 0);
> +
> +$in_bytes = 0;
> +$out_bytes = 0;
> +$lineno = 0;
> +
> +@lines = ();
> +
> +$in_hunk = 0;
> +$err = 0;
> +
> +while ( defined($line = ) ) {
> + $lineno++;
> + $in_bytes += length($line);
> +
> + if (!$in_hunk) {
> + if ($line =~
> + /^\@\@\s+\-([0-9]+),([0-9]+)\s+\+([0-9]+),([0-9]+)\s\@\@/) {
> + $minus_lines = $2;
> + $plus_lines = $4;
> + if ($minus_lines || $plus_lines) {
> + $in_hunk = 1;
> + @hunk_lines = ($line);
> + }
> + } else {
> + push(@lines, $line);
> + $out_bytes += length($line);
> + }
> + } else {
> + # We're in a hunk
> +
> + if ($line =~ /^\+/) {
> + $plus_lines--;
> +
> + $text = substr($line, 1);
> + $text =~ s/[ \t\r]*$//; # Remove trailing spaces
> + $text = clean_space_tabs($text);
> +
> + $l_width = strwidth($text);
> + if ($max_width && $l_width > $max_width) {
> + print STDERR
> +
[U-Boot] [PATCH] tools: Add cleanpatch
From: Fabio Estevam
There are some errors reported by checkpatch.pl that can be easily cleaned up
by
using the cleanpatch tool.
Import the cleanpatch script from linux kernel 3.5.4 stable version.
Signed-off-by: Fabio Estevam
---
tools/cleanpatch | 258 ++
1 file changed, 258 insertions(+)
create mode 100755 tools/cleanpatch
diff --git a/tools/cleanpatch b/tools/cleanpatch
new file mode 100755
index 000..9680d03
--- /dev/null
+++ b/tools/cleanpatch
@@ -0,0 +1,258 @@
+#!/usr/bin/perl -w
+#
+# Clean a patch file -- or directory of patch files -- of stealth whitespace.
+# WARNING: this can be a highly destructive operation. Use with caution.
+#
+
+use bytes;
+use File::Basename;
+
+# Default options
+$max_width = 79;
+
+# Clean up space-tab sequences, either by removing spaces or
+# replacing them with tabs.
+sub clean_space_tabs($)
+{
+no bytes; # Tab alignment depends on characters
+
+my($li) = @_;
+my($lo) = '';
+my $pos = 0;
+my $nsp = 0;
+my($i, $c);
+
+for ($i = 0; $i < length($li); $i++) {
+ $c = substr($li, $i, 1);
+ if ($c eq "\t") {
+ my $npos = ($pos+$nsp+8) & ~7;
+ my $ntab = ($npos >> 3) - ($pos >> 3);
+ $lo .= "\t" x $ntab;
+ $pos = $npos;
+ $nsp = 0;
+ } elsif ($c eq "\n" || $c eq "\r") {
+ $lo .= " " x $nsp;
+ $pos += $nsp;
+ $nsp = 0;
+ $lo .= $c;
+ $pos = 0;
+ } elsif ($c eq " ") {
+ $nsp++;
+ } else {
+ $lo .= " " x $nsp;
+ $pos += $nsp;
+ $nsp = 0;
+ $lo .= $c;
+ $pos++;
+ }
+}
+$lo .= " " x $nsp;
+return $lo;
+}
+
+# Compute the visual width of a string
+sub strwidth($) {
+no bytes; # Tab alignment depends on characters
+
+my($li) = @_;
+my($c, $i);
+my $pos = 0;
+my $mlen = 0;
+
+for ($i = 0; $i < length($li); $i++) {
+ $c = substr($li,$i,1);
+ if ($c eq "\t") {
+ $pos = ($pos+8) & ~7;
+ } elsif ($c eq "\n") {
+ $mlen = $pos if ($pos > $mlen);
+ $pos = 0;
+ } else {
+ $pos++;
+ }
+}
+
+$mlen = $pos if ($pos > $mlen);
+return $mlen;
+}
+
+$name = basename($0);
+
+@files = ();
+
+while (defined($a = shift(@ARGV))) {
+if ($a =~ /^-/) {
+ if ($a eq '-width' || $a eq '-w') {
+ $max_width = shift(@ARGV)+0;
+ } else {
+ print STDERR "Usage: $name [-width #] files...\n";
+ exit 1;
+ }
+} else {
+ push(@files, $a);
+}
+}
+
+foreach $f ( @files ) {
+print STDERR "$name: $f\n";
+
+if (! -f $f) {
+ print STDERR "$f: not a file\n";
+ next;
+}
+
+if (!open(FILE, '+<', $f)) {
+ print STDERR "$name: Cannot open file: $f: $!\n";
+ next;
+}
+
+binmode FILE;
+
+# First, verify that it is not a binary file; consider any file
+# with a zero byte to be a binary file. Is there any better, or
+# additional, heuristic that should be applied?
+$is_binary = 0;
+
+while (read(FILE, $data, 65536) > 0) {
+ if ($data =~ /\0/) {
+ $is_binary = 1;
+ last;
+ }
+}
+
+if ($is_binary) {
+ print STDERR "$name: $f: binary file\n";
+ next;
+}
+
+seek(FILE, 0, 0);
+
+$in_bytes = 0;
+$out_bytes = 0;
+$lineno = 0;
+
+@lines = ();
+
+$in_hunk = 0;
+$err = 0;
+
+while ( defined($line = ) ) {
+ $lineno++;
+ $in_bytes += length($line);
+
+ if (!$in_hunk) {
+ if ($line =~
+ /^\@\@\s+\-([0-9]+),([0-9]+)\s+\+([0-9]+),([0-9]+)\s\@\@/) {
+ $minus_lines = $2;
+ $plus_lines = $4;
+ if ($minus_lines || $plus_lines) {
+ $in_hunk = 1;
+ @hunk_lines = ($line);
+ }
+ } else {
+ push(@lines, $line);
+ $out_bytes += length($line);
+ }
+ } else {
+ # We're in a hunk
+
+ if ($line =~ /^\+/) {
+ $plus_lines--;
+
+ $text = substr($line, 1);
+ $text =~ s/[ \t\r]*$//; # Remove trailing spaces
+ $text = clean_space_tabs($text);
+
+ $l_width = strwidth($text);
+ if ($max_width && $l_width > $max_width) {
+ print STDERR
+ "$f:$lineno: adds line exceeds $max_width ",
+ "characters ($l_width)\n";
+ }
+
+ push(@hunk_lines, '+'.$text);
+ } elsif ($line =~ /^\-/) {
+ $minus_lines--;
+ push(@hunk_lines, $line);
+ } elsif ($line =~ /^ /) {
+ $plus_lines--;
+ $minus_lines--;
+ push(@hunk_lines, $line);
+ } else {
+
Re: [U-Boot] Custodians, Maintainers and old platforms
Hi Tom, [snip] > (I had attempted to bcc this to all listed maintainer, but that upset > Google greatly. I'll send this out manually instead later). > > I'd like to put this out here for custodians and maintainers to > consider, especially in light of the device model work that's not just > coming but has already started being posted. > > One of the keys to the success of U-Boot has been the number of > platforms that are supported. But part of supporting platforms is > needing people to volunteer to maintain them long term and help with > testing changes and so forth. So first of all, I've just tagged > v2012.10-rc1. Please give this at least a basic test on whatever > platforms you're able to. > Having been testing on OMAP5 and OMAP4 sdp. Will also test on others. Is there any branch where the basic DM driver support patches are pushed to start with ? Thanks, Sricharan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: fdt: Relocate fdt along with other data
Rather than leave the fdt down next to the code/data, we really should
relocate it along with everything else. For CONFIG_OF_EMBED this happens
automatically, but for CONFIG_OF_SEPARATE it does not.
Add code to copy the fdt and point to the new copy after relocation.
Signed-off-by: Simon Glass
---
arch/arm/lib/board.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 109a1ac..6dca891 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -274,6 +274,8 @@ void board_init_f(ulong bootflag)
#ifdef CONFIG_PRAM
ulong reg;
#endif
+ void *new_fdt = NULL;
+ size_t fdt_size = 0;
bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
@@ -409,6 +411,22 @@ void board_init_f(ulong bootflag)
debug("Reserving %zu Bytes for Global Data at: %08lx\n",
sizeof (gd_t), addr_sp);
+#if defined(CONFIG_OF_SEPARATE) && defined(CONFIG_OF_CONTROL)
+ /*
+* If the device tree is sitting immediate above our image then we
+* must relocate it. If it is embedded in the data section, then it
+* will be relocated with other data.
+*/
+ if (gd->fdt_blob) {
+ fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
+
+ addr_sp -= fdt_size;
+ new_fdt = (void *)addr_sp;
+ debug("Reserving %zu Bytes for FDT at: %08lx\n",
+ fdt_size, addr_sp);
+ }
+#endif
+
/* setup stackpointer for exeptions */
gd->irq_sp = addr_sp;
#ifdef CONFIG_USE_IRQ
@@ -442,6 +460,10 @@ void board_init_f(ulong bootflag)
gd->start_addr_sp = addr_sp;
gd->reloc_off = addr - _TEXT_BASE;
debug("relocation Offset is: %08lx\n", gd->reloc_off);
+ if (new_fdt) {
+ memcpy(new_fdt, gd->fdt_blob, fdt_size);
+ gd->fdt_blob = new_fdt;
+ }
memcpy(id, (void *)gd, sizeof(gd_t));
relocate_code(addr_sp, id, addr);
--
1.7.7.3
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[U-Boot] [PATCH] patman: Handle checkpatch.pl not providing file/line info
Sometimes we don't get a valid filename or line number from checkpatch.pl,
for example if the patch is in a bad format. Deal with this by using a
default value, rather than a stack trace.
Signed-off-by: Simon Glass
---
tools/patman/checkpatch.py |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py
index a234277..d831087 100644
--- a/tools/patman/checkpatch.py
+++ b/tools/patman/checkpatch.py
@@ -145,8 +145,9 @@ def CheckPatches(verbose, args):
if len(problems) != error_count + warning_count:
print "Internal error: some problems lost"
for item in problems:
-print GetWarningMsg(col, item['type'], item['file'],
-item['line'], item['msg'])
+print GetWarningMsg(col, item['type'],
+item.get('file', ''),
+item.get('line', 0), item['msg'])
#print stdout
if error_count != 0 or warning_count != 0:
str = 'checkpatch.pl found %d error(s), %d warning(s)' % (
--
1.7.7.3
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[U-Boot] [PATCH 4/4] input: Add debugging for key matrix key codes
These are read from the fdt - add a debug feature to display the mapping
on start-up.
See that we get debug output listing the keycodes
Signed-off-by: Simon Glass
---
drivers/input/key_matrix.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/input/key_matrix.c b/drivers/input/key_matrix.c
index 287bf0d..946a186 100644
--- a/drivers/input/key_matrix.c
+++ b/drivers/input/key_matrix.c
@@ -145,6 +145,8 @@ static uchar *create_keymap(struct key_matrix *config, u32
*data, int len,
key_code = tmp & 0x;
entry = row * config->num_cols + col;
map[entry] = key_code;
+ debug(" map %d, %d: pos=%d, keycode=%d\n", row, col,
+ entry, key_code);
if (pos && map_keycode == key_code)
*pos = entry;
}
--
1.7.7.3
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[U-Boot] [PATCH 2/4] input: Separate out keyboard repeat/delay from init
It is inconvenient to have to specify the keyboard repeat and delay at
init time if it is not yet available, so move this into a separate
function.
Some drivers will want to do this when their keyboard init routine
is actually called.
Signed-off-by: Simon Glass
---
drivers/input/input.c | 13 +
drivers/input/tegra-kbc.c |5 +++--
include/input.h | 14 ++
3 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 4eadd77..5b2b4b0 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -356,7 +356,8 @@ int input_send_keycodes(struct input_config *config,
* insert another character if we later realise that we
* have missed a repeat slot.
*/
- is_repeat = (int)get_timer(config->next_repeat_ms) >= 0;
+ is_repeat = config->repeat_rate_ms &&
+ (int)get_timer(config->next_repeat_ms) >= 0;
if (!is_repeat)
return 0;
}
@@ -392,13 +393,17 @@ int input_add_table(struct input_config *config, int
left_keycode,
return 0;
}
-int input_init(struct input_config *config, int leds, int repeat_delay_ms,
+void input_set_delays(struct input_config *config, int repeat_delay_ms,
int repeat_rate_ms)
{
- memset(config, '\0', sizeof(*config));
- config->leds = leds;
config->repeat_delay_ms = repeat_delay_ms;
config->repeat_rate_ms = repeat_rate_ms;
+}
+
+int input_init(struct input_config *config, int leds)
+{
+ memset(config, '\0', sizeof(*config));
+ config->leds = leds;
if (input_add_table(config, -1, -1,
kbd_plain_xlate, ARRAY_SIZE(kbd_plain_xlate)) ||
input_add_table(config, KEY_LEFTSHIFT, KEY_RIGHTSHIFT,
diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c
index f164791..9a30942 100644
--- a/drivers/input/tegra-kbc.c
+++ b/drivers/input/tegra-kbc.c
@@ -321,6 +321,8 @@ static int init_tegra_keyboard(void)
debug("%s: No keyboard register found\n", __func__);
return -1;
}
+ input_set_delays(&config.input, KBC_REPEAT_DELAY_MS,
+ KBC_REPEAT_RATE_MS);
/* Decode the keyboard matrix information (16 rows, 8 columns) */
if (key_matrix_init(&config.matrix, 16, 8)) {
@@ -356,8 +358,7 @@ int drv_keyboard_init(void)
{
struct stdio_dev dev;
- if (input_init(&config.input, 0, KBC_REPEAT_DELAY_MS,
- KBC_REPEAT_RATE_MS)) {
+ if (input_init(&config.input, 0)) {
debug("%s: Cannot set up input\n", __func__);
return -1;
}
diff --git a/include/input.h b/include/input.h
index 31b1ef9..0f4acb2 100644
--- a/include/input.h
+++ b/include/input.h
@@ -126,16 +126,22 @@ int input_getc(struct input_config *config);
int input_stdio_register(struct stdio_dev *dev);
/**
+ * Set up the keyboard autorepeat delays
+ *
+ * @param repeat_delay_ms Delay before key auto-repeat starts (in ms)
+ * @param repeat_rate_ms Delay between successive key repeats (in ms)
+ */
+void input_set_delays(struct input_config *config, int repeat_delay_ms,
+ int repeat_rate_ms);
+
+/**
* Set up the input handler with basic key maps.
*
* @param config Input state
* @param leds Initial LED value (INPUT_LED_ mask), 0 suggested
- * @param repeat_delay_ms Delay before key auto-repeat starts (in ms)
- * @param repeat_rate_ms Delay between successive key repeats (in ms)
* @return 0 if ok, -1 on error
*/
-int input_init(struct input_config *config, int leds, int repeat_delay_ms,
- int repeat_rate_ms);
+int input_init(struct input_config *config, int leds);
#ifdef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
extern int overwrite_console(void);
--
1.7.7.3
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[U-Boot] [PATCH 3/4] input: Allow key ghosting filter to be disabled
Some keyboards will not need a key ghosting filter, so make this feature
optional.
Signed-off-by: Simon Glass
---
drivers/input/key_matrix.c |9 +++--
drivers/input/tegra-kbc.c |2 +-
include/key_matrix.h |5 -
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/input/key_matrix.c b/drivers/input/key_matrix.c
index c08caa6..287bf0d 100644
--- a/drivers/input/key_matrix.c
+++ b/drivers/input/key_matrix.c
@@ -46,6 +46,9 @@ static int has_ghosting(struct key_matrix *config, struct
key_matrix_key *keys,
int key_in_same_col = 0, key_in_same_row = 0;
int i, j;
+ if (!config->ghost_filter || valid < 3)
+ return 0;
+
for (i = 0; i < valid; i++) {
/*
* Find 2 keys such that one key is in the same row
@@ -92,7 +95,7 @@ int key_matrix_decode(struct key_matrix *config, struct
key_matrix_key keys[],
}
/* For a ghost key config, ignore the keypresses for this iteration. */
- if (valid >= 3 && has_ghosting(config, keys, valid)) {
+ if (has_ghosting(config, keys, valid)) {
valid = 0;
debug("ghosting detected!\n");
}
@@ -200,12 +203,14 @@ int key_matrix_decode_fdt(struct key_matrix *config,
const void *blob,
return 0;
}
-int key_matrix_init(struct key_matrix *config, int rows, int cols)
+int key_matrix_init(struct key_matrix *config, int rows, int cols,
+ int ghost_filter)
{
memset(config, '\0', sizeof(*config));
config->num_rows = rows;
config->num_cols = cols;
config->key_count = rows * cols;
+ config->ghost_filter = ghost_filter;
assert(config->key_count > 0);
return 0;
diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c
index 9a30942..6f1cfd8 100644
--- a/drivers/input/tegra-kbc.c
+++ b/drivers/input/tegra-kbc.c
@@ -325,7 +325,7 @@ static int init_tegra_keyboard(void)
KBC_REPEAT_RATE_MS);
/* Decode the keyboard matrix information (16 rows, 8 columns) */
- if (key_matrix_init(&config.matrix, 16, 8)) {
+ if (key_matrix_init(&config.matrix, 16, 8, 1)) {
debug("%s: Could not init key matrix\n", __func__);
return -1;
}
diff --git a/include/key_matrix.h b/include/key_matrix.h
index f413314..9629716 100644
--- a/include/key_matrix.h
+++ b/include/key_matrix.h
@@ -40,6 +40,7 @@ struct key_matrix {
const u8 *plain_keycode;/* key code for each row / column */
const u8 *fn_keycode; /* ...when Fn held down */
int fn_pos; /* position of Fn key in key (or -1) */
+ int ghost_filter; /* non-zero to enable ghost filter */
};
/* Information about a particular key (row, column pair) in the matrix */
@@ -92,8 +93,10 @@ int key_matrix_decode_fdt(struct key_matrix *config, const
void *blob,
* @param config Keyboard matrix config
* @param rows Number of rows in key matrix
* @param cols Number of columns in key matrix
+ * @param ghost_filter Non-zero to enable ghost filtering
* @return 0 if ok, -1 on error
*/
-int key_matrix_init(struct key_matrix *config, int rows, int cols);
+int key_matrix_init(struct key_matrix *config, int rows, int cols,
+ int ghost_filter);
#endif
--
1.7.7.3
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[U-Boot] [PATCH 1/4] input: Correct key_matrix fdt decoding
Some issues with this were not addressed in the previous series. Fix up
the binding decoding to deal with what is actually expected in the fdt.
This corrects the broken keyboard on seaboard.
Signed-off-by: Simon Glass
---
drivers/input/key_matrix.c | 11 +++
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/input/key_matrix.c b/drivers/input/key_matrix.c
index 715e57a..c08caa6 100644
--- a/drivers/input/key_matrix.c
+++ b/drivers/input/key_matrix.c
@@ -153,6 +153,8 @@ int key_matrix_decode_fdt(struct key_matrix *config, const
void *blob,
int node)
{
const struct fdt_property *prop;
+ const char prefix[] = "linux,";
+ int plen = sizeof(prefix) - 1;
int offset;
/* Check each property name for ones that we understand */
@@ -168,16 +170,17 @@ int key_matrix_decode_fdt(struct key_matrix *config,
const void *blob,
/* Name needs to match "1,keymap" */
debug("%s: property '%s'\n", __func__, name);
- if (strncmp(name, "1,", 2) || len < 8 ||
- strcmp(name + len - 6, "keymap"))
+ if (strncmp(name, prefix, plen) ||
+ len < plen + 6 ||
+ strcmp(name + len - 6, "keymap"))
continue;
- len -= 8;
+ len -= plen + 6;
if (len == 0) {
config->plain_keycode = create_keymap(config,
(u32 *)prop->data, fdt32_to_cpu(prop->len),
KEY_FN, &config->fn_pos);
- } else if (0 == strncmp(name + 2, "fn-", len)) {
+ } else if (0 == strncmp(name + plen, "fn-", len)) {
config->fn_keycode = create_keymap(config,
(u32 *)prop->data, fdt32_to_cpu(prop->len),
-1, NULL);
--
1.7.7.3
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[U-Boot] [PATCH 0/4] Keyboard input improvements
This is a small series of patches to improve keyboard input for matrix keyboards: - Fix an fdt decoding bug which breaks seaboard - Permit key repeat/delay to be altered after init - Allow key ghosting filter to be enabled/disabled - Add a bit more debugging Since this series mostly affects tegra I suggest that it goes through the tegra tree. Simon Glass (4): input: Correct key_matrix fdt decoding input: Separate out keyboard repeat/delay from init input: Allow key ghosting filter to be disabled input: Add debugging for key matrix key codes drivers/input/input.c | 13 + drivers/input/key_matrix.c | 22 -- drivers/input/tegra-kbc.c |7 --- include/input.h| 14 ++ include/key_matrix.h |5 - 5 files changed, 43 insertions(+), 18 deletions(-) -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 02/16] tegra: Add display support to funcmux
Add support for a default pin mapping for display1.
Signed-off-by: Simon Glass
---
Changes in v2:
- Use const where possible in funcmux
Changes in v3:
- Remove LPW1 pin which is not needed by display
arch/arm/cpu/tegra20-common/funcmux.c | 37 +
1 files changed, 37 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/tegra20-common/funcmux.c
b/arch/arm/cpu/tegra20-common/funcmux.c
index b2129ad..ca20f93 100644
--- a/arch/arm/cpu/tegra20-common/funcmux.c
+++ b/arch/arm/cpu/tegra20-common/funcmux.c
@@ -25,6 +25,30 @@
#include
#include
+/*
+ * The PINMUX macro is used to set up pinmux tables.
+ */
+#define PINMUX(grp, mux, pupd, tri) \
+ {PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
+
+static const struct pingroup_config disp1_default[] = {
+ PINMUX(LDI, DISPA, NORMAL,NORMAL),
+ PINMUX(LHP0, DISPA, NORMAL,NORMAL),
+ PINMUX(LHP1, DISPA, NORMAL,NORMAL),
+ PINMUX(LHP2, DISPA, NORMAL,NORMAL),
+ PINMUX(LHS, DISPA, NORMAL,NORMAL),
+ PINMUX(LM0, RSVD4, NORMAL,NORMAL),
+ PINMUX(LPP, DISPA, NORMAL,NORMAL),
+ PINMUX(LPW0, DISPA, NORMAL,NORMAL),
+ PINMUX(LPW2, DISPA, NORMAL,NORMAL),
+ PINMUX(LSC0, DISPA, NORMAL,NORMAL),
+ PINMUX(LSPI, DISPA, NORMAL,NORMAL),
+ PINMUX(LVP1, DISPA, NORMAL,NORMAL),
+ PINMUX(LVS, DISPA, NORMAL,NORMAL),
+ PINMUX(SLXD, SPDIF, NORMAL,NORMAL),
+};
+
+
int funcmux_select(enum periph_id id, int config)
{
int bad_config = config != FUNCMUX_DEFAULT;
@@ -240,6 +264,19 @@ int funcmux_select(enum periph_id id, int config)
pinmux_tristate_disable(PINGRP_ATC);
}
break;
+ case PERIPH_ID_DISP1:
+ if (config == FUNCMUX_DEFAULT) {
+ int i;
+
+ for (i = PINGRP_LD0; i <= PINGRP_LD17; i++) {
+ pinmux_set_func(i, PMUX_FUNC_DISPA);
+ pinmux_tristate_disable(i);
+ pinmux_set_pullupdown(i, PMUX_PULL_NORMAL);
+ }
+ pinmux_config_table(disp1_default,
+ ARRAY_SIZE(disp1_default));
+ }
+ break;
default:
debug("%s: invalid periph_id %d", __func__, id);
--
1.7.7.3
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[U-Boot] [PATCH v4 0/16] tegra: Add display driver and LCD support for Seaboard
This series adds support for the Tegra2x's display peripheral. This supports the LCD display on Seaboard and we use this to enable console output in U-Boot on the LCD. Configuration is via the device tree. Proposed bindings are included in this series, taken from pwm bindings that should be in linux-next, a Tegra video binding that might be accepted in devicetree-discuss and a proposed video mode binding posted to dri-devel. While I agree EDID is convenient for machines I would prefer to provide a user-friendly way of selecting LCD settings as well, with EDID more as a fallback and auto-detection when available. To improve performance two optimisations are offered: 1. The LCD frame buffer is cached, with the cache being flushed after each newline sent to putc(), and in a few other situations. This dramatically increases performance (around 10x). This requires a few additions to the ARM cache support. 2. The console supports scrolling in steps of more than 1 line. This speeds up scrolling output considerably, particularly commands like 'printenv' which display a lot of output, and particular when the dcache is off. This requires a new CONFIG and a change to the console_scrollup() function. Changes in v2: - Add new patch to use const in pinmux_config_pingroup/table() - Use const where possible in funcmux - Add nvidia prefix to device tree properties - Update LCD driver to deal with new fdt bindings - Use a more generic config CONFIG_LCD_ALIGNMENT for lcd alignment - Put the LCD cache flush logic into lcd_putc() instead of lcd_puts() - Align tegra display using new CONFIG_LCD_ALIGNMENT feature - Update seaboard LCD definitions for new fdt binding Changes in v3: - Remove LPW1 pin which is not needed by display - Add new commit for pwm binding and node - Use displaymode binding for fdt - Bring in proposed tegra display controller binding - Add new panel binding to fit with tegra display controller binding - Rename pwfm driver to pwm - Use new proposed upstream pwm binding - Decode fdt node within the pwm driver - Introduce concept of a pwm channel, rather than separate peripherals - Separate display driver and LCD driver more in fdt - Add probe function to read in fdt parameters in display driver - Move some fdt decode code from LCD driver to SOC display driver - Rename fdt config structures - Use new pwm binding from pre-linux-next - Adjust LCD driver to use new SOC display driver structures - Add separate call to pwm_init() in board_init() - Put the LCD cache flush logic back into lcd_puts() - Handle a cached frame buffer out of normal U-Boot memory - Use new upstream proposed LCD definitions - Fix tiny bug in mult-line lcd scrolling Changes in v4: - Moved panel information into panel node (was in rgb node) - Add CONFIG_PWM_TEGRA to control inclusion of PWM support - Add a little more debugging to the PWM driver - Move code to set up PWM into the PWM commit - Rebase on top of new tegra common directory structure - Adjust fdt binding according to Thierry and Stephen's comments - Remove LCD frame buffer address property hack - Rebase on top of new tegra common directory structure - Change LCD panel GPIOs to be entirely optional - Only indicate that LCD init is complete when all stages complete - Change order of LCD init so that PWM comes first - Use system bit values for enum dcache_option instead of arbitrary numbers - Remove system.h header which is included anyway by most archs - Use lcd_puts() for echoing user input so lcd cached data is flushed - Adjust LCD fdt nodes for new binding - Use CONFIG_CONSOLE_SCROLL_LINES instead of CONSOLE_SCROLL_LINES - Put default CONFIG_CONSOLE_SCROLL_LINES at top of file - Add CONFIG_BOARD_LATE_INIT to enable LCD - Enable separate CONFIG_PWM_TEGRA option Mayuresh Kulkarni (1): tegra: Enable display/lcd support on Seaboard Simon Glass (14): tegra: Use const for pinmux_config_pingroup/table() tegra: Add display support to funcmux tegra: fdt: Add pwm binding and node tegra: fdt: Add LCD definitions for Tegra tegra: Add support for PWM tegra: Add LCD driver tegra: Add LCD support to Nvidia boards arm: Add control over cachability of memory regions lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignment lcd: Add support for flushing LCD fb from dcache after update tegra: Align LCD frame buffer to section boundary tegra: Support control of cache settings for LCD tegra: fdt: Add LCD definitions for Seaboard lcd: Add CONSOLE_SCROLL_LINES option to speed console Wei Ni (1): tegra: Add SOC support for display/lcd README | 16 + arch/arm/cpu/armv7/cache_v7.c | 11 + arch/arm/cpu/armv7/tegra20/Makefile|2 + arch/arm/cpu/armv7/tegra20/display.c | 409 ++ arch/arm/cpu/armv7/tegra20/pwm.c | 101 + arch/arm/cpu/tegra20-common/funcmux.c | 37 ++ arch/arm/cpu/tegra20-common/pinmux.c |4 +- arch/
[U-Boot] [PATCH] patman: Support Series-name tag to name a series
Sometimes it is possible to forget the name of the branch you used to
generate an upstream series. To assist with this, add an optional
patman does not use this.
Signed-off-by: Simon Glass
---
tools/patman/README|5 +
tools/patman/series.py |4 ++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/tools/patman/README b/tools/patman/README
index 86ede78..dc3957c 100644
--- a/tools/patman/README
+++ b/tools/patman/README
@@ -133,6 +133,11 @@ Series-prefix: prefix
Sets the subject prefix. Normally empty but it can be RFC for
RFC patches, or RESEND if you are being ignored.
+Series-name: name
+ Sets the name of the series. You don't need to have a name, and
+ patman does not yet use it, but it is convenient to put the branch
+ name here to help you keep track of multiple upstreaming efforts.
+
Cover-letter:
This is the patch set title
blah blah
diff --git a/tools/patman/series.py b/tools/patman/series.py
index 27528bf..67ab048 100644
--- a/tools/patman/series.py
+++ b/tools/patman/series.py
@@ -25,7 +25,7 @@ import gitutil
import terminal
# Series-xxx tags that we understand
-valid_series = ['to', 'cc', 'version', 'changes', 'prefix', 'notes'];
+valid_series = ['to', 'cc', 'version', 'changes', 'prefix', 'notes', 'name'];
class Series(dict):
"""Holds information about a patch series, including all tags.
@@ -76,7 +76,7 @@ class Series(dict):
self[name] = value
else:
raise ValueError("In %s: line '%s': Unknown 'Series-%s': valid "
-"options are %s" % (self.commit.hash, line, name,
+"options are %s" % (commit.hash, line, name,
', '.join(valid_series)))
def AddCommit(self, commit):
--
1.7.7.3
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[U-Boot] [PATCH] MAKEALL: add a -C/--check option to enable build checking
thanks to Tom Rini for the good idea.
Signed-off-by: Kim Phillips
---
MAKEALL | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index 806f21f..fa7d010 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -19,6 +19,7 @@ usage()
-l,--listList all targets to be built
-m,--maintainers List all targets and maintainer email
-M,--mails List all targets and all affilated emails
+ -C,--check Enable build checking
-h,--helpThis help output
Selections by these options are logically ANDed; if the same option
@@ -51,8 +52,8 @@ usage()
exit ${ret}
}
-SHORT_OPTS="ha:c:v:s:lmM"
-LONG_OPTS="help,arch:,cpu:,vendor:,soc:,list,maintainers,mails"
+SHORT_OPTS="ha:c:v:s:lmMC"
+LONG_OPTS="help,arch:,cpu:,vendor:,soc:,list,maintainers,mails,check"
# Option processing based on util-linux-2.13/getopt-parse.bash
@@ -111,6 +112,9 @@ while true ; do
fi
SELECTED='y'
shift 2 ;;
+ -C|--check)
+ CHECK='C=1'
+ shift ;;
-l|--list)
ONLY_LIST='y'
shift ;;
@@ -628,7 +632,7 @@ build_target() {
${MAKE} distclean >/dev/null
${MAKE} -s ${target}_config
- ${MAKE} ${JOBS} all \
+ ${MAKE} ${JOBS} ${CHECK} all \
>${LOG_DIR}/$target.MAKELOG 2> ${LOG_DIR}/$target.ERR
# Check for 'make' errors
--
1.7.12
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[U-Boot] [PATCH v4 15/16] lcd: Add CONSOLE_SCROLL_LINES option to speed console
When the cursor position gets to the end of the LCD console we normally
scroll by one line. This adds an option to increase that value.
Console scrolling is often slow, and if a large amount of output is
being sent, increasing this option to 10 or so will speed things up
considerably.
Signed-off-by: Simon Glass
---
Changes in v3:
- Fix tiny bug in mult-line lcd scrolling
Changes in v4:
- Use CONFIG_CONSOLE_SCROLL_LINES instead of CONSOLE_SCROLL_LINES
- Put default CONFIG_CONSOLE_SCROLL_LINES at top of file
README |6 ++
common/lcd.c | 18 +++---
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/README b/README
index 1d0ce50..14b1f83 100644
--- a/README
+++ b/README
@@ -1449,6 +1449,12 @@ The following options need to be configured:
here, since it is cheaper to change data cache settings on
a per-section basis.
+ CONFIG_CONSOLE_SCROLL_LINES
+
+ When the console need to be scrolled, this is the number of
+ lines to scroll by. It defaults to 1. Increasing this makes
+ the console jump but can help speed up operation when scrolling
+ is slow.
- Splash Screen Support: CONFIG_SPLASH_SCREEN
diff --git a/common/lcd.c b/common/lcd.c
index 74fa3f9..460f0ca 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -76,6 +76,11 @@
#define CONFIG_LCD_ALIGNMENT PAGE_SIZE
#endif
+/* By default we scroll by a single line */
+#ifndef CONFIG_CONSOLE_SCROLL_LINES
+#define CONFIG_CONSOLE_SCROLL_LINES 1
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
ulong lcd_setmem (ulong addr);
@@ -131,12 +136,20 @@ void lcd_set_flush_dcache(int flush)
static void console_scrollup(void)
{
+ const int rows = CONFIG_CONSOLE_SCROLL_LINES;
+
/* Copy up rows ignoring the first one */
- memcpy(CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND, CONSOLE_SCROLL_SIZE);
+ memcpy(CONSOLE_ROW_FIRST,
+ lcd_console_address + CONSOLE_ROW_SIZE * rows,
+ CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows);
/* Clear the last one */
- memset(CONSOLE_ROW_LAST, COLOR_MASK(lcd_color_bg), CONSOLE_ROW_SIZE);
+ memset(lcd_console_address + CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows,
+ COLOR_MASK(lcd_color_bg),
+ CONSOLE_ROW_SIZE * rows);
+
lcd_sync();
+ console_row -= rows;
}
/*--*/
@@ -165,7 +178,6 @@ static inline void console_newline(void)
if (console_row >= CONSOLE_ROWS) {
/* Scroll everything up */
console_scrollup();
- --console_row;
} else {
lcd_sync();
}
--
1.7.7.3
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[U-Boot] [PATCH v4 01/16] tegra: Use const for pinmux_config_pingroup/table()
These two functions don't actually modify their arguments so add a const
keyword.
Signed-off-by: Simon Glass
Acked-by: Mike Frysinger
---
Changes in v2:
- Add new patch to use const in pinmux_config_pingroup/table()
arch/arm/cpu/tegra20-common/pinmux.c |4 ++--
arch/arm/include/asm/arch-tegra20/pinmux.h |4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/tegra20-common/pinmux.c
b/arch/arm/cpu/tegra20-common/pinmux.c
index 08b8305..a2a0916 100644
--- a/arch/arm/cpu/tegra20-common/pinmux.c
+++ b/arch/arm/cpu/tegra20-common/pinmux.c
@@ -554,7 +554,7 @@ void pinmux_set_func(enum pmux_pingrp pin, enum pmux_func
func)
writel(reg, muxctl);
}
-void pinmux_config_pingroup(struct pingroup_config *config)
+void pinmux_config_pingroup(const struct pingroup_config *config)
{
enum pmux_pingrp pin = config->pingroup;
@@ -563,7 +563,7 @@ void pinmux_config_pingroup(struct pingroup_config *config)
pinmux_set_tristate(pin, config->tristate);
}
-void pinmux_config_table(struct pingroup_config *config, int len)
+void pinmux_config_table(const struct pingroup_config *config, int len)
{
int i;
diff --git a/arch/arm/include/asm/arch-tegra20/pinmux.h
b/arch/arm/include/asm/arch-tegra20/pinmux.h
index 03fa7ca..797e158 100644
--- a/arch/arm/include/asm/arch-tegra20/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra20/pinmux.h
@@ -339,7 +339,7 @@ void pinmux_set_pullupdown(enum pmux_pingrp pin, enum
pmux_pull pupd);
void pinmux_set_func(enum pmux_pingrp pin, enum pmux_func func);
/* Set the complete configuration for a pin group */
-void pinmux_config_pingroup(struct pingroup_config *config);
+void pinmux_config_pingroup(const struct pingroup_config *config);
void pinmux_set_tristate(enum pmux_pingrp pin, int enable);
@@ -349,6 +349,6 @@ void pinmux_set_tristate(enum pmux_pingrp pin, int enable);
* @param config List of config items
* @param len Number of config items in list
*/
-void pinmux_config_table(struct pingroup_config *config, int len);
+void pinmux_config_table(const struct pingroup_config *config, int len);
#endif /* PINMUX_H */
--
1.7.7.3
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[U-Boot] [PATCH v4 11/16] lcd: Add support for flushing LCD fb from dcache after update
This provides an option for the LCD to flush the dcache after each update
(puts, scroll or clear).
Signed-off-by: Simon Glass
---
Changes in v2:
- Put the LCD cache flush logic into lcd_putc() instead of lcd_puts()
Changes in v3:
- Put the LCD cache flush logic back into lcd_puts()
Changes in v4:
- Use lcd_puts() for echoing user input so lcd cached data is flushed
common/lcd.c | 46 +++---
common/main.c | 12 ++--
include/lcd.h |8
3 files changed, 57 insertions(+), 9 deletions(-)
diff --git a/common/lcd.c b/common/lcd.c
index 37b0393..74fa3f9 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -94,6 +94,9 @@ static void lcd_setbgcolor(int color);
char lcd_is_enabled = 0;
+static char lcd_flush_dcache; /* 1 to flush dcache after each lcd update */
+
+
#ifdef NOT_USED_SO_FAR
static void lcd_getcolreg(ushort regno,
ushort *red, ushort *green, ushort *blue);
@@ -102,6 +105,28 @@ static int lcd_getfgcolor(void);
//
+/* Flush LCD activity to the caches */
+void lcd_sync(void)
+{
+ /*
+* flush_dcache_range() is declared in common.h but it seems that some
+* architectures do not actually implement it. Is there a way to find
+* out whether it exists? For now, ARM is safe.
+*/
+#ifdef CONFIG_ARM
+ int line_length;
+
+ if (lcd_flush_dcache)
+ flush_dcache_range((u32)lcd_base,
+ (u32)(lcd_base + lcd_get_size(&line_length)));
+#endif
+}
+
+void lcd_set_flush_dcache(int flush)
+{
+ lcd_flush_dcache = (flush != 0);
+}
+
/*--*/
static void console_scrollup(void)
@@ -111,6 +136,7 @@ static void console_scrollup(void)
/* Clear the last one */
memset(CONSOLE_ROW_LAST, COLOR_MASK(lcd_color_bg), CONSOLE_ROW_SIZE);
+ lcd_sync();
}
/*--*/
@@ -140,6 +166,8 @@ static inline void console_newline(void)
/* Scroll everything up */
console_scrollup();
--console_row;
+ } else {
+ lcd_sync();
}
}
@@ -195,6 +223,7 @@ void lcd_puts(const char *s)
while (*s) {
lcd_putc(*s++);
}
+ lcd_sync();
}
/*--*/
@@ -362,13 +391,6 @@ int drv_lcd_init (void)
}
/*--*/
-static
-int do_lcd_clear(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
-{
- lcd_clear();
- return 0;
-}
-
void lcd_clear(void)
{
#if LCD_BPP == LCD_MONOCHROME
@@ -410,6 +432,14 @@ void lcd_clear(void)
console_col = 0;
console_row = 0;
+ lcd_sync();
+}
+
+static int do_lcd_clear(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ lcd_clear();
+ return 0;
}
U_BOOT_CMD(
@@ -621,6 +651,7 @@ void bitmap_plot(int x, int y)
}
WATCHDOG_RESET();
+ lcd_sync();
}
#else
static inline void bitmap_plot(int x, int y) {}
@@ -842,6 +873,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
break;
};
+ lcd_sync();
return 0;
}
#endif
diff --git a/common/main.c b/common/main.c
index 81984ac..d3356e1 100644
--- a/common/main.c
+++ b/common/main.c
@@ -1040,8 +1040,16 @@ int readline_into_buffer(const char *const prompt, char
*buffer, int timeout)
puts (tab_seq+(col&07));
col += 8 - (col&07);
} else {
- ++col; /* echo input
*/
- putc (c);
+ char buf[2];
+
+ /*
+* Echo input using puts() to force am
+* LCD flush if we are using an LCD
+*/
+ ++col;
+ buf[0] = c;
+ buf[1] = '\0';
+ puts(buf);
}
*p++ = c;
++n;
diff --git a/include/lcd.h b/include/lcd.h
index 6a600ee..8f84741 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -57,6 +57,14 @@ extern void lcd_initcolregs (void);
extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
extern int bmp_display(ulong addr, int x, int y);
+/**
+ * Set whether we need to flush the dcache when changing the LCD image. This
+ * defaults to off.
+
[U-Boot] [PATCH v4 07/16] tegra: Add LCD driver
This driver supports driving a single LCD and providing a U-Boot console
on it.
Signed-off-by: Simon Glass
---
Changes in v2:
- Update LCD driver to deal with new fdt bindings
Changes in v3:
- Move some fdt decode code from LCD driver to SOC display driver
- Rename fdt config structures
- Use new pwm binding from pre-linux-next
- Adjust LCD driver to use new SOC display driver structures
Changes in v4:
- Rebase on top of new tegra common directory structure
- Change LCD panel GPIOs to be entirely optional
- Only indicate that LCD init is complete when all stages complete
drivers/video/Makefile |1 +
drivers/video/tegra.c | 361
2 files changed, 362 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/tegra.c
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index ebb6da8..78a7668 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -49,6 +49,7 @@ COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
+COBJS-$(CONFIG_VIDEO_TEGRA) += tegra.o
COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
COBJS := $(sort $(COBJS-y))
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
new file mode 100644
index 000..9df2bd3
--- /dev/null
+++ b/drivers/video/tegra.c
@@ -0,0 +1,361 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* These are the stages we go throuh in enabling the LCD */
+enum stage_t {
+ STAGE_START,
+ STAGE_LVDS,
+ STAGE_BACKLIGHT_VDD,
+ STAGE_PWM,
+ STAGE_BACKLIGHT_EN,
+ STAGE_DONE,
+};
+
+static enum stage_t stage; /* Current stage we are at */
+static unsigned long timer_next; /* Time we can move onto next stage */
+
+/* Our LCD config, set up in handle_stage() */
+static struct fdt_panel_config config;
+struct fdt_disp_config *disp_config; /* Display controller config */
+
+enum {
+ /* Maximum LCD size we support */
+ LCD_MAX_WIDTH = 1366,
+ LCD_MAX_HEIGHT = 768,
+ LCD_MAX_LOG2_BPP= 4,/* 2^4 = 16 bpp */
+};
+
+int lcd_line_length;
+int lcd_color_fg;
+int lcd_color_bg;
+
+void *lcd_base;/* Start of framebuffer memory */
+void *lcd_console_address; /* Start of console buffer */
+
+short console_col;
+short console_row;
+
+vidinfo_t panel_info = {
+ /* Insert a value here so that we don't end up in the BSS */
+ .vl_col = -1,
+};
+
+char lcd_cursor_enabled;
+
+ushort lcd_cursor_width;
+ushort lcd_cursor_height;
+
+#ifndef CONFIG_OF_CONTROL
+#error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support"
+#endif
+
+void lcd_cursor_size(ushort width, ushort height)
+{
+ lcd_cursor_width = width;
+ lcd_cursor_height = height;
+}
+
+void lcd_toggle_cursor(void)
+{
+ ushort x, y;
+ uchar *dest;
+ ushort row;
+
+ x = console_col * lcd_cursor_width;
+ y = console_row * lcd_cursor_height;
+ dest = (uchar *)(lcd_base + y * lcd_line_length + x * (1 << LCD_BPP) /
+ 8);
+
+ for (row = 0; row < lcd_cursor_height; ++row, dest += lcd_line_length) {
+ ushort *d = (ushort *)dest;
+ ushort color;
+ int i;
+
+ for (i = 0; i < lcd_cursor_width; ++i) {
+ color = *d;
+ color ^= lcd_color_fg;
+ *d = color;
+ ++d;
+ }
+ }
+}
+
+void lcd_cursor_on(void)
+{
+ lcd_cursor_enabled = 1;
+ lcd_toggle_cursor();
+}
+void lcd_cursor_off(void)
+{
+ lcd_cursor_enabled = 0;
+ lcd_toggle_cursor();
+}
+
+char lcd_is_cursor_enabled(void)
+{
+ return lcd_cursor_enabled;
+}
+
+static void update_panel_size(struct fdt_disp_config *config)
+{
+ panel_info.vl_col = config->width;
+ panel_info.vl_row = config->height;
+
[U-Boot] [PATCH v4 09/16] arm: Add control over cachability of memory regions
Add support for adjusting the cachability of an L1 section by updating
the MMU. The mmu_set_region_dcache() function allows drivers to make
these changes after the MMU is set up.
It is implemented only for ARMv7 at present.
This is needed for LCD support, where we want to make the LCD frame buffer
write-through (or off) rather than write-back.
Signed-off-by: Simon Glass
---
Changes in v4:
- Use system bit values for enum dcache_option instead of arbitrary numbers
arch/arm/cpu/armv7/cache_v7.c | 11 +
arch/arm/include/asm/system.h | 30
arch/arm/lib/cache-cp15.c | 50 -
3 files changed, 80 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 1b4e808..5f6d039 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -297,6 +297,12 @@ void arm_init_before_mmu(void)
v7_inval_tlb();
}
+void mmu_page_table_flush(unsigned long start, unsigned long stop)
+{
+ flush_dcache_range(start, stop);
+ v7_inval_tlb();
+}
+
/*
* Flush range from all levels of d-cache/unified-cache used:
* Affects the range [start, start + size - 1]
@@ -329,6 +335,11 @@ void arm_init_before_mmu(void)
void flush_cache(unsigned long start, unsigned long size)
{
}
+
+void mmu_page_table_flush(unsigned long start, unsigned long stop)
+{
+}
+
#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
#ifndef CONFIG_SYS_ICACHE_OFF
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 2b28a26..9a05211 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -75,6 +75,36 @@ static inline void set_cr(unsigned int val)
isb();
}
+/* options available for data cache on each page */
+enum dcache_option {
+ DCACHE_OFF = 0x12,
+ DCACHE_WRITETHROUGH = 0x1a,
+ DCACHE_WRITEBACK = 0x1e,
+};
+
+/* Size of an MMU section */
+enum {
+ MMU_SECTION_SHIFT = 20,
+ MMU_SECTION_SIZE= 1 << MMU_SECTION_SHIFT,
+};
+
+/**
+ * Change the cache settings for a region.
+ *
+ * \param startstart address of memory region to change
+ * \param size size of memory region to change
+ * \param option dcache option to select
+ */
+void mmu_set_region_dcache(u32 start, int size, enum dcache_option option);
+
+/**
+ * Register an update to the page tables, and flush the TLB
+ *
+ * \param startstart address of update in page table
+ * \param stop stop address of update in page table
+ */
+void mmu_page_table_flush(unsigned long start, unsigned long stop);
+
#endif /* __ASSEMBLY__ */
#define arch_align_stack(x) (x)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 939de10..c9bee42 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -26,12 +26,6 @@
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
-#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
-#define CACHE_SETUP0x1a
-#else
-#define CACHE_SETUP0x1e
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
void __arm_init_before_mmu(void)
@@ -50,9 +44,40 @@ static void cp_delay (void)
asm volatile("" : : : "memory");
}
-static inline void dram_bank_mmu_setup(int bank)
+void set_section_dcache(int section, enum dcache_option option)
{
u32 *page_table = (u32 *)gd->tlb_addr;
+ u32 value;
+
+ value = (section << MMU_SECTION_SHIFT) | (3 << 10);
+ value |= option;
+ page_table[section] = value;
+}
+
+void __mmu_page_table_flush(unsigned long start, unsigned long stop)
+{
+ debug("%s: Warning: not implemented\n", __func__);
+}
+
+void mmu_page_table_flush(unsigned long start, unsigned long stop)
+ __attribute__((weak, alias("__mmu_page_table_flush")));
+
+void mmu_set_region_dcache(u32 start, int size, enum dcache_option option)
+{
+ u32 *page_table = (u32 *)gd->tlb_addr;
+ u32 upto, end;
+
+ end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
+ start = start >> MMU_SECTION_SHIFT;
+ debug("mmu_set_region_dcache start=%x, size=%x, option=%d\n",
+ start, size, option);
+ for (upto = start; upto < end; upto++)
+ set_section_dcache(upto, option);
+ mmu_page_table_flush((u32)&page_table[start], (u32)&page_table[end]);
+}
+
+static inline void dram_bank_mmu_setup(int bank)
+{
bd_t *bd = gd->bd;
int i;
@@ -60,21 +85,24 @@ static inline void dram_bank_mmu_setup(int bank)
for (i = bd->bi_dram[bank].start >> 20;
i < (bd->bi_dram[bank].start + bd->bi_dram[bank].size) >> 20;
i++) {
- page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+ set_section_dcache(i, DCACHE_WRITETHROUGH);
+#else
+ set_section_dcache(i, DCACHE_WRITEBACK);
+#endif
}
}
/* to activate
[U-Boot] [PATCH v4 03/16] tegra: fdt: Add pwm binding and node
This binding will apparently soon be in linux-next. Bring it in now
since we need to do something, and may as well try to target what
Linux will have.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new commit for pwm binding and node
arch/arm/dts/tegra20.dtsi|7 +++
doc/device-tree-bindings/pwm/tegra20-pwm.txt | 18 ++
2 files changed, 25 insertions(+), 0 deletions(-)
create mode 100644 doc/device-tree-bindings/pwm/tegra20-pwm.txt
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index d936b1e..3221bc9 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -211,4 +211,11 @@
compatible = "nvidia,tegra20-nand";
reg = <0x70008000 0x100>;
};
+
+ pwm: pwm@7000a000 {
+ compatible = "nvidia,tegra20-pwm";
+ reg = <0x7000a000 0x100>;
+ #pwm-cells = <2>;
+ };
+
};
diff --git a/doc/device-tree-bindings/pwm/tegra20-pwm.txt
b/doc/device-tree-bindings/pwm/tegra20-pwm.txt
new file mode 100644
index 000..bbbeedb
--- /dev/null
+++ b/doc/device-tree-bindings/pwm/tegra20-pwm.txt
@@ -0,0 +1,18 @@
+Tegra SoC PWFM controller
+
+Required properties:
+- compatible: should be one of:
+ - "nvidia,tegra20-pwm"
+ - "nvidia,tegra30-pwm"
+- reg: physical base address and length of the controller's registers
+- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
+ first cell specifies the per-chip index of the PWM to use and the second
+ cell is the duty cycle in nanoseconds.
+
+Example:
+
+ pwm: pwm@7000a000 {
+ compatible = "nvidia,tegra20-pwm";
+ reg = <0x7000a000 0x100>;
+ #pwm-cells = <2>;
+ };
--
1.7.7.3
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[U-Boot] [PATCH v4 16/16] tegra: Enable display/lcd support on Seaboard
From: Mayuresh Kulkarni Enable the Seaboard's 16-bit LCD and use it as the console. Signed-off-by: Mayuresh Kulkarni Signed-off-by: Simon Glass --- Changes in v4: - Add CONFIG_BOARD_LATE_INIT to enable LCD - Use CONFIG_CONSOLE_SCROLL_LINES instead of CONSOLE_SCROLL_LINES - Enable separate CONFIG_PWM_TEGRA option include/configs/seaboard.h | 13 +++-- 1 files changed, 11 insertions(+), 2 deletions(-) diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index de19e38..19c5bf3 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -55,6 +55,7 @@ #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ /* I2C */ #define CONFIG_TEGRA_I2C @@ -101,8 +102,16 @@ #undef TEGRA_DEVICE_SETTINGS #define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ - "stdout=serial\0" \ - "stderr=serial\0" + "stdout=serial,lcd\0" \ + "stderr=serial,lcd\0" + +/* LCD support */ +#define CONFIG_LCD +#define CONFIG_PWM_TEGRA +#define CONFIG_VIDEO_TEGRA +#define LCD_BPPLCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES10 #include "tegra-common-post.h" -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 13/16] tegra: Support control of cache settings for LCD
Add support for selecting the required cache mode for the LCD:
off, write-through or write-back.
Signed-off-by: Simon Glass
---
Changes in v3:
- Handle a cached frame buffer out of normal U-Boot memory
drivers/video/tegra.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
index 9df2bd3..ff2b70e 100644
--- a/drivers/video/tegra.c
+++ b/drivers/video/tegra.c
@@ -145,6 +145,7 @@ static void update_panel_size(struct fdt_disp_config
*config)
void lcd_ctrl_init(void *lcdbase)
{
int line_length, size;
+ int type = DCACHE_OFF;
assert(disp_config);
@@ -160,6 +161,16 @@ void lcd_ctrl_init(void *lcdbase)
update_panel_size(disp_config);
size = lcd_get_size(&line_length);
+ /* Set up the LCD caching as requested */
+ if (config.cache_type & FDT_LCD_CACHE_WRITE_THROUGH)
+ type = DCACHE_WRITETHROUGH;
+ else if (config.cache_type & FDT_LCD_CACHE_WRITE_BACK)
+ type = DCACHE_WRITEBACK;
+ mmu_set_region_dcache(disp_config->frame_buffer, size, type);
+
+ /* Enable flushing after LCD writes if requested */
+ lcd_set_flush_dcache(config.cache_type & FDT_LCD_CACHE_FLUSH);
+
debug("LCD frame buffer at %p\n", lcd_base);
}
--
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[U-Boot] [PATCH v4 10/16] lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignment
The normal alignment is PAGE_SIZE, but if this is defined, we can support
other alignments.
The motivation for this change is to make the display section-aligned on
ARM so that we can easily turn off data caching for the frame buffer region
without resorting to level 2 page tables.
Signed-off-by: Simon Glass
---
Changes in v2:
- Use a more generic config CONFIG_LCD_ALIGNMENT for lcd alignment
Changes in v4:
- Remove system.h header which is included anyway by most archs
README| 10 ++
common/lcd.c | 21 -
include/lcd.h |3 +++
3 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/README b/README
index 5793b0a..1d0ce50 100644
--- a/README
+++ b/README
@@ -1440,6 +1440,16 @@ The following options need to be configured:
Normally display is black on white background; define
CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
+
+ CONFIG_LCD_ALIGNMENT
+
+ Normally the LCD is page-aligned (tyically 4KB). If this is
+ defined then the LCD will be aligned to this value instead.
+ For ARM it is sometimes useful to use MMU_SECTION_SIZE
+ here, since it is cheaper to change data cache settings on
+ a per-section basis.
+
+
- Splash Screen Support: CONFIG_SPLASH_SCREEN
If this option is set, the environment is checked for
diff --git a/common/lcd.c b/common/lcd.c
index b6be800..37b0393 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -72,6 +72,10 @@
# endif
#endif
+#ifndef CONFIG_LCD_ALIGNMENT
+#define CONFIG_LCD_ALIGNMENT PAGE_SIZE
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
ulong lcd_setmem (ulong addr);
@@ -326,6 +330,12 @@ static void test_pattern(void)
/* ** GENERIC Initialization Routines */
//
+int lcd_get_size(int *line_length)
+{
+ *line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
+ return *line_length * panel_info.vl_row;
+}
+
int drv_lcd_init (void)
{
struct stdio_dev lcddev;
@@ -333,7 +343,7 @@ int drv_lcd_init (void)
lcd_base = (void *)(gd->fb_base);
- lcd_line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8;
+ lcd_get_size(&lcd_line_length);
lcd_init(lcd_base); /* LCD initialization */
@@ -445,15 +455,16 @@ static int lcd_init(void *lcdbase)
ulong lcd_setmem(ulong addr)
{
ulong size;
- int line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
+ int line_length;
debug("LCD panel info: %d x %d, %d bit/pix\n", panel_info.vl_col,
panel_info.vl_row, NBITS(panel_info.vl_bpix));
- size = line_length * panel_info.vl_row;
+ size = lcd_get_size(&line_length);
- /* Round up to nearest full page */
- size = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
+ /* Round up to nearest full page, or MMU section if defined */
+ size = ALIGN(size, CONFIG_LCD_ALIGNMENT);
+ addr = ALIGN(addr - CONFIG_LCD_ALIGNMENT + 1, CONFIG_LCD_ALIGNMENT);
/* Allocate pages for the frame buffer. */
addr -= size;
diff --git a/include/lcd.h b/include/lcd.h
index 42070d7..6a600ee 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -297,6 +297,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y);
/* Allow boards to customize the information displayed */
void lcd_show_board_info(void);
+/* Return the size of the LCD frame buffer, and the line length */
+int lcd_get_size(int *line_length);
+
//
/* ** BITMAP DISPLAY SUPPORT */
//
--
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[U-Boot] [PATCH v4 06/16] tegra: Add SOC support for display/lcd
From: Wei Ni
Add support for the LCD peripheral at the Tegra2 SOC level. A separate
LCD driver will use this functionality to configure the display.
Signed-off-by: Mayuresh Kulkarni
Mayuresh Kulkarni:
- changes to remove bitfields and clean up for submission
Signed-off-by: Simon Glass
Simon Glass:
- simplify code, move clock control into here, clean-up
---
Changes in v3:
- Separate display driver and LCD driver more in fdt
- Add probe function to read in fdt parameters in display driver
Changes in v4:
- Rebase on top of new tegra common directory structure
- Adjust fdt binding according to Thierry and Stephen's comments
- Remove LCD frame buffer address property hack
arch/arm/cpu/armv7/tegra20/Makefile |1 +
arch/arm/cpu/armv7/tegra20/display.c| 409
arch/arm/include/asm/arch-tegra20/dc.h | 545 +++
arch/arm/include/asm/arch-tegra20/display.h | 152
include/fdtdec.h|1 +
lib/fdtdec.c|1 +
6 files changed, 1109 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/tegra20/display.c
create mode 100644 arch/arm/include/asm/arch-tegra20/dc.h
create mode 100644 arch/arm/include/asm/arch-tegra20/display.h
diff --git a/arch/arm/cpu/armv7/tegra20/Makefile
b/arch/arm/cpu/armv7/tegra20/Makefile
index 77cb4d1..54ed8c4 100644
--- a/arch/arm/cpu/armv7/tegra20/Makefile
+++ b/arch/arm/cpu/armv7/tegra20/Makefile
@@ -29,6 +29,7 @@ LIB = $(obj)lib$(SOC).o
COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o
COBJS-$(CONFIG_PWM_TEGRA) += pwm.o
+COBJS-$(CONFIG_VIDEO_TEGRA) += display.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/tegra20/display.c
b/arch/arm/cpu/armv7/tegra20/display.c
new file mode 100644
index 000..031f9a8
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra20/display.c
@@ -0,0 +1,409 @@
+/*
+ * (C) Copyright 2010
+ * NVIDIA Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static struct fdt_disp_config config;
+
+static void update_window(struct dc_ctlr *dc, struct disp_ctl_win *win)
+{
+ unsigned h_dda, v_dda;
+ unsigned long val;
+
+ val = readl(&dc->cmd.disp_win_header);
+ val |= WINDOW_A_SELECT;
+ writel(val, &dc->cmd.disp_win_header);
+
+ writel(win->fmt, &dc->win.color_depth);
+
+ clrsetbits_le32(&dc->win.byte_swap, BYTE_SWAP_MASK,
+ BYTE_SWAP_NOSWAP << BYTE_SWAP_SHIFT);
+
+ val = win->out_x << H_POSITION_SHIFT;
+ val |= win->out_y << V_POSITION_SHIFT;
+ writel(val, &dc->win.pos);
+
+ val = win->out_w << H_SIZE_SHIFT;
+ val |= win->out_h << V_SIZE_SHIFT;
+ writel(val, &dc->win.size);
+
+ val = (win->w * win->bpp / 8) << H_PRESCALED_SIZE_SHIFT;
+ val |= win->h << V_PRESCALED_SIZE_SHIFT;
+ writel(val, &dc->win.prescaled_size);
+
+ writel(0, &dc->win.h_initial_dda);
+ writel(0, &dc->win.v_initial_dda);
+
+ h_dda = (win->w * 0x1000) / max(win->out_w - 1, 1);
+ v_dda = (win->h * 0x1000) / max(win->out_h - 1, 1);
+
+ val = h_dda << H_DDA_INC_SHIFT;
+ val |= v_dda << V_DDA_INC_SHIFT;
+ writel(val, &dc->win.dda_increment);
+
+ writel(win->stride, &dc->win.line_stride);
+ writel(0, &dc->win.buf_stride);
+
+ val = WIN_ENABLE;
+ if (win->bpp < 24)
+ val |= COLOR_EXPAND;
+ writel(val, &dc->win.win_opt);
+
+ writel((unsigned long)win->phys_addr, &dc->winbuf.start_addr);
+ writel(win->x, &dc->winbuf.addr_h_offset);
+ writel(win->y, &dc->winbuf.addr_v_offset);
+
+ writel(0xff00, &dc->win.blend_nokey);
+ writel(0xff00, &dc->win.blend_1win);
+
+ val = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
+ val |= GENERAL_UPDATE | WIN_A_UPDATE;
+ writel(val, &dc->cmd.state_ctrl);
+}
+
+static void write_pair(struct fdt_disp_config *config, int item, u32 *reg)
+{
+ writel(config->horiz_timing[item] |
+ (config->vert_timing[item] << 16), reg);
+}
+
+static int update_display_mode(struct dc_disp_reg *disp,
[U-Boot] [PATCH v4 08/16] tegra: Add LCD support to Nvidia boards
Add calls to the LCD driver from Nvidia board code.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add separate call to pwm_init() in board_init()
Changes in v4:
- Change order of LCD init so that PWM comes first
board/nvidia/common/board.c | 21 -
1 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 7a7d55c..17aafb6 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -110,6 +111,9 @@ int board_init(void)
if (pwm_init(gd->fdt_blob))
debug("%s: Failed to init pwm\n", __func__);
#endif
+#ifdef CONFIG_LCD
+ tegra_lcd_check_next_stage(gd->fdt_blob, 0);
+#endif
/* boot param addr */
gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
@@ -135,6 +139,9 @@ int board_init(void)
pin_mux_usb();
board_usb_init(gd->fdt_blob);
#endif
+#ifdef CONFIG_LCD
+ tegra_lcd_check_next_stage(gd->fdt_blob, 0);
+#endif
#ifdef CONFIG_TEGRA_LP0
/* save Sdram params to PMC 2, 4, and 24 for WB0 */
@@ -165,6 +172,18 @@ int board_early_init_f(void)
#else
gpio_config_uart();
#endif
- return 0;
+#ifdef CONFIG_LCD
+ tegra_lcd_early_init(gd->fdt_blob);
+#endif
+return 0;
}
#endif /* EARLY_INIT */
+
+int board_late_init(void)
+{
+#ifdef CONFIG_LCD
+ /* Make sure we finish initing the LCD */
+ tegra_lcd_check_next_stage(gd->fdt_blob, 1);
+#endif
+ return 0;
+}
--
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[U-Boot] [PATCH v4 05/16] tegra: Add support for PWM
The pulse width/frequency modulation peripheral supports generating
a repeating pulse. It is useful for controlling LCD brightness.
Signed-off-by: Simon Glass
---
Changes in v3:
- Rename pwfm driver to pwm
- Use new proposed upstream pwm binding
- Decode fdt node within the pwm driver
- Introduce concept of a pwm channel, rather than separate peripherals
Changes in v4:
- Add CONFIG_PWM_TEGRA to control inclusion of PWM support
- Add a little more debugging to the PWM driver
- Move code to set up PWM into the PWM commit
arch/arm/cpu/armv7/tegra20/Makefile |1 +
arch/arm/cpu/armv7/tegra20/pwm.c| 101 +++
arch/arm/include/asm/arch-tegra20/pwm.h | 75 +++
board/nvidia/common/board.c |5 ++
include/fdtdec.h|1 +
lib/fdtdec.c|1 +
6 files changed, 184 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/tegra20/pwm.c
create mode 100644 arch/arm/include/asm/arch-tegra20/pwm.h
diff --git a/arch/arm/cpu/armv7/tegra20/Makefile
b/arch/arm/cpu/armv7/tegra20/Makefile
index 09a0314..77cb4d1 100644
--- a/arch/arm/cpu/armv7/tegra20/Makefile
+++ b/arch/arm/cpu/armv7/tegra20/Makefile
@@ -28,6 +28,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o
+COBJS-$(CONFIG_PWM_TEGRA) += pwm.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/tegra20/pwm.c b/arch/arm/cpu/armv7/tegra20/pwm.c
new file mode 100644
index 000..b655c5c
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra20/pwm.c
@@ -0,0 +1,101 @@
+/*
+ * Tegra2 pulse width frequency modulator definitions
+ *
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+struct pwm_info {
+ struct pwm_ctlr *pwm; /* Registers for our pwm controller */
+ int pwm_node; /* PWM device tree node */
+} local;
+
+void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider)
+{
+ u32 reg;
+
+ assert(channel < PWM_NUM_CHANNELS);
+
+ /* TODO: Can we use clock_adjust_periph_pll_div() here? */
+ clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, rate);
+
+ reg = PWM_ENABLE_MASK;
+ reg |= pulse_width << PWM_WIDTH_SHIFT;
+ reg |= freq_divider << PWM_DIVIDER_SHIFT;
+ writel(reg, &local.pwm[channel].control);
+ debug("%s: channel=%d, rate=%d\n", __func__, channel, rate);
+}
+
+int pwm_request(const void *blob, int node, const char *prop_name)
+{
+ int pwm_node;
+ u32 data[3];
+
+ if (fdtdec_get_int_array(blob, node, prop_name, data,
+ ARRAY_SIZE(data))) {
+ debug("%s: Cannot decode PWM property '%s'\n", __func__,
+ prop_name);
+ return -1;
+ }
+
+ pwm_node = fdt_node_offset_by_phandle(blob, data[0]);
+ if (pwm_node != local.pwm_node) {
+ debug("%s: PWM property '%s' phandle %d not recognised"
+ "- expecting %d\n", __func__, prop_name, data[0],
+ local.pwm_node);
+ return -1;
+ }
+ if (data[1] >= PWM_NUM_CHANNELS) {
+ debug("%s: PWM property '%s': invalid channel %u\n", __func__,
+ prop_name, data[1]);
+ return -1;
+ }
+
+ /*
+* TODO: We could maintain a list of requests, but it might not be
+* worth it for U-Boot.
+*/
+ return data[1];
+}
+
+int pwm_init(const void *blob)
+{
+ local.pwm_node = fdtdec_next_compatible(blob, 0,
+ COMPAT_NVIDIA_TEGRA20_PWM);
+ if (local.pwm_node < 0) {
+ debug("%s: Cannot find device tree node\n", __func__);
+ return -1;
+ }
+
+ local.pwm = (struct pwm_ctlr *)fdtdec_get_addr(blob, local.pwm_node,
+ "reg");
+ if (local.pwm == (struct pwm_ctlr *)FDT_ADDR_T_NONE) {
+ debug("%s: Cannot find pwm reg address\n", __func__);
+
[U-Boot] [PATCH v4 12/16] tegra: Align LCD frame buffer to section boundary
For tegra we want to enable the cache for the LCD. This is easier if we can avoid using L2 page tages, so align the LCD to a section boundary. Signed-off-by: Simon Glass --- Changes in v2: - Align tegra display using new CONFIG_LCD_ALIGNMENT feature include/configs/tegra20-common.h |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index fa14a1c..a96233a 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -45,6 +45,9 @@ #include /* get chip and board defs */ +/* Align LCD to 1MB boundary */ +#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE + /* * Display CPU and Board information */ -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 14/16] tegra: fdt: Add LCD definitions for Seaboard
The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
by one of the PWMs.
Signed-off-by: Simon Glass
---
Changes in v2:
- Update seaboard LCD definitions for new fdt binding
Changes in v3:
- Use new upstream proposed LCD definitions
Changes in v4:
- Adjust LCD fdt nodes for new binding
- Remove LCD frame buffer address property hack
board/nvidia/dts/tegra20-seaboard.dts | 31 +++
1 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/board/nvidia/dts/tegra20-seaboard.dts
b/board/nvidia/dts/tegra20-seaboard.dts
index 25a63a0..df730f5 100644
--- a/board/nvidia/dts/tegra20-seaboard.dts
+++ b/board/nvidia/dts/tegra20-seaboard.dts
@@ -163,4 +163,35 @@
compatible = "hynix,hy27uf4g2b", "nand-flash";
};
};
+
+ host1x {
+ dc@5420 {
+ rgb {
+ status = "okay";
+ nvidia,panel = <&lcd_panel>;
+ };
+ };
+ };
+
+ lcd_panel: panel {
+ /* Seaboard has 1366x768 */
+ clock = <7060>;
+ xres = <1366>;
+ yres = <768>;
+ left-margin = <58>;
+ right-margin = <58>;
+ hsync-len = <58>;
+ lower-margin = <4>;
+ upper-margin = <4>;
+ vsync-len = <4>;
+ hsync-active-high;
+ nvidia,bits-per-pixel = <16>;
+ nvidia,pwm = <&pwm 2 0>;
+ nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
+ nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
+ nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
+ nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
+ nvidia,panel-timings = <4 203 17 15>;
+ };
+
};
--
1.7.7.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 04/16] tegra: fdt: Add LCD definitions for Tegra
Add LCD definitions and also a proposed binding for LCD displays.
The PWM is as per what will likely be committed to linux-next soon.
The displaymode binding comes from a proposal here:
http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html
The panel binding is new, and fills a need to specify the panel
timings and other tegra-specific information. Should a binding appear
that allows the pwm to handle this automatically, we can revisit
this.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add nvidia prefix to device tree properties
Changes in v3:
- Use displaymode binding for fdt
- Bring in proposed tegra display controller binding
- Add new panel binding to fit with tegra display controller binding
Changes in v4:
- Moved panel information into panel node (was in rgb node)
- Remove LCD frame buffer address property hack
arch/arm/dts/tegra20.dtsi | 89
doc/device-tree-bindings/video/displaymode.txt | 42 +++
doc/device-tree-bindings/video/tegra20-dc.txt | 82 ++
3 files changed, 213 insertions(+), 0 deletions(-)
create mode 100644 doc/device-tree-bindings/video/displaymode.txt
create mode 100644 doc/device-tree-bindings/video/tegra20-dc.txt
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 3221bc9..5fb1fd7 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -218,4 +218,93 @@
#pwm-cells = <2>;
};
+ host1x {
+ compatible = "nvidia,tegra20-host1x", "simple-bus";
+ reg = <0x5000 0x00024000>;
+ interrupts = <0 65 0x04 /* mpcore syncpt */
+ 0 67 0x04>; /* mpcore general */
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ranges = <0x5400 0x5400 0x0400>;
+
+ /* video-encoding/decoding */
+ mpe {
+ reg = <0x5404 0x0004>;
+ interrupts = <0 68 0x04>;
+ };
+
+ /* video input */
+ vi {
+ reg = <0x5408 0x0004>;
+ interrupts = <0 69 0x04>;
+ };
+
+ /* EPP */
+ epp {
+ reg = <0x540c 0x0004>;
+ interrupts = <0 70 0x04>;
+ };
+
+ /* ISP */
+ isp {
+ reg = <0x5410 0x0004>;
+ interrupts = <0 71 0x04>;
+ };
+
+ /* 2D engine */
+ gr2d {
+ reg = <0x5414 0x0004>;
+ interrupts = <0 72 0x04>;
+ };
+
+ /* 3D engine */
+ gr3d {
+ reg = <0x5418 0x0004>;
+ };
+
+ /* display controllers */
+ dc@5420 {
+ compatible = "nvidia,tegra20-dc";
+ reg = <0x5420 0x0004>;
+ interrupts = <0 73 0x04>;
+
+ rgb {
+ status = "disabled";
+ };
+ };
+
+ dc@5424 {
+ compatible = "nvidia,tegra20-dc";
+ reg = <0x5424 0x0004>;
+ interrupts = <0 74 0x04>;
+
+ rgb {
+ status = "disabled";
+ };
+ };
+
+ /* outputs */
+ hdmi {
+ compatible = "nvidia,tegra20-hdmi";
+ reg = <0x5428 0x0004>;
+ interrupts = <0 75 0x04>;
+ status = "disabled";
+ };
+
+ tvo {
+ compatible = "nvidia,tegra20-tvo";
+ reg = <0x542c 0x0004>;
+ interrupts = <0 76 0x04>;
+ status = "disabled";
+ };
+
+ dsi {
+ compatible = "nvidia,tegra20-dsi";
+ reg = <0x5430 0x0004>;
+ status = "disabled";
+ };
+ };
+
};
diff --git a/doc/device-tree-bindings/video/displaymode.txt
b/doc/device-tree-bindings/video/displaymode.txt
new file mode 100644
index 000..45ca42d
--- /dev/null
+++ b/doc/device-tree-bindings/video/displaymode.txt
@@ -0,0 +1,42 @@
+videomode bindings
+==
+
+(from http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html)
+
+Required properties:
+ - xres, yres: Display resolution
+ - left-margin, right-margin, hsync-len: Horizontal Display timing
+ parameters in pixels
+ - upper-margin, lower-margin, vsync-len: Vertical display timing
+ parameters in lines
+ - clock: display cloc
Re: [U-Boot] KernelDoc
Dear Scott Wood, > On 09/26/2012 10:26:55 AM, Marek Vasut wrote: > > Dear Wolfgang Denk, > > > > > Dear Marek, > > > - Will we make this mandatory? So that we will reject all new code > > > > > > that is not documented according to kernel-doc rules? > > > > Yes please, make it mandatory. Otherwise people won't obey and the > > documentation > > will suffer ... and all this would be meaningless. > > -1 > > The project you're copying from doesn't make it mandatory. Ok, you overvoted me here completely. My point was so that in order to have really useful documentation, we should make sure people don't slack on creating it. > Why should > U-Boot? What would it be mandatory for? Major public APIs? > Semi-private functions shared between a few related files? Every > little static function? I believe everything shall eventually be documented. If it is not to be enforced, ok. > We already have too many arbitrary rules with inconsistent > enforcement. True. We need to make a proper list of these rules. > What's wrong with just encouraging it where appropriate, > and insisting only if the maintainer deems it important enough in > context? > > OTOH, I don't think patches should be rejected for having that extra > asterisk, regardless of whether we encourage kerneldoc in U-Boot > (unless we adopt a different tool with different requirements). > Kerneldoc-style headers are still useful documentation even if we don't > use the actual kerneldoc tool, code can be shared between Linux and > U-Boot, people can maintain their existing Linux habits, etc. It's a > weak argument to point to the CodingStyle document as forbidding it > when it's clear that the project that CodingStyle comes from uses this > all over the place. > > > > If I change the major part of an existing function (without > > > > changing > > > > > it's calling interface), am I obligued to add kernel-doc comments? > > > > Yes. Even though major vs. minor change seems pretty vague, common > > sense shall > > be applied here. > > And then someone's going to complain that the commenting should be a > separate patch... more red tape. :-P :-D > -Scott Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] KernelDoc
Dear Graeme Russ, > Hi All, > > A bit late on the bandwagon, but for what it is worth I have thought > any form of officially sanctioned (and encouraged) in-line > documentation would be 'A Good Thing'(tm) +1 > I had a quick look at kerneldoc and doxygen and while doxygen is far > more powerful, it's also a lot less 'natural' as a commenting style. > Besides, we really only have C to worry about, so we don't need to > drag in the overhead of a documentation format that supports every > language under the sun :) +1 > One point I agree on is that we must not make the barrier to entry for > new developers any higher than strictly necessary. For me, I would not > expect to be forced to document anything that was not already > documented - i.e. if I change a function (adding a parameter, changing > it's return value, etc) that was not already kerneldoc'd, I would have > a dummy spit if I was asked to resubmit with complete documentation. WFM > I'm thinking that someone with Super Saiyan levels of script-fu could > probably automate the addition of kerneldoc stubs with 'undocumented' > text I wonder ... you still need to reference the files in the templates anyway. > I really don't mind what the documentation rules are, but the MUST be > on the wiki. One this note, I think we should merge the 'Coding Style' > and 'Patches' pages of the wiki and rename them to something more > obvious like, for example, 'Rules for submitting U-Boot patches'. > Also, I think a regular reminder (say every two weeks) on the mailing > list pointing out the 'developer rules' on the wiki would be good - we > tend to get quite a number of on-off patches from new developers that > don't meet the submission criteria simply because they a blissfully > ignorant of them. +1 > Slightly OT - what is happening with the proposed patch tracker? no :-C > Regards, > > Graeme Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] KernelDoc
On 09/26/2012 10:26:55 AM, Marek Vasut wrote: Dear Wolfgang Denk, > Dear Marek, > - Will we make this mandatory? So that we will reject all new code > that is not documented according to kernel-doc rules? Yes please, make it mandatory. Otherwise people won't obey and the documentation will suffer ... and all this would be meaningless. -1 The project you're copying from doesn't make it mandatory. Why should U-Boot? What would it be mandatory for? Major public APIs? Semi-private functions shared between a few related files? Every little static function? We already have too many arbitrary rules with inconsistent enforcement. What's wrong with just encouraging it where appropriate, and insisting only if the maintainer deems it important enough in context? OTOH, I don't think patches should be rejected for having that extra asterisk, regardless of whether we encourage kerneldoc in U-Boot (unless we adopt a different tool with different requirements). Kerneldoc-style headers are still useful documentation even if we don't use the actual kerneldoc tool, code can be shared between Linux and U-Boot, people can maintain their existing Linux habits, etc. It's a weak argument to point to the CodingStyle document as forbidding it when it's clear that the project that CodingStyle comes from uses this all over the place. > If I change the major part of an existing function (without changing > it's calling interface), am I obligued to add kernel-doc comments? Yes. Even though major vs. minor change seems pretty vague, common sense shall be applied here. And then someone's going to complain that the commenting should be a separate patch... more red tape. :-P -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] New patch tracking tool - where to now?
Hi All, A while ago I wrote this: http://www.denx.de/wiki/U-Boot/ToolsPatchTracking Where to now (brown cow)? Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] KernelDoc
Hi All, A bit late on the bandwagon, but for what it is worth I have thought any form of officially sanctioned (and encouraged) in-line documentation would be 'A Good Thing'(tm) I had a quick look at kerneldoc and doxygen and while doxygen is far more powerful, it's also a lot less 'natural' as a commenting style. Besides, we really only have C to worry about, so we don't need to drag in the overhead of a documentation format that supports every language under the sun :) One point I agree on is that we must not make the barrier to entry for new developers any higher than strictly necessary. For me, I would not expect to be forced to document anything that was not already documented - i.e. if I change a function (adding a parameter, changing it's return value, etc) that was not already kerneldoc'd, I would have a dummy spit if I was asked to resubmit with complete documentation. I'm thinking that someone with Super Saiyan levels of script-fu could probably automate the addition of kerneldoc stubs with 'undocumented' text I really don't mind what the documentation rules are, but the MUST be on the wiki. One this note, I think we should merge the 'Coding Style' and 'Patches' pages of the wiki and rename them to something more obvious like, for example, 'Rules for submitting U-Boot patches'. Also, I think a regular reminder (say every two weeks) on the mailing list pointing out the 'developer rules' on the wiki would be good - we tend to get quite a number of on-off patches from new developers that don't meet the submission criteria simply because they a blissfully ignorant of them. Slightly OT - what is happening with the proposed patch tracker? Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] add check infrastructure, default sparse
On Fri, Sep 21, 2012 at 05:28:17PM -0500, Kim Phillips wrote: > Add support for running source code checkers on u-boot source, e.g., > using sparse to aid with typechecking. This comes in especially > handy as SoC vendors mix and match cores and devices with different > endianness, thus here we add CHECK_ENDIAN to the otherwise linux > kernel default CHECKFLAGS. > > Signed-off-by: Kim Phillips Can I get a follow-up patch that add -C/--checker to MAKEALL? Looking to put this on u-boot/next once I can also make all of my builds use it too. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] tegra: clean up board include hell
Hi Stephen, On Thu, Sep 27, 2012 at 4:25 PM, Stephen Warren wrote: > On 09/27/2012 04:59 PM, Simon Glass wrote: >> Hi, >> >> On Thu, Sep 27, 2012 at 3:32 PM, Stephen Warren >> wrote: >>> On 09/27/2012 03:52 PM, Lucas Stach wrote: The prototypes used in board files were all scattered out, which lead to code duplication between SPL and normal U-Boot and some prototypes not actually being used. Consolidate this in a common board header. >>> This will allow to push down the calling of the pinmux functions into the respective drivers and this way cut down on complexity from the common board code. >>> >>> I don't think that (calling pinmux from drivers) would be a good idea. >>> The entire pinmux should be set up globally when the system boots in >>> order to avoid conflicts part-way through a change, and to avoid >>> duplicating pinmux calls into every single driver. Unless a particular >>> driver actively needs to switch between different pinmux configurations >>> at run-time (e.g. an I2C bus mux that uses pinmux to do the muxing). >> >> Well I'm not so keen on this approach. Ultimately we want to be able >> to start a driver (and set up its pinmux) only if it is needed during >> boot. > > I disagree. > >> The idea behind funcmux is that it is a single line call from a >> driver or board to select the required setting, so the overhead is >> small - and we know that for most peripherals there are only a small >> number of options. > > Tegra30's more flexibile pinmux (if not the more convoluted options on > Tegra20) will eventually convince you that funcmux is not scalable, once > we support more than a few of the possible options. Well I am already convinced of that - it is just a placeholder until we have fdt support after all. Its entire purpose is to avoid lots of individual pinmux calls in all the board files and drivers, which we are in the pre-fdt state. Without funcmux we would have had long lists of duplicated code in each board file. > > ... >>> I think we should just rip out all the CONFIG_SPI_UART_SWITCH stuff. >>> It's only there to support one board with a completely broken HW design. >>> Still, that could happen in a separate patch after this though. >> >> Yes I agree the seaboard is broken, but this is an upstream board and >> is in fact the only one I have to test with. > > There's zero use for the functionality though. Because the HW design is > broken, we've decided not to support the SPI flash on > Seaboard/Springbank. The SPI driver itself works fine on TrimSlice > without any issues, so there's no testing hole there. I thought Tom submitted some patches to make it work? It seems fine for me, but I admit I don't use it extensively. > >> Could we perhaps delay >> ripping this out for a little while longer? > > What is the event that would trigger the end of this delay? Merging of the LCD series, for me. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 06/18] tegra: fdt: Add LCD definitions for Tegra
Hi Stephen, On Thu, Sep 27, 2012 at 4:21 PM, Stephen Warren wrote: > On 09/27/2012 02:27 PM, Simon Glass wrote: >> On Thu, Sep 27, 2012 at 8:49 AM, Stephen Warren >> wrote: >>> On 09/27/2012 07:58 AM, Simon Glass wrote: > ... Really this is just a way of getting U-Boot and Linux to agree on the address, by having U-Boot know the address that the kernel will happen to use. It isn't very robust, but we have found it useful as a means of avoiding problems in this area. >>> >>> Right, but again, why can't the display driver simply read the address >>> out of the register; why is there a need to duplicate the data? >>> >>> I guess one possibility is that the register only gives the base address >>> and not the size/mode of the allocated surface, but I don't recall if >>> this proposed binding did that either? >> >> So here is my explanation: >> >> 1. U-Boot would normally put the display right near the top of memory. >> Instead, it figures out where the kernel will put it (somehow this >> seems to often be at a fixed address) and uses that address. >> >> 2. That means that U-Boot will now have the display exactly where the >> kernel wants it. > > Oh, the DT property is telling U-Boot where to put the surface so that > when the kernel determines where to put it, it'll already be there? > > That seems completely backwards. It's also extremely fragile; what if > the kernel suddenly starts allocating at some other random address, > which stops matching what U-Boot expects? The screen will flicker, or may fill up with junk as the kernel boots. We did have that happen once when the driver changed. > > Far better would be for U-Boot to put the surface wherever it wants, > then manipulate the DT that's passed to the kernel to: > > a) Add a /memreserve/ so that memory doesn't get re-used for anything > else during boot. > > b) Add a property to the display node indicating which memreserve > represents the frame-buffer location. Yes, I believe the Tegra video driver we used (and I take your point that it doesn't exist upstream so there is no point in discussing it :-) always had to use the same frame buffer address. The memory was statically allocated. Certainly this could be encoded in the fdt. > > When the kernel boots, it can: > > * Copy the content from the U-Boot-allocated buffer to whatever display > buffer the kernel allocated before writing the new address to the HW. > > * Undo the memory reservation triggered by the /memreserve/ to allow the > memory to be re-used. > >> So what do you think? Should we remove this entirely, or is it a useful hack? > > Yes, I think in its current form, it isn't useful. Thanks for the thorough response. Let's remove it, particularly as there isn't even a kernel driver upstream yet. I will do that before sending out the LCD v4 series. Thanks for your timely comments. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] tegra: clean up board include hell
On 09/27/2012 04:59 PM, Simon Glass wrote: > Hi, > > On Thu, Sep 27, 2012 at 3:32 PM, Stephen Warren wrote: >> On 09/27/2012 03:52 PM, Lucas Stach wrote: >>> The prototypes used in board files were all scattered out, which lead to >>> code duplication between SPL and normal U-Boot and some prototypes not >>> actually >>> being used. Consolidate this in a common board header. >> >>> This will allow to push down the calling of the pinmux functions into the >>> respective drivers and this way cut down on complexity from the common board >>> code. >> >> I don't think that (calling pinmux from drivers) would be a good idea. >> The entire pinmux should be set up globally when the system boots in >> order to avoid conflicts part-way through a change, and to avoid >> duplicating pinmux calls into every single driver. Unless a particular >> driver actively needs to switch between different pinmux configurations >> at run-time (e.g. an I2C bus mux that uses pinmux to do the muxing). > > Well I'm not so keen on this approach. Ultimately we want to be able > to start a driver (and set up its pinmux) only if it is needed during > boot. I disagree. > The idea behind funcmux is that it is a single line call from a > driver or board to select the required setting, so the overhead is > small - and we know that for most peripherals there are only a small > number of options. Tegra30's more flexibile pinmux (if not the more convoluted options on Tegra20) will eventually convince you that funcmux is not scalable, once we support more than a few of the possible options. ... >> I think we should just rip out all the CONFIG_SPI_UART_SWITCH stuff. >> It's only there to support one board with a completely broken HW design. >> Still, that could happen in a separate patch after this though. > > Yes I agree the seaboard is broken, but this is an upstream board and > is in fact the only one I have to test with. There's zero use for the functionality though. Because the HW design is broken, we've decided not to support the SPI flash on Seaboard/Springbank. The SPI driver itself works fine on TrimSlice without any issues, so there's no testing hole there. > Could we perhaps delay > ripping this out for a little while longer? What is the event that would trigger the end of this delay? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 06/18] tegra: fdt: Add LCD definitions for Tegra
On 09/27/2012 02:27 PM, Simon Glass wrote: > On Thu, Sep 27, 2012 at 8:49 AM, Stephen Warren wrote: >> On 09/27/2012 07:58 AM, Simon Glass wrote: ... >>> Really this is just a way of getting U-Boot and Linux to agree on the >>> address, by having U-Boot know the address that the kernel will happen >>> to use. It isn't very robust, but we have found it useful as a means >>> of avoiding problems in this area. >> >> Right, but again, why can't the display driver simply read the address >> out of the register; why is there a need to duplicate the data? >> >> I guess one possibility is that the register only gives the base address >> and not the size/mode of the allocated surface, but I don't recall if >> this proposed binding did that either? > > So here is my explanation: > > 1. U-Boot would normally put the display right near the top of memory. > Instead, it figures out where the kernel will put it (somehow this > seems to often be at a fixed address) and uses that address. > > 2. That means that U-Boot will now have the display exactly where the > kernel wants it. Oh, the DT property is telling U-Boot where to put the surface so that when the kernel determines where to put it, it'll already be there? That seems completely backwards. It's also extremely fragile; what if the kernel suddenly starts allocating at some other random address, which stops matching what U-Boot expects? Far better would be for U-Boot to put the surface wherever it wants, then manipulate the DT that's passed to the kernel to: a) Add a /memreserve/ so that memory doesn't get re-used for anything else during boot. b) Add a property to the display node indicating which memreserve represents the frame-buffer location. When the kernel boots, it can: * Copy the content from the U-Boot-allocated buffer to whatever display buffer the kernel allocated before writing the new address to the HW. * Undo the memory reservation triggered by the /memreserve/ to allow the memory to be re-used. > So what do you think? Should we remove this entirely, or is it a useful hack? Yes, I think in its current form, it isn't useful. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 2/4] mpc83xx: add support for mpc8309
On Thu, 27 Sep 2012 09:21:19 +0200
Gerlando Falauto wrote:
> On 09/27/2012 03:22 AM, Kim Phillips wrote:
> > On Wed, 26 Sep 2012 10:28:08 +0200
> > Gerlando Falauto wrote:
> >
> >> - CONFIG_MPC83XX_FEAT_QE
> >
> > this could be CONFIG_QE but should probably be CONFIG_HAS_FSL_QE
> > which doesn't exist.
>
> Assuming we keep CONFIG_QE, do you think that could replace the whole:
>
> #if defined(CONFIG_MPC8309) || defined(CONFIG_MPC8360) ||
> defined(CONFIG_MPC832x)
>
> which I am not very happy with?
sure, since that's what's protecting qe_clk in asm/global_data.h.
> >> @@ -120,14 +122,17 @@ int get_clocks(void)
> >> #if defined(CONFIG_FSL_ESDHC)
> >>u32 sdhc_clk;
> >> #endif
> >> +#if !defined(CONFIG_MPC8309)
> >>u32 enc_clk;
> >> +#endif
> >
> > the 8309 is supposed to be similar to the 8308, which also doesn't
> > have enc_clk (even though it doesn't do this). I'm thinking
> > CONFIG_MPC8308 should be renamed _MPC830x before adding support for
> > the 8309.
>
> Wouldn't that be confusing? The way I understand it we'd also need some
> way to distinguish between the two, so we'd have:
>
> #define CONFIG_MPC83xx 1
> #define CONFIG_MPC830x1
> #define CONFIG_MPC8309 1
yes, I didn't mean all 8308 be renamed, only the relevant ones here.
> Plus (assuming my patch is functionally correct), there's only a couple
> of occurences of:
>
> #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC8309)
so far the 8308 and the 8360 are the only SoCs that don't have a
'tens'/MPC83Xx defines. The 8360 can get away with it, since it's
very close to the 8358 (and we can avoid that marketing-imposed
snafu). The 8308 and 9 are more different (QE vs TSEC), but as seen
here, there are other commonalities.
> >> @@ -457,6 +470,8 @@ int get_clocks(void)
> >>gd->tsec1_clk = tsec1_clk;
> >>gd->tsec2_clk = tsec2_clk;
> >>gd->usbdr_clk = usbdr_clk;
> >> +#elif defined(CONFIG_MPC8309)
> >> + gd->usbdr_clk = usbdr_clk;
> >> #endif
> >
> > this change generates this new compiler warning:
> >
> > Configuring for MPC8308RDB board...
> > text data bss dec hex filename
> > 261821 6860 235952 504633 7b339 ./u-boot
> > speed.c: In function 'get_clocks':
> > speed.c:472:16: warning: 'usbdr_clk' may be used uninitialized in this
> > function [-Wuninitialized]
>
> Actually it's this one:
>
> @@ -185,7 +190,10 @@ int get_clocks(void)
> /* unkown SCCR_TSEC1CM value */
> return -2;
> }
> +#endif
>
> +#if defined(CONFIG_MPC8309) || defined(CONFIG_MPC831x) || \
> + defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
> switch ((sccr & SCCR_USBDRCM) >> SCCR_USBDRCM_SHIFT) {
> case 0:
> usbdr_clk = 0;
>
> where the code gets dropped in the case of 8308.
> So, do you think CONFIG_HAS_FSL_DR_USB would do the trick in that case?
now that I take a closer look, not all 831/4/7x boards set
HAS_FSL_DR_USB, and I'm afraid that might break something.
But I also think MPC830x would do the trick nicely, since it'd be
a step toward 8308 usb enablement.
> >> +#define SICR_2_QUIESCE_B (0<< (30-24))
> >> +
> >> #endif
> >
> > was there an inadequacy in the other SoCs' SICRL/H_ naming
> > convention and/or value definition in this area? If not, then why
> > should the 8309 get its own reinvented SICR_1/2_ etc.?
>
> As for the naming, I used SICR_1/2 as opposed to SICRL/H because that's
> how the registers are called in the datasheet.
Hadn't realized that. Wunderbar. I suppose documentation people
don't need to have the same sense of consistency we do.
> As for the value definition, I added my own (third, at least!)
> convention so to match the bit numbering in the datasheet.
> This should makes double checking a trivial task.
I suppose, as I say:
> > Just looking for some consistency here...
but, ok - SICRs aren't used that much and we're at the end of the
83xx line.
> Thanks a lot for your review!
Cheers,
Kim
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Re: [U-Boot] [PATCH] tegra: add funcmux entry for NAND attached to KBC
On 09/27/2012 05:04 PM, Lucas Stach wrote: > Secondary config for the Flash attachment. Acked-by: Stephen Warren ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tegra: add Colibri T20 board support
Am Donnerstag, den 27.09.2012, 17:09 -0600 schrieb Stephen Warren:
> On 09/27/2012 05:03 PM, Lucas Stach wrote:
> > Am Donnerstag, den 27.09.2012, 16:49 -0600 schrieb Stephen Warren:
> >> On 09/27/2012 03:52 PM, Lucas Stach wrote:
> >>> This adds board support for the Toradex Colibri T20 module.
> >>>
> >>> Working functions:
> >>> - MMC boot
> >>> - USB boot
> >>> - Network
> >>> - NAND environment
> >>
> >>> diff --git a/board/toradex/colibri_t20/colibri_t20.c
> >>> b/board/toradex/colibri_t20/colibri_t20.c
> >>
> >>> +#ifdef CONFIG_USB_EHCI_TEGRA
> >>> +void pin_mux_usb(void)
> >>> +{
> >>> + /* USB 1 aka Tegra USB port 3 */
> >>> + pinmux_tristate_disable(PINGRP_SPIG);
> >>> +
> >>> + /* USB 3 aka Tegra USB port 2 */
> >>
> >> Re: the comments:
> >>
> >> The only reason other board files have HW port USB3 listed as DT alias
> >> usb0 is because HW port USB3 was the most useful port on those boards,
> >> and the Tegra USB driver only supported the first listed HW port. Now
> >> that the Tegra USB driver supports any/all of the HW ports, you could
> >> just arrange the aliases in DT so that HW USB1 == user-visible USB1, etc.
> >>
> > I arranged them in that way so they match best with the connector label
> > on the carrier board.
>
> OK, that makes sense then.
>
> >>> diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
> >>
> >>> +/* Environment in NAND, 64K is a bit excessive but erase block is 256K
> >>> anyway */
> >>> +#define CONFIG_ENV_IS_IN_NAND
> >>> +#define CONFIG_ENV_OFFSET (SZ_2M)
> >>> +#undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */
> >>> +#define CONFIG_ENV_SIZE(SZ_64K)
> >>
> >> Any particular reason to change the environment size? All the other
> >> boards that have eMMC put the environment at the end of the second eMMC
> >> boot-block even when NAND is also available. Is there a particular
> >> reason not to do so for Colibri too? Does Colibri boot (BCT+bootloader
> >> image) from eMMC or NAND?
> >>
> > Colibri has no eMMC, it boots from NAND.
>
> Oh, so "MMC boot" in the patch description should be "SD boot" then?
>
Right, last minute additions don't work really well. ;)
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Re: [U-Boot] [PATCH] tegra: add Colibri T20 board support
On 09/27/2012 05:03 PM, Lucas Stach wrote:
> Am Donnerstag, den 27.09.2012, 16:49 -0600 schrieb Stephen Warren:
>> On 09/27/2012 03:52 PM, Lucas Stach wrote:
>>> This adds board support for the Toradex Colibri T20 module.
>>>
>>> Working functions:
>>> - MMC boot
>>> - USB boot
>>> - Network
>>> - NAND environment
>>
>>> diff --git a/board/toradex/colibri_t20/colibri_t20.c
>>> b/board/toradex/colibri_t20/colibri_t20.c
>>
>>> +#ifdef CONFIG_USB_EHCI_TEGRA
>>> +void pin_mux_usb(void)
>>> +{
>>> + /* USB 1 aka Tegra USB port 3 */
>>> + pinmux_tristate_disable(PINGRP_SPIG);
>>> +
>>> + /* USB 3 aka Tegra USB port 2 */
>>
>> Re: the comments:
>>
>> The only reason other board files have HW port USB3 listed as DT alias
>> usb0 is because HW port USB3 was the most useful port on those boards,
>> and the Tegra USB driver only supported the first listed HW port. Now
>> that the Tegra USB driver supports any/all of the HW ports, you could
>> just arrange the aliases in DT so that HW USB1 == user-visible USB1, etc.
>>
> I arranged them in that way so they match best with the connector label
> on the carrier board.
OK, that makes sense then.
>>> diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
>>
>>> +/* Environment in NAND, 64K is a bit excessive but erase block is 256K
>>> anyway */
>>> +#define CONFIG_ENV_IS_IN_NAND
>>> +#define CONFIG_ENV_OFFSET (SZ_2M)
>>> +#undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */
>>> +#define CONFIG_ENV_SIZE(SZ_64K)
>>
>> Any particular reason to change the environment size? All the other
>> boards that have eMMC put the environment at the end of the second eMMC
>> boot-block even when NAND is also available. Is there a particular
>> reason not to do so for Colibri too? Does Colibri boot (BCT+bootloader
>> image) from eMMC or NAND?
>>
> Colibri has no eMMC, it boots from NAND.
Oh, so "MMC boot" in the patch description should be "SD boot" then?
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Re: [U-Boot] [PATCH 2/2] tegra: nand: add board pinmux
Hi,
On Thu, Sep 27, 2012 at 3:38 PM, Stephen Warren wrote:
> On 09/27/2012 03:52 PM, Lucas Stach wrote:
>> Boards may require a different pinmux setup for NAND than the default one.
>> Add a way to call into board specific code to set this up.
>
>> diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c
>
>> void board_nand_init(void)
>> {
>> struct nand_chip *nand = &nand_chip[0];
>>
>> + pin_mux_nand();
>
> pin_mux_spi() and pin_mux_usb() are both called from
> board/nvidia/common/board.c right before the relevant drivers are
> initialized. I think we should centralize the NAND pinmux initialization
> there too if possible. That way, when we read the whole pinmux from DT
> in the future, there's only one place to go and clean up.
>
> Admittedly, pin_mux_mmc() ends up being called from board_init_mmc()
> which is a little unfortunate:-(
I suspect much of this will become tidier before long with the device
model. It would be nice one day if the Tegra driver could select the
pinmux automatically based on fdt settings.
One problem with putting everything in board files is that there is no
default pinmux. I suppose that doesn't matter, it is only a single
line of code. But someone will need to do a patch to update existing
boards that use NAND.
As I said I'm not convinced that boards will ever be in charge of
pinmux when we move it to fdt. At most the board file will probably
just call a pinmux function to set things up. But perhaps it is just
as likely that we will want the drivers to make that call when they
need the pinmux set up?
Anyway I am fine with the change you propose here, as it doesn't seem
like a weak function makes a lot of sense.
Regards,
Simon
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[U-Boot] [PATCH] tegra: add funcmux entry for NAND attached to KBC
Secondary config for the Flash attachment.
Signed-off-by: Lucas Stach
---
arch/arm/cpu/tegra20-common/funcmux.c | 19 ++-
arch/arm/include/asm/arch-tegra20/funcmux.h | 1 +
2 Dateien geändert, 19 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)
diff --git a/arch/arm/cpu/tegra20-common/funcmux.c
b/arch/arm/cpu/tegra20-common/funcmux.c
index b2129ad..00b8029 100644
--- a/arch/arm/cpu/tegra20-common/funcmux.c
+++ b/arch/arm/cpu/tegra20-common/funcmux.c
@@ -235,9 +235,26 @@ int funcmux_select(enum periph_id id, int config)
break;
case PERIPH_ID_NDFLASH:
- if (config == FUNCMUX_NDFLASH_ATC) {
+ switch (config) {
+ case FUNCMUX_NDFLASH_ATC:
pinmux_set_func(PINGRP_ATC, PMUX_FUNC_NAND);
pinmux_tristate_disable(PINGRP_ATC);
+ break;
+ case FUNCMUX_NDFLASH_KBC_8_BIT:
+ pinmux_set_func(PINGRP_KBCA, PMUX_FUNC_NAND);
+ pinmux_set_func(PINGRP_KBCC, PMUX_FUNC_NAND);
+ pinmux_set_func(PINGRP_KBCD, PMUX_FUNC_NAND);
+ pinmux_set_func(PINGRP_KBCE, PMUX_FUNC_NAND);
+ pinmux_set_func(PINGRP_KBCF, PMUX_FUNC_NAND);
+
+ pinmux_tristate_disable(PINGRP_KBCA);
+ pinmux_tristate_disable(PINGRP_KBCC);
+ pinmux_tristate_disable(PINGRP_KBCD);
+ pinmux_tristate_disable(PINGRP_KBCE);
+ pinmux_tristate_disable(PINGRP_KBCF);
+
+ bad_config = 0;
+ break;
}
break;
diff --git a/arch/arm/include/asm/arch-tegra20/funcmux.h
b/arch/arm/include/asm/arch-tegra20/funcmux.h
index bd511db..c986b93 100644
--- a/arch/arm/include/asm/arch-tegra20/funcmux.h
+++ b/arch/arm/include/asm/arch-tegra20/funcmux.h
@@ -60,6 +60,7 @@ enum {
/* NAND flags */
FUNCMUX_NDFLASH_ATC = 0,
+ FUNCMUX_NDFLASH_KBC_8_BIT,
};
/**
--
1.7.11.4
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Re: [U-Boot] [PATCH] tegra: add Colibri T20 board support
Am Donnerstag, den 27.09.2012, 16:49 -0600 schrieb Stephen Warren:
> On 09/27/2012 03:52 PM, Lucas Stach wrote:
> > This adds board support for the Toradex Colibri T20 module.
> >
> > Working functions:
> > - MMC boot
> > - USB boot
> > - Network
> > - NAND environment
>
> > diff --git a/board/toradex/colibri_t20/colibri_t20.c
> > b/board/toradex/colibri_t20/colibri_t20.c
>
> > +#ifdef CONFIG_USB_EHCI_TEGRA
> > +void pin_mux_usb(void)
> > +{
> > + /* USB 1 aka Tegra USB port 3 */
> > + pinmux_tristate_disable(PINGRP_SPIG);
> > +
> > + /* USB 3 aka Tegra USB port 2 */
>
> Re: the comments:
>
> The only reason other board files have HW port USB3 listed as DT alias
> usb0 is because HW port USB3 was the most useful port on those boards,
> and the Tegra USB driver only supported the first listed HW port. Now
> that the Tegra USB driver supports any/all of the HW ports, you could
> just arrange the aliases in DT so that HW USB1 == user-visible USB1, etc.
>
I arranged them in that way so they match best with the connector label
on the carrier board.
> > +#ifdef CONFIG_TEGRA_NAND
> > +void pin_mux_nand(void)
> > +{
> > + funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
>
> I don't recall a patch to implement FUNCMUX_NDFLASH_KBC_8_BIT. Maybe I
> just missed it?
>
No, you are right I missed to send it out. Will follow in a sec.
> > diff --git a/board/toradex/dts/tegra20-colibri.dts
> > b/board/toradex/dts/tegra20-colibri.dts
>
> This filename should exactly match the name in boards.cfg, so
> tegra20-colibri_t20.dts. That said, if Colibri is always Tegra20, I'd
> rather see the boards.cfg entry renamed to plain "colibri".
>
I'll rename the dts file. Colibri is a family name and T30 hardware will
follow in the next few weeks. Not sure if I will get one at my hands to
do the upstream work.
> > +};
> > \ No newline at end of file
>
> That's probably unintended?
>
Yep.
> > diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
>
> > +/* Environment in NAND, 64K is a bit excessive but erase block is 256K
> > anyway */
> > +#define CONFIG_ENV_IS_IN_NAND
> > +#define CONFIG_ENV_OFFSET (SZ_2M)
> > +#undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */
> > +#define CONFIG_ENV_SIZE(SZ_64K)
>
> Any particular reason to change the environment size? All the other
> boards that have eMMC put the environment at the end of the second eMMC
> boot-block even when NAND is also available. Is there a particular
> reason not to do so for Colibri too? Does Colibri boot (BCT+bootloader
> image) from eMMC or NAND?
>
Colibri has no eMMC, it boots from NAND.
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Re: [U-Boot] [PATCH 1/2] tegra: clean up board include hell
Hi, On Thu, Sep 27, 2012 at 3:32 PM, Stephen Warren wrote: > On 09/27/2012 03:52 PM, Lucas Stach wrote: >> The prototypes used in board files were all scattered out, which lead to >> code duplication between SPL and normal U-Boot and some prototypes not >> actually >> being used. Consolidate this in a common board header. > >> This will allow to push down the calling of the pinmux functions into the >> respective drivers and this way cut down on complexity from the common board >> code. > > I don't think that (calling pinmux from drivers) would be a good idea. > The entire pinmux should be set up globally when the system boots in > order to avoid conflicts part-way through a change, and to avoid > duplicating pinmux calls into every single driver. Unless a particular > driver actively needs to switch between different pinmux configurations > at run-time (e.g. an I2C bus mux that uses pinmux to do the muxing). Well I'm not so keen on this approach. Ultimately we want to be able to start a driver (and set up its pinmux) only if it is needed during boot. The idea behind funcmux is that it is a single line call from a driver or board to select the required setting, so the overhead is small - and we know that for most peripherals there are only a small number of options. I can't predict where we might end up with fdt-based pinmux, but it seems to me that global pinmux should be a board/implementer option, not something required by the use of Tegra. Just my 2c worth. > > That said, this change to simplify all the #includes is probably > reasonable. One comment below. > >> diff --git a/arch/arm/include/asm/arch-tegra/board.h >> b/arch/arm/include/asm/arch-tegra/board.h > >> -/* Setup UARTs for the board according to the selected config */ >> +/* Set up pinmux to make UART usable */ >> +void gpio_config_uart(void); /* CONFIG_SPI_UART_SWITCH */ >> +void gpio_early_init_uart(void); /*!CONFIG_SPI_UART_SWITCH */ >> + >> +/* Set up early UART output */ >> void board_init_uart_f(void); >> >> +/* Set up any early GPIOs the board might need for proper operation */ >> +void gpio_early_init(void); /* overrideable GPIO config*/ > > I think we should just rip out all the CONFIG_SPI_UART_SWITCH stuff. > It's only there to support one board with a completely broken HW design. > Still, that could happen in a separate patch after this though. Yes I agree the seaboard is broken, but this is an upstream board and is in fact the only one I have to test with. Could we perhaps delay ripping this out for a little while longer? Regards, Simon > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tegra: add Colibri T20 board support
On 09/27/2012 03:52 PM, Lucas Stach wrote:
> This adds board support for the Toradex Colibri T20 module.
>
> Working functions:
> - MMC boot
> - USB boot
> - Network
> - NAND environment
> diff --git a/board/toradex/colibri_t20/colibri_t20.c
> b/board/toradex/colibri_t20/colibri_t20.c
> +#ifdef CONFIG_USB_EHCI_TEGRA
> +void pin_mux_usb(void)
> +{
> + /* USB 1 aka Tegra USB port 3 */
> + pinmux_tristate_disable(PINGRP_SPIG);
> +
> + /* USB 3 aka Tegra USB port 2 */
Re: the comments:
The only reason other board files have HW port USB3 listed as DT alias
usb0 is because HW port USB3 was the most useful port on those boards,
and the Tegra USB driver only supported the first listed HW port. Now
that the Tegra USB driver supports any/all of the HW ports, you could
just arrange the aliases in DT so that HW USB1 == user-visible USB1, etc.
> +#ifdef CONFIG_TEGRA_NAND
> +void pin_mux_nand(void)
> +{
> + funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
I don't recall a patch to implement FUNCMUX_NDFLASH_KBC_8_BIT. Maybe I
just missed it?
> diff --git a/board/toradex/dts/tegra20-colibri.dts
> b/board/toradex/dts/tegra20-colibri.dts
This filename should exactly match the name in boards.cfg, so
tegra20-colibri_t20.dts. That said, if Colibri is always Tegra20, I'd
rather see the boards.cfg entry renamed to plain "colibri".
> +};
> \ No newline at end of file
That's probably unintended?
> diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
> +/* Environment in NAND, 64K is a bit excessive but erase block is 256K
> anyway */
> +#define CONFIG_ENV_IS_IN_NAND
> +#define CONFIG_ENV_OFFSET (SZ_2M)
> +#undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */
> +#define CONFIG_ENV_SIZE(SZ_64K)
Any particular reason to change the environment size? All the other
boards that have eMMC put the environment at the end of the second eMMC
boot-block even when NAND is also available. Is there a particular
reason not to do so for Colibri too? Does Colibri boot (BCT+bootloader
image) from eMMC or NAND?
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[U-Boot] [RFC PATCH v2 1/5] env: Add support for callbacks to environment vars
Add support for callbacks to the "hashtable" functions.
One check-patch warning to inter-op with existing hashtable code:
WARNING: do not add new typedefs
+typedef struct entry ENTRY;
Signed-off-by: Joe Hershberger
---
Changes in v2:
- Added much-needed documentation
- Factored out prevch and nextch in env_attr_lookup()
README | 28
arch/arm/cpu/u-boot.lds | 7 ++
common/Makefile | 2 +
common/env_attr.c | 187
common/env_callback.c | 130 +
include/env_attr.h | 55 ++
include/env_callback.h | 72 +++
include/environment.h | 2 +
include/search.h| 5 ++
lib/hashtable.c | 65 -
10 files changed, 552 insertions(+), 1 deletion(-)
create mode 100644 common/env_attr.c
create mode 100644 common/env_callback.c
create mode 100644 include/env_attr.h
create mode 100644 include/env_callback.h
diff --git a/README b/README
index fb9d904..47bed09 100644
--- a/README
+++ b/README
@@ -3991,6 +3991,34 @@ Please note that changes to some configuration
parameters may take
only effect after the next boot (yes, that's just like Windoze :-).
+Callback functions for environment variables:
+-
+
+For some environment variables, the behavior of u-boot needs to change
+when their values are changed. This functionailty allows functions to
+be associated with arbitrary variables. On creation, overwrite, or
+deletion, the callback will provide the opportunity for some side
+effect to happen or for the change to be rejected.
+
+The callbacks are named and associated with a function using the
+U_BOOT_ENV_CALLBACK macro in your board or driver code.
+
+These callbacks are associated with variables in one of two ways. The
+static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC
+in the board configuration to a string that defines a list of
+associations. The list must be in the following format:
+
+ entry = variable_name[:callback_name]
+ list = entry[,list]
+
+If the callback name is not specified, then the callback is deleted.
+Spaces are also allowed anywhere in the list.
+
+Callbacks can also be associated by defining the ".callbacks" variable
+with the same list format above. Any association in ".callbacks" will
+override any association in the static list.
+
+
Command Line Parsing:
=
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index e49ca0c..5af8c36 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -55,6 +55,13 @@ SECTIONS
. = ALIGN(4);
+ . = .;
+ __u_boot_env_clbk_start = .;
+ .u_boot_env_clbk : { *(.u_boot_env_clbk) }
+ __u_boot_env_clbk_end = .;
+
+ . = ALIGN(4);
+
__image_copy_end = .;
.rel.dyn : {
diff --git a/common/Makefile b/common/Makefile
index 3d62775..f61c9a1 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -43,7 +43,9 @@ COBJS-y += cmd_nvedit.o
COBJS-y += cmd_version.o
# environment
+COBJS-y += env_attr.o
COBJS-y += env_common.o
+COBJS-y += env_callback.o
COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o
COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o
XCOBJS-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o
diff --git a/common/env_attr.c b/common/env_attr.c
new file mode 100644
index 000..62643c8
--- /dev/null
+++ b/common/env_attr.c
@@ -0,0 +1,187 @@
+/*
+ * (C) Copyright 2012
+ * Joe Hershberger, National Instruments, joe.hershber...@ni.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+
+/*
+ * Iterate through the whole list calling the callback for each found element.
+ * "attr_list" takes the form:
+ * attributes = [^,:\s]*
+ * entry = name[:attributes]
+ * list = entry[,list]
+ */
+int env_attr_walk(const char *attr_list,
+ int (*callback)(const char *name, const char *attributes))
+{
+ const char *entry, *entry_end;
+ char *name, *attributes;
+
+ if (!attr_list)
+ /* list not found */
+ return 1;
+
+ entry = attr_li
[U-Boot] [RFC PATCH v2 4/5] env: Add a baudrate env handler
Remove the hard-coded baudrate handler and use a callback instead
Signed-off-by: Joe Hershberger
---
common/Makefile| 2 +-
common/cmd_nvedit.c| 35 --
common/serial.c| 58 ++
include/env_callback.h | 2 +-
4 files changed, 60 insertions(+), 37 deletions(-)
diff --git a/common/Makefile b/common/Makefile
index f61c9a1..1187960 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -32,7 +32,7 @@ COBJS-y += command.o
COBJS-y += exports.o
COBJS-$(CONFIG_SYS_HUSH_PARSER) += hush.o
COBJS-y += s_record.o
-COBJS-$(CONFIG_SERIAL_MULTI) += serial.o
+COBJS-y += serial.o
COBJS-y += xyzModem.o
# core command
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index ac15a3c..652e8ce 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -47,7 +47,6 @@
#include
#include
#include
-#include
#include
#include
@@ -77,12 +76,6 @@ SPI_FLASH|NVRAM|MMC|FAT|REMOTE} or CONFIG_ENV_IS_NOWHERE
#defineMAX_ENV_SIZE(1 << 20) /* 1 MiB */
/*
- * Table with supported baudrates (defined in config_xyz.h)
- */
-static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
-#defineN_BAUDRATES (sizeof(baudrate_table) / sizeof(baudrate_table[0]))
-
-/*
* This variable is incremented on each do_env_set(), so it can
* be used via get_env_id() as an indication, if the environment
* has changed or not. So it is possible to reread an environment
@@ -263,34 +256,6 @@ int _do_env_set(int flag, int argc, char * const argv[])
return 1;
}
#endif
- /*
-* Switch to new baudrate if new baudrate is supported
-*/
- if (strcmp(name, "baudrate") == 0) {
- int baudrate = simple_strtoul(argv[2], NULL, 10);
- int i;
- for (i = 0; i < N_BAUDRATES; ++i) {
- if (baudrate == baudrate_table[i])
- break;
- }
- if (i == N_BAUDRATES) {
- printf("## Baudrate %d bps not supported\n",
- baudrate);
- return 1;
- }
- printf("## Switch baudrate to %d bps and"
- "press ENTER ...\n", baudrate);
- udelay(5);
- gd->baudrate = baudrate;
-#if defined(CONFIG_PPC) || defined(CONFIG_MCF52x2)
- gd->bd->bi_baudrate = baudrate;
-#endif
-
- serial_setbrg();
- udelay(5);
- while (getc() != '\r')
- ;
- }
}
/* Delete only ? */
diff --git a/common/serial.c b/common/serial.c
index 75cc1bb..4ff1463 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -22,6 +22,7 @@
*/
#include
+#include
#include
#include
#include
@@ -29,6 +30,62 @@
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Table with supported baudrates (defined in config_xyz.h)
+ */
+static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
+#defineN_BAUDRATES (sizeof(baudrate_table) / sizeof(baudrate_table[0]))
+
+static int on_baudrate(const char *name, const char *value, enum env_op op)
+{
+ int i;
+ int baudrate;
+
+ switch (op) {
+ case env_op_create:
+ case env_op_overwrite:
+ /*
+* Switch to new baudrate if new baudrate is supported
+*/
+ baudrate = simple_strtoul(value, NULL, 10);
+
+ /* Not actually changing */
+ if (gd->baudrate == baudrate)
+ return 0;
+
+ for (i = 0; i < N_BAUDRATES; ++i) {
+ if (baudrate == baudrate_table[i])
+ break;
+ }
+ if (i == N_BAUDRATES) {
+ printf("## Baudrate %d bps not supported\n",
+ baudrate);
+ return 1;
+ }
+ printf("## Switch baudrate to %d"
+ " bps and press ENTER ...\n", baudrate);
+ udelay(5);
+ gd->baudrate = baudrate;
+#if defined(CONFIG_PPC) || defined(CONFIG_MCF52x2)
+ gd->bd->bi_baudrate = baudrate;
+#endif
+
+ serial_setbrg();
+ udelay(5);
+ while (getc() != '\r')
+ ;
+
+ return 0;
+ case env_op_delete:
+ printf("## Baudrate may not be deleted\n");
+ return 1;
+ default:
+ return 0;
+ }
+}
+U_BOOT_ENV_CALLBACK(baudrate, on_baudrate);
+
+#ifdef CONFIG_SERIAL_MULTI
static struct serial_device *serial_devices;
[U-Boot] [RFC PATCH v2 2/5] env: Add a loadaddr env handler
Remove the hard-coded loadaddr handler and use a callback instead
Signed-off-by: Joe Hershberger
---
common/cmd_load.c | 24 ++--
common/cmd_nvedit.c| 10 +-
include/env_callback.h | 1 +
3 files changed, 24 insertions(+), 11 deletions(-)
diff --git a/common/cmd_load.c b/common/cmd_load.c
index f4d66de..8849596 100644
--- a/common/cmd_load.c
+++ b/common/cmd_load.c
@@ -30,9 +30,14 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
+ulong load_addr = CONFIG_SYS_LOAD_ADDR;/* Default Load Address */
+ulong save_addr; /* Default Save Address */
+ulong save_size; /* Default Save Size (in bytes) */
+
#if defined(CONFIG_CMD_LOADB)
static ulong load_serial_ymodem (ulong offset);
#endif
@@ -50,6 +55,21 @@ static int do_echo = 1;
/* */
+static int on_loadaddr(const char *name, const char *value, enum env_op op)
+{
+ switch (op) {
+ case env_op_create:
+ case env_op_overwrite:
+ load_addr = simple_strtoul(value, NULL, 16);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(loadaddr, on_loadaddr);
+
#if defined(CONFIG_CMD_LOADS)
int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
@@ -257,8 +277,8 @@ read_record (char *buf, ulong len)
int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- ulong offset = 0;
- ulong size = 0;
+ ulong offset = save_addr;
+ ulong size = save_size;
#ifdef CONFIG_SYS_LOADS_BAUD_CHANGE
int save_baudrate, current_baudrate;
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index fd05e72..9e8ea12 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -79,10 +79,6 @@ SPI_FLASH|NVRAM|MMC|FAT|REMOTE} or CONFIG_ENV_IS_NOWHERE
*/
#defineMAX_ENV_SIZE(1 << 20) /* 1 MiB */
-ulong load_addr = CONFIG_SYS_LOAD_ADDR;/* Default Load Address */
-ulong save_addr; /* Default Save Address */
-ulong save_size; /* Default Save Size (in bytes) */
-
/*
* Table with supported baudrates (defined in config_xyz.h)
*/
@@ -341,12 +337,8 @@ int _do_env_set(int flag, int argc, char * const argv[])
* Some variables should be updated when the corresponding
* entry in the environment is changed
*/
- if (strcmp(argv[1], "loadaddr") == 0) {
- load_addr = simple_strtoul(argv[2], NULL, 16);
- return 0;
- }
#if defined(CONFIG_CMD_NET)
- else if (strcmp(argv[1], "bootfile") == 0) {
+ if (strcmp(argv[1], "bootfile") == 0) {
copy_filename(BootFile, argv[2], sizeof(BootFile));
return 0;
}
diff --git a/include/env_callback.h b/include/env_callback.h
index 76ac865..9c1cbe9 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -36,6 +36,7 @@
* a new assogiation in the ".callbacks" environment variable.
*/
#define ENV_CALLBACK_LIST_STATIC ENV_CALLBACK_VAR ":callbacks," \
+ "loadaddr:loadaddr," \
CONFIG_ENV_CALLBACK_LIST_STATIC
enum env_op {
--
1.7.11.5
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[U-Boot] [RFC PATCH v2 5/5] env: Add a console env handler
Remove the hard-coded console handler and use a callback instead
Signed-off-by: Joe Hershberger
---
common/cmd_nvedit.c| 31 ---
common/console.c | 46 ++
include/env_callback.h | 1 +
3 files changed, 47 insertions(+), 31 deletions(-)
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 652e8ce..6a6421a 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -190,7 +190,6 @@ static int do_env_grep(cmd_tbl_t *cmdtp, int flag,
int _do_env_set(int flag, int argc, char * const argv[])
{
int i, len;
- int console = -1;
char *name, *value, *s;
ENTRY e, *ep;
@@ -210,36 +209,6 @@ int _do_env_set(int flag, int argc, char * const argv[])
e.data = NULL;
hsearch_r(e, FIND, &ep, &env_htab);
- /* Check for console redirection */
- if (strcmp(name, "stdin") == 0)
- console = stdin;
- else if (strcmp(name, "stdout") == 0)
- console = stdout;
- else if (strcmp(name, "stderr") == 0)
- console = stderr;
-
- if (console != -1) {
- if (argc < 3) { /* Cannot delete it! */
- printf("Can't delete \"%s\"\n", name);
- return 1;
- }
-
-#ifdef CONFIG_CONSOLE_MUX
- i = iomux_doenv(console, argv[2]);
- if (i)
- return i;
-#else
- /* Try assigning specified device */
- if (console_assign(console, argv[2]) < 0)
- return 1;
-
-#ifdef CONFIG_SERIAL_MULTI
- if (serial_assign(argv[2]) < 0)
- return 1;
-#endif
-#endif /* CONFIG_CONSOLE_MUX */
- }
-
/*
* Some variables like "ethaddr" and "serial#" can be set only
* once and cannot be deleted; also, "ver" is readonly.
diff --git a/common/console.c b/common/console.c
index 1177f7d..18b4fcc 100644
--- a/common/console.c
+++ b/common/console.c
@@ -26,9 +26,55 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
+static int on_console(const char *name, const char *value, enum env_op op)
+{
+ int console = -1;
+#ifdef CONFIG_CONSOLE_MUX
+ int retval;
+#endif
+
+ /* Check for console redirection */
+ if (strcmp(name, "stdin") == 0)
+ console = stdin;
+ else if (strcmp(name, "stdout") == 0)
+ console = stdout;
+ else if (strcmp(name, "stderr") == 0)
+ console = stderr;
+
+ switch (op) {
+ case env_op_create:
+ case env_op_overwrite:
+
+#ifdef CONFIG_CONSOLE_MUX
+ retval = iomux_doenv(console, value);
+ if (retval)
+ return retval;
+#else
+ /* Try assigning specified device */
+ if (console_assign(console, value) < 0)
+ return 1;
+
+#ifdef CONFIG_SERIAL_MULTI
+ if (serial_assign(value) < 0)
+ return 1;
+#endif
+#endif /* CONFIG_CONSOLE_MUX */
+ return 0;
+
+ case env_op_delete:
+ printf("Can't delete \"%s\"\n", name);
+ return 1;
+
+ default:
+ return 0;
+ }
+}
+U_BOOT_ENV_CALLBACK(console, on_console);
+
#ifdef CONFIG_SYS_CONSOLE_IS_IN_ENV
/*
* if overwrite_console returns 1, the stdin, stderr and stdout
diff --git a/include/env_callback.h b/include/env_callback.h
index d399b39..0a50268 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -37,6 +37,7 @@
*/
#define ENV_CALLBACK_LIST_STATIC ENV_CALLBACK_VAR ":callbacks," \
"loadaddr:loadaddr,bootfile:bootfile,baudrate:baudrate," \
+ "stdin:console,stdout:console,stderr:console," \
CONFIG_ENV_CALLBACK_LIST_STATIC
enum env_op {
--
1.7.11.5
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[U-Boot] [RFC PATCH v2 3/5] env: Add a bootfile env handler
Remove the hard-coded bootfile handler and use a callback instead
Signed-off-by: Joe Hershberger
---
common/cmd_nvedit.c| 13 -
include/env_callback.h | 2 +-
net/net.c | 16
3 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 9e8ea12..ac15a3c 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -50,9 +50,6 @@
#include
#include
#include
-#if defined(CONFIG_CMD_NET)
-#include
-#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -333,16 +330,6 @@ int _do_env_set(int flag, int argc, char * const argv[])
return 1;
}
- /*
-* Some variables should be updated when the corresponding
-* entry in the environment is changed
-*/
-#if defined(CONFIG_CMD_NET)
- if (strcmp(argv[1], "bootfile") == 0) {
- copy_filename(BootFile, argv[2], sizeof(BootFile));
- return 0;
- }
-#endif
return 0;
}
diff --git a/include/env_callback.h b/include/env_callback.h
index 9c1cbe9..b450077 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -36,7 +36,7 @@
* a new assogiation in the ".callbacks" environment variable.
*/
#define ENV_CALLBACK_LIST_STATIC ENV_CALLBACK_VAR ":callbacks," \
- "loadaddr:loadaddr," \
+ "loadaddr:loadaddr,bootfile:bootfile," \
CONFIG_ENV_CALLBACK_LIST_STATIC
enum env_op {
diff --git a/net/net.c b/net/net.c
index e8ff066..7d7196f 100644
--- a/net/net.c
+++ b/net/net.c
@@ -82,6 +82,7 @@
#include
#include
+#include
#include
#if defined(CONFIG_STATUS_LED)
#include
@@ -208,6 +209,21 @@ static int NetTryCount;
/**/
+static int on_bootfile(const char *name, const char *value, enum env_op op)
+{
+ switch (op) {
+ case env_op_create:
+ case env_op_overwrite:
+ copy_filename(BootFile, value, sizeof(BootFile));
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(bootfile, on_bootfile);
+
/*
* Check if autoload is enabled. If so, use either NFS or TFTP to download
* the boot file.
--
1.7.11.5
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[U-Boot] [RFC PATCH v2 0/5] Add environment call-back capability
When a variable with a registered callback is inserted, deleted, or overwritten the callback is called and gives the system an opportunity to do something in response to the change. It also has the opportunuty to reject the change by returning non-zero. Before I go much further, I want to get a little feedback if this is a good implementation. It certainly cleans up cmd_nvedit.c significantly! Changes in v2: - Added much-needed documentation - Factored out prevch and nextch in env_attr_lookup() Joe Hershberger (5): env: Add support for callbacks to environment vars env: Add a loadaddr env handler env: Add a bootfile env handler env: Add a baudrate env handler env: Add a console env handler README | 28 arch/arm/cpu/u-boot.lds | 7 ++ common/Makefile | 4 +- common/cmd_load.c | 24 ++- common/cmd_nvedit.c | 87 -- common/console.c| 46 common/env_attr.c | 187 common/env_callback.c | 130 + common/serial.c | 58 +++ include/env_attr.h | 55 ++ include/env_callback.h | 74 +++ include/environment.h | 2 + include/search.h| 5 ++ lib/hashtable.c | 65 - net/net.c | 16 + 15 files changed, 697 insertions(+), 91 deletions(-) create mode 100644 common/env_attr.c create mode 100644 common/env_callback.c create mode 100644 include/env_attr.h create mode 100644 include/env_callback.h -- 1.7.11.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] tegra: clean up board include hell
Am Donnerstag, den 27.09.2012, 16:32 -0600 schrieb Stephen Warren: > On 09/27/2012 03:52 PM, Lucas Stach wrote: > > The prototypes used in board files were all scattered out, which lead to > > code duplication between SPL and normal U-Boot and some prototypes not > > actually > > being used. Consolidate this in a common board header. > > > This will allow to push down the calling of the pinmux functions into the > > respective drivers and this way cut down on complexity from the common board > > code. > > I don't think that (calling pinmux from drivers) would be a good idea. > The entire pinmux should be set up globally when the system boots in > order to avoid conflicts part-way through a change, and to avoid > duplicating pinmux calls into every single driver. Unless a particular > driver actively needs to switch between different pinmux configurations > at run-time (e.g. an I2C bus mux that uses pinmux to do the muxing). > Ok, this means Patch 2/2 is the wrong approach. I will wait if there are other comments before respinning. > That said, this change to simplify all the #includes is probably > reasonable. One comment below. > > > diff --git a/arch/arm/include/asm/arch-tegra/board.h > > b/arch/arm/include/asm/arch-tegra/board.h > > > -/* Setup UARTs for the board according to the selected config */ > > +/* Set up pinmux to make UART usable */ > > +void gpio_config_uart(void); /* CONFIG_SPI_UART_SWITCH */ > > +void gpio_early_init_uart(void); /*!CONFIG_SPI_UART_SWITCH */ > > + > > +/* Set up early UART output */ > > void board_init_uart_f(void); > > > > +/* Set up any early GPIOs the board might need for proper operation */ > > +void gpio_early_init(void); /* overrideable GPIO config*/ > > I think we should just rip out all the CONFIG_SPI_UART_SWITCH stuff. > It's only there to support one board with a completely broken HW design. > Still, that could happen in a separate patch after this though. > Yeah, if everyone is fine with this, i'll do this. Tom, Simon? Now that Colibri support is mostly finished I plan on doing some janitor tasks like moving the USB driver to the right location in the tree and moving over MMC to device tree (wrong sport to call pinmux will go away then). Might as well kill UART_SWITCH along the way. Lucas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] tegra: nand: add board pinmux
On 09/27/2012 03:52 PM, Lucas Stach wrote:
> Boards may require a different pinmux setup for NAND than the default one.
> Add a way to call into board specific code to set this up.
> diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c
> void board_nand_init(void)
> {
> struct nand_chip *nand = &nand_chip[0];
>
> + pin_mux_nand();
pin_mux_spi() and pin_mux_usb() are both called from
board/nvidia/common/board.c right before the relevant drivers are
initialized. I think we should centralize the NAND pinmux initialization
there too if possible. That way, when we read the whole pinmux from DT
in the future, there's only one place to go and clean up.
Admittedly, pin_mux_mmc() ends up being called from board_init_mmc()
which is a little unfortunate:-(
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Re: [U-Boot] [PATCH 1/2] tegra: clean up board include hell
On 09/27/2012 03:52 PM, Lucas Stach wrote: > The prototypes used in board files were all scattered out, which lead to > code duplication between SPL and normal U-Boot and some prototypes not > actually > being used. Consolidate this in a common board header. > This will allow to push down the calling of the pinmux functions into the > respective drivers and this way cut down on complexity from the common board > code. I don't think that (calling pinmux from drivers) would be a good idea. The entire pinmux should be set up globally when the system boots in order to avoid conflicts part-way through a change, and to avoid duplicating pinmux calls into every single driver. Unless a particular driver actively needs to switch between different pinmux configurations at run-time (e.g. an I2C bus mux that uses pinmux to do the muxing). That said, this change to simplify all the #includes is probably reasonable. One comment below. > diff --git a/arch/arm/include/asm/arch-tegra/board.h > b/arch/arm/include/asm/arch-tegra/board.h > -/* Setup UARTs for the board according to the selected config */ > +/* Set up pinmux to make UART usable */ > +void gpio_config_uart(void); /* CONFIG_SPI_UART_SWITCH */ > +void gpio_early_init_uart(void); /*!CONFIG_SPI_UART_SWITCH */ > + > +/* Set up early UART output */ > void board_init_uart_f(void); > > +/* Set up any early GPIOs the board might need for proper operation */ > +void gpio_early_init(void); /* overrideable GPIO config*/ I think we should just rip out all the CONFIG_SPI_UART_SWITCH stuff. It's only there to support one board with a completely broken HW design. Still, that could happen in a separate patch after this though. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nand: add ID for Micron MT29F8G08A
On 09/27/2012 05:19:23 PM, Lucas Stach wrote:
Am Donnerstag, den 27.09.2012, 17:13 -0500 schrieb Scott Wood:
> On 09/27/2012 05:08:03 PM, Lucas Stach wrote:
> > Am Donnerstag, den 27.09.2012, 16:53 -0500 schrieb Scott Wood:
> > > On 09/27/2012 04:49:31 PM, Lucas Stach wrote:
> > > > As found on the Colibri T20 engineering sample board.
> > > >
> > > > Signed-off-by: Lucas Stach
> > > > ---
> > > > drivers/mtd/nand/nand_ids.c | 1 +
> > > > 1 Datei geändert, 1 Zeile hinzugefügt(+)
> > > >
> > > > diff --git a/drivers/mtd/nand/nand_ids.c
> > b/drivers/mtd/nand/nand_ids.c
> > > > index 3953549..ae300fe 100644
> > > > --- a/drivers/mtd/nand/nand_ids.c
> > > > +++ b/drivers/mtd/nand/nand_ids.c
> > > > @@ -105,6 +105,7 @@ const struct nand_flash_dev
nand_flash_ids[]
> > = {
> > > > {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0,
LP_OPTIONS16},
> > > >
> > > > /* 8 Gigabit */
> > > > + {"NAND 1GiB 3,3V 8-bit", 0x38, 0, 1024, 0,
LP_OPTIONS},
> > > > {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0,
LP_OPTIONS},
> > > > {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0,
LP_OPTIONS},
> > > > {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0,
LP_OPTIONS16},
> > > > --
> > > > 1.7.11.4
> > >
> > > Does this chip support ONFI? If so, we don't use the ID table.
> > >
> > I just rechecked, the datasheet claims the chip supports ONFI
2.0, but
> > it does not get detected by the u-boot NAND code without the
entry in
> > the id table. CONFIG_SYS_NAND_ONFI_DETECTION is set.
>
> Could you debug it? Could there be a problem in the NAND controller
> (or the driver)?
>
Haven't done much in tracking this down much further. Could quite
possible be a bug in the Tegra nand driver, this driver isn't in tree
for a long time and it seems no Tegra board so far tried using ONFI.
I don't see the Tegra READID code using column, which is a problem.
Hopefully this is a driver limitation and not hardware, unlike i.MX.
-Scott
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[U-Boot] [PATCH v3] usb: ehci: don't print debug output
This is clearly some sort of debug output and should not
be printed during normal operation.
Signed-off-by: Lucas Stach
---
v2,v3: rebased on top of u-boot-usb/master
---
drivers/usb/host/ehci-hcd.c | 2 +-
1 Datei geändert, 1 Zeile hinzugefügt(+), 1 Zeile entfernt(-)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 8537201..d90e94d 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -874,7 +874,7 @@ int usb_lowlevel_init(int index, void **controller)
reg = ehci_readl(&ehcic[index].hccr->cr_hcsparams);
descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
- printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
+ debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
/* Port Indicators */
if (HCS_INDICATOR(reg))
put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
--
1.7.11.4
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Re: [U-Boot] [PATCH] nand: add ID for Micron MT29F8G08A
Am Donnerstag, den 27.09.2012, 17:13 -0500 schrieb Scott Wood:
> On 09/27/2012 05:08:03 PM, Lucas Stach wrote:
> > Am Donnerstag, den 27.09.2012, 16:53 -0500 schrieb Scott Wood:
> > > On 09/27/2012 04:49:31 PM, Lucas Stach wrote:
> > > > As found on the Colibri T20 engineering sample board.
> > > >
> > > > Signed-off-by: Lucas Stach
> > > > ---
> > > > drivers/mtd/nand/nand_ids.c | 1 +
> > > > 1 Datei geändert, 1 Zeile hinzugefügt(+)
> > > >
> > > > diff --git a/drivers/mtd/nand/nand_ids.c
> > b/drivers/mtd/nand/nand_ids.c
> > > > index 3953549..ae300fe 100644
> > > > --- a/drivers/mtd/nand/nand_ids.c
> > > > +++ b/drivers/mtd/nand/nand_ids.c
> > > > @@ -105,6 +105,7 @@ const struct nand_flash_dev nand_flash_ids[]
> > = {
> > > > {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
> > > >
> > > > /* 8 Gigabit */
> > > > + {"NAND 1GiB 3,3V 8-bit",0x38, 0, 1024, 0, LP_OPTIONS},
> > > > {"NAND 1GiB 1,8V 8-bit",0xA3, 0, 1024, 0, LP_OPTIONS},
> > > > {"NAND 1GiB 3,3V 8-bit",0xD3, 0, 1024, 0, LP_OPTIONS},
> > > > {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
> > > > --
> > > > 1.7.11.4
> > >
> > > Does this chip support ONFI? If so, we don't use the ID table.
> > >
> > I just rechecked, the datasheet claims the chip supports ONFI 2.0, but
> > it does not get detected by the u-boot NAND code without the entry in
> > the id table. CONFIG_SYS_NAND_ONFI_DETECTION is set.
>
> Could you debug it? Could there be a problem in the NAND controller
> (or the driver)?
>
Haven't done much in tracking this down much further. Could quite
possible be a bug in the Tegra nand driver, this driver isn't in tree
for a long time and it seems no Tegra board so far tried using ONFI.
> Are you using a recent U-Boot tree?
>
Recent master tree as of today.
Lucas
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Re: [U-Boot] [PATCH] nand: add ID for Micron MT29F8G08A
On 09/27/2012 05:08:03 PM, Lucas Stach wrote:
Am Donnerstag, den 27.09.2012, 16:53 -0500 schrieb Scott Wood:
> On 09/27/2012 04:49:31 PM, Lucas Stach wrote:
> > As found on the Colibri T20 engineering sample board.
> >
> > Signed-off-by: Lucas Stach
> > ---
> > drivers/mtd/nand/nand_ids.c | 1 +
> > 1 Datei geändert, 1 Zeile hinzugefügt(+)
> >
> > diff --git a/drivers/mtd/nand/nand_ids.c
b/drivers/mtd/nand/nand_ids.c
> > index 3953549..ae300fe 100644
> > --- a/drivers/mtd/nand/nand_ids.c
> > +++ b/drivers/mtd/nand/nand_ids.c
> > @@ -105,6 +105,7 @@ const struct nand_flash_dev nand_flash_ids[]
= {
> > {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
> >
> > /* 8 Gigabit */
> > + {"NAND 1GiB 3,3V 8-bit", 0x38, 0, 1024, 0, LP_OPTIONS},
> > {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS},
> > {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS},
> > {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
> > --
> > 1.7.11.4
>
> Does this chip support ONFI? If so, we don't use the ID table.
>
I just rechecked, the datasheet claims the chip supports ONFI 2.0, but
it does not get detected by the u-boot NAND code without the entry in
the id table. CONFIG_SYS_NAND_ONFI_DETECTION is set.
Could you debug it? Could there be a problem in the NAND controller
(or the driver)?
Are you using a recent U-Boot tree?
-Scott
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Re: [U-Boot] [PATCH] nand: add ID for Micron MT29F8G08A
Am Donnerstag, den 27.09.2012, 16:53 -0500 schrieb Scott Wood:
> On 09/27/2012 04:49:31 PM, Lucas Stach wrote:
> > As found on the Colibri T20 engineering sample board.
> >
> > Signed-off-by: Lucas Stach
> > ---
> > drivers/mtd/nand/nand_ids.c | 1 +
> > 1 Datei geändert, 1 Zeile hinzugefügt(+)
> >
> > diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
> > index 3953549..ae300fe 100644
> > --- a/drivers/mtd/nand/nand_ids.c
> > +++ b/drivers/mtd/nand/nand_ids.c
> > @@ -105,6 +105,7 @@ const struct nand_flash_dev nand_flash_ids[] = {
> > {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
> >
> > /* 8 Gigabit */
> > + {"NAND 1GiB 3,3V 8-bit",0x38, 0, 1024, 0, LP_OPTIONS},
> > {"NAND 1GiB 1,8V 8-bit",0xA3, 0, 1024, 0, LP_OPTIONS},
> > {"NAND 1GiB 3,3V 8-bit",0xD3, 0, 1024, 0, LP_OPTIONS},
> > {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
> > --
> > 1.7.11.4
>
> Does this chip support ONFI? If so, we don't use the ID table.
>
I just rechecked, the datasheet claims the chip supports ONFI 2.0, but
it does not get detected by the u-boot NAND code without the entry in
the id table. CONFIG_SYS_NAND_ONFI_DETECTION is set.
Lucas
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Re: [U-Boot] [PATCH] nand: add ID for Micron MT29F8G08A
On 09/27/2012 04:49:31 PM, Lucas Stach wrote:
As found on the Colibri T20 engineering sample board.
Signed-off-by: Lucas Stach
---
drivers/mtd/nand/nand_ids.c | 1 +
1 Datei geändert, 1 Zeile hinzugefügt(+)
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index 3953549..ae300fe 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -105,6 +105,7 @@ const struct nand_flash_dev nand_flash_ids[] = {
{"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
/* 8 Gigabit */
+ {"NAND 1GiB 3,3V 8-bit", 0x38, 0, 1024, 0, LP_OPTIONS},
{"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS},
{"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS},
{"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
--
1.7.11.4
Does this chip support ONFI? If so, we don't use the ID table.
-Scott
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[U-Boot] [PATCH] tegra: add Colibri T20 board support
This adds board support for the Toradex Colibri T20 module.
Working functions:
- MMC boot
- USB boot
- Network
- NAND environment
Signed-off-by: Lucas Stach
CC: Stephen Warren
CC: Tom Warren
---
MAINTAINERS | 4 ++
board/toradex/colibri_t20/Makefile | 38 +++
board/toradex/colibri_t20/colibri_t20.c | 64 +
board/toradex/dts/tegra20-colibri.dts | 39
boards.cfg | 1 +
include/configs/colibri_t20.h | 83 +
6 Dateien geändert, 229 Zeilen hinzugefügt(+)
create mode 100644 board/toradex/colibri_t20/Makefile
create mode 100644 board/toradex/colibri_t20/colibri_t20.c
create mode 100644 board/toradex/dts/tegra20-colibri.dts
create mode 100644 include/configs/colibri_t20.h
diff --git a/MAINTAINERS b/MAINTAINERS
index a00e850..6b3e9a4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -890,6 +890,10 @@ Matt Sealey
Bo Shen
at91sam9x5ekARM926EJS (AT91SAM9G15,G25,G35,X25,X35 SoC)
+Lucas Stach
+
+ colibri_t20 Tegra20 (ARM7 & A9 Dual Core)
+
Nick Thompson
da830evmARM926EJS (DA830/OMAP-L137)
diff --git a/board/toradex/colibri_t20/Makefile
b/board/toradex/colibri_t20/Makefile
new file mode 100644
index 000..b8c61b6
--- /dev/null
+++ b/board/toradex/colibri_t20/Makefile
@@ -0,0 +1,38 @@
+#
+# (C) Copyright 2012 Lucas Stach
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+#
+
+include $(TOPDIR)/config.mk
+
+$(shell mkdir -p $(obj)../../nvidia/common)
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := ../../nvidia/common/board.o
+COBJS += $(BOARD).o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
\ No newline at end of file
diff --git a/board/toradex/colibri_t20/colibri_t20.c
b/board/toradex/colibri_t20/colibri_t20.c
new file mode 100644
index 000..0ad4311
--- /dev/null
+++ b/board/toradex/colibri_t20/colibri_t20.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2010,2011 NVIDIA Corporation
+ * Copyright (C) 2012 Lucas Stach
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#ifdef CONFIG_TEGRA_MMC
+#include
+#endif
+
+#ifdef CONFIG_USB_EHCI_TEGRA
+void pin_mux_usb(void)
+{
+ /* USB 1 aka Tegra USB port 3 */
+ pinmux_tristate_disable(PINGRP_SPIG);
+
+ /* USB 3 aka Tegra USB port 2 */
+ funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
+ pinmux_tristate_disable(PINGRP_UAC);
+ /* ULPI reference clock output */
+ pinmux_set_func(PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
+ pinmux_tristate_disable(PINGRP_CDEV2);
+ /* VBus GPIO */
+ pinmux_tristate_disable(PINGRP_DTE);
+}
+#endif
+
+#ifdef CONFIG_TEGRA_MMC
+int board_mmc_init(bd_t *bd)
+{
+ funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
+ pinmux_tristate_disable(PINGRP_GMB);
+
+ tegra_mmc_init(0, 4, -1, GPIO_PC7);
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_TEGRA_NAND
+void pin_mux_nand(void)
+{
+ funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
+}
+#endif
diff --git a/board/toradex/dts/tegra20-colibri.dts
b/board/toradex/dts/tegra20-colibri.dts
new file mode 100644
index 000..a22cba6
--- /dev/null
+++ b/board/toradex/dts/tegra20-colibri.dts
@@ -0,0 +1,39 @@
+/dts-v1/;
+
+/include/ ARCH_CPU_DTS
+
+/ {
+ model = "Toradex Colibri T20";
+ compatible = "toradex,t20", "nvidia,tegra20";
+
+ aliases {
+ /* This defines the order of our USB ports */
+ usb0 = "/usb@c5008000";
+ usb1 = "/usb@c500";
+ usb2 = "/usb@c500400
[U-Boot] [PATCH 1/2] tegra: clean up board include hell
The prototypes used in board files were all scattered out, which lead to code duplication between SPL and normal U-Boot and some prototypes not actually being used. Consolidate this in a common board header. This will allow to push down the calling of the pinmux functions into the respective drivers and this way cut down on complexity from the common board code. Signed-off-by: Lucas Stach --- arch/arm/cpu/arm720t/tegra-common/board.h | 25 - arch/arm/cpu/arm720t/tegra-common/spl.c | 2 +- arch/arm/cpu/tegra-common/board.c | 1 + arch/arm/include/asm/arch-tegra/board.h | 19 +++- board/nvidia/common/board.c | 1 - board/nvidia/common/board.h | 37 --- board/nvidia/common/uart-spi-switch.c | 2 +- 7 Dateien geändert, 21 Zeilen hinzugefügt(+), 66 Zeilen entfernt(-) delete mode 100644 arch/arm/cpu/arm720t/tegra-common/board.h delete mode 100644 board/nvidia/common/board.h diff --git a/arch/arm/cpu/arm720t/tegra-common/board.h b/arch/arm/cpu/arm720t/tegra-common/board.h deleted file mode 100644 index 260767d..000 --- a/arch/arm/cpu/arm720t/tegra-common/board.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * (C) Copyright 2010-2011 - * NVIDIA Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -void board_init_uart_f(void); -void gpio_early_init_uart(void); diff --git a/arch/arm/cpu/arm720t/tegra-common/spl.c b/arch/arm/cpu/arm720t/tegra-common/spl.c index dfe36b9..0d37ce8 100644 --- a/arch/arm/cpu/arm720t/tegra-common/spl.c +++ b/arch/arm/cpu/arm720t/tegra-common/spl.c @@ -33,13 +33,13 @@ #include #include #include -#include "board.h" #include "cpu.h" #include #include #include #include +#include #include #include #include diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c index ff90a52..b2e10c6 100644 --- a/arch/arm/cpu/tegra-common/board.c +++ b/arch/arm/cpu/tegra-common/board.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/include/asm/arch-tegra/board.h b/arch/arm/include/asm/arch-tegra/board.h index a90d36c..7e56df7 100644 --- a/arch/arm/include/asm/arch-tegra/board.h +++ b/arch/arm/include/asm/arch-tegra/board.h @@ -24,7 +24,24 @@ #ifndef _TEGRA_BOARD_H_ #define _TEGRA_BOARD_H_ -/* Setup UARTs for the board according to the selected config */ +/* Set up pinmux to make UART usable */ +void gpio_config_uart(void); /* CONFIG_SPI_UART_SWITCH */ +void gpio_early_init_uart(void); /*!CONFIG_SPI_UART_SWITCH */ + +/* Set up early UART output */ void board_init_uart_f(void); +/* Set up any early GPIOs the board might need for proper operation */ +void gpio_early_init(void); /* overrideable GPIO config*/ + +/* + * Hooks to allow boards to set up the pinmux for a specific function. + * Has to be implemented in the board files as we don't yet support pinmux + * setup from FTD. If a board file does not implement one of those functions + * an empty stub function will be called. + */ + +void pin_mux_usb(void); /* overrideable USB pinmux setup */ +void pin_mux_spi(void); /* overrideable SPI pinmux setup */ + #endif diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index bd194bc..dc301e7 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -39,7 +39,6 @@ #include #include #include -#include "board.h" #include "emc.h" DECLARE_GLOBAL_DATA_PTR; diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h deleted file mode 100644 index dada4c4..000 --- a/board/nvidia/common/board.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * (C) Copyright 2010,2011 - * NVIDIA Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the
[U-Boot] [PATCH 2/2] tegra: nand: add board pinmux
Boards may require a different pinmux setup for NAND than the default one.
Add a way to call into board specific code to set this up.
Signed-off-by: Lucas Stach
---
arch/arm/include/asm/arch-tegra/board.h | 1 +
drivers/mtd/nand/tegra_nand.c | 11 ++-
2 Dateien geändert, 11 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)
diff --git a/arch/arm/include/asm/arch-tegra/board.h
b/arch/arm/include/asm/arch-tegra/board.h
index 7e56df7..be6bf25 100644
--- a/arch/arm/include/asm/arch-tegra/board.h
+++ b/arch/arm/include/asm/arch-tegra/board.h
@@ -43,5 +43,6 @@ void gpio_early_init(void); /* overrideable GPIO config
*/
void pin_mux_usb(void); /* overrideable USB pinmux setup */
void pin_mux_spi(void); /* overrideable SPI pinmux setup */
+void pin_mux_nand(void); /* overrideable NAND pinmux setup */
#endif
diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c
index 2c1b533..baaea4f 100644
--- a/drivers/mtd/nand/tegra_nand.c
+++ b/drivers/mtd/nand/tegra_nand.c
@@ -28,6 +28,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -992,7 +993,6 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)
/* Adjust timing for NAND device */
setup_timing(config->timing, info->reg);
- funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
fdtdec_setup_gpio(&config->wp_gpio);
gpio_direction_output(config->wp_gpio.gpio, 1);
@@ -1016,10 +1016,19 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)
return 0;
}
+void __pin_mux_nand(void)
+{
+ funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
+}
+
+void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
+
void board_nand_init(void)
{
struct nand_chip *nand = &nand_chip[0];
+ pin_mux_nand();
+
if (tegra_nand_init(nand, 0))
puts("Tegra NAND init failed\n");
}
--
1.7.11.4
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[U-Boot] [PATCH] nand: add ID for Micron MT29F8G08A
As found on the Colibri T20 engineering sample board.
Signed-off-by: Lucas Stach
---
drivers/mtd/nand/nand_ids.c | 1 +
1 Datei geändert, 1 Zeile hinzugefügt(+)
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index 3953549..ae300fe 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -105,6 +105,7 @@ const struct nand_flash_dev nand_flash_ids[] = {
{"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
/* 8 Gigabit */
+ {"NAND 1GiB 3,3V 8-bit",0x38, 0, 1024, 0, LP_OPTIONS},
{"NAND 1GiB 1,8V 8-bit",0xA3, 0, 1024, 0, LP_OPTIONS},
{"NAND 1GiB 3,3V 8-bit",0xD3, 0, 1024, 0, LP_OPTIONS},
{"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
--
1.7.11.4
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Re: [U-Boot] [PATCH 6/7] mx25: Define cpu_eth_init() only if needed
Hi Fabio, On Thursday, September 27, 2012 10:55:22 PM, Fabio Estevam wrote: > Hi Benoît, > > On Thu, Sep 27, 2012 at 5:28 PM, Benoît Thébaudeau > wrote: > > The FEC is the only SoC Ethernet support available on i.MX25, so > > define > > cpu_eth_init() only for it instead of returning a misleading > > success code. > > Yes, but someone may want to use mx25 with a external LAN device > (such > as LAN92xx) instead of FEC. Yes, but in that case I think that there should be a board_eth_init() function defined, so this patch won't cause any trouble here. See in net/eth.c:eth_initialize() how these functions and their default implementations are handled. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] RMII ethernet problems on i.MX6 Solo
On Thu, Sep 27, 2012 at 12:00 PM, Fabio Estevam wrote:
>
> On Thu, Sep 27, 2012 at 3:27 PM, Carolyn Smith wrote:
> > Hello,
> >
> > Has anyone had any success getting RMII ethernet to work on an i.MX6 Solo
> > or DualLite? I am pretty confident I have the IOMUX registers set up
> > properly and the clocking configured and working properly but am not seeing
> > any activity on the TXEN line when trying to transmit a packet.I can access
> > the PHY's registers so I think that means MDC and MDIO must be working.
>
> Which Ethernet PHY are you using and which board?
>
> Can you post your patches in the list for review, so that we can try
> to understand the problem better?
>
> Regards,
>
> Fabio Estevam
It's an SMSC LAN8720A PHY on a custom i.MX6 Solo board. I can't post
all my patches at this point but I could provide register dumps of
anything you think might be relevant.
I did make a change to fec_mxc.c in the fec_open function. I #ifdef'ed
out this section
#ifdef FEC_QUIRK_ENET_MAC
{
u32 ecr = readl(&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED;
u32 rcr = (readl(&fec->eth->r_cntrl) &
~(FEC_RCNTRL_RMII | FEC_RCNTRL_RMII_10T)) |
FEC_RCNTRL_RGMII | FEC_RCNTRL_MII_MODE;
if (speed == _1000BASET)
ecr |= FEC_ECNTRL_SPEED;
else if (speed != _100BASET)
rcr |= FEC_RCNTRL_RMII_10T;
writel(ecr, &fec->eth->ecntrl);
writel(rcr, &fec->eth->r_cntrl);
}
#endif
Since it seems to put the ENET_RCR register into RGMII mode which is
not what I am using. I have ENET_RCR set to 0x05ee0124.
Thanks,
Carolyn
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Re: [U-Boot] [PATCH v2 01/19] Add gpio_request() to asm-generic header
Hi Anatolij, On Fri, Sep 21, 2012 at 12:30 PM, Anatolij Gustschin wrote: > Hi Simon, > > On Wed, 13 Jun 2012 09:19:37 -0700 > Simon Glass wrote: > >> This function should also be part of the GPIO API, so add it. >> >> Signed-off-by: Simon Glass >> --- >> >> include/asm-generic/gpio.h |9 + >> 1 files changed, 9 insertions(+), 0 deletions(-) > > Applied to staging/ag...@denx.de. Thanks. I'm sorry to say that another patch has already done this (and done a better job). It isn't particularly important, but you could revert this since the code already exists at the top of the file. Sorry I didn't spot this earlier - I think the patch was on the mailing list but not merged. Regards, Simon > > Thanks, > Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] Tegra20: Move some include files to arch-tegra for sharing with Tegra30
On Fri, Sep 21, 2012 at 1:42 PM, Tom Warren wrote: > The move is pretty straight-forward. ap20.h and tegra20.h were renamed to > ap.h and tegra.h. > Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with > #defines & structs > that will be common between T20 and T30 HW. HW-specific #defines, etc. stay > in the 'arch-tegra20' > 'root' file. > > All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard > works OK. > > Signed-off-by: Tom Warren Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] Tegra20: Move some code files to common directories for upcoming Tegra30 patches.
Hi Tom, On Fri, Sep 21, 2012 at 1:42 PM, Tom Warren wrote: > Move files that are going to be common between T20 and T30 into 'tegra-common' > subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any > files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs > and modified for that SoC. The 'common' files should need only minor changes. > > Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a > follow-on patch. > > Builds fine w/MAKEALL -s tegra20. Checkpatch.pl is clean. > > Signed-off-by: Tom Warren This looks great! I will rebase the LCD patches on top of it. Acked-by: Simon Glass Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/7] mx25: Define cpu_eth_init() only if needed
Hi Benoît, On Thu, Sep 27, 2012 at 5:28 PM, Benoît Thébaudeau wrote: > The FEC is the only SoC Ethernet support available on i.MX25, so define > cpu_eth_init() only for it instead of returning a misleading success code. Yes, but someone may want to use mx25 with a external LAN device (such as LAN92xx) instead of FEC. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 05/14] mx51: Fix USB PHY clocks
Dear Benoît Thébaudeau, > The i.MX51 has a single USB PHY clock, while the i.MX53 has two. These 3 > clocks have different clock gate control bit-fields. > > The existing code was correct only for i.MX53, so this patch fixes the > i.MX51 use case. > > Signed-off-by: Benoît Thébaudeau > Cc: Stefano Babic > Cc: Marek Vasut > Cc: Jana Rapava > Cc: Wolfgang Grandegger > Cc: Igor Grinberg Sweet find :-) Reviewed-by: Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 6/8] fdt: cmd_fdt: Call fdt_chosen() from "fdt boardsetup"
On Thu, Sep 27, 2012 at 3:28 PM, Kumar Gala wrote: > > On Sep 26, 2012, at 9:20 AM, Stefan Roese wrote: > >> Hi Kumar, >> >> On 09/26/2012 03:36 PM, Kumar Gala wrote: By calling fdt_chosen(), the chosen node will be updated / created by the "fdt boardsetup" command. This is useful for setting of the kernel commandline via the "bootargs" env variable. With this change, the "fdt boardsetup" can be used to prepare the DT blob for SPL booting. The patched DT blob can be saved to flash and can be used by the SPL U-Boot version directly for Linux booting. Signed-off-by: Stefan Roese --- common/cmd_fdt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) >>> >>> There are possibly some workflows this breaks. I can't remember >>> if for AMP boot we need to do something between ft_board_setup() >>> and fdt_chosen() >> >> Could you please elaborate what exactly you fear here? Is this a NACK >> for this patch? > > Possibly. I've got to find our docs on how we do 2-core AMP booting sequence > w/regards to device tree. See if this works: http://www.freescale.com/infocenter/index.jsp?topic=%2FQORIQSDK%2F2151493.html -M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 6/8] fdt: cmd_fdt: Call fdt_chosen() from "fdt boardsetup"
On Sep 26, 2012, at 9:20 AM, Stefan Roese wrote: > Hi Kumar, > > On 09/26/2012 03:36 PM, Kumar Gala wrote: >>> By calling fdt_chosen(), the chosen node will be updated / >>> created by the "fdt boardsetup" command. This is useful for >>> setting of the kernel commandline via the "bootargs" >>> env variable. >>> >>> With this change, the "fdt boardsetup" can be used to prepare >>> the DT blob for SPL booting. The patched DT blob can be saved >>> to flash and can be used by the SPL U-Boot version directly >>> for Linux booting. >>> >>> Signed-off-by: Stefan Roese >>> --- >>> >>> common/cmd_fdt.c | 4 +++- >>> 1 file changed, 3 insertions(+), 1 deletion(-) >> >> There are possibly some workflows this breaks. I can't remember >> if for AMP boot we need to do something between ft_board_setup() >> and fdt_chosen() > > Could you please elaborate what exactly you fear here? Is this a NACK > for this patch? Possibly. I've got to find our docs on how we do 2-core AMP booting sequence w/regards to device tree. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 06/18] tegra: fdt: Add LCD definitions for Tegra
Hi Stephen, On Thu, Sep 27, 2012 at 8:49 AM, Stephen Warren wrote: > On 09/27/2012 07:58 AM, Simon Glass wrote: >> Hi Stephen, >> >> On Tue, Jul 31, 2012 at 9:12 AM, Stephen Warren >> wrote: >>> On 07/31/2012 03:27 AM, Simon Glass wrote: On Thu, Jul 12, 2012 at 4:25 PM, Simon Glass wrote: > Add LCD definitions and also a proposed binding for LCD displays. > > The PWM is as per what will likely be committed to linux-next soon. > > The displaymode binding comes from a proposal here: > > http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html > > The panel binding is new, and fills a need to specify the panel > timings and other tegra-specific information. Should a binding appear > that allows the pwm to handle this automatically, we can revisit > this. Any comments on this binding please? The main addition from Thierry's one posted on LMKL is the LCD resolution selection. >>> >>> I have some concerns about the way the mode is represented in the >>> binding; the timing parameters are quite different to how e.g. an EDID >>> DTD would represent them, which I think will lead to conversion mistakes >>> when writing the DT. >>> >>> I'm trying to get along of Sascha's original email so I can join in on >>> that discussion. >> >> Did you get any resolution here? > > I think an updated version of those patches was published. > > diff --git a/doc/device-tree-bindings/video/tegra20-dc.txt > b/doc/device-tree-bindings/video/tegra20-dc.txt >>> > +Optional properties (rgb): > + - nvidia,frame-buffer: address of frame buffer (if omitted it will be > + calculated) > + - This may be useful to share an address between U-Boot and Linux > and > + avoid boot-time corruption / flicker >>> >>> Why can't the display driver read this out of the display registers, >>> instead of requiring the same information to be passed using DT too? >> >> The U-Boot display driver needs to set this value in the display >> registers - at reset I don't think we can rely on any particular >> value. >> >> Do you mean the kernel display driver? > > Yes. > >> Well it could, but it doesn't. > > Well, there is no display driver in the upstream kernel at the moment, > so it's not possible to make assertions about what it does or not. > > Any downstream kernels aren't relevant, since their DT bindings and/or > behaviour have not been through public review. OK, but typically the kernel selects its own address for the display. It might be quite hard for the kernel to use the one defined by U-Boot. > >> Really this is just a way of getting U-Boot and Linux to agree on the >> address, by having U-Boot know the address that the kernel will happen >> to use. It isn't very robust, but we have found it useful as a means >> of avoiding problems in this area. > > Right, but again, why can't the display driver simply read the address > out of the register; why is there a need to duplicate the data? > > I guess one possibility is that the register only gives the base address > and not the size/mode of the allocated surface, but I don't recall if > this proposed binding did that either? So here is my explanation: 1. U-Boot would normally put the display right near the top of memory. Instead, it figures out where the kernel will put it (somehow this seems to often be at a fixed address) and uses that address. 2. That means that U-Boot will now have the display exactly where the kernel wants it. 3. When U-Boot boots the kernel, it leaves the display running, knowing that the kernel will not overwrite the frame buffer with its own code / data. 4. The effect is that there is a seamless display transition from U-Boot to the kernel. Note this is only a hint - it can be omitted i.w.c. it isn't used. So what do you think? Should we remove this entirely, or is it a useful hack? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
Cc: Eric Bénard
Cc: Otavio Salvador
Cc: Fabio Estevam
Cc: Jason Liu
Cc: Matt Sealey
Cc: Andy Fleming
---
This patch should be applied after (series of series...):
http://patchwork.ozlabs.org/patch/187467/
http://patchwork.ozlabs.org/patch/187468/
http://patchwork.ozlabs.org/patch/187475/
.../board/esg/ima3-mx53/ima3-mx53.c|1 +
.../board/freescale/mx35pdk/mx35pdk.c |2 ++
.../board/freescale/mx51evk/mx51evk.c |4
.../board/freescale/mx53ard/mx53ard.c |4
.../board/freescale/mx53evk/mx53evk.c |4
.../board/freescale/mx53loco/mx53loco.c|3 +++
.../board/freescale/mx53smd/mx53smd.c |3 +++
.../board/freescale/mx6qarm2/mx6qarm2.c|4
.../board/freescale/mx6qsabrelite/mx6qsabrelite.c |3 +++
.../board/genesi/mx51_efikamx/efikamx.c|4
.../board/ttcontrol/vision2/vision2.c |2 ++
.../drivers/mmc/fsl_esdhc.c|5 +++--
.../include/fsl_esdhc.h|1 +
13 files changed, 38 insertions(+), 2 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/board/esg/ima3-mx53/ima3-mx53.c
u-boot-imx-e1eb75b/board/esg/ima3-mx53/ima3-mx53.c
index e947330..41d6bb6 100644
--- u-boot-imx-e1eb75b.orig/board/esg/ima3-mx53/ima3-mx53.c
+++ u-boot-imx-e1eb75b/board/esg/ima3-mx53/ima3-mx53.c
@@ -217,6 +217,7 @@ int board_mmc_init(bd_t *bis)
PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_PULL |
PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU);
+ esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
return fsl_esdhc_initialize(bis, &esdhc_cfg);
}
#endif
diff --git u-boot-imx-e1eb75b.orig/board/freescale/mx35pdk/mx35pdk.c
u-boot-imx-e1eb75b/board/freescale/mx35pdk/mx35pdk.c
index 7cb6b30..a12531f 100644
--- u-boot-imx-e1eb75b.orig/board/freescale/mx35pdk/mx35pdk.c
+++ u-boot-imx-e1eb75b/board/freescale/mx35pdk/mx35pdk.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -292,6 +293,7 @@ int board_mmc_init(bd_t *bis)
mxc_request_iomux(MX35_PIN_SD1_DATA2, MUX_CONFIG_FUNC);
mxc_request_iomux(MX35_PIN_SD1_DATA3, MUX_CONFIG_FUNC);
+ esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
return fsl_esdhc_initialize(bis, &esdhc_cfg);
}
diff --git u-boot-imx-e1eb75b.orig/board/freescale/mx51evk/mx51evk.c
u-boot-imx-e1eb75b/board/freescale/mx51evk/mx51evk.c
index a94701c..3412952 100644
--- u-boot-imx-e1eb75b.orig/board/freescale/mx51evk/mx51evk.c
+++ u-boot-imx-e1eb75b/board/freescale/mx51evk/mx51evk.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -358,6 +359,9 @@ int board_mmc_init(bd_t *bis)
u32 index;
s32 status = 0;
+ esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+
for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM;
index++) {
switch (index) {
diff --git u-boot-imx-e1eb75b.orig/board/freescale/mx53ard/mx53ard.c
u-boot-imx-e1eb75b/board/freescale/mx53ard/mx53ard.c
index 08c7795..2fc8570 100644
--- u-boot-imx-e1eb75b.orig/board/freescale/mx53ard/mx53ard.c
+++ u-boot-imx-e1eb75b/board/freescale/mx53ard/mx53ard.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -106,6 +107,9 @@ int board_mmc_init(bd_t *bis)
u32 index;
s32 status = 0;
+ esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+
for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
switch (index) {
case 0:
diff --git u-boot-imx-e1eb75b.orig/board/freescale/mx53evk/mx53evk.c
u-boot-imx-e1eb75b/board/freescale/mx53evk/mx53evk.c
index b11a94c..bb4621d 100644
--- u-boot-imx-e1eb75b.orig/board/freescale/mx53evk/mx53evk.c
+++ u-boot-imx-e1eb75b/board/freescale/mx53evk/mx53evk.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -232,6 +233,9 @@ int board_mmc_init(bd_t *bis)
u32 index;
s32 status = 0;
+ esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+
for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
switch (index) {
case 0:
diff --git u-boot-imx-e1eb75b.orig/board/freescale/mx53loco/mx53loco.c
u-boot-imx-e1eb75b/board/freesca
[U-Boot] [PATCH 7/7] mx25: Fix eSDHC support
The MMC driver appropriate for the i.MX25 is fsl_esdhc, which has nothing to do
with mxcmmc.
Also, each eSDHC instance has a dedicated clock, so gd->sdhc_clk must be set
accordingly. This is good for the case only a single SDHC instance is used
(initialization made with fsl_esdhc_mmc_init()). A future patch will fix the
multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
Cc: Eric Bénard
Cc: Otavio Salvador
---
.../arch/arm/cpu/arm926ejs/mx25/generic.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 6374248..af81b33 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -29,11 +29,10 @@
#include
#include
#include
-#ifdef CONFIG_MXC_MMC
-#include
-#endif
#ifdef CONFIG_FSL_ESDHC
+#include
+
DECLARE_GLOBAL_DATA_PTR;
#endif
@@ -226,23 +225,25 @@ int cpu_eth_init(bd_t *bis)
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+#if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+#else
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+#endif
#endif
return 0;
}
+#ifdef CONFIG_FSL_ESDHC
/*
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
int cpu_mmc_init(bd_t *bis)
{
-#ifdef CONFIG_MXC_MMC
- return mxc_mmc_init(bis);
-#else
- return 0;
-#endif
+ return fsl_esdhc_mmc_init(bis);
}
+#endif
#ifdef CONFIG_MXC_UART
void mx25_uart1_init_pins(void)
___
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[U-Boot] [PATCH 6/7] mx25: Define cpu_eth_init() only if needed
The FEC is the only SoC Ethernet support available on i.MX25, so define
cpu_eth_init() only for it instead of returning a misleading success code.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
.../arch/arm/cpu/arm926ejs/mx25/generic.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 5da2582..6374248 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -206,9 +206,13 @@ void enable_caches(void)
#endif
}
+#if defined(CONFIG_FEC_MXC)
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
int cpu_eth_init(bd_t *bis)
{
-#if defined(CONFIG_FEC_MXC)
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong val;
@@ -216,10 +220,8 @@ int cpu_eth_init(bd_t *bis)
val |= (1 << 23);
writel(val, &ccm->cgr0);
return fecmxc_initialize(bis);
-#else
- return 0;
-#endif
}
+#endif
int get_clocks(void)
{
___
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[U-Boot] [PATCH 5/7] mx25: Clean up clocks API
Use the standard mxc_get_clock() instead of exporting internal functions and
using literal constant values.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
.../arch/arm/cpu/arm926ejs/mx25/generic.c |6 +++---
.../arch/arm/include/asm/arch-mx25/clock.h |9 +++--
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 5879b18..5da2582 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -72,7 +72,7 @@ static ulong imx_get_mpllclk(void)
return imx_decode_pll(readl(&ccm->mpctl), fref);
}
-ulong imx_get_armclk(void)
+static ulong imx_get_armclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong cctl = readl(&ccm->cctl);
@@ -88,7 +88,7 @@ ulong imx_get_armclk(void)
return fref / div;
}
-ulong imx_get_ahbclk(void)
+static ulong imx_get_ahbclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong cctl = readl(&ccm->cctl);
@@ -106,7 +106,7 @@ static ulong imx_get_ipgclk(void)
return imx_get_ahbclk() / 2;
}
-ulong imx_get_perclk(int clk)
+static ulong imx_get_perclk(int clk)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = imx_get_ahbclk();
diff --git u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx25/clock.h
u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx25/clock.h
index a532da5..efbe038 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx25/clock.h
+++ u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx25/clock.h
@@ -67,12 +67,9 @@ enum mxc_clock {
MXC_CLK_NUM
};
-ulong imx_get_perclk(int clk);
-ulong imx_get_ahbclk(void);
-
-#define imx_get_uartclk() imx_get_perclk(15)
-#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
-
unsigned int mxc_get_clock(enum mxc_clock clk);
+#define imx_get_uartclk() mxc_get_clock(MXC_UART_CLK)
+#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
+
#endif /* __ASM_ARCH_CLOCK_H */
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[U-Boot] [PATCH 4/7] mx25 clocks: Fix MXC_FEC_CLK
mxc_get_clock(MXC_FEC_CLK) should return the IPG clock, not the AHB clock. Also, imx_get_fecclk() was correct but reimplemented the calculation of the IPG clock, so remove the duplicated code. Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic --- .../arch/arm/cpu/arm926ejs/mx25/generic.c |3 +-- .../arch/arm/include/asm/arch-mx25/clock.h |2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c index 219c9eb..5879b18 100644 --- u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c +++ u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -129,9 +129,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return imx_get_ahbclk(); case MXC_IPG_CLK: case MXC_CSPI_CLK: - return imx_get_ipgclk(); case MXC_FEC_CLK: - return imx_get_ahbclk(); + return imx_get_ipgclk(); default: return imx_get_perclk(clk); } diff --git u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx25/clock.h u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx25/clock.h index 9823f46..a532da5 100644 --- u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx25/clock.h +++ u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx25/clock.h @@ -71,7 +71,7 @@ ulong imx_get_perclk(int clk); ulong imx_get_ahbclk(void); #define imx_get_uartclk() imx_get_perclk(15) -#define imx_get_fecclk() (imx_get_ahbclk()/2) +#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK) unsigned int mxc_get_clock(enum mxc_clock clk); ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/7] mx25: Define more standard clocks
Define AHB, IPG and CSPI clocks.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
.../arch/arm/cpu/arm926ejs/mx25/generic.c | 10 ++
.../arch/arm/include/asm/arch-mx25/clock.h |5 +
2 files changed, 15 insertions(+)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 5503522..219c9eb 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -101,6 +101,11 @@ ulong imx_get_ahbclk(void)
return fref / div;
}
+static ulong imx_get_ipgclk(void)
+{
+ return imx_get_ahbclk() / 2;
+}
+
ulong imx_get_perclk(int clk)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
@@ -120,6 +125,11 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_ARM_CLK:
return imx_get_armclk();
+ case MXC_AHB_CLK:
+ return imx_get_ahbclk();
+ case MXC_IPG_CLK:
+ case MXC_CSPI_CLK:
+ return imx_get_ipgclk();
case MXC_FEC_CLK:
return imx_get_ahbclk();
default:
diff --git u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx25/clock.h
u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx25/clock.h
index a313b80..9823f46 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx25/clock.h
+++ u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx25/clock.h
@@ -41,6 +41,7 @@
#endif
enum mxc_clock {
+ /* PER clocks (do not change order) */
MXC_CSI_CLK,
MXC_EPIT_CLK,
MXC_ESAI_CLK,
@@ -57,7 +58,11 @@ enum mxc_clock {
MXC_SSI1_CLK,
MXC_SSI2_CLK,
MXC_UART_CLK,
+ /* Other clocks */
MXC_ARM_CLK,
+ MXC_AHB_CLK,
+ MXC_IPG_CLK,
+ MXC_CSPI_CLK,
MXC_FEC_CLK,
MXC_CLK_NUM
};
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[U-Boot] [PATCH 2/7] mx25: Clean up clock calculations
Avoid possible overflow in clock calculations, and do not waste calls to lldiv() to divide simple ulongs. Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic --- .../arch/arm/cpu/arm926ejs/mx25/generic.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c index 2283a89..5503522 100644 --- u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c +++ u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -80,12 +80,12 @@ ulong imx_get_armclk(void) ulong div; if (cctl & CCM_CCTL_ARM_SRC) - fref = lldiv((fref * 3), 4); + fref = lldiv((u64) fref * 3, 4); div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT) & CCM_CCTL_ARM_DIV_MASK) + 1; - return lldiv(fref, div); + return fref / div; } ulong imx_get_ahbclk(void) @@ -98,7 +98,7 @@ ulong imx_get_ahbclk(void) div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT) & CCM_CCTL_AHB_DIV_MASK) + 1; - return lldiv(fref, div); + return fref / div; } ulong imx_get_perclk(int clk) @@ -110,7 +110,7 @@ ulong imx_get_perclk(int clk) div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]); div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1; - return lldiv(fref, div); + return fref / div; } unsigned int mxc_get_clock(enum mxc_clock clk) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/7] mx25: Fix decode_pll
The MFN bit-field of the PLL registers represents a signed value. See the
reference manual.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
.../arch/arm/cpu/arm926ejs/mx25/generic.c |9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 90e584a..2283a89 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -48,7 +48,7 @@ static unsigned int imx_decode_pll(unsigned int pll, unsigned
int f_ref)
{
unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT)
& CCM_PLL_MFI_MASK;
- unsigned int mfn = (pll >> CCM_PLL_MFN_SHIFT)
+ int mfn = (pll >> CCM_PLL_MFN_SHIFT)
& CCM_PLL_MFN_MASK;
unsigned int mfd = (pll >> CCM_PLL_MFD_SHIFT)
& CCM_PLL_MFD_MASK;
@@ -56,9 +56,12 @@ static unsigned int imx_decode_pll(unsigned int pll,
unsigned int f_ref)
& CCM_PLL_PD_MASK;
mfi = mfi <= 5 ? 5 : mfi;
+ mfn = mfn >= 512 ? mfn - 1024 : mfn;
+ mfd += 1;
+ pd += 1;
- return lldiv(2 * (u64) f_ref * (mfi * (mfd + 1) + mfn),
- (mfd + 1) * (pd + 1));
+ return lldiv(2 * (u64) f_ref * (mfi * mfd + mfn),
+mfd * pd);
}
static ulong imx_get_mpllclk(void)
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[U-Boot] [PATCH v2] mx35: Fix eSDHC clocks
Each eSDHC instance has a dedicated clock.
gd->sdhc_clk must also be set accordingly. This is good for the case only a
single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A
future patch will fix the multi-instance use case (initialization made directly
with fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
Cc: Eric Bénard
Cc: Otavio Salvador
---
This patch supersedes http://patchwork.ozlabs.org/patch/177438/ .
Changes for v2:
- Improve detailed description.
- Make eSDHC1 the default for gd->sdhc_clk.
.../arch/arm/cpu/arm1136/mx35/generic.c| 14 --
.../arch/arm/include/asm/arch-mx35/clock.h |4 +++-
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm1136/mx35/generic.c
u-boot-imx-e1eb75b/arch/arm/cpu/arm1136/mx35/generic.c
index ef65176..75c25d4 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/arm1136/mx35/generic.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/arm1136/mx35/generic.c
@@ -360,8 +360,12 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
return get_ipg_per_clk();
case MXC_UART_CLK:
return imx_get_uartclk();
- case MXC_ESDHC_CLK:
+ case MXC_ESDHC1_CLK:
return mxc_get_peri_clock(ESDHC1_CLK);
+ case MXC_ESDHC2_CLK:
+ return mxc_get_peri_clock(ESDHC2_CLK);
+ case MXC_ESDHC3_CLK:
+ return mxc_get_peri_clock(ESDHC3_CLK);
case MXC_USB_CLK:
return mxc_get_main_clock(USB_CLK);
case MXC_FEC_CLK:
@@ -471,7 +475,13 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+#else
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+#endif
#endif
return 0;
}
diff --git u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx35/clock.h
u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx35/clock.h
index eb7458a..60285df 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx35/clock.h
+++ u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx35/clock.h
@@ -44,7 +44,9 @@ enum mxc_clock {
MXC_IPG_CLK,
MXC_IPG_PERCLK,
MXC_UART_CLK,
- MXC_ESDHC_CLK,
+ MXC_ESDHC1_CLK,
+ MXC_ESDHC2_CLK,
+ MXC_ESDHC3_CLK,
MXC_USB_CLK,
MXC_CSPI_CLK,
MXC_FEC_CLK,
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[U-Boot] [PATCH v2 14/14] mx5/6 clocks: Fix SDHC clocks
The i.MX5 eSDHC clocks were considered as coming from the IPG clock although
they have dedicated clock paths.
Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must
be set accordingly. This is good for the case only a single SDHC instance is
used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix
the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
Cc: Eric Bénard
Cc: Otavio Salvador
---
This patch supersedes http://patchwork.ozlabs.org/patch/177410/ .
Changes for v2:
- Consequences from the previous cleanup patches.
- Add detailed description.
- Differentiate SDHC instances for gd->sdhc_clk.
.../arch/arm/cpu/armv7/mx5/clock.c | 46
.../arch/arm/imx-common/speed.c| 18 +++-
.../arch/arm/include/asm/arch-mx5/clock.h |4 ++
3 files changed, 67 insertions(+), 1 deletion(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
index 3a60f8b..25362dc 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
@@ -389,6 +389,44 @@ static u32 imx_get_cspiclk(void)
return ret_val;
}
+/*
+ * get esdhc clock rate.
+ */
+static u32 get_esdhc_clk(u32 port)
+{
+ u32 clk_sel = 0, pred = 0, podf = 0, freq = 0;
+ u32 cscmr1 = readl(&mxc_ccm->cscmr1);
+ u32 cscdr1 = readl(&mxc_ccm->cscdr1);
+
+ switch (port) {
+ case 0:
+ clk_sel = MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_RD(cscmr1);
+ pred = MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_RD(cscdr1);
+ podf = MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_RD(cscdr1);
+ break;
+ case 1:
+ clk_sel = MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_RD(cscmr1);
+ pred = MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_RD(cscdr1);
+ podf = MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_RD(cscdr1);
+ break;
+ case 2:
+ if (cscmr1 & MXC_CCM_CSCMR1_ESDHC3_CLK_SEL)
+ return get_esdhc_clk(1);
+ else
+ return get_esdhc_clk(0);
+ case 3:
+ if (cscmr1 & MXC_CCM_CSCMR1_ESDHC4_CLK_SEL)
+ return get_esdhc_clk(1);
+ else
+ return get_esdhc_clk(0);
+ default:
+ break;
+ }
+
+ freq = get_standard_pll_sel_clk(clk_sel) / ((pred + 1) * (podf + 1));
+ return freq;
+}
+
static u32 get_axi_a_clk(void)
{
u32 cbcdr = readl(&mxc_ccm->cbcdr);
@@ -471,6 +509,14 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
return get_uart_clk();
case MXC_CSPI_CLK:
return imx_get_cspiclk();
+ case MXC_ESDHC_CLK:
+ return get_esdhc_clk(0);
+ case MXC_ESDHC2_CLK:
+ return get_esdhc_clk(1);
+ case MXC_ESDHC3_CLK:
+ return get_esdhc_clk(2);
+ case MXC_ESDHC4_CLK:
+ return get_esdhc_clk(3);
case MXC_FEC_CLK:
return get_ipg_clk();
case MXC_SATA_CLK:
diff --git u-boot-imx-e1eb75b.orig/arch/arm/imx-common/speed.c
u-boot-imx-e1eb75b/arch/arm/imx-common/speed.c
index 80989c4..fbf4de3 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/imx-common/speed.c
+++ u-boot-imx-e1eb75b/arch/arm/imx-common/speed.c
@@ -36,9 +36,25 @@ int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
#ifdef CONFIG_FSL_USDHC
+#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+#else
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+#endif
+#else
+#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
#else
- gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK);
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+#endif
#endif
#endif
return 0;
diff --git u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx5/clock.h
u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx5/clock.h
index e4ca417..fe0d168 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/include/asm/arch-mx5/clock.h
+++ u-boot-imx-e1eb75b/arch/arm/include/asm/arch-mx5/clock.h
@@ -45,6 +45,10 @@ enum mxc_clock {
MXC_IPG_PERCLK,
MXC_UART_CLK,
MXC_CSPI_CLK,
+ MXC_ESDHC_CLK,
+ MXC_ESDHC2_CLK,
+ MXC_ESDHC3_CLK,
+ MXC_ESDHC4_CLK,
MXC_F
[U-Boot] [PATCH v2 13/14] mx51: Fix I2C clock ID check
There are only 2 I²C instances on i.MX51, but 3 on i.MX53.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
Changes for v2:
- New patch.
.../arch/arm/cpu/armv7/mx5/clock.c |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
index 32dbece..3a60f8b 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
@@ -111,12 +111,16 @@ void enable_usboh3_clk(unsigned char enable)
}
#ifdef CONFIG_I2C_MXC
-/* i2c_num can be from 0 - 2 */
+/* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
u32 mask;
+#if defined(CONFIG_MX51)
+ if (i2c_num > 1)
+#elif defined(CONFIG_MX53)
if (i2c_num > 2)
+#endif
return -EINVAL;
mask = MXC_CCM_CCGR_CG_MASK <<
(MXC_CCM_CCGR1_I2C1_OFFSET + (i2c_num << 1));
___
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[U-Boot] [PATCH v2 12/14] mx5 clocks: Fix MXC_FEC_CLK
The FEC clock does not come from PLL1, but from the IPG clock. The previous code
was even inconsistent with itself, returning the IPG clock as expected for
imx_get_fecclk(), but the PLL1 clock for mxc_get_clock(MXC_FEC_CLK).
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
This patch supersedes http://patchwork.ozlabs.org/patch/177411/ .
Changes for v2:
- Consequences from the previous cleanup patches.
- Add detailed description.
.../arch/arm/cpu/armv7/mx5/clock.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
index 232d7c8..32dbece 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
@@ -468,7 +468,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_CSPI_CLK:
return imx_get_cspiclk();
case MXC_FEC_CLK:
- return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
+ return get_ipg_clk();
case MXC_SATA_CLK:
return get_ahb_clk();
case MXC_DDR_CLK:
@@ -484,10 +484,9 @@ u32 imx_get_uartclk(void)
return get_uart_clk();
}
-
u32 imx_get_fecclk(void)
{
- return mxc_get_clock(MXC_IPG_CLK);
+ return get_ipg_clk();
}
static int gcd(int m, int n)
___
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[U-Boot] [PATCH v2 11/14] mx5 clocks: Simplify imx_get_cspiclk()
The code handling the dividers was duplicated for each possible input clock, and
this function can benefit from the newly introduced get_standard_pll_sel_clk()
function instead of duplicating this mux handling code.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
This patch supersedes http://patchwork.ozlabs.org/patch/177409/ .
Changes for v2:
- Consequences from the previous cleanup patches.
- Add detailed description.
.../arch/arm/cpu/armv7/mx5/clock.c | 23 +++-
1 file changed, 3 insertions(+), 20 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
index 40de128..232d7c8 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
@@ -373,32 +373,15 @@ static u32 get_uart_clk(void)
*/
static u32 imx_get_cspiclk(void)
{
- u32 ret_val = 0, pdf, pre_pdf, clk_sel;
+ u32 ret_val = 0, pdf, pre_pdf, clk_sel, freq;
u32 cscmr1 = readl(&mxc_ccm->cscmr1);
u32 cscdr2 = readl(&mxc_ccm->cscdr2);
pre_pdf = MXC_CCM_CSCDR2_CSPI_CLK_PRED_RD(cscdr2);
pdf = MXC_CCM_CSCDR2_CSPI_CLK_PODF_RD(cscdr2);
clk_sel = MXC_CCM_CSCMR1_CSPI_CLK_SEL_RD(cscmr1);
-
- switch (clk_sel) {
- case 0:
- ret_val = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK) /
- ((pre_pdf + 1) * (pdf + 1));
- break;
- case 1:
- ret_val = decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK) /
- ((pre_pdf + 1) * (pdf + 1));
- break;
- case 2:
- ret_val = decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK) /
- ((pre_pdf + 1) * (pdf + 1));
- break;
- default:
- ret_val = get_lp_apm() / ((pre_pdf + 1) * (pdf + 1));
- break;
- }
-
+ freq = get_standard_pll_sel_clk(clk_sel);
+ ret_val = freq / ((pre_pdf + 1) * (pdf + 1));
return ret_val;
}
___
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[U-Boot] [PATCH v2 10/14] mx5 clocks: Fix get_uart_clk()
This function returned 6650 instead of the correct lp_apm clock frequency if
the CCM.CSCMR1.uart_clk_sel mux is set to 3.
This patch fixes this issue by introducing the get_standard_pll_sel_clk()
function that will be used by future patches to handle identical muxes used by
many other clocks.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
This patch supersedes http://patchwork.ozlabs.org/patch/177408/ .
Changes for v2:
- Consequences from the previous cleanup patches.
- Add detailed description.
.../arch/arm/cpu/armv7/mx5/clock.c | 36 +---
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
index c7a3c36..40de128 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
@@ -326,28 +326,40 @@ static u32 get_ipg_per_clk(void)
return freq / ((pred1 + 1) * (pred2 + 1) * (podf + 1));
}
-/*
- * Get the rate of uart clk.
- */
-static u32 get_uart_clk(void)
+/* Get the output clock rate of a standard PLL MUX for peripherals. */
+static u32 get_standard_pll_sel_clk(u32 clk_sel)
{
- unsigned int freq, reg, pred, podf;
+ u32 freq;
- reg = readl(&mxc_ccm->cscmr1);
- switch (MXC_CCM_CSCMR1_UART_CLK_SEL_RD(reg)) {
- case 0x0:
+ switch (clk_sel & 0x3) {
+ case 0:
freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
break;
- case 0x1:
+ case 1:
freq = decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK);
break;
- case 0x2:
+ case 2:
freq = decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK);
break;
- default:
- return 6650;
+ case 3:
+ freq = get_lp_apm();
+ break;
}
+ return freq;
+}
+
+/*
+ * Get the rate of uart clk.
+ */
+static u32 get_uart_clk(void)
+{
+ unsigned int clk_sel, freq, reg, pred, podf;
+
+ reg = readl(&mxc_ccm->cscmr1);
+ clk_sel = MXC_CCM_CSCMR1_UART_CLK_SEL_RD(reg);
+ freq = get_standard_pll_sel_clk(clk_sel);
+
reg = readl(&mxc_ccm->cscdr1);
pred = MXC_CCM_CSCDR1_UART_CLK_PRED_RD(reg);
podf = MXC_CCM_CSCDR1_UART_CLK_PODF_RD(reg);
___
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[U-Boot] [PATCH v2 09/14] mx5 clocks: Fix get_ipg_per_clk()
This fixes the "IPG PERCLK" frequency printed by the clocks command. The issue
was that get_ipg_per_clk() used periph_clk instead of lp_apm in the case
CCM.CBCMR.perclk_lp_apm_sel is set.
It also fixes I²C support.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
This patch supersedes http://patchwork.ozlabs.org/patch/177407/ .
Changes for v2:
- Consequences from the previous cleanup patches.
- Improve detailed description.
.../arch/arm/cpu/armv7/mx5/clock.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
index b155214..c7a3c36 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
@@ -310,16 +310,20 @@ static u32 get_ipg_clk(void)
*/
static u32 get_ipg_per_clk(void)
{
- u32 pred1, pred2, podf;
+ u32 freq, pred1, pred2, podf;
if (readl(&mxc_ccm->cbcmr) & MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL)
return get_ipg_clk();
- /* Fixme: not handle what about lpm*/
+
+ if (readl(&mxc_ccm->cbcmr) & MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL)
+ freq = get_lp_apm();
+ else
+ freq = get_periph_clk();
podf = readl(&mxc_ccm->cbcdr);
pred1 = MXC_CCM_CBCDR_PERCLK_PRED1_RD(podf);
pred2 = MXC_CCM_CBCDR_PERCLK_PRED2_RD(podf);
podf = MXC_CCM_CBCDR_PERCLK_PODF_RD(podf);
- return get_periph_clk() / ((pred1 + 1) * (pred2 + 1) * (podf + 1));
+ return freq / ((pred1 + 1) * (pred2 + 1) * (podf + 1));
}
/*
___
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[U-Boot] [PATCH v2 08/14] mx5 clocks: Fix get_periph_clk()
In the case periph_clk comes from periph_apm_clk, the latter is selected by the
CCM.CBCMR.periph_apm_sel mux, which can source the lp_apm clock from its
input ♯2. get_periph_clk() returned 0 instead of the lp_apm clock frequency in
this case.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
This patch supersedes http://patchwork.ozlabs.org/patch/177406/ .
Changes for v2:
- Consequences from the previous cleanup patches.
- Add detailed description.
.../arch/arm/cpu/armv7/mx5/clock.c | 42 ++--
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
index 6d984cb..b155214 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
@@ -235,6 +235,26 @@ static u32 get_fpm(void)
#endif
/*
+ * This function returns the low power audio clock.
+ */
+static u32 get_lp_apm(void)
+{
+ u32 ret_val = 0;
+ u32 ccsr = readl(&mxc_ccm->ccsr);
+
+ if (ccsr & MXC_CCM_CCSR_LP_APM)
+#if defined(CONFIG_MX51)
+ ret_val = get_fpm();
+#elif defined(CONFIG_MX53)
+ ret_val = decode_pll(mxc_plls[PLL4_CLOCK], MXC_HCLK);
+#endif
+ else
+ ret_val = MXC_HCLK;
+
+ return ret_val;
+}
+
+/*
* Get mcu main rate
*/
u32 get_mcu_main_clk(void)
@@ -262,6 +282,8 @@ u32 get_periph_clk(void)
return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
case 1:
return decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK);
+ case 2:
+ return get_lp_apm();
default:
return 0;
}
@@ -331,26 +353,6 @@ static u32 get_uart_clk(void)
}
/*
- * This function returns the low power audio clock.
- */
-static u32 get_lp_apm(void)
-{
- u32 ret_val = 0;
- u32 ccsr = readl(&mxc_ccm->ccsr);
-
- if (ccsr & MXC_CCM_CCSR_LP_APM)
-#if defined(CONFIG_MX51)
- ret_val = get_fpm();
-#elif defined(CONFIG_MX53)
- ret_val = decode_pll(mxc_plls[PLL4_CLOCK], MXC_HCLK);
-#endif
- else
- ret_val = MXC_HCLK;
-
- return ret_val;
-}
-
-/*
* get cspi clock rate.
*/
static u32 imx_get_cspiclk(void)
___
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