Re: [U-Boot] ERROR: CTL:TIMEOUT - USB porting issue for UBoot on S3C2450
dongdaking dongdaking at hotmail.com writes: Hi friend I have met the same problem with you ,haven't you solve it yet! thank you1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8] arm: Add boottime support for the ARM architecture
Ideally I'd like to keep it all as data, as it will save lots of text parsing code in the kernel. Surely there must be a call for passing data structures from the bootloader to the kernel. After all, that's why ATAGs were brought about wasn't it? Look at which ATAGS exist to see what they have been invented for. Read the previous discussions why for example pretty useful extensions like a tag to pass a MAC address from a boot loader to the kernel have never been accepted for mainline. But you claim that trace data are different, and fit better? I don't know the history. I consider it a design flaw to do such statictics stuff in the kernel. It does not belong there. Such functions belong to user space. I don't agree. But as mentioned before, this is actually off topic here. Then stop mentioning it. ;) -- Lee Jones Linaro ST-Ericsson Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen
Dear Marek, Thank you for the reply. Can you please send me the steps/procedure to build/support u-boot on x86_64 bit (Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz. We need help from you is there any documentation to enable x86_64 bit pc or links to post my query. What are the config/code i need to change to make my pc as host target are the same. Please help us to build the u-boot on x86_64. Thank you! Best Regards, Manohar 8790215215 -Original Message- From: Marek Vasut ma...@denx.de Sent: Friday, November 23, 2012 6:08am To: u-boot@lists.denx.de Cc: manohar.bet...@smartplayin.com, Graeme Russ graeme.r...@gmail.com Subject: Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen Dear manohar.bet...@smartplayin.com, Hi, I am Manohar,started boot the X86-64 (Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz) using u-boot to work for TIZEN . As I am unable to configure/build my pc using u-boot-x86 . I request you please help me how to configure it/build the u-boot-x86 on my pc as my pc is loaded with Ubuntu 11.10 and my aim is to make my PC as host and target are the same. Please resolve the issue/is my PC support for the u-boot. You need to compile it on a 32bit machine ... or install 32bit cross compiler ... u-boot doesn't support x86/64. Patches are welcome though. Best regards, Marek Vasut___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen
Dear Graeme, Thank you! I downloaded the u-boot-x86 on Ubuntu 11.10 loaded(Linux smart-OptiPlex-390 3.0.0-26-generic x86_64 GNU/Linux) intel i5 M1H61R-MB montherboard from the given below link. http://git.denx.de/?p=u-boot/u-boot-x86.git;a=summary and yes I am planning to run u-boot on x86_64 machine and my target is also x86_64 machine are the same . cd u-boot-x86 opened the boards.config file and appended my board details in the config file . MIH61R-MBx86 x86MIH61R-MB GenuineIntel - # Target ARCHCPU Board name Vendor SoC Options and then run the below commands and i didnot modify any code other than that above line. . manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ vim boards.cfg manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ make distclean /bin/bash: i386-linux-gcc: command not found /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. /bin/bash: i386-linux-gcc: command not found basename: missing operand Try `basename --help' for more information. manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ make MIH61R-MB_config Configuring for MIH61R-MB board... ln: creating symbolic link `asm/arch': No such file or directory make: *** [MIH61R-MB_config] Error 1 manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ ... Please help me what are the files i need to modify and provide me the documentation. Thank you! Best Regards, Manohar 8790215215 -Original Message- From: Graeme Russ graeme.r...@gmail.com Sent: Friday, November 23, 2012 12:12pm To: manohar.bet...@smartplayin.com Cc: Marek Vasut ma...@denx.de, u-boot@lists.denx.de Subject: Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen Hi Manohar, On 11/23/2012 04:46 PM, manohar.bet...@smartplayin.com wrote: Dear Marek, Thank you for the reply. Can you please send me the steps/procedure to build/support u-boot on x86_64 bit (Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz. I build the x86 U-Boot target on an x86_64 i7 Linux (Fedora) system using the standard GNU gcc package. There was an issue with the Makefile and there was a need to manually create some toolchain symlinks, but the was rectified some time ago. Are you using the latest mainline U-Boot from git.denx.de? If so, what errors are you getting - please provide a copy of your build output. We need help from you is there any documentation to enable x86_64 bit pc or links to post my query. What are the config/code i need to change to make my pc as host target are the same. Are you planning on running U-Boot on an x86_64 machine? If so, you will need to create code to support that - Current U-Boot only supports 32-bit x86 targets. The sandbox target (designed for testing on a Linux host, not for downloading onto a board) should run on an x86_64 host. Please help us to build the u-boot on x86_64. Please provide more detail - what have you tried? What was the result? The build scripts should work as is on a properly configured x86_64 build machine Regards, Graeme P.S. Please stop top posting - thanks Thank you! Best Regards, Manohar
Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen
Hi Manohar, On 11/23/2012 09:10 PM, manohar.bet...@smartplayin.com wrote: Dear Graeme, Thank you! I downloaded the u-boot-x86 on Ubuntu 11.10 loaded(Linux smart-OptiPlex-390 3.0.0-26-generic x86_64 GNU/Linux) intel i5 M1H61R-MB montherboard from the given below link. http://git.denx.de/?p=u-boot/u-boot-x86.git;a=summary Depending on when you downloaded it, you may not have the latest mainline which is at: http://git.denx.de/?p=u-boot.git;a=summary Nevertheless, you will have the latest x86 patches and yes I am planning to run u-boot on x86_64 machine and my target is also x86_64 machine are the same . cd u-boot-x86 Hmm, I don't think U-Boot is what your after. There are a few problems you will be faced with: - There is no ACPI support (no power management) - No System Management Mode (SMM) support - No chipset support (No RAM initialisation) - No Cache-As-RAM init code Unless you have at least these covered, you will brick your board if you try to flash U-Boot. You might instead take a look at coreboot opened the boards.config file and appended my board details in the config file . MIH61R-MBx86 x86MIH61R-MB GenuineIntel - # Target ARCHCPU Board name VendorSoC Options and then run the below commands and i didnot modify any code other than that above line. . manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ vim boards.cfg manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ make distclean /bin/bash: i386-linux-gcc: command not found /bin/bash: i386-linux-gcc: command not found [snip] Ah, I now see that the patch I thought had been applied has not :( You will need this patch: http://patchwork.ozlabs.org/patch/155727/ Regards, Graeme ... Please help me what are the files i need to modify and provide me the documentation. Thank you! Best Regards, Manohar 8790215215 -Original Message- From: Graeme Russ graeme.r...@gmail.com Sent: Friday, November 23, 2012 12:12pm To: manohar.bet...@smartplayin.com Cc: Marek Vasut ma...@denx.de, u-boot@lists.denx.de Subject: Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen Hi Manohar, On 11/23/2012 04:46 PM, manohar.bet...@smartplayin.com wrote: Dear Marek, Thank you for the reply. Can you please send me the steps/procedure to build/support u-boot on x86_64 bit (Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz. I build the x86 U-Boot target on an x86_64 i7 Linux (Fedora) system using the standard GNU gcc package. There was an issue with the Makefile and there was a need to manually create some toolchain symlinks, but the was rectified some time ago. Are you using the latest mainline U-Boot from git.denx.de? If so, what errors are you getting - please provide a copy of your build output. We need help from you is there any documentation to enable x86_64 bit pc or links to post my query. What are the config/code i need to change to make my pc as host target are the same. Are you planning on running U-Boot on an x86_64 machine? If so, you will need to create code to support that - Current U-Boot only supports 32-bit x86 targets. The sandbox target (designed for testing on a Linux host, not for downloading onto a board) should run on an x86_64 host. Please help us to build the u-boot on x86_64. Please provide more detail - what have you tried? What was the result? The build scripts should work as is on a properly configured x86_64 build machine Regards, Graeme P.S. Please stop top posting - thanks Thank you! Best Regards, Manohar 8790215215 -Original Message- From: Marek Vasut ma...@denx.de Sent: Friday, November 23, 2012 6:08am To: u-boot@lists.denx.de Cc: manohar.bet...@smartplayin.com, Graeme Russ graeme.r...@gmail.com Subject: Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen Dear manohar.bet...@smartplayin.com, Hi, I am Manohar,started boot the X86-64 (Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz) using u-boot to work for TIZEN . As I am unable to configure/build my pc using u-boot-x86 . I request you please help me how to configure it/build the u-boot-x86 on my pc as my pc is loaded with Ubuntu 11.10 and my aim is to make my PC as host and target are the same. Please resolve the issue/is my PC support for the u-boot. You need to compile
[U-Boot] [PATCH 1/3] video: tegra: Update line length to match resolution
Instead of storing the computed line length in a local variable, store
it in the global lcd_line_length variable to make sure the LCD subsystem
can properly draw content for the display resolution.
This probably wasn't noticed yet because the only board where LCD
support is currently enabled is Seaboard, which runs at a 1366x768
resolution. As it happens this is the maximum resolution supported and
also the default that is used to initialize the framebuffer before the
configuration from DT is available.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
drivers/video/tegra.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
index 750a283..afcb008 100644
--- a/drivers/video/tegra.c
+++ b/drivers/video/tegra.c
@@ -145,8 +145,8 @@ static void update_panel_size(struct fdt_disp_config
*config)
void lcd_ctrl_init(void *lcdbase)
{
- int line_length, size;
int type = DCACHE_OFF;
+ int size;
assert(disp_config);
@@ -160,7 +160,7 @@ void lcd_ctrl_init(void *lcdbase)
disp_config-height = LCD_MAX_HEIGHT
disp_config-log2_bpp = LCD_MAX_LOG2_BPP)
update_panel_size(disp_config);
- size = lcd_get_size(line_length);
+ size = lcd_get_size(lcd_line_length);
/* Set up the LCD caching as requested */
if (config.cache_type FDT_LCD_CACHE_WRITE_THROUGH)
--
1.8.0
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[U-Boot] [PATCH 2/3] tegra: Enable LCD on Medcom-Wide
The Medcom-Wide has a 15 LCD panel with a resolution of 1366x768
pixels. Add a corresponding panel description to the device tree and
enable LCD support in the configuration.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
board/avionic-design/dts/tegra20-medcom-wide.dts | 32
include/configs/medcom-wide.h| 14 +++
2 files changed, 46 insertions(+)
diff --git a/board/avionic-design/dts/tegra20-medcom-wide.dts
b/board/avionic-design/dts/tegra20-medcom-wide.dts
index f916122..70587a6 100644
--- a/board/avionic-design/dts/tegra20-medcom-wide.dts
+++ b/board/avionic-design/dts/tegra20-medcom-wide.dts
@@ -24,6 +24,19 @@
};
};
+ host1x {
+ status = okay;
+
+ dc@5420 {
+ status = okay;
+
+ rgb {
+ nvidia,panel = lcd_panel;
+ status = okay;
+ };
+ };
+ };
+
clock@60006000 {
clocks = clk_32k osc;
};
@@ -55,4 +68,23 @@
usb@c5004000 {
status = disabled;
};
+
+ lcd_panel: panel {
+ clock = 61715000;
+ xres = 1366;
+ yres = 768;
+ left-margin = 2;
+ right-margin = 47;
+ hsync-len = 136;
+ lower-margin = 21;
+ upper-margin = 11;
+ vsync-len = 4;
+
+ nvidia,bits-per-pixel = 16;
+ nvidia,pwm = pwm 0 50;
+ nvidia,backlight-enable-gpios = gpio 13 0; /* PB5 */
+ nvidia,backlight-vdd-gpios = gpio 176 0; /* PW0 */
+ nvidia,lvds-shutdown-gpios = gpio 10 0; /* PB2 */
+ nvidia,panel-timings = 0 0 0 0;
+ };
};
diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h
index e852e31..452d587 100644
--- a/include/configs/medcom-wide.h
+++ b/include/configs/medcom-wide.h
@@ -42,6 +42,7 @@
#define CONFIG_SYS_NS16550_COM1NV_PA_APB_UARTD_BASE
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
#define CONFIG_ENV_IS_NOWHERE
@@ -77,6 +78,19 @@
ext2load mmc 0 0x1700 /boot/uImage; \
bootm
+#undef TEGRA_DEVICE_SETTINGS
+#define TEGRA_DEVICE_SETTINGS \
+ stdin=serial\0\
+ stdout=serial,lcd\0 \
+ stderr=serial,lcd\0
+
+/* LCD support */
+#define CONFIG_LCD
+#define CONFIG_PWM_TEGRA
+#define CONFIG_VIDEO_TEGRA
+#define LCD_BPP LCD_COLOR16
+#define CONFIG_SYS_WHITE_ON_BLACK
+
#include tegra-common-post.h
#endif /* __CONFIG_H */
--
1.8.0
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[U-Boot] [PATCH 3/3] tegra: Enable LCD on TEC
The TEC ships with a 7 LCD panel that provides a resolution of 800x480
pixels. Add a corresponding panel description to the device tree and
enable LCD support in the configuration.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
board/avionic-design/dts/tegra20-tec.dts | 32
include/configs/tec.h| 15 ++-
2 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/board/avionic-design/dts/tegra20-tec.dts
b/board/avionic-design/dts/tegra20-tec.dts
index 50ea3b5..cdb7527 100644
--- a/board/avionic-design/dts/tegra20-tec.dts
+++ b/board/avionic-design/dts/tegra20-tec.dts
@@ -24,6 +24,19 @@
};
};
+ host1x {
+ status = okay;
+
+ dc@5420 {
+ status = okay;
+
+ rgb {
+ nvidia,panel = lcd_panel;
+ status = okay;
+ };
+ };
+ };
+
clock@60006000 {
clocks = clk_32k osc;
};
@@ -66,4 +79,23 @@
compatible = hynix,hy27uf4g2b, nand-flash;
};
};
+
+ lcd_panel: panel {
+ clock = 3326;
+ xres = 800;
+ yres = 480;
+ left-margin = 120;
+ right-margin = 120;
+ hsync-len = 16;
+ lower-margin = 15;
+ upper-margin = 15;
+ vsync-len = 15;
+
+ nvidia,bits-per-pixel = 16;
+ nvidia,pwm = pwm 0 50;
+ nvidia,backlight-enable-gpios = gpio 13 0; /* PB5 */
+ nvidia,backlight-vdd-gpios = gpio 176 0; /* PW0 */
+ nvidia,lvds-shutdown-gpios = gpio 10 0; /* PB2 */
+ nvidia,panel-timings = 0 0 0 0;
+ };
};
diff --git a/include/configs/tec.h b/include/configs/tec.h
index 200cf66..815afa6 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -36,13 +36,13 @@
/* High-level configuration options */
#define V_PROMPT Tegra20 (TEC) #
#define CONFIG_TEGRA_BOARD_STRING Avionic Design Tamonten Evaluation
Carrier
-#define CONFIG_SYS_BOARD_ODMDATA 0x2b0d8011
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CONFIG_SYS_NS16550_COM1NV_PA_APB_UARTD_BASE
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
/* SD/MMC */
#define CONFIG_MMC
@@ -85,6 +85,19 @@
ext2load mmc 0 0x1700 /boot/uImage; \
bootm
+#undef TEGRA_DEVICE_SETTINGS
+#define TEGRA_DEVICE_SETTINGS \
+ stdin=serial\0\
+ stdout=serial,lcd\0 \
+ stderr=serial,lcd\0
+
+/* LCD support */
+#define CONFIG_LCD
+#define CONFIG_PWM_TEGRA
+#define CONFIG_VIDEO_TEGRA
+#define LCD_BPP LCD_COLOR16
+#define CONFIG_SYS_WHITE_ON_BLACK
+
#include tegra-common-post.h
#endif /* __CONFIG_H */
--
1.8.0
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[U-Boot] [PATCH] Check eth_get_dev() for null on NetLoop entry
If using an usb ethernet interface and starting usb is forgot,
any attempt to use ethernet will try to init networking and dereference
eth_get_dev() to null.
This patch adds a check and aborts in case of a null pointer.
---
net/net.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/net/net.c b/net/net.c
index 82c4cc9..1301e6b 100644
--- a/net/net.c
+++ b/net/net.c
@@ -313,6 +313,17 @@ int NetLoop(enum proto_t protocol)
NetTryCount = 1;
debug_cond(DEBUG_INT_STATE, --- NetLoop Entry\n);
+ /* If we do not check, initialisation will dereference NULL */
+ if (!eth_get_dev())
+ {
+#ifdef CONFIG_USB_HOST_ETHER
+ printf(Ethernet not available. Have you run \usb start\
already?\n);
+#else
+ printf(Ethernet not available.\n);
+#endif
+ return -1;
+ }
+
bootstage_mark_name(BOOTSTAGE_ID_ETH_START, eth_start);
net_init();
if (eth_is_on_demand_init() || protocol != NETCONS) {
--
1.8.0
--
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[U-Boot] [PATCH 0/6 V3] EXYNOS5: FDT Support for I2C
This patch set adds FDT support for I2C driver and API's to acess the bus number using the fdt node and also reset the port. Changes in V2: - Baord i2c init moved to I2C driver in case of FDT. - Added Periph id to device node. - Modified i2c_get_bus_num_fdt api to compare using node. Changes in V3: - Peripheral id removed from dtsi file and decoded based on interrupts. - API for fdtdec_lookup removed as it is already present as fd_dec_lookup. Rajeshwari Shinde (6): EXYNOS5: FDT: Add I2C device node data EXYNOS5 : FDT: Add Aliases for I2C device EXYNOS5: FDT: Add compatible string for I2C EXYNOS5: FDT : Decode peripheral id I2C: Driver changes for FDT support SMDK5250: Initialise I2C using FDT arch/arm/cpu/armv7/exynos/pinmux.c| 28 ++ arch/arm/dts/exynos5250.dtsi | 64 ++ arch/arm/include/asm/arch-exynos/periph.h | 28 +- arch/arm/include/asm/arch-exynos/pinmux.h |8 +++ board/samsung/dts/exynos5250-smdk5250.dts | 11 board/samsung/smdk5250/smdk5250.c | 20 +--- drivers/i2c/s3c24x0_i2c.c | 83 - drivers/i2c/s3c24x0_i2c.h |8 +++ include/fdtdec.h |1 + include/i2c.h | 26 + lib/fdtdec.c |1 + 11 files changed, 245 insertions(+), 33 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/6 V3] EXYNOS5: FDT: Add I2C device node data
Add I2C device node data for exynos
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Added Periph id to the I2C device node
Changes in V3:
- Removed Periph id as decoding done based on interrupts.
arch/arm/dts/exynos5250.dtsi | 64 ++
1 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index db22db6..e877e6c 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -33,4 +33,68 @@
compatible = samsung,exynos-tmu;
reg = 0x1006 0x;
};
+
+ i2c@12c6 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,s3c2440-i2c;
+ reg = 0x12C6 0x100;
+ interrupts = 0 56 0;
+ };
+
+ i2c@12c7 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,s3c2440-i2c;
+ reg = 0x12C7 0x100;
+ interrupts = 0 57 0;
+ };
+
+ i2c@12c8 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,s3c2440-i2c;
+ reg = 0x12C8 0x100;
+ interrupts = 0 58 0;
+ };
+
+ i2c@12c9 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,s3c2440-i2c;
+ reg = 0x12C9 0x100;
+ interrupts = 0 59 0;
+ };
+
+ i2c@12ca {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,s3c2440-i2c;
+ reg = 0x12CA 0x100;
+ interrupts = 0 60 0;
+ };
+
+ i2c@12cb {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,s3c2440-i2c;
+ reg = 0x12CB 0x100;
+ interrupts = 0 61 0;
+ };
+
+ i2c@12cc {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,s3c2440-i2c;
+ reg = 0x12CC 0x100;
+ interrupts = 0 62 0;
+ };
+
+ i2c@12cd {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,s3c2440-i2c;
+ reg = 0x12CD 0x100;
+ interrupts = 0 63 0;
+ };
};
--
1.7.4.4
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[U-Boot] [PATCH 2/6 V3] EXYNOS5 : FDT: Add Aliases for I2C device
This patch adds aliases for I2C.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in V2:
- None.
Changes in V3:
- None.
board/samsung/dts/exynos5250-smdk5250.dts | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index 2d3ecca..8722b36 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -16,6 +16,17 @@
model = SAMSUNG SMDK5250 board based on EXYNOS5250;
compatible = samsung,smdk5250, samsung,exynos5250;
+ aliases {
+ i2c0 = /i2c@12c6;
+ i2c1 = /i2c@12c7;
+ i2c2 = /i2c@12c8;
+ i2c3 = /i2c@12c9;
+ i2c4 = /i2c@12ca;
+ i2c5 = /i2c@12cb;
+ i2c6 = /i2c@12cc;
+ i2c7 = /i2c@12cd;
+ };
+
sromc@1225 {
bank = 1;
srom-timing = 1 9 12 1 6 1 1;
--
1.7.4.4
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[U-Boot] [PATCH 3/6 V3] EXYNOS5: FDT: Add compatible string for I2C
Add required compatible information for I2C driver.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in V2:
- None.
Chnages in V3:
- None.
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 180dfff..f9aac31 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -69,6 +69,7 @@ enum fdt_compat_id {
COMPAT_SMSC_LAN9215,/* SMSC 10/100 Ethernet LAN9215 */
COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */
COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */
+ COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 8e5ed21..6e8c24c 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -46,6 +46,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SMSC_LAN9215, smsc,lan9215),
COMPAT(SAMSUNG_EXYNOS5_SROMC, samsung,exynos-sromc),
COMPAT(SAMSUNG_EXYNOS_TMU, samsung,exynos-tmu),
+ COMPAT(SAMSUNG_S3C2440_I2C, samsung,s3c2440-i2c),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.7.4.4
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[U-Boot] [PATCH 4/6 V3] EXYNOS5: FDT : Decode peripheral id
Api is added to decode peripheral id based on the interrupt number
of the peripheral.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Chnages in V3:
- New patch added.
arch/arm/cpu/armv7/exynos/pinmux.c| 28
arch/arm/include/asm/arch-exynos/periph.h | 28 +++-
arch/arm/include/asm/arch-exynos/pinmux.h |8
3 files changed, 51 insertions(+), 13 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index f02f441..4812c8e 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -22,6 +22,7 @@
*/
#include common.h
+#include fdtdec.h
#include asm/arch/gpio.h
#include asm/arch/pinmux.h
#include asm/arch/sromc.h
@@ -396,3 +397,30 @@ int exynos_pinmux_config(int peripheral, int flags)
return -1;
}
}
+
+#ifdef CONFIG_OF_CONTROL
+static int exynos5_decode_periph_id(const void *blob, int node)
+{
+ int err;
+ u32 cell[3];
+
+ err = fdtdec_get_int_array(blob, node, interrupts, cell,
+ ARRAY_SIZE(cell));
+ if (err)
+ return PERIPH_ID_NONE;
+
+ if ((129 cell[1]) || (cell[1] 31))
+ return cell[1];
+
+ debug( invalid peripheral id\n);
+ return PERIPH_ID_NONE;
+}
+
+int decode_periph_id(const void *blob, int node)
+{
+ if (cpu_is_exynos5())
+ return exynos5_decode_periph_id(blob, node);
+ else
+ return PERIPH_ID_NONE;
+}
+#endif
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 13abd2d..1de48d5 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -25,12 +25,17 @@
#define __ASM_ARM_ARCH_PERIPH_H
/*
- * Peripherals requiring clock/pinmux configuration. List will
+ * Peripherals requiring pinmux configuration0. List will
* grow with support for more devices getting added.
+ * Numbering based on interrupt table.
*
*/
enum periph_id {
- PERIPH_ID_I2C0,
+ PERIPH_ID_UART0 = 51,
+ PERIPH_ID_UART1,
+ PERIPH_ID_UART2,
+ PERIPH_ID_UART3,
+ PERIPH_ID_I2C0 = 56,
PERIPH_ID_I2C1,
PERIPH_ID_I2C2,
PERIPH_ID_I2C3,
@@ -38,22 +43,19 @@ enum periph_id {
PERIPH_ID_I2C5,
PERIPH_ID_I2C6,
PERIPH_ID_I2C7,
- PERIPH_ID_I2S1,
- PERIPH_ID_SDMMC0,
+ PERIPH_ID_SPI0 = 68,
+ PERIPH_ID_SPI1,
+ PERIPH_ID_SPI2,
+ PERIPH_ID_SDMMC0 = 75,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3,
- PERIPH_ID_SDMMC4,
- PERIPH_ID_SROMC,
- PERIPH_ID_SPI0,
- PERIPH_ID_SPI1,
- PERIPH_ID_SPI2,
+ PERIPH_ID_I2S1 = 99,
+
+ PERIPH_ID_SROMC = 128,
PERIPH_ID_SPI3,
PERIPH_ID_SPI4,
- PERIPH_ID_UART0,
- PERIPH_ID_UART1,
- PERIPH_ID_UART2,
- PERIPH_ID_UART3,
+ PERIPH_ID_SDMMC4,
PERIPH_ID_COUNT,
PERIPH_ID_NONE = -1,
diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h
b/arch/arm/include/asm/arch-exynos/pinmux.h
index 10ea736..1f5a48a 100644
--- a/arch/arm/include/asm/arch-exynos/pinmux.h
+++ b/arch/arm/include/asm/arch-exynos/pinmux.h
@@ -55,4 +55,12 @@ enum {
*/
int exynos_pinmux_config(int peripheral, int flags);
+/**
+ * Decode the peripheral id using the interrpt numbers.
+ *
+ * @param blob Device tree blbo
+ * @param node FDT I2C node to find
+ * @return peripheral id if ok, -1 on error (e.g. unsupported peripheral)
+ */
+int decode_periph_id(const void *blob, int node);
#endif
--
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[U-Boot] [PATCH 5/6 V3] I2C: Driver changes for FDT support
Functions added to get the I2C bus number and reset I2C bus using
FDT node.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Added periph id to I2C bus structure.
- Modified i2c_get_bus_num_fdt function to compare with node.
- Board i2c init moved to driver in case of FDT.
Chnages in V3:
- peripheral id decoded based on interrupts.
- removed compat id check in i2c_get_bus_num_fdt.
drivers/i2c/s3c24x0_i2c.c | 83 -
drivers/i2c/s3c24x0_i2c.h |8
include/i2c.h | 26 ++
3 files changed, 116 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 9bc4c7f..c270ff0 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -27,9 +27,11 @@
*/
#include common.h
+#include fdtdec.h
#ifdef CONFIG_EXYNOS5
#include asm/arch/clk.h
#include asm/arch/cpu.h
+#include asm/arch/pinmux.h
#else
#include asm/arch/s3c24x0_cpu.h
#endif
@@ -60,7 +62,14 @@
#define I2C_TIMEOUT 1 /* 1 second */
-static unsigned int g_current_bus; /* Stores Current I2C Bus */
+/*
+ * For SPL boot some boards need i2c before SDRAM is initialised so force
+ * variables to live in SRAM
+ */
+static unsigned int g_current_bus __attribute__((section(.data)));
+static struct s3c24x0_i2c_bus i2c_bus[CONFIG_MAX_I2C_NUM]
+ __attribute__((section(.data)));
+static int i2c_busses __attribute__((section(.data)));
#ifndef CONFIG_EXYNOS5
static int GetI2CSDA(void)
@@ -507,4 +516,76 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
(i2c, I2C_WRITE, chip 1, xaddr[4 - alen], alen, buffer,
len) != 0);
}
+
+#ifdef CONFIG_OF_CONTROL
+void board_i2c_init(const void *blob)
+{
+
+ int node_list[CONFIG_MAX_I2C_NUM];
+ int count, i;
+
+ count = fdtdec_find_aliases_for_id(blob, i2c,
+ COMPAT_SAMSUNG_S3C2440_I2C, node_list,
+ CONFIG_MAX_I2C_NUM);
+ for (i = 0; i count; i++) {
+ struct s3c24x0_i2c_bus *bus;
+ int node = node_list[i];
+
+ if (node 0)
+ continue;
+ bus = i2c_bus[i];
+ bus-regs = (struct s3c24x0_i2c *)
+ fdtdec_get_addr(blob, node, reg);
+ bus-id = decode_periph_id(blob, node);
+ bus-node = node;
+ bus-bus_num = i2c_busses++;
+ exynos_pinmux_config(bus-id, 0);
+ }
+
+}
+
+static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
+{
+ if (bus_idx i2c_busses)
+ return i2c_bus[bus_idx];
+ debug(Undefined bus: %d\n, bus_idx);
+ return NULL;
+}
+
+int i2c_get_bus_num_fdt(int node)
+{
+ int i;
+
+ for (i = 0; i i2c_busses; i++) {
+ if (node == i2c_bus[i].node)
+ return i;
+ }
+
+ debug(%s: Can't find any matched I2C bus\n, __func__);
+ return -1;
+}
+
+int i2c_reset_port_fdt(const void *blob, int node)
+{
+ struct s3c24x0_i2c_bus *i2c;
+
+ int bus;
+
+ bus = i2c_get_bus_num_fdt(node);
+ if (bus 0) {
+ debug(could not get bus for node %d\n, node);
+ return -1;
+ }
+ i2c = get_bus(bus);
+ if (!i2c) {
+ debug(get_bus() failed for node node %d\n, node);
+ return -1;
+ }
+
+ i2c_ch_init(i2c-regs, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+ return 0;
+}
+#endif
+
#endif /* CONFIG_HARD_I2C */
diff --git a/drivers/i2c/s3c24x0_i2c.h b/drivers/i2c/s3c24x0_i2c.h
index 2dd4b06..1243bf1 100644
--- a/drivers/i2c/s3c24x0_i2c.h
+++ b/drivers/i2c/s3c24x0_i2c.h
@@ -30,4 +30,12 @@ struct s3c24x0_i2c {
u32 iicds;
u32 iiclc;
};
+
+struct s3c24x0_i2c_bus {
+ int node; /* device tree node */
+ int bus_num;/* i2c bus number */
+ struct s3c24x0_i2c *regs;
+ enum periph_id id;
+};
+
#endif /* _S3C24X0_I2C_H */
diff --git a/include/i2c.h b/include/i2c.h
index 16f099d..c60d075 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -262,4 +262,30 @@ extern int get_multi_scl_pin(void);
extern int get_multi_sda_pin(void);
extern int multi_i2c_init(void);
#endif
+
+/**
+ * Get FDT values for i2c bus.
+ *
+ * @param blob Device tree blbo
+ * @return the number of I2C bus
+ */
+void board_i2c_init(const void *blob);
+
+/**
+ * Find the I2C bus number by given a FDT I2C node.
+ *
+ * @param blob Device tree blbo
+ * @param node FDT I2C node to find
+ * @return the number of I2C bus (zero based), or -1 on error
+ */
+int i2c_get_bus_num_fdt(int node);
+
+/**
+ * Reset the I2C bus represented by the given a FDT I2C node.
+ *
+ * @param blob Device tree blbo
+ * @param node FDT I2C node to find
+ * @return 0 if port was reset, -1 if not found
+ */
+int
[U-Boot] [PATCH 6/6 V3] SMDK5250: Initialise I2C using FDT
This patch initialises I2C using FDT.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in V2:
- board_i2c_init moved to driver in case of FDT.
Chnges in V3:
- None.
board/samsung/smdk5250/smdk5250.c | 20 +---
1 files changed, 1 insertions(+), 19 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index db2457b..5ebc665 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -272,24 +272,6 @@ static int board_uart_init(void)
return 0;
}
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-static int board_i2c_init(void)
-{
- int i, err;
-
- for (i = 0; i CONFIG_MAX_I2C_NUM; i++) {
- err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
- PINMUX_FLAG_NONE);
- if (err) {
- debug(I2C%d not configured\n, (PERIPH_ID_I2C0 + i));
- return err;
- }
- }
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- return 0;
-}
-#endif
-
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
@@ -300,7 +282,7 @@ int board_early_init_f(void)
return err;
}
#ifdef CONFIG_SYS_I2C_INIT_BOARD
- err = board_i2c_init();
+ board_i2c_init(gd-fdt_blob);
#endif
return err;
}
--
1.7.4.4
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[U-Boot] [PATCH v2 0/4] Support for SATA on EXYNOS5
This patch set adds support for SATA on Exynos5250 Vasanth Ananthan (4): Exynos5: Add clock support for SATA Exynos5: Add base addresses for SATA Drivers: block: Support for SATA in Exynos5 SMDK55250: Enable SATA arch/arm/cpu/armv7/exynos/clock.c | 22 ++ arch/arm/include/asm/arch-exynos/clk.h|1 + arch/arm/include/asm/arch-exynos/cpu.h|3 + arch/arm/include/asm/arch-exynos/periph.h |1 + drivers/block/dwc_ahsata.c| 394 - include/configs/smdk5250.h| 11 + 6 files changed, 425 insertions(+), 7 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/4] Exynos5: Add clock support for SATA
This patch adds clock support for SATA
Signed-off-by: Vasanth Ananthan vasant...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 22 ++
arch/arm/include/asm/arch-exynos/clk.h |1 +
2 files changed, 23 insertions(+)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index fe61f88..22b327b 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -26,6 +26,7 @@
#include asm/arch/clock.h
#include asm/arch/clk.h
#include asm/arch/periph.h
+#include asm/errno.h
/* Epll Clock division values to achive different frequency output */
static struct set_epll_con_val exynos5_epll_div[] = {
@@ -326,6 +327,19 @@ static unsigned long exynos4_get_uart_clk(int dev_index)
return uclk;
}
+static unsigned long exynos5_get_sata_clk(void)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+
+ /*
+ * This clock is used as a input for 1ms timer, so return
+ * the clock equivalent to 1 MHz
+ */
+
+ return CONFIG_SYS_CLK_FREQ / 10;
+}
+
/* exynos5: return uart clock frequency */
static unsigned long exynos5_get_uart_clk(int dev_index)
{
@@ -963,6 +977,14 @@ unsigned long get_uart_clk(int dev_index)
return exynos4_get_uart_clk(dev_index);
}
+unsigned long get_sata_clock(void)
+{
+ if (cpu_is_exynos5())
+ return exynos5_get_sata_clk();
+
+ return -ENOSYS;
+}
+
void set_mmc_clk(int dev_index, unsigned int div)
{
if (cpu_is_exynos5())
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index cd12323..182ed95 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -42,5 +42,6 @@ void set_i2s_clk_source(void);
int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq);
int set_epll_clk(unsigned long rate);
int set_spi_clk(int periph_id, unsigned int rate);
+unsigned long get_sata_clk(void);
#endif
--
1.7.9.5
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[U-Boot] [PATCH v2 2/4] Exynos5: Add base addresses for SATA
This patch adds the macro definition of SATA controller and PHY controller
base addresses.
Signed-off-by: Vasanth Ananthan vasant...@samsung.com
---
arch/arm/include/asm/arch-exynos/cpu.h|3 +++
arch/arm/include/asm/arch-exynos/periph.h |1 +
2 files changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index d1b2ea8..6ea1230 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -80,8 +80,11 @@
#define EXYNOS5_USB_HOST_EHCI_BASE 0x1211
#define EXYNOS5_USBPHY_BASE0x1213
#define EXYNOS5_USBOTG_BASE0x1214
+#define EXYNOS5_SATA_PHY_BASE 0x1217
+#define EXYNOS5_SATA_PHY_I2C0x121D
#define EXYNOS5_MMC_BASE 0x1220
#define EXYNOS5_SROMC_BASE 0x1225
+#define EXYNOS5_SATA_BASE 0x122F
#define EXYNOS5_UART_BASE 0x12C0
#define EXYNOS5_I2C_BASE 0x12C6
#define EXYNOS5_SPI_BASE 0x12D2
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 13abd2d..58dc675 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -54,6 +54,7 @@ enum periph_id {
PERIPH_ID_UART1,
PERIPH_ID_UART2,
PERIPH_ID_UART3,
+ PERIPH_ID_SATA,
PERIPH_ID_COUNT,
PERIPH_ID_NONE = -1,
--
1.7.9.5
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[U-Boot] [PATCH v2 3/4] Drivers: block: Support for SATA in Exynos5
This patch provides support for SATA in Exynos5250
Signed-off-by: Vasanth Ananthan vasant...@samsung.com
---
drivers/block/dwc_ahsata.c | 394 +++-
1 file changed, 387 insertions(+), 7 deletions(-)
diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c
index c9b71f7..5125134 100644
--- a/drivers/block/dwc_ahsata.c
+++ b/drivers/block/dwc_ahsata.c
@@ -35,6 +35,69 @@
#include asm/arch/clock.h
#include dwc_ahsata.h
+
+#define bool unsigned char
+#define false 0
+#define true 1
+
+#ifdef SATA_DEBUG
+#define debug(fmt, args...)printf(fmt, ##args)
+#else
+#define debug(fmt, args...)
+#endif /* MKIMAGE_DEBUG */
+
+#define MAX_DATA_BYTES_PER_SG (4 * 1024 * 1024)
+#define MAX_BYTES_PER_TRANS (AHCI_MAX_SG * MAX_DATA_BYTES_PER_SG)
+
+#define writel_with_flush(a, b)do { writel(a, b); readl(b); } while (0)
+
+#define EXYNOS5_SATA_PHY_CONTROL (0x1004 + 0x724)
+#define S5P_PMU_SATA_PHY_CONTROL_EN0x1
+
+#define SATA_TIME_LIMIT1
+#define SATA_PHY_I2C_SLAVE_ADDRS 0x70
+
+#define SATA_RESET 0x4
+#define RESET_CMN_RST_N(1 1)
+#define LINK_RESET 0xF
+
+#define SATA_MODE0 0x10
+
+#define SATA_CTRL0 0x14
+#define CTRL0_P0_PHY_CALIBRATED_SEL(1 9)
+#define CTRL0_P0_PHY_CALIBRATED(1 8)
+
+#define SATA_PHSATA_CTRLM 0xE0
+#define PHCTRLM_REF_RATE (1 1)
+#define PHCTRLM_HIGH_SPEED (1 0)
+
+#define SATA_PHSATA_STATM 0xF0
+#define PHSTATM_PLL_LOCKED (1 0)
+
+#define SATA_I2C_CON 0x00
+#define SATA_I2C_STAT 0x04
+#define SATA_I2C_ADDR 0x08
+#define SATA_I2C_DS0x0C
+#define SATA_I2C_LC0x10
+
+/* I2CCON reg */
+#define CON_ACKEN (1 7)
+#define CON_CLK512 (1 6)
+#define CON_CLK16 (~CON_CLK512)
+#define CON_INTEN (1 5)
+#define CON_INTPND (1 4)
+#define CON_TXCLK_PS (0xF)
+
+/* I2CSTAT reg */
+#define STAT_MSTT (0x3 6)
+#define STAT_BSYST (1 5)
+#define STAT_RTEN (1 4)
+#define STAT_LAST (1 0)
+
+#define LC_FLTR_EN (1 2)
+
+#define SATA_PHY_CON_RESET 0xF003F
+
struct sata_port_regs {
u32 clb;
u32 clbu;
@@ -88,10 +151,244 @@ struct sata_host_regs {
u32 idr;
};
-#define MAX_DATA_BYTES_PER_SG (4 * 1024 * 1024)
-#define MAX_BYTES_PER_TRANS (AHCI_MAX_SG * MAX_DATA_BYTES_PER_SG)
+void * const phy_ctrl = (void *)EXYNOS5_SATA_PHY_BASE;
+void * const phy_i2c_base = (void *)EXYNOS5_SATA_PHY_I2C;
-#define writel_with_flush(a, b)do { writel(a, b); readl(b); } while (0)
+enum {
+ SATA_GENERATION1,
+ SATA_GENERATION2,
+ SATA_GENERATION3,
+};
+
+static bool sata_is_reg(void *base, u32 reg, u32 checkbit, u32 status)
+{
+ if ((readl(base + reg) checkbit) == status)
+ return true;
+ else
+ return false;
+}
+
+static bool wait_for_reg_status(void *base, u32 reg, u32 checkbit,
+ u32 status)
+{
+ u32 time_limit_cnt = 0;
+ while (!sata_is_reg(base, reg, checkbit, status)) {
+ if (time_limit_cnt == SATA_TIME_LIMIT)
+ return false;
+ udelay(1000);
+ time_limit_cnt++;
+ }
+ return true;
+}
+
+static void sata_set_gen(u8 gen)
+{
+ writel(gen, phy_ctrl + SATA_MODE0);
+}
+
+/* Address :I2C Address */
+static void sata_i2c_write_addrs(u8 data)
+{
+ writeb((data 0xFE), phy_i2c_base + SATA_I2C_DS);
+}
+
+static void sata_i2c_write_data(u8 data)
+{
+ writeb((data), phy_i2c_base + SATA_I2C_DS);
+}
+
+static void sata_i2c_start(void)
+{
+ u32 val;
+ val = readl(phy_i2c_base + SATA_I2C_STAT);
+ val |= STAT_BSYST;
+ writel(val, phy_i2c_base + SATA_I2C_STAT);
+}
+
+static void sata_i2c_stop(void)
+{
+ u32 val;
+ val = readl(phy_i2c_base + SATA_I2C_STAT);
+ val = ~STAT_BSYST;
+ writel(val, phy_i2c_base + SATA_I2C_STAT);
+}
+
+static bool sata_i2c_get_int_status(void)
+{
+ if ((readl(phy_i2c_base + SATA_I2C_CON)) CON_INTPND)
+ return true;
+ else
+ return false;
+}
+
+static bool sata_i2c_is_tx_ack(void)
+{
+ if ((readl(phy_i2c_base + SATA_I2C_STAT)) STAT_LAST)
+ return false;
+ else
+ return true;
+}
+
+static bool sata_i2c_is_bus_ready(void)
+{
+ if ((readl(phy_i2c_base + SATA_I2C_STAT)) STAT_BSYST)
+ return false;
+ else
+ return true;
+}
+
+static bool sata_i2c_wait_for_busready(u32 time_out)
+{
+ while (--time_out) {
+ if
[U-Boot] [PATCH v2 4/4] SMDK55250: Enable SATA
This patch adds required macros for enabling SATA. Signed-off-by: Vasanth Ananthan vasant...@samsung.com --- include/configs/smdk5250.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index e412da8..123fcc3 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -97,6 +97,7 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_NET +#define CONFIG_CMD_SATA #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK @@ -259,4 +260,14 @@ /* Enable devicetree support */ #define CONFIG_OF_LIBFDT +/* Enable SATA */ +#ifdef CONFIG_CMD_SATA + #define CONFIG_DWC_AHSATA + #define CONFIG_SYS_SATA_MAX_DEVICE 1 + #define CONFIG_DWC_AHSATA_PORT_ID 0 + #define CONFIG_DWC_AHSATA_BASE_ADDR EXYNOS5_SATA_BASE + #define CONFIG_LBA48 + #define CONFIG_LIBATA +#endif + #endif /* __CONFIG_H */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen
Dear Graeme, Thank you! As of now I will try it for coreboot target on x86_64 machine. I followed the steps given in patch file for x86 machine and modified and getting the below error. manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/latest/u-boot$ make coreboot_config make: *** No rule to make target `coreboot_config'. Stop. make: *** [coreboot_config] Error 1 Please help me to build u-boot for coreboot. Happy Weekend! Thank you! Best Regards, Manohar 8790215215 -Original Message- From: Graeme Russ graeme.r...@gmail.com Sent: Friday, November 23, 2012 4:23pm To: manohar.bet...@smartplayin.com Cc: Marek Vasut ma...@denx.de, u-boot@lists.denx.de, Simon Glass s...@chromium.org Subject: Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen Hi Manohar, On 11/23/2012 09:10 PM, manohar.bet...@smartplayin.com wrote: Dear Graeme, Thank you! I downloaded the u-boot-x86 on Ubuntu 11.10 loaded(Linux smart-OptiPlex-390 3.0.0-26-generic x86_64 GNU/Linux) intel i5 M1H61R-MB montherboard from the given below link. http://git.denx.de/?p=u-boot/u-boot-x86.git;a=summary Depending on when you downloaded it, you may not have the latest mainline which is at: http://git.denx.de/?p=u-boot.git;a=summary Nevertheless, you will have the latest x86 patches and yes I am planning to run u-boot on x86_64 machine and my target is also x86_64 machine are the same . cd u-boot-x86 Hmm, I don't think U-Boot is what your after. There are a few problems you will be faced with: - There is no ACPI support (no power management) - No System Management Mode (SMM) support - No chipset support (No RAM initialisation) - No Cache-As-RAM init code Unless you have at least these covered, you will brick your board if you try to flash U-Boot. You might instead take a look at coreboot opened the boards.config file and appended my board details in the config file . MIH61R-MBx86 x86MIH61R-MB GenuineIntel - # Target ARCHCPU Board name VendorSoC Options and then run the below commands and i didnot modify any code other than that above line. . manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ vim boards.cfg manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ make distclean /bin/bash: i386-linux-gcc: command not found /bin/bash: i386-linux-gcc: command not found [snip] Ah, I now see that the patch I thought had been applied has not :( You will need this patch: http://patchwork.ozlabs.org/patch/155727/ Regards, Graeme ... Please help me what are the files i need to modify and provide me the documentation. Thank you! Best Regards, Manohar 8790215215 -Original Message- From: Graeme Russ graeme.r...@gmail.com Sent: Friday, November 23, 2012 12:12pm To: manohar.bet...@smartplayin.com Cc: Marek Vasut ma...@denx.de, u-boot@lists.denx.de Subject: Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen Hi Manohar, On 11/23/2012 04:46 PM, manohar.bet...@smartplayin.com wrote: Dear Marek, Thank you for the reply. Can you please send me the steps/procedure to build/support u-boot on x86_64 bit (Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz. I build the x86 U-Boot target on an x86_64 i7 Linux (Fedora) system using the standard GNU gcc package. There was an issue with the Makefile and there was a need to manually create some toolchain symlinks, but the was rectified some time ago. Are you using the latest mainline U-Boot from git.denx.de? If so, what errors are you getting - please provide a copy of your build output. We need help from you is there any documentation to enable x86_64 bit pc or links to post my query. What are the config/code i need to change to make my pc as host target are the same. Are you planning on running U-Boot on an x86_64 machine? If so, you will need to create code to support that - Current U-Boot only supports 32-bit x86 targets. The sandbox target (designed for testing on a Linux host, not for downloading onto a board) should run on an x86_64 host. Please help us to build the u-boot on x86_64. Please provide more detail - what have you tried? What was the result? The build scripts should work as is on a properly configured x86_64 build machine Regards, Graeme P.S. Please stop top posting - thanks Thank you! Best
Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen
Dear Graeme, I am getting the below error once after build with coreboot.Please help me. ..only error part copied. ld.bfd --emit-relocs -Bsymbolic -Bsymbolic-functions -m elf_i386 -r -o libserial.o ns16550.o serial.o serial_ns16550.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/serial' make -C drivers/spi/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/spi' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/spi' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/spi' rm -f libspi.o; ar rcs libspi.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/spi' make -C drivers/twserial/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/twserial' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/twserial' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/twserial' rm -f libtws.o; ar rcs libtws.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/twserial' make -C drivers/usb/eth/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/eth' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/eth' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/eth' rm -f libusb_eth.o; ar rcs libusb_eth.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/eth' make -C drivers/usb/gadget/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/gadget' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/gadget' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/gadget' rm -f libusb_gadget.o; ar rcs libusb_gadget.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/gadget' make -C drivers/usb/host/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/host' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/host' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/host' rm -f libusb_host.o; ar rcs libusb_host.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/host' make -C drivers/usb/musb/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/musb' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/musb' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/musb' rm -f libusb_musb.o; ar rcs libusb_musb.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/musb' make -C drivers/usb/phy/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/phy' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/phy' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/phy' rm -f libusb_phy.o; ar rcs libusb_phy.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/phy' make -C drivers/usb/ulpi/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/ulpi' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/ulpi' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/ulpi' rm -f libusb_ulpi.o; ar rcs libusb_ulpi.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/usb/ulpi' make -C drivers/video/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/video' cat /dev/null .depend make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/video' make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/video' rm -f libvideo.o; ar rcs libvideo.o make[1]: Leaving directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/video' make -C drivers/watchdog/ make[1]: Entering directory `/home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/drivers/watchdog' cat /dev/null .depend make[1]: Leaving directory
[U-Boot] [RFC/PATCH 0/4] BCH8 support for OMAP3
This RFC series implements BCH8 for OMAP3 as provided by linux kernel in commit 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c. This series is heavily influenced by Ilyas series 'NAND support for AM33XX' thus could share some code. I have managed to load kernel from an ubifs written by the kernel driver, but is far away from tested thoroughly. Cause my NAND device 'NAND device: Manufacturer ID: 0x2c, Chip ID: 0xbc (Micron NAND 512MiB 1,8V 16-bit)' does support 1bit ECC for first sector if erase is less than 1000, the rest requires 4bit ECC. Therefore the SPL needs to support BCH, the impact is about 9k for the SPL. Andreas Bießmann (4): omap3/cpu.h: add BCH support omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel omap_gpmc: add support for hw assisted BCH8 tricorder: enable hw assisted BCH8 in SPL and u-boot arch/arm/cpu/armv7/omap3/board.c|8 +- arch/arm/include/asm/arch-omap3/cpu.h |6 + arch/arm/include/asm/arch-omap3/omap_gpmc.h | 12 ++ drivers/mtd/nand/omap_gpmc.c| 216 ++- include/configs/tricorder.h | 10 +- lib/Makefile|3 +- 6 files changed, 248 insertions(+), 7 deletions(-) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC/PATCH 1/4] omap3/cpu.h: add BCH support
This patch adds the BCH result registers to register mapping for OMAP3 gpmc.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Cc: Tom Rini tr...@ti.com
Cc: Ilya Yanok ilya.ya...@cogentembedded.com
Cc: Scott Wood scottw...@freescale.com
---
arch/arm/include/asm/arch-omap3/cpu.h |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/cpu.h
b/arch/arm/include/asm/arch-omap3/cpu.h
index 5683e16..c601873 100644
--- a/arch/arm/include/asm/arch-omap3/cpu.h
+++ b/arch/arm/include/asm/arch-omap3/cpu.h
@@ -109,6 +109,10 @@ struct gpmc_cs {
u8 res[8]; /* blow up to 0x30 byte */
};
+struct bch_res_0_3 {
+ u32 bch_result_x[4];
+};
+
struct gpmc {
u8 res1[0x10];
u32 sysconfig; /* 0x10 */
@@ -135,6 +139,8 @@ struct gpmc {
u32 ecc7_result;/* 0x218 */
u32 ecc8_result;/* 0x21C */
u32 ecc9_result;/* 0x220 */
+ u8 res7[0x1C]; /* fill up to 0x240 */
+ struct bch_res_0_3 bch_result_0_3[7]; /* 0x240 */
};
/* Used for board specific gpmc initialization */
--
1.7.10.4
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[U-Boot] [RFC/PATCH 2/4] omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel
This patch adds BCH8 ooblayout for NAND as provided by
0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is
currently only provided for 64 byte OOB.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Cc: Tom Rini tr...@ti.com
Cc: Ilya Yanok ilya.ya...@cogentembedded.com
Cc: Scott Wood scottw...@freescale.com
---
arch/arm/include/asm/arch-omap3/omap_gpmc.h | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/omap_gpmc.h
b/arch/arm/include/asm/arch-omap3/omap_gpmc.h
index 800e4ee..3a3abdf 100644
--- a/arch/arm/include/asm/arch-omap3/omap_gpmc.h
+++ b/arch/arm/include/asm/arch-omap3/omap_gpmc.h
@@ -80,6 +80,18 @@
}
#endif
+/* use the same layout here as he kernel does (ecc bytes at oob tail) */
+#define GPMC_NAND_HW_BCH8_ECC_LAYOUT {\
+ .eccbytes = 56,\
+ .eccpos = {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,\
+ 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,\
+ 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,\
+ 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63},\
+ .oobfree = {\
+ {.offset = 2,\
+.length = 10 } } \
+}
+
/* GPMC CS configuration for an SMSC LAN9221 ethernet controller */
#define NET_LAN9221_GPMC_CONFIG10x1000
#define NET_LAN9221_GPMC_CONFIG20x00060700
--
1.7.10.4
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[U-Boot] [RFC/PATCH 3/4] omap_gpmc: add support for hw assisted BCH8
The BCH for OMAP3 is implemented as the linux kernel in
0e618ef0a6a33cf7ef96c2c824402088dd8ef48c does.
The kernel states:
---8---
The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not
provide automatic error location and correction: this step is implemented using
the BCH library.
---8---
And we do so in u-boot.
This implementation uses the same layout for BCH8 but it is fix. The current
provided layout does only work with 64 Byte OOB.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Cc: Tom Rini tr...@ti.com
Cc: Ilya Yanok ilya.ya...@cogentembedded.com
Cc: Scott Wood scottw...@freescale.com
---
This patch has some debug stuff in which should be cleaned up.
arch/arm/cpu/armv7/omap3/board.c |8 +-
drivers/mtd/nand/omap_gpmc.c | 216 +-
lib/Makefile |3 +-
3 files changed, 223 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index f3cd81a..22286c0 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -330,8 +330,10 @@ static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int
argc, char * const arg
{
if (argc != 2)
goto usage;
- if (strncmp(argv[1], hw, 2) == 0)
+ if (strncmp(argv[1], hw1, 3) == 0)
omap_nand_switch_ecc(1);
+ else if (strncmp(argv[1], hw2, 3) == 0)
+ omap_nand_switch_ecc(2);
else if (strncmp(argv[1], sw, 2) == 0)
omap_nand_switch_ecc(0);
else
@@ -347,7 +349,9 @@ usage:
U_BOOT_CMD(
nandecc, 2, 1, do_switch_ecc,
switch OMAP3 NAND ECC calculation algorithm,
- [hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc
algorithm
+ [hw1/hw2/sw] - Switch between NAND hardware (hw1 - 1bit hamming),\n
+ \tNAND hardware assisted BCH8 (hw2 - 8bit BCH)\n
+ \tor software (sw) ecc algorithm
);
#endif /* CONFIG_NAND_OMAP_GPMC !CONFIG_SPL_BUILD */
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index f1469d1..a5ab046 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -27,6 +27,7 @@
#include asm/arch/mem.h
#include asm/arch/omap_gpmc.h
#include linux/mtd/nand_ecc.h
+#include linux/bch.h
#include linux/compiler.h
#include nand.h
@@ -234,12 +235,194 @@ static void __maybe_unused omap_enable_hwecc(struct
mtd_info *mtd, int32_t mode)
}
}
+/*
+ * basic BCH8 support
+ */
+#ifdef CONFIG_NAND_OMAP_BCH8
+static struct nand_ecclayout hw_bch8_nand_oob = GPMC_NAND_HW_BCH8_ECC_LAYOUT;
+
+/*
+ * omap_init_hwecc_bch - Initialize the BCH Hardware ECC for NAND flash in
+ * GPMC controller
+ * @mtd: MTD device structure
+ * @mode: Read/Write mode
+ */
+static void omap_init_hwecc_bch(struct nand_chip *chip, int32_t mode)
+{
+ uint32_t val, dev_width = (chip-options NAND_BUSWIDTH_16) 1;
+
+ /* Clear the ecc result registers, select ecc reg as 1 */
+ writel(ECCCLEAR | ECCRESULTREG1, gpmc_cfg-ecc_control);
+
+ /*
+* When using BCH, sector size is hardcoded to 512 bytes.
+* Here we are using wrapping mode 6 both for reading and writing, with:
+* size0 = 0 (no additional protected byte in spare area)
+* size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
+*/
+ writel((32 22) | (0 12), gpmc_cfg-ecc_size_config);
+
+ /* BCH configuration */
+ val = ((1 16) | /* enable BCH */
+ (1 12) | /* set fix to BCH8 */
+ (0x06 8) | /* wrap mode = 6 */
+ (dev_width 7) | /* bus width */
+ (0 4) | /* number of sectors (we use
1 sector)*/
+ (cs 1) | /* ECC CS */
+ (0x1));/* enable ECC */
+// debug(set ECC_CONFIG = 0x%08x\n, val);
+ writel(val, gpmc_cfg-ecc_config);
+}
+
+/**
+ * omap3_enable_hwecc_bch - Program OMAP3 GPMC to perform BCH ECC correction
+ * @mtd: MTD device structure
+ * @mode: Read/Write mode
+ */
+static void omap_enable_hwecc_bch(struct mtd_info *mtd, int32_t mode)
+{
+ struct nand_chip *chip = mtd-priv;
+
+ omap_init_hwecc_bch(chip, mode);
+ /* enable ecc */
+ writel((readl(gpmc_cfg-ecc_config) | 0x1), gpmc_cfg-ecc_config);
+}
+
+/*
+ * omap_ecc_disable - Disable H/W ECC calculation
+ *
+ * @mtd: MTD device structure
+ *
+ */
+static void omap_ecc_disable(struct mtd_info *mtd)
+{
+ writel((readl(gpmc_cfg-ecc_config) ~0x1),
+ gpmc_cfg-ecc_config);
+}
+
+/*
+ * omap_calculate_ecc_bch - Read BCH ECC result
+ *
+ * @mtd: MTD device structure
+ * @dat: The pointer to data on which ecc is computed (unused here)
+ * @ecc: The ECC output buffer
+ */
[U-Boot] [RFC/PATCH 4/4] tricorder: enable hw assisted BCH8 in SPL and u-boot
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Cc: Tom Rini tr...@ti.com
Cc: Thomas Weber we...@corscience.de
Cc: Ilya Yanok ilya.ya...@cogentembedded.com
Cc: Scott Wood scottw...@freescale.com
---
include/configs/tricorder.h | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 4e4e089..9b8fe14 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -128,6 +128,8 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
+#define CONFIG_NAND_OMAP_BCH8
+#define CONFIG_BCH
/* commands to include */
#include config_cmd_default.h
@@ -354,11 +356,13 @@
#define CONFIG_SYS_NAND_OOBSIZE64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
- 10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,
21, 22,\
+ 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,\
+ 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,\
+ 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}
#define CONFIG_SYS_NAND_ECCSIZE512
-#define CONFIG_SYS_NAND_ECCBYTES 3
+#define CONFIG_SYS_NAND_ECCBYTES 13
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
--
1.7.10.4
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[U-Boot] [PATCH 1/2] OMAP3: fix panel timing on the mt_ventoux board
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 9622a81..98b92f3 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -73,10 +73,10 @@ static struct {
static struct panel_config lcd_cfg[] = {
{
- .timing_h = PANEL_TIMING_H(4, 8, 41),
- .timing_v = PANEL_TIMING_V(2, 4, 10),
- .pol_freq = 0x, /* Pol Freq */
- .divisor= 0x0001000d, /* 33Mhz Pixel Clock */
+ .timing_h = PANEL_TIMING_H(40, 5, 2),
+ .timing_v = PANEL_TIMING_V(8, 8, 2),
+ .pol_freq = 0x3000, /* Pol Freq */
+ .divisor= 0x00010033, /* 9 Mhz Pixel Clock */
.panel_type = 0x01, /* TFT */
.data_lines = 0x03, /* 24 Bit RGB */
.load_mode = 0x02, /* Frame Mode */
--
1.7.9.5
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[U-Boot] [PATCH 2/2] OMAP3: TAM3517: add macros for reading eeprom
Added macros to read SOM information from the I2C
EEPROM.
Signed-off-by: Stefano Babic sba...@denx.de
---
board/technexion/twister/twister.c | 10 --
board/teejet/mt_ventoux/mt_ventoux.c | 15 ++---
include/configs/tam3517-common.h | 58 +-
3 files changed, 60 insertions(+), 23 deletions(-)
diff --git a/board/technexion/twister/twister.c
b/board/technexion/twister/twister.c
index 1471559..c9eea9b 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -98,9 +98,12 @@ int board_init(void)
return 0;
}
+#ifndef CONFIG_SPL_BUILD
int misc_init_r(void)
{
char *eth_addr;
+ struct tam3517_module_info info;
+ int ret;
dieid_num_r();
@@ -108,12 +111,13 @@ int misc_init_r(void)
if (eth_addr)
return 0;
-#ifndef CONFIG_SPL_BUILD
- TAM3517_READ_MAC_FROM_EEPROM;
-#endif
+ TAM3517_READ_EEPROM(info, ret);
+ if (!ret)
+ TAM3517_READ_MAC_FROM_EEPROM(info);
return 0;
}
+#endif
/*
* Routine: set_muxconf_regs
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 98b92f3..c516c75 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -258,21 +258,26 @@ int board_init(void)
return 0;
}
+#ifndef CONFIG_SPL_BUILD
int misc_init_r(void)
{
char *eth_addr;
+ struct tam3517_module_info info;
+ int ret;
+ TAM3517_READ_EEPROM(info, ret);
dieid_num_r();
- eth_addr = getenv(ethaddr);
- if (eth_addr)
+ if (ret)
return 0;
+ eth_addr = getenv(ethaddr);
+ if (!eth_addr)
+ TAM3517_READ_MAC_FROM_EEPROM(info);
-#ifndef CONFIG_SPL_BUILD
- TAM3517_READ_MAC_FROM_EEPROM;
-#endif
+ TAM3517_PRINT_SOM_INFO(info);
return 0;
}
+#endif
/*
* Routine: set_muxconf_regs
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index dd7757c..a3e84a3 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -357,7 +357,6 @@
* I2C EEPROM
*/
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
-
/*
* The I2C EEPROM on the TAM3517 contains
* mac address and production data
@@ -383,24 +382,29 @@ struct tam3517_module_info {
unsigned char _rev[100];
};
-#define TAM3517_READ_MAC_FROM_EEPROM \
-do { \
- struct tam3517_module_info info;\
- char buf[80], ethname[20]; \
- int i; \
+#define TAM3517_READ_EEPROM(info, ret) \
+do { \
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
- (void *)info, sizeof(info))) \
- break; \
+ (void *)info, sizeof(*info))) \
+ ret = 1;\
+ else\
+ ret = 0;\
+} while (0)
+
+#define TAM3517_READ_MAC_FROM_EEPROM(info) \
+do { \
+ char buf[80], ethname[20]; \
+ int i; \
memset(buf, 0, sizeof(buf));\
- for (i = 0 ; i ARRAY_SIZE(info.eth_addr); i++) { \
+ for (i = 0 ; i ARRAY_SIZE((info)-eth_addr); i++) { \
sprintf(buf, %02X:%02X:%02X:%02X:%02X:%02X, \
- info.eth_addr[i][5],\
- info.eth_addr[i][4],\
- info.eth_addr[i][3],\
- info.eth_addr[i][2],\
- info.eth_addr[i][1],\
- info.eth_addr[i][0]); \
+ (info)-eth_addr[i][5], \
+ (info)-eth_addr[i][4], \
+ (info)-eth_addr[i][3], \
+ (info)-eth_addr[i][2], \
+ (info)-eth_addr[i][1], \
+ (info)-eth_addr[i][0]);\
\
if (i) \
sprintf(ethname, eth%daddr, i); \
@@ -410,6 +414,30 @@ do { \
setenv(ethname, buf); \
}
[U-Boot] [PATCH v4 2/3] OMAP3: drop CONFIG_SPL_OS_BOOT_KEY and use local define
CONFIG_SPL_OS_BOOT_KEY is used only in board files. It is
not required to have a general CONFIG_ option. Rename it and
define it in board directory.
Signed-off-by: Stefano Babic sba...@denx.de
---
board/technexion/twister/twister.c |8
board/technexion/twister/twister.h |2 ++
board/timll/devkit8000/devkit8000.c |8
board/timll/devkit8000/devkit8000.h |3 +++
include/configs/devkit8000.h|1 -
include/configs/twister.h |1 -
6 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/board/technexion/twister/twister.c
b/board/technexion/twister/twister.c
index 1471559..bbc29b7 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -161,10 +161,10 @@ void spl_board_prepare_for_linux(void)
int spl_start_uboot(void)
{
int val = 0;
- if (!gpio_request(CONFIG_SPL_OS_BOOT_KEY, U-Boot key)) {
- gpio_direction_input(CONFIG_SPL_OS_BOOT_KEY);
- val = gpio_get_value(CONFIG_SPL_OS_BOOT_KEY);
- gpio_free(CONFIG_SPL_OS_BOOT_KEY);
+ if (!gpio_request(SPL_OS_BOOT_KEY, U-Boot key)) {
+ gpio_direction_input(SPL_OS_BOOT_KEY);
+ val = gpio_get_value(SPL_OS_BOOT_KEY);
+ gpio_free(SPL_OS_BOOT_KEY);
}
return val;
}
diff --git a/board/technexion/twister/twister.h
b/board/technexion/twister/twister.h
index a2051c0..cff479c 100644
--- a/board/technexion/twister/twister.h
+++ b/board/technexion/twister/twister.h
@@ -38,6 +38,8 @@ const omap3_sysinfo sysinfo = {
#define XR16L2751_UART1_BASE 0x2100
#define XR16L2751_UART2_BASE 0x2300
+/* GPIO used to select between U-Boot and kernel */
+#define SPL_OS_BOOT_KEY55
/*
* IEN - Input Enable
diff --git a/board/timll/devkit8000/devkit8000.c
b/board/timll/devkit8000/devkit8000.c
index 35f5e15..d8e7ebe 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -172,10 +172,10 @@ void spl_board_prepare_for_linux(void)
int spl_start_uboot(void)
{
int val = 0;
- if (!gpio_request(CONFIG_SPL_OS_BOOT_KEY, U-Boot key)) {
- gpio_direction_input(CONFIG_SPL_OS_BOOT_KEY);
- val = gpio_get_value(CONFIG_SPL_OS_BOOT_KEY);
- gpio_free(CONFIG_SPL_OS_BOOT_KEY);
+ if (!gpio_request(SPL_OS_BOOT_KEY, U-Boot key)) {
+ gpio_direction_input(SPL_OS_BOOT_KEY);
+ val = gpio_get_value(SPL_OS_BOOT_KEY);
+ gpio_free(SPL_OS_BOOT_KEY);
}
return !val;
}
diff --git a/board/timll/devkit8000/devkit8000.h
b/board/timll/devkit8000/devkit8000.h
index aa69e6c..c1965e2 100644
--- a/board/timll/devkit8000/devkit8000.h
+++ b/board/timll/devkit8000/devkit8000.h
@@ -32,6 +32,9 @@ const omap3_sysinfo sysinfo = {
NAND,
};
+/* GPIO used to select between U-Boot and kernel */
+#define SPL_OS_BOOT_KEY26
+
/*
* IEN - Input Enable
* IDIS - Input Disable
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index da3263f..54b5eeb 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -353,7 +353,6 @@
/* SPL OS boot options */
#define CONFIG_SPL_OS_BOOT
-#define CONFIG_SPL_OS_BOOT_KEY 26
#define CONFIG_CMD_SPL
#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
diff --git a/include/configs/twister.h b/include/configs/twister.h
index a852481..4205a11 100644
--- a/include/configs/twister.h
+++ b/include/configs/twister.h
@@ -58,7 +58,6 @@
#define CONFIG_CMD_SPL_NAND_OFS(CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
0x60)
#define CONFIG_SPL_OS_BOOT
-#define CONFIG_SPL_OS_BOOT_KEY 55
#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
#define CONFIG_SPL_BOARD_INIT
--
1.7.9.5
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[U-Boot] [PATCH v4 3/3] SPL: Change description for spl command
Add a more descriptive text to the help of the spl command. Signed-off-by: Stefano Babic sba...@denx.de --- common/cmd_spl.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/common/cmd_spl.c b/common/cmd_spl.c index 9ec054a..b3d9834 100644 --- a/common/cmd_spl.c +++ b/common/cmd_spl.c @@ -182,7 +182,11 @@ static int do_spl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) U_BOOT_CMD( spl, 6 , 1, do_spl, SPL configuration, - export img=atags|fdt [kernel_addr] [initrd_addr] - [fdt_addr if img = fdt] - export a kernel parameter image\n - \t initrd_img can be set to \-\ if fdt_addr without initrd img is - used); + export img=atags|fdt [kernel_addr] [initrd_addr] [fdt_addr]\n + \timg\t\t\atags\ or \fdt\\n + \tkernel_addr\taddress where a kernel image is stored.\n + \t\t\tkernel is loaded as part of the boot process, but it is not started.\n + \tinitrd_addr\taddress of initial ramdisk\n + \t\t\tcan be set to \-\ if fdt_addr without initrd_addr is used.\n + \tfdt_addr\tin case of fdt, the address of the device tree.\n + ); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/3] Add README for the Falcon mode
Simple howto to add support to a board for booting the kernel from SPL (Falcon mode). Signed-off-by: Stefano Babic sba...@denx.de --- Changes in v4: - fix capitalization, styling, in spl help (Andreas Biessmann) - move CONFIG_SPL_OS_BOOT before function in doc (Andreas Biessmann) Changes in v3: - parameter initrd_addr was removed in V2 (Andreas Biessmann) - added patch to fix help usage for spl export (Andreas Biessmann) - Added empty lines (Otavio Salvador) - add a more exhaustive description explaining that spl export does not save into media (Lukasz Majewski). Changes in v2: - spelling, language fixes (Andreas Biessman) - rewrite some unclear sentences - drop CONFIG_SPL_OS_BOOT_KEY - make example with twister more exhaustive doc/README.falcon | 173 + 1 file changed, 173 insertions(+) create mode 100644 doc/README.falcon diff --git a/doc/README.falcon b/doc/README.falcon new file mode 100644 index 000..1c041ea --- /dev/null +++ b/doc/README.falcon @@ -0,0 +1,173 @@ +U-Boot Falcon Mode + + +Introduction + + +This document provides an overview how to add support for Falcon Mode +to a board. +Falcon Mode is introduced to speed up the booting process, allowing +to boot a Linux kernel (or whatever image) without a full blown U-Boot. + +Falcon Mode relies on the SPL framework. In fact, to make booting faster, +U-Boot is split into two parts: the SPL (Secondary Program Loader) and U-Boot +image. In most implementations, SPL is used to start U-Boot when booting from +a mass storage, such as NAND or SD-Card. SPL has now support for other media, +and can be generalized seen as a way to start an image performing the minimum +required initialization. SPL initializes mainly the RAM controller, and after +that copies U-Boot image into the memory. The Falcon Mode extends this way +allowing to start the Linux kernel directly from SPL. A new command is added +to U-Boot to prepare the parameters that SPL must pass to the kernel, using +ATAGS or Device Tree. + +Falcon Mode adds a command under U-Boot to reuse all code responsible to prepare +the interface with the kernel. In usual U-Boot systems, these parameters are +generated each time before loading the kernel, passing to Linux the address +in memory where the parameters can be read. +With Falcon Mode, this snapshot can be saved into persistent storage and SPL is +informed to load it before running the kernel. + +To boot the kernel, these steps under a Falcon-aware U-Boot are required: + +1. Boot the board into U-Boot. +Use the spl export command to generate the kernel parameters area or the DT. +U-Boot runs as when it boots the kernel, but stops before passing the control +to the kernel. + +2. Save the prepared snapshot into persistent media. +The address where to save it must be configured into board configuration +file (CONFIG_CMD_SPL_NAND_OFS for NAND). + +3. Boot the board into Falcon Mode. SPL will load the kernel and copy +the parameters area to the required address. + +It is required to implement a custom mechanism to select if SPL loads U-Boot +or another image. + +The value of a GPIO is a simple way to operate the selection, as well as +reading a character from the SPL console if CONFIG_SPL_CONSOLE is set. + +Falcon Mode is generally activated by setting CONFIG_SPL_OS_BOOT. This tells +SPL that U-Boot is not the only available image that SPL is able to start. + +Configuration + +CONFIG_CMD_SPL Enable the spl export command. + The command spl export is then available in U-Boot + mode +CONFIG_SYS_SPL_ARGS_ADDR Address in RAM where the parameters must be + copied by SPL. + In most cases, it is start_of_ram + 0x100 + +CONFIG_SYS_NAND_SPL_KERNEL_OFFSOffset in NAND where the kernel is stored + +CONFIG_CMD_SPL_NAND_OFSOffset in NAND where the parameters area was saved. + +CONFIG_CMD_SPL_WRITE_SIZE Size of the parameters area to be copied + +CONFIG_SPL_OS_BOOT Activate Falcon Mode. + A board should implement the following functions: + +Function that a board must implement + + +void spl_board_prepare_for_linux(void) : optional + Called from SPL before starting the kernel + +spl_start_uboot() : required + Returns 0 if SPL starts the kernel, 1 if U-Boot + must be started. + + +Using spl command +- + +spl - SPL configuration + +Usage: + +spl export img=atags|fdt [kernel_addr] [initrd_addr] [fdt_addr ] + +img: atags or fdt +kernel_addr: kernel is loaded as part of the boot process, but it is not started. + This is the address where a kernel image is stored. +initrd_addr: Address of initial ramdisk + can be set to - if fdt_addr without initrd img
Re: [U-Boot] [PATCH v2 3/4] Drivers: block: Support for SATA in Exynos5
Hi Vasanth,
On Fri, Nov 23, 2012 at 05:38:57PM +0530, Vasanth Ananthan wrote:
This patch provides support for SATA in Exynos5250
Signed-off-by: Vasanth Ananthan vasant...@samsung.com
---
drivers/block/dwc_ahsata.c | 394
+++-
1 file changed, 387 insertions(+), 7 deletions(-)
diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c
index c9b71f7..5125134 100644
--- a/drivers/block/dwc_ahsata.c
+++ b/drivers/block/dwc_ahsata.c
@@ -35,6 +35,69 @@
#include asm/arch/clock.h
#include dwc_ahsata.h
+
+#define bool unsigned char
+#define false0
+#define true 1
Do we really need this ? And if yes we should put it somewhere else.
Bellow are some cosmetic comments...
+#ifdef SATA_DEBUG
+#define debug(fmt, args...) printf(fmt, ##args)
+#else
+#define debug(fmt, args...)
+#endif /* MKIMAGE_DEBUG */
+
+#define MAX_DATA_BYTES_PER_SG (4 * 1024 * 1024)
+#define MAX_BYTES_PER_TRANS (AHCI_MAX_SG * MAX_DATA_BYTES_PER_SG)
+
+#define writel_with_flush(a, b) do { writel(a, b); readl(b); } while (0)
+
+#define EXYNOS5_SATA_PHY_CONTROL (0x1004 + 0x724)
+#define S5P_PMU_SATA_PHY_CONTROL_EN 0x1
+
+#define SATA_TIME_LIMIT 1
+#define SATA_PHY_I2C_SLAVE_ADDRS 0x70
+
+#define SATA_RESET 0x4
+#define RESET_CMN_RST_N (1 1)
+#define LINK_RESET 0xF
+
+#define SATA_MODE0 0x10
+
+#define SATA_CTRL0 0x14
+#define CTRL0_P0_PHY_CALIBRATED_SEL (1 9)
+#define CTRL0_P0_PHY_CALIBRATED (1 8)
+
+#define SATA_PHSATA_CTRLM0xE0
+#define PHCTRLM_REF_RATE (1 1)
+#define PHCTRLM_HIGH_SPEED (1 0)
+
+#define SATA_PHSATA_STATM0xF0
+#define PHSTATM_PLL_LOCKED (1 0)
+
+#define SATA_I2C_CON 0x00
+#define SATA_I2C_STAT0x04
+#define SATA_I2C_ADDR0x08
+#define SATA_I2C_DS 0x0C
+#define SATA_I2C_LC 0x10
+
+/* I2CCON reg */
+#define CON_ACKEN(1 7)
+#define CON_CLK512 (1 6)
+#define CON_CLK16(~CON_CLK512)
+#define CON_INTEN(1 5)
+#define CON_INTPND (1 4)
+#define CON_TXCLK_PS (0xF)
+
+/* I2CSTAT reg */
+#define STAT_MSTT(0x3 6)
+#define STAT_BSYST (1 5)
+#define STAT_RTEN(1 4)
+#define STAT_LAST(1 0)
+
+#define LC_FLTR_EN (1 2)
+
+#define SATA_PHY_CON_RESET 0xF003F
+
struct sata_port_regs {
u32 clb;
u32 clbu;
@@ -88,10 +151,244 @@ struct sata_host_regs {
u32 idr;
};
-#define MAX_DATA_BYTES_PER_SG (4 * 1024 * 1024)
-#define MAX_BYTES_PER_TRANS (AHCI_MAX_SG * MAX_DATA_BYTES_PER_SG)
+void * const phy_ctrl = (void *)EXYNOS5_SATA_PHY_BASE;
+void * const phy_i2c_base = (void *)EXYNOS5_SATA_PHY_I2C;
-#define writel_with_flush(a, b) do { writel(a, b); readl(b); } while (0)
+enum {
+ SATA_GENERATION1,
+ SATA_GENERATION2,
+ SATA_GENERATION3,
+};
+
+static bool sata_is_reg(void *base, u32 reg, u32 checkbit, u32 status)
+{
+ if ((readl(base + reg) checkbit) == status)
+ return true;
+ else
+ return false;
+}
+
+static bool wait_for_reg_status(void *base, u32 reg, u32 checkbit,
+ u32 status)
+{
+ u32 time_limit_cnt = 0;
+ while (!sata_is_reg(base, reg, checkbit, status)) {
+ if (time_limit_cnt == SATA_TIME_LIMIT)
+ return false;
+ udelay(1000);
+ time_limit_cnt++;
+ }
+ return true;
+}
+
+static void sata_set_gen(u8 gen)
+{
+ writel(gen, phy_ctrl + SATA_MODE0);
+}
+
+/* Address :I2C Address */
+static void sata_i2c_write_addrs(u8 data)
+{
+ writeb((data 0xFE), phy_i2c_base + SATA_I2C_DS);
+}
+
+static void sata_i2c_write_data(u8 data)
+{
+ writeb((data), phy_i2c_base + SATA_I2C_DS);
+}
+
+static void sata_i2c_start(void)
+{
+ u32 val;
+ val = readl(phy_i2c_base + SATA_I2C_STAT);
+ val |= STAT_BSYST;
+ writel(val, phy_i2c_base + SATA_I2C_STAT);
+}
+
+static void sata_i2c_stop(void)
+{
+ u32 val;
+ val = readl(phy_i2c_base + SATA_I2C_STAT);
+ val = ~STAT_BSYST;
+ writel(val, phy_i2c_base + SATA_I2C_STAT);
+}
+
+static bool sata_i2c_get_int_status(void)
+{
+ if ((readl(phy_i2c_base + SATA_I2C_CON)) CON_INTPND)
+ return true;
+ else
+ return false;
+}
+
+static bool sata_i2c_is_tx_ack(void)
+{
+ if ((readl(phy_i2c_base + SATA_I2C_STAT)) STAT_LAST)
+ return false;
+ else
+ return true;
+}
+
+static bool sata_i2c_is_bus_ready(void)
+{
+ if
Re: [U-Boot] [PATCH v4 1/3] Add README for the Falcon mode
Hi Stefano, Sorry for bumping in at v4. Below are some of my comments. On 11/23/2012 9:01 PM, Stefano Babic wrote: Simple howto to add support to a board for booting the kernel from SPL (Falcon mode). Signed-off-by: Stefano Babicsba...@denx.de --- Changes in v4: - fix capitalization, styling, in spl help (Andreas Biessmann) - move CONFIG_SPL_OS_BOOT before function in doc (Andreas Biessmann) snip diff --git a/doc/README.falcon b/doc/README.falcon new file mode 100644 index 000..1c041ea --- /dev/null +++ b/doc/README.falcon @@ -0,0 +1,173 @@ +U-Boot Falcon Mode + + +Introduction + + +This document provides an overview how to add support for Falcon Mode s/an overview/an overview of/ +to a board. +Falcon Mode is introduced to speed up the booting process, allowing +to boot a Linux kernel (or whatever image) without a full blown U-Boot. + +Falcon Mode relies on the SPL framework. In fact, to make booting faster, +U-Boot is split into two parts: the SPL (Secondary Program Loader) and U-Boot +image. In most implementations, SPL is used to start U-Boot when booting from +a mass storage, such as NAND or SD-Card. SPL has now support for other media, +and can be generalized seen as a way to start an image performing the minimum Rephrase the above line as, and can generally be seen +required initialization. SPL initializes mainly the RAM controller, and after +that copies U-Boot image into the memory. The Falcon Mode extends this way Rephrase .. SPL mainly initializes the RAM controller, and then copies U-boot image to the main memory. +allowing to start the Linux kernel directly from SPL. A new command is added +to U-Boot to prepare the parameters that SPL must pass to the kernel, using +ATAGS or Device Tree. + +Falcon Mode adds a command under U-Boot to reuse all code responsible to prepare Already it is mentioned that 'a new command is added'. The above line is redundant then. Please rephrase it. +the interface with the kernel. In usual U-Boot systems, these parameters are +generated each time before loading the kernel, passing to Linux the address +in memory where the parameters can be read. +With Falcon Mode, this snapshot can be saved into persistent storage and SPL is +informed to load it before running the kernel. + +To boot the kernel, these steps under a Falcon-aware U-Boot are required: + +1. Boot the board into U-Boot. +Use the spl export command to generate the kernel parameters area or the DT. +U-Boot runs as when it boots the kernel, but stops before passing the control +to the kernel. + +2. Save the prepared snapshot into persistent media. +The address where to save it must be configured into board configuration +file (CONFIG_CMD_SPL_NAND_OFS for NAND). + +3. Boot the board into Falcon Mode. SPL will load the kernel and copy +the parameters area to the required address. copy the parameters which is saved in the persistent media to the + +It is required to implement a custom mechanism to select if SPL loads U-Boot +or another image. + +The value of a GPIO is a simple way to operate the selection, as well as +reading a character from the SPL console if CONFIG_SPL_CONSOLE is set. + +Falcon Mode is generally activated by setting CONFIG_SPL_OS_BOOT. This tells +SPL that U-Boot is not the only available image that SPL is able to start. + +Configuration + +CONFIG_CMD_SPL Enable the spl export command. + The command spl export is then available in U-Boot + mode +CONFIG_SYS_SPL_ARGS_ADDR Address in RAM where the parameters must be + copied by SPL. + In most cases, it isstart_of_ram + 0x100 A space in between is and '' + +CONFIG_SYS_NAND_SPL_KERNEL_OFFSOffset in NAND where the kernel is stored + +CONFIG_CMD_SPL_NAND_OFSOffset in NAND where the parameters area was saved. Can the above be renamed to include the word 'PARAMS'? But becomes lengthy. Any suggestions? + +CONFIG_CMD_SPL_WRITE_SIZE Size of the parameters area to be copied + +CONFIG_SPL_OS_BOOT Activate Falcon Mode. + A board should implement the following functions: Is there a big difference between the line above and the one below? +Function that a board must implement + + +void spl_board_prepare_for_linux(void) : optional + Called from SPL before starting the kernel + +spl_start_uboot() : required + Returns 0 if SPL starts the kernel, 1 if U-Boot + must be started. + + +Using spl command +- + +spl - SPL configuration + +Usage: + +spl exportimg=atags|fdt [kernel_addr] [initrd_addr] [fdt_addr ] + +img: atags or fdt +kernel_addr: kernel is loaded as part of the boot process, but it is not started. + This is the address where a kernel image is stored.
Re: [U-Boot] [PATCH v4 1/3] Add README for the Falcon mode
Dear Vikram Narayanan, On 23.11.12 19:10, Vikram Narayanan wrote: snip +The parameters generated with this step can be saved into NAND at the offset +0x80 (value for twister for CONFIG_CMD_SPL_NAND_OFS) + +nand erase.part bootparms +nand write 0x8100 bootparms 0x4000 If the offset is known at compile time, why should the end user use the above commands to write it? Can't it be automated? Just an idea. No, please read http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/102326 or http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/147205 Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/1] m68k/lib: fix serial driver relocation
Fix coldfire serial driver bindings no more relocated to ram after last changes to drivers/serial/serial.c (regression). Serial initialization in ram has to be called after that gd-reloc_off is calculated. Signed-off-by: Angelo Dureghello sysa...@gmail.com Cc: Jason Jin jason@freescale.com --- diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index 02d73fd..373570c 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -402,14 +402,14 @@ void board_init_r (gd_t *id, ulong dest_addr) gd-flags |= GD_FLG_RELOC; /* tell others: relocation done */ - serial_initialize(); - debug (Now running in RAM - U-Boot at: %08lx\n, dest_addr); WATCHDOG_RESET (); gd-reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE; + serial_initialize(); + monitor_flash_len = (ulong)__init_end - dest_addr; #if defined(CONFIG_NEEDS_MANUAL_RELOC) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] common/xyzmodem.c, ymodem, slow behavior receiving bytes
Dear all, i have found out that this issue was also and probably mainly caused from the issue fixed in my last patch posted: http://patchwork.ozlabs.org/patch/201421/ All serial driver routines (for mcfuart.c in my case) was executed from the flash memory, even after monitor relocation to ram. Considering flash memory access time (10 wait states set in my case), this was causing code execution speed to be dramatically slow, near the limit for receiving at 115200 uart speed. Enabling cache for the sdram fasted up a bit the operations and solved the issue, but main problem here was certainly the execution from flash. Best Regards Angelo Dureghello ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] common/xyzmodem.c, ymodem, slow behavior receiving bytes
Dear Angelo, In message 20121123225721.GA28751@angel3 you wrote: i have found out that this issue was also and probably mainly caused from the issue fixed in my last patch posted: http://patchwork.ozlabs.org/patch/201421/ All serial driver routines (for mcfuart.c in my case) was executed from the flash memory, even after monitor relocation to ram. Considering flash memory access time (10 wait states set in my case), this was causing code execution speed to be dramatically slow, near the limit for receiving at 115200 uart speed. Enabling cache for the sdram fasted up a bit the operations and solved the issue, but main problem here was certainly the execution from flash. Thanks for following up on this! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I often quote myself; it adds spice to my conversation. - G. B. Shaw ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen
Hi, I am getting the following error after running make all for coreboot target,from /usr/bin/ld.bfd.real: skipping incompatible /home/manoharb/Kernel_Tizen/intel_tizen/latest/u-boot/arch/x86/lib/libgcc.a when searching for -lgcc /usr/bin/ld.bfd.real: cannot find -lgcc make: *** [u-boot] Error 1 Please help me. Best Regards, Manohar -Original Message- From: Graeme Russ graeme.r...@gmail.com Sent: Friday, November 23, 2012 4:23pm To: manohar.bet...@smartplayin.com Cc: Marek Vasut ma...@denx.de, u-boot@lists.denx.de, Simon Glass s...@chromium.org Subject: Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen Hi Manohar, On 11/23/2012 09:10 PM, manohar.bet...@smartplayin.com wrote: Dear Graeme, Thank you! I downloaded the u-boot-x86 on Ubuntu 11.10 loaded(Linux smart-OptiPlex-390 3.0.0-26-generic x86_64 GNU/Linux) intel i5 M1H61R-MB montherboard from the given below link. http://git.denx.de/?p=u-boot/u-boot-x86.git;a=summary Depending on when you downloaded it, you may not have the latest mainline which is at: http://git.denx.de/?p=u-boot.git;a=summary Nevertheless, you will have the latest x86 patches and yes I am planning to run u-boot on x86_64 machine and my target is also x86_64 machine are the same . cd u-boot-x86 Hmm, I don't think U-Boot is what your after. There are a few problems you will be faced with: - There is no ACPI support (no power management) - No System Management Mode (SMM) support - No chipset support (No RAM initialisation) - No Cache-As-RAM init code Unless you have at least these covered, you will brick your board if you try to flash U-Boot. You might instead take a look at coreboot opened the boards.config file and appended my board details in the config file . MIH61R-MBx86 x86MIH61R-MB GenuineIntel - # Target ARCHCPU Board name VendorSoC Options and then run the below commands and i didnot modify any code other than that above line. . manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ vim boards.cfg manoharb@smart-OptiPlex-390:~/Kernel_Tizen/intel_tizen/u-boot-x86$ make distclean /bin/bash: i386-linux-gcc: command not found /bin/bash: i386-linux-gcc: command not found [snip] Ah, I now see that the patch I thought had been applied has not :( You will need this patch: http://patchwork.ozlabs.org/patch/155727/ Regards, Graeme ... Please help me what are the files i need to modify and provide me the documentation. Thank you! Best Regards, Manohar 8790215215 -Original Message- From: Graeme Russ graeme.r...@gmail.com Sent: Friday, November 23, 2012 12:12pm To: manohar.bet...@smartplayin.com Cc: Marek Vasut ma...@denx.de, u-boot@lists.denx.de Subject: Re: [U-Boot] Reg Bootstrapping u-boot on x86-64 for tizen Hi Manohar, On 11/23/2012 04:46 PM, manohar.bet...@smartplayin.com wrote: Dear Marek, Thank you for the reply. Can you please send me the steps/procedure to build/support u-boot on x86_64 bit (Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz. I build the x86 U-Boot target on an x86_64 i7 Linux (Fedora) system using the standard GNU gcc package. There was an issue with the Makefile and there was a need to manually create some toolchain symlinks, but the was rectified some time ago. Are you using the latest mainline U-Boot from git.denx.de? If so, what errors are you getting - please provide a copy of your build output. We need help from you is there any documentation to enable x86_64 bit pc or links to post my query. What are the config/code i need to change to make my pc as host target are the same. Are you planning on running U-Boot on an x86_64 machine? If so, you will need to create code to support that - Current U-Boot only supports 32-bit x86 targets. The sandbox target (designed for testing on a Linux host, not for downloading onto a board) should run on an x86_64 host. Please help us to build the u-boot on x86_64. Please provide more detail - what have you tried? What was the result? The build scripts should work as is on a properly configured x86_64 build machine Regards, Graeme P.S. Please stop top posting - thanks Thank you! Best Regards, Manohar 8790215215 -Original Message- From: Marek Vasut ma...@denx.de Sent: Friday, November 23, 2012 6:08am To:
