[U-Boot] uboot ERROR cannot umount.
Hi, I am setting up a nfs boot and I am getting a ***ERROR: Cannot umount. How can I fix this? Details: bootcmd=nfs 0x3100 192.168.1.101:/nfs/rootfs/boot/uImage ; bootm 0x3100 bootargs=console=ttySAC0,38400 root=/dev/nfs nfsroot=192.168.1.101:/nfs/rootfs rw ip=dhcp mini2440=5tb My nfs exports file: /nfs/rootfs 192.168.1.0/24(rw,fsid=0,insecure,no_subtree_check,async,no_root_squash) /nfs/rootfs/boot 192.168.1.0/24(rw,fsid=0,insecure,no_subtree_check,async,no_root_squash) Log: MINI2440 # boot dm9000 i/o: 0x2300, id: 0x9a46 DM9000: running in 16 bit mode MAC: 08:08:11:18:12:27 File transfer via NFS from server 192.168.1.101; our IP address is 192.168.1.110 Filename '/nfs/rootfs/boot/uImage'. Load address: 0x3100 Loading: # # # # # # #*** ERROR: Cannot umount ## Booting kernel from Legacy Image at 3100 ... Image Name: Linux-3.9.2-ptx-master Thanks, Gautam. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] TFTP timeouts, i.mx fec problem?
In fact, it does wait for the link-up bit in miiphy_wait_aneg( ), which is called from fec_open. So after the init and before starting to send the first packet, you notice a delay for about half as second (enabled some debug printing) waiting for this bit to get set and then the phy should be up and running. I tried adding to wait for the the auto-neg complete bit as well, but this doesn't solve it. For some reason, the phy needs like 200 - 600 msecs extra in most cases before the 1st packet can be sent. Some other remark: I get the idea of starting the kernel with a virgin-like phy and mac, which I will not argue about. But in fact the phy is reset and initialised befóre each transfer. After the transfer, the mac is halted, but the phy is not reset again. Also, I am pretty sure (sorry, I'm not at the office right now), that the phy is reset if the kernel starts. I know this because I did some tweaking to the evk dts, where the phy reset pulse can be configured: mac0: ethernet@800f { phy-mode = rmii; pinctrl-names = default; pinctrl-0 = mac0_pins_a; phy-supply = reg_fec_3v3; phy-reset-gpios = gpio4 13 0; phy-reset-duration = 100; status = okay; }; Regards, Ruud -Oorspronkelijk bericht- Van: Troy Kisky [mailto:troy.ki...@boundarydevices.com] Verzonden: vr 31-5-2013 21:09 Aan: Wolfgang Denk CC: Stefano Babic; Ruud Commandeur; U-Boot list Onderwerp: Re: [U-Boot] TFTP timeouts, i.mx fec problem? On 5/31/2013 11:58 AM, Wolfgang Denk wrote: Dear Stefano Babic, In message 51a8c5da.3090...@denx.de you wrote: The question is if there is no better way to wait for the PHY to become (really) ready? The phy is reinitialized after each transaction - the safiest condition to boot afterwards the kernel. Or we need a way to stop the phy only Yes, that is clear, we fully agree on that. But can we not test for autoneogitation completed, link up and running before we send the first packet? Or rather - why do we have this issue appearently only on i.MX? We don't see this on other ARM or on PowerPC? Best regards, Wolfgang Denk Think of this as incentive to convert to the board to PHYLIB. Troy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] ARM: add secure monitor handler to switch to non-secure state
Hi Christoffer, On Fri, 31 May 2013 16:50:09 -0700, Christoffer Dall cd...@cs.columbia.edu wrote: On Fri, May 31, 2013 at 11:23:16AM +0200, Andre Przywara wrote: On 05/31/2013 03:02 AM, Christoffer Dall wrote: This is added later in 5/6. For reviewing purposes I split the patches up to do the non-secure switch only first. Later I add the bits to actually go to HYP mode. The splitting of patches is fine, but it would be helpful to explain the scope a little more in the commit text perhaps, maybe I'm just being silly. That's the point where a cover letter will be very useful in V2. Also, speaking of V2 (and, presumably, later versions), that's where patman will be useful (see tools/patman/README) as it allows one's local branch to contain not only things like cover letter, but also patch history, which will be a must IMO for this series. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] ARM: add secure monitor handler to switch to non-secure state
On Sat, 1 Jun 2013 12:06:24 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Christoffer, On Fri, 31 May 2013 16:50:09 -0700, Christoffer Dall cd...@cs.columbia.edu wrote: On Fri, May 31, 2013 at 11:23:16AM +0200, Andre Przywara wrote: On 05/31/2013 03:02 AM, Christoffer Dall wrote: This is added later in 5/6. For reviewing purposes I split the patches up to do the non-secure switch only first. Later I add the bits to actually go to HYP mode. The splitting of patches is fine, but it would be helpful to explain the scope a little more in the commit text perhaps, maybe I'm just being silly. That's the point where a cover letter will be very useful in V2. Correction: V1 has a cover letter; what I meant and should have said is, that's where an overall description in the cover letter of how commits are organized will be very useful in V2. Also, speaking of V2 (and, presumably, later versions), that's where patman will be useful (see tools/patman/README) as it allows one's local branch to contain not only things like cover letter, but also patch history, which will be a must IMO for this series. Correction: maybe/probably Andre used patman already; in this case, scratch the paragraph above. Apologies for any misunderstanding, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request v2: nand flash
On Fri, May 31, 2013 at 05:17:39PM -0500, Scott Wood wrote: v2: Amended the resync commit due to include/mtd/mtd-abi.h being missing (it was present locally as an uncommitted file, which is why I didn't see build failures). The following changes since commit 8bcb6f43e98ffc76e998349e0ec32a0e359160d4: Update MAINTAINERS file for sandbox (2013-05-17 17:04:39 -0400) are available in the git repository at: git://git.denx.de/u-boot-nand-flash.git master for you to fetch changes up to dfe64e2c89731a3f9950d7acd8681b68df2bae03: mtd: resync with Linux-3.7.1 (2013-05-31 17:12:03 -0500) Harvey Chapman (1): nand: adjust erase/read/write partition/chip size for bad blocks Prabhakar Kushwaha (1): nand/fsl_ifc: Convert to self-init Scott Wood (1): nand/fsl_elbc: detect page size at runtime Sergey Lapin (1): mtd: resync with Linux-3.7.1 htbegin (2): mtd: nand: fix the partial page write condition mtd: nand: use ssize_t instead of size_t to prevent infinite loop board/ait/cam_enc_4xx/cam_enc_4xx.c | 12 +- common/cmd_nand.c | 53 +- common/cmd_onenand.c| 30 +- common/env_onenand.c|6 +- drivers/mtd/Makefile|4 +- drivers/mtd/cfi_mtd.c | 12 +- drivers/mtd/mtdconcat.c | 98 +-- drivers/mtd/mtdcore.c | 191 drivers/mtd/mtdpart.c | 158 ++-- drivers/mtd/nand/atmel_nand.c | 17 +- drivers/mtd/nand/bfin_nand.c|2 + drivers/mtd/nand/davinci_nand.c |4 +- drivers/mtd/nand/diskonchip.c | 13 +- drivers/mtd/nand/fsl_elbc_nand.c| 56 +- drivers/mtd/nand/fsl_ifc_nand.c | 62 +- drivers/mtd/nand/fsmc_nand.c|5 +- drivers/mtd/nand/jz4740_nand.c |1 + drivers/mtd/nand/mpc5121_nfc.c |2 +- drivers/mtd/nand/mxc_nand.c | 25 +- drivers/mtd/nand/mxs_nand.c | 34 +- drivers/mtd/nand/nand_base.c| 1658 --- drivers/mtd/nand/nand_bbt.c | 822 - drivers/mtd/nand/nand_ids.c | 14 +- drivers/mtd/nand/nand_util.c| 26 +- drivers/mtd/nand/ndfc.c |1 + drivers/mtd/nand/nomadik.c |1 + drivers/mtd/nand/omap_gpmc.c|6 +- drivers/mtd/nand/s3c2410_nand.c |1 + drivers/mtd/nand/tegra_nand.c | 27 +- drivers/mtd/nand/tegra_nand.h |2 +- drivers/mtd/onenand/onenand_base.c | 82 +- drivers/mtd/onenand/onenand_bbt.c |6 +- drivers/mtd/ubi/build.c |2 +- drivers/mtd/ubi/eba.c |2 +- drivers/mtd/ubi/io.c| 12 +- drivers/mtd/ubi/kapi.c |2 +- drivers/mtd/ubi/misc.c |2 +- drivers/mtd/ubi/vtbl.c |2 +- fs/yaffs2/yaffs_mtdif.c | 18 +- fs/yaffs2/yaffs_mtdif2.c| 14 +- include/configs/P1022DS.h |2 - include/linux/mtd/bbm.h | 49 +- include/linux/mtd/mtd.h | 203 +++-- include/linux/mtd/nand.h| 173 ++-- include/linux/string.h |3 + include/{linux = }/mtd/mtd-abi.h | 53 +- include/nand.h | 11 +- lib/string.c| 59 ++ 48 files changed, 2307 insertions(+), 1731 deletions(-) rename include/{linux = }/mtd/mtd-abi.h (65%) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] am33xx: Correct NON_SECURE_SRAM_START/END
On Fri, May 31, 2013 at 10:56:52PM +0200, Peter Korsgaard wrote: Tom == Tom Rini tr...@ti.com writes: Tom Prior to Sricharan's cleanup of the boot parameter saving code, we Tom did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a Tom problem that the address was pointing to the middle of our running SPL. Tom Correct to point to the base location of the download image area. Tom Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being Tom used. As part of correcting these tests, make use of the fact that Tom we've always been placing our stack outside of the download image area Tom (which is fine, once the downloaded image is run, ROM is gone) so Tom correct the max size test to be the ROM defined top of the download area Tom to where we link/load at. [snip] Tom + * We limit our size to the ROM-defined dowloaded image area, and use the s/dowloaded/downloaded/ And copy/pasted to the other configs, oops, fixed in all 3. If there's no other feedback, I'll refrain from a v2 posting and just include the typo correction when I merge it middle of next week, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5] ARM: OMAP: I2C: New read, write and probe functions
New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 (4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older OMAPs and derivatives as well. The only anticipated exception would be the OMAP2420, which shall require driver modification. - Rewritten i2c_read to operate correctly with all types of chips (old function could not read consistent data from some I2C slaves). - Optimised i2c_write. - New i2c_probe, performs write access vs read. The old probe could hang the system under certain conditions (e.g. unconfigured pads). - The read/write/probe functions try to identify unconfigured bus. - Status functions now read irqstatus_raw as per TRM guidelines (except for OMAP243X and OMAP34XX). - Driver now supports up to I2C5 (OMAP5). Signed-off-by: Lubomir Popov lpo...@mm-sol.com --- V5 changes: - Replaced some printf() with puts(). - Minor formatting touches, checkpatch-clean. V4 changes: - New i2c_probe is built unconditionally, old code is removed. CONFIG_I2C_PROBE_WRITE is no longer needed. - Added a small delay to work around breakage in AM335X SPL. - Some whitespace and general formatting cleanup. V3 changes: - Removed old functions and conditional compilation. New functions are now built unconditionally for all SoCs using this driver. The only chip that should break is the OMAP2420 dinosaur. - Interrupts are enabled for OMAP243X and OMAP34XX only (where we don't have an irqstatus_raw register). V2 changes: - Probe tries to identify misconfigured pads as well. - Status is retrieved from irqstatus_raw rather than from stat. - Some minor style format changes. drivers/i2c/omap24xx_i2c.c | 490 +++-- 1 file changed, 299 insertions(+), 191 deletions(-) diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index 54e9b15..ef38d71 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -18,6 +18,20 @@ * * Adapted for OMAP2420 I2C, r-woodru...@ti.com * + * Copyright (c) 2013 Lubomir Popov lpo...@mm-sol.com, MM Solutions + * New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 + * (4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older + * OMAPs and derivatives as well. The only anticipated exception would + * be the OMAP2420, which shall require driver modification. + * - Rewritten i2c_read to operate correctly with all types of chips + * (old function could not read consistent data from some I2C slaves). + * - Optimized i2c_write. + * - New i2c_probe, performs write access vs read. The old probe could + * hang the system under certain conditions (e.g. unconfigured pads). + * - The read/write/probe functions try to identify unconfigured bus. + * - Status functions now read irqstatus_raw as per TRM guidelines + * (except for OMAP243X and OMAP34XX). + * - Driver now supports up to I2C5 (OMAP5). */ #include common.h @@ -31,8 +45,11 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_TIMEOUT1000 +/* Absolutely safe for status update at 100 kHz I2C: */ +#define I2C_WAIT 200 + static int wait_for_bb(void); -static u16 wait_for_pin(void); +static u16 wait_for_event(void); static void flush_fifo(void); /* @@ -137,10 +154,14 @@ void i2c_init(int speed, int slaveadd) /* own address */ writew(slaveadd, i2c_base-oa); writew(I2C_CON_EN, i2c_base-con); - - /* have to enable intrrupts or OMAP i2c module doesn't work */ +#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) + /* +* Have to enable interrupts for OMAP2/3, these IPs don't have +* an 'irqstatus_raw' register and we shall have to poll 'stat' +*/ writew(I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | - I2C_IE_NACK_IE | I2C_IE_AL_IE, i2c_base-ie); + I2C_IE_NACK_IE | I2C_IE_AL_IE, i2c_base-ie); +#endif udelay(1000); flush_fifo(); writew(0x, i2c_base-stat); @@ -150,88 +171,6 @@ void i2c_init(int speed, int slaveadd) bus_initialized[current_bus] = 1; } -static int i2c_read_byte(u8 devaddr, u16 regoffset, u8 alen, u8 *value) -{ - int i2c_error = 0; - u16 status; - int i = 2 - alen; - u8 tmpbuf[2] = {(regoffset) 8, regoffset 0xff}; - u16 w; - - /* wait until bus not busy */ - if (wait_for_bb()) - return 1; - - /* one byte only */ - writew(alen, i2c_base-cnt); - /* set slave address */ - writew(devaddr, i2c_base-sa); - /* no stop bit needed here */ - writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | - I2C_CON_TRX, i2c_base-con); - - /* send register offset */ - while (1) { - status = wait_for_pin(); - if (status == 0 || status I2C_STAT_NACK) { - i2c_error = 1; - goto read_exit; - } - if (status I2C_STAT_XRDY) { - w = tmpbuf[i++]; -#if