[U-Boot] common/cmd_nand.c license terms
Dear Scott, with commit ea533c2 cmd_nand: some infrastructure fixes and refactoring (Mon Aug 02, 2010), you added the following license header to common/cmd_nand.c : + * Copyright 2010 Freescale Semiconductor + * The portions of this file whose copyright is held by Freescale and which + * are not considered a derived work of GPL v2-only code may be distributed + * and/or modified under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. Looking at this commit, it is totally unclear to me which parts of the newly added code you could be referring to with your which are not considered a derived work of GPL v2-only code. Your addition makes the legal situation of the whole file pretty much indeterminable. Could you please be so kind and explain what exactly your intention was, and what exactly yuou were referring to? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de How come everyone's going so slow if it's called rush hour? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 7/7] cros: exynos: enable cros-ec for smdk5250
[resent from correct address] Hi Chander, On Thu, Jul 25, 2013 at 12:30 AM, Chander Kashyap chander.kash...@linaro.org wrote: On 15 May 2013 15:57, Hung-ying Tyan ty...@chromium.org wrote: This patch initiates cros-ec in board_init() to enable it for smdk5250. This patch depends on the patch in the MMC series that brings in exynos5-dt.c. Refer to http://patchwork.ozlabs.org/patch/240084. Signed-off-by: Simon Glass s...@chromium.org Signed-off-by: Vincent Palatin vpala...@chromium.org Signed-off-by: Hung-ying Tyan ty...@chromium.org --- Changes in v5: - Add exynos: tag. - Add dependency description. Changes in v4: None Changes in v3: None Changes in v2: - Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT). - Moved code from smdk5250.h to exynos5250-dt.h. Sorry for very late reply. You are enabling this feature on smdk5250, but adding the configuration in exynos5250-dt.h, though exynos5250-dt.h is seems to common. Though this patch is merged but isnt it possible to submit a patch to add configuration macros to smdk5250.h rather than exynos5250-dt.h. Or shall i submit the patch for doing so. We had this discuss on the list a month or two back. The idea with exynos5250-dt.h is that it supports all Exynos5250 boards, and only the device tree needs to be changes to select the particular features required for each board. It allows us to check, by building one board config, that all those boards build correctly. Then we can boot that image on smdk5250 or any other board, only changing the device tree. It is a good 'general' target for people starting a new port. But some will want to have their own board config to reduce the size of the image (removing features they know they don't need). We talked about creating something like exynos5250-dt-common to hold options that are common to all boards, so that those boards don't need to include exynos5250-dt.h. Things like cros_ec could be then be omitted from exynos5250-dt-common. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] libfdt: SPDX-License-Identifier: GPL-2.0+ BSD-2-Clause
Hi Wolfgang -Ursprüngliche Nachricht- Von: Wolfgang Denk [mailto:w...@denx.de] Gesendet: Sonntag, 28. Juli 2013 00:13 An: Roger Meier Cc: u-boot@lists.denx.de Betreff: Re: [PATCH] libfdt: SPDX-License-Identifier: GPL-2.0+ BSD-2-Clause Dear Roger, In message 1374880358-7743-1-git-send-email-ro...@bufferoverflow.ch you wrote: Signed-off-by: Roger Meier ro...@bufferoverflow.ch --- Licenses/README | 13 ++-- Licenses/bsd-2-clause.txt| 25 ++ lib/libfdt/fdt.c | 47 +- lib/libfdt/fdt_empty_tree.c | 47 +- lib/libfdt/fdt_ro.c | 47 +- lib/libfdt/fdt_rw.c | 47 +- lib/libfdt/fdt_strerror.c| 47 +- lib/libfdt/fdt_sw.c | 47 +- lib/libfdt/fdt_wip.c | 47 +- lib/libfdt/libfdt_internal.h | 47 +- 10 files changed, 40 insertions(+), 374 deletions(-) create mode 100644 Licenses/bsd-2-clause.txt Thanks for pushing this forward. I have but one comment: +BSD 2-Clause License BSD-2-ClauseY bsd-2-clause.txthttps://spdx.org/licenses/BSD-2- Clause I don;t really like picking up the original license text from a second source (SPDX here) - I'd rather refer to some original version published by the creator of the license. Maybe we can find a better URI here? I agree, original version only we already have the SPDX Identifier. It's a difficult task with BSD licenses and I found no original source yet. Official information from Berkeley University: http://ipira.berkeley.edu/ ftp://ftp.cs.berkeley.edu/pub/4bsd/README.Impt.License.Change Other sources or information: http://www.linfo.org/bsdlicense.html http://opensource.org/licenses/BSD-2-Clause http://www.freebsd.org/copyright/license.html should I rebase without an URL for BSD-2-Clause as long as we have the license in text form anyway? Except for that: Acked-by: Wolfgang Denk w...@denx.de Thanks! -roger ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] libfdt: SPDX-License-Identifier: GPL-2.0+ BSD-2-Clause
Dear Roger, In message 04e501ce8ba3$08496180$18dc2480$@bufferoverflow.ch you wrote: I don;t really like picking up the original license text from a second source (SPDX here) - I'd rather refer to some original version published by the creator of the license. Maybe we can find a better URI here? I agree, original version only we already have the SPDX Identifier. It's a difficult task with BSD licenses and I found no original source yet. I agree - BSD and licenses has never been an easy task :-( should I rebase without an URL for BSD-2-Clause as long as we have the license in text form anyway? No. Please leave the SPDX reference as long as it's the best we can get. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de He had been eight years upon a project for extracting sunbeams out of cucumbers, which were to be put in vials hermetically sealed, and let out to warm the air in raw inclement summers.- Jonathan Swift _Gulliver's Travels_ ``A Voyage to Laputa, etc.'' ch. 5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] SPDX-License-Identifier: adding a comment section?
Hello all, I need some help / recommendations how we should handle non-trivial license issues. For example, please have a look at the NE2000 network driver code: drivers/net/ne2000.h drivers/net/ne2000.c drivers/net/ne2000_base.h drivers/net/ne2000_base.c - First, these files include a statement that this code has been derived from Linux kernel and from eCOS sources and that it's released unter GPL, but without stating wehter this means GPL-v2 or GPL-v2+ or whatever. - Second, it includes the eCOS license header which basically says it's GPLv2+ plus some additional rights. - Third, if you track down the Linux source code mentioned above, this again says only GPL without additional specification. Two questions arise: - What should the resulting license(s) be in this specific case? I tend to interpret plain GPL as GPLv2+, so we could probably summarize the license terms here as eCos-2.0. What do you think? - I feel it would be helpful for future investigations if we are able to document our current understanding, so we don't have to re-investigate all this again and again each time we run into these files. My proposal is to define an additional magic string SPDX-License-Comments: which could be used to mark a text section that would contain such explanations. Wound this make sense, or do you have a better suggestion? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Remember that the best relationship is one in which your love for each other exceeds your need for each other. - Dalai Lama ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Remove static display data
Hi Simon, On 07/27/2013 12:05 PM, Simon Glass wrote: Hi Eric, On Fri, Jul 26, 2013 at 6:42 PM, Eric Nelson eric.nel...@boundarydevices.com mailto:eric.nel...@boundarydevices.com wrote: Thanks for the thoughtful response, Stefano. On 07/26/2013 07:42 AM, Stefano Babic wrote: Hi Eric, On 26/07/2013 16:04, Eric Nelson wrote: The real question we have regarding DT is the timing. We're shipping DT files on secondary storage (SATA/SD card), and want/need something local (i.e. env in SPI-NOR) to present a U/I if either no storage available or if something goes wrong. ok, understood. A secondary need/desire is to have something simple for configuring a new display. The process of tuning some of the parameters (esp margins) can sometimes be iterative because the data sheets aren't always clear and clock options are often imprecise. Since this iteration and configuration is often done by EEs in a lab who don't have an easy way to recompile a DTS, our inclination is to do something locally. ok, I understand the point. Maybe it should be even more simple for the EEs if the would be such kind of special u-boot commands, able to set the timing and reload the framebuffer. Can be a solution using the u-boot's fdt library enough ? With fdt get and fdt set it is possible to read and modify a DT in memory, and then the modified DT can be stored back - avoiding to compile directly the DTS. Perhaps. We're still n00bs when it comes to DT, so we may have to wait until we're further up the learning curve. It also seems that a bound U-Boot+DT isn't really any better than re-compiling U-Boot itself. If we need to flash everything, then there's not much benefit of the change. If you use environment, where is that stored? Presumably you need to reflash in that case also? On our boards, we store the environment in SPI-NOR, but in a separate 8k block. I presume the bound fdt will be stored immediately after U-Boot, which will move around a bit as the code changes. The FDT is normally stored immediately after U-Boot, but I suppose we could add an option for the FDT to live elsewhere, or perhaps be loaded from flash live the environment. Actually the latter is already possible by reading the new FDT into RAM in your boot script, and making U-Boot use it, something like: sf probe sf read addr ... fdt addr -c addr At the moment, we intend to normally load the FDT from the same media as the kernel for a couple of reasons: - It's not needed at all for non-Linux uses (we support Windows Embedded, QNX, et cetera) - We'll likely need separate FDTs for different boards which can execute the same U-Boot binary (Nitrogen6x, SABRE Lite) unless we can figure out a way to place small conditionals in the FDT In general FDT is pretty easy to set up - when you define CONFIG_OF_CONTROL you need to use u-boot-dtb.bin instead of u-boot.bin, but other than that it should work OK. At the moment, I think somehow saving a fragment of DT information in the environment and using it to fix up the FDT loaded from boot medium is probably the right approach. This is likely to be more verbose that the approach Anatolij suggested (videomode environment variable), but has the benefit of only needing one set of documentation. Our previous work in this area (for i.MX51 and 53) had a command 'lcdpanel' which allowed for a process of up-arroweditenter to change and test a display setting: http://boundarydevices.com/u-boot-display-support-on-i-mx51/ But pasting a multi-line block isn't meaningfully more difficult. Regards, Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Remove static display data
Hi Eric, On Sun, Jul 28, 2013 at 10:57 AM, Eric Nelson eric.nel...@boundarydevices.com wrote: Hi Simon, On 07/27/2013 12:05 PM, Simon Glass wrote: Hi Eric, On Fri, Jul 26, 2013 at 6:42 PM, Eric Nelson eric.nelson@boundarydevices.**com eric.nel...@boundarydevices.com mailto:eric.nelson@**boundarydevices.comeric.nel...@boundarydevices.com wrote: Thanks for the thoughtful response, Stefano. On 07/26/2013 07:42 AM, Stefano Babic wrote: Hi Eric, On 26/07/2013 16:04, Eric Nelson wrote: The real question we have regarding DT is the timing. We're shipping DT files on secondary storage (SATA/SD card), and want/need something local (i.e. env in SPI-NOR) to present a U/I if either no storage available or if something goes wrong. ok, understood. A secondary need/desire is to have something simple for configuring a new display. The process of tuning some of the parameters (esp margins) can sometimes be iterative because the data sheets aren't always clear and clock options are often imprecise. Since this iteration and configuration is often done by EEs in a lab who don't have an easy way to recompile a DTS, our inclination is to do something locally. ok, I understand the point. Maybe it should be even more simple for the EEs if the would be such kind of special u-boot commands, able to set the timing and reload the framebuffer. Can be a solution using the u-boot's fdt library enough ? With fdt get and fdt set it is possible to read and modify a DT in memory, and then the modified DT can be stored back - avoiding to compile directly the DTS. Perhaps. We're still n00bs when it comes to DT, so we may have to wait until we're further up the learning curve. It also seems that a bound U-Boot+DT isn't really any better than re-compiling U-Boot itself. If we need to flash everything, then there's not much benefit of the change. If you use environment, where is that stored? Presumably you need to reflash in that case also? On our boards, we store the environment in SPI-NOR, but in a separate 8k block. I presume the bound fdt will be stored immediately after U-Boot, which will move around a bit as the code changes. Yes - it would be nice to have an option to put the FDT anywhere, but that is not supported at present. Even better if SPL could load it. Better again if U-Boot plus its FDTs could be a FIT image and SPL could load that and select the correct FDT. The FDT is normally stored immediately after U-Boot, but I suppose we could add an option for the FDT to live elsewhere, or perhaps be loaded from flash live the environment. Actually the latter is already possible by reading the new FDT into RAM in your boot script, and making U-Boot use it, something like: sf probe sf read addr ... fdt addr -c addr At the moment, we intend to normally load the FDT from the same media as the kernel for a couple of reasons: - It's not needed at all for non-Linux uses (we support Windows Embedded, QNX, et cetera) - We'll likely need separate FDTs for different boards which can execute the same U-Boot binary (Nitrogen6x, SABRE Lite) unless we can figure out a way to place small conditionals in the FDT We attach a kernel FDT to the kernel image. Passing U-Boot's FDT to the kernel is an option that I haven't explored, and is probably only possible if it can be updated. In general FDT is pretty easy to set up - when you define CONFIG_OF_CONTROL you need to use u-boot-dtb.bin instead of u-boot.bin, but other than that it should work OK. At the moment, I think somehow saving a fragment of DT information in the environment and using it to fix up the FDT loaded from boot medium is probably the right approach. This is likely to be more verbose that the approach Anatolij suggested (videomode environment variable), but has the benefit of only needing one set of documentation. Our previous work in this area (for i.MX51 and 53) had a command 'lcdpanel' which allowed for a process of up-arroweditenter to change and test a display setting: http://boundarydevices.com/u-**boot-display-support-on-i-**mx51/http://boundarydevices.com/u-boot-display-support-on-i-mx51/ But pasting a multi-line block isn't meaningfully more difficult. Regards, Eric Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPDX-License-Identifier: adding a comment section?
Hi Wolfgang -Ursprüngliche Nachricht- Von: Wolfgang Denk [mailto:w...@denx.de] Gesendet: Sonntag, 28. Juli 2013 17:40 An: u-boot@lists.denx.de Cc: Roger Meier; Tom Rini; Albert ARIBAUD; Joe Hershberger Betreff: SPDX-License-Identifier: adding a comment section? I need some help / recommendations how we should handle non-trivial license issues. For example, please have a look at the NE2000 network driver code: drivers/net/ne2000.h drivers/net/ne2000.c drivers/net/ne2000_base.h drivers/net/ne2000_base.c Is this still in use somewhere? - First, these files include a statement that this code has been derived from Linux kernel and from eCOS sources and that it's released unter GPL, but without stating wehter this means GPL-v2 or GPL-v2+ or whatever. - Second, it includes the eCOS license header which basically says it's GPLv2+ plus some additional rights. - Third, if you track down the Linux source code mentioned above, this again says only GPL without additional specification. Two questions arise: - What should the resulting license(s) be in this specific case? I tend to interpret plain GPL as GPLv2+, so we could probably summarize the license terms here as eCos-2.0. What do you think? Agree, makes sense. - I feel it would be helpful for future investigations if we are able to document our current understanding, so we don't have to re-investigate all this again and again each time we run into these files. My proposal is to define an additional magic string SPDX-License-Comments: which could be used to mark a text section that would contain such explanations. Good idea, document the current understanding is worth to do. SPDX defines the property LicenseComments at file and package level. Wound this make sense, or do you have a better suggestion? No better idea available... -roger ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Remove static display data
Hi Simon, On 07/28/2013 11:09 AM, Simon Glass wrote: Hi Eric, On Sun, Jul 28, 2013 at 10:57 AM, Eric Nelson eric.nel...@boundarydevices.com mailto:eric.nel...@boundarydevices.com wrote: On our boards, we store the environment in SPI-NOR, but in a separate 8k block. I presume the bound fdt will be stored immediately after U-Boot, which will move around a bit as the code changes. Yes - it would be nice to have an option to put the FDT anywhere, but that is not supported at present. Even better if SPL could load it. Better again if U-Boot plus its FDTs could be a FIT image and SPL could load that and select the correct FDT. That's a whole bunch of TLAs :) I don't see any major blockers in any of these, though our immediate goals are much more modest: - put display configuration into a read/write spot, and - allow users to specify resolutions for HDMI and timing information for new panels If we can just parse block(s) of DT text, then update or append that to the kernel FDT, I think we can meet our needs. The FDT is normally stored immediately after U-Boot, but I suppose we could add an option for the FDT to live elsewhere, or perhaps be loaded from flash live the environment. Actually the latter is already possible by reading the new FDT into RAM in your boot script, and making U-Boot use it, something like: sf probe sf read addr ... fdt addr -c addr At the moment, we intend to normally load the FDT from the same media as the kernel for a couple of reasons: - It's not needed at all for non-Linux uses (we support Windows Embedded, QNX, et cetera) - We'll likely need separate FDTs for different boards which can execute the same U-Boot binary (Nitrogen6x, SABRE Lite) unless we can figure out a way to place small conditionals in the FDT We attach a kernel FDT to the kernel image. Passing U-Boot's FDT to the kernel is an option that I haven't explored, and is probably only possible if it can be updated. I'm coming at this from the other direction: I've only seen how to load FDT from secondary storage and hand it to the kernel with bootm. Regards, Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/5] board/esd/cpci750/mv_eth.c: Fix license
The file header indicated that this file was GPL-2.0+, but actually the code was derived from (Marvell based) Linux source code which is only GPL-2.0. Fix this. Signed-off-by: Wolfgang Denk w...@denx.de Cc: Stefan Roese s...@denx.de Cc: Matthias Fuchs matthias.fu...@esd-electronics.com --- board/esd/cpci750/mv_eth.c | 17 + 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/board/esd/cpci750/mv_eth.c b/board/esd/cpci750/mv_eth.c index 91b4063..cbdcfe3 100644 --- a/board/esd/cpci750/mv_eth.c +++ b/board/esd/cpci750/mv_eth.c @@ -5,7 +5,7 @@ * based on - Driver for MV64360X ethernet ports * Copyright (C) 2002 rab...@galileo.co.il * - * SPDX-License-Identifier:GPL-2.0+ + * SPDX-License-Identifier:GPL-2.0 */ /* @@ -1025,21 +1025,6 @@ bool db64360_eth_start (struct eth_device *dev) * based on Linux code * arch/powerpc/galileo/EVB64360/mv64360_eth.c - Driver for MV64360X ethernet ports * Copyright (C) 2002 rab...@galileo.co.il - - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * */ / -- 1.8.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/5] SPDX-License-Identifier: convert PIBS licensed files
This commit adapts the files that were derived from PIBS (PowerPC Initialization and Boot Software) codeto using SPDX License Identifiers. So far, SPDX has not assigned an official License ID for the PIBS license yet, so this should be considered preliminary. Note that the following files contained incorrect license information: arch/powerpc/cpu/ppc4xx/4xx_uart.c arch/powerpc/cpu/ppc4xx/start.S arch/powerpc/include/asm/ppc440.h These files included, in addition to the GPL-2.0 / ibm-pibs dual license as inherited from PIBS, a GPL-2.0+ license header which was obviously incorrect. This has been removed. Signed-off-by: Wolfgang Denk w...@denx.de Cc: Stefan Roese s...@denx.de Signed-off-by: Wolfgang Denk w...@denx.de Conflicts: Licenses/README --- Licenses/README| 2 ++ Licenses/ibm-pibs.txt | 17 ++ arch/powerpc/cpu/ppc4xx/4xx_pci.c | 25 ++--- arch/powerpc/cpu/ppc4xx/4xx_uart.c | 25 + arch/powerpc/cpu/ppc4xx/miiphy.c | 25 +++-- arch/powerpc/cpu/ppc4xx/start.S| 41 +- arch/powerpc/include/asm/ppc405.h | 25 +++-- arch/powerpc/include/asm/ppc440.h | 25 + arch/powerpc/include/asm/ppc4xx-emac.h | 25 +++-- arch/powerpc/include/asm/ppc4xx-mal.h | 25 +++-- arch/powerpc/include/asm/ppc4xx.h | 25 +++-- board/cray/L1/init.S | 27 +++--- board/csb272/init.S| 26 +++-- board/csb472/init.S| 26 +++-- board/esd/pci405/writeibm.S| 28 +++ board/jse/init.S | 28 +++ board/mpl/common/pci.c | 25 +++-- board/mpl/mip405/init.S| 26 +++-- board/mpl/pip405/init.S| 26 +++-- board/sc3/init.S | 31 +++-- board/w7o/init.S | 26 +++-- drivers/net/4xx_enet.c | 25 +++-- drivers/net/npe/miiphy.c | 25 +++-- include/miiphy.h | 29 +--- 24 files changed, 80 insertions(+), 528 deletions(-) create mode 100644 Licenses/ibm-pibs.txt diff --git a/Licenses/README b/Licenses/README index 3ed7aba..09c5cf5 100644 --- a/Licenses/README +++ b/Licenses/README @@ -51,3 +51,5 @@ GNU Library General Public License v2 or later LGPL-2.0+ Y lgpl-2.0.txthttp:/ GNU Lesser General Public License v2.1 or laterLGPL-2.1+ Y lgpl-2.1.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt eCos license version 2.0 eCos-2.0 eCos-2.0.txthttp://www.gnu.org/licenses/ecos-license.html BSD 2-Clause License BSD-2-ClauseY bsd-2-clause.txthttps://spdx.org/licenses/BSD-2-Clause +IBM PIBS (PowerPC Initialization and ibm-pibs ibm-pibs.txt + Boot Software) license diff --git a/Licenses/ibm-pibs.txt b/Licenses/ibm-pibs.txt new file mode 100644 index 000..4cd7523 --- /dev/null +++ b/Licenses/ibm-pibs.txt @@ -0,0 +1,17 @@ +This source code has been made available to you by IBM on an AS-IS +basis. Anyone receiving this source is licensed under IBM +copyrights to use it in any way he or she deems fit, including +copying it, modifying it, compiling it, and redistributing it either +with or without modifications. No license under IBM patents or +patent applications is to be implied by the copyright license. + +Any user of this software should understand that IBM cannot provide +technical support for this software and will not be responsible for +any consequences resulting from the use of this software. + +Any person who transfers this source code or any derivative work +must include the IBM copyright notice, this paragraph, and the +preceding two paragraphs in the transferred software. + +COPYRIGHT I B M CORPORATION 1995 +LICENSED MATERIAL - PROGRAM PROPERTY OF I B M diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c index 2ca355b..5584e0f 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_pci.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c @@ -1,26 +1,5 @@ -/*-+ - * This source code is dual-licensed. You may use it under the terms of - * the GNU General Public license version 2, or under the license below. - * - * This source code has been made available to you by IBM on an AS-IS - * basis. Anyone receiving this source is licensed under IBM - * copyrights to
[U-Boot] [PATCH 1/5] SPDX-License-Identifier: convert GPL-2.0+ / BSD-2-Clause dual-licensed files
Signed-off-by: Wolfgang Denk w...@denx.de --- include/api_public.h | 45 + 1 file changed, 1 insertion(+), 44 deletions(-) diff --git a/include/api_public.h b/include/api_public.h index 4420c99..f5c89f3 100644 --- a/include/api_public.h +++ b/include/api_public.h @@ -3,50 +3,7 @@ * * Written by: Rafal Jaworowski r...@semihalf.com * - * This file is dual licensed; you can use it under the terms of - * either the GPL, or the BSD license, at your option. - * - * I. GPL: - * - * This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Alternatively, - * - * II. BSD license: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - *notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - *notice, this list of conditions and the following disclaimer in the - *documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * SPDX-License-Identifier:GPL-2.0+BSD-2-Clause */ #ifndef _API_PUBLIC_H_ -- 1.8.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/5] SPDX-License-Identifier: fixing some problematic GPL-2.0 files
Unlike the other patches in this series so far, this commit fixes a ambiguity in the license terms for some OMAP files: the code was originally derived from the Linux kernel sources, where it was clearly marked as GPL-2.0 (i. e. without the or later part), but the U-Boot version had a GPL-2.0+ file header added, apparently without permission / relicensing from the original authors of the code. Insert a GPL-2.0 SPDX-License-Identifier to fix this. Signed-off-by: Wolfgang Denk w...@denx.de cc: Tom Rix tom@windriver.com Cc: Tom Rini tr...@ti.com Cc: Albert Aribaud albert.u.b...@aribaud.net --- arch/arm/include/asm/arch-omap3/gpio.h | 19 +-- arch/arm/include/asm/arch-omap4/gpio.h | 19 +-- arch/arm/include/asm/arch-omap5/gpio.h | 19 +-- arch/arm/include/asm/omap_gpio.h | 19 +-- drivers/gpio/omap_gpio.c | 19 +-- 5 files changed, 5 insertions(+), 90 deletions(-) diff --git a/arch/arm/include/asm/arch-omap3/gpio.h b/arch/arm/include/asm/arch-omap3/gpio.h index d72f5e5..f664c11 100644 --- a/arch/arm/include/asm/arch-omap3/gpio.h +++ b/arch/arm/include/asm/arch-omap3/gpio.h @@ -2,20 +2,7 @@ * Copyright (c) 2009 Wind River Systems, Inc. * Tom Rix tom@windriver.com * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier:GPL-2.0 * * This work is derived from the linux 2.6.27 kernel source * To fetch, use the kernel repository @@ -30,10 +17,6 @@ * * Copyright (C) 2003-2005 Nokia Corporation * Written by Juha Yrjölä juha.yrj...@nokia.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #ifndef _GPIO_OMAP3_H #define _GPIO_OMAP3_H diff --git a/arch/arm/include/asm/arch-omap4/gpio.h b/arch/arm/include/asm/arch-omap4/gpio.h index fdf65ed..72ba1d7 100644 --- a/arch/arm/include/asm/arch-omap4/gpio.h +++ b/arch/arm/include/asm/arch-omap4/gpio.h @@ -2,20 +2,7 @@ * Copyright (c) 2009 Wind River Systems, Inc. * Tom Rix tom@windriver.com * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier:GPL-2.0 * * This work is derived from the linux 2.6.27 kernel source * To fetch, use the kernel repository @@ -30,10 +17,6 @@ * * Copyright (C) 2003-2005 Nokia Corporation * Written by Juha Yrjölä juha.yrj...@nokia.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #ifndef _GPIO_OMAP4_H #define _GPIO_OMAP4_H diff --git a/arch/arm/include/asm/arch-omap5/gpio.h b/arch/arm/include/asm/arch-omap5/gpio.h index 7c82f90..9dd03c9 100644 --- a/arch/arm/include/asm/arch-omap5/gpio.h +++ b/arch/arm/include/asm/arch-omap5/gpio.h @@ -2,20 +2,7 @@ * Copyright (c) 2009 Wind River Systems, Inc. * Tom Rix tom@windriver.com * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along
[U-Boot] [PATCH 0/5] SPDX-License-Identifier: coverting more files
The following patch series converts some more files to the new SPDX License Identifier scheme. Note that some of the patches are non-trivial, i. e. these should be reviewed carefully. This patch series assumes that Roger Meier's previous patch libfdt: SPDX-License-Identifier: GPL-2.0+ BSD-2-Clause (see [1]) has already been applied. [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/166531 Wolfgang Denk (5): SPDX-License-Identifier: convert GPL-2.0+ / BSD-2-Clause dual-licensed files SPDX-License-Identifier: fixing some problematic GPL-2.0 files SPDX-License-Identifier: convert PIBS licensed files board/esd/cpci750/mv_eth.c: Fix license SPDX-License-Identifier: convert BSD-3-Clause files Licenses/README| 5 +- Licenses/bsd-3-clause.txt | 24 ++ Licenses/ibm-pibs.txt | 17 +++ arch/arm/include/asm/arch-omap3/gpio.h | 19 +--- arch/arm/include/asm/arch-omap4/gpio.h | 19 +--- arch/arm/include/asm/arch-omap5/gpio.h | 19 +--- arch/arm/include/asm/omap_gpio.h | 19 +--- arch/powerpc/cpu/ppc4xx/4xx_pci.c | 25 +- arch/powerpc/cpu/ppc4xx/4xx_uart.c | 25 +- arch/powerpc/cpu/ppc4xx/miiphy.c | 25 ++ arch/powerpc/cpu/ppc4xx/start.S| 41 + arch/powerpc/include/asm/ppc405.h | 25 ++ arch/powerpc/include/asm/ppc440.h | 25 +- arch/powerpc/include/asm/ppc4xx-emac.h | 25 ++ arch/powerpc/include/asm/ppc4xx-mal.h | 25 ++ arch/powerpc/include/asm/ppc4xx.h | 25 ++ arch/x86/cpu/coreboot/tables.c | 23 +- arch/x86/include/asm/arch-coreboot/sysinfo.h | 23 +- arch/x86/include/asm/arch-coreboot/tables.h| 23 +- board/chromebook-x86/coreboot/config.mk| 32 + board/cray/L1/init.S | 27 ++- board/csb272/init.S| 26 ++- board/csb472/init.S| 26 ++- board/esd/cpci750/mv_eth.c | 17 +-- board/esd/pci405/writeibm.S| 28 ++-- board/jse/init.S | 28 ++-- board/mpl/common/pci.c | 25 ++ board/mpl/mip405/init.S| 26 ++- board/mpl/pip405/init.S| 26 ++- board/sc3/init.S | 31 ++--- board/scb9328/intel.h | 23 +- board/w7o/init.S | 26 ++- common/cmd_ini.c | 25 +- drivers/gpio/omap_gpio.c | 19 +--- drivers/net/4xx_enet.c | 25 ++ drivers/net/npe/IxEthAcc.c | 26 +-- drivers/net/npe/IxEthAccCommon.c | 26 +-- drivers/net/npe/IxEthAccControlInterface.c | 26 +-- drivers/net/npe/IxEthAccDataPlane.c| 26 +-- drivers/net/npe/IxEthAccMac.c | 26 +-- drivers/net/npe/IxEthAccMii.c | 26 +-- drivers/net/npe/IxEthDBAPI.c | 26 +-- drivers/net/npe/IxEthDBAPISupport.c| 26 +-- drivers/net/npe/IxEthDBCore.c | 26 +-- drivers/net/npe/IxEthDBEvents.c| 26 +-- drivers/net/npe/IxEthDBFeatures.c | 26 +-- drivers/net/npe/IxEthDBFirewall.c | 26 +-- drivers/net/npe/IxEthDBHashtable.c | 26 +-- drivers/net/npe/IxEthDBLearning.c | 26 +-- drivers/net/npe/IxEthDBMem.c | 26 +-- drivers/net/npe/IxEthDBNPEAdaptor.c| 26 +-- drivers/net/npe/IxEthDBPortUpdate.c| 26 +-- drivers/net/npe/IxEthDBReports.c | 26 +-- drivers/net/npe/IxEthDBSearch.c| 26 +-- drivers/net/npe/IxEthDBSpanningTree.c | 26 +-- drivers/net/npe/IxEthDBUtil.c | 26 +-- drivers/net/npe/IxEthDBVlan.c | 26 +-- drivers/net/npe/IxEthDBWiFi.c | 26 +-- drivers/net/npe/IxEthMii.c | 26 +-- drivers/net/npe/IxFeatureCtrl.c| 26 +-- drivers/net/npe/IxNpeDl.c | 26 +-- drivers/net/npe/IxNpeDlImageMgr.c | 26 +--
[U-Boot] [PATCH v4 3/4] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
board/armadeus/apf27/Makefile |3 +
board/armadeus/apf27/apf27.c | 18 +++
board/armadeus/apf27/fpga.c | 250 +
board/armadeus/apf27/fpga.h | 39 +++
4 files changed, 310 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index 08d5d8d..11562a2 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -29,6 +29,9 @@ LIB = $(obj)lib$(BOARD).o
ifndef CONFIG_SPL_BUILD
COBJS := apf27.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
endif
ifdef CONFIG_SPL_BUILD
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index f64c71a..7c10539 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -30,6 +30,7 @@
#include asm/errno.h
#include apf27.h
#include crc.h
+#include fpga.h
DECLARE_GLOBAL_DATA_PTR;
@@ -321,6 +322,23 @@ int misc_init_r(void)
struct mtd_device *dev;
struct part_info *part;
+#if defined(CONFIG_FPGA)
+ /* init and download fpga */
+ if ((autoload) (0 == strcmp(autoload, 1))) {
+ if (mtdparts_init() == 0)
+ if (find_dev_and_part(firmware,
+ dev, pnum, part) == 0) {
+ size = part-size;
+ if (nand_read_skip_bad(nand_info[0],
+ part-offset, size,
+ NULL, part-size,
+ firmware_buffer))
+ size = 0;
+ }
+ }
+ APF27_init_fpga(firmware_buffer, size);
+#endif
+
/* detect compatibility issue of environment version */
s = getenv(env_version);
if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..4c49667
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,250 @@
+/*
+ * (C) Copyright 2002-2012
+ * Eric Jarrige eric.jarr...@armadeus.org
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
+ * Keith Outwater, keith_outwa...@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *)fpga_fns,
+0}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN
[U-Boot] [PATCH v4 1/4] mx27: add missing constant for mx27
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 +
arch/arm/include/asm/arch-mx27/imx-regs.h |2 +-
2 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index f3a8d7b..215c562 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -41,5 +41,10 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index 8867e9f..51257a8 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -185,7 +185,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
--
1.7.4.4
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[U-Boot] [PATCH v4 0/4] apf27: add support of armadeus apf27
Difference between v4 and v3: - use standard start.S - use part to know u-boot offset - fix some comments format issue Difference between v3 and v2: - rebase on imx branch - merge support and spl patch - clean code of apf27_gpio_init - clean code of start.S Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (4): mx27: add missing constant for mx27 apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board Update u-boot-nand.bin to be used with spl MAINTAINERS |5 + Makefile |6 + arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 + arch/arm/include/asm/arch-mx27/imx-regs.h |2 +- board/armadeus/apf27/Makefile | 54 +++ board/armadeus/apf27/apf27.c | 374 board/armadeus/apf27/apf27.h | 450 board/armadeus/apf27/fpga.c | 250 ++ board/armadeus/apf27/fpga.h | 39 +++ board/armadeus/apf27/splboot.S| 528 + boards.cfg|1 + include/configs/apf27.h | 446 12 files changed, 2159 insertions(+), 1 deletions(-) create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/splboot.S create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 4/4] Update u-boot-nand.bin to be used with spl
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
Makefile |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile
index 4218226..b971f30 100644
--- a/Makefile
+++ b/Makefile
@@ -617,8 +617,14 @@ $(obj)u-boot.lds: $(LDSCRIPT)
nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
+ifeq ($(CONFIG_SPL),y)
+$(obj)u-boot-nand.bin:$(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) -O binary
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin \
+ cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin
$(obj)u-boot-nand.bin
+else
$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin
$(obj)u-boot-nand.bin
+endif
$(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend
$(MAKE) -C spl all
--
1.7.4.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 3/4] apf27: add FPGA support for the apf27 board
Dear Philippe Reynes, In message 1375042616-24680-4-git-send-email-trem...@yahoo.fr you wrote: --- /dev/null +++ b/board/armadeus/apf27/fpga.c @@ -0,0 +1,250 @@ +/* + * (C) Copyright 2002-2012 + * Eric Jarrige eric.jarr...@armadeus.org + * Rich Ireland, Enterasys Networks, rirel...@enterasys.com. + * Keith Outwater, keith_outwa...@mvis.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA Please drop the full header and use a SPDX-License-Identifier instead. Please fix globally. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de No user-servicable parts inside. Refer to qualified service personnel. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] uboot optimize memmove
Dear Wolfgang Denk, On 27 July 2013 03:06, Wolfgang Denk w...@denx.de wrote: Dear Andy Green, In message caafg0w7p6rvvamqsksc09yqnfpod08ydtbeh_mqrz6n+b4i...@mail.gmail.com you wrote: Instead of making assumptions on the performance of memcpy() and As I wrote, I measured the performance and got a very big gain, it's 3x faster on my setup to use memcpy() then default memmove(). Yes, in your single test case of copying a Linux kernel image, i. e. a multi-megabyte file. That single test case of copying a multi-megabyte file is the reason d'etre of a bootloader...if it doesn't perform well doing that then it's a problem. However I agree the alternative arch-specific implementation for ARM is pretty good, so this is kind of moot. Since I traced my problem to here I fixed it there, but that actual problem was were using the default implementations at all (the config was inherited).. By calling that an assumption you're saying that there exist platforms where 32-bit linear memmove() is slower than doing it with 8-bit actions? No. I said you should not assume that memcpy() is always faster than memmove(); a system may use optiomized versions of either. I did not assume that, I looked at your code for both and saw, and proved, that using 32-bit operations for mass move actions is going to perform better than using 8-bit operations. That's not something you can write off as an assumption, it's a fact. adding the overhead of an additional function call (which can be expensive especially for short copy operations) it would make more I am not sure U-Boot is really in the business of doing small memmoves, but okay... It's easy to avoid this overhead, and also get rid of the restrictions you built into it (otimizong only the non-overlapping case), so if we touch that code, we should do it right. Given that code should perferably never be used, maybe it should print a warning like Using default memory ops and leave it like it is. The problem is not correctness just inefficiency. sense to pull the copy a word at a time code from memcpy() into memmove(), too. On the other hand - if you really care about performance, then why do I spent several hours figuring out why our NOR boot performance was terrible it's because this default memmove code is gloriously inefficient for all cases. If you like it like that, no worries. Don't twist my words. I asked for a different, better implementation, that's all. Unfortunately I'm only looking at it because it made trouble, and we now no longer use that code. For the use-case I'm studying (very fast overall boot) it still may make sense to implement the NEON stuff in which case I'll offer a patch for that. -Andy Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The only time the world beats a path to your door is when you are in the bathroom. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/3] arm, am335x: add support for siemens boards
add support for the am335x based boards from siemens: dxr2: - DDR3 128MiB - NAND 256MiB - Ethernet with external Switch SMSC LAN9303 - no PMIC - internal Watchdog - DFU support pxm2: - DDR2 512 MiB - NAND 1024 MiB - PMIC - PHY atheros ar803x - USB Host - internal Watchdog - DFU support rut: - DDR3 256 MiB - NAND 256 MiB - PMIC - PHY natsemi dp83630 - external Watchdog - DFU support based on current mainline commit 9fab4bf4cc077c21e43941866f3f2c196f28670d Needed patches: - [U-Boot] arm, spl: add watchdog library to SPL http://patchwork.ozlabs.org/patch/248503/ reposted with this patchserie - [U-Boot] arm, arm335x: add watchdog support http://patchwork.ozlabs.org/patch/248504/ reposted with this patchserie - [U-Boot,v2] arm, am33xx: add defines for gmii_sel_register bits http://patchwork.ozlabs.org/patch/248916/ - patches from Lokesh Vutla: [U-Boot,1/4] ARM: AM33xx: Cleanup dplls data http://patchwork.ozlabs.org/patch/253831/ [U-Boot,2/4] ARM: AM33xx: Cleanup clocks layer http://patchwork.ozlabs.org/patch/253833/ [U-Boot,3/4] ARM: AM33xx: Move s_init to a common place http://patchwork.ozlabs.org/patch/253834/ [U-Boot,4/4] musb: Disable extra prints http://patchwork.ozlabs.org/patch/253832/ - [U-Boot,v5] dfu, nand, ubi: add partubi alt settings for updating ubi partition http://patchwork.ozlabs.org/patch/261583/ - [U-Boot] net, phy, cpsw: fix gigabit register access http://patchwork.ozlabs.org/patch/261087/ Tested patches with this patch: - [U-Boot] dfu: Implementation of target reset after communication with dfu-util's -R switch http://patchwork.ozlabs.org/patch/260041/ - [U-Boot] ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5 http://patchwork.ozlabs.org/patch/253185/ Heiko Schocher (3): arm, spl: add watchdog library to SPL arm, am335x: add watchdog support arm, am335x: add support for 3 siemens boards MAINTAINERS| 5 + arch/arm/include/asm/arch-am33xx/cpu.h | 20 ++ board/siemens/common/board.c | 160 board/siemens/common/factoryset.c | 268 +++ board/siemens/common/factoryset.h | 21 ++ board/siemens/dxr2/Makefile| 48 board/siemens/dxr2/board.c | 239 + board/siemens/dxr2/board.h | 68 + board/siemens/dxr2/mux.c | 112 board/siemens/pxm2/Makefile| 48 board/siemens/pxm2/board.c | 236 + board/siemens/pxm2/board.h | 21 ++ board/siemens/pxm2/mux.c | 140 ++ board/siemens/pxm2/pmic.h | 73 ++ board/siemens/rut/Makefile | 48 board/siemens/rut/board.c | 179 + board/siemens/rut/board.h | 21 ++ board/siemens/rut/mux.c| 340 boards.cfg | 3 + doc/README.SPL | 2 +- drivers/watchdog/Makefile | 1 + drivers/watchdog/omap_wdt.c| 112 include/configs/dxr2.h | 95 +++ include/configs/pxm2.h | 134 ++ include/configs/rut.h | 135 ++ include/configs/siemens-am33x-common.h | 464 + spl/Makefile | 1 + 27 Dateien geändert, 2993 Zeilen hinzugefügt(+), 1 Zeile entfernt(-) create mode 100644 board/siemens/common/board.c create mode 100644 board/siemens/common/factoryset.c create mode 100644 board/siemens/common/factoryset.h create mode 100644 board/siemens/dxr2/Makefile create mode 100644 board/siemens/dxr2/board.c create mode 100644 board/siemens/dxr2/board.h create mode 100644 board/siemens/dxr2/mux.c create mode 100644 board/siemens/pxm2/Makefile create mode 100644 board/siemens/pxm2/board.c create mode 100644 board/siemens/pxm2/board.h create mode 100644 board/siemens/pxm2/mux.c create mode 100644 board/siemens/pxm2/pmic.h create mode 100644 board/siemens/rut/Makefile create mode 100644 board/siemens/rut/board.c create mode 100644 board/siemens/rut/board.h create mode 100644 board/siemens/rut/mux.c create mode 100644 drivers/watchdog/omap_wdt.c create mode 100644 include/configs/dxr2.h create mode 100644 include/configs/pxm2.h create mode 100644 include/configs/rut.h create mode 100644 include/configs/siemens-am33x-common.h Cc: Tom Rini tr...@ti.com -- 1.7.11.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3 v2] arm, am335x: add watchdog support
Add TI OMAP 16xx 24xx/34xx 32KHz (non-secure) watchdog support.
Signed-off-by: Heiko Schocher h...@denx.de
Reviewed-by: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
- changes for v2:
- add Reviedwed-by from Tom Rini
- fixed subject
- add SPDX-License-Identifier
arch/arm/include/asm/arch-am33xx/cpu.h | 20 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/omap_wdt.c| 112 +
3 Dateien geändert, 133 Zeilen hinzugefügt(+)
create mode 100644 drivers/watchdog/omap_wdt.c
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
b/arch/arm/include/asm/arch-am33xx/cpu.h
index 945a09b..ce24080 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -53,6 +53,26 @@
#define PRM_RSTCTRL_RESET 0x01
#define PRM_RSTST_WARM_RESET_MASK 0x232
+/*
+ * Watchdog:
+ * Using the prescaler, the OMAP watchdog could go for many
+ * months before firing. These limits work without scaling,
+ * with the 60 second default assumed by most tools and docs.
+ */
+#define TIMER_MARGIN_MAX (24 * 60 * 60) /* 1 day */
+#define TIMER_MARGIN_DEFAULT 60 /* 60 secs */
+#define TIMER_MARGIN_MIN 1
+
+#define PTV0 /* prescale */
+#define GET_WLDR_VAL(secs) (0x - ((secs) * (32768/(1PTV))) + 1)
+#define WDT_WWPS_PEND_WCLR BIT(0)
+#define WDT_WWPS_PEND_WLDR BIT(2)
+#define WDT_WWPS_PEND_WTGR BIT(3)
+#define WDT_WWPS_PEND_WSPR BIT(4)
+
+#define WDT_WCLR_PRE BIT(5)
+#define WDT_WCLR_PTV_OFF 2
+
#ifndef __KERNEL_STRICT_NAMES
#ifndef __ASSEMBLY__
struct gpmc_cs {
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 7e255ce..3ade624 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -18,6 +18,7 @@ COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
COBJS-$(CONFIG_S5P) += s5p_wdt.o
COBJS-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
COBJS-$(CONFIG_BFIN_WATCHDOG) += bfin_wdt.o
+COBJS-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
new file mode 100644
index 000..9fb75aa
--- /dev/null
+++ b/drivers/watchdog/omap_wdt.c
@@ -0,0 +1,112 @@
+/*
+ * omap_wdt.c
+ *
+ * (C) Copyright 2013
+ * Heiko Schocher, DENX Software Engineering, h...@denx.de.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Based on:
+ *
+ * Watchdog driver for the TI OMAP 16xx 24xx/34xx 32KHz (non-secure) watchdog
+ *
+ * Author: MontaVista Software, Inc.
+ * gda...@mvista.com or sou...@mvista.com
+ *
+ * History:
+ *
+ * 20030527: George G. Davis gda...@mvista.com
+ * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
+ * (c) Copyright 2000 Oleg Drokin gr...@crimea.edu
+ * Based on SoftDog driver by Alan Cox a...@lxorguk.ukuu.org.uk
+ *
+ * Copyright (c) 2004 Texas Instruments.
+ * 1. Modified to support OMAP1610 32-KHz watchdog timer
+ * 2. Ported to 2.6 kernel
+ *
+ * Copyright (c) 2005 David Brownell
+ * Use the driver model and standard identifiers; handle bigger timeouts.
+ */
+
+#include common.h
+#include watchdog.h
+#include asm/arch/hardware.h
+#include asm/io.h
+#include asm/processor.h
+#include asm/arch/cpu.h
+
+/* Hardware timeout in seconds */
+#define WDT_HW_TIMEOUT 60
+
+static unsigned int wdt_trgr_pattern = 0x1234;
+
+void hw_watchdog_reset(void)
+{
+ struct wd_timer *wdt = (struct wd_timer *)WDT_BASE;
+
+ /* wait for posted write to complete */
+ while ((readl(wdt-wdtwwps)) WDT_WWPS_PEND_WTGR)
+ ;
+
+ wdt_trgr_pattern = ~wdt_trgr_pattern;
+ writel(wdt_trgr_pattern, wdt-wdtwtgr);
+
+ /* wait for posted write to complete */
+ while ((readl(wdt-wdtwwps) WDT_WWPS_PEND_WTGR))
+ ;
+}
+
+static int omap_wdt_set_timeout(unsigned int timeout)
+{
+ struct wd_timer *wdt = (struct wd_timer *)WDT_BASE;
+ u32 pre_margin = GET_WLDR_VAL(timeout);
+
+ /* just count up at 32 KHz */
+ while (readl(wdt-wdtwwps) WDT_WWPS_PEND_WLDR)
+ ;
+
+ writel(pre_margin, wdt-wdtwldr);
+ while (readl(wdt-wdtwwps) WDT_WWPS_PEND_WLDR)
+ ;
+
+ return 0;
+}
+
+void hw_watchdog_init(void)
+{
+ struct wd_timer *wdt = (struct wd_timer *)WDT_BASE;
+
+ /* initialize prescaler */
+ while (readl(wdt-wdtwwps) WDT_WWPS_PEND_WCLR)
+ ;
+
+ writel(WDT_WCLR_PRE | (PTV WDT_WCLR_PTV_OFF), wdt-wdtwclr);
+ while (readl(wdt-wdtwwps) WDT_WWPS_PEND_WCLR)
+ ;
+
+ omap_wdt_set_timeout(WDT_HW_TIMEOUT);
+
+ /* Sequence to enable the watchdog */
+ writel(0x, wdt-wdtwspr);
+ while ((readl(wdt-wdtwwps)) WDT_WWPS_PEND_WSPR)
+ ;
+
+ writel(0x, wdt-wdtwspr);
+ while ((readl(wdt-wdtwwps))
[U-Boot] [PATCH 1/3] arm, spl: add watchdog library to SPL
Signed-off-by: Heiko Schocher h...@denx.de Cc: Tom Rini tr...@ti.com --- doc/README.SPL | 2 +- spl/Makefile | 1 + 2 Dateien geändert, 2 Zeilen hinzugefügt(+), 1 Zeile entfernt(-) diff --git a/doc/README.SPL b/doc/README.SPL index ac9a213..312a6a6 100644 --- a/doc/README.SPL +++ b/doc/README.SPL @@ -67,7 +67,7 @@ CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o) CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o) CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o) CONFIG_SPL_RAM_DEVICE (common/spl/spl.c) - +CONFIG_SPL_WATCHDOG_SUPPORT (drivers/watchdog/libwatchdog.o) Normally CPU is assumed to be the same between the SPL and normal u-boot build. However it is possible to specify a different CPU for diff --git a/spl/Makefile b/spl/Makefile index 6e5299b..9a46e7e 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -82,6 +82,7 @@ LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/libnet.o LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/libphy.o LIBS-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/libusb_musb-new.o LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/libusb_gadget.o +LIBS-$(CONFIG_SPL_WATCHDOG_SUPPORT) += drivers/watchdog/libwatchdog.o ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),) LIBS-y += $(CPUDIR)/omap-common/libomap-common.o -- 1.7.11.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 02/11] video: add Faraday FTLCDC200 LCD controller support
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTLCDC200 Color LCD controller performs translation of
pixel-coded data into the required formats and timings to
drive a variety of single/dual mono and color LCDs.
Depending on the LCD type and mode, the unpacked data can represent:
1. an actual true display gray or color value
2. an address to a 256 x 16 bit wide palette RAM gray or color value.
The FTLCDC200 generates 4 individual interrupts for:
1. DMA FIFO underflow
2. base address update
3. vertical status
4. bus error.
There is also a single combined interrupt that is raised when any of
the individual interrupts become active.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
CC: Anatolij Gustschin ag...@denx.de
---
Changes for v7:
- Update license to use SPDX identifiers.
Changes for v6:
- Nothing updates
Changes for v5:
- Coding Style cleanup:
struct chip_regs __iomem *regs - struct chip_regs *regs
- Chain it back to Faraday A360/A369 patch series, because
Faraday A369 depends on the header file of this patch
for I2C work-around.(Enable I2C clock to prevent I2C bus hangs)
Changes for v4:
- Nothing updates
Changes for v3:
- Nothing updates
Changes for v2:
- Make it a separate patch, rather then a part of
Faraday A36x patch series
drivers/video/Makefile |1 +
drivers/video/ftlcdc200.c | 136 +
drivers/video/ftlcdc200_panel.c | 209 +++
include/faraday/ftlcdc200.h | 178 +
include/lcd.h | 33 +++
5 files changed, 557 insertions(+)
create mode 100644 drivers/video/ftlcdc200.c
create mode 100644 drivers/video/ftlcdc200_panel.c
create mode 100644 include/faraday/ftlcdc200.h
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index f1fb26c..873ee26 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -19,6 +19,7 @@ COBJS-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o
exynos_mipi_dsi_common.o \
exynos_mipi_dsi_lowlevel.o
COBJS-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
+COBJS-$(CONFIG_FTLCDC200) += ftlcdc200.o ftlcdc200_panel.o
COBJS-$(CONFIG_MPC8XX_LCD) += mpc8xx_lcd.o
COBJS-$(CONFIG_PXA_LCD) += pxa_lcd.o
COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o
diff --git a/drivers/video/ftlcdc200.c b/drivers/video/ftlcdc200.c
new file mode 100644
index 000..774a060
--- /dev/null
+++ b/drivers/video/ftlcdc200.c
@@ -0,0 +1,136 @@
+/*
+ * Faraday LCD Controller
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include lcd.h
+#include faraday/ftlcdc200.h
+
+#ifndef CONFIG_FTLCDC200_FREQ
+#define CONFIG_FTLCDC200_FREQ clock_get_rate(AHB_CLK)
+#endif
+
+static struct ftlcdc200_regs *regs = (void __iomem *)CONFIG_FTLCDC200_BASE;
+
+static void ftlcdc2xx_fixup(struct vidinfo *panel)
+{
+ u_long ht, vt;
+ u_long div, clk;
+ long fps = 60;
+ long upper = 32767;
+ long lower = -32767;
+
+ if (panel-vl_fps)
+ return;
+
+ /* If it's serial mode */
+ if (panel-vl_serial SPPR_SERIAL)
+ clk = CONFIG_FTLCDC200_FREQ / 3;
+ else
+ clk = CONFIG_FTLCDC200_FREQ;
+
+ /* Derive clock divisor */
+ ht = panel-vl_col + panel-vl_hbp + panel-vl_hfp + panel-vl_hsw;
+ vt = panel-vl_row + panel-vl_vbp + panel-vl_vfp + panel-vl_vsw;
+ for (div = 1; div = 0x7f; ++div) {
+ long tmp = (clk / div / ht / vt);
+ if (fps tmp) {
+ lower = tmp;
+ break;
+ }
+ upper = tmp;
+ }
+ if ((upper - fps) (fps - lower))
+ div += 1;
+ div = (div 1) ? (div - 1) : div;
+
+ /* Update hardware register cache */
+ panel-vl_polarity = (panel-vl_polarity (~0x7f00))
+ | ((div - 1) 8);
+
+ /* Derive real frame rate */
+ panel-vl_fps = (u_long)(clk / div / ht / vt);
+
+ debug(ftlcdc200: %s\n, panel-vl_name);
+ debug(ftlcdc200: fps=%u (%u FPS %u)\n,
+ (unsigned int)panel-vl_fps,
+ (unsigned int)lower,
+ (unsigned int)upper);
+ debug(ftlcdc200: div=%u (ahb=%u MHz)\n,
+ (unsigned int)div,
+ (unsigned int)CONFIG_FTLCDC200_FREQ / 100);
+}
+
+/* setcolreg used in 8bpp/16bpp */
+void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
+{
+ /* nothing needs to be done, we use true color */
+}
+
+/* initcolregs used in monochrome */
+void lcd_initcolregs(void)
+{
+ /* nothing needs to be done, we use true color */
+}
+
+void lcd_ctrl_init(void *lcdbase)
+{
+
[U-Boot] [PATCH v7 00/11] arm: add Faraday A36x SoC platform support
From: Kuo-Jung Su dant...@faraday-tech.com
These patches introduce Faraday A36x SoC platform support.
Here are some public documents for your reference.
http://www.faraday-tech.com/html/documentation/index.html
There is also a A369 QEMU emulator available at my github account:
https://github.com/dantesu1218/qemu.git
Here is quick start for QEMU + U-Boot:
1. Download the QEMU source tree
$ git clone -b qemu-1.5.1 https://github.com/dantesu1218/qemu.git
2. Build Install the QEMU:
$ ./configure --target-list=arm-softmmu
$ make
$ make install
3. Launch u-boot with QEMU:
$ qemu-system-arm -M a369 -m 512M -nographic -kernel ~/u-boot-2013.07/u-boot
Changes for v7:
- Update license to use SPDX identifiers.
- cfi_flash: drop the patch to unmap_physmem(),
because it's already applied.
- ftnandc021: put_unaligned() - memcpy()
- ftnandc021: update ecc relatived function prototypes to fix
compile warnnings.
Changes for v6:
- Drop ethernet driver updates for ftmac110ftgmac100,
because they are already commited.
- arch/arm/cpu/faraday/cpu.c:
struct ftwdt010_wdt __iomem *regs - struct ftwdt010_wdt *regs
- arch/arm/cpu/faraday/cmd_bootfa.c: fix compiler warnning
- arch/arm/cpu/faraday/cmd_bootfa.c: use shorter paragraph
in commit message, and move the original statement into the
top of source file.
- ftnandc021: update README for CONFIG_SYS_FTNANDC021_TIMING
- ftnandc021: remove illegal type-punning
Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs - struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Make 'arm: dma_alloc_coherent: malloc() - memalign()' as a separate patch
- Make 'cfi_flash: use buffer length in unmap_physmem()' as a separate patch
- Define Faraday machine type in board's config header file
- Add the rationale to the command 'bootfa'
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Chain the video:FTLCDC200 back to this patch series.
- Chain the nand:FTNANDC021 back to this patch series.
- Chain the net:FTGMAC100 FTMAC110 back to this patch series.
- Update Faraday Firmware Image Format:
1. Drop u-boot image support to simplify the design.
Since it's not possible for the hard-wired ROM code of A360/A369
to support U-boot images. And the real bootloader for A360/A369
is actually Faraday bootcode2, rather than U-Boot.
2. Add image creation timestamp
- Update 'arch/arm/cpu/faraday/start.S' with the new design, which move
relocation into 'arch/arm/lib/relocate.S'
- Drop i2c:FTI2C010 spi:FTSSP010_SPI support. The corresponding patch
would restart after this patch series have been accepted.
- Revise IRQ MMU design: Now the exception table would be mapped to
0x as a small page(4KB), rather than runtime adjust after
relocation finished.
- Revise irq:FTINTC020 design, now the irq is always enabled inside
irq_install_handler().
- Revise clock management system
- Revise FTPWMTMR010 FTTMR010 timer design:
1. Drop IRQ dependant implementation
2. Use gd-arch.timer_rate_hz for timer clock source
3. Use gd-arch.tbl for timestamp
Changes for v4:
- Coding Style cleanup.
- Break down the patch series:
- Patches without hard dependency to this series are now
seperate patches.
- Split up the patch into more logical changesets
(i.e. interrupt timers are now split up)
- Drop the faraday/nand.h to remove dependency to ftnandc021
- Drop the faraday/mmc.h to remove dependency to ftsdc010
- Add change logs to each part of the patch series to make
patchwork be able to grab comments.
Changes for v3:
- Coding Style cleanup.
There is still one warnning reported by checkpatch.pl,
however it's too deep for me to fix it.
Here is the shapshot for it:
-
WARNING: do not add new typedefs
#9735: FILE: include/lcd.h:258:
+typedef struct vidinfo {
-
- Drop bit fields from c struct.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- cmd_boot.c: Make it a separate stand-alone patch.
- ftspi020: Make it a separate stand-alone patch.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- MMU/D-Cache: Drop static non-cached region, now we use
map_physmem()/unmap_physmem() for dynamic mappings.
- ftmac110: Make a correction to multi-line comment style
- ftmac110: Use random MAC address
[U-Boot] [PATCH v7 04/11] arm: add MMU/D-Cache support for Faraday cores
From: Kuo-Jung Su dant...@faraday-tech.com
This updates the map_physmem()/unmap_physmem(), and use
them to implement dma_alloc_coherent() dma_free_coherent().
It uses 1MB section for each mapping, and thus wastes lots of
address space, however this should still be good enough for
tiny systems (i.e. u-boot).
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v6, v7:
- Nothing updates
Changes for v5:
- Add void dram_bank_mmu_setup() into 'arch/arm/cpu/faraday/cpu.c'
to override the weak function in cache-cp15.c.
- Use small page (4KB) to map relocated exception table to 0x
Changes for v4:
- Coding Style cleanup.
Changes for v3:
- Coding Style cleanup.
- Always insert a blank line between declarations and code.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- Drop static non-cached region, now we use map_physmem()/unmap_physmem()
for dynamic mappings.
Changes for v2:
- Coding Style cleanup.
- cache-cp15: Enable write buffer in write-through mode.
arch/arm/include/asm/dma-mapping.h | 56 -
arch/arm/include/asm/global_data.h |4 +
arch/arm/include/asm/io.h | 159 ++--
arch/arm/include/asm/system.h |7 +-
arch/arm/lib/cache-cp15.c |9 ++
5 files changed, 223 insertions(+), 12 deletions(-)
diff --git a/arch/arm/include/asm/dma-mapping.h
b/arch/arm/include/asm/dma-mapping.h
index 55a4e26..e066204 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -8,22 +8,76 @@
#ifndef __ASM_ARM_DMA_MAPPING_H
#define __ASM_ARM_DMA_MAPPING_H
+#if defined(CONFIG_FARADAY) !defined(CONFIG_SYS_DCACHE_OFF)
+#include asm/u-boot.h
+#include asm/global_data.h
+#include asm/io.h
+#include malloc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+#endif /* CONFIG_FARADAY !CONFIG_SYS_DCACHE_OFF */
+
enum dma_data_direction {
DMA_BIDIRECTIONAL = 0,
DMA_TO_DEVICE = 1,
DMA_FROM_DEVICE = 2,
};
-static void *dma_alloc_coherent(size_t len, unsigned long *handle)
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
{
+#if defined(CONFIG_FARADAY) !defined(CONFIG_SYS_DCACHE_OFF)
+ void *map, *va = memalign(ARCH_DMA_MINALIGN, len);
+
+ if (va gd-arch.cpu_mmu) {
+ invalidate_dcache_range((ulong)va, (ulong)va + len);
+ map = map_physmem((phys_addr_t)va, len, MAP_NOCACHE);
+ if (!map)
+ free(va);
+ va = map;
+ }
+
+ if (handle)
+ *handle = virt_to_phys(va);
+
+ return va;
+#else /* CONFIG_FARADAY !CONFIG_SYS_DCACHE_OFF */
*handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
return (void *)*handle;
+#endif /* CONFIG_FARADAY !CONFIG_SYS_DCACHE_OFF */
+}
+
+static inline void dma_free_coherent(void *vaddr, ulong len)
+{
+#if defined(CONFIG_FARADAY) !defined(CONFIG_SYS_DCACHE_OFF)
+ void *tmp = (void *)virt_to_phys(vaddr);
+ unmap_physmem(vaddr, len);
+ vaddr = tmp;
+#endif
+ free(vaddr);
}
static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
enum dma_data_direction dir)
{
+#if defined(CONFIG_FARADAY) !defined(CONFIG_SYS_DCACHE_OFF)
+ if (gd-arch.cpu_mmu) {
+ switch (dir) {
+ case DMA_BIDIRECTIONAL:
+ case DMA_TO_DEVICE:
+ flush_dcache_range((ulong)vaddr,
+ (ulong)vaddr + len);
+ break;
+
+ case DMA_FROM_DEVICE:
+ invalidate_dcache_range((ulong)vaddr,
+ (ulong)vaddr + len);
+ break;
+ }
+ }
+ return virt_to_phys((void *)vaddr);
+#else /* CONFIG_FARADAY !CONFIG_SYS_DCACHE_OFF */
return (unsigned long)vaddr;
+#endif /* CONFIG_FARADAY !CONFIG_SYS_DCACHE_OFF */
}
static inline void dma_unmap_single(volatile void *vaddr, size_t len,
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index 79a9597..587ecbc 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -26,6 +26,10 @@ struct arch_global_data {
unsigned long pllb_rate_hz;
unsigned long at91_pllb_usb_init;
#endif
+#ifdef CONFIG_FARADAY
+ unsigned long cpu_id;
+ unsigned long cpu_mmu;/* has mmu */
+#endif
/* static data needed by most of timer.c on ARM platforms */
unsigned long timer_rate_hz;
unsigned long tbu;
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 1fbc531..6edb53a 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -28,9 +28,36 @@
#if 0 /*
[U-Boot] [PATCH v7 01/11] arm: dma_alloc_coherent: malloc() - memalign()
From: Kuo-Jung Su dant...@faraday-tech.com
Even though the MMU/D-cache is off, some DMA engines still
expect strict address alignment.
For example, the incoming Faraday FTMAC110 FTGMAC100 ethernet
controllers expect the tx/rx descriptors should always be aligned
to 16-bytes boundary.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes for v6, v7:
- Nothing updates
Changes for v5:
- Initial commit, which is separated from
arm: add MMU/D-Cache support for Faraday cores
arch/arm/include/asm/dma-mapping.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/dma-mapping.h
b/arch/arm/include/asm/dma-mapping.h
index 009863b..55a4e26 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -16,7 +16,7 @@ enum dma_data_direction {
static void *dma_alloc_coherent(size_t len, unsigned long *handle)
{
- *handle = (unsigned long)malloc(len);
+ *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
return (void *)*handle;
}
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 05/11] arm: add Faraday processor core support
From: Kuo-Jung Su dant...@faraday-tech.com
This adds i/d-cache control, mmu setup bootstrap code
for Faraday cores.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v7:
- Update license to use SPDX identifiers.
Changes for v6:
- Nothing updates
Changes for v5:
- Initial commit which is separated from
arm: add Faraday common utilities
arch/arm/cpu/faraday/Makefile | 39
arch/arm/cpu/faraday/config.mk | 17 ++
arch/arm/cpu/faraday/cpu.c | 333 +++
arch/arm/cpu/faraday/start.S | 419
4 files changed, 808 insertions(+)
create mode 100644 arch/arm/cpu/faraday/Makefile
create mode 100644 arch/arm/cpu/faraday/config.mk
create mode 100644 arch/arm/cpu/faraday/cpu.c
create mode 100644 arch/arm/cpu/faraday/start.S
diff --git a/arch/arm/cpu/faraday/Makefile b/arch/arm/cpu/faraday/Makefile
new file mode 100644
index 000..acc09eb
--- /dev/null
+++ b/arch/arm/cpu/faraday/Makefile
@@ -0,0 +1,39 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su dant...@faraday-tech.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(CPU).o
+
+src-y := cpu.o
+
+START = start.o
+COBJS = $(src-y)
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_NO_CPU_SUPPORT_CODE
+START :=
+endif
+endif
+
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/faraday/config.mk b/arch/arm/cpu/faraday/config.mk
new file mode 100644
index 000..eed9c81
--- /dev/null
+++ b/arch/arm/cpu/faraday/config.mk
@@ -0,0 +1,17 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su dant...@faraday-tech.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
+
+PLATFORM_CPPFLAGS += -march=armv4
+# =
+#
+# Supply options according to compiler version
+#
+# =
+PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call
cc-option,-malignment-traps,))
+PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
diff --git a/arch/arm/cpu/faraday/cpu.c b/arch/arm/cpu/faraday/cpu.c
new file mode 100644
index 000..874334a
--- /dev/null
+++ b/arch/arm/cpu/faraday/cpu.c
@@ -0,0 +1,333 @@
+/*
+ * arch/arm/cpu/faraday/cpu.c
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * CPU specific code
+ */
+
+#include common.h
+#include command.h
+#include asm/io.h
+#include asm/system.h
+#include faraday/ftwdt010_wdt.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int cleanup_before_linux(void)
+{
+ /*
+* this function is called just before we call linux
+* it prepares the processor for linux
+*
+* we turn off caches etc ...
+*/
+
+ disable_interrupts();
+
+ /* turn off D-cache */
+ dcache_disable();
+
+ /* flush I-cache */
+ __asm__ __volatile__ (
+ mov r0, #0\n
+ mcr p15, 0, r0, c7, c5, 0\n /* invalidate i-cache all */
+ : /* output */
+ : /* input */
+ : r0 /* clobber list */
+ );
+
+ return 0;
+}
+
+/*
+ * This arch_preboot_os() overrides the weak function
+ * in cmd_bootm.c.
+ */
+void arch_preboot_os(void)
+{
+ cleanup_before_linux();
+}
+
+#ifdef CONFIG_SYS_DCACHE_OFF
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+#else
+
+void flush_dcache_all(void)
+{
+ __asm__ __volatile__ (
+ mov r0,#0\n
+ mcr p15,0,r0,c7,c14,0\n /* clean invalidate d-cache all */
+ mcr p15,0,r0,c7,c10,4\n /* drain write buffer */
+ : /* output */
+ : /* input */
+ : r0 /* clobber list */
+ );
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ unsigned long align = CONFIG_SYS_CACHELINE_SIZE;
+ unsigned long mask = ~(align - 1);
+
+ /* aligned to cache line */
+ stop = (stop + (align - 1)) mask;
+ start = start mask;
+
+ __asm__ __volatile__ (
+ 1:\n
+ mcr p15,0,%0,c7,c14,1\n /* clean invalidate d-cache line */
+ add %0,%0,%2\n
+ cmp %0,%1\n
+
[U-Boot] [PATCH v7 08/11] arm: add Faraday FTPWMTMR010 timer support
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v7:
- Update license to use SPDX identifiers.
Changes for v6:
- Nothing updates
Changes for v5:
- Drop IRQ dependant implementation
- Use gd-arch.timer_rate_hz for timer clock source
- Use gd-arch.tbl for timestamp
Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]
Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.
Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
arch/arm/cpu/faraday/Makefile |1 +
arch/arm/cpu/faraday/ftpwmtmr010.c | 116
include/faraday/ftpwmtmr010.h | 40 +
3 files changed, 157 insertions(+)
create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
create mode 100644 include/faraday/ftpwmtmr010.h
diff --git a/arch/arm/cpu/faraday/Makefile b/arch/arm/cpu/faraday/Makefile
index df28792..715bb5d 100644
--- a/arch/arm/cpu/faraday/Makefile
+++ b/arch/arm/cpu/faraday/Makefile
@@ -12,6 +12,7 @@ LIB = $(obj)lib$(CPU).o
src-y := cpu.o
src-$(CONFIG_FTINTC020) += ftintc020.o
src-$(CONFIG_FTTMR010)+= fttmr010.o
+src-$(CONFIG_FTPWMTMR010) += ftpwmtmr010.o
START = start.o
COBJS = $(src-y)
diff --git a/arch/arm/cpu/faraday/ftpwmtmr010.c
b/arch/arm/cpu/faraday/ftpwmtmr010.c
new file mode 100644
index 000..db49d39
--- /dev/null
+++ b/arch/arm/cpu/faraday/ftpwmtmr010.c
@@ -0,0 +1,116 @@
+/*
+ * arch/arm/cpu/faraday/ftpwmtmr010.c
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+
+#include faraday/ftpwmtmr010.h
+
+#ifdef CONFIG_A369_FA606TE_PLATFORM
+#define TIMER_ID4
+#else
+#define TIMER_ID0
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct ftpwmtmr010_regs *regs = (void __iomem *)CONFIG_FTPWMTMR010_BASE;
+
+void udelay_masked(unsigned long usec)
+{
+ int id = TIMER_ID + 1;
+ ulong freq = gd-arch.timer_rate_hz;
+
+ /* timer re-start */
+ writel(0, regs-t[id].ctrl);
+ writel(BIT_MASK(id), regs-isr);
+ writel(0, regs-t[id].cmpb);
+ writel((freq / 100) * usec, regs-t[id].cntb);
+ writel(CTRL_INTEN | CTRL_START | CTRL_UPDATE, regs-t[id].ctrl);
+
+ /* wait for timer interrupt */
+ while (!(readl(regs-isr) BIT_MASK(id)))
+ ;
+
+ /* timer disabled */
+ writel(0, regs-t[id].ctrl);
+ writel(BIT_MASK(id), regs-isr);
+}
+
+void reset_timer_masked(void)
+{
+ int id = TIMER_ID;
+ ulong freq = gd-arch.timer_rate_hz;
+
+ writel(0, regs-t[id].ctrl);
+ writel(BIT_MASK(id), regs-isr);
+
+ /* setup a longest periodic timer */
+ writel((0x / freq) * freq, regs-t[id].cntb);
+
+ writel(0, regs-t[id].cmpb);
+ writel(CTRL_AUTORELOAD | CTRL_INTEN | CTRL_START | CTRL_UPDATE,
+ regs-t[id].ctrl);
+}
+
+ulong get_timer_masked(void)
+{
+ int id = TIMER_ID;
+ ulong freq = gd-arch.timer_rate_hz;
+ ulong secs = 0x / freq;
+ ulong ms = freq / CONFIG_SYS_HZ;
+
+ if (readl(regs-isr) BIT_MASK(id)) {
+ writel(BIT_MASK(id), regs-isr);
+ gd-arch.tbl += secs * CONFIG_SYS_HZ;
+ }
+
+ return gd-arch.tbl
+ + ((secs * freq - readl(regs-t[id].cnto)) / ms);
+}
+
+int timer_init(void)
+{
+ gd-arch.tbl = 0;
+ reset_timer_masked();
+ return 0;
+}
+
+void reset_timer(void)
+{
+ reset_timer_masked();
+}
+
+ulong get_timer(ulong base)
+{
+ return get_timer_masked() - base;
+}
+
+void __udelay(unsigned long usec)
+{
+ udelay_masked(usec);
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+ return CONFIG_SYS_HZ;
+}
diff --git a/include/faraday/ftpwmtmr010.h b/include/faraday/ftpwmtmr010.h
new file mode 100644
index 000..806f4c0
--- /dev/null
+++ b/include/faraday/ftpwmtmr010.h
@@ -0,0 +1,40 @@
+/*
+ * arch/arm/cpu/faraday/ftpwmtmr010.h
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef ARCH_ARM_CPU_FARADAY_FTPWMTMR010_H
+#define
[U-Boot] [PATCH v7 07/11] arm: add Faraday FTTMR010 timer support
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v7:
- Update license to use SPDX identifiers.
Changes for v6:
- Nothing updates
Changes for v5:
- Drop IRQ dependant implementation
- Use gd-arch.timer_rate_hz for timer clock source
- Use gd-arch.tbl for timestamp
Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]
Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.
Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
arch/arm/cpu/faraday/Makefile |1 +
arch/arm/cpu/faraday/fttmr010.c | 124 +++
include/faraday/fttmr010.h | 17 ++
3 files changed, 142 insertions(+)
create mode 100644 arch/arm/cpu/faraday/fttmr010.c
diff --git a/arch/arm/cpu/faraday/Makefile b/arch/arm/cpu/faraday/Makefile
index 6302a1d..df28792 100644
--- a/arch/arm/cpu/faraday/Makefile
+++ b/arch/arm/cpu/faraday/Makefile
@@ -11,6 +11,7 @@ LIB = $(obj)lib$(CPU).o
src-y := cpu.o
src-$(CONFIG_FTINTC020) += ftintc020.o
+src-$(CONFIG_FTTMR010)+= fttmr010.o
START = start.o
COBJS = $(src-y)
diff --git a/arch/arm/cpu/faraday/fttmr010.c b/arch/arm/cpu/faraday/fttmr010.c
new file mode 100644
index 000..f80f90f
--- /dev/null
+++ b/arch/arm/cpu/faraday/fttmr010.c
@@ -0,0 +1,124 @@
+/*
+ * arch/arm/cpu/faraday/fttmr010.c
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include faraday/fttmr010.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct fttmr010 *regs = (void __iomem *)CONFIG_FTTMR010_BASE;
+
+void udelay_masked(unsigned long usec)
+{
+ ulong freq = gd-arch.timer_rate_hz;
+
+ /* Disable Timer2 */
+ clrbits_le32(regs-cr, FTTMR010_TM2_CRMASK);
+ /* Disable Timer2 interrupts */
+ writel(FTTMR010_TM2_ISRMASK, regs-interrupt_mask);
+ /* Clear Timer2 interrupts */
+ writel(FTTMR010_TM2_ISRMASK, regs-interrupt_state);
+
+ /* Configure Timer2 */
+ writel((freq / 100) * usec, regs-timer2_counter);
+ writel(0, regs-timer2_load);
+ writel(0, regs-timer2_match1);
+ writel(0, regs-timer2_match2);
+
+ /* Enable Timer2 */
+ setbits_le32(regs-cr,
+ FTTMR010_TM2_OFENABLE | FTTMR010_TM2_ENABLE);
+
+ /* Wait until timeout */
+ while (!(readl(regs-interrupt_state) FTTMR010_TM2_ISRMASK))
+ ;
+}
+
+void reset_timer_masked(void)
+{
+ ulong freq = gd-arch.timer_rate_hz;
+
+ /* Disable Timer1 */
+ clrbits_le32(regs-cr, FTTMR010_TM1_CRMASK);
+
+ /* Disable Clear Timer1 interrupts */
+ writel(FTTMR010_TM1_ISRMASK, regs-interrupt_mask);
+ writel(FTTMR010_TM1_ISRMASK, regs-interrupt_state);
+
+ /* Setup a longest periodic timer */
+ writel((0x / freq) * freq, regs-timer1_counter);
+ writel((0x / freq) * freq, regs-timer1_load);
+
+ writel(0, regs-timer1_match1);
+ writel(0, regs-timer1_match2);
+
+ /* Disable match interrupts */
+ writel(FTTMR010_TM1_MATCH1 | FTTMR010_TM1_MATCH2,
+ regs-interrupt_mask);
+
+ /* Enable Timer1 with overflow interrupt */
+ setbits_le32(regs-cr,
+ FTTMR010_TM1_OFENABLE | FTTMR010_TM1_ENABLE);
+}
+
+ulong get_timer_masked(void)
+{
+ ulong freq = gd-arch.timer_rate_hz;
+ ulong secs = 0x / freq;
+ ulong ms = freq / CONFIG_SYS_HZ;
+
+ if (readl(regs-interrupt_state) FTTMR010_TM1_ISRMASK) {
+ writel(FTTMR010_TM1_ISRMASK, regs-interrupt_state);
+ gd-arch.tbl += secs * CONFIG_SYS_HZ;
+ }
+
+ return gd-arch.tbl
+ + ((secs * freq) - readl(regs-timer1_counter)) / ms;
+}
+
+int timer_init(void)
+{
+ gd-arch.tbl = 0;
+ reset_timer_masked();
+ return 0;
+}
+
+void reset_timer(void)
+{
+ reset_timer_masked();
+}
+
+ulong get_timer(ulong base)
+{
+ return get_timer_masked() - base;
+}
+
+void __udelay(unsigned long usec)
+{
+ udelay_masked(usec);
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+ return CONFIG_SYS_HZ;
+}
diff
[U-Boot] [PATCH v7 06/11] arm: add Faraday FTINTC020 interrupt controller support
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v7:
- Update license to use SPDX identifiers.
Changes for v6:
- Nothing updates
Changes for v5:
- Coding Style cleanup.
- Now the irq is always enabled inside irq_install_handler().
Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]
Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.
Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
arch/arm/cpu/faraday/Makefile|1 +
arch/arm/cpu/faraday/ftintc020.c | 144 ++
include/common.h |3 +
include/faraday/ftintc020.h | 36 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/arm/cpu/faraday/ftintc020.c
create mode 100644 include/faraday/ftintc020.h
diff --git a/arch/arm/cpu/faraday/Makefile b/arch/arm/cpu/faraday/Makefile
index acc09eb..6302a1d 100644
--- a/arch/arm/cpu/faraday/Makefile
+++ b/arch/arm/cpu/faraday/Makefile
@@ -10,6 +10,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).o
src-y := cpu.o
+src-$(CONFIG_FTINTC020) += ftintc020.o
START = start.o
COBJS = $(src-y)
diff --git a/arch/arm/cpu/faraday/ftintc020.c b/arch/arm/cpu/faraday/ftintc020.c
new file mode 100644
index 000..bc36674
--- /dev/null
+++ b/arch/arm/cpu/faraday/ftintc020.c
@@ -0,0 +1,144 @@
+/*
+ * arch/arm/cpu/faraday/ftintc020.c
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+
+#include faraday/ftintc020.h
+
+static struct ftintc020_regs *regs = (void __iomem *)CONFIG_FTINTC020_BASE;
+
+static struct {
+ void *data;
+ void (*func)(void *data);
+} irq_hndl[64];
+
+static inline void irq_acknowledge(int irq)
+{
+ uint32_t mask = BIT_MASK(irq);
+
+ if (irq 32)
+ writel(mask, regs-irq32.scr);
+ else
+ writel(mask, regs-irq64.scr);
+}
+
+void irq_enable(int irq)
+{
+ uint32_t mask = BIT_MASK(irq);
+
+ if (irq 32)
+ setbits_le32(regs-irq32.ena, mask);
+ else
+ setbits_le32(regs-irq64.ena, mask);
+}
+
+void irq_disable(int irq)
+{
+ uint32_t mask = BIT_MASK(irq);
+
+ if (irq 32)
+ clrbits_le32(regs-irq32.ena, mask);
+ else
+ clrbits_le32(regs-irq64.ena, mask);
+}
+
+void irq_set_trigger(int irq, int edge, int low)
+{
+ uint32_t mask = BIT_MASK(irq);
+
+ if (edge) {
+ if (irq 32)
+ setbits_le32(regs-irq32.tmr, mask);
+ else
+ setbits_le32(regs-irq64.tmr, mask);
+ } else {
+ if (irq 32)
+ clrbits_le32(regs-irq32.tmr, mask);
+ else
+ clrbits_le32(regs-irq64.tmr, mask);
+ }
+
+ if (low) {
+ if (irq 32)
+ setbits_le32(regs-irq32.tlr, mask);
+ else
+ setbits_le32(regs-irq64.tlr, mask);
+ } else {
+ if (irq 32)
+ clrbits_le32(regs-irq32.tlr, mask);
+ else
+ clrbits_le32(regs-irq64.tlr, mask);
+ }
+}
+
+void do_irq(struct pt_regs *pt_regs)
+{
+ int irq;
+ uint32_t stat;
+
+ irq = 32;
+ stat = readl(regs-irq64.sr); /* IRQ 32 ~ 63 */
+ if (!stat) {
+ irq = 0;
+ stat = readl(regs-irq32.sr); /* IRQ 0 ~ 31 */
+ }
+ irq += ffs(stat) - 1;
+
+ if (irq 0) {
+ printf(interrupts: no irq!?\n);
+ return;
+ }
+
+ if (irq_hndl[irq].func)
+ irq_hndl[irq].func(irq_hndl[irq].data);
+ else
+ printf(Unhandled IRQ = %d\n, irq);
+
+ irq_acknowledge(irq);
+}
+
+void irq_install_handler(int irq, interrupt_handler_t *hndl, void *data)
+{
+ if (irq = 0 irq 64) {
+ irq_hndl[irq].func = hndl;
+ irq_hndl[irq].data = data;
+ irq_enable(irq);
+ }
+}
+
+void irq_free_handler(int irq)
+{
+ if (irq = 0 irq 64) {
+ irq_hndl[irq].func = NULL;
+ irq_hndl[irq].data = NULL;
+ irq_disable(irq);
+ }
+}
+
+int arch_interrupt_init(void)
+{
+ int i;
+
+ for (i = 0; i 64; ++i)
+ irq_free_handler(i);
+
+ /* hardware reset */
+ writel(0x,
[U-Boot] [PATCH v7 10/11] mmc: ftsdc010_mci: clk_get_rate() - clock_get_rate()
From: Kuo-Jung Su dant...@faraday-tech.com This updates ftsdc010_mci.c for latest Faraday clock APIs. Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com CC: Albert Aribaud albert.u.b...@aribaud.net CC: Andy Fleming aflem...@gmail.com --- Changes for v6, v7: - Nothing updates Changes for v5: - Initial commit drivers/mmc/ftsdc010_mci.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index 7600d5c..54976b0 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -366,7 +366,7 @@ int ftsdc010_mmc_init(int devid) #ifdef CONFIG_SYS_CLK_FREQ chip-sclk = CONFIG_SYS_CLK_FREQ; #else - chip-sclk = clk_get_rate(SDC); + chip-sclk = clock_get_rate(MMC_CLK); #endif mmc-voltages = MMC_VDD_32_33 | MMC_VDD_33_34; -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 03/11] nand: add Faraday FTNANDC021 NAND controller support
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTNANDC021 is an integrated NAND flash controller.
It use a build-in command table to abstract the underlying
NAND flash control logic.
For example:
Issuing a command 0x10 to FTNANDC021 would result in
a page write + a read status operation.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert ARIBAUD albert.u.b...@aribaud.net
CC: Scott Wood scottw...@freescale.com
---
Changes for v7:
- ftnandc021.[ch]: Update license to use SPDX identifiers.
- ftnandc021.c: put_unaligned() - memcpy()
- ftnandc021.c: update ecc relatived function prototypes to
fix compile warnnings.
Changes for v6:
- Update README for CONFIG_SYS_FTNANDC021_TIMING
- Remove illegal type-punning by introducing
put_unaligned() get_unaligned().
Changes for v5 (Part of A360/A369 patch series):
- Coding Style cleanup:
struct chip_regs __iomem *regs - struct chip_regs *regs
- For there is a strong dependancy between this and A360/A369 patch
series, it had been chained back to A360/A369 patch series.
- The latest nand_base requires the ecc.strength to be set properlly,
so this patch adds ecc.strength setting accroding to ECC algorithm.
Changes for v5 (Standalone):
- Update README for the description of CONFIG_SYS_FTNANDC021_TIMING.
- Drop redundant white space. (i.e. if (mtd-writesize = ' '4096))
Changes for v4:
- Make it a separate patch, rather then a part of
Faraday A36x patch series
- Drop the faraday/nand.h to remove dependency to
Faraday A36x patch series.
- CONFIG_SYS_NAND_TIMING - CONFIG_SYS_FTNANDC021_TIMING
- Remove non-ECC code.
- Implement private hwecc read/write_page functions
to get rid of .eccpos .eccbytes.
- Use macro constants for timeout control
Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- Re-write this driver with ECC enabled and correct column address
handling for OOB read/write,
- Fix issuses addressed by Scott.
Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
README| 10 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/ftnandc021.c | 609 +
include/faraday/ftnandc021.h | 152 ++
4 files changed, 772 insertions(+)
create mode 100644 drivers/mtd/nand/ftnandc021.c
create mode 100644 include/faraday/ftnandc021.h
diff --git a/README b/README
index a5c3e8d..f4b0dbe 100644
--- a/README
+++ b/README
@@ -4076,6 +4076,16 @@ Low Level (hardware related) configuration options:
- drivers/mtd/nand/ndfc.c
- drivers/mtd/nand/mxc_nand.c
+- CONFIG_SYS_FTNANDC021_TIMING
+ This option specifies an array of customized timing parameters
+ for Faraday FTNANDC021 NAND flash controller.
+ e.g.
+ #define CONFIG_SYS_FTNANDC021_TIMING \
+ { CONFIG_NAND_K9F4G08U0B_AC1,
CONFIG_NAND_K9F4G08U0B_AC2 }
+ where CONFIG_NAND_K9F4G08U0B_AC[1/2] are the optimized AC
+ timing parameters for register AC_TIMING1 and AC_TIMING2 which
+ control the timing for CLE, ALE, WE and RE signals.
+
- CONFIG_SYS_NDFC_EBC0_CFG
Sets the EBC0_CFG register for the NDFC. If not defined
a default value will be used.
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index e27e0b7..ee85b8a 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -48,6 +48,7 @@ COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
COBJS-$(CONFIG_NAND_FSMC) += fsmc_nand.o
+COBJS-$(CONFIG_NAND_FTNANDC021) += ftnandc021.o
COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
diff --git a/drivers/mtd/nand/ftnandc021.c b/drivers/mtd/nand/ftnandc021.c
new file mode 100644
index 000..9d249f7
--- /dev/null
+++ b/drivers/mtd/nand/ftnandc021.c
@@ -0,0 +1,609 @@
+/*
+ * Faraday NAND Flash Controller
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/unaligned.h
+#include nand.h
+#include malloc.h
+
+#include faraday/ftnandc021.h
+
+#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ 2) /* 250 ms */
+#define CFG_PIO_TIMEOUT (CONFIG_SYS_HZ 3) /* 125 ms */
+
+struct ftnandc021_chip {
+ void __iomem
[U-Boot] [PATCH v7 09/11] arm: add customized boot command for Faraday Images
From: Kuo-Jung Su dant...@faraday-tech.com At the time of writting, none of Faraday NAND SPI controllers supports XIP (eXecute In Place), and the 1st stage bootstrap stored in embedded ROM is not compatible to U-Boot design. So this patch is added to support booting from Faraday Images. Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com CC: Albert Aribaud albert.u.b...@aribaud.net --- Changes for v7: - Update license to use SPDX identifiers. Changes for v6: - Fix compiler warnning - Use shorter paragraph in commit message, and move the original statement into the top of cmd_bootfa.c. Changes for v5: - Rename from 'arm: add Faraday firmware image utility' into 'arm: add Faraday specific boot command' - Add missing CRC check to the command 'bootfa'. - Add rationale to the command 'bootfa'. Changes for v4: - Coding Style cleanup. - Break up from [arm: add Faraday A36x SoC platform support] Changes for v3: - Coding Style cleanup. - Always insert a blank line between declarations and code. Changes for v2: - Coding Style cleanup. arch/arm/cpu/faraday/Makefile |2 +- arch/arm/cpu/faraday/cmd_bootfa.c | 267 + arch/arm/cpu/faraday/fwimage.h| 35 + arch/arm/cpu/faraday/fwimage2.h | 55 arch/arm/cpu/u-boot.lds | 11 ++ 5 files changed, 369 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/faraday/cmd_bootfa.c create mode 100644 arch/arm/cpu/faraday/fwimage.h create mode 100644 arch/arm/cpu/faraday/fwimage2.h diff --git a/arch/arm/cpu/faraday/Makefile b/arch/arm/cpu/faraday/Makefile index 715bb5d..289823c 100644 --- a/arch/arm/cpu/faraday/Makefile +++ b/arch/arm/cpu/faraday/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(CPU).o -src-y := cpu.o +src-y := cpu.o cmd_bootfa.o src-$(CONFIG_FTINTC020) += ftintc020.o src-$(CONFIG_FTTMR010)+= fttmr010.o src-$(CONFIG_FTPWMTMR010) += ftpwmtmr010.o diff --git a/arch/arm/cpu/faraday/cmd_bootfa.c b/arch/arm/cpu/faraday/cmd_bootfa.c new file mode 100644 index 000..fa1f7df --- /dev/null +++ b/arch/arm/cpu/faraday/cmd_bootfa.c @@ -0,0 +1,267 @@ +/* + * arch/arm/cpu/faraday/cmd_bootfa.c + * + * This command is used to boot faraday firmware from MMC/USB/SPI/NAND/NOR + * + * (C) Copyright 2013 Faraday Technology + * Dante Su dant...@faraday-tech.com + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/* + * At the time of writting, none of Faraday NAND SPI controllers + * supports XIP (eXecute In Place). So the Faraday A360/A369 SoC has + * to implement a 1st level bootstrap code stored in the embedded ROM + * inside the SoC. + * + * After power-on, the ROM code (1st level bootstrap code) would load + * the 2nd bootstrap code into SRAM without any SDRAM initialization. + * + * The 2nd bootstrap code would then initialize SDRAM and load the + * generic firmware (u-boot/linux) into SDRAM, and finally make + * a long-jump to the firmware. + * + * Which means the SPL design of U-boot would never fit to A360/A369, + * since it's usually not possible to alter a embedded ROM code. + * And because both the 1st 2nd level bootstrap code use the private + * Faraday Firmware Image Format, it would be better to drop U-boot + * image support to simplify the design. + * + * The Faraday Firmware Image Format uses a 1 KB (1024 Bytes) header: + * + * ++ 0x + * | MAGIC | Magic number + * ++ 0x0004 + * | HDR LENGTH | The size of this header + * ++ 0x0008 + * || + * | SYS PARAMETERS | A set of (addr, data) for 32-bit register write, + * || which is for SDRAM initialization and timing control. + * ++ 0x0108 + * || + * | PART TABLE | A partition table with max. 10 entries. + * || + * ++ 0x03D8 + * | HDR CHECKSUM | Header Checksum (CRC32) + * ++ 0x03DC + * | HDR REVISION | Header Revision ID + * ++ 0x03E0 + * | HDR TIMESTAMP | Header Creation Timestamp + * ++ 0x03E4 + * | RESERVED | + * ++ 0x0400 + * + * The entry of partitoin table is: + * + * ++ 0x + * | NAME | The name of the partition + * ++ 0x0020 + * | OFFSET | The offset address of the flash memory. + * ++ 0x0024 + * | LENGTH | The data length of the partition. + * ++ 0x0028 + * | Load Address | The address in SDRAM to store the firmware. + * ++ 0x002C + * | Quick CRC | An optional CRC32 agains 256KB of TOP BUTTOM. + * ++ 0x0030 + * | FLAGS | The flags/attribute of the partition + * ++ 0x0034 + * | RESERVED | + * ++ 0x0040 + * | MAGIC=0x1000 | It's always a 0x1000. + * ++ 0x0044 + * | MAGIC=0x0001 | It's always a 0x0001. + *
