[U-Boot] [PATCH v1 1/2] am33xx: enable GPMC clocks for TI814x
GPMC registers need to be pre-initialized for NAND and NOR probe. So this patch brings out GPMC H/W engine from IDLE state. Signed-off-by: Pekon Gupta pe...@ti.com --- arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c index 658772b..149590e 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c +++ b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c @@ -269,6 +269,11 @@ static void enable_per_clocks(void) while (readl(cmalwon-uart0clkctrl) != PRCM_MOD_EN) ; + /* GPMC */ + writel(PRCM_MOD_EN, cmalwon-gpmcclkctrl); + while (readl(cmalwon-gpmcclkctrl) != PRCM_MOD_EN) + ; + /* HSMMC1 */ writel(PRCM_MOD_EN, cmalwon-mmchs1clkctrl); while (readl(cmalwon-mmchs1clkctrl) != PRCM_MOD_EN) -- 1.8.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND
ti814x_evm has on-board socket for using Micron (MT29Fxx) family of
NAND devices to GPMC interface. This patch
- adds NAND related pin-mux configuration for same
- adds #defines for NAND partitions to TI814x configs
- enables support for NAND in TI814x configs
-
Signed-off-by: Pekon Gupta pe...@ti.com
---
board/ti/ti814x/evm.c| 4 +++
board/ti/ti814x/evm.h| 1 +
board/ti/ti814x/mux.c| 59 +
include/configs/ti814x_evm.h | 70 +++-
4 files changed, 133 insertions(+), 1 deletion(-)
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index 17fba5a..165cdf4 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -140,6 +140,9 @@ void s_init(void)
/* Set Ethernet pins */
enable_enet_pin_mux();
+ /* Set NAND pins */
+ enable_nand_pin_mux();
+
/* Enable UART */
uart_enable();
@@ -162,6 +165,7 @@ void s_init(void)
int board_init(void)
{
gd-bd-bi_boot_params = PHYS_DRAM_1 + 0x100;
+ gpmc_init();
return 0;
}
diff --git a/board/ti/ti814x/evm.h b/board/ti/ti814x/evm.h
index 6aebec6..113ccc0 100644
--- a/board/ti/ti814x/evm.h
+++ b/board/ti/ti814x/evm.h
@@ -4,5 +4,6 @@
void enable_uart0_pin_mux(void);
void enable_mmc1_pin_mux(void);
void enable_enet_pin_mux(void);
+void enable_nand_pin_mux(void);
#endif /* _EVM_H */
diff --git a/board/ti/ti814x/mux.c b/board/ti/ti814x/mux.c
index fd9f364..5410b1d 100644
--- a/board/ti/ti814x/mux.c
+++ b/board/ti/ti814x/mux.c
@@ -70,6 +70,60 @@ static struct module_pin_mux enet_pin_mux[] = {
{OFFSET(pincntl258), MODE(0x01)}, /* EMAC[0]_MTXEN */
};
+static struct module_pin_mux nand_pin_mux[] = {
+ {OFFSET(pincntl89) , MODE(1) | PULLUDDIS}, /* GPMC_D0 */
+ {OFFSET(pincntl90) , MODE(1) | PULLUDDIS}, /* GPMC_D1 */
+ {OFFSET(pincntl91) , MODE(1) | PULLUDDIS}, /* GPMC_D2 */
+ {OFFSET(pincntl92) , MODE(1) | PULLUDDIS}, /* GPMC_D3 */
+ {OFFSET(pincntl93) , MODE(1) | PULLUDDIS}, /* GPMC_D4 */
+ {OFFSET(pincntl94) , MODE(1) | PULLUDDIS}, /* GPMC_D5 */
+ {OFFSET(pincntl95) , MODE(1) | PULLUDDIS}, /* GPMC_D6 */
+ {OFFSET(pincntl96) , MODE(1) | PULLUDDIS}, /* GPMC_D7 */
+ {OFFSET(pincntl97) , MODE(1) | PULLUDDIS}, /* GPMC_D8 */
+ {OFFSET(pincntl98) , MODE(1) | PULLUDDIS}, /* GPMC_D9 */
+ {OFFSET(pincntl99) , MODE(1) | PULLUDDIS}, /* GPMC_D10 */
+ {OFFSET(pincntl100), MODE(1) | PULLUDDIS}, /* GPMC_D11 */
+ {OFFSET(pincntl101), MODE(1) | PULLUDDIS}, /* GPMC_D12 */
+ {OFFSET(pincntl102), MODE(1) | PULLUDDIS}, /* GPMC_D13 */
+ {OFFSET(pincntl103), MODE(1) | PULLUDDIS}, /* GPMC_D14 */
+ {OFFSET(pincntl104), MODE(1) | PULLUDDIS}, /* GPMC_D15 */
+ {OFFSET(pincntl117), MODE(2) | PULLUP_EN}, /* GPMC_A1 */
+ {OFFSET(pincntl118), MODE(2) | PULLUP_EN}, /* GPMC_A2 */
+ {OFFSET(pincntl119), MODE(2) | PULLUP_EN}, /* GPMC_A3 */
+ {OFFSET(pincntl120), MODE(2) | PULLUP_EN}, /* GPMC_A4 */
+ {OFFSET(pincntl168), MODE(5) | PULLUP_EN}, /* GPMC_A5 */
+ {OFFSET(pincntl169), MODE(5) | PULLUP_EN}, /* GPMC_A6 */
+ {OFFSET(pincntl170), MODE(5) | PULLUP_EN}, /* GPMC_A7 */
+ {OFFSET(pincntl171), MODE(5) | PULLUP_EN}, /* GPMC_A8 */
+ {OFFSET(pincntl172), MODE(5) | PULLUP_EN}, /* GPMC_A9 */
+ {OFFSET(pincntl173), MODE(5) | PULLUP_EN}, /* GPMC_A10 */
+ {OFFSET(pincntl174), MODE(5) | PULLUP_EN}, /* GPMC_A11 */
+ {OFFSET(pincntl175), MODE(5) | PULLUP_EN}, /* GPMC_A12 */
+ {OFFSET(pincntl228), MODE(2) | PULLUP_EN}, /* GPMC_A13 */
+ {OFFSET(pincntl229), MODE(2) | PULLUP_EN}, /* GPMC_A14 */
+ {OFFSET(pincntl230), MODE(2) | PULLUP_EN}, /* GPMC_A15 */
+ {OFFSET(pincntl105), MODE(1) | PULLUP_EN}, /* GPMC_A16 */
+ {OFFSET(pincntl106), MODE(1) | PULLUP_EN}, /* GPMC_A17 */
+ {OFFSET(pincntl107), MODE(1) | PULLUP_EN}, /* GPMC_A18 */
+ {OFFSET(pincntl108), MODE(1) | PULLUP_EN}, /* GPMC_A19 */
+ {OFFSET(pincntl109), MODE(1) | PULLUP_EN}, /* GPMC_A20 */
+ {OFFSET(pincntl110), MODE(1) | PULLUP_EN}, /* GPMC_A21 */
+ {OFFSET(pincntl111), MODE(1) | PULLUP_EN}, /* GPMC_A22 */
+ {OFFSET(pincntl112), MODE(1) | PULLUP_EN}, /* GPMC_A23 */
+ {OFFSET(pincntl113), MODE(2) | PULLUP_EN}, /* GPMC_A24 */
+ {OFFSET(pincntl114), MODE(2) | PULLUP_EN}, /* GPMC_A25 */
+ {OFFSET(pincntl115), MODE(2) | PULLUP_EN}, /* GPMC_A26 */
+ {OFFSET(pincntl116), MODE(2) | PULLUP_EN}, /* GPMC_A27 */
+ {OFFSET(pincntl122), MODE(1) |
Re: [U-Boot] [PATCH] Origen: Set FIMD as the default display path
+Donghwa Lee Hi Tushar, I think this setting already exists for Exynos4 in u-boot. Are you not getting display without your patch? Have a look at this: http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/exynos/system.c;h=ad12445832cf7415e52e8593b595ab33a0b4d375;hb=HEAD#l33 Regards, Ajay Kumar On Tue, Aug 6, 2013 at 12:07 PM, Tushar Behera tushar.beh...@linaro.orgwrote: On 08/06/2013 08:29 AM, Minkyu Kang wrote: Dear Tushar Behera, On 07/06/13 19:56, Tushar Behera wrote: On EXYNOS4210, there are three paths for display data to be processed, namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller is used. Signed-off-by: Tushar Behera tushar.beh...@linaro.org --- This patch is rebased on master branch of u-boot-samsung tree. board/samsung/origen/lowlevel_init.S | 13 + board/samsung/origen/origen_setup.h |7 +++ 2 files changed, 20 insertions(+) Since the lowlevel_init.S is removed, this patch cannot be applied. I will rebase to current tip and send again. Thanks, Minkyu Kang. Thanks. -- Tushar Behera ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND
ti814x_evm has on-board socket for using Micron (MT29Fxx) family of
NAND devices to GPMC interface. This patch
- adds NAND related pin-mux configuration for same
- adds #defines for NAND partitions to TI814x configs
- enables support for NAND in TI814x configs
-
Signed-off-by: Pekon Gupta pe...@ti.com
---
board/ti/ti814x/evm.c| 4 +++
board/ti/ti814x/evm.h| 1 +
board/ti/ti814x/mux.c| 59 +
include/configs/ti814x_evm.h | 70 +++-
4 files changed, 133 insertions(+), 1 deletion(-)
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index 17fba5a..165cdf4 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -140,6 +140,9 @@ void s_init(void)
/* Set Ethernet pins */
enable_enet_pin_mux();
+ /* Set NAND pins */
+ enable_nand_pin_mux();
+
/* Enable UART */
uart_enable();
@@ -162,6 +165,7 @@ void s_init(void)
int board_init(void)
{
gd-bd-bi_boot_params = PHYS_DRAM_1 + 0x100;
+ gpmc_init();
return 0;
}
diff --git a/board/ti/ti814x/evm.h b/board/ti/ti814x/evm.h
index 6aebec6..113ccc0 100644
--- a/board/ti/ti814x/evm.h
+++ b/board/ti/ti814x/evm.h
@@ -4,5 +4,6 @@
void enable_uart0_pin_mux(void);
void enable_mmc1_pin_mux(void);
void enable_enet_pin_mux(void);
+void enable_nand_pin_mux(void);
#endif /* _EVM_H */
diff --git a/board/ti/ti814x/mux.c b/board/ti/ti814x/mux.c
index fd9f364..5410b1d 100644
--- a/board/ti/ti814x/mux.c
+++ b/board/ti/ti814x/mux.c
@@ -70,6 +70,60 @@ static struct module_pin_mux enet_pin_mux[] = {
{OFFSET(pincntl258), MODE(0x01)}, /* EMAC[0]_MTXEN */
};
+static struct module_pin_mux nand_pin_mux[] = {
+ {OFFSET(pincntl89) , MODE(1) | PULLUDDIS}, /* GPMC_D0 */
+ {OFFSET(pincntl90) , MODE(1) | PULLUDDIS}, /* GPMC_D1 */
+ {OFFSET(pincntl91) , MODE(1) | PULLUDDIS}, /* GPMC_D2 */
+ {OFFSET(pincntl92) , MODE(1) | PULLUDDIS}, /* GPMC_D3 */
+ {OFFSET(pincntl93) , MODE(1) | PULLUDDIS}, /* GPMC_D4 */
+ {OFFSET(pincntl94) , MODE(1) | PULLUDDIS}, /* GPMC_D5 */
+ {OFFSET(pincntl95) , MODE(1) | PULLUDDIS}, /* GPMC_D6 */
+ {OFFSET(pincntl96) , MODE(1) | PULLUDDIS}, /* GPMC_D7 */
+ {OFFSET(pincntl97) , MODE(1) | PULLUDDIS}, /* GPMC_D8 */
+ {OFFSET(pincntl98) , MODE(1) | PULLUDDIS}, /* GPMC_D9 */
+ {OFFSET(pincntl99) , MODE(1) | PULLUDDIS}, /* GPMC_D10 */
+ {OFFSET(pincntl100), MODE(1) | PULLUDDIS}, /* GPMC_D11 */
+ {OFFSET(pincntl101), MODE(1) | PULLUDDIS}, /* GPMC_D12 */
+ {OFFSET(pincntl102), MODE(1) | PULLUDDIS}, /* GPMC_D13 */
+ {OFFSET(pincntl103), MODE(1) | PULLUDDIS}, /* GPMC_D14 */
+ {OFFSET(pincntl104), MODE(1) | PULLUDDIS}, /* GPMC_D15 */
+ {OFFSET(pincntl117), MODE(2) | PULLUP_EN}, /* GPMC_A1 */
+ {OFFSET(pincntl118), MODE(2) | PULLUP_EN}, /* GPMC_A2 */
+ {OFFSET(pincntl119), MODE(2) | PULLUP_EN}, /* GPMC_A3 */
+ {OFFSET(pincntl120), MODE(2) | PULLUP_EN}, /* GPMC_A4 */
+ {OFFSET(pincntl168), MODE(5) | PULLUP_EN}, /* GPMC_A5 */
+ {OFFSET(pincntl169), MODE(5) | PULLUP_EN}, /* GPMC_A6 */
+ {OFFSET(pincntl170), MODE(5) | PULLUP_EN}, /* GPMC_A7 */
+ {OFFSET(pincntl171), MODE(5) | PULLUP_EN}, /* GPMC_A8 */
+ {OFFSET(pincntl172), MODE(5) | PULLUP_EN}, /* GPMC_A9 */
+ {OFFSET(pincntl173), MODE(5) | PULLUP_EN}, /* GPMC_A10 */
+ {OFFSET(pincntl174), MODE(5) | PULLUP_EN}, /* GPMC_A11 */
+ {OFFSET(pincntl175), MODE(5) | PULLUP_EN}, /* GPMC_A12 */
+ {OFFSET(pincntl228), MODE(2) | PULLUP_EN}, /* GPMC_A13 */
+ {OFFSET(pincntl229), MODE(2) | PULLUP_EN}, /* GPMC_A14 */
+ {OFFSET(pincntl230), MODE(2) | PULLUP_EN}, /* GPMC_A15 */
+ {OFFSET(pincntl105), MODE(1) | PULLUP_EN}, /* GPMC_A16 */
+ {OFFSET(pincntl106), MODE(1) | PULLUP_EN}, /* GPMC_A17 */
+ {OFFSET(pincntl107), MODE(1) | PULLUP_EN}, /* GPMC_A18 */
+ {OFFSET(pincntl108), MODE(1) | PULLUP_EN}, /* GPMC_A19 */
+ {OFFSET(pincntl109), MODE(1) | PULLUP_EN}, /* GPMC_A20 */
+ {OFFSET(pincntl110), MODE(1) | PULLUP_EN}, /* GPMC_A21 */
+ {OFFSET(pincntl111), MODE(1) | PULLUP_EN}, /* GPMC_A22 */
+ {OFFSET(pincntl112), MODE(1) | PULLUP_EN}, /* GPMC_A23 */
+ {OFFSET(pincntl113), MODE(2) | PULLUP_EN}, /* GPMC_A24 */
+ {OFFSET(pincntl114), MODE(2) | PULLUP_EN}, /* GPMC_A25 */
+ {OFFSET(pincntl115), MODE(2) | PULLUP_EN}, /* GPMC_A26 */
+ {OFFSET(pincntl116), MODE(2) | PULLUP_EN}, /* GPMC_A27 */
+ {OFFSET(pincntl122), MODE(1) |
[U-Boot] [PATCH v1 1/2] am33xx: enable GPMC clocks for TI814x
GPMC registers need to be pre-initialized for NAND and NOR probe. So this patch brings out GPMC H/W engine from IDLE state. Signed-off-by: Pekon Gupta pe...@ti.com --- arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c index 658772b..149590e 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c +++ b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c @@ -269,6 +269,11 @@ static void enable_per_clocks(void) while (readl(cmalwon-uart0clkctrl) != PRCM_MOD_EN) ; + /* GPMC */ + writel(PRCM_MOD_EN, cmalwon-gpmcclkctrl); + while (readl(cmalwon-gpmcclkctrl) != PRCM_MOD_EN) + ; + /* HSMMC1 */ writel(PRCM_MOD_EN, cmalwon-mmchs1clkctrl); while (readl(cmalwon-mmchs1clkctrl) != PRCM_MOD_EN) -- 1.8.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 1/4] mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform
BCH8_ECC scheme implemented in omap_gpmc.c driver has following two favours
+---+-+-+
|ECC Scheme | ECC Calculation | Error Detection |
+---+-+-+
|OMAP_ECC_BCH8_CODE_HW |GPMC |ELM H/W engine |
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC |S/W BCH library |
+---+-+-+
Current implementation enables of BCH8_CODE_HW only for AM33xx SoC family.
(using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have
ELM hardware module, and can support ECC error detection using ELM.
This patch
- replaces CONFIG_AM33xx define with generic CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW
so that all device families having required h/w capability can use ELM for
error detection in ECC_BCHx schemes.
- replaces CONFIG_NAND_OMAP_BCH8 with
CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
and separates out code for above mentioned BCH8_ECC implementations so that
driver can be build independently using anyone of them.
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap_gpmc.c | 117 +++
include/configs/am335x_evm.h | 1 +
include/configs/ti814x_evm.h | 2 +-
include/configs/tricorder.h | 2 +-
4 files changed, 65 insertions(+), 57 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index ec1787f..c6c5cec 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -12,11 +12,12 @@
#include asm/arch/cpu.h
#include asm/omap_gpmc.h
#include linux/mtd/nand_ecc.h
-#include linux/bch.h
#include linux/compiler.h
#include nand.h
-#ifdef CONFIG_AM33XX
+#if defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW)
#include asm/arch/elm.h
+#elif defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW)
+#include linux/bch.h
#endif
static uint8_t cs;
@@ -274,7 +275,7 @@ static void omap_hwecc_init_bch(struct nand_chip *chip,
int32_t mode)
{
uint32_t val;
uint32_t dev_width = (chip-options NAND_BUSWIDTH_16) 1;
-#ifdef CONFIG_AM33XX
+#if defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW)
uint32_t unused_length = 0;
#endif
uint32_t wr_mode = BCH_WRAPMODE_6;
@@ -283,7 +284,7 @@ static void omap_hwecc_init_bch(struct nand_chip *chip,
int32_t mode)
/* Clear the ecc result registers, select ecc reg as 1 */
writel(ECCCLEAR | ECCRESULTREG1, gpmc_cfg-ecc_control);
-#ifdef CONFIG_AM33XX
+#if defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW)
wr_mode = BCH_WRAPMODE_1;
switch (bch-nibbles) {
@@ -375,10 +376,10 @@ static void __maybe_unused omap_ecc_disable(struct
mtd_info *mtd)
writel((readl(gpmc_cfg-ecc_config) ~0x1), gpmc_cfg-ecc_config);
}
+#if defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW)
/*
* BCH8 support (needs ELM and thus AM33xx-only)
*/
-#ifdef CONFIG_AM33XX
/*
* omap_read_bch8_result - Read BCH result for BCH8 level
*
@@ -631,12 +632,12 @@ static int omap_read_page_bch(struct mtd_info *mtd,
struct nand_chip *chip,
}
return 0;
}
-#endif /* CONFIG_AM33XX */
+#endif /* CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW */
/*
* OMAP3 BCH8 support (with BCH library)
*/
-#ifdef CONFIG_NAND_OMAP_BCH8
+#ifdef CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
/*
* omap_calculate_ecc_bch - Read BCH ECC result
*
@@ -752,7 +753,7 @@ static void __maybe_unused omap_free_bch(struct mtd_info
*mtd)
chip_priv-control = NULL;
}
}
-#endif /* CONFIG_NAND_OMAP_BCH8 */
+#endif /* CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW */
#ifndef CONFIG_SPL_BUILD
/*
@@ -803,25 +804,32 @@ void omap_nand_switch_ecc(uint32_t hardware, uint32_t
eccstrength)
nand-ecc.calculate = omap_calculate_ecc;
omap_hwecc_init(nand);
printf(1-bit hamming HW ECC selected\n);
- }
-#if defined(CONFIG_AM33XX) || defined(CONFIG_NAND_OMAP_BCH8)
- else if (eccstrength == 8) {
- nand-ecc.mode = NAND_ECC_HW;
- nand-ecc.layout = hw_bch8_nand_oob;
- nand-ecc.size = 512;
-#ifdef CONFIG_AM33XX
- nand-ecc.bytes = 14;
- nand-ecc.read_page = omap_read_page_bch;
+ } else if (eccstrength == 8) {
+#if defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW)
+ nand-ecc.mode = NAND_ECC_HW;
+ nand-ecc.layout= hw_bch8_nand_oob;
+ nand-ecc.size = 512;
+ nand-ecc.bytes = 14;
+ nand-ecc.read_page = omap_read_page_bch;
+ nand-ecc.hwctl = omap_enable_ecc_bch;
+ nand-ecc.correct = omap_correct_data_bch;
+
[U-Boot] [PATCH v1 4/4] mtd: nand: omap: optimized chip-ecc.correct() for H/W ECC schemes
chip-ecc.correct() is used for detecting and correcting bit-flips during read
operations. In omap-nand driver it implemented as:
(a) omap_correct_data(): for h/w based ECC_HAM1 scheme
(b) omap_correct_data_bch() + CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
for ECC_BCH8 scheme using GPMC and software lib/bch.c
(c) omap_correct_data_bch() + CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW
for ECC_BCH8 scheme using GPMC and ELM
This patch updates (c)
- checks for calc_ecc[]==0x00 so that error_correction is not required for
known good pages.
- adds scalability for other ECC_BCHx scheme by merging following
omap_rotate_ecc_bch() + omap_fix_errors_bch() = omap_correct_data_bch()
- fixing logic for bit-flip correction based on error_loc[count]
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap_gpmc.c | 124 +++
1 file changed, 44 insertions(+), 80 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 40b71a7..229af81 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -22,6 +22,8 @@
#define SECTOR_BYTES 512
+/* 4 bit padding to make byte aligned, 56 = 52 + 4 */
+#define BCH4_BIT_PAD 4
static uint8_t cs;
static __maybe_unused struct nand_ecclayout hw_nand_oob =
@@ -321,77 +323,6 @@ static int omap_calculate_ecc_bch(struct mtd_info *mtd,
const uint8_t *dat,
}
/*
- * omap_rotate_ecc_bch - Rotate the syndrome bytes
- *
- * @mtd: MTD device structure
- * @calc_ecc: ECC read from ECC registers
- * @syndrome: Rotated syndrome will be retuned in this array
- *
- */
-static void omap_rotate_ecc_bch(struct mtd_info *mtd, uint8_t *calc_ecc,
- uint8_t *syndrome)
-{
- struct nand_chip *chip = mtd-priv;
- struct nand_bch_priv *bch = chip-priv;
- uint8_t n_bytes = 0;
- int8_t i, j;
-
- switch (bch-type) {
- case ECC_BCH4:
- n_bytes = 8;
- break;
-
- case ECC_BCH16:
- n_bytes = 28;
- break;
-
- case ECC_BCH8:
- default:
- n_bytes = 13;
- break;
- }
-
- for (i = 0, j = (n_bytes-1); i n_bytes; i++, j--)
- syndrome[i] = calc_ecc[j];
-}
-
-/*
- * omap_fix_errors_bch - Correct bch error in the data
- *
- * @mtd: MTD device structure
- * @data: Data read from flash
- * @error_count:Number of errors in data
- * @error_loc: Locations of errors in the data
- *
- */
-static void omap_fix_errors_bch(struct mtd_info *mtd, uint8_t *data,
- uint32_t error_count, uint32_t *error_loc)
-{
- struct nand_chip *chip = mtd-priv;
- struct nand_bch_priv *bch = chip-priv;
- uint8_t count = 0;
- uint32_t error_byte_pos;
- uint32_t error_bit_mask;
- uint32_t last_bit = (bch-nibbles * 4) - 1;
-
- /* Flip all bits as specified by the error location array. */
- /* FOR( each found error location flip the bit ) */
- for (count = 0; count error_count; count++) {
- if (error_loc[count] last_bit) {
- /* Remove the ECC spare bits from correction. */
- error_loc[count] -= (last_bit + 1);
- /* Offset bit in data region */
- error_byte_pos = ((512 * 8) -
- (error_loc[count]) - 1) / 8;
- /* Error Bit mask */
- error_bit_mask = 0x1 (error_loc[count] % 8);
- /* Toggle the error bit to make the correction. */
- data[error_byte_pos] ^= error_bit_mask;
- }
- }
-}
-
-/*
* omap_correct_data_bch - Compares the ecc read from nand spare area
* with ECC registers values and corrects one bit error if it has occured
*
@@ -407,16 +338,26 @@ static int omap_correct_data_bch(struct mtd_info *mtd,
uint8_t *dat,
{
struct nand_chip *chip = mtd-priv;
struct nand_bch_priv *bch = chip-priv;
+ uint32_t eccbytes = chip-ecc.bytes;
uint8_t syndrome[28];
- uint32_t error_count = 0;
+ uint32_t error_count = 0, error_max;
uint32_t error_loc[8];
- uint32_t i, ecc_flag;
+ uint32_t i, j, ecc_flag = 0;
+ uint8_t count, ret = 0;
+ uint32_t byte_pos, bit_pos;
+
+ /* check calculated ecc */
+ for (i = 0; i chip-ecc.bytes !ecc_flag; i++)
+ if (calc_ecc[i] != 0x00)
+ ecc_flag = 1;
+ if (!ecc_flag)
+ return 0;
+ /* check for whether its a erased-page */
ecc_flag = 0;
- for (i = 0; i chip-ecc.bytes; i++)
+ for (i = 0; i chip-ecc.bytes !ecc_flag; i++)
if (read_ecc[i] != 0xff)
ecc_flag = 1;
-
if (!ecc_flag)
return 0;
@@ -427,20 +368,43 @@ static int omap_correct_data_bch(struct mtd_info
[U-Boot] [PATCH v1 0/4] mtd: nand: omap: optimize and clean-up of OMAP NAND driver
This series of patch series does updates H/W based ECC scheme in omap_gpmc.c - adds scalability for higher ECC schemes in future. - removes CONFIG_AM335x and it makes it generic for all platforms. - optimizes read_data paths This series is tested for H/W BCH8_ECC scheme on - AM335x_EVM - And plan to test it on TI814x_EVM But is not tested for HAM1 and S/W BCH8_ECC scheme. Pekon Gupta (4): [PATCH 1/4] mtd: nand: omap_gpmc: enable BCH ECC scheme using ELM for generic [PATCH 2/4] mtd: nand: omap: optimize chip-ecc.hwctl() for H/W ECC schemes [PATCH 3/4] mtd: nand: omap: optimize chip-ecc.calculate() for H/W ECC schemes [PATCH 4/4] mtd: nand: omap: optimized chip-ecc.correct() for H/W ECC schemes drivers/mtd/nand/omap_gpmc.c | 507 +++ include/configs/am335x_evm.h | 1 + include/configs/ti814x_evm.h | 2 +- include/configs/tricorder.h | 2 +- 4 files changed, 175 insertions(+), 337 deletions(-) -- 1.8.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 3/4] mtd: nand: omap: optimize chip-ecc.calculate() for H/W ECC schemes
chip-ecc.calculate() is used for calculating and fetching of ECC syndrome by
processing the data passed during Read/Write accesses.
All H/W based ECC schemes use GPMC controller to calculate ECC syndrome.
But each BCHx_ECC scheme has its own implemetation of post-processing and
fetching ECC syndrome from GPMC controller.
This patch updates OMAP_ECC_BCH8_CODE_HW ECC scheme in following way:
- merges various sub-functions into single omap_calculate_ecc_bch().
- removes omap_ecc_disable() and instead uses it as inline.
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap_gpmc.c | 82 ++--
1 file changed, 18 insertions(+), 64 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index f3b86e5..40b71a7 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -281,34 +281,26 @@ static void omap_enable_hwecc(struct mtd_info *mtd,
int32_t mode)
writel(ecc_config_val | 0x1, gpmc_cfg-ecc_config);
}
-/*
- * omap_ecc_disable - Disable H/W ECC calculation
- *
- * @mtd: MTD device structure
- */
-static void __maybe_unused omap_ecc_disable(struct mtd_info *mtd)
-{
- writel((readl(gpmc_cfg-ecc_config) ~0x1), gpmc_cfg-ecc_config);
-}
#if defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW)
/*
- * BCH8 support (needs ELM and thus AM33xx-only)
- */
-/*
- * omap_read_bch8_result - Read BCH result for BCH8 level
+ * omap_calculate_ecc_bch - Read BCH ECC result
*
- * @mtd: MTD device structure
- * @big_endian:When set read register 3 first
- * @ecc_code: Read syndrome from BCH result registers
+ * @mtd: MTD structure
+ * @dat: unused
+ * @ecc_code: ecc_code buffer
*/
-static void omap_read_bch8_result(struct mtd_info *mtd, uint8_t big_endian,
+static int omap_calculate_ecc_bch(struct mtd_info *mtd, const uint8_t *dat,
uint8_t *ecc_code)
{
+ struct nand_chip *chip = mtd-priv;
+ struct nand_bch_priv *bch = chip-priv;
+ int8_t ret = 0;
uint32_t *ptr;
int8_t i = 0, j;
- if (big_endian) {
+ switch (bch-type) {
+ case ECC_BCH8:
ptr = gpmc_cfg-bch_result_0_3[0].bch_result_x[3];
ecc_code[i++] = readl(ptr) 0xFF;
ptr--;
@@ -319,18 +311,13 @@ static void omap_read_bch8_result(struct mtd_info *mtd,
uint8_t big_endian,
ecc_code[i++] = readl(ptr) 0xFF;
ptr--;
}
- } else {
- ptr = gpmc_cfg-bch_result_0_3[0].bch_result_x[0];
- for (j = 0; j 3; j++) {
- ecc_code[i++] = readl(ptr) 0xFF;
- ecc_code[i++] = (readl(ptr) 8) 0xFF;
- ecc_code[i++] = (readl(ptr) 16) 0xFF;
- ecc_code[i++] = (readl(ptr) 24) 0xFF;
- ptr++;
- }
- ecc_code[i++] = readl(ptr) 0xFF;
- ecc_code[i++] = 0; /* 14th byte is always zero */
+ break;
+ default:
+ ret = -1;
}
+ /* clear result and disable engine */
+ writel((readl(gpmc_cfg-ecc_config) ~0x1), gpmc_cfg-ecc_config);
+ return ret;
}
/*
@@ -369,35 +356,6 @@ static void omap_rotate_ecc_bch(struct mtd_info *mtd,
uint8_t *calc_ecc,
}
/*
- * omap_calculate_ecc_bch - Read BCH ECC result
- *
- * @mtd: MTD structure
- * @dat: unused
- * @ecc_code: ecc_code buffer
- */
-static int omap_calculate_ecc_bch(struct mtd_info *mtd, const uint8_t *dat,
- uint8_t *ecc_code)
-{
- struct nand_chip *chip = mtd-priv;
- struct nand_bch_priv *bch = chip-priv;
- uint8_t big_endian = 1;
- int8_t ret = 0;
-
- if (bch-type == ECC_BCH8)
- omap_read_bch8_result(mtd, big_endian, ecc_code);
- else /* BCH4 and BCH16 currently not supported */
- ret = -1;
-
- /*
-* Stop reading anymore ECC vals and clear old results
-* enable will be called if more reads are required
-*/
- omap_ecc_disable(mtd);
-
- return ret;
-}
-
-/*
* omap_fix_errors_bch - Correct bch error in the data
*
* @mtd: MTD device structure
@@ -594,12 +552,8 @@ static int omap_calculate_ecc_bch(struct mtd_info *mtd,
const uint8_t *dat,
*ecc++ = 0x24 ^ ((val1 8) 0xFF);
*ecc++ = 0xb5 ^ (val1 0xFF);
}
-
- /*
-* Stop reading anymore ECC vals and clear old results
-* enable will be called if more reads are required
-*/
- omap_ecc_disable(mtd);
+ /* Stop reading anymore ECC vals and clear old results */
+ writel((readl(gpmc_cfg-ecc_config) ~0x1), gpmc_cfg-ecc_config);
return ret;
}
--
1.8.1
___
U-Boot mailing list
U-Boot@lists.denx.de
[U-Boot] [PATCH v1 2/4] mtd: nand: omap: optimize chip-ecc.hwctl() for H/W ECC schemes
chip-ecc.hwctl() is used for preparing the H/W controller before read/write
NAND accesses (like assigning data-buf, enabling ECC scheme configs, etc.)
Though all ECC schemes in OMAP NAND driver use GPMC controller for generating
ECC syndrome (for both Read/Write accesses). But but in current code
HAM1_ECC and BCHx_ECC schemes implement individual function to achieve this.
This patch
(1) removes omap_hwecc_init() and omap_hwecc_init_bch()
as chip-ecc.hwctl will re-initializeGPMC before every read/write call.
omap_hwecc_init_bch() - omap_enable_ecc_bch()
(2) merges the GPMC configuration code for all ECC schemes into
single omap_enable_hwecc(), thus adding scalability for future ECC schemes.
omap_enable_hwecc() + omap_enable_ecc_bch() - omap_enable_hwecc()
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap_gpmc.c | 210 +--
1 file changed, 61 insertions(+), 149 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index c6c5cec..f3b86e5 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -20,6 +20,9 @@
#include linux/bch.h
#endif
+
+#define SECTOR_BYTES 512
+
static uint8_t cs;
static __maybe_unused struct nand_ecclayout hw_nand_oob =
GPMC_NAND_HW_ECC_LAYOUT;
@@ -63,21 +66,6 @@ int omap_spl_dev_ready(struct mtd_info *mtd)
}
#endif
-/*
- * omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
- * GPMC controller
- * @mtd:MTD device structure
- *
- */
-static void __maybe_unused omap_hwecc_init(struct nand_chip *chip)
-{
- /*
-* Init ECC Control Register
-* Clear all ECC | Enable Reg1
-*/
- writel(ECCCLEAR | ECCRESULTREG1, gpmc_cfg-ecc_control);
- writel(ECCSIZE1 | ECCSIZE0 | ECCSIZE0SEL, gpmc_cfg-ecc_size_config);
-}
/*
* gen_true_ecc - This function will generate true ECC value, which
@@ -195,38 +183,6 @@ static int __maybe_unused omap_calculate_ecc(struct
mtd_info *mtd,
}
/*
- * omap_enable_ecc - This function enables the hardware ecc functionality
- * @mtd:MTD device structure
- * @mode: Read/Write mode
- */
-static void __maybe_unused omap_enable_hwecc(struct mtd_info *mtd, int32_t
mode)
-{
- struct nand_chip *chip = mtd-priv;
- uint32_t val, dev_width = (chip-options NAND_BUSWIDTH_16) 1;
-
- switch (mode) {
- case NAND_ECC_READ:
- case NAND_ECC_WRITE:
- /* Clear the ecc result registers, select ecc reg as 1 */
- writel(ECCCLEAR | ECCRESULTREG1, gpmc_cfg-ecc_control);
-
- /*
-* Size 0 = 0xFF, Size1 is 0xFF - both are 512 bytes
-* tell all regs to generate size0 sized regs
-* we just have a single ECC engine for all CS
-*/
- writel(ECCSIZE1 | ECCSIZE0 | ECCSIZE0SEL,
- gpmc_cfg-ecc_size_config);
- val = (dev_width 7) | (cs 1) | (0x1);
- writel(val, gpmc_cfg-ecc_config);
- break;
- default:
- printf(Error: Unrecognized Mode[%d]!\n, mode);
- break;
- }
-}
-
-/*
* Generic BCH interface
*/
struct nand_bch_priv {
@@ -265,105 +221,64 @@ static __maybe_unused struct nand_bch_priv bch_priv = {
};
/*
- * omap_hwecc_init_bch - Initialize the BCH Hardware ECC for NAND flash in
- * GPMC controller
+ * omap_enable_hwecc - configures GPMC as per ECC scheme before read/write
* @mtd: MTD device structure
* @mode: Read/Write mode
*/
__maybe_unused
-static void omap_hwecc_init_bch(struct nand_chip *chip, int32_t mode)
+static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
{
- uint32_t val;
- uint32_t dev_width = (chip-options NAND_BUSWIDTH_16) 1;
-#if defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW)
- uint32_t unused_length = 0;
-#endif
- uint32_t wr_mode = BCH_WRAPMODE_6;
- struct nand_bch_priv *bch = chip-priv;
-
- /* Clear the ecc result registers, select ecc reg as 1 */
- writel(ECCCLEAR | ECCRESULTREG1, gpmc_cfg-ecc_control);
-
-#if defined(CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW)
- wr_mode = BCH_WRAPMODE_1;
-
- switch (bch-nibbles) {
- case ECC_BCH4_NIBBLES:
- unused_length = 3;
- break;
- case ECC_BCH8_NIBBLES:
- unused_length = 2;
- break;
- case ECC_BCH16_NIBBLES:
- unused_length = 0;
- break;
- }
-
- /*
-* This is ecc_size_config for ELM mode.
-* Here we are using different settings for read and write access and
-* also depending on BCH strength.
-*/
- switch (mode) {
- case NAND_ECC_WRITE:
- /* write access only setup eccsize1 config */
- val = ((unused_length + bch-nibbles) 22);
- break;
-
- case
[U-Boot] [PATCH 2/3] cmd_mtdparts: use 64 bits for flash size, partition size offset
This matches the 64 bit size in struct mtd_info and allows the mtdparts
command to function correctly with a flash = 4GiB. Format specifiers
for size offset are given the ll length, matching its use in
drivers/mtd in absence of something like inttypes.h/PRIx64.
Signed-off-by: Paul Burton paul.bur...@imgtec.com
---
common/cmd_mtdparts.c | 54 -
include/jffs2/load_kernel.h | 6 ++---
2 files changed, 32 insertions(+), 28 deletions(-)
diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c
index 3023479..453ed57 100644
--- a/common/cmd_mtdparts.c
+++ b/common/cmd_mtdparts.c
@@ -93,13 +93,13 @@
DECLARE_GLOBAL_DATA_PTR;
/* special size referring to all the remaining space in a partition */
-#define SIZE_REMAINING 0x
+#define SIZE_REMAINING (~0llu)
/* special offset value, it is used when not provided by user
*
* this value is used temporarily during parsing, later such offests
* are recalculated */
-#define OFFSET_NOT_SPECIFIED 0x
+#define OFFSET_NOT_SPECIFIED (~0llu)
/* minimum partition size */
#define MIN_PART_SIZE 4096
@@ -160,9 +160,9 @@ static int device_del(struct mtd_device *dev);
* @param retptr output pointer to next char after parse completes (output)
* @return resulting unsigned int
*/
-static unsigned long memsize_parse (const char *const ptr, const char **retptr)
+static u64 memsize_parse (const char *const ptr, const char **retptr)
{
- unsigned long ret = simple_strtoul(ptr, (char **)retptr, 0);
+ u64 ret = simple_strtoull(ptr, (char **)retptr, 0);
switch (**retptr) {
case 'G':
@@ -193,20 +193,20 @@ static unsigned long memsize_parse (const char *const
ptr, const char **retptr)
* @param buf output buffer
* @param size size to be converted to string
*/
-static void memsize_format(char *buf, u32 size)
+static void memsize_format(char *buf, u64 size)
{
#define SIZE_GB ((u32)1024*1024*1024)
#define SIZE_MB ((u32)1024*1024)
#define SIZE_KB ((u32)1024)
if ((size % SIZE_GB) == 0)
- sprintf(buf, %ug, size/SIZE_GB);
+ sprintf(buf, %llug, size/SIZE_GB);
else if ((size % SIZE_MB) == 0)
- sprintf(buf, %um, size/SIZE_MB);
+ sprintf(buf, %llum, size/SIZE_MB);
else if (size % SIZE_KB == 0)
- sprintf(buf, %uk, size/SIZE_KB);
+ sprintf(buf, %lluk, size/SIZE_KB);
else
- sprintf(buf, %u, size);
+ sprintf(buf, %llu, size);
}
/**
@@ -310,6 +310,7 @@ static int part_validate_eraseblock(struct mtdids *id,
struct part_info *part)
struct mtd_info *mtd = NULL;
int i, j;
ulong start;
+ u64 offset, size;
if (get_mtd_info(id-type, id-num, mtd))
return 1;
@@ -321,14 +322,16 @@ static int part_validate_eraseblock(struct mtdids *id,
struct part_info *part)
* Only one eraseregion (NAND, OneNAND or uniform NOR),
* checking for alignment is easy here
*/
- if ((unsigned long)part-offset % mtd-erasesize) {
+ offset = part-offset;
+ if (do_div(offset, mtd-erasesize)) {
printf(%s%d: partition (%s) start offset
alignment incorrect\n,
MTD_DEV_TYPE(id-type), id-num, part-name);
return 1;
}
- if (part-size % mtd-erasesize) {
+ size = part-size;
+ if (do_div(size, mtd-erasesize)) {
printf(%s%d: partition (%s) size alignment
incorrect\n,
MTD_DEV_TYPE(id-type), id-num, part-name);
return 1;
@@ -396,7 +399,7 @@ static int part_validate(struct mtdids *id, struct
part_info *part)
part-size = id-size - part-offset;
if (part-offset id-size) {
- printf(%s: offset %08x beyond flash size %08x\n,
+ printf(%s: offset %08llx beyond flash size %08llx\n,
id-mtd_id, part-offset, id-size);
return 1;
}
@@ -579,8 +582,8 @@ static int part_add(struct mtd_device *dev, struct
part_info *part)
static int part_parse(const char *const partdef, const char **ret, struct
part_info **retpart)
{
struct part_info *part;
- unsigned long size;
- unsigned long offset;
+ u64 size;
+ u64 offset;
const char *name;
int name_len;
unsigned int mask_flags;
@@ -599,7 +602,7 @@ static int part_parse(const char *const partdef, const char
**ret, struct part_i
} else {
size = memsize_parse(p, p);
if (size MIN_PART_SIZE) {
- printf(partition size too small (%lx)\n, size);
+ printf(partition size too small (%llx)\n,
[U-Boot] [PATCH 1/3] mtd: driver _read() returns max_bitflips; mtd_read() returns -EUCLEAN
Linux modified the MTD driver interface in commit edbc4540 (with the
same name as this commit). The effect is that calls to mtd_read will not
return -EUCLEAN if the number of ECC-corrected bit errors is below a
certain threshold, which defaults to the strength of the ECC. This
allows -EUCLEAN to stop indicating some bits were corrected and begin
indicating a large number of bits were corrected, the data held in this
region of flash may be lost soon. UBI makes use of this and when
-EUCLEAN is returned from mtd_read it will move data to another block of
flash. Without adopting this interface change UBI on U-boot attempts to
move data between blocks every time a single bit is corrected using the
ECC, which is a very common occurance on some devices. For some devices
it can be so common that UBI gets stuck constantly moving data around
because each block it attempts to use has a single bit error. This
patch adopts the interface change as in Linux commit edbc4540 in order
to avoid such situations.
Given that none of the drivers under drivers/mtd return -EUCLEAN, this
should only affect those using software ECC. I have tested that it works
on a board which is currently out of tree, but which I hope to be able
to begin upstreaming soon.
Signed-off-by: Paul Burton paul.bur...@imgtec.com
---
drivers/mtd/mtdcore.c | 14 +-
drivers/mtd/mtdpart.c | 12 ++--
drivers/mtd/nand/nand_base.c | 18 ++
drivers/mtd/onenand/onenand_base.c | 3 ++-
include/linux/mtd/nand.h | 3 +++
5 files changed, 38 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 49c0814..deda5f2 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -217,11 +217,23 @@ int mtd_erase(struct mtd_info *mtd, struct erase_info
*instr)
int mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,
u_char *buf)
{
+ int ret_code;
if (from 0 || from mtd-size || len mtd-size - from)
return -EINVAL;
if (!len)
return 0;
- return mtd-_read(mtd, from, len, retlen, buf);
+
+ /*
+* In the absence of an error, drivers return a non-negative integer
+* representing the maximum number of bitflips that were corrected on
+* any one ecc region (if applicable; zero otherwise).
+*/
+ ret_code = mtd-_read(mtd, from, len, retlen, buf);
+ if (unlikely(ret_code 0))
+ return ret_code;
+ if (mtd-ecc_strength == 0)
+ return 0; /* device lacks ecc */
+ return ret_code = mtd-bitflip_threshold ? -EUCLEAN : 0;
}
int mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 9dfe7bb..146ce11 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -53,12 +53,12 @@ static int part_read(struct mtd_info *mtd, loff_t from,
size_t len,
stats = part-master-ecc_stats;
res = mtd_read(part-master, from + part-offset, len, retlen, buf);
- if (unlikely(res)) {
- if (mtd_is_bitflip(res))
- mtd-ecc_stats.corrected +=
part-master-ecc_stats.corrected - stats.corrected;
- if (mtd_is_eccerr(res))
- mtd-ecc_stats.failed += part-master-ecc_stats.failed
- stats.failed;
- }
+ if (unlikely(mtd_is_eccerr(res)))
+ mtd-ecc_stats.failed +=
+ part-master-ecc_stats.failed - stats.failed;
+ else
+ mtd-ecc_stats.corrected +=
+ part-master-ecc_stats.corrected - stats.corrected;
return res;
}
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 9e05cef..d4d586c 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1238,6 +1238,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t
from,
mtd-oobavail : mtd-oobsize;
uint8_t *bufpoi, *oob, *buf;
+ unsigned int max_bitflips = 0;
stats = mtd-ecc_stats;
@@ -1265,7 +1266,10 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t
from,
chip-cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
- /* Now read the page into the buffer */
+ /*
+* Now read the page into the buffer. Absent an error,
+* the read methods return max bitflips per ecc step.
+*/
if (unlikely(ops-mode == MTD_OPS_RAW))
ret = chip-ecc.read_page_raw(mtd, chip, bufpoi,
oob_required,
@@ -1284,15 +1288,19 @@ static int nand_do_read_ops(struct mtd_info *mtd,
loff_t from,
break;
}
+
[U-Boot] [u-boot][RFC v1] ARMV7: OMAP4+: Fix boot issues when using Alternative Boot operation mode
The Alternative Boot operation mode (boot from eMMC boot partition)
is selected through sys_boot pads configuration:
- sys_boot[5:0]=0b101100 for OMAP4 (MMC2_BOOT)
- sys_boot[3:0]=0xb1110 for OMAP5 (eMMC, boot partition only)
So, add new bootdevice BOOT_DEVICE_MMC2_BOOT for OMAP4 and change bootmode
from MMCSD_MODE_UNDEFINED to MMCSD_MODE_RAW for it to support this mode.
As for OMAP5, then only change bootmode to MMCSD_MODE_RAW.
Signed-off-by: Oleksandr Tyshchenko oleksandr.tyshche...@ti.com
---
arch/arm/cpu/armv7/omap-common/boot-common.c | 21 -
arch/arm/include/asm/arch-omap4/spl.h|3 ++-
common/spl/spl.c |1 +
3 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c
b/arch/arm/cpu/armv7/omap-common/boot-common.c
index 76ae1b6..f693b0d 100644
--- a/arch/arm/cpu/armv7/omap-common/boot-common.c
+++ b/arch/arm/cpu/armv7/omap-common/boot-common.c
@@ -29,7 +29,7 @@ void save_omap_boot_params(void)
{
u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
u8 boot_device;
- u32 dev_desc, dev_data;
+ u32 dev_desc, dev_data, boot_mode;
if ((rom_params NON_SECURE_SRAM_START) ||
(rom_params NON_SECURE_SRAM_END))
@@ -51,16 +51,26 @@ void save_omap_boot_params(void)
#if !defined(CONFIG_AM33XX) !defined(CONFIG_TI81XX)
if ((omap_hw_init_context() ==
OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
- gd-arch.omap_boot_params.omap_bootmode =
- *((u8 *)(rom_params + BOOT_MODE_OFFSET));
+ boot_mode = *((u8 *)(rom_params + BOOT_MODE_OFFSET));
} else
#endif
{
dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
- gd-arch.omap_boot_params.omap_bootmode =
- *((u32 *)(dev_data + BOOT_MODE_OFFSET));
+ boot_mode = *((u32 *)(dev_data + BOOT_MODE_OFFSET));
}
+ /*
+* Make spl_mmc_load_image() happy with Alternative
+* Boot operation mode
+*/
+#if defined(CONFIG_OMAP44XX)
+ if (boot_device == BOOT_DEVICE_MMC2_BOOT)
+ boot_mode = MMCSD_MODE_RAW;
+#elif defined(CONFIG_OMAP54XX)
+ if (boot_device == BOOT_DEVICE_MMC2)
+ boot_mode = MMCSD_MODE_RAW;
+#endif
+ gd-arch.omap_boot_params.omap_bootmode = boot_mode;
}
}
@@ -92,6 +102,7 @@ int board_mmc_init(bd_t *bis)
omap_mmc_init(0, 0, 0, -1, -1);
break;
case BOOT_DEVICE_MMC2:
+ case BOOT_DEVICE_MMC2_BOOT:
case BOOT_DEVICE_MMC2_2:
omap_mmc_init(1, 0, 0, -1, -1);
break;
diff --git a/arch/arm/include/asm/arch-omap4/spl.h
b/arch/arm/include/asm/arch-omap4/spl.h
index f61627f..245b81f 100644
--- a/arch/arm/include/asm/arch-omap4/spl.h
+++ b/arch/arm/include/asm/arch-omap4/spl.h
@@ -30,8 +30,9 @@
#define BOOT_DEVICE_ONENAND4
#define BOOT_DEVICE_MMC1 5
#define BOOT_DEVICE_MMC2 6
+#define BOOT_DEVICE_MMC2_BOOT 8
#define BOOT_DEVICE_MMC2_2 0xFF
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
-#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
+#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_BOOT
#endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 628c399..ba91b65 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -177,6 +177,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
+ case BOOT_DEVICE_MMC2_BOOT:
case BOOT_DEVICE_MMC2_2:
spl_mmc_load_image();
break;
--
1.7.9.5
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[U-Boot] [PATCH 0/3] MTD UBI fixes
This patchset corrects a few issues I've had whilst using UBI with U-boot. The first 2 are bug fixes, the 3rd is an addition I needed in order to write a large root filesystem into my NAND device. Paul Burton (3): mtd: driver _read() returns max_bitflips; mtd_read() returns -EUCLEAN cmd_mtdparts: use 64 bits for flash size, partition size offset cmd_ubi: add write.part command, to write a volume in multiple parts common/cmd_mtdparts.c | 54 ++--- common/cmd_ubi.c | 62 +- doc/README.ubi | 3 ++ drivers/mtd/mtdcore.c | 14 - drivers/mtd/mtdpart.c | 12 drivers/mtd/nand/nand_base.c | 18 --- drivers/mtd/onenand/onenand_base.c | 3 +- include/jffs2/load_kernel.h| 6 ++-- include/linux/mtd/nand.h | 3 ++ 9 files changed, 120 insertions(+), 55 deletions(-) -- 1.8.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [u-boot][RFC v1] mmc: Remove unused variable backup from mmc_send_cmd()
Do not call a memset for unused variable backup every time.
Remove unused variable from function.
Signed-off-by: Oleksandr Tyshchenko oleksandr.tyshche...@ti.com
---
drivers/mmc/mmc.c |3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 73f7195..c9cb9ff 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -71,11 +71,8 @@ int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct mmc_data backup;
int ret;
- memset(backup, 0, sizeof(backup));
-
#ifdef CONFIG_MMC_TRACE
int i;
u8 *ptr;
--
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[U-Boot] [u-boot][RFC v1] omap_hsmmc: omap4+/am335x: modify MMC controller internal fsm reset func
mmc_send_cmd: timeout: No status update error sometimes happens in
omap_hsmmc driver func mmc_send_cmd() when the MMC controller card
identification and selection sequence is executed for eMMC on OMAP4
boards.
It happens due to incorrect execution of CMD line reset procedure
for OMAP4. Because CMD(DAT) lines reset procedures are slightly
different for OMAP3 and OMAP4(AM335x,OMAP5,DRA7xx).
According to OMAP3 TRM:
Set SRC(SRD) bit in MMCHS_SYSCTL register to 0x1 and wait until
it returns to 0x0.
According to OMAP4(AM335x,OMAP5,DRA7xx) TRMs, CMD(DATA) lines reset
procedure steps must be as follows:
1. Initiate CMD(DAT) line reset by writing 0x1 to SRC(SRD) bit in
MMCHS_SYSCTL register (SD_SYSCTL for AM335x).
2. Poll the SRC(SRD) bit until it is set to 0x1.
3. Wait until the SRC(SRD) bit returns to 0x0
(reset procedure is completed).
Unfortunately, at present omap_hsmmc driver has support only for
OMAP3. And as result step #2 is missing for OMAP4(AM335x,OMAP5,DRA7xx).
This sometimes leads to the fact that the waiting loop which is
required in step #3 does not executed, because SRC bit does not set
yet (at the moment of checking a condition of a loop execution).
And as a result this can cause to timeout error when sending a
next command.
In the particular case (working with eMMC witch do not respond to
some SD specific command) due to incorrect reset sequence after
command SD_CMD_SEND_IF_COND which finished with CTO flag within
64 clock cycles, the next command MMC_CMD_APP_CMD leads to a
timeout error within 1s.
So, extend CMD(DATA) lines reset procedure in func
mmc_reset_controller_fsm() by adding the missing step #2 for
OMAP4+/AM335x boards.
Signed-off-by: Oleksandr Tyshchenko oleksandr.tyshche...@ti.com
---
drivers/mmc/omap_hsmmc.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 975b2c5..0e36bf9 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -288,6 +288,30 @@ static void mmc_reset_controller_fsm(struct hsmmc
*mmc_base, u32 bit)
mmc_reg_out(mmc_base-sysctl, bit, bit);
+ /*
+* CMD(DAT) lines reset procedures are slightly different
+* for OMAP3 and OMAP4(AM335x,OMAP5,DRA7xx).
+* According to OMAP3 TRM:
+* Set SRC(SRD) bit in MMCHS_SYSCTL register to 0x1 and wait until it
+* returns to 0x0.
+* According to OMAP4(AM335x,OMAP5,DRA7xx) TRMs, CMD(DATA) lines reset
+* procedure steps must be as follows:
+* 1. Initiate CMD(DAT) line reset by writing 0x1 to SRC(SRD) bit in
+*MMCHS_SYSCTL register (SD_SYSCTL for AM335x).
+* 2. Poll the SRC(SRD) bit until it is set to 0x1.
+* 3. Wait until the SRC (SRD) bit returns to 0x0
+*(reset procedure is completed).
+*/
+#if defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
+ defined(CONFIG_AM33XX)
+ if (!(readl(mmc_base-sysctl) bit)) {
+ start = get_timer(0);
+ while (!(readl(mmc_base-sysctl) bit)) {
+ if (get_timer(0) - start MAX_RETRY_MS)
+ return;
+ }
+ }
+#endif
start = get_timer(0);
while ((readl(mmc_base-sysctl) bit) != 0) {
if (get_timer(0) - start MAX_RETRY_MS) {
--
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[U-Boot] [PATCH 3/3] cmd_ubi: add write.part command, to write a volume in multiple parts
This allows you to write data to an UBI volume when the amount of memory
available to write that data from is less than the total size of the
data. For example, you may split a root filesystem UBIFS image into
parts, provide the total size of the image to the first write.part
command and then use multiple write.part commands to write the
subsequent parts of the volume. This results in a sequence of commands
akin to:
ext4load mmc 0:1 0x8000 rootfs.ubifs.0
ubi write.part 0x8000 root 0x0800 0x1800
ext4load mmc 0:1 0x8000 rootfs.ubifs.1
ubi write.part 0x8000 root 0x0800
ext4load mmc 0:1 0x8000 rootfs.ubifs.2
ubi write.part 0x8000 root 0x0800
This would write 384MiB of data to the UBI volume 'root' whilst only
requiring 128MiB of said data to be held in memory at a time.
Signed-off-by: Paul Burton paul.bur...@imgtec.com
---
common/cmd_ubi.c | 62 ++--
doc/README.ubi | 3 +++
2 files changed, 50 insertions(+), 15 deletions(-)
diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c
index 5ba4feb..dadb27b 100644
--- a/common/cmd_ubi.c
+++ b/common/cmd_ubi.c
@@ -266,28 +266,15 @@ out_err:
return err;
}
-int ubi_volume_write(char *volume, void *buf, size_t size)
+int ubi_volume_continue_write(char *volume, void *buf, size_t size)
{
int err = 1;
- int rsvd_bytes = 0;
struct ubi_volume *vol;
vol = ubi_find_volume(volume);
if (vol == NULL)
return ENODEV;
- rsvd_bytes = vol-reserved_pebs * (ubi-leb_size - vol-data_pad);
- if (size 0 || size rsvd_bytes) {
- printf(size volume size! Aborting!\n);
- return EINVAL;
- }
-
- err = ubi_start_update(ubi, vol, size);
- if (err 0) {
- printf(Cannot start volume update\n);
- return -err;
- }
-
err = ubi_more_update_data(ubi, vol, buf, size);
if (err 0) {
printf(Couldnt or partially wrote data\n);
@@ -314,6 +301,37 @@ int ubi_volume_write(char *volume, void *buf, size_t size)
return 0;
}
+int ubi_volume_begin_write(char *volume, void *buf, size_t size,
+ size_t full_size)
+{
+ int err = 1;
+ int rsvd_bytes = 0;
+ struct ubi_volume *vol;
+
+ vol = ubi_find_volume(volume);
+ if (vol == NULL)
+ return ENODEV;
+
+ rsvd_bytes = vol-reserved_pebs * (ubi-leb_size - vol-data_pad);
+ if (size 0 || size rsvd_bytes) {
+ printf(size volume size! Aborting!\n);
+ return EINVAL;
+ }
+
+ err = ubi_start_update(ubi, vol, full_size);
+ if (err 0) {
+ printf(Cannot start volume update\n);
+ return -err;
+ }
+
+ return ubi_volume_continue_write(volume, buf, size);
+}
+
+int ubi_volume_write(char *volume, void *buf, size_t size)
+{
+ return ubi_volume_begin_write(volume, buf, size, size);
+}
+
int ubi_volume_read(char *volume, char *buf, size_t size)
{
int err, lnum, off, len, tbuf_size;
@@ -588,7 +606,19 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
addr = simple_strtoul(argv[2], NULL, 16);
size = simple_strtoul(argv[4], NULL, 16);
- ret = ubi_volume_write(argv[3], (void *)addr, size);
+ if (strlen(argv[1]) == 10
+ strncmp(argv[1] + 5, .part, 5) == 0) {
+ if (argc 6)
+ ret = ubi_volume_continue_write(argv[3],
+ (void *)addr, size);
+ else {
+ size_t full_size;
+ full_size = simple_strtoul(argv[5], NULL, 16);
+ ret = ubi_volume_begin_write(argv[3],
+ (void *)addr, size, full_size);
+ }
+ } else
+ ret = ubi_volume_write(argv[3], (void *)addr, size);
if (!ret) {
printf(%d bytes written to volume %s\n, size,
argv[3]);
@@ -636,6 +666,8 @@ U_BOOT_CMD(
- create volume name with size\n
ubi write[vol] address volume size
- Write volume from address with size\n
+ ubi write.part address volume size [fullsize]\n
+- Write part of a volume from address\n
ubi read[vol] address volume [size]
- Read volume to address with size\n
ubi remove[vol] volume
diff --git a/doc/README.ubi b/doc/README.ubi
index 3cf4ef2..d82c75c 100644
--- a/doc/README.ubi
+++ b/doc/README.ubi
@@ -14,6 +14,8 @@ ubi part [part] [offset]
ubi info [l[ayout]] - Display volume and ubi layout information
ubi create[vol] volume [size] [type] - create volume name with size
ubi write[vol]
[U-Boot] [RFC 05/10] Colibri PXA270: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
board/toradex/colibri_pxa270/colibri_pxa270.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/toradex/colibri_pxa270/colibri_pxa270.c
b/board/toradex/colibri_pxa270/colibri_pxa270.c
index c1e2562..3bc69bb 100644
--- a/board/toradex/colibri_pxa270/colibri_pxa270.c
+++ b/board/toradex/colibri_pxa270/colibri_pxa270.c
@@ -13,6 +13,7 @@
#include netdev.h
#include asm/io.h
#include serial.h
+#include usb.h
DECLARE_GLOBAL_DATA_PTR;
@@ -39,7 +40,7 @@ int dram_init(void)
}
#ifdef CONFIG_CMD_USB
-int usb_board_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL)
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
@@ -70,7 +71,7 @@ int usb_board_init(void)
return 0;
}
-void usb_board_init_fail(void)
+void board_usb_init_fail(void)
{
return;
}
--
1.8.2.1
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[U-Boot] [RFC 03/10] Voipac PXA270: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
board/vpac270/vpac270.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/vpac270/vpac270.c b/board/vpac270/vpac270.c
index 616736f..ac941e7 100644
--- a/board/vpac270/vpac270.c
+++ b/board/vpac270/vpac270.c
@@ -13,6 +13,7 @@
#include netdev.h
#include serial.h
#include asm/io.h
+#include usb.h
DECLARE_GLOBAL_DATA_PTR;
@@ -66,7 +67,7 @@ int board_mmc_init(bd_t *bis)
#endif
#ifdef CONFIG_CMD_USB
-int usb_board_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL)
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
@@ -97,7 +98,7 @@ int usb_board_init(void)
return 0;
}
-void usb_board_init_fail(void)
+void board_usb_init_fail(void)
{
return;
}
--
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[U-Boot] [RFC 04/10] Trizeps IV: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
board/trizepsiv/conxs.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/trizepsiv/conxs.c b/board/trizepsiv/conxs.c
index c0c318f..9c00ea5 100644
--- a/board/trizepsiv/conxs.c
+++ b/board/trizepsiv/conxs.c
@@ -21,6 +21,7 @@
#include asm/arch/regs-mmc.h
#include netdev.h
#include asm/io.h
+#include usb.h
DECLARE_GLOBAL_DATA_PTR;
@@ -42,7 +43,7 @@ extern struct serial_device serial_stuart_device;
* Miscelaneous platform dependent initialisations
*/
-int usb_board_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL)
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
@@ -69,7 +70,7 @@ int usb_board_init(void)
return 0;
}
-void usb_board_init_fail(void)
+void board_usb_init_fail(void)
{
return;
}
--
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[U-Boot] [RFC 08/10] esd apc405: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
board/esd/apc405/apc405.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c
index f13f088..a05f771 100644
--- a/board/esd/apc405/apc405.c
+++ b/board/esd/apc405/apc405.c
@@ -17,6 +17,7 @@
#include mtd/cfi_flash.h
#include asm/4xx_pci.h
#include pci.h
+#include usb.h
DECLARE_GLOBAL_DATA_PTR;
@@ -428,7 +429,7 @@ void reset_phy(void)
}
#if defined(CONFIG_USB_OHCI_NEW) defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
return 0;
}
@@ -453,7 +454,7 @@ int usb_board_stop(void)
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_init_fail(void)
{
usb_board_stop();
return 0;
--
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[U-Boot] [RFC 01/10] New board-specific USB initialization interface
This commit unifies board-specific USB initialization implementations
under one symbol (usb_board_init), declaration of which is available in
usb.h.
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Lukasz Majewski l.majew...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
common/cmd_dfu.c | 5 ++---
common/cmd_usb_mass_storage.c | 3 ++-
common/usb.c | 5 +
drivers/usb/host/ehci-omap.c | 8 +---
drivers/usb/host/ehci-tegra.c | 2 +-
drivers/usb/host/ohci-hcd.c | 4 ++--
drivers/usb/host/ohci.h | 12 +---
include/g_dnl.h | 2 --
include/usb.h | 17 -
include/usb_mass_storage.h| 12 +---
10 files changed, 39 insertions(+), 31 deletions(-)
diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c
index db066ac..c701ebc 100644
--- a/common/cmd_dfu.c
+++ b/common/cmd_dfu.c
@@ -14,6 +14,7 @@
#include dfu.h
#include asm/errno.h
#include g_dnl.h
+#include usb.h
static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
@@ -43,9 +44,7 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[])
goto done;
}
-#ifdef CONFIG_TRATS
- board_usb_init();
-#endif
+ board_usb_init(USB_INIT_DEVICE);
g_dnl_register(s);
while (1) {
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index 33a4715..86135b4 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -9,6 +9,7 @@
#include common.h
#include command.h
#include g_dnl.h
+#include usb.h
#include usb_mass_storage.h
int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
@@ -33,7 +34,7 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
goto fail;
}
- board_usb_init();
+ board_usb_init(USB_INIT_DEVICE);
ums_info = board_ums_init(dev_num, offset, part_size);
if (!ums_info) {
diff --git a/common/usb.c b/common/usb.c
index f740e5e..793fb35 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -982,4 +982,9 @@ int usb_new_device(struct usb_device *dev)
return 0;
}
+__attribute__((weak))
+int board_usb_init(enum board_usb_init_type what_to_init)
+{
+ return 0;
+}
/* EOF */
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index a47e078..61b7c8d 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -86,12 +86,6 @@ static void omap_ehci_soft_phy_reset(int port)
ulpi_reset(ulpi_vp);
}
-inline int __board_usb_init(void)
-{
- return 0;
-}
-int board_usb_init(void) __attribute__((weak, alias(__board_usb_init)));
-
#if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \
defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO)
/* controls PHY(s) reset signal(s) */
@@ -150,7 +144,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data
*usbhs_pdata,
debug(Initializing OMAP EHCI\n);
- ret = board_usb_init();
+ ret = board_usb_init(USB_INIT_HOST);
if (ret 0)
return ret;
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index c6da449..cc23133 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -699,7 +699,7 @@ static int process_usb_nodes(const void *blob, int
node_list[], int count)
return 0;
}
-int board_usb_init(const void *blob)
+int usb_process_devicetree(const void *blob)
{
int node_list[USB_PORTS_MAX];
int count, err = 0;
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index c33c487..e6a5623 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1861,7 +1861,7 @@ int usb_lowlevel_init(int index, void **controller)
#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
/* board dependant init */
- if (usb_board_init())
+ if (board_usb_init(USB_INIT_HOST))
return -1;
#endif
memset(gohci, 0, sizeof(ohci_t));
@@ -1918,7 +1918,7 @@ int usb_lowlevel_init(int index, void **controller)
err (can't reset usb-%s, gohci.slot_name);
#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
/* board dependant cleanup */
- usb_board_init_fail();
+ board_usb_init_fail();
#endif
#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index d977e8f..9f7f961 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -19,14 +19,12 @@
#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
/* functions for doing board or CPU specific setup/cleanup */
-extern int usb_board_init(void);
-extern int usb_board_stop(void);
-extern int usb_board_init_fail(void);
-
-extern int usb_cpu_init(void);
-extern int usb_cpu_stop(void);
-extern int usb_cpu_init_fail(void);
+int usb_board_stop(void);
+int board_usb_init_fail(void);
+int usb_cpu_init(void);
+int
[U-Boot] [RFC 09/10] balloon3: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
board/balloon3/balloon3.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c
index ecbac16..d92d843 100644
--- a/board/balloon3/balloon3.c
+++ b/board/balloon3/balloon3.c
@@ -13,6 +13,7 @@
#include asm/io.h
#include spartan3.h
#include command.h
+#include usb.h
DECLARE_GLOBAL_DATA_PTR;
@@ -59,7 +60,7 @@ void dram_init_banksize(void)
}
#ifdef CONFIG_CMD_USB
-int usb_board_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL)
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
@@ -90,7 +91,7 @@ int usb_board_init(void)
return 0;
}
-void usb_board_init_fail(void)
+void board_usb_init_fail(void)
{
return;
}
--
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[U-Boot] [RFC 00/10] New board-specific USB initialization interface
Current implementation of do_dfu() and do_usb_mass_storage() requires board-specific board_usb_init() which performs USB hardware initialization. I noticed that several boards have such a function defined, named either usb_board_init() (which binds to ohci-hcd.c driver and had been used solely by it) or board_usb_init() (as in ehci-omap.c). I _assumed_ that these functions do what's required by do_*() and renamed the earlier in order to unify the naming convention. It would: + make enabling DFU and UMS in these boards easier + clean up the namespace + improve code reusability + enable devs to postpone hardware init until it's needed (as in do_dfu()) Declarations of these functions were scattered all over the codebase. Seeing it as a bad practice, I added declaration of usb_board_init() in usb.h and removed the other. I added a weak symbol for usb_board_init() in usb.c so that boards which do not require USB initialization or have to initialize hardware earlier would compile and run. For boards which offer both USB device and host capabilities, you can specify which part, host or device, to initialize, via function argument. Does this approach sound good and/or reasonable? Code compiles successfully for all ARM boards and was tested on Samsung Goni. Mateusz Zalega (10): New board-specific USB initialization interface nvidia, tegra: new USB hardware init interface Voipac PXA270: new USB hardware init interface Trizeps IV: new USB hardware init interface Colibri PXA270: new USB hardware init interface icpdas lp8x4x: new USB hardware init interface esd pmc440: new USB hardware init interface esd apc405: new USB hardware init interface balloon3: new USB hardware init interface canyonlands: new USB hardware init interface arch/arm/include/asm/arch-tegra/usb.h | 3 +-- board/amcc/canyonlands/canyonlands.c | 5 +++-- board/balloon3/balloon3.c | 5 +++-- board/esd/apc405/apc405.c | 5 +++-- board/esd/pmc440/pmc440.c | 5 +++-- board/icpdas/lp8x4x/lp8x4x.c | 5 +++-- board/nvidia/common/board.c | 14 ++ board/toradex/colibri_pxa270/colibri_pxa270.c | 5 +++-- board/trizepsiv/conxs.c | 5 +++-- board/vpac270/vpac270.c | 5 +++-- common/cmd_dfu.c | 5 ++--- common/cmd_usb_mass_storage.c | 3 ++- common/usb.c | 5 + drivers/usb/host/ehci-omap.c | 8 +--- drivers/usb/host/ehci-tegra.c | 2 +- drivers/usb/host/ohci-hcd.c | 4 ++-- drivers/usb/host/ohci.h | 12 +--- include/g_dnl.h | 2 -- include/usb.h | 17 - include/usb_mass_storage.h| 12 +--- 20 files changed, 74 insertions(+), 53 deletions(-) -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC 07/10] esd pmc440: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
board/esd/pmc440/pmc440.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index 549b3b7..4cdfb7c 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -27,6 +27,7 @@
#endif
#include serial.h
#include asm/4xx_pci.h
+#include usb.h
#include fpga.h
#include pmc440.h
@@ -821,7 +822,7 @@ int bootstrap_eeprom_read (unsigned dev_addr, unsigned
offset,
}
#if defined(CONFIG_USB_OHCI_NEW) defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
char *act = getenv(usbact);
int i;
@@ -845,7 +846,7 @@ int usb_board_stop(void)
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_init_fail(void)
{
usb_board_stop();
return 0;
--
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[U-Boot] [RFC 06/10] icpdas lp8x4x: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
board/icpdas/lp8x4x/lp8x4x.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/icpdas/lp8x4x/lp8x4x.c b/board/icpdas/lp8x4x/lp8x4x.c
index 1b68ef3..54f8bba 100644
--- a/board/icpdas/lp8x4x/lp8x4x.c
+++ b/board/icpdas/lp8x4x/lp8x4x.c
@@ -15,6 +15,7 @@
#include netdev.h
#include serial.h
#include asm/io.h
+#include usb.h
DECLARE_GLOBAL_DATA_PTR;
@@ -58,7 +59,7 @@ int board_mmc_init(bd_t *bis)
#endif
#ifdef CONFIG_CMD_USB
-int usb_board_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL)
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
@@ -89,7 +90,7 @@ int usb_board_init(void)
return 0;
}
-void usb_board_init_fail(void)
+void board_usb_init_fail(void)
{
return;
}
--
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[U-Boot] [PATCH RESEND 1/5] arm:goni: Update configuration for goni target
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Configuration file for GONI has been updated to support FAT file system,
new mmc partitioning scheme and read linux kernel from eMMC instead of
OneNAND.
Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Tested-by: Mateusz Zalega m.zal...@gmail.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
include/configs/s5p_goni.h | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index d0fafd7..6d88874 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -91,7 +91,7 @@
#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
-#define CONFIG_BOOTCOMMAND run ubifsboot
+#define CONFIG_BOOTCOMMAND run mmcboot
#define CONFIG_DEFAULT_CONSOLE console=ttySAC2,115200n8\0
@@ -121,7 +121,7 @@
onenand erase 0x0156 0x1eaa; \
onenand write 0x3200 0x126 0x8C\0 \
bootk= \
- onenand read 0x30007FC0 0xc0 0x60; \
+ run loaduimage; \
bootm 0x30007FC0\0 \
flashboot= \
set bootargs root=/dev/mtdblock${bootblock} \
@@ -140,16 +140,21 @@
set bootargs CONFIG_RAMDISK_BOOT \
initrd=0x3300,8M ramdisk=8192\0 \
mmcboot= \
- set bootargs root=${mmcblk} rootfstype=${rootfstype} \
+ set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} \
+ rootfstype=${rootfstype} \
CONFIG_UBI_MTD ${opts} ${lcdinfo} \
CONFIG_COMMON_BOOT ; run bootk\0 \
boottrace=setenv opts initcall_debug; run bootcmd\0 \
bootchart=set opts init=/sbin/bootchartd; run bootcmd\0 \
verify=n\0 \
- rootfstype=cramfs\0 \
+ rootfstype=ext4\0 \
console= CONFIG_DEFAULT_CONSOLE \
mtdparts= MTDPARTS_DEFAULT \
meminfo=mem=80M mem=256M@0x4000 mem=128M@0x5000\0 \
+ loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0 \
+ mmcdev=0\0 \
+ mmcbootpart=2\0 \
+ mmcrootpart=5\0 \
mmcblk=/dev/mmcblk1p1\0 \
bootblock=9\0 \
ubiblock=8\0 \
@@ -195,6 +200,10 @@
#define CONFIG_DOS_PARTITION 1
+/* FAT */
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR - 0x100)
#define CONFIG_SYS_CACHELINE_SIZE 64
--
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[U-Boot] [PATCH RESEND 2/5] arm:goni:dfu Add support for DFU at GONI target
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Proper adjustment for supporting DFU at GONI target has been made.
The s5p_goni.h file has been updated. Moreover the code for low level
USB initialization has been added to GONI board code.
The malloc pool has been enlarged in order to support larger buffer
sizes needed by DFU implementation.
Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Tested-by: Mateusz Zalega m.zal...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
board/samsung/goni/goni.c | 7 +++
include/configs/s5p_goni.h | 22 --
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index c05801d..c605bf5 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -139,4 +139,11 @@ struct s3c_plat_otg_data s5pc110_otg_data = {
.regs_otg = S5PC110_OTG_BASE,
.usb_phy_ctrl = S5PC110_USB_PHY_CONTROL,
};
+
+void board_usb_init(void)
+{
+ debug(USB_udc_probe\n);
+ s3c_udc_probe(s5pc110_otg_data);
+}
+
#endif
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 6d88874..192acaa 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -38,7 +38,7 @@
* Size of malloc() pool
* 1MB = 0x10, 0x10 = 1024 * 1024
*/
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 20))
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (16 20))
/*
* select serial console configuration
*/
@@ -70,6 +70,17 @@
#define CONFIG_CMD_ONENAND
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_MANUFACTURER Samsung
#define CONFIG_BOOTDELAY 1
#define CONFIG_ZERO_BOOTDELAY_CHECK
@@ -89,6 +100,10 @@
,60m(qboot)\
,-(UBI)\0
+#define CONFIG_DFU_ALT \
+ u-boot mmc 80 400; \
+ uImage fat 0 2\0 \
+
#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
#define CONFIG_BOOTCOMMAND run mmcboot
@@ -159,7 +174,9 @@
bootblock=9\0 \
ubiblock=8\0 \
ubi=enabled\0 \
- opts=always_resume=1
+ opts=always_resume=1\0 \
+ dfu_alt_info= CONFIG_DFU_ALT
+
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP/* undef to save memory */
@@ -228,5 +245,6 @@
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
#endif /* __CONFIG_H */
--
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[U-Boot] [RFC 10/10] canyonlands: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
board/amcc/canyonlands/canyonlands.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/amcc/canyonlands/canyonlands.c
b/board/amcc/canyonlands/canyonlands.c
index cc36f45..31db133 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -16,6 +16,7 @@
#include asm/4xx_pcie.h
#include asm/ppc4xx-gpio.h
#include asm/errno.h
+#include usb.h
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips */
@@ -188,7 +189,7 @@ int board_early_init_f(void)
}
#if defined(CONFIG_USB_OHCI_NEW) defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
struct board_bcsr *bcsr_data =
(struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
@@ -229,7 +230,7 @@ int usb_board_stop(void)
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_init_fail(void)
{
return usb_board_stop();
}
--
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[U-Boot] [PATCH RESEND 3/5] arm:goni: Add support for USB mass storage
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
This commit enables support for USB mass storage composite function.
It defines platform code and enables it at config file.
Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Tested-by: Mateusz Zalega m.zal...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
board/samsung/goni/goni.c | 76 +-
include/configs/s5p_goni.h | 10 +++---
2 files changed, 80 insertions(+), 6 deletions(-)
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index c605bf5..28fedb3 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -13,6 +13,9 @@
#include usb/s3c_udc.h
#include asm/arch/cpu.h
#include power/max8998_pmic.h
+#include usb.h
+#include usb_mass_storage.h
+
DECLARE_GLOBAL_DATA_PTR;
static struct s5pc110_gpio *s5pc110_gpio;
@@ -140,10 +143,81 @@ struct s3c_plat_otg_data s5pc110_otg_data = {
.usb_phy_ctrl = S5PC110_USB_PHY_CONTROL,
};
-void board_usb_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
debug(USB_udc_probe\n);
s3c_udc_probe(s5pc110_otg_data);
+ return 0;
+}
+
+#endif
+
+#ifdef CONFIG_USB_GADGET_MASS_STORAGE
+static int ums_read_sector(struct ums_device *ums_dev,
+ ulong start, lbaint_t blkcnt, void *buf)
+{
+ if (ums_dev-mmc-block_dev.block_read(ums_dev-dev_num,
+ start + ums_dev-offset,
+ blkcnt, buf) != blkcnt)
+ return -1;
+
+ return 0;
+}
+
+static int ums_write_sector(struct ums_device *ums_dev,
+ ulong start, lbaint_t blkcnt, const void *buf)
+{
+ if (ums_dev-mmc-block_dev.block_write(ums_dev-dev_num,
+ start + ums_dev-offset,
+ blkcnt, buf) != blkcnt)
+ return -1;
+
+ return 0;
+}
+
+static void ums_get_capacity(struct ums_device *ums_dev,
+ long long int *capacity)
+{
+ long long int tmp_capacity;
+
+ tmp_capacity = (long long int) ((ums_dev-offset + ums_dev-part_size)
+ * SECTOR_SIZE);
+ *capacity = ums_dev-mmc-capacity - tmp_capacity;
+}
+
+static struct ums_board_info ums_board = {
+ .read_sector = ums_read_sector,
+ .write_sector = ums_write_sector,
+ .get_capacity = ums_get_capacity,
+ .name = GONI UMS disk,
+ .ums_dev = {
+ .mmc = NULL,
+ .dev_num = 0,
+ .offset = 0,
+ .part_size = 0.
+ },
+};
+
+struct ums_board_info *board_ums_init(unsigned int dev_num, unsigned int
offset,
+ unsigned int part_size)
+{
+ struct mmc *mmc;
+
+ mmc = find_mmc_device(dev_num);
+ /*
+* mmc initialization is necessary prior to the ums command usage
+* due to fact that on goni target environment is read from oneNand
+* memory, so the mmc remains uninitialized when u-boot prompt appears
+*/
+ if (!mmc || mmc_init(mmc))
+ return NULL;
+
+ ums_board.ums_dev.mmc = mmc;
+ ums_board.ums_dev.dev_num = dev_num;
+ ums_board.ums_dev.offset = offset;
+ ums_board.ums_dev.part_size = part_size;
+
+ return ums_board;
}
#endif
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 192acaa..8014958 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -116,7 +116,7 @@
#define CONFIG_COMMON_BOOT ${console} ${meminfo} ${mtdparts}
#define CONFIG_BOOTARGSroot=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3
ubi.mtd=6 \
-rootfstype=cramfs CONFIG_COMMON_BOOT
+rootfstype=cramfs rootwait CONFIG_COMMON_BOOT
#define CONFIG_UPDATEB updateb=onenand erase 0x0 0x10; \
onenand write 0x32008000 0x0 0x10\0
@@ -170,15 +170,13 @@
mmcdev=0\0 \
mmcbootpart=2\0 \
mmcrootpart=5\0 \
- mmcblk=/dev/mmcblk1p1\0 \
+ partitions= PARTS_DEFAULT \
bootblock=9\0 \
ubiblock=8\0 \
ubi=enabled\0 \
opts=always_resume=1\0 \
- dfu_alt_info= CONFIG_DFU_ALT
+ dfu_alt_info= CONFIG_DFU_ALT \0
-
-/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use hush command parser*/
#define CONFIG_SYS_PROMPT Goni #
@@ -246,5 +244,7 @@
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define
[U-Boot] [PATCH RESEND 0/5] arm:goni: Update GONI configuration
Samsung's GONI target has been updated to support: - New GPT partition layout - USB Mass Storage Gadget - DFU support - Loading uImage from eMMC not OneNAND Patch depends on RFC New board-specific USB initialization interface Arkadiusz Wlodarczyk (4): arm:goni: Update configuration for goni target arm:goni:dfu Add support for DFU at GONI target arm:goni: Add support for USB mass storage arm:goni: Update of GONI partitioning scheme at eMMC Mateusz Zalega (1): trats: new USB hardware init interface board/samsung/goni/goni.c | 81 + board/samsung/trats/trats.c | 4 +- include/configs/s5p_goni.h | 89 +++-- 3 files changed, 146 insertions(+), 28 deletions(-) -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC 02/10] nvidia, tegra: new USB hardware init interface
This commit postpones initialization of USB hardware until
usb_board_init() is called by a command implementation
(ie. do_dfu()) or a driver.
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Tom Warren twar...@nvidia.com
---
arch/arm/include/asm/arch-tegra/usb.h | 3 +--
board/nvidia/common/board.c | 14 ++
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra/usb.h
b/arch/arm/include/asm/arch-tegra/usb.h
index f66257c..a1efd07 100644
--- a/arch/arm/include/asm/arch-tegra/usb.h
+++ b/arch/arm/include/asm/arch-tegra/usb.h
@@ -131,8 +131,7 @@
/* USB3_IF_USB_PHY_VBUS_SENSORS_0 */
#define VBUS_VLD_STS (1 26)
-
/* Setup USB on the board */
-int board_usb_init(const void *blob);
+int usb_process_devicetree(const void *blob);
#endif /* _TEGRA_USB_H_ */
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 126e56e..cdb02ee 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -32,6 +32,7 @@
#ifdef CONFIG_USB_EHCI_TEGRA
#include asm/arch-tegra/usb.h
#include asm/arch/usb.h
+#include usb.h
#endif
#ifdef CONFIG_TEGRA_MMC
#include asm/arch-tegra/tegra_mmc.h
@@ -151,10 +152,6 @@ int board_init(void)
# endif /* CONFIG_TEGRA_PMU */
#endif /* CONFIG_SYS_I2C_TEGRA */
-#ifdef CONFIG_USB_EHCI_TEGRA
- pin_mux_usb();
- board_usb_init(gd-fdt_blob);
-#endif
#ifdef CONFIG_LCD
tegra_lcd_check_next_stage(gd-fdt_blob, 0);
#endif
@@ -257,3 +254,12 @@ void pad_init_mmc(struct mmc_host *host)
#endif /* T30 */
}
#endif /* MMC */
+
+#ifdef CONFIG_USB_EHCI_TEGRA
+int board_usb_init(enum board_usb_init_type what_to_init)
+{
+ pin_mux_usb();
+ usb_process_devicetree(gd-fdt_blob);
+ return 0;
+}
+#endif
--
1.8.2.1
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[U-Boot] [PATCH] DFU: fix for raw data write
When user attempted to perform a raw write using DFU (vide
dfu_fill_entity_mmc) with MMC interface not initialized before,
get_mmc_blk_size() reported invalid (zero) block size - it wasn't
possible to write ie. a new u-boot image.
This commit fixes that by initializing device in get_mmc_blk_size() when
needed.
Tested on Samsung Goni.
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
drivers/dfu/dfu.c | 22 ++
drivers/dfu/dfu_mmc.c | 3 +++
include/dfu.h | 7 ++-
3 files changed, 27 insertions(+), 5 deletions(-)
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index d73d510..6979112 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -414,3 +414,25 @@ struct dfu_entity *dfu_get_entity(int alt)
return NULL;
}
+
+int get_mmc_blk_size(int dev)
+{
+ struct mmc *mmc = find_mmc_device(dev);
+
+ if (mmc == NULL) {
+ error(Couldn't find MMC device no. %d.\n, dev);
+ return -ENODEV;
+ }
+ if (!mmc-has_init) {
+ if (!mmc_init(mmc)) {
+ if (!mmc-read_bl_len) {
+ error(invalid block length\n);
+ return -ENODEV;
+ }
+ } else {
+ error(Couldn't init MMC device.\n);
+ return -ENODEV;
+ }
+ }
+ return mmc-read_bl_len;
+}
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 0871a77..c776e26 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -235,5 +235,8 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s)
/* initial state */
dfu-inited = 0;
+ /* better safe than sorry */
+ assert(dfu-data.mmc.lba_blk_size 0);
+
return 0;
}
diff --git a/include/dfu.h b/include/dfu.h
index 1d4006d..67ca711 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -40,6 +40,8 @@ struct mmc_internal_data {
unsigned int part;
};
+int get_mmc_blk_size(int dev);
+
struct nand_internal_data {
/* RAW programming */
u64 start;
@@ -49,11 +51,6 @@ struct nand_internal_data {
unsigned int part;
};
-static inline unsigned int get_mmc_blk_size(int dev)
-{
- return find_mmc_device(dev)-read_bl_len;
-}
-
#define DFU_NAME_SIZE 32
#define DFU_CMD_BUF_SIZE 128
#ifndef CONFIG_SYS_DFU_DATA_BUF_SIZE
--
1.8.2.1
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[U-Boot] [PATCH RESEND 4/5] trats: new USB hardware init interface
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
---
board/samsung/trats/trats.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index c8698f3..f8d4b0c 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -26,6 +26,7 @@
#include power/max8997_muic.h
#include power/battery.h
#include power/max17042_fg.h
+#include usb.h
#include usb_mass_storage.h
#include setup.h
@@ -488,10 +489,11 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
.usb_flags = PHY0_SLEEP,
};
-void board_usb_init(void)
+int board_usb_init(enum board_usb_init_type what_to_init)
{
debug(USB_udc_probe\n);
s3c_udc_probe(s5pc210_otg_data);
+ return 0;
}
#endif
--
1.8.2.1
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[U-Boot] [PATCH RESEND 5/5] arm:goni: Update of GONI partitioning scheme at eMMC
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
New partitioning scheme has been defined at GONI target. It complies with
new GPT partitioning introduced previously.
Default partition layout has been defined at s5p_goni.h
Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
include/configs/s5p_goni.h | 44 ++--
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 8014958..ef5c421 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -68,9 +68,9 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_ONENAND
-#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_MMC
#define CONFIG_CMD_DFU
+#define CONFIG_CMD_GPT
/* USB Composite download gadget - g_dnl */
#define CONFIG_USBDOWNLOAD_GADGET
@@ -85,26 +85,30 @@
#define CONFIG_BOOTDELAY 1
#define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-
-/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
-#define MTDIDS_DEFAULT onenand0=samsung-onenand
-#define MTDPARTS_DEFAULT mtdparts=samsung-onenand:1m(bootloader)\
- ,256k(params)\
- ,2816k(config)\
- ,8m(csa)\
- ,7m(kernel)\
- ,1m(log)\
- ,12m(modem)\
- ,60m(qboot)\
- ,-(UBI)\0
-
#define CONFIG_DFU_ALT \
u-boot mmc 80 400; \
uImage fat 0 2\0 \
-#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
+/* partitions definitions */
+#define PARTS_CSA csa-mmc
+#define PARTS_BOOTLOADER u-boot
+#define PARTS_BOOT boot
+#define PARTS_ROOT platform
+#define PARTS_DATA data
+#define PARTS_CSC csc
+#define PARTS_UMS ums
+
+#define PARTS_DEFAULT \
+ uuid_disk=${uuid_gpt_disk}; \
+ name=PARTS_CSA,size=8MiB,uuid=${uuid_gpt_PARTS_CSA}; \
+ name=PARTS_BOOTLOADER,size=60MiB, \
+ uuid=${uuid_gpt_PARTS_BOOTLOADER}; \
+ name=PARTS_BOOT,size=100MiB,uuid=${uuid_gpt_PARTS_BOOT}; \
+ name=PARTS_ROOT,size=1GiB,uuid=${uuid_gpt_PARTS_ROOT}; \
+ name=PARTS_DATA,size=3GiB,uuid=${uuid_gpt_PARTS_DATA}; \
+ name=PARTS_CSC,size=150MiB,uuid=${uuid_gpt_PARTS_CSC}; \
+ name=PARTS_UMS,size=-,uuid=${uuid_gpt_PARTS_UMS}\0 \
+
#define CONFIG_BOOTCOMMAND run mmcboot
@@ -164,13 +168,13 @@
verify=n\0 \
rootfstype=ext4\0 \
console= CONFIG_DEFAULT_CONSOLE \
- mtdparts= MTDPARTS_DEFAULT \
meminfo=mem=80M mem=256M@0x4000 mem=128M@0x5000\0 \
loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0 \
mmcdev=0\0 \
mmcbootpart=2\0 \
mmcrootpart=5\0 \
partitions= PARTS_DEFAULT \
+ mmcblk=/dev/mmcblk1p1\0 \
bootblock=9\0 \
ubiblock=8\0 \
ubi=enabled\0 \
@@ -219,6 +223,10 @@
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
+/* GPT */
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR - 0x100)
#define CONFIG_SYS_CACHELINE_SIZE 64
--
1.8.2.1
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[U-Boot] [PATCH] DFU: fix for raw data write
This commit fixes DFU raw (performed w/o partition interface, via mmc_block_op()) write. Mateusz Zalega (1): DFU: fix for raw data write drivers/dfu/dfu.c | 22 ++ drivers/dfu/dfu_mmc.c | 3 +++ include/dfu.h | 7 ++- 3 files changed, 27 insertions(+), 5 deletions(-) -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [u-boot][RFC v1] sdp4430: Initialize board id using CONFIG_MACH_TYPE
Use CONFIG_MACH_TYPE generic macro to set the machine type
number in the common arm code instead of setting it in the
board code.
Signed-off-by: Oleksandr Tyshchenko oleksandr.tyshche...@ti.com
---
board/ti/sdp4430/sdp.c |1 -
include/configs/omap4_sdp4430.h |1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c
index 5dd1ba3..9f457e7 100644
--- a/board/ti/sdp4430/sdp.c
+++ b/board/ti/sdp4430/sdp.c
@@ -44,7 +44,6 @@ int board_init(void)
{
gpmc_init();
- gd-bd-bi_arch_number = MACH_TYPE_OMAP_4430SDP;
gd-bd-bi_boot_params = (0x8000 + 0x100); /* boot param addr */
return 0;
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index 9e03291..9a4dea0 100644
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -33,6 +33,7 @@
* High Level Configuration Options
*/
#define CONFIG_4430SDP 1 /* working with SDP */
+#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_4430SDP
#include configs/omap4_common.h
--
1.7.9.5
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[U-Boot] [u-boot][RFC v1] sdp4430: Enable Falcon boot mode for mmc (RAW and FAT)
Add support to boot Linux directly from U-Boot SPL via eMMC
(or RAW SD Cards) and FAT SD Cards. Jump into full U-Boot if
a corresponding button is pressed.
Also define new CONFIG_BOOTCOMMAND to add ability for full U-Boot
to boot Linux via eMMC (or RAW SD cards) and FAT SD Cards in
case of using CONFIG_SPL_OS_BOOT feature. Set MMCDEV_DEFAULT to 1
in CONFIG_EXTRA_ENV_SETTINGS, since the target device is mmc1 (eMMC).
Also enable the spl command in the full U-Boot so the kernel
parameter area snapshot can be created.
Signed-off-by: Oleksandr Tyshchenko oleksandr.tyshche...@ti.com
---
board/ti/sdp4430/sdp.c | 23 ++
board/ti/sdp4430/sdp4430_mux_data.h |5 +++
include/configs/omap4_common.h | 57 +--
include/configs/omap4_sdp4430.h | 10 +-
4 files changed, 92 insertions(+), 3 deletions(-)
diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c
index 9f457e7..66ee574 100644
--- a/board/ti/sdp4430/sdp.c
+++ b/board/ti/sdp4430/sdp.c
@@ -26,6 +26,7 @@
#include twl6030.h
#include asm/arch/sys_proto.h
#include asm/arch/mmc_host_def.h
+#include asm/gpio.h
#include sdp4430_mux_data.h
@@ -69,6 +70,28 @@ int misc_init_r(void)
return 0;
}
+#ifdef CONFIG_SPL_OS_BOOT
+/*
+ * SDP4430 specific implementation of spl_start_uboot()
+ *
+ * RETURN
+ * 0 if the button is not pressed
+ * 1 if the button is pressed
+ */
+int spl_start_uboot(void)
+{
+ int val = 0;
+
+ if (!gpio_request(SPL_OS_BOOT_KEY, U-Boot key)) {
+ gpio_direction_input(SPL_OS_BOOT_KEY);
+ val = gpio_get_value(SPL_OS_BOOT_KEY);
+ gpio_free(SPL_OS_BOOT_KEY);
+ }
+
+ return val;
+}
+#endif
+
void set_muxconf_regs_essential(void)
{
do_set_mux((*ctrl)-control_padconf_core_base,
diff --git a/board/ti/sdp4430/sdp4430_mux_data.h
b/board/ti/sdp4430/sdp4430_mux_data.h
index 0760dad..6ddd22d 100644
--- a/board/ti/sdp4430/sdp4430_mux_data.h
+++ b/board/ti/sdp4430/sdp4430_mux_data.h
@@ -65,6 +65,9 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
{USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},/* usba0_otg_ce
*/
{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp
*/
{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm
*/
+#ifdef CONFIG_SPL_OS_BOOT
+{GPMC_A22, (IEN | M3)},/*
gpio_46 */
+#endif
};
const struct pad_conf_entry wkup_padconf_array_essential[] = {
@@ -96,7 +99,9 @@ const struct pad_conf_entry
core_padconf_array_non_essential[] = {
{GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},/*
kpd_row7 */
{GPMC_A20, (IEN | M3)}, /*
gpio_44 */
{GPMC_A21, (M3)}, /*
gpio_45 */
+#ifndef CONFIG_SPL_OS_BOOT
{GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)},/*
kpd_col6 */
+#endif
{GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)},/*
kpd_col7 */
{GPMC_A24, (PTD | M3)}, /*
gpio_48 */
{GPMC_A25, (PTD | M3)}, /*
gpio_49 */
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index 2fa4382..da3a62f 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -145,6 +145,16 @@
#define CONFIG_ENV_OVERWRITE
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
+#define CONFIG_SILENT_CONSOLE 1 /* needed to silence fatinfo
mmc 0 */
+#define CONFIG_BOOTCOMMAND CONFIG_RAW_FAT_BOOTCOMMAND
+#define MMCDEV_DEFAULT 1
+#else
+#define CONFIG_BOOTCOMMAND CONFIG_COMMON_BOOTCOMMAND
+#define MMCDEV_DEFAULT 0
+#endif
+
#define CONFIG_EXTRA_ENV_SETTINGS \
loadaddr=0x8200\0 \
console=ttyO2,115200n8\0 \
@@ -156,7 +166,7 @@
bootfile=zImage\0 \
usbtty=cdc_acm\0 \
vram=16M\0 \
- mmcdev=0\0 \
+ mmcdev=MMCDEV_DEFAULT\0 \
mmcroot=/dev/mmcblk0p2 rw\0 \
mmcrootfstype=ext3 rootwait\0 \
mmcargs=setenv bootargs console=${console} \
@@ -186,7 +196,7 @@
echo WARNING: Could not determine device tree to use;
fi; \0 \
loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0 \
-#define CONFIG_BOOTCOMMAND \
+#define CONFIG_COMMON_BOOTCOMMAND \
run findfdt; \
mmc dev ${mmcdev}; if mmc rescan; then \
echo SD/MMC found on device ${mmcdev}; \
@@ -207,6 +217,34 @@
fi; \
fi
+#define CONFIG_RAW_FAT_BOOTCOMMAND \
+ mmc dev ${mmcdev}; if mmc rescan; then \
+ echo SD/MMC found on device ${mmcdev}; \
+ setenv stdout nulldev; \
+ if fatinfo mmc
Re: [U-Boot] [PATCH] Origen: Set FIMD as the default display path
On 6 August 2013 14:21, Ajay kumar ajayn...@gmail.com wrote: +Donghwa Lee Hi Tushar, I think this setting already exists for Exynos4 in u-boot. No, there was no display on Origen board without this patch. Are you not getting display without your patch? Have a look at this: http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/exynos/system.c;h=ad12445832cf7415e52e8593b595ab33a0b4d375;hb=HEAD#l33 Thanks for the pointer. Let me check if I am missing anything for Origen u-boot code. -- Tushar Behera ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm:exynos:gpio: fix s5p_gpio_part_max for exynos4x12
On 21/05/13 22:39, Piotr Wilczek wrote:
This patch fix wrong value returned by 's5p_gpio_part_max' function
for Exynos4412.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
arch/arm/include/asm/arch-exynos/gpio.h | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
index cfe1024..20a4e3f 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -303,10 +303,19 @@ static inline unsigned int s5p_gpio_part_max(int nr)
return EXYNOS5_GPIO_PART2_MAX;
} else if (cpu_is_exynos4()) {
- if (nr EXYNOS4_GPIO_PART1_MAX)
- return 0;
- else
- return EXYNOS4_GPIO_PART1_MAX;
+ if (proid_is_exynos4412()) {
+ if (nr EXYNOS4X12_GPIO_PART1_MAX)
+ return 0;
+ else if (nr EXYNOS4X12_GPIO_PART2_MAX)
+ return EXYNOS4X12_GPIO_PART1_MAX;
+ else
+ return EXYNOS4X12_GPIO_PART2_MAX;
+ } else {
+ if (nr EXYNOS4_GPIO_PART1_MAX)
+ return 0;
+ else
+ return EXYNOS4_GPIO_PART1_MAX;
+ }
}
return 0;
applied to u-boot-samsung.
Thanks,
Minkyu Kang.
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Re: [U-Boot] Unified u-boot feature set for simpler distro support
Dear Stephen Warren, In message 520021e4.4070...@wwwdotorg.org you wrote: Pluggable protocol modules a la UEFI would solve that;-) Load UEFI as payload from U-Boot instead of Linux, and let UEFI do the rest of the work? me runs and hides ;-) Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Remember, there's a big difference between kneeling down and bending over. - Frank Zappa ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank
Dear Rob Herring, In message CAL_JsqJTg4CVfk0o9hLd4ZVksj+DNEsKLjcv6T7-6F-=br+...@mail.gmail.com you wrote: Why would you ever want to compile this into U-Boot at all? Then any changes you need to make mean compiling and installing a new U-Boot, which is something you normally don't want to do. You may want to have factory default and user settings. Building in the factory settings would be one way to accomplish that. No. Handling these independently, outside of the compiled U-Boot image is as easy, and much more flexible. U-Boot is perfectly able to import such settings from text files (or text blobs stored somewhere, even attached to the U-Boot image, if you want), so just use the text files separately, instead of hard compiling them into the code. In my case, I don't want to compile the environment into u-boot. But some people do as I copied my scripts from Tegra which has them built-in. Since built-in is C and standalone is text file, sharing is impossible. That is the main thing I'd like to see changed. Whether we support merging builtin and standalone envs is secondary. Who says impossible here? When using a file system with write support, you can use env export -t to create a text representation and write it out to the file system (or store it in some reserved area on some storage device). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A good marriage would be between a blind wife and deaf husband. -- Michel de Montaigne ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC 00/10] New board-specific USB initialization interface
Dear Mateusz Zalega, In message 1375786242-11734-1-git-send-email-m.zal...@samsung.com you wrote: Current implementation of do_dfu() and do_usb_mass_storage() requires board-specific board_usb_init() which performs USB hardware initialization. I noticed that several boards have such a function defined, named either usb_board_init() (which binds to ohci-hcd.c driver and had been used solely by it) or board_usb_init() (as in ehci-omap.c). I _assumed_ that these functions do what's required by do_*() and renamed the earlier in order to unify the naming convention. I appreciate your efforts, but this whole area clearly falls into the domain of the device model rework. Is your suggested implementation in any way synchronized with what has been discussed about this topic before? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It is easier to write an incorrect program than understand a correct one. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/2] exynos5250: Add arndale board support
On 25/07/13 21:46, Chander Kashyap wrote:
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 50 ++
board/samsung/arndale/arndale.c | 102 +++
board/samsung/arndale/arndale_spl.c | 66
board/samsung/dts/exynos5250-arndale.dts | 23 +++
boards.cfg |1 +
include/configs/arndale.h| 271
++
7 files changed, 517 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..bf489d4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -747,6 +747,10 @@ Chander Kashyap k.chan...@samsung.com
SMDKV310ARM ARMV7 (EXYNOS4210 SoC)
SMDK5250ARM ARMV7 (EXYNOS5250 SoC)
+Inderpal Singh inderpal.si...@linaro.org
please sort the list by last name.
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Lukasz Majewski l.majew...@samsung.com
trats ARM ARMV7 (EXYNOS4210 SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..5786774
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
Please use for new files SPDX-License-Identifier.
please check it globally.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS+= arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS+= arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL := $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB): $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..47cbac8
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ set_ps_hold_ctrl();
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr,
[U-Boot] [PATCH 1/2 v2] arm: smdkc100: remove config.mk file
Since config.mk is deprecated, remove this file, and move CONFIG_SYS_TEXT_BASE define to config file. Signed-off-by: Minkyu Kang mk7.k...@samsung.com Cc: Wolfgang Denk w...@denx.de --- changes for v2: rebased. board/samsung/smdkc100/config.mk | 16 include/configs/smdkc100.h |3 +++ 2 files changed, 3 insertions(+), 16 deletions(-) delete mode 100644 board/samsung/smdkc100/config.mk diff --git a/board/samsung/smdkc100/config.mk b/board/samsung/smdkc100/config.mk deleted file mode 100644 index 3a08bb1..000 --- a/board/samsung/smdkc100/config.mk +++ /dev/null @@ -1,16 +0,0 @@ -# -# Copyright (C) 2008 # Samsung Elecgtronics -# Kyungmin Park kyungmin.p...@samsung.com -# - -# On S5PC100 we use the 128 MiB OneDRAM bank at -# -# 0x3000 to 0x3500 (80MiB) -# 0x3800 to 0x4000 (128MiB) -# -# On S5PC110 we use the 128 MiB OneDRAM bank at -# -# 0x3000 to 0x3500 (80MiB) -# 0x4000 to 0x4800 (128MiB) -# -CONFIG_SYS_TEXT_BASE = 0x3480 diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a572e62..507a5d3 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -34,6 +34,9 @@ /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x3000 +/* Text Base */ +#define CONFIG_SYS_TEXT_BASE 0x3480 + #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2 v2] arm: goni: remove config.mk file
Since config.mk is deprecated, remove this file, and move CONFIG_SYS_TEXT_BASE define to config file. Signed-off-by: Minkyu Kang mk7.k...@samsung.com --- changes for v2: rebased. board/samsung/goni/config.mk | 18 -- include/configs/s5p_goni.h |3 +++ 2 files changed, 3 insertions(+), 18 deletions(-) delete mode 100644 board/samsung/goni/config.mk diff --git a/board/samsung/goni/config.mk b/board/samsung/goni/config.mk deleted file mode 100644 index e1cadbc..000 --- a/board/samsung/goni/config.mk +++ /dev/null @@ -1,18 +0,0 @@ -# -# Copyright (C) 2010 Samsung Electronics -# Kyungmin Park kyungmin.p...@samsung.com -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# On S5PC100 we use the 128 MiB OneDRAM bank at -# -# 0x3000 to 0x3500 (80MiB) -# 0x3800 to 0x4000 (128MiB) -# -# On S5PC110 we use the 128 MiB OneDRAM bank at -# -# 0x3000 to 0x3500 (80MiB) -# 0x4000 to 0x5000 (256MiB) -# -CONFIG_SYS_TEXT_BASE = 0x3480 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d0fafd7..c303244 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -29,6 +29,9 @@ /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x3000 +/* Text Base */ +#define CONFIG_SYS_TEXT_BASE 0x3480 + #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/4] ARM: OMAP4460: sdp: Limit TPS mux config to 4460
TPS mux config is 4460 specific, so it should be limited to 4460 only. Signed-off-by: Taras Kondratiuk ta...@ti.com --- board/ti/sdp4430/sdp.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c index 25daaa9..0479a56 100644 --- a/board/ti/sdp4430/sdp.c +++ b/board/ti/sdp4430/sdp.c @@ -66,7 +66,8 @@ void set_muxconf_regs_essential(void) sizeof(wkup_padconf_array_essential) / sizeof(struct pad_conf_entry)); - if (omap_revision() = OMAP4460_ES1_0) + if ((omap_revision() = OMAP4460_ES1_0) + (omap_revision() OMAP4470_ES1_0)) do_set_mux((*ctrl)-control_padconf_wkup_base, wkup_padconf_array_essential_4460, sizeof(wkup_padconf_array_essential_4460) / -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] ARM: OMAP4470: Add OMAP4470 identification
Signed-off-by: Taras Kondratiuk ta...@ti.com
---
arch/arm/cpu/armv7/omap4/hwinit.c |3 +++
arch/arm/include/asm/arch-omap4/omap.h |1 +
arch/arm/include/asm/omap_common.h |1 +
3 files changed, 5 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c
b/arch/arm/cpu/armv7/omap4/hwinit.c
index 4da0fc0..b0598a0 100644
--- a/arch/arm/cpu/armv7/omap4/hwinit.c
+++ b/arch/arm/cpu/armv7/omap4/hwinit.c
@@ -138,6 +138,9 @@ void init_omap_revision(void)
break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
+ case OMAP4470_CONTROL_ID_CODE_ES1_0:
+ *omap_si_rev = OMAP4470_ES1_0;
+ break;
case OMAP4460_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = OMAP4460_ES1_1;
break;
diff --git a/arch/arm/include/asm/arch-omap4/omap.h
b/arch/arm/include/asm/arch-omap4/omap.h
index 3823a37..9129c0d 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -41,6 +41,7 @@
#define OMAP4_CONTROL_ID_CODE_ES2_30x6B95C02F
#define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F
#define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F
+#define OMAP4470_CONTROL_ID_CODE_ES1_0 0x0B97502F
/* UART */
#define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000)
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include/asm/omap_common.h
index b56e949..d6ff030 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -612,6 +612,7 @@ static inline u8 is_omap54xx(void)
#define OMAP4430_ES2_3 0x44300230
#define OMAP4460_ES1_0 0x44600100
#define OMAP4460_ES1_1 0x44600110
+#define OMAP4470_ES1_0 0x44700100
/* omap5 */
#define OMAP5430_SILICON_ID_INVALID0
--
1.7.9.5
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[U-Boot] [PATCH 2/4] ARM: OMAP4470: Add voltage and dpll data
OMAP4470 reference design uses TWL6032 PMIC
with a following connection scheme:
VDD_CORE = TWL6032 SMPS2
VDD_MPU = TWL6032 SMPS1
VDD_IVA = TWL6032 SMPS5
Set voltage and frequency values according to
OMAP4470 Data Manual Operating Condition Addendum v0.7
Signed-off-by: Taras Kondratiuk ta...@ti.com
---
arch/arm/cpu/armv7/omap4/hw_data.c | 36 +++
arch/arm/include/asm/arch-omap4/clock.h |7 +-
2 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap4/hw_data.c
b/arch/arm/cpu/armv7/omap4/hw_data.c
index 310df5a..6a225c8 100644
--- a/arch/arm/cpu/armv7/omap4/hw_data.c
+++ b/arch/arm/cpu/armv7/omap4/hw_data.c
@@ -50,6 +50,7 @@ static const struct dpll_params
mpu_dpll_params_1400mhz[NUM_SYS_CLKS] = {
/*
* dpll locked at 1600 MHz - MPU clk at 800 MHz(OPP Turbo 4430)
* OMAP4430 OPP_TURBO frequency
+ * OMAP4470 OPP_NOM frequency
*/
static const struct dpll_params mpu_dpll_params_1600mhz[NUM_SYS_CLKS] = {
{200, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1},/* 12 MHz */
@@ -76,6 +77,7 @@ static const struct dpll_params
mpu_dpll_params_1200mhz[NUM_SYS_CLKS] = {
};
/* OMAP4460 OPP_NOM frequency */
+/* OMAP4470 OPP_NOM (Low Power) frequency */
static const struct dpll_params core_dpll_params_1600mhz[NUM_SYS_CLKS] = {
{200, 2, 1, 5, 8, 4, 6, 5, -1, -1, -1, -1}, /* 12 MHz */
{800, 12, 1, 5, 8, 4, 6, 5, -1, -1, -1, -1},/* 13 MHz */
@@ -198,6 +200,20 @@ struct dplls omap4460_dplls = {
.ddr = NULL
};
+struct dplls omap4470_dplls = {
+ .mpu = mpu_dpll_params_1600mhz,
+ .core = core_dpll_params_1600mhz,
+ .per = per_dpll_params_1536mhz,
+ .iva = iva_dpll_params_1862mhz,
+#ifdef CONFIG_SYS_OMAP_ABE_SYSCK
+ .abe = abe_dpll_params_sysclk_196608khz,
+#else
+ .abe = abe_dpll_params_32k_196608khz,
+#endif
+ .usb = usb_dpll_params_1920mhz,
+ .ddr = NULL
+};
+
struct pmic_data twl6030_4430es1 = {
.base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV,
.step = 12660, /* 12.66 mV represented in uV */
@@ -208,6 +224,7 @@ struct pmic_data twl6030_4430es1 = {
.pmic_write = omap_vc_bypass_send_value,
};
+/* twl6030 struct is used for TWL6030 and TWL6032 PMIC */
struct pmic_data twl6030 = {
.base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV,
.step = 12660, /* 12.66 mV represented in uV */
@@ -271,6 +288,20 @@ struct vcores_data omap4460_volts = {
.mm.pmic = twl6030,
};
+struct vcores_data omap4470_volts = {
+ .mpu.value = 1200,
+ .mpu.addr = SMPS_REG_ADDR_SMPS1,
+ .mpu.pmic = twl6030,
+
+ .core.value = 1126,
+ .core.addr = SMPS_REG_ADDR_SMPS1,
+ .core.pmic = twl6030,
+
+ .mm.value = 1137,
+ .mm.addr = SMPS_REG_ADDR_SMPS1,
+ .mm.pmic = twl6030,
+};
+
/*
* Enable essential clock domains, modules and
* do some additional special settings needed
@@ -476,6 +507,11 @@ void hw_data_init(void)
*omap_vcores = omap4460_volts;
break;
+ case OMAP4470_ES1_0:
+ *dplls_data = omap4470_dplls;
+ *omap_vcores = omap4470_volts;
+ break;
+
default:
printf(\n INVALID OMAP REVISION );
}
diff --git a/arch/arm/include/asm/arch-omap4/clock.h
b/arch/arm/include/asm/arch-omap4/clock.h
index b2e03d6..f3a682a 100644
--- a/arch/arm/include/asm/arch-omap4/clock.h
+++ b/arch/arm/include/asm/arch-omap4/clock.h
@@ -149,11 +149,16 @@
/* PRM_VC_VAL_BYPASS */
#define PRM_VC_I2C_CHANNEL_FREQ_KHZ400
-/* SMPS */
+/* PMIC */
#define SMPS_I2C_SLAVE_ADDR0x12
+/* TWL6030 SMPS */
#define SMPS_REG_ADDR_VCORE1 0x55
#define SMPS_REG_ADDR_VCORE2 0x5B
#define SMPS_REG_ADDR_VCORE3 0x61
+/* TWL6032 SMPS */
+#define SMPS_REG_ADDR_SMPS10x55
+#define SMPS_REG_ADDR_SMPS20x5B
+#define SMPS_REG_ADDR_SMPS50x49
#define PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV 607700
#define PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV 709000
--
1.7.9.5
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[U-Boot] [PATCH 0/4] ARM: OMAP4: Add OMAP4470 support
This series adds OMAP4470 support. It initializes clocks, voltages and EMIF. This is enough to boot SLP, but U-Boot will try to start battery charging on TWL6032 and will crash, because registers GPADC registers are different. To get fully functional system Oleg's TWL6032 series [1] is needed on top of this one. Tested on TI Blaze Tablet2 board. Based on v2013.07+ commit f53932a dts/Makefile: pass -undef -D__DTS__ to cpp [1] http://www.mail-archive.com/u-boot@lists.denx.de/msg118364.html Lubomir Popov (1): ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration Taras Kondratiuk (3): ARM: OMAP4470: Add OMAP4470 identification ARM: OMAP4470: Add voltage and dpll data ARM: OMAP4460: sdp: Limit TPS mux config to 4460 arch/arm/cpu/armv7/omap4/hw_data.c | 36 +++ arch/arm/cpu/armv7/omap4/hwinit.c |3 +++ arch/arm/cpu/armv7/omap4/sdram_elpida.c | 41 +-- arch/arm/include/asm/arch-omap4/clock.h |7 +- arch/arm/include/asm/arch-omap4/omap.h |1 + arch/arm/include/asm/omap_common.h |1 + board/ti/sdp4430/sdp.c |3 ++- 7 files changed, 83 insertions(+), 9 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4] ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration
From: Lubomir Popov lpo...@mm-sol.com
OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
This memory has 4Gb x 2CS = 8Gb configuration.
Add configuration for runtime calculation and precalculated cases.
Patch is based on a draft Lubomir's patch [1].
[1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html
Signed-off-by: Lubomir Popov lpo...@mm-sol.com
[ta...@ti.com: cleaned up patch and fixed precalculated values]
Signed-off-by: Taras Kondratiuk ta...@ti.com
---
arch/arm/cpu/armv7/omap4/sdram_elpida.c | 41 +--
1 file changed, 34 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
index d76dde7..67a7926 100644
--- a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
+++ b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
@@ -60,6 +60,20 @@ static const struct emif_regs emif_regs_elpida_380_mhz_1cs =
{
.emif_ddr_phy_ctlr_1= 0x049ff418
};
+const struct emif_regs emif_regs_elpida_400_mhz_1cs = {
+ .sdram_config_init = 0x80800eb2,
+ .sdram_config = 0x80801ab2,
+ .ref_ctrl = 0x0618,
+ .sdram_tim1 = 0x10eb0662,
+ .sdram_tim2 = 0x20370dd2,
+ .sdram_tim3 = 0x00b1c33f,
+ .read_idle_ctrl = 0x000501ff,
+ .zq_config = 0x500b3215,
+ .temp_alert_config = 0x58016893,
+ .emif_ddr_phy_ctlr_1_init = 0x0495,
+ .emif_ddr_phy_ctlr_1= 0x049ff418
+};
+
const struct emif_regs emif_regs_elpida_400_mhz_2cs = {
.sdram_config_init = 0x8eb9,
.sdram_config = 0x80001ab9,
@@ -107,8 +121,10 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const
struct emif_regs **regs)
*regs = emif_regs_elpida_380_mhz_1cs;
else if (omap4_rev == OMAP4430_ES2_0)
*regs = emif_regs_elpida_200_mhz_2cs;
- else
+ else if (omap4_rev OMAP4470_ES1_0)
*regs = emif_regs_elpida_400_mhz_2cs;
+ else
+ *regs = emif_regs_elpida_400_mhz_1cs;
}
void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
__attribute__((weak, alias(emif_get_reg_dump_sdp)));
@@ -138,20 +154,31 @@ static const struct lpddr2_device_details
elpida_2G_S4_details = {
.manufacturer = LPDDR2_MANUFACTURER_ELPIDA
};
+static const struct lpddr2_device_details elpida_4G_S4_details = {
+ .type = LPDDR2_TYPE_S4,
+ .density= LPDDR2_DENSITY_4Gb,
+ .io_width = LPDDR2_IO_WIDTH_32,
+ .manufacturer = LPDDR2_MANUFACTURER_ELPIDA
+};
+
struct lpddr2_device_details *emif_get_device_details_sdp(u32 emif_nr, u8 cs,
struct lpddr2_device_details *lpddr2_dev_details)
{
u32 omap_rev = omap_revision();
/* EMIF1 EMIF2 have identical configuration */
- if ((omap_rev == OMAP4430_ES1_0) (cs == CS1)) {
- /* Nothing connected on CS1 for ES1.0 */
+ if (((omap_rev == OMAP4430_ES1_0) || (omap_rev == OMAP4470_ES1_0))
+(cs == CS1)) {
+ /* Nothing connected on CS1 for 4430/4470 ES1.0 */
return NULL;
- } else {
- /* In all other cases Elpida 2G device */
+ } else if (omap_rev OMAP4470_ES1_0) {
+ /* In all other 4430/4460 cases Elpida 2G device */
*lpddr2_dev_details = elpida_2G_S4_details;
- return lpddr2_dev_details;
+ } else {
+ /* 4470: 4G device */
+ *lpddr2_dev_details = elpida_4G_S4_details;
}
+ return lpddr2_dev_details;
}
struct lpddr2_device_details *emif_get_device_details(u32 emif_nr, u8 cs,
@@ -265,7 +292,7 @@ void emif_get_device_timings_sdp(u32 emif_nr,
/* Identical devices on EMIF1 EMIF2 */
*cs0_device_timings = elpida_2G_S4_timings;
- if (omap_rev == OMAP4430_ES1_0)
+ if ((omap_rev == OMAP4430_ES1_0) || (omap_rev == OMAP4470_ES1_0))
*cs1_device_timings = NULL;
else
*cs1_device_timings = elpida_2G_S4_timings;
--
1.7.9.5
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[U-Boot] [RFC PATCH 0/2] Moving ARM DCC from stdio to serial
Hi, I am not sure about this change but it seems to me there shouldn't be any problem to remove stdio support because it can be simple another serial driver which can use serial multi interface. Also it is in serial folder. What was the reason to use it as stdio device? Or is there still a reason to use it as stdio device? Thanks for your comments, Michal Jagannadha Sutradharudu Teki (2): serial: arm_dcc: Remove stdio structure support serial: arm_dcc: Register with serial core common/stdio.c | 3 --- drivers/serial/arm_dcc.c | 41 +++-- drivers/serial/serial.c | 2 ++ include/stdio_dev.h | 3 --- 4 files changed, 25 insertions(+), 24 deletions(-) -- 1.8.2.3 pgpAVJUek0ccX.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] omap: emif: Set initial DDR PHY config first
Commit OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon (f40107345cbcd6e0d1747eda45e76c4e2a6df0db) changed sequence to set final DDR PHY config register value at the beginning. Looks like it was made by mistake and should be reverted. Signed-off-by: Taras Kondratiuk ta...@ti.com --- Based on v2013.07+ commit f53932a dts/Makefile: pass -undef -D__DTS__ to cpp arch/arm/cpu/armv7/omap-common/emif-common.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index ece3655..b0e1caa 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -153,7 +153,7 @@ static void lpddr2_init(u32 base, const struct emif_regs *regs) * un-locked frequency default RL */ writel(regs-sdram_config_init, emif-emif_sdram_config); - writel(regs-emif_ddr_phy_ctlr_1, emif-emif_ddr_phy_ctrl_1); + writel(regs-emif_ddr_phy_ctlr_1_init, emif-emif_ddr_phy_ctrl_1); do_ext_phy_settings(base, regs); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH 2/2] serial: arm_dcc: Register with serial core
From: Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com
Register arm_dcc with drivers/serial/serial.c
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
drivers/serial/arm_dcc.c | 33 +++--
drivers/serial/serial.c | 2 ++
2 files changed, 29 insertions(+), 6 deletions(-)
diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index e76c038..29d9295 100644
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -27,6 +27,7 @@
*/
#include common.h
+#include serial.h
#if defined(CONFIG_CPU_V6)
/*
@@ -88,12 +89,12 @@
#define TIMEOUT_COUNT 0x400
-int arm_dcc_init(void)
+static int arm_dcc_init(void)
{
return 0;
}
-int arm_dcc_getc(void)
+static int arm_dcc_getc(void)
{
int ch;
register unsigned int reg;
@@ -106,7 +107,7 @@ int arm_dcc_getc(void)
return ch;
}
-void arm_dcc_putc(char ch)
+static void arm_dcc_putc(char ch)
{
register unsigned int reg;
unsigned int timeout_count = TIMEOUT_COUNT;
@@ -122,13 +123,13 @@ void arm_dcc_putc(char ch)
write_dcc(ch);
}
-void arm_dcc_puts(const char *s)
+static void arm_dcc_puts(const char *s)
{
while (*s)
arm_dcc_putc(*s++);
}
-int arm_dcc_tstc(void)
+static int arm_dcc_tstc(void)
{
register unsigned int reg;
@@ -137,7 +138,27 @@ int arm_dcc_tstc(void)
return reg;
}
+static void arm_dcc_setbrg(void)
+{
+}
+
+static struct serial_device arm_dcc_drv = {
+ .name = arm_dcc,
+ .start = arm_dcc_init,
+ .stop = NULL,
+ .setbrg = arm_dcc_setbrg,
+ .putc = arm_dcc_putc,
+ .puts = arm_dcc_puts,
+ .getc = arm_dcc_getc,
+ .tstc = arm_dcc_tstc,
+};
+
+void arm_dcc_initialize(void)
+{
+ serial_register(arm_dcc_drv);
+}
+
__weak struct serial_device *default_serial_console(void)
{
- return NULL;
+ return arm_dcc_drv;
}
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 6730135..118fbc3 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -159,6 +159,7 @@ serial_initfunc(pl01x_serial_initialize);
serial_initfunc(s3c44b0_serial_initialize);
serial_initfunc(sa1100_serial_initialize);
serial_initfunc(sh_serial_initialize);
+serial_initfunc(arm_dcc_initialize);
/**
* serial_register() - Register serial driver with serial driver core
@@ -251,6 +252,7 @@ void serial_initialize(void)
s3c44b0_serial_initialize();
sa1100_serial_initialize();
sh_serial_initialize();
+ arm_dcc_initialize();
serial_assign(default_serial_console()-name);
}
--
1.8.2.3
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[U-Boot] [RFC PATCH 1/2] serial: arm_dcc: Remove stdio structure support
From: Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com
Removed stdio structure ops support on arm_dcc
driver, and need to register with serial core
so-that it can access like remianing serial drivers.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
common/stdio.c | 3 ---
drivers/serial/arm_dcc.c | 16
include/stdio_dev.h | 3 ---
3 files changed, 22 deletions(-)
diff --git a/common/stdio.c b/common/stdio.c
index 721e9a1..844f98c 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -196,9 +196,6 @@ int stdio_init (void)
/* Initialize the list */
INIT_LIST_HEAD((devs.list));
-#ifdef CONFIG_ARM_DCC
- drv_arm_dcc_init ();
-#endif
#ifdef CONFIG_SYS_I2C
i2c_init_all();
#else
diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index c217c88..e76c038 100644
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -27,7 +27,6 @@
*/
#include common.h
-#include stdio_dev.h
#if defined(CONFIG_CPU_V6)
/*
@@ -138,21 +137,6 @@ int arm_dcc_tstc(void)
return reg;
}
-static struct stdio_dev arm_dcc_dev;
-
-int drv_arm_dcc_init(void)
-{
- strcpy(arm_dcc_dev.name, dcc);
- arm_dcc_dev.ext = 0;/* No extensions */
- arm_dcc_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_OUTPUT;
- arm_dcc_dev.tstc = arm_dcc_tstc;/* 'tstc' function */
- arm_dcc_dev.getc = arm_dcc_getc;/* 'getc' function */
- arm_dcc_dev.putc = arm_dcc_putc;/* 'putc' function */
- arm_dcc_dev.puts = arm_dcc_puts;/* 'puts' function */
-
- return stdio_register(arm_dcc_dev);
-}
-
__weak struct serial_device *default_serial_console(void)
{
return NULL;
diff --git a/include/stdio_dev.h b/include/stdio_dev.h
index d0b5593..e6dc12a 100644
--- a/include/stdio_dev.h
+++ b/include/stdio_dev.h
@@ -83,9 +83,6 @@ struct list_head* stdio_get_list(void);
struct stdio_dev* stdio_get_by_name(const char* name);
struct stdio_dev* stdio_clone(struct stdio_dev *dev);
-#ifdef CONFIG_ARM_DCC
-int drv_arm_dcc_init(void);
-#endif
#ifdef CONFIG_LCD
intdrv_lcd_init (void);
#endif
--
1.8.2.3
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Re: [U-Boot] [PATCH] ARM: mxs: tools: Add mkimage support for MXS bootstream
On Wed, Jul 31, 2013 at 03:50:55PM +0200, Marek Vasut wrote:
Add mkimage support for generating and verifying MXS bootstream.
The implementation here is mostly a glue code between MXSSB v0.4
and mkimage, but the long-term goal is to rectify this and merge
MXSSB with mkimage more tightly. Once this code is properly in
U-Boot, MXSSB shall be deprecated in favor of mkimage-mxsimage
support.
Note that the mxsimage generator needs libcrypto from OpenSSL, I
therefore enabled the libcrypto/libssl unconditionally.
OK, we need to figure out something here. Can we start by just enabling
this for MX platforms and see what the fallout is? And like the FIT
code, have a not supported print happen when it's not enabled.
[snip]
--- a/tools/mkimage.h
+++ b/tools/mkimage.h
@@ -112,6 +112,7 @@ struct image_type_params {
int (*verify_header) (unsigned char *, int, struct mkimage_params *);
/* Prints image information abstracting from image header */
void (*print_header) (const void *);
+
/*
* The header or image contents need to be set as per image type to
* be generated using this callback function.
Extra space change.
[snip]
+/*
+ * CRC32
+ */
+static uint32_t crc32(uint8_t *data, uint32_t len)
+{
+ const uint32_t poly = 0x04c11db7;
Please comment a bit more about how we need to use the following
polynomial as documented by Freescale ... somewhere ...
+/*
+ * Code
+ */
+static time_t sb_get_timestamp(void)
+{
+#if 0
+ struct tm time_2000 = {
+ .tm_yday= 1,/* Jan. 1st */
+ .tm_year= 100, /* 2000 */
+ };
+ time_t seconds_to_2000 = mktime(time_2000);
+ time_t seconds_to_now = time(NULL);
+
+ return seconds_to_now - seconds_to_2000;
+#endif
+ return 427398871;
+}
What? If we need to use a magic timestamp, please say why. And in
general, the file could use some further commenting on what/why.
--
Tom
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[U-Boot] [RESEND PATCH v5 1/1] socfpga: Creating driver for Reset Manager
Consolidating reset code into reset_manager.c.
Also separating reset configuration for virtual target
and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
- Fixed the long subject of the patch
- Consolidated the reset_manager structure between virtual target and dev kit
Changes for v3:
- Added change log for each revision change
- Removed the between the date of copyright header
Changes for v4:
- Updated the license header for reset_manager.c
Changes for v5:
- Updated the license header for reset_manager.c to SPDX
---
arch/arm/cpu/armv7/socfpga/Makefile |2 +-
arch/arm/cpu/armv7/socfpga/misc.c | 27 --
arch/arm/cpu/armv7/socfpga/reset_manager.c| 40 +
arch/arm/include/asm/arch-socfpga/reset_manager.h | 10 --
4 files changed, 48 insertions(+), 31 deletions(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/reset_manager.c
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index 3b48ac9..5024fc5 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
SOBJS := lowlevel_init.o
-COBJS-y:= misc.o timer.o
+COBJS-y:= misc.o timer.o reset_manager.o
COBJS-$(CONFIG_SPL_BUILD) += spl.o
COBJS := $(COBJS-y)
diff --git a/arch/arm/cpu/armv7/socfpga/misc.c
b/arch/arm/cpu/armv7/socfpga/misc.c
index 66edb3c..2f1c716 100644
--- a/arch/arm/cpu/armv7/socfpga/misc.c
+++ b/arch/arm/cpu/armv7/socfpga/misc.c
@@ -6,36 +6,9 @@
#include common.h
#include asm/io.h
-#include asm/arch/reset_manager.h
DECLARE_GLOBAL_DATA_PTR;
-static const struct socfpga_reset_manager *reset_manager_base =
- (void *)SOCFPGA_RSTMGR_ADDRESS;
-
-/*
- * Write the reset manager register to cause reset
- */
-void reset_cpu(ulong addr)
-{
- /* request a warm reset */
- writel(RSTMGR_CTRL_SWWARMRSTREQ_LSB, reset_manager_base-ctrl);
- /*
-* infinite loop here as watchdog will trigger and reset
-* the processor
-*/
- while (1)
- ;
-}
-
-/*
- * Release peripherals from reset based on handoff
- */
-void reset_deassert_peripherals_handoff(void)
-{
- writel(0, reset_manager_base-per_mod_reset);
-}
-
int dram_init(void)
{
gd-ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c
b/arch/arm/cpu/armv7/socfpga/reset_manager.c
new file mode 100644
index 000..2281743
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/reset_manager.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct socfpga_reset_manager *reset_manager_base =
+ (void *)SOCFPGA_RSTMGR_ADDRESS;
+
+/*
+ * Write the reset manager register to cause reset
+ */
+void reset_cpu(ulong addr)
+{
+ /* request a warm reset */
+ writel((1 RSTMGR_CTRL_SWWARMRSTREQ_LSB),
+ reset_manager_base-ctrl);
+ /*
+* infinite loop here as watchdog will trigger and reset
+* the processor
+*/
+ while (1)
+ ;
+}
+
+/*
+ * Release peripherals from reset based on handoff
+ */
+void reset_deassert_peripherals_handoff(void)
+{
+ writel(0, reset_manager_base-per_mod_reset);
+}
+
+
diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h
b/arch/arm/include/asm/arch-socfpga/reset_manager.h
index 13d7357..3e95476 100644
--- a/arch/arm/include/asm/arch-socfpga/reset_manager.h
+++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h
@@ -11,16 +11,20 @@ void reset_cpu(ulong addr);
void reset_deassert_peripherals_handoff(void);
struct socfpga_reset_manager {
- u32 padding1;
+ u32 status;
u32 ctrl;
- u32 padding2;
- u32 padding3;
+ u32 counts;
+ u32 padding1;
u32 mpu_mod_reset;
u32 per_mod_reset;
u32 per2_mod_reset;
u32 brg_mod_reset;
};
+#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
+#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
+#else
#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
+#endif
#endif /* _RESET_MANAGER_H_ */
--
1.7.9.5
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Re: [U-Boot] [PATCH 3/4] ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration
Hi Taras,
On Tuesday 06 August 2013 05:48 PM, Taras Kondratiuk wrote:
From: Lubomir Popov lpo...@mm-sol.com
OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
This memory has 4Gb x 2CS = 8Gb configuration.
Add configuration for runtime calculation and precalculated cases.
Patch is based on a draft Lubomir's patch [1].
[1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html
Just curious to know, Have you tried SDRAM_AUTO_DETECTION ?
Rest looks fine to me.
Thanks and regards,
Lokesh
Signed-off-by: Lubomir Popov lpo...@mm-sol.com
[ta...@ti.com: cleaned up patch and fixed precalculated values]
Signed-off-by: Taras Kondratiuk ta...@ti.com
@@ -138,6 +138,9 @@ void init_omap_revision(void)
break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
+ case OMAP4470_CONTROL_ID_CODE_ES1_0:
+ *omap_si_rev = OMAP4470_ES1_0;
+ break;
case OMAP4460_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = OMAP4460_ES1_1;
break;
@@ -138,6 +138,9 @@ void init_omap_revision(void)
break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
+ case OMAP4470_CONTROL_ID_CODE_ES1_0:
+ *omap_si_rev = OMAP4470_ES1_0;
+ break;
case OMAP4460_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = OMAP4460_ES1_1;
break;
---
arch/arm/cpu/armv7/omap4/sdram_elpida.c | 41
+--
1 file changed, 34 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
index d76dde7..67a7926 100644
--- a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
+++ b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
@@ -60,6 +60,20 @@ static const struct emif_regs emif_regs_elpida_380_mhz_1cs
= {
.emif_ddr_phy_ctlr_1= 0x049ff418
};
+const struct emif_regs emif_regs_elpida_400_mhz_1cs = {
+ .sdram_config_init = 0x80800eb2,
+ .sdram_config = 0x80801ab2,
+ .ref_ctrl = 0x0618,
+ .sdram_tim1 = 0x10eb0662,
+ .sdram_tim2 = 0x20370dd2,
+ .sdram_tim3 = 0x00b1c33f,
+ .read_idle_ctrl = 0x000501ff,
+ .zq_config = 0x500b3215,
+ .temp_alert_config = 0x58016893,
+ .emif_ddr_phy_ctlr_1_init = 0x0495,
+ .emif_ddr_phy_ctlr_1= 0x049ff418
+};
+
const struct emif_regs emif_regs_elpida_400_mhz_2cs = {
.sdram_config_init = 0x8eb9,
.sdram_config = 0x80001ab9,
@@ -107,8 +121,10 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const
struct emif_regs **regs)
*regs = emif_regs_elpida_380_mhz_1cs;
else if (omap4_rev == OMAP4430_ES2_0)
*regs = emif_regs_elpida_200_mhz_2cs;
- else
+ else if (omap4_rev OMAP4470_ES1_0)
*regs = emif_regs_elpida_400_mhz_2cs;
+ else
+ *regs = emif_regs_elpida_400_mhz_1cs;
}
void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
__attribute__((weak, alias(emif_get_reg_dump_sdp)));
@@ -138,20 +154,31 @@ static const struct lpddr2_device_details
elpida_2G_S4_details = {
.manufacturer = LPDDR2_MANUFACTURER_ELPIDA
};
+static const struct lpddr2_device_details elpida_4G_S4_details = {
+ .type = LPDDR2_TYPE_S4,
+ .density= LPDDR2_DENSITY_4Gb,
@@ -138,6 +138,9 @@ void init_omap_revision(void)
break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
+ case OMAP4470_CONTROL_ID_CODE_ES1_0:
+ *omap_si_rev = OMAP4470_ES1_0;
+ break;
case OMAP4460_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = OMAP4460_ES1_1;
break;
+ .io_width = LPDDR2_IO_WIDTH_32,
+ .manufacturer = LPDDR2_MANUFACTURER_ELPIDA
+};
+
struct lpddr2_device_details *emif_get_device_details_sdp(u32 emif_nr, u8 cs,
struct lpddr2_device_details *lpddr2_dev_details)
{
u32 omap_rev = omap_revision();
/* EMIF1 EMIF2 have identical configuration */
- if ((omap_rev == OMAP4430_ES1_0) (cs == CS1)) {
- /* Nothing connected on CS1 for ES1.0 */
+ if (((omap_rev == OMAP4430_ES1_0) || (omap_rev == OMAP4470_ES1_0))
+ (cs == CS1)) {
+ /* Nothing connected on CS1 for 4430/4470 ES1.0 */
return NULL;
- } else {
- /* In all other cases Elpida 2G device */
+ } else if (omap_rev OMAP4470_ES1_0) {
+ /* In all other 4430/4460
Re: [U-Boot] [PATCH] ARM: mxs: tools: Add mkimage support for MXS bootstream
Dear Tom Rini,
On Wed, Jul 31, 2013 at 03:50:55PM +0200, Marek Vasut wrote:
Add mkimage support for generating and verifying MXS bootstream.
The implementation here is mostly a glue code between MXSSB v0.4
and mkimage, but the long-term goal is to rectify this and merge
MXSSB with mkimage more tightly. Once this code is properly in
U-Boot, MXSSB shall be deprecated in favor of mkimage-mxsimage
support.
Note that the mxsimage generator needs libcrypto from OpenSSL, I
therefore enabled the libcrypto/libssl unconditionally.
OK, we need to figure out something here. Can we start by just enabling
this for MX platforms and see what the fallout is? And like the FIT
code, have a not supported print happen when it's not enabled.
[snip]
--- a/tools/mkimage.h
+++ b/tools/mkimage.h
@@ -112,6 +112,7 @@ struct image_type_params {
int (*verify_header) (unsigned char *, int, struct mkimage_params *);
/* Prints image information abstracting from image header */
void (*print_header) (const void *);
+
/*
* The header or image contents need to be set as per image type to
* be generated using this callback function.
Extra space change.
[snip]
+/*
+ * CRC32
+ */
+static uint32_t crc32(uint8_t *data, uint32_t len)
+{
+ const uint32_t poly = 0x04c11db7;
Please comment a bit more about how we need to use the following
polynomial as documented by Freescale ... somewhere ...
It's a regular CRC32 CCITT .
+/*
+ * Code
+ */
+static time_t sb_get_timestamp(void)
+{
+#if 0
+ struct tm time_2000 = {
+ .tm_yday= 1,/* Jan. 1st */
+ .tm_year= 100, /* 2000 */
+ };
+ time_t seconds_to_2000 = mktime(time_2000);
+ time_t seconds_to_now = time(NULL);
+
+ return seconds_to_now - seconds_to_2000;
+#endif
+ return 427398871;
+}
What? If we need to use a magic timestamp, please say why.
F* ... this part shouldn't be there of course. The code in #if 0 should be
enabled.
And in
general, the file could use some further commenting on what/why.
What do you mean?
Best regards,
Marek Vasut
___
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[U-Boot] [RESEND PATCH v5 1/1] socfpga: Adding configuration for development kit
Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
- Fixed the word wrap issue within patch
Changes for v3:
- Fixed the long subject of the patch
Changes for v4:
- Added change log for each revision change
Changes for v5:
- Added Reviewed-by: Pavel Machek
- Cc: Tom Rini
---
include/configs/socfpga_cyclone5.h | 28 +---
1 file changed, 21 insertions(+), 7 deletions(-)
diff --git a/include/configs/socfpga_cyclone5.h
b/include/configs/socfpga_cyclone5.h
index b5a7a9a..06aeba6 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -11,6 +11,8 @@
/*
* High level configuration
*/
+/* Virtual target or real hardware */
+#define CONFIG_SOCFPGA_VIRTUAL_TARGET
#define CONFIG_ARMV7
#define CONFIG_L2_OFF
@@ -21,11 +23,12 @@
#define CONFIG_SINGLE_BOOTLOADER
#define CONFIG_SOCFPGA
+/* base address for .text section */
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
#define CONFIG_SYS_TEXT_BASE 0x0840
-#define V_NS16550_CLK 100
-#define CONFIG_BAUDRATE57600
-#define CONFIG_SYS_HZ 1000
-#define CONFIG_TIMER_CLOCK_KHZ 2400
+#else
+#define CONFIG_SYS_TEXT_BASE 0x0140
+#endif
#define CONFIG_SYS_LOAD_ADDR 0x7fc0
/* Console I/O Buffer Size */
@@ -154,7 +157,7 @@
/* SDRAM Bank #1 */
#define CONFIG_SYS_SDRAM_BASE 0x
/* SDRAM memory size */
-#define PHYS_SDRAM_1_SIZE 0x8000
+#define PHYS_SDRAM_1_SIZE 0x4000
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_START 0x
@@ -170,8 +173,13 @@
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1UART0_BASE
-
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define V_NS16550_CLK 100
+#else
+#define V_NS16550_CLK 1
+#endif
+#define CONFIG_BAUDRATE115200
/*
* FLASH
@@ -184,9 +192,15 @@
/* This timer use eosc1 where the clock frequency is fixed
* throughout any condition */
#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
-
/* reload value when timer count to zero */
#define TIMER_LOAD_VAL 0x
+/* Timer info */
+#define CONFIG_SYS_HZ 1000
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_TIMER_CLOCK_KHZ 2400
+#else
+#define CONFIG_TIMER_CLOCK_KHZ 25000
+#endif
#define CONFIG_ENV_IS_NOWHERE
--
1.7.9.5
___
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[U-Boot] [RESEND PATCH v6 1/2] socfpga: Adding System Manager driver
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
- Fixed the word wrap issue within patch
Changes for v3:
- Fixed the long subject of the patch
- Fixed the comment within the code
Changes for v4:
- Added change log for each revision change
Changes for v5:
- Updated the license header for system_manager.c
- Cc: Tom Rini
Changes for v6:
- Updated the license header for system_manager.c and .h to SPDX
---
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
arch/arm/cpu/armv7/socfpga/spl.c |6
arch/arm/cpu/armv7/socfpga/system_manager.c| 29
.../include/asm/arch-socfpga/socfpga_base_addrs.h |1 +
arch/arm/include/asm/arch-socfpga/system_manager.h | 22 +++
board/altera/socfpga/Makefile |4 ++-
include/configs/socfpga_cyclone5.h |1 +
7 files changed, 63 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/system_manager.c
create mode 100644 arch/arm/include/asm/arch-socfpga/system_manager.h
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index 5024fc5..0859e44 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
SOBJS := lowlevel_init.o
-COBJS-y:= misc.o timer.o reset_manager.o
+COBJS-y:= misc.o timer.o reset_manager.o system_manager.o
COBJS-$(CONFIG_SPL_BUILD) += spl.o
COBJS := $(COBJS-y)
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c
index 2b9be28..74bceab 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -12,6 +12,7 @@
#include image.h
#include asm/arch/reset_manager.h
#include spl.h
+#include asm/arch/system_manager.h
DECLARE_GLOBAL_DATA_PTR;
@@ -25,6 +26,11 @@ u32 spl_boot_device(void)
*/
void spl_board_init(void)
{
+#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
+ /* configure the pin muxing through system manager */
+ sysmgr_pinmux_init();
+#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
+
/* de-assert reset for peripherals and bridges based on handoff */
reset_deassert_peripherals_handoff();
diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c
b/arch/arm/cpu/armv7/socfpga/system_manager.c
new file mode 100644
index 000..0b1bb33
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/system_manager.c
@@ -0,0 +1,29 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/system_manager.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Configure all the pin muxes
+ */
+void sysmgr_pinmux_init(void)
+{
+ unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET;
+
+ const unsigned long *pval = sys_mgr_init_table;
+ unsigned long i;
+
+ for (i = 0; i ARRAY_SIZE(sys_mgr_init_table);
+ i++, offset += sizeof(unsigned long)) {
+ writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset));
+ }
+}
+
+
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
index 1182a13..50c4ebd 100644
--- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -12,5 +12,6 @@
#define SOCFPGA_UART1_ADDRESS 0xffc03000
#define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
+#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
#endif /* _SOCFPGA_BASE_ADDRS_H_ */
diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h
b/arch/arm/include/asm/arch-socfpga/system_manager.h
new file mode 100644
index 000..36a83b4
--- /dev/null
+++ b/arch/arm/include/asm/arch-socfpga/system_manager.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef_SYSTEM_MANAGER_H_
+#define_SYSTEM_MANAGER_H_
+
+#ifndef __ASSEMBLY__
+
+void sysmgr_pinmux_init(void);
+
+/* declaration for handoff table type */
+extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
+
+#endif
+
+
+#define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400)
+
+#endif /* _SYSTEM_MANAGER_H_ */
diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile
index 101fc7c..9dc45a9 100644
--- a/board/altera/socfpga/Makefile
+++ b/board/altera/socfpga/Makefile
@@ -10,8 +10,10 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
-COBJS := socfpga_cyclone5.o
+COBJS-y:=
[U-Boot] [RESEND PATCH v5 2/2] socfpga: Adding pin mux handoff files
Adding the generated pin mux
configuration by Preloader Generator tool
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
- Fixed the word wrap issue within patch
Changes for v3:
- Fixed the long subject of the patch
Changes for v4:
- Added change log for each revision change
Changes for v5:
- Updated the license header for reset_manager.c
- Updated the subject
---
board/altera/socfpga/pinmux_config.c | 214 ++
board/altera/socfpga/pinmux_config.h | 54 +
2 files changed, 268 insertions(+)
create mode 100644 board/altera/socfpga/pinmux_config.c
create mode 100644 board/altera/socfpga/pinmux_config.h
diff --git a/board/altera/socfpga/pinmux_config.c
b/board/altera/socfpga/pinmux_config.c
new file mode 100644
index 000..8b09005
--- /dev/null
+++ b/board/altera/socfpga/pinmux_config.c
@@ -0,0 +1,214 @@
+/* This file is generated by Preloader Generator */
+
+#include pinmux_config.h
+
+/* pin mux configuration data */
+unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+ 0, /* EMACIO0 - Unused */
+ 2, /* EMACIO1 - USB */
+ 2, /* EMACIO2 - USB */
+ 2, /* EMACIO3 - USB */
+ 2, /* EMACIO4 - USB */
+ 2, /* EMACIO5 - USB */
+ 2, /* EMACIO6 - USB */
+ 2, /* EMACIO7 - USB */
+ 2, /* EMACIO8 - USB */
+ 0, /* EMACIO9 - Unused */
+ 2, /* EMACIO10 - USB */
+ 2, /* EMACIO11 - USB */
+ 2, /* EMACIO12 - USB */
+ 2, /* EMACIO13 - USB */
+ 0, /* EMACIO14 - N/A */
+ 0, /* EMACIO15 - N/A */
+ 0, /* EMACIO16 - N/A */
+ 0, /* EMACIO17 - N/A */
+ 0, /* EMACIO18 - N/A */
+ 0, /* EMACIO19 - N/A */
+ 3, /* FLASHIO0 - SDMMC */
+ 3, /* FLASHIO1 - SDMMC */
+ 3, /* FLASHIO2 - SDMMC */
+ 3, /* FLASHIO3 - SDMMC */
+ 0, /* FLASHIO4 - SDMMC */
+ 0, /* FLASHIO5 - SDMMC */
+ 0, /* FLASHIO6 - SDMMC */
+ 0, /* FLASHIO7 - SDMMC */
+ 0, /* FLASHIO8 - SDMMC */
+ 3, /* FLASHIO9 - SDMMC */
+ 3, /* FLASHIO10 - SDMMC */
+ 3, /* FLASHIO11 - SDMMC */
+ 3, /* GENERALIO0 - TRACE */
+ 3, /* GENERALIO1 - TRACE */
+ 3, /* GENERALIO2 - TRACE */
+ 3, /* GENERALIO3 - TRACE */
+ 3, /* GENERALIO4 - TRACE */
+ 3, /* GENERALIO5 - TRACE */
+ 3, /* GENERALIO6 - TRACE */
+ 3, /* GENERALIO7 - TRACE */
+ 3, /* GENERALIO8 - TRACE */
+ 3, /* GENERALIO9 - SPIM0 */
+ 3, /* GENERALIO10 - SPIM0 */
+ 3, /* GENERALIO11 - SPIM0 */
+ 3, /* GENERALIO12 - SPIM0 */
+ 2, /* GENERALIO13 - CAN0 */
+ 2, /* GENERALIO14 - CAN0 */
+ 3, /* GENERALIO15 - I2C0 */
+ 3, /* GENERALIO16 - I2C0 */
+ 2, /* GENERALIO17 - UART0 */
+ 2, /* GENERALIO18 - UART0 */
+ 0, /* GENERALIO19 - N/A */
+ 0, /* GENERALIO20 - N/A */
+ 0, /* GENERALIO21 - N/A */
+ 0, /* GENERALIO22 - N/A */
+ 0, /* GENERALIO23 - N/A */
+ 0, /* GENERALIO24 - N/A */
+ 0, /* GENERALIO25 - N/A */
+ 0, /* GENERALIO26 - N/A */
+ 0, /* GENERALIO27 - N/A */
+ 0, /* GENERALIO28 - N/A */
+ 0, /* GENERALIO29 - N/A */
+ 0, /* GENERALIO30 - N/A */
+ 0, /* GENERALIO31 - N/A */
+ 2, /* MIXED1IO0 - EMAC */
+ 2, /* MIXED1IO1 - EMAC */
+ 2, /* MIXED1IO2 - EMAC */
+ 2, /* MIXED1IO3 - EMAC */
+ 2, /* MIXED1IO4 - EMAC */
+ 2, /* MIXED1IO5 - EMAC */
+ 2, /* MIXED1IO6 - EMAC */
+ 2, /* MIXED1IO7 - EMAC */
+ 2, /* MIXED1IO8 - EMAC */
+ 2, /* MIXED1IO9 - EMAC */
+ 2, /* MIXED1IO10 - EMAC */
+ 2, /* MIXED1IO11 - EMAC */
+ 2, /* MIXED1IO12 - EMAC */
+ 2, /* MIXED1IO13 - EMAC */
+ 0, /* MIXED1IO14 - Unused */
+ 3, /* MIXED1IO15 - QSPI */
+ 3, /* MIXED1IO16 - QSPI */
+ 3, /* MIXED1IO17 - QSPI */
+ 3, /* MIXED1IO18 - QSPI */
+ 3, /* MIXED1IO19 - QSPI */
+ 3, /* MIXED1IO20 - QSPI */
+ 0, /* MIXED1IO21 - GPIO */
+ 0, /* MIXED2IO0 - N/A */
+ 0, /* MIXED2IO1 - N/A */
+ 0, /* MIXED2IO2 - N/A */
+ 0, /* MIXED2IO3 - N/A */
+ 0, /* MIXED2IO4 - N/A */
+ 0, /* MIXED2IO5 - N/A */
+ 0, /* MIXED2IO6 - N/A */
+ 0, /* MIXED2IO7 - N/A */
+ 0, /* GPLINMUX48 */
+ 0, /* GPLINMUX49 */
+ 0, /* GPLINMUX50 */
+ 0, /* GPLINMUX51 */
+ 0, /* GPLINMUX52 */
+ 0, /* GPLINMUX53 */
+ 0, /* GPLINMUX54 */
+ 0, /* GPLINMUX55 */
+ 0, /* GPLINMUX56 */
+ 0, /* GPLINMUX57 */
+ 0, /* GPLINMUX58 */
+ 0, /* GPLINMUX59 */
+ 0, /* GPLINMUX60 */
+ 0, /* GPLINMUX61 */
+ 0, /* GPLINMUX62 */
+ 0, /* GPLINMUX63 */
+ 0, /* GPLINMUX64 */
+ 0, /*
[U-Boot] [PATCH v5 0/2] Add Arndale board support
The Arndale board is based on samsung's exynos5250 SOC. For spl generation, it depends on the patch at [5]. First patch provides the basic arndale board support. The second patch adds the MMC support. Changes in v2: - split from earlier patchset at [3] as per Minkyu - Removed checkpatch errors pointed out by Wolfgang - rebased to latest u-boot-samsung master branch - created mmc_boot.c to remove dependency on consolidation patch at [4] - split the mmc support to new patch as it depends on [2] [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272 Changes in v3: - Used dt based serial - rebased to latest u-boot-samsung master branch Changes in v4: - Removed the config depedency on exynos5_dt.h as it contains smdk5250 configurations rather than the common exynos5 generic configurations. - rebased to latest u-boot-samsung master branch Changes in v5: - Fix comments suggested by Minkyu - Added SPDX-License-Identifier to new files [5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles Chander Kashyap (1): exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support MAINTAINERS |4 + board/samsung/arndale/Makefile | 34 board/samsung/arndale/arndale.c | 101 board/samsung/arndale/arndale_spl.c | 50 ++ board/samsung/dts/exynos5250-arndale.dts | 39 + boards.cfg |1 + include/configs/arndale.h| 255 ++ 7 files changed, 484 insertions(+) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 2/2] exynos5250: arndale: Add mmc support
From: Inderpal Singh inderpal.si...@linaro.org
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 5ec56f6..6d81b90 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
#include common.h
#include asm/arch/pinmux.h
+#include asm/arch/dwmmc.h
#include asm/arch/power.h
DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +49,19 @@ void dram_init_banksize(void)
}
}
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+ if (ret)
+ debug(dwmmc init failed\n);
+
+ return ret;
+}
+#endif
+
static int board_uart_init(void)
{
int err = 0, uart_id;
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index d3c0527..c700e45 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -18,4 +18,22 @@
serial0 = /serial@12C2;
console = /serial@12C2;
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 1/2] exynos5250: Add arndale board support
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
board/samsung/arndale/arndale_spl.c | 50 ++
board/samsung/dts/exynos5250-arndale.dts | 21 +++
boards.cfg |1 +
include/configs/arndale.h| 255 ++
7 files changed, 452 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..56d4741 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -209,6 +209,10 @@ Matthias Fuchs matthias.fu...@esd-electronics.com
WUH405 PPC405EP
CMS700 PPC405EP
+Inderpal Singh inderpal.si...@linaro.org
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Siddarth Gore go...@marvell.com
guruplugARM926EJS (Kirkwood SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS += arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..5ec56f6
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ set_ps_hold_ctrl();
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+ gd-bd-bi_dram[i].start = addr;
+ gd-bd-bi_dram[i].size = size;
+ }
+}
+
+static int board_uart_init(void)
+{
+ int err = 0, uart_id;
+
+ for (uart_id = PERIPH_ID_UART0; uart_id = PERIPH_ID_UART3; uart_id++) {
+ err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(UART%d not configured\n,
+ (uart_id - PERIPH_ID_UART0));
+ return ret;
+ }
+ }
+ return ret;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ int err;
+
+ err = board_uart_init();
+ if (err) {
+ debug(UART init failed\n);
+ return err;
+ }
+ return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+ printf(\nBoard: Arndale\n);
+
+ return 0;
+}
+#endif
diff --git a/board/samsung/arndale/arndale_spl.c
b/board/samsung/arndale/arndale_spl.c
new file mode 100644
index 000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/spl.h
+
+#define SIGNATURE 0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+ __attribute__((section(.machine_param))) = {
+ .signature = SIGNATURE,
+ .version= 1,
+ .params = vmubfasirM,
+ .size = sizeof(machine_param),
+
+
Re: [U-Boot] [PATCH v4 1/2] exynos5250: Add arndale board support
On 6 August 2013 17:16, Minkyu Kang mk7.k...@samsung.com wrote:
On 25/07/13 21:46, Chander Kashyap wrote:
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 50 ++
board/samsung/arndale/arndale.c | 102 +++
board/samsung/arndale/arndale_spl.c | 66
board/samsung/dts/exynos5250-arndale.dts | 23 +++
boards.cfg |1 +
include/configs/arndale.h| 271
++
7 files changed, 517 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..bf489d4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -747,6 +747,10 @@ Chander Kashyap k.chan...@samsung.com
SMDKV310ARM ARMV7 (EXYNOS4210 SoC)
SMDK5250ARM ARMV7 (EXYNOS5250 SoC)
+Inderpal Singh inderpal.si...@linaro.org
please sort the list by last name.
Sure i will.
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Lukasz Majewski l.majew...@samsung.com
trats ARM ARMV7 (EXYNOS4210 SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..5786774
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
Please use for new files SPDX-License-Identifier.
please check it globally.
Thanks for pointing out. I will add.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS+= arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS+= arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL := $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB): $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c
b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..47cbac8
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+
[U-Boot] [PATCH v6 1/2] exynos5250: Add arndale board support
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
board/samsung/arndale/arndale_spl.c | 50 ++
board/samsung/dts/exynos5250-arndale.dts | 21 +++
boards.cfg |1 +
include/configs/arndale.h| 255 ++
7 files changed, 452 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..56d4741 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -209,6 +209,10 @@ Matthias Fuchs matthias.fu...@esd-electronics.com
WUH405 PPC405EP
CMS700 PPC405EP
+Inderpal Singh inderpal.si...@linaro.org
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Siddarth Gore go...@marvell.com
guruplugARM926EJS (Kirkwood SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS += arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..5ec56f6
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ set_ps_hold_ctrl();
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+ gd-bd-bi_dram[i].start = addr;
+ gd-bd-bi_dram[i].size = size;
+ }
+}
+
+static int board_uart_init(void)
+{
+ int err = 0, uart_id;
+
+ for (uart_id = PERIPH_ID_UART0; uart_id = PERIPH_ID_UART3; uart_id++) {
+ err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(UART%d not configured\n,
+ (uart_id - PERIPH_ID_UART0));
+ return ret;
+ }
+ }
+ return ret;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ int err;
+
+ err = board_uart_init();
+ if (err) {
+ debug(UART init failed\n);
+ return err;
+ }
+ return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+ printf(\nBoard: Arndale\n);
+
+ return 0;
+}
+#endif
diff --git a/board/samsung/arndale/arndale_spl.c
b/board/samsung/arndale/arndale_spl.c
new file mode 100644
index 000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/spl.h
+
+#define SIGNATURE 0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+ __attribute__((section(.machine_param))) = {
+ .signature = SIGNATURE,
+ .version= 1,
+ .params = vmubfasirM,
+ .size = sizeof(machine_param),
+
+
[U-Boot] [PATCH v6 0/2] Add Arndale board support
The Arndale board is based on samsung's exynos5250 SOC. For spl generation, it depends on the patch at [5]. First patch provides the basic arndale board support. The second patch adds the MMC support. Changes in v2: - split from earlier patchset at [3] as per Minkyu - Removed checkpatch errors pointed out by Wolfgang - rebased to latest u-boot-samsung master branch - created mmc_boot.c to remove dependency on consolidation patch at [4] - split the mmc support to new patch as it depends on [2] [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272 Changes in v3: - Used dt based serial - rebased to latest u-boot-samsung master branch Changes in v4: - Removed the config depedency on exynos5_dt.h as it contains smdk5250 configurations rather than the common exynos5 generic configurations. - rebased to latest u-boot-samsung master branch Changes in v5: - Fix comments suggested by Minkyu - Added SPDX-License-Identifier to new files Changes in v6: - Fixed missed out sorting of Maintainers entry [5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles Chander Kashyap (1): exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support MAINTAINERS |4 + board/samsung/arndale/Makefile | 34 board/samsung/arndale/arndale.c | 101 board/samsung/arndale/arndale_spl.c | 50 ++ board/samsung/dts/exynos5250-arndale.dts | 39 + boards.cfg |1 + include/configs/arndale.h| 255 ++ 7 files changed, 484 insertions(+) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 2/2] exynos5250: arndale: Add mmc support
From: Inderpal Singh inderpal.si...@linaro.org
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 5ec56f6..6d81b90 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
#include common.h
#include asm/arch/pinmux.h
+#include asm/arch/dwmmc.h
#include asm/arch/power.h
DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +49,19 @@ void dram_init_banksize(void)
}
}
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+ if (ret)
+ debug(dwmmc init failed\n);
+
+ return ret;
+}
+#endif
+
static int board_uart_init(void)
{
int err = 0, uart_id;
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index d3c0527..c700e45 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -18,4 +18,22 @@
serial0 = /serial@12C2;
console = /serial@12C2;
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
--
1.7.9.5
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Re: [U-Boot] [i2c] Pull request
On Sat, Aug 03, 2013 at 06:07:15AM +0200, Heiko Schocher wrote: Hello Tom, please pull from u-boot-i2c The following changes since commit 245d65b6e503f3a159cffb3392ac3b2c25606d8e: Merge branch 'master' of git://git.denx.de/u-boot-usb (2013-08-01 09:19:28 -0400) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to 90f002a90f5ac9087737fbc9e781f3519e011f28: i2c: soft: Fix typo in CONFIG_SYS_I2C_SOFT_SPEED (2013-08-03 06:01:18 +0200) Marek Vasut (1): i2c: soft: Fix typo in CONFIG_SYS_I2C_SOFT_SPEED drivers/i2c/soft_i2c.c | 8 include/configs/blackstamp.h | 4 ++-- 2 Dateien ge?ndert, 6 Zeilen hinzugef?gt(+), 6 Zeilen entfernt(-) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/7] video, da8xx: move da8xx-fb.h to drivers/video
On Sat, Aug 03, 2013 at 07:22:48AM +0200, Heiko Schocher wrote: the da8xx-fb driver works also on am335x boards. So move the da8xx-fb.h file from arch/arm/include/asm/arch-davinci to drivers/video, so this driver can used from am335x based boards. Also add WVGA panel_type. Signed-off-by: Heiko Schocher h...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Anatolij Gustschin ag...@denx.de Cc: Tom Rini tr...@ti.com Acked-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] arm, am335x: add some missing registers and defines for lcd and epwm support
On Sat, Aug 03, 2013 at 07:22:47AM +0200, Heiko Schocher wrote:
[snip]
+struct pwmss_ecap_regs {
+ unsigned int tsctr;
+ unsigned int ctrphs;
+ unsigned int cap1;
+ unsigned int cap2;
+ unsigned int cap3;
+ unsigned int cap4;
+ unsigned int reserved[4];
We use 'resv' in the rest of the am33xx headers, please do 'resv1[4]'
instead for consistency.
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
index 432f0c7..293ede2 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
@@ -43,4 +43,11 @@
/* RTC base address */
#define RTC_BASE 0x44E3E000
+/* LCD Controller */
+#define LCD_CNTL_BASE 0x4830E000
#definespace not tab. Thanks.
--
Tom
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Re: [U-Boot] [PATCH 3/7] arm, am33xx: add clk_get prototype
On Sat, Aug 03, 2013 at 07:22:49AM +0200, Heiko Schocher wrote: the clk_get() function is needed for the da8xx-fb video driver, which is used on the am3xx based siemens boards. Signed-off-by: Heiko Schocher h...@denx.de Cc: Tom Rini tr...@ti.com Acked-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/7] video, da8xx-fb: changes for am335x usage
On Sat, Aug 03, 2013 at 07:22:50AM +0200, Heiko Schocher wrote: to use this driver also on am335x based boards, the following changes are made: - struct lcd_ctrl_config lcd_cfg is now configurable through board code - controller base is configurable through define DA8XX_LCD_CNTL_BASE. To be compatible with older da8xx based boards: If this define is missing, the DAVINCI_LCD_CNTL_BASE is used - Determine LCD IP Version, and make the driver working on lcd revision register values: Version 1: 0x4C100102 Version 2: 0x4F200800 0x4F201000 Signed-off-by: Heiko Schocher h...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Anatolij Gustschin ag...@denx.de Cc: Tom Rini tr...@ti.com Acked-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/7] video, da8xx-fb: show fb addr in bdinfo
On Sat, Aug 03, 2013 at 07:22:51AM +0200, Heiko Schocher wrote: without this patch the bdinfo command shows: U-Boot# bd arch_number = 0x10DC [...] sp start= 0x8EF32F20 FB base = 0x with this patch it shows the address where the framebuffer for this video driver start: arch_number = 0x10DC [...] sp start= 0x8EF32F20 FB base = 0x8EF3C788 Signed-off-by: Heiko Schocher h...@denx.de Cc: Anatolij Gustschin ag...@denx.de Cc: Tom Rini tr...@ti.com Acked-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/7] video: add an option to skip cfb console init
On Sat, Aug 03, 2013 at 07:22:53AM +0200, Heiko Schocher wrote:
This patch add an option to skip cfb console init for boards
who want to show a logo, but not use the cfb console. This is
needed for the siemens boards, which have a bmp bootlogo, but
do not need the cfb console.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Anatolij Gustschin ag...@denx.de
---
drivers/video/cfb_console.c | 18 ++
1 Datei ge??ndert, 18 Zeilen hinzugef??gt(+)
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 96ef8f9..822ed28 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -431,6 +431,19 @@ static const int video_font_draw_table32[16][4] = {
{0x00ff, 0x00ff, 0x00ff, 0x00ff}
};
+/*
+ * Implement a weak default function for boards that optionally
+ * need to skip the cfb initialization.
+ */
+int __board_cfb_skip(void)
+{
+ /* As default, don't skip cfb init */
+ return 0;
+}
+
+int board_cfb_skip(void)
+ __attribute__ ((weak, alias(__board_cfb_skip)));
Add linux/compiler.h and use '__weak int board_cfb_skip(void)'.
--
Tom
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank
On 08/06/2013 05:37 AM, Wolfgang Denk wrote: Dear Rob Herring, In message CAL_JsqJTg4CVfk0o9hLd4ZVksj+DNEsKLjcv6T7-6F-=br+...@mail.gmail.com you wrote: Why would you ever want to compile this into U-Boot at all? Then any changes you need to make mean compiling and installing a new U-Boot, which is something you normally don't want to do. You may want to have factory default and user settings. Building in the factory settings would be one way to accomplish that. No. Handling these independently, outside of the compiled U-Boot image is as easy, and much more flexible. U-Boot is perfectly able to import such settings from text files (or text blobs stored somewhere, even attached to the U-Boot image, if you want), so just use the text files separately, instead of hard compiling them into the code. In my case, I don't want to compile the environment into u-boot. But some people do as I copied my scripts from Tegra which has them built-in. We have the *default* environment built-in, which is used when no valid environment is found in flash. If there's an environment in flash, it gets used rather than the built-in default. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration
On 08/06/2013 05:21 PM, Lokesh Vutla wrote: Hi Taras, On Tuesday 06 August 2013 05:48 PM, Taras Kondratiuk wrote: From: Lubomir Popov lpo...@mm-sol.com OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board. This memory has 4Gb x 2CS = 8Gb configuration. Add configuration for runtime calculation and precalculated cases. Patch is based on a draft Lubomir's patch [1]. [1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html Just curious to know, Have you tried SDRAM_AUTO_DETECTION ? Rest looks fine to me. If you mean SYS_AUTOMATIC_SDRAM_DETECTION then yes I've tried it and it works. The only minor issue is that detection is called twice during boot: for dmm_init() and for do_sdram_init(). In case you need additional details I've put boot log with debug enabled below. U-Boot SPL 2013.07-00116-gd7325e5-dirty (Aug 06 2013 - 18:20:56) OMAP4470 ES1.0 sdram_init() in_sdram = 0 get_mr: EMIF1 cs 0 mr val 0x0 get_mr: EMIF1 cs 0 mr 0004 val 0x3 get_mr: EMIF1 cs 0 mr 0005 val 0x3 get_mr: EMIF1 cs 0 mr 0006 val 0x0 get_mr: EMIF1 cs 0 mr 0007 val 0x0 get_mr: EMIF1 cs 0 mr 0008 val 0x18 EMIF1 CS0 Elpida LPDDR2-S4 512 MB get_mr: EMIF1 cs 1 mr 8000 val 0x3 get_mr: EMIF2 cs 0 mr val 0x0 get_mr: EMIF2 cs 0 mr 0004 val 0x3 get_mr: EMIF2 cs 0 mr 0005 val 0x3 get_mr: EMIF2 cs 0 mr 0006 val 0x0 get_mr: EMIF2 cs 0 mr 0007 val 0x0 get_mr: EMIF2 cs 0 mr 0008 val 0x18 EMIF2 CS0 Elpida LPDDR2-S4 512 MB get_mr: EMIF2 cs 1 mr 8000 val 0x3 emif1_size 0x2000 emif2_size 0x2000 do_sdram_init() 4c00 get_mr: EMIF1 cs 0 mr val 0x0 get_mr: EMIF1 cs 0 mr 0004 val 0x3 get_mr: EMIF1 cs 0 mr 0005 val 0x3 get_mr: EMIF1 cs 0 mr 0006 val 0x0 get_mr: EMIF1 cs 0 mr 0007 val 0x0 get_mr: EMIF1 cs 0 mr 0008 val 0x18 EMIF1 CS0 Elpida LPDDR2-S4 512 MB get_mr: EMIF1 cs 1 mr 8000 val 0x3 emif: timings table: 4 emif: addressing table index 6 regs-sdram_config_init - 0x8eb2 regs-sdram_config - 0x80001ab2 regs-ref_ctrl - 0x0618 regs-sdram_tim1 - 0x10eb0662 regs-sdram_tim2 - 0x20370dd2 regs-sdram_tim3 - 0x00b1c33f regs-read_idle_ctrl - 0x000501ff regs-temp_alert_config - 0x58016893 regs-zq_config - 0x500b3214 regs-emif_ddr_phy_ctlr_1 - 0x049ff418 regs-emif_ddr_phy_ctlr_1_init - 0x0495 get_mr: EMIF1 cs 0 mr val 0x0 do_sdram_init() 4c00 do_sdram_init() 4d00 get_mr: EMIF2 cs 0 mr val 0x0 get_mr: EMIF2 cs 0 mr 0004 val 0x3 get_mr: EMIF2 cs 0 mr 0005 val 0x3 get_mr: EMIF2 cs 0 mr 0006 val 0x0 get_mr: EMIF2 cs 0 mr 0007 val 0x0 get_mr: EMIF2 cs 0 mr 0008 val 0x18 EMIF2 CS0 Elpida LPDDR2-S4 512 MB get_mr: EMIF2 cs 1 mr 8000 val 0x3 emif: timings table: 4 emif: addressing table index 6 regs-sdram_config_init - 0x8eb2 regs-sdram_config - 0x80001ab2 regs-ref_ctrl - 0x0618 regs-sdram_tim1 - 0x10eb0662 regs-sdram_tim2 - 0x20370dd2 regs-sdram_tim3 - 0x00b1c33f regs-read_idle_ctrl - 0x000501ff regs-temp_alert_config - 0x58016893 regs-zq_config - 0x500b3214 regs-emif_ddr_phy_ctlr_1 - 0x049ff418 regs-emif_ddr_phy_ctlr_1_init - 0x0495 get_mr: EMIF2 cs 0 mr val 0x0 do_sdram_init() 4d00 get_ram_size() successfulsdram_init() OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img -- BR Taras Kondratiuk | GlobalLogic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v5 1/1] socfpga: Creating driver for Reset Manager
On Tue, 2013-08-06 at 09:09 -0500, Chin Liang See wrote:
Consolidating reset code into reset_manager.c.
Also separating reset configuration for virtual target
and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek
Add Pavel's email address.
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
- Fixed the long subject of the patch
- Consolidated the reset_manager structure between virtual target and dev
kit
Changes for v3:
- Added change log for each revision change
- Removed the between the date of copyright header
Changes for v4:
- Updated the license header for reset_manager.c
Changes for v5:
- Updated the license header for reset_manager.c to SPDX
re-org to have latest changes, v5, at the top.
---
arch/arm/cpu/armv7/socfpga/Makefile |2 +-
arch/arm/cpu/armv7/socfpga/misc.c | 27 --
arch/arm/cpu/armv7/socfpga/reset_manager.c| 40
+
arch/arm/include/asm/arch-socfpga/reset_manager.h | 10 --
4 files changed, 48 insertions(+), 31 deletions(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/reset_manager.c
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index 3b48ac9..5024fc5 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
SOBJS:= lowlevel_init.o
-COBJS-y := misc.o timer.o
+COBJS-y := misc.o timer.o reset_manager.o
COBJS-$(CONFIG_SPL_BUILD) += spl.o
COBJS:= $(COBJS-y)
diff --git a/arch/arm/cpu/armv7/socfpga/misc.c
b/arch/arm/cpu/armv7/socfpga/misc.c
index 66edb3c..2f1c716 100644
--- a/arch/arm/cpu/armv7/socfpga/misc.c
+++ b/arch/arm/cpu/armv7/socfpga/misc.c
@@ -6,36 +6,9 @@
#include common.h
#include asm/io.h
-#include asm/arch/reset_manager.h
DECLARE_GLOBAL_DATA_PTR;
-static const struct socfpga_reset_manager *reset_manager_base =
- (void *)SOCFPGA_RSTMGR_ADDRESS;
-
-/*
- * Write the reset manager register to cause reset
- */
-void reset_cpu(ulong addr)
-{
- /* request a warm reset */
- writel(RSTMGR_CTRL_SWWARMRSTREQ_LSB, reset_manager_base-ctrl);
- /*
- * infinite loop here as watchdog will trigger and reset
- * the processor
- */
- while (1)
- ;
-}
-
-/*
- * Release peripherals from reset based on handoff
- */
-void reset_deassert_peripherals_handoff(void)
-{
- writel(0, reset_manager_base-per_mod_reset);
-}
-
int dram_init(void)
{
gd-ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c
b/arch/arm/cpu/armv7/socfpga/reset_manager.c
new file mode 100644
index 000..2281743
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/reset_manager.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct socfpga_reset_manager *reset_manager_base =
+ (void *)SOCFPGA_RSTMGR_ADDRESS;
+
+/*
+ * Write the reset manager register to cause reset
+ */
+void reset_cpu(ulong addr)
+{
+ /* request a warm reset */
+ writel((1 RSTMGR_CTRL_SWWARMRSTREQ_LSB),
+ reset_manager_base-ctrl);
+ /*
+ * infinite loop here as watchdog will trigger and reset
+ * the processor
+ */
+ while (1)
+ ;
+}
+
+/*
+ * Release peripherals from reset based on handoff
+ */
+void reset_deassert_peripherals_handoff(void)
+{
+ writel(0, reset_manager_base-per_mod_reset);
+}
+
+
diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h
b/arch/arm/include/asm/arch-socfpga/reset_manager.h
index 13d7357..3e95476 100644
--- a/arch/arm/include/asm/arch-socfpga/reset_manager.h
+++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h
@@ -11,16 +11,20 @@ void reset_cpu(ulong addr);
void reset_deassert_peripherals_handoff(void);
struct socfpga_reset_manager {
- u32 padding1;
+ u32 status;
u32 ctrl;
- u32 padding2;
- u32 padding3;
+ u32 counts;
+ u32 padding1;
u32 mpu_mod_reset;
u32 per_mod_reset;
u32 per2_mod_reset;
u32 brg_mod_reset;
};
+#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
+#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
+#else
#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
+#endif
#endif /* _RESET_MANAGER_H_ */
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Re: [U-Boot] [RESEND PATCH v5 1/1] socfpga: Adding configuration for development kit
On Tue, 2013-08-06 at 09:08 -0500, Chin Liang See wrote:
Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek
Include Pavel's email address.
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
- Fixed the word wrap issue within patch
Changes for v3:
- Fixed the long subject of the patch
Changes for v4:
- Added change log for each revision change
Changes for v5:
- Added Reviewed-by: Pavel Machek
- Cc: Tom Rini
Re-org this to have the latest, v5 at the top.
---
include/configs/socfpga_cyclone5.h | 28 +---
1 file changed, 21 insertions(+), 7 deletions(-)
diff --git a/include/configs/socfpga_cyclone5.h
b/include/configs/socfpga_cyclone5.h
index b5a7a9a..06aeba6 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -11,6 +11,8 @@
/*
* High level configuration
*/
+/* Virtual target or real hardware */
+#define CONFIG_SOCFPGA_VIRTUAL_TARGET
#define CONFIG_ARMV7
#define CONFIG_L2_OFF
@@ -21,11 +23,12 @@
#define CONFIG_SINGLE_BOOTLOADER
#define CONFIG_SOCFPGA
+/* base address for .text section */
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
#define CONFIG_SYS_TEXT_BASE 0x0840
-#define V_NS16550_CLK100
-#define CONFIG_BAUDRATE 57600
-#define CONFIG_SYS_HZ1000
-#define CONFIG_TIMER_CLOCK_KHZ 2400
+#else
+#define CONFIG_SYS_TEXT_BASE 0x0140
+#endif
#define CONFIG_SYS_LOAD_ADDR 0x7fc0
/* Console I/O Buffer Size */
@@ -154,7 +157,7 @@
/* SDRAM Bank #1 */
#define CONFIG_SYS_SDRAM_BASE0x
/* SDRAM memory size */
-#define PHYS_SDRAM_1_SIZE0x8000
+#define PHYS_SDRAM_1_SIZE0x4000
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_START 0x
@@ -170,8 +173,13 @@
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 UART0_BASE
-
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define V_NS16550_CLK100
+#else
+#define V_NS16550_CLK1
+#endif
+#define CONFIG_BAUDRATE 115200
/*
* FLASH
@@ -184,9 +192,15 @@
/* This timer use eosc1 where the clock frequency is fixed
* throughout any condition */
#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
-
/* reload value when timer count to zero */
#define TIMER_LOAD_VAL 0x
+/* Timer info */
+#define CONFIG_SYS_HZ1000
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_TIMER_CLOCK_KHZ 2400
+#else
+#define CONFIG_TIMER_CLOCK_KHZ 25000
+#endif
#define CONFIG_ENV_IS_NOWHERE
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Re: [U-Boot] [RFC PATCH 0/2] Moving ARM DCC from stdio to serial
Dear Michal Simek, In message cover.1375795019.git.michal.si...@xilinx.com you wrote: I am not sure about this change but it seems to me there shouldn't be any problem to remove stdio support because it can be simple another serial driver which can use serial multi interface. Does this not mean we lose the capability to use DCC as console port? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de History is only a confused heap of facts. -- Philip Earl of Chesterfield ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v6 1/2] socfpga: Adding System Manager driver
On Tue, 2013-08-06 at 09:10 -0500, Chin Liang See wrote:
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
- Fixed the word wrap issue within patch
Changes for v3:
- Fixed the long subject of the patch
- Fixed the comment within the code
Changes for v4:
- Added change log for each revision change
Changes for v5:
- Updated the license header for system_manager.c
- Cc: Tom Rini
Changes for v6:
- Updated the license header for system_manager.c and .h to SPDX
Re-org this with latest at the top.
Besides that:
Acked-by: Dinh Nguyen dingu...@altera.com
Dinh
---
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
arch/arm/cpu/armv7/socfpga/spl.c |6
arch/arm/cpu/armv7/socfpga/system_manager.c| 29
.../include/asm/arch-socfpga/socfpga_base_addrs.h |1 +
arch/arm/include/asm/arch-socfpga/system_manager.h | 22 +++
board/altera/socfpga/Makefile |4 ++-
include/configs/socfpga_cyclone5.h |1 +
7 files changed, 63 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/system_manager.c
create mode 100644 arch/arm/include/asm/arch-socfpga/system_manager.h
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index 5024fc5..0859e44 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
SOBJS:= lowlevel_init.o
-COBJS-y := misc.o timer.o reset_manager.o
+COBJS-y := misc.o timer.o reset_manager.o system_manager.o
COBJS-$(CONFIG_SPL_BUILD) += spl.o
COBJS:= $(COBJS-y)
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c
b/arch/arm/cpu/armv7/socfpga/spl.c
index 2b9be28..74bceab 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -12,6 +12,7 @@
#include image.h
#include asm/arch/reset_manager.h
#include spl.h
+#include asm/arch/system_manager.h
DECLARE_GLOBAL_DATA_PTR;
@@ -25,6 +26,11 @@ u32 spl_boot_device(void)
*/
void spl_board_init(void)
{
+#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
+ /* configure the pin muxing through system manager */
+ sysmgr_pinmux_init();
+#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
+
/* de-assert reset for peripherals and bridges based on handoff */
reset_deassert_peripherals_handoff();
diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c
b/arch/arm/cpu/armv7/socfpga/system_manager.c
new file mode 100644
index 000..0b1bb33
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/system_manager.c
@@ -0,0 +1,29 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/system_manager.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Configure all the pin muxes
+ */
+void sysmgr_pinmux_init(void)
+{
+ unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET;
+
+ const unsigned long *pval = sys_mgr_init_table;
+ unsigned long i;
+
+ for (i = 0; i ARRAY_SIZE(sys_mgr_init_table);
+ i++, offset += sizeof(unsigned long)) {
+ writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset));
+ }
+}
+
+
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
index 1182a13..50c4ebd 100644
--- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -12,5 +12,6 @@
#define SOCFPGA_UART1_ADDRESS 0xffc03000
#define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
+#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
#endif /* _SOCFPGA_BASE_ADDRS_H_ */
diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h
b/arch/arm/include/asm/arch-socfpga/system_manager.h
new file mode 100644
index 000..36a83b4
--- /dev/null
+++ b/arch/arm/include/asm/arch-socfpga/system_manager.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _SYSTEM_MANAGER_H_
+#define _SYSTEM_MANAGER_H_
+
+#ifndef __ASSEMBLY__
+
+void sysmgr_pinmux_init(void);
+
+/* declaration for handoff table type */
+extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
+
+#endif
+
+
+#define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400)
+
+#endif /* _SYSTEM_MANAGER_H_ */
diff --git
Re: [U-Boot] [RESEND PATCH v5 2/2] socfpga: Adding pin mux handoff files
On Tue, 2013-08-06 at 09:10 -0500, Chin Liang See wrote:
Adding the generated pin mux
configuration by Preloader Generator tool
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
- Fixed the word wrap issue within patch
Changes for v3:
- Fixed the long subject of the patch
Changes for v4:
- Added change log for each revision change
Changes for v5:
- Updated the license header for reset_manager.c
- Updated the subject
Re-org with latest changes on top.
Acked-by: Dinh Nguyen dingu...@altera.com
Dinh
---
board/altera/socfpga/pinmux_config.c | 214
++
board/altera/socfpga/pinmux_config.h | 54 +
2 files changed, 268 insertions(+)
create mode 100644 board/altera/socfpga/pinmux_config.c
create mode 100644 board/altera/socfpga/pinmux_config.h
diff --git a/board/altera/socfpga/pinmux_config.c
b/board/altera/socfpga/pinmux_config.c
new file mode 100644
index 000..8b09005
--- /dev/null
+++ b/board/altera/socfpga/pinmux_config.c
@@ -0,0 +1,214 @@
+/* This file is generated by Preloader Generator */
+
+#include pinmux_config.h
+
+/* pin mux configuration data */
+unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+ 0, /* EMACIO0 - Unused */
+ 2, /* EMACIO1 - USB */
+ 2, /* EMACIO2 - USB */
+ 2, /* EMACIO3 - USB */
+ 2, /* EMACIO4 - USB */
+ 2, /* EMACIO5 - USB */
+ 2, /* EMACIO6 - USB */
+ 2, /* EMACIO7 - USB */
+ 2, /* EMACIO8 - USB */
+ 0, /* EMACIO9 - Unused */
+ 2, /* EMACIO10 - USB */
+ 2, /* EMACIO11 - USB */
+ 2, /* EMACIO12 - USB */
+ 2, /* EMACIO13 - USB */
+ 0, /* EMACIO14 - N/A */
+ 0, /* EMACIO15 - N/A */
+ 0, /* EMACIO16 - N/A */
+ 0, /* EMACIO17 - N/A */
+ 0, /* EMACIO18 - N/A */
+ 0, /* EMACIO19 - N/A */
+ 3, /* FLASHIO0 - SDMMC */
+ 3, /* FLASHIO1 - SDMMC */
+ 3, /* FLASHIO2 - SDMMC */
+ 3, /* FLASHIO3 - SDMMC */
+ 0, /* FLASHIO4 - SDMMC */
+ 0, /* FLASHIO5 - SDMMC */
+ 0, /* FLASHIO6 - SDMMC */
+ 0, /* FLASHIO7 - SDMMC */
+ 0, /* FLASHIO8 - SDMMC */
+ 3, /* FLASHIO9 - SDMMC */
+ 3, /* FLASHIO10 - SDMMC */
+ 3, /* FLASHIO11 - SDMMC */
+ 3, /* GENERALIO0 - TRACE */
+ 3, /* GENERALIO1 - TRACE */
+ 3, /* GENERALIO2 - TRACE */
+ 3, /* GENERALIO3 - TRACE */
+ 3, /* GENERALIO4 - TRACE */
+ 3, /* GENERALIO5 - TRACE */
+ 3, /* GENERALIO6 - TRACE */
+ 3, /* GENERALIO7 - TRACE */
+ 3, /* GENERALIO8 - TRACE */
+ 3, /* GENERALIO9 - SPIM0 */
+ 3, /* GENERALIO10 - SPIM0 */
+ 3, /* GENERALIO11 - SPIM0 */
+ 3, /* GENERALIO12 - SPIM0 */
+ 2, /* GENERALIO13 - CAN0 */
+ 2, /* GENERALIO14 - CAN0 */
+ 3, /* GENERALIO15 - I2C0 */
+ 3, /* GENERALIO16 - I2C0 */
+ 2, /* GENERALIO17 - UART0 */
+ 2, /* GENERALIO18 - UART0 */
+ 0, /* GENERALIO19 - N/A */
+ 0, /* GENERALIO20 - N/A */
+ 0, /* GENERALIO21 - N/A */
+ 0, /* GENERALIO22 - N/A */
+ 0, /* GENERALIO23 - N/A */
+ 0, /* GENERALIO24 - N/A */
+ 0, /* GENERALIO25 - N/A */
+ 0, /* GENERALIO26 - N/A */
+ 0, /* GENERALIO27 - N/A */
+ 0, /* GENERALIO28 - N/A */
+ 0, /* GENERALIO29 - N/A */
+ 0, /* GENERALIO30 - N/A */
+ 0, /* GENERALIO31 - N/A */
+ 2, /* MIXED1IO0 - EMAC */
+ 2, /* MIXED1IO1 - EMAC */
+ 2, /* MIXED1IO2 - EMAC */
+ 2, /* MIXED1IO3 - EMAC */
+ 2, /* MIXED1IO4 - EMAC */
+ 2, /* MIXED1IO5 - EMAC */
+ 2, /* MIXED1IO6 - EMAC */
+ 2, /* MIXED1IO7 - EMAC */
+ 2, /* MIXED1IO8 - EMAC */
+ 2, /* MIXED1IO9 - EMAC */
+ 2, /* MIXED1IO10 - EMAC */
+ 2, /* MIXED1IO11 - EMAC */
+ 2, /* MIXED1IO12 - EMAC */
+ 2, /* MIXED1IO13 - EMAC */
+ 0, /* MIXED1IO14 - Unused */
+ 3, /* MIXED1IO15 - QSPI */
+ 3, /* MIXED1IO16 - QSPI */
+ 3, /* MIXED1IO17 - QSPI */
+ 3, /* MIXED1IO18 - QSPI */
+ 3, /* MIXED1IO19 - QSPI */
+ 3, /* MIXED1IO20 - QSPI */
+ 0, /* MIXED1IO21 - GPIO */
+ 0, /* MIXED2IO0 - N/A */
+ 0, /* MIXED2IO1 - N/A */
+ 0, /* MIXED2IO2 - N/A */
+ 0, /* MIXED2IO3 - N/A */
+ 0, /* MIXED2IO4 - N/A */
+ 0, /* MIXED2IO5 - N/A */
+ 0, /* MIXED2IO6 - N/A */
+ 0, /* MIXED2IO7 - N/A */
+ 0, /* GPLINMUX48 */
+ 0, /* GPLINMUX49 */
+ 0, /* GPLINMUX50 */
+ 0, /* GPLINMUX51 */
+ 0, /* GPLINMUX52 */
+ 0, /* GPLINMUX53 */
+ 0, /* GPLINMUX54 */
+ 0, /* GPLINMUX55 */
+ 0, /* GPLINMUX56 */
+ 0, /* GPLINMUX57 */
+ 0, /* GPLINMUX58 */
+ 0, /* GPLINMUX59 */
+ 0, /* GPLINMUX60 */
+ 0, /* GPLINMUX61 */
+ 0, /* GPLINMUX62 */
Re: [U-Boot] [PATCH 2/4] bootstage: get more BOOTSTAGE_ID* in show_boot_progress()
On Mon, Aug 5, 2013 at 8:00 AM, Heiko Schocher h...@denx.de wrote:
In case CONFIG_BOOTSTAGE is not defined, call from bootstage_mark_name()
show_boot_progress(), so get more BOOTSTAGE_ID* ids in show_boot_progress()
if CONFIG_BOOTSTAGE is not defined.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
Acked-by: Simon Glass s...@chromium.org
---
include/bootstage.h | 1 +
1 Datei geändert, 1 Zeile hinzugefügt(+)
diff --git a/include/bootstage.h b/include/bootstage.h
index 25b4e07..87bf906 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -353,6 +353,7 @@ static inline ulong bootstage_error(enum bootstage_id
id)
static inline ulong bootstage_mark_name(enum bootstage_id id, const char
*name)
{
+ show_boot_progress(id);
return 0;
}
--
1.7.11.7
___
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http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 02/20] sf: probe: Add new spi_flash_probe support
Added new spi_flash_probe support, currently added N25Q*
flash part attributes support.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Defined CONFIG_SPI_FLASH_LEGACY for old probing style
which is available on spi_flash_probe_legacy.c, this will
removed soon once all flashes are supported in new spi_flash_probe.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- Removed CONFIG_SPI_FLASH_NEW, add CONFIG_SPI_FLASH_LEGACY
- Enable CONFIG_SPI_FLASH_STMICRO in spi_flash_params table
- Updated few structure members
drivers/mtd/spi/Makefile | 1 +
drivers/mtd/spi/spi_flash_probe.c| 230 --
drivers/mtd/spi/spi_flash_probe_legacy.c | 274 +++
3 files changed, 384 insertions(+), 121 deletions(-)
create mode 100644 drivers/mtd/spi/spi_flash_probe_legacy.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 0304b12..452747a 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -13,6 +13,7 @@ ifdef CONFIG_SPL_BUILD
COBJS-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
endif
+COBJS-$(CONFIG_SPI_FLASH_LEGACY) += spi_flash_probe_legacy.o spi_flash_ops.o
spi_flash.o
COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o spi_flash.o
COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index fedc81e..f2de72d 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -18,6 +18,98 @@
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * struct spi_flash_params - SPI/QSPI flash device params structure
+ *
+ * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
+ * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
+ * @ext_jedec: Device ext_jedec ID
+ * @sector_size: Sector size of this device
+ * @nr_sectors:No.of sectors on this device
+ */
+struct spi_flash_params {
+ const char *name;
+ u32 jedec;
+ u16 ext_jedec;
+ u32 sector_size;
+ u32 nr_sectors;
+};
+
+static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
+ {N25Q32, 0x20ba16, 0x0, 64 * 1024, 64},
+ {N25Q32A, 0x20bb16, 0x0, 64 * 1024, 64},
+ {N25Q64, 0x20ba17, 0x0, 64 * 1024,128},
+ {N25Q64A, 0x20bb17, 0x0, 64 * 1024,128},
+ {N25Q128, 0x20ba18, 0x0, 64 * 1024,256},
+ {N25Q128A,0x20bb18, 0x0, 64 * 1024,256},
+ {N25Q256, 0x20ba19, 0x0, 64 * 1024,512},
+ {N25Q256A,0x20bb19, 0x0, 64 * 1024,512},
+ {N25Q512, 0x20ba20, 0x0, 64 * 1024, 1024},
+ {N25Q512A,0x20bb20, 0x0, 64 * 1024, 1024},
+ {N25Q1024,0x20ba21, 0x0, 64 * 1024, 2048},
+ {N25Q1024A, 0x20bb21, 0x0, 64 * 1024, 2048},
+#endif
+ /*
+* TODO:
+* ATMEL
+* EON
+* GIGADEVICE
+* MACRONIX
+* RAMTRON
+* SPANSION
+* SST
+* STMICRO (M25*)
+* WINBOND
+*/
+};
+
+struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
+{
+ const struct spi_flash_params *params;
+ struct spi_flash *flash;
+ int i;
+ u16 jedec = idcode[1] 8 | idcode[2];
+
+ /* Get the flash id (jedec = manuf_id + dev_id) */
+ for (i = 0; i ARRAY_SIZE(spi_flash_params_table); i++) {
+ params = spi_flash_params_table[i];
+ if ((params-jedec 16) == idcode[0]) {
+ if (((params-jedec 16) 16) == jedec)
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(spi_flash_params_table)) {
+ printf(SF: Unsupported flash ID: manuf %02x, jedec %04x\n,
+ idcode[0], jedec);
+ return NULL;
+ }
+
+ flash = malloc(sizeof(*flash));
+ if (!flash) {
+ debug(SF: Failed to allocate spi_flash\n);
+ return NULL;
+ }
+ memset(flash, '\0', sizeof(*flash));
+
+ flash-spi = spi;
+ flash-name = params-name;
+ flash-poll_cmd = CMD_READ_STATUS;
+
+ /* Assign spi_flash ops */
+ flash-write = spi_flash_cmd_write_multi;
+ flash-erase = spi_flash_cmd_erase;
+ flash-read = spi_flash_cmd_read_fast;
+
+ /* Compute the flash size */
+ flash-page_size = 256;
+ flash-sector_size = params-sector_size;
+ flash-size = flash-sector_size * params-nr_sectors;
+
+ return flash;
+}
+
#ifdef CONFIG_SPI_FLASH_BAR
int
[U-Boot] [RESEND PATCH v2 00/20] sf: Add common probe support
Hi All, This is a v2 series for sf: Add common probe support I am u-boot/spi custodian, I removed all flash drivers files(except ramtron, handled in a separate driver) and implemented a common probe support. Tested SST, STMICR, SPANSION, WINBOND from my side, REQUEST FOR ALL SPI CODE FLASH_UESRS/CONTRIBUTORS/REST_USER, PLEASE TEST THESE CHANGES W.R.T YOUR HW IF POSSIBLE. Please let me know for any issues/concerns/questions. -- Thanks, Jagan. Jagannadha Sutradharudu Teki (20): sf: Divide spi_flash into multiple parts sf: probe: Add new spi_flash_probe support sf: probe: Add support for M25P* flash parts sf: probe: Add support for EN25Q* flash parts sf: probe: Add support for GD25* flash parts sf: probe: Add support for MX25L* flash parts sf: probe: Add support for W25* flash parts sf: probe: Add support for S25FL* flash parts sf: probe: Add support for SST25* flash parts sf: probe: Add support for AT45DB* flash parts sf: probe: Give proper spacing on flash table attributes sf: probe: Add support for SST_WP sf: probe: Add support to clear flash BP# bits sf: probe: Add support for erase sector selection flag sf: probe: Add support for flag status polling sf: probe: Move BAR config to spi_flash_validate_ids sf: Add proper comment style on spi_flash structure sf: ramtron: Add support for separate flash driver sf: Remove unneeded flash drivers files sf: probe: Add support for EN25Q64 drivers/mtd/spi/Makefile | 15 +- drivers/mtd/spi/atmel.c | 544 - drivers/mtd/spi/eon.c| 60 drivers/mtd/spi/gigadevice.c | 65 drivers/mtd/spi/macronix.c | 98 -- drivers/mtd/spi/ramtron.c| 287 -- drivers/mtd/spi/spansion.c | 141 - drivers/mtd/spi/spi_flash.c | 569 +-- drivers/mtd/spi/spi_flash_internal.h | 21 +- drivers/mtd/spi/spi_flash_ops.c | 403 + drivers/mtd/spi/spi_flash_probe.c| 368 ++ drivers/mtd/spi/sst.c| 232 -- drivers/mtd/spi/stmicro.c| 202 - drivers/mtd/spi/winbond.c| 141 - include/configs/top9000.h| 1 - include/spi_flash.h | 79 +++-- 16 files changed, 841 insertions(+), 2385 deletions(-) delete mode 100644 drivers/mtd/spi/atmel.c delete mode 100644 drivers/mtd/spi/eon.c delete mode 100644 drivers/mtd/spi/gigadevice.c delete mode 100644 drivers/mtd/spi/macronix.c delete mode 100644 drivers/mtd/spi/ramtron.c delete mode 100644 drivers/mtd/spi/spansion.c create mode 100644 drivers/mtd/spi/spi_flash_ops.c create mode 100644 drivers/mtd/spi/spi_flash_probe.c delete mode 100644 drivers/mtd/spi/sst.c delete mode 100644 drivers/mtd/spi/stmicro.c delete mode 100644 drivers/mtd/spi/winbond.c -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 03/20] sf: probe: Add support for M25P* flash parts
Added M25P* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index f2de72d..a107978 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -37,6 +37,14 @@ struct spi_flash_params {
static const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
+ {M25P10, 0x202011, 0x0, 32 * 1024, 4},
+ {M25P20, 0x202012, 0x0, 64 * 1024, 4},
+ {M25P40, 0x202013, 0x0, 64 * 1024, 8},
+ {M25P80, 0x202014, 0x0, 64 * 1024, 16},
+ {M25P16, 0x202015, 0x0, 64 * 1024, 32},
+ {M25P32, 0x202016, 0x0, 64 * 1024, 64},
+ {M25P64, 0x202017, 0x0, 64 * 1024,128},
+ {M25P128, 0x202018, 0x0,256 * 1024, 64},
{N25Q32, 0x20ba16, 0x0, 64 * 1024, 64},
{N25Q32A, 0x20bb16, 0x0, 64 * 1024, 64},
{N25Q64, 0x20ba17, 0x0, 64 * 1024,128},
@@ -59,7 +67,6 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
* RAMTRON
* SPANSION
* SST
-* STMICRO (M25*)
* WINBOND
*/
};
--
1.8.3
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[U-Boot] [RESEND PATCH v2 04/20] sf: probe: Add support for EN25Q* flash parts
Added EN25Q* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_EON
drivers/mtd/spi/spi_flash_probe.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index a107978..4fd2b31 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -36,6 +36,10 @@ struct spi_flash_params {
};
static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_EON/* EON */
+ {EN25Q32B,0x1c3016, 0x0, 64 * 1024, 64},
+ {EN25Q128B, 0x1c3018, 0x0, 64 * 1024,256},
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{M25P10, 0x202011, 0x0, 32 * 1024, 4},
{M25P20, 0x202012, 0x0, 64 * 1024, 4},
@@ -61,7 +65,6 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
/*
* TODO:
* ATMEL
-* EON
* GIGADEVICE
* MACRONIX
* RAMTRON
--
1.8.3
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[U-Boot] [RESEND PATCH v2 05/20] sf: probe: Add support for GD25* flash parts
Added GD25* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_GIGADEVICE
drivers/mtd/spi/spi_flash_probe.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 4fd2b31..21cd483 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -40,6 +40,10 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{EN25Q32B,0x1c3016, 0x0, 64 * 1024, 64},
{EN25Q128B, 0x1c3018, 0x0, 64 * 1024,256},
#endif
+#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
+ {GD25Q64B,0xc84017, 0x0, 64 * 1024,128},
+ {GD25LQ32,0xc86016, 0x0, 64 * 1024, 64},
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{M25P10, 0x202011, 0x0, 32 * 1024, 4},
{M25P20, 0x202012, 0x0, 64 * 1024, 4},
@@ -65,7 +69,6 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
/*
* TODO:
* ATMEL
-* GIGADEVICE
* MACRONIX
* RAMTRON
* SPANSION
--
1.8.3
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[U-Boot] [RESEND PATCH v2 19/20] sf: Remove unneeded flash drivers files
Now the common probing is handled in spi_flash_probe.c
hence removed the unneeded flash drivers.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- none
drivers/mtd/spi/Makefile | 12 +-
drivers/mtd/spi/atmel.c | 544 ---
drivers/mtd/spi/eon.c| 60
drivers/mtd/spi/gigadevice.c | 65 -
drivers/mtd/spi/macronix.c | 98 ---
drivers/mtd/spi/ramtron.c| 406 --
drivers/mtd/spi/spansion.c | 141 -
drivers/mtd/spi/spi_flash_internal.h | 10 -
drivers/mtd/spi/sst.c| 232 ---
drivers/mtd/spi/stmicro.c| 202 -
drivers/mtd/spi/winbond.c| 141 -
11 files changed, 2 insertions(+), 1909 deletions(-)
delete mode 100644 drivers/mtd/spi/atmel.c
delete mode 100644 drivers/mtd/spi/eon.c
delete mode 100644 drivers/mtd/spi/gigadevice.c
delete mode 100644 drivers/mtd/spi/macronix.c
delete mode 100644 drivers/mtd/spi/ramtron.c
delete mode 100644 drivers/mtd/spi/spansion.c
delete mode 100644 drivers/mtd/spi/sst.c
delete mode 100644 drivers/mtd/spi/stmicro.c
delete mode 100644 drivers/mtd/spi/winbond.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index e06924a..db2003b 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -16,16 +16,8 @@ endif
ifdef CONFIG_CMD_SF
COBJS-y+= spi_flash.o
endif
-COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
-COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
-COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
-COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.o
-COBJS-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.o
-COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o
-COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o
-COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o
-COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o
-COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
+COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
COBJS := $(COBJS-y)
diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c
deleted file mode 100644
index f34df43..000
--- a/drivers/mtd/spi/atmel.c
+++ /dev/null
@@ -1,544 +0,0 @@
-/*
- * Atmel SPI DataFlash support
- *
- * Copyright (C) 2008 Atmel Corporation
- * Licensed under the GPL-2 or later.
- */
-
-#include common.h
-#include malloc.h
-#include spi_flash.h
-
-#include spi_flash_internal.h
-
-/* AT45-specific commands */
-#define CMD_AT45_READ_STATUS 0xd7
-#define CMD_AT45_ERASE_PAGE0x81
-#define CMD_AT45_LOAD_PROG_BUF10x82
-#define CMD_AT45_LOAD_BUF1 0x84
-#define CMD_AT45_LOAD_PROG_BUF20x85
-#define CMD_AT45_LOAD_BUF2 0x87
-#define CMD_AT45_PROG_BUF1 0x88
-#define CMD_AT45_PROG_BUF2 0x89
-
-/* AT45 status register bits */
-#define AT45_STATUS_P2_PAGE_SIZE (1 0)
-#define AT45_STATUS_READY (1 7)
-
-/* DataFlash family IDs, as obtained from the second idcode byte */
-#define DF_FAMILY_AT26F0
-#define DF_FAMILY_AT45 1
-#define DF_FAMILY_AT26DF 2 /* AT25DF and AT26DF */
-
-struct atmel_spi_flash_params {
- u8 idcode1;
- /* Log2 of page size in power-of-two mode */
- u8 l2_page_size;
- u8 pages_per_block;
- u8 blocks_per_sector;
- u8 nr_sectors;
- const char *name;
-};
-
-/* spi_flash needs to be first so upper layers can free() it */
-struct atmel_spi_flash {
- struct spi_flash flash;
- const struct atmel_spi_flash_params *params;
-};
-
-static inline struct atmel_spi_flash *
-to_atmel_spi_flash(struct spi_flash *flash)
-{
- return container_of(flash, struct atmel_spi_flash, flash);
-}
-
-static const struct atmel_spi_flash_params atmel_spi_flash_table[] = {
- {
- .idcode1= 0x22,
- .l2_page_size = 8,
- .pages_per_block= 8,
- .blocks_per_sector = 16,
- .nr_sectors = 4,
- .name = AT45DB011D,
- },
- {
- .idcode1= 0x23,
- .l2_page_size = 8,
- .pages_per_block= 8,
- .blocks_per_sector = 16,
- .nr_sectors = 8,
- .name = AT45DB021D,
- },
- {
- .idcode1= 0x24,
- .l2_page_size = 8,
- .pages_per_block= 8,
- .blocks_per_sector = 32,
- .nr_sectors = 8,
- .name
[U-Boot] [RESEND PATCH v2 18/20] sf: ramtron: Add support for separate flash driver
Compared to other spi flashes, ramtron has a different
probing and implementation on flash ops, hence moved
ramtron probe code into ramtron driver.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- none
drivers/mtd/spi/Makefile | 6 +-
drivers/mtd/spi/ramtron.c| 123 +-
drivers/mtd/spi/spi_flash_internal.h | 1 -
drivers/mtd/spi/spi_flash_probe.c| 4 -
drivers/mtd/spi/spi_flash_probe_legacy.c | 274 ---
include/configs/top9000.h| 1 -
6 files changed, 125 insertions(+), 284 deletions(-)
delete mode 100644 drivers/mtd/spi/spi_flash_probe_legacy.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 452747a..e06924a 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -13,8 +13,10 @@ ifdef CONFIG_SPL_BUILD
COBJS-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
endif
-COBJS-$(CONFIG_SPI_FLASH_LEGACY) += spi_flash_probe_legacy.o spi_flash_ops.o
spi_flash.o
-COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o spi_flash.o
+ifdef CONFIG_CMD_SF
+COBJS-y+= spi_flash.o
+endif
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.o
diff --git a/drivers/mtd/spi/ramtron.c b/drivers/mtd/spi/ramtron.c
index 38f9d69..c9701d0 100644
--- a/drivers/mtd/spi/ramtron.c
+++ b/drivers/mtd/spi/ramtron.c
@@ -214,7 +214,8 @@ static int ramtron_erase(struct spi_flash *flash, u32
offset, size_t len)
* nore: we are called here with idcode pointing to the first non-0x7f byte
* already!
*/
-struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode)
+static struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi,
+ u8 *idcode)
{
const struct ramtron_spi_fram_params *params;
struct ramtron_spi_fram *sn;
@@ -270,7 +271,7 @@ struct spi_flash *spi_fram_probe_ramtron(struct spi_slave
*spi, u8 *idcode)
return NULL;
found:
- sn = spi_flash_alloc(struct ramtron_spi_fram, spi, params-name);
+ sn = malloc(sizeof(*sn));
if (!sn) {
debug(SF: Failed to allocate memory\n);
return NULL;
@@ -285,3 +286,121 @@ found:
return sn-flash;
}
+
+/*
+ * The following table holds all device probe functions
+ * (All flashes are removed and implemented a common probe at
+ * spi_flash_probe.c)
+ *
+ * shift: number of continuation bytes before the ID
+ * idcode: the expected IDCODE or 0xff for non JEDEC devices
+ * probe: the function to call
+ *
+ * Non JEDEC devices should be ordered in the table such that
+ * the probe functions with best detection algorithms come first.
+ *
+ * Several matching entries are permitted, they will be tried
+ * in sequence until a probe function returns non NULL.
+ *
+ * IDCODE_CONT_LEN may be redefined if a device needs to declare a
+ * larger shift value. IDCODE_PART_LEN generally shouldn't be
+ * changed. This is the max number of bytes probe functions may
+ * examine when looking up part-specific identification info.
+ *
+ * Probe functions will be given the idcode buffer starting at their
+ * manu id byte (the idcode in the table below). In other words,
+ * all of the continuation bytes will be skipped (the shift below).
+ */
+#define IDCODE_CONT_LEN 0
+#define IDCODE_PART_LEN 5
+static const struct {
+ const u8 shift;
+ const u8 idcode;
+ struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
+} flashes[] = {
+ /* Keep it sorted by define name */
+#ifdef CONFIG_SPI_FRAM_RAMTRON
+ { 6, 0xc2, spi_fram_probe_ramtron, },
+# undef IDCODE_CONT_LEN
+# define IDCODE_CONT_LEN 6
+#endif
+#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
+ { 0, 0xff, spi_fram_probe_ramtron, },
+#endif
+};
+#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
+
+struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int spi_mode)
+{
+ struct spi_slave *spi;
+ struct spi_flash *flash = NULL;
+ int ret, i, shift;
+ u8 idcode[IDCODE_LEN], *idp;
+
+ spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
+ if (!spi) {
+ printf(SF: Failed to set up slave\n);
+ return NULL;
+ }
+
+ ret = spi_claim_bus(spi);
+ if (ret) {
+ debug(SF: Failed to claim SPI bus: %d\n, ret);
+ goto err_claim_bus;
+ }
+
+ /* Read the ID codes */
+ ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
+ if (ret)
+ goto err_read_id;
+
+#ifdef DEBUG
+ printf(SF: Got idcodes\n);
+ print_buffer(0, idcode, 1, sizeof(idcode), 0);
+#endif
+
+ /* count the number of continuation bytes */
+ for (shift = 0, idp =
[U-Boot] [RESEND PATCH v2 15/20] sf: probe: Add support for flag status polling
From Micron, 512MB onwards, flash requires to poll flag status
instead of read status- hence added E_FSR flag on spectific
flash parts.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 14 +-
include/spi_flash.h | 1 +
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 0d005a1..acccee0 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -94,10 +94,10 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{N25Q128A, 0x20bb18, 0x0, 64 * 1024, 256,
SECT_4K},
{N25Q256,0x20ba19, 0x0, 64 * 1024, 512,
SECT_4K},
{N25Q256A, 0x20bb19, 0x0, 64 * 1024, 512,
SECT_4K},
- {N25Q512,0x20ba20, 0x0, 64 * 1024, 1024,
SECT_4K},
- {N25Q512A, 0x20bb20, 0x0, 64 * 1024, 1024,
SECT_4K},
- {N25Q1024, 0x20ba21, 0x0, 64 * 1024, 2048,
SECT_4K},
- {N25Q1024A, 0x20bb21, 0x0, 64 * 1024, 2048,
SECT_4K},
+ {N25Q512,0x20ba20, 0x0, 64 * 1024, 1024, E_FSR |
SECT_4K},
+ {N25Q512A, 0x20bb20, 0x0, 64 * 1024, 1024, E_FSR |
SECT_4K},
+ {N25Q1024, 0x20ba21, 0x0, 64 * 1024, 2048, E_FSR |
SECT_4K},
+ {N25Q1024A, 0x20bb21, 0x0, 64 * 1024, 2048, E_FSR |
SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_SST/* SST */
{SST25VF040B,0xbf258d, 0x0, 64 * 1024, 8, SECT_4K |
SST_WP},
@@ -186,7 +186,6 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
flash-spi = spi;
flash-name = params-name;
- flash-poll_cmd = CMD_READ_STATUS;
/* Assign spi_flash ops */
flash-write = spi_flash_cmd_write_multi;
@@ -214,6 +213,11 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
flash-erase_size = flash-sector_size;
}
+ /* Poll cmd seclection */
+ flash-poll_cmd = CMD_READ_STATUS;
+ if (params-flags E_FSR)
+ flash-poll_cmd = CMD_FLAG_STATUS;
+
/* Flash powers up read-only, so clear BP# bits */
if (((params-jedec 16) == SPI_FLASH_CFI_MFR_ATMEL) ||
((params-jedec 16) == SPI_FLASH_CFI_MFR_MACRONIX) ||
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 387af86..3e60fdc 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -25,6 +25,7 @@
/* SECT flags */
#define SECT_4K(1 0)
#define SECT_32K (1 1)
+#define E_FSR (1 2)
/* SST specific macros */
#ifdef CONFIG_SPI_FLASH_SST
--
1.8.3
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[U-Boot] [RESEND PATCH v2 11/20] sf: probe: Give proper spacing on flash table params
Given proper spacing between flash table params.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/spi_flash_probe.c | 154 +++---
1 file changed, 77 insertions(+), 77 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 948fcdb..94505b3 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -37,97 +37,97 @@ struct spi_flash_params {
static const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4},
- {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8},
- {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8},
- {AT45DB081D, 0x1f2500, 0x0, 64 * 1024, 16},
- {AT45DB161D, 0x1f2600, 0x0, 64 * 1024, 32},
- {AT45DB321D, 0x1f2700, 0x0, 64 * 1024, 64},
- {AT45DB641D, 0x1f2800, 0x0, 64 * 1024,128},
+ {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4},
+ {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8},
+ {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8},
+ {AT45DB081D, 0x1f2500, 0x0, 64 * 1024,16},
+ {AT45DB161D, 0x1f2600, 0x0, 64 * 1024,32},
+ {AT45DB321D, 0x1f2700, 0x0, 64 * 1024,64},
+ {AT45DB641D, 0x1f2800, 0x0, 64 * 1024, 128},
#endif
#ifdef CONFIG_SPI_FLASH_EON/* EON */
- {EN25Q32B,0x1c3016, 0x0, 64 * 1024, 64},
- {EN25Q128B, 0x1c3018, 0x0, 64 * 1024,256},
+ {EN25Q32B, 0x1c3016, 0x0, 64 * 1024,64},
+ {EN25Q128B, 0x1c3018, 0x0, 64 * 1024, 256},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {GD25Q64B,0xc84017, 0x0, 64 * 1024,128},
- {GD25LQ32,0xc86016, 0x0, 64 * 1024, 64},
+ {GD25Q64B, 0xc84017, 0x0, 64 * 1024, 128},
+ {GD25LQ32, 0xc86016, 0x0, 64 * 1024,64},
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8},
- {MX25L8005, 0xc22014, 0x0, 64 * 1024, 16},
- {MX25L1605D, 0xc22015, 0x0, 64 * 1024, 32},
- {MX25L3205D, 0xc22016, 0x0, 64 * 1024, 64},
- {MX25L6405D, 0xc22017, 0x0, 64 * 1024,128},
- {MX25L12805, 0xc22018, 0x0, 64 * 1024,256},
- {MX25L12855E, 0xc22618, 0x0, 64 * 1024,256},
+ {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8},
+ {MX25L8005, 0xc22014, 0x0, 64 * 1024,16},
+ {MX25L1605D, 0xc22015, 0x0, 64 * 1024,32},
+ {MX25L3205D, 0xc22016, 0x0, 64 * 1024,64},
+ {MX25L6405D, 0xc22017, 0x0, 64 * 1024, 128},
+ {MX25L12805, 0xc22018, 0x0, 64 * 1024, 256},
+ {MX25L12855E,0xc22618, 0x0, 64 * 1024, 256},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {S25FL008A, 0x010213, 0x0, 64 * 1024, 16},
- {S25FL016A, 0x010214, 0x0, 64 * 1024, 32},
- {S25FL032A, 0x010215, 0x0, 64 * 1024, 64},
- {S25FL064A, 0x010216, 0x0, 64 * 1024,128},
- {S25FL128P_256K, 0x012018, 0x0300, 256 * 1024, 64},
- {S25FL128P_64K, 0x012018, 0x0301, 64 * 1024,256},
- {S25FL032P, 0x010215, 0x4d00, 64 * 1024, 64},
- {S25FL064P, 0x010216, 0x4d00, 64 * 1024,128},
- {S25FL128S_64K, 0x012018, 0x4d01, 64 * 1024,256},
- {S25FL256S_64K, 0x010219, 0x4d01, 64 * 1024,512},
- {S25FL512S_64K, 0x010220, 0x4d01, 64 * 1024, 1024},
+ {S25FL008A, 0x010213, 0x0, 64 * 1024,16},
+ {S25FL016A, 0x010214, 0x0, 64 * 1024,32},
+ {S25FL032A, 0x010215, 0x0, 64 * 1024,64},
+ {S25FL064A, 0x010216, 0x0, 64 * 1024, 128},
+ {S25FL128P_256K, 0x012018, 0x0300, 256 * 1024,64},
+ {S25FL128P_64K, 0x012018, 0x0301,64 * 1024, 256},
+ {S25FL032P, 0x010215, 0x4d00,64 * 1024,64},
+ {S25FL064P, 0x010216, 0x4d00,64 * 1024, 128},
+ {S25FL128S_64K, 0x012018, 0x4d01,64 * 1024, 256},
+ {S25FL256S_64K, 0x010219, 0x4d01,64 * 1024, 512},
+ {S25FL512S_64K, 0x010220, 0x4d01,64 * 1024, 1024},
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
- {M25P10, 0x202011, 0x0, 32 * 1024, 4},
- {M25P20, 0x202012, 0x0, 64 * 1024, 4},
- {M25P40, 0x202013, 0x0,
[U-Boot] [RESEND PATCH v2 14/20] sf: probe: Add support for erase sector selection flag
SECT_4K, SECT_32K and SECT_64K opeartions are performed to
to specific flash by adding a SECT* flag on respective
spi_flash_params.flag param.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- none
drivers/mtd/spi/spi_flash_ops.c | 8 +-
drivers/mtd/spi/spi_flash_probe.c | 166 --
include/spi_flash.h | 10 ++-
3 files changed, 100 insertions(+), 84 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index 79381b1..c408e27 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -153,17 +153,13 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32
offset, size_t len)
u8 cmd[4];
int ret = -1;
- erase_size = flash-sector_size;
+ erase_size = flash-erase_size;
if (offset % erase_size || len % erase_size) {
debug(SF: Erase offset/length not multiple of erase size\n);
return -1;
}
- if (erase_size == 4096)
- cmd[0] = CMD_ERASE_4K;
- else
- cmd[0] = CMD_ERASE_64K;
-
+ cmd[0] = flash-erase_cmd;
while (len) {
#ifdef CONFIG_SPI_FLASH_BAR
u8 bank_sel;
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 4368867..0d005a1 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -39,97 +39,97 @@ struct spi_flash_params {
static const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4,0},
- {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8,0},
- {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8,0},
- {AT45DB081D, 0x1f2500, 0x0, 64 * 1024,16,0},
- {AT45DB161D, 0x1f2600, 0x0, 64 * 1024,32,0},
- {AT45DB321D, 0x1f2700, 0x0, 64 * 1024,64,0},
- {AT45DB641D, 0x1f2800, 0x0, 64 * 1024, 128,0},
+ {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K},
+ {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K},
+ {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K},
+ {AT45DB081D, 0x1f2500, 0x0, 64 * 1024,16,
SECT_4K},
+ {AT45DB161D, 0x1f2600, 0x0, 64 * 1024,32,
SECT_4K},
+ {AT45DB321D, 0x1f2700, 0x0, 64 * 1024,64,
SECT_4K},
+ {AT45DB641D, 0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_EON/* EON */
- {EN25Q32B, 0x1c3016, 0x0, 64 * 1024,64,0},
- {EN25Q128B, 0x1c3018, 0x0, 64 * 1024, 256,0},
+ {EN25Q32B, 0x1c3016, 0x0, 64 * 1024,64,
0},
+ {EN25Q128B, 0x1c3018, 0x0, 64 * 1024, 256,
0},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {GD25Q64B, 0xc84017, 0x0, 64 * 1024, 128,0},
- {GD25LQ32, 0xc86016, 0x0, 64 * 1024,64,0},
+ {GD25Q64B, 0xc84017, 0x0, 64 * 1024, 128,
SECT_4K},
+ {GD25LQ32, 0xc86016, 0x0, 64 * 1024,64,
SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8,0},
- {MX25L8005, 0xc22014, 0x0, 64 * 1024,16,0},
- {MX25L1605D, 0xc22015, 0x0, 64 * 1024,32,0},
- {MX25L3205D, 0xc22016, 0x0, 64 * 1024,64,0},
- {MX25L6405D, 0xc22017, 0x0, 64 * 1024, 128,0},
- {MX25L12805, 0xc22018, 0x0, 64 * 1024, 256,0},
- {MX25L12855E,0xc22618, 0x0, 64 * 1024, 256,0},
+ {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8,
0},
+ {MX25L8005, 0xc22014, 0x0, 64 * 1024,16,
0},
+ {MX25L1605D, 0xc22015, 0x0, 64 * 1024,32,
0},
+ {MX25L3205D, 0xc22016, 0x0, 64 * 1024,64,
0},
+ {MX25L6405D, 0xc22017, 0x0, 64 * 1024, 128,
0},
+ {MX25L12805, 0xc22018, 0x0, 64 * 1024, 256,
0},
+ {MX25L12855E,0xc22618, 0x0, 64 * 1024, 256,
0},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {S25FL008A, 0x010213, 0x0, 64 * 1024,16,0},
- {S25FL016A,
[U-Boot] [RESEND PATCH v2 12/20] sf: probe: Add support for SST_WP
Most of the SST flashes needs to write up using SST_WP, AAI
Word Program, so added a flag param on spi_flash_params table.
SST flashes, which supports SST_WP need to use a WP write
sst_write_wp instead of common flash write.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- none
drivers/mtd/spi/spi_flash_internal.h | 5 ++
drivers/mtd/spi/spi_flash_ops.c | 93
drivers/mtd/spi/spi_flash_probe.c| 160 ++-
include/spi_flash.h | 7 ++
4 files changed, 188 insertions(+), 77 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/spi_flash_internal.h
index af1afa9..ce34ce0 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -75,6 +75,11 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8
*cmd, size_t cmd_len,
int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
size_t len, const void *buf);
+#ifdef CONFIG_SPI_FLASH_SST
+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+ const void *buf);
+#endif
+
/*
* Enable writing on the SPI flash.
*/
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index 6133363..79381b1 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -312,3 +312,96 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
return ret;
}
+
+#ifdef CONFIG_SPI_FLASH_SST
+static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
+{
+ int ret;
+ u8 cmd[4] = {
+ CMD_SST_BP,
+ offset 16,
+ offset 8,
+ offset,
+ };
+
+ debug(BP[%02x]: 0x%p = cmd = { 0x%02x 0x%06x }\n,
+ spi_w8r8(flash-spi, CMD_READ_STATUS), buf, cmd[0], offset);
+
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret)
+ return ret;
+
+ ret = spi_flash_cmd_write(flash-spi, cmd, sizeof(cmd), buf, 1);
+ if (ret)
+ return ret;
+
+ return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+}
+
+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+ const void *buf)
+{
+ size_t actual, cmd_len;
+ int ret;
+ u8 cmd[4];
+
+ ret = spi_claim_bus(flash-spi);
+ if (ret) {
+ debug(SF: Unable to claim SPI bus\n);
+ return ret;
+ }
+
+ /* If the data is not word aligned, write out leading single byte */
+ actual = offset % 2;
+ if (actual) {
+ ret = sst_byte_write(flash, offset, buf);
+ if (ret)
+ goto done;
+ }
+ offset += actual;
+
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret)
+ goto done;
+
+ cmd_len = 4;
+ cmd[0] = CMD_SST_AAI_WP;
+ cmd[1] = offset 16;
+ cmd[2] = offset 8;
+ cmd[3] = offset;
+
+ for (; actual len - 1; actual += 2) {
+ debug(WP[%02x]: 0x%p = cmd = { 0x%02x 0x%06x }\n,
+ spi_w8r8(flash-spi, CMD_READ_STATUS), buf + actual,
+ cmd[0], offset);
+
+ ret = spi_flash_cmd_write(flash-spi, cmd, cmd_len,
+ buf + actual, 2);
+ if (ret) {
+ debug(SF: sst word program failed\n);
+ break;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret)
+ break;
+
+ cmd_len = 1;
+ offset += 2;
+ }
+
+ if (!ret)
+ ret = spi_flash_cmd_write_disable(flash);
+
+ /* If there is a single trailing byte, write it out */
+ if (!ret actual != len)
+ ret = sst_byte_write(flash, offset, buf + actual);
+
+ done:
+ debug(SF: sst: program %s %zu bytes @ 0x%zx\n,
+ ret ? failure : success, len, offset - actual);
+
+ spi_release_bus(flash-spi);
+ return ret;
+}
+#endif
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 94505b3..e045e53 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -26,6 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
* @ext_jedec: Device ext_jedec ID
* @sector_size: Sector size of this device
* @nr_sectors:No.of sectors on this device
+ * @flags: Importent param, for flash specific behaviour
*/
struct spi_flash_params {
const char *name;
@@ -33,101 +34,102 @@ struct spi_flash_params {
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
+ u16 flags;
};
static const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
-
[U-Boot] [RESEND PATCH v2 08/20] sf: probe: Add support for S25FL* flash parts
Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_SPANSION
drivers/mtd/spi/spi_flash_probe.c | 28 +++-
1 file changed, 23 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 347455f..c1daab3 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -53,6 +53,19 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{MX25L12805, 0xc22018, 0x0, 64 * 1024,256},
{MX25L12855E, 0xc22618, 0x0, 64 * 1024,256},
#endif
+#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
+ {S25FL008A, 0x010213, 0x0, 64 * 1024, 16},
+ {S25FL016A, 0x010214, 0x0, 64 * 1024, 32},
+ {S25FL032A, 0x010215, 0x0, 64 * 1024, 64},
+ {S25FL064A, 0x010216, 0x0, 64 * 1024,128},
+ {S25FL128P_256K, 0x012018, 0x0300, 256 * 1024, 64},
+ {S25FL128P_64K, 0x012018, 0x0301, 64 * 1024,256},
+ {S25FL032P, 0x010215, 0x4d00, 64 * 1024, 64},
+ {S25FL064P, 0x010216, 0x4d00, 64 * 1024,128},
+ {S25FL128S_64K, 0x012018, 0x4d01, 64 * 1024,256},
+ {S25FL256S_64K, 0x010219, 0x4d01, 64 * 1024,512},
+ {S25FL512S_64K, 0x010220, 0x4d01, 64 * 1024, 1024},
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{M25P10, 0x202011, 0x0, 32 * 1024, 4},
{M25P20, 0x202012, 0x0, 64 * 1024, 4},
@@ -98,6 +111,7 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
/*
* Note:
* Below paired flash devices has similar spi_flash_params params.
+* (S25FL129P_64K, S25FL128S_64K)
* (W25Q80BL, W25Q80BV)
* (W25Q16CL, W25Q16DV)
* (W25Q32BV, W25Q32FV_SPI)
@@ -111,7 +125,6 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
* TODO:
* ATMEL
* RAMTRON
-* SPANSION
* SST
*/
};
@@ -122,19 +135,24 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
struct spi_flash *flash;
int i;
u16 jedec = idcode[1] 8 | idcode[2];
+ u16 ext_jedec = idcode[3] 8 | idcode[4];
- /* Get the flash id (jedec = manuf_id + dev_id) */
+ /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
for (i = 0; i ARRAY_SIZE(spi_flash_params_table); i++) {
params = spi_flash_params_table[i];
if ((params-jedec 16) == idcode[0]) {
- if (((params-jedec 16) 16) == jedec)
+ if (((params-jedec 16) 16) == jedec) {
+ if ((params-ext_jedec != 0)
+ (params-ext_jedec == ext_jedec))
+ continue;
break;
+ }
}
}
if (i == ARRAY_SIZE(spi_flash_params_table)) {
- printf(SF: Unsupported flash ID: manuf %02x, jedec %04x\n,
- idcode[0], jedec);
+ printf(SF: Unsupported flash ID: manuf %02x, jedec %04x
+ ext_jedec %04x\n, idcode[0], jedec, ext_jedec);
return NULL;
}
--
1.8.3
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[U-Boot] [RESEND PATCH v2 10/20] sf: probe: Add support for AT45DB* flash parts
Added AT45DB* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_ATMEL
drivers/mtd/spi/spi_flash_probe.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 34e7ca1..948fcdb 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -36,6 +36,15 @@ struct spi_flash_params {
};
static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
+ {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4},
+ {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8},
+ {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8},
+ {AT45DB081D, 0x1f2500, 0x0, 64 * 1024, 16},
+ {AT45DB161D, 0x1f2600, 0x0, 64 * 1024, 32},
+ {AT45DB321D, 0x1f2700, 0x0, 64 * 1024, 64},
+ {AT45DB641D, 0x1f2800, 0x0, 64 * 1024,128},
+#endif
#ifdef CONFIG_SPI_FLASH_EON/* EON */
{EN25Q32B,0x1c3016, 0x0, 64 * 1024, 64},
{EN25Q128B, 0x1c3018, 0x0, 64 * 1024,256},
@@ -135,7 +144,6 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
*/
/*
* TODO:
-* ATMEL
* RAMTRON
*/
};
--
1.8.3
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank
On Tue, Aug 6, 2013 at 12:50 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 08/06/2013 05:37 AM, Wolfgang Denk wrote: Dear Rob Herring, In message CAL_JsqJTg4CVfk0o9hLd4ZVksj+DNEsKLjcv6T7-6F-=br+...@mail.gmail.com you wrote: Why would you ever want to compile this into U-Boot at all? Then any changes you need to make mean compiling and installing a new U-Boot, which is something you normally don't want to do. You may want to have factory default and user settings. Building in the factory settings would be one way to accomplish that. No. Handling these independently, outside of the compiled U-Boot image is as easy, and much more flexible. U-Boot is perfectly able to import such settings from text files (or text blobs stored somewhere, even attached to the U-Boot image, if you want), so just use the text files separately, instead of hard compiling them into the code. In my case, I don't want to compile the environment into u-boot. But some people do as I copied my scripts from Tegra which has them built-in. We have the *default* environment built-in, which is used when no valid environment is found in flash. If there's an environment in flash, it gets used rather than the built-in default. How can someone 'overwrite' the default environment from system or when generating a FIT image? I am interested in let my customers to revert back to a sane default running: env -f -d -a saveenv -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://projetos.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 06/20] sf: probe: Add support for MX25L* flash parts
Added MX25L* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_MACRONIX
drivers/mtd/spi/spi_flash_probe.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 21cd483..1544ab7 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -44,6 +44,15 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{GD25Q64B,0xc84017, 0x0, 64 * 1024,128},
{GD25LQ32,0xc86016, 0x0, 64 * 1024, 64},
#endif
+#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
+ {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8},
+ {MX25L8005, 0xc22014, 0x0, 64 * 1024, 16},
+ {MX25L1605D, 0xc22015, 0x0, 64 * 1024, 32},
+ {MX25L3205D, 0xc22016, 0x0, 64 * 1024, 64},
+ {MX25L6405D, 0xc22017, 0x0, 64 * 1024,128},
+ {MX25L12805, 0xc22018, 0x0, 64 * 1024,256},
+ {MX25L12855E, 0xc22618, 0x0, 64 * 1024,256},
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{M25P10, 0x202011, 0x0, 32 * 1024, 4},
{M25P20, 0x202012, 0x0, 64 * 1024, 4},
@@ -69,7 +78,6 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
/*
* TODO:
* ATMEL
-* MACRONIX
* RAMTRON
* SPANSION
* SST
--
1.8.3
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[U-Boot] [RESEND PATCH v2 17/20] sf: Add proper comment style on spi_flash structure
Added proper comment style on spi_flash structure to make
more readable.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
- none
include/spi_flash.h | 63 +
1 file changed, 35 insertions(+), 28 deletions(-)
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 14e4ae2..34a167b 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -37,39 +37,46 @@
# define CMD_SST_AAI_WP0xAD/* Auto Address Incr Word
Program */
#endif
+/**
+ * struct spi_flash - SPI flash structure
+ *
+ * @spi: SPI slave
+ * @name: Name of SPI flash
+ * @size: Total flash size
+ * @page_size: Write (page) size
+ * @sector_size: Sector size
+ * @erase_size:Erase size
+ * @bank_read_cmd: Bank read cmd
+ * @bank_write_cmd:Bank write cmd
+ * @bank_curr: Current flash bank
+ * @poll_cmd: Poll cmd - for flash erase/program
+ * @erase_cmd: Erase cmd 4K, 32K, 64K
+ * @memory_map:Address of read-only SPI flash access
+ * @read: Flash read ops
+ * @write: Flash write ops
+ * @erase: Flash erase ops
+ */
struct spi_flash {
struct spi_slave *spi;
+ const char *name;
- const char *name;
-
- /* Total flash size */
- u32 size;
- /* Write (page) size */
- u32 page_size;
- /* Sector size */
- u32 sector_size;
- /* Erase size */
- u32 erase_size;
+ u32 size;
+ u32 page_size;
+ u32 sector_size;
+ u32 erase_size;
#ifdef CONFIG_SPI_FLASH_BAR
- /* Bank read cmd */
- u8 bank_read_cmd;
- /* Bank write cmd */
- u8 bank_write_cmd;
- /* Current flash bank */
- u8 bank_curr;
+ u8 bank_read_cmd;
+ u8 bank_write_cmd;
+ u8 bank_curr;
#endif
- /* Poll cmd - for flash erase/program */
- u8 poll_cmd;
- /* Erase cmd 4K, 32K, 64K */
- u8 erase_cmd;
-
- void *memory_map; /* Address of read-only SPI flash access */
- int (*read)(struct spi_flash *flash, u32 offset,
- size_t len, void *buf);
- int (*write)(struct spi_flash *flash, u32 offset,
- size_t len, const void *buf);
- int (*erase)(struct spi_flash *flash, u32 offset,
- size_t len);
+ u8 poll_cmd;
+ u8 erase_cmd;
+
+ void *memory_map;
+ int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
+ int (*write)(struct spi_flash *flash, u32 offset, size_t len,
+ const void *buf);
+ int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
};
/**
--
1.8.3
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