Re: [U-Boot] [PATCHv2 5/8] drivers: mtd: spi: Modify read/write command for sfl256s flash.

2013-08-06 Thread Sourav Poddar

Hi Jagan,
On Wednesday 31 July 2013 12:23 PM, Sourav Poddar wrote:

Hi Jagan,
On Tuesday 23 July 2013 07:53 PM, Sourav Poddar wrote:

+ jagan,

On Tuesday 23 July 2013 02:29 PM, Sourav Poddar wrote:

Reading using the already supported read command is causing regression
after 4k bytes, as a result doing a page by page read. Its 
happening, because

ti qpsi controller CS will get de asserted after 4096 bytes.

Signed-off-by: Sourav Poddar
---
  drivers/mtd/spi/spi_flash.c |   32 +++-
  1 files changed, 31 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 6a6fe37..5f8db7b 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash 
*flash, u32 offset,

  else
  read_len = remain_len;

+#ifdef CONFIG_TI_QSPI
+unsigned long page_addr, byte_addr, page_size;
+size_t chunk_len, actual;
+int ret = 0;
+
+page_size = flash->page_size;
+page_addr = offset / page_size;
+byte_addr = offset % page_size;
+
+for (actual = 0; actual<  read_len; actual += chunk_len) {
+chunk_len = min(read_len - actual, page_size - byte_addr);
+
+cmd[1] = page_addr>>  8;
+cmd[2] = page_addr;
+cmd[3] = byte_addr;
+
+ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+data + actual, chunk_len);
+if (ret<  0) {
+debug("SF: read failed");
+break;
+}
+
+byte_addr += chunk_len;
+if (byte_addr == page_size) {
+page_addr++;
+byte_addr = 0;
+}
+}
+#else
  spi_flash_addr(offset, cmd);

  ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash 
*flash, u32 offset,

  debug("SF: read failed\n");
  break;
  }
-
+#endif
  offset += read_len;
  len -= read_len;
  data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted 
automatically.
As a result of this bottleneck, I am not able to use the current use 
read api in mtd framework.
This requires me to send the read command every time in range upto 
4096 bytes only.


To overcome this, I have updated the mtd read based on TI_QSPI config 
as done above.


[Jagan]:
Do you have any suggestion of dealing this in a better way?
I don't see a way to get around this apart from updating mtd read 
depending on TI_QSPI config.



Any inputs on this?



Any suggestions on the patch?
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[U-Boot] [PATCH] RFC: tegra: Avoid using I2C prior to relocation

2013-08-06 Thread Simon Glass
Tegra recently moved to the new I2C framework, which sets up I2C prior to
relocation, and prior to calling i2c_init_board(). This causes a crash on
Tegra boards.

note:

There are many ways to fix this. I believe this is one. It disables i2c_init()
until relocation is complete. I have been unable to test it so far due to
problems getting my Seaboard to work. I will try another Tegra board, but
send this for comment in the meantime.

Signed-off-by: Simon Glass 
---
 drivers/i2c/tegra_i2c.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 9ac3969..9847cf1 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -453,6 +453,10 @@ void i2c_init_board(void)
 
 static void tegra_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 {
+   /* No i2c support prior to relocation */
+   if (!(gd->flags & GD_FLG_RELOC))
+   return;
+
/* This will override the speed selected in the fdt for that port */
debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr);
i2c_set_bus_speed(speed);
-- 
1.8.3

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Re: [U-Boot] u-boot.2013.07 build fails: serial_puts() undefined.

2013-08-06 Thread Fabio Estevam
On Tue, Aug 6, 2013 at 8:18 PM, Randy Graham  wrote:
> Hello,
>
> I am building u-boot.2013.07 for the mx28evk board.
>
> After I insert a few 'serial_puts()' calls for debugging, the build fails
> and complains that serial_puts() is undefined.

Just add this include:

#include 
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[U-Boot] u-boot.2013.07 build fails: serial_puts() undefined.

2013-08-06 Thread Randy Graham
Hello,

I am building u-boot.2013.07 for the mx28evk board.

After I insert a few 'serial_puts()' calls for debugging, the build fails
and complains that serial_puts() is undefined.

I did not have this problem with u-boot.2013.01.

Do I need to add a specific #define to include serial_puts() ?
I tried adding '#define DEBUG' to include/common.h' with no luck.

I have looked through the source code but can't figure out what's wrong.

Thanks for any help,

-Randy
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[U-Boot] setenv only works in command line. Not working when called in the code

2013-08-06 Thread Julyberry
Hello,

I am adding a new library which is being called in common/main.c.

In that library, I am updating U-Boot environment variables which are
accessed from Linux as well.

While getenv() always works fine, but setenv() does not work. The value is
not updated. 
setenv works correctly if I use it in u-boot command line or fw_setenv in
Linux.

I also tried to use run_command(). I actually get result, 0 which means
success. however, the value is still not updated when the device finally
boots up in Linux. 
I also use 'fsload' command in my library with run_command(). That works
fine.

Can someone help with this?

Thanks a lot.



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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Dennis Gilmore
On Tue, 6 Aug 2013 17:42:31 -0400
Tom Rini  wrote:

> On Tue, Aug 06, 2013 at 11:22:22AM -0500, Dennis Gilmore wrote:
> 
> [snip]
> > The only way I could see having us write a file to disk with the
> > environment working is if all boards implement standard variable to
> > define the memory locations and that is compiled into the u-boot
> > binary.
> > 
> > some variables that would need to be compiled in 
> > 
> > fdt_addr
> > fdt_addr_r
> 
> Why two?
from cmd_pxe.c
/*
 * fdt usage is optional:
 * It handles the following scenarios. All scenarios are exclusive
 *
 * Scenario 1: If fdt_addr_r specified and "fdt" label is defined in
 * pxe file, retrieve fdt blob from server. Pass fdt_addr_r to bootm,
 * and adjust argc appropriately.
 *
 * Scenario 2: If there is an fdt_addr specified, pass it along to
 * bootm, and adjust argc appropriately.
 *
 * Scenario 3: fdt blob is not available.
 */

u-boot by default would load a dtb to fdt_addr but a user could at
least in the pxe/extlinux case load their own dtb if the want/need to.

the only way a dtb would be optional is if fdtfile is not set 

> > kernel_addr_r
> > ramdisk_addr_r
> > pxefile_addr_r
> > scr_addr_r
> > uenv_addr_r
> > 
> > this should allow for for people to use boot.scr uEnv.txt or
> > pxe/extlinux 
> 
> This is what I think we need to work towards.  A board opting into
> this standard must set CONFIG_CMD_A/B/C (or maybe we add a
> CONFIG_SUPPORT_GENERIC_LINUX_DISTRO that does this in one of the
> fallback files, whatever) and provide the following variables PLUS a,
> and this needs some thinking I think, auto-boot tries to load said
> file from ... ?
> 
> We cannot provide a built-in environment that works for every distro
> and case, we want the distro to tell us things it knows, and we'll
> tell it what it can't easily know.

we absolutely can, I would like for u-boot to load a dtb before doing
anything. u-boot should know what devices can be booted from and likely
an order of preference. i.e. removable media through to fixed, and
finally pxe. 

i would like for u-boot to first try to
load /boot/extlinux/extlinux.conf then /extlinux/extlinux.conf 
failing that try to load a /boot/uEnv.txt then /uEnv.txt and import that
running with what is in it, then falling back to a /boot/boot.scr
then /boot.scr then finally running dhcp, pxe get, and pxe boot.

its then up to the distro to provide one of the 3 configs to boot. or
the system falls back to pxe and a network boot/install is done.

Dennis
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Otavio Salvador
On Tue, Aug 6, 2013 at 6:37 PM, Tom Rini  wrote:
> On Tue, Aug 06, 2013 at 01:58:22PM -0300, Otavio Salvador wrote:
>> On Tue, Aug 6, 2013 at 1:54 PM, Stephen Warren  wrote:
>> >> How can someone 'overwrite' the default environment from system or
>> >> when generating a FIT image?
>> >
>> > If U-Boot is running, you can get back to the default environment by
>> > running exactly the commands you wrote below.
>> >
>> > If you're flashing U-Boot, you could force it to use the default
>> > environment when it boots by erasing/corrupting the copy of the
>> > environment that's stored in flash (or wherever ENV_IS points) at the
>> > same time that you flash the new U-Boot binary.
>> >
>> > The question of how to get the default environment when generating a FIT
>> > image doesn't make sense; generating a FIT image of something (kernel,
>> > initrd, DTB?) is entirely unrelated to the environment content that
>> > U-Boot uses when running.
>>
>> Ok but when I do env -f -d -a it uses the built-in environment as
>> default. How can I 'change' this default without rebuilding U-Boot
>> binary?
>
> What you want (and I'm not saying this works today) would be:
> load ... $addr otavios-sane-env.txt
> env import -t --reset-to $addr
>
> Where --reset-to cleared the current environment and set it to only the
> valid env found at $addr.

and a way to do it from build host (OE, for example) without from runtime.

-- 
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Otavio Salvador
On Tue, Aug 6, 2013 at 6:37 PM, Tom Rini  wrote:
> On Tue, Aug 06, 2013 at 01:58:22PM -0300, Otavio Salvador wrote:
>> On Tue, Aug 6, 2013 at 1:54 PM, Stephen Warren  wrote:
>> >> How can someone 'overwrite' the default environment from system or
>> >> when generating a FIT image?
>> >
>> > If U-Boot is running, you can get back to the default environment by
>> > running exactly the commands you wrote below.
>> >
>> > If you're flashing U-Boot, you could force it to use the default
>> > environment when it boots by erasing/corrupting the copy of the
>> > environment that's stored in flash (or wherever ENV_IS points) at the
>> > same time that you flash the new U-Boot binary.
>> >
>> > The question of how to get the default environment when generating a FIT
>> > image doesn't make sense; generating a FIT image of something (kernel,
>> > initrd, DTB?) is entirely unrelated to the environment content that
>> > U-Boot uses when running.
>>
>> Ok but when I do env -f -d -a it uses the built-in environment as
>> default. How can I 'change' this default without rebuilding U-Boot
>> binary?
>
> What you want (and I'm not saying this works today) would be:
> load ... $addr otavios-sane-env.txt
> env import -t --reset-to $addr
>
> Where --reset-to cleared the current environment and set it to only the
> valid env found at $addr.

-- 
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Tom Rini
On Tue, Aug 06, 2013 at 11:22:22AM -0500, Dennis Gilmore wrote:

[snip]
> The only way I could see having us write a file to disk with the
> environment working is if all boards implement standard variable to
> define the memory locations and that is compiled into the u-boot binary.
> 
> some variables that would need to be compiled in 
> 
> fdt_addr
> fdt_addr_r

Why two?

> kernel_addr_r
> ramdisk_addr_r
> pxefile_addr_r
> scr_addr_r
> uenv_addr_r
> 
> this should allow for for people to use boot.scr uEnv.txt or
> pxe/extlinux 

This is what I think we need to work towards.  A board opting into this
standard must set CONFIG_CMD_A/B/C (or maybe we add a
CONFIG_SUPPORT_GENERIC_LINUX_DISTRO that does this in one of the
fallback files, whatever) and provide the following variables PLUS a,
and this needs some thinking I think, auto-boot tries to load said file
from ... ?

We cannot provide a built-in environment that works for every distro and
case, we want the distro to tell us things it knows, and we'll tell it
what it can't easily know.

-- 
Tom


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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Tom Rini
On Tue, Aug 06, 2013 at 01:58:22PM -0300, Otavio Salvador wrote:
> On Tue, Aug 6, 2013 at 1:54 PM, Stephen Warren  wrote:
> >> How can someone 'overwrite' the default environment from system or
> >> when generating a FIT image?
> >
> > If U-Boot is running, you can get back to the default environment by
> > running exactly the commands you wrote below.
> >
> > If you're flashing U-Boot, you could force it to use the default
> > environment when it boots by erasing/corrupting the copy of the
> > environment that's stored in flash (or wherever ENV_IS points) at the
> > same time that you flash the new U-Boot binary.
> >
> > The question of how to get the default environment when generating a FIT
> > image doesn't make sense; generating a FIT image of something (kernel,
> > initrd, DTB?) is entirely unrelated to the environment content that
> > U-Boot uses when running.
> 
> Ok but when I do env -f -d -a it uses the built-in environment as
> default. How can I 'change' this default without rebuilding U-Boot
> binary?

What you want (and I'm not saying this works today) would be:
load ... $addr otavios-sane-env.txt
env import -t --reset-to $addr

Where --reset-to cleared the current environment and set it to only the
valid env found at $addr.

-- 
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Re: [U-Boot] [RESEND PATCH v2 08/20] sf: probe: Add support for S25FL* flash parts

2013-08-06 Thread Wolfgang Denk
Dear Jagan,

In message <64c2a6cb-98f6-4cde-a615-ecd37a96b...@db8ehsmhs012.ehs.local> you 
wrote:
>
> > Checkpatch reports:
> >
> > WARNING: quoted string split across lines
> > #194: FILE: drivers/mtd/spi/spi_flash_probe.c:155:
> > +   printf("SF: Unsupported flash ID: manuf %02x, jedec %04x "
> > +  "ext_jedec %04x\n", idcode[0], jedec, ext_jedec);
> 
> Yes I knew this.
> Any better way we handle " quoted string split across lines" w.r.t recent 
> codes.
> Request for suggestion.

Well, do not split the string.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Stephen Warren
On 08/06/2013 10:22 AM, Dennis Gilmore wrote:
...
> some variables that would need to be compiled in 
> 
> fdt_addr
> fdt_addr_r
> kernel_addr_r
> ramdisk_addr_r

Those all look standard, and are documented in U-Boot's README.

> pxefile_addr_r
> scr_addr_r
> uenv_addr_r

But none of those are, the first only appears in one config file in the
U-Boot source tree, and the second two not at all.

I assume scr_addr_r is where boot.scr/... should be loaded? Some config
files appear to use script_addr/script_addr2/scriptaddr for that.
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Re: [U-Boot] [PATCH 05/10] arm: spl: For Falcon Mode, set a default machid of ~0

2013-08-06 Thread Dan Murphy
Tom
On 08/06/2013 02:10 PM, Tom Rini wrote:
> On Tue, Aug 06, 2013 at 01:28:53PM -0500, Dan Murphy wrote:
>> On 08/02/2013 03:26 PM, Tom Rini wrote:
>>> With device trees, boards do not always set CONFIG_MACH_TYPE now, so we
>>> must not rely on this define being set.  The kernel uses ~0 to see if we
>>> have a valid machine number or not, so set that as the default, invalid
>>> machine, id and only fix if CONFIG_MACH_TYPE is set.
>>>
>>> Cc: Albert ARIBAUD 
>>> Signed-off-by: Tom Rini 
>>> ---
>>>  arch/arm/lib/spl.c |7 ++-
>>>  1 file changed, 6 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
>>> index 583bdb3..26d0be4 100644
>>> --- a/arch/arm/lib/spl.c
>>> +++ b/arch/arm/lib/spl.c
>>> @@ -45,12 +45,17 @@ void __weak board_init_f(ulong dummy)
>>>  #ifdef CONFIG_SPL_OS_BOOT
>>>  void __noreturn jump_to_image_linux(void *arg)
>>>  {
>>> +   unsigned long machid = 0x;
>>> +#ifdef CONFIG_MACH_TYPE
>>> +   machid = CONFIG_MACH_TYPE;
>>> +#endif
>>> +
>>> debug("Entering kernel arg pointer: 0x%p\n", arg);
>>> typedef void (*image_entry_arg_t)(int, int, void *)
>>> __attribute__ ((noreturn));
>>> image_entry_arg_t image_entry =
>>> (image_entry_arg_t) spl_image.entry_point;
>>> cleanup_before_linux();
>>> -   image_entry(0, CONFIG_MACH_TYPE, arg);
>>> +   image_entry(0, machid, arg);
>>>  }
>>>  #endif
>> The code looks fine just don't see how it is part of the "common"
>> patch set series
> Uncovered porting omap5 platforms over as they do not set
> CONFIG_MACH_TYPE (and no need to start).
>
Good find.

Reviewed-by: Dan Murphy 

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Re: [U-Boot] [RESEND PATCH v2 08/20] sf: probe: Add support for S25FL* flash parts

2013-08-06 Thread Jagan Teki
Hi Wolfgang Denk,

On Wed, Aug 7, 2013 at 1:19 AM, Wolfgang Denk  wrote:
> Dear Jagannadha Sutradharudu Teki,
>
> In message <90b1d9f1-4c63-43c6-989f-55a657168...@tx2ehsmhs011.ehs.local> you 
> wrote:
>> Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c.
>>
>> Updated the sector_size attributes as per the flash parts.
>> Looks fine for with this sector_size for computing the size
>> of flash.
>>
>> Signed-off-by: Jagannadha Sutradharudu Teki 
>> ---
>> Changes for v2:
>>   - Enable CONFIG_SPI_FLASH_SPANSION
>
> Checkpatch reports:
>
> WARNING: quoted string split across lines
> #194: FILE: drivers/mtd/spi/spi_flash_probe.c:155:
> +   printf("SF: Unsupported flash ID: manuf %02x, jedec %04x "
> +  "ext_jedec %04x\n", idcode[0], jedec, ext_jedec);
>

Yes I knew this.
Any better way we handle " quoted string split across lines" w.r.t recent codes.
Request for suggestion.

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Re: [U-Boot] [RESEND PATCH v2 08/20] sf: probe: Add support for S25FL* flash parts

2013-08-06 Thread Wolfgang Denk
Dear Jagannadha Sutradharudu Teki,

In message <90b1d9f1-4c63-43c6-989f-55a657168...@tx2ehsmhs011.ehs.local> you 
wrote:
> Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c.
> 
> Updated the sector_size attributes as per the flash parts.
> Looks fine for with this sector_size for computing the size
> of flash.
> 
> Signed-off-by: Jagannadha Sutradharudu Teki 
> ---
> Changes for v2:
>   - Enable CONFIG_SPI_FLASH_SPANSION

Checkpatch reports:

WARNING: quoted string split across lines
#194: FILE: drivers/mtd/spi/spi_flash_probe.c:155:
+   printf("SF: Unsupported flash ID: manuf %02x, jedec %04x "
+  "ext_jedec %04x\n", idcode[0], jedec, ext_jedec);


Please fix!

Thanks.

Wolfgang Denk

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[U-Boot] [PATCH v2 3/3] zynq: Enable CONFIG_ZYNQ_SPI

2013-08-06 Thread Jagannadha Sutradharudu Teki
Tested spi on zynq board with sst flash by enabling
CONFIG_ZYNQ_SPI.

sf probe 1:1 0 0
SF: Detected SST25WF080 with page size 4 KiB, total 1 MiB

Signed-off-by: Jagannadha Sutradharudu Teki 
Acked-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
---
Changes for v2:
- CONFIG_CMD_SPI removed, not tested as of now

 include/configs/zynq.h | 9 +
 1 file changed, 9 insertions(+)

diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 79fa5bb..b9f381f 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -72,6 +72,15 @@
 # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
 #endif
 
+#define CONFIG_ZYNQ_SPI
+
+/* SPI */
+#ifdef CONFIG_ZYNQ_SPI
+# define CONFIG_SPI_FLASH
+# define CONFIG_SPI_FLASH_SST
+# define CONFIG_CMD_SF
+#endif
+
 /* Enable the PL to be downloaded */
 #define CONFIG_FPGA
 #define CONFIG_FPGA_XILINX
-- 
1.8.3


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[U-Boot] [PATCH v2 2/3] sf: sst: Add support for SST25WF080

2013-08-06 Thread Jagannadha Sutradharudu Teki
Add support for SST25WF080 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
Signed-off-by: Michal Simek 
---
Changes for v2:
- none

 drivers/mtd/spi/sst.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/mtd/spi/sst.c b/drivers/mtd/spi/sst.c
index c9dec3c52..256867c 100644
--- a/drivers/mtd/spi/sst.c
+++ b/drivers/mtd/spi/sst.c
@@ -99,6 +99,12 @@ static const struct sst_spi_flash_params 
sst_spi_flash_table[] = {
.nr_sectors = 128,
.name = "SST25WF040",
},
+   {
+   .idcode1 = 0x05,
+   .flags = SST_FEAT_WP,
+   .nr_sectors = 256,
+   .name = "SST25WF080",
+   },
 };
 
 static int
-- 
1.8.3


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[U-Boot] [PATCH v2 0/3] spi: Add zynq spi controller

2013-08-06 Thread Jagannadha Sutradharudu Teki
This is a v2 for previous series with same cover head.

This small series patchset will add suuport for zynq spi
controller, tested on sst flash.

--
Thanks,
Jagan.

Jagannadha Sutradharudu Teki (3):
  spi: Add zynq spi controller driver
  sf: sst: Add support for SST25WF080
  zynq: Enable CONFIG_ZYNQ_SPI

 arch/arm/include/asm/arch-zynq/hardware.h |   2 +
 drivers/mtd/spi/sst.c |   6 +
 drivers/spi/Makefile  |   1 +
 drivers/spi/zynq_spi.c| 280 ++
 include/configs/zynq.h|   9 +
 5 files changed, 298 insertions(+)
 create mode 100644 drivers/spi/zynq_spi.c

-- 
1.8.3


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[U-Boot] [PATCH v2 1/3] spi: Add zynq spi controller driver

2013-08-06 Thread Jagannadha Sutradharudu Teki
Zynq spi controller driver supports 2 buses and
3 chipselects on each bus.

Signed-off-by: Jagannadha Sutradharudu Teki 
Acked-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
---
Changes for v2:
- Added "Zynq" string on license notes
- Fix coding stlye

 arch/arm/include/asm/arch-zynq/hardware.h |   2 +
 drivers/spi/Makefile  |   1 +
 drivers/spi/zynq_spi.c| 280 ++
 3 files changed, 283 insertions(+)
 create mode 100644 drivers/spi/zynq_spi.c

diff --git a/arch/arm/include/asm/arch-zynq/hardware.h 
b/arch/arm/include/asm/arch-zynq/hardware.h
index 25f0e3d..081624e 100644
--- a/arch/arm/include/asm/arch-zynq/hardware.h
+++ b/arch/arm/include/asm/arch-zynq/hardware.h
@@ -17,6 +17,8 @@
 #define ZYNQ_SDHCI_BASEADDR1   0xE0101000
 #define ZYNQ_I2C_BASEADDR0 0xE0004000
 #define ZYNQ_I2C_BASEADDR1 0xE0005000
+#define ZYNQ_SPI_BASEADDR0 0xE0006000
+#define ZYNQ_SPI_BASEADDR1 0xE0007000
 
 /* Reflect slcr offsets */
 struct slcr_regs {
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 019132e..91d24ce 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -39,6 +39,7 @@ COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
 COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
 COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
 COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
+COBJS-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
new file mode 100644
index 000..5da8759
--- /dev/null
+++ b/drivers/spi/zynq_spi.c
@@ -0,0 +1,280 @@
+/*
+ * (C) Copyright 2013 Inc.
+ *
+ * Xilinx Zynq PS SPI controller driver (master mode only)
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* zynq spi register bit masks ZYNQ_SPI___MASK */
+#define ZYNQ_SPI_CR_MSA_MASK   (1 << 15)   /* Manual start enb */
+#define ZYNQ_SPI_CR_MCS_MASK   (1 << 14)   /* Manual chip select */
+#define ZYNQ_SPI_CR_CS_MASK(0xF << 10) /* Chip select */
+#define ZYNQ_SPI_CR_BRD_MASK   (0x7 << 3)  /* Baud rate div */
+#define ZYNQ_SPI_CR_CPHA_MASK  (1 << 2)/* Clock phase */
+#define ZYNQ_SPI_CR_CPOL_MASK  (1 << 1)/* Clock polarity */
+#define ZYNQ_SPI_CR_MSTREN_MASK(1 << 0)/* Mode select 
*/
+#define ZYNQ_SPI_IXR_RXNEMPTY_MASK (1 << 4)/* RX_FIFO_not_empty */
+#define ZYNQ_SPI_IXR_TXOW_MASK (1 << 2)/* TX_FIFO_not_full */
+#define ZYNQ_SPI_IXR_ALL_MASK  0x7F/* All IXR bits */
+#define ZYNQ_SPI_ENR_SPI_EN_MASK   (1 << 0)/* SPI Enable */
+
+#define ZYNQ_SPI_FIFO_DEPTH128
+#ifndef CONFIG_SYS_ZYNQ_SPI_WAIT
+#define CONFIG_SYS_ZYNQ_SPI_WAIT   (CONFIG_SYS_HZ/100) /* 10 ms */
+#endif
+
+/* zynq spi register set */
+struct zynq_spi_regs {
+   u32 cr; /* 0x00 */
+   u32 isr;/* 0x04 */
+   u32 ier;/* 0x08 */
+   u32 idr;/* 0x0C */
+   u32 imr;/* 0x10 */
+   u32 enr;/* 0x14 */
+   u32 dr; /* 0x18 */
+   u32 txdr;   /* 0x1C */
+   u32 rxdr;   /* 0x20 */
+};
+
+/* zynq spi slave */
+struct zynq_spi_slave {
+   struct spi_slave slave;
+   struct zynq_spi_regs *base;
+   u8 mode;
+   u8 fifo_depth;
+   u32 speed_hz;
+   u32 input_hz;
+   u32 req_hz;
+};
+
+static inline struct zynq_spi_slave *to_zynq_spi_slave(struct spi_slave *slave)
+{
+   return container_of(slave, struct zynq_spi_slave, slave);
+}
+
+static inline struct zynq_spi_regs *get_zynq_spi_base(int dev)
+{
+   if (dev)
+   return (struct zynq_spi_regs *)ZYNQ_SPI_BASEADDR1;
+   else
+   return (struct zynq_spi_regs *)ZYNQ_SPI_BASEADDR0;
+}
+
+static void zynq_spi_init_hw(struct zynq_spi_slave *zslave)
+{
+   u32 confr;
+
+   /* Disable SPI */
+   writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &zslave->base->enr);
+
+   /* Disable Interrupts */
+   writel(ZYNQ_SPI_IXR_ALL_MASK, &zslave->base->idr);
+
+   /* Clear RX FIFO */
+   while (readl(&zslave->base->isr) &
+   ZYNQ_SPI_IXR_RXNEMPTY_MASK)
+   readl(&zslave->base->rxdr);
+
+   /* Clear Interrupts */
+   writel(ZYNQ_SPI_IXR_ALL_MASK, &zslave->base->isr);
+
+   /* Manual slave select and Auto start */
+   confr = ZYNQ_SPI_CR_MCS_MASK | ZYNQ_SPI_CR_CS_MASK |
+   ZYNQ_SPI_CR_MSTREN_MASK;
+   confr &= ~ZYNQ_SPI_CR_MSA_MASK;
+   writel(confr, &zslave->base->cr);
+
+   /* Enable SPI */
+   writel(ZYNQ_SPI_ENR_SPI_EN_MASK, &zslave->base->enr);
+}
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+   /* 2 bus with 3 chipselect */
+   return bus < 2 && cs < 3;
+}
+
+void spi_cs_activate(struct

Re: [U-Boot] [PATCH 08/10] TI:omap5: Convert to ti_armv7_common.h

2013-08-06 Thread Dan Murphy
Tom
On 08/06/2013 02:13 PM, Tom Rini wrote:
> On Tue, Aug 06, 2013 at 01:37:34PM -0500, Dan Murphy wrote:
>> On 08/02/2013 03:26 PM, Tom Rini wrote:
>>> Update omap5_common.h to use ti_armv7_common.h, and in turn update
>>> dra7xx_evm.h and omap5_uevm.h slightly.  The biggest changes here are
>> The commit headline does not indicate anything about dra7xx.  So
>> dra7xx dev's might over look this change.
> Re-worded.
>
> [snip]
>> Would it be better to split this into two patches? one for OMAP5 and
>> one for dra7xx?
> Can't, would break bisectability (both use omap5_common.h and that's
> where the changes really are, the board changes are largely consistency
> with am335x_evm.h ordering).
>

I am good with the re-word then.

Reviewed-by: Dan Murphy 

-- 
--
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Re: [U-Boot] [RFC PATCH 0/2] Moving ARM DCC from stdio to serial

2013-08-06 Thread Michal Simek
Hi Wolfgang,

On 08/06/2013 06:02 PM, Wolfgang Denk wrote:
> Dear Michal Simek,
> 
> In message  you wrote:
>>
>> I am not sure about this change but it seems to me
>> there shouldn't be any problem to remove stdio
>> support because it can be simple another serial driver
>> which can use serial multi interface.
> 
> Does this not mean we lose the capability to use DCC as console port?

We have done this change based on testing and use case
which are using dcc as console port.
It means with this change we are not loosing any capability of using
dcc port as console.

Can you remember why stdio registration was used in past?

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform




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Re: [U-Boot] [PATCH 09/10] TI:armv7: Enable CONFIG_CMD_SPI

2013-08-06 Thread Jagan Teki
On Wed, Aug 7, 2013 at 12:33 AM, Tom Rini  wrote:
> On Wed, Aug 07, 2013 at 12:25:25AM +0530, Jagan Teki wrote:
>> On 07-08-2013 00:20, Jagan Teki wrote:
>> >On 07-08-2013 00:04, Dan Murphy wrote:
>> >>On 08/02/2013 03:26 PM, Tom Rini wrote:
>> >>>Add the generic "poke the SPI bus" command, with the SPI related
>> >>>defines.
>> >>>
>> >>>Signed-off-by: Tom Rini 
>> >>>---
>> >>>  include/configs/ti_armv7_common.h |1 +
>> >>>  1 file changed, 1 insertion(+)
>> >>>
>> >>>diff --git a/include/configs/ti_armv7_common.h
>> >>>b/include/configs/ti_armv7_common.h
>> >>>index 0734598..88ed85c 100644
>> >>>--- a/include/configs/ti_armv7_common.h
>> >>>+++ b/include/configs/ti_armv7_common.h
>> >>>@@ -75,6 +75,7 @@
>> >>>  /* McSPI IP block */
>> >>>  #define CONFIG_SPI
>> >>>  #define CONFIG_OMAP3_SPI
>> >>>+#define CONFIG_CMD_SPI
>> >>>
>> >>>  /* GPIO block */
>> >>>  #define CONFIG_OMAP_GPIO
>> >>Acked-by: Dan Murphy 
>> >>
>> >
>> >Reviewed-by: Jagannadha Sutradharudu Teki 
>>
>> Applied to u-boot-spi/master
>
> Eh?  It's mostly a TI series, I'll bring it all in via u-boot-ti :)
> Thanks for the Reviewed-by tag.

Sure.!

--
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Re: [U-Boot] [PATCH 08/10] TI:omap5: Convert to ti_armv7_common.h

2013-08-06 Thread Tom Rini
On Tue, Aug 06, 2013 at 01:37:34PM -0500, Dan Murphy wrote:
> On 08/02/2013 03:26 PM, Tom Rini wrote:
> > Update omap5_common.h to use ti_armv7_common.h, and in turn update
> > dra7xx_evm.h and omap5_uevm.h slightly.  The biggest changes here are
> 
> The commit headline does not indicate anything about dra7xx.  So
> dra7xx dev's might over look this change.

Re-worded.

[snip]
> Would it be better to split this into two patches? one for OMAP5 and
> one for dra7xx?

Can't, would break bisectability (both use omap5_common.h and that's
where the changes really are, the board changes are largely consistency
with am335x_evm.h ordering).

-- 
Tom


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Re: [U-Boot] [PATCH 07/10] TI:am33xx: Create common config files for TI ARMv7 platforms, and AM33xx

2013-08-06 Thread Tom Rini
On Tue, Aug 06, 2013 at 01:33:35PM -0500, Dan Murphy wrote:
> On 08/02/2013 03:26 PM, Tom Rini wrote:
> > We create two new files, include/configs/ti_armv7_common.h for all of
> > the common IP blocks and related features / commands we share in
> > virtually all of our platforms.  We then create
> > include/configs/ti_am335x_common.h for everything common to the am335x
> > SoC leaving just the board specific parts to
> > include/configs/ti_am335x_common.h.
[snip]
> > +#ifdef CONFIG_NAND
> > +#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */
> > +#define CONFIG_SPL_NAND_SUPPORT
> > +#define CONFIG_SPL_NAND_BASE
> > +#define CONFIG_SPL_NAND_DRIVERS
> > +#define CONFIG_SPL_NAND_ECC
> > +#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
> > +#define CONFIG_SYS_NAND_U_BOOT_OFFS0x8
> > +#endif
> > +#endif
> 
> Nit pick can you add the /* CONFIG_NOR_BOOT */ so we know what this
> endif is for?

Done.

-- 
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Re: [U-Boot] [PATCH 05/10] arm: spl: For Falcon Mode, set a default machid of ~0

2013-08-06 Thread Tom Rini
On Tue, Aug 06, 2013 at 01:28:53PM -0500, Dan Murphy wrote:
> On 08/02/2013 03:26 PM, Tom Rini wrote:
> > With device trees, boards do not always set CONFIG_MACH_TYPE now, so we
> > must not rely on this define being set.  The kernel uses ~0 to see if we
> > have a valid machine number or not, so set that as the default, invalid
> > machine, id and only fix if CONFIG_MACH_TYPE is set.
> >
> > Cc: Albert ARIBAUD 
> > Signed-off-by: Tom Rini 
> > ---
> >  arch/arm/lib/spl.c |7 ++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
> > index 583bdb3..26d0be4 100644
> > --- a/arch/arm/lib/spl.c
> > +++ b/arch/arm/lib/spl.c
> > @@ -45,12 +45,17 @@ void __weak board_init_f(ulong dummy)
> >  #ifdef CONFIG_SPL_OS_BOOT
> >  void __noreturn jump_to_image_linux(void *arg)
> >  {
> > +   unsigned long machid = 0x;
> > +#ifdef CONFIG_MACH_TYPE
> > +   machid = CONFIG_MACH_TYPE;
> > +#endif
> > +
> > debug("Entering kernel arg pointer: 0x%p\n", arg);
> > typedef void (*image_entry_arg_t)(int, int, void *)
> > __attribute__ ((noreturn));
> > image_entry_arg_t image_entry =
> > (image_entry_arg_t) spl_image.entry_point;
> > cleanup_before_linux();
> > -   image_entry(0, CONFIG_MACH_TYPE, arg);
> > +   image_entry(0, machid, arg);
> >  }
> >  #endif
> The code looks fine just don't see how it is part of the "common"
> patch set series

Uncovered porting omap5 platforms over as they do not set
CONFIG_MACH_TYPE (and no need to start).

-- 
Tom


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Re: [U-Boot] [PATCH 2/3] spi: fsl_espi: Use DIV_ROUND_UP instead of open-coded

2013-08-06 Thread Jagan Teki

On 07-08-2013 00:19, Jagan Teki wrote:

On 12-07-2013 15:11, Axel Lin wrote:

Use DIV_ROUND_UP to simplify the code.

Signed-off-by: Axel Lin 
---
  drivers/spi/fsl_espi.c | 6 ++
  1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index 28609ee..e20ab9f 100644
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -234,15 +234,13 @@ int spi_xfer(struct spi_slave *slave, unsigned
int bitlen, const void *data_out,
slave->bus, slave->cs, *(uint *) dout,
dout, *(uint *) din, din, len);

-num_chunks = data_len / max_tran_len +
-(data_len % max_tran_len ? 1 : 0);
+num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
  while (num_chunks--) {
  if (data_in)
  din = buffer + rx_offset;
  dout = buffer;
  tran_len = min(data_len , max_tran_len);
-num_blks = (tran_len + cmd_len) / 4 +
-((tran_len + cmd_len) % 4 ? 1 : 0);
+num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4);
  num_bytes = (tran_len + cmd_len) % 4;
  fsl->data_len = tran_len + cmd_len;
  spi_cs_activate(slave);



Reviewed-by: Jagannadha Sutradharudu Teki 

--
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Jagan.


Applied to u-boot-spi/master

--
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Re: [U-Boot] [PATCH 09/10] TI:armv7: Enable CONFIG_CMD_SPI

2013-08-06 Thread Tom Rini
On Wed, Aug 07, 2013 at 12:25:25AM +0530, Jagan Teki wrote:
> On 07-08-2013 00:20, Jagan Teki wrote:
> >On 07-08-2013 00:04, Dan Murphy wrote:
> >>On 08/02/2013 03:26 PM, Tom Rini wrote:
> >>>Add the generic "poke the SPI bus" command, with the SPI related
> >>>defines.
> >>>
> >>>Signed-off-by: Tom Rini 
> >>>---
> >>>  include/configs/ti_armv7_common.h |1 +
> >>>  1 file changed, 1 insertion(+)
> >>>
> >>>diff --git a/include/configs/ti_armv7_common.h
> >>>b/include/configs/ti_armv7_common.h
> >>>index 0734598..88ed85c 100644
> >>>--- a/include/configs/ti_armv7_common.h
> >>>+++ b/include/configs/ti_armv7_common.h
> >>>@@ -75,6 +75,7 @@
> >>>  /* McSPI IP block */
> >>>  #define CONFIG_SPI
> >>>  #define CONFIG_OMAP3_SPI
> >>>+#define CONFIG_CMD_SPI
> >>>
> >>>  /* GPIO block */
> >>>  #define CONFIG_OMAP_GPIO
> >>Acked-by: Dan Murphy 
> >>
> >
> >Reviewed-by: Jagannadha Sutradharudu Teki 
> 
> Applied to u-boot-spi/master

Eh?  It's mostly a TI series, I'll bring it all in via u-boot-ti :)
Thanks for the Reviewed-by tag.

-- 
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Re: [U-Boot] [PATCH v3 1/2] cmd_sf: let "sf update" erase last sector as a whole

2013-08-06 Thread Jagan Teki

On 07-08-2013 00:27, Jagan Teki wrote:

On 04-07-2013 00:03, Gerlando Falauto wrote:

make "sf update" work with unaligned `len' parameter, by deleting the
whole last sector before writing, so to allow for:

  sf update ${load_addr_r} 0 ${filesize}

Signed-off-by: Gerlando Falauto 
Cc: Valentin Longchamp 
Cc: Holger Brunck 
Acked-by: Simon Glass 
---
  common/cmd_sf.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index 19b0dc9..ab35a94 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -160,7 +160,8 @@ static const char *spi_flash_update_block(struct
spi_flash *flash, u32 offset,
  *skipped += len;
  return NULL;
  }
-if (spi_flash_erase(flash, offset, len))
+/* Erase the entire sector */
+if (spi_flash_erase(flash, offset, flash->sector_size))
  return "erase";
  if (spi_flash_write(flash, offset, len, buf))
  return "write";


Reviewed-by: Jagannadha Sutradharudu Teki 

--
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Jagan.


Applied to u-boot-spi/master

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Re: [U-Boot] [RESEND PATCH v2 0/6] sf: Code cleanup patch set

2013-08-06 Thread Jagan Teki

On 04-08-2013 11:18, Jagannadha Sutradharudu Teki wrote:

This patch set consist of code clean-up on sf.

Thanks,
Jagan.

Jagannadha Sutradharudu Teki (6):
   sf: eon|spansion|ramtron: Fix code cleanup
   sf: sst: Fix code cleanup
   sf: stmicro: Fix code cleanup
   sf: Fix code cleanup
   cmd_sf|env_sf: Fix code cleanup
   sf: Fix code cleanups

  common/cmd_sf.c| 27 ++-
  common/env_sf.c|  2 +-
  drivers/mtd/spi/atmel.c| 10 +-
  drivers/mtd/spi/eon.c  |  3 +--
  drivers/mtd/spi/gigadevice.c   |  2 +-
  drivers/mtd/spi/ramtron.c  |  8 +---
  drivers/mtd/spi/spansion.c |  5 +++--
  drivers/mtd/spi/spi_flash.c| 11 ++-
  drivers/mtd/spi/spi_spl_load.c |  2 +-
  drivers/mtd/spi/sst.c  | 34 +-
  drivers/mtd/spi/stmicro.c  | 12 ++--
  drivers/mtd/spi/winbond.c  |  2 +-
  12 files changed, 65 insertions(+), 53 deletions(-)



Applied all to u-boot-spi/master

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Re: [U-Boot] [PATCH v3 1/2] cmd_sf: let "sf update" erase last sector as a whole

2013-08-06 Thread Jagan Teki

On 04-07-2013 00:03, Gerlando Falauto wrote:

make "sf update" work with unaligned `len' parameter, by deleting the
whole last sector before writing, so to allow for:

  sf update ${load_addr_r} 0 ${filesize}

Signed-off-by: Gerlando Falauto 
Cc: Valentin Longchamp 
Cc: Holger Brunck 
Acked-by: Simon Glass 
---
  common/cmd_sf.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index 19b0dc9..ab35a94 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -160,7 +160,8 @@ static const char *spi_flash_update_block(struct spi_flash 
*flash, u32 offset,
*skipped += len;
return NULL;
}
-   if (spi_flash_erase(flash, offset, len))
+   /* Erase the entire sector */
+   if (spi_flash_erase(flash, offset, flash->sector_size))
return "erase";
if (spi_flash_write(flash, offset, len, buf))
return "write";


Reviewed-by: Jagannadha Sutradharudu Teki 

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Re: [U-Boot] [PATCH 3/3] spi: mpc8xxx_spi: Use DIV_ROUND_UP instead of open-coded

2013-08-06 Thread Jagan Teki

On 07-08-2013 00:19, Jagan Teki wrote:

On 12-07-2013 15:12, Axel Lin wrote:

Use DIV_ROUND_UP to simplify the code.

Signed-off-by: Axel Lin 
---
  drivers/spi/mpc8xxx_spi.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 6b0e3b4..c90c0ce 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -93,7 +93,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, const void *dout,
  {
  volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
  unsigned int tmpdout, tmpdin, event;
-int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0);
+int numBlks = DIV_ROUND_UP(bitlen, 32);
  int tm, isRead = 0;
  unsigned char charSize = 32;




Reviewed-by: Jagannadha Sutradharudu Teki 

--
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Applied to u-boot-spi/master

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Re: [U-Boot] [PATCH 09/10] TI:armv7: Enable CONFIG_CMD_SPI

2013-08-06 Thread Jagan Teki

On 07-08-2013 00:20, Jagan Teki wrote:

On 07-08-2013 00:04, Dan Murphy wrote:

On 08/02/2013 03:26 PM, Tom Rini wrote:

Add the generic "poke the SPI bus" command, with the SPI related
defines.

Signed-off-by: Tom Rini 
---
  include/configs/ti_armv7_common.h |1 +
  1 file changed, 1 insertion(+)

diff --git a/include/configs/ti_armv7_common.h
b/include/configs/ti_armv7_common.h
index 0734598..88ed85c 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -75,6 +75,7 @@
  /* McSPI IP block */
  #define CONFIG_SPI
  #define CONFIG_OMAP3_SPI
+#define CONFIG_CMD_SPI

  /* GPIO block */
  #define CONFIG_OMAP_GPIO

Acked-by: Dan Murphy 



Reviewed-by: Jagannadha Sutradharudu Teki 

--
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Applied to u-boot-spi/master

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Re: [U-Boot] [PATCH 09/10] TI:armv7: Enable CONFIG_CMD_SPI

2013-08-06 Thread Jagan Teki

On 07-08-2013 00:04, Dan Murphy wrote:

On 08/02/2013 03:26 PM, Tom Rini wrote:

Add the generic "poke the SPI bus" command, with the SPI related
defines.

Signed-off-by: Tom Rini 
---
  include/configs/ti_armv7_common.h |1 +
  1 file changed, 1 insertion(+)

diff --git a/include/configs/ti_armv7_common.h 
b/include/configs/ti_armv7_common.h
index 0734598..88ed85c 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -75,6 +75,7 @@
  /* McSPI IP block */
  #define CONFIG_SPI
  #define CONFIG_OMAP3_SPI
+#define CONFIG_CMD_SPI

  /* GPIO block */
  #define CONFIG_OMAP_GPIO

Acked-by: Dan Murphy 



Reviewed-by: Jagannadha Sutradharudu Teki 

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Re: [U-Boot] [PATCH 2/3] spi: fsl_espi: Use DIV_ROUND_UP instead of open-coded

2013-08-06 Thread Jagan Teki

On 12-07-2013 15:11, Axel Lin wrote:

Use DIV_ROUND_UP to simplify the code.

Signed-off-by: Axel Lin 
---
  drivers/spi/fsl_espi.c | 6 ++
  1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index 28609ee..e20ab9f 100644
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -234,15 +234,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int 
bitlen, const void *data_out,
  slave->bus, slave->cs, *(uint *) dout,
  dout, *(uint *) din, din, len);

-   num_chunks = data_len / max_tran_len +
-   (data_len % max_tran_len ? 1 : 0);
+   num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
while (num_chunks--) {
if (data_in)
din = buffer + rx_offset;
dout = buffer;
tran_len = min(data_len , max_tran_len);
-   num_blks = (tran_len + cmd_len) / 4 +
-   ((tran_len + cmd_len) % 4 ? 1 : 0);
+   num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4);
num_bytes = (tran_len + cmd_len) % 4;
fsl->data_len = tran_len + cmd_len;
spi_cs_activate(slave);



Reviewed-by: Jagannadha Sutradharudu Teki 

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Re: [U-Boot] [PATCH 3/3] spi: mpc8xxx_spi: Use DIV_ROUND_UP instead of open-coded

2013-08-06 Thread Jagan Teki

On 12-07-2013 15:12, Axel Lin wrote:

Use DIV_ROUND_UP to simplify the code.

Signed-off-by: Axel Lin 
---
  drivers/spi/mpc8xxx_spi.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 6b0e3b4..c90c0ce 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -93,7 +93,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, 
const void *dout,
  {
volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
unsigned int tmpdout, tmpdin, event;
-   int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0);
+   int numBlks = DIV_ROUND_UP(bitlen, 32);
int tm, isRead = 0;
unsigned char charSize = 32;




Reviewed-by: Jagannadha Sutradharudu Teki 

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Re: [U-Boot] [PATCH 08/10] TI:omap5: Convert to ti_armv7_common.h

2013-08-06 Thread Dan Murphy
On 08/02/2013 03:26 PM, Tom Rini wrote:
> Update omap5_common.h to use ti_armv7_common.h, and in turn update
> dra7xx_evm.h and omap5_uevm.h slightly.  The biggest changes here are

The commit headline does not indicate anything about dra7xx.  So dra7xx dev's 
might over look this change.

> that IP blocks which exist on the platform, and had clocks enabled,
> now have the drivers being built as well.
>
> Signed-off-by: Tom Rini 
> ---
>  include/configs/dra7xx_evm.h   |   11 +--
>  include/configs/omap5_common.h |  188 
> +---
>  include/configs/omap5_uevm.h   |8 +-
>  3 files changed, 31 insertions(+), 176 deletions(-)
>
> diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
> index 51be73d..58786ff 100644
> --- a/include/configs/dra7xx_evm.h
> +++ b/include/configs/dra7xx_evm.h
> @@ -12,21 +12,18 @@
>  #ifndef __CONFIG_DRA7XX_EVM_H
>  #define __CONFIG_DRA7XX_EVM_H
>  
> -/* High Level Configuration Options */
> -#define CONFIG_DRA7XX/* in a TI DRA7XX core */
> -#define CONFIG_ENV_IS_NOWHERE/* For now. */
> -
> -#include 
> +#define CONFIG_DRA7XX
>  
> -#define CONFIG_SYS_PROMPT"DRA752 EVM # "
> +#define CONFIG_ENV_IS_NOWHERE/* For now. */
>  
> +#define CONSOLEDEV   "ttyO0"
>  #define CONFIG_CONS_INDEX1
>  #define CONFIG_SYS_NS16550_COM1  UART1_BASE
>  #define CONFIG_BAUDRATE  115200
>  
>  #define CONFIG_SYS_OMAP_ABE_SYSCK
>  
> -#define CONSOLEDEV   "ttyO0"
> +#include 
>  
>  /* CPSW Ethernet */
>  #define CONFIG_CMD_NET
> diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
> index 7dd56cf..469a081 100644
> --- a/include/configs/omap5_common.h
> +++ b/include/configs/omap5_common.h
> @@ -14,106 +14,51 @@
>  #ifndef __CONFIG_OMAP5_COMMON_H
>  #define __CONFIG_OMAP5_COMMON_H
>  
> -/*
> - * High Level Configuration Options
> - */
> -#define CONFIG_OMAP  /* in a TI OMAP core */
> -#define CONFIG_OMAP54XX  /* which is a 54XX */
> -#define CONFIG_OMAP_GPIO
> -
> -/* Get CPU defs */
> -#include 
> -#include 
> -
> -/* Display CPU and Board Info */
> +#define CONFIG_OMAP54XX
>  #define CONFIG_DISPLAY_CPUINFO
>  #define CONFIG_DISPLAY_BOARDINFO
> -
>  #define CONFIG_MISC_INIT_R
> +#define CONFIG_ARCH_CPU_INIT
>  
> -#define CONFIG_OF_LIBFDT
> -#define CONFIG_CMD_BOOTZ
> +#define CONFIG_SYS_CACHELINE_SIZE64
>  
> -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> -#define CONFIG_SETUP_MEMORY_TAGS
> -#define CONFIG_INITRD_TAG
> +/* Use General purpose timer 1 */
> +#define CONFIG_SYS_TIMERBASE GPT2_BASE
> +
> +#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
> +
> +/* Defines for SDRAM init */
> +#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
> +#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
> +#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
> +#endif
> +
> +#ifndef CONFIG_SPL_BUILD
> +#define CONFIG_PALMAS_POWER
> +#endif
> +
> +#include 
> +#include 
>  
> -/*
> - * Size of malloc() pool
> - * Total Size Environment - 128k
> - * Malloc - add 256k
> - */
>  #define CONFIG_ENV_SIZE  (128 << 10)
> -#define CONFIG_SYS_MALLOC_LEN(CONFIG_ENV_SIZE + (256 << 10))
> -/* Vector Base */
> -#define CONFIG_SYS_CA9_VECTOR_BASE   SRAM_ROM_VECT_BASE
>  
> -/*
> - * Hardware drivers
> - */
> +#include 
>  
>  /*
> - * serial port - NS16550 compatible
> + * Hardware drivers
>   */
> -#define V_NS16550_CLK4800
> -
>  #define CONFIG_SYS_NS16550
>  #define CONFIG_SYS_NS16550_SERIAL
>  #define CONFIG_SYS_NS16550_REG_SIZE  (-4)
> -#define CONFIG_SYS_NS16550_CLK   V_NS16550_CLK
> -
> -/* CPU */
> -#define CONFIG_ARCH_CPU_INIT
> -
> -/* I2C  */
> -#define CONFIG_HARD_I2C
> -#define CONFIG_SYS_I2C_SPEED 10
> -#define CONFIG_SYS_I2C_SLAVE 1
> -#define CONFIG_DRIVER_OMAP34XX_I2C
> -#define CONFIG_I2C_MULTI_BUS
> -
> -/* MMC */
> -#define CONFIG_GENERIC_MMC
> -#define CONFIG_MMC
> -#define CONFIG_OMAP_HSMMC
> -#define CONFIG_DOS_PARTITION
> -
> -#define CONFIG_SYS_CONSOLE_IS_IN_ENV
> -
> -/* Flash */
> -#define CONFIG_SYS_NO_FLASH
> -
> -/* Cache */
> -#define CONFIG_SYS_CACHELINE_SIZE64
> -#define CONFIG_SYS_CACHELINE_SHIFT   6
> +#define CONFIG_SYS_NS16550_CLK   4800
>  
> -/* commands to include */
> -#include 
> -
> -/* Enabled commands */
> -#define CONFIG_CMD_EXT2  /* EXT2 Support */
> -#define CONFIG_CMD_FAT   /* FAT support  */
> -#define CONFIG_CMD_I2C   /* I2C serial bus support   */
> -#define CONFIG_CMD_MMC   /* MMC support  */
> -
> -/* Disabled commands */
> +/* Per-SoC commands */
>  #undef CONFIG_CMD_NET
>  #undef CONFIG_CMD_NFS
> -#undef CONFIG_CMD_FPGA   /* FPGA configuration Support   */
> -#undef CONFIG_CMD_IMLS   /* List all found images*/
>  

Re: [U-Boot] [PATCH 08/10] TI:omap5: Convert to ti_armv7_common.h

2013-08-06 Thread Dan Murphy
On 08/02/2013 03:26 PM, Tom Rini wrote:
> Update omap5_common.h to use ti_armv7_common.h, and in turn update
> dra7xx_evm.h and omap5_uevm.h slightly.  The biggest changes here are

The commit headline does not indicate anything about dra7xx.  So dra7xx dev's 
might over look this change.

> that IP blocks which exist on the platform, and had clocks enabled,
> now have the drivers being built as well.
>
> Signed-off-by: Tom Rini 
> ---
>  include/configs/dra7xx_evm.h   |   11 +--
>  include/configs/omap5_common.h |  188 
> +---
>  include/configs/omap5_uevm.h   |8 +-
>  3 files changed, 31 insertions(+), 176 deletions(-)
>
> diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
> index 51be73d..58786ff 100644
> --- a/include/configs/dra7xx_evm.h
> +++ b/include/configs/dra7xx_evm.h
> @@ -12,21 +12,18 @@
>  #ifndef __CONFIG_DRA7XX_EVM_H
>  #define __CONFIG_DRA7XX_EVM_H
>  
> -/* High Level Configuration Options */
> -#define CONFIG_DRA7XX/* in a TI DRA7XX core */
> -#define CONFIG_ENV_IS_NOWHERE/* For now. */
> -
> -#include 
> +#define CONFIG_DRA7XX
>  
> -#define CONFIG_SYS_PROMPT"DRA752 EVM # "
> +#define CONFIG_ENV_IS_NOWHERE/* For now. */
>  
> +#define CONSOLEDEV   "ttyO0"
>  #define CONFIG_CONS_INDEX1
>  #define CONFIG_SYS_NS16550_COM1  UART1_BASE
>  #define CONFIG_BAUDRATE  115200
>  
>  #define CONFIG_SYS_OMAP_ABE_SYSCK
>  
> -#define CONSOLEDEV   "ttyO0"
> +#include 
>  
>  /* CPSW Ethernet */
>  #define CONFIG_CMD_NET
> diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
> index 7dd56cf..469a081 100644
> --- a/include/configs/omap5_common.h
> +++ b/include/configs/omap5_common.h
> @@ -14,106 +14,51 @@
>  #ifndef __CONFIG_OMAP5_COMMON_H
>  #define __CONFIG_OMAP5_COMMON_H
>  
> -/*
> - * High Level Configuration Options
> - */
> -#define CONFIG_OMAP  /* in a TI OMAP core */
> -#define CONFIG_OMAP54XX  /* which is a 54XX */
> -#define CONFIG_OMAP_GPIO
> -
> -/* Get CPU defs */
> -#include 
> -#include 
> -
> -/* Display CPU and Board Info */
> +#define CONFIG_OMAP54XX
>  #define CONFIG_DISPLAY_CPUINFO
>  #define CONFIG_DISPLAY_BOARDINFO
> -
>  #define CONFIG_MISC_INIT_R
> +#define CONFIG_ARCH_CPU_INIT
>  
> -#define CONFIG_OF_LIBFDT
> -#define CONFIG_CMD_BOOTZ
> +#define CONFIG_SYS_CACHELINE_SIZE64
>  
> -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> -#define CONFIG_SETUP_MEMORY_TAGS
> -#define CONFIG_INITRD_TAG
> +/* Use General purpose timer 1 */
> +#define CONFIG_SYS_TIMERBASE GPT2_BASE
> +
> +#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
> +
> +/* Defines for SDRAM init */
> +#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
> +#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
> +#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
> +#endif
> +
> +#ifndef CONFIG_SPL_BUILD
> +#define CONFIG_PALMAS_POWER
> +#endif
> +
> +#include 
> +#include 
>  
> -/*
> - * Size of malloc() pool
> - * Total Size Environment - 128k
> - * Malloc - add 256k
> - */
>  #define CONFIG_ENV_SIZE  (128 << 10)
> -#define CONFIG_SYS_MALLOC_LEN(CONFIG_ENV_SIZE + (256 << 10))
> -/* Vector Base */
> -#define CONFIG_SYS_CA9_VECTOR_BASE   SRAM_ROM_VECT_BASE
>  
> -/*
> - * Hardware drivers
> - */
> +#include 
>  
>  /*
> - * serial port - NS16550 compatible
> + * Hardware drivers
>   */
> -#define V_NS16550_CLK4800
> -
>  #define CONFIG_SYS_NS16550
>  #define CONFIG_SYS_NS16550_SERIAL
>  #define CONFIG_SYS_NS16550_REG_SIZE  (-4)
> -#define CONFIG_SYS_NS16550_CLK   V_NS16550_CLK
> -
> -/* CPU */
> -#define CONFIG_ARCH_CPU_INIT
> -
> -/* I2C  */
> -#define CONFIG_HARD_I2C
> -#define CONFIG_SYS_I2C_SPEED 10
> -#define CONFIG_SYS_I2C_SLAVE 1
> -#define CONFIG_DRIVER_OMAP34XX_I2C
> -#define CONFIG_I2C_MULTI_BUS
> -
> -/* MMC */
> -#define CONFIG_GENERIC_MMC
> -#define CONFIG_MMC
> -#define CONFIG_OMAP_HSMMC
> -#define CONFIG_DOS_PARTITION
> -
> -#define CONFIG_SYS_CONSOLE_IS_IN_ENV
> -
> -/* Flash */
> -#define CONFIG_SYS_NO_FLASH
> -
> -/* Cache */
> -#define CONFIG_SYS_CACHELINE_SIZE64
> -#define CONFIG_SYS_CACHELINE_SHIFT   6
> +#define CONFIG_SYS_NS16550_CLK   4800
>  
> -/* commands to include */
> -#include 
> -
> -/* Enabled commands */
> -#define CONFIG_CMD_EXT2  /* EXT2 Support */
> -#define CONFIG_CMD_FAT   /* FAT support  */
> -#define CONFIG_CMD_I2C   /* I2C serial bus support   */
> -#define CONFIG_CMD_MMC   /* MMC support  */
> -
> -/* Disabled commands */
> +/* Per-SoC commands */
>  #undef CONFIG_CMD_NET
>  #undef CONFIG_CMD_NFS
> -#undef CONFIG_CMD_FPGA   /* FPGA configuration Support   */
> -#undef CONFIG_CMD_IMLS   /* List all found images*/
>  

Re: [U-Boot] [PATCH 09/10] TI:armv7: Enable CONFIG_CMD_SPI

2013-08-06 Thread Dan Murphy
On 08/02/2013 03:26 PM, Tom Rini wrote:
> Add the generic "poke the SPI bus" command, with the SPI related
> defines.
>
> Signed-off-by: Tom Rini 
> ---
>  include/configs/ti_armv7_common.h |1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/include/configs/ti_armv7_common.h 
> b/include/configs/ti_armv7_common.h
> index 0734598..88ed85c 100644
> --- a/include/configs/ti_armv7_common.h
> +++ b/include/configs/ti_armv7_common.h
> @@ -75,6 +75,7 @@
>  /* McSPI IP block */
>  #define CONFIG_SPI
>  #define CONFIG_OMAP3_SPI
> +#define CONFIG_CMD_SPI
>  
>  /* GPIO block */
>  #define CONFIG_OMAP_GPIO
Acked-by: Dan Murphy 

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Re: [U-Boot] [PATCH 10/10] TI:armv7: Enable CONFIG_CMD_GPIO

2013-08-06 Thread Dan Murphy
On 08/02/2013 03:26 PM, Tom Rini wrote:
> Add the generic "poke a GPIO" command, with the GPIO related defines.
>
> Signed-off-by: Tom Rini 
> ---
>  include/configs/ti_armv7_common.h |1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/include/configs/ti_armv7_common.h 
> b/include/configs/ti_armv7_common.h
> index 88ed85c..dc3ff7c 100644
> --- a/include/configs/ti_armv7_common.h
> +++ b/include/configs/ti_armv7_common.h
> @@ -79,6 +79,7 @@
>  
>  /* GPIO block */
>  #define CONFIG_OMAP_GPIO
> +#define CONFIG_CMD_GPIO
>  
>  /*
>   * GPMC NAND block.  We support 1 device and the physical address to
Acked-by: Dan Murphy 

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Re: [U-Boot] [PATCH 07/10] TI:am33xx: Create common config files for TI ARMv7 platforms, and AM33xx

2013-08-06 Thread Dan Murphy
On 08/02/2013 03:26 PM, Tom Rini wrote:
> We create two new files, include/configs/ti_armv7_common.h for all of
> the common IP blocks and related features / commands we share in
> virtually all of our platforms.  We then create
> include/configs/ti_am335x_common.h for everything common to the am335x
> SoC leaving just the board specific parts to
> include/configs/ti_am335x_common.h.
>
> Signed-off-by: Tom Rini 
> ---
>  include/configs/am335x_evm.h   |  233 +++---
>  include/configs/ti_am335x_common.h |   57 +
>  include/configs/ti_armv7_common.h  |  247 
> 
>  3 files changed, 319 insertions(+), 218 deletions(-)
>  create mode 100644 include/configs/ti_am335x_common.h
>  create mode 100644 include/configs/ti_armv7_common.h
>
> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
> index 85c4632..e8f48ba 100644
> --- a/include/configs/am335x_evm.h
> +++ b/include/configs/am335x_evm.h
> @@ -16,43 +16,16 @@
>  #ifndef __CONFIG_AM335X_EVM_H
>  #define __CONFIG_AM335X_EVM_H
>  
> -#define CONFIG_AM33XX
> -#define CONFIG_OMAP
> +#include 
>  
> -#include 
> -
> -#define CONFIG_DMA_COHERENT
> -#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
> -
> -#define CONFIG_ENV_SIZE  (128 << 10) /* 128 KiB */
> -#define CONFIG_SYS_MALLOC_LEN(1024 << 10)
> -#define CONFIG_SYS_LONGHELP  /* undef to save memory */
> -#define CONFIG_SYS_HUSH_PARSER   /* use "hush" command parser */
> -#define CONFIG_SYS_PROMPT"U-Boot# "
> -#define CONFIG_BOARD_LATE_INIT
> -#define CONFIG_SYS_NO_FLASH
>  #define MACH_TYPE_TIAM335EVM 3589/* Until the next sync */
>  #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
>  
> -#define CONFIG_OF_LIBFDT
> -#define CONFIG_CMD_BOOTZ
> -#define CONFIG_CMDLINE_TAG   /* enable passing of ATAGs */
> -#define CONFIG_CMDLINE_EDITING
> -#define CONFIG_STACKSIZE (128 * 1024)
> -#define CONFIG_AUTO_COMPLETE
> -#define CONFIG_SETUP_MEMORY_TAGS
> -#define CONFIG_INITRD_TAG
> -
>  /* Custom script for NOR */
>  #define CONFIG_SYS_LDSCRIPT  "board/ti/am335x/u-boot.lds"
>  
> -#define CONFIG_SYS_CACHELINE_SIZE   64
> -
> -/* commands to include */
> -#include 
> -
> -#define CONFIG_CMD_ASKENV
> -#define CONFIG_VERSION_VARIABLE
> +/* Always 128 KiB env size */
> +#define CONFIG_ENV_SIZE  (128 << 10)
>  
>  #ifdef CONFIG_NAND
>  #define NANDARGS \
> @@ -75,10 +48,8 @@
>  #define NANDARGS ""
>  #endif
>  
> -/* set to negative value for no autoboot */
> -#define CONFIG_BOOTDELAY 1
> -#define CONFIG_ENV_VARS_UBOOT_CONFIG
>  #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
> +
>  #ifndef CONFIG_SPL_BUILD
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   "loadaddr=0x8020\0" \
> @@ -196,60 +167,11 @@
>   "run mmcboot;" \
>   "run nandboot;"
>  
> -/* Clock Defines */
> -#define V_OSCK   2400  /* Clock output from 
> T2 */
> -#define V_SCLK   (V_OSCK)
> -
> -#define CONFIG_CMD_ECHO
> -
> -/* We set the max number of command args high to avoid HUSH bugs. */
> -#define CONFIG_SYS_MAXARGS   64
> -
> -/* Console I/O Buffer Size */
> -#define CONFIG_SYS_CBSIZE512
> -
> -/* Print Buffer Size */
> -#define CONFIG_SYS_PBSIZE(CONFIG_SYS_CBSIZE \
> - + sizeof(CONFIG_SYS_PROMPT) + 16)
> -
> -/* Boot Argument Buffer Size */
> -#define CONFIG_SYS_BARGSIZE  CONFIG_SYS_CBSIZE
> -
> -/*
> - * memtest works on 8 MB in DRAM after skipping 32MB from
> - * start addr of ram disk
> - */
> -#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
> -#define CONFIG_SYS_MEMTEST_END   (CONFIG_SYS_MEMTEST_START \
> - + (8 * 1024 * 1024))
> -
> -#define CONFIG_SYS_LOAD_ADDR 0x8100 /* Default load address */
> -
> -#define CONFIG_MMC
> -#define CONFIG_GENERIC_MMC
> -#define CONFIG_OMAP_HSMMC
> -#define CONFIG_CMD_MMC
> -#define CONFIG_DOS_PARTITION
> -#define CONFIG_CMD_FAT
> -#define CONFIG_FAT_WRITE
> -#define CONFIG_CMD_EXT2
> -#define CONFIG_CMD_EXT4
> -#define CONFIG_CMD_FS_GENERIC
> -
> -#define CONFIG_SPI
> -#define CONFIG_OMAP3_SPI
> -#define CONFIG_MTD_DEVICE
> -#define CONFIG_SPI_FLASH
> -#define CONFIG_SPI_FLASH_WINBOND
> -#define CONFIG_CMD_SF
> -#define CONFIG_SF_DEFAULT_SPEED  (2400)
> -
>  /* USB Composite download gadget - g_dnl */
>  #define CONFIG_USB_GADGET
>  #define CONFIG_USBDOWNLOAD_GADGET
>  
>  /* USB TI's IDs */
> -#define CONFIG_USBD_HS
>  #define CONFIG_G_DNL_VENDOR_NUM 0x0403
>  #define CONFIG_G_DNL_PRODUCT_NUM 0xBD00
>  #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
> @@ -283,109 +205,24 @@
>   "rootfs part 0 9"
>  #endif
>  
> - /* Physical Memory Map */
> -#define CONFIG_NR_DRAM_BANKS 1   /*  1 bank of DRAM */
> -#def

Re: [U-Boot] [PATCH 05/10] arm: spl: For Falcon Mode, set a default machid of ~0

2013-08-06 Thread Dan Murphy
On 08/02/2013 03:26 PM, Tom Rini wrote:
> With device trees, boards do not always set CONFIG_MACH_TYPE now, so we
> must not rely on this define being set.  The kernel uses ~0 to see if we
> have a valid machine number or not, so set that as the default, invalid
> machine, id and only fix if CONFIG_MACH_TYPE is set.
>
> Cc: Albert ARIBAUD 
> Signed-off-by: Tom Rini 
> ---
>  arch/arm/lib/spl.c |7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
> index 583bdb3..26d0be4 100644
> --- a/arch/arm/lib/spl.c
> +++ b/arch/arm/lib/spl.c
> @@ -45,12 +45,17 @@ void __weak board_init_f(ulong dummy)
>  #ifdef CONFIG_SPL_OS_BOOT
>  void __noreturn jump_to_image_linux(void *arg)
>  {
> + unsigned long machid = 0x;
> +#ifdef CONFIG_MACH_TYPE
> + machid = CONFIG_MACH_TYPE;
> +#endif
> +
>   debug("Entering kernel arg pointer: 0x%p\n", arg);
>   typedef void (*image_entry_arg_t)(int, int, void *)
>   __attribute__ ((noreturn));
>   image_entry_arg_t image_entry =
>   (image_entry_arg_t) spl_image.entry_point;
>   cleanup_before_linux();
> - image_entry(0, CONFIG_MACH_TYPE, arg);
> + image_entry(0, machid, arg);
>  }
>  #endif
The code looks fine just don't see how it is part of the "common" patch set 
series

otherwise
Acked-by: Dan Murphy 

-- 
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Re: [U-Boot] [PATCH v3 2/2] cmd_sf: let "sf update" preserve the final part of the last sector

2013-08-06 Thread Jagan Teki
On Fri, Jul 5, 2013 at 1:01 PM, Gerlando Falauto
 wrote:
> Hi Jagan,
>
>
> On 07/04/2013 06:26 PM, Jagan Teki wrote:
>>
>> On Thu, Jul 4, 2013 at 12:03 AM, Gerlando Falauto
>>  wrote:
>>>
>>> Since "sf update" erases the last block as a whole, but only rewrites
>>> the meaningful initial part of it, the rest would be left erased,
>>> potentially erasing meaningful information.
>>> So, as a safety measure, have it rewrite the original content.
>>>
>>> Signed-off-by: Gerlando Falauto 
>>> Cc: Valentin Longchamp 
>>> Cc: Holger Brunck 
>>> Acked-by: Simon Glass 
>>> ---
>>>   common/cmd_sf.c | 12 +++-
>>>   1 file changed, 11 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/common/cmd_sf.c b/common/cmd_sf.c
>>> index ab35a94..1141dc1 100644
>>> --- a/common/cmd_sf.c
>>> +++ b/common/cmd_sf.c
>>> @@ -152,8 +152,10 @@ static const char *spi_flash_update_block(struct
>>> spi_flash *flash, u32 offset,
>>>   {
>>>  debug("offset=%#x, sector_size=%#x, len=%#zx\n",
>>>  offset, flash->sector_size, len);
>>> -   if (spi_flash_read(flash, offset, len, cmp_buf))
>>> +   /* Read the entire sector so to allow for rewriting */
>>> +   if (spi_flash_read(flash, offset, flash->sector_size, cmp_buf))
>>>  return "read";
>>> +   /* Compare only what is meaningful (len) */
>>>  if (memcmp(cmp_buf, buf, len) == 0) {
>>>  debug("Skip region %x size %zx: no change\n",
>>>  offset, len);
>>> @@ -163,8 +165,16 @@ static const char *spi_flash_update_block(struct
>>> spi_flash *flash, u32 offset,
>>>  /* Erase the entire sector */
>>>  if (spi_flash_erase(flash, offset, flash->sector_size))
>>>  return "erase";
>>> +   /* Write the initial part of the block from the source */
>>>  if (spi_flash_write(flash, offset, len, buf))
>>>  return "write";
>>
>>
>> I din't understand why the below write is required again-
>> As erase ops requires only sector operation and read + write will do
>> the operations on partial sizes
>>
>> Can you send the failure case w/o this.
>
>
> I'm not sure I understand your question.
> I thought the commit message above was clear enough.
>
> In any case, the idea is to have "sf update" be as agnostic as possible wrt
> to sector size, so it virtually only erases the same amount of data as it is
> going to overwrite. The rest will be preserved.
>
> This way you could, for instance, store some binary proprietary firmware
> towards the end of the space reserved for u-boot, without having to reserve
> a whole flash sector for it. The reason for doing such a thing (as opposed
> to just embedding it within u-boot itself) is licensing issues, so you might
> want to keep the firmware as close as possible to the u-boot binary yet not
> link it.
> Then when you update u-boot (GPL), your firmware is preserved.
>
> Another extreme use case that comes to my mind would be where you have the
> u-boot environment within the same sector where u-boot lies, though
> a) I'm not sure it's even possible
> b) is of course a BAD, BAD idea
> c) See b)
> d) See c) and then b), plus is a BAD idea and therefore discouraged
> e) it would only make sense if the u-boot environment is never meant to be
> altered except during production
>
> To be honest with you, I don't remember if there was a real use case leading
> me to write this or if it was just all hypothetical or I just thought it was
> nicer that way.
>
> As for changes of v3 wrt v2, the two should be functionally equivalent:
> - In v2 I used a memcpy() to write the whole sector at once
> - In v3 I avoided the memcpy() but this requires writing the two portions
> separately.

What if don't use second write, is that a condition where we are not
sure the write gonna be happen
properly in case of  partial sectors.

-- 
Thanks,
Jagan.

>
> Hope this answers your question.
>
> Thank you,
> Gerlando
>
>>
>> --
>> Thanks,
>> Jagan.
>>>
>>> +   /* If it's a partial sector, rewrite the existing part */
>>> +   if (len != flash->sector_size) {
>>> +   /* Rewrite the original data to the end of the sector */
>>> +   if (spi_flash_write(flash, offset + len,
>>> +   flash->sector_size - len, &cmp_buf[len]))
>>> +   return "write";
>>> +   }
>>>  return NULL;
>>>   }
>>>
>>> --
>>> 1.8.0.1
>>>
>
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Re: [U-Boot] [PATCH 02/10] am33xx: CONFIG_DMA_COHERENT defines are unused, remove

2013-08-06 Thread Dan Murphy
On 08/02/2013 03:26 PM, Tom Rini wrote:
> Signed-off-by: Tom Rini 
> ---
>  include/configs/igep0033.h   |4 
>  include/configs/pcm051.h |3 ---
>  include/configs/ti814x_evm.h |3 ---
>  3 files changed, 10 deletions(-)
>
> diff --git a/include/configs/igep0033.h b/include/configs/igep0033.h
> index 28c7ae9..e318c74 100644
> --- a/include/configs/igep0033.h
> +++ b/include/configs/igep0033.h
> @@ -23,10 +23,6 @@
>  #define MACH_TYPE_IGEP0033   4521/* Until the next sync */
>  #define CONFIG_MACH_TYPE MACH_TYPE_IGEP0033
>  
> -/* DMA defines */
> -#define CONFIG_DMA_COHERENT
> -#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
> -
>  #define CONFIG_ENV_SIZE  (128 << 10) /* 128 KiB */
>  #define CONFIG_SYS_MALLOC_LEN(1024 << 10)
>  #define CONFIG_SYS_LONGHELP  /* undef to save memory */
> diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
> index 7073501..62ffc67 100644
> --- a/include/configs/pcm051.h
> +++ b/include/configs/pcm051.h
> @@ -24,9 +24,6 @@
>  
>  #include 
>  
> -#define CONFIG_DMA_COHERENT
> -#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
> -
>  #define CONFIG_ENV_SIZE  (128 << 10) /* 128 KiB */
>  #define CONFIG_SYS_MALLOC_LEN(1024 << 10)
>  #define CONFIG_SYS_LONGHELP  /* undef to save memory */
> diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
> index ceee43b..2428f9d 100644
> --- a/include/configs/ti814x_evm.h
> +++ b/include/configs/ti814x_evm.h
> @@ -23,9 +23,6 @@
>  
>  #include 
>  
> -#define CONFIG_DMA_COHERENT
> -#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
> -
>  #define CONFIG_ENV_SIZE  (128 << 10) /* 128 KiB */
>  #define CONFIG_SYS_MALLOC_LEN(1024 << 10)
>  #define CONFIG_SYS_LONGHELP  /* undef to save memory */
Acked-by: Dan Murphy 

-- 
--
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Otavio Salvador
On Tue, Aug 6, 2013 at 2:12 PM, Stephen Warren  wrote:
> On 08/06/2013 10:58 AM, Otavio Salvador wrote:
>> On Tue, Aug 6, 2013 at 1:54 PM, Stephen Warren  wrote:
 How can someone 'overwrite' the default environment from system or
 when generating a FIT image?
>>>
>>> If U-Boot is running, you can get back to the default environment by
>>> running exactly the commands you wrote below.
>>>
>>> If you're flashing U-Boot, you could force it to use the default
>>> environment when it boots by erasing/corrupting the copy of the
>>> environment that's stored in flash (or wherever ENV_IS points) at the
>>> same time that you flash the new U-Boot binary.
>>>
>>> The question of how to get the default environment when generating a FIT
>>> image doesn't make sense; generating a FIT image of something (kernel,
>>> initrd, DTB?) is entirely unrelated to the environment content that
>>> U-Boot uses when running.
>>
>> Ok but when I do env -f -d -a it uses the built-in environment as
>> default. How can I 'change' this default without rebuilding U-Boot
>> binary?
>
> I don't believe you can. Why would you want to? It's the default
> environment that makes sense for that board, and that's defined by the
> person creating U-Boot.
>
> If you want the user to be able to switch between different
> environments, just have them save/load from a disk file that they
> create. I think there's a command for that?

So that's the real goal to change it inside of code. This does make
sense to have a way to set it from outside.

-- 
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http://www.ossystems.com.brhttp://projetos.ossystems.com.br
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Stephen Warren
On 08/06/2013 10:58 AM, Otavio Salvador wrote:
> On Tue, Aug 6, 2013 at 1:54 PM, Stephen Warren  wrote:
>>> How can someone 'overwrite' the default environment from system or
>>> when generating a FIT image?
>>
>> If U-Boot is running, you can get back to the default environment by
>> running exactly the commands you wrote below.
>>
>> If you're flashing U-Boot, you could force it to use the default
>> environment when it boots by erasing/corrupting the copy of the
>> environment that's stored in flash (or wherever ENV_IS points) at the
>> same time that you flash the new U-Boot binary.
>>
>> The question of how to get the default environment when generating a FIT
>> image doesn't make sense; generating a FIT image of something (kernel,
>> initrd, DTB?) is entirely unrelated to the environment content that
>> U-Boot uses when running.
> 
> Ok but when I do env -f -d -a it uses the built-in environment as
> default. How can I 'change' this default without rebuilding U-Boot
> binary?

I don't believe you can. Why would you want to? It's the default
environment that makes sense for that board, and that's defined by the
person creating U-Boot.

If you want the user to be able to switch between different
environments, just have them save/load from a disk file that they
create. I think there's a command for that?
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Otavio Salvador
On Tue, Aug 6, 2013 at 1:54 PM, Stephen Warren  wrote:
>> How can someone 'overwrite' the default environment from system or
>> when generating a FIT image?
>
> If U-Boot is running, you can get back to the default environment by
> running exactly the commands you wrote below.
>
> If you're flashing U-Boot, you could force it to use the default
> environment when it boots by erasing/corrupting the copy of the
> environment that's stored in flash (or wherever ENV_IS points) at the
> same time that you flash the new U-Boot binary.
>
> The question of how to get the default environment when generating a FIT
> image doesn't make sense; generating a FIT image of something (kernel,
> initrd, DTB?) is entirely unrelated to the environment content that
> U-Boot uses when running.

Ok but when I do env -f -d -a it uses the built-in environment as
default. How can I 'change' this default without rebuilding U-Boot
binary?

-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://projetos.ossystems.com.br
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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Stephen Warren
On 08/06/2013 10:18 AM, Otavio Salvador wrote:
> On Tue, Aug 6, 2013 at 12:50 PM, Stephen Warren  wrote:
>> On 08/06/2013 05:37 AM, Wolfgang Denk wrote:
>>> Dear Rob Herring,
>>>
>>> In message 
>>>  you 
>>> wrote:

> Why would you ever want to compile this into U-Boot at all?  Then any
> changes you need to make mean compiling and installing a new U-Boot,
> which is something you normally don't want to do.

 You may want to have factory default and "user" settings. Building in
 the factory settings would be one way to accomplish that.
>>>
>>> No. Handling these independently, outside of the compiled U-Boot image
>>> is as easy, and much more flexible.
>>>
> U-Boot is perfectly able to import such settings from text files (or
> text blobs stored somewhere, even attached to the U-Boot image, if you
> want), so just use the text files separately, instead of hard
> compiling them into the code.

 In my case, I don't want to compile the environment into u-boot. But
 some people do as I copied my scripts from Tegra which has them
 built-in.
>>
>> We have the *default* environment built-in, which is used when no valid
>> environment is found in flash. If there's an environment in flash, it
>> gets used rather than the built-in default.
> 
> How can someone 'overwrite' the default environment from system or
> when generating a FIT image?

If U-Boot is running, you can get back to the default environment by
running exactly the commands you wrote below.

If you're flashing U-Boot, you could force it to use the default
environment when it boots by erasing/corrupting the copy of the
environment that's stored in flash (or wherever ENV_IS points) at the
same time that you flash the new U-Boot binary.

The question of how to get the default environment when generating a FIT
image doesn't make sense; generating a FIT image of something (kernel,
initrd, DTB?) is entirely unrelated to the environment content that
U-Boot uses when running.

> I am interested in let my customers to revert back to a sane default running:
> 
> env -f -d -a
> saveenv

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[U-Boot] [PATCH] mmc: Initialize mmc_devices list statically

2013-08-06 Thread Taras Kondratiuk
Currently mmc_device list is initialized from mmc_initialize() function.
So crash happens if any function which use mmc_devices list (find_mmc_device,
print_mmc_devices, etc.) is called before mmc_initialize().

Fix this by initializing mmc_devices list statically.

Signed-off-by: Taras Kondratiuk 
---
 drivers/mmc/mmc.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 4da8db9..eb35582 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -21,7 +21,7 @@
 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
 #endif
 
-static struct list_head mmc_devices;
+LIST_HEAD(mmc_devices);
 static int cur_dev_num = -1;
 
 int __weak board_mmc_getwp(struct mmc *mmc)
@@ -1477,7 +1477,6 @@ static void do_preinit(void)
 
 int mmc_initialize(bd_t *bis)
 {
-   INIT_LIST_HEAD (&mmc_devices);
cur_dev_num = 0;
 
if (board_mmc_init(bis) < 0)
-- 
1.7.9.5

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[U-Boot] [RESEND PATCH v2 01/20] sf: Divide spi_flash into multiple parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Divided the spi_flash framework into mutiple parts for
- spi_flash.c:
spi flash core file, interaction for spi/qspi driver to
spi_flash framework.
- spi_flash_ops.c
spi flash preffered operations, erase,write and read.
- spi_flash_probe.c
spi flash probing, easy to extend probing functionality.

This change will support to extend the functionality in a
proper manner.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/Makefile  |   2 +-
 drivers/mtd/spi/spi_flash.c   | 569 +-
 drivers/mtd/spi/spi_flash_ops.c   | 314 +
 drivers/mtd/spi/spi_flash_probe.c | 274 ++
 4 files changed, 594 insertions(+), 565 deletions(-)
 create mode 100644 drivers/mtd/spi/spi_flash_ops.c
 create mode 100644 drivers/mtd/spi/spi_flash_probe.c

diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index e537fcf..0304b12 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -13,7 +13,7 @@ ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_SPI_LOAD)   += spi_spl_load.o
 endif
 
-COBJS-$(CONFIG_SPI_FLASH)  += spi_flash.o
+COBJS-$(CONFIG_SPI_FLASH)  += spi_flash_probe.o spi_flash_ops.o spi_flash.o
 COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
 COBJS-$(CONFIG_SPI_FLASH_EON)  += eon.o
 COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE)   += gigadevice.o
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 9814395..ddbdda0 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -8,23 +8,7 @@
  */
 
 #include 
-#include 
-#include 
 #include 
-#include 
-#include 
-
-#include "spi_flash_internal.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static void spi_flash_addr(u32 addr, u8 *cmd)
-{
-   /* cmd[0] is actual command */
-   cmd[1] = addr >> 16;
-   cmd[2] = addr >> 8;
-   cmd[3] = addr >> 0;
-}
 
 static int spi_flash_read_write(struct spi_slave *spi,
const u8 *cmd, size_t cmd_len,
@@ -52,562 +36,19 @@ static int spi_flash_read_write(struct spi_slave *spi,
return ret;
 }
 
-int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
-{
-   return spi_flash_cmd_read(spi, &cmd, 1, response, len);
-}
-
 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len)
 {
return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
 }
 
-int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
-   const void *data, size_t data_len)
-{
-   return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
-}
-
-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
-{
-   struct spi_slave *spi = flash->spi;
-   unsigned long timebase;
-   int ret;
-   u8 status;
-   u8 check_status = 0x0;
-   u8 poll_bit = STATUS_WIP;
-   u8 cmd = flash->poll_cmd;
-
-   if (cmd == CMD_FLAG_STATUS) {
-   poll_bit = STATUS_PEC;
-   check_status = poll_bit;
-   }
-
-   ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
-   if (ret) {
-   debug("SF: fail to read %s status register\n",
- cmd == CMD_READ_STATUS ? "read" : "flag");
-   return ret;
-   }
-
-   timebase = get_timer(0);
-   do {
-   WATCHDOG_RESET();
-
-   ret = spi_xfer(spi, 8, NULL, &status, 0);
-   if (ret)
-   return -1;
-
-   if ((status & poll_bit) == check_status)
-   break;
-
-   } while (get_timer(timebase) < timeout);
-
-   spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
-
-   if ((status & poll_bit) == check_status)
-   return 0;
-
-   /* Timed out */
-   debug("SF: time out!\n");
-   return -1;
-}
-
-int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
-   size_t cmd_len, const void *buf, size_t buf_len)
-{
-   struct spi_slave *spi = flash->spi;
-   unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
-   int ret;
-
-   if (buf == NULL)
-   timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
-
-   ret = spi_claim_bus(flash->spi);
-   if (ret) {
-   debug("SF: unable to claim SPI bus\n");
-   return ret;
-   }
-
-   ret = spi_flash_cmd_write_enable(flash);
-   if (ret < 0) {
-   debug("SF: enabling write failed\n");
-   return ret;
-   }
-
-   ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
-   if (ret < 0) {
-   debug("SF: write cmd failed\n");
-   return ret;
-   }
-
-   ret = spi_flash_cmd_wait_ready(flash, timeout);
-   if (ret < 0) {
-   debug("SF: write %s timed out\n",
- timeout == SPI_FLASH_PROG_TIMEOUT ?
- 

[U-Boot] [RESEND PATCH v2 13/20] sf: probe: Add support to clear flash BP# bits

2013-08-06 Thread Jagannadha Sutradharudu Teki
Few of the flashes(Atmel, Macronix and SST) require to
clear BP# bits in flash power ups.

So clear these BP# bits at probe time, so-that the flash
is ready for user operations.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/spi_flash_probe.c | 6 ++
 include/spi_flash.h   | 5 +
 2 files changed, 11 insertions(+)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index e045e53..4368867 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -202,6 +202,12 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave 
*spi, u8 *idcode)
flash->sector_size = params->sector_size;
flash->size = flash->sector_size * params->nr_sectors;
 
+   /* Flash powers up read-only, so clear BP# bits */
+   if (((params->jedec >> 16) == SPI_FLASH_CFI_MFR_ATMEL) ||
+   ((params->jedec >> 16) == SPI_FLASH_CFI_MFR_MACRONIX) ||
+   ((params->jedec >> 16) == SPI_FLASH_CFI_MFR_SST))
+   spi_flash_cmd_write_status(flash, 0);
+
return flash;
 }
 
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 4f35c30..8de4e8d 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -17,6 +17,11 @@
 #include 
 #include 
 
+/* SPI flash CFI Manufacture ID's */
+#define SPI_FLASH_CFI_MFR_ATMEL0x1f
+#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
+#define SPI_FLASH_CFI_MFR_SST  0xbf
+
 /* SST specific macros */
 #ifdef CONFIG_SPI_FLASH_SST
 # define SST_WP0x01/* Supports AAI word program */
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 20/20] sf: probe: Add support for EN25Q64

2013-08-06 Thread Jagannadha Sutradharudu Teki
Add support for EON EN25Q64 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/spi_flash_probe.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 86cb881..de4ba0d 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -49,6 +49,7 @@ static const struct spi_flash_params spi_flash_params_table[] 
= {
 #endif
 #ifdef CONFIG_SPI_FLASH_EON/* EON */
{"EN25Q32B",   0x1c3016, 0x0,   64 * 1024,64,   
 0},
+   {"EN25Q64",0x1c3017, 0x0,   64 * 1024,   128,  
SECT_4K},
{"EN25Q128B",  0x1c3018, 0x0,   64 * 1024,   256,   
 0},
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 16/20] sf: probe: Move BAR config to spi_flash_validate_ids

2013-08-06 Thread Jagannadha Sutradharudu Teki
Moved BAR config to spi_flash_validate_ids, so its
better to have all flash initalization at once.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/spi_flash_internal.h |  5 -
 drivers/mtd/spi/spi_flash_probe.c| 24 +++-
 include/spi_flash.h  |  3 +++
 3 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash_internal.h 
b/drivers/mtd/spi/spi_flash_internal.h
index ce34ce0..6227d2e 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -31,11 +31,6 @@
 
 #define SPI_FLASH_16MB_BOUN0x100
 
-/* Manufacture ID's */
-#define SPI_FLASH_SPANSION_IDCODE0 0x01
-#define SPI_FLASH_STMICRO_IDCODE0  0x20
-#define SPI_FLASH_WINBOND_IDCODE0  0xef
-
 #ifdef CONFIG_SPI_FLASH_BAR
 /* Bank addr access commands */
 # define CMD_BANKADDR_BRWR 0x17
diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index acccee0..db5f804 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -218,6 +218,12 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave 
*spi, u8 *idcode)
if (params->flags & E_FSR)
flash->poll_cmd = CMD_FLAG_STATUS;
 
+#ifdef CONFIG_SPI_FLASH_BAR
+   /* Configure the BAR - discover bank cmds and read current bank  */
+   if (spi_flash_bank_config(flash, idcode[0]) < 0)
+   return NULL;
+#endif
+
/* Flash powers up read-only, so clear BP# bits */
if (((params->jedec >> 16) == SPI_FLASH_CFI_MFR_ATMEL) ||
((params->jedec >> 16) == SPI_FLASH_CFI_MFR_MACRONIX) ||
@@ -235,12 +241,12 @@ int spi_flash_bank_config(struct spi_flash *flash, u8 
idcode0)
 
/* discover bank cmds */
switch (idcode0) {
-   case SPI_FLASH_SPANSION_IDCODE0:
+   case SPI_FLASH_CFI_MFR_SPANSION:
flash->bank_read_cmd = CMD_BANKADDR_BRRD;
flash->bank_write_cmd = CMD_BANKADDR_BRWR;
break;
-   case SPI_FLASH_STMICRO_IDCODE0:
-   case SPI_FLASH_WINBOND_IDCODE0:
+   case SPI_FLASH_CFI_MFR_STMICRO:
+   case SPI_FLASH_CFI_MFR_WINBOND:
flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
break;
@@ -298,7 +304,7 @@ struct spi_flash *spi_flash_probe(unsigned int bus, 
unsigned int cs,
 {
struct spi_slave *spi;
struct spi_flash *flash = NULL;
-   u8 idcode[5], *idp;
+   u8 idcode[5];
int ret;
 
/* Setup spi_slave */
@@ -328,18 +334,10 @@ struct spi_flash *spi_flash_probe(unsigned int bus, 
unsigned int cs,
 #endif
 
/* Validate ID's from flash dev table */
-   idp = idcode;
-   flash = spi_flash_validate_ids(spi, idp);
+   flash = spi_flash_validate_ids(spi, idcode);
if (!flash)
goto err_read_id;
 
-#ifdef CONFIG_SPI_FLASH_BAR
-   /* Configure the BAR - discover bank cmds and read current bank  */
-   ret = spi_flash_bank_config(flash, *idp);
-   if (ret < 0)
-   goto err_read_id;
-#endif
-
 #ifdef CONFIG_OF_CONTROL
if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
debug("SF: FDT decode error\n");
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 3e60fdc..14e4ae2 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -20,7 +20,10 @@
 /* SPI flash CFI Manufacture ID's */
 #define SPI_FLASH_CFI_MFR_ATMEL0x1f
 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
+#define SPI_FLASH_CFI_MFR_SPANSION 0x01
 #define SPI_FLASH_CFI_MFR_SST  0xbf
+#define SPI_FLASH_CFI_MFR_STMICRO  0x20
+#define SPI_FLASH_CFI_MFR_WINBOND  0xef
 
 /* SECT flags */
 #define SECT_4K(1 << 0)
-- 
1.8.3


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Re: [U-Boot] [PATCH 3/4] ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration

2013-08-06 Thread Lokesh Vutla
Hi,
On Tuesday 06 August 2013 09:27 PM, Taras Kondratiuk wrote:
> On 08/06/2013 05:21 PM, Lokesh Vutla wrote:
>> Hi Taras,
>> On Tuesday 06 August 2013 05:48 PM, Taras Kondratiuk wrote:
>>> From: Lubomir Popov 
>>>
>>> OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
>>> This memory has 4Gb x 2CS = 8Gb configuration.
>>> Add configuration for runtime calculation and precalculated cases.
>>>
>>> Patch is based on a draft Lubomir's patch [1].
>>>
>>> [1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html
>> Just curious to know, Have you tried SDRAM_AUTO_DETECTION ?
>> Rest looks fine to me.
> 
> If you mean SYS_AUTOMATIC_SDRAM_DETECTION then yes I've tried it and it works.
Cool, thats fine...!!

Thanks and regards,
Lokesh
> The only minor issue is that detection is called twice during boot:
> for dmm_init() and for do_sdram_init().
> 
> In case you need additional details I've put boot log with debug enabled 
> below.
> 
> U-Boot SPL 2013.07-00116-gd7325e5-dirty (Aug 06 2013 - 18:20:56)
> OMAP4470 ES1.0
>>>sdram_init()
> in_sdram = 0
> get_mr: EMIF1 cs 0 mr  val 0x0
> get_mr: EMIF1 cs 0 mr 0004 val 0x3
> get_mr: EMIF1 cs 0 mr 0005 val 0x3
> get_mr: EMIF1 cs 0 mr 0006 val 0x0
> get_mr: EMIF1 cs 0 mr 0007 val 0x0
> get_mr: EMIF1 cs 0 mr 0008 val 0x18
> EMIF1 CS0   Elpida  LPDDR2-S4   512 MB
> get_mr: EMIF1 cs 1 mr 8000 val 0x3
> get_mr: EMIF2 cs 0 mr  val 0x0
> get_mr: EMIF2 cs 0 mr 0004 val 0x3
> get_mr: EMIF2 cs 0 mr 0005 val 0x3
> get_mr: EMIF2 cs 0 mr 0006 val 0x0
> get_mr: EMIF2 cs 0 mr 0007 val 0x0
> get_mr: EMIF2 cs 0 mr 0008 val 0x18
> EMIF2 CS0   Elpida  LPDDR2-S4   512 MB
> get_mr: EMIF2 cs 1 mr 8000 val 0x3
> emif1_size 0x2000 emif2_size 0x2000
>>>do_sdram_init() 4c00
> get_mr: EMIF1 cs 0 mr  val 0x0
> get_mr: EMIF1 cs 0 mr 0004 val 0x3
> get_mr: EMIF1 cs 0 mr 0005 val 0x3
> get_mr: EMIF1 cs 0 mr 0006 val 0x0
> get_mr: EMIF1 cs 0 mr 0007 val 0x0
> get_mr: EMIF1 cs 0 mr 0008 val 0x18
> EMIF1 CS0   Elpida  LPDDR2-S4   512 MB
> get_mr: EMIF1 cs 1 mr 8000 val 0x3
> emif: timings table: 4
> emif: addressing table index 6
> regs->sdram_config_init - 0x8eb2
> regs->sdram_config - 0x80001ab2
> regs->ref_ctrl - 0x0618
> regs->sdram_tim1 - 0x10eb0662
> regs->sdram_tim2 - 0x20370dd2
> regs->sdram_tim3 - 0x00b1c33f
> regs->read_idle_ctrl - 0x000501ff
> regs->temp_alert_config - 0x58016893
> regs->zq_config - 0x500b3214
> regs->emif_ddr_phy_ctlr_1 - 0x049ff418
> regs->emif_ddr_phy_ctlr_1_init - 0x0495
> get_mr: EMIF1 cs 0 mr  val 0x0
> <>>do_sdram_init() 4d00
> get_mr: EMIF2 cs 0 mr  val 0x0
> get_mr: EMIF2 cs 0 mr 0004 val 0x3
> get_mr: EMIF2 cs 0 mr 0005 val 0x3
> get_mr: EMIF2 cs 0 mr 0006 val 0x0
> get_mr: EMIF2 cs 0 mr 0007 val 0x0
> get_mr: EMIF2 cs 0 mr 0008 val 0x18
> EMIF2 CS0   Elpida  LPDDR2-S4   512 MB
> get_mr: EMIF2 cs 1 mr 8000 val 0x3
> emif: timings table: 4
> emif: addressing table index 6
> regs->sdram_config_init - 0x8eb2
> regs->sdram_config - 0x80001ab2
> regs->ref_ctrl - 0x0618
> regs->sdram_tim1 - 0x10eb0662
> regs->sdram_tim2 - 0x20370dd2
> regs->sdram_tim3 - 0x00b1c33f
> regs->read_idle_ctrl - 0x000501ff
> regs->temp_alert_config - 0x58016893
> regs->zq_config - 0x500b3214
> regs->emif_ddr_phy_ctlr_1 - 0x049ff418
> regs->emif_ddr_phy_ctlr_1_init - 0x0495
> get_mr: EMIF2 cs 0 mr  val 0x0
> < get_ram_size() successful< OMAP SD/MMC: 0
> reading u-boot.img
> reading u-boot.img
> 

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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Otavio Salvador
On Tue, Aug 6, 2013 at 1:22 PM, Dennis Gilmore  wrote:
...
> My issue with this is, we produce a unified image, it could be an
> installer image or a installed disk image. it has a unified kernel in
> it and can run on any number of soc's but we also need to provide
> tooling that will setup the u-boot image so that it can be loaded by
> different boards. be it copying files into place or dding the binary
> into some offset. it kills the portability. i can't pull a sdcard from
> one board with one type of soc and plug it into another and have it
> just boot.

U-Boot is the hardest part of whole chain to make it cross SoC (and
cross Vendor SoC is even harder) as it needs to set pins and registers
which vary from one to another. So even using DeviceTree there I am
not aware of a way to make it to work for i.MX6 and Allwinner SoCs
without using different binaries. You can certainly share the binary
among different boards of same SoC (or SoC family) but across them I
am not aware of it being possible.

>> > > U-Boot is perfectly able to import such settings from text files
>> > > (or text blobs stored somewhere, even attached to the U-Boot
>> > > image, if you want), so just use the text files separately,
>> > > instead of hard compiling them into the code.
>> >
>> > In my case, I don't want to compile the environment into u-boot. But
>> > some people do as I copied my scripts from Tegra which has them
>> > built-in. Since built-in is C and standalone is text file, sharing
>> > is impossible. That is the main thing I'd like to see changed.
>> > Whether we support merging builtin and standalone envs is secondary.
>>
>> Who says "impossible" here?  When using a file system with write
>> support, you can use "env export -t" to create a text representation
>> and write it out to the file system (or store it in some reserved area
>> on some storage device).
> Exactly what i want to avoid. I really do want it compiled into the
> binary. because then I only have to put one file into place. on those
> systems needing it.
>
> another solution for me would be a unified u-boot that runs on all
> soc's and all boards. Everytime we have to do something different for a
> board or soc family is a step away from having something truly
> universal and portable.

What Wolfgang is saying here is it will still be a single file but
made in two steps. One U-Boot binary, another cluing the environment
to it.
...

Regards,

-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://projetos.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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[U-Boot] [RESEND PATCH v2 09/20] sf: probe: Add support for SST25* flash parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added SST25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_SST

 drivers/mtd/spi/spi_flash_probe.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index c1daab3..34e7ca1 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -88,6 +88,18 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
{"N25Q1024",0x20ba21, 0x0, 64 * 1024,   2048},
{"N25Q1024A",   0x20bb21, 0x0, 64 * 1024,   2048},
 #endif
+#ifdef CONFIG_SPI_FLASH_SST/* SST */
+   {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024,  8},
+   {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16},
+   {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32},
+   {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64},
+   {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024,128},
+   {"SST25WF512",  0xbf2501, 0x0, 64 * 1024,  1},
+   {"SST25WF010",  0xbf2502, 0x0, 64 * 1024,  2},
+   {"SST25WF020",  0xbf2503, 0x0, 64 * 1024,  4},
+   {"SST25WF040",  0xbf2504, 0x0, 64 * 1024,  8},
+   {"SST25WF080",  0xbf2505, 0x0, 64 * 1024, 16},
+#endif
 #ifdef CONFIG_SPI_FLASH_WINBOND/* WINBOND */
{"W25P80",  0xef2014, 0x0, 64 * 1024, 16},
{"W25P16",  0xef2015, 0x0, 64 * 1024, 32},
@@ -125,7 +137,6 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
 * TODO:
 * ATMEL
 * RAMTRON
-* SST
 */
 };
 
-- 
1.8.3


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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Dennis Gilmore
On Tue, 06 Aug 2013 13:37:51 +0200
Wolfgang Denk  wrote:

> Dear Rob Herring,
> 
> In message
> 
> you wrote:
> >
> > > Why would you ever want to compile this into U-Boot at all?  Then
> > > any changes you need to make mean compiling and installing a new
> > > U-Boot, which is something you normally don't want to do.
> > 
> > You may want to have factory default and "user" settings. Building
> > in the factory settings would be one way to accomplish that.
> 
> No. Handling these independently, outside of the compiled U-Boot image
> is as easy, and much more flexible.
How exactly should it be handled outside of the compiled u-boot image.
with my distro hat on, I honesty do not want to deal with u-boot at
all. The limit of my dealing with u-boot will be to run a script that
installs the u-boot binary onto disk for those systems that don't have
it in nand/nor/spi etc flash storage. 

In my mind you are talking about some file I need to write to disk that
gets loaded at boot time. the problem with this is its not flexible nor
portable. I honestly think one of the worst thing hardware vendors ever
did was to ship hardware that doesn't have anywhere built into it to
load and run u-boot from.

My issue with this is, we produce a unified image, it could be an
installer image or a installed disk image. it has a unified kernel in
it and can run on any number of soc's but we also need to provide
tooling that will setup the u-boot image so that it can be loaded by
different boards. be it copying files into place or dding the binary
into some offset. it kills the portability. i can't pull a sdcard from
one board with one type of soc and plug it into another and have it
just boot.

> > > U-Boot is perfectly able to import such settings from text files
> > > (or text blobs stored somewhere, even attached to the U-Boot
> > > image, if you want), so just use the text files separately,
> > > instead of hard compiling them into the code.
> > 
> > In my case, I don't want to compile the environment into u-boot. But
> > some people do as I copied my scripts from Tegra which has them
> > built-in. Since built-in is C and standalone is text file, sharing
> > is impossible. That is the main thing I'd like to see changed.
> > Whether we support merging builtin and standalone envs is secondary.
> 
> Who says "impossible" here?  When using a file system with write
> support, you can use "env export -t" to create a text representation
> and write it out to the file system (or store it in some reserved area
> on some storage device).
Exactly what i want to avoid. I really do want it compiled into the
binary. because then I only have to put one file into place. on those
systems needing it.

another solution for me would be a unified u-boot that runs on all
soc's and all boards. Everytime we have to do something different for a
board or soc family is a step away from having something truly
universal and portable.

The only way I could see having us write a file to disk with the
environment working is if all boards implement standard variable to
define the memory locations and that is compiled into the u-boot binary.

some variables that would need to be compiled in 

fdt_addr
fdt_addr_r
kernel_addr_r
ramdisk_addr_r
pxefile_addr_r
scr_addr_r
uenv_addr_r

this should allow for for people to use boot.scr uEnv.txt or
pxe/extlinux 

Dennis
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[U-Boot] [RESEND PATCH v2 07/20] sf: probe: Add support for W25* flash parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added W25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_WINBOND

 drivers/mtd/spi/spi_flash_probe.c | 33 -
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 1544ab7..347455f 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -75,13 +75,44 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
{"N25Q1024",0x20ba21, 0x0, 64 * 1024,   2048},
{"N25Q1024A",   0x20bb21, 0x0, 64 * 1024,   2048},
 #endif
+#ifdef CONFIG_SPI_FLASH_WINBOND/* WINBOND */
+   {"W25P80",  0xef2014, 0x0, 64 * 1024, 16},
+   {"W25P16",  0xef2015, 0x0, 64 * 1024, 32},
+   {"W25P32",  0xef2016, 0x0, 64 * 1024, 64},
+   {"W25X40",  0xef3013, 0x0, 64 * 1024,  8},
+   {"W25X16",  0xef3015, 0x0, 64 * 1024, 32},
+   {"W25X32",  0xef3016, 0x0, 64 * 1024, 64},
+   {"W25X64",  0xef3017, 0x0, 64 * 1024,128},
+   {"W25Q80BL",0xef4014, 0x0, 64 * 1024, 16},
+   {"W25Q16CL",0xef4015, 0x0, 64 * 1024, 32},
+   {"W25Q32BV",0xef4016, 0x0, 64 * 1024, 64},
+   {"W25Q64CV",0xef4017, 0x0, 64 * 1024,128},
+   {"W25Q128BV",   0xef4018, 0x0, 64 * 1024,256},
+   {"W25Q256", 0xef4019, 0x0, 64 * 1024,512},
+   {"W25Q80BW",0xef5014, 0x0, 64 * 1024, 16},
+   {"W25Q16DW",0xef6015, 0x0, 64 * 1024, 32},
+   {"W25Q32DW",0xef6016, 0x0, 64 * 1024, 64},
+   {"W25Q64DW",0xef6017, 0x0, 64 * 1024,128},
+   {"W25Q128FW",   0xef6018, 0x0, 64 * 1024,256},
+#endif
+   /*
+* Note:
+* Below paired flash devices has similar spi_flash_params params.
+* (W25Q80BL, W25Q80BV)
+* (W25Q16CL, W25Q16DV)
+* (W25Q32BV, W25Q32FV_SPI)
+* (W25Q64CV, W25Q64FV_SPI)
+* (W25Q128BV, W25Q128FV_SPI)
+* (W25Q32DW, W25Q32FV_QPI)
+* (W25Q64DW, W25Q64FV_QPI)
+* (W25Q128FW, W25Q128FV_QPI)
+*/
/*
 * TODO:
 * ATMEL
 * RAMTRON
 * SPANSION
 * SST
-* WINBOND
 */
 };
 
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 17/20] sf: Add proper comment style on spi_flash structure

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added proper comment style on spi_flash structure to make
more readable.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 include/spi_flash.h | 63 +
 1 file changed, 35 insertions(+), 28 deletions(-)

diff --git a/include/spi_flash.h b/include/spi_flash.h
index 14e4ae2..34a167b 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -37,39 +37,46 @@
 # define CMD_SST_AAI_WP0xAD/* Auto Address Incr Word 
Program */
 #endif
 
+/**
+ * struct spi_flash - SPI flash structure
+ *
+ * @spi:   SPI slave
+ * @name:  Name of SPI flash
+ * @size:  Total flash size
+ * @page_size: Write (page) size
+ * @sector_size:   Sector size
+ * @erase_size:Erase size
+ * @bank_read_cmd: Bank read cmd
+ * @bank_write_cmd:Bank write cmd
+ * @bank_curr: Current flash bank
+ * @poll_cmd:  Poll cmd - for flash erase/program
+ * @erase_cmd: Erase cmd 4K, 32K, 64K
+ * @memory_map:Address of read-only SPI flash access
+ * @read:  Flash read ops
+ * @write: Flash write ops
+ * @erase: Flash erase ops
+ */
 struct spi_flash {
struct spi_slave *spi;
+   const char *name;
 
-   const char  *name;
-
-   /* Total flash size */
-   u32 size;
-   /* Write (page) size */
-   u32 page_size;
-   /* Sector size */
-   u32 sector_size;
-   /* Erase size */
-   u32 erase_size;
+   u32 size;
+   u32 page_size;
+   u32 sector_size;
+   u32 erase_size;
 #ifdef CONFIG_SPI_FLASH_BAR
-   /* Bank read cmd */
-   u8  bank_read_cmd;
-   /* Bank write cmd */
-   u8  bank_write_cmd;
-   /* Current flash bank */
-   u8  bank_curr;
+   u8 bank_read_cmd;
+   u8 bank_write_cmd;
+   u8 bank_curr;
 #endif
-   /* Poll cmd - for flash erase/program */
-   u8  poll_cmd;
-   /* Erase cmd 4K, 32K, 64K */
-   u8  erase_cmd;
-
-   void *memory_map;   /* Address of read-only SPI flash access */
-   int (*read)(struct spi_flash *flash, u32 offset,
-   size_t len, void *buf);
-   int (*write)(struct spi_flash *flash, u32 offset,
-   size_t len, const void *buf);
-   int (*erase)(struct spi_flash *flash, u32 offset,
-   size_t len);
+   u8 poll_cmd;
+   u8 erase_cmd;
+
+   void *memory_map;
+   int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
+   int (*write)(struct spi_flash *flash, u32 offset, size_t len,
+   const void *buf);
+   int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
 };
 
 /**
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 06/20] sf: probe: Add support for MX25L* flash parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added MX25L* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_MACRONIX

 drivers/mtd/spi/spi_flash_probe.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 21cd483..1544ab7 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -44,6 +44,15 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
{"GD25Q64B",0xc84017, 0x0, 64 * 1024,128},
{"GD25LQ32",0xc86016, 0x0, 64 * 1024, 64},
 #endif
+#ifdef CONFIG_SPI_FLASH_MACRONIX   /* MACRONIX */
+   {"MX25L4005",   0xc22013, 0x0, 64 * 1024,  8},
+   {"MX25L8005",   0xc22014, 0x0, 64 * 1024, 16},
+   {"MX25L1605D",  0xc22015, 0x0, 64 * 1024, 32},
+   {"MX25L3205D",  0xc22016, 0x0, 64 * 1024, 64},
+   {"MX25L6405D",  0xc22017, 0x0, 64 * 1024,128},
+   {"MX25L12805",  0xc22018, 0x0, 64 * 1024,256},
+   {"MX25L12855E", 0xc22618, 0x0, 64 * 1024,256},
+#endif
 #ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{"M25P10",  0x202011, 0x0, 32 * 1024,  4},
{"M25P20",  0x202012, 0x0, 64 * 1024,  4},
@@ -69,7 +78,6 @@ static const struct spi_flash_params spi_flash_params_table[] 
= {
/*
 * TODO:
 * ATMEL
-* MACRONIX
 * RAMTRON
 * SPANSION
 * SST
-- 
1.8.3


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Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Otavio Salvador
On Tue, Aug 6, 2013 at 12:50 PM, Stephen Warren  wrote:
> On 08/06/2013 05:37 AM, Wolfgang Denk wrote:
>> Dear Rob Herring,
>>
>> In message 
>>  you 
>> wrote:
>>>
 Why would you ever want to compile this into U-Boot at all?  Then any
 changes you need to make mean compiling and installing a new U-Boot,
 which is something you normally don't want to do.
>>>
>>> You may want to have factory default and "user" settings. Building in
>>> the factory settings would be one way to accomplish that.
>>
>> No. Handling these independently, outside of the compiled U-Boot image
>> is as easy, and much more flexible.
>>
 U-Boot is perfectly able to import such settings from text files (or
 text blobs stored somewhere, even attached to the U-Boot image, if you
 want), so just use the text files separately, instead of hard
 compiling them into the code.
>>>
>>> In my case, I don't want to compile the environment into u-boot. But
>>> some people do as I copied my scripts from Tegra which has them
>>> built-in.
>
> We have the *default* environment built-in, which is used when no valid
> environment is found in flash. If there's an environment in flash, it
> gets used rather than the built-in default.

How can someone 'overwrite' the default environment from system or
when generating a FIT image?

I am interested in let my customers to revert back to a sane default running:

env -f -d -a
saveenv


-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://projetos.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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[U-Boot] [RESEND PATCH v2 10/20] sf: probe: Add support for AT45DB* flash parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added AT45DB* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_ATMEL

 drivers/mtd/spi/spi_flash_probe.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 34e7ca1..948fcdb 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -36,6 +36,15 @@ struct spi_flash_params {
 };
 
 static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_ATMEL  /* ATMEL */
+   {"AT45DB011D",  0x1f2200, 0x0, 64 * 1024,  4},
+   {"AT45DB021D",  0x1f2300, 0x0, 64 * 1024,  8},
+   {"AT45DB041D",  0x1f2400, 0x0, 64 * 1024,  8},
+   {"AT45DB081D",  0x1f2500, 0x0, 64 * 1024, 16},
+   {"AT45DB161D",  0x1f2600, 0x0, 64 * 1024, 32},
+   {"AT45DB321D",  0x1f2700, 0x0, 64 * 1024, 64},
+   {"AT45DB641D",  0x1f2800, 0x0, 64 * 1024,128},
+#endif
 #ifdef CONFIG_SPI_FLASH_EON/* EON */
{"EN25Q32B",0x1c3016, 0x0, 64 * 1024, 64},
{"EN25Q128B",   0x1c3018, 0x0, 64 * 1024,256},
@@ -135,7 +144,6 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
 */
/*
 * TODO:
-* ATMEL
 * RAMTRON
 */
 };
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 08/20] sf: probe: Add support for S25FL* flash parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_SPANSION

 drivers/mtd/spi/spi_flash_probe.c | 28 +++-
 1 file changed, 23 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 347455f..c1daab3 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -53,6 +53,19 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
{"MX25L12805",  0xc22018, 0x0, 64 * 1024,256},
{"MX25L12855E", 0xc22618, 0x0, 64 * 1024,256},
 #endif
+#ifdef CONFIG_SPI_FLASH_SPANSION   /* SPANSION */
+   {"S25FL008A",   0x010213, 0x0, 64 * 1024, 16},
+   {"S25FL016A",   0x010214, 0x0, 64 * 1024, 32},
+   {"S25FL032A",   0x010215, 0x0, 64 * 1024, 64},
+   {"S25FL064A",   0x010216, 0x0, 64 * 1024,128},
+   {"S25FL128P_256K",  0x012018, 0x0300, 256 * 1024, 64},
+   {"S25FL128P_64K",   0x012018, 0x0301,  64 * 1024,256},
+   {"S25FL032P",   0x010215, 0x4d00,  64 * 1024, 64},
+   {"S25FL064P",   0x010216, 0x4d00,  64 * 1024,128},
+   {"S25FL128S_64K",   0x012018, 0x4d01,  64 * 1024,256},
+   {"S25FL256S_64K",   0x010219, 0x4d01,  64 * 1024,512},
+   {"S25FL512S_64K",   0x010220, 0x4d01,  64 * 1024,   1024},
+#endif
 #ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{"M25P10",  0x202011, 0x0, 32 * 1024,  4},
{"M25P20",  0x202012, 0x0, 64 * 1024,  4},
@@ -98,6 +111,7 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
/*
 * Note:
 * Below paired flash devices has similar spi_flash_params params.
+* (S25FL129P_64K, S25FL128S_64K)
 * (W25Q80BL, W25Q80BV)
 * (W25Q16CL, W25Q16DV)
 * (W25Q32BV, W25Q32FV_SPI)
@@ -111,7 +125,6 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
 * TODO:
 * ATMEL
 * RAMTRON
-* SPANSION
 * SST
 */
 };
@@ -122,19 +135,24 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave 
*spi, u8 *idcode)
struct spi_flash *flash;
int i;
u16 jedec = idcode[1] << 8 | idcode[2];
+   u16 ext_jedec = idcode[3] << 8 | idcode[4];
 
-   /* Get the flash id (jedec = manuf_id + dev_id) */
+   /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
params = &spi_flash_params_table[i];
if ((params->jedec >> 16) == idcode[0]) {
-   if (((params->jedec << 16) >> 16) == jedec)
+   if (((params->jedec << 16) >> 16) == jedec) {
+   if ((params->ext_jedec != 0) &&
+   (params->ext_jedec == ext_jedec))
+   continue;
break;
+   }
}
}
 
if (i == ARRAY_SIZE(spi_flash_params_table)) {
-   printf("SF: Unsupported flash ID: manuf %02x, jedec %04x\n",
-  idcode[0], jedec);
+   printf("SF: Unsupported flash ID: manuf %02x, jedec %04x "
+  "ext_jedec %04x\n", idcode[0], jedec, ext_jedec);
return NULL;
}
 
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 12/20] sf: probe: Add support for SST_WP

2013-08-06 Thread Jagannadha Sutradharudu Teki
Most of the SST flashes needs to write up using SST_WP, AAI
Word Program, so added a flag param on spi_flash_params table.

SST flashes, which supports SST_WP need to use a WP write
sst_write_wp instead of common flash write.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/spi_flash_internal.h |   5 ++
 drivers/mtd/spi/spi_flash_ops.c  |  93 
 drivers/mtd/spi/spi_flash_probe.c| 160 ++-
 include/spi_flash.h  |   7 ++
 4 files changed, 188 insertions(+), 77 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash_internal.h 
b/drivers/mtd/spi/spi_flash_internal.h
index af1afa9..ce34ce0 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -75,6 +75,11 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 
*cmd, size_t cmd_len,
 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
size_t len, const void *buf);
 
+#ifdef CONFIG_SPI_FLASH_SST
+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+   const void *buf);
+#endif
+
 /*
  * Enable writing on the SPI flash.
  */
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index 6133363..79381b1 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -312,3 +312,96 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 
offset,
 
return ret;
 }
+
+#ifdef CONFIG_SPI_FLASH_SST
+static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
+{
+   int ret;
+   u8 cmd[4] = {
+   CMD_SST_BP,
+   offset >> 16,
+   offset >> 8,
+   offset,
+   };
+
+   debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
+ spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
+
+   ret = spi_flash_cmd_write_enable(flash);
+   if (ret)
+   return ret;
+
+   ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
+   if (ret)
+   return ret;
+
+   return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+}
+
+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+   const void *buf)
+{
+   size_t actual, cmd_len;
+   int ret;
+   u8 cmd[4];
+
+   ret = spi_claim_bus(flash->spi);
+   if (ret) {
+   debug("SF: Unable to claim SPI bus\n");
+   return ret;
+   }
+
+   /* If the data is not word aligned, write out leading single byte */
+   actual = offset % 2;
+   if (actual) {
+   ret = sst_byte_write(flash, offset, buf);
+   if (ret)
+   goto done;
+   }
+   offset += actual;
+
+   ret = spi_flash_cmd_write_enable(flash);
+   if (ret)
+   goto done;
+
+   cmd_len = 4;
+   cmd[0] = CMD_SST_AAI_WP;
+   cmd[1] = offset >> 16;
+   cmd[2] = offset >> 8;
+   cmd[3] = offset;
+
+   for (; actual < len - 1; actual += 2) {
+   debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
+ spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
+ cmd[0], offset);
+
+   ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
+   buf + actual, 2);
+   if (ret) {
+   debug("SF: sst word program failed\n");
+   break;
+   }
+
+   ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+   if (ret)
+   break;
+
+   cmd_len = 1;
+   offset += 2;
+   }
+
+   if (!ret)
+   ret = spi_flash_cmd_write_disable(flash);
+
+   /* If there is a single trailing byte, write it out */
+   if (!ret && actual != len)
+   ret = sst_byte_write(flash, offset, buf + actual);
+
+ done:
+   debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
+ ret ? "failure" : "success", len, offset - actual);
+
+   spi_release_bus(flash->spi);
+   return ret;
+}
+#endif
diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 94505b3..e045e53 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -26,6 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
  * @ext_jedec: Device ext_jedec ID
  * @sector_size:   Sector size of this device
  * @nr_sectors:No.of sectors on this device
+ * @flags: Importent param, for flash specific behaviour
  */
 struct spi_flash_params {
const char *name;
@@ -33,101 +34,102 @@ struct spi_flash_params {
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
+   u16 flags;
 };
 
 static const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL  /* ATMEL 

[U-Boot] [RESEND PATCH v2 14/20] sf: probe: Add support for erase sector selection flag

2013-08-06 Thread Jagannadha Sutradharudu Teki
SECT_4K, SECT_32K and SECT_64K opeartions are performed to
to specific flash by adding a SECT* flag on respective
spi_flash_params.flag param.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/spi_flash_ops.c   |   8 +-
 drivers/mtd/spi/spi_flash_probe.c | 166 --
 include/spi_flash.h   |  10 ++-
 3 files changed, 100 insertions(+), 84 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index 79381b1..c408e27 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -153,17 +153,13 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 
offset, size_t len)
u8 cmd[4];
int ret = -1;
 
-   erase_size = flash->sector_size;
+   erase_size = flash->erase_size;
if (offset % erase_size || len % erase_size) {
debug("SF: Erase offset/length not multiple of erase size\n");
return -1;
}
 
-   if (erase_size == 4096)
-   cmd[0] = CMD_ERASE_4K;
-   else
-   cmd[0] = CMD_ERASE_64K;
-
+   cmd[0] = flash->erase_cmd;
while (len) {
 #ifdef CONFIG_SPI_FLASH_BAR
u8 bank_sel;
diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 4368867..0d005a1 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -39,97 +39,97 @@ struct spi_flash_params {
 
 static const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL  /* ATMEL */
-   {"AT45DB011D", 0x1f2200, 0x0,   64 * 1024, 4,0},
-   {"AT45DB021D", 0x1f2300, 0x0,   64 * 1024, 8,0},
-   {"AT45DB041D", 0x1f2400, 0x0,   64 * 1024, 8,0},
-   {"AT45DB081D", 0x1f2500, 0x0,   64 * 1024,16,0},
-   {"AT45DB161D", 0x1f2600, 0x0,   64 * 1024,32,0},
-   {"AT45DB321D", 0x1f2700, 0x0,   64 * 1024,64,0},
-   {"AT45DB641D", 0x1f2800, 0x0,   64 * 1024,   128,0},
+   {"AT45DB011D", 0x1f2200, 0x0,   64 * 1024, 4,  
SECT_4K},
+   {"AT45DB021D", 0x1f2300, 0x0,   64 * 1024, 8,  
SECT_4K},
+   {"AT45DB041D", 0x1f2400, 0x0,   64 * 1024, 8,  
SECT_4K},
+   {"AT45DB081D", 0x1f2500, 0x0,   64 * 1024,16,  
SECT_4K},
+   {"AT45DB161D", 0x1f2600, 0x0,   64 * 1024,32,  
SECT_4K},
+   {"AT45DB321D", 0x1f2700, 0x0,   64 * 1024,64,  
SECT_4K},
+   {"AT45DB641D", 0x1f2800, 0x0,   64 * 1024,   128,  
SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_EON/* EON */
-   {"EN25Q32B",   0x1c3016, 0x0,   64 * 1024,64,0},
-   {"EN25Q128B",  0x1c3018, 0x0,   64 * 1024,   256,0},
+   {"EN25Q32B",   0x1c3016, 0x0,   64 * 1024,64,   
 0},
+   {"EN25Q128B",  0x1c3018, 0x0,   64 * 1024,   256,   
 0},
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
-   {"GD25Q64B",   0xc84017, 0x0,   64 * 1024,   128,0},
-   {"GD25LQ32",   0xc86016, 0x0,   64 * 1024,64,0},
+   {"GD25Q64B",   0xc84017, 0x0,   64 * 1024,   128,  
SECT_4K},
+   {"GD25LQ32",   0xc86016, 0x0,   64 * 1024,64,  
SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX   /* MACRONIX */
-   {"MX25L4005",  0xc22013, 0x0,   64 * 1024, 8,0},
-   {"MX25L8005",  0xc22014, 0x0,   64 * 1024,16,0},
-   {"MX25L1605D", 0xc22015, 0x0,   64 * 1024,32,0},
-   {"MX25L3205D", 0xc22016, 0x0,   64 * 1024,64,0},
-   {"MX25L6405D", 0xc22017, 0x0,   64 * 1024,   128,0},
-   {"MX25L12805", 0xc22018, 0x0,   64 * 1024,   256,0},
-   {"MX25L12855E",0xc22618, 0x0,   64 * 1024,   256,0},
+   {"MX25L4005",  0xc22013, 0x0,   64 * 1024, 8,   
 0},
+   {"MX25L8005",  0xc22014, 0x0,   64 * 1024,16,   
 0},
+   {"MX25L1605D", 0xc22015, 0x0,   64 * 1024,32,   
 0},
+   {"MX25L3205D", 0xc22016, 0x0,   64 * 1024,64,   
 0},
+   {"MX25L6405D", 0xc22017, 0x0,   64 * 1024,   128,   
 0},
+   {"MX25L12805", 0xc22018, 0x0,   64 * 1024,   256,   
 0},
+   {"MX25L12855E",0xc22618, 0x0,   64 * 1024,   256,   
 0},
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION   /* SPANSION */
-   {"S25FL008A",  0x010213, 0x0,   

[U-Boot] [RESEND PATCH v2 18/20] sf: ramtron: Add support for separate flash driver

2013-08-06 Thread Jagannadha Sutradharudu Teki
Compared to other spi flashes, ramtron has a different
probing and implementation on flash ops, hence moved
ramtron probe code into ramtron driver.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/Makefile |   6 +-
 drivers/mtd/spi/ramtron.c| 123 +-
 drivers/mtd/spi/spi_flash_internal.h |   1 -
 drivers/mtd/spi/spi_flash_probe.c|   4 -
 drivers/mtd/spi/spi_flash_probe_legacy.c | 274 ---
 include/configs/top9000.h|   1 -
 6 files changed, 125 insertions(+), 284 deletions(-)
 delete mode 100644 drivers/mtd/spi/spi_flash_probe_legacy.c

diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 452747a..e06924a 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -13,8 +13,10 @@ ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_SPI_LOAD)   += spi_spl_load.o
 endif
 
-COBJS-$(CONFIG_SPI_FLASH_LEGACY) += spi_flash_probe_legacy.o spi_flash_ops.o 
spi_flash.o
-COBJS-$(CONFIG_SPI_FLASH)  += spi_flash_probe.o spi_flash_ops.o spi_flash.o
+ifdef CONFIG_CMD_SF
+COBJS-y+= spi_flash.o
+endif
+COBJS-$(CONFIG_SPI_FLASH)  += spi_flash_probe.o spi_flash_ops.o
 COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
 COBJS-$(CONFIG_SPI_FLASH_EON)  += eon.o
 COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE)   += gigadevice.o
diff --git a/drivers/mtd/spi/ramtron.c b/drivers/mtd/spi/ramtron.c
index 38f9d69..c9701d0 100644
--- a/drivers/mtd/spi/ramtron.c
+++ b/drivers/mtd/spi/ramtron.c
@@ -214,7 +214,8 @@ static int ramtron_erase(struct spi_flash *flash, u32 
offset, size_t len)
  * nore: we are called here with idcode pointing to the first non-0x7f byte
  * already!
  */
-struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode)
+static struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi,
+   u8 *idcode)
 {
const struct ramtron_spi_fram_params *params;
struct ramtron_spi_fram *sn;
@@ -270,7 +271,7 @@ struct spi_flash *spi_fram_probe_ramtron(struct spi_slave 
*spi, u8 *idcode)
return NULL;
 
 found:
-   sn = spi_flash_alloc(struct ramtron_spi_fram, spi, params->name);
+   sn = malloc(sizeof(*sn));
if (!sn) {
debug("SF: Failed to allocate memory\n");
return NULL;
@@ -285,3 +286,121 @@ found:
 
return &sn->flash;
 }
+
+/*
+ * The following table holds all device probe functions
+ * (All flashes are removed and implemented a common probe at
+ *  spi_flash_probe.c)
+ *
+ * shift:  number of continuation bytes before the ID
+ * idcode: the expected IDCODE or 0xff for non JEDEC devices
+ * probe:  the function to call
+ *
+ * Non JEDEC devices should be ordered in the table such that
+ * the probe functions with best detection algorithms come first.
+ *
+ * Several matching entries are permitted, they will be tried
+ * in sequence until a probe function returns non NULL.
+ *
+ * IDCODE_CONT_LEN may be redefined if a device needs to declare a
+ * larger "shift" value.  IDCODE_PART_LEN generally shouldn't be
+ * changed.  This is the max number of bytes probe functions may
+ * examine when looking up part-specific identification info.
+ *
+ * Probe functions will be given the idcode buffer starting at their
+ * manu id byte (the "idcode" in the table below).  In other words,
+ * all of the continuation bytes will be skipped (the "shift" below).
+ */
+#define IDCODE_CONT_LEN 0
+#define IDCODE_PART_LEN 5
+static const struct {
+   const u8 shift;
+   const u8 idcode;
+   struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
+} flashes[] = {
+   /* Keep it sorted by define name */
+#ifdef CONFIG_SPI_FRAM_RAMTRON
+   { 6, 0xc2, spi_fram_probe_ramtron, },
+# undef IDCODE_CONT_LEN
+# define IDCODE_CONT_LEN 6
+#endif
+#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
+   { 0, 0xff, spi_fram_probe_ramtron, },
+#endif
+};
+#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
+
+struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
+   unsigned int max_hz, unsigned int spi_mode)
+{
+   struct spi_slave *spi;
+   struct spi_flash *flash = NULL;
+   int ret, i, shift;
+   u8 idcode[IDCODE_LEN], *idp;
+
+   spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
+   if (!spi) {
+   printf("SF: Failed to set up slave\n");
+   return NULL;
+   }
+
+   ret = spi_claim_bus(spi);
+   if (ret) {
+   debug("SF: Failed to claim SPI bus: %d\n", ret);
+   goto err_claim_bus;
+   }
+
+   /* Read the ID codes */
+   ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
+   if (ret)
+   goto err_read_id;
+
+#ifdef DEBUG
+   printf("SF: Got idcodes\n");
+   print_buffer(0, idcode, 1, sizeof(idcode), 0);
+#endif
+
+   /* count the number of continuation bytes */
+   for (shift = 0, idp = idcode;

[U-Boot] [RESEND PATCH v2 11/20] sf: probe: Give proper spacing on flash table params

2013-08-06 Thread Jagannadha Sutradharudu Teki
Given proper spacing between flash table params.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
 drivers/mtd/spi/spi_flash_probe.c | 154 +++---
 1 file changed, 77 insertions(+), 77 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 948fcdb..94505b3 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -37,97 +37,97 @@ struct spi_flash_params {
 
 static const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL  /* ATMEL */
-   {"AT45DB011D",  0x1f2200, 0x0, 64 * 1024,  4},
-   {"AT45DB021D",  0x1f2300, 0x0, 64 * 1024,  8},
-   {"AT45DB041D",  0x1f2400, 0x0, 64 * 1024,  8},
-   {"AT45DB081D",  0x1f2500, 0x0, 64 * 1024, 16},
-   {"AT45DB161D",  0x1f2600, 0x0, 64 * 1024, 32},
-   {"AT45DB321D",  0x1f2700, 0x0, 64 * 1024, 64},
-   {"AT45DB641D",  0x1f2800, 0x0, 64 * 1024,128},
+   {"AT45DB011D", 0x1f2200, 0x0,   64 * 1024, 4},
+   {"AT45DB021D", 0x1f2300, 0x0,   64 * 1024, 8},
+   {"AT45DB041D", 0x1f2400, 0x0,   64 * 1024, 8},
+   {"AT45DB081D", 0x1f2500, 0x0,   64 * 1024,16},
+   {"AT45DB161D", 0x1f2600, 0x0,   64 * 1024,32},
+   {"AT45DB321D", 0x1f2700, 0x0,   64 * 1024,64},
+   {"AT45DB641D", 0x1f2800, 0x0,   64 * 1024,   128},
 #endif
 #ifdef CONFIG_SPI_FLASH_EON/* EON */
-   {"EN25Q32B",0x1c3016, 0x0, 64 * 1024, 64},
-   {"EN25Q128B",   0x1c3018, 0x0, 64 * 1024,256},
+   {"EN25Q32B",   0x1c3016, 0x0,   64 * 1024,64},
+   {"EN25Q128B",  0x1c3018, 0x0,   64 * 1024,   256},
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
-   {"GD25Q64B",0xc84017, 0x0, 64 * 1024,128},
-   {"GD25LQ32",0xc86016, 0x0, 64 * 1024, 64},
+   {"GD25Q64B",   0xc84017, 0x0,   64 * 1024,   128},
+   {"GD25LQ32",   0xc86016, 0x0,   64 * 1024,64},
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX   /* MACRONIX */
-   {"MX25L4005",   0xc22013, 0x0, 64 * 1024,  8},
-   {"MX25L8005",   0xc22014, 0x0, 64 * 1024, 16},
-   {"MX25L1605D",  0xc22015, 0x0, 64 * 1024, 32},
-   {"MX25L3205D",  0xc22016, 0x0, 64 * 1024, 64},
-   {"MX25L6405D",  0xc22017, 0x0, 64 * 1024,128},
-   {"MX25L12805",  0xc22018, 0x0, 64 * 1024,256},
-   {"MX25L12855E", 0xc22618, 0x0, 64 * 1024,256},
+   {"MX25L4005",  0xc22013, 0x0,   64 * 1024, 8},
+   {"MX25L8005",  0xc22014, 0x0,   64 * 1024,16},
+   {"MX25L1605D", 0xc22015, 0x0,   64 * 1024,32},
+   {"MX25L3205D", 0xc22016, 0x0,   64 * 1024,64},
+   {"MX25L6405D", 0xc22017, 0x0,   64 * 1024,   128},
+   {"MX25L12805", 0xc22018, 0x0,   64 * 1024,   256},
+   {"MX25L12855E",0xc22618, 0x0,   64 * 1024,   256},
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION   /* SPANSION */
-   {"S25FL008A",   0x010213, 0x0, 64 * 1024, 16},
-   {"S25FL016A",   0x010214, 0x0, 64 * 1024, 32},
-   {"S25FL032A",   0x010215, 0x0, 64 * 1024, 64},
-   {"S25FL064A",   0x010216, 0x0, 64 * 1024,128},
-   {"S25FL128P_256K",  0x012018, 0x0300, 256 * 1024, 64},
-   {"S25FL128P_64K",   0x012018, 0x0301,  64 * 1024,256},
-   {"S25FL032P",   0x010215, 0x4d00,  64 * 1024, 64},
-   {"S25FL064P",   0x010216, 0x4d00,  64 * 1024,128},
-   {"S25FL128S_64K",   0x012018, 0x4d01,  64 * 1024,256},
-   {"S25FL256S_64K",   0x010219, 0x4d01,  64 * 1024,512},
-   {"S25FL512S_64K",   0x010220, 0x4d01,  64 * 1024,   1024},
+   {"S25FL008A",  0x010213, 0x0,   64 * 1024,16},
+   {"S25FL016A",  0x010214, 0x0,   64 * 1024,32},
+   {"S25FL032A",  0x010215, 0x0,   64 * 1024,64},
+   {"S25FL064A",  0x010216, 0x0,   64 * 1024,   128},
+   {"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,64},
+   {"S25FL128P_64K",  0x012018, 0x0301,64 * 1024,   256},
+   {"S25FL032P",  0x010215, 0x4d00,64 * 1024,64},
+   {"S25FL064P",  0x010216, 0x4d00,64 * 1024,   128},
+   {"S25FL128S_64K",  0x012018, 0x4d01,64 * 1024,   256},
+   {"S25FL256S_64K",  0x010219, 0x4d01,64 * 1024,   512},
+   {"S25FL512S_64K",  0x010220, 0x4d01,64 * 1024,  1024},
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
-   {"M25P10",  0x202011, 0x0, 32 * 1024,  4},
-   {"M25P2

[U-Boot] [RESEND PATCH v2 05/20] sf: probe: Add support for GD25* flash parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added GD25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_GIGADEVICE

 drivers/mtd/spi/spi_flash_probe.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 4fd2b31..21cd483 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -40,6 +40,10 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
{"EN25Q32B",0x1c3016, 0x0, 64 * 1024, 64},
{"EN25Q128B",   0x1c3018, 0x0, 64 * 1024,256},
 #endif
+#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
+   {"GD25Q64B",0xc84017, 0x0, 64 * 1024,128},
+   {"GD25LQ32",0xc86016, 0x0, 64 * 1024, 64},
+#endif
 #ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{"M25P10",  0x202011, 0x0, 32 * 1024,  4},
{"M25P20",  0x202012, 0x0, 64 * 1024,  4},
@@ -65,7 +69,6 @@ static const struct spi_flash_params spi_flash_params_table[] 
= {
/*
 * TODO:
 * ATMEL
-* GIGADEVICE
 * MACRONIX
 * RAMTRON
 * SPANSION
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 19/20] sf: Remove unneeded flash drivers files

2013-08-06 Thread Jagannadha Sutradharudu Teki
Now the common probing is handled in spi_flash_probe.c
hence removed the unneeded flash drivers.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/Makefile |  12 +-
 drivers/mtd/spi/atmel.c  | 544 ---
 drivers/mtd/spi/eon.c|  60 
 drivers/mtd/spi/gigadevice.c |  65 -
 drivers/mtd/spi/macronix.c   |  98 ---
 drivers/mtd/spi/ramtron.c| 406 --
 drivers/mtd/spi/spansion.c   | 141 -
 drivers/mtd/spi/spi_flash_internal.h |  10 -
 drivers/mtd/spi/sst.c| 232 ---
 drivers/mtd/spi/stmicro.c| 202 -
 drivers/mtd/spi/winbond.c| 141 -
 11 files changed, 2 insertions(+), 1909 deletions(-)
 delete mode 100644 drivers/mtd/spi/atmel.c
 delete mode 100644 drivers/mtd/spi/eon.c
 delete mode 100644 drivers/mtd/spi/gigadevice.c
 delete mode 100644 drivers/mtd/spi/macronix.c
 delete mode 100644 drivers/mtd/spi/ramtron.c
 delete mode 100644 drivers/mtd/spi/spansion.c
 delete mode 100644 drivers/mtd/spi/sst.c
 delete mode 100644 drivers/mtd/spi/stmicro.c
 delete mode 100644 drivers/mtd/spi/winbond.c

diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index e06924a..db2003b 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -16,16 +16,8 @@ endif
 ifdef CONFIG_CMD_SF
 COBJS-y+= spi_flash.o
 endif
-COBJS-$(CONFIG_SPI_FLASH)  += spi_flash_probe.o spi_flash_ops.o
-COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
-COBJS-$(CONFIG_SPI_FLASH_EON)  += eon.o
-COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE)   += gigadevice.o
-COBJS-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.o
-COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o
-COBJS-$(CONFIG_SPI_FLASH_SST)  += sst.o
-COBJS-$(CONFIG_SPI_FLASH_STMICRO)  += stmicro.o
-COBJS-$(CONFIG_SPI_FLASH_WINBOND)  += winbond.o
-COBJS-$(CONFIG_SPI_FRAM_RAMTRON)   += ramtron.o
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
+COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
 COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
 
 COBJS  := $(COBJS-y)
diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c
deleted file mode 100644
index f34df43..000
--- a/drivers/mtd/spi/atmel.c
+++ /dev/null
@@ -1,544 +0,0 @@
-/*
- * Atmel SPI DataFlash support
- *
- * Copyright (C) 2008 Atmel Corporation
- * Licensed under the GPL-2 or later.
- */
-
-#include 
-#include 
-#include 
-
-#include "spi_flash_internal.h"
-
-/* AT45-specific commands */
-#define CMD_AT45_READ_STATUS   0xd7
-#define CMD_AT45_ERASE_PAGE0x81
-#define CMD_AT45_LOAD_PROG_BUF10x82
-#define CMD_AT45_LOAD_BUF1 0x84
-#define CMD_AT45_LOAD_PROG_BUF20x85
-#define CMD_AT45_LOAD_BUF2 0x87
-#define CMD_AT45_PROG_BUF1 0x88
-#define CMD_AT45_PROG_BUF2 0x89
-
-/* AT45 status register bits */
-#define AT45_STATUS_P2_PAGE_SIZE   (1 << 0)
-#define AT45_STATUS_READY  (1 << 7)
-
-/* DataFlash family IDs, as obtained from the second idcode byte */
-#define DF_FAMILY_AT26F0
-#define DF_FAMILY_AT45 1
-#define DF_FAMILY_AT26DF   2   /* AT25DF and AT26DF */
-
-struct atmel_spi_flash_params {
-   u8  idcode1;
-   /* Log2 of page size in power-of-two mode */
-   u8  l2_page_size;
-   u8  pages_per_block;
-   u8  blocks_per_sector;
-   u8  nr_sectors;
-   const char  *name;
-};
-
-/* spi_flash needs to be first so upper layers can free() it */
-struct atmel_spi_flash {
-   struct spi_flash flash;
-   const struct atmel_spi_flash_params *params;
-};
-
-static inline struct atmel_spi_flash *
-to_atmel_spi_flash(struct spi_flash *flash)
-{
-   return container_of(flash, struct atmel_spi_flash, flash);
-}
-
-static const struct atmel_spi_flash_params atmel_spi_flash_table[] = {
-   {
-   .idcode1= 0x22,
-   .l2_page_size   = 8,
-   .pages_per_block= 8,
-   .blocks_per_sector  = 16,
-   .nr_sectors = 4,
-   .name   = "AT45DB011D",
-   },
-   {
-   .idcode1= 0x23,
-   .l2_page_size   = 8,
-   .pages_per_block= 8,
-   .blocks_per_sector  = 16,
-   .nr_sectors = 8,
-   .name   = "AT45DB021D",
-   },
-   {
-   .idcode1= 0x24,
-   .l2_page_size   = 8,
-   .pages_per_block= 8,
-   .blocks_per_sector  = 32,
-   .nr_sectors = 8,
-   .name   = "AT45DB041D",
- 

[U-Boot] [RESEND PATCH v2 15/20] sf: probe: Add support for flag status polling

2013-08-06 Thread Jagannadha Sutradharudu Teki
>From Micron, 512MB onwards, flash requires to poll flag status
instead of read status- hence added E_FSR flag on spectific
flash parts.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/spi_flash_probe.c | 14 +-
 include/spi_flash.h   |  1 +
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index 0d005a1..acccee0 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -94,10 +94,10 @@ static const struct spi_flash_params 
spi_flash_params_table[] = {
{"N25Q128A",   0x20bb18, 0x0,   64 * 1024,   256,  
SECT_4K},
{"N25Q256",0x20ba19, 0x0,   64 * 1024,   512,  
SECT_4K},
{"N25Q256A",   0x20bb19, 0x0,   64 * 1024,   512,  
SECT_4K},
-   {"N25Q512",0x20ba20, 0x0,   64 * 1024,  1024,  
SECT_4K},
-   {"N25Q512A",   0x20bb20, 0x0,   64 * 1024,  1024,  
SECT_4K},
-   {"N25Q1024",   0x20ba21, 0x0,   64 * 1024,  2048,  
SECT_4K},
-   {"N25Q1024A",  0x20bb21, 0x0,   64 * 1024,  2048,  
SECT_4K},
+   {"N25Q512",0x20ba20, 0x0,   64 * 1024,  1024,  E_FSR | 
SECT_4K},
+   {"N25Q512A",   0x20bb20, 0x0,   64 * 1024,  1024,  E_FSR | 
SECT_4K},
+   {"N25Q1024",   0x20ba21, 0x0,   64 * 1024,  2048,  E_FSR | 
SECT_4K},
+   {"N25Q1024A",  0x20bb21, 0x0,   64 * 1024,  2048,  E_FSR | 
SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_SST/* SST */
{"SST25VF040B",0xbf258d, 0x0,   64 * 1024, 8, SECT_4K | 
SST_WP},
@@ -186,7 +186,6 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave 
*spi, u8 *idcode)
 
flash->spi = spi;
flash->name = params->name;
-   flash->poll_cmd = CMD_READ_STATUS;
 
/* Assign spi_flash ops */
flash->write = spi_flash_cmd_write_multi;
@@ -214,6 +213,11 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave 
*spi, u8 *idcode)
flash->erase_size = flash->sector_size;
}
 
+   /* Poll cmd seclection */
+   flash->poll_cmd = CMD_READ_STATUS;
+   if (params->flags & E_FSR)
+   flash->poll_cmd = CMD_FLAG_STATUS;
+
/* Flash powers up read-only, so clear BP# bits */
if (((params->jedec >> 16) == SPI_FLASH_CFI_MFR_ATMEL) ||
((params->jedec >> 16) == SPI_FLASH_CFI_MFR_MACRONIX) ||
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 387af86..3e60fdc 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -25,6 +25,7 @@
 /* SECT flags */
 #define SECT_4K(1 << 0)
 #define SECT_32K   (1 << 1)
+#define E_FSR  (1 << 2)
 
 /* SST specific macros */
 #ifdef CONFIG_SPI_FLASH_SST
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 04/20] sf: probe: Add support for EN25Q* flash parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added EN25Q* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- Enable CONFIG_SPI_FLASH_EON

 drivers/mtd/spi/spi_flash_probe.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index a107978..4fd2b31 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -36,6 +36,10 @@ struct spi_flash_params {
 };
 
 static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_EON/* EON */
+   {"EN25Q32B",0x1c3016, 0x0, 64 * 1024, 64},
+   {"EN25Q128B",   0x1c3018, 0x0, 64 * 1024,256},
+#endif
 #ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{"M25P10",  0x202011, 0x0, 32 * 1024,  4},
{"M25P20",  0x202012, 0x0, 64 * 1024,  4},
@@ -61,7 +65,6 @@ static const struct spi_flash_params spi_flash_params_table[] 
= {
/*
 * TODO:
 * ATMEL
-* EON
 * GIGADEVICE
 * MACRONIX
 * RAMTRON
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 03/20] sf: probe: Add support for M25P* flash parts

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added M25P* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size of flash.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- none

 drivers/mtd/spi/spi_flash_probe.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index f2de72d..a107978 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -37,6 +37,14 @@ struct spi_flash_params {
 
 static const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
+   {"M25P10",  0x202011, 0x0, 32 * 1024,  4},
+   {"M25P20",  0x202012, 0x0, 64 * 1024,  4},
+   {"M25P40",  0x202013, 0x0, 64 * 1024,  8},
+   {"M25P80",  0x202014, 0x0, 64 * 1024, 16},
+   {"M25P16",  0x202015, 0x0, 64 * 1024, 32},
+   {"M25P32",  0x202016, 0x0, 64 * 1024, 64},
+   {"M25P64",  0x202017, 0x0, 64 * 1024,128},
+   {"M25P128", 0x202018, 0x0,256 * 1024, 64},
{"N25Q32",  0x20ba16, 0x0, 64 * 1024, 64},
{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64},
{"N25Q64",  0x20ba17, 0x0, 64 * 1024,128},
@@ -59,7 +67,6 @@ static const struct spi_flash_params spi_flash_params_table[] 
= {
 * RAMTRON
 * SPANSION
 * SST
-* STMICRO (M25*)
 * WINBOND
 */
 };
-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 00/20] sf: Add common probe support

2013-08-06 Thread Jagannadha Sutradharudu Teki
Hi All,

This is a v2 series for "sf: Add common probe support"

I am u-boot/spi custodian, I removed all flash drivers files(except ramtron, 
handled in a separate driver) and implemented a common probe support.

Tested SST, STMICR, SPANSION, WINBOND from my side, REQUEST FOR ALL SPI CODE
FLASH_UESRS/CONTRIBUTORS/REST_USER, PLEASE TEST THESE CHANGES W.R.T YOUR HW IF 
POSSIBLE.

Please let me know for any issues/concerns/questions.

--
Thanks,
Jagan.

Jagannadha Sutradharudu Teki (20):
  sf: Divide spi_flash into multiple parts
  sf: probe: Add new spi_flash_probe support
  sf: probe: Add support for M25P* flash parts
  sf: probe: Add support for EN25Q* flash parts
  sf: probe: Add support for GD25* flash parts
  sf: probe: Add support for MX25L* flash parts
  sf: probe: Add support for W25* flash parts
  sf: probe: Add support for S25FL* flash parts
  sf: probe: Add support for SST25* flash parts
  sf: probe: Add support for AT45DB* flash parts
  sf: probe: Give proper spacing on flash table attributes
  sf: probe: Add support for SST_WP
  sf: probe: Add support to clear flash BP# bits
  sf: probe: Add support for erase sector selection flag
  sf: probe: Add support for flag status polling
  sf: probe: Move BAR config to spi_flash_validate_ids
  sf: Add proper comment style on spi_flash structure
  sf: ramtron: Add support for separate flash driver
  sf: Remove unneeded flash drivers files
  sf: probe: Add support for EN25Q64

 drivers/mtd/spi/Makefile |  15 +-
 drivers/mtd/spi/atmel.c  | 544 -
 drivers/mtd/spi/eon.c|  60 
 drivers/mtd/spi/gigadevice.c |  65 
 drivers/mtd/spi/macronix.c   |  98 --
 drivers/mtd/spi/ramtron.c| 287 --
 drivers/mtd/spi/spansion.c   | 141 -
 drivers/mtd/spi/spi_flash.c  | 569 +--
 drivers/mtd/spi/spi_flash_internal.h |  21 +-
 drivers/mtd/spi/spi_flash_ops.c  | 403 +
 drivers/mtd/spi/spi_flash_probe.c| 368 ++
 drivers/mtd/spi/sst.c| 232 --
 drivers/mtd/spi/stmicro.c| 202 -
 drivers/mtd/spi/winbond.c| 141 -
 include/configs/top9000.h|   1 -
 include/spi_flash.h  |  79 +++--
 16 files changed, 841 insertions(+), 2385 deletions(-)
 delete mode 100644 drivers/mtd/spi/atmel.c
 delete mode 100644 drivers/mtd/spi/eon.c
 delete mode 100644 drivers/mtd/spi/gigadevice.c
 delete mode 100644 drivers/mtd/spi/macronix.c
 delete mode 100644 drivers/mtd/spi/ramtron.c
 delete mode 100644 drivers/mtd/spi/spansion.c
 create mode 100644 drivers/mtd/spi/spi_flash_ops.c
 create mode 100644 drivers/mtd/spi/spi_flash_probe.c
 delete mode 100644 drivers/mtd/spi/sst.c
 delete mode 100644 drivers/mtd/spi/stmicro.c
 delete mode 100644 drivers/mtd/spi/winbond.c

-- 
1.8.3


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[U-Boot] [RESEND PATCH v2 02/20] sf: probe: Add new spi_flash_probe support

2013-08-06 Thread Jagannadha Sutradharudu Teki
Added new spi_flash_probe support, currently added N25Q*
flash part attributes support.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Defined CONFIG_SPI_FLASH_LEGACY for old probing style
which is available on spi_flash_probe_legacy.c, this will
removed soon once all flashes are supported in new spi_flash_probe.

Signed-off-by: Jagannadha Sutradharudu Teki 
---
Changes for v2:
- Removed CONFIG_SPI_FLASH_NEW, add CONFIG_SPI_FLASH_LEGACY
- Enable CONFIG_SPI_FLASH_STMICRO in spi_flash_params table
- Updated few structure members

 drivers/mtd/spi/Makefile |   1 +
 drivers/mtd/spi/spi_flash_probe.c| 230 --
 drivers/mtd/spi/spi_flash_probe_legacy.c | 274 +++
 3 files changed, 384 insertions(+), 121 deletions(-)
 create mode 100644 drivers/mtd/spi/spi_flash_probe_legacy.c

diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 0304b12..452747a 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -13,6 +13,7 @@ ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_SPI_LOAD)   += spi_spl_load.o
 endif
 
+COBJS-$(CONFIG_SPI_FLASH_LEGACY) += spi_flash_probe_legacy.o spi_flash_ops.o 
spi_flash.o
 COBJS-$(CONFIG_SPI_FLASH)  += spi_flash_probe.o spi_flash_ops.o spi_flash.o
 COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
 COBJS-$(CONFIG_SPI_FLASH_EON)  += eon.o
diff --git a/drivers/mtd/spi/spi_flash_probe.c 
b/drivers/mtd/spi/spi_flash_probe.c
index fedc81e..f2de72d 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -18,6 +18,98 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * struct spi_flash_params - SPI/QSPI flash device params structure
+ *
+ * @name:  Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
+ * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
+ * @ext_jedec: Device ext_jedec ID
+ * @sector_size:   Sector size of this device
+ * @nr_sectors:No.of sectors on this device
+ */
+struct spi_flash_params {
+   const char *name;
+   u32 jedec;
+   u16 ext_jedec;
+   u32 sector_size;
+   u32 nr_sectors;
+};
+
+static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
+   {"N25Q32",  0x20ba16, 0x0, 64 * 1024, 64},
+   {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64},
+   {"N25Q64",  0x20ba17, 0x0, 64 * 1024,128},
+   {"N25Q64A", 0x20bb17, 0x0, 64 * 1024,128},
+   {"N25Q128", 0x20ba18, 0x0, 64 * 1024,256},
+   {"N25Q128A",0x20bb18, 0x0, 64 * 1024,256},
+   {"N25Q256", 0x20ba19, 0x0, 64 * 1024,512},
+   {"N25Q256A",0x20bb19, 0x0, 64 * 1024,512},
+   {"N25Q512", 0x20ba20, 0x0, 64 * 1024,   1024},
+   {"N25Q512A",0x20bb20, 0x0, 64 * 1024,   1024},
+   {"N25Q1024",0x20ba21, 0x0, 64 * 1024,   2048},
+   {"N25Q1024A",   0x20bb21, 0x0, 64 * 1024,   2048},
+#endif
+   /*
+* TODO:
+* ATMEL
+* EON
+* GIGADEVICE
+* MACRONIX
+* RAMTRON
+* SPANSION
+* SST
+* STMICRO (M25*)
+* WINBOND
+*/
+};
+
+struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
+{
+   const struct spi_flash_params *params;
+   struct spi_flash *flash;
+   int i;
+   u16 jedec = idcode[1] << 8 | idcode[2];
+
+   /* Get the flash id (jedec = manuf_id + dev_id) */
+   for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
+   params = &spi_flash_params_table[i];
+   if ((params->jedec >> 16) == idcode[0]) {
+   if (((params->jedec << 16) >> 16) == jedec)
+   break;
+   }
+   }
+
+   if (i == ARRAY_SIZE(spi_flash_params_table)) {
+   printf("SF: Unsupported flash ID: manuf %02x, jedec %04x\n",
+  idcode[0], jedec);
+   return NULL;
+   }
+
+   flash = malloc(sizeof(*flash));
+   if (!flash) {
+   debug("SF: Failed to allocate spi_flash\n");
+   return NULL;
+   }
+   memset(flash, '\0', sizeof(*flash));
+
+   flash->spi = spi;
+   flash->name = params->name;
+   flash->poll_cmd = CMD_READ_STATUS;
+
+   /* Assign spi_flash ops */
+   flash->write = spi_flash_cmd_write_multi;
+   flash->erase = spi_flash_cmd_erase;
+   flash->read = spi_flash_cmd_read_fast;
+
+   /* Compute the flash size */
+   flash->page_size = 256;
+   flash->sector_size = params->sector_size;
+   flash->size = flash->sector_size * params->nr_sectors;
+
+   return flash;
+}
+
 

Re: [U-Boot] [PATCH 2/4] bootstage: get more BOOTSTAGE_ID* in show_boot_progress()

2013-08-06 Thread Simon Glass
On Mon, Aug 5, 2013 at 8:00 AM, Heiko Schocher  wrote:

> In case CONFIG_BOOTSTAGE is not defined, call from bootstage_mark_name()
> show_boot_progress(), so get more BOOTSTAGE_ID* ids in show_boot_progress()
> if CONFIG_BOOTSTAGE is not defined.
>
> Signed-off-by: Heiko Schocher 
> Cc: Simon Glass 
> Cc: Tom Rini 
> Cc: Albert Aribaud 
>

Acked-by: Simon Glass 


> ---
>  include/bootstage.h | 1 +
>  1 Datei geändert, 1 Zeile hinzugefügt(+)
>
> diff --git a/include/bootstage.h b/include/bootstage.h
> index 25b4e07..87bf906 100644
> --- a/include/bootstage.h
> +++ b/include/bootstage.h
> @@ -353,6 +353,7 @@ static inline ulong bootstage_error(enum bootstage_id
> id)
>
>  static inline ulong bootstage_mark_name(enum bootstage_id id, const char
> *name)
>  {
> +   show_boot_progress(id);
> return 0;
>  }
>
> --
> 1.7.11.7
>
>
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Re: [U-Boot] [RESEND PATCH v5 2/2] socfpga: Adding pin mux handoff files

2013-08-06 Thread Dinh Nguyen
On Tue, 2013-08-06 at 09:10 -0500, Chin Liang See wrote:
> Adding the generated pin mux
> configuration by Preloader Generator tool
> 
> Signed-off-by: Chin Liang See 
> Reviewed-by: Pavel Machek 
> Cc: Wolfgang Denk 
> CC: Pavel Machek 
> Cc: Dinh Nguyen 
> Cc: Tom Rini 
> Cc: Albert Aribaud 
> ---
> Changes for v2:
>- Fixed the word wrap issue within patch
> Changes for v3:
>- Fixed the long subject of the patch
> Changes for v4:
>- Added change log for each revision change
> Changes for v5:
>- Updated the license header for reset_manager.c
>- Updated the subject

Re-org with latest changes on top.

Acked-by: Dinh Nguyen 

Dinh
> ---
>  board/altera/socfpga/pinmux_config.c |  214 
> ++
>  board/altera/socfpga/pinmux_config.h |   54 +
>  2 files changed, 268 insertions(+)
>  create mode 100644 board/altera/socfpga/pinmux_config.c
>  create mode 100644 board/altera/socfpga/pinmux_config.h
> 
> diff --git a/board/altera/socfpga/pinmux_config.c 
> b/board/altera/socfpga/pinmux_config.c
> new file mode 100644
> index 000..8b09005
> --- /dev/null
> +++ b/board/altera/socfpga/pinmux_config.c
> @@ -0,0 +1,214 @@
> +/* This file is generated by Preloader Generator */
> +
> +#include "pinmux_config.h"
> +
> +/* pin mux configuration data */
> +unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
> + 0, /* EMACIO0 - Unused */
> + 2, /* EMACIO1 - USB */
> + 2, /* EMACIO2 - USB */
> + 2, /* EMACIO3 - USB */
> + 2, /* EMACIO4 - USB */
> + 2, /* EMACIO5 - USB */
> + 2, /* EMACIO6 - USB */
> + 2, /* EMACIO7 - USB */
> + 2, /* EMACIO8 - USB */
> + 0, /* EMACIO9 - Unused */
> + 2, /* EMACIO10 - USB */
> + 2, /* EMACIO11 - USB */
> + 2, /* EMACIO12 - USB */
> + 2, /* EMACIO13 - USB */
> + 0, /* EMACIO14 - N/A */
> + 0, /* EMACIO15 - N/A */
> + 0, /* EMACIO16 - N/A */
> + 0, /* EMACIO17 - N/A */
> + 0, /* EMACIO18 - N/A */
> + 0, /* EMACIO19 - N/A */
> + 3, /* FLASHIO0 - SDMMC */
> + 3, /* FLASHIO1 - SDMMC */
> + 3, /* FLASHIO2 - SDMMC */
> + 3, /* FLASHIO3 - SDMMC */
> + 0, /* FLASHIO4 - SDMMC */
> + 0, /* FLASHIO5 - SDMMC */
> + 0, /* FLASHIO6 - SDMMC */
> + 0, /* FLASHIO7 - SDMMC */
> + 0, /* FLASHIO8 - SDMMC */
> + 3, /* FLASHIO9 - SDMMC */
> + 3, /* FLASHIO10 - SDMMC */
> + 3, /* FLASHIO11 - SDMMC */
> + 3, /* GENERALIO0 - TRACE */
> + 3, /* GENERALIO1 - TRACE */
> + 3, /* GENERALIO2 - TRACE */
> + 3, /* GENERALIO3 - TRACE  */
> + 3, /* GENERALIO4 - TRACE  */
> + 3, /* GENERALIO5 - TRACE  */
> + 3, /* GENERALIO6 - TRACE  */
> + 3, /* GENERALIO7 - TRACE  */
> + 3, /* GENERALIO8 - TRACE  */
> + 3, /* GENERALIO9 - SPIM0 */
> + 3, /* GENERALIO10 - SPIM0 */
> + 3, /* GENERALIO11 - SPIM0 */
> + 3, /* GENERALIO12 - SPIM0 */
> + 2, /* GENERALIO13 - CAN0 */
> + 2, /* GENERALIO14 - CAN0 */
> + 3, /* GENERALIO15 - I2C0 */
> + 3, /* GENERALIO16 - I2C0 */
> + 2, /* GENERALIO17 - UART0 */
> + 2, /* GENERALIO18 - UART0 */
> + 0, /* GENERALIO19 - N/A */
> + 0, /* GENERALIO20 - N/A */
> + 0, /* GENERALIO21 - N/A */
> + 0, /* GENERALIO22 - N/A */
> + 0, /* GENERALIO23 - N/A */
> + 0, /* GENERALIO24 - N/A */
> + 0, /* GENERALIO25 - N/A */
> + 0, /* GENERALIO26 - N/A */
> + 0, /* GENERALIO27 - N/A */
> + 0, /* GENERALIO28 - N/A */
> + 0, /* GENERALIO29 - N/A */
> + 0, /* GENERALIO30 - N/A */
> + 0, /* GENERALIO31 - N/A */
> + 2, /* MIXED1IO0 - EMAC */
> + 2, /* MIXED1IO1 - EMAC */
> + 2, /* MIXED1IO2 - EMAC */
> + 2, /* MIXED1IO3 - EMAC */
> + 2, /* MIXED1IO4 - EMAC */
> + 2, /* MIXED1IO5 - EMAC */
> + 2, /* MIXED1IO6 - EMAC */
> + 2, /* MIXED1IO7 - EMAC */
> + 2, /* MIXED1IO8 - EMAC */
> + 2, /* MIXED1IO9 - EMAC */
> + 2, /* MIXED1IO10 - EMAC */
> + 2, /* MIXED1IO11 - EMAC */
> + 2, /* MIXED1IO12 - EMAC */
> + 2, /* MIXED1IO13 - EMAC */
> + 0, /* MIXED1IO14 - Unused */
> + 3, /* MIXED1IO15 - QSPI */
> + 3, /* MIXED1IO16 - QSPI */
> + 3, /* MIXED1IO17 - QSPI */
> + 3, /* MIXED1IO18 - QSPI */
> + 3, /* MIXED1IO19 - QSPI */
> + 3, /* MIXED1IO20 - QSPI */
> + 0, /* MIXED1IO21 - GPIO */
> + 0, /* MIXED2IO0 - N/A */
> + 0, /* MIXED2IO1 - N/A */
> + 0, /* MIXED2IO2 - N/A */
> + 0, /* MIXED2IO3 - N/A */
> + 0, /* MIXED2IO4 - N/A */
> + 0, /* MIXED2IO5 - N/A */
> + 0, /* MIXED2IO6 - N/A */
> + 0, /* MIXED2IO7 - N/A */
> + 0, /* GPLINMUX48 */
> + 0, /* GPLINMUX49 */
> + 0, /* GPLINMUX50 */
> + 0, /* GPLINMUX51 */
> + 0, /* GPLINMUX52 */
> + 0, /* GPLINMUX53 */
> + 0, /* GPLINMUX54 */
> + 0, /* GPLINMUX55 */
> + 0, /* GPLINMUX56 */
> + 0, /* GPLINMUX57 */
> + 0, /* GPLINMUX58 */
> + 0, /* GPLINMUX59 */
> + 0, /* GPLINMUX60 */
> + 0, /* GPLINMUX61 */
> +  

Re: [U-Boot] [RESEND PATCH v6 1/2] socfpga: Adding System Manager driver

2013-08-06 Thread Dinh Nguyen
On Tue, 2013-08-06 at 09:10 -0500, Chin Liang See wrote:
> Adding System Manager driver which will configure the
> pin mux for real hardware Cyclone V development kit
> (not Virtual Platform)
> 
> Signed-off-by: Chin Liang See 
> Reviewed-by: Pavel Machek 
> Cc: Wolfgang Denk 
> CC: Pavel Machek 
> Cc: Dinh Nguyen 
> Cc: Tom Rini 
> Cc: Albert Aribaud 
> ---
> Changes for v2:
>- Fixed the word wrap issue within patch 
> Changes for v3:
>- Fixed the long subject of the patch
>- Fixed the comment within the code
> Changes for v4:
>- Added change log for each revision change
> Changes for v5:
>- Updated the license header for system_manager.c
>- Cc: Tom Rini
> Changes for v6:
>- Updated the license header for system_manager.c and .h to SPDX

Re-org this with latest at the top.

Besides that:

Acked-by: Dinh Nguyen 

Dinh
> ---
>  arch/arm/cpu/armv7/socfpga/Makefile|2 +-
>  arch/arm/cpu/armv7/socfpga/spl.c   |6 
>  arch/arm/cpu/armv7/socfpga/system_manager.c|   29 
> 
>  .../include/asm/arch-socfpga/socfpga_base_addrs.h  |1 +
>  arch/arm/include/asm/arch-socfpga/system_manager.h |   22 +++
>  board/altera/socfpga/Makefile  |4 ++-
>  include/configs/socfpga_cyclone5.h |1 +
>  7 files changed, 63 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/cpu/armv7/socfpga/system_manager.c
>  create mode 100644 arch/arm/include/asm/arch-socfpga/system_manager.h
> 
> diff --git a/arch/arm/cpu/armv7/socfpga/Makefile 
> b/arch/arm/cpu/armv7/socfpga/Makefile
> index 5024fc5..0859e44 100644
> --- a/arch/arm/cpu/armv7/socfpga/Makefile
> +++ b/arch/arm/cpu/armv7/socfpga/Makefile
> @@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk
>  LIB  =  $(obj)lib$(SOC).o
>  
>  SOBJS:= lowlevel_init.o
> -COBJS-y  := misc.o timer.o reset_manager.o
> +COBJS-y  := misc.o timer.o reset_manager.o system_manager.o
>  COBJS-$(CONFIG_SPL_BUILD) += spl.o
>  
>  COBJS:= $(COBJS-y)
> diff --git a/arch/arm/cpu/armv7/socfpga/spl.c 
> b/arch/arm/cpu/armv7/socfpga/spl.c
> index 2b9be28..74bceab 100644
> --- a/arch/arm/cpu/armv7/socfpga/spl.c
> +++ b/arch/arm/cpu/armv7/socfpga/spl.c
> @@ -12,6 +12,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -25,6 +26,11 @@ u32 spl_boot_device(void)
>   */
>  void spl_board_init(void)
>  {
> +#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
> + /* configure the pin muxing through system manager */
> + sysmgr_pinmux_init();
> +#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
> +
>   /* de-assert reset for peripherals and bridges based on handoff */
>   reset_deassert_peripherals_handoff();
>  
> diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c 
> b/arch/arm/cpu/armv7/socfpga/system_manager.c
> new file mode 100644
> index 000..0b1bb33
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/socfpga/system_manager.c
> @@ -0,0 +1,29 @@
> +/*
> + * Copyright Altera Corporation (C) 2013
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Configure all the pin muxes
> + */
> +void sysmgr_pinmux_init(void)
> +{
> + unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET;
> +
> + const unsigned long *pval = sys_mgr_init_table;
> + unsigned long i;
> +
> + for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table);
> + i++, offset += sizeof(unsigned long)) {
> + writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset));
> + }
> +}
> +
> +
> diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h 
> b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> index 1182a13..50c4ebd 100644
> --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> @@ -12,5 +12,6 @@
>  #define SOCFPGA_UART1_ADDRESS 0xffc03000
>  #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0
>  #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
> +#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
>  
>  #endif /* _SOCFPGA_BASE_ADDRS_H_ */
> diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h 
> b/arch/arm/include/asm/arch-socfpga/system_manager.h
> new file mode 100644
> index 000..36a83b4
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-socfpga/system_manager.h
> @@ -0,0 +1,22 @@
> +/*
> + * Copyright Altera Corporation (C) 2013
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#ifndef  _SYSTEM_MANAGER_H_
> +#define  _SYSTEM_MANAGER_H_
> +
> +#ifndef __ASSEMBLY__
> +
> +void sysmgr_pinmux_init(void);
> +
> +/* declaration for handoff table type */
> +extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
> +
> +#endif
> +
> +
> +#define CONFIG_SYSMGR_PINMUXGRP_OFFSET   (0x400)
> +
> +#endif /* _SYSTEM_MANAGER_H_ */
> diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile
> index 101fc7c..9d

Re: [U-Boot] [RFC PATCH 0/2] Moving ARM DCC from stdio to serial

2013-08-06 Thread Wolfgang Denk
Dear Michal Simek,

In message  you wrote:
> 
> I am not sure about this change but it seems to me
> there shouldn't be any problem to remove stdio
> support because it can be simple another serial driver
> which can use serial multi interface.

Does this not mean we lose the capability to use DCC as console port?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
History is only a confused heap of facts.
   -- Philip Earl of Chesterfield
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Re: [U-Boot] [RESEND PATCH v5 1/1] socfpga: Adding configuration for development kit

2013-08-06 Thread Dinh Nguyen
On Tue, 2013-08-06 at 09:08 -0500, Chin Liang See wrote:
> Separating the configuration file for Virtual
> Target and real hardware Cyclone V development kit
> 
> Signed-off-by: Chin Liang See 
> Reviewed-by: Pavel Machek

Include Pavel's email address.

> Cc: Wolfgang Denk 
> CC: Pavel Machek 
> Cc: Dinh Nguyen 
> Cc: Tom Rini 
> Cc: Albert Aribaud 
> ---
> Changes for v2:
>- Fixed the word wrap issue within patch
> Changes for v3:
>- Fixed the long subject of the patch
> Changes for v4:
>- Added change log for each revision change
> Changes for v5:
>- Added Reviewed-by: Pavel Machek
>- Cc: Tom Rini

Re-org this to have the latest, v5 at the top.

> ---
>  include/configs/socfpga_cyclone5.h |   28 +---
>  1 file changed, 21 insertions(+), 7 deletions(-)
> 
> diff --git a/include/configs/socfpga_cyclone5.h 
> b/include/configs/socfpga_cyclone5.h
> index b5a7a9a..06aeba6 100644
> --- a/include/configs/socfpga_cyclone5.h
> +++ b/include/configs/socfpga_cyclone5.h
> @@ -11,6 +11,8 @@
>  /*
>   * High level configuration
>   */
> +/* Virtual target or real hardware */
> +#define CONFIG_SOCFPGA_VIRTUAL_TARGET
>  
>  #define CONFIG_ARMV7
>  #define CONFIG_L2_OFF
> @@ -21,11 +23,12 @@
>  #define CONFIG_SINGLE_BOOTLOADER
>  #define CONFIG_SOCFPGA
>  
> +/* base address for .text section */
> +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
>  #define CONFIG_SYS_TEXT_BASE 0x0840
> -#define V_NS16550_CLK100
> -#define CONFIG_BAUDRATE  57600
> -#define CONFIG_SYS_HZ1000
> -#define CONFIG_TIMER_CLOCK_KHZ   2400
> +#else
> +#define CONFIG_SYS_TEXT_BASE 0x0140
> +#endif
>  #define CONFIG_SYS_LOAD_ADDR 0x7fc0
>  
>  /* Console I/O Buffer Size */
> @@ -154,7 +157,7 @@
>  /* SDRAM Bank #1 */
>  #define CONFIG_SYS_SDRAM_BASE0x
>  /* SDRAM memory size */
> -#define PHYS_SDRAM_1_SIZE0x8000
> +#define PHYS_SDRAM_1_SIZE0x4000
>  
>  #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
>  #define CONFIG_SYS_MEMTEST_START 0x
> @@ -170,8 +173,13 @@
>  #define CONFIG_SYS_NS16550_CLK  V_NS16550_CLK
>  #define CONFIG_CONS_INDEX   1
>  #define CONFIG_SYS_NS16550_COM1  UART0_BASE
> -
>  #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
> +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> +#define V_NS16550_CLK100
> +#else
> +#define V_NS16550_CLK1
> +#endif
> +#define CONFIG_BAUDRATE  115200
>  
>  /*
>   * FLASH
> @@ -184,9 +192,15 @@
>  /* This timer use eosc1 where the clock frequency is fixed
>   * throughout any condition */
>  #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
> -
>  /* reload value when timer count to zero */
>  #define TIMER_LOAD_VAL   0x
> +/* Timer info */
> +#define CONFIG_SYS_HZ1000
> +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> +#define CONFIG_TIMER_CLOCK_KHZ   2400
> +#else
> +#define CONFIG_TIMER_CLOCK_KHZ   25000
> +#endif
>  
>  #define CONFIG_ENV_IS_NOWHERE
>  



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Re: [U-Boot] [RESEND PATCH v5 1/1] socfpga: Creating driver for Reset Manager

2013-08-06 Thread Dinh Nguyen
On Tue, 2013-08-06 at 09:09 -0500, Chin Liang See wrote:
> Consolidating reset code into reset_manager.c.
> Also separating reset configuration for virtual target
> and real hardware Cyclone V development kit
> 
> Signed-off-by: Chin Liang See 
> Reviewed-by: Pavel Machek

Add Pavel's email address.

> Cc: Wolfgang Denk 
> CC: Pavel Machek 
> Cc: Dinh Nguyen 
> Cc: Tom Rini 
> Cc: Albert Aribaud 
> ---
> Changes for v2:
>- Fixed the long subject of the patch
>- Consolidated the reset_manager structure between virtual target and dev 
> kit
> Changes for v3:
>- Added change log for each revision change
>- Removed the < > between the date of copyright header
> Changes for v4:
>- Updated the license header for reset_manager.c
> Changes for v5:
>- Updated the license header for reset_manager.c to SPDX

re-org to have latest changes, v5, at the top.
> ---
>  arch/arm/cpu/armv7/socfpga/Makefile   |2 +-
>  arch/arm/cpu/armv7/socfpga/misc.c |   27 --
>  arch/arm/cpu/armv7/socfpga/reset_manager.c|   40 
> +
>  arch/arm/include/asm/arch-socfpga/reset_manager.h |   10 --
>  4 files changed, 48 insertions(+), 31 deletions(-)
>  create mode 100644 arch/arm/cpu/armv7/socfpga/reset_manager.c
> 
> diff --git a/arch/arm/cpu/armv7/socfpga/Makefile 
> b/arch/arm/cpu/armv7/socfpga/Makefile
> index 3b48ac9..5024fc5 100644
> --- a/arch/arm/cpu/armv7/socfpga/Makefile
> +++ b/arch/arm/cpu/armv7/socfpga/Makefile
> @@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk
>  LIB  =  $(obj)lib$(SOC).o
>  
>  SOBJS:= lowlevel_init.o
> -COBJS-y  := misc.o timer.o
> +COBJS-y  := misc.o timer.o reset_manager.o
>  COBJS-$(CONFIG_SPL_BUILD) += spl.o
>  
>  COBJS:= $(COBJS-y)
> diff --git a/arch/arm/cpu/armv7/socfpga/misc.c 
> b/arch/arm/cpu/armv7/socfpga/misc.c
> index 66edb3c..2f1c716 100644
> --- a/arch/arm/cpu/armv7/socfpga/misc.c
> +++ b/arch/arm/cpu/armv7/socfpga/misc.c
> @@ -6,36 +6,9 @@
>  
>  #include 
>  #include 
> -#include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> -static const struct socfpga_reset_manager *reset_manager_base =
> - (void *)SOCFPGA_RSTMGR_ADDRESS;
> -
> -/*
> - * Write the reset manager register to cause reset
> - */
> -void reset_cpu(ulong addr)
> -{
> - /* request a warm reset */
> - writel(RSTMGR_CTRL_SWWARMRSTREQ_LSB, &reset_manager_base->ctrl);
> - /*
> -  * infinite loop here as watchdog will trigger and reset
> -  * the processor
> -  */
> - while (1)
> - ;
> -}
> -
> -/*
> - * Release peripherals from reset based on handoff
> - */
> -void reset_deassert_peripherals_handoff(void)
> -{
> - writel(0, &reset_manager_base->per_mod_reset);
> -}
> -
>  int dram_init(void)
>  {
>   gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
> diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c 
> b/arch/arm/cpu/armv7/socfpga/reset_manager.c
> new file mode 100644
> index 000..2281743
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c
> @@ -0,0 +1,40 @@
> +/*
> + * Copyright Altera Corporation (C) 2013
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static const struct socfpga_reset_manager *reset_manager_base =
> + (void *)SOCFPGA_RSTMGR_ADDRESS;
> +
> +/*
> + * Write the reset manager register to cause reset
> + */
> +void reset_cpu(ulong addr)
> +{
> + /* request a warm reset */
> + writel((1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB),
> + &reset_manager_base->ctrl);
> + /*
> +  * infinite loop here as watchdog will trigger and reset
> +  * the processor
> +  */
> + while (1)
> + ;
> +}
> +
> +/*
> + * Release peripherals from reset based on handoff
> + */
> +void reset_deassert_peripherals_handoff(void)
> +{
> + writel(0, &reset_manager_base->per_mod_reset);
> +}
> +
> +
> diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h 
> b/arch/arm/include/asm/arch-socfpga/reset_manager.h
> index 13d7357..3e95476 100644
> --- a/arch/arm/include/asm/arch-socfpga/reset_manager.h
> +++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h
> @@ -11,16 +11,20 @@ void reset_cpu(ulong addr);
>  void reset_deassert_peripherals_handoff(void);
>  
>  struct socfpga_reset_manager {
> - u32 padding1;
> + u32 status;
>   u32 ctrl;
> - u32 padding2;
> - u32 padding3;
> + u32 counts;
> + u32 padding1;
>   u32 mpu_mod_reset;
>   u32 per_mod_reset;
>   u32 per2_mod_reset;
>   u32 brg_mod_reset;
>  };
>  
> +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
> +#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
> +#else
>  #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
> +#endif
>  
>  #endif /* _RESET_MANAGER_H_ */



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Re: [U-Boot] [PATCH 3/4] ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration

2013-08-06 Thread Taras Kondratiuk

On 08/06/2013 05:21 PM, Lokesh Vutla wrote:

Hi Taras,
On Tuesday 06 August 2013 05:48 PM, Taras Kondratiuk wrote:

From: Lubomir Popov 

OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
This memory has 4Gb x 2CS = 8Gb configuration.
Add configuration for runtime calculation and precalculated cases.

Patch is based on a draft Lubomir's patch [1].

[1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html

Just curious to know, Have you tried SDRAM_AUTO_DETECTION ?
Rest looks fine to me.


If you mean SYS_AUTOMATIC_SDRAM_DETECTION then yes I've tried it and it 
works.

The only minor issue is that detection is called twice during boot:
for dmm_init() and for do_sdram_init().

In case you need additional details I've put boot log with debug enabled 
below.


U-Boot SPL 2013.07-00116-gd7325e5-dirty (Aug 06 2013 - 18:20:56)
OMAP4470 ES1.0
>>sdram_init()
in_sdram = 0
get_mr: EMIF1 cs 0 mr  val 0x0
get_mr: EMIF1 cs 0 mr 0004 val 0x3
get_mr: EMIF1 cs 0 mr 0005 val 0x3
get_mr: EMIF1 cs 0 mr 0006 val 0x0
get_mr: EMIF1 cs 0 mr 0007 val 0x0
get_mr: EMIF1 cs 0 mr 0008 val 0x18
EMIF1 CS0   Elpida  LPDDR2-S4   512 MB
get_mr: EMIF1 cs 1 mr 8000 val 0x3
get_mr: EMIF2 cs 0 mr  val 0x0
get_mr: EMIF2 cs 0 mr 0004 val 0x3
get_mr: EMIF2 cs 0 mr 0005 val 0x3
get_mr: EMIF2 cs 0 mr 0006 val 0x0
get_mr: EMIF2 cs 0 mr 0007 val 0x0
get_mr: EMIF2 cs 0 mr 0008 val 0x18
EMIF2 CS0   Elpida  LPDDR2-S4   512 MB
get_mr: EMIF2 cs 1 mr 8000 val 0x3
emif1_size 0x2000 emif2_size 0x2000
>>do_sdram_init() 4c00
get_mr: EMIF1 cs 0 mr  val 0x0
get_mr: EMIF1 cs 0 mr 0004 val 0x3
get_mr: EMIF1 cs 0 mr 0005 val 0x3
get_mr: EMIF1 cs 0 mr 0006 val 0x0
get_mr: EMIF1 cs 0 mr 0007 val 0x0
get_mr: EMIF1 cs 0 mr 0008 val 0x18
EMIF1 CS0   Elpida  LPDDR2-S4   512 MB
get_mr: EMIF1 cs 1 mr 8000 val 0x3
emif: timings table: 4
emif: addressing table index 6
regs->sdram_config_init - 0x8eb2
regs->sdram_config - 0x80001ab2
regs->ref_ctrl - 0x0618
regs->sdram_tim1 - 0x10eb0662
regs->sdram_tim2 - 0x20370dd2
regs->sdram_tim3 - 0x00b1c33f
regs->read_idle_ctrl - 0x000501ff
regs->temp_alert_config - 0x58016893
regs->zq_config - 0x500b3214
regs->emif_ddr_phy_ctlr_1 - 0x049ff418
regs->emif_ddr_phy_ctlr_1_init - 0x0495
get_mr: EMIF1 cs 0 mr  val 0x0
<>do_sdram_init() 4d00
get_mr: EMIF2 cs 0 mr  val 0x0
get_mr: EMIF2 cs 0 mr 0004 val 0x3
get_mr: EMIF2 cs 0 mr 0005 val 0x3
get_mr: EMIF2 cs 0 mr 0006 val 0x0
get_mr: EMIF2 cs 0 mr 0007 val 0x0
get_mr: EMIF2 cs 0 mr 0008 val 0x18
EMIF2 CS0   Elpida  LPDDR2-S4   512 MB
get_mr: EMIF2 cs 1 mr 8000 val 0x3
emif: timings table: 4
emif: addressing table index 6
regs->sdram_config_init - 0x8eb2
regs->sdram_config - 0x80001ab2
regs->ref_ctrl - 0x0618
regs->sdram_tim1 - 0x10eb0662
regs->sdram_tim2 - 0x20370dd2
regs->sdram_tim3 - 0x00b1c33f
regs->read_idle_ctrl - 0x000501ff
regs->temp_alert_config - 0x58016893
regs->zq_config - 0x500b3214
regs->emif_ddr_phy_ctlr_1 - 0x049ff418
regs->emif_ddr_phy_ctlr_1_init - 0x0495
get_mr: EMIF2 cs 0 mr  val 0x0


Re: [U-Boot] [PATCH] wandboard: add pxe support, set default boot command like highbank

2013-08-06 Thread Stephen Warren
On 08/06/2013 05:37 AM, Wolfgang Denk wrote:
> Dear Rob Herring,
> 
> In message 
>  you 
> wrote:
>>
>>> Why would you ever want to compile this into U-Boot at all?  Then any
>>> changes you need to make mean compiling and installing a new U-Boot,
>>> which is something you normally don't want to do.
>>
>> You may want to have factory default and "user" settings. Building in
>> the factory settings would be one way to accomplish that.
> 
> No. Handling these independently, outside of the compiled U-Boot image
> is as easy, and much more flexible.
> 
>>> U-Boot is perfectly able to import such settings from text files (or
>>> text blobs stored somewhere, even attached to the U-Boot image, if you
>>> want), so just use the text files separately, instead of hard
>>> compiling them into the code.
>>
>> In my case, I don't want to compile the environment into u-boot. But
>> some people do as I copied my scripts from Tegra which has them
>> built-in.

We have the *default* environment built-in, which is used when no valid
environment is found in flash. If there's an environment in flash, it
gets used rather than the built-in default.

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Re: [U-Boot] [PATCH 7/7] video: add an option to skip cfb console init

2013-08-06 Thread Tom Rini
On Sat, Aug 03, 2013 at 07:22:53AM +0200, Heiko Schocher wrote:

> This patch add an option to skip cfb console init for boards
> who want to show a logo, but not use the cfb console. This is
> needed for the siemens boards, which have a bmp bootlogo, but
> do not need the cfb console.
> 
> Signed-off-by: Heiko Schocher 
> Cc: Anatolij Gustschin 
> ---
>  drivers/video/cfb_console.c | 18 ++
>  1 Datei ge??ndert, 18 Zeilen hinzugef??gt(+)
> 
> diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
> index 96ef8f9..822ed28 100644
> --- a/drivers/video/cfb_console.c
> +++ b/drivers/video/cfb_console.c
> @@ -431,6 +431,19 @@ static const int video_font_draw_table32[16][4] = {
>   {0x00ff, 0x00ff, 0x00ff, 0x00ff}
>  };
>  
> +/*
> + * Implement a weak default function for boards that optionally
> + * need to skip the cfb initialization.
> + */
> +int __board_cfb_skip(void)
> +{
> + /* As default, don't skip cfb init */
> + return 0;
> +}
> +
> +int board_cfb_skip(void)
> + __attribute__ ((weak, alias("__board_cfb_skip")));

Add  and use '__weak int board_cfb_skip(void)'.

-- 
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Re: [U-Boot] [PATCH 5/7] video, da8xx-fb: show fb addr in bdinfo

2013-08-06 Thread Tom Rini
On Sat, Aug 03, 2013 at 07:22:51AM +0200, Heiko Schocher wrote:

> without this patch the bdinfo command shows:
> U-Boot# bd
> arch_number = 0x10DC
> [...]
> sp start= 0x8EF32F20
> FB base = 0x
> 
> with this patch it shows the address where the framebuffer
> for this video driver start:
> 
> arch_number = 0x10DC
> [...]
> sp start= 0x8EF32F20
> FB base = 0x8EF3C788
> 
> Signed-off-by: Heiko Schocher 
> Cc: Anatolij Gustschin 
> Cc: Tom Rini 

Acked-by: Tom Rini 

-- 
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Re: [U-Boot] [PATCH 4/7] video, da8xx-fb: changes for am335x usage

2013-08-06 Thread Tom Rini
On Sat, Aug 03, 2013 at 07:22:50AM +0200, Heiko Schocher wrote:

> to use this driver also on am335x based boards, the following
> changes are made:
> 
> - struct lcd_ctrl_config lcd_cfg is now configurable
>   through board code
> 
> - controller base is configurable through define
>   DA8XX_LCD_CNTL_BASE. To be compatible with older
>   da8xx based boards: If this define is missing, the
>   DAVINCI_LCD_CNTL_BASE is used
> 
> - Determine LCD IP Version, and make the driver
>   working on lcd revision register values:
>   Version 1:
>   0x4C100102
>   Version 2:
>   0x4F200800
>   0x4F201000
> 
> Signed-off-by: Heiko Schocher 
> Cc: Stefano Babic 
> Cc: Anatolij Gustschin 
> Cc: Tom Rini 

Acked-by: Tom Rini 

-- 
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Re: [U-Boot] [PATCH 3/7] arm, am33xx: add clk_get prototype

2013-08-06 Thread Tom Rini
On Sat, Aug 03, 2013 at 07:22:49AM +0200, Heiko Schocher wrote:

> the clk_get() function is needed for the da8xx-fb video driver,
> which is used on the am3xx based siemens boards.
> 
> Signed-off-by: Heiko Schocher 
> Cc: Tom Rini 

Acked-by: Tom Rini 

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Re: [U-Boot] [PATCH 1/7] arm, am335x: add some missing registers and defines for lcd and epwm support

2013-08-06 Thread Tom Rini
On Sat, Aug 03, 2013 at 07:22:47AM +0200, Heiko Schocher wrote:

[snip]
> +struct pwmss_ecap_regs {
> + unsigned int tsctr;
> + unsigned int ctrphs;
> + unsigned int cap1;
> + unsigned int cap2;
> + unsigned int cap3;
> + unsigned int cap4;
> + unsigned int reserved[4];

We use 'resv' in the rest of the am33xx headers, please do 'resv1[4]'
instead for consistency.

> diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h 
> b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
> index 432f0c7..293ede2 100644
> --- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
> +++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
> @@ -43,4 +43,11 @@
>  /* RTC base address */
>  #define RTC_BASE 0x44E3E000
>  
> +/* LCD Controller */
> +#define  LCD_CNTL_BASE   0x4830E000

#define not . Thanks.

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Re: [U-Boot] [PATCH 2/7] video, da8xx: move da8xx-fb.h to drivers/video

2013-08-06 Thread Tom Rini
On Sat, Aug 03, 2013 at 07:22:48AM +0200, Heiko Schocher wrote:

> the da8xx-fb driver works also on am335x boards. So move
> the da8xx-fb.h file from arch/arm/include/asm/arch-davinci
> to drivers/video, so this driver can used from am335x
> based boards. Also add WVGA panel_type.
> 
> Signed-off-by: Heiko Schocher 
> Cc: Stefano Babic 
> Cc: Anatolij Gustschin 
> Cc: Tom Rini 

Acked-by: Tom Rini 

-- 
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Re: [U-Boot] [i2c] Pull request

2013-08-06 Thread Tom Rini
On Sat, Aug 03, 2013 at 06:07:15AM +0200, Heiko Schocher wrote:

> Hello Tom,
> 
> please pull from u-boot-i2c
> 
> The following changes since commit 245d65b6e503f3a159cffb3392ac3b2c25606d8e:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-usb (2013-08-01 09:19:28 
> -0400)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-i2c.git master
> 
> for you to fetch changes up to 90f002a90f5ac9087737fbc9e781f3519e011f28:
> 
>   i2c: soft: Fix typo in CONFIG_SYS_I2C_SOFT_SPEED (2013-08-03 06:01:18 +0200)
> 
> 
> Marek Vasut (1):
>   i2c: soft: Fix typo in CONFIG_SYS_I2C_SOFT_SPEED
> 
>  drivers/i2c/soft_i2c.c   | 8 
>  include/configs/blackstamp.h | 4 ++--
>  2 Dateien ge?ndert, 6 Zeilen hinzugef?gt(+), 6 Zeilen entfernt(-)

Applied to u-boot/master, thanks!

-- 
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[U-Boot] [PATCH v6 2/2] exynos5250: arndale: Add mmc support

2013-08-06 Thread Chander Kashyap
From: Inderpal Singh 

This patch adds mmc support to the arndale board.

Signed-off-by: Inderpal Singh 
---
 board/samsung/arndale/arndale.c  |   14 ++
 board/samsung/dts/exynos5250-arndale.dts |   18 ++
 2 files changed, 32 insertions(+)

diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 5ec56f6..6d81b90 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +49,19 @@ void dram_init_banksize(void)
}
 }
 
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+   int ret;
+   /* dwmmc initializattion for available channels */
+   ret = exynos_dwmmc_init(gd->fdt_blob);
+   if (ret)
+   debug("dwmmc init failed\n");
+
+   return ret;
+}
+#endif
+
 static int board_uart_init(void)
 {
int err = 0, uart_id;
diff --git a/board/samsung/dts/exynos5250-arndale.dts 
b/board/samsung/dts/exynos5250-arndale.dts
index d3c0527..c700e45 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -18,4 +18,22 @@
serial0 = "/serial@12C2";
console = "/serial@12C2";
};
+
+   mmc@1220 {
+   samsung,bus-width = <8>;
+   samsung,timing = <1 3 3>;
+   };
+
+   mmc@1221 {
+   status = "disabled";
+   };
+
+   mmc@1222 {
+   samsung,bus-width = <4>;
+   samsung,timing = <1 2 3>;
+   };
+
+   mmc@1223 {
+   status = "disabled";
+   };
 };
-- 
1.7.9.5

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[U-Boot] [PATCH v6 0/2] Add Arndale board support

2013-08-06 Thread Chander Kashyap
The Arndale board is based on samsung's exynos5250 SOC.
For spl generation, it depends on the patch at [5].

First patch provides the basic arndale board support. The second patch
adds the MMC support.

Changes in v2:
- split from earlier patchset at [3] as per Minkyu
- Removed checkpatch errors pointed out by Wolfgang
- rebased to latest u-boot-samsung master branch
- created mmc_boot.c to remove dependency on consolidation
  patch at [4]
- split the mmc support to new patch as it depends on [2]

[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883
[2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887
[3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101
[4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272

Changes in v3:
- Used dt based serial
- rebased to latest u-boot-samsung master branch

Changes in v4:
- Removed the config depedency on exynos5_dt.h as it contains smdk5250
  configurations rather than the common exynos5 generic configurations.
- rebased to latest u-boot-samsung master branch

Changes in v5:
- Fix comments suggested by Minkyu
- Added SPDX-License-Identifier to new files

Changes in v6:
- Fixed missed out sorting of Maintainers entry

[5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and 
update Makefiles

Chander Kashyap (1):
  exynos5250: Add arndale board support

Inderpal Singh (1):
  exynos5250: arndale: Add mmc support

 MAINTAINERS  |4 +
 board/samsung/arndale/Makefile   |   34 
 board/samsung/arndale/arndale.c  |  101 
 board/samsung/arndale/arndale_spl.c  |   50 ++
 board/samsung/dts/exynos5250-arndale.dts |   39 +
 boards.cfg   |1 +
 include/configs/arndale.h|  255 ++
 7 files changed, 484 insertions(+)
 create mode 100644 board/samsung/arndale/Makefile
 create mode 100644 board/samsung/arndale/arndale.c
 create mode 100644 board/samsung/arndale/arndale_spl.c
 create mode 100644 board/samsung/dts/exynos5250-arndale.dts
 create mode 100644 include/configs/arndale.h

-- 
1.7.9.5

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[U-Boot] [PATCH v6 1/2] exynos5250: Add arndale board support

2013-08-06 Thread Chander Kashyap
Arndale board is based on samsung's exynos5250 soc.

Signed-off-by: Inderpal Singh 
Signed-off-by: Chander Kashyap 
---
 MAINTAINERS  |4 +
 board/samsung/arndale/Makefile   |   34 
 board/samsung/arndale/arndale.c  |   87 ++
 board/samsung/arndale/arndale_spl.c  |   50 ++
 board/samsung/dts/exynos5250-arndale.dts |   21 +++
 boards.cfg   |1 +
 include/configs/arndale.h|  255 ++
 7 files changed, 452 insertions(+)
 create mode 100644 board/samsung/arndale/Makefile
 create mode 100644 board/samsung/arndale/arndale.c
 create mode 100644 board/samsung/arndale/arndale_spl.c
 create mode 100644 board/samsung/dts/exynos5250-arndale.dts
 create mode 100644 include/configs/arndale.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..56d4741 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -209,6 +209,10 @@ Matthias Fuchs 
WUH405  PPC405EP
CMS700  PPC405EP
 
+Inderpal Singh 
+
+   Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
 Siddarth Gore 
 
guruplugARM926EJS (Kirkwood SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS  += arndale.o
+endif
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:=   $(obj).depend $(LIB)
+
+all:   $(ALL)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..5ec56f6
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+   gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+   return 0;
+}
+
+int dram_init(void)
+{
+   int i;
+   u32 addr;
+
+   for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+   addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+   gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+   }
+   return 0;
+}
+
+int power_init_board(void)
+{
+   set_ps_hold_ctrl();
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   int i;
+   u32 addr, size;
+
+   for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+   addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+   size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+   gd->bd->bi_dram[i].start = addr;
+   gd->bd->bi_dram[i].size = size;
+   }
+}
+
+static int board_uart_init(void)
+{
+   int err = 0, uart_id;
+
+   for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
+   err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+   if (err) {
+   debug("UART%d not configured\n",
+   (uart_id - PERIPH_ID_UART0));
+   return ret;
+   }
+   }
+   return ret;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+   int err;
+
+   err = board_uart_init();
+   if (err) {
+   debug("UART init failed\n");
+   return err;
+   }
+   return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+   printf("\nBoard: Arndale\n");
+
+   return 0;
+}
+#endif
diff --git a/board/samsung/arndale/arndale_spl.c 
b/board/samsung/arndale/arndale_spl.c
new file mode 100644
index 000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+#define SIGNATURE  0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+   __attribute__((section(".machine_param"))) = {
+   .signature  = SIGNATURE,
+   .version= 1,
+   .params = "vmubfasirM",
+   .size   = sizeof(machine_param),
+
+   .mem_iv_size= 0x1f,
+   .mem_type   = DDR_MODE_DDR3,
+
+   /*
+* Set uboot_size to 0x10 bytes.
+*
+* This is an overly conservative

Re: [U-Boot] [PATCH v4 1/2] exynos5250: Add arndale board support

2013-08-06 Thread Chander Kashyap
On 6 August 2013 17:16, Minkyu Kang  wrote:
> On 25/07/13 21:46, Chander Kashyap wrote:
>> Arndale board is based on samsung's exynos5250 soc.
>>
>> Signed-off-by: Inderpal Singh 
>> Signed-off-by: Chander Kashyap 
>> ---
>>  MAINTAINERS  |4 +
>>  board/samsung/arndale/Makefile   |   50 ++
>>  board/samsung/arndale/arndale.c  |  102 +++
>>  board/samsung/arndale/arndale_spl.c  |   66 
>>  board/samsung/dts/exynos5250-arndale.dts |   23 +++
>>  boards.cfg   |1 +
>>  include/configs/arndale.h|  271 
>> ++
>>  7 files changed, 517 insertions(+)
>>  create mode 100644 board/samsung/arndale/Makefile
>>  create mode 100644 board/samsung/arndale/arndale.c
>>  create mode 100644 board/samsung/arndale/arndale_spl.c
>>  create mode 100644 board/samsung/dts/exynos5250-arndale.dts
>>  create mode 100644 include/configs/arndale.h
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 081cf96..bf489d4 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -747,6 +747,10 @@ Chander Kashyap 
>>   SMDKV310ARM ARMV7 (EXYNOS4210 SoC)
>>   SMDK5250ARM ARMV7 (EXYNOS5250 SoC)
>>
>> +Inderpal Singh 
>
> please sort the list by last name.

Sure i will.

>
>> +
>> + Arndale ARM ARMV7 (EXYNOS5250 SoC)
>> +
>>  Lukasz Majewski 
>>
>>   trats   ARM ARMV7 (EXYNOS4210 SoC)
>> diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
>> new file mode 100644
>> index 000..5786774
>> --- /dev/null
>> +++ b/board/samsung/arndale/Makefile
>> @@ -0,0 +1,50 @@
>> +#
>> +# Copyright (C) 2013 Samsung Electronics
>> +#
>> +# See file CREDITS for list of people who contributed to this
>> +# project.
>> +#
>> +# This program is free software; you can redistribute it and/or
>> +# modify it under the terms of the GNU General Public License as
>> +# published by the Free Software Foundation; either version 2 of
>> +# the License, or (at your option) any later version.
>> +#
>> +# This program is distributed in the hope that it will be useful,
>> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
>> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> +# GNU General Public License for more details.
>> +#
>> +# You should have received a copy of the GNU General Public License
>> +# along with this program; if not, write to the Free Software
>> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> +# MA 02111-1307 USA
>
> Please use for new files SPDX-License-Identifier.
> please check it globally.

Thanks for pointing out. I will add.

>
>> +#
>> +
>> +include $(TOPDIR)/config.mk
>> +
>> +LIB  = $(obj)lib$(BOARD).o
>> +
>> +COBJS+= arndale_spl.o
>> +
>> +ifndef CONFIG_SPL_BUILD
>> +COBJS+= arndale.o
>> +endif
>> +
>> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
>> +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
>> +
>> +ALL  :=   $(obj).depend $(LIB)
>> +
>> +all: $(ALL)
>> +
>> +$(LIB):  $(OBJS)
>> + $(call cmd_link_o_target, $(OBJS))
>> +
>> +#
>> +
>> +# defines $(obj).depend target
>> +include $(SRCTREE)/rules.mk
>> +
>> +sinclude $(obj).depend
>> +
>> +#
>> diff --git a/board/samsung/arndale/arndale.c 
>> b/board/samsung/arndale/arndale.c
>> new file mode 100644
>> index 000..47cbac8
>> --- /dev/null
>> +++ b/board/samsung/arndale/arndale.c
>> @@ -0,0 +1,102 @@
>> +/*
>> + * Copyright (C) 2013 Samsung Electronics
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +int board_init(void)
>> +{
>> + gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
>> + return 0;
>> +}
>> +
>> +int dram_init(void)
>> +{
>> + int i;
>> + u32 addr;
>> +
>> + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
>> + addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
>> + gd->ram_size += get

[U-Boot] [PATCH v5 1/2] exynos5250: Add arndale board support

2013-08-06 Thread Chander Kashyap
Arndale board is based on samsung's exynos5250 soc.

Signed-off-by: Inderpal Singh 
Signed-off-by: Chander Kashyap 
---
 MAINTAINERS  |4 +
 board/samsung/arndale/Makefile   |   34 
 board/samsung/arndale/arndale.c  |   87 ++
 board/samsung/arndale/arndale_spl.c  |   50 ++
 board/samsung/dts/exynos5250-arndale.dts |   21 +++
 boards.cfg   |1 +
 include/configs/arndale.h|  255 ++
 7 files changed, 452 insertions(+)
 create mode 100644 board/samsung/arndale/Makefile
 create mode 100644 board/samsung/arndale/arndale.c
 create mode 100644 board/samsung/arndale/arndale_spl.c
 create mode 100644 board/samsung/dts/exynos5250-arndale.dts
 create mode 100644 include/configs/arndale.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..56d4741 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -209,6 +209,10 @@ Matthias Fuchs 
WUH405  PPC405EP
CMS700  PPC405EP
 
+Inderpal Singh 
+
+   Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
 Siddarth Gore 
 
guruplugARM926EJS (Kirkwood SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS  += arndale.o
+endif
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:=   $(obj).depend $(LIB)
+
+all:   $(ALL)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..5ec56f6
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+   gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+   return 0;
+}
+
+int dram_init(void)
+{
+   int i;
+   u32 addr;
+
+   for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+   addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+   gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+   }
+   return 0;
+}
+
+int power_init_board(void)
+{
+   set_ps_hold_ctrl();
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   int i;
+   u32 addr, size;
+
+   for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+   addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+   size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+   gd->bd->bi_dram[i].start = addr;
+   gd->bd->bi_dram[i].size = size;
+   }
+}
+
+static int board_uart_init(void)
+{
+   int err = 0, uart_id;
+
+   for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
+   err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+   if (err) {
+   debug("UART%d not configured\n",
+   (uart_id - PERIPH_ID_UART0));
+   return ret;
+   }
+   }
+   return ret;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+   int err;
+
+   err = board_uart_init();
+   if (err) {
+   debug("UART init failed\n");
+   return err;
+   }
+   return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+   printf("\nBoard: Arndale\n");
+
+   return 0;
+}
+#endif
diff --git a/board/samsung/arndale/arndale_spl.c 
b/board/samsung/arndale/arndale_spl.c
new file mode 100644
index 000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+#define SIGNATURE  0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+   __attribute__((section(".machine_param"))) = {
+   .signature  = SIGNATURE,
+   .version= 1,
+   .params = "vmubfasirM",
+   .size   = sizeof(machine_param),
+
+   .mem_iv_size= 0x1f,
+   .mem_type   = DDR_MODE_DDR3,
+
+   /*
+* Set uboot_size to 0x10 bytes.
+*
+* This is an overly conservative

[U-Boot] [PATCH v5 2/2] exynos5250: arndale: Add mmc support

2013-08-06 Thread Chander Kashyap
From: Inderpal Singh 

This patch adds mmc support to the arndale board.

Signed-off-by: Inderpal Singh 
---
 board/samsung/arndale/arndale.c  |   14 ++
 board/samsung/dts/exynos5250-arndale.dts |   18 ++
 2 files changed, 32 insertions(+)

diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 5ec56f6..6d81b90 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +49,19 @@ void dram_init_banksize(void)
}
 }
 
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+   int ret;
+   /* dwmmc initializattion for available channels */
+   ret = exynos_dwmmc_init(gd->fdt_blob);
+   if (ret)
+   debug("dwmmc init failed\n");
+
+   return ret;
+}
+#endif
+
 static int board_uart_init(void)
 {
int err = 0, uart_id;
diff --git a/board/samsung/dts/exynos5250-arndale.dts 
b/board/samsung/dts/exynos5250-arndale.dts
index d3c0527..c700e45 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -18,4 +18,22 @@
serial0 = "/serial@12C2";
console = "/serial@12C2";
};
+
+   mmc@1220 {
+   samsung,bus-width = <8>;
+   samsung,timing = <1 3 3>;
+   };
+
+   mmc@1221 {
+   status = "disabled";
+   };
+
+   mmc@1222 {
+   samsung,bus-width = <4>;
+   samsung,timing = <1 2 3>;
+   };
+
+   mmc@1223 {
+   status = "disabled";
+   };
 };
-- 
1.7.9.5

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[U-Boot] [PATCH v5 0/2] Add Arndale board support

2013-08-06 Thread Chander Kashyap
The Arndale board is based on samsung's exynos5250 SOC.
For spl generation, it depends on the patch at [5].

First patch provides the basic arndale board support. The second patch
adds the MMC support.

Changes in v2:
- split from earlier patchset at [3] as per Minkyu
- Removed checkpatch errors pointed out by Wolfgang
- rebased to latest u-boot-samsung master branch
- created mmc_boot.c to remove dependency on consolidation
  patch at [4]
- split the mmc support to new patch as it depends on [2]

[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883
[2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887
[3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101
[4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272

Changes in v3:
- Used dt based serial
- rebased to latest u-boot-samsung master branch

Changes in v4:
- Removed the config depedency on exynos5_dt.h as it contains smdk5250
  configurations rather than the common exynos5 generic configurations.
- rebased to latest u-boot-samsung master branch

Changes in v5:
- Fix comments suggested by Minkyu
- Added SPDX-License-Identifier to new files

[5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and 
update Makefiles

Chander Kashyap (1):
  exynos5250: Add arndale board support

Inderpal Singh (1):
  exynos5250: arndale: Add mmc support

 MAINTAINERS  |4 +
 board/samsung/arndale/Makefile   |   34 
 board/samsung/arndale/arndale.c  |  101 
 board/samsung/arndale/arndale_spl.c  |   50 ++
 board/samsung/dts/exynos5250-arndale.dts |   39 +
 boards.cfg   |1 +
 include/configs/arndale.h|  255 ++
 7 files changed, 484 insertions(+)
 create mode 100644 board/samsung/arndale/Makefile
 create mode 100644 board/samsung/arndale/arndale.c
 create mode 100644 board/samsung/arndale/arndale_spl.c
 create mode 100644 board/samsung/dts/exynos5250-arndale.dts
 create mode 100644 include/configs/arndale.h

-- 
1.7.9.5

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[U-Boot] [RESEND PATCH v5 2/2] socfpga: Adding pin mux handoff files

2013-08-06 Thread Chin Liang See
Adding the generated pin mux
configuration by Preloader Generator tool

Signed-off-by: Chin Liang See 
Reviewed-by: Pavel Machek 
Cc: Wolfgang Denk 
CC: Pavel Machek 
Cc: Dinh Nguyen 
Cc: Tom Rini 
Cc: Albert Aribaud 
---
Changes for v2:
   - Fixed the word wrap issue within patch
Changes for v3:
   - Fixed the long subject of the patch
Changes for v4:
   - Added change log for each revision change
Changes for v5:
   - Updated the license header for reset_manager.c
   - Updated the subject
---
 board/altera/socfpga/pinmux_config.c |  214 ++
 board/altera/socfpga/pinmux_config.h |   54 +
 2 files changed, 268 insertions(+)
 create mode 100644 board/altera/socfpga/pinmux_config.c
 create mode 100644 board/altera/socfpga/pinmux_config.h

diff --git a/board/altera/socfpga/pinmux_config.c 
b/board/altera/socfpga/pinmux_config.c
new file mode 100644
index 000..8b09005
--- /dev/null
+++ b/board/altera/socfpga/pinmux_config.c
@@ -0,0 +1,214 @@
+/* This file is generated by Preloader Generator */
+
+#include "pinmux_config.h"
+
+/* pin mux configuration data */
+unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+   0, /* EMACIO0 - Unused */
+   2, /* EMACIO1 - USB */
+   2, /* EMACIO2 - USB */
+   2, /* EMACIO3 - USB */
+   2, /* EMACIO4 - USB */
+   2, /* EMACIO5 - USB */
+   2, /* EMACIO6 - USB */
+   2, /* EMACIO7 - USB */
+   2, /* EMACIO8 - USB */
+   0, /* EMACIO9 - Unused */
+   2, /* EMACIO10 - USB */
+   2, /* EMACIO11 - USB */
+   2, /* EMACIO12 - USB */
+   2, /* EMACIO13 - USB */
+   0, /* EMACIO14 - N/A */
+   0, /* EMACIO15 - N/A */
+   0, /* EMACIO16 - N/A */
+   0, /* EMACIO17 - N/A */
+   0, /* EMACIO18 - N/A */
+   0, /* EMACIO19 - N/A */
+   3, /* FLASHIO0 - SDMMC */
+   3, /* FLASHIO1 - SDMMC */
+   3, /* FLASHIO2 - SDMMC */
+   3, /* FLASHIO3 - SDMMC */
+   0, /* FLASHIO4 - SDMMC */
+   0, /* FLASHIO5 - SDMMC */
+   0, /* FLASHIO6 - SDMMC */
+   0, /* FLASHIO7 - SDMMC */
+   0, /* FLASHIO8 - SDMMC */
+   3, /* FLASHIO9 - SDMMC */
+   3, /* FLASHIO10 - SDMMC */
+   3, /* FLASHIO11 - SDMMC */
+   3, /* GENERALIO0 - TRACE */
+   3, /* GENERALIO1 - TRACE */
+   3, /* GENERALIO2 - TRACE */
+   3, /* GENERALIO3 - TRACE  */
+   3, /* GENERALIO4 - TRACE  */
+   3, /* GENERALIO5 - TRACE  */
+   3, /* GENERALIO6 - TRACE  */
+   3, /* GENERALIO7 - TRACE  */
+   3, /* GENERALIO8 - TRACE  */
+   3, /* GENERALIO9 - SPIM0 */
+   3, /* GENERALIO10 - SPIM0 */
+   3, /* GENERALIO11 - SPIM0 */
+   3, /* GENERALIO12 - SPIM0 */
+   2, /* GENERALIO13 - CAN0 */
+   2, /* GENERALIO14 - CAN0 */
+   3, /* GENERALIO15 - I2C0 */
+   3, /* GENERALIO16 - I2C0 */
+   2, /* GENERALIO17 - UART0 */
+   2, /* GENERALIO18 - UART0 */
+   0, /* GENERALIO19 - N/A */
+   0, /* GENERALIO20 - N/A */
+   0, /* GENERALIO21 - N/A */
+   0, /* GENERALIO22 - N/A */
+   0, /* GENERALIO23 - N/A */
+   0, /* GENERALIO24 - N/A */
+   0, /* GENERALIO25 - N/A */
+   0, /* GENERALIO26 - N/A */
+   0, /* GENERALIO27 - N/A */
+   0, /* GENERALIO28 - N/A */
+   0, /* GENERALIO29 - N/A */
+   0, /* GENERALIO30 - N/A */
+   0, /* GENERALIO31 - N/A */
+   2, /* MIXED1IO0 - EMAC */
+   2, /* MIXED1IO1 - EMAC */
+   2, /* MIXED1IO2 - EMAC */
+   2, /* MIXED1IO3 - EMAC */
+   2, /* MIXED1IO4 - EMAC */
+   2, /* MIXED1IO5 - EMAC */
+   2, /* MIXED1IO6 - EMAC */
+   2, /* MIXED1IO7 - EMAC */
+   2, /* MIXED1IO8 - EMAC */
+   2, /* MIXED1IO9 - EMAC */
+   2, /* MIXED1IO10 - EMAC */
+   2, /* MIXED1IO11 - EMAC */
+   2, /* MIXED1IO12 - EMAC */
+   2, /* MIXED1IO13 - EMAC */
+   0, /* MIXED1IO14 - Unused */
+   3, /* MIXED1IO15 - QSPI */
+   3, /* MIXED1IO16 - QSPI */
+   3, /* MIXED1IO17 - QSPI */
+   3, /* MIXED1IO18 - QSPI */
+   3, /* MIXED1IO19 - QSPI */
+   3, /* MIXED1IO20 - QSPI */
+   0, /* MIXED1IO21 - GPIO */
+   0, /* MIXED2IO0 - N/A */
+   0, /* MIXED2IO1 - N/A */
+   0, /* MIXED2IO2 - N/A */
+   0, /* MIXED2IO3 - N/A */
+   0, /* MIXED2IO4 - N/A */
+   0, /* MIXED2IO5 - N/A */
+   0, /* MIXED2IO6 - N/A */
+   0, /* MIXED2IO7 - N/A */
+   0, /* GPLINMUX48 */
+   0, /* GPLINMUX49 */
+   0, /* GPLINMUX50 */
+   0, /* GPLINMUX51 */
+   0, /* GPLINMUX52 */
+   0, /* GPLINMUX53 */
+   0, /* GPLINMUX54 */
+   0, /* GPLINMUX55 */
+   0, /* GPLINMUX56 */
+   0, /* GPLINMUX57 */
+   0, /* GPLINMUX58 */
+   0, /* GPLINMUX59 */
+   0, /* GPLINMUX60 */
+   0, /* GPLINMUX61 */
+   0, /* GPLINMUX62 */
+   0, /* GPLINMUX63 */
+   0, /* GPLINMUX64 */
+   0, /* GPLINMUX65 */
+   0, /* GPLINMUX66 */
+   0, /* GPLINMUX67 */
+   0, /* GPLINMUX68 */
+   0, /* G

[U-Boot] [RESEND PATCH v6 1/2] socfpga: Adding System Manager driver

2013-08-06 Thread Chin Liang See
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)

Signed-off-by: Chin Liang See 
Reviewed-by: Pavel Machek 
Cc: Wolfgang Denk 
CC: Pavel Machek 
Cc: Dinh Nguyen 
Cc: Tom Rini 
Cc: Albert Aribaud 
---
Changes for v2:
   - Fixed the word wrap issue within patch 
Changes for v3:
   - Fixed the long subject of the patch
   - Fixed the comment within the code
Changes for v4:
   - Added change log for each revision change
Changes for v5:
   - Updated the license header for system_manager.c
   - Cc: Tom Rini
Changes for v6:
   - Updated the license header for system_manager.c and .h to SPDX
---
 arch/arm/cpu/armv7/socfpga/Makefile|2 +-
 arch/arm/cpu/armv7/socfpga/spl.c   |6 
 arch/arm/cpu/armv7/socfpga/system_manager.c|   29 
 .../include/asm/arch-socfpga/socfpga_base_addrs.h  |1 +
 arch/arm/include/asm/arch-socfpga/system_manager.h |   22 +++
 board/altera/socfpga/Makefile  |4 ++-
 include/configs/socfpga_cyclone5.h |1 +
 7 files changed, 63 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/socfpga/system_manager.c
 create mode 100644 arch/arm/include/asm/arch-socfpga/system_manager.h

diff --git a/arch/arm/cpu/armv7/socfpga/Makefile 
b/arch/arm/cpu/armv7/socfpga/Makefile
index 5024fc5..0859e44 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk
 LIB=  $(obj)lib$(SOC).o
 
 SOBJS  := lowlevel_init.o
-COBJS-y:= misc.o timer.o reset_manager.o
+COBJS-y:= misc.o timer.o reset_manager.o system_manager.o
 COBJS-$(CONFIG_SPL_BUILD) += spl.o
 
 COBJS  := $(COBJS-y)
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c
index 2b9be28..74bceab 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -25,6 +26,11 @@ u32 spl_boot_device(void)
  */
 void spl_board_init(void)
 {
+#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
+   /* configure the pin muxing through system manager */
+   sysmgr_pinmux_init();
+#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
+
/* de-assert reset for peripherals and bridges based on handoff */
reset_deassert_peripherals_handoff();
 
diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c 
b/arch/arm/cpu/armv7/socfpga/system_manager.c
new file mode 100644
index 000..0b1bb33
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/system_manager.c
@@ -0,0 +1,29 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Configure all the pin muxes
+ */
+void sysmgr_pinmux_init(void)
+{
+   unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET;
+
+   const unsigned long *pval = sys_mgr_init_table;
+   unsigned long i;
+
+   for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table);
+   i++, offset += sizeof(unsigned long)) {
+   writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset));
+   }
+}
+
+
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h 
b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
index 1182a13..50c4ebd 100644
--- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -12,5 +12,6 @@
 #define SOCFPGA_UART1_ADDRESS 0xffc03000
 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0
 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
+#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
 
 #endif /* _SOCFPGA_BASE_ADDRS_H_ */
diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h 
b/arch/arm/include/asm/arch-socfpga/system_manager.h
new file mode 100644
index 000..36a83b4
--- /dev/null
+++ b/arch/arm/include/asm/arch-socfpga/system_manager.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef_SYSTEM_MANAGER_H_
+#define_SYSTEM_MANAGER_H_
+
+#ifndef __ASSEMBLY__
+
+void sysmgr_pinmux_init(void);
+
+/* declaration for handoff table type */
+extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
+
+#endif
+
+
+#define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400)
+
+#endif /* _SYSTEM_MANAGER_H_ */
diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile
index 101fc7c..9dc45a9 100644
--- a/board/altera/socfpga/Makefile
+++ b/board/altera/socfpga/Makefile
@@ -10,8 +10,10 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(BOARD).o
 
-COBJS  := socfpga_cyclone5.o
+COBJS-y:= socfpga_cyclone5.o
+COBJS-$(CONFIG_SPL_BUILD) += pinmux_config.o
 
+COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
 
diff --git a/include/configs/socfpga_cyclone5.h 
b/include/co

[U-Boot] [RESEND PATCH v5 1/1] socfpga: Adding configuration for development kit

2013-08-06 Thread Chin Liang See
Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit

Signed-off-by: Chin Liang See 
Reviewed-by: Pavel Machek
Cc: Wolfgang Denk 
CC: Pavel Machek 
Cc: Dinh Nguyen 
Cc: Tom Rini 
Cc: Albert Aribaud 
---
Changes for v2:
   - Fixed the word wrap issue within patch
Changes for v3:
   - Fixed the long subject of the patch
Changes for v4:
   - Added change log for each revision change
Changes for v5:
   - Added Reviewed-by: Pavel Machek
   - Cc: Tom Rini
---
 include/configs/socfpga_cyclone5.h |   28 +---
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/include/configs/socfpga_cyclone5.h 
b/include/configs/socfpga_cyclone5.h
index b5a7a9a..06aeba6 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -11,6 +11,8 @@
 /*
  * High level configuration
  */
+/* Virtual target or real hardware */
+#define CONFIG_SOCFPGA_VIRTUAL_TARGET
 
 #define CONFIG_ARMV7
 #define CONFIG_L2_OFF
@@ -21,11 +23,12 @@
 #define CONFIG_SINGLE_BOOTLOADER
 #define CONFIG_SOCFPGA
 
+/* base address for .text section */
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
 #define CONFIG_SYS_TEXT_BASE   0x0840
-#define V_NS16550_CLK  100
-#define CONFIG_BAUDRATE57600
-#define CONFIG_SYS_HZ  1000
-#define CONFIG_TIMER_CLOCK_KHZ 2400
+#else
+#define CONFIG_SYS_TEXT_BASE   0x0140
+#endif
 #define CONFIG_SYS_LOAD_ADDR   0x7fc0
 
 /* Console I/O Buffer Size */
@@ -154,7 +157,7 @@
 /* SDRAM Bank #1 */
 #define CONFIG_SYS_SDRAM_BASE  0x
 /* SDRAM memory size */
-#define PHYS_SDRAM_1_SIZE  0x8000
+#define PHYS_SDRAM_1_SIZE  0x4000
 
 #define PHYS_SDRAM_1   CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_START   0x
@@ -170,8 +173,13 @@
 #define CONFIG_SYS_NS16550_CLK  V_NS16550_CLK
 #define CONFIG_CONS_INDEX   1
 #define CONFIG_SYS_NS16550_COM1UART0_BASE
-
 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define V_NS16550_CLK  100
+#else
+#define V_NS16550_CLK  1
+#endif
+#define CONFIG_BAUDRATE115200
 
 /*
  * FLASH
@@ -184,9 +192,15 @@
 /* This timer use eosc1 where the clock frequency is fixed
  * throughout any condition */
 #define CONFIG_SYS_TIMERBASE   SOCFPGA_OSC1TIMER0_ADDRESS
-
 /* reload value when timer count to zero */
 #define TIMER_LOAD_VAL 0x
+/* Timer info */
+#define CONFIG_SYS_HZ  1000
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_TIMER_CLOCK_KHZ 2400
+#else
+#define CONFIG_TIMER_CLOCK_KHZ 25000
+#endif
 
 #define CONFIG_ENV_IS_NOWHERE
 
-- 
1.7.9.5


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Re: [U-Boot] [PATCH] ARM: mxs: tools: Add mkimage support for MXS bootstream

2013-08-06 Thread Marek Vasut
Dear Tom Rini,

> On Wed, Jul 31, 2013 at 03:50:55PM +0200, Marek Vasut wrote:
> > Add mkimage support for generating and verifying MXS bootstream.
> > The implementation here is mostly a glue code between MXSSB v0.4
> > and mkimage, but the long-term goal is to rectify this and merge
> > MXSSB with mkimage more tightly. Once this code is properly in
> > U-Boot, MXSSB shall be deprecated in favor of mkimage-mxsimage
> > support.
> > 
> > Note that the mxsimage generator needs libcrypto from OpenSSL, I
> > therefore enabled the libcrypto/libssl unconditionally.
> 
> OK, we need to figure out something here.  Can we start by just enabling
> this for MX platforms and see what the fallout is?  And like the FIT
> code, have a "not supported" print happen when it's not enabled.
> 
> [snip]
> 
> > --- a/tools/mkimage.h
> > +++ b/tools/mkimage.h
> > @@ -112,6 +112,7 @@ struct image_type_params {
> > 
> > int (*verify_header) (unsigned char *, int, struct mkimage_params *);
> > /* Prints image information abstracting from image header */
> > void (*print_header) (const void *);
> > 
> > +
> > 
> > /*
> > 
> >  * The header or image contents need to be set as per image type to
> >  * be generated using this callback function.
> 
> Extra space change.
> 
> [snip]
> 
> > +/*
> > + * CRC32
> > + */
> > +static uint32_t crc32(uint8_t *data, uint32_t len)
> > +{
> > +   const uint32_t poly = 0x04c11db7;
> 
> Please comment a bit more about how we need to use the following
> polynomial as documented by Freescale ... somewhere ...

It's a regular CRC32 CCITT .

> > +/*
> > + * Code
> > + */
> > +static time_t sb_get_timestamp(void)
> > +{
> > +#if 0
> > +   struct tm time_2000 = {
> > +   .tm_yday= 1,/* Jan. 1st */
> > +   .tm_year= 100,  /* 2000 */
> > +   };
> > +   time_t seconds_to_2000 = mktime(&time_2000);
> > +   time_t seconds_to_now = time(NULL);
> > +
> > +   return seconds_to_now - seconds_to_2000;
> > +#endif
> > +   return 427398871;
> > +}
> 
> What?  If we need to use a magic timestamp, please say why.

F* ... this part shouldn't be there of course. The code in #if 0 should be 
enabled.

> And in
> general, the file could use some further commenting on what/why.

What do you mean?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 3/4] ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration

2013-08-06 Thread Lokesh Vutla
Hi Taras,
On Tuesday 06 August 2013 05:48 PM, Taras Kondratiuk wrote:
> From: Lubomir Popov 
> 
> OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
> This memory has 4Gb x 2CS = 8Gb configuration.
> Add configuration for runtime calculation and precalculated cases.
> 
> Patch is based on a draft Lubomir's patch [1].
> 
> [1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html
Just curious to know, Have you tried SDRAM_AUTO_DETECTION ?
Rest looks fine to me.

Thanks and regards,
Lokesh
> 
> Signed-off-by: Lubomir Popov 
> [ta...@ti.com: cleaned up patch and fixed precalculated values]
> Signed-off-by: Taras Kondratiuk 
@@ -138,6 +138,9 @@ void init_omap_revision(void)
break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
+   case OMAP4470_CONTROL_ID_CODE_ES1_0:
+   *omap_si_rev = OMAP4470_ES1_0;
+   break;
case OMAP4460_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = OMAP4460_ES1_1;
break;
@@ -138,6 +138,9 @@ void init_omap_revision(void)
break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
+   case OMAP4470_CONTROL_ID_CODE_ES1_0:
+   *omap_si_rev = OMAP4470_ES1_0;
+   break;
case OMAP4460_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = OMAP4460_ES1_1;
break;
> ---
>  arch/arm/cpu/armv7/omap4/sdram_elpida.c |   41 
> +--
>  1 file changed, 34 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/omap4/sdram_elpida.c 
> b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
> index d76dde7..67a7926 100644
> --- a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
> +++ b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
> @@ -60,6 +60,20 @@ static const struct emif_regs emif_regs_elpida_380_mhz_1cs 
> = {
>   .emif_ddr_phy_ctlr_1= 0x049ff418
>  };
>  
> +const struct emif_regs emif_regs_elpida_400_mhz_1cs = {
> + .sdram_config_init  = 0x80800eb2,
> + .sdram_config   = 0x80801ab2,
> + .ref_ctrl   = 0x0618,
> + .sdram_tim1 = 0x10eb0662,
> + .sdram_tim2 = 0x20370dd2,
> + .sdram_tim3 = 0x00b1c33f,
> + .read_idle_ctrl = 0x000501ff,
> + .zq_config  = 0x500b3215,
> + .temp_alert_config  = 0x58016893,
> + .emif_ddr_phy_ctlr_1_init   = 0x0495,
> + .emif_ddr_phy_ctlr_1= 0x049ff418
> +};
> +
>  const struct emif_regs emif_regs_elpida_400_mhz_2cs = {
>   .sdram_config_init  = 0x8eb9,
>   .sdram_config   = 0x80001ab9,
> @@ -107,8 +121,10 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const 
> struct emif_regs **regs)
>   *regs = &emif_regs_elpida_380_mhz_1cs;
>   else if (omap4_rev == OMAP4430_ES2_0)
>   *regs = &emif_regs_elpida_200_mhz_2cs;
> - else
> + else if (omap4_rev < OMAP4470_ES1_0)
>   *regs = &emif_regs_elpida_400_mhz_2cs;
> + else
> + *regs = &emif_regs_elpida_400_mhz_1cs;
>  }
>  void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
>   __attribute__((weak, alias("emif_get_reg_dump_sdp")));
> @@ -138,20 +154,31 @@ static const struct lpddr2_device_details 
> elpida_2G_S4_details = {
>   .manufacturer   = LPDDR2_MANUFACTURER_ELPIDA
>  };
>  
> +static const struct lpddr2_device_details elpida_4G_S4_details = {
> + .type   = LPDDR2_TYPE_S4,
> + .density= LPDDR2_DENSITY_4Gb,
@@ -138,6 +138,9 @@ void init_omap_revision(void)
break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
+   case OMAP4470_CONTROL_ID_CODE_ES1_0:
+   *omap_si_rev = OMAP4470_ES1_0;
+   break;
case OMAP4460_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = OMAP4460_ES1_1;
break;
> + .io_width   = LPDDR2_IO_WIDTH_32,
> + .manufacturer   = LPDDR2_MANUFACTURER_ELPIDA
> +};
> +
>  struct lpddr2_device_details *emif_get_device_details_sdp(u32 emif_nr, u8 cs,
>   struct lpddr2_device_details *lpddr2_dev_details)
>  {
>   u32 omap_rev = omap_revision();
>  
>   /* EMIF1 & EMIF2 have identical configuration */
> - if ((omap_rev == OMAP4430_ES1_0) && (cs == CS1)) {
> - /* Nothing connected on CS1 for ES1.0 */
> + if (((omap_rev == OMAP4430_ES1_0) || (omap_rev == OMAP4470_ES1_0))
> + && (cs == CS1)) {
> + /* Nothing connected on CS1 for 4430/4470 ES1.0 */
>   return NULL;
> - } else {
> - /* In all other cases Elpida 2G device */
> + } else if (omap_rev < OMAP4470_

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