Re: [U-Boot] P2041RDB fails to boot with master (and 2013.10-rc1)
Hello Chris, sun,york, Am 10.09.2013 07:52, schrieb sun york-R58495: Chris, Thanks for the debugging work. As I suspected, it's related to I2C change. It's probably a problem in the board header file. If you fix it, please submit a patch. Otherwise, I will look into it tomorrow. Did you try current mainline? There is a fix for the P1022DS, see: http://git.denx.de/?p=u-boot.git;a=commit;h=81b867aa4451e745b9706b00e53793df6b52f42a bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/3] mtd: nand: omap: add support for BCH16_ECC - NAND driver updates
With increase in NAND flash densities occurence of bit-flips has increased.
Thus stronger ECC schemes are required for detecting and correcting multiple
simultaneous bit-flips in same NAND page. But stronger ECC schemes have large
ECC syndrome which require more space in OOB/Spare.
This patch add support for BCH16_ECC:
(a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data.
(b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy following equation:
OOBsize per page = 26 * (page-size / 512)
Signed-off-by: Pekon Gupta pe...@ti.com
---
arch/arm/include/asm/arch-am33xx/cpu.h | 15 -
arch/arm/include/asm/arch-am33xx/omap_gpmc.h | 4 +-
drivers/mtd/nand/omap_gpmc.c | 87 +++-
include/mtd/mtd-abi.h| 3 +-
4 files changed, 90 insertions(+), 19 deletions(-)
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
b/arch/arm/include/asm/arch-am33xx/cpu.h
index 10b56e0..1de92e6 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -63,7 +63,16 @@ struct gpmc_cs {
};
struct bch_res_0_3 {
- u32 bch_result_x[4];
+ u32 bch_result0;
+ u32 bch_result1;
+ u32 bch_result2;
+ u32 bch_result3;
+};
+
+struct bch_res_4_6 {
+ u32 bch_result4;
+ u32 bch_result5;
+ u32 bch_result6;
};
struct gpmc {
@@ -95,7 +104,9 @@ struct gpmc {
u8 res7[12];/* 0x224 */
u32 testmomde_ctrl; /* 0x230 */
u8 res8[12];/* 0x234 */
- struct bch_res_0_3 bch_result_0_3[2]; /* 0x240 */
+ struct bch_res_0_3 bch_result_0_3[8]; /* 0x240 - 0x2BF */
+ u8 res9[16 * 4];/* 0x2C0 - 0x2FF */
+ struct bch_res_4_6 bch_result_4_6[8]; /* 0x300 - 0x37F */
};
/* Used for board specific gpmc initialization */
diff --git a/arch/arm/include/asm/arch-am33xx/omap_gpmc.h
b/arch/arm/include/asm/arch-am33xx/omap_gpmc.h
index 69982c1..ade0ca4 100644
--- a/arch/arm/include/asm/arch-am33xx/omap_gpmc.h
+++ b/arch/arm/include/asm/arch-am33xx/omap_gpmc.h
@@ -16,7 +16,9 @@ enum omap_ecc {
/* 8-bit ECC calculation by GPMC, Error detection by Software */
OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
/* 8-bit ECC calculation by GPMC, Error detection by ELM */
- OMAP_ECC_BCH8_CODE_HW
+ OMAP_ECC_BCH8_CODE_HW,
+ /* 16-bit ECC calculation by GPMC, Error detection by ELM */
+ OMAP_ECC_BCH16_CODE_HW,
};
#endif /* __ASM_ARCH_OMAP_GPMC_H */
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index c1a7317..b044f00 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -154,21 +154,10 @@ static int __maybe_unused omap_correct_data(struct
mtd_info *mtd, uint8_t *dat,
struct nand_bch_priv {
uint8_t mode;
uint8_t type;
- uint8_t nibbles;
struct bch_control *control;
enum omap_ecc ecc_scheme;
};
-/* bch types */
-#define ECC_BCH4 0
-#define ECC_BCH8 1
-#define ECC_BCH16 2
-
-/* BCH nibbles for diff bch levels */
-#define ECC_BCH4_NIBBLES 13
-#define ECC_BCH8_NIBBLES 26
-#define ECC_BCH16_NIBBLES 52
-
/*
* This can be a single instance cause all current users have only one NAND
* with nearly the same setup (BCH8, some with ELM and others with sw BCH
@@ -177,7 +166,6 @@ struct nand_bch_priv {
*/
static __maybe_unused struct nand_bch_priv bch_priv = {
.type = ECC_BCH8,
- .nibbles = ECC_BCH8_NIBBLES,
.control = NULL
};
@@ -243,6 +231,19 @@ static void omap_enable_hwecc(struct mtd_info *mtd,
int32_t mode)
eccsize1 = 2; /* non-ECC bits in nibbles per sector */
}
break;
+ case OMAP_ECC_BCH16_CODE_HW:
+ ecc_algo = 0x1;
+ bch_type = 0x2;
+ if (mode == NAND_ECC_WRITE) {
+ bch_wrapmode = 0x01;
+ eccsize0 = 0; /* extra bits in nibbles per sector */
+ eccsize1 = 52; /* OOB bits in nibbles per sector */
+ } else {
+ bch_wrapmode = 0x01;
+ eccsize0 = 52; /* ECC bits in nibbles per sector */
+ eccsize1 = 0; /* non-ECC bits in nibbles per sector */
+ }
+ break;
default:
return;
}
@@ -295,7 +296,7 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const
uint8_t *dat,
break;
case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
case OMAP_ECC_BCH8_CODE_HW:
- ptr = gpmc_cfg-bch_result_0_3[0].bch_result_x[3];
+ ptr = gpmc_cfg-bch_result_0_3[0].bch_result3;
val = readl(ptr);
ecc_code[i++] = (val 0) 0xFF;
ptr--;
@@ -308,6 +309,27 @@ static int
[U-Boot] [PATCH v2 0/3] mtd: nand: omap: add support for BCH16_ECC
*changes in v2* - rebased for http://lists.denx.de/pipermail/u-boot/2013-September/162107.html - minor code cleanup *original v1* This patch series add support of BCH16_ECC scheme. As BCH16_ECC scheme generates 26bytes of ECC syndrome per 512B data, hence this scheme is usable only for NAND devices having 4K or above page-size, as their OOB/spare area has enough space to accomodate ECC. This patch series is applicable over an above following series: http://lists.denx.de/pipermail/u-boot/2013-September/161859.html Pekon Gupta (3): [PATCH 1/3] am33xx: elm: add support for BCH16_ECC - ELM driver updates [PATCH 2/3] mtd: nand: omap: add support for BCH16_ECC - NAND driver updates [PATCH 3/3] am335x: update README for BCH16 arch/arm/cpu/armv7/am33xx/elm.c | 95 ++-- arch/arm/include/asm/arch-am33xx/cpu.h | 15 - arch/arm/include/asm/arch-am33xx/elm.h | 16 ++--- arch/arm/include/asm/arch-am33xx/omap_gpmc.h | 4 +- board/ti/am335x/README | 43 - drivers/mtd/nand/omap_gpmc.c | 87 - include/mtd/mtd-abi.h| 3 +- 7 files changed, 200 insertions(+), 63 deletions(-) -- 1.8.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] am335x: update README for BCH16
Adds explanation on how to select ECC scheme. Signed-off-by: Pekon Gupta pe...@ti.com --- board/ti/am335x/README | 43 +-- 1 file changed, 41 insertions(+), 2 deletions(-) diff --git a/board/ti/am335x/README b/board/ti/am335x/README index 941dfbb..05e53b1 100644 --- a/board/ti/am335x/README +++ b/board/ti/am335x/README @@ -30,12 +30,13 @@ Step-1: Building u-boot for NAND boot CONFIG_SYS_NAND_BLOCK_SIZE number of bytes in NAND erase-block CONFIG_SYS_NAND_ECCPOS ECC map for NAND page CONFIG_SYS_NAND_ECCSCHEME ECC scheme used by NAND - 0 - HAM1_SW - 1 - HAM1_HW + 0 - HAM1_SW (for legacy devices) + 1 - HAM1_HW (for legacy devices) 2 - BCH4_SW (unsupported) 3 - BCH4_HW (unsupported) 4 - BCH8_SW 5 - BCH8_HW + 6 - BCH16_HW Step-2: Flashing NAND via MMC/SD # select BOOTSEL to MMC/SD boot and boot from MMC/SD card @@ -63,6 +64,44 @@ Step-2: Flashing NAND via MMC/SD Step-3: Set BOOTSEL pin to select NAND boot, and POR the device. The device should boot from images flashed on NAND device. + +How to select ECC scheme ? +-- +Though higher ECC schemes have more capability to detect and correct +bit-flips, but still selection of ECC scheme is dependent on following +- hardware engines present in SoC. + Some legacy OMAP SoC do not have ELM h/w engine thus such + SoC cannot support BCHx_HW ECC schemes. +- size of OOB/Spare region + With higher ECC schemes, more OOB/Spare area is required to + store ECC. So choice of ECC scheme is limited by NAND oobsize. + +In general following expression can help: + NAND_OOBSIZE = 2 + (NAND_PAGESIZE / 512) * ECC_BYTES +where + NAND_OOBSIZE= number of bytes available in + OOB/spare area per NAND page. + NAND_PAGESIZE = bytes in main-area of NAND page. + ECC_BYTES = number of ECC bytes generated to + protect 512 bytes of data, which is: + 3 for HAM1_xx ecc schemes + 7 for BCH4_xx ecc schemes + 14 for BCH8_xx ecc schemes + 26 for BCH16_xx ecc schemes + + example to check for BCH16 on 2K page NAND + NAND_PAGESIZE = 2048 + NAND_OOBSIZE = 64 + 2 + (2048 / 512) * 26 = 106 NAND_OOBSIZE + Thus BCH16 cannot be supported on 2K page NAND. + + However, for 4K pagesize NAND + NAND_PAGESIZE = 4096 + NAND_OOBSIZE = 64 + ECC_BYTES = 26 + 2 + (4096 / 512) * 26 = 210 NAND_OOBSIZE + Thus BCH16 can be supported on 4K page NAND. + NOR === -- 1.8.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] am33xx: elm: add support for BCH16_ECC - ELM driver updates
With increase in NAND flash densities occurence of bit-flips has increased.
Thus stronger ECC schemes are required for detecting and correcting multiple
simultaneous bit-flips in same NAND page. But stronger ECC schemes have large
ECC syndrome which require more space in OOB/Spare.
This patch add support for BCH16_ECC:
(a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data.
(b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy following equation:
OOBsize per page = 26 * (page-size / 512)
Signed-off-by: Pekon Gupta pe...@ti.com
---
arch/arm/cpu/armv7/am33xx/elm.c| 95 ++
arch/arm/include/asm/arch-am33xx/elm.h | 16 +++---
2 files changed, 69 insertions(+), 42 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/elm.c b/arch/arm/cpu/armv7/am33xx/elm.c
index 8f1d6af..0196034 100644
--- a/arch/arm/cpu/armv7/am33xx/elm.c
+++ b/arch/arm/cpu/armv7/am33xx/elm.c
@@ -25,31 +25,27 @@
struct elm *elm_cfg;
/**
- * elm_load_syndromes - Load BCH syndromes based on nibble selection
+ * elm_load_syndromes - Load calc_ecc in ELM registers for error detection
* @syndrome: BCH syndrome
- * @nibbles:
* @poly: Syndrome Polynomial set to use
- *
- * Load BCH syndromes based on nibble selection
*/
-static void elm_load_syndromes(u8 *syndrome, u32 nibbles, u8 poly)
+static int elm_load_syndromes(u8 *syndrome, u32 bch_type, u8 poly)
{
u32 *ptr;
u32 val;
- /* reg 0 */
- ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[0];
- val = syndrome[0] | (syndrome[1] 8) | (syndrome[2] 16) |
- (syndrome[3] 24);
- writel(val, ptr);
- /* reg 1 */
- ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[1];
- val = syndrome[4] | (syndrome[5] 8) | (syndrome[6] 16) |
- (syndrome[7] 24);
- writel(val, ptr);
-
- /* BCH 8-bit with 26 nibbles (4*8=32) */
- if (nibbles 13) {
+ switch (bch_type) {
+ case ECC_BCH16:
+ /* reg 0 */
+ ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[0];
+ val = syndrome[0] | (syndrome[1] 8) | (syndrome[2] 16) |
+ (syndrome[3] 24);
+ writel(val, ptr);
+ /* reg 1 */
+ ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[1];
+ val = syndrome[4] | (syndrome[5] 8) | (syndrome[6] 16) |
+ (syndrome[7] 24);
+ writel(val, ptr);
/* reg 2 */
ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[2];
val = syndrome[8] | (syndrome[9] 8) | (syndrome[10] 16) |
@@ -60,34 +56,65 @@ static void elm_load_syndromes(u8 *syndrome, u32 nibbles,
u8 poly)
val = syndrome[12] | (syndrome[13] 8) |
(syndrome[14] 16) | (syndrome[15] 24);
writel(val, ptr);
- }
-
- /* BCH 16-bit with 52 nibbles (7*8=56) */
- if (nibbles 26) {
/* reg 4 */
ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[4];
val = syndrome[16] | (syndrome[17] 8) |
(syndrome[18] 16) | (syndrome[19] 24);
writel(val, ptr);
-
/* reg 5 */
ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[5];
val = syndrome[20] | (syndrome[21] 8) |
(syndrome[22] 16) | (syndrome[23] 24);
writel(val, ptr);
-
/* reg 6 */
ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[6];
- val = syndrome[24] | (syndrome[25] 8) |
- (syndrome[26] 16) | (syndrome[27] 24);
+ val = syndrome[24] | (syndrome[25] 8);
writel(val, ptr);
+ break;
+ case ECC_BCH8:
+ /* reg 0 */
+ ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[0];
+ val = syndrome[0] | (syndrome[1] 8) | (syndrome[2] 16) |
+ (syndrome[3] 24);
+ writel(val, ptr);
+ /* reg 1 */
+ ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[1];
+ val = syndrome[4] | (syndrome[5] 8) | (syndrome[6] 16) |
+ (syndrome[7] 24);
+ writel(val, ptr);
+ /* reg 2 */
+ ptr = elm_cfg-syndrome_fragments[poly].syndrome_fragment_x[2];
+ val = syndrome[8] | (syndrome[9] 8) | (syndrome[10] 16) |
+ (syndrome[11] 24);
+ writel(val, ptr);
+ /* reg 3 */
+ ptr =
[U-Boot] [PATCH] at91: add defines for reset type
Signed-off-by: Roger Meier r.me...@siemens.com
---
arch/arm/include/asm/arch-at91/at91_rstc.h |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h
b/arch/arm/include/asm/arch-at91/at91_rstc.h
index 423cf51..a942342 100644
--- a/arch/arm/include/asm/arch-at91/at91_rstc.h
+++ b/arch/arm/include/asm/arch-at91/at91_rstc.h
@@ -38,4 +38,11 @@ typedef struct at91_rstc {
#define AT91_RSTC_SR_NRSTL 0x0001
+#define AT91_RSTC_RSTTYP (7 8)/* Reset Type */
+#define AT91_RSTC_RSTTYP_GENERAL (0 8)
+#define AT91_RSTC_RSTTYP_WAKEUP(1 8)
+#define AT91_RSTC_RSTTYP_WATCHDOG (2 8)
+#define AT91_RSTC_RSTTYP_SOFTWARE (3 8)
+#define AT91_RSTC_RSTTYP_USER (4 8)
+
#endif
--
1.7.10.4
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Re: [U-Boot] please pull u-boot-samsung master
Hi Minkyu, On 9 September 2013 13:55, Minkyu Kang mk7.k...@samsung.com wrote: Dear Chander Kashyap, On 06/09/13 13:32, Chander Kashyap wrote: Hi Albert, On 5 September 2013 18:58, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Chander, On Thu, 5 Sep 2013 17:36:34 +0530, Chander Kashyap chander.kash...@linaro.org wrote: Hi Albert, On 5 September 2013 17:08, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Chander, On Thu, 5 Sep 2013 16:47:27 +0530, Chander Kashyap chander.kash...@linaro.org wrote: Hi Lukasz, On 5 September 2013 16:27, Lukasz Majewski l.majew...@samsung.com wrote: Hi Chander, Its working for me. But my dtc -v: Version: DTC 1.3.0 Have you managed to properly build test Samsung's u-boot tree with DTC 1.3.0? Yes, I am able to build and test. I am running on ubuntu. Then you are not testing on a recent enough U-Boot source tree; currently, master (and arm) require dtc version = 1.4.0, and will fail as indicated by Lukasz and as experienced by me -- I had to build dtc version 1.4.0 from git source. Sorry for big mess. I had re-based my tree to u-boot samsung. I have tested it after re-basing to u-boot tree. It was failing. Shall i send all the patches again, or is it possible to send the single failing patch. Well, if you have rebased to u-boot-master, then you can as well do an interactive rebase so that the commit which breaks builds is omitted. Offending patch was part of two patch series. I have fixed it and resend it with series again. Since the patchset is already applied to u-boot-samsung, If you send new patchset, then I should do rebase and forced push. If possible please send fixing patch instead of new patchset. Sure I will do that. Thanks, Thanks, Minkyu Kang. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] dts: samsung: arndale: Fix include path
As per new convention ARCH_CPU_DTS is not defined in dtc/Makefile.
Hence Arndale comilation is failing. Fix this by adding proper include
file in board/samsung/dts/exynos5250-arndale.dts.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
board/samsung/dts/exynos5250-arndale.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index c700e45..202f2ea 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -8,7 +8,7 @@
*/
/dts-v1/;
-/include/ ARCH_CPU_DTS
+#include exynos5250.dtsi
/ {
model = SAMSUNG Arndale board based on EXYNOS5250;
--
1.7.9.5
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[U-Boot] [PATCH v7 5/5] remove compiling warnings
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/cmd_pxe.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index a2fb50a..df58522 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -57,7 +57,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len)
uchar ethaddr[6];
if (outbuf_len 21) {
- printf(outbuf is too small (%d 21)\n, outbuf_len);
+ printf(outbuf is too small (%zd 21)\n, outbuf_len);
return -EINVAL;
}
@@ -100,7 +100,7 @@ static int get_bootfile_path(const char *file_path, char
*bootfile_path,
path_len = (last_slash - bootfile) + 1;
if (bootfile_path_size path_len) {
- printf(bootfile_path too small. (%d %d)\n,
+ printf(bootfile_path too small. (%zd %zd)\n,
bootfile_path_size, path_len);
return -1;
--
1.7.9.5
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[U-Boot] [PATCH v7 4/5] 64bit initrd start address support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/fdt_support.c | 66 ++
1 file changed, 34 insertions(+), 32 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..9bc5821 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -21,6 +21,34 @@
*/
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Get cells len in bytes
+ * if #-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+ const fdt32_t *cell;
+
+ cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+ if (cell fdt32_to_cpu(*cell) == 2)
+ return 8;
+
+ return 4;
+}
+
+/*
+ * Write a 4 or 8 byte big endian cell
+ */
+static void write_cell(u8 *addr, u64 val, int size)
+{
+ int shift = (size - 1) * 8;
+ while (size-- 0) {
+ *addr++ = (val shift) 0xff;
+ shift -= 8;
+ }
+}
+
/**
* fdt_getprop_u32_default - Find a node and return it's property or a default
*
@@ -131,9 +159,9 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff)
int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force)
{
- int nodeoffset;
+ int nodeoffset, addr_cell_len;
int err, j, total;
- fdt32_t tmp;
+ fdt64_t tmp;
const char *path;
uint64_t addr, size;
@@ -170,9 +198,11 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
return err;
}
+ addr_cell_len = get_cells_len(fdt, #address-cells);
+
path = fdt_getprop(fdt, nodeoffset, linux,initrd-start, NULL);
if ((path == NULL) || force) {
- tmp = cpu_to_fdt32(initrd_start);
+ write_cell((u8 *)tmp, initrd_start, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-start, tmp, sizeof(tmp));
if (err 0) {
@@ -181,7 +211,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
fdt_strerror(err));
return err;
}
- tmp = cpu_to_fdt32(initrd_end);
+ write_cell((u8 *)tmp, initrd_end, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-end, tmp, sizeof(tmp));
if (err 0) {
@@ -343,34 +373,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
do_fixup_by_compat(fdt, compat, prop, tmp, 4, create);
}
-/*
- * Get cells len in bytes
- * if #-cells property is 2 then len is 8
- * otherwise len is 4
- */
-static int get_cells_len(void *blob, char *nr_cells_name)
-{
- const fdt32_t *cell;
-
- cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
- if (cell fdt32_to_cpu(*cell) == 2)
- return 8;
-
- return 4;
-}
-
-/*
- * Write a 4 or 8 byte big endian cell
- */
-static void write_cell(u8 *addr, u64 val, int size)
-{
- int shift = (size - 1) * 8;
- while (size-- 0) {
- *addr++ = (val shift) 0xff;
- shift -= 8;
- }
-}
-
#ifdef CONFIG_NR_DRAM_BANKS
#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
#else
--
1.7.9.5
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[U-Boot] [PATCH v7 0/5] arm64 patch
From: David Feng feng...@phytium.com.cn The porting has been merged with arm architecture. Most architecture codes are placed in arch/arm/cpu/armv8 directory. Generic board is also supported after a few bugs are fixed. u-boot could be running at EL1 or EL2. Changes for v6: - Check the patches with checkpatch.pl and get rid of almost all warnings. There are a few warnings still, but I think it should be that. - change printf format in cmd_pxe.c, use %zd indtead of %ld to format size_t type variable. - add macro PGTABLE_SIZE to identify tlb table size. Changes for v5: - Make modification to inappropriate licensed file and bugs according to ScottWood's advice. Thanks Scott for his checking to these patches. - Enable u-boot's running at EL1. - Get rid of compiling warnings originated from cmd_pxe.c. Changes for v4: - fix the generic board_f.c, remove zero_global_data from init_sequence_f array and move it to board_init_f() function with CONFIG_X86 switch. The previous fixup is inaccurate. - Replace __ARMEB__ with __AARCH64EB__ in byteorder.h and unaligned.h, gcc for aarch64 use __AARCH64EB__ and __AARCH64EL__ to identify endian. - Some modification to README.armv8 Changes for v3: - merge arm64 to arm architecture. David Feng (5): core support of arm64 board support of vexpress_aemv8a generic board patch of manual reloc and zero gd_t 64bit initrd start address support remove compiling warnings MAINTAINERS |4 + arch/arm/config.mk |4 + arch/arm/cpu/armv8/Makefile | 56 arch/arm/cpu/armv8/cache.S | 145 ++ arch/arm/cpu/armv8/cache_v8.c | 275 +++ arch/arm/cpu/armv8/config.mk| 31 +++ arch/arm/cpu/armv8/cpu.c| 68 + arch/arm/cpu/armv8/crt0.S | 130 + arch/arm/cpu/armv8/exceptions.S | 173 arch/arm/cpu/armv8/interrupts.c | 158 +++ arch/arm/cpu/armv8/relocate.S | 73 + arch/arm/cpu/armv8/start.S | 253 ++ arch/arm/cpu/armv8/timer.c | 97 +++ arch/arm/cpu/armv8/tlb.S| 45 arch/arm/cpu/armv8/u-boot.lds | 83 ++ arch/arm/include/asm/arch-armv8/gpio.h | 26 ++ arch/arm/include/asm/arch-armv8/mmu.h | 117 arch/arm/include/asm/byteorder.h| 12 + arch/arm/include/asm/cache.h|5 + arch/arm/include/asm/config.h | 10 + arch/arm/include/asm/global_data.h |6 +- arch/arm/include/asm/io.h | 15 +- arch/arm/include/asm/macro.h| 34 +++ arch/arm/include/asm/posix_types.h | 17 ++ arch/arm/include/asm/proc-armv/ptrace.h | 37 +++ arch/arm/include/asm/proc-armv/system.h | 59 - arch/arm/include/asm/system.h | 78 ++ arch/arm/include/asm/types.h|4 + arch/arm/include/asm/u-boot.h |4 + arch/arm/include/asm/unaligned.h|2 +- arch/arm/lib/Makefile |8 + arch/arm/lib/board.c| 16 +- arch/arm/lib/bootm.c| 20 +- board/armltd/dts/vexpress64.dts | 439 +++ board/armltd/vexpress64/Makefile| 43 +++ board/armltd/vexpress64/vexpress64.c| 79 ++ boards.cfg |1 + common/board_f.c| 19 +- common/board_r.c| 18 ++ common/cmd_pxe.c|4 +- common/fdt_support.c| 66 ++--- common/image.c |1 + doc/README.armv8| 10 + examples/standalone/stubs.c | 15 ++ include/configs/vexpress_aemv8a.h | 205 +++ include/image.h |1 + 46 files changed, 2912 insertions(+), 54 deletions(-) create mode 100644 arch/arm/cpu/armv8/Makefile create mode 100644 arch/arm/cpu/armv8/cache.S create mode 100644 arch/arm/cpu/armv8/cache_v8.c create mode 100644 arch/arm/cpu/armv8/config.mk create mode 100644 arch/arm/cpu/armv8/cpu.c create mode 100644 arch/arm/cpu/armv8/crt0.S create mode 100644 arch/arm/cpu/armv8/exceptions.S create mode 100644 arch/arm/cpu/armv8/interrupts.c create mode 100644 arch/arm/cpu/armv8/relocate.S create mode 100644 arch/arm/cpu/armv8/start.S create mode 100644 arch/arm/cpu/armv8/timer.c create mode 100644 arch/arm/cpu/armv8/tlb.S create mode 100644 arch/arm/cpu/armv8/u-boot.lds create mode 100644 arch/arm/include/asm/arch-armv8/gpio.h create mode 100644 arch/arm/include/asm/arch-armv8/mmu.h create mode 100644 board/armltd/dts/vexpress64.dts create mode 100644 board/armltd/vexpress64/Makefile create mode 100644 board/armltd/vexpress64/vexpress64.c create mode 100644 doc/README.armv8 create mode 100644
[U-Boot] [PATCH v7 2/5] board support of vexpress_aemv8a
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
board/armltd/dts/vexpress64.dts | 439 ++
board/armltd/vexpress64/Makefile | 43
board/armltd/vexpress64/vexpress64.c | 79 ++
boards.cfg |1 +
include/configs/vexpress_aemv8a.h| 205
5 files changed, 767 insertions(+)
create mode 100644 board/armltd/dts/vexpress64.dts
create mode 100644 board/armltd/vexpress64/Makefile
create mode 100644 board/armltd/vexpress64/vexpress64.c
create mode 100644 include/configs/vexpress_aemv8a.h
diff --git a/board/armltd/dts/vexpress64.dts b/board/armltd/dts/vexpress64.dts
new file mode 100644
index 000..067fea7
--- /dev/null
+++ b/board/armltd/dts/vexpress64.dts
@@ -0,0 +1,439 @@
+/*
+ * ARM Ltd. Fast Models
+ *
+ * Architecture Envelope Model (AEM) ARMv8-A
+ * ARMAEMv8AMPCT
+ *
+ * RTSM_VE_AEMv8A.lisa
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x8000 0x0001;
+
+/ {
+ /* boot configurations for u-boot */
+ config {
+ /*bootdelay = 1;*/
+ kernel-offset = 0x10;
+ rootdisk-offset = 0x80;
+ bootcmd = bootm 0x10 0x80:0x200;
+ };
+};
+
+/ {
+ model = RTSM_VE_AEMv8A;
+ compatible = arm,rtsm_ve,aemv8a, arm,vexpress;
+ interrupt-parent = gic;
+ #address-cells = 2;
+ #size-cells = 2;
+
+ /* chosen */
+ /* generated by u-boot */
+
+
+ aliases {
+ serial0 = v2m_serial0;
+ serial1 = v2m_serial1;
+ serial2 = v2m_serial2;
+ serial3 = v2m_serial3;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type = cpu;
+ compatible = arm,armv8;
+ reg = 0;
+ enable-method = spin-table;
+ cpu-release-addr = 0x0 0x8000fff8;
+ };
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,armv8;
+ reg = 1;
+ enable-method = spin-table;
+ cpu-release-addr = 0x0 0x8000fff8;
+ };
+ cpu@2 {
+ device_type = cpu;
+ compatible = arm,armv8;
+ reg = 2;
+ enable-method = spin-table;
+ cpu-release-addr = 0x0 0x8000fff8;
+ };
+ cpu@3 {
+ device_type = cpu;
+ compatible = arm,armv8;
+ reg = 3;
+ enable-method = spin-table;
+ cpu-release-addr = 0x0 0x8000fff8;
+ };
+ };
+
+ memory@8000 {
+ device_type = memory;
+ reg = 0x 0x8000 0 0x8000,
+ 0x0008 0x8000 0 0x8000;
+ };
+
+ gic: interrupt-controller@2c001000 {
+ compatible = arm,cortex-a15-gic, arm,cortex-a9-gic;
+ #interrupt-cells = 3;
+ #address-cells = 0;
+ interrupt-controller;
+ reg = 0x0 0x2c001000 0 0x1000,
+ 0x0 0x2c002000 0 0x1000,
+ 0x0 0x2c004000 0 0x2000,
+ 0x0 0x2c006000 0 0x2000;
+ interrupts = 1 9 0xf04;
+ };
+
+ timer {
+ compatible = arm,armv8-timer;
+ interrupts = 1 13 0xff01,
+1 14 0xff01,
+1 11 0xff01,
+1 10 0xff01;
+ clock-frequency = 1;
+ };
+
+ pmu {
+ compatible = arm,armv8-pmuv3;
+ interrupts = 0 60 4,
+0 61 4,
+0 62 4,
+0 63 4;
+ };
+
+ smb {
+ compatible = simple-bus;
+
+ #address-cells = 2;
+ #size-cells = 1;
+ ranges = 0 0 0 0x0800 0x0400,
+1 0 0 0x1400 0x0400,
+2 0 0 0x1800 0x0400,
+3 0 0 0x1c00 0x0400,
+4 0 0 0x0c00 0x0400,
+5 0 0 0x1000 0x0400;
+
+ #interrupt-cells = 1;
+ interrupt-map-mask = 0 0 63;
+ interrupt-map = 0 0 0 gic 0 0 4,
+ 0 0 1 gic 0 1 4,
+ 0 0 2 gic 0 2 4,
+ 0 0 3 gic 0 3 4,
+ 0 0 4 gic 0 4 4,
+ 0 0 5 gic 0 5 4,
+ 0 0 6 gic 0 6 4,
+
[U-Boot] [PATCH v7 3/5] generic board patch of manual reloc and zero gd_t
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/board_f.c | 19 +++
common/board_r.c | 18 ++
2 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 0ada1af..f6ca610 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -458,7 +458,7 @@ static int reserve_round_4k(void)
static int reserve_mmu(void)
{
/* reserve TLB table */
- gd-arch.tlb_size = 4096 * 4;
+ gd-arch.tlb_size = PGTABLE_SIZE;
gd-relocaddr -= gd-arch.tlb_size;
/* round down to next 64 kB limit */
@@ -610,7 +610,7 @@ static int reserve_stacks(void)
* TODO(s...@chromium.org): Perhaps create arch_reserve_stack()
* to handle this and put in arch/xxx/lib/stack.c
*/
-# ifdef CONFIG_ARM
+# if defined(CONFIG_ARM) !defined(CONFIG_ARMV8)
# ifdef CONFIG_USE_IRQ
gd-start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
debug(Reserving %zu Bytes for IRQ stack at: %08lx\n,
@@ -807,11 +807,6 @@ static int mark_bootstage(void)
}
static init_fnc_t init_sequence_f[] = {
-#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
- !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
- !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
- zero_global_data,
-#endif
#ifdef CONFIG_SANDBOX
setup_ram_buf,
#endif
@@ -1001,10 +996,18 @@ void board_init_f(ulong boot_flags)
{
#ifndef CONFIG_X86
gd_t data;
-
gd = data;
#endif
+ /*
+* Zero gd_t first, otherwise the debug print(if DEBUG defined)
+* in initcall_run_list function before zero_global_data is called
+* will go wrong.
+*/
+#ifndef CONFIG_X86
+ zero_global_data();
+#endif
+
gd-flags = boot_flags;
if (initcall_run_list(init_sequence_f))
diff --git a/common/board_r.c b/common/board_r.c
index 86ca1cb..7217e3c 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -157,6 +157,13 @@ static int initr_reloc_global_data(void)
*/
gd-env_addr += gd-relocaddr - CONFIG_SYS_MONITOR_BASE;
#endif
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+ /*
+* We have to relocate the command table manually
+*/
+ fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
+ ll_entry_count(cmd_tbl_t, cmd));
+#endif /* CONFIG_NEEDS_MANUAL_RELOC */
return 0;
}
@@ -899,6 +906,7 @@ init_fnc_t init_sequence_r[] = {
initr_modem,
#endif
run_main_loop,
+ NULL,
};
void board_init_r(gd_t *new_gd, ulong dest_addr)
@@ -906,6 +914,16 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
#ifndef CONFIG_X86
gd = new_gd;
#endif
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+ /*
+* We have to relocate the init_sequence_r table manually
+*/
+ init_fnc_t *init_fnc_ptr;
+ for (init_fnc_ptr = init_sequence_r; *init_fnc_ptr; ++init_fnc_ptr)
+ *init_fnc_ptr = (init_fnc_t *)
+ ((unsigned long)(*init_fnc_ptr) + gd-reloc_off);
+#endif /* CONFIG_NEEDS_MANUAL_RELOC */
+
if (initcall_run_list(init_sequence_r))
hang();
--
1.7.9.5
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Re: [U-Boot] [PATCH] Subject: [PATCH v.2] at91: add support for CDU9G25 board
Hi Wolfgang, Dne 9.9.2013 17:34, Wolfgang Denk napsal(a): Dear Jiri Prchal, In message 1378736524-30870-1-git-send-email-jiri.prc...@aksignal.cz you wrote: This patch adds support for our companies board CDU9G25 with Atmel AT91SAM9G25, 128MB DDR2, 256MB NAND. Please keep the line length of the commit message 70 characters. v.2 Fixed static IP and MAC addr cofiguration by random MAC and DHCP. Added entry to MAINTAINERS. Fixed line lenght, trailing spaces and other cosmetics. This comment does not belong into the commit message - please move it to the comment section, i. e. below the --- line. I'm not sure if I even should number versions of this patch? --- a/MAINTAINERS +++ b/MAINTAINERS @@ -939,6 +939,9 @@ Bo Shen voice.s...@atmel.com at91sam9x5ekARM926EJS (AT91SAM9G15,G25,G35,X25,X35 SoC) sama5d3xek ARMV7 (SAMA5D31, D33, D34, D35 SoC) +Jiri Prchal jiri.prc...@aksignal.cz + cdu9g25 ARM926EJS (AT91SAM9G25 SoC) + Rajeshwari Shinde rajeshwar...@samsung.com Please keep the list sorted. +#define CONFIG_BOOTARGSconsole=ttyS0,115200 ubi.mtd=root\ + root=ubi0:root rootfstype=ubifs rw\ + g_ether.dev_addr=02:04:25:aa:55:5e\ + g_ether.host_addr=02:04:25:aa:55:5f This is here for linux connection with PC via USB ethernet gadget. I'd like static IP for this connection but if there is random MAC addr I must set up IP again and again. Is another solution for this? +#define CONFIG_SERVERIP10.0.1.1 Please help me with this: I'd like to have board prepared for download images from TFTP server on address 10.0.1.1. Is there other way how to do it? Even with MAC addr, I solved it with random MAC, is that OK? I keep in mind that would be nice read unique serial number from F-RAM (is on boart too) on SPI and use it as MAC addr. Will be this way better? We do not allow static network configuration in board config files! Please get rid of these MAC and IP addresses here. Best regards, Wolfgang Denk With many thanks, Jiri ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/3] dfu: unify mmc/nand read/write ops enum
Hi Afzal,
MMC and NAND independently defines same enumerators for read/write.
Unify them by defining enum in dfu header. RAM support that is being
added newly also can make use of it.
Signed-off-by: Afzal Mohammed afzal.mohd...@gmail.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
v2: new
drivers/dfu/dfu_mmc.c | 9 ++---
drivers/dfu/dfu_nand.c | 7 +--
include/dfu.h | 5 +
3 files changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 0871a77..f942758 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -13,16 +13,11 @@
#include div64.h
#include dfu.h
-enum dfu_mmc_op {
- DFU_OP_READ = 1,
- DFU_OP_WRITE,
-};
-
static unsigned char __aligned(CONFIG_SYS_CACHELINE_SIZE)
dfu_file_buf[CONFIG_SYS_DFU_MAX_FILE_SIZE];
static long dfu_file_buf_len;
-static int mmc_block_op(enum dfu_mmc_op op, struct dfu_entity *dfu,
+static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
u64 offset, void *buf, long *len)
{
char cmd_buf[DFU_CMD_BUF_SIZE];
@@ -65,7 +60,7 @@ static int mmc_file_buffer(struct dfu_entity *dfu,
void *buf, long *len) return 0;
}
-static int mmc_file_op(enum dfu_mmc_op op, struct dfu_entity *dfu,
+static int mmc_file_op(enum dfu_op op, struct dfu_entity *dfu,
void *buf, long *len)
{
char cmd_buf[DFU_CMD_BUF_SIZE];
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 0ec12cf..edbf5a9 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -19,12 +19,7 @@
#include jffs2/load_kernel.h
#include nand.h
-enum dfu_nand_op {
- DFU_OP_READ = 1,
- DFU_OP_WRITE,
-};
-
-static int nand_block_op(enum dfu_nand_op op, struct dfu_entity *dfu,
+static int nand_block_op(enum dfu_op op, struct dfu_entity *dfu,
u64 offset, void *buf, long *len)
{
loff_t start, lim;
diff --git a/include/dfu.h b/include/dfu.h
index 47b9055..6115d90 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -29,6 +29,11 @@ enum dfu_layout {
DFU_FS_EXT4,
};
+enum dfu_op {
+ DFU_OP_READ = 1,
+ DFU_OP_WRITE,
+};
+
struct mmc_internal_data {
/* RAW programming */
unsigned int lba_start;
Acked-by: Lukasz Majewski l.majew...@samsung.com
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 1/1] m28evk board config
Hello Mailing List - Hello Fabio and Marex
Thank you very much for your helpfull hints!!
Just some words of mine on your comments.
Am 2013-09-09 16:37, schrieb Marek Vasut:
Dear lot...@denx.de,
From 24b6381162b4569ab86b481b8714d81877231f22 Mon Sep 17 00:00:00
2001
From: Lothar Rubusch lot...@denx.de
Date: Fri, 6 Sep 2013 15:01:39 +0200
Subject: [PATCH] m28evk board specific configurations for setup with
ext
boot
partition and separate ext rootfs
Signed-off-by: Lothar Rubusch lot...@denx.de
---
include/configs/m28evk.h | 78
++--
1 file changed, 75 insertions(+), 3 deletions(-)
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index eba8759..b65456e 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -150,15 +150,25 @@
#endif
/* Booting Linux */
-#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTDELAY 5
#define CONFIG_BOOTFILE uImage
#define CONFIG_BOOTARGS console=ttyAMA0,115200n8
-#define CONFIG_BOOTCOMMAND run bootcmd_net
+#define CONFIG_BOOTCOMMAND run mmc_mmc
#define CONFIG_LOADADDR 0x4200
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
These two options above do not seem right, they certainly can make use
of some
unification. But that's for another patch.
As Fabio Estevan already mentioned, the BOOTDELAY is definitely an
unnecessary change which I'll leave out.
Fabio further complained about a missing commit history. I can see the
point, but the configurations were elaborated directly through the uboot
environment, and thus commited altogether. They were necessary, since
the before include/configs/m28evk.h was definitely not working well with
the m28evk board. Testing it, and with a huge help of Marek, I came to
present this solution, and will soon post a v2 of it.
As Marek explained me personally, his comment here was related to the
duplicate setting of the LOADADDR. My patch does not address this issue.
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
+ fdtfile=imx28-m28evk.dtb\0\
+ consdev=ttyAMA0\0 \
+ baudrate=115200\0 \
+ bootdev=/dev/mmcblk0p2\0 \
+ rootdev=/dev/mmcblk0p3\0 \
+ netdev=eth0\0 \
+ hostname=m28evk\0 \
+ rootpath=/opt/eldk-5.3/armv5te/rootfs-qte-sdk\0 \
Use 5.4 here ?
Definitely!
+ kernel_addr_r=0x4200\0\
+ fdt_addr_r=0x4100\0 \
update_nand_full_filename=u-boot.nand\0 \
update_nand_firmware_filename=u-boot.sb\0 \
update_sd_firmware_filename=u-boot.sd\0 \
@@ -196,7 +206,69 @@
setexpr fw_sz ${fw_sz} + 1 ;\
mmc write ${loadaddr} 0x800 ${fw_sz} ; \
fi ;\
- fi\0
+ fi\0 \
+ addcons=setenv bootargs ${bootargs}
console=${consdev},${baudrate}\0
\
+ addip=\
+ setenv bootargs ${bootargs} \
+ ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}: \
+ ${hostname}:${netdev}:off\0 \
+ addmisc=setenv bootargs ${bootargs} ${miscargs}\0 \
+ adddfltmtd= \
+ if test \x${mtdparts}\ == \x\ ; \
+ then mtdparts default ; \
+ fi\0 \
I suspect the addmtd should be called unconditionally for every boot
type
(mmc_nfs...net_nand).
I can't currently see her which conditional case under which addmtd is
running. I'll double check it for a v2. Thank you.
BR,
Lothar Rubusch
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[U-Boot] [PATCH] ARM: IGEP0033: Update timing to run DDR at 400MHz.
From: Enric Balletbo i Serra eballe...@iseebcn.com
We can run the DDR at 400MHz, so update the timings for that purpose.
Signed-off-by: Enric Balletbo i Serra eballe...@iseebcn.com
---
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 24
board/isee/igep0033/board.c | 4 ++--
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 95f7a9a..fe48b5f 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -110,20 +110,20 @@
#define MT41J512M8RH125_IOCTRL_VALUE 0x18B
/* Samsung K4B2G1646E-BIH9 */
-#define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x06
-#define K4B2G1646EBIH9_EMIF_TIM1 0x0888A39B
-#define K4B2G1646EBIH9_EMIF_TIM2 0x2A04011A
-#define K4B2G1646EBIH9_EMIF_TIM3 0x501F820F
-#define K4B2G1646EBIH9_EMIF_SDCFG 0x61C24AB2
-#define K4B2G1646EBIH9_EMIF_SDREF 0x093B
+#define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x07
+#define K4B2G1646EBIH9_EMIF_TIM1 0x0AAAE51B
+#define K4B2G1646EBIH9_EMIF_TIM2 0x2A1D7FDA
+#define K4B2G1646EBIH9_EMIF_TIM3 0x501F83FF
+#define K4B2G1646EBIH9_EMIF_SDCFG 0x61C052B2
+#define K4B2G1646EBIH9_EMIF_SDREF 0x0C30
#define K4B2G1646EBIH9_ZQ_CFG 0x50074BE4
#define K4B2G1646EBIH9_DLL_LOCK_DIFF 0x1
-#define K4B2G1646EBIH9_RATIO 0x40
-#define K4B2G1646EBIH9_INVERT_CLKOUT 0x1
-#define K4B2G1646EBIH9_RD_DQS 0x3B
-#define K4B2G1646EBIH9_WR_DQS 0x85
-#define K4B2G1646EBIH9_PHY_FIFO_WE 0x100
-#define K4B2G1646EBIH9_PHY_WR_DATA 0xC1
+#define K4B2G1646EBIH9_RATIO 0x80
+#define K4B2G1646EBIH9_INVERT_CLKOUT 0x0
+#define K4B2G1646EBIH9_RD_DQS 0x35
+#define K4B2G1646EBIH9_WR_DQS 0x3A
+#define K4B2G1646EBIH9_PHY_FIFO_WE 0x97
+#define K4B2G1646EBIH9_PHY_WR_DATA 0x76
#define K4B2G1646EBIH9_IOCTRL_VALUE0x18B
/**
diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c
index 9e91f68..a9c34c6 100644
--- a/board/isee/igep0033/board.c
+++ b/board/isee/igep0033/board.c
@@ -64,7 +64,7 @@ static struct emif_regs ddr3_emif_reg_data = {
#define OSC(V_OSCK/100)
const struct dpll_params dpll_ddr = {
- 303, OSC-1, 1, -1, -1, -1, -1};
+ 400, OSC-1, 1, -1, -1, -1, -1};
const struct dpll_params *get_dpll_ddr_params(void)
{
@@ -83,7 +83,7 @@ void set_mux_conf_regs(void)
void sdram_init(void)
{
- config_ddr(303, K4B2G1646EBIH9_IOCTRL_VALUE, ddr3_data,
+ config_ddr(400, K4B2G1646EBIH9_IOCTRL_VALUE, ddr3_data,
ddr3_cmd_ctrl_data, ddr3_emif_reg_data, 0);
}
#endif
--
1.8.1.2
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[U-Boot] [PATCH] powerpc/p2041: fix I2C controller's offset
Without this patch, SPD access will fail which leads to DDR init fail. Signed-off-by: Shaohui Xie shaohui@freescale.com --- include/configs/P2041RDB.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 905bacf..862614b 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -354,10 +354,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 40 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SPEED 40 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 /* * RapidIO -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/3] dfu: ram support
Hi Afzal,
DFU spec mentions it as a method to upgrade firmware (software stored
in writable non-volatile memory). It also says other potential uses of
DFU is beyond scope of the spec.
Here such a beyond the scope use is being attempted - directly pumping
binary images from host via USB to RAM. This facility is a developer
centric one in that it gives advantage over upgrading non-volatile
memory for testing new images every time during development and/or
testing.
Directly putting image onto RAM would speed up upgrade process. This
and convenience was the initial thoughts that led to doing this, speed
improvement over MMC was only 1 second though - 6 sec on RAM as
opposed to 7 sec on MMC in beagle bone,
Which version of dfu-util do you use? I had slow transmission problem
with ancient dfu-util version 0.1.
perhaps enabling cache and/or
optimizing DFU framework to avoid multiple copy for ram (if worth)
may help, and on other platforms and other boot media like NAND maybe
improvement would be higher.
And for a platform that doesn't yet have proper DFU suppport for
non-volatile media's, DFU to RAM can be used.
Another minor advantage would be to increase life of mmc/nand as it
would be less used during development/testing.
usage: image name ram start address size
eg. kernel ram 0x8100 0x100
Downloading images to RAM using DFU is not something new, this is
acheived in openmoko also.
DFU on RAM can be used for extracting RAM contents to host using dfu
upload. Perhaps this can be extended to io for squeezing out register
dump through usb, if it is worth.
Signed-off-by: Afzal Mohammed afzal.mohd...@gmail.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
v2: remove read/write enumerator define's, instead use new common ones
drivers/dfu/Makefile | 1 +
drivers/dfu/dfu.c | 7 +++--
drivers/dfu/dfu_ram.c | 77
+++
include/dfu.h | 18 4 files changed, 101
insertions(+), 2 deletions(-) create mode 100644 drivers/dfu/dfu_ram.c
diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
index fca370a..de9e44e 100644
--- a/drivers/dfu/Makefile
+++ b/drivers/dfu/Makefile
@@ -12,6 +12,7 @@ LIB = $(obj)libdfu.o
COBJS-$(CONFIG_DFU_FUNCTION) += dfu.o
COBJS-$(CONFIG_DFU_MMC) += dfu_mmc.o
COBJS-$(CONFIG_DFU_NAND) += dfu_nand.o
+COBJS-$(CONFIG_DFU_RAM) += dfu_ram.o
SRCS:= $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index d73d510..7b3d05d 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -325,6 +325,9 @@ static int dfu_fill_entity(struct dfu_entity
*dfu, char *s, int alt, } else if (strcmp(interface, nand) == 0) {
if (dfu_fill_entity_nand(dfu, s))
return -1;
+ } else if (strcmp(interface, ram) == 0) {
+ if (dfu_fill_entity_ram(dfu, s))
+ return -1;
} else {
printf(%s: Device %s not (yet) supported!\n,
__func__, interface);
@@ -374,14 +377,14 @@ int dfu_config_entities(char *env, char
*interface, int num)
const char *dfu_get_dev_type(enum dfu_device_type t)
{
- const char *dev_t[] = {NULL, eMMC, OneNAND, NAND };
+ const char *dev_t[] = {NULL, eMMC, OneNAND, NAND,
RAM }; return dev_t[t];
}
const char *dfu_get_layout(enum dfu_layout l)
{
const char *dfu_layout[] = {NULL, RAW_ADDR, FAT, EXT2,
-EXT3, EXT4 };
+EXT3, EXT4,
RAM_ADDR }; return dfu_layout[l];
}
diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c
new file mode 100644
index 000..a603bfb
--- /dev/null
+++ b/drivers/dfu/dfu_ram.c
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2013
+ * Afzal Mohammed afzal.mohd...@gmail.com
+ *
+ * Reference: dfu_mmc.c
+ * Copyright (C) 2012 Samsung Electronics
+ * author: Lukasz Majewski l.majew...@samsung.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include errno.h
+#include dfu.h
+
+static int dfu_transfer_medium_ram(enum dfu_op op, struct dfu_entity
*dfu,
+u64 offset, void *buf, long *len)
+{
+ if (dfu-layout != DFU_RAM_ADDR) {
+ printf(%s: unsupported layout :%s\n, __func__,
+dfu_get_layout(dfu-layout));
Please use error() from ./include/common.h
Frankly, I've overlooked this when I originally
developed the code.
+ return -EINVAL;
+ }
+
+ if (offset dfu-data.ram.size) {
+ printf(%s: request exceeds allowed area\n,
__func__);
The same here.
+ return -EINVAL;
+ }
+
+ if (op == DFU_OP_WRITE)
+
Re: [U-Boot] [PATCH] Subject: [PATCH v.2] at91: add support for CDU9G25 board
Dear Jiří Prchal, On 09/10/2013 09:58 AM, Jiří Prchal wrote: Dne 9.9.2013 17:34, Wolfgang Denk napsal(a): In message 1378736524-30870-1-git-send-email-jiri.prc...@aksignal.cz you wrote: snip +#define CONFIG_BOOTARGSconsole=ttyS0,115200 ubi.mtd=root\ +root=ubi0:root rootfstype=ubifs rw\ +g_ether.dev_addr=02:04:25:aa:55:5e\ +g_ether.host_addr=02:04:25:aa:55:5f This is here for linux connection with PC via USB ethernet gadget. I'd like static IP for this connection but if there is random MAC addr I must set up IP again and again. Is another solution for this? I have this in my /etc/network/interfaces on host: ---8--- allow-hotplug usb0 iface usb0 inet static address 192.168.50.2 netmask 255.255.255.0 broadcast 192.168.50.255 network 192.168.50.0 ---8--- And something other, hard coded in in embedded firmware config. This works like a charm with changing MAC for usb gadget. Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/3] am335x_evm: enable DFU RAM
Hi Afzal,
Enable DFU for RAM, provide example dfu_alt_info
Signed-off-by: Afzal Mohammed afzal.mohd...@gmail.com
Cc: Tom Rini tr...@ti.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
v2: new
include/configs/am335x_evm.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/configs/am335x_evm.h
b/include/configs/am335x_evm.h index 7969e07..0449a1f 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -100,6 +100,7 @@
loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0 \
importbootenv=echo Importing environment from mmc ...; \
env import -t $loadaddr $filesize\0 \
+ dfu_alt_info_ram= DFU_ALT_INFO_RAM \0 \
ramargs=setenv bootargs console=${console} \
${optargs} \
root=${ramroot} \
@@ -210,6 +211,11 @@
kernel part 0 8; \
rootfs part 0 9
#endif
+#define CONFIG_DFU_RAM
+#define DFU_ALT_INFO_RAM \
+ kernel ram 0x8020 0xD8; \
+ fdt ram 0x80F8 0x8; \
+ ramdisk ram 0x8100 0x400
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /*
Base EVM has UART0 */
Seems OK for me (but I'm not AM335x maintainer).
Reviewed-by: Lukasz Majewski l.majew...@samsung.com
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH v3] arm:goni:mmc: Add sd card detection and initialization.
This change allow to use sd card on Goni the same like mmc 0.
SD card is mmc dev 1, so it can be used like this: fatls mmc 1:2.
SD card is inited even if eMMC initialization fails.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- add ret_sd for sd card initialization errors
- return bit OR of ret and ret_sd values
Changes for v3:
- change puts() to error() when prints error message
- chance BIT OR on ret and sd_ret to BIT AND
Now return value is 0 if any card will init succeed and -1 if both fails.
---
board/samsung/goni/goni.c | 33 +++--
1 file changed, 31 insertions(+), 2 deletions(-)
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 5b3d6ef..366f648 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -72,7 +72,7 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int i;
+ int i, ret, ret_sd = 0;
/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
s5p_gpio_direction_output(s5pc110_gpio-j2, 7, 1);
@@ -95,7 +95,36 @@ int board_mmc_init(bd_t *bis)
s5p_gpio_set_drv(s5pc110_gpio-g0, i, GPIO_DRV_4X);
}
- return s5p_mmc_init(0, 4);
+ ret = s5p_mmc_init(0, 4);
+ if (ret)
+ error(MMC: Failed to init MMC:0.\n);
+
+ /*
+* SD card (T_FLASH) detect and init
+* T_FLASH_DETECT: EINT28: GPH3[4] input mode
+*/
+ s5p_gpio_cfg_pin(s5pc110_gpio-h3, 4, GPIO_INPUT);
+ s5p_gpio_set_pull(s5pc110_gpio-h3, 4, GPIO_PULL_UP);
+
+ if (!s5p_gpio_get_value(s5pc110_gpio-h3, 4)) {
+ for (i = 0; i 7; i++) {
+ if (i == 2)
+ continue;
+
+ /* GPG2[0:6] special function 2 */
+ s5p_gpio_cfg_pin(s5pc110_gpio-g2, i, 0x2);
+ /* GPG2[0:6] pull disable */
+ s5p_gpio_set_pull(s5pc110_gpio-g2, i, GPIO_PULL_NONE);
+ /* GPG2[0:6] drv 4x */
+ s5p_gpio_set_drv(s5pc110_gpio-g2, i, GPIO_DRV_4X);
+ }
+
+ ret_sd = s5p_mmc_init(2, 4);
+ if (ret_sd)
+ error(MMC: Failed to init SD card (MMC:2).\n);
+ }
+
+ return ret ret_sd;
}
#endif
--
1.7.9.5
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[U-Boot] [PATCH v2] Fix loading freeze when netconsole is active
Netconsole calls eth_halt() before giving control to another operating system. But the state machine of netconsole don't take it into account. Thus, netconsole calls network functions of an halted network device, making the whole system freeze. Rather than modifying the state machine of netconsole, we just unregister the current network device before booting. It does work because nc_send_packet() verifies that the current network device is not null. Signed-off-by: Frédéric Leroy fr...@starox.org --- Sorry, I was dumb. I don't know why I removed call to eth_halt(). eth_unregister() don't halt the device. Changes in v2: don't remove the call to eth_halt() common/cmd_bootm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 15f4599..549a914 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -578,6 +578,7 @@ static int do_bootm_subcommand(cmd_tbl_t *cmdtp, int flag, int argc, * left it up */ eth_halt(); + eth_unregister(eth_get_dev()); #endif arch_preboot_os(); boot_fn(BOOTM_STATE_OS_GO, argc, argv, images); @@ -646,6 +647,7 @@ int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_NETCONSOLE /* Stop the ethernet stack if NetConsole could have left it up */ eth_halt(); + eth_unregister(eth_get_dev()); #endif #if defined(CONFIG_CMD_USB) @@ -1850,6 +1852,7 @@ static int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_NETCONSOLE /* Stop the ethernet stack if NetConsole could have left it up */ eth_halt(); + eth_unregister(eth_get_dev()); #endif #if defined(CONFIG_CMD_USB) -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/3] USB: atmel: add atmel usba udc driver support
Add atmel usb udc driver support porting from Linux kernel. Using RNDIS gadget driver to test it. Test OK on at91sam9m10g45ek, at91sam9m10g45ek, and sama5d31ek boards. It need the patch from: Troy Kisky troy.ki...@boundarydevices.com (usb: gadget: config: fix unaligned access issues) more information: http://patchwork.ozlabs.org/patch/264151/ Changes in v2: - Add detail information of the orignal code - Add a common header to hold atmel usba udc information for different SoCs Bo Shen (3): USB: gadget: add atmel usba udc driver ARM: atmel: correct UDPHS name ARM: atmel: add RNDIS gadget support arch/arm/cpu/armv7/at91/sama5d3_devices.c | 12 + arch/arm/include/asm/arch-at91/at91_common.h|1 + arch/arm/include/asm/arch-at91/atmel_usba_udc.h | 64 ++ arch/arm/include/asm/arch-at91/sama5d3.h|2 +- board/atmel/sama5d3xek/sama5d3xek.c | 13 + drivers/usb/gadget/Makefile |1 + drivers/usb/gadget/atmel_usba_udc.c | 1305 +++ drivers/usb/gadget/atmel_usba_udc.h | 326 ++ include/configs/sama5d3xek.h|8 + include/linux/usb/atmel_usba_udc.h | 26 + 10 files changed, 1757 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-at91/atmel_usba_udc.h create mode 100644 drivers/usb/gadget/atmel_usba_udc.c create mode 100644 drivers/usb/gadget/atmel_usba_udc.h create mode 100644 include/linux/usb/atmel_usba_udc.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/3] ARM: atmel: correct UDPHS name
Correct the UDPHS name from UDHPS Signed-off-by: Bo Shen voice.s...@atmel.com --- Changes in v2: - None --- arch/arm/include/asm/arch-at91/sama5d3.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-at91/sama5d3.h b/arch/arm/include/asm/arch-at91/sama5d3.h index fefee5e..123a627 100644 --- a/arch/arm/include/asm/arch-at91/sama5d3.h +++ b/arch/arm/include/asm/arch-at91/sama5d3.h @@ -120,7 +120,7 @@ #define ATMEL_BASE_USART3 0xf8024000 #define ATMEL_BASE_UART1 0xf8028000 #define ATMEL_BASE_EMAC0xf802c000 -#define ATMEL_BASE_UDHPS 0xf803 +#define ATMEL_BASE_UDPHS 0xf803 #define ATMEL_BASE_SHA 0xf8034000 #define ATMEL_BASE_AES 0xf8038000 #define ATMEL_BASE_TDES0xf803c000 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] USB: gadget: add atmel usba udc driver
Add atmel usba udc driver support, porting from Linux kernel
The original code in Linux Kernel information is as following
commit e01ee9f509a927158f670408b41127d4166db1c7
Author: Jingoo Han jg1@samsung.com
Date: Tue Jul 30 17:00:51 2013 +0900
usb: gadget: use dev_get_platdata()
Use the wrapper function for retrieving the platform data instead of
accessing dev-platform_data directly.
Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v2:
- Add detail information of the orignal code
---
drivers/usb/gadget/Makefile |1 +
drivers/usb/gadget/atmel_usba_udc.c | 1305 +++
drivers/usb/gadget/atmel_usba_udc.h | 326 +
include/linux/usb/atmel_usba_udc.h | 26 +
4 files changed, 1658 insertions(+)
create mode 100644 drivers/usb/gadget/atmel_usba_udc.c
create mode 100644 drivers/usb/gadget/atmel_usba_udc.h
create mode 100644 include/linux/usb/atmel_usba_udc.h
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 4c2a39a..4d51f59 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -18,6 +18,7 @@ endif
# new USB gadget layer dependencies
ifdef CONFIG_USB_GADGET
+COBJS-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
COBJS-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
COBJS-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
COBJS-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o
diff --git a/drivers/usb/gadget/atmel_usba_udc.c
b/drivers/usb/gadget/atmel_usba_udc.c
new file mode 100644
index 000..f146c48
--- /dev/null
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -0,0 +1,1305 @@
+/*
+ * Driver for the Atmel USBA high speed USB device controller
+ * [Original from Linux kernel: drivers/usb/gadget/atmel_usba_udc.c]
+ *
+ * Copyright (C) 2005-2013 Atmel Corporation
+ *Bo Shen voice.s...@atmel.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/errno.h
+#include asm/gpio.h
+#include asm/hardware.h
+#include linux/list.h
+#include linux/usb/ch9.h
+#include linux/usb/gadget.h
+#include linux/usb/atmel_usba_udc.h
+#include malloc.h
+#include usb/lin_gadget_compat.h
+
+#include atmel_usba_udc.h
+
+static int vbus_is_present(struct usba_udc *udc)
+{
+ /* No Vbus detection: Assume always present */
+ return 1;
+}
+
+static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
+{
+ unsigned int transaction_len;
+
+ transaction_len = req-req.length - req-req.actual;
+ req-last_transaction = 1;
+ if (transaction_len ep-ep.maxpacket) {
+ transaction_len = ep-ep.maxpacket;
+ req-last_transaction = 0;
+ } else if (transaction_len == ep-ep.maxpacket req-req.zero) {
+ req-last_transaction = 0;
+ }
+
+ DBG(DBG_QUEUE, %s: submit_transaction, req %p (length %d)%s\n,
+ ep-ep.name, req, transaction_len,
+ req-last_transaction ? , done : );
+
+ memcpy(ep-fifo, req-req.buf + req-req.actual, transaction_len);
+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
+ req-req.actual += transaction_len;
+}
+
+static void submit_request(struct usba_ep *ep, struct usba_request *req)
+{
+ DBG(DBG_QUEUE, %s: submit_request: req %p (length %d), dma: %d\n,
+ ep-ep.name, req, req-req.length, req-using_dma);
+
+ req-req.actual = 0;
+ req-submitted = 1;
+
+ next_fifo_transaction(ep, req);
+ if (req-last_transaction) {
+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
+ } else {
+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
+ }
+}
+
+static void submit_next_request(struct usba_ep *ep)
+{
+ struct usba_request *req;
+
+ if (list_empty(ep-queue)) {
+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
+ return;
+ }
+
+ req = list_entry(ep-queue.next, struct usba_request, queue);
+ if (!req-submitted)
+ submit_request(ep, req);
+}
+
+static void send_status(struct usba_udc *udc, struct usba_ep *ep)
+{
+ ep-state = STATUS_STAGE_IN;
+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
+}
+
+static void receive_data(struct usba_ep *ep)
+{
+ struct usba_udc *udc = ep-udc;
+ struct usba_request *req;
+ unsigned long status;
+ unsigned int bytecount, nr_busy;
+ int is_complete = 0;
+
+ status = usba_ep_readl(ep, STA);
+ nr_busy = USBA_BFEXT(BUSY_BANKS, status);
+
+ DBG(DBG_QUEUE, receive data: nr_busy=%u\n, nr_busy);
+
+ while (nr_busy 0) {
+ if (list_empty(ep-queue)) {
+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
+ break;
+ }
+ req =
[U-Boot] [PATCH v2 3/3] ARM: atmel: add RNDIS gadget support
Add RNDIS gadget support to test atmel usba udc driver
Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v2:
- Add a common header to hold atmel usba udc information for different
SoCs
---
arch/arm/cpu/armv7/at91/sama5d3_devices.c | 12 +
arch/arm/include/asm/arch-at91/at91_common.h|1 +
arch/arm/include/asm/arch-at91/atmel_usba_udc.h | 64 +++
board/atmel/sama5d3xek/sama5d3xek.c | 13 +
include/configs/sama5d3xek.h|8 +++
5 files changed, 98 insertions(+)
create mode 100644 arch/arm/include/asm/arch-at91/atmel_usba_udc.h
diff --git a/arch/arm/cpu/armv7/at91/sama5d3_devices.c
b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
index e55e1c6..51f0a6d 100644
--- a/arch/arm/cpu/armv7/at91/sama5d3_devices.c
+++ b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
@@ -202,3 +202,15 @@ void at91_lcd_hw_init(void)
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
#endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+void at91_udp_hw_init(void)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+ /* Enable UPLL clock */
+ writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, pmc-uckr);
+ /* Enable UDPHS clock */
+ at91_periph_clk_enable(ATMEL_ID_UDPHS);
+}
+#endif
diff --git a/arch/arm/include/asm/arch-at91/at91_common.h
b/arch/arm/include/asm/arch-at91/at91_common.h
index 9f54fdd..abcb97d 100644
--- a/arch/arm/include/asm/arch-at91/at91_common.h
+++ b/arch/arm/include/asm/arch-at91/at91_common.h
@@ -19,6 +19,7 @@ void at91_serial2_hw_init(void);
void at91_seriald_hw_init(void);
void at91_spi0_hw_init(unsigned long cs_mask);
void at91_spi1_hw_init(unsigned long cs_mask);
+void at91_udp_hw_init(void);
void at91_uhp_hw_init(void);
void at91_lcd_hw_init(void);
diff --git a/arch/arm/include/asm/arch-at91/atmel_usba_udc.h
b/arch/arm/include/asm/arch-at91/atmel_usba_udc.h
new file mode 100644
index 000..6f540d2
--- /dev/null
+++ b/arch/arm/include/asm/arch-at91/atmel_usba_udc.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2005-2013 Atmel Corporation
+ *Bo Shen voice.s...@atmel.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __ATMEL_USBA_UDC_H__
+#define __ATMEL_USBA_UDC_H__
+
+#include linux/usb/atmel_usba_udc.h
+
+#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
+ [idx] = { \
+ .name = nam, \
+ .index = idx, \
+ .fifo_size = maxpkt, \
+ .nr_banks = maxbk,\
+ .can_dma= dma, \
+ .can_isoc = isoc, \
+ }
+
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
+ defined(CONFIG_AT91SAM9X5)
+static struct usba_ep_data usba_udc_ep[] = {
+ EP(ep0, 0, 64, 1, 0, 0),
+ EP(ep1, 1, 1024, 2, 1, 1),
+ EP(ep2, 2, 1024, 2, 1, 1),
+ EP(ep3, 3, 1024, 3, 1, 0),
+ EP(ep4, 4, 1024, 3, 1, 0),
+ EP(ep5, 5, 1024, 3, 1, 1),
+ EP(ep6, 6, 1024, 3, 1, 1),
+};
+#elif defined(CONFIG_SAMA5D3)
+static struct usba_ep_data usba_udc_ep[] = {
+ EP(ep0, 0, 64, 1, 0, 0),
+ EP(ep1, 1, 1024, 3, 1, 0),
+ EP(ep2, 2, 1024, 3, 1, 0),
+ EP(ep3, 3, 1024, 2, 1, 0),
+ EP(ep4, 4, 1024, 2, 1, 0),
+ EP(ep5, 5, 1024, 2, 1, 0),
+ EP(ep6, 6, 1024, 2, 1, 0),
+ EP(ep7, 7, 1024, 2, 1, 0),
+ EP(ep8, 8, 1024, 2, 0, 0),
+ EP(ep9, 9, 1024, 2, 0, 0),
+ EP(ep10, 10, 1024, 2, 0, 0),
+ EP(ep11, 11, 1024, 2, 0, 0),
+ EP(ep12, 12, 1024, 2, 0, 0),
+ EP(ep13, 13, 1024, 2, 0, 0),
+ EP(ep14, 14, 1024, 2, 0, 0),
+ EP(ep15, 15, 1024, 2, 0, 0),
+};
+#else
+# error NO usba_udc_ep defined
+#endif
+
+#undef EP
+
+struct usba_platform_data pdata = {
+ .num_ep = ARRAY_SIZE(usba_udc_ep),
+ .ep = usba_udc_ep,
+};
+
+#endif
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c
b/board/atmel/sama5d3xek/sama5d3xek.c
index 97caf64..b0965ef 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -21,6 +21,10 @@
#include net.h
#include netdev.h
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+#include asm/arch/atmel_usba_udc.h
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
/* - */
@@ -170,6 +174,9 @@ int board_init(void)
#ifdef CONFIG_CMD_USB
sama5d3xek_usb_hw_init();
#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+ at91_udp_hw_init();
+#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
sama5d3xek_mci_hw_init();
#endif
@@ -221,6 +228,12 @@ int board_eth_init(bd_t *bis)
if (has_gmac())
rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+ usba_udc_probe(pdata);
+#ifdef CONFIG_USB_ETH_RNDIS
+
Re: [U-Boot] P2041RDB fails to boot with master (and 2013.10-rc1)
On 10/09/13 18:15, Heiko Schocher wrote: Hello Chris, sun,york, Am 10.09.2013 07:52, schrieb sun york-R58495: Chris, Thanks for the debugging work. As I suspected, it's related to I2C change. It's probably a problem in the board header file. If you fix it, please submit a patch. Otherwise, I will look into it tomorrow. Did you try current mainline? There is a fix for the P1022DS, see: http://git.denx.de/?p=u-boot.git;a=commit;h=81b867aa4451e745b9706b00e53793df6b52f42a bye, Heiko Yes I did try the current mainline which includes the commit you've pointed out. I'm not using SPL support (I think). I see a patch from Xie that I'll give a try tomorrow. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/9] ARM: mx25: convert to common timer code
On Monday, September 9, 2013 11:00:51 PM, Rob Herring wrote: On Sun, Sep 8, 2013 at 6:56 PM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Dear Rob Herring, On Sunday, September 8, 2013 10:12:50 PM, Rob Herring wrote: From: Rob Herring rob.herr...@calxeda.com Convert mx25 to use the commmon timer code. Signed-off-by: Rob Herring rob.herr...@calxeda.com --- [...] diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index ccd3b6c..568ed6c 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -15,6 +15,9 @@ #define CONFIG_SYS_TEXT_BASE 0x8120 #define CONFIG_MXC_GPIO +#define CONFIG_SYS_TIMER_RATE32768 ^ MXC_CLK32 could be used here. The problem the circular dependency that creates. MXC_CLK32 depends on CONFIG_MX25_CLK32. Ordering could fix this, but but what? Yes: #define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */ #include asm/arch/clock.h #define CONFIG_SYS_TIMER_RATE MXC_CLK32 +#define CONFIG_SYS_TIMER_COUNTER (IMX_GPT1_BASE + 0x24) This Linux-style (base + offset) register access is against U-Boot rules. You could write: (((struct gpt_regs *)IMX_GPT1_BASE)-counter) This may also have ordering issues. Including imx-regs.h just for the base address doesn't work on mx27 for example. There has to be a way to make the inclusion of imx-regs.h work on mx27 like on mx25. Also, imx27lite-common.h uses UART1_BASE from imx-regs.h, and it is very dirty to use literal constants for CONFIG_SYS_TIMER_COUNTER instead of definitions from imx-regs.h. The fix here should really be to make the inclusion of imx-regs.h work on mx27. Also, it seems like if u-boot is moving towards using kconfig, then creating more include dependencies in the config headers is the wrong direction. Right. However, the only thing that asm/arch/clock.h does here is to define a SoC-specific value with a default value. Converted to kconfig, that would just give: Kconfig file for i.MX25 SoC: --- config MXC_CLK32 int 32-kHz oscillator frequency default 32768 help Exact frequency of the 32-kHz oscillator, expressed in Hz --- Kconfig file for your generic timer base driver: --- config SYS_TIMER_RATE int System timer rate (Hz) default MXC_CLK32 if MXC --- Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] arm:goni:mmc: Add sd card detection and initialization.
Looks good to me.
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
On 09/10/2013 06:34 PM, Przemyslaw Marczak wrote:
This change allow to use sd card on Goni the same like mmc 0.
SD card is mmc dev 1, so it can be used like this: fatls mmc 1:2.
SD card is inited even if eMMC initialization fails.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- add ret_sd for sd card initialization errors
- return bit OR of ret and ret_sd values
Changes for v3:
- change puts() to error() when prints error message
- chance BIT OR on ret and sd_ret to BIT AND
Now return value is 0 if any card will init succeed and -1 if both fails.
---
board/samsung/goni/goni.c | 33 +++--
1 file changed, 31 insertions(+), 2 deletions(-)
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 5b3d6ef..366f648 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -72,7 +72,7 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int i;
+ int i, ret, ret_sd = 0;
/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
s5p_gpio_direction_output(s5pc110_gpio-j2, 7, 1);
@@ -95,7 +95,36 @@ int board_mmc_init(bd_t *bis)
s5p_gpio_set_drv(s5pc110_gpio-g0, i, GPIO_DRV_4X);
}
- return s5p_mmc_init(0, 4);
+ ret = s5p_mmc_init(0, 4);
+ if (ret)
+ error(MMC: Failed to init MMC:0.\n);
+
+ /*
+ * SD card (T_FLASH) detect and init
+ * T_FLASH_DETECT: EINT28: GPH3[4] input mode
+ */
+ s5p_gpio_cfg_pin(s5pc110_gpio-h3, 4, GPIO_INPUT);
+ s5p_gpio_set_pull(s5pc110_gpio-h3, 4, GPIO_PULL_UP);
+
+ if (!s5p_gpio_get_value(s5pc110_gpio-h3, 4)) {
+ for (i = 0; i 7; i++) {
+ if (i == 2)
+ continue;
+
+ /* GPG2[0:6] special function 2 */
+ s5p_gpio_cfg_pin(s5pc110_gpio-g2, i, 0x2);
+ /* GPG2[0:6] pull disable */
+ s5p_gpio_set_pull(s5pc110_gpio-g2, i, GPIO_PULL_NONE);
+ /* GPG2[0:6] drv 4x */
+ s5p_gpio_set_drv(s5pc110_gpio-g2, i, GPIO_DRV_4X);
+ }
+
+ ret_sd = s5p_mmc_init(2, 4);
+ if (ret_sd)
+ error(MMC: Failed to init SD card (MMC:2).\n);
+ }
+
+ return ret ret_sd;
}
#endif
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Re: [U-Boot] [PATCH 1/1] m28evk board config
Hi Lothar,
On 06/09/2013 20:10, lot...@denx.de wrote:
From 24b6381162b4569ab86b481b8714d81877231f22 Mon Sep 17 00:00:00 2001
From: Lothar Rubusch lot...@denx.de
Date: Fri, 6 Sep 2013 15:01:39 +0200
Subject: [PATCH] m28evk board specific configurations for setup with ext
boot
partition and separate ext rootfs
Generally I think it is better you have a smaller commit subject and you
increase the commit log with all changes.
However:
Signed-off-by: Lothar Rubusch lot...@denx.de
---
include/configs/m28evk.h | 78
++--
1 file changed, 75 insertions(+), 3 deletions(-)
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index eba8759..b65456e 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -150,15 +150,25 @@
#endif
/* Booting Linux */
-#define CONFIG_BOOTDELAY3
+#define CONFIG_BOOTDELAY5
#define CONFIG_BOOTFILEuImage
#define CONFIG_BOOTARGSconsole=ttyAMA0,115200n8
-#define CONFIG_BOOTCOMMANDrun bootcmd_net
+#define CONFIG_BOOTCOMMANDrun mmc_mmc
#define CONFIG_LOADADDR0x4200
#define CONFIG_SYS_LOAD_ADDRCONFIG_LOADADDR
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS\
+fdtfile=imx28-m28evk.dtb\0\
+consdev=ttyAMA0\0 \
+baudrate=115200\0 \
+bootdev=/dev/mmcblk0p2\0 \
+rootdev=/dev/mmcblk0p3\0 \
+netdev=eth0\0 \
+hostname=m28evk\0 \
+rootpath=/opt/eldk-5.3/armv5te/rootfs-qte-sdk\0 \
I know very well why, but this is against the logic that the delivered
environment is quite generic for all situation. Setting rootpath is for
me not different as setting ip address, that is it is a local
configuration and should be not linked with the code.
+kernel_addr_r=0x4200\0\
+fdt_addr_r=0x4100\0 \
update_nand_full_filename=u-boot.nand\0\
update_nand_firmware_filename=u-boot.sb\0\
update_sd_firmware_filename=u-boot.sd\0\
@@ -196,7 +206,69 @@
setexpr fw_sz ${fw_sz} + 1 ; \
mmc write ${loadaddr} 0x800 ${fw_sz} ; \
fi ; \
-fi\0
+fi\0 \
+addcons=setenv bootargs ${bootargs}
console=${consdev},${baudrate}\0 \
+addip=\
+setenv bootargs ${bootargs} \
+ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}: \
+${hostname}:${netdev}:off\0 \
+addmisc=setenv bootargs ${bootargs} ${miscargs}\0 \
+adddfltmtd= \
+if test \x${mtdparts}\ == \x\ ; \
+then mtdparts default ; \
+fi\0 \
+addmtd= \
+run adddfltmtd ; \
+setenv bootargs ${bootargs} ${mtdparts}\0 \
+addargs=run addcons addmtd addmisc\0 \
+kernel_mmcload= \
+mmc rescan ; \
+ext2load mmc 0:2 ${kernel_addr_r} ${bootfile}\0\
+kernel_nandload=nand read ${kernel_addr_r} kernel\0 \
+kernel_netload=tftp ${kernel_addr_r} ${bootfile}\0\
+fdt_mmcload= \
+mmc rescan ; \
+ext2load mmc 0:2 ${fdt_addr_r} ${fdtfile}\0\
+fdt_nandload=nand read ${fdt_addr_r} fdt\0\
+fdt_netload=tftp ${fdt_addr_r} ${fdtfile}\0 \
+miscargs=nohlt panic=1\0 \
+mmcargs=setenv bootargs root=${rootdev} rw rootwait\0 \
+nandargs= \
+setenv bootargs ubi.mtd=6 root=ubi0:rootfs\
+rootfstype=ubifs\0\
+nfsargs= \
+setenv bootargs root=/dev/nfs rw \
+nfsroot=${serverip}:${rootpath},v3,tcp\0 \
+mmcload=run kernel_mmcload fdt_mmcload\0 \
+nandload=run kernel_nandload fdt_nandload\0 \
+
[U-Boot] [PATCH] board/bsc9131rdb: Update IFC timings for NAND flash
Current IFC timings for NAND flash are too strict.
Relaxing it to support existing K9F1G08U0B and new K9F1G08U0D flash
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
include/configs/BSC9131RDB.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 948394e..1d06c50 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -181,18 +181,18 @@ extern unsigned long get_sdram_size(void);
| CSOR_NAND_PB(64)) /*Pages Per Block = 64*/
/* NAND Flash Timing Params */
-#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x08) \
- | FTIM0_NAND_TWP(0x06) \
- | FTIM0_NAND_TWCHT(0x03) \
+#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x03) \
+ | FTIM0_NAND_TWP(0x05) \
+ | FTIM0_NAND_TWCHT(0x02) \
| FTIM0_NAND_TWH(0x04))
-#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x18) \
- | FTIM1_NAND_TWBE(0x23) \
- | FTIM1_NAND_TRR(0x08) \
+#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x1C) \
+ | FTIM1_NAND_TWBE(0x1E) \
+ | FTIM1_NAND_TRR(0x07) \
| FTIM1_NAND_TRP(0x05))
#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x08) \
| FTIM2_NAND_TREH(0x04) \
- | FTIM2_NAND_TWHRE(0x3f))
-#define CONFIG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x22)
+ | FTIM2_NAND_TWHRE(0x11))
+#define CONFIG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x04)
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
--
1.7.9.5
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Re: [U-Boot] u-boot build error in current git tree
Hi Axel, On Tue, 10 Sep 2013 11:30:35 +0800, Axel Lin axel@ingics.com wrote: Hit below build errors (on ARM platforms): axel@phoenix:~/repos/git/u-boot$ make mx31pdk Which commit, which toolchain? With gcc version 4.7.3 (Ubuntu/Linaro 4.7.3-1ubuntu1), current u-boot-arm/master and u-boot/master both build mx31pdk fine. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] video, cfb_console: make background and foreground color configurable
make CONSOLE_BG_COL/CONSOLE_FG_COL configurable through board config file.
Clear video screen in video_init().
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Anatolij Gustschin ag...@denx.de
---
README | 5 +
drivers/video/cfb_console.c | 38 --
include/video_fb.h | 5 +
3 Dateien geändert, 30 Zeilen hinzugefügt(+), 18 Zeilen entfernt(-)
diff --git a/README b/README
index a30ea31..f3aaffc 100644
--- a/README
+++ b/README
@@ -691,6 +691,11 @@ The following options need to be configured:
the silent environment variable. See
doc/README.silent for more information.
+ CONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default
+ is 0x00.
+ CONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default
+ is 0xa0.
+
- Console Baudrate:
CONFIG_BAUDRATE - in bps
Select one of the baudrates listed in
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 822ed28..289c487 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -2091,6 +2091,24 @@ defined(CONFIG_SANDBOX) || defined(CONFIG_X86)
return 0;
}
+void video_clear(void)
+{
+ if (!video_fb_address)
+ return;
+#ifdef VIDEO_HW_RECTFILL
+ video_hw_rectfill(VIDEO_PIXEL_SIZE, /* bytes per pixel */
+ 0,/* dest pos x */
+ 0,/* dest pos y */
+ VIDEO_VISIBLE_COLS, /* frame width */
+ VIDEO_VISIBLE_ROWS, /* frame height */
+ bgx /* fill color */
+ );
+#else
+ memsetl(video_fb_address,
+ (VIDEO_VISIBLE_ROWS * VIDEO_LINE_LEN) / sizeof(int), bgx);
+#endif
+}
+
static int video_init(void)
{
unsigned char color8;
@@ -2177,6 +2195,8 @@ static int video_init(void)
}
eorx = fgx ^ bgx;
+ video_clear();
+
#ifdef CONFIG_VIDEO_LOGO
/* Plot the logo and get start point of console */
debug(Video: Drawing the logo ...\n);
@@ -2280,21 +2300,3 @@ int video_get_screen_columns(void)
{
return CONSOLE_COLS;
}
-
-void video_clear(void)
-{
- if (!video_fb_address)
- return;
-#ifdef VIDEO_HW_RECTFILL
- video_hw_rectfill(VIDEO_PIXEL_SIZE, /* bytes per pixel */
- 0,/* dest pos x */
- 0,/* dest pos y */
- VIDEO_VISIBLE_COLS, /* frame width */
- VIDEO_VISIBLE_ROWS, /* frame height */
- bgx /* fill color */
- );
-#else
- memsetl(video_fb_address,
- (VIDEO_VISIBLE_ROWS * VIDEO_LINE_LEN) / sizeof(int), bgx);
-#endif
-}
diff --git a/include/video_fb.h b/include/video_fb.h
index 028e2a6..6cd4e37 100644
--- a/include/video_fb.h
+++ b/include/video_fb.h
@@ -18,8 +18,13 @@
#ifndef _VIDEO_FB_H_
#define _VIDEO_FB_H_
+#if defined(CONFIG_SYS_CONSOLE_FG_COL) defined(CONFIG_SYS_CONSOLE_BG_COL)
+#define CONSOLE_BG_COLCONFIG_SYS_CONSOLE_BG_COL
+#define CONSOLE_FG_COLCONFIG_SYS_CONSOLE_FG_COL
+#else
#define CONSOLE_BG_COL0x00
#define CONSOLE_FG_COL0xa0
+#endif
/*
* Graphic Data Format (GDF) bits for VIDEO_DATA_FORMAT
--
1.7.11.7
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Re: [U-Boot] actux2 build error due to commit 4412db46
Hi Axel, On Tue, 10 Sep 2013 13:54:03 +0800, Axel Lin axel@ingics.com wrote: Hi Jack, I hit below build error, revert commit 4412db464 standalone-examples: support custom GCC lib fixes the build error. This one I confirm, git bisect between current u-boot-arm/master commit 68e1747f and u-boot/master commit 985a71d1 hits same bad commit 4412db464. Cc:ing Tom as he committed the change. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH][v2] board/bsc9131rdb: Update IFC timings for NAND flash
Current IFC timings for NAND flash are not able to support existing
K9F1G08U0B and new K9F1G08U0D flash.
so Update the timings to support both.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Changes for v2: updated subject
include/configs/BSC9131RDB.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 948394e..1d06c50 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -181,18 +181,18 @@ extern unsigned long get_sdram_size(void);
| CSOR_NAND_PB(64)) /*Pages Per Block = 64*/
/* NAND Flash Timing Params */
-#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x08) \
- | FTIM0_NAND_TWP(0x06) \
- | FTIM0_NAND_TWCHT(0x03) \
+#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x03) \
+ | FTIM0_NAND_TWP(0x05) \
+ | FTIM0_NAND_TWCHT(0x02) \
| FTIM0_NAND_TWH(0x04))
-#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x18) \
- | FTIM1_NAND_TWBE(0x23) \
- | FTIM1_NAND_TRR(0x08) \
+#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x1C) \
+ | FTIM1_NAND_TWBE(0x1E) \
+ | FTIM1_NAND_TRR(0x07) \
| FTIM1_NAND_TRP(0x05))
#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x08) \
| FTIM2_NAND_TREH(0x04) \
- | FTIM2_NAND_TWHRE(0x3f))
-#define CONFIG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x22)
+ | FTIM2_NAND_TWHRE(0x11))
+#define CONFIG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x04)
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
--
1.7.9.5
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[U-Boot] [PATCH] powerpc/usb: Mention usb1 before usb2 inside default hwconfig string
For USB device-tree fix-up to work properly, its necessary to mention USB1 options before that of USB2 inside default hwconfig string Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com --- include/configs/corenet_ds.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c3fb80c..1ccefb0 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -700,8 +700,8 @@ #defineCONFIG_EXTRA_ENV_SETTINGS \ hwconfig=fsl_ddr:ctlr_intlv=cacheline,\ bank_intlv=cs0_cs1; \ - usb2:dr_mode=peripheral,phy_type= __stringify(__USB_PHY_TYPE) ;\ - usb1:dr_mode=host,phy_type= __stringify(__USB_PHY_TYPE) \0\ + usb1:dr_mode=host,phy_type= __stringify(__USB_PHY_TYPE) ;\ + usb2:dr_mode=peripheral,phy_type= __stringify(__USB_PHY_TYPE) \0\ netdev=eth0\0 \ uboot= __stringify(CONFIG_UBOOTPATH) \0 \ ubootaddr= __stringify(CONFIG_SYS_TEXT_BASE) \0 \ -- 1.7.11.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 0/4] enable support for x16 NAND devices
This series includes independent patch-sets aiming to enable x16 NAND support on AM33xx boards (like beaglebone-LT). [PATCH 1/4]: This patch is ported from linux driver/mtd/nand to allow detection device-width of NAND by reading ONFI parameter page. [PATCH 2/4]: enable NAND_BUSWIDTH_AUTO feature in omap_nand.c [PATCH 3/4]: cleaning of GPMC configs for NAND and NOR [PATCH 4/4]: enable x16 and x8 NAND device pin-muxing for beagle-bone LT (white) However, this patch does not enable NAND boot via x16 device, as SPL boot does not have capability of reading on-chip ONFI parameters so x16 device would not get detected in SPL NAND boot. Thus x16 device would be detected only once second-stage of u-boot is loaded via some other boot-source like SD/MMC. --- Matthieu CASTET (1): [PATCH 1/4] mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width Pekon Gupta (3): [PATCH 2/4] mtd: nand: omap: enable autodetection of bus-width of NAND device [PATCH 3/4] am335x: fix GPMC config for NAND and NOR SPL boot [PATCH 4/4] am33xx: add support for beaglebone x16 NAND cape arch/arm/cpu/armv7/am33xx/mem.c| 48 +++ arch/arm/include/asm/arch-am33xx/mem.h | 5 --- board/ti/am335x/board.c| 12 -- board/ti/am335x/mux.c | 71 -- drivers/mtd/nand/nand_base.c | 20 +++--- drivers/mtd/nand/omap_gpmc.c | 5 +-- include/configs/am335x_evm.h | 3 +- include/linux/mtd/nand.h | 7 8 files changed, 99 insertions(+), 72 deletions(-) -- 1.8.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 1/4] mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
From: Matthieu CASTET matthieu.cas...@parrot.com
This patch is slightly modified from following linux patch
http://lists.infradead.org/pipermail/linux-mtd/2012-November/044803.html
So retaining the authorship to Matthieu CASTET matthieu.cas...@parrot.com
*Modifications from original patch*
reset chip-read_byte, chip-read_buf, chip-write_buf before setting defaults.
*Original patch message*
The driver call nand_scan_ident in 8 bit mode, then
readid or onfi detection are done (and detect bus width).
The driver should update its bus width before calling nand_scan_tail.
This work because readid and onfi are read work 8 byte mode.
Note that nand_scan_ident send command (NAND_CMD_RESET, NAND_CMD_READID,
NAND_CMD_PARAM), address and read data
The ONFI specificication is not very clear for x16 device if high byte of
address should be driven to 0,
but according to [1] it should be ok to not drive it during autodetection.
[1]
3.3.2. Target Initialization
[...]
The Read ID and Read Parameter Page commands only use the lower 8-bits of the
data bus.
The host shall not issue commands that use a word data width on x16 devices
until the host
determines the device supports a 16-bit data bus width in the parameter page.
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/nand_base.c | 20 +++-
include/linux/mtd/nand.h | 7 +++
2 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 9e05cef..52e799b 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2977,11 +2977,21 @@ ident_done:
break;
}
- /*
-* Check, if buswidth is correct. Hardware drivers should set
-* chip correct!
-*/
- if (busw != (chip-options NAND_BUSWIDTH_16)) {
+ if (chip-options NAND_BUSWIDTH_AUTO) {
+ WARN_ON(chip-options NAND_BUSWIDTH_16);
+ chip-options |= busw;
+ if (chip-read_byte == nand_read_byte)
+ chip-read_byte = NULL;
+ if (chip-read_buf == nand_read_buf)
+ chip-read_buf = NULL;
+ if (chip-write_buf == nand_write_buf)
+ chip-write_buf = NULL;
+ nand_set_defaults(chip, busw);
+ } else if (busw != (chip-options NAND_BUSWIDTH_16)) {
+ /*
+* Check, if buswidth is correct. Hardware drivers should set
+* chip correct!
+*/
pr_info(NAND device: Manufacturer ID:
0x%02x, Chip ID: 0x%02x (%s %s)\n, *maf_id,
*dev_id, nand_manuf_ids[maf_idx].name, mtd-name);
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 2055584..bd6bc25 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -211,6 +211,13 @@ typedef enum {
#define NAND_OWN_BUFFERS 0x0002
/* Chip may not exist, so silence any errors in scan */
#define NAND_SCAN_SILENT_NODEV 0x0004
+/*
+ * Autodetect nand buswidth with readid/onfi.
+ * This suppose the driver will configure the hardware in 8 bits mode
+ * when calling nand_scan_ident, and update its configuration
+ * before calling nand_scan_tail.
+ */
+#define NAND_BUSWIDTH_AUTO 0x0008
/* Options set by nand scan */
/* bbt has already been read */
--
1.8.1
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[U-Boot] [PATCH v1 4/4] am33xx: add support for beaglebone x16 NAND cape
beaglebone board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch updates pin-mux for
'NAND' cape which can be used with beaglebone LT (white).
Further information and datasheets of this NAND cape can be found at:
- http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion
- http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module
Signed-off-by: Pekon Gupta pe...@ti.com
---
board/ti/am335x/mux.c | 71 ---
1 file changed, 51 insertions(+), 20 deletions(-)
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index b2bfda5..341513a 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -171,25 +171,53 @@ static struct module_pin_mux mii1_pin_mux[] = {
{-1},
};
-static struct module_pin_mux nand_pin_mux[] = {
- {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
- {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
- {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
- {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
- {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
- {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
- {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */
- {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */
- {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
- {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */
- {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
- {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
- {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
- {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
- {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
+#ifdef CONFIG_NAND
+static struct module_pin_mux nand_x16_pin_mux[] = {
+ {OFFSET(gpmc_ad0), (MODE(0) | RXACTIVE)}, /* NAND AD0 */
+ {OFFSET(gpmc_ad1), (MODE(0) | RXACTIVE)}, /* NAND AD1 */
+ {OFFSET(gpmc_ad2), (MODE(0) | RXACTIVE)}, /* NAND AD2 */
+ {OFFSET(gpmc_ad3), (MODE(0) | RXACTIVE)}, /* NAND AD3 */
+ {OFFSET(gpmc_ad4), (MODE(0) | RXACTIVE)}, /* NAND AD4 */
+ {OFFSET(gpmc_ad5), (MODE(0) | RXACTIVE)}, /* NAND AD5 */
+ {OFFSET(gpmc_ad6), (MODE(0) | RXACTIVE)}, /* NAND AD6 */
+ {OFFSET(gpmc_ad7), (MODE(0) | RXACTIVE)}, /* NAND AD7 */
+ {OFFSET(gpmc_ad8), (MODE(0) | RXACTIVE)}, /* NAND AD8 */
+ {OFFSET(gpmc_ad9), (MODE(0) | RXACTIVE)}, /* NAND AD9 */
+ {OFFSET(gpmc_ad10), (MODE(0) | RXACTIVE)}, /* NAND AD10 */
+ {OFFSET(gpmc_ad11), (MODE(0) | RXACTIVE)}, /* NAND AD11 */
+ {OFFSET(gpmc_ad12), (MODE(0) | RXACTIVE)}, /* NAND AD12 */
+ {OFFSET(gpmc_ad13), (MODE(0) | RXACTIVE)}, /* NAND AD13 */
+ {OFFSET(gpmc_ad14), (MODE(0) | RXACTIVE)}, /* NAND AD14 */
+ {OFFSET(gpmc_ad15), (MODE(0) | RXACTIVE)}, /* NAND AD15 */
+ {OFFSET(gpmc_wait0),(MODE(0) | RXACTIVE)}, /* NAND WAIT */
+ {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)}, /* NAND_WPN */
+ {OFFSET(gpmc_csn0), (MODE(0) | PULLUP_EN)}, /* NAND_CS0 */
+ {OFFSET(gpmc_wen), (MODE(0) | PULLUP_EN)}, /* NAND_WEN */
+ {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUP_EN)}, /* NAND_OE */
+ {OFFSET(gpmc_advn_ale), (MODE(0) | PULLDOWN_EN)}, /* NAND_ADV_ALE */
+ {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLDOWN_EN)}, /* NAND_BE_CLE */
{-1},
};
+static struct module_pin_mux nand_x8_pin_mux[] = {
+ {OFFSET(gpmc_ad0), (MODE(0) | RXACTIVE)}, /* NAND AD0 */
+ {OFFSET(gpmc_ad1), (MODE(0) | RXACTIVE)}, /* NAND AD1 */
+ {OFFSET(gpmc_ad2), (MODE(0) | RXACTIVE)}, /* NAND AD2 */
+ {OFFSET(gpmc_ad3), (MODE(0) | RXACTIVE)}, /* NAND AD3 */
+ {OFFSET(gpmc_ad4), (MODE(0) | RXACTIVE)}, /* NAND AD4 */
+ {OFFSET(gpmc_ad5), (MODE(0) | RXACTIVE)}, /* NAND AD5 */
+ {OFFSET(gpmc_ad6), (MODE(0) | RXACTIVE)}, /* NAND AD6 */
+ {OFFSET(gpmc_ad7), (MODE(0) | RXACTIVE)}, /* NAND AD7 */
+ {OFFSET(gpmc_wait0),(MODE(0) | RXACTIVE)}, /* NAND WAIT */
+ {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)}, /* NAND_WPN */
+ {OFFSET(gpmc_csn0), (MODE(0) | PULLUP_EN)}, /* NAND_CS0 */
+ {OFFSET(gpmc_wen), (MODE(0) | PULLUP_EN)}, /* NAND_WEN */
+ {OFFSET(gpmc_oen_ren),
[U-Boot] [PATCH v1 2/4] mtd: nand: omap: enable autodetection of bus-width of NAND device
This patch: - Enables autodetection of NAND bus-width by reading ONFI parameter page, during device-scan (nand_scan_ident), removed dependency on static configuration in GPMC_CONFIG1_X register. - adds reconfiguration of device-width in GPMC_CONFIG1_x Signed-off-by: Pekon Gupta pe...@ti.com --- drivers/mtd/nand/omap_gpmc.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index b044f00..944f0ea 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -834,10 +834,7 @@ int board_nand_init(struct nand_chip *nand) nand-IO_ADDR_W = (void __iomem *)gpmc_cfg-cs[cs].nand_cmd; nand-priv = bch_priv; nand-cmd_ctrl = omap_nand_hwcontrol; - nand-options = NAND_NO_PADDING | NAND_CACHEPRG; - /* If we are 16 bit dev, our gpmc config tells us that */ - if ((readl(gpmc_cfg-cs[cs].config1) 0x3000) == 0x1000) - nand-options |= NAND_BUSWIDTH_16; + nand-options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_BUSWIDTH_AUTO; nand-chip_delay = 100; nand-ecc.layout = omap_ecclayout; -- 1.8.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 3/4] am335x: fix GPMC config for NAND and NOR SPL boot
GPMC controller is common IP to interface with both NAND and NOR flash devices.
Also, it supports max 8 chip-selects, which can be independently connected to
any of the devices.
But ROM code expects the boot-device to be connected to only chip-select[0].
Thus to resolve conflict between NOR and NAND boot. This patch:
- combines NOR and NAND configs spread in board files to common gpmc_init()
- configures GPMC based on boot-mode selected for SPL boot.
Signed-off-by: Pekon Gupta pe...@ti.com
---
arch/arm/cpu/armv7/am33xx/mem.c| 48 +-
arch/arm/include/asm/arch-am33xx/mem.h | 5
board/ti/am335x/board.c| 12 -
include/configs/am335x_evm.h | 3 +--
4 files changed, 25 insertions(+), 43 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index b6eb466..22ab25b 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -22,17 +22,6 @@
struct gpmc *gpmc_cfg;
-#if defined(CONFIG_CMD_NAND)
-static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
- M_NAND_GPMC_CONFIG1,
- M_NAND_GPMC_CONFIG2,
- M_NAND_GPMC_CONFIG3,
- M_NAND_GPMC_CONFIG4,
- M_NAND_GPMC_CONFIG5,
- M_NAND_GPMC_CONFIG6, 0
-};
-#endif
-
void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32
base,
u32 size)
@@ -61,11 +50,28 @@ void gpmc_init(void)
{
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;
-
-#ifdef CONFIG_CMD_NAND
- const u32 *gpmc_config = NULL;
- u32 base = 0;
- u32 size = 0;
+#if defined(CONFIG_NOR)
+ const u32 gpmc_regs[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1,
+ STNOR_GPMC_CONFIG2,
+ STNOR_GPMC_CONFIG3,
+ STNOR_GPMC_CONFIG4,
+ STNOR_GPMC_CONFIG5,
+ STNOR_GPMC_CONFIG6,
+ STNOR_GPMC_CONFIG7
+ };
+ u32 size = GPMC_SIZE_16M;
+ u32 base = CONFIG_SYS_FLASH_BASE;
+#elif defined(CONFIG_NAND)
+static const u32 gpmc_regs[GPMC_MAX_REG] = { M_NAND_GPMC_CONFIG1,
+ M_NAND_GPMC_CONFIG2,
+ M_NAND_GPMC_CONFIG3,
+ M_NAND_GPMC_CONFIG4,
+ M_NAND_GPMC_CONFIG5,
+ M_NAND_GPMC_CONFIG6,
+ 0
+ };
+ u32 size = GPMC_SIZE_256M;
+ u32 base = CONFIG_SYS_NAND_BASE;
#endif
/* global settings */
writel(0x0008, gpmc_cfg-sysconfig);
@@ -81,12 +87,6 @@ void gpmc_init(void)
*/
writel(0, gpmc_cfg-cs[0].config7);
sdelay(1000);
-
-#ifdef CONFIG_CMD_NAND
- gpmc_config = gpmc_m_nand;
-
- base = PISMO1_NAND_BASE;
- size = PISMO1_NAND_SIZE;
- enable_gpmc_cs_config(gpmc_config, gpmc_cfg-cs[0], base, size);
-#endif
+ /* enable chip-select specific configurations */
+ enable_gpmc_cs_config(gpmc_regs, gpmc_cfg-cs[0], base, size);
}
diff --git a/arch/arm/include/asm/arch-am33xx/mem.h
b/arch/arm/include/asm/arch-am33xx/mem.h
index 983ea28..e7e8c58 100644
--- a/arch/arm/include/asm/arch-am33xx/mem.h
+++ b/arch/arm/include/asm/arch-am33xx/mem.h
@@ -68,9 +68,4 @@
#define PISMO2_NAND_CS07
#define PISMO2_NAND_CS18
-/* make it readable for the gpmc_init */
-#define PISMO1_NOR_BASEFLASH_BASE
-#define PISMO1_NAND_BASE CONFIG_SYS_NAND_BASE
-#define PISMO1_NAND_SIZE GPMC_SIZE_256M
-
#endif /* endif _MEM_H_ */
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 04c37e2..328e6bd 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -337,22 +337,10 @@ void sdram_init(void)
*/
int board_init(void)
{
-#ifdef CONFIG_NOR
- const u32 gpmc_nor[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1,
- STNOR_GPMC_CONFIG2, STNOR_GPMC_CONFIG3, STNOR_GPMC_CONFIG4,
- STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 };
-#endif
-
gd-bd-bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
-#ifdef CONFIG_NOR
- /* Reconfigure CS0 for NOR instead of NAND. */
- enable_gpmc_cs_config(gpmc_nor, gpmc_cfg-cs[0],
- CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M);
-#endif
-
return 0;
}
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index c2d25a4..7c59db9 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -15,7 +15,6 @@
#ifndef
Re: [U-Boot] actux2 build error due to commit 4412db46
On Tue, 10 Sep 2013 13:42:44 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Axel, On Tue, 10 Sep 2013 13:54:03 +0800, Axel Lin axel@ingics.com wrote: Hi Jack, I hit below build error, revert commit 4412db464 standalone-examples: support custom GCC lib fixes the build error. This one I confirm, git bisect between current u-boot-arm/master commit 68e1747f and u-boot/master commit 985a71d1 hits same bad commit 4412db464. Cc:ing Tom as he committed the change. Amicalement, Actually, the same issue affects the following boards: actux3 actux1_4_16 actux1_4_32 actux1_8_32 dvlhost actux4 actux1_8_16 actux2 pdnb3 scpu Cc:ing Michael Schwingen mich...@schwingen.org for actux* and dvlhost; cc:ing Stefan Roese s...@denx.de for pdnb3 and scpu. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/4] dfu: Various fixes and code optimizations
Various DFU code fixes and optimizations were enclosed by this patch series. Most notable change is to move dfu_alt_info handling code to dfu core. Lukasz Majewski (4): dfu:cosmetic: Fix printf text for buffer overflow condition dfu: Make maximum DFU file size equal to default DFU data buffer dfu: Find DFU alt setting number by passing its name dfu: Extract common DFU code to handle dfu_alt_info environment variable common/cmd_dfu.c | 16 ++-- drivers/dfu/dfu.c | 39 +-- include/dfu.h |4 +++- 3 files changed, 42 insertions(+), 17 deletions(-) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/4] dfu: Make maximum DFU file size equal to default DFU data buffer
Up till now the DFU maximum file size (to be written to e.g. eMMC)
was different from the DFU data buffer size. It caused errors when
one buffer was smaller than data to be written.
Now, the maximum DFU file size is equal to default DFU buffer size.
In spite of this, user is still able to manually adjust those default
values.
Change-Id: Ied75d0f7b59588ebd79dae9a22af801d36622216
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
include/dfu.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/dfu.h b/include/dfu.h
index 47b9055..7779710 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -62,7 +62,7 @@ static inline unsigned int get_mmc_blk_size(int dev)
#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024*1024*8) /* 8 MiB */
#endif
#ifndef CONFIG_SYS_DFU_MAX_FILE_SIZE
-#define CONFIG_SYS_DFU_MAX_FILE_SIZE (4 20) /* 4 MiB */
+#define CONFIG_SYS_DFU_MAX_FILE_SIZE CONFIG_SYS_DFU_DATA_BUF_SIZE
#endif
struct dfu_entity {
--
1.7.10.4
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[U-Boot] [PATCH 3/4] dfu: Find DFU alt setting number by passing its name
New function - dfu_get_alt() has been added to dfu core. If proper
alt setting is present, this function returns its number
corresponding to passed name.
Change-Id: Icd75f3aa3a6f6e306c77b28cabe620e4e6a253ea
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/dfu/dfu.c | 12
include/dfu.h |1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 2f1e2af..180d083 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -414,3 +414,15 @@ struct dfu_entity *dfu_get_entity(int alt)
return NULL;
}
+
+int dfu_get_alt(const char *name)
+{
+ struct dfu_entity *dfu;
+
+ list_for_each_entry(dfu, dfu_list, list) {
+ if (!strncmp(dfu-name, name, strlen(dfu-name)))
+ return dfu-alt;
+ }
+
+ return -ENODEV;
+}
diff --git a/include/dfu.h b/include/dfu.h
index 7779710..8838f9c 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -112,6 +112,7 @@ const char *dfu_get_layout(enum dfu_layout l);
struct dfu_entity *dfu_get_entity(int alt);
char *dfu_extract_token(char** e, int *n);
void dfu_trigger_reset(void);
+int dfu_get_alt(const char *name);
bool dfu_reset(void);
int dfu_read(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
--
1.7.10.4
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[U-Boot] [PATCH 1/4] dfu:cosmetic: Fix printf text for buffer overflow condition
Correct error message if overflow is detected.
Change-Id: I8a915c7353d49822c046fbc36241237b370e6c98
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/dfu/dfu.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index d73d510..2f1e2af 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -153,8 +153,8 @@ int dfu_write(struct dfu_entity *dfu, void *buf, int size,
int blk_seq_num)
/* we should be in buffer now (if not then size too large) */
if ((dfu-i_buf + size) dfu-i_buf_end) {
- printf(%s: Wrong size! [%d] [%d] - %d\n,
- __func__, dfu-i_blk_seq_num, blk_seq_num, size);
+ error(Buffer overflow! (0x%p + 0x%x 0x%p)\n, dfu-i_buf,
+ size, dfu-i_buf_end);
return -1;
}
--
1.7.10.4
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[U-Boot] [PATCH 4/4] dfu: Extract common DFU code to handle dfu_alt_info environment variable
New dfu_init_env_entities() function has been extracted from cmd_dfu.c and
stored at dfu core.
This is a dfu centric code, so it shall be processed in the core.
Change-Id: I756c5de922fa31399d8804eaadc004ee98844ec2
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
common/cmd_dfu.c | 16 ++--
drivers/dfu/dfu.c | 23 +++
include/dfu.h |1 +
3 files changed, 26 insertions(+), 14 deletions(-)
diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c
index 793c422..d3658cf 100644
--- a/common/cmd_dfu.c
+++ b/common/cmd_dfu.c
@@ -17,26 +17,15 @@
static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- const char *str_env;
char *s = dfu;
int ret, i = 0;
- char *env_bkp;
if (argc 3)
return CMD_RET_USAGE;
- str_env = getenv(dfu_alt_info);
- if (str_env == NULL) {
- printf(%s: \dfu_alt_info\ env variable not defined!\n,
- __func__);
- return CMD_RET_FAILURE;
- }
-
- env_bkp = strdup(str_env);
- ret = dfu_config_entities(env_bkp, argv[1],
- (int)simple_strtoul(argv[2], NULL, 10));
+ ret = dfu_init_env_entities(argv[1], simple_strtoul(argv[2], NULL, 10));
if (ret)
- return CMD_RET_FAILURE;
+ return ret;
if (argc 3 strcmp(argv[3], list) == 0) {
dfu_show_entities();
@@ -67,7 +56,6 @@ exit:
g_dnl_unregister();
done:
dfu_free_entities();
- free(env_bkp);
if (dfu_reset())
run_command(reset, 0);
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 180d083..8eca5db 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -41,6 +41,29 @@ static int dfu_find_alt_num(const char *s)
return ++i;
}
+int dfu_init_env_entities(char *interface, int dev)
+{
+ const char *str_env;
+ char *env_bkp;
+ int ret;
+
+ str_env = getenv(dfu_alt_info);
+ if (!str_env) {
+ error(\dfu_alt_info\ env variable not defined!\n);
+ return -EINVAL;
+ }
+
+ env_bkp = strdup(str_env);
+ ret = dfu_config_entities(env_bkp, interface, dev);
+ if (ret) {
+ error(DFU entities configuration failed!\n);
+ return ret;
+ }
+
+ free(env_bkp);
+ return 0;
+}
+
static unsigned char *dfu_buf;
static unsigned long dfu_buf_size = CONFIG_SYS_DFU_DATA_BUF_SIZE;
diff --git a/include/dfu.h b/include/dfu.h
index 8838f9c..58db1ef 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -114,6 +114,7 @@ char *dfu_extract_token(char** e, int *n);
void dfu_trigger_reset(void);
int dfu_get_alt(const char *name);
bool dfu_reset(void);
+int dfu_init_env_entities(char *interface, int dev);
int dfu_read(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
int dfu_write(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
--
1.7.10.4
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Re: [U-Boot] actux2 build error due to commit 4412db46
On Tue, Sep 10, 2013 at 01:42:44PM +0200, Albert ARIBAUD wrote: Hi Axel, On Tue, 10 Sep 2013 13:54:03 +0800, Axel Lin axel@ingics.com wrote: Hi Jack, I hit below build error, revert commit 4412db464 standalone-examples: support custom GCC lib fixes the build error. This one I confirm, git bisect between current u-boot-arm/master commit 68e1747f and u-boot/master commit 985a71d1 hits same bad commit 4412db464. Cc:ing Tom as he committed the change. OK, my fault for including that patch, skimmed my test reports too quickly. I shall revert and reply to the patch. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] standalone-examples: support custom GCC lib
On Tue, Jul 16, 2013 at 02:44:23PM +0100, Jack Mitchell wrote: From: Jack Mitchell jack.mitch...@dbbroadcast.co.uk Add support for defining the gcc lib in standalone examples as is done in the main u-boot Makefile Signed-off-by: Jack Mitchell jack.mitch...@dbbroadcast.co.uk --- examples/standalone/Makefile | 15 +-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index baaa2fb..b1be527 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -68,7 +68,18 @@ ELF:= $(addprefix $(obj),$(ELF)) BIN := $(addprefix $(obj),$(BIN)) SREC := $(addprefix $(obj),$(SREC)) -gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`) +# Add GCC lib +ifdef USE_PRIVATE_LIBGCC +ifeq ($(USE_PRIVATE_LIBGCC), yes) +PLATFORM_LIBGCC = $(OBJTREE)/arch/$(ARCH)/lib/libgcc.o +else +PLATFORM_LIBGCC = -L $(USE_PRIVATE_LIBGCC) -lgcc +endif +else +PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc +endif +PLATFORM_LIBS += $(PLATFORM_LIBGCC) +export PLATFORM_LIBS We already inherit this logic from the top level Makefile, so this leads to duplicating $(OBJTREE)/arch/$(ARCH)/lib/libgcc.o in PLATFORM_LIBS. Second, currently for ARM, libgcc.o ends up requring 'hang' to be provided. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/3] dfu: ram support
Hi Lukasz Majewski, On Tue, Sep 10, 2013 at 11:21:44AM +0200, Lukasz Majewski wrote: Directly putting image onto RAM would speed up upgrade process. This and convenience was the initial thoughts that led to doing this, speed improvement over MMC was only 1 second though - 6 sec on RAM as opposed to 7 sec on MMC in beagle bone, Which version of dfu-util do you use? I had slow transmission problem with ancient dfu-util version 0.1. 0.7, there may be chances that USB (HS/FS) is causing the speed difference. Here image size ~4M + printf(%s: unsupported layout :%s\n, __func__, + dfu_get_layout(dfu-layout)); Please use error() from ./include/common.h Frankly, I've overlooked this when I originally developed the code. Only please change the printf() - error(). Ok, I will change those. Regards Afzal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/3] ARM: atmel: correct UDPHS name
Dear Bo Shen, Correct the UDPHS name from UDHPS Signed-off-by: Bo Shen voice.s...@atmel.com Acked-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] dfu: Find DFU alt setting number by passing its name
Dear Lukasz Majewski,
New function - dfu_get_alt() has been added to dfu core. If proper
alt setting is present, this function returns its number
corresponding to passed name.
Change-Id: Icd75f3aa3a6f6e306c77b28cabe620e4e6a253ea
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/dfu/dfu.c | 12
include/dfu.h |1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 2f1e2af..180d083 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -414,3 +414,15 @@ struct dfu_entity *dfu_get_entity(int alt)
return NULL;
}
+
+int dfu_get_alt(const char *name)
+{
+ struct dfu_entity *dfu;
+
+ list_for_each_entry(dfu, dfu_list, list) {
+ if (!strncmp(dfu-name, name, strlen(dfu-name)))
+ return dfu-alt;
+ }
+
+ return -ENODEV;
+}
diff --git a/include/dfu.h b/include/dfu.h
index 7779710..8838f9c 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -112,6 +112,7 @@ const char *dfu_get_layout(enum dfu_layout l);
struct dfu_entity *dfu_get_entity(int alt);
char *dfu_extract_token(char** e, int *n);
void dfu_trigger_reset(void);
+int dfu_get_alt(const char *name);
bool dfu_reset(void);
int dfu_read(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
Is this code used anywhere ?
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 1/3] USB: gadget: add atmel usba udc driver
Dear Bo Shen, Add atmel usba udc driver support, porting from Linux kernel The original code in Linux Kernel information is as following commit e01ee9f509a927158f670408b41127d4166db1c7 Author: Jingoo Han jg1@samsung.com Date: Tue Jul 30 17:00:51 2013 +0900 usb: gadget: use dev_get_platdata() Use the wrapper function for retrieving the platform data instead of accessing dev-platform_data directly. Signed-off-by: Bo Shen voice.s...@atmel.com The glue code seems OK. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] USB: atmel: add atmel usba udc driver support
Dear Bo Shen, Add atmel usb udc driver support porting from Linux kernel. Using RNDIS gadget driver to test it. Test OK on at91sam9m10g45ek, at91sam9m10g45ek, and sama5d31ek boards. It need the patch from: Troy Kisky troy.ki...@boundarydevices.com (usb: gadget: config: fix unaligned access issues) more information: http://patchwork.ozlabs.org/patch/264151/ You might need to fix that patch yourself and resubmit it, I remember some comments about it. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/3] ARM: atmel: add RNDIS gadget support
Dear Bo Shen,
Add RNDIS gadget support to test atmel usba udc driver
Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v2:
- Add a common header to hold atmel usba udc information for different
SoCs
---
arch/arm/cpu/armv7/at91/sama5d3_devices.c | 12 +
arch/arm/include/asm/arch-at91/at91_common.h|1 +
arch/arm/include/asm/arch-at91/atmel_usba_udc.h | 64
+++ board/atmel/sama5d3xek/sama5d3xek.c |
13 +
include/configs/sama5d3xek.h|8 +++
5 files changed, 98 insertions(+)
create mode 100644 arch/arm/include/asm/arch-at91/atmel_usba_udc.h
diff --git a/arch/arm/cpu/armv7/at91/sama5d3_devices.c
b/arch/arm/cpu/armv7/at91/sama5d3_devices.c index e55e1c6..51f0a6d 100644
--- a/arch/arm/cpu/armv7/at91/sama5d3_devices.c
+++ b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
@@ -202,3 +202,15 @@ void at91_lcd_hw_init(void)
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
#endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+void at91_udp_hw_init(void)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+ /* Enable UPLL clock */
+ writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, pmc-uckr);
+ /* Enable UDPHS clock */
+ at91_periph_clk_enable(ATMEL_ID_UDPHS);
+}
+#endif
diff --git a/arch/arm/include/asm/arch-at91/at91_common.h
b/arch/arm/include/asm/arch-at91/at91_common.h index 9f54fdd..abcb97d
100644
--- a/arch/arm/include/asm/arch-at91/at91_common.h
+++ b/arch/arm/include/asm/arch-at91/at91_common.h
@@ -19,6 +19,7 @@ void at91_serial2_hw_init(void);
void at91_seriald_hw_init(void);
void at91_spi0_hw_init(unsigned long cs_mask);
void at91_spi1_hw_init(unsigned long cs_mask);
+void at91_udp_hw_init(void);
void at91_uhp_hw_init(void);
void at91_lcd_hw_init(void);
diff --git a/arch/arm/include/asm/arch-at91/atmel_usba_udc.h
b/arch/arm/include/asm/arch-at91/atmel_usba_udc.h new file mode 100644
index 000..6f540d2
--- /dev/null
+++ b/arch/arm/include/asm/arch-at91/atmel_usba_udc.h
This new file should be added alongside the USB driver, not board stuff.
[...]
Best regards,
Marek Vasut
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[U-Boot] [PATCH V2 2/5] DTS: Addition of I2S0 channel and replacing I2S1
This patch enables default I2S0 channel.And I2S platform
parameter has been moved to a common file viz exynos5.dtsi.
Signed-off-by: Dani Krishna Mohan krishna...@samsung.com
---
arch/arm/dts/exynos5250.dtsi | 19 +++
board/samsung/dts/exynos5250-smdk5250.dts | 13 ++---
board/samsung/dts/exynos5250-snow.dts | 14 +++---
3 files changed, 32 insertions(+), 14 deletions(-)
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 4fff5e3..1c5474f 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -93,9 +93,28 @@
interrupts = 0 63 0;
};
+ sound@383 {
+ compatible = samsung,exynos-sound;
+ reg = 0x383 0x50;
+ samsung,i2s-epll-clock-frequency = 19200;
+ samsung,i2s-sampling-rate = 48000;
+ samsung,i2s-bits-per-sample = 16;
+ samsung,i2s-channels = 2;
+ samsung,i2s-lr-clk-framesize = 256;
+ samsung,i2s-bit-clk-framesize = 32;
+ samsung,i2s-id = 0;
+ };
+
sound@12d6 {
compatible = samsung,exynos-sound;
reg = 0x12d6 0x20;
+ samsung,i2s-epll-clock-frequency = 19200;
+ samsung,i2s-sampling-rate = 48000;
+ samsung,i2s-bits-per-sample = 16;
+ samsung,i2s-channels = 2;
+ samsung,i2s-lr-clk-framesize = 256;
+ samsung,i2s-bit-clk-framesize = 32;
+ samsung,i2s-id = 1;
};
spi@12d2 {
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index 80ffe30..ec4c1c5 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -36,6 +36,7 @@
mmc3 = /mmc@1223;
serial0 = /serial@12C3;
console = /serial@12C3;
+ i2s = /sound@383;
};
sromc@1225 {
@@ -49,16 +50,14 @@
};
};
- sound@12d6 {
- samsung,i2s-epll-clock-frequency = 19200;
- samsung,i2s-sampling-rate = 48000;
- samsung,i2s-bits-per-sample = 16;
- samsung,i2s-channels = 2;
- samsung,i2s-lr-clk-framesize = 256;
- samsung,i2s-bit-clk-framesize = 32;
+ sound@383 {
samsung,codec-type = wm8994;
};
+ sound@12d6 {
+ status = disabled;
+ };
+
i2c@12c7 {
soundcodec@1a {
reg = 0x1a;
diff --git a/board/samsung/dts/exynos5250-snow.dts
b/board/samsung/dts/exynos5250-snow.dts
index dca3386..b97312f 100644
--- a/board/samsung/dts/exynos5250-snow.dts
+++ b/board/samsung/dts/exynos5250-snow.dts
@@ -36,6 +36,7 @@
mmc3 = /mmc@1223;
serial0 = /serial@12C3;
console = /serial@12C3;
+ i2s = /sound@383;
};
i2c4: i2c@12ca {
@@ -65,16 +66,15 @@
};
};
- sound@12d6 {
- samsung,i2s-epll-clock-frequency = 19200;
- samsung,i2s-sampling-rate = 48000;
- samsung,i2s-bits-per-sample = 16;
- samsung,i2s-channels = 2;
- samsung,i2s-lr-clk-framesize = 256;
- samsung,i2s-bit-clk-framesize = 32;
+ sound@383 {
samsung,codec-type = max98095;
+ codec-enable-gpio = gpio 0xb7 0;
};
+sound@12d6 {
+status = disabled;
+};
+
i2c@12cd {
soundcodec@22 {
reg = 0x22;
--
1.7.9.5
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[U-Boot] [PATCH V2 5/5] Sound: MAX98095: Support I2S0 channel
This patch modifies the MAX98095 audio codec to support
I2S0 channel in codec slave mode.
Signed-off-by: Dani Krishna Mohan krishna...@samsung.com
---
drivers/sound/max98095.c | 128 ++
drivers/sound/max98095.h | 10 +++-
drivers/sound/sound.c| 17 +++---
3 files changed, 100 insertions(+), 55 deletions(-)
diff --git a/drivers/sound/max98095.c b/drivers/sound/max98095.c
index d69db58..f7ec4d7 100644
--- a/drivers/sound/max98095.c
+++ b/drivers/sound/max98095.c
@@ -52,7 +52,7 @@ int rate_table[] = {0, 8000, 11025, 16000, 22050, 24000,
32000, 44100, 48000,
static int max98095_i2c_write(unsigned int reg, unsigned char data)
{
debug(%s: Write Addr : 0x%02X, Data : 0x%02X\n,
- __func__, reg, data);
+ __func__, reg, data);
return i2c_write(g_max98095_i2c_dev_addr, reg, 1, data, 1);
}
@@ -71,7 +71,7 @@ static unsigned int max98095_i2c_read(unsigned int reg,
unsigned char *data)
ret = i2c_read(g_max98095_i2c_dev_addr, reg, 1, data, 1);
if (ret != 0) {
debug(%s: Error while reading register %#04x\n,
- __func__, reg);
+ __func__, reg);
return -1;
}
@@ -138,42 +138,56 @@ static int rate_value(int rate, u8 *value)
* @return -1 for error and 0 Success.
*/
static int max98095_hw_params(struct max98095_priv *max98095,
- unsigned int rate, unsigned int bits_per_sample)
+ enum en_max_audio_interface aif_id,
+ unsigned int rate, unsigned int bits_per_sample)
{
u8 regval;
int error;
+ unsigned short M98095_DAI_CLKMODE;
+ unsigned short M98095_DAI_FORMAT;
+ unsigned short M98095_DAI_FILTERS;
+
+ if (aif_id == AIF1) {
+ M98095_DAI_CLKMODE = M98095_027_DAI1_CLKMODE;
+ M98095_DAI_FORMAT = M98095_02A_DAI1_FORMAT;
+ M98095_DAI_FILTERS = M98095_02E_DAI1_FILTERS;
+ } else {
+ M98095_DAI_CLKMODE = M98095_031_DAI2_CLKMODE;
+ M98095_DAI_FORMAT = M98095_034_DAI2_FORMAT;
+ M98095_DAI_FILTERS = M98095_038_DAI2_FILTERS;
+ }
switch (bits_per_sample) {
case 16:
- error = max98095_update_bits(M98095_034_DAI2_FORMAT,
+ error = max98095_update_bits(M98095_DAI_FORMAT,
M98095_DAI_WS, 0);
break;
case 24:
- error = max98095_update_bits(M98095_034_DAI2_FORMAT,
+ error = max98095_update_bits(M98095_DAI_FORMAT,
M98095_DAI_WS, M98095_DAI_WS);
break;
default:
debug(%s: Illegal bits per sample %d.\n,
- __func__, bits_per_sample);
+ __func__, bits_per_sample);
return -1;
}
if (rate_value(rate, regval)) {
debug(%s: Failed to set sample rate to %d.\n,
- __func__, rate);
+ __func__, rate);
return -1;
}
max98095-rate = rate;
- error |= max98095_update_bits(M98095_031_DAI2_CLKMODE,
+ error |= max98095_update_bits(M98095_DAI_CLKMODE,
M98095_CLKMODE_MASK, regval);
/* Update sample rate mode */
if (rate 5)
- error |= max98095_update_bits(M98095_038_DAI2_FILTERS,
+ error |= max98095_update_bits(M98095_DAI_FILTERS,
M98095_DAI_DHF, 0);
else
- error |= max98095_update_bits(M98095_038_DAI2_FILTERS,
+ error |= max98095_update_bits(M98095_DAI_FILTERS,
M98095_DAI_DHF, M98095_DAI_DHF);
if (error 0) {
@@ -235,22 +249,39 @@ static int max98095_set_sysclk(struct max98095_priv
*max98095,
*
* @return -1 for error and 0 Success.
*/
-static int max98095_set_fmt(struct max98095_priv *max98095, int fmt)
+static int max98095_set_fmt(struct max98095_priv *max98095, int fmt,
+ enum en_max_audio_interface aif_id)
{
u8 regval = 0;
int error = 0;
+ unsigned short M98095_DAI_CLKCFG_HI;
+ unsigned short M98095_DAI_CLKCFG_LO;
+ unsigned short M98095_DAI_FORMAT;
+ unsigned short M98095_DAI_CLOCK;
if (fmt == max98095-fmt)
return 0;
max98095-fmt = fmt;
+ if (aif_id == AIF1) {
+ M98095_DAI_CLKCFG_HI = M98095_028_DAI1_CLKCFG_HI;
+ M98095_DAI_CLKCFG_LO = M98095_029_DAI1_CLKCFG_LO;
+ M98095_DAI_FORMAT = M98095_02A_DAI1_FORMAT;
+ M98095_DAI_CLOCK = M98095_02B_DAI1_CLOCK;
+ } else {
+ M98095_DAI_CLKCFG_HI = M98095_032_DAI2_CLKCFG_HI;
+ M98095_DAI_CLKCFG_LO = M98095_033_DAI2_CLKCFG_LO;
+ M98095_DAI_FORMAT = M98095_034_DAI2_FORMAT;
+
[U-Boot] [PATCH V2 3/5] ARM: Added I2S0 clocks for audio
This patch makes the necessary changes for making use of
I2S0 channel instead of I2S1 channel on smdk board. This
changes are done to maintain the uniformity to use I2S0 channel.
Signed-off-by: Dani Krishna Mohan krishna...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 57 ++---
arch/arm/cpu/armv7/exynos/pinmux.c| 15 +++-
arch/arm/include/asm/arch-exynos/clk.h|5 ++-
arch/arm/include/asm/arch-exynos/clock.h |4 ++
arch/arm/include/asm/arch-exynos/cpu.h|4 ++
arch/arm/include/asm/arch-exynos/periph.h |1 +
drivers/sound/samsung-i2s.c | 14 +++
7 files changed, 75 insertions(+), 25 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 0cb1a61..80ed282 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -282,6 +282,9 @@ static unsigned long exynos5_get_periph_rate(int peripheral)
src = readl(clk-src_peric0);
div = readl(clk-div_peric3);
break;
+ case PERIPH_ID_I2S0:
+ src = readl(clk-src_mau);
+ div = readl(clk-div_mau);
case PERIPH_ID_SPI0:
case PERIPH_ID_SPI1:
src = readl(clk-src_peric1);
@@ -1146,17 +1149,29 @@ int exynos5_set_epll_clk(unsigned long rate)
return 0;
}
-void exynos5_set_i2s_clk_source(void)
+void exynos5_set_i2s_clk_source(unsigned int i2s_id)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
-
- clrsetbits_le32(clk-src_peric1, AUDIO1_SEL_MASK,
- (CLK_SRC_SCLK_EPLL));
+ unsigned int *audio_ass = (unsigned int *)samsung_get_base_audio_ass();
+
+ if(i2s_id == 0)
+ {
+ setbits_le32(clk-src_top2, CLK_SRC_MOUT_EPLL);
+ clrsetbits_le32(clk-src_mau, AUDIO0_SEL_MASK,
+ (CLK_SRC_SCLK_EPLL));
+ setbits_le32(audio_ass, AUDIO_CLKMUX_ASS);
+ }
+ else if(i2s_id == 1)
+ {
+ clrsetbits_le32(clk-src_peric1, AUDIO1_SEL_MASK,
+ (CLK_SRC_SCLK_EPLL));
+ }
}
int exynos5_set_i2s_clk_prescaler(unsigned int src_frq,
- unsigned int dst_frq)
+ unsigned int dst_frq,
+ unsigned int i2s_id)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
@@ -1169,13 +1184,26 @@ int exynos5_set_i2s_clk_prescaler(unsigned int src_frq,
}
div = (src_frq / dst_frq);
- if (div AUDIO_1_RATIO_MASK) {
- debug(%s: Frequency ratio is out of range\n, __func__);
- debug(src frq = %d des frq = %d , src_frq, dst_frq);
- return -1;
+ if(i2s_id == 0)
+ {
+ if (div AUDIO_0_RATIO_MASK) {
+ debug(%s: Frequency ratio is out of range\n,
__func__);
+ debug(src frq = %d des frq = %d , src_frq, dst_frq);
+ return -1;
+ }
+ clrsetbits_le32(clk-div_mau, AUDIO_0_RATIO_MASK,
+ (div AUDIO_0_RATIO_MASK));
}
- clrsetbits_le32(clk-div_peric4, AUDIO_1_RATIO_MASK,
+ else if(i2s_id == 1)
+ {
+ if (div AUDIO_1_RATIO_MASK) {
+ debug(%s: Frequency ratio is out of range\n,
__func__);
+ debug(src frq = %d des frq = %d , src_frq, dst_frq);
+ return -1;
+ }
+ clrsetbits_le32(clk-div_peric4, AUDIO_1_RATIO_MASK,
(div AUDIO_1_RATIO_MASK));
+ }
return 0;
}
@@ -1415,19 +1443,20 @@ int set_spi_clk(int periph_id, unsigned int rate)
return 0;
}
-int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq)
+int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq,
+ unsigned int i2s_id)
{
if (cpu_is_exynos5())
- return exynos5_set_i2s_clk_prescaler(src_frq, dst_frq);
+ return exynos5_set_i2s_clk_prescaler(src_frq, dst_frq, i2s_id);
else
return 0;
}
-void set_i2s_clk_source(void)
+void set_i2s_clk_source(unsigned int i2s_id)
{
if (cpu_is_exynos5())
- exynos5_set_i2s_clk_source();
+ exynos5_set_i2s_clk_source(i2s_id);
}
int set_epll_clk(unsigned long rate)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 1b05ebf..6d1029e 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -221,9 +221,19 @@ static void exynos5_i2s_config(int peripheral)
int i;
struct exynos5_gpio_part1 *gpio1 =
(struct
[U-Boot] [PATCH V2 4/5] Sound: I2S: Replacing I2S1 with I2S0 channel.
This patch makes required changes to make use
of I2S0 channel instead of I2S1 channel on exynos5250.
Signed-off-by: Dani Krishna Mohan krishna...@samsung.com
---
arch/arm/include/asm/arch-exynos/i2s-regs.h |6
drivers/sound/samsung-i2s.c | 42 +++
2 files changed, 36 insertions(+), 12 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/i2s-regs.h
b/arch/arm/include/asm/arch-exynos/i2s-regs.h
index 613b9b7..4a4a7a0 100644
--- a/arch/arm/include/asm/arch-exynos/i2s-regs.h
+++ b/arch/arm/include/asm/arch-exynos/i2s-regs.h
@@ -8,10 +8,12 @@
#ifndef __I2S_REGS_H__
#define __I2S_REGS_H__
+#define CON_RESET (1 31)
#define CON_TXFIFO_FULL(1 8)
#define CON_TXCH_PAUSE (1 4)
#define CON_ACTIVE (1 0)
+#define MOD_OP_CLK (3 30)
#define MOD_BLCP_SHIFT 24
#define MOD_BLCP_16BIT (0 MOD_BLCP_SHIFT)
#define MOD_BLCP_8BIT (1 MOD_BLCP_SHIFT)
@@ -24,6 +26,7 @@
#define MOD_BLC_MASK (3 13)
#define MOD_SLAVE (1 11)
+#define MOD_RCLKSRC(0 10)
#define MOD_MASK (3 8)
#define MOD_LR_LLOW(0 7)
#define MOD_LR_RLOW(1 7)
@@ -47,4 +50,7 @@
#define FIC_TXFLUSH(1 15)
#define FIC_RXFLUSH(1 7)
+#define PSREN (1 15)
+#define PSVAL (3 8)
+
#endif /* __I2S_REGS_H__ */
diff --git a/drivers/sound/samsung-i2s.c b/drivers/sound/samsung-i2s.c
index 9caa4d2..66db9a8 100644
--- a/drivers/sound/samsung-i2s.c
+++ b/drivers/sound/samsung-i2s.c
@@ -65,7 +65,6 @@ static void i2s_txctrl(struct i2s_reg *i2s_reg, int on)
if (on) {
con |= CON_ACTIVE;
con = ~CON_TXCH_PAUSE;
-
} else {
con |= CON_TXCH_PAUSE;
con = ~CON_ACTIVE;
@@ -300,28 +299,47 @@ int i2s_tx_init(struct i2stx_info *pi2s_tx)
int ret;
struct i2s_reg *i2s_reg =
(struct i2s_reg *)pi2s_tx-base_address;
+ if (pi2s_tx-id == 0) {
+ /* Initialize GPIO for I2S-0 */
+ exynos_pinmux_config(PERIPH_ID_I2S0, 0);
+
+ /* Set EPLL Clock */
+ ret = set_epll_clk(pi2s_tx-samplingrate * pi2s_tx-rfs * 4);
+ } else if (pi2s_tx-id == 1) {
+ /* Initialize GPIO for I2S-1 */
+ exynos_pinmux_config(PERIPH_ID_I2S1, 0);
+
+ /* Set EPLL Clock */
+ ret = set_epll_clk(pi2s_tx-audio_pll_clk);
+ } else {
+ debug(%s: unsupported i2s-%d bus\n, __func__, pi2s_tx-id);
+ return -1;
+ }
- /* Initialize GPIO for I2s */
- exynos_pinmux_config(PERIPH_ID_I2S1, 0);
-
- /* Set EPLL Clock */
- ret = set_epll_clk(pi2s_tx-audio_pll_clk);
if (ret != 0) {
debug(%s: epll clock set rate falied\n, __func__);
return -1;
}
- /* Select Clk Source for Audio1 */
+ /* Select Clk Source for Audio 0 or 1 */
set_i2s_clk_source(pi2s_tx-id);
- /* Set Prescaler to get MCLK */
- set_i2s_clk_prescaler(pi2s_tx-audio_pll_clk,
- (pi2s_tx-samplingrate * (pi2s_tx-rfs)),
- pi2s_tx-id);
+ if (pi2s_tx-id == 0) {
+ /*Reset the i2s module */
+ writel(CON_RESET, i2s_reg-con);
+ writel(MOD_OP_CLK | MOD_RCLKSRC, i2s_reg-mod);
+ /* set i2s prescaler */
+ writel(PSREN | PSVAL, i2s_reg-psr);
+ } else {
+ /* Set Prescaler to get MCLK */
+ set_i2s_clk_prescaler(pi2s_tx-audio_pll_clk,
+ (pi2s_tx-samplingrate * (pi2s_tx-rfs)),
+ pi2s_tx-id);
+ }
/* Configure I2s format */
ret = i2s_set_fmt(i2s_reg, (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBM_CFM));
+ SND_SOC_DAIFMT_CBM_CFM));
if (ret == 0) {
i2s_set_lr_framesize(i2s_reg, pi2s_tx-rfs);
ret = i2s_set_samplesize(i2s_reg, pi2s_tx-bitspersample);
--
1.7.9.5
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Re: [U-Boot] [PATCH 3/4] dfu: Find DFU alt setting number by passing its name
Hi Marek,
Dear Lukasz Majewski,
New function - dfu_get_alt() has been added to dfu core. If proper
alt setting is present, this function returns its number
corresponding to passed name.
Change-Id: Icd75f3aa3a6f6e306c77b28cabe620e4e6a253ea
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/dfu/dfu.c | 12
include/dfu.h |1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 2f1e2af..180d083 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -414,3 +414,15 @@ struct dfu_entity *dfu_get_entity(int alt)
return NULL;
}
+
+int dfu_get_alt(const char *name)
+{
+ struct dfu_entity *dfu;
+
+ list_for_each_entry(dfu, dfu_list, list) {
+ if (!strncmp(dfu-name, name, strlen(dfu-name)))
+ return dfu-alt;
+ }
+
+ return -ENODEV;
+}
diff --git a/include/dfu.h b/include/dfu.h
index 7779710..8838f9c 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -112,6 +112,7 @@ const char *dfu_get_layout(enum dfu_layout l);
struct dfu_entity *dfu_get_entity(int alt);
char *dfu_extract_token(char** e, int *n);
void dfu_trigger_reset(void);
+int dfu_get_alt(const char *name);
bool dfu_reset(void);
int dfu_read(struct dfu_entity *de, void *buf, int size, int
blk_seq_num);
Is this code used anywhere ?
Hmm By mistake I've added part of my ongoing USB related work to
DFU fixes (as you see it is DFU related).
Since it is (for now) a dead code, please don't consider this patch.
Shall I prepare v2 without this patch or will you be so kind and
review other patches in the current patch set?
Best regards,
Marek Vasut
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH v4] usb: new board-specific USB init interface
This commit unifies board-specific USB initialization implementations
under one symbol (usb_board_init), declaration of which is available in
usb.h.
New API allows selective initialization of USB controllers whenever needed.
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Lukasz Majewski l.majew...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Lukasz Majewski l.majew...@samsung.com
Change-Id: Ia78a1378f30a55dd14598c9a1a1b4b8a762e2cd8
---
Changes since RFC (v1):
- NVIDIA Tegra doesn't postpone its USB init anymore
- board_usb_init()'s sole argument name was shortened
- networking code comment style (/* blurb...) dropped
- squashed RFC changes so that patch won't break bisect
v2 changes:
- commit message fixup
v3 changes:
- added 'index' argument to perform selective port initialization
v4 changes:
- board_usb_init_fail() renamed to board_usb_cleanup()
- board_usb_cleanup() accepts controller index and init type
- DFU and UMS commands don't init all USB controllers anymore
- minor related fixes refactorization
---
arch/arm/include/asm/arch-tegra/usb.h | 3 +-
arch/arm/include/asm/ehci-omap.h | 4 +--
board/amcc/canyonlands/canyonlands.c | 5 +--
board/balloon3/balloon3.c | 7 +++--
board/compulab/cm_t35/cm_t35.c| 2 +-
board/esd/apc405/apc405.c | 8 ++---
board/esd/pmc440/pmc440.c | 8 ++---
board/htkw/mcx/mcx.c | 2 +-
board/icpdas/lp8x4x/lp8x4x.c | 7 +++--
board/nvidia/common/board.c | 4 ++-
board/samsung/trats/trats.c | 5 +--
board/technexion/twister/twister.c| 2 +-
board/teejet/mt_ventoux/mt_ventoux.c | 2 +-
board/ti/beagle/beagle.c | 2 +-
board/ti/omap5_uevm/evm.c | 2 +-
board/ti/panda/panda.c| 2 +-
board/toradex/colibri_pxa270/colibri_pxa270.c | 7 +++--
board/trizepsiv/conxs.c | 7 +++--
board/vpac270/vpac270.c | 7 +++--
common/cmd_dfu.c | 31 +++
common/cmd_usb_mass_storage.c | 44 ++-
common/usb.c | 5 +++
drivers/dfu/dfu.c | 2 +-
drivers/usb/host/ehci-omap.c | 12 ++--
drivers/usb/host/ehci-tegra.c | 2 +-
drivers/usb/host/ohci-hcd.c | 4 +--
drivers/usb/host/ohci.h | 11 +++
include/g_dnl.h | 2 --
include/usb.h | 30 +-
include/usb_mass_storage.h| 13 +++-
30 files changed, 138 insertions(+), 104 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra/usb.h
b/arch/arm/include/asm/arch-tegra/usb.h
index f66257c..a1efd07 100644
--- a/arch/arm/include/asm/arch-tegra/usb.h
+++ b/arch/arm/include/asm/arch-tegra/usb.h
@@ -131,8 +131,7 @@
/* USB3_IF_USB_PHY_VBUS_SENSORS_0 */
#define VBUS_VLD_STS (1 26)
-
/* Setup USB on the board */
-int board_usb_init(const void *blob);
+int usb_process_devicetree(const void *blob);
#endif /* _TEGRA_USB_H_ */
diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
index ac83a53..c7bca05 100644
--- a/arch/arm/include/asm/ehci-omap.h
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -145,8 +145,8 @@ struct omap_ehci {
struct ehci_hccr;
struct ehci_hcor;
-int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor);
+int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor);
int omap_ehci_hcd_stop(void);
#endif /* _OMAP_COMMON_EHCI_H_ */
diff --git a/board/amcc/canyonlands/canyonlands.c
b/board/amcc/canyonlands/canyonlands.c
index cc36f45..395095e 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -16,6 +16,7 @@
#include asm/4xx_pcie.h
#include asm/ppc4xx-gpio.h
#include asm/errno.h
+#include usb.h
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips */
@@ -188,7 +189,7 @@ int board_early_init_f(void)
}
#if defined(CONFIG_USB_OHCI_NEW) defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(int index, enum board_usb_init_type init)
{
struct board_bcsr *bcsr_data =
(struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
@@ -229,7 +230,7 @@ int usb_board_stop(void)
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum board_usb_init_type init)
{
return usb_board_stop();
}
diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c
[U-Boot] [PATCH 2/3] net: tsec: Fix and cleanup tsec_mcast_addr()
There are several implementation issues for tsec_mcast_addr()
addressed by this patch:
* unmanaged, not portable r/w access to registers; fixed with
setbits_be32()/ clrbits_be32()
* use of volatile pointers
* unnecessary forced cast to u8 for the ether_crc() result
* removed redundant parens
* corrected some comment slips
Signed-off-by: Claudiu Manoil claudiu.man...@freescale.com
---
drivers/net/tsec.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3428dd0..9ffc801 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -113,32 +113,31 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
* result.
* 2) Use the 8 most significant bits as a hash into a 256-entry
* table. The table is controlled through 8 32-bit registers:
- * gaddr0-7. gaddr0's MSB is entry 0, and gaddr7's LSB is
- * gaddr7. This means that the 3 most significant bits in the
+ * gaddr0-7. gaddr0's MSB is entry 0, and gaddr7's LSB is entry
+ * 255. This means that the 3 most significant bits in the
* hash index which gaddr register to use, and the 5 other bits
* indicate which bit (assuming an IBM numbering scheme, which
- * for PowerPC (tm) is usually the case) in the tregister holds
+ * for PowerPC (tm) is usually the case) in the register holds
* the entry. */
static int
tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac, u8 set)
{
struct tsec_private *priv = privlist[1];
- volatile tsec_t *regs = priv-regs;
- volatile u32 *reg_array, value;
- u8 result, whichbit, whichreg;
+ struct tsec __iomem *regs = priv-regs;
+ u32 result, value;
+ u8 whichbit, whichreg;
- result = (u8)((ether_crc(MAC_ADDR_LEN, mcast_mac) 24) 0xff);
- whichbit = result 0x1f; /* the 5 LSB = which bit to set */
- whichreg = result 5; /* the 3 MSB = which reg to set it in */
- value = (1 (31-whichbit));
+ result = ether_crc(MAC_ADDR_LEN, mcast_mac);
+ whichbit = (result 24) 0x1f; /* the 5 LSB = which bit to set */
+ whichreg = result 29; /* the 3 MSB = which reg to set it in */
- reg_array = (regs-hash.gaddr0);
+ value = 1 (31-whichbit);
+
+ if (set)
+ setbits_be32(regs-hash.gaddr0 + whichreg, value);
+ else
+ clrbits_be32(regs-hash.gaddr0 + whichreg, value);
- if (set) {
- reg_array[whichreg] |= value;
- } else {
- reg_array[whichreg] = ~value;
- }
return 0;
}
#endif /* Multicast TFTP ? */
--
1.7.11.7
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[U-Boot] [PATCH 1/3] net: Fix mcast function pointer prototype
This fixes the following compiler warnings when activating
CONFIG_MCAST_TFTP:
tsec.c: In function 'tsec_mcast_addr':
tsec.c:130:2: warning: passing argument 2 of 'ether_crc' makes pointer
from integer without a cast [enabled by default]
In file included from /work/u-boot-net/include/common.h:874:0,
from tsec.c:15:
/work/u-boot-net/include/net.h:189:5: note: expected 'const unsigned
char *' but argument is of type 'u8'
tsec.c: In function 'tsec_initialize':
tsec.c:646:13: warning: assignment from incompatible pointer type
[enabled by default]
eth.c: In function 'eth_mcast_join':
eth.c:358:2: warning: passing argument 2 of 'eth_current-mcast' makes
integer from pointer without a cast [enabled by default]
eth.c:358:2: note: expected 'u32' but argument is of type 'u8 *'
In the eth_mcast_join() implementation, eth_current-mcast()
takes a u8 pointer to the multicast mac address and not a ip
address value as implied by its prototype.
Fix parameter type mismatch for tsec_macst_addr() (tsec.c):
ether_crc() takes a u8 pointer not a u8 value.
mcast() is given a u8 pointer to the multicats mac address.
Update parameter type for the rest of mcast() instances.
Signed-off-by: Claudiu Manoil claudiu.man...@freescale.com
---
drivers/net/rtl8139.c | 2 +-
drivers/net/tsec.c| 4 ++--
include/net.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index 4186699..208ce5c 100644
--- a/drivers/net/rtl8139.c
+++ b/drivers/net/rtl8139.c
@@ -188,7 +188,7 @@ static int rtl_transmit(struct eth_device *dev, void
*packet, int length);
static int rtl_poll(struct eth_device *dev);
static void rtl_disable(struct eth_device *dev);
#ifdef CONFIG_MCAST_TFTP/* This driver already accepts all b/mcast */
-static int rtl_bcast_addr (struct eth_device *dev, u8 bcast_mac, u8 set)
+static int rtl_bcast_addr(struct eth_device *dev, const u8 *bcast_mac, u8 set)
{
return (0);
}
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index f5e314b..3428dd0 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -120,14 +120,14 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
* for PowerPC (tm) is usually the case) in the tregister holds
* the entry. */
static int
-tsec_mcast_addr (struct eth_device *dev, u8 mcast_mac, u8 set)
+tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac, u8 set)
{
struct tsec_private *priv = privlist[1];
volatile tsec_t *regs = priv-regs;
volatile u32 *reg_array, value;
u8 result, whichbit, whichreg;
- result = (u8)((ether_crc(MAC_ADDR_LEN,mcast_mac) 24) 0xff);
+ result = (u8)((ether_crc(MAC_ADDR_LEN, mcast_mac) 24) 0xff);
whichbit = result 0x1f; /* the 5 LSB = which bit to set */
whichreg = result 5; /* the 3 MSB = which reg to set it in */
value = (1 (31-whichbit));
diff --git a/include/net.h b/include/net.h
index 5aedc17..0802fad 100644
--- a/include/net.h
+++ b/include/net.h
@@ -89,7 +89,7 @@ struct eth_device {
int (*recv) (struct eth_device *);
void (*halt) (struct eth_device *);
#ifdef CONFIG_MCAST_TFTP
- int (*mcast) (struct eth_device *, u32 ip, u8 set);
+ int (*mcast) (struct eth_device *, const u8 *enetaddr, u8 set);
#endif
int (*write_hwaddr) (struct eth_device *);
struct eth_device *next;
--
1.7.11.7
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[U-Boot] [PATCH V2 0/5] EXYNOS: I2S: Enable I2S0 channel
This patch set adds I2S-0 support and retains I2S-1 support. The default i2s channel can be selected through DT. Changes in V2: - Enabled I2S-0 support through DT - Retained I2S-1 support Changes in V1: - Added I2S-0 support - Removed I2S-1 support Dani Krishna Mohan (5): Sound: WM8994: Support I2S0 channel DTS: Addition of I2S0 channel and replacing I2S1 ARM: Added I2S0 clocks for audio Sound: I2S: Replacing I2S1 with I2S0 channel. Sound: MAX98095: Support I2S0 channel arch/arm/cpu/armv7/exynos/clock.c | 57 ++--- arch/arm/cpu/armv7/exynos/pinmux.c | 15 ++- arch/arm/dts/exynos5250.dtsi| 19 +++ arch/arm/include/asm/arch-exynos/clk.h |5 +- arch/arm/include/asm/arch-exynos/clock.h|4 + arch/arm/include/asm/arch-exynos/cpu.h |4 + arch/arm/include/asm/arch-exynos/i2s-regs.h |6 + arch/arm/include/asm/arch-exynos/periph.h |1 + board/samsung/dts/exynos5250-smdk5250.dts | 13 +-- board/samsung/dts/exynos5250-snow.dts | 14 +-- drivers/sound/max98095.c| 128 drivers/sound/max98095.h| 10 +- drivers/sound/samsung-i2s.c | 52 ++--- drivers/sound/sound.c | 28 +++-- drivers/sound/wm8994.c | 167 +++ drivers/sound/wm8994_registers.h| 39 ++- include/i2s.h |1 + 17 files changed, 403 insertions(+), 160 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 1/5] Sound: WM8994: Support I2S0 channel
This patch modifies the WM8994 codec to support I2S0 channel
in codec slave mode
Signed-off-by: Dani Krishna Mohan krishna...@samsung.com
---
drivers/sound/sound.c| 17 ++--
drivers/sound/wm8994.c | 167 +++---
drivers/sound/wm8994_registers.h | 39 -
include/i2s.h|1 +
4 files changed, 165 insertions(+), 59 deletions(-)
diff --git a/drivers/sound/sound.c b/drivers/sound/sound.c
index 6fcc75d..f3342f2 100644
--- a/drivers/sound/sound.c
+++ b/drivers/sound/sound.c
@@ -36,8 +36,7 @@ static int get_sound_i2s_values(struct i2stx_info *i2s, const
void *blob)
int error = 0;
int base;
- node = fdtdec_next_compatible(blob, 0,
- COMPAT_SAMSUNG_EXYNOS5_SOUND);
+ node = fdt_path_offset(blob, i2s);
if (node = 0) {
debug(EXYNOS_SOUND: No node for sound in device tree\n);
return -1;
@@ -80,6 +79,11 @@ static int get_sound_i2s_values(struct i2stx_info *i2s,
const void *blob)
node, samsung,i2s-bit-clk-framesize, -1);
error |= i2s-bfs;
debug(bfs = %d\n, i2s-bfs);
+
+ i2s-id = fdtdec_get_int(blob, node, samsung,i2s-id, -1);
+ error |= i2s-id;
+ debug(id = %d\n, i2s-id);
+
if (error == -1) {
debug(fail to get sound i2s node properties\n);
return -1;
@@ -92,6 +96,7 @@ static int get_sound_i2s_values(struct i2stx_info *i2s, const
void *blob)
i2s-channels = I2S_CHANNELS;
i2s-rfs = I2S_RFS;
i2s-bfs = I2S_BFS;
+ i2s-id = 0;
#endif
return 0;
}
@@ -130,10 +135,10 @@ static int codec_init(const void *blob, struct i2stx_info
*pi2s_tx)
#endif
if (!strcmp(codectype, wm8994)) {
/* Check the codec type and initialise the same */
- ret = wm8994_init(blob, WM8994_AIF2,
- pi2s_tx-samplingrate,
- (pi2s_tx-samplingrate * (pi2s_tx-rfs)),
- pi2s_tx-bitspersample, pi2s_tx-channels);
+ ret = wm8994_init(blob, pi2s_tx-id + 1,
+ pi2s_tx-samplingrate,
+ (pi2s_tx-samplingrate * (pi2s_tx-rfs)),
+ pi2s_tx-bitspersample, pi2s_tx-channels);
} else if (!strcmp(codectype, max98095)) {
ret = max98095_init(blob, pi2s_tx-samplingrate,
(pi2s_tx-samplingrate * (pi2s_tx-rfs)),
diff --git a/drivers/sound/wm8994.c b/drivers/sound/wm8994.c
index 37e354c..f8e9a6e 100644
--- a/drivers/sound/wm8994.c
+++ b/drivers/sound/wm8994.c
@@ -432,12 +432,12 @@ static int configure_aif_clock(struct wm8994_priv
*wm8994, int aif)
int ret;
/* AIF(1/0) register adress offset calculated */
- if (aif)
+ if (aif-1)
offset = 4;
else
offset = 0;
- switch (wm8994-sysclk[aif]) {
+ switch (wm8994-sysclk[aif-1]) {
case WM8994_SYSCLK_MCLK1:
reg1 |= SEL_MCLK1;
rate = wm8994-mclk[0];
@@ -460,7 +460,7 @@ static int configure_aif_clock(struct wm8994_priv *wm8994,
int aif)
default:
debug(%s: Invalid input clock selection [%d]\n,
- __func__, wm8994-sysclk[aif]);
+ __func__, wm8994-sysclk[aif-1]);
return -1;
}
@@ -470,13 +470,18 @@ static int configure_aif_clock(struct wm8994_priv
*wm8994, int aif)
reg1 |= WM8994_AIF1CLK_DIV;
}
- wm8994-aifclk[aif] = rate;
+ wm8994-aifclk[aif-1] = rate;
ret = wm8994_update_bits(WM8994_AIF1_CLOCKING_1 + offset,
WM8994_AIF1CLK_SRC_MASK | WM8994_AIF1CLK_DIV,
reg1);
- ret |= wm8994_update_bits(WM8994_CLOCKING_1,
+ if (aif == WM8994_AIF1)
+ ret |= wm8994_update_bits(WM8994_CLOCKING_1,
+ WM8994_AIF1DSPCLK_ENA_MASK | WM8994_SYSDSPCLK_ENA_MASK,
+ WM8994_AIF1DSPCLK_ENA | WM8994_SYSDSPCLK_ENA);
+ else if (aif == WM8994_AIF2)
+ ret |= wm8994_update_bits(WM8994_CLOCKING_1,
WM8994_SYSCLK_SRC | WM8994_AIF2DSPCLK_ENA_MASK |
WM8994_SYSDSPCLK_ENA_MASK, WM8994_SYSCLK_SRC |
WM8994_AIF2DSPCLK_ENA | WM8994_SYSDSPCLK_ENA);
@@ -536,7 +541,7 @@ static int wm8994_set_sysclk(struct wm8994_priv *wm8994,
int aif_id,
break;
if (i == ARRAY_SIZE(opclk_divs)) {
debug(%s frequency divisor not found\n,
- __func__);
+ __func__);
return -1;
}
ret =
[U-Boot] [PATCH 3/3] net: tsec: Fix priv pointer in tsec_mcast_addr()
Access to privlist[1] (hardcoded referece to the 2nd tsec's
priv area) is neither correct nor does it make sense in the
current context. Each tsec dev has access to its own priv
instance only, and hence to its own set of group address
registers (GADDR) to filter multicast addresses.
This fix leads to removal of the unused (faulty) privlist[]
and related global static vars. Note that mcast() can be
called only after eth_device allocation and init, and hence
after priv area allocation, so dev-priv is correctly
initialized upon mcast() call.
Signed-off-by: Claudiu Manoil claudiu.man...@freescale.com
---
drivers/net/tsec.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 9ffc801..9371ffa 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -33,11 +33,6 @@ typedef volatile struct rtxbd {
rxbd8_t rxbd[PKTBUFSRX];
} RTXBD;
-#define MAXCONTROLLERS (8)
-
-static struct tsec_private *privlist[MAXCONTROLLERS];
-static int num_tsecs = 0;
-
#ifdef __GNUC__
static RTXBD rtx __attribute__ ((aligned(8)));
#else
@@ -122,7 +117,7 @@ static void tsec_configure_serdes(struct tsec_private *priv)
static int
tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac, u8 set)
{
- struct tsec_private *priv = privlist[1];
+ struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct tsec __iomem *regs = priv-regs;
u32 result, value;
u8 whichbit, whichreg;
@@ -625,7 +620,6 @@ static int tsec_initialize(bd_t *bis, struct
tsec_info_struct *tsec_info)
if (NULL == priv)
return 0;
- privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
--
1.7.11.7
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[U-Boot] [PATCH] arm: Remove IXP425 boards pdnb3 and scpu
Remove Prodrive pdnb3 board (including the scpu variant) support
from mainline. As its unmaintained and not needed any more for
quite some time.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Martijn de Gouw martijn.de.g...@prodrive.nl
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
MAINTAINERS | 3 -
board/prodrive/pdnb3/Makefile | 28
board/prodrive/pdnb3/flash.c | 73 --
board/prodrive/pdnb3/nand.c | 129 -
board/prodrive/pdnb3/pdnb3.c | 220 -
boards.cfg| 2 -
include/configs/pdnb3.h | 322 --
7 files changed, 777 deletions(-)
delete mode 100644 board/prodrive/pdnb3/Makefile
delete mode 100644 board/prodrive/pdnb3/flash.c
delete mode 100644 board/prodrive/pdnb3/nand.c
delete mode 100644 board/prodrive/pdnb3/pdnb3.c
delete mode 100644 include/configs/pdnb3.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0807727..789d4c9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -896,9 +896,6 @@ Stefan Roese s...@denx.de
titaniumi.MX6Q
- pdnb3 xscale/ixp
- scpuxscale/ixp
-
Alessandro Rubini rub...@unipv.it
Nomadik Linux Team stn_wmm_nomadik_li...@list.st.com
diff --git a/board/prodrive/pdnb3/Makefile b/board/prodrive/pdnb3/Makefile
deleted file mode 100644
index 5e4a909..000
--- a/board/prodrive/pdnb3/Makefile
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-include $(TOPDIR)/config.mk
-
-LIB= $(obj)lib$(BOARD).o
-
-COBJS := flash.o pdnb3.o nand.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB):$(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#
diff --git a/board/prodrive/pdnb3/flash.c b/board/prodrive/pdnb3/flash.c
deleted file mode 100644
index 75b5d05..000
--- a/board/prodrive/pdnb3/flash.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, s...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/arch/ixp425.h
-
-#if !defined(CONFIG_FLASH_CFI_DRIVER)
-
-/*
- * include common flash code (for esd boards)
- */
-#include ../common/flash.c
-
-/*
- * Prototypes
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-
-static inline ulong ld(ulong x)
-{
- ulong k = 0;
-
- while (x = 1)
- ++k;
-
- return k;
-}
-
-unsigned long flash_init(void)
-{
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; iCONFIG_SYS_MAX_FLASH_BANKS; i++)
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- size = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN)
- printf (## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld
MB\n,
- size, size20);
-
- /* Reconfigure CS0 to actual FLASH size */
- *IXP425_EXP_CS0 = (*IXP425_EXP_CS0 ~0x3C00) | ((ld(size) - 9)
10);
-
- /* Monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE +
monitor_flash_len - 1,
- flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
-
- /* Environment protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
- flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
-
- /* Redundant environment protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR_REDUND,
- CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
- flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
-
- flash_info[0].size = size;
-
- return size;
-}
-
-#endif /* CONFIG_FLASH_CFI_DRIVER */
diff --git a/board/prodrive/pdnb3/nand.c b/board/prodrive/pdnb3/nand.c
deleted file mode 100644
index e1d2c63..000
--- a/board/prodrive/pdnb3/nand.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, s...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-
-#if defined(CONFIG_CMD_NAND)
-
-#include nand.h
-
-struct pdnb3_ndfc_regs {
- uchar cmd;
- uchar wait;
- uchar addr;
- uchar term;
- uchar data;
-};
-
-static u8 hwctl;
-static struct pdnb3_ndfc_regs *pdnb3_ndfc;
-
-#define
[U-Boot] [PATCH 0/3] net: tsec: Fixes for mcast() in the tsec driver
Though this patchset fixes tsec's driver mcast() instance primarily, the fix from net.h was propagated to other drivers too, as appropriate. Notably, these fixes also end up in removal of some unwanted global static vars from the tsec driver. Thanks. Claudiu Cc: Joe Hershberger joe.hershber...@gmail.com Claudiu Manoil (3): net: Fix mcast function pointer prototype net: tsec: Fix and cleanup tsec_mcast_addr() net: tsec: Fix priv pointer in tsec_mcast_addr() drivers/net/rtl8139.c | 2 +- drivers/net/tsec.c| 47 --- include/net.h | 2 +- 3 files changed, 22 insertions(+), 29 deletions(-) -- 1.7.11.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add support for TechNexion edm1-cf-imx6 SoM
Hi Tapani, On 04/09/2013 13:21, Tapani wrote: Are the strict rules written down somewhere, so people less involved in u-boot development can read them before submitting? As far as I know, there is not such documentation ;-( Sure, we might do it for the mmdc. But long term maintainable, it is not. * It is a lot of effort to do struct accessors for huge tables. Both of IOMUX and MMDC are large (offsets of 0x800+). You forget that for iomuxc the job was already done - there is structure and functions to setup the pinmux. You would not accept code using the current iomux structure... I do not get what you are meaning. Supported boards are using iomux structures and utility functions to set up the pinmux. Having struct accessors would take quite long to enter manually (two tables of 500+ entries each, and different between cpu types). This would be hours, if not a day of braindead work without any tangible benefit. Sorry, I see benefits in terms of readability and maintenability of the source code and it makes easier to add new boards. This is the reason why there are accessors for iomuxc(), as well as for most SOC's internal controller. If making the addition of new boards easier is a goal, there are other parts of the process that are currently a greater hurdle than writing the code. :-) Well, of course it is an iterative process. We are trying to make everything better ;-) To summarize, we are expected to: (i) Create a more general DDR3 API for IMX6, to setup memory chips on any board? Yes - as the setup of the DDR controller is moving from DCD to code, I am expecting to reuse that code. (ii) Use the above API to redo our already working DDR setup for our board. Agree. (iii) Rewrite the iomux struct(s) to more accurately reflect the iomux memory space. Not sure what you are meaning here. If mean what we have discuss before, that is a way to declare a set of pins independently from the processor generating then the required setup / tables, yes. There is more than plain pinmuxing there. (iv) Rewrite any code that gets broken from changing the iomux struct(s) Right. If something is changed that breaks boads, we should adapt the broken boards. (v) Use the new struct(s) in setting up memory for our board Some of the above might need to be done differently for different cpu variants. Let's see - we will have to check the single detail. We are worried that we might not familiar enough with u-boot development to get such changes accepted in reasonable time. I do not know what you mean for a reasonable time. Merge window is closed, that is patchsets adding new features will not be merged in the next release 2013.10. The next release should be 2013.01, and there are chances to get them merged. Best regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot mini-summit at ELCE 2013 in Edinburgh - call for participation!
Hi all, having also resumed from my holidays, I'd like to formalize the plans on our meeting. Thanks for the responses so far. I should be there too. Will be there any specific room available for u-boot mini summit? Yes, I do believe so. We currently have our meeting scheduled for Thursday, October 24th from 1-5pm. We will have a room secured to hold 40 attendees with a screen and projector. Judging from the current feedback, this should be enough ;) If we come up with am agenda, the Linux Foundation will publish it beforehand and so hopefully give us more publicity, so this is what we currently should aim for. From this thread, I have noted up the following speakers (ordered alphabetically) ** Lukasz Majewski - DFU ** Simon Glass - Driver model - Kconfig - Patman tutorial - U-Boot configuration through device tree ** Tom Rini - Redundant booting with U-Boot (or: Welcome to the redundancy theatre playhouse) ** Marek Vasut - Liberating the i.MX28 How long will these talks be? Twnty or thirty minutes? Sounds good. I'm not sure how the organization side of the summit is being setup, but I imagine we'll be able to talk about those things. We should of course plan for an open discussion at the end. Is there any link for about discussed topics with covered speakers, if yes please pass. No, we are just assembling it in this thread ;) Thanks Detlev -- Science is a way of thinking much more than it is a body of knowledge. -- Carl Sagan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/9] ARM: mx25: convert to common timer code
On Tue, Sep 10, 2013 at 5:25 AM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: On Monday, September 9, 2013 11:00:51 PM, Rob Herring wrote: On Sun, Sep 8, 2013 at 6:56 PM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Dear Rob Herring, On Sunday, September 8, 2013 10:12:50 PM, Rob Herring wrote: From: Rob Herring rob.herr...@calxeda.com Convert mx25 to use the commmon timer code. Signed-off-by: Rob Herring rob.herr...@calxeda.com --- [...] diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index ccd3b6c..568ed6c 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -15,6 +15,9 @@ #define CONFIG_SYS_TEXT_BASE 0x8120 #define CONFIG_MXC_GPIO +#define CONFIG_SYS_TIMER_RATE32768 ^ MXC_CLK32 could be used here. The problem the circular dependency that creates. MXC_CLK32 depends on CONFIG_MX25_CLK32. Ordering could fix this, but but what? Oops. But it is fragile is what I meant to say. Yes: #define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */ #include asm/arch/clock.h #define CONFIG_SYS_TIMER_RATE MXC_CLK32 This example highlights the fragility as you have to know all the CONFIG_* defines clock.h and anything clock.h includes. +#define CONFIG_SYS_TIMER_COUNTER (IMX_GPT1_BASE + 0x24) This Linux-style (base + offset) register access is against U-Boot rules. You could write: (((struct gpt_regs *)IMX_GPT1_BASE)-counter) This may also have ordering issues. Including imx-regs.h just for the base address doesn't work on mx27 for example. There has to be a way to make the inclusion of imx-regs.h work on mx27 like on mx25. Also, imx27lite-common.h uses UART1_BASE from imx-regs.h, and it is very dirty to use literal constants for CONFIG_SYS_TIMER_COUNTER instead of definitions from imx-regs.h. The fix here should really be to make the inclusion of imx-regs.h work on mx27. Well, to start with mx27 imx-regs.h has this: #ifdef CONFIG_MXC_UART extern void mx27_uart1_init_pins(void); #endif /* CONFIG_MXC_UART */ #ifdef CONFIG_FEC_MXC extern void mx27_fec_init_pins(void); #endif /* CONFIG_FEC_MXC */ #ifdef CONFIG_MXC_MMC extern void mx27_sd1_init_pins(void); extern void mx27_sd2_init_pins(void); #endif /* CONFIG_MXC_MMC */ I will drop mx27 from the series and leave this to someone else to fix. Also, it seems like if u-boot is moving towards using kconfig, then creating more include dependencies in the config headers is the wrong direction. Right. However, the only thing that asm/arch/clock.h does here is to define a SoC-specific value with a default value. Converted to kconfig, that would just give: Kconfig file for i.MX25 SoC: --- config MXC_CLK32 int 32-kHz oscillator frequency default 32768 help Exact frequency of the 32-kHz oscillator, expressed in Hz --- Kconfig file for your generic timer base driver: --- config SYS_TIMER_RATE int System timer rate (Hz) default MXC_CLK32 if MXC This would not scale well to hundreds of platforms, so it probably needs to be in the platform kconfig. But this is another discussion... Rob ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mxs_nand: Fix ECC strength for NAND flash with OOB size of 224
On 24/08/2013 16:51, Elie De Brauwer wrote: On a board with an i.mx28 and a Micron MT29F4G08ABAEAH4, Linux says: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron MT29F4G08ABAEAH4), 512MiB, page size: 4096, OOB size: 224) the ECC strength is 16. root@(none):/sys/devices/virtual/mtd/mtd0# for i in ecc_strength oobsize subpagesize; do echo $i = `cat $i`; done ecc_strength = 16 oobsize = 224 subpagesize = 4096 The ECC strength was not properly discovered by U-Boot causing the data written by Linux to return an -74 (EBADMSG) when read from U-Boot. This patch fixes mxs_nand_get_ecc_strength() to function in case of a NAND flash with page_data_size = 4096 and page_oob_size= 224. Signed-off-by: Elie De Brauwer eliedebrau...@gmail.com --- Scott, I found this is assigned to me in patchwork. Is it ok if I apply it ? Best regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] tools: mxsboot: Mark the FCB pages as valid
On 27/08/2013 23:32, Marek Vasut wrote: Without this marker, Linux will complain that the NAND pages with FCB are invalid. Signed-off-by: Marek Vasut ma...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/5] ARM: mxs: Sort the mx23evk and mx23_olinuxino
On 03/09/2013 15:35, Otavio Salvador wrote: On Mon, Sep 2, 2013 at 8:00 PM, Tom Rini tr...@ti.com wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/31/2013 05:15 PM, Otavio Salvador wrote: On Sat, Aug 31, 2013 at 5:52 PM, Stefano Babic sba...@denx.de wrote: Am 31/08/2013 22:03, schrieb Marek Vasut: I suppose there will be not much problem with this reorder ... it would be nice if you provided link for a patch or discussion. http://patchwork.ozlabs.org/patch/266253/ Of course, each change in boards.cfg or MAINTAINER will generate a conflict, as Otavio stated. I hope this patch will be merged soon. I propose we postpone this single patch until Albert's flow into mainline - if we need then some clean up, we will do at that time. I am adding Albert and Tom in Cc. Anyone knows what is holding the MAINTAINER file rework from merge? I like it, but given the current high conflict rate it has, I'm waiting for Albert to decide he's ready to re-generate things, probably after he gets back and re-syncs all the ARM trees. In this case, this patch could be applied to imx tree than. Agree. Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: Fix calculation of emi_slow clock rate
On 04/07/2013 13:27, Andrew Gabbasov wrote: This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0, that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET was used instead of ACLK_EMI_SLOW_PODF_OFFSET). Using the occasion, change the variable name 'emi_slow_pof' to more consistent 'emi_slow_podf'. Signed-off-by: Jason Liu r64...@freescale.com Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/5] ARM: mxs: Receive r0 and r1 passed from BootROM
On 31/08/2013 15:53, Marek Vasut wrote: Make sure value in register r0 and r1 is preserved and passed to the board_init_ll() and mxs_common_spl_init() where it can be processed further. The value in r0 can be configured during the BootStream generation to arbitary value, r1 contains pointer to return value from CALL'd function. This patch also clears the value in r0 before returning to BootROM to make sure the BootROM is not confused by this value. Finally, this patch cleans up some comments in the start.S file. Signed-off-by: Marek Vasut ma...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 1/3] mx27: add missing constant for mx27
On 06/09/2013 17:33, Philippe Reynes wrote: Add some missing constant (chip select, ...) Signed-off-by: Philippe Reynes trem...@yahoo.fr Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org Acked-by: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/5] ARM: mxs: Add Creative ZEN XFi3 board
On 31/08/2013 15:53, Marek Vasut wrote: Add STMP3780-based XFi3 board. This board is a small PMP device sporting a CPU which was later rebranded to i.MX233 . Currently supported is USB gadget mode and both external SD and internal Phison SD-NAND bridge . Signed-off-by: Marek Vasut ma...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Otavio Salvador ota...@ossystems.com.br Cc: Stefano Babic sba...@denx.de --- Applied after fixing (line too long) checkpatch warning, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/5] ARM: mxs: Add SanDisk Sansa Fuze+ board
On 31/08/2013 15:53, Marek Vasut wrote: Add STMP3780-based Sansa Fuze+ board. This board is a small PMP device sporting a CPU which was later rebranded to i.MX233 . Currently supported is USB gadget mode and MMC . Signed-off-by: Marek Vasut ma...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Otavio Salvador ota...@ossystems.com.br Cc: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/5] ARM: mxs: Document the power block initialization
On 31/08/2013 15:53, Marek Vasut wrote: This patch adds documentation for the functions used during the initialization of MXS power block. Signed-off-by: Marek Vasut ma...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de --- We have already changed the name of mxs_power_clear_auto_restart() into mxs_power_set_auto_restart() Applied after changing the name of the function to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 2/3] apf27: add support for the armadeus APF27 board
Hi Philippe, On 06/09/2013 17:33, Philippe Reynes wrote: Signed-off-by: Philippe Reynes trem...@yahoo.fr Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com --- By merging your patches I found some compiler warnings: apf27.c: In function 'apf27_devices_init': apf27.c:130:2: warning: implicit declaration of function 'bus_i2c_init' [-Wimplicit-function-declaration] apf27.c:103:25: warning: unused variable 'regs' [-Wunused-variable] apf27.c: In function 'apf27_devices_init': apf27.c:130:2: warning: implicit declaration of function 'bus_i2c_init' [-Wimplicit-function-declaration] apf27.c:103:25: warning: unused variable 'regs' [-Wunused-variable] Can you fix them and resubmit ? Thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6sabresd: Add LVDS splash screen support
On 04/09/2013 20:12, Fabio Estevam wrote: mx6sabresd boards can be connected to a Hannstar XGA LVDS panel. Add support for displaying U-boot splashscreen on it. By default, HDMI splash is selected. In order to use splash via LVDS, do the following in the U-boot prompt: setenv panel Hannstar-XGA save and reboot. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: nitrogen6x/mx6qsabrelite: Fix bug in board_video_skip
On 13/06/2013 20:32, Robert Winkler wrote: Signed-off-by: Robert Winkler robert.wink...@boundarydevices.com --- board/boundary/nitrogen6x/nitrogen6x.c| 4 +++- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 4 +++- Of course, we have not anymore mx6qsabrelite.c Applied (only nitrogen part) to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot build error in current git tree
On Tue, Sep 10, 2013 at 12:30 AM, Axel Lin axel@ingics.com wrote: Hit below build errors (on ARM platforms): axel@phoenix:~/repos/git/u-boot$ make mx31pdk Configuring for mx31pdk board... make Are you able to reproduce the error if you run make mrproper first? I was not to able to reproduce the error here. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 2/2] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Acked-by: Stefano Babic sba...@denx.de
---
board/armadeus/apf27/Makefile |3 +
board/armadeus/apf27/apf27.c |5 +
board/armadeus/apf27/fpga.c | 224 +
board/armadeus/apf27/fpga.h | 25 +
include/configs/apf27.h | 14 +++
5 files changed, 271 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index ec0cb03..5fcda6e 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -13,6 +13,9 @@ LIB = $(obj)lib$(BOARD).o
COBJS := apf27.o
SOBJS := lowlevel_init.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index c0d9c41..30e720d 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -19,6 +19,7 @@
#include asm/errno.h
#include apf27.h
#include crc.h
+#include fpga.h
DECLARE_GLOBAL_DATA_PTR;
@@ -174,6 +175,10 @@ int board_init(void)
apf27_setup_port();
apf27_iomux_init();
apf27_devices_init();
+#if defined(CONFIG_FPGA)
+ APF27_init_fpga();
+#endif
+
return 0;
}
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..0c08c06
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,224 @@
+/*
+ * (C) Copyright 2002-2013
+ * Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com
+ * and
+ * Keith Outwater, keith_outwa...@mvis.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *)fpga_fns,
+0,
+3s200aft256}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_PRG, 1);
+ gpio_set_value(ACFG_FPGA_CLK, 1);
+ gpio_set_value(ACFG_FPGA_RW, 1);
+ gpio_set_value(ACFG_FPGA_CS, 1);
+ gpio_set_value(ACFG_FPGA_SUSPEND, 0);
+ gpio_set_value(ACFG_FPGA_PWR, 0);
+ udelay(3); /*wait until supply started*/
+
+ return cookie;
+}
+
+/*
+ * Set the FPGA's active-low program line to the specified level
+ */
+int fpga_pgm_fn(int assert, int flush, int cookie)
+{
+ debug(%s:%d: FPGA PROGRAM %s, __func__, __LINE__,
+ assert ? high : low);
+ gpio_set_value(ACFG_FPGA_PRG, !assert);
+ return assert;
+}
+
+/*
+ * Set the FPGA's active-high clock line to the specified level
+ */
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+ debug(%s:%d: FPGA CLOCK %s, __func__, __LINE__,
+ assert_clk ? high : low);
+ gpio_set_value(ACFG_FPGA_CLK, !assert_clk);
+ return assert_clk;
+}
+
+/*
+ * Test the state of the active-low FPGA INIT line. Return 1 on INIT
+ * asserted (low).
+ */
+int fpga_init_fn(int cookie)
+{
+ int value;
+ debug(%s:%d: INIT check... , __func__, __LINE__);
+ value = gpio_get_value(ACFG_FPGA_INIT);
+ /* printf(init value read %x,value); */
+#ifdef CONFIG_SYS_FPGA_IS_PROTO
+ return value;
+#else
+
[U-Boot] [PATCH v7 1/2] apf27: add support for the armadeus APF27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
---
MAINTAINERS |5 +
board/armadeus/apf27/Makefile| 30 ++
board/armadeus/apf27/apf27.c | 251 +
board/armadeus/apf27/apf27.h | 489 ++
board/armadeus/apf27/lowlevel_init.S | 168
boards.cfg |1 +
include/configs/apf27.h | 374 ++
7 files changed, 1318 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/Makefile
create mode 100644 board/armadeus/apf27/apf27.c
create mode 100644 board/armadeus/apf27/apf27.h
create mode 100644 board/armadeus/apf27/lowlevel_init.S
create mode 100644 include/configs/apf27.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a900dc..abf8380 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -716,6 +716,11 @@ Ilko Iliev il...@ronetix.at
PM9263 AT91SAM9263
PM9G45 ARM926EJS (AT91SAM9G45 SoC)
+Eric Jarrige eric.jarr...@armadeus.org
+Philippe Reynes trem...@yahoo.fr
+
+ apf27 ARM926EJS (i.MX27 SoC)
+
Michael Jones michael.jo...@matrix-vision.de
omap3_mvblx ARM ARMV7 (OMAP3xx SoC)
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
new file mode 100644
index 000..ec0cb03
--- /dev/null
+++ b/board/armadeus/apf27/Makefile
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+# (C) Copyright 2012-2013
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# SPDX-License-Identifier:GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf27.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
new file mode 100644
index 000..c0d9c41
--- /dev/null
+++ b/board/armadeus/apf27/apf27.c
@@ -0,0 +1,251 @@
+/*
+ * Copyright (C) 2008-2013 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Sascha Hauer, Pengutronix
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include environment.h
+#include jffs2/jffs2.h
+#include nand.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include asm/errno.h
+#include apf27.h
+#include crc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Fuse bank 1 row 8 is reserved for future use and therefore available for
+ * customer use. The APF27 board uses this fuse to store the board revision:
+ * 0: initial board revision
+ * 1: first revision - Presence of the second RAM chip on the board is blown in
+ * fuse bank 1 row 9 bit 0 - No hardware change
+ * N: to be defined
+ */
+static u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+
+ return readl(iim-bank[1].fuse_regs[8]);
+}
+
+/*
+ * Fuse bank 1 row 9 is reserved for future use and therefore available for
+ * customer use. The APF27 board revision 1 uses the bit 0 to permanently store
+ * the presence of the second RAM chip
+ * 0: AFP27 with 1 RAM of 64 MiB
+ * 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)
+ */
+static int get_num_ram_bank(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int nr_dram_banks = 1;
+
+ if ((get_board_rev() 0) (CONFIG_NR_DRAM_BANKS 1))
+ nr_dram_banks += readl(iim-bank[1].fuse_regs[9]) 0x01;
+ else
+ nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
+
+ return nr_dram_banks;
+}
+
+static void apf27_port_init(int port, u32 gpio_dr, u32 ocr1, u32 ocr2,
+ u32 iconfa1, u32 iconfa2, u32 iconfb1, u32 iconfb2,
+ u32 icr1, u32 icr2, u32 imr, u32 gpio_dir, u32 gpr,
+ u32 puen, u32 gius)
+{
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
+
+ writel(gpio_dr, regs-port[port].gpio_dr);
+ writel(ocr1, regs-port[port].ocr1);
+ writel(ocr2, regs-port[port].ocr2);
+ writel(iconfa1, regs-port[port].iconfa1);
+ writel(iconfa2, regs-port[port].iconfa2);
+ writel(iconfb1, regs-port[port].iconfb1);
+ writel(iconfb2, regs-port[port].iconfb2);
+ writel(icr1, regs-port[port].icr1);
+ writel(icr2, regs-port[port].icr2);
+ writel(imr, regs-port[port].imr);
+
Re: [U-Boot] [PATCH] mxs_nand: Fix ECC strength for NAND flash with OOB size of 224
On Tue, 2013-09-10 at 19:02 +0200, Stefano Babic wrote: On 24/08/2013 16:51, Elie De Brauwer wrote: On a board with an i.mx28 and a Micron MT29F4G08ABAEAH4, Linux says: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron MT29F4G08ABAEAH4), 512MiB, page size: 4096, OOB size: 224) the ECC strength is 16. root@(none):/sys/devices/virtual/mtd/mtd0# for i in ecc_strength oobsize subpagesize; do echo $i = `cat $i`; done ecc_strength = 16 oobsize = 224 subpagesize = 4096 The ECC strength was not properly discovered by U-Boot causing the data written by Linux to return an -74 (EBADMSG) when read from U-Boot. This patch fixes mxs_nand_get_ecc_strength() to function in case of a NAND flash with page_data_size = 4096 and page_oob_size= 224. Signed-off-by: Elie De Brauwer eliedebrau...@gmail.com --- Scott, I found this is assigned to me in patchwork. Is it ok if I apply it ? Best regards, Stefano Sure. Acked-by: Scott Wood scottw...@freescale.com I'm curious who's been doing these patchwork assignments and what they're basing it on. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 0/2] apf27: add support of armadeus apf27
Difference between v7 and v6: - first patch mx27: add missing constant for mx27 already accepted - remove useless variables regs - remove useless i2c initialization (already done in board_f.c) - remove CONFIG_I2C_MULTI_BUS (not used) - update u-boot filename in u-boot env - fix a typo in a comment in apf27.h Difference between v6 and v5: - use generic board framework - add fpga name Difference between v5 and v4: - use spl framework - use script - use SPDX-License-Identifier - use u-boot-with-spl.bin (instead of u-boot-nand.bin) - fix some comments format issue Difference between v4 and v3: - use standard start.S - use part to know u-boot offset - fix some comments format issue Difference between v3 and v2: - rebase on imx branch - merge support and spl patch - clean code of apf27_gpio_init - clean code of start.S Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (2): apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board MAINTAINERS |5 + board/armadeus/apf27/Makefile| 33 +++ board/armadeus/apf27/apf27.c | 256 ++ board/armadeus/apf27/apf27.h | 489 ++ board/armadeus/apf27/fpga.c | 224 board/armadeus/apf27/fpga.h | 25 ++ board/armadeus/apf27/lowlevel_init.S | 168 boards.cfg |1 + include/configs/apf27.h | 388 +++ 9 files changed, 1589 insertions(+), 0 deletions(-) create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/lowlevel_init.S create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] highbank: set AUTOBOOT_KEYED_CTRLC config option
Let highbank users break into the autoboot script with ctrl-c. Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com --- include/configs/highbank.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/highbank.h b/include/configs/highbank.h index afb6e64..1254768 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -80,7 +80,7 @@ #define CONFIG_RESET_TO_RETRY #define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_PROMPT Autobooting in %d seconds...\nPress s to stop or d to delay\n, bootdelay - +#define CONFIG_AUTOBOOT_KEYED_CTRLC /* * Miscellaneous configurable options */ -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] autoboot: add an option to override keyed autoboot
As originally implemented, setting the AUTOBOOT_KEYED config option will
prevent users from breaking into the autoboot script with ctrl-c. Restore
that option with a new config symbol.
Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com
---
common/main.c | 4 ++--
doc/README.autoboot | 8
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/common/main.c b/common/main.c
index ae37fee..dea48e4 100644
--- a/common/main.c
+++ b/common/main.c
@@ -392,13 +392,13 @@ static void process_boot_delay(void)
debug (### main_loop: bootcmd=\%s\\n, s ? s : UNDEFINED);
if (bootdelay != -1 s !abortboot(bootdelay)) {
-#ifdef CONFIG_AUTOBOOT_KEYED
+#if defined(CONFIG_AUTOBOOT_KEYED) !defined(CONFIG_AUTOBOOT_KEYED_CTRLC)
int prev = disable_ctrlc(1);/* disable Control C checking */
#endif
run_command_list(s, -1, 0);
-#ifdef CONFIG_AUTOBOOT_KEYED
+#if defined(CONFIG_AUTOBOOT_KEYED) !defined(CONFIG_AUTOBOOT_KEYED_CTRLC)
disable_ctrlc(prev);/* restore Control C checking */
#endif
}
diff --git a/doc/README.autoboot b/doc/README.autoboot
index e4fabc9..6f35c7b 100644
--- a/doc/README.autoboot
+++ b/doc/README.autoboot
@@ -74,6 +74,7 @@ What they do
bootretry is = 0.
CONFIG_AUTOBOOT_KEYED
+ CONFIG_AUTOBOOT_KEYED_CTRLC
CONFIG_AUTOBOOT_PROMPT
CONFIG_AUTOBOOT_DELAY_STR
CONFIG_AUTOBOOT_STOP_STR
@@ -135,6 +136,13 @@ What they do
environment variable you can specify a second, alternate
string (which allows you to have two password strings).
+ The CONFIG_AUTOBOOT_KEYED_CTRLC #define allows for the boot
+ sequence to be interrupted by ctrl-c, in addition to the
+ bootdelaykey and bootstopkey. Setting this variable
+ provides an escape sequence from the limited password
+ strings.
+
+
CONFIG_ZERO_BOOTDELAY_CHECK
If this option is defined, you can stop the autoboot process
--
1.8.1.2
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Re: [U-Boot] [PATCH v2 0/4] MTD UBI fixes
On Sat, 2013-09-07 at 14:11 +0200, Stefan Roese wrote: On 04.09.2013 16:16, Paul Burton wrote: This patchset corrects a few issues I've had whilst using UBI with U-boot. The first 3 are bug fixes, the 4th is an addition I needed in order to write a large root filesystem into my NAND device. Changes since v1: - Fixed style issues in cmd_ubi: add write.part command... as per Stefan Roese's comments. - Expanded upon the condition patch 1 fixes in response to the queries from Stefan, see the commit message for further detail. - Added patch 3 cmd_ubi: use int64_t volume size for 'ubi create' which it seems appropriate to include in this series. Paul Burton (4): mtd: driver _read() returns max_bitflips; mtd_read() returns -EUCLEAN cmd_mtdparts: use 64 bits for flash size, partition size offset cmd_ubi: use int64_t volume size for 'ubi create' cmd_ubi: add write.part command, to write a volume in multiple parts All 4 patches: Acked-by: Stefan Roese s...@denx.de Scott, these patches are assigned to you in patchwork. If you are okay with the NAND side (and everything else), then please feel free to push all 4 patches via your repository. Patch 1 looks OK to me (at least to the extent that it's just bringing code over from Linux). Patch 2 also looks straightforward. Kyungmin is the UBI maintainer -- the last two patches need his ack. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] cmd_scsi: use lbaint_t for LBA values instead of u32
The lbaint_t type exists, and should be used in preference to unsigned long,
which may not be correct when support lba48 compatible drives.
Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com
---
common/cmd_scsi.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index bbaed41..f5ab14f 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -53,10 +53,10 @@ static block_dev_desc_t
scsi_dev_desc[CONFIG_SYS_SCSI_MAX_DEVICE];
* forward declerations of some Setup Routines
*/
void scsi_setup_test_unit_ready(ccb * pccb);
-void scsi_setup_read6(ccb * pccb, unsigned long start, unsigned short blocks);
-void scsi_setup_read_ext(ccb * pccb, unsigned long start, unsigned short
blocks);
-static void scsi_setup_write_ext(ccb *pccb, unsigned long start,
- unsigned short blocks);
+void scsi_setup_read6(ccb * pccb, lbaint_t start, unsigned short blocks);
+void scsi_setup_read_ext(ccb * pccb, lbaint_t start, unsigned short blocks);
+static void scsi_setup_write_ext(ccb *pccb, lbaint_t start,
+ unsigned short blocks);
void scsi_setup_inquiry(ccb * pccb);
void scsi_ident_cpy (unsigned char *dest, unsigned char *src, unsigned int
len);
@@ -583,7 +583,7 @@ void scsi_setup_test_unit_ready(ccb * pccb)
pccb-msgout[0] = SCSI_IDENTIFY; /* NOT USED */
}
-void scsi_setup_read_ext(ccb * pccb, unsigned long start, unsigned short
blocks)
+void scsi_setup_read_ext(ccb * pccb, lbaint_t start, unsigned short blocks)
{
pccb-cmd[0] = SCSI_READ10;
pccb-cmd[1] = pccb-lun 5;
@@ -604,7 +604,7 @@ void scsi_setup_read_ext(ccb * pccb, unsigned long start,
unsigned short blocks)
pccb-cmd[7], pccb-cmd[8]);
}
-void scsi_setup_write_ext(ccb *pccb, unsigned long start, unsigned short
blocks)
+void scsi_setup_write_ext(ccb *pccb, lbaint_t start, unsigned short blocks)
{
pccb-cmd[0] = SCSI_WRITE10;
pccb-cmd[1] = pccb-lun 5;
@@ -626,7 +626,7 @@ void scsi_setup_write_ext(ccb *pccb, unsigned long start,
unsigned short blocks)
pccb-cmd[7], pccb-cmd[8]);
}
-void scsi_setup_read6(ccb * pccb, unsigned long start, unsigned short blocks)
+void scsi_setup_read6(ccb * pccb, lbaint_t start, unsigned short blocks)
{
pccb-cmd[0] = SCSI_READ6;
pccb-cmd[1] = pccb-lun 5 | (((unsigned char)(start 16)) 0x1f);
--
1.8.1.2
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[U-Boot] [PATCH 3/3] ahci: support LBA48 data reads for 2+TB drives
Enable full 48-bit LBA48 data reads by passing the upper word of the
LBA block pointer in bytes 9 and 10 of the FIS.
This allows uboot to load data from any arbitrary sector on a drive
with 2 or more TB of available data connected to an AHCI controller.
Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com
---
common/cmd_scsi.c| 41 -
drivers/block/ahci.c | 30 +++---
include/scsi.h | 1 +
3 files changed, 64 insertions(+), 8 deletions(-)
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index f5ab14f..ba3b74e 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -55,6 +55,8 @@ static block_dev_desc_t
scsi_dev_desc[CONFIG_SYS_SCSI_MAX_DEVICE];
void scsi_setup_test_unit_ready(ccb * pccb);
void scsi_setup_read6(ccb * pccb, lbaint_t start, unsigned short blocks);
void scsi_setup_read_ext(ccb * pccb, lbaint_t start, unsigned short blocks);
+void scsi_setup_read16(ccb * pccb, lbaint_t start, unsigned long blocks);
+
static void scsi_setup_write_ext(ccb *pccb, lbaint_t start,
unsigned short blocks);
void scsi_setup_inquiry(ccb * pccb);
@@ -362,6 +364,7 @@ int do_scsi (cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
/* almost the maximum amount of the scsi_ext command.. */
#define SCSI_MAX_READ_BLK 0x
+#define SCSI_LBA48_READ0xFFF
static ulong scsi_read(int device, lbaint_t blknr, lbaint_t blkcnt,
void *buffer)
@@ -383,7 +386,14 @@ static ulong scsi_read(int device, lbaint_t blknr,
lbaint_t blkcnt,
device, start, blks, (unsigned long) buffer);
do {
pccb-pdata = (unsigned char *) buf_addr;
- if (blks SCSI_MAX_READ_BLK) {
+ if (start SCSI_LBA48_READ) {
+ unsigned long blocks;
+ blocks = min(blks, SCSI_MAX_READ_BLK);
+ pccb-datalen = scsi_dev_desc[device].blksz * blocks;
+ scsi_setup_read16(pccb, start, blocks);
+ start += blocks;
+ blks -= blocks;
+ } else if (blks SCSI_MAX_READ_BLK) {
pccb-datalen = scsi_dev_desc[device].blksz *
SCSI_MAX_READ_BLK;
smallblks = SCSI_MAX_READ_BLK;
@@ -583,6 +593,35 @@ void scsi_setup_test_unit_ready(ccb * pccb)
pccb-msgout[0] = SCSI_IDENTIFY; /* NOT USED */
}
+void scsi_setup_read16(ccb * pccb, lbaint_t start, unsigned long blocks)
+{
+ pccb-cmd[0] = SCSI_READ16;
+ pccb-cmd[1] = pccb-lun5;
+ pccb-cmd[2] = ((unsigned char) (start 56)) 0xff;
+ pccb-cmd[3] = ((unsigned char) (start 48)) 0xff;
+ pccb-cmd[4] = ((unsigned char) (start 40)) 0xff;
+ pccb-cmd[5] = ((unsigned char) (start 32)) 0xff;
+ pccb-cmd[6] = ((unsigned char) (start 24)) 0xff;
+ pccb-cmd[7] = ((unsigned char) (start 16)) 0xff;
+ pccb-cmd[8] = ((unsigned char) (start 8)) 0xff;
+ pccb-cmd[9] = ((unsigned char) (start)) 0xff;
+ pccb-cmd[10] = 0;
+ pccb-cmd[11] = ((unsigned char) (blocks 24)) 0xff;
+ pccb-cmd[12] = ((unsigned char) (blocks 16)) 0xff;
+ pccb-cmd[13] = ((unsigned char) (blocks 8)) 0xff;
+ pccb-cmd[14] = (unsigned char) blocks 0xff;
+ pccb-cmd[15] = 0;
+ pccb-cmdlen = 16;
+ pccb-msgout[0] = SCSI_IDENTIFY; /* NOT USED */
+ debug (scsi_setup_read16: cmd: %02X %02X
+ startblk %02X%02X%02X%02X%02X%02X%02X%02X
+ blccnt %02X%02X%02X%02X\n,
+ pccb-cmd[0], pccb-cmd[1],
+ pccb-cmd[2], pccb-cmd[3], pccb-cmd[4], pccb-cmd[5],
+ pccb-cmd[6], pccb-cmd[7], pccb-cmd[8], pccb-cmd[9],
+ pccb-cmd[11], pccb-cmd[12], pccb-cmd[13], pccb-cmd[14]);
+}
+
void scsi_setup_read_ext(ccb * pccb, lbaint_t start, unsigned short blocks)
{
pccb-cmd[0] = SCSI_READ10;
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 8cc9379..c5c942f 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -669,18 +669,25 @@ static int ata_scsiop_inquiry(ccb *pccb)
*/
static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
{
- u32 lba = 0;
+ lbaint_t lba = 0;
u16 blocks = 0;
u8 fis[20];
u8 *user_buffer = pccb-pdata;
u32 user_buffer_size = pccb-datalen;
/* Retrieve the base LBA number from the ccb structure. */
- memcpy(lba, pccb-cmd + 2, sizeof(lba));
- lba = be32_to_cpu(lba);
+ if (pccb-cmd[0] == SCSI_READ16) {
+ memcpy(lba, pccb-cmd + 2, 8);
+ lba = be64_to_cpu(lba);
+ } else {
+ u32 temp;
+ memcpy(temp, pccb-cmd + 2, 4);
+ lba = be32_to_cpu(temp);
+ }
/*
-* And the number of blocks.
+* Retrieve the base LBA number and the block
[U-Boot] [PATCH] powerpc/mpc8xxx: Fix CamelCase for DDR code
Clean up CamelCase in DDR code to comply with latest coding style.
Signed-off-by: York Sun york...@freescale.com
---
.../powerpc/cpu/mpc8xxx/ddr/common_timing_params.h |8 ++--
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 46 ++--
arch/powerpc/cpu/mpc8xxx/ddr/ddr.h |2 +-
arch/powerpc/cpu/mpc8xxx/ddr/interactive.c | 46 ++--
.../cpu/mpc8xxx/ddr/lc_common_dimm_params.c| 14 +++---
arch/powerpc/cpu/mpc8xxx/ddr/main.c|6 +--
arch/powerpc/cpu/mpc8xxx/ddr/options.c | 34 +++
arch/powerpc/include/asm/fsl_ddr_sdram.h | 28 ++--
board/exmeritus/hww1u1a/ddr.c |2 +-
board/freescale/b4860qds/ddr.c |4 +-
board/freescale/corenet_ds/ddr.c |4 +-
board/freescale/mpc8349emds/ddr.c |6 +--
board/freescale/mpc8540ads/ddr.c |2 +-
board/freescale/mpc8544ds/ddr.c|2 +-
board/freescale/mpc8560ads/ddr.c |2 +-
board/freescale/mpc8572ds/ddr.c|4 +-
board/freescale/mpc8610hpcd/ddr.c |2 +-
board/freescale/mpc8641hpcn/ddr.c |2 +-
board/freescale/p1022ds/ddr.c |4 +-
board/freescale/p2020ds/ddr.c |4 +-
board/freescale/p2041rdb/ddr.c |4 +-
board/freescale/t4qds/ddr.c|4 +-
board/stx/stxgp3/ddr.c |2 +-
board/stx/stxssa/ddr.c |2 +-
board/xes/xpedite550x/ddr.c|2 +-
doc/README.fsl-ddr |2 +-
26 files changed, 119 insertions(+), 119 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h
b/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h
index 06706ed..b392cd1 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h
@@ -41,10 +41,10 @@ typedef struct {
unsigned int lowest_common_SPD_caslat;
unsigned int highest_common_derated_caslat;
unsigned int additive_latency;
- unsigned int all_DIMMs_burst_lengths_bitmask;
- unsigned int all_DIMMs_registered;
- unsigned int all_DIMMs_unbuffered;
- unsigned int all_DIMMs_ECC_capable;
+ unsigned int all_dimms_burst_lengths_bitmask;
+ unsigned int all_dimms_registered;
+ unsigned int all_dimms_unbuffered;
+ unsigned int all_dimms_ecc_capable;
unsigned long long total_mem;
unsigned long long base_address;
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
index 242eb47..6c5dcb4 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -360,7 +360,7 @@ static void set_timing_cfg_3(fsl_ddr_cfg_regs_t *ddr,
ext_refrec = (picos_to_mclk(common_dimm-tRFC_ps) - 8) 4;
/* ext_wrrec only deals with 16 clock and above, or 14 with OTF */
ext_wrrec = (picos_to_mclk(common_dimm-tWR_ps) +
- (popts-OTF_burst_chop_en ? 2 : 0)) 4;
+ (popts-otf_burst_chop_en ? 2 : 0)) 4;
ddr-timing_cfg_3 = (0
| ((ext_pretoact 0x1) 28)
@@ -440,7 +440,7 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr,
printf(Error: WRREC doesn't support more than 16 clocks\n);
else
wrrec_mclk = wrrec_table[wrrec_mclk - 1];
- if (popts-OTF_burst_chop_en)
+ if (popts-otf_burst_chop_en)
wrrec_mclk += 2;
acttoact_mclk = picos_to_mclk(common_dimm-tRRD_ps);
@@ -462,7 +462,7 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr,
if (wrtord_mclk 4)
wrtord_mclk = 4;
#endif
- if (popts-OTF_burst_chop_en)
+ if (popts-otf_burst_chop_en)
wrtord_mclk += 2;
ddr-timing_cfg_1 = (0
@@ -531,12 +531,12 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr,
#endif
if (additive_latency)
rd_to_pre += additive_latency;
- if (popts-OTF_burst_chop_en)
+ if (popts-otf_burst_chop_en)
rd_to_pre += 2; /* according to UM */
wr_data_delay = popts-write_data_delay;
- cke_pls = picos_to_mclk(popts-tCKE_clock_pulse_width_ps);
- four_act = picos_to_mclk(popts-tFAW_window_four_activates_ps);
+ cke_pls = picos_to_mclk(popts-tcke_clock_pulse_width_ps);
+ four_act = picos_to_mclk(popts-tfaw_window_four_activates_ps);
ddr-timing_cfg_2 = (0
| ((add_lat_mclk 0xf) 28)
@@ -555,8 +555,8 @@ static void set_ddr_sdram_rcw(fsl_ddr_cfg_regs_t *ddr,
const memctl_options_t *popts,
const common_timing_params_t *common_dimm)
{
[U-Boot] [PATCH 1/3] cmd_scsi: fix formatting before making additional changes
Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com
---
common/cmd_scsi.c | 498 --
1 file changed, 255 insertions(+), 243 deletions(-)
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index 7b97dc9..bbaed41 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -78,67 +78,72 @@ void scsi_scan(int mode)
unsigned char i,perq,modi,lun;
lbaint_t capacity;
unsigned long blksz;
- ccb* pccb=(ccb *)tempccb;
+ ccb* pccb = (ccb *) tempccb;
- if(mode==1) {
+ if (mode == 1) {
printf(scanning bus for devices...\n);
}
- for(i=0;iCONFIG_SYS_SCSI_MAX_DEVICE;i++) {
- scsi_dev_desc[i].target=0xff;
- scsi_dev_desc[i].lun=0xff;
- scsi_dev_desc[i].lba=0;
- scsi_dev_desc[i].blksz=0;
+ for(i = 0; i CONFIG_SYS_SCSI_MAX_DEVICE ; i++) {
+ scsi_dev_desc[i].target = 0xff;
+ scsi_dev_desc[i].lun = 0xff;
+ scsi_dev_desc[i].lba = 0;
+ scsi_dev_desc[i].blksz = 0;
scsi_dev_desc[i].log2blksz =
LOG2_INVALID(typeof(scsi_dev_desc[i].log2blksz));
- scsi_dev_desc[i].type=DEV_TYPE_UNKNOWN;
- scsi_dev_desc[i].vendor[0]=0;
- scsi_dev_desc[i].product[0]=0;
- scsi_dev_desc[i].revision[0]=0;
+ scsi_dev_desc[i].type = DEV_TYPE_UNKNOWN;
+ scsi_dev_desc[i].vendor[0] = 0;
+ scsi_dev_desc[i].product[0] = 0;
+ scsi_dev_desc[i].revision[0] = 0;
scsi_dev_desc[i].removable = false;
- scsi_dev_desc[i].if_type=IF_TYPE_SCSI;
- scsi_dev_desc[i].dev=i;
- scsi_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
- scsi_dev_desc[i].block_read=scsi_read;
+ scsi_dev_desc[i].if_type = IF_TYPE_SCSI;
+ scsi_dev_desc[i].dev = i;
+ scsi_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
+ scsi_dev_desc[i].block_read = scsi_read;
scsi_dev_desc[i].block_write = scsi_write;
}
- scsi_max_devs=0;
- for(i=0;iCONFIG_SYS_SCSI_MAX_SCSI_ID;i++) {
- pccb-target=i;
- for(lun=0;lunCONFIG_SYS_SCSI_MAX_LUN;lun++) {
- pccb-lun=lun;
- pccb-pdata=(unsigned char *)tempbuff;
- pccb-datalen=512;
+ scsi_max_devs = 0;
+ for(i = 0; i CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
+ pccb-target = i;
+ for(lun = 0; lun CONFIG_SYS_SCSI_MAX_LUN; lun++) {
+ pccb-lun = lun;
+ pccb-pdata = (unsigned char *) tempbuff;
+ pccb-datalen = 512;
scsi_setup_inquiry(pccb);
if (scsi_exec(pccb) != true) {
- if(pccb-contr_stat==SCSI_SEL_TIME_OUT) {
- debug (Selection timeout ID
%d\n,pccb-target);
- continue; /* selection timeout =
assuming no device present */
+ /* selection timeout = no device present */
+ if (pccb-contr_stat == SCSI_SEL_TIME_OUT) {
+ debug (Selection timeout ID %d\n,
+ pccb-target);
+ continue;
}
scsi_print_error(pccb);
continue;
}
- perq=tempbuff[0];
- modi=tempbuff[1];
- if((perq 0x1f)==0x1f) {
+ perq = tempbuff[0];
+ modi = tempbuff[1];
+ if ((perq 0x1f) == 0x1f) {
continue; /* skip unknown devices */
}
- if((modi0x80)==0x80) /* drive is removable */
- scsi_dev_desc[scsi_max_devs].removable=true;
+ if((modi 0x80) == 0x80) /* drive is removable */
+ scsi_dev_desc[scsi_max_devs].removable = true;
/* get info for this device */
- scsi_ident_cpy((unsigned char
*)scsi_dev_desc[scsi_max_devs].vendor[0],
+ scsi_ident_cpy((unsigned char *)
+ scsi_dev_desc[scsi_max_devs].vendor[0],
tempbuff[8], 8);
- scsi_ident_cpy((unsigned char
*)scsi_dev_desc[scsi_max_devs].product[0],
+ scsi_ident_cpy((unsigned char *)
+ scsi_dev_desc[scsi_max_devs].product[0],
tempbuff[16],
[U-Boot] [PATCH 1/6] part_efi: make sure the gpt_pte is freed
the gpt_pte wasn't being freed if it was checked against an invalid
partition. The resulting memory leakage could make it impossible
to repeatedly attempt to load non-existent files in a script.
Also, downgrade the message for not finding an invalid partition
from a printf() to a debug() so as to minimize message spam in
perfectly normal situations.
Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com
---
disk/part_efi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index b7524d6..9c33ae7 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -164,8 +164,9 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc, int
part,
if (part le32_to_cpu(gpt_head-num_partition_entries) ||
!is_pte_valid(gpt_pte[part - 1])) {
- printf(%s: *** ERROR: Invalid partition number %d ***\n,
+ debug(%s: *** ERROR: Invalid partition number %d ***\n,
__func__, part);
+ free(gpt_pte);
return -1;
}
--
1.8.1.2
___
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[U-Boot] ahci: add support for LBA48 data reads
The ext4 fs currently supports drive partitions greater that 2TB in size, but the ahci driver in u-boot can't read data past the first 2TB. Add support for lba48 reads by modifying the calls to use the lbaint_t type, so that lba48 block addresses can be sent to the functions, and then add support for reading those offsets. --Mark Langsdorf Calxeda, Inc. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/p2041: fix I2C controller's offset
Hi Xie, On Tue, Sep 10, 2013 at 8:15 PM, Shaohui Xie shaohui@freescale.com wrote: Without this patch, SPD access will fail which leads to DDR init fail. Signed-off-by: Shaohui Xie shaohui@freescale.com --- include/configs/P2041RDB.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 905bacf..862614b 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -354,10 +354,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 40 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SPEED 40 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 /* * RapidIO -- 1.7.0.4 Yes that appears to fix the problem. Thanks for the quick turn around. Tested-by: Chris Packham judge.pack...@gmail.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/p2041: fix I2C controller's offset
On 09/10/2013 02:13 PM, Chris Packham wrote: Hi Xie, On Tue, Sep 10, 2013 at 8:15 PM, Shaohui Xie shaohui@freescale.com wrote: Without this patch, SPD access will fail which leads to DDR init fail. Signed-off-by: Shaohui Xie shaohui@freescale.com --- include/configs/P2041RDB.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 905bacf..862614b 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -354,10 +354,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 40 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SPEED 40 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 /* * RapidIO -- 1.7.0.4 Yes that appears to fix the problem. Thanks for the quick turn around. Tested-by: Chris Packham judge.pack...@gmail.com Thanks for the feedback. I will take it in u-boot-mpc85xx. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
