Re: [U-Boot] [PATCH v7 1/5] mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform
Hi,
Please see the replies inline..
> From: Scott Wood [mailto:scottw...@freescale.com]
> > On Mon, 2013-09-30 at 19:43 +0530, Pekon Gupta wrote:
> > +Platform specific options
> > +=
> > +
> > + CONFIG_NAND_OMAP_ECCSCHEME
> > + On OMAP platforms, this specifies NAND ECC scheme.
> > + 1 - HAM1_SW 1-bit Hamming code using software library
> > + (for legacy devices only)
> > + 2 - HAM1_HW 1-bit Hamming code using GPMC hardware engine
> > + (for legacy devices only)
> > + 3 - BCH4_SW 4-bit BCH code (unsupported)
> > + 4 - BCH4_HW 4-bit BCH code (unsupported)
> > + 5 - BCH8_SW 8-bit BCH code with
> > + - ecc calculation using GPMC hardware engine,
> > + - error detection using software library.
> > + - requires CONFIG_BCH to enable software BCH
> library
> > + (For legacy device which do not have ELM h/w
> engine)
> > + 6 - BCH8_HW 8-bit BCH code with
> > + - ecc calculation using GPMC hardware engine,
> > + - error detection using ELM hardware engine.
>
> You should document the symbols, not the numbers that happen to be
> assigned to them.
>
Sorry din't get you. This is based on your below feedback
http://lists.denx.de/pipermail/u-boot/2013-September/162773.html
Example: "6 - BCH8_HW" means 8-bit BCH ECC scheme using h/w engine.
It is this number is what user needs to specify in include/configs/*.h
Any other internal symbol like "OMAP_ECC_BCH8_CODE_SW" should
not be exposed to user, user-interface should remain constant. This is
similar to DT binding approach used in linux. Internal symbols are not
exposed to users.
> > +/**
> > + * omap_select_ecc_scheme - configures driver for particular ecc-scheme
> > + * @nand: NAND chip device structure
> > + * @ecc_scheme: ecc scheme to configure
> > + * @pagesize: number of main-area bytes per page of NAND device
> > + * @oobsize: number of OOB/spare bytes per page of NAND device
> > + */
> > +static int omap_select_ecc_scheme(struct nand_chip *nand, int
> ecc_scheme,
> > + unsigned int pagesize, unsigned int oobsize) {
>
> s/int ecc_scheme/enum omap_ecc ecc_scheme/
>
If this is only the cosmetic change, may be I'll take it separately
in another patch. Also 'omap_select_ecc_scheme()' has default
statement in last, which gracefully handles all un-supported ecc-schemes.
[snip]
> > + /* check if NAND spare/OOB has enough bytes to accomodate
> ecclayout */
> > + if ((ecclayout->eccbytes + BADBLOCK_MARKER_LENGTH) > oobsize)
> {
> > + printf("nand: error: insufficient OOB bytes. require=%d\n", (
> > + ecclayout->eccbytes +
> BADBLOCK_MARKER_LENGTH));
> > + return -EINVAL;
> > + }
>
> Check this before you make any changes to the current ECC setup.
>
'ecclayout->eccbytes' depends on ECC scheme selected, therefore
this check cannot be done before selecting ECC scheme first.
> > + err = omap_select_ecc_scheme(nand,
> OMAP_ECC_HAM1_CODE_SW,
> > + mtd->writesize, mtd->oobsize);
> > + }
> > + if (err) {
> > + printf("nand: error: could not switch ecc, reverting\n");
> > + omap_select_ecc_scheme(nand, bch->ecc_scheme,
> > + mtd->writesize, mtd->oobsize);
> > + return -EINVAL;
> > }
>
> You won't need to "revert" here if omap_select_ecc_scheme doesn't
> damage anything in error cases.
>
There are two cases when ECC selection could fail half-way:
(1) when if(ecclayout->eccbytes + BADBLOCK > oobsize), as this check
can only be done after selecting ECC scheme so it can fail
(2) if 'bch_priv.control= init_bch(13, 8, 0x201b);' fails.
This check is also is done during ecc-scheme selection.
In both above cases, nand_chip.ecc information is half-configured
so this reverting back to old ecc-scheme is essential.
with regards, pekon
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Re: [U-Boot] [UBOOT][PATCHv4 3/6] driver: mtd: spi: Add memory mapped read support
On Saturday 05 October 2013 01:36 AM, Jagan Teki wrote:
Please use the commit msg head as "sf: .."
Ok.
On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar wrote:
Qspi controller can have a memory mapped port which can be used for
data read. Added support to enable memory mapped port read.
This patch enables the following:
- It enables exchange of memory map address between mtd and qspi
through the introduction of "memory_map" flag.
- Add support to communicate to the driver that memory mapped
transfer is to be started through introduction of new flags like
"SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".
This will enable the spi controller to do memory mapped configurations
if required.
Signed-off-by: Sourav Poddar
---
drivers/mtd/spi/sf_ops.c |2 ++
drivers/mtd/spi/sf_probe.c |1 +
include/spi.h |3 +++
3 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index c009af5..bee4128 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -269,7 +269,9 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32
offset,
/* Handle memory-mapped SPI */
if (flash->memory_map) {
+ spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
memcpy(data, flash->memory_map + offset, len);
+ spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
Is it correct, can you check it once.
where is SPI_XFER_MEM_MAP_END used?
It will be used in the driver. check 4/6 patch of this series.
Looks like you have used mem-map for only reads is it? if so where is
SPI_XFER_BEGIN is using?
Yes, only memory mapped read is supported.
Ideally, we dont need BEGIN flag for memory mapped cases. I have
explained a bit
more on your similar comment on patch 4/6.
Please use _MMAP instead of _MEM_MAP for simple naming convention.
OK.
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Re: [U-Boot] [UBOOT][PATCHv4 6/6] README: qspi usecase and testing documentation.
On Saturday 05 October 2013 01:44 AM, Jagan Teki wrote: May be your are missing my comments in previous post. - Please place these these readme files in doc/SPI/* - Please use the doc/SPI/status.txt as an example format for writing new readme files. ok. On Sat, Oct 5, 2013 at 1:15 AM, Sourav Poddar wrote: On Saturday 05 October 2013 12:08 AM, Jagan Teki wrote: Hi Sourav, Please place these these readme files in doc/SPI/* All these patches tested on top of u-boot-spi.git master-probe? Yes, this are tested on the above branch. On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar wrote: Contains documentation and testing details for qspi flash interface. Signed-off-by: Sourav Poddar --- doc/README.ti_qspi_dra_test | 38 ++ doc/README.ti_qspi_flash| 47 +++ 2 files changed, 85 insertions(+), 0 deletions(-) create mode 100644 doc/README.ti_qspi_dra_test create mode 100644 doc/README.ti_qspi_flash diff --git a/doc/README.ti_qspi_dra_test b/doc/README.ti_qspi_dra_test new file mode 100644 index 000..c4540ea --- /dev/null +++ b/doc/README.ti_qspi_dra_test @@ -0,0 +1,38 @@ +- + Simple steps used to test the QSPI at U-Boot +- + +For #1, build the patched U-Boot and load MLO/u-boot.img + +-- +Boot from another medium like MMC +-- + +DRA752 EVM # mmc dev 0 +DRA752 EVM # fatload mmc 0 0x8200 MLO +DRA752 EVM # fatload mmc 0 0x8300 u-boot.img + +-- +Commands to erase/write u-boot/mlo to flash device +-- + +DRA752 EVM # sf probe 0 +[should detect the S25FL256S serial flash device] + +DRA752 EVM # sf erase 0 1 +DRA752 EVM # sf erase 1 1 +DRA752 EVM # sf erase 2 1 +DRA752 EVM # sf erase 3 1 +DRA752 EVM # sf erase 4 1 +DRA752 EVM # sf erase 5 1 +DRA752 EVM # sf erase 6 1 + +DRA752 EVM # sf write 8200 0 1 +DRA752 EVM # sf write 8300 2 7 + These test procedure steps were done in real hw. Seems like written once, could be generic if you test these steps on real hw and palce the same log here... +For #2, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power +on. ROM should find the GP header at offset 0 and load/execute SPL. SPL +then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to +find a U-Boot image header at offset 0x2 (set in the config file) +and proceeds to load that image using the U-Boot image payload offset/size +from the header. It will then start U-Boot. diff --git a/doc/README.ti_qspi_flash b/doc/README.ti_qspi_flash new file mode 100644 index 000..1b86d01 --- /dev/null +++ b/doc/README.ti_qspi_flash @@ -0,0 +1,47 @@ +QSPI U-boot support +-- + +Host processor is connected to serial flash device via qpsi +interface. QSPI is a kind of spi module that allows single, +dual and quad read access to external spi devices. The module +has a memory mapped interface which provide direct interface +for accessing data form external spi devices. + +The one QSPI in the device is primarily intended for fast booting +from Quad SPI flash devices. + +Usecase +--- + +MLO/u-boot.img will be flashed from SD/MMC to the flash device +using serial flash erase and write commands. Then, switch settings +will be changed to qspi boot. Then, the ROM code will read MLO +from the predefined location in the flash, where it was flashed and +execute it after storing it in SDRAM. Then, the MLO will read +u-boot.img from flash and execute it from SDRAM. + +SPI mode +--- +SPI mode uses mtd spi framework for transfer and reception of data. +Can be used in: +1. Normal mode: use single pin for transfers +2. Dual Mode: use two pins for transfers. +3. Quad mode: use four pin for transfer + +Memory mapped read mode +--- +In this, SPI controller is configured using configuration port and then +controler is switched to memory mapped port for data read. + +Driver +-- +drivers/qspi/ti_qspi.c +- Newly created file which is responsible for configuring the + qspi controller and also for providing the low level api which + is responsible for transferring the datas from host controller + to flash device and vice versa. + +Testing +--- +A seperated file named README.dra_qspi_test has been created which gives all the +details about the commands required to test qspi at u-boot level. -- 1.7.1 Please use the doc/SPI/status.txt as an example format for writing new readme files. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT][PATCHv4 4/6] spi: add TI QSPI driver
On Saturday 05 October 2013 01:43 AM, Jagan Teki wrote:
On Sat, Oct 5, 2013 at 1:32 AM, Sourav Poddar wrote:
On Saturday 05 October 2013 12:27 AM, Jagan Teki wrote:
On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar
wrote:
From: Matt Porter
Adds a SPI master driver for the TI QSPI peripheral.
Signed-off-by: Matt Porter
Signed-off-by: Sourav Poddar
[Added quad read support and memory mapped support).
What is this comment, any specific?
This simply tell the portion which i did in the patch.
May be not required, bcz it will come after i apply below s-o-b
---
You missed change log for all patches, i think you have summarized in 0/6.
I feel it's better write it on individual patches.
Ok.
drivers/spi/Makefile |1 +
drivers/spi/ti_qspi.c | 328
+
2 files changed, 329 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/ti_qspi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 91d24ce..e5941b0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -38,6 +38,7 @@ COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
+COBJS-$(CONFIG_TI_QSPI) += ti_qspi.o
COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
COBJS-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
new file mode 100644
index 000..d8a03a8
--- /dev/null
+++ b/drivers/spi/ti_qspi.c
@@ -0,0 +1,328 @@
+/*
+ * TI QSPI driver
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated
+ *
+ * SPDX-License-Identifier: GPL-2.0+
Got below format after apply this patch - please check
*Â SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
ahh..I copied it from a patch on some list. May be something went wrong, I
will check.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+struct qspi_regs {
+u32 pid;
+u32 pad0[3];
+u32 sysconfig;
+u32 pad1[3];
+u32 intr_status_raw_set;
+u32 intr_status_enabled_clear;
+u32 intr_enable_set;
+u32 intr_enable_clear;
+u32 intc_eoi;
+u32 pad2[3];
+u32 spi_clock_cntrl;
+u32 spi_dc;
+u32 spi_cmd;
+u32 spi_status;
+u32 spi_data;
+u32 spi_setup0;
+u32 spi_setup1;
+u32 spi_setup2;
+u32 spi_setup3;
+u32 spi_switch;
+u32 spi_data1;
+u32 spi_data2;
+u32 spi_data3;
Please add tab space.
ok
+};
+
+struct qspi_slave {
+ struct spi_slave slave;
+ struct qspi_regs *base;
+ unsigned int mode;
+ u32 cmd;
+ u32 dc;
+};
+
-- TAG+
+#define QSPI_TIMEOUT 200
+
+#define QSPI_FCLK 19200
+
+/* Clock Control */
+#define QSPI_CLK_EN(1<< 31)
+#define QSPI_CLK_DIV_MAX 0x
+
+/* Command */
+#define QSPI_EN_CS(n) (n<< 28)
+#define QSPI_WLEN(n) ((n-1)<< 19)
+#define QSPI_3_PIN (1<< 18)
+#define QSPI_RD_SNGL (1<< 16)
+#define QSPI_WR_SNGL (2<< 16)
+#define QSPI_INVAL (4<< 16)
+#define QSPI_RD_QUAD (7<< 16)
+
+/* Device Control */
+#define QSPI_DD(m, n) (m<< (3 + n*8))
+#define QSPI_CKPHA(n) (1<< (2 + n*8))
+#define QSPI_CSPOL(n) (1<< (1 + n*8))
+#define QSPI_CKPOL(n) (1<< (n*8))
+
+/* Status */
+#define QSPI_WC(1<< 1)
+#define QSPI_BUSY (1<< 0)
+#define QSPI_WC_BUSY (QSPI_WC | QSPI_BUSY)
+#define QSPI_XFER_DONE QSPI_WC
+
+#define MM_SWITCH 0x01
+#define MEM_CS 0x100
+#define MEM_CS_UNSELECT0xf0ff
+#define MMAP_START_ADDR0x5c00
+#define CORE_CTRL_IO 0x4a002558
+
+#define QSPI_CMD_READ (0x3<< 0)
+#define QSPI_CMD_READ_QUAD (0x6b<< 0)
+#define QSPI_CMD_READ_FAST (0x0b<< 0)
+#define QSPI_SETUP0_NUM_A_BYTES(0x2<< 8)
+#define QSPI_SETUP0_NUM_D_BYTES_NO_BITS(0x0<< 10)
+#define QSPI_SETUP0_NUM_D_BYTES_8_BITS (0x1<< 10)
+#define QSPI_SETUP0_READ_NORMAL(0x0<< 12)
+#define QSPI_SETUP0_READ_QUAD (0x3<< 12)
+#define QSPI_CMD_WRITE (0x2<< 16)
+#define QSPI_NUM_DUMMY_BITS(0x0<< 24)
--TAG-
TAG+ ... TAG- please move these macro definitions in below headers
Ok.
+
+static inline struct qspi_slave *to_qspi_slave(struct spi_slave *slave)
+{
+ return container_of(slave, struct qspi_slave, slave);
+}
+static inline struct qspi_regs *get_qspi_bus(int dev)
+{
+ if (!dev)
+ return (struct qspi_regs *)QSPI_BASE;
+ else
+ return NULL;
+}
Is this function really required, how many bus controller you have?
Actually one.
Ok, Please remove this function and assign direc
Re: [U-Boot] [PATCH v6] usb: new board-specific USB init interface
On 10/4/2013 10:22 AM, Mateusz Zalega wrote:
+/*
+ * You can initialize platform's USB host or device
+ * ports by passing this enum as an argument to
+ * board_usb_init().
+ */
+enum board_usb_init_type {
+ USB_INIT_HOST,
+ USB_INIT_DEVICE
+};
+
I'm a little late to the game, but can you rename this to just
usb_init_type ?
I'm wanting to use this as a parameter to usb_lowlevel_init, moving it
above the usb_lowlevel_init definition would help me too.
Thanks
Troy
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Re: [U-Boot] [RFC PATCH 4/3] i.MX6DQ/DLS: remove unused pad declarations
Hi all, I'm just following up on this patch. On 09/18/2013 12:18 PM, Eric Nelson wrote: > Hi Otavio, > > On 09/18/2013 11:27 AM, Otavio Salvador wrote: >> On Wed, Sep 18, 2013 at 3:14 PM, Eric Nelson >> wrote: >>> That's not a typo. I really did intend this to be an add-on to the >>> series described here: >>> >>> http://lists.denx.de/pipermail/u-boot/2013-September/#162774 >>> >>> This patch assumes that the answer about what to do with pads that >>> aren't in the Linux tree is to delete them from U-Boot. >>> >>> No boards are currently referring to them, and the names are still >>> a jumble of mis-matched abbreviations. >>> >>> After applying this patch, there are still over 200 differences in >>> pad declarations between the i.MX6D/Q and the i.MX6DL/S header files, >>> but the differences may all be meaningful. >>> >>> Specifically: >>> >>> 142 have names referring to IPU2 on i.MX6D/Q and LCDIF on i.MX6DL/S >>> It's not clear to me whether these can be used in the same >>> manner >>> on both variants. >>> 50 refer to the EPDC signals only available on i.MX6DL/S >>>8 refer to ACLK_FREERUN, and it's not clear from the >>> documentation >>> whether this exists on i.MX6 D/Q >>> 15 refer to the ECSPI5 component, only available on i.MX6 D/Q >>>8 refer to the I2C4 component, only available on i.MX6 DL/S >>> >>> These pad declarations seem to have made it into the Linux kernel >>> for i.MX6DL and should be added to i.MX6DQ: >>> >>> 38 refer to IPU1_CSI1, which is available on both variants and >>> should be added to the i.MX6D/Q declarations in Linux and >>> U-Boot >>>4 refer to USBOH3 functions that should be added to i.MX6 D/Q >>> in Linux and U-Boot >>> >>> Signed-off-by: Eric Nelson >> >> Personally I think this is the way to go. >> > > I guess I didn't really weigh in, but I'm in favor of 'ding now, > add later if needed'. > I don't think Stefano, Shawn, or Fabio ever weighed in on whether to - remove them all, or - review and remove or consolidate names, or - leave them alone Tapani requested that the MMDC_DRAM pads be kept, but I don't see a response to the comment that these are likely to be configured in DCD data at least for some boards, so the structs won't be useful and #defines would do the trick. Please let me know your thoughts. Regards, Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_nvedit.c: setenv_hex must prefix hex with '0x'
On 10/04/2013 04:12 PM, Wolfgang Denk wrote: > Dear Stephen, > > In message <524f376c.7070...@wwwdotorg.org> you wrote: >> >>> I think we should NAK your patch, and suggest to fix the problem by >>> reverting commit 3f83c87 and making "load" default to hex input mode. >> >> Reverting 3f83c87 would do the opposite of what you want; it'd make >> extload/fatload require 0x prefixes instead of assuming hex. Perhaps >> what you want is a tweak to that patch so that the generic load/ls >> commands always expect a hex value, rather than requiring the 0x prefix? > > Well, that should be the result, yes. > > You mean the extload/fatload commands have been broken before that? > OK, eventually the bug was introduced before that. BUt in any case > it's a bug, and should be fixed. extload/fatload were broken between the following two commits: 3f83c87 fs: fix number base behaviour change in fatload/ext*load ... 045fa1e fs: add filesystem switch libary, implement ls and fsload commands (i.e. for about 50 commits) The generic load command has been "broken" (by design...) since it was introduced. I suppose you can change the behaviour if you want; anyone writing "0x..." for their values presumably won't be affected, and if people really do assume all values in U-Boot are in hex, presumably nobody currently relies upon using non-prefixed values with the generic load command, since it doesn't work like that right now. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 1/5] mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform
On Mon, 2013-09-30 at 19:43 +0530, Pekon Gupta wrote:
> +Platform specific options
> +=
> +
> + CONFIG_NAND_OMAP_ECCSCHEME
> + On OMAP platforms, this specifies NAND ECC scheme.
> + 1 - HAM1_SW 1-bit Hamming code using software library
> + (for legacy devices only)
> + 2 - HAM1_HW 1-bit Hamming code using GPMC hardware engine
> + (for legacy devices only)
> + 3 - BCH4_SW 4-bit BCH code (unsupported)
> + 4 - BCH4_HW 4-bit BCH code (unsupported)
> + 5 - BCH8_SW 8-bit BCH code with
> + - ecc calculation using GPMC hardware engine,
> + - error detection using software library.
> + - requires CONFIG_BCH to enable software BCH library
> + (For legacy device which do not have ELM h/w engine)
> + 6 - BCH8_HW 8-bit BCH code with
> + - ecc calculation using GPMC hardware engine,
> + - error detection using ELM hardware engine.
You should document the symbols, not the numbers that happen to be
assigned to them.
> +/**
> + * omap_select_ecc_scheme - configures driver for particular ecc-scheme
> + * @nand: NAND chip device structure
> + * @ecc_scheme: ecc scheme to configure
> + * @pagesize: number of main-area bytes per page of NAND device
> + * @oobsize: number of OOB/spare bytes per page of NAND device
> + */
> +static int omap_select_ecc_scheme(struct nand_chip *nand, int ecc_scheme,
> + unsigned int pagesize, unsigned int oobsize) {
s/int ecc_scheme/enum omap_ecc ecc_scheme/
> + struct nand_bch_priv*bch= nand->priv;
> + struct nand_ecclayout *ecclayout = nand->ecc.layout;
> + int i;
> +
> + switch (ecc_scheme) {
> + case OMAP_ECC_HAM1_CODE_SW:
> + debug("nand: selected OMAP_ECC_HAM1_CODE_SW\n");
> + nand->ecc.mode = NAND_ECC_SOFT;
> + nand->ecc.layout= NULL;
> + nand->ecc.size = 0;
> + nand->ecc.strength = 1;
> + bch->ecc_scheme = OMAP_ECC_HAM1_CODE_SW;
> + break;
> + case OMAP_ECC_HAM1_CODE_HW:
> + debug("nand: selected OMAP_ECC_HAM1_CODE_HW\n");
> + nand->ecc.mode = NAND_ECC_HW;
> + nand->ecc.strength = 1;
> + nand->ecc.size = 512;
> + nand->ecc.bytes = 3;
> + nand->ecc.hwctl = omap_enable_hwecc;
> + nand->ecc.correct = omap_correct_data;
> + nand->ecc.calculate = omap_calculate_ecc;
> + /* define ecc-layout */
> + ecclayout->eccbytes = nand->ecc.bytes *
> + (pagesize / SECTOR_BYTES);
> + for (i = 0; i < ecclayout->eccbytes; i++)
> + ecclayout->eccpos[i] = i + BADBLOCK_MARKER_LENGTH;
> + ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH;
> + ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes -
> + BADBLOCK_MARKER_LENGTH;
> + bch->ecc_scheme = OMAP_ECC_HAM1_CODE_HW;
> + break;
> +#ifdef CONFIG_BCH
> + case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
> + debug("nand: selected OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
> + nand->ecc.mode = NAND_ECC_HW;
> + nand->ecc.strength = 8;
> + nand->ecc.size = 512;
> + nand->ecc.bytes = 13;
> + nand->ecc.hwctl = omap_enable_ecc_bch;
> + nand->ecc.correct = omap_correct_data_bch_sw;
> + nand->ecc.calculate = omap_calculate_ecc_bch_sw;
> + /* BCH SW library is used for error detection */
> + bch_priv.control= init_bch(13, 8, 0x201b);
> + if (!bch_priv.control) {
> + printf("nand: error: could not init_bch()\n");
> + return -ENODEV;
> + }
> + bch_priv.type = ECC_BCH8;
> + /* define ecc-layout */
> + ecclayout->eccbytes = nand->ecc.bytes *
> + (pagesize / SECTOR_BYTES);
> + for (i = 0; i < ecclayout->eccbytes; i++)
> + ecclayout->eccpos[i] = i + (oobsize -
> + ecclayout->eccbytes);
> + ecclayout->oobfree[0].offset = BADBLOCK_MARKER_LENGTH;
> + ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes -
> + BADBLOCK_MARKER_LENGTH;
> + omap_hwecc_init_bch(nand, NAND_ECC_READ);
> + bch->ecc_scheme = OMAP_ECC_BCH8_CODE_HW_DETECTION_SW;
> + break;
> +#endif
> + case OMAP_ECC_BCH8_CODE_HW:
> +
Re: [U-Boot] [PATCH] cmd_nvedit.c: setenv_hex must prefix hex with '0x'
Dear Stephen, In message <524f376c.7070...@wwwdotorg.org> you wrote: > > > I think we should NAK your patch, and suggest to fix the problem by > > reverting commit 3f83c87 and making "load" default to hex input mode. > > Reverting 3f83c87 would do the opposite of what you want; it'd make > extload/fatload require 0x prefixes instead of assuming hex. Perhaps > what you want is a tweak to that patch so that the generic load/ls > commands always expect a hex value, rather than requiring the 0x prefix? Well, that should be the result, yes. You mean the extload/fatload commands have been broken before that? OK, eventually the bug was introduced before that. BUt in any case it's a bug, and should be fixed. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Quantum Mechanics is God's version of "Trust me." ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_nvedit.c: setenv_hex must prefix hex with '0x'
On 10/04/2013 03:35 PM, Wolfgang Denk wrote: > Dear Tom Rini, > > In message <1380901758-30360-1-git-send-email-tr...@ti.com> you wrote: >> setenv_hex is only called with hex values, but does not prefix the >> strings with '0x', as in general U-Boot assumes hex values not decimal >> values, and this saves space in the environment. However, some >> functions such as 'load' take some values that are most easily described >> in hex (load address) and decimal (size, offset within a file). >> >> This can lead to the situation where, for example, spl export is run, >> which leads to a call of setenv_hex of the fdtaddr, which will be re-set >> in the environment. Then 'saveenv' may be run (after updating other >> parts of the environment for falcon mode), causing an invalid for 'load' >> fdtaddr to be saved to the environment and leading to future boots to >> fail if using 'load' to read the fdt file. > > I think this is not a correct way to fix the issues at hand. > > All U-Boot (with the single unfortunate exception of the "sleep" > command) defaults to hex input - that's what's documented, and what > people have always been using for many, many years. Applying your > patch means that we modify just a single use case, while setting the > same environment variables from the command line (without the leading > 0x) would still trigger a problem. > > I understand that the actual cause of these issues is commit 3f83c87 > "fs: fix number base behaviour change in fatload/ext*load". Reviewing > this patch I think that it should have never been applied. The fact > that "load" and "fatload" / "ext*load" behave differently are reason > enough to reject this patch. "load" should just behave like every > other command, and default to hex input. > > I think we should NAK your patch, and suggest to fix the problem by > reverting commit 3f83c87 and making "load" default to hex input mode. Reverting 3f83c87 would do the opposite of what you want; it'd make extload/fatload require 0x prefixes instead of assuming hex. Perhaps what you want is a tweak to that patch so that the generic load/ls commands always expect a hex value, rather than requiring the 0x prefix? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_nvedit.c: setenv_hex must prefix hex with '0x'
Dear Tom Rini, In message <1380901758-30360-1-git-send-email-tr...@ti.com> you wrote: > setenv_hex is only called with hex values, but does not prefix the > strings with '0x', as in general U-Boot assumes hex values not decimal > values, and this saves space in the environment. However, some > functions such as 'load' take some values that are most easily described > in hex (load address) and decimal (size, offset within a file). > > This can lead to the situation where, for example, spl export is run, > which leads to a call of setenv_hex of the fdtaddr, which will be re-set > in the environment. Then 'saveenv' may be run (after updating other > parts of the environment for falcon mode), causing an invalid for 'load' > fdtaddr to be saved to the environment and leading to future boots to > fail if using 'load' to read the fdt file. I think this is not a correct way to fix the issues at hand. All U-Boot (with the single unfortunate exception of the "sleep" command) defaults to hex input - that's what's documented, and what people have always been using for many, many years. Applying your patch means that we modify just a single use case, while setting the same environment variables from the command line (without the leading 0x) would still trigger a problem. I understand that the actual cause of these issues is commit 3f83c87 "fs: fix number base behaviour change in fatload/ext*load". Reviewing this patch I think that it should have never been applied. The fact that "load" and "fatload" / "ext*load" behave differently are reason enough to reject this patch. "load" should just behave like every other command, and default to hex input. I think we should NAK your patch, and suggest to fix the problem by reverting commit 3f83c87 and making "load" default to hex input mode. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Landing: a controlled mid-air collision with a planet. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] DDR setting, p1020 registers read
Hi I have got a P1020 board similar to Freescale P1020 eval board RDB. If I put the DDR size as 512 uboot works fine. But if I make it as 1G which is the real size on the board then the uboot hangs. Also is there any cli in uboot to read p1020 registers? I want to read GUTS_PORBMSR to check if HW has bootstrapping correctly done for booting two cores. Thanks Avinash ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 0/5] mtd: nand: omap: optimize and clean-up of OMAP NAND driver
Hi Scott, Tom,
> Subject: [PATCH v7 0/5] mtd: nand: omap: optimize and clean-up of OMAP
> NAND driver
>
> *changes in v7*
> [PATCH 1/5]
> - omap_gpmc.c: fix: free bytes in OOB (ecclayout-
> >oobfree[0].length)
> - omap_gpmc.c: cleanup: redundant code added in previous patch
> versions
> - am335x_evm.h: cleanup: redundant code added in previous patch
> versions
> - tricorder.h: fix: CONFIG_NAND_OMAP_ECCSCHEME
> [PATCH 2/5] removed: re-configuration of gpmc.config1[dev_width] added
> in
> previous version of patch
> [PATCH 3/5]
> [PATCH 4/5]
> [PATCH 5/5] minor fix: missing '$' in ${loadaddr}
>
>
Request you to please accept this patch series if everything is ok ?
This one is more of driver clean-up and restructuring.
And is independent of another patch-series..
[PATCH v2 0/4] enable support for x16 NAND devices
with regards, pekon
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Re: [U-Boot] [UBOOT][PATCHv4 6/6] README: qspi usecase and testing documentation.
May be your are missing my comments in previous post. - Please place these these readme files in doc/SPI/* - Please use the doc/SPI/status.txt as an example format for writing new readme files. On Sat, Oct 5, 2013 at 1:15 AM, Sourav Poddar wrote: > On Saturday 05 October 2013 12:08 AM, Jagan Teki wrote: >> >> Hi Sourav, >> >> Please place these these readme files in doc/SPI/* >> All these patches tested on top of u-boot-spi.git master-probe? > > Yes, this are tested on the above branch. > >> On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar >> wrote: >>> >>> Contains documentation and testing details for qspi flash >>> interface. >>> >>> Signed-off-by: Sourav Poddar >>> --- >>> doc/README.ti_qspi_dra_test | 38 ++ >>> doc/README.ti_qspi_flash| 47 >>> +++ >>> 2 files changed, 85 insertions(+), 0 deletions(-) >>> create mode 100644 doc/README.ti_qspi_dra_test >>> create mode 100644 doc/README.ti_qspi_flash >>> >>> diff --git a/doc/README.ti_qspi_dra_test b/doc/README.ti_qspi_dra_test >>> new file mode 100644 >>> index 000..c4540ea >>> --- /dev/null >>> +++ b/doc/README.ti_qspi_dra_test >>> @@ -0,0 +1,38 @@ >>> +- >>> + Simple steps used to test the QSPI at U-Boot >>> +- >>> + >>> +For #1, build the patched U-Boot and load MLO/u-boot.img >>> + >>> +-- >>> +Boot from another medium like MMC >>> +-- >>> + >>> +DRA752 EVM # mmc dev 0 >>> +DRA752 EVM # fatload mmc 0 0x8200 MLO >>> +DRA752 EVM # fatload mmc 0 0x8300 u-boot.img >>> + >>> +-- >>> +Commands to erase/write u-boot/mlo to flash device >>> +-- >>> + >>> +DRA752 EVM # sf probe 0 >>> +[should detect the S25FL256S serial flash device] >>> + >>> +DRA752 EVM # sf erase 0 1 >>> +DRA752 EVM # sf erase 1 1 >>> +DRA752 EVM # sf erase 2 1 >>> +DRA752 EVM # sf erase 3 1 >>> +DRA752 EVM # sf erase 4 1 >>> +DRA752 EVM # sf erase 5 1 >>> +DRA752 EVM # sf erase 6 1 >>> + >>> +DRA752 EVM # sf write 8200 0 1 >>> +DRA752 EVM # sf write 8300 2 7 >>> + >> >> These test procedure steps were done in real hw. >> Seems like written once, could be generic if you test these steps on >> real hw and palce the same >> log here... >> >>> +For #2, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power >>> +on. ROM should find the GP header at offset 0 and load/execute SPL. SPL >>> +then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to >>> +find a U-Boot image header at offset 0x2 (set in the config file) >>> +and proceeds to load that image using the U-Boot image payload >>> offset/size >>> +from the header. It will then start U-Boot. >>> diff --git a/doc/README.ti_qspi_flash b/doc/README.ti_qspi_flash >>> new file mode 100644 >>> index 000..1b86d01 >>> --- /dev/null >>> +++ b/doc/README.ti_qspi_flash >>> @@ -0,0 +1,47 @@ >>> +QSPI U-boot support >>> +-- >>> + >>> +Host processor is connected to serial flash device via qpsi >>> +interface. QSPI is a kind of spi module that allows single, >>> +dual and quad read access to external spi devices. The module >>> +has a memory mapped interface which provide direct interface >>> +for accessing data form external spi devices. >>> + >>> +The one QSPI in the device is primarily intended for fast booting >>> +from Quad SPI flash devices. >>> + >>> +Usecase >>> +--- >>> + >>> +MLO/u-boot.img will be flashed from SD/MMC to the flash device >>> +using serial flash erase and write commands. Then, switch settings >>> +will be changed to qspi boot. Then, the ROM code will read MLO >>> +from the predefined location in the flash, where it was flashed and >>> +execute it after storing it in SDRAM. Then, the MLO will read >>> +u-boot.img from flash and execute it from SDRAM. >>> + >>> +SPI mode >>> +--- >>> +SPI mode uses mtd spi framework for transfer and reception of data. >>> +Can be used in: >>> +1. Normal mode: use single pin for transfers >>> +2. Dual Mode: use two pins for transfers. >>> +3. Quad mode: use four pin for transfer >>> + >>> +Memory mapped read mode >>> +--- >>> +In this, SPI controller is configured using configuration port and then >>> +controler is switched to memory mapped port for data read. >>> + >>> +Driver >>> +-- >>> +drivers/qspi/ti_qspi.c >>> +- Newly created file which is responsible for configuring the >>> + qspi controller and also for providing the low level api which >>> + is responsible for transferring the datas from host controller >>> + to flash device and vice versa. >>> + >>> +Testing >>> +--- >>> +A seperated file named README.dra_qspi_test has been created which gives >>> all the >>
Re: [U-Boot] [UBOOT][PATCHv4 4/6] spi: add TI QSPI driver
On Sat, Oct 5, 2013 at 1:32 AM, Sourav Poddar wrote:
> On Saturday 05 October 2013 12:27 AM, Jagan Teki wrote:
>>
>> On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar
>> wrote:
>>>
>>> From: Matt Porter
>>>
>>> Adds a SPI master driver for the TI QSPI peripheral.
>>>
>>> Signed-off-by: Matt Porter
>>> Signed-off-by: Sourav Poddar
>>> [Added quad read support and memory mapped support).
>>
>> What is this comment, any specific?
>
> This simply tell the portion which i did in the patch.
May be not required, bcz it will come after i apply below s-o-b
>
>>> ---
>>
>> You missed change log for all patches, i think you have summarized in 0/6.
>> I feel it's better write it on individual patches.
>>
> Ok.
>
>>> drivers/spi/Makefile |1 +
>>> drivers/spi/ti_qspi.c | 328
>>> +
>>> 2 files changed, 329 insertions(+), 0 deletions(-)
>>> create mode 100644 drivers/spi/ti_qspi.c
>>>
>>> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
>>> index 91d24ce..e5941b0 100644
>>> --- a/drivers/spi/Makefile
>>> +++ b/drivers/spi/Makefile
>>> @@ -38,6 +38,7 @@ COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
>>> COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
>>> COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
>>> COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
>>> +COBJS-$(CONFIG_TI_QSPI) += ti_qspi.o
>>> COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
>>> COBJS-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
>>>
>>> diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
>>> new file mode 100644
>>> index 000..d8a03a8
>>> --- /dev/null
>>> +++ b/drivers/spi/ti_qspi.c
>>> @@ -0,0 +1,328 @@
>>> +/*
>>> + * TI QSPI driver
>>> + *
>>> + * Copyright (C) 2013, Texas Instruments, Incorporated
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0+
>>
>> Got below format after apply this patch - please check
>> *Â SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
>>
> ahh..I copied it from a patch on some list. May be something went wrong, I
> will check.
>
>>> + */
>>> +
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +
>>> +struct qspi_regs {
>>> +u32 pid;
>>> +u32 pad0[3];
>>> +u32 sysconfig;
>>> +u32 pad1[3];
>>> +u32 intr_status_raw_set;
>>> +u32 intr_status_enabled_clear;
>>> +u32 intr_enable_set;
>>> +u32 intr_enable_clear;
>>> +u32 intc_eoi;
>>> +u32 pad2[3];
>>> +u32 spi_clock_cntrl;
>>> +u32 spi_dc;
>>> +u32 spi_cmd;
>>> +u32 spi_status;
>>> +u32 spi_data;
>>> +u32 spi_setup0;
>>> +u32 spi_setup1;
>>> +u32 spi_setup2;
>>> +u32 spi_setup3;
>>> +u32 spi_switch;
>>> +u32 spi_data1;
>>> +u32 spi_data2;
>>> +u32 spi_data3;
>>
>> Please add tab space.
>>
> ok
>
>>> +};
>>> +
>>> +struct qspi_slave {
>>> + struct spi_slave slave;
>>> + struct qspi_regs *base;
>>> + unsigned int mode;
>>> + u32 cmd;
>>> + u32 dc;
>>> +};
>>> +
>>
>> -- TAG+
>>>
>>> +#define QSPI_TIMEOUT 200
>>> +
>>> +#define QSPI_FCLK 19200
>>> +
>>> +/* Clock Control */
>>> +#define QSPI_CLK_EN(1<< 31)
>>> +#define QSPI_CLK_DIV_MAX 0x
>>> +
>>> +/* Command */
>>> +#define QSPI_EN_CS(n) (n<< 28)
>>> +#define QSPI_WLEN(n) ((n-1)<< 19)
>>> +#define QSPI_3_PIN (1<< 18)
>>> +#define QSPI_RD_SNGL (1<< 16)
>>> +#define QSPI_WR_SNGL (2<< 16)
>>> +#define QSPI_INVAL (4<< 16)
>>> +#define QSPI_RD_QUAD (7<< 16)
>>> +
>>> +/* Device Control */
>>> +#define QSPI_DD(m, n) (m<< (3 + n*8))
>>> +#define QSPI_CKPHA(n) (1<< (2 + n*8))
>>> +#define QSPI_CSPOL(n) (1<< (1 + n*8))
>>> +#define QSPI_CKPOL(n) (1<< (n*8))
>>> +
>>> +/* Status */
>>> +#define QSPI_WC(1<< 1)
>>> +#define QSPI_BUSY (1<< 0)
>>> +#define QSPI_WC_BUSY (QSPI_WC | QSPI_BUSY)
>>> +#define QSPI_XFER_DONE QSPI_WC
>>> +
>>> +#define MM_SWITCH 0x01
>>> +#define MEM_CS 0x100
>>> +#define MEM_CS_UNSELECT0xf0ff
>>> +#define MMAP_START_ADDR0x5c00
>>> +#define CORE_CTRL_IO 0x4a002558
>>> +
>>> +#define QSPI_CMD_READ (0x3<< 0)
>>> +#define QSPI_CMD_READ_QUAD (0x6b<< 0)
>>> +#define QSPI_CMD_READ_FAST (0x0b<< 0)
>>> +#define QSPI_SETUP0_NUM_A_BYTES(0x2<< 8)
>>> +#define QSPI_SETUP0_NUM_D_BYTES_NO_BITS(0x0<< 10)
>>> +#define QSPI_SETUP0_NUM_D_BYTES_8_BITS (0x1<< 10)
>>> +#define QSPI_SETUP0_READ_NORMAL(0x0<< 12)
>>> +#define QSPI_SETUP0_READ_QUAD (0x3<< 12)
>>> +#define QSPI_CMD_WRITE (0x2<< 16)
>>> +#define QSPI_NUM_DUMMY_BITS(0x0<< 24)
>>
>> --TAG-
>>
>> TAG+ ... TAG- please move these macro definitions i
Re: [U-Boot] [UBOOT][PATCHv4 3/6] driver: mtd: spi: Add memory mapped read support
Please use the commit msg head as "sf: .."
On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar wrote:
> Qspi controller can have a memory mapped port which can be used for
> data read. Added support to enable memory mapped port read.
>
> This patch enables the following:
> - It enables exchange of memory map address between mtd and qspi
> through the introduction of "memory_map" flag.
> - Add support to communicate to the driver that memory mapped
> transfer is to be started through introduction of new flags like
> "SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".
>
> This will enable the spi controller to do memory mapped configurations
> if required.
>
> Signed-off-by: Sourav Poddar
> ---
> drivers/mtd/spi/sf_ops.c |2 ++
> drivers/mtd/spi/sf_probe.c |1 +
> include/spi.h |3 +++
> 3 files changed, 6 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
> index c009af5..bee4128 100644
> --- a/drivers/mtd/spi/sf_ops.c
> +++ b/drivers/mtd/spi/sf_ops.c
> @@ -269,7 +269,9 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32
> offset,
>
> /* Handle memory-mapped SPI */
> if (flash->memory_map) {
> + spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
> memcpy(data, flash->memory_map + offset, len);
> + spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
Is it correct, can you check it once.
where is SPI_XFER_MEM_MAP_END used?
Looks like you have used mem-map for only reads is it? if so where is
SPI_XFER_BEGIN is using?
Please use _MMAP instead of _MEM_MAP for simple naming convention.
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki,
E: jagannadh.t...@gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
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Re: [U-Boot] [UBOOT][PATCHv4 4/6] spi: add TI QSPI driver
On Saturday 05 October 2013 12:27 AM, Jagan Teki wrote:
On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar wrote:
From: Matt Porter
Adds a SPI master driver for the TI QSPI peripheral.
Signed-off-by: Matt Porter
Signed-off-by: Sourav Poddar
[Added quad read support and memory mapped support).
What is this comment, any specific?
This simply tell the portion which i did in the patch.
---
You missed change log for all patches, i think you have summarized in 0/6.
I feel it's better write it on individual patches.
Ok.
drivers/spi/Makefile |1 +
drivers/spi/ti_qspi.c | 328 +
2 files changed, 329 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/ti_qspi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 91d24ce..e5941b0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -38,6 +38,7 @@ COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
+COBJS-$(CONFIG_TI_QSPI) += ti_qspi.o
COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
COBJS-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
new file mode 100644
index 000..d8a03a8
--- /dev/null
+++ b/drivers/spi/ti_qspi.c
@@ -0,0 +1,328 @@
+/*
+ * TI QSPI driver
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated
+ *
+ * SPDX-License-Identifier: GPL-2.0+
Got below format after apply this patch - please check
*Â SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
ahh..I copied it from a patch on some list. May be something went wrong, I
will check.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+struct qspi_regs {
+u32 pid;
+u32 pad0[3];
+u32 sysconfig;
+u32 pad1[3];
+u32 intr_status_raw_set;
+u32 intr_status_enabled_clear;
+u32 intr_enable_set;
+u32 intr_enable_clear;
+u32 intc_eoi;
+u32 pad2[3];
+u32 spi_clock_cntrl;
+u32 spi_dc;
+u32 spi_cmd;
+u32 spi_status;
+u32 spi_data;
+u32 spi_setup0;
+u32 spi_setup1;
+u32 spi_setup2;
+u32 spi_setup3;
+u32 spi_switch;
+u32 spi_data1;
+u32 spi_data2;
+u32 spi_data3;
Please add tab space.
ok
+};
+
+struct qspi_slave {
+ struct spi_slave slave;
+ struct qspi_regs *base;
+ unsigned int mode;
+ u32 cmd;
+ u32 dc;
+};
+
-- TAG+
+#define QSPI_TIMEOUT 200
+
+#define QSPI_FCLK 19200
+
+/* Clock Control */
+#define QSPI_CLK_EN(1<< 31)
+#define QSPI_CLK_DIV_MAX 0x
+
+/* Command */
+#define QSPI_EN_CS(n) (n<< 28)
+#define QSPI_WLEN(n) ((n-1)<< 19)
+#define QSPI_3_PIN (1<< 18)
+#define QSPI_RD_SNGL (1<< 16)
+#define QSPI_WR_SNGL (2<< 16)
+#define QSPI_INVAL (4<< 16)
+#define QSPI_RD_QUAD (7<< 16)
+
+/* Device Control */
+#define QSPI_DD(m, n) (m<< (3 + n*8))
+#define QSPI_CKPHA(n) (1<< (2 + n*8))
+#define QSPI_CSPOL(n) (1<< (1 + n*8))
+#define QSPI_CKPOL(n) (1<< (n*8))
+
+/* Status */
+#define QSPI_WC(1<< 1)
+#define QSPI_BUSY (1<< 0)
+#define QSPI_WC_BUSY (QSPI_WC | QSPI_BUSY)
+#define QSPI_XFER_DONE QSPI_WC
+
+#define MM_SWITCH 0x01
+#define MEM_CS 0x100
+#define MEM_CS_UNSELECT0xf0ff
+#define MMAP_START_ADDR0x5c00
+#define CORE_CTRL_IO 0x4a002558
+
+#define QSPI_CMD_READ (0x3<< 0)
+#define QSPI_CMD_READ_QUAD (0x6b<< 0)
+#define QSPI_CMD_READ_FAST (0x0b<< 0)
+#define QSPI_SETUP0_NUM_A_BYTES(0x2<< 8)
+#define QSPI_SETUP0_NUM_D_BYTES_NO_BITS(0x0<< 10)
+#define QSPI_SETUP0_NUM_D_BYTES_8_BITS (0x1<< 10)
+#define QSPI_SETUP0_READ_NORMAL(0x0<< 12)
+#define QSPI_SETUP0_READ_QUAD (0x3<< 12)
+#define QSPI_CMD_WRITE (0x2<< 16)
+#define QSPI_NUM_DUMMY_BITS(0x0<< 24)
--TAG-
TAG+ ... TAG- please move these macro definitions in below headers
Ok.
+
+static inline struct qspi_slave *to_qspi_slave(struct spi_slave *slave)
+{
+ return container_of(slave, struct qspi_slave, slave);
+}
+static inline struct qspi_regs *get_qspi_bus(int dev)
+{
+ if (!dev)
+ return (struct qspi_regs *)QSPI_BASE;
+ else
+ return NULL;
+}
Is this function really required, how many bus controller you have?
Actually one.
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return 1;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ /* CS handled in xfer */
+ return;
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ /* CS handled i
Re: [U-Boot] [UBOOT][PATCHv4 6/6] README: qspi usecase and testing documentation.
On Saturday 05 October 2013 12:08 AM, Jagan Teki wrote: Hi Sourav, Please place these these readme files in doc/SPI/* All these patches tested on top of u-boot-spi.git master-probe? Yes, this are tested on the above branch. On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar wrote: Contains documentation and testing details for qspi flash interface. Signed-off-by: Sourav Poddar --- doc/README.ti_qspi_dra_test | 38 ++ doc/README.ti_qspi_flash| 47 +++ 2 files changed, 85 insertions(+), 0 deletions(-) create mode 100644 doc/README.ti_qspi_dra_test create mode 100644 doc/README.ti_qspi_flash diff --git a/doc/README.ti_qspi_dra_test b/doc/README.ti_qspi_dra_test new file mode 100644 index 000..c4540ea --- /dev/null +++ b/doc/README.ti_qspi_dra_test @@ -0,0 +1,38 @@ +- + Simple steps used to test the QSPI at U-Boot +- + +For #1, build the patched U-Boot and load MLO/u-boot.img + +-- +Boot from another medium like MMC +-- + +DRA752 EVM # mmc dev 0 +DRA752 EVM # fatload mmc 0 0x8200 MLO +DRA752 EVM # fatload mmc 0 0x8300 u-boot.img + +-- +Commands to erase/write u-boot/mlo to flash device +-- + +DRA752 EVM # sf probe 0 +[should detect the S25FL256S serial flash device] + +DRA752 EVM # sf erase 0 1 +DRA752 EVM # sf erase 1 1 +DRA752 EVM # sf erase 2 1 +DRA752 EVM # sf erase 3 1 +DRA752 EVM # sf erase 4 1 +DRA752 EVM # sf erase 5 1 +DRA752 EVM # sf erase 6 1 + +DRA752 EVM # sf write 8200 0 1 +DRA752 EVM # sf write 8300 2 7 + These test procedure steps were done in real hw. Seems like written once, could be generic if you test these steps on real hw and palce the same log here... +For #2, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power +on. ROM should find the GP header at offset 0 and load/execute SPL. SPL +then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to +find a U-Boot image header at offset 0x2 (set in the config file) +and proceeds to load that image using the U-Boot image payload offset/size +from the header. It will then start U-Boot. diff --git a/doc/README.ti_qspi_flash b/doc/README.ti_qspi_flash new file mode 100644 index 000..1b86d01 --- /dev/null +++ b/doc/README.ti_qspi_flash @@ -0,0 +1,47 @@ +QSPI U-boot support +-- + +Host processor is connected to serial flash device via qpsi +interface. QSPI is a kind of spi module that allows single, +dual and quad read access to external spi devices. The module +has a memory mapped interface which provide direct interface +for accessing data form external spi devices. + +The one QSPI in the device is primarily intended for fast booting +from Quad SPI flash devices. + +Usecase +--- + +MLO/u-boot.img will be flashed from SD/MMC to the flash device +using serial flash erase and write commands. Then, switch settings +will be changed to qspi boot. Then, the ROM code will read MLO +from the predefined location in the flash, where it was flashed and +execute it after storing it in SDRAM. Then, the MLO will read +u-boot.img from flash and execute it from SDRAM. + +SPI mode +--- +SPI mode uses mtd spi framework for transfer and reception of data. +Can be used in: +1. Normal mode: use single pin for transfers +2. Dual Mode: use two pins for transfers. +3. Quad mode: use four pin for transfer + +Memory mapped read mode +--- +In this, SPI controller is configured using configuration port and then +controler is switched to memory mapped port for data read. + +Driver +-- +drivers/qspi/ti_qspi.c +- Newly created file which is responsible for configuring the + qspi controller and also for providing the low level api which + is responsible for transferring the datas from host controller + to flash device and vice versa. + +Testing +--- +A seperated file named README.dra_qspi_test has been created which gives all the +details about the commands required to test qspi at u-boot level. -- 1.7.1 Please use the doc/SPI/status.txt as an example format for writing new readme files. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT][PATCHv4 4/6] spi: add TI QSPI driver
On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar wrote:
> From: Matt Porter
>
> Adds a SPI master driver for the TI QSPI peripheral.
>
> Signed-off-by: Matt Porter
> Signed-off-by: Sourav Poddar
> [Added quad read support and memory mapped support).
What is this comment, any specific?
> ---
You missed change log for all patches, i think you have summarized in 0/6.
I feel it's better write it on individual patches.
> drivers/spi/Makefile |1 +
> drivers/spi/ti_qspi.c | 328
> +
> 2 files changed, 329 insertions(+), 0 deletions(-)
> create mode 100644 drivers/spi/ti_qspi.c
>
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index 91d24ce..e5941b0 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -38,6 +38,7 @@ COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
> COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
> COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
> COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
> +COBJS-$(CONFIG_TI_QSPI) += ti_qspi.o
> COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
> COBJS-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
>
> diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
> new file mode 100644
> index 000..d8a03a8
> --- /dev/null
> +++ b/drivers/spi/ti_qspi.c
> @@ -0,0 +1,328 @@
> +/*
> + * TI QSPI driver
> + *
> + * Copyright (C) 2013, Texas Instruments, Incorporated
> + *
> + * SPDX-License-Identifier: GPL-2.0+
Got below format after apply this patch - please check
*Â SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +struct qspi_regs {
> +u32 pid;
> +u32 pad0[3];
> +u32 sysconfig;
> +u32 pad1[3];
> +u32 intr_status_raw_set;
> +u32 intr_status_enabled_clear;
> +u32 intr_enable_set;
> +u32 intr_enable_clear;
> +u32 intc_eoi;
> +u32 pad2[3];
> +u32 spi_clock_cntrl;
> +u32 spi_dc;
> +u32 spi_cmd;
> +u32 spi_status;
> +u32 spi_data;
> +u32 spi_setup0;
> +u32 spi_setup1;
> +u32 spi_setup2;
> +u32 spi_setup3;
> +u32 spi_switch;
> +u32 spi_data1;
> +u32 spi_data2;
> +u32 spi_data3;
Please add tab space.
> +};
> +
> +struct qspi_slave {
> + struct spi_slave slave;
> + struct qspi_regs *base;
> + unsigned int mode;
> + u32 cmd;
> + u32 dc;
> +};
> +
-- TAG+
> +#define QSPI_TIMEOUT 200
> +
> +#define QSPI_FCLK 19200
> +
> +/* Clock Control */
> +#define QSPI_CLK_EN(1 << 31)
> +#define QSPI_CLK_DIV_MAX 0x
> +
> +/* Command */
> +#define QSPI_EN_CS(n) (n << 28)
> +#define QSPI_WLEN(n) ((n-1) << 19)
> +#define QSPI_3_PIN (1 << 18)
> +#define QSPI_RD_SNGL (1 << 16)
> +#define QSPI_WR_SNGL (2 << 16)
> +#define QSPI_INVAL (4 << 16)
> +#define QSPI_RD_QUAD (7 << 16)
> +
> +/* Device Control */
> +#define QSPI_DD(m, n) (m << (3 + n*8))
> +#define QSPI_CKPHA(n) (1 << (2 + n*8))
> +#define QSPI_CSPOL(n) (1 << (1 + n*8))
> +#define QSPI_CKPOL(n) (1 << (n*8))
> +
> +/* Status */
> +#define QSPI_WC(1 << 1)
> +#define QSPI_BUSY (1 << 0)
> +#define QSPI_WC_BUSY (QSPI_WC | QSPI_BUSY)
> +#define QSPI_XFER_DONE QSPI_WC
> +
> +#define MM_SWITCH 0x01
> +#define MEM_CS 0x100
> +#define MEM_CS_UNSELECT0xf0ff
> +#define MMAP_START_ADDR0x5c00
> +#define CORE_CTRL_IO 0x4a002558
> +
> +#define QSPI_CMD_READ (0x3 << 0)
> +#define QSPI_CMD_READ_QUAD (0x6b << 0)
> +#define QSPI_CMD_READ_FAST (0x0b << 0)
> +#define QSPI_SETUP0_NUM_A_BYTES(0x2 << 8)
> +#define QSPI_SETUP0_NUM_D_BYTES_NO_BITS(0x0 << 10)
> +#define QSPI_SETUP0_NUM_D_BYTES_8_BITS (0x1 << 10)
> +#define QSPI_SETUP0_READ_NORMAL(0x0 << 12)
> +#define QSPI_SETUP0_READ_QUAD (0x3 << 12)
> +#define QSPI_CMD_WRITE (0x2 << 16)
> +#define QSPI_NUM_DUMMY_BITS(0x0 << 24)
--TAG-
TAG+ ... TAG- please move these macro definitions in below headers
> +
> +static inline struct qspi_slave *to_qspi_slave(struct spi_slave *slave)
> +{
> + return container_of(slave, struct qspi_slave, slave);
> +}
> +static inline struct qspi_regs *get_qspi_bus(int dev)
> +{
> + if (!dev)
> + return (struct qspi_regs *)QSPI_BASE;
> + else
> + return NULL;
> +}
Is this function really required, how many bus controller you have?
> +
> +int spi_cs_is_valid(unsigned int bus, unsigned int cs)
> +{
> + return 1;
> +}
> +
> +void spi_cs_activate(struct spi_slave *slave)
> +{
> + /* CS handled in xfer */
> + return;
> +}
> +
> +void spi_cs_deactivat
[U-Boot] [PATCH] dra7xx_evm: Enabled UART-boot mode and add dra7xx_evm_uart3 build
From: Minal Shah UART booting is supported on this SoC, but via UART3 rather than UART1. Because of this we must change the board to use UART3 for all console access (only one UART is exposed on this board and a slight HW mod is required to switch UARTs). Signed-off-by: Minal Shah [trini: Make apply to mainline, reword commit] Signed-off-by: Tom Rini --- arch/arm/include/asm/arch-omap5/spl.h |1 + boards.cfg|3 ++- include/configs/dra7xx_evm.h |9 +++-- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-omap5/spl.h b/arch/arm/include/asm/arch-omap5/spl.h index fe8b0c0..1fdaa75 100644 --- a/arch/arm/include/asm/arch-omap5/spl.h +++ b/arch/arm/include/asm/arch-omap5/spl.h @@ -15,6 +15,7 @@ #define BOOT_DEVICE_MMC15 #define BOOT_DEVICE_MMC26 #define BOOT_DEVICE_MMC2_2 7 +#define BOOT_DEVICE_UART 0x43 #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2 diff --git a/boards.cfg b/boards.cfg index dbd8479..57505b0 100644 --- a/boards.cfg +++ b/boards.cfg @@ -329,7 +329,8 @@ Active arm armv7 omap3 ti sdp3430 Active arm armv7 omap3 timll devkit8000 devkit8000 - Thomas Weber Active arm armv7 omap4 ti panda omap4_panda - Sricharan R Active arm armv7 omap4 ti sdp4430 omap4_sdp4430- Sricharan R -Active arm armv7 omap5 ti dra7xx dra7xx_evm - Lokesh Vutla +Active arm armv7 omap5 ti dra7xx dra7xx_evm dra7xx_evm:CONS_INDEX=1 Lokesh Vutla +Active arm armv7 omap5 ti dra7xx dra7xx_evm_uart3 dra7xx_evm:CONS_INDEX=3,SPL_YMODEM_SUPPORT Lokesh Vutla Active arm armv7 omap5 ti omap5_uevm omap5_uevm - - Active arm armv7 rmobile atmark-techno armadillo-800evaarmadillo-800eva - Nobuhiro Iwamatsu Active arm armv7 rmobile kmc kzm9g kzm9g- Nobuhiro Iwamatsu :Tetsuyuki Kobayashi diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 7b120de..a0b0d3f 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -22,9 +22,14 @@ #define CONFIG_SYS_REDUNDAND_ENVIRONMENT #define CONFIG_CMD_SAVEENV +#if (CONFIG_CONS_INDEX == 1) #define CONSOLEDEV "ttyO0" -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1UART1_BASE +#elif (CONFIG_CONS_INDEX == 3) +#define CONSOLEDEV "ttyO2" +#endif +#define CONFIG_SYS_NS16550_COM1UART1_BASE /* Base EVM has UART0 */ +#define CONFIG_SYS_NS16550_COM2UART2_BASE /* UART2 */ +#define CONFIG_SYS_NS16550_COM3UART3_BASE /* UART3 */ #define CONFIG_BAUDRATE115200 #define CONFIG_SYS_OMAP_ABE_SYSCK -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-arm/master
On Thu, Oct 03, 2013 at 10:42:46PM +0200, Albert ARIBAUD wrote: > Hello Tom, > > The following changes since commit > f04c53762962280365005c9db12ab561a18f2692: > > Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-10-02 > 14:53:27 +0200) > > are available in the git repository at: > > > git://git.denx.De/u-boot-arm master > > for you to fetch changes up to e261c83aa04ce0396d57aaecf8dfe0970ffac03e: > > ARM: VExpress: enable ARMv7 virt support for VExpress A15 (2013-10-03 > 21:28:57 +0200) > > > Andre Przywara (8): > ARM: prepare armv7.h to be included from assembly source > ARM: add secure monitor handler to switch to non-secure state > ARM: add assembly routine to switch to non-secure state > ARM: add C function to switch to non-secure state > ARM: trigger non-secure state switch during bootm execution > ARM: add SMP support for non-secure switch > ARM: extend non-secure switch to also go into HYP mode > ARM: VExpress: enable ARMv7 virt support for VExpress A15 Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT][PATCHv4 6/6] README: qspi usecase and testing documentation.
Hi Sourav, Please place these these readme files in doc/SPI/* All these patches tested on top of u-boot-spi.git master-probe? On Fri, Oct 4, 2013 at 8:21 PM, Sourav Poddar wrote: > Contains documentation and testing details for qspi flash > interface. > > Signed-off-by: Sourav Poddar > --- > doc/README.ti_qspi_dra_test | 38 ++ > doc/README.ti_qspi_flash| 47 > +++ > 2 files changed, 85 insertions(+), 0 deletions(-) > create mode 100644 doc/README.ti_qspi_dra_test > create mode 100644 doc/README.ti_qspi_flash > > diff --git a/doc/README.ti_qspi_dra_test b/doc/README.ti_qspi_dra_test > new file mode 100644 > index 000..c4540ea > --- /dev/null > +++ b/doc/README.ti_qspi_dra_test > @@ -0,0 +1,38 @@ > +- > + Simple steps used to test the QSPI at U-Boot > +- > + > +For #1, build the patched U-Boot and load MLO/u-boot.img > + > +-- > +Boot from another medium like MMC > +-- > + > +DRA752 EVM # mmc dev 0 > +DRA752 EVM # fatload mmc 0 0x8200 MLO > +DRA752 EVM # fatload mmc 0 0x8300 u-boot.img > + > +-- > +Commands to erase/write u-boot/mlo to flash device > +-- > + > +DRA752 EVM # sf probe 0 > +[should detect the S25FL256S serial flash device] > + > +DRA752 EVM # sf erase 0 1 > +DRA752 EVM # sf erase 1 1 > +DRA752 EVM # sf erase 2 1 > +DRA752 EVM # sf erase 3 1 > +DRA752 EVM # sf erase 4 1 > +DRA752 EVM # sf erase 5 1 > +DRA752 EVM # sf erase 6 1 > + > +DRA752 EVM # sf write 8200 0 1 > +DRA752 EVM # sf write 8300 2 7 > + These test procedure steps were done in real hw. Seems like written once, could be generic if you test these steps on real hw and palce the same log here... > +For #2, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power > +on. ROM should find the GP header at offset 0 and load/execute SPL. SPL > +then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to > +find a U-Boot image header at offset 0x2 (set in the config file) > +and proceeds to load that image using the U-Boot image payload offset/size > +from the header. It will then start U-Boot. > diff --git a/doc/README.ti_qspi_flash b/doc/README.ti_qspi_flash > new file mode 100644 > index 000..1b86d01 > --- /dev/null > +++ b/doc/README.ti_qspi_flash > @@ -0,0 +1,47 @@ > +QSPI U-boot support > +-- > + > +Host processor is connected to serial flash device via qpsi > +interface. QSPI is a kind of spi module that allows single, > +dual and quad read access to external spi devices. The module > +has a memory mapped interface which provide direct interface > +for accessing data form external spi devices. > + > +The one QSPI in the device is primarily intended for fast booting > +from Quad SPI flash devices. > + > +Usecase > +--- > + > +MLO/u-boot.img will be flashed from SD/MMC to the flash device > +using serial flash erase and write commands. Then, switch settings > +will be changed to qspi boot. Then, the ROM code will read MLO > +from the predefined location in the flash, where it was flashed and > +execute it after storing it in SDRAM. Then, the MLO will read > +u-boot.img from flash and execute it from SDRAM. > + > +SPI mode > +--- > +SPI mode uses mtd spi framework for transfer and reception of data. > +Can be used in: > +1. Normal mode: use single pin for transfers > +2. Dual Mode: use two pins for transfers. > +3. Quad mode: use four pin for transfer > + > +Memory mapped read mode > +--- > +In this, SPI controller is configured using configuration port and then > +controler is switched to memory mapped port for data read. > + > +Driver > +-- > +drivers/qspi/ti_qspi.c > +- Newly created file which is responsible for configuring the > + qspi controller and also for providing the low level api which > + is responsible for transferring the datas from host controller > + to flash device and vice versa. > + > +Testing > +--- > +A seperated file named README.dra_qspi_test has been created which gives all > the > +details about the commands required to test qspi at u-boot level. > -- > 1.7.1 > Please use the doc/SPI/status.txt as an example format for writing new readme files. -- Thanks, Jagan. Jagannadha Sutradharudu Teki, E: jagannadh.t...@gmail.com, P: +91-9676773388 Engineer - System Software Hacker U-boot - SPI Custodian and Zynq APSOC Ln: http://www.linkedin.com/in/jaganteki ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/10] usb:udc:s3c: Reduce dcache invalidate range for UDC receive buffer
Dear Lukasz Majewski, > Hi Marek, > > > Dear Lukasz Majewski, > > > > > Hi Marek, > > > > > > > Dear Lukasz Majewski, > > > > > > > > > Hi Marek, > > > > > > > > > > > Dear Lukasz Majewski, > > > > > > > > > > > > > The s3c udc driver sends data in a max packet size. > > > > > > > Therefore the dcache invalidate range shall be equal to max > > > > > > > packet, not the entire DMA_BUFFER_SIZE. > > > > > > > > > > > > > > Signed-off-by: Lukasz Majewski > > > > > > > Cc: Marek Vasut > > > > > > > --- > > > > > > > > > > > > > > drivers/usb/gadget/s3c_udc_otg_xfer_dma.c |2 +- > > > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > > > > > diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > > > > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index > > > > > > > d7af5e9..5e3ba76 100644 --- > > > > > > > a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ > > > > > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -117,7 > > > > > > > +117,7 @@ static int setdma_rx(struct s3c_ep *ep, struct > > > > > > > s3c_request *req) > > > > > > > > > > > > > > invalidate_dcache_range((unsigned long) > > > > > > > > > > > > > > ep->dev->dma_buf[ep_num], (unsigned long) > > > > > > > ep->dev->dma_buf[ep_num] > > > > > > > - + DMA_BUFFER_SIZE); > > > > > > > + + ep->ep.maxpacket); > > > > > > > > > > > > Is this maxpacket _always_ multiple of cacheline big or will > > > > > > you need some ROUND_UP() call here ? > > > > > > > > > > The maxpacket value is equal to 64 B for EP0 and 512 B for EP1 > > > > > and EP2 (wMaxPacketSize field of the descriptor). > > > > > > > > > > Moreover this invalidation is done on already memaligned buffer > > > > > (which is 16 KiB). In other words, we are copying data to > > > > > specially prepared buffer (per UDC device EP, not usb_request). > > > > > > > > > > In my opinion the maxpacket don't need to be rounded up. > > > > > > > > So it can never happen that ep maxpacket is unaligned? > > > > > > maxpacket can be defined as e.g. 16 Bytes (wMaxPacketSize). > > > > > > However the underlying buffer (on which we perform dcache > > > invalidation) is already cache line aware (defined with memalign). > > > Also we copy the usb request data there (yes I know that this is not > > > the best possible solution). Afterwards address of this buffer is a > > > starting point for DMA. > > > Since we are sending in the HW one packet at a time (with maxpacket > > > size), then it should be enough to invalidate only up to 512 B. > > > Previously the whole buffer (DMA_BUFFER_SIZE -> 16 KiB) was > > > invalidated each time. > > > > > > Since we are invalidating cache content corresponding to buffer > > > mapped memory, we are safe when D-cache controller invalidates 32B > > > (CACHE_LINE_SIZE) instead of 16B. > > > > I get it, but if the size is lower than CACHE_LINE_SIZE, it will not > > get invalidated at all. > > I've looked into the v7_dcache_inval_range() function at cache_v7.c > and you are right here. > Cache doesn't touch the last and fist line if they aren't properly > aligned. Obviously I need ROUND(CACHE_LINE_SIZE) there. > > Thanks for opening my eyes > > > Thus the roundup might be needed. > > > > > > > > Best regards, > > > > > > Marek Vasut > > > > > > > > > > Since this is Samsung's UDC specific (not THOR download) - > > > > > would it be possible to take this patch from this patch series > > > > > (of course if my above rationale is acceptable for you)? > > > > > > > > You mean for .10 ? > > > > > > This patch hasn't introduced regressions for DFU/UMS. It can be > > > applied to .10 or to u-boot-usb/next. > > > > If it's not an explicit fix, this will go to -next > > I will prepare v2 with rounding here. Thanks ;-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] config/sandbox: Add EFI and GPT support
From: Egbert Eich Signed-off-by: Egbert Eich --- include/configs/sandbox.h | 4 1 file changed, 4 insertions(+) diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 4027030..b18cafb 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -44,6 +44,10 @@ #define CONFIG_SANDBOX_GPIO #define CONFIG_SANDBOX_GPIO_COUNT 20 +#define CONFIG_CMD_GPT +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION + /* * Size of malloc() pool, although we don't actually use this yet. */ -- 1.8.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] config: Define HAVE_BLOCK_DEVICE when CONFIG_CMD_GPT is set
From: Egbert Eich Signed-off-by: Egbert Eich --- include/config_fallbacks.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index e59ee96..5c8acdb 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -48,6 +48,7 @@ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ defined(CONFIG_CMD_PART) || \ + defined(CONFIG_CMD_GPT) || \ defined(CONFIG_MMC) || \ defined(CONFIG_SYSTEMACE) #define HAVE_BLOCK_DEVICE -- 1.8.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/10] usb:udc:s3c: Reduce dcache invalidate range for UDC receive buffer
Hi Marek, > Dear Lukasz Majewski, > > > Hi Marek, > > > > > Dear Lukasz Majewski, > > > > > > > Hi Marek, > > > > > > > > > Dear Lukasz Majewski, > > > > > > > > > > > The s3c udc driver sends data in a max packet size. > > > > > > Therefore the dcache invalidate range shall be equal to max > > > > > > packet, not the entire DMA_BUFFER_SIZE. > > > > > > > > > > > > Signed-off-by: Lukasz Majewski > > > > > > Cc: Marek Vasut > > > > > > --- > > > > > > > > > > > > drivers/usb/gadget/s3c_udc_otg_xfer_dma.c |2 +- > > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > > > diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > > > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index > > > > > > d7af5e9..5e3ba76 100644 --- > > > > > > a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ > > > > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -117,7 > > > > > > +117,7 @@ static int setdma_rx(struct s3c_ep *ep, struct > > > > > > s3c_request *req) > > > > > > > > > > > > invalidate_dcache_range((unsigned long) > > > > > > > > > > > > ep->dev->dma_buf[ep_num], (unsigned long) > > > > > > ep->dev->dma_buf[ep_num] > > > > > > - + DMA_BUFFER_SIZE); > > > > > > + + ep->ep.maxpacket); > > > > > > > > > > Is this maxpacket _always_ multiple of cacheline big or will > > > > > you need some ROUND_UP() call here ? > > > > > > > > The maxpacket value is equal to 64 B for EP0 and 512 B for EP1 > > > > and EP2 (wMaxPacketSize field of the descriptor). > > > > > > > > Moreover this invalidation is done on already memaligned buffer > > > > (which is 16 KiB). In other words, we are copying data to > > > > specially prepared buffer (per UDC device EP, not usb_request). > > > > > > > > In my opinion the maxpacket don't need to be rounded up. > > > > > > So it can never happen that ep maxpacket is unaligned? > > > > maxpacket can be defined as e.g. 16 Bytes (wMaxPacketSize). > > > > However the underlying buffer (on which we perform dcache > > invalidation) is already cache line aware (defined with memalign). > > Also we copy the usb request data there (yes I know that this is not > > the best possible solution). Afterwards address of this buffer is a > > starting point for DMA. > > Since we are sending in the HW one packet at a time (with maxpacket > > size), then it should be enough to invalidate only up to 512 B. > > Previously the whole buffer (DMA_BUFFER_SIZE -> 16 KiB) was > > invalidated each time. > > > > Since we are invalidating cache content corresponding to buffer > > mapped memory, we are safe when D-cache controller invalidates 32B > > (CACHE_LINE_SIZE) instead of 16B. > > I get it, but if the size is lower than CACHE_LINE_SIZE, it will not > get invalidated at all. I've looked into the v7_dcache_inval_range() function at cache_v7.c and you are right here. Cache doesn't touch the last and fist line if they aren't properly aligned. Obviously I need ROUND(CACHE_LINE_SIZE) there. Thanks for opening my eyes > Thus the roundup might be needed. > > > > > > Best regards, > > > > > Marek Vasut > > > > > > > > Since this is Samsung's UDC specific (not THOR download) - > > > > would it be possible to take this patch from this patch series > > > > (of course if my above rationale is acceptable for you)? > > > > > > You mean for .10 ? > > > > This patch hasn't introduced regressions for DFU/UMS. It can be > > applied to .10 or to u-boot-usb/next. > > If it's not an explicit fix, this will go to -next I will prepare v2 with rounding here. > > Best regards, -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6] usb: new board-specific USB init interface
This commit unifies board-specific USB initialization implementations
under one symbol (usb_board_init), declaration of which is available in
usb.h.
New API allows selective initialization of USB controllers whenever needed.
Signed-off-by: Mateusz Zalega
Signed-off-by: Kyungmin Park
Reviewed-by: Lukasz Majewski
Cc: Marek Vasut
Cc: Lukasz Majewski
---
Changes since RFC (v1):
- NVIDIA Tegra doesn't postpone its USB init anymore
- board_usb_init()'s sole argument name was shortened
- networking code comment style (/* blurb...) dropped
- squashed RFC changes so that patch won't break bisect
v2 changes:
- commit message fixup
v3 changes:
- added 'index' argument to perform selective port initialization
v4 changes:
- board_usb_init_fail() renamed to board_usb_cleanup()
- board_usb_cleanup() accepts controller index and init type
- DFU and UMS commands don't init all USB controllers anymore
- minor related fixes & refactorization
v5 changes:
- fixed an issue with boards based on canyonlands.c
- patch passes MAKEALL -a powerpc (vide: ^)
v6 changes:
- rebased onto usb/next
---
arch/arm/include/asm/arch-tegra/usb.h | 3 +-
arch/arm/include/asm/ehci-omap.h | 4 +--
board/amcc/canyonlands/canyonlands.c | 5 +--
board/balloon3/balloon3.c | 7 +++--
board/compulab/cm_t35/cm_t35.c| 2 +-
board/esd/apc405/apc405.c | 8 ++---
board/esd/pmc440/pmc440.c | 8 ++---
board/htkw/mcx/mcx.c | 2 +-
board/icpdas/lp8x4x/lp8x4x.c | 7 +++--
board/nvidia/common/board.c | 4 ++-
board/samsung/trats/trats.c | 5 +--
board/technexion/twister/twister.c| 2 +-
board/teejet/mt_ventoux/mt_ventoux.c | 2 +-
board/ti/beagle/beagle.c | 2 +-
board/ti/omap5_uevm/evm.c | 2 +-
board/ti/panda/panda.c| 2 +-
board/toradex/colibri_pxa270/colibri_pxa270.c | 7 +++--
board/trizepsiv/conxs.c | 7 +++--
board/vpac270/vpac270.c | 7 +++--
common/cmd_dfu.c | 30 ++
common/cmd_usb_mass_storage.c | 44 ++-
common/usb.c | 6
drivers/dfu/dfu.c | 2 +-
drivers/usb/host/ehci-omap.c | 12 ++--
drivers/usb/host/ehci-tegra.c | 2 +-
drivers/usb/host/ohci-hcd.c | 4 +--
drivers/usb/host/ohci.h | 11 +++
include/g_dnl.h | 2 --
include/usb.h | 30 --
include/usb_mass_storage.h| 13 +++-
30 files changed, 138 insertions(+), 104 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra/usb.h
b/arch/arm/include/asm/arch-tegra/usb.h
index f66257c..a1efd07 100644
--- a/arch/arm/include/asm/arch-tegra/usb.h
+++ b/arch/arm/include/asm/arch-tegra/usb.h
@@ -131,8 +131,7 @@
/* USB3_IF_USB_PHY_VBUS_SENSORS_0 */
#define VBUS_VLD_STS (1 << 26)
-
/* Setup USB on the board */
-int board_usb_init(const void *blob);
+int usb_process_devicetree(const void *blob);
#endif /* _TEGRA_USB_H_ */
diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
index ac83a53..c7bca05 100644
--- a/arch/arm/include/asm/ehci-omap.h
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -145,8 +145,8 @@ struct omap_ehci {
struct ehci_hccr;
struct ehci_hcor;
-int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor);
+int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor);
int omap_ehci_hcd_stop(void);
#endif /* _OMAP_COMMON_EHCI_H_ */
diff --git a/board/amcc/canyonlands/canyonlands.c
b/board/amcc/canyonlands/canyonlands.c
index cc36f45..395095e 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -16,6 +16,7 @@
#include
#include
#include
+#include
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips */
@@ -188,7 +189,7 @@ int board_early_init_f(void)
}
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(int index, enum board_usb_init_type init)
{
struct board_bcsr *bcsr_data =
(struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
@@ -229,7 +230,7 @@ int usb_board_stop(void)
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum board_usb_init_type init)
{
return usb_board_stop();
}
diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c
index ecbac16..19c0e02 100644
--- a/board/balloon3/ba
[U-Boot] [Patch v3] cmd/gpt: Support gpt command for all devices
From: Egbert Eich
The gpt command was only implemented for mmc devices. There is no reason
why this command should not be generalized and be applied all other
storage device classes.
This change both simplifies the implementation and eliminates a
build failure for systems that don't support mmcs.
Signed-off-by: Egbert Eich
---
Changes for v2:
- Coding style cleanup.
Changes for v3:
- Removed wrong '&'
- Removed unused variable
- Fixed argument checking
Spotted by Piotr Wilczek
common/cmd_gpt.c | 45 +++--
1 file changed, 19 insertions(+), 26 deletions(-)
diff --git a/common/cmd_gpt.c b/common/cmd_gpt.c
index a46f5cc..17b1180 100644
--- a/common/cmd_gpt.c
+++ b/common/cmd_gpt.c
@@ -11,7 +11,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -122,7 +121,7 @@ static int set_gpt_info(block_dev_desc_t *dev_desc,
int errno = 0;
uint64_t size_ll, start_ll;
- debug("%s: MMC lba num: 0x%x %d\n", __func__,
+ debug("%s: lba num: 0x%x %d\n", __func__,
(unsigned int)dev_desc->lba, (unsigned int)dev_desc->lba);
if (str_part == NULL)
@@ -235,25 +234,18 @@ err:
return errno;
}
-static int gpt_mmc_default(int dev, const char *str_part)
+static int gpt_default(block_dev_desc_t *blk_dev_desc, const char *str_part)
{
int ret;
char *str_disk_guid;
u8 part_count = 0;
disk_partition_t *partitions = NULL;
- struct mmc *mmc = find_mmc_device(dev);
-
- if (mmc == NULL) {
- printf("%s: mmc dev %d NOT available\n", __func__, dev);
- return CMD_RET_FAILURE;
- }
-
if (!str_part)
return -1;
/* fill partitions */
- ret = set_gpt_info(&mmc->block_dev, str_part,
+ ret = set_gpt_info(blk_dev_desc, str_part,
&str_disk_guid, &partitions, &part_count);
if (ret) {
if (ret == -1)
@@ -266,7 +258,7 @@ static int gpt_mmc_default(int dev, const char *str_part)
}
/* save partitions layout to disk */
- gpt_restore(&mmc->block_dev, str_disk_guid, partitions, part_count);
+ gpt_restore(blk_dev_desc, str_disk_guid, partitions, part_count);
free(str_disk_guid);
free(partitions);
@@ -287,27 +279,28 @@ static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
int ret = CMD_RET_SUCCESS;
int dev = 0;
- char *pstr;
if (argc < 5)
return CMD_RET_USAGE;
/* command: 'write' */
if ((strcmp(argv[1], "write") == 0) && (argc == 5)) {
- /* device: 'mmc' */
- if (strcmp(argv[2], "mmc") == 0) {
- /* check if 'dev' is a number */
- for (pstr = argv[3]; *pstr != '\0'; pstr++)
- if (!isdigit(*pstr)) {
- printf("'%s' is not a number\n",
- argv[3]);
- return CMD_RET_USAGE;
- }
- dev = (int)simple_strtoul(argv[3], NULL, 10);
- /* write to mmc */
- if (gpt_mmc_default(dev, argv[4]))
- return CMD_RET_FAILURE;
+ char *ep;
+ block_dev_desc_t *blk_dev_desc;
+ dev = (int)simple_strtoul(argv[3], &ep, 10);
+ if (!ep || ep[0] != '\0') {
+ printf("'%s' is not a number\n", argv[3]);
+ return CMD_RET_USAGE;
}
+ blk_dev_desc = get_dev(argv[2], dev);
+ if (!blk_dev_desc) {
+ printf("%s: %s dev %d NOT available\n",
+ __func__, argv[2], dev);
+ return CMD_RET_FAILURE;
+ }
+
+ if (gpt_default(blk_dev_desc, argv[4]))
+ return CMD_RET_FAILURE;
} else {
return CMD_RET_USAGE;
}
--
1.8.1.4
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Re: [U-Boot] [PATCH] env_mmc: fix buffer allocation for armv7
On Fri, Oct 04, 2013 at 03:48:03PM +0200, Markus Niebel wrote: > From: Markus Niebel > > commit d196bd880347373237d73e0d115b4d51c68cf2ad adds > redundand environment to mmc. The usage of malloc in > env_relocate_spec triggers cache errors on armv7. > > Tested on a not mainlined i.MX53 board: > > Board: TQMa53 > I2C: ready > DRAM: 512 MiB > MMC: FSL_SDHC: 0, FSL_SDHC: 1 > ERROR: v7_dcache_inval_range - start address is not aligned - 0x8f57c2d8 > ERROR: v7_dcache_inval_range - stop address is not aligned - 0x8f57e2d8 > ERROR: v7_dcache_inval_range - start address is not aligned - 0x8f57e2e0 > ERROR: v7_dcache_inval_range - stop address is not aligned - 0x8f5802e0 > Using default environment > > Signed-off-by: Markus Niebel I really don't like this. We're now allocating for example 256KiB on the stack, rather than malloc. I posted a patch recently to convert the non-redundant case to malloc instead for this reason. I believe the answer is we need to be using memalign here, like common/bouncebuf.c::bounce_buffer_start does. Can you do this? If not, can you test a patch? Thanks. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] arm64: Add tool to statically apply RELA relocations
On Sat, 2013-10-05 at 00:10 +0800, FengHua wrote: > > ARM64 uses the newer RELA-style relocations rather than the older REL. > > RELA relocations have an addend in the relocation struct, rather than > > expecting the loader to read a value from the location to be updated. > > > > While this is beneficial for ordinary program loading, it's problematic > > How it is beneficial than rel format? It avoids the need to read anything other than the rela descriptor, and thus makes relocation faster. > Why aarch64-gcc use rela format only instead of supporting two format? > these confuse me a few months. It's probably specified by the ABI which type to use, and it's not worth adding toolchain support for something different just for weird cases like this. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] arm64: Non-manual relocation
On Sat, 2013-10-05 at 00:13 +0800, FengHua wrote: > > diff --git a/include/configs/vexpress_aemv8a.h > > b/include/configs/vexpress_aemv8a.h > > index 01c95f5..3932e00 100644 > > --- a/include/configs/vexpress_aemv8a.h > > +++ b/include/configs/vexpress_aemv8a.h > > @@ -10,6 +10,9 @@ > > > > #define DEBUG > > > > +#define CONFIG_REMAKE_ELF > > +#define CONFIG_STATIC_RELA > > + > CONFIG_STATIC_RELA is always needed, How about remove this macro. It's always needed for arm64, but not for all architectures. I don't want to just use CONFIG_ARM64 because in theory another arch could be added that needs it. Eventually this should be moved out of the board config and into a file that defines general arm64 stuff. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/9][v2] net: tsec: Use portable types and accessors for BDs
On 10/4/2013 6:50 PM, Scott Wood wrote:
On Fri, 2013-10-04 at 11:27 +0300, Claudiu Manoil wrote:
On 10/3/2013 9:37 PM, Scott Wood wrote:
On Thu, 2013-10-03 at 14:48 +0300, Claudiu Manoil wrote:
+static inline u16 read_txbd_stat(uint idx)
+{
+ return in_be16((u16 __iomem *)&txbd[idx].status);
+}
+
+static inline void write_txbd_stat(uint idx, u16 status)
+{
+ out_be16((u16 __iomem *)&txbd[idx].status, status);
+}
+
+static inline u16 read_rxbd_stat(uint idx)
+{
+ return in_be16((u16 __iomem *)&rxbd[idx].status);
+}
+
+static inline void write_rxbd_stat(uint idx, u16 status)
+{
+ out_be16((u16 __iomem *)&rxbd[idx].status, status);
+}
Do you need __force on these to make sparse happy?
No, we don't need __force in this case, in_be/out_be are less
restrictive and take plain unsigned pointers (not __beNN pointers).
On the other hand, they require the __iomem address space marker, to
make sparse happy.
I thought you'd need __force to convert a non-iomem pointer to an
__iomem pointer.
I'd rather see these declared as __iomem than use casts (at which point,
you probably don't need per-field accessor functions).
Me too, but I wasn't sure how to do that. I thought __iomem works with
pointer declarations only. But it turns out it works this way too:
Even if that were the case, you could put it on the pointers, which is
how it's usually used.
-static struct txbd8 txbd[TX_BUF_CNT] __aligned(8);
-static struct rxbd8 rxbd[PKTBUFSRX] __aligned(8);
[...]
+static struct txbd8 __iomem txbd[TX_BUF_CNT] __aligned(8);
+static struct rxbd8 __iomem rxbd[PKTBUFSRX] __aligned(8);
[...]
- for (i = 0; read_txbd_stat(tx_idx) & TXBD_READY; i++) {
+ for (i = 0; in_be16(&txbd[tx_idx].status) & TXBD_READY; i++) {
[...]
And sparse doesn't complain about it. In this case I'll drop the
read_txbd_stat() and friends. Is this acceptable?
Yes.
[v3] declaring the BDs as __iomem to avoid casting submitted:
http://patchwork.ozlabs.org/patch/280664/
Thanks.
Claudiu
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[U-Boot] [PATCH 7/9][v3] net: tsec: Use portable types and accessors for BDs
Currently, the buffer descriptor (BD) fields cannot be
correctly accessed by a little endian processor. This
patch fixes the issue by making the access of BDs to be
portable among different cpu architectures.
Use portable data types for the Rx/Tx buffer descriptor
fields. Use portable I/O accessors to insure that the
big endian BDs are correctly accessed by little endian
cpus too, and to insure proper sync with the H/W.
Removed the redundant RTXBD "volatile" type, as proper
synchronization around BD data accesses is provided by
the I/O accessors now.
The "sparse" tool was also used to verify the correctness
of these changes.
Cc: Scott Wood
Signed-off-by: Claudiu Manoil
---
v2:
* used portable I/O accessors (in_be/out_be)
* replaced macro usage
* retested on p1020 (ping, tftp)
v3:
* txbd, rxbd declared as __iomem to avoid casting
drivers/net/tsec.c | 88 --
include/tsec.h | 22 +++---
2 files changed, 56 insertions(+), 54 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 289229a..e354fad 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -28,13 +28,10 @@ DECLARE_GLOBAL_DATA_PTR;
static uint rx_idx;/* index of the current RX buffer */
static uint tx_idx;/* index of the current TX buffer */
-typedef volatile struct rtxbd {
- txbd8_t txbd[TX_BUF_CNT];
- rxbd8_t rxbd[PKTBUFSRX];
-} RTXBD;
-
#ifdef __GNUC__
-static RTXBD rtx __attribute__ ((aligned(8)));
+static struct txbd8 __iomem txbd[TX_BUF_CNT] __aligned(8);
+static struct rxbd8 __iomem rxbd[PKTBUFSRX] __aligned(8);
+
#else
#error "rtx must be 64-bit aligned"
#endif
@@ -275,10 +272,11 @@ void redundant_init(struct eth_device *dev)
clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
do {
+ uint16_t status;
tsec_send(dev, (void *)pkt, sizeof(pkt));
/* Wait for buffer to be received */
- for (t = 0; rtx.rxbd[rx_idx].status & RXBD_EMPTY; t++) {
+ for (t = 0; in_be16(&rxbd[rx_idx].status) & RXBD_EMPTY; t++) {
if (t >= 10 * TOUT_LOOP) {
printf("%s: tsec: rx error\n", dev->name);
break;
@@ -288,9 +286,11 @@ void redundant_init(struct eth_device *dev)
if (!memcmp(pkt, (void *)NetRxPackets[rx_idx], sizeof(pkt)))
fail = 0;
- rtx.rxbd[rx_idx].length = 0;
- rtx.rxbd[rx_idx].status =
- RXBD_EMPTY | (((rx_idx + 1) == PKTBUFSRX) ? RXBD_WRAP : 0);
+ out_be16(&rxbd[rx_idx].length, 0);
+ status = RXBD_EMPTY;
+ if ((rx_idx + 1) == PKTBUFSRX)
+ status |= RXBD_WRAP;
+ out_be16(&rxbd[rx_idx].status, status);
rx_idx = (rx_idx + 1) % PKTBUFSRX;
if (in_be32(®s->ievent) & IEVENT_BSY) {
@@ -319,9 +319,10 @@ void redundant_init(struct eth_device *dev)
*/
static void startup_tsec(struct eth_device *dev)
{
- int i;
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec __iomem *regs = priv->regs;
+ uint16_t status;
+ int i;
/* reset the indices to zero */
rx_idx = 0;
@@ -331,24 +332,26 @@ static void startup_tsec(struct eth_device *dev)
#endif
/* Point to the buffer descriptors */
- out_be32(®s->tbase, (unsigned int)(&rtx.txbd[tx_idx]));
- out_be32(®s->rbase, (unsigned int)(&rtx.rxbd[rx_idx]));
+ out_be32(®s->tbase, (u32)&txbd[0]);
+ out_be32(®s->rbase, (u32)&rxbd[0]);
/* Initialize the Rx Buffer descriptors */
for (i = 0; i < PKTBUFSRX; i++) {
- rtx.rxbd[i].status = RXBD_EMPTY;
- rtx.rxbd[i].length = 0;
- rtx.rxbd[i].bufptr = (uint) NetRxPackets[i];
+ out_be16(&rxbd[i].status, RXBD_EMPTY);
+ out_be16(&rxbd[i].length, 0);
+ out_be32(&rxbd[i].bufptr, (u32)NetRxPackets[i]);
}
- rtx.rxbd[PKTBUFSRX - 1].status |= RXBD_WRAP;
+ status = in_be16(&rxbd[PKTBUFSRX - 1].status);
+ out_be16(&rxbd[PKTBUFSRX - 1].status, status | RXBD_WRAP);
/* Initialize the TX Buffer Descriptors */
for (i = 0; i < TX_BUF_CNT; i++) {
- rtx.txbd[i].status = 0;
- rtx.txbd[i].length = 0;
- rtx.txbd[i].bufptr = 0;
+ out_be16(&txbd[i].status, 0);
+ out_be16(&txbd[i].length, 0);
+ out_be32(&txbd[i].bufptr, 0);
}
- rtx.txbd[TX_BUF_CNT - 1].status |= TXBD_WRAP;
+ status = in_be16(&txbd[TX_BUF_CNT - 1].status);
+ out_be16(&txbd[TX_BUF_CNT - 1].status, status | TXBD_WRAP);
#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
svr = get_svr();
@@ -372,29 +375,31 @@ static void startup_tsec(struct eth_device *dev)
*/
static int tsec_send(struc
Re: [U-Boot] [PATCH 01/10] usb:udc:s3c: Reduce dcache invalidate range for UDC receive buffer
Dear Lukasz Majewski, > Hi Marek, > > > Dear Lukasz Majewski, > > > > > Hi Marek, > > > > > > > Dear Lukasz Majewski, > > > > > > > > > The s3c udc driver sends data in a max packet size. Therefore > > > > > the dcache invalidate range shall be equal to max packet, not > > > > > the entire DMA_BUFFER_SIZE. > > > > > > > > > > Signed-off-by: Lukasz Majewski > > > > > Cc: Marek Vasut > > > > > --- > > > > > > > > > > drivers/usb/gadget/s3c_udc_otg_xfer_dma.c |2 +- > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index > > > > > d7af5e9..5e3ba76 100644 --- > > > > > a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ > > > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -117,7 +117,7 @@ > > > > > static int setdma_rx(struct s3c_ep *ep, struct s3c_request *req) > > > > > > > > > > invalidate_dcache_range((unsigned long) > > > > > > > > > > ep->dev->dma_buf[ep_num], (unsigned long) > > > > > ep->dev->dma_buf[ep_num] > > > > > - + DMA_BUFFER_SIZE); > > > > > + + ep->ep.maxpacket); > > > > > > > > Is this maxpacket _always_ multiple of cacheline big or will you > > > > need some ROUND_UP() call here ? > > > > > > The maxpacket value is equal to 64 B for EP0 and 512 B for EP1 and > > > EP2 (wMaxPacketSize field of the descriptor). > > > > > > Moreover this invalidation is done on already memaligned buffer > > > (which is 16 KiB). In other words, we are copying data to specially > > > prepared buffer (per UDC device EP, not usb_request). > > > > > > In my opinion the maxpacket don't need to be rounded up. > > > > So it can never happen that ep maxpacket is unaligned? > > maxpacket can be defined as e.g. 16 Bytes (wMaxPacketSize). > > However the underlying buffer (on which we perform dcache invalidation) > is already cache line aware (defined with memalign). > Also we copy the usb request data there (yes I know that this is not > the best possible solution). Afterwards address of this buffer is a > starting point for DMA. > Since we are sending in the HW one packet at a time (with maxpacket > size), then it should be enough to invalidate only up to 512 B. > Previously the whole buffer (DMA_BUFFER_SIZE -> 16 KiB) was > invalidated each time. > > Since we are invalidating cache content corresponding to buffer mapped > memory, we are safe when D-cache controller invalidates 32B > (CACHE_LINE_SIZE) instead of 16B. I get it, but if the size is lower than CACHE_LINE_SIZE, it will not get invalidated at all. Thus the roundup might be needed. > > > > Best regards, > > > > Marek Vasut > > > > > > Since this is Samsung's UDC specific (not THOR download) - would it > > > be possible to take this patch from this patch series (of course if > > > my above rationale is acceptable for you)? > > > > You mean for .10 ? > > This patch hasn't introduced regressions for DFU/UMS. It can be applied > to .10 or to u-boot-usb/next. If it's not an explicit fix, this will go to -next Best regards, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] arm64: Non-manual relocation
> This turns off CONFIG_NEEDS_MANUAL_RELOC and turns on -pie.
>
> The bss part of the linker script is changed to be more like arm32,
> as the previous arm64 approach was generating bad relocations (even
> readelf didn't like them).
>
> relocate_64.S is made to look more like relocate.S, and then changed to
> support RELA style relocations rather than REL.
>
> Signed-off-by: Scott Wood
> ---
> arch/arm/config.mk| 2 --
> arch/arm/cpu/armv8/config.mk | 1 -
> arch/arm/cpu/armv8/u-boot.lds | 32 +++---
> arch/arm/include/asm/config.h | 5 -
> arch/arm/lib/crt0_64.S| 7 ++-
> arch/arm/lib/relocate_64.S| 41
> ---
> include/configs/vexpress_aemv8a.h | 3 +++
> 7 files changed, 51 insertions(+), 40 deletions(-)
>
> diff --git a/arch/arm/config.mk b/arch/arm/config.mk
> index 95c07ad..96d2d88 100644
> --- a/arch/arm/config.mk
> +++ b/arch/arm/config.mk
> @@ -74,9 +74,7 @@ endif
> endif
>
> # needed for relocation
> -ifndef CONFIG_ARM64
> LDFLAGS_u-boot += -pie
> -endif
>
> #
> # FIXME: binutils versions < 2.22 have a bug in the assembler where
> diff --git a/arch/arm/cpu/armv8/config.mk b/arch/arm/cpu/armv8/config.mk
> index 9f36d59..027a68c 100644
> --- a/arch/arm/cpu/armv8/config.mk
> +++ b/arch/arm/cpu/armv8/config.mk
> @@ -13,4 +13,3 @@ PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED)
> PF_CPPFLAGS_ARMV8 := $(call cc-option, -march=armv8-a)
> PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV8)
> PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED)
> -PLATFORM_CPPFLAGS += -fpic
> diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
> index 328d477..4c1 100644
> --- a/arch/arm/cpu/armv8/u-boot.lds
> +++ b/arch/arm/cpu/armv8/u-boot.lds
> @@ -41,25 +41,43 @@ SECTIONS
> }
>
> . = ALIGN(8);
> - .reloc : {
> - __rel_got_start = .;
> - *(.got)
> - __rel_got_end = .;
> - }
>
> .image_copy_end :
> {
> *(.__image_copy_end)
> }
>
> + . = ALIGN(8);
> +
> + .rel_dyn_start :
> + {
> + *(.__rel_dyn_start)
> + }
> +
> + .rela.dyn : {
> + *(.rela*)
> + }
> +
> + .rel_dyn_end :
> + {
> + *(.__rel_dyn_end)
> + }
> +
> _end = .;
>
> . = ALIGN(8);
> +
> + .bss_start : {
> + KEEP(*(.__bss_start));
> + }
> +
> .bss : {
> - __bss_start = .;
> *(.bss*)
>. = ALIGN(8);
> - __bss_end = .;
> + }
> +
> + .bss_end : {
> + KEEP(*(.__bss_end));
> }
>
> /DISCARD/ : { *(.dynsym) }
> diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
> index 0ee131d..de4d01e 100644
> --- a/arch/arm/include/asm/config.h
> +++ b/arch/arm/include/asm/config.h
> @@ -11,11 +11,6 @@
> #define CONFIG_SYS_BOOT_RAMDISK_HIGH
>
> #ifdef CONFIG_ARM64
> -/*
> - * Currently, GOT is used to relocate u-boot and
> - * configuration CONFIG_NEEDS_MANUAL_RELOC is needed.
> - */
> -#define CONFIG_NEEDS_MANUAL_RELOC
> #define CONFIG_PHYS_64BIT
> #endif
>
> diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
> index ddd46eb..7756396 100644
> --- a/arch/arm/lib/crt0_64.S
> +++ b/arch/arm/lib/crt0_64.S
> @@ -94,11 +94,8 @@ relocation_return:
> /*
> * Clear BSS section
> */
> - ldr x9, [x18, #GD_RELOC_OFF]/* x9 <- gd->reloc_off */
> - ldr x0, =__bss_start
> - add x0, x0, x9 /* x0 <- __bss_start in RAM */
> - ldr x1, =__bss_end
> - add x1, x1, x9 /* x1 <- __bss_end in RAM */
> + ldr x0, =__bss_start/* this is auto-relocated! */
> + ldr x1, =__bss_end /* this is auto-relocated! */
> mov x2, #0
> clear_loop:
> str x2, [x0]
> diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S
> index 29c3239..7fba9e2 100644
> --- a/arch/arm/lib/relocate_64.S
> +++ b/arch/arm/lib/relocate_64.S
> @@ -16,40 +16,41 @@
> * void relocate_code (addr_moni)
> *
> * This function relocates the monitor code.
> - *
> - * NOTE:
> - * GOT is used and configuration CONFIG_NEEDS_MANUAL_RELOC is needed.
> + * x0 holds the destination address.
> */
> ENTRY(relocate_code)
> /*
>* Copy u-boot from flash to RAM
>*/
> - ldr x1, =__image_copy_start /* x1 <- copy source */
> - cmp x1, x0
> + ldr x1, =__image_copy_start /* x1 <- SRC &__image_copy_start */
> + subsx9, x0, x1 /* x9 <- relocation offset */
> b.eqrelocate_done /* skip relocation */
> - mov x2, x0 /* x2 <- copy destination */
> - ldr x3, =__image_copy_end /* x3 <- source end address */
> + ldr x2, =__image_copy_end /* x2 <- SRC &__image_copy_end */
>
> copy_loop:
> ldp x10,
Re: [U-Boot] [PATCH 1/4] arm64: Add tool to statically apply RELA relocations
> ARM64 uses the newer RELA-style relocations rather than the older REL. > RELA relocations have an addend in the relocation struct, rather than > expecting the loader to read a value from the location to be updated. > > While this is beneficial for ordinary program loading, it's problematic How it is beneficial than rel format? Why aarch64-gcc use rela format only instead of supporting two format? these confuse me a few months. David, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] arm64: rela relocation
> arm64: rela relocation > > This lets us remove the manual relocation stuff from the arm64 patchset > (the symbol itself is removed by this patchset, but not all the new > manual relocations added by the arm64 patchset). > > I'm not terribly happy with the way relocate-rela is now, versus something > cleaner that operates on the ELF file, but it's good enough for now and > waiting longer to get rid of the manual relocations would be worse. > > This patchset is based on David's arm64 patchset v13. David, the first > two patches should be applied before your arm64 patches. Maybe the > fourth as well (except for the removal of the arm64 ifdef you added, > which would then need to be squashed with your patch). The third patch > should be squashed with your patches (plus you should remove the manual > relocs). > > Scott Wood (4): > arm64: Add tool to statically apply RELA relocations > arm64: Turn u-boot.bin back into an ELF file after relocate-rela > arm64: Non-manual relocation > arm64: Make checkarmreloc accept arm64 relocations > > Makefile | 39 ++-- > arch/arm/config.mk| 4 - > arch/arm/cpu/armv8/config.mk | 1 - > arch/arm/cpu/armv8/u-boot.lds | 32 +-- > arch/arm/include/asm/config.h | 5 -- > arch/arm/lib/crt0_64.S| 7 +- > arch/arm/lib/relocate_64.S| 41 - > include/configs/vexpress_aemv8a.h | 3 + > tools/Makefile| 6 ++ > tools/relocate-rela.c | 185 > ++ > 10 files changed, 276 insertions(+), 47 deletions(-) > create mode 100644 tools/relocate-rela.c > Great, some fixups related with relocation could be removed. I will modify arm64 patchset according this. David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/6] Second step towards Kbuild: Descend down like Kbuild
Hi Mashahiro, On Fri, Oct 4, 2013 at 4:37 AM, Masahiro Yamada wrote: > Hello Simon > > >> Can you please explain why you need to change the .lds files - sorry it is >> not obvious to me. > > > This series changes how objects are linked. > > Before this series, > drivers/bios_emulator/libatibiosemu.o > drivers/block/libblock.o > drivers/pcmcia/libpcmcia.o > ... > are directly linked into ./u-boot at the final link stage. > > > After this series, > drivers/bios_emulator/built-in.o > drivers/block/built-in.o > drivers/pcmcia/built-in.o > ... > are combined into drivers/libdrivers.o > and then drivers/libdrivers.o is linked into ./u-boot. > > > This means that all symbols in > drivers/bios_emulator/built-in.o > drivers/block/built-in.o > drivers/pcmcia/built-in.o > ... > are also included in drivers/libdrivers.o > > >> --- a/board/tqc/tqm8xx/u-boot.lds >> +++ b/board/tqc/tqm8xx/u-boot.lds >> @@ -23,8 +23,8 @@ SECTIONS >> board/tqc/tqm8xx/libtqm8xx.o (.text*) >> disk/libdisk.o (.text*) >> drivers/net/libnet.o (.text*) >> -drivers/pcmcia/libpcmcia.o (.text.pcmcia_on) >> -drivers/pcmcia/libpcmcia.o (.text.pcmcia_hardware_enable) >> +drivers/libdrivers.o (.text.pcmcia_on) >> +drivers/libdrivers.o (.text.pcmcia_hardware_enable) >> >> . = DEFINED(env_offset) ? env_offset : .; >> common/env_embedded.o (.ppcenv*) > > This is to avoid multiple definition error at the link stage. > > .test.pcmcia_on and .text.pcmcia_hardware_enable > are included in both drivers/pcmcia/built-in.o and drivers/libdrivers.o > so I replaced the former with the latter. > > >> diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds >> index f9c2beb..b30b667 100644 >> --- a/board/LEOX/elpt860/u-boot.lds >> +++ b/board/LEOX/elpt860/u-boot.lds >> @@ -34,7 +34,6 @@ SECTIONS >> arch/powerpc/cpu/mpc8xx/libmpc8xx.o(.text*) >> board/LEOX/elpt860/libelpt860.o(.text*) >> arch/powerpc/lib/libpowerpc.o (.text*) >> -/*drivers/rtc/librtc.o (.text*)*/ >> >> . = env_offset; >> common/env_embedded.o > > Becuase only a comment line is deleted, > this change has no impact and I might not have needed to touch it actually. > I deleted it just because we don't have drivers/rtc/librtc.c any more. OK this sounds reasonable, thank for you the explanation. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/9][v2] net: tsec: Use portable types and accessors for BDs
On Fri, 2013-10-04 at 11:27 +0300, Claudiu Manoil wrote:
> On 10/3/2013 9:37 PM, Scott Wood wrote:
> > On Thu, 2013-10-03 at 14:48 +0300, Claudiu Manoil wrote:
> >> +static inline u16 read_txbd_stat(uint idx)
> >> +{
> >> + return in_be16((u16 __iomem *)&txbd[idx].status);
> >> +}
> >> +
> >> +static inline void write_txbd_stat(uint idx, u16 status)
> >> +{
> >> + out_be16((u16 __iomem *)&txbd[idx].status, status);
> >> +}
> >> +
> >> +static inline u16 read_rxbd_stat(uint idx)
> >> +{
> >> + return in_be16((u16 __iomem *)&rxbd[idx].status);
> >> +}
> >> +
> >> +static inline void write_rxbd_stat(uint idx, u16 status)
> >> +{
> >> + out_be16((u16 __iomem *)&rxbd[idx].status, status);
> >> +}
> >
> > Do you need __force on these to make sparse happy?
> >
> No, we don't need __force in this case, in_be/out_be are less
> restrictive and take plain unsigned pointers (not __beNN pointers).
> On the other hand, they require the __iomem address space marker, to
> make sparse happy.
I thought you'd need __force to convert a non-iomem pointer to an
__iomem pointer.
> > I'd rather see these declared as __iomem than use casts (at which point,
> > you probably don't need per-field accessor functions).
> >
> Me too, but I wasn't sure how to do that. I thought __iomem works with
> pointer declarations only. But it turns out it works this way too:
Even if that were the case, you could put it on the pointers, which is
how it's usually used.
>
> -static struct txbd8 txbd[TX_BUF_CNT] __aligned(8);
> -static struct rxbd8 rxbd[PKTBUFSRX] __aligned(8);
> [...]
> +static struct txbd8 __iomem txbd[TX_BUF_CNT] __aligned(8);
> +static struct rxbd8 __iomem rxbd[PKTBUFSRX] __aligned(8);
>
> [...]
> - for (i = 0; read_txbd_stat(tx_idx) & TXBD_READY; i++) {
> + for (i = 0; in_be16(&txbd[tx_idx].status) & TXBD_READY; i++) {
> [...]
>
> And sparse doesn't complain about it. In this case I'll drop the
> read_txbd_stat() and friends. Is this acceptable?
Yes.
-Scott
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[U-Boot] [PATCH] cmd_nvedit.c: setenv_hex must prefix hex with '0x'
setenv_hex is only called with hex values, but does not prefix the
strings with '0x', as in general U-Boot assumes hex values not decimal
values, and this saves space in the environment. However, some
functions such as 'load' take some values that are most easily described
in hex (load address) and decimal (size, offset within a file).
This can lead to the situation where, for example, spl export is run,
which leads to a call of setenv_hex of the fdtaddr, which will be re-set
in the environment. Then 'saveenv' may be run (after updating other
parts of the environment for falcon mode), causing an invalid for 'load'
fdtaddr to be saved to the environment and leading to future boots to
fail if using 'load' to read the fdt file.
Cc: Wolfgang Denk
Signed-off-by: Tom Rini
---
common/cmd_nvedit.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 778dca5..4cac794 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -321,7 +321,7 @@ int setenv_hex(const char *varname, ulong value)
{
char str[17];
- sprintf(str, "%lx", value);
+ sprintf(str, "0x%lx", value);
return setenv(varname, str);
}
--
1.7.9.5
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[U-Boot] [PATCH 4/4] Coding Style cleanup: drop some excessive empty lines
Signed-off-by: Wolfgang Denk
---
arch/arm/cpu/armv7/omap5/prcm-regs.c | 2 --
board/LEOX/elpt860/README.LEOX | 1 -
board/palmtreo680/README | 17 -
board/sandpoint/README | 2 --
board/siemens/rut/board.c| 4
doc/README.gpt | 7 ---
doc/README.p1010rdb | 1 -
doc/README.qemu-mips | 1 -
doc/driver-model/UDM-block.txt | 1 -
drivers/usb/gadget/f_mass_storage.c | 5 -
include/configs/T4240EMU.h | 4
tools/buildman/README| 1 -
12 files changed, 46 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 5a3d52c..56c497f 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -526,8 +526,6 @@ struct prcm_regs const omap5_es2_prcm = {
.cm1_abe_timer8_clkctrl = 0x4a004580,
.cm1_abe_wdt3_clkctrl = 0x4a004588,
-
-
/* cm2.ckgen */
.cm_clksel_mpu_m3_iss_root = 0x4a008100,
.cm_clksel_usb_60mhz = 0x4a008104,
diff --git a/board/LEOX/elpt860/README.LEOX b/board/LEOX/elpt860/README.LEOX
index fe3c0f1..aa41ff8 100644
--- a/board/LEOX/elpt860/README.LEOX
+++ b/board/LEOX/elpt860/README.LEOX
@@ -46,7 +46,6 @@ U-Boot, at the address of 0x0300.
=
-
##
# Operation on the serial console (SMC1)
##
diff --git a/board/palmtreo680/README b/board/palmtreo680/README
index 46828eb..c8799c6 100644
--- a/board/palmtreo680/README
+++ b/board/palmtreo680/README
@@ -30,7 +30,6 @@ go wrong, but please tell me what happened exactly. For that
matter, I'd love
to hear from you if you succeed.
-
Details on the SPL
==
@@ -51,7 +50,6 @@ IPL has already loaded to its correct SDRAM address, and then
loads the
remainder of u-boot and jumps to it.
-
The docg4's "reliable mode"
===
@@ -79,7 +77,6 @@ module parameter), but not reading. However, the u-boot
docg4_spl driver does
read in reliable mode, in the same fashion as the IPL.
-
Details on the IPL and its data format
==
@@ -105,7 +102,6 @@ For the sake of simplicity and uniformity, the u-boot SPL
mimics the operation
of the IPL, and expects the image to be stored in the same format.
-
Instructions on Programming u-boot to flash
===
@@ -117,7 +113,6 @@ remainder of this document describes in detail how to
program u-boot to the
flash using Linux running on the Treo.
-
Hardware Prerequisites
==
@@ -136,7 +131,6 @@ A Linux desktop PC.
to flash, you'll really want to use a Linux PC.
-
Treo-side Software Prerequisites
@@ -152,7 +146,6 @@ Linux bootloader for PalmOS:
parameters passed to the kernel.
-
Linux kernel:
The kernel on the Treo 680 is still a little rough around the edges, and the
@@ -200,7 +193,6 @@ Linux kernel:
and /dev/mtd2 for these partitions, respectively. Ensure that your root file
system at least has /dev/mtd1 if you are not running udev or mdev.
-
Userspace Utilities:
In addition to everything necessary to provide a useful userspace environment
@@ -221,19 +213,16 @@ Userspace Utilities:
from the mtd-utils package.
-
Desktop PC-side Software Prerequisites
==
Terminal emulator application:
minicom, kermit, etc.
-
Linux kernel:
Compiled with CONFIG_USB_SERIAL enabled. Build this as a module.
-
Recommended (Not directly related to u-boot)
@@ -275,7 +264,6 @@ configure the usb0 interface on the desktop.) Use the nfs
'nolock' option when
mounting to avoid the need to run a portmapper like rpcbind.
-
Preliminaries
=
@@ -397,7 +385,6 @@ forget to copy the file to permanent storage, such as an
mmc card.
If all of the above went well, you can now program u-boot.
-
Programming u-boot
==
@@ -438,7 +425,6 @@ four blocks in /dev/mtd1; i.e., at offsets 0x0,
0x4, 0x8, 0xc.
Shutdown linux, remove and re-insert the battery, hold your breath...
-
Enjoying u-boot
===
@@ -478,7 +464,6 @@ support for reliable mode in u-boot's docg4 flash driver.
This should be
corrected soon.
-
Customizing
===
@@ -511,7 +496,6 @@ in flash did not seem worth the cost of a 256k flash block.
But adding this
should be straightforward.
-
Restoring PalmOS
@@ -568,7 +552,6 @@ modprobe docg4 ignore_badblocks=1 || exit 1
dd if=$1 bs=1 skip=$file_ofs count=540672 | nandwrite -o -n -s 0x8 $2 - ||
exit 1
modprobe -r docg4
-
TODO
diff --git a/board/sand
[U-Boot] [PATCH 3/4] Coding Style cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk
---
arch/arm/cpu/armv7/omap3/am35x_musb.c | 1 -
arch/arm/cpu/armv7/rmobile/Makefile| 1 -
arch/microblaze/include/asm/gpio.h | 1 -
arch/microblaze/include/asm/microblaze_intc.h | 1 -
arch/microblaze/include/asm/microblaze_timer.h | 1 -
board/atmark-techno/armadillo-800eva/Makefile | 1 -
board/cpc45/ide.c | 1 -
board/freescale/p1023rdb/ddr.c | 1 -
board/isee/igep0033/board.c| 1 -
board/isee/igep0033/mux.c | 1 -
board/logicpd/am3517evm/am3517evm.c| 1 -
board/palmtreo680/README | 1 -
doc/README.atmel_pmecc | 1 -
drivers/mtd/mtdcore.c | 1 -
drivers/mtd/nand/nand_ids.c| 1 -
drivers/usb/musb-new/Makefile | 1 -
lib/libfdt/fdt_empty_tree.c| 1 -
lib/string.c | 1 -
18 files changed, 18 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/am35x_musb.c
b/arch/arm/cpu/armv7/omap3/am35x_musb.c
index 9a31f8a..74dd105 100644
--- a/arch/arm/cpu/armv7/omap3/am35x_musb.c
+++ b/arch/arm/cpu/armv7/omap3/am35x_musb.c
@@ -59,4 +59,3 @@ void am35x_musb_clear_irq(void)
0, USBOTGSS_INT_CLR);
readl(&am35x_scm_general_regs->lvl_intr_clr);
}
-
diff --git a/arch/arm/cpu/armv7/rmobile/Makefile
b/arch/arm/cpu/armv7/rmobile/Makefile
index 3168e97..41bceb1 100644
--- a/arch/arm/cpu/armv7/rmobile/Makefile
+++ b/arch/arm/cpu/armv7/rmobile/Makefile
@@ -46,4 +46,3 @@ include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#
-
diff --git a/arch/microblaze/include/asm/gpio.h
b/arch/microblaze/include/asm/gpio.h
index f5cad56..4762de0 100644
--- a/arch/microblaze/include/asm/gpio.h
+++ b/arch/microblaze/include/asm/gpio.h
@@ -12,4 +12,3 @@ extern int gpio_alloc(u32 baseaddr, const char *name, u32
gpio_no);
extern void gpio_info(void);
#endif
-
diff --git a/arch/microblaze/include/asm/microblaze_intc.h
b/arch/microblaze/include/asm/microblaze_intc.h
index 31b94c6..0fb9207 100644
--- a/arch/microblaze/include/asm/microblaze_intc.h
+++ b/arch/microblaze/include/asm/microblaze_intc.h
@@ -36,4 +36,3 @@ int install_interrupt_handler(int irq, interrupt_handler_t
*hdlr,
void *arg);
int interrupts_init(void);
-
diff --git a/arch/microblaze/include/asm/microblaze_timer.h
b/arch/microblaze/include/asm/microblaze_timer.h
index cfd3792..0d81402 100644
--- a/arch/microblaze/include/asm/microblaze_timer.h
+++ b/arch/microblaze/include/asm/microblaze_timer.h
@@ -25,4 +25,3 @@ typedef volatile struct microblaze_timer_t {
} microblaze_timer_t;
int timer_init(void);
-
diff --git a/board/atmark-techno/armadillo-800eva/Makefile
b/board/atmark-techno/armadillo-800eva/Makefile
index 9f9618b..a81e40b 100644
--- a/board/atmark-techno/armadillo-800eva/Makefile
+++ b/board/atmark-techno/armadillo-800eva/Makefile
@@ -43,4 +43,3 @@ include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#
-
diff --git a/board/cpc45/ide.c b/board/cpc45/ide.c
index 448d887..1944e36 100644
--- a/board/cpc45/ide.c
+++ b/board/cpc45/ide.c
@@ -126,4 +126,3 @@ void ide_led(uchar led, uchar status)
writeb(val, BCSR_BASE + 0x04);
}
-
diff --git a/board/freescale/p1023rdb/ddr.c b/board/freescale/p1023rdb/ddr.c
index ce406b2..f027885 100644
--- a/board/freescale/p1023rdb/ddr.c
+++ b/board/freescale/p1023rdb/ddr.c
@@ -86,4 +86,3 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS;
}
}
-
diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c
index 9e91f68..ced9b06 100644
--- a/board/isee/igep0033/board.c
+++ b/board/isee/igep0033/board.c
@@ -167,4 +167,3 @@ int board_eth_init(bd_t *bis)
return ret;
}
#endif
-
diff --git a/board/isee/igep0033/mux.c b/board/isee/igep0033/mux.c
index 16f4add..e862776 100644
--- a/board/isee/igep0033/mux.c
+++ b/board/isee/igep0033/mux.c
@@ -86,4 +86,3 @@ void enable_board_pin_mux(void)
/* Ethernet pinmux. */
configure_module_pin_mux(rmii1_pin_mux);
}
-
diff --git a/board/logicpd/am3517evm/am3517evm.c
b/board/logicpd/am3517evm/am3517evm.c
index 1cabc80..b6c68da 100644
--- a/board/logicpd/am3517evm/am3517evm.c
+++ b/board/logicpd/am3517evm/am3517evm.c
@@ -143,4 +143,3 @@ int board_eth_init(bd_t *bis)
return n;
}
#endif
-
diff --git a/board/palmtreo680/README b/board/palmtreo680/README
index 159f1f6..46828eb 100644
--- a/board/palmtreo680/README
+++ b/board/palmtreo680/README
@@ -578,4 +578,3 @@ TODO
- U-boot command that will write a new image to the bootloader partition in
flash.
- Linux FTD support.
-
diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_p
[U-Boot] [PATCH 0/4] Coding Style cleanup
The following patch series cleans up a number of coding style issues (trailing wtihe space, indentation by spaces instead of TAB, TAB followed by spaces, trailing empty lines, excessive empty lines) that have crept in over time. It's a white space modification only and supposed to be functionally a no-op. files that are known to be imported from other projects (like jffs2, yaffs2, lzma etc.) have been intentionally excluded. Wolfgang Denk (4): Coding Style cleanup: remove trailing white space Coding Style cleanup: replace leading SPACEs by TABs Coding Style cleanup: remove trailing empty lines Coding Style cleanup: drop some excessive empty lines MAKEALL|4 +- README | 20 +- arch/arm/config.mk |2 +- arch/arm/cpu/arm1136/start.S |2 +- arch/arm/cpu/arm720t/interrupts.c |2 +- arch/arm/cpu/arm720t/start.S |2 +- arch/arm/cpu/arm925t/timer.c |2 +- arch/arm/cpu/arm926ejs/at91/lowlevel_init.S|2 +- arch/arm/cpu/arm926ejs/davinci/timer.c |2 +- arch/arm/cpu/arm926ejs/mxs/spl_power_init.c|2 +- arch/arm/cpu/arm926ejs/mxs/timer.c |2 +- arch/arm/cpu/arm926ejs/omap/timer.c|2 +- arch/arm/cpu/arm926ejs/spear/spear600.c|2 +- arch/arm/cpu/arm926ejs/spear/spl_boot.c|2 +- .../spear/spr600_mt47h128m8_3_266_cl5_async.c |2 +- .../spear/spr600_mt47h32m16_333_cl5_psync.c|2 +- .../spear/spr600_mt47h32m16_37e_166_cl4_sync.c |2 +- .../spear/spr600_mt47h64m16_3_333_cl5_psync.c |2 +- arch/arm/cpu/arm926ejs/versatile/timer.c |2 +- arch/arm/cpu/arm946es/cpu.c|2 +- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 44 +- arch/arm/cpu/armv7/omap3/am35x_musb.c |1 - arch/arm/cpu/armv7/omap5/prcm-regs.c |2 - arch/arm/cpu/armv7/rmobile/Makefile|1 - arch/arm/cpu/armv7/rmobile/lowlevel_init.S |2 +- arch/arm/cpu/armv7/s5p-common/pwm.c|2 +- arch/arm/cpu/armv7/s5p-common/timer.c |2 +- arch/arm/cpu/armv7/start.S |2 +- arch/arm/cpu/armv7/zynq/cpu.c |2 +- arch/arm/cpu/armv7/zynq/timer.c|2 +- arch/arm/cpu/ixp/start.S |2 +- arch/arm/cpu/pxa/start.S |2 +- arch/arm/dts/exynos5250.dtsi |2 +- arch/arm/include/asm/arch-exynos/dp.h |2 +- arch/arm/include/asm/arch-exynos/dp_info.h |2 +- arch/arm/include/asm/arch-exynos/dsim.h|2 +- arch/arm/include/asm/arch-exynos/mipi_dsim.h |2 +- arch/arm/include/asm/arch-exynos/pwm_backlight.h |2 +- arch/arm/include/asm/arch-ixp/ixp425pci.h |2 +- arch/arm/lib/interrupts.c |2 +- arch/arm/lib/relocate.S|4 +- arch/blackfin/cpu/traps.c |2 +- .../include/asm/mach-common/bits/lockbox.h |2 +- arch/m68k/cpu/mcf5227x/start.S |2 +- arch/m68k/cpu/mcf52x2/cpu_init.c |2 +- arch/m68k/cpu/mcf532x/start.S |2 +- arch/m68k/cpu/mcf5445x/pci.c |2 +- arch/m68k/cpu/mcf5445x/start.S |2 +- arch/m68k/cpu/mcf547x_8x/pci.c |2 +- arch/m68k/cpu/mcf547x_8x/slicetimer.c |2 +- arch/m68k/cpu/mcf547x_8x/start.S |2 +- arch/m68k/include/asm/immap_5282.h |2 +- arch/m68k/lib/time.c |2 +- arch/m68k/lib/traps.c |2 +- arch/microblaze/include/asm/asm.h |2 +- arch/microblaze/include/asm/gpio.h |1 - arch/microblaze/include/asm/microblaze_intc.h |3 +- arch/microblaze/include/asm/microblaze_timer.h |1 - arch/microblaze/lib/bootm.c|2 +- arch/mips/cpu/mips32/au1x00/au1x00_eth.c |2 +- arch/nios2/cpu/epcs.c |2 +- arch/nios2/cpu/exceptions.S|2 +- arch/nios2/cpu/u-boot.lds |2 +- arch/nios2/lib/libgcc.c|2 +- arch/openrisc/cpu/cpu.c|4 +- arch/openrisc/lib/bootm.c |2 +- arch/powerpc/cpu/74xx_7xx/speed.c |2 +- arch/powerpc/cpu/mpc824x/cpu_init.c|2 +- arch/powerpc/cpu/mpc8260/pci.c |2 +- arch/powerpc/cpu/mpc83xx/cpu_init.c| 10
Re: [U-Boot] [PATCH v2 01/19] Makefile: prepare for using Kbuild-style Makefile
Hi Masahiro, On Fri, Oct 4, 2013 at 3:59 AM, Masahiro Yamada wrote: > Hello Simon > > > >> > +# Tentative step for Kbuild-style makefiles coexist with conventional >> > U-Boot style makefiles >> > +# U-Boot conventional sub makefiles always include some other makefiles. >> > +# So, the build system searches a line beginning with "include" before >> > entering into the sub makefile >> > +# in order to distinguish which style it is. >> > >> >> Would looking for obj- be better or worse? > > At first I thought of this but I was kind of worried > whether all makefiles should forcibly have obj-y or obj-. > > arch/arm/cpu/armv7/tegra114/ > arch/arm/cpu/armv7/tegra30/ > directories have no source files but only a Makefile. > > After all, I simply added > obj- := > line in them, so I think your suggestion will work. > > If you prefer to search obj-, I will consider to change at version 3. No, it doesn't matter, it sounds like what you are doing is just as good, and it is temporary as you say. I wonder how temporary? > > In any case, this ugly grep switch is tentative. > I want to refactor all makefiles and delete this switch > as soon as possible. > > > >> an indent might help here, and below. > > I will fix at v3. > > > >> > + fi >> > >> > $(LIBS): depend $(SUBDIR_TOOLS) >> > - $(MAKE) -C $(dir $(subst $(obj),,$@)) >> > + if grep -q "^include" $(dir $(subst $(obj),,$@))Makefile; >> > then \ >> > >> >> This check seems to appear a lot - could it become a $(call ...) perhaps? > > > I did not care so much about this part becuase it is temporary. > But re-writing it shortly with $(call ...) is not difficult. > I will try at v3. > Thanks for your advice. > > > > >> Re testing, I used: >> >> $ ./tools/buildman/buildman -b try-kbuild -k >> >> and confirmed that the binaries do change, for example, with cm41xx: >> >> $ wc ... >>13485418 123176 >> try-kbuild/01_of_20_g0c5274e6_Prepare-v2013.04-rc4/cm41xx/u-boot.bin >>13485417 123188 >> try-kbuild/02_of_20_gd3068182_Makefile--prepare-fo/cm41xx/u-boot.bin >> >> The change may well be harmless though. > > It is probably because of include/generated/version_autogenerated.h > > The length of PLAIN_VERSION and U_BOOT_VERSION changes > because the output `git describe` command is used for here. > > Actually I gave it a try. > > > For master branch (Prepare v2013.04-rc4), I got: > > #define PLAIN_VERSION "2013.10-rc4" > #define U_BOOT_VERSION "U-Boot 2013.10-rc4" > #define CC_VERSION_STRING "arm-linux-gnueabi-gcc (Ubuntu/Linaro > 4.7.3-1ubuntu1) 4.7.3" > #define LD_VERSION_STRING "GNU ld (GNU Binutils for Ubuntu) 2.23.2" > > > For try-kbuild branch (Makefile: prepare for using Kbuild-style Makefile) > I got: > > #define PLAIN_VERSION "2013.10-rc4-1-gc31a399" > #define U_BOOT_VERSION "U-Boot 2013.10-rc4-1-gc31a399" > #define CC_VERSION_STRING "arm-linux-gnueabi-gcc (Ubuntu/Linaro > 4.7.3-1ubuntu1) 4.7.3" > #define LD_VERSION_STRING "GNU ld (GNU Binutils for Ubuntu) 2.23.2" > > > For the list of things you should take into account to get identical > output files, please refer the thread of version1 of this series: > [U-Boot] [PATCH 00/19] First step towards Kbuild: Use Kbuild style makefiles > Message-Id: <20130917093533.738a.aa925...@jp.panasonic.com> > > >> (2) Git commit hash >> >> Git commit hash is contained in include/generated/version_autogenerated.h. >> So, I also modified include/version.h not to include it as follows: >> >> #ifndef DO_DEPS_ONLY >> -#include "generated/version_autogenerated.h" >> +/* #include "generated/version_autogenerated.h" */ >> +#define PLAIN_VERSION "__DUMMY__" >> +#define U_BOOT_VERSION "__DUMMY__" >> +#define CC_VERSION_STRING "__DUMMY__" >> +#define LD_VERSION_STRING "__DUMMY__" >> #endif > > This is what I did when I compared md5sum. > After applying above as a prerequisite commit, > I tried 'tools/buildman/buildman -b try-kbuild -k' again > and I got the same size for cm41xx/u-boot.bin > > > If you compare the size of u-boot.bin, > please take care of the order of object files too. > > I also mentioned this in the thread of v1. > > > > > >> It would be nice to add a feature to buildman to compare binaries. Of >> course we would need to add a Makefile option to disable the timestamp >> embedding first, since all binaries are different because of that. > > Sounds a good idea. > I will take a look when I have time. > > Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 5/9] ARM: mx25: convert to common timer code
From: Rob Herring
Convert mx25 to use the commmon timer code.
Signed-off-by: Rob Herring
---
v2:
- Use GPT struct for register offset
arch/arm/cpu/arm926ejs/mx25/timer.c | 117
include/configs/mx25pdk.h | 4 ++
include/configs/tx25.h | 5 +-
include/configs/zmx25.h | 6 ++
4 files changed, 14 insertions(+), 118 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c
b/arch/arm/cpu/arm926ejs/mx25/timer.c
index 42b6076..7f19791 100644
--- a/arch/arm/cpu/arm926ejs/mx25/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
@@ -21,65 +21,8 @@
*/
#include
-#include
#include
#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define timestamp (gd->arch.tbl)
-#define lastinc(gd->arch.lastinc)
-
-/*
- * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
- * "tick" is internal timer period
- */
-#ifdef CONFIG_MX25_TIMER_HIGH_PRECISION
-/* ~0.4% error - measured with stop-watch on 100s boot-delay */
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
- tick *= CONFIG_SYS_HZ;
- do_div(tick, MXC_CLK32);
- return tick;
-}
-
-static inline unsigned long long time_to_tick(unsigned long long time)
-{
- time *= MXC_CLK32;
- do_div(time, CONFIG_SYS_HZ);
- return time;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
- us = us * MXC_CLK32 + 99;
- do_div(us, 100);
- return us;
-}
-#else
-/* ~2% error */
-#define TICK_PER_TIME ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
-#define US_PER_TICK(100 / MXC_CLK32)
-
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
- do_div(tick, TICK_PER_TIME);
- return tick;
-}
-
-static inline unsigned long long time_to_tick(unsigned long long time)
-{
- return time * TICK_PER_TIME;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
- us += US_PER_TICK - 1;
- do_div(us, US_PER_TICK);
- return us;
-}
-#endif
/* nothing really to do with interrupts, just starts up a counter. */
/* The 32KHz 32-bit timer overruns in 134217 seconds */
@@ -104,63 +47,3 @@ int timer_init(void)
return 0;
}
-
-unsigned long long get_ticks(void)
-{
- struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
- ulong now = readl(&gpt->counter); /* current tick value */
-
- if (now >= lastinc) {
- /*
-* normal mode (non roll)
-* move stamp forward with absolut diff ticks
-*/
- timestamp += (now - lastinc);
- } else {
- /* we have rollover of incrementer */
- timestamp += (0x - lastinc) + now;
- }
- lastinc = now;
- return timestamp;
-}
-
-ulong get_timer_masked(void)
-{
- /*
-* get_ticks() returns a long long (64 bit), it wraps in
-* 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
-* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
-* 5 * 10^6 days - long enough.
-*/
- return tick_to_time(get_ticks());
-}
-
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-/* delay x useconds AND preserve advance timstamp value */
-void __udelay(unsigned long usec)
-{
- unsigned long long tmp;
- ulong tmo;
-
- tmo = us_to_tick(usec);
- tmp = get_ticks() + tmo;/* get current timestamp */
-
- while (get_ticks() < tmp) /* loop till event */
-/*NOP*/;
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
- ulong tbclk;
-
- tbclk = MXC_CLK32;
- return tbclk;
-}
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 543c415..0a9f442 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -16,6 +16,10 @@
#define CONFIG_SYS_TEXT_BASE 0x8120
#define CONFIG_MXC_GPIO
+#define CONFIG_SYS_TIMER_RATE 32768
+#define CONFIG_SYS_TIMER_COUNTER \
+ (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
+
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
diff --git a/include/configs/tx25.h b/include/configs/tx25.h
index 93dd3c5..beea612 100644
--- a/include/configs/tx25.h
+++ b/include/configs/tx25.h
@@ -16,6 +16,9 @@
#define CONFIG_MX25
#define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */
#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_TIMER_RATE CONFIG_MX25_CLK32
+#define CONFIG_SYS_TIMER_COUNTER \
+ (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
#defineCONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for
U-Boot */
diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h
index 765b849..ee48429 100644
--- a/incl
[U-Boot] [PATCH v2 8/9] ARM: tegra: convert to common timer code
From: Rob Herring
Convert tegra to use the commmon timer code.
Signed-off-by: Rob Herring
---
arch/arm/cpu/tegra-common/Makefile | 2 +-
arch/arm/cpu/tegra-common/timer.c | 95 --
include/configs/tegra-common.h | 3 ++
3 files changed, 4 insertions(+), 96 deletions(-)
delete mode 100644 arch/arm/cpu/tegra-common/timer.c
diff --git a/arch/arm/cpu/tegra-common/Makefile
b/arch/arm/cpu/tegra-common/Makefile
index 1b6cdf7..89b2210 100644
--- a/arch/arm/cpu/tegra-common/Makefile
+++ b/arch/arm/cpu/tegra-common/Makefile
@@ -12,7 +12,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)libcputegra-common.o
SOBJS += lowlevel_init.o
-COBJS-y+= ap.o board.o sys_info.o timer.o clock.o cache.o
+COBJS-y+= ap.o board.o sys_info.o clock.o cache.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/arch/arm/cpu/tegra-common/timer.c
b/arch/arm/cpu/tegra-common/timer.c
deleted file mode 100644
index d0f783e..000
--- a/arch/arm/cpu/tegra-common/timer.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation
- *
- * (C) Copyright 2008
- * Texas Instruments
- *
- * Richard Woodruff
- * Syed Moahmmed Khasim
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Marius Groeger
- * Alex Zuepke
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering,
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* counter runs at 1MHz */
-#define TIMER_CLK 100
-#define TIMER_LOAD_VAL 0x
-
-/* timer without interrupts */
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-/* delay x useconds */
-void __udelay(unsigned long usec)
-{
- long tmo = usec * (TIMER_CLK / 1000) / 1000;
- unsigned long now, last = timer_get_us();
-
- while (tmo > 0) {
- now = timer_get_us();
- if (last > now) /* count up timer overflow */
- tmo -= TIMER_LOAD_VAL - last + now;
- else
- tmo -= now - last;
- last = now;
- }
-}
-
-ulong get_timer_masked(void)
-{
- ulong now;
-
- /* current tick value */
- now = timer_get_us() / (TIMER_CLK / CONFIG_SYS_HZ);
-
- if (now >= gd->arch.lastinc)/* normal mode (non roll) */
- /* move stamp forward with absolute diff ticks */
- gd->arch.tbl += (now - gd->arch.lastinc);
- else/* we have rollover of incrementer */
- gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
- - gd->arch.lastinc) + now;
- gd->arch.lastinc = now;
- return gd->arch.tbl;
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
- return CONFIG_SYS_HZ;
-}
-
-unsigned long timer_get_us(void)
-{
- struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE;
-
- return readl(&timer_base->cntr_1us);
-}
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index ba6c6bb..d4361a5 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -19,6 +19,9 @@
#include /* get chip and board defs */
+#define CONFIG_SYS_TIMER_RATE 100
+#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
+
/*
* Display CPU and Board information
*/
--
1.8.1.2
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[U-Boot] [PATCH v2 9/9] ARM: versatile: convert to common timer code
From: Rob Herring
Convert versatile to use the commmon timer code.
Signed-off-by: Rob Herring
---
arch/arm/cpu/arm926ejs/versatile/timer.c | 116 ---
include/configs/versatile.h | 9 ++-
2 files changed, 4 insertions(+), 121 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c
b/arch/arm/cpu/arm926ejs/versatile/timer.c
index 5436162..f31d9bd 100644
--- a/arch/arm/cpu/arm926ejs/versatile/timer.c
+++ b/arch/arm/cpu/arm926ejs/versatile/timer.c
@@ -21,16 +21,6 @@
#include
-#define TIMER_LOAD_VAL 0x
-
-/* macro to read the 32 bit timer */
-#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define timestamp gd->arch.tbl
-#define lastdec gd->arch.lastinc
-
#define TIMER_ENABLE (1 << 7)
#define TIMER_MODE_MSK (1 << 6)
#define TIMER_MODE_FR (0 << 6)
@@ -69,112 +59,6 @@ int timer_init (void)
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
- /* init the timestamp and lastdec value */
- reset_timer_masked();
-
return 0;
}
-/*
- * timer without interrupts
- */
-ulong get_timer (ulong base)
-{
- return get_timer_masked () - base;
-}
-
-/* delay x useconds AND preserve advance timestamp value */
-void __udelay (unsigned long usec)
-{
- ulong tmo, tmp;
-
- if(usec >= 1000){ /* if "big" number, spread
normalization to seconds */
- tmo = usec / 1000; /* start to normalize for usec to ticks
per sec */
- tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to
achieve target */
- tmo /= 1000;/* finish normalize. */
- }else{ /* else small number, don't kill it
prior to HZ multiply */
- tmo = usec * CONFIG_SYS_HZ;
- tmo /= (1000*1000);
- }
-
- tmp = get_timer (0);/* get current timestamp */
- if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll
time stamp */
- reset_timer_masked (); /* reset "advancing" timestamp to 0,
set lastdec value */
- else
- tmo += tmp; /* else, set advancing stamp wake up
time */
-
- while (get_timer_masked () < tmo)/* loop till event */
- /*NOP*/;
-}
-
-void reset_timer_masked (void)
-{
- /* reset time */
- lastdec = READ_TIMER; /* capure current decrementer value time */
- timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
-ulong get_timer_masked (void)
-{
- ulong now = READ_TIMER; /* current tick value */
-
- if (lastdec >= now) { /* normal mode (non roll) */
- /* normal mode */
- timestamp += lastdec - now; /* move stamp fordward with
absoulte diff ticks */
- } else {/* we have overflow of the count down
timer */
- /* nts = ts + ld + (TLV - now)
-* ts=old stamp, ld=time that passed before passing through -1
-* (TLV-now) amount of time after passing though -1
-* nts = new "advancing time stamp"...it could also roll and
cause problems.
-*/
- timestamp += lastdec + TIMER_LOAD_VAL - now;
- }
- lastdec = now;
-
- return timestamp;
-}
-
-/* waits specified delay value and resets timestamp */
-void udelay_masked (unsigned long usec)
-{
- ulong tmo;
- ulong endtime;
- signed long diff;
-
- if (usec >= 1000) { /* if "big" number, spread
normalization to seconds */
- tmo = usec / 1000; /* start to normalize for usec to ticks
per sec */
- tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to
wait to achieve target */
- tmo /= 1000;/* finish normalize. */
- } else {/* else small number, don't kill it
prior to HZ multiply */
- tmo = usec * CONFIG_SYS_HZ;
- tmo /= (1000*1000);
- }
-
- endtime = get_timer_masked () + tmo;
-
- do {
- ulong now = get_timer_masked ();
- diff = endtime - now;
- } while (diff >= 0);
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk (void)
-{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
-}
diff --git a/include/configs/versatile.h b/include/configs/versatile.h
index 8d3ff6a..0d23262 100644
--- a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ -25,12 +25,11 @@
#define CONFIG_SYS_MEMTEST_START 0x10
#define CONFIG_SYS_MEMTEST
[U-Boot] [PATCH v2 2/9] Introduce common timer functions
From: Rob Herring
Many platforms duplicate pretty much the same timer code yet they all have
a 32-bit freerunning counter register. Create a common implementation that
minimally requires 2 or 3 defines to add timer support:
CONFIG_SYS_TIMER_RATE - Clock rate of the timer counter
CONFIG_SYS_TIMER_COUNTER - Address of 32-bit counter
CONFIG_SYS_TIMER_COUNTS_DOWN - Define if counter counts down
All functions are weak or ifdef'ed so they can still be overriden by any
platform.
Signed-off-by: Rob Herring
---
v2:
- Move to common location for all arches
- Add extern timer_read_counter declaration
- Add new global data timebase_h and timebase_l
include/asm-generic/global_data.h | 2 ++
lib/time.c| 73 +++
2 files changed, 75 insertions(+)
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index 77e06fb..0de0bea 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -72,6 +72,8 @@ typedef struct global_data {
#if defined(CONFIG_SYS_I2C)
int cur_i2c_bus;/* current used i2c bus */
#endif
+ unsigned long timebase_h;
+ unsigned long timebase_l;
struct arch_global_data arch; /* architecture-specific data */
} gd_t;
#endif
diff --git a/lib/time.c b/lib/time.c
index 68b8ff4..761272a 100644
--- a/lib/time.c
+++ b/lib/time.c
@@ -7,11 +7,84 @@
#include
#include
+#include
+#include
#ifndef CONFIG_WD_PERIOD
# define CONFIG_WD_PERIOD (10 * 1000 * 1000) /* 10 seconds default*/
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_SYS_TIMER_RATE
+ulong notrace get_tbclk(void)
+{
+ return CONFIG_SYS_TIMER_RATE;
+}
+#endif
+
+#ifdef CONFIG_SYS_TIMER_COUNTER
+unsigned long notrace timer_read_counter(void)
+{
+#ifdef CONFIG_SYS_TIMER_COUNTS_DOWN
+ return ~readl(CONFIG_SYS_TIMER_COUNTER);
+#else
+ return readl(CONFIG_SYS_TIMER_COUNTER);
+#endif
+}
+#else
+extern unsigned long timer_read_counter(void);
+#endif
+
+unsigned long long __weak notrace get_ticks(void)
+{
+ unsigned long now = timer_read_counter();
+
+ /* increment tbu if tbl has rolled over */
+ if (now < gd->timebase_l)
+ gd->timebase_h++;
+ gd->timebase_l = now;
+ return ((unsigned long long)gd->timebase_h << 32) | gd->timebase_l;
+}
+
+static unsigned long long notrace tick_to_time(unsigned long long tick)
+{
+ unsigned int div = get_tbclk();
+
+ tick *= CONFIG_SYS_HZ;
+ do_div(tick, div);
+ return tick;
+}
+
+ulong __weak get_timer(ulong base)
+{
+ return tick_to_time(get_ticks()) - base;
+}
+
+unsigned long __weak notrace timer_get_us(void)
+{
+ return tick_to_time(get_ticks() * 1000);
+}
+static unsigned long long usec_to_tick(unsigned long usec)
+{
+ unsigned long long tick = usec * get_tbclk();
+ usec *= get_tbclk();
+ do_div(tick, 100);
+ return tick;
+}
+
+void __weak __udelay(unsigned long usec)
+{
+ unsigned long long tmp;
+ ulong tmo;
+
+ tmo = usec_to_tick(usec);
+ tmp = get_ticks() + tmo;/* get current timestamp */
+
+ while (get_ticks() < tmp) /* loop till event */
+/*NOP*/;
+}
+
/* - */
void udelay(unsigned long usec)
--
1.8.1.2
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[U-Boot] [PATCH v2 7/9] ARM: socfpga: convert to common timer code
From: Rob Herring
Convert socfpga to use the commmon timer code.
Signed-off-by: Rob Herring
---
arch/arm/cpu/armv7/socfpga/timer.c | 72 --
include/configs/socfpga_cyclone5.h | 5 +--
2 files changed, 3 insertions(+), 74 deletions(-)
diff --git a/arch/arm/cpu/armv7/socfpga/timer.c
b/arch/arm/cpu/armv7/socfpga/timer.c
index 09f6f14..58fc789 100644
--- a/arch/arm/cpu/armv7/socfpga/timer.c
+++ b/arch/arm/cpu/armv7/socfpga/timer.c
@@ -8,8 +8,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE;
/*
@@ -22,73 +20,3 @@ int timer_init(void)
writel(readl(&timer_base->ctrl) | 0x3, &timer_base->ctrl);
return 0;
}
-
-static u32 read_timer(void)
-{
- return readl(&timer_base->curr_val);
-}
-
-/*
- * Delay x useconds
- */
-void __udelay(unsigned long usec)
-{
- unsigned long now, last;
- /*
-* get the tmo value based on timer clock speed
-* tmo = delay required / period of timer clock
-*/
- long tmo = usec * CONFIG_TIMER_CLOCK_KHZ / 1000;
-
- last = read_timer();
- while (tmo > 0) {
- now = read_timer();
- if (last >= now)
- /* normal mode (non roll) */
- tmo -= last - now;
- else
- /* we have overflow of the count down timer */
- tmo -= TIMER_LOAD_VAL - last + now;
- last = now;
- }
-}
-
-/*
- * Get the timer value
- */
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-/*
- * Timer : get the time difference
- * Unit of tick is based on the CONFIG_SYS_HZ
- */
-ulong get_timer_masked(void)
-{
- /* current tick value */
- ulong now = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ);
- if (gd->arch.lastinc >= now) {
- /* normal mode (non roll) */
- /* move stamp forward with absolute diff ticks */
- gd->arch.tbl += gd->arch.lastinc - now;
- } else {
- /* we have overflow of the count down timer */
- gd->arch.tbl += TIMER_LOAD_VAL - gd->arch.lastinc + now;
- }
- gd->arch.lastinc = now;
- return gd->arch.tbl;
-}
-
-/*
- * Reset the timer
- */
-void reset_timer(void)
-{
- /* capture current decrementer value time */
- gd->arch.lastinc = read_timer() /
- (CONFIG_TIMER_CLOCK_KHZ / CONFIG_SYS_HZ);
- /* start "advancing" time stamp from 0 */
- gd->arch.tbl = 0;
-}
diff --git a/include/configs/socfpga_cyclone5.h
b/include/configs/socfpga_cyclone5.h
index 06aeba6..fa49f85 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -197,10 +197,11 @@
/* Timer info */
#define CONFIG_SYS_HZ 1000
#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
-#define CONFIG_TIMER_CLOCK_KHZ 2400
+#define CONFIG_SYS_TIMER_RATE 240
#else
-#define CONFIG_TIMER_CLOCK_KHZ 25000
+#define CONFIG_SYS_TIMER_RATE 2500
#endif
+#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
#define CONFIG_ENV_IS_NOWHERE
--
1.8.1.2
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[U-Boot] [PATCH v2 3/9] sh: convert to common timer code
From: Rob Herring
Convert sh to use the commmon timer code. Remove reset_timer and
set_timer as they are unused on sh.
Signed-off-by: Rob Herring
---
arch/sh/lib/time.c | 61 ++
1 file changed, 2 insertions(+), 59 deletions(-)
diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c
index 1fe537e..b182dd2 100644
--- a/arch/sh/lib/time.c
+++ b/arch/sh/lib/time.c
@@ -12,7 +12,6 @@
*/
#include
-#include
#include
#include
#include
@@ -20,28 +19,15 @@
static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
static u16 bit;
-static unsigned long last_tcnt;
-static unsigned long long overflow_ticks;
unsigned long get_tbclk(void)
{
return get_tmu0_clk_rate() >> ((bit + 1) * 2);
}
-static inline unsigned long long tick_to_time(unsigned long long tick)
+unsigned long timer_read_counter(void)
{
- tick *= CONFIG_SYS_HZ;
- do_div(tick, get_tbclk());
-
- return tick;
-}
-
-static inline unsigned long long usec_to_tick(unsigned long long usec)
-{
- usec *= get_tbclk();
- do_div(usec, 100);
-
- return usec;
+ return ~readl(&tmu->tcnt0);
}
static void tmu_timer_start(unsigned int timer)
@@ -66,49 +52,6 @@ int timer_init(void)
tmu_timer_stop(0);
tmu_timer_start(0);
- last_tcnt = 0;
- overflow_ticks = 0;
-
return 0;
}
-unsigned long long get_ticks(void)
-{
- unsigned long tcnt = 0 - readl(&tmu->tcnt0);
-
- if (last_tcnt > tcnt) /* overflow */
- overflow_ticks++;
- last_tcnt = tcnt;
-
- return (overflow_ticks << 32) | tcnt;
-}
-
-void __udelay(unsigned long usec)
-{
- unsigned long long tmp;
- ulong tmo;
-
- tmo = usec_to_tick(usec);
- tmp = get_ticks() + tmo;/* get current timestamp */
-
- while (get_ticks() < tmp) /* loop till event */
-/*NOP*/;
-}
-
-unsigned long get_timer(unsigned long base)
-{
- /* return msec */
- return tick_to_time(get_ticks()) - base;
-}
-
-void set_timer(unsigned long t)
-{
- writel((0 - t), &tmu->tcnt0);
-}
-
-void reset_timer(void)
-{
- tmu_timer_stop(0);
- set_timer(0);
- tmu_timer_start(0);
-}
--
1.8.1.2
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[U-Boot] [PATCH v2 6/9] ARM: vexpress: convert to common timer code
From: Rob Herring
Convert vexpress to use the commmon timer code.
Signed-off-by: Rob Herring
---
board/armltd/vexpress/vexpress_common.c | 71 -
include/configs/vexpress_common.h | 4 ++
2 files changed, 4 insertions(+), 71 deletions(-)
diff --git a/board/armltd/vexpress/vexpress_common.c
b/board/armltd/vexpress/vexpress_common.c
index 4c7a7f4..25438fb 100644
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -26,9 +26,6 @@
#include
#include "../drivers/mmc/arm_pl180_mmci.h"
-static ulong timestamp;
-static ulong lastdec;
-
static struct systimer *systimer_base = (struct systimer *)V2M_TIMER01;
static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
@@ -152,8 +149,6 @@ static void vexpress_timer_init(void)
writel(SYSTIMER_EN | SYSTIMER_32BIT |
readl(&systimer_base->timer0control),
&systimer_base->timer0control);
-
- reset_timer_masked();
}
int v2m_cfg_write(u32 devfn, u32 data)
@@ -183,62 +178,6 @@ void reset_cpu(ulong addr)
printf("Unable to reboot\n");
}
-/*
- * Delay x useconds AND perserve advance timstamp value
- * assumes timer is ticking at 1 msec
- */
-void __udelay(ulong usec)
-{
- ulong tmo, tmp;
-
- tmo = usec / 1000;
- tmp = get_timer(0); /* get current timestamp */
-
- /*
-* If setting this forward will roll time stamp then
-* reset "advancing" timestamp to 0 and set lastdec value
-* otherwise set the advancing stamp to the wake up time
-*/
- if ((tmo + tmp + 1) < tmp)
- reset_timer_masked();
- else
- tmo += tmp;
-
- while (get_timer_masked() < tmo)
- ; /* loop till wakeup event */
-}
-
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-void reset_timer_masked(void)
-{
- lastdec = readl(&systimer_base->timer0value) / 1000;
- timestamp = 0;
-}
-
-ulong get_timer_masked(void)
-{
- ulong now = readl(&systimer_base->timer0value) / 1000;
-
- if (lastdec >= now) { /* normal mode (non roll) */
- timestamp += lastdec - now;
- } else {/* count down timer overflowed */
- /*
-* nts = ts + ld - now
-* ts = old stamp, ld = time before passing through - 1
-* now = amount of time after passing though - 1
-* nts = new "advancing time stamp"
-*/
- timestamp += lastdec + SYSTIMER_RELOAD - now;
- }
- lastdec = now;
-
- return timestamp;
-}
-
void lowlevel_init(void)
{
}
@@ -246,13 +185,3 @@ void lowlevel_init(void)
ulong get_board_rev(void){
return readl((u32 *)SYS_ID);
}
-
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-ulong get_tbclk(void)
-{
- return (ulong)CONFIG_SYS_HZ;
-}
diff --git a/include/configs/vexpress_common.h
b/include/configs/vexpress_common.h
index 75a4500..46bab0b 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -132,6 +132,10 @@
#define SCTL_BASE V2M_SYSCTL
#define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
+#define CONFIG_SYS_TIMER_RATE 100
+#define CONFIG_SYS_TIMER_COUNTER (0x10011000 + 0x4)
+#define CONFIG_SYS_TIMER_COUNTS_DOWN
+
/* SMSC9115 Ethernet from SMSC9118 family */
#define CONFIG_SMC911X 1
#define CONFIG_SMC911X_32_BIT 1
--
1.8.1.2
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[U-Boot] [PATCH v2 4/9] ARM: highbank: convert to common timer code
From: Rob Herring
Convert highbank to use the commmon timer code.
Signed-off-by: Rob Herring
---
arch/arm/cpu/armv7/highbank/timer.c | 83 -
include/configs/highbank.h | 4 ++
2 files changed, 4 insertions(+), 83 deletions(-)
diff --git a/arch/arm/cpu/armv7/highbank/timer.c
b/arch/arm/cpu/armv7/highbank/timer.c
index b61cd69..d56bf21 100644
--- a/arch/arm/cpu/armv7/highbank/timer.c
+++ b/arch/arm/cpu/armv7/highbank/timer.c
@@ -7,18 +7,12 @@
*/
#include
-#include
-#include /* for size_t */
-#include/* for NULL */
#include
#include
#undef SYSTIMER_BASE
#define SYSTIMER_BASE 0xFFF34000 /* Timer 0 and 1 base */
-#define SYSTIMER_RATE (15000 / 256)
-static ulong timestamp;
-static ulong lastinc;
static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
/*
@@ -38,80 +32,3 @@ int timer_init(void)
return 0;
}
-
-#define TICK_PER_TIME ((SYSTIMER_RATE + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
-#define NS_PER_TICK(10 / SYSTIMER_RATE)
-
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
- do_div(tick, TICK_PER_TIME);
- return tick;
-}
-
-static inline unsigned long long time_to_tick(unsigned long long time)
-{
- return time * TICK_PER_TIME;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
- unsigned long long tick = us * 1000;
- tick += NS_PER_TICK - 1;
- do_div(tick, NS_PER_TICK);
- return tick;
-}
-
-unsigned long long get_ticks(void)
-{
- ulong now = ~readl(&systimer_base->timer0value);
-
- if (now >= lastinc) /* normal mode (non roll) */
- /* move stamp forward with absolut diff ticks */
- timestamp += (now - lastinc);
- else/* we have rollover of incrementer */
- timestamp += (0x - lastinc) + now;
- lastinc = now;
- return timestamp;
-}
-
-/*
- * Delay x useconds AND preserve advance timstamp value
- * assumes timer is ticking at 1 msec
- */
-void __udelay(ulong usec)
-{
- unsigned long long tmp;
- ulong tmo;
-
- tmo = us_to_tick(usec);
- tmp = get_ticks() + tmo;/* get current timestamp */
-
- while (get_ticks() < tmp) /* loop till event */
-/*NOP*/;
-}
-
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-void reset_timer_masked(void)
-{
- lastinc = ~readl(&systimer_base->timer0value);
- timestamp = 0;
-}
-
-void reset_timer(void)
-{
- reset_timer_masked();
-}
-
-ulong get_timer_masked(void)
-{
- return tick_to_time(get_ticks());
-}
-
-ulong get_tbclk(void)
-{
- return SYSTIMER_RATE;
-}
diff --git a/include/configs/highbank.h b/include/configs/highbank.h
index afb6e64..2504c42 100644
--- a/include/configs/highbank.h
+++ b/include/configs/highbank.h
@@ -21,6 +21,10 @@
#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
+#define CONFIG_SYS_TIMER_RATE (15000/256)
+#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
+#define CONFIG_SYS_TIMER_COUNTS_DOWN
+
/*
* Size of malloc() pool
*/
--
1.8.1.2
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[U-Boot] [PATCH v2 1/9] examples: enable gc-sections option
From: Rob Herring This fixes building time.c when unreferenced functions are added. Signed-off-by: Rob Herring --- examples/api/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/api/Makefile b/examples/api/Makefile index 4d68340..33cc91b 100644 --- a/examples/api/Makefile +++ b/examples/api/Makefile @@ -53,7 +53,7 @@ all: $(obj).depend $(OUTPUT) # $(OUTPUT): $(OBJS) - $(LD) -Ttext $(LOAD_ADDR) -o $@ $^ $(PLATFORM_LIBS) + $(LD) --gc-sections -Ttext $(LOAD_ADDR) -o $@ $^ $(PLATFORM_LIBS) $(OBJCOPY) -O binary $@ $(OUTPUT).bin 2>/dev/null # Rule to build generic library C files -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/9] Consolidate timer code
From: Rob Herring Much of the timer code is re-implemented for each platform/arch yet it is all pretty much the same code. This series introduces a common implementation of timer functions and simplifies the platform code down to 2 or 3 config defines or 2 simple functions. It is intended for platforms with 32-bit freerunning timers. I've converted SH and a couple of ARM platforms as an example, but there are many more still that can be converted. This probably could be extended to work with 16-bit timers as well. I've compiled on ARM, SH4, and PPC. v2: - Make timer code common for all architectures - Convert SH timer to common code - Drop mx27 due to include mess. - Add converting versatile to common code Rob Rob Herring (9): examples: enable gc-sections option Introduce common timer functions sh: convert to common timer code ARM: highbank: convert to common timer code ARM: mx25: convert to common timer code ARM: vexpress: convert to common timer code ARM: socfpga: convert to common timer code ARM: tegra: convert to common timer code ARM: versatile: convert to common timer code arch/arm/cpu/arm926ejs/mx25/timer.c | 117 --- arch/arm/cpu/arm926ejs/versatile/timer.c | 116 -- arch/arm/cpu/armv7/highbank/timer.c | 83 -- arch/arm/cpu/armv7/socfpga/timer.c | 72 --- arch/arm/cpu/tegra-common/Makefile | 2 +- arch/arm/cpu/tegra-common/timer.c| 95 - arch/sh/lib/time.c | 61 +--- board/armltd/vexpress/vexpress_common.c | 71 --- examples/api/Makefile| 2 +- include/asm-generic/global_data.h| 2 + include/configs/highbank.h | 4 ++ include/configs/mx25pdk.h| 4 ++ include/configs/socfpga_cyclone5.h | 5 +- include/configs/tegra-common.h | 3 + include/configs/tx25.h | 5 +- include/configs/versatile.h | 9 ++- include/configs/vexpress_common.h| 4 ++ include/configs/zmx25.h | 6 ++ lib/time.c | 73 +++ 19 files changed, 111 insertions(+), 623 deletions(-) delete mode 100644 arch/arm/cpu/tegra-common/timer.c -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [UBOOT][PATCHv4 5/6] dra7xx_evm: add SPL API, QSPI, and serial flash support
From: Matt Porter
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: Matt Porter
Signed-off-by: Sourav Poddar
---
board/ti/dra7xx/mux_data.h | 10 ++
include/configs/dra7xx_evm.h | 19 +++
2 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index 0a86594..6965cc5 100644
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -51,5 +51,15 @@ const struct pad_conf_entry core_padconf_array_essential[] =
{
{RGMII0_RXD2, (IEN | M0) },
{RGMII0_RXD1, (IEN | M0) },
{RGMII0_RXD0, (IEN | M0) },
+ {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */
+ {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */
+ {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */
+ {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[1] */
+ {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[0] */
+ {GPMC_A18, (M1)}, /* QSPI1_SCLK */
+ {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */
+ {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */
+ {GPMC_CS2, (IEN | PTU | PDIS | M1)},/* QSPI1_CS0 */
+ {GPMC_CS3, (IEN | PTU | PDIS | M1)},/* QSPI1_CS1*/
};
#endif /* _MUX_DATA_DRA7XX_H_ */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 4fbe768..310c7ac 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -42,4 +42,23 @@
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR2
+/* SPI */
+#undef CONFIG_OMAP3_SPI
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_MMAP
+#define CONFIG_SF_DEFAULT_SPEED4800
+#define CONFIG_DEFAULT_SPI_MODESPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS 0
+#define CONFIG_SPL_SPI_CS 0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2
+
#endif /* __CONFIG_DRA7XX_EVM_H */
--
1.7.1
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[U-Boot] [UBOOT][PATCHv4 4/6] spi: add TI QSPI driver
From: Matt Porter
Adds a SPI master driver for the TI QSPI peripheral.
Signed-off-by: Matt Porter
Signed-off-by: Sourav Poddar
[Added quad read support and memory mapped support).
---
drivers/spi/Makefile |1 +
drivers/spi/ti_qspi.c | 328 +
2 files changed, 329 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/ti_qspi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 91d24ce..e5941b0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -38,6 +38,7 @@ COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
+COBJS-$(CONFIG_TI_QSPI) += ti_qspi.o
COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
COBJS-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
new file mode 100644
index 000..d8a03a8
--- /dev/null
+++ b/drivers/spi/ti_qspi.c
@@ -0,0 +1,328 @@
+/*
+ * TI QSPI driver
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated
+ *
+ *Â SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+struct qspi_regs {
+u32 pid;
+u32 pad0[3];
+u32 sysconfig;
+u32 pad1[3];
+u32 intr_status_raw_set;
+u32 intr_status_enabled_clear;
+u32 intr_enable_set;
+u32 intr_enable_clear;
+u32 intc_eoi;
+u32 pad2[3];
+u32 spi_clock_cntrl;
+u32 spi_dc;
+u32 spi_cmd;
+u32 spi_status;
+u32 spi_data;
+u32 spi_setup0;
+u32 spi_setup1;
+u32 spi_setup2;
+u32 spi_setup3;
+u32 spi_switch;
+u32 spi_data1;
+u32 spi_data2;
+u32 spi_data3;
+};
+
+struct qspi_slave {
+ struct spi_slave slave;
+ struct qspi_regs *base;
+ unsigned int mode;
+ u32 cmd;
+ u32 dc;
+};
+
+#define QSPI_TIMEOUT 200
+
+#define QSPI_FCLK 19200
+
+/* Clock Control */
+#define QSPI_CLK_EN(1 << 31)
+#define QSPI_CLK_DIV_MAX 0x
+
+/* Command */
+#define QSPI_EN_CS(n) (n << 28)
+#define QSPI_WLEN(n) ((n-1) << 19)
+#define QSPI_3_PIN (1 << 18)
+#define QSPI_RD_SNGL (1 << 16)
+#define QSPI_WR_SNGL (2 << 16)
+#define QSPI_INVAL (4 << 16)
+#define QSPI_RD_QUAD (7 << 16)
+
+/* Device Control */
+#define QSPI_DD(m, n) (m << (3 + n*8))
+#define QSPI_CKPHA(n) (1 << (2 + n*8))
+#define QSPI_CSPOL(n) (1 << (1 + n*8))
+#define QSPI_CKPOL(n) (1 << (n*8))
+
+/* Status */
+#define QSPI_WC(1 << 1)
+#define QSPI_BUSY (1 << 0)
+#define QSPI_WC_BUSY (QSPI_WC | QSPI_BUSY)
+#define QSPI_XFER_DONE QSPI_WC
+
+#define MM_SWITCH 0x01
+#define MEM_CS 0x100
+#define MEM_CS_UNSELECT0xf0ff
+#define MMAP_START_ADDR0x5c00
+#define CORE_CTRL_IO 0x4a002558
+
+#define QSPI_CMD_READ (0x3 << 0)
+#define QSPI_CMD_READ_QUAD (0x6b << 0)
+#define QSPI_CMD_READ_FAST (0x0b << 0)
+#define QSPI_SETUP0_NUM_A_BYTES(0x2 << 8)
+#define QSPI_SETUP0_NUM_D_BYTES_NO_BITS(0x0 << 10)
+#define QSPI_SETUP0_NUM_D_BYTES_8_BITS (0x1 << 10)
+#define QSPI_SETUP0_READ_NORMAL(0x0 << 12)
+#define QSPI_SETUP0_READ_QUAD (0x3 << 12)
+#define QSPI_CMD_WRITE (0x2 << 16)
+#define QSPI_NUM_DUMMY_BITS(0x0 << 24)
+
+static inline struct qspi_slave *to_qspi_slave(struct spi_slave *slave)
+{
+ return container_of(slave, struct qspi_slave, slave);
+}
+static inline struct qspi_regs *get_qspi_bus(int dev)
+{
+ if (!dev)
+ return (struct qspi_regs *)QSPI_BASE;
+ else
+ return NULL;
+}
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return 1;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ /* CS handled in xfer */
+ return;
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ /* CS handled in xfer */
+ return;
+}
+
+void spi_init(void)
+{
+ /* nothing to do */
+}
+
+void spi_set_up_spi_register(struct qspi_slave *qslave)
+{
+ u32 memval = 0;
+ struct spi_slave *slave = &qslave->slave;
+
+ slave->memory_map = (void *)MMAP_START_ADDR;
+
+ memval |= (QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
+ QSPI_SETUP0_NUM_D_BYTES_NO_BITS | QSPI_SETUP0_READ_NORMAL |
+ QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS);
+
+ writel(memval, &qslave->base->spi_setup0);
+}
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+ struct qspi_slave *qslave = to_qspi_slave(slave);
+
+ uint clk_div;
+
+ if (!hz)
+ clk_div = 0;
+ els
[U-Boot] [UBOOT][PATCHv4 6/6] README: qspi usecase and testing documentation.
Contains documentation and testing details for qspi flash interface. Signed-off-by: Sourav Poddar --- doc/README.ti_qspi_dra_test | 38 ++ doc/README.ti_qspi_flash| 47 +++ 2 files changed, 85 insertions(+), 0 deletions(-) create mode 100644 doc/README.ti_qspi_dra_test create mode 100644 doc/README.ti_qspi_flash diff --git a/doc/README.ti_qspi_dra_test b/doc/README.ti_qspi_dra_test new file mode 100644 index 000..c4540ea --- /dev/null +++ b/doc/README.ti_qspi_dra_test @@ -0,0 +1,38 @@ +- + Simple steps used to test the QSPI at U-Boot +- + +For #1, build the patched U-Boot and load MLO/u-boot.img + +-- +Boot from another medium like MMC +-- + +DRA752 EVM # mmc dev 0 +DRA752 EVM # fatload mmc 0 0x8200 MLO +DRA752 EVM # fatload mmc 0 0x8300 u-boot.img + +-- +Commands to erase/write u-boot/mlo to flash device +-- + +DRA752 EVM # sf probe 0 +[should detect the S25FL256S serial flash device] + +DRA752 EVM # sf erase 0 1 +DRA752 EVM # sf erase 1 1 +DRA752 EVM # sf erase 2 1 +DRA752 EVM # sf erase 3 1 +DRA752 EVM # sf erase 4 1 +DRA752 EVM # sf erase 5 1 +DRA752 EVM # sf erase 6 1 + +DRA752 EVM # sf write 8200 0 1 +DRA752 EVM # sf write 8300 2 7 + +For #2, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power +on. ROM should find the GP header at offset 0 and load/execute SPL. SPL +then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to +find a U-Boot image header at offset 0x2 (set in the config file) +and proceeds to load that image using the U-Boot image payload offset/size +from the header. It will then start U-Boot. diff --git a/doc/README.ti_qspi_flash b/doc/README.ti_qspi_flash new file mode 100644 index 000..1b86d01 --- /dev/null +++ b/doc/README.ti_qspi_flash @@ -0,0 +1,47 @@ +QSPI U-boot support +-- + +Host processor is connected to serial flash device via qpsi +interface. QSPI is a kind of spi module that allows single, +dual and quad read access to external spi devices. The module +has a memory mapped interface which provide direct interface +for accessing data form external spi devices. + +The one QSPI in the device is primarily intended for fast booting +from Quad SPI flash devices. + +Usecase +--- + +MLO/u-boot.img will be flashed from SD/MMC to the flash device +using serial flash erase and write commands. Then, switch settings +will be changed to qspi boot. Then, the ROM code will read MLO +from the predefined location in the flash, where it was flashed and +execute it after storing it in SDRAM. Then, the MLO will read +u-boot.img from flash and execute it from SDRAM. + +SPI mode +--- +SPI mode uses mtd spi framework for transfer and reception of data. +Can be used in: +1. Normal mode: use single pin for transfers +2. Dual Mode: use two pins for transfers. +3. Quad mode: use four pin for transfer + +Memory mapped read mode +--- +In this, SPI controller is configured using configuration port and then +controler is switched to memory mapped port for data read. + +Driver +-- +drivers/qspi/ti_qspi.c +- Newly created file which is responsible for configuring the + qspi controller and also for providing the low level api which + is responsible for transferring the datas from host controller + to flash device and vice versa. + +Testing +--- +A seperated file named README.dra_qspi_test has been created which gives all the +details about the commands required to test qspi at u-boot level. -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [UBOOT][PATCHv4 3/6] driver: mtd: spi: Add memory mapped read support
Qspi controller can have a memory mapped port which can be used for
data read. Added support to enable memory mapped port read.
This patch enables the following:
- It enables exchange of memory map address between mtd and qspi
through the introduction of "memory_map" flag.
- Add support to communicate to the driver that memory mapped
transfer is to be started through introduction of new flags like
"SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".
This will enable the spi controller to do memory mapped configurations
if required.
Signed-off-by: Sourav Poddar
---
drivers/mtd/spi/sf_ops.c |2 ++
drivers/mtd/spi/sf_probe.c |1 +
include/spi.h |3 +++
3 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index c009af5..bee4128 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -269,7 +269,9 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32
offset,
/* Handle memory-mapped SPI */
if (flash->memory_map) {
+ spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
memcpy(data, flash->memory_map + offset, len);
+ spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
return 0;
}
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 1525636..6aa7086 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -203,6 +203,7 @@ struct spi_flash *spi_flash_validate_params(struct
spi_slave *spi, u8 *idcode)
flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256;
flash->sector_size = params->sector_size;
flash->size = flash->sector_size * params->nr_sectors;
+ flash->memory_map = spi->memory_map;
/* Compute erase sector and command */
if (params->flags & SECT_4K) {
diff --git a/include/spi.h b/include/spi.h
index c44ebe8..d5c4e08 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -27,6 +27,8 @@
/* SPI transfer flags */
#define SPI_XFER_BEGIN 0x01/* Assert CS before transfer */
#define SPI_XFER_END 0x02/* Deassert CS after transfer */
+#define SPI_XFER_MEM_MAP 0x08 /* Memory Mapped start */
+#define SPI_XFER_MEM_MAP_END 0x10 /* Memory Mapped End */
/* Header byte that marks the start of the message */
#define SPI_PREAMBLE_END_BYTE 0xec
@@ -46,6 +48,7 @@ struct spi_slave {
unsigned int bus;
unsigned int cs;
unsigned int max_write_size;
+ void *memory_map;
};
/**
--
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[U-Boot] [UBOOT][PATCHv4 0/6] Add TI qspi controller with memory mapped support
This patch series add support for TI qspi controller and in the process also add support for quad read and memory mapped read in mtd spi framework. Testing details: Did a boot from qspi mode on DRA7xx. Testing details present in the last patch of the series. Currently, TI qpsi controller supports only 16MB access. Access for higher MB area will be added later. v3->v4: 1. Remove quad support for now 2. Rebase to master-probe barnach, where qspi framework has changed. 3. Adapt my qspi driver according to the new format suggested by Jagan.. Patches are available at: git://gitorious.org/u-boot-shared/u-boot-qspi.git qspi_v4 Matt Porter (3): omap5: add qspi support spi: add TI QSPI driver dra7xx_evm: add SPL API, QSPI, and serial flash support Sourav Poddar (3): armv7: hw_data: change clock divider setting. driver: mtd: spi: Add memory mapped read support README: qspi usecase and testing documentation. arch/arm/cpu/armv7/omap5/hw_data.c | 10 +- arch/arm/cpu/armv7/omap5/prcm-regs.c |1 + arch/arm/include/asm/arch-omap5/omap.h |3 + arch/arm/include/asm/arch-omap5/spl.h |1 + arch/arm/include/asm/omap_common.h |1 + board/ti/dra7xx/mux_data.h | 10 + doc/README.ti_qspi_dra_test| 38 doc/README.ti_qspi_flash | 47 + drivers/mtd/spi/sf_ops.c |2 + drivers/mtd/spi/sf_probe.c |1 + drivers/spi/Makefile |1 + drivers/spi/ti_qspi.c | 328 include/configs/dra7xx_evm.h | 19 ++ include/spi.h |3 + 14 files changed, 464 insertions(+), 1 deletions(-) create mode 100644 doc/README.ti_qspi_dra_test create mode 100644 doc/README.ti_qspi_flash create mode 100644 drivers/spi/ti_qspi.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [UBOOT][PATCHv4 2/6] armv7: hw_data: change clock divider setting.
Clock requirement for qspi clk is 192 Mhz.
According to the below formulae,
f dpll = f ref * 2 * m /(n + 1)
clockoutx2_Hmn = f dpll / (hmn+ 1)
fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz
For clockoutx2_Hmn to be 768, hmn + 1 should be 4.
Signed-off-by: Sourav Poddar
---
arch/arm/cpu/armv7/omap5/hw_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
b/arch/arm/cpu/armv7/omap5/hw_data.c
index c00bfb8..a1b249e 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -170,7 +170,7 @@ static const struct dpll_params
per_dpll_params_768mhz_es2[NUM_SYS_CLKS] = {
static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {
{32, 0, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1}, /* 12 MHz */
- {96, 4, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1}, /* 20 MHz */
+ {96, 4, 4, 1, 3, 4, 4, 2, -1, -1, -1, -1}, /* 20 MHz */
{160, 6, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1},/* 16.8 MHz */
{20, 0, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1}, /* 19.2 MHz */
{192, 12, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1}, /* 26 MHz */
--
1.7.1
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[U-Boot] [PATCH] TI:armv7: Change CONFIG_SYS_SPL_ARGS_ADDR to a higher address
With changes to increase the size of the device tree (required to move more data out of the kernel and into DT), loading the args at the old address leads to us overwriting things later on. To correct this, load the args file to where we load the device tree anyhow. This is also safe for non-DT booting as in either case we use r2 to pass in the location of things. Signed-off-by: Tom Rini --- include/configs/ti_armv7_common.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index d15850b..07730c9 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -203,7 +203,7 @@ #ifdef CONFIG_SPL_OS_BOOT #define CONFIG_SPL_ENV_SUPPORT /* For 'boot_os' and similar */ -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100) +#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F8 /* FAT */ #define CONFIG_SPL_FAT_LOAD_KERNEL_NAME"uImage" -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [UBOOT][PATCHv4 1/6] omap5: add qspi support
From: Matt Porter
Add QSPI definitions and clock configuration support.
Signed-off-by: Matt Porter
Signed-off-by: Sourav Poddar
---
arch/arm/cpu/armv7/omap5/hw_data.c |8
arch/arm/cpu/armv7/omap5/prcm-regs.c |1 +
arch/arm/include/asm/arch-omap5/omap.h |3 +++
arch/arm/include/asm/arch-omap5/spl.h |1 +
arch/arm/include/asm/omap_common.h |1 +
5 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
b/arch/arm/cpu/armv7/omap5/hw_data.c
index fbbc486..c00bfb8 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -426,6 +426,10 @@ void enable_basic_clocks(void)
#ifdef CONFIG_DRIVER_TI_CPSW
(*prcm)->cm_gmac_gmac_clkctrl,
#endif
+
+#ifdef CONFIG_TI_QSPI
+ (*prcm)->cm_l4per_qspi_clkctrl,
+#endif
0
};
@@ -454,6 +458,10 @@ void enable_basic_clocks(void)
clk_modules_explicit_en_essential,
1);
+#ifdef CONFIG_TI_QSPI
+ setbits_le32((*prcm)->cm_l4per_qspi_clkctrl, (1<<24));
+#endif
+
/* Enable SCRM OPT clocks for PER and CORE dpll */
setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
OPTFCLKEN_SCRM_PER_MASK);
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 579818d..0b1bb46 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -933,6 +933,7 @@ struct prcm_regs const dra7xx_prcm = {
.cm_l4per_gpio8_clkctrl = 0x4a009818,
.cm_l4per_mmcsd3_clkctrl= 0x4a009820,
.cm_l4per_mmcsd4_clkctrl= 0x4a009828,
+ .cm_l4per_qspi_clkctrl = 0x4a009838,
.cm_l4per_uart1_clkctrl = 0x4a009840,
.cm_l4per_uart2_clkctrl = 0x4a009848,
.cm_l4per_uart3_clkctrl = 0x4a009850,
diff --git a/arch/arm/include/asm/arch-omap5/omap.h
b/arch/arm/include/asm/arch-omap5/omap.h
index e9a51d3..414d37a 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -61,6 +61,9 @@
/* GPMC */
#define OMAP54XX_GPMC_BASE 0x5000
+/* QSPI */
+#define QSPI_BASE 0x4B30
+
/*
* Hardware Register Details
*/
diff --git a/arch/arm/include/asm/arch-omap5/spl.h
b/arch/arm/include/asm/arch-omap5/spl.h
index fe8b0c0..57f0de5 100644
--- a/arch/arm/include/asm/arch-omap5/spl.h
+++ b/arch/arm/include/asm/arch-omap5/spl.h
@@ -15,6 +15,7 @@
#define BOOT_DEVICE_MMC15
#define BOOT_DEVICE_MMC26
#define BOOT_DEVICE_MMC2_2 7
+#define BOOT_DEVICE_SPI10
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include/asm/omap_common.h
index 5e2f027..f865c14 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -266,6 +266,7 @@ struct prcm_regs {
u32 cm_l4per_mmcsd4_clkctrl;
u32 cm_l4per_msprohg_clkctrl;
u32 cm_l4per_slimbus2_clkctrl;
+ u32 cm_l4per_qspi_clkctrl;
u32 cm_l4per_uart1_clkctrl;
u32 cm_l4per_uart2_clkctrl;
u32 cm_l4per_uart3_clkctrl;
--
1.7.1
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[U-Boot] [PATCH] env_mmc: fix buffer allocation for armv7
From: Markus Niebel
commit d196bd880347373237d73e0d115b4d51c68cf2ad adds
redundand environment to mmc. The usage of malloc in
env_relocate_spec triggers cache errors on armv7.
Tested on a not mainlined i.MX53 board:
Board: TQMa53
I2C: ready
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
ERROR: v7_dcache_inval_range - start address is not aligned - 0x8f57c2d8
ERROR: v7_dcache_inval_range - stop address is not aligned - 0x8f57e2d8
ERROR: v7_dcache_inval_range - start address is not aligned - 0x8f57e2e0
ERROR: v7_dcache_inval_range - stop address is not aligned - 0x8f5802e0
Using default environment
Signed-off-by: Markus Niebel
---
common/env_mmc.c |9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/common/env_mmc.c b/common/env_mmc.c
index 65aafa9..204d23b 100644
--- a/common/env_mmc.c
+++ b/common/env_mmc.c
@@ -192,11 +192,12 @@ void env_relocate_spec(void)
u32 offset1, offset2;
int read1_fail = 0, read2_fail = 0;
int crc1_ok = 0, crc2_ok = 0;
- env_t *ep, *tmp_env1, *tmp_env2;
+ env_t *ep;
int ret;
- tmp_env1 = (env_t *)malloc(CONFIG_ENV_SIZE);
- tmp_env2 = (env_t *)malloc(CONFIG_ENV_SIZE);
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1);
+
if (tmp_env1 == NULL || tmp_env2 == NULL) {
puts("Can't allocate buffers for environment\n");
ret = 1;
@@ -266,8 +267,6 @@ err:
if (ret)
set_default_env(NULL);
- free(tmp_env1);
- free(tmp_env2);
#endif
}
#else /* ! CONFIG_ENV_OFFSET_REDUND */
--
1.7.9.5
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[U-Boot] [PATCH v3 0/3] Consolidate CONFIG_SYS_HZ definition
From: Rob Herring Since CONFIG_SYS_HZ is required to be 1000, this series consolidates the definition to a common definition and removes it from platform config headers. I split this version into 3 patches to pass maillist filters. The only other change is moving the warning for CONFIG_SYS_HZ != 1000 into lib/time.c so there is only 1 warning per config rather than every include of config_fallbacks.h. Rob Rob Herring (3): config: consolidate CONFIG_SYS_HZ definition config: remove platform CONFIG_SYS_HZ definition part 1/2 config: remove platform CONFIG_SYS_HZ definition part 2/2 arch/arm/include/asm/arch-lpc32xx/config.h | 3 --- arch/blackfin/include/asm/config.h | 7 --- include/config_fallbacks.h | 4 include/configs/A3000.h| 1 - include/configs/APC405.h | 2 -- include/configs/AR405.h| 2 -- include/configs/ASH405.h | 2 -- include/configs/Adder.h| 2 -- include/configs/B4860QDS.h | 1 - include/configs/BC3450.h | 2 -- include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/CATcenter.h| 2 -- include/configs/CMS700.h | 2 -- include/configs/CPC45.h| 1 - include/configs/CPCI2DP.h | 2 -- include/configs/CPCI405.h | 2 -- include/configs/CPCI4052.h | 2 -- include/configs/CPCI405AB.h| 2 -- include/configs/CPCI405DT.h| 2 -- include/configs/CPCI750.h | 1 - include/configs/CPCIISER4.h| 2 -- include/configs/CPU86.h| 2 -- include/configs/CPU87.h| 2 -- include/configs/CRAYL1.h | 1 - include/configs/CU824.h| 1 - include/configs/DB64360.h | 1 - include/configs/DB64460.h | 1 - include/configs/DP405.h| 2 -- include/configs/DU405.h| 2 -- include/configs/DU440.h| 2 -- include/configs/ELPPC.h| 2 -- include/configs/ELPT860.h | 2 -- include/configs/EP88x.h| 2 -- include/configs/ESTEEM192E.h | 2 -- include/configs/EVB64260.h | 2 -- include/configs/EXBITGEN.h | 2 -- include/configs/FADS823.h | 2 -- include/configs/FADS850SAR.h | 2 -- include/configs/FLAGADM.h | 2 -- include/configs/FPS850L.h | 2 -- include/configs/FPS860L.h | 2 -- include/configs/G2000.h| 2 -- include/configs/GEN860T.h | 5 - include/configs/GENIETV.h | 2 -- include/configs/HH405.h| 2 -- include/configs/HIDDEN_DRAGON.h| 1 - include/configs/HUB405.h | 2 -- include/configs/HWW1U1A.h | 2 -- include/configs/ICU862.h | 2 -- include/configs/IDS8247.h | 2 -- include/configs/IP860.h| 2 -- include/configs/IPHASE4539.h | 2 -- include/configs/ISPAN.h| 2 -- include/configs/IVML24.h | 2 -- include/configs/IVMS8.h| 2 -- include/configs/IceCube.h | 2 -- include/configs/JSE.h | 2 -- include/configs/KAREF.h| 3 --- include/configs/KUP4K.h| 2 -- include/configs/KUP4X.h| 2 -- include/configs/M5208EVBE.h| 1 - include/configs/M52277EVB.h| 2 -- include/configs/M5235EVB.h | 1 - include/configs/M5249EVB.h | 2 -- include/configs/M5253DEMO.h| 2 -- include/configs/M5253EVBE.h| 2 -- include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h| 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/M54418TWR.h| 2 -- include/configs/M54451EVB.h| 2 -- include/configs/M54455EVB.h| 2 -- include/configs/M5475EVB.h | 1 - include/configs/M5485EVB.h | 1 - include/configs/MBX.h | 2 -- include/configs/MBX860T.h | 2 -- include/configs/MERGERBOX.h| 1 - include/configs/METROBOX.h | 3 --- include/configs/MHPC.h | 2 -- include/configs/MIP405.h | 2 -- include/configs/MOUSSE.h | 1 - include/configs/MPC8260A
[U-Boot] [PATCH v3 1/3] config: consolidate CONFIG_SYS_HZ definition
From: Rob Herring According to the README, CONFIG_SYS_HZ must be 1000 and most platforms follow that. In preparation to remove CONFIG_SYS_HZ from all these platforms, provide a common definition. The platforms which use a value other than 1000 will get build warning now. These configs are: include/configs/M5271EVB.h:#define CONFIG_SYS_HZ100 include/configs/balloon3.h:#define CONFIG_SYS_HZ 325 /* Timer @ 325 Hz */ include/configs/idmr.h:#define CONFIG_SYS_HZ(5000 / 64) include/configs/mini2440.h:#define CONFIG_SYS_HZ1562500 include/configs/mx1ads.h:#define CONFIG_SYS_HZ 3686400 include/configs/omap3_zoom2.h:#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) include/configs/omap730p2.h:#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) include/configs/palmld.h:#defineCONFIG_SYS_HZ 325 /* Timer @ 325 Hz */ include/configs/palmtc.h:#defineCONFIG_SYS_HZ 3686400 /* Timer @ 3686400 Hz */ include/configs/rsk7203.h:#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) include/configs/rsk7264.h:#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) include/configs/rsk7269.h:#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) include/configs/scb9328.h:#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ include/configs/versatile.h:#define CONFIG_SYS_HZ (100 / 256) include/configs/zipitz2.h:#define CONFIG_SYS_HZ 325 /* Timer @ 325 Hz */ Signed-off-by: Rob Herring --- v3: - move warning to lib/time.c - split to 3 patches v2: - Add warning for boards defining CONFIG_SYS_HZ. Boards using value other than 1000 will now generate warnings. - Change KAREF, METROBOX, and MVBLUE to use 1000. Appeared to be a typo. - Convert a few more boards to remove CONFIG_SYS_HZ that were missed in v1. include/config_fallbacks.h | 4 lib/time.c | 4 2 files changed, 8 insertions(+) diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index e59ee96..4c25289 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -53,4 +53,8 @@ #define HAVE_BLOCK_DEVICE #endif +#ifndef CONFIG_SYS_HZ +#define CONFIG_SYS_HZ 1000 +#endif + #endif /* __CONFIG_FALLBACKS_H */ diff --git a/lib/time.c b/lib/time.c index 68b8ff4..6514835 100644 --- a/lib/time.c +++ b/lib/time.c @@ -8,6 +8,10 @@ #include #include +#if CONFIG_SYS_HZ != 1000 +#warning "CONFIG_SYS_HZ must be 1000 and should not be defined by platforms" +#endif + #ifndef CONFIG_WD_PERIOD # define CONFIG_WD_PERIOD (10 * 1000 * 1000) /* 10 seconds default*/ #endif -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: sdhci: Avoid commands errors by simple timeout adaptation.
Hi Jaehoon, On 10/04/2013 06:39 AM, Jaehoon Chung wrote: Hi Przemyslaw, On 10/01/2013 09:16 PM, Przemyslaw Marczak wrote: Old command timeout value was too small and it caused I/O errors which led to uncompleted read/write/erase operations and filesystem errors. Timeout adaptation fixes this issue. Changes in sdhci_send_command() function: - change timeout variable to static - increase default command timeout to 100 ms - add definition of max command timeout value, which can be redefined in each board config file - wait for card ready state for max defined time if it doesn't exceed defined maximum or return COMM_ERR Once successfully increased timeout value will be used in next function call. This fix was tested on Goni, Trats, Trats2 boards by testing UMS on MMC storage. Signed-off-by: Przemyslaw Marczak --- drivers/mmc/sdhci.c | 34 +++--- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 4261991..af11fc5 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -110,6 +110,22 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, return 0; } +/* + * No command will be sent by driver if card is busy, so driver must wait + * for card ready state. + * Every time when card is busy after timeout then (last) timeout value will be + * increased twice but only if it doesn't exceed global defined maximum. + * Each function call will use last timeout value. Max timeout can be redefined + * in board config file. + */ +#ifndef CONFIG_SDHCI_CMD_MAX_TIMEOUT +#define CONFIG_SDHCI_CMD_MAX_TIMEOUT 3200 How do you get "3200"? Is it too long time? After testing mmc read/write operations on Trats emmc card I observed that in most cases the timeout value was incremented to 800ms. You can add reset timeout at every function call and than you will see how often and what time values are needed by commands, in most cases it is small time value but after transfer ends - send status command is send, which needs more time. I suppose that there are a lot of card types which need some more time - so I put there this value to be sure that in most cases this MAX is good enough. +#endif +#define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT 100 + +/* Timeout unit - ms */ +static unsigned int cmd_timeout = CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT; Global variable? Ok, maybe I should put this inside function... Regards, -- Przemyslaw Marczak Samsung R&D Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/10] usb:udc:s3c: Reduce dcache invalidate range for UDC receive buffer
Hi Marek, > Dear Lukasz Majewski, > > > Hi Marek, > > > > > Dear Lukasz Majewski, > > > > > > > The s3c udc driver sends data in a max packet size. Therefore > > > > the dcache invalidate range shall be equal to max packet, not > > > > the entire DMA_BUFFER_SIZE. > > > > > > > > Signed-off-by: Lukasz Majewski > > > > Cc: Marek Vasut > > > > --- > > > > > > > > drivers/usb/gadget/s3c_udc_otg_xfer_dma.c |2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index > > > > d7af5e9..5e3ba76 100644 --- > > > > a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ > > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -117,7 +117,7 @@ > > > > static int setdma_rx(struct s3c_ep *ep, struct s3c_request *req) > > > > > > > > invalidate_dcache_range((unsigned long) > > > > > > > > ep->dev->dma_buf[ep_num], (unsigned long) > > > > ep->dev->dma_buf[ep_num] > > > > - + DMA_BUFFER_SIZE); > > > > + + ep->ep.maxpacket); > > > > > > Is this maxpacket _always_ multiple of cacheline big or will you > > > need some ROUND_UP() call here ? > > > > The maxpacket value is equal to 64 B for EP0 and 512 B for EP1 and > > EP2 (wMaxPacketSize field of the descriptor). > > > > Moreover this invalidation is done on already memaligned buffer > > (which is 16 KiB). In other words, we are copying data to specially > > prepared buffer (per UDC device EP, not usb_request). > > > > In my opinion the maxpacket don't need to be rounded up. > > So it can never happen that ep maxpacket is unaligned? maxpacket can be defined as e.g. 16 Bytes (wMaxPacketSize). However the underlying buffer (on which we perform dcache invalidation) is already cache line aware (defined with memalign). Also we copy the usb request data there (yes I know that this is not the best possible solution). Afterwards address of this buffer is a starting point for DMA. Since we are sending in the HW one packet at a time (with maxpacket size), then it should be enough to invalidate only up to 512 B. Previously the whole buffer (DMA_BUFFER_SIZE -> 16 KiB) was invalidated each time. Since we are invalidating cache content corresponding to buffer mapped memory, we are safe when D-cache controller invalidates 32B (CACHE_LINE_SIZE) instead of 16B. > > > > Best regards, > > > Marek Vasut > > > > Since this is Samsung's UDC specific (not THOR download) - would it > > be possible to take this patch from this patch series (of course if > > my above rationale is acceptable for you)? > > You mean for .10 ? This patch hasn't introduced regressions for DFU/UMS. It can be applied to .10 or to u-boot-usb/next. > > Best regards, > Marek Vasut -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/10] usb:g_dnl:f_thor: USB download function to support TIZEN's THOR protocol
Hi Marek,
> Dear Lukasz Majewski,
>
> > Hi Marek,
> >
> > > Dear Lukasz Majewski,
> > >
> > > [...]
> > >
> > > > +static struct f_thor *thor_func;
> > > > +static inline struct f_thor *func_to_thor(struct usb_function
> > > > *f) +{
> > > > + return container_of(f, struct f_thor, usb_function);
> > > > +}
> > > > +
> > > > +DEFINE_CACHE_ALIGN_BUFFER(char, thor_tx_data_buf, sizeof(struct
> > > > rsp_box)); +DEFINE_CACHE_ALIGN_BUFFER(char, thor_rx_data_buf,
> > > > sizeof(struct rqt_box));
> > >
> > > This should either be uint8_t or unsigned char. A buffer shall
> > > not be (signed) char.
> >
> > Yes. I agree. This buffer shall be unsigned char. I will correct
> > that.
> >
> > > Also, I suspect you want to use DEFINE_CACHE_ALIGN_BUFFER here,
> > > no ?
> >
> > I'm a bit confused I do use DEFINE_CACHE_ALIGN_BUFFER for those
> > buffers.
>
> OOPS!
>
> > > > +/* **
> > > > */ +/* THOR protocol - transmission
> > > > handling */ +/*
> > > > ** */
> > > > +DEFINE_CACHE_ALIGN_BUFFER(char, f_name, F_NAME_BUF_SIZE);
> > >
> > > Ditto
> >
> > I believe that buffer for storing file name (f_name) shall be
> > defined as char.
>
> OK, good point.
>
> [...]
> > > > +
> > > > + rsp->rsp = rqt->rqt;
> > > > + rsp->rsp_data = rqt->rqt_data;
> > > > +
> > > > + switch (rqt->rqt_data) {
> > > > + case RQT_CMD_REBOOT:
> > > > + debug("TARGET RESET\n");
> > > > + send_rsp(rsp);
> > > > + g_dnl_unregister();
> > > > + dfu_free_entities();
> > > > + run_command("reset", 0);
> > > > + break;
> > > > + case RQT_CMD_POWEROFF:
> > > > + case RQT_CMD_EFSCLEAR:
> > > > + send_rsp(rsp);
> > >
> > > This case fallthrough is intentional here ?
> >
> > Yes. Thor protocol requires to receive response from device even
> > when HOST PC ordered it to power off.
> >
> > Also, on the target only reboot command is supported.
>
> But this will fall through into the default: branch here.
>From my perspective this looks like a proper behaviour.
We send response that we have received such request and display
information that it is not supported.
>
> > > > + default:
> > > > + printf("Command not supported -> cmd: %d\n",
> > > > rqt->rqt_data);
> > > > + return -EINVAL;
> > > > + }
> > > > +
> > > > + return true;
> > > > +}
>
> [...]
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] : Discussion on Serial Flash Discoverable Parameters (SFDP): JESD216A
Added linux-mtd mailing list. and also few developer from winbond. On Fri, Oct 4, 2013 at 12:21 AM, Jagan Teki wrote: > Hi All, > > As all we know that the spi_flash is a day-by-day developing hardware > where each vendor has followed their own standard to get the best to > come out. > > I see SFDP looks like a common standard where most of the vendors were > following to get the flash parameter information at runtime. > > I have couple of questions, added few flash vendors on cc - request > for all try to give some inputs > 1. Does all vendors follow this standard at-least from the latest parts? > 2. Any idea who are not following SFDP > 3. Does the format of getting data from SFDP is varies from vendor to > vendor or same? > 4. Command to get the SFDP is same for all vendors? > 5. What type of information we can get any list? > > Request for your comments, this will really help to shape the > spi_flash code more dynamic. -- Thanks, Jagan. Jagannadha Sutradharudu Teki, E: jagannadh.t...@gmail.com, P: +91-9676773388 Engineer - System Software hacker U-boot - SPI Custodian and Zynq APSOC Ln: http://www.linkedin.com/in/jaganteki ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add code for spi half duplex operation for enc28j60
Hi Seems like some issues with checkpatch.pl and use proper commit msg header. Please fix and use u-boot-spi.git repo with master-probe branch. Please test the same on your hw and let me know for any issues. On Tue, Aug 13, 2013 at 8:15 AM, Asok Subramanian wrote: > Add code for spi half duplex operation for enc28j60 > > The current code assumes full duplex spi operation. But there are > processors like imx23 which > only permit half duplex operation. This fix does half duplex operation based > on the definition > of CONFIG_SPI_HALF_DUPLEX > > Signed-off-by: Asok Subramanian > --- > drivers/net/enc28j60.c | 23 +++ > 1 file changed, 23 insertions(+) > > diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c > index ec33764..753fe26 100644 > --- a/drivers/net/enc28j60.c > +++ b/drivers/net/enc28j60.c > @@ -157,9 +157,17 @@ static u8 enc_r8(enc_dev_t *enc, const u16 reg) > > enc_set_bank(enc, reg); > dout[0] = CMD_RCR(reg); > +#ifndef CONFIG_SPI_HALF_DUPLEX > spi_xfer(enc->slave, nbytes * 8, dout, din, > SPI_XFER_BEGIN | SPI_XFER_END); > return din[nbytes-1]; > +#else > +spi_xfer(enc->slave, (nbytes -1) * 8, dout, NULL, > +SPI_XFER_BEGIN ); > +spi_xfer(enc->slave, 8, NULL, din, > +SPI_XFER_END ); > +return din[0]; > +#endif > } > > /* > @@ -175,6 +183,7 @@ static u16 enc_r16(enc_dev_t *enc, const u16 reg) > > enc_set_bank(enc, reg); > dout[0] = CMD_RCR(reg); > +#ifndef CONFIG_SPI_HALF_DUPLEX > spi_xfer(enc->slave, nbytes * 8, dout, din, > SPI_XFER_BEGIN | SPI_XFER_END); > result = din[nbytes-1]; > @@ -183,6 +192,20 @@ static u16 enc_r16(enc_dev_t *enc, const u16 reg) > SPI_XFER_BEGIN | SPI_XFER_END); > result |= din[nbytes-1] << 8; > return result; > +#else > +spi_xfer(enc->slave, (nbytes -1) * 8, dout, NULL, > +SPI_XFER_BEGIN ); > +spi_xfer(enc->slave, 8, NULL, din, > +SPI_XFER_END ); > +result = din[0]; > +dout[0]++; /* next register */ > +spi_xfer(enc->slave, (nbytes -1) * 8, dout, NULL, > +SPI_XFER_BEGIN ); > +spi_xfer(enc->slave, 8, NULL, din, > +SPI_XFER_END ); > +result |= din[0] << 8; > +return result; > +#endif > } > > /* > -- > 1.7.9.5 -- Thanks, Jagan. Jagannadha Sutradharudu Teki, E: jagannadh.t...@gmail.com, P: +91-9676773388 Engineer - System Software Hacker U-boot - SPI Custodian and Zynq APSOC Ln: http://www.linkedin.com/in/jaganteki ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Lots of SPDX-License Identifer have a trailing space
Hello Wolfgang > > Is this space the one intentinally added? > > (If not, I can send a patch to fix it.) > > No, this is definitely not intentional. OK. SPDX might be your turf, so I will hold back sending a patch. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i2c, core: optimze i2c_set_bus_num()
Hi Heiko,
> Hello Lukasz,
>
> Am 04.10.2013 10:42, schrieb Lukasz Majewski:
> > Hi Heiko,
> >
> >> check first, if we are on the bus, we want to enable. If so,
> >> return immediately, do not calc max adapter number, nor check
> >> other things.
> >>
> >> Signed-off-by: Heiko Schocher
> >> Cc: Lukasz Majewski
> >> ---
> >> drivers/i2c/i2c_core.c | 18 ++
> >> 1 file changed, 10 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
> >> index d1072e8..170423a 100644
> >> --- a/drivers/i2c/i2c_core.c
> >> +++ b/drivers/i2c/i2c_core.c
> >> @@ -278,20 +278,22 @@ unsigned int i2c_get_bus_num(void)
> >>*/
> >> int i2c_set_bus_num(unsigned int bus)
> >> {
> >> - int max = ll_entry_count(struct i2c_adapter, i2c);
> >> + int max;
> >> +
> >> + if ((bus == I2C_BUS)&& (I2C_ADAP->init_done> 0))
> >> + return 0;
> >>
> >> - if (I2C_ADAPTER(bus)>= max) {
> >> - printf("Error, wrong i2c adapter %d max %d
> >> possible\n",
> >> - I2C_ADAPTER(bus), max);
> >> - return -2;
> >> - }
> >> #ifndef CONFIG_SYS_I2C_DIRECT_BUS
> >>if (bus>= CONFIG_SYS_NUM_I2C_BUSES)
> >>return -1;
> >> #endif
> >>
> >> - if ((bus == I2C_BUS)&& (I2C_ADAP->init_done> 0))
> >> - return 0;
> >> + max = ll_entry_count(struct i2c_adapter, i2c);
> >> + if (I2C_ADAPTER(bus)>= max) {
> >> + printf("Error, wrong i2c adapter %d max %d
> >> possible\n",
> >
> > Since you are the maintainer of the i2c code, you will decide if
> > those changes shall be applied (they are really cosmetic) :-).
>
> Exactly for this reason a "Acked-by" would not disturb me ;-)
So as requested :-) :
Acked-by: Lukasz Majewski
>
> > My suggestion: printf -> error() macro @ common.h
>
> Yep ... but this should be a seperate patch.
>
> >> + I2C_ADAPTER(bus), max);
> >> + return -2;
> >
> > I've noticed that i2c_core uses -1/-2 return values for errors
> > globaly.
> >
> > So for a new code we could start using defines from errno.h (-2 ->
> > -ENODEV) ?
>
> Yes, good point!
>
> bye,
> Heiko
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH v3 0/6] Second step towards Kbuild: Descend down like Kbuild
Hello Simon > Can you please explain why you need to change the .lds files - sorry it is > not obvious to me. This series changes how objects are linked. Before this series, drivers/bios_emulator/libatibiosemu.o drivers/block/libblock.o drivers/pcmcia/libpcmcia.o ... are directly linked into ./u-boot at the final link stage. After this series, drivers/bios_emulator/built-in.o drivers/block/built-in.o drivers/pcmcia/built-in.o ... are combined into drivers/libdrivers.o and then drivers/libdrivers.o is linked into ./u-boot. This means that all symbols in drivers/bios_emulator/built-in.o drivers/block/built-in.o drivers/pcmcia/built-in.o ... are also included in drivers/libdrivers.o > --- a/board/tqc/tqm8xx/u-boot.lds > +++ b/board/tqc/tqm8xx/u-boot.lds > @@ -23,8 +23,8 @@ SECTIONS > board/tqc/tqm8xx/libtqm8xx.o (.text*) > disk/libdisk.o (.text*) > drivers/net/libnet.o (.text*) > -drivers/pcmcia/libpcmcia.o (.text.pcmcia_on) > -drivers/pcmcia/libpcmcia.o (.text.pcmcia_hardware_enable) > +drivers/libdrivers.o (.text.pcmcia_on) > +drivers/libdrivers.o (.text.pcmcia_hardware_enable) > > . = DEFINED(env_offset) ? env_offset : .; > common/env_embedded.o (.ppcenv*) This is to avoid multiple definition error at the link stage. .test.pcmcia_on and .text.pcmcia_hardware_enable are included in both drivers/pcmcia/built-in.o and drivers/libdrivers.o so I replaced the former with the latter. > diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds > index f9c2beb..b30b667 100644 > --- a/board/LEOX/elpt860/u-boot.lds > +++ b/board/LEOX/elpt860/u-boot.lds > @@ -34,7 +34,6 @@ SECTIONS > arch/powerpc/cpu/mpc8xx/libmpc8xx.o(.text*) > board/LEOX/elpt860/libelpt860.o(.text*) > arch/powerpc/lib/libpowerpc.o (.text*) > -/*drivers/rtc/librtc.o (.text*)*/ > > . = env_offset; > common/env_embedded.o Becuase only a comment line is deleted, this change has no impact and I might not have needed to touch it actually. I deleted it just because we don't have drivers/rtc/librtc.c any more. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Fix problems in chip select selection in imx23, 28 spi code
Hi,
Try to fix the above issues.
Use u-boot-spi.git repo with master-probe branch.
Please test the same on your hw and let me know for any issues.
On Tue, Aug 27, 2013 at 6:54 PM, Jagan Teki wrote:
> On Tue, Aug 27, 2013 at 2:40 PM, Jagan Teki wrote:
>> Hi,
>>
>> On Tue, Aug 27, 2013 at 4:11 AM, Asok Subramanian wrote:
>>> Fix problems in chip select selection in imx23,28 spi code
>>>
>>> The spi function code for imx23,28 currently does not work for chip select
>>> other than 0.
>>> This is because the register HW_SSP_CTRL0 is first reset and the code does
>>> not load the CS bits
>>> again into HW_SSP_CTRL0 after the reset. The proposed fix reloads the CS
>>> bits after the reset.
>>>
>>> Signed-off-by: Asok Subramanian
>>> ---
>>> drivers/spi/mxs_spi.c |4 +++-
>>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
>>> index 3cf7142..15681dc 100644
>>> --- a/drivers/spi/mxs_spi.c
>>> +++ b/drivers/spi/mxs_spi.c
>>> @@ -32,6 +32,7 @@ struct mxs_spi_slave {
>>> uint32_tmax_khz;
>>> uint32_tmode;
>>> struct mxs_ssp_regs*regs;
>>> +unsigned intcs;
>>> };
>>>
>>> static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave)
>>> @@ -74,6 +75,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
>>> unsigned int cs,
>>> mxs_slave->max_khz = max_hz / 1000;
>>> mxs_slave->mode = mode;
>>> mxs_slave->regs = mxs_ssp_regs_by_bus(bus);
>>> +mxs_slave->cs = cs;
>>> ssp_regs = mxs_slave->regs;
>>>
>>> reg = readl(&ssp_regs->hw_ssp_ctrl0);
>>> @@ -102,7 +104,7 @@ int spi_claim_bus(struct spi_slave *slave)
>>>
>>> mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
>>>
>>> -writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, &ssp_regs->hw_ssp_ctrl0);
>>> +writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT | (mxs_slave->cs) <<
>>> MXS_SSP_CHIPSELECT_SHIFT, &ssp_regs->hw_ssp_ctrl0);
>>>
>>> reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
>>> reg |= (mxs_slave->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
>>> --
>>> 1.7.9.5
>>
>> Please use the proper commit head.
>> Fix problems in chip select selection in imx23,28 spi code
>> spi: mxs_spi:
>
> And also please fix the check-patch errors:
>
> ERROR: Unrecognized email address: 'Asok Subramanian '
> #18:
> Signed-off-by: Asok Subramanian
>
> ERROR: patch seems to be corrupt (line wrapped?)
> #29: FILE: drivers/spi/mxs_spi.c:31:
> uint32_tmax_khz;
>
> WARNING: line over 80 characters
> #49: FILE: drivers/spi/mxs_spi.c:104:
> +writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT | (mxs_slave->cs) <<
> MXS_SSP_CHIPSELECT_SHIFT, &ssp_regs->hw_ssp_ctrl0);
>
> total: 2 errors, 1 warnings, 22 lines checked
>
>
> --
> Thanks,
> Jagan.
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki,
E: jagannadh.t...@gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
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Re: [U-Boot] [PATCH 06/10] usb:g_dnl:f_thor: USB download function to support TIZEN's THOR protocol
Dear Lukasz Majewski,
> Hi Marek,
>
> > Dear Lukasz Majewski,
> >
> > [...]
> >
> > > +static struct f_thor *thor_func;
> > > +static inline struct f_thor *func_to_thor(struct usb_function *f)
> > > +{
> > > + return container_of(f, struct f_thor, usb_function);
> > > +}
> > > +
> > > +DEFINE_CACHE_ALIGN_BUFFER(char, thor_tx_data_buf, sizeof(struct
> > > rsp_box)); +DEFINE_CACHE_ALIGN_BUFFER(char, thor_rx_data_buf,
> > > sizeof(struct rqt_box));
> >
> > This should either be uint8_t or unsigned char. A buffer shall not be
> > (signed) char.
>
> Yes. I agree. This buffer shall be unsigned char. I will correct that.
>
> > Also, I suspect you want to use DEFINE_CACHE_ALIGN_BUFFER here, no ?
>
> I'm a bit confused I do use DEFINE_CACHE_ALIGN_BUFFER for those
> buffers.
OOPS!
> > > +/* ** */
> > > +/* THOR protocol - transmission handling */
> > > +/* ** */
> > > +DEFINE_CACHE_ALIGN_BUFFER(char, f_name, F_NAME_BUF_SIZE);
> >
> > Ditto
>
> I believe that buffer for storing file name (f_name) shall be defined
> as char.
OK, good point.
[...]
> > > +
> > > + rsp->rsp = rqt->rqt;
> > > + rsp->rsp_data = rqt->rqt_data;
> > > +
> > > + switch (rqt->rqt_data) {
> > > + case RQT_CMD_REBOOT:
> > > + debug("TARGET RESET\n");
> > > + send_rsp(rsp);
> > > + g_dnl_unregister();
> > > + dfu_free_entities();
> > > + run_command("reset", 0);
> > > + break;
> > > + case RQT_CMD_POWEROFF:
> > > + case RQT_CMD_EFSCLEAR:
> > > + send_rsp(rsp);
> >
> > This case fallthrough is intentional here ?
>
> Yes. Thor protocol requires to receive response from device even when
> HOST PC ordered it to power off.
>
> Also, on the target only reboot command is supported.
But this will fall through into the default: branch here.
> > > + default:
> > > + printf("Command not supported -> cmd: %d\n",
> > > rqt->rqt_data);
> > > + return -EINVAL;
> > > + }
> > > +
> > > + return true;
> > > +}
[...]
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Re: [U-Boot] [PATCH 01/10] usb:udc:s3c: Reduce dcache invalidate range for UDC receive buffer
Dear Lukasz Majewski, > Hi Marek, > > > Dear Lukasz Majewski, > > > > > The s3c udc driver sends data in a max packet size. Therefore the > > > dcache invalidate range shall be equal to max packet, not the entire > > > DMA_BUFFER_SIZE. > > > > > > Signed-off-by: Lukasz Majewski > > > Cc: Marek Vasut > > > --- > > > > > > drivers/usb/gadget/s3c_udc_otg_xfer_dma.c |2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index d7af5e9..5e3ba76 > > > 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > > +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > > @@ -117,7 +117,7 @@ static int setdma_rx(struct s3c_ep *ep, struct > > > s3c_request *req) > > > > > > invalidate_dcache_range((unsigned long) > > > > > > ep->dev->dma_buf[ep_num], (unsigned long) ep->dev->dma_buf[ep_num] > > > - + DMA_BUFFER_SIZE); > > > + + ep->ep.maxpacket); > > > > Is this maxpacket _always_ multiple of cacheline big or will you need > > some ROUND_UP() call here ? > > The maxpacket value is equal to 64 B for EP0 and 512 B for EP1 and EP2 > (wMaxPacketSize field of the descriptor). > > Moreover this invalidation is done on already memaligned buffer (which > is 16 KiB). In other words, we are copying data to specially prepared > buffer (per UDC device EP, not usb_request). > > In my opinion the maxpacket don't need to be rounded up. So it can never happen that ep maxpacket is unaligned? > > Best regards, > > Marek Vasut > > Since this is Samsung's UDC specific (not THOR download) - would it be > possible to take this patch from this patch series (of course if my > above rationale is acceptable for you)? You mean for .10 ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Lots of SPDX-License Identifer have a trailing space
Dear Masahiro, In message <20131004172305.ee95.aa925...@jp.panasonic.com> you wrote: > > I noticed many of SPDX-License blocks > have a trailing space after "GPL-2.0+". Oops... > Is this space the one intentinally added? > (If not, I can send a patch to fix it.) No, this is definitely not intentional. > I am not sure whether I should precisely copy and paste > SPDX indentifier or drop a trailing space > when I add a new source file. Trailing white space should not be present anywhere in the source files. Thanks for noticing & reporting this issue! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "To IBM, 'open' means there is a modicum of interoperability among some of their equipment."- Harv Masterson ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 01/19] Makefile: prepare for using Kbuild-style Makefile
Hello Simon > > +# Tentative step for Kbuild-style makefiles coexist with conventional > > U-Boot style makefiles > > +# U-Boot conventional sub makefiles always include some other makefiles. > > +# So, the build system searches a line beginning with "include" before > > entering into the sub makefile > > +# in order to distinguish which style it is. > > > > Would looking for obj- be better or worse? At first I thought of this but I was kind of worried whether all makefiles should forcibly have obj-y or obj-. arch/arm/cpu/armv7/tegra114/ arch/arm/cpu/armv7/tegra30/ directories have no source files but only a Makefile. After all, I simply added obj- := line in them, so I think your suggestion will work. If you prefer to search obj-, I will consider to change at version 3. In any case, this ugly grep switch is tentative. I want to refactor all makefiles and delete this switch as soon as possible. > an indent might help here, and below. I will fix at v3. > > + fi > > > > $(LIBS): depend $(SUBDIR_TOOLS) > > - $(MAKE) -C $(dir $(subst $(obj),,$@)) > > + if grep -q "^include" $(dir $(subst $(obj),,$@))Makefile; > > then \ > > > > This check seems to appear a lot - could it become a $(call ...) perhaps? I did not care so much about this part becuase it is temporary. But re-writing it shortly with $(call ...) is not difficult. I will try at v3. Thanks for your advice. > Re testing, I used: > > $ ./tools/buildman/buildman -b try-kbuild -k > > and confirmed that the binaries do change, for example, with cm41xx: > > $ wc ... >13485418 123176 > try-kbuild/01_of_20_g0c5274e6_Prepare-v2013.04-rc4/cm41xx/u-boot.bin >13485417 123188 > try-kbuild/02_of_20_gd3068182_Makefile--prepare-fo/cm41xx/u-boot.bin > > The change may well be harmless though. It is probably because of include/generated/version_autogenerated.h The length of PLAIN_VERSION and U_BOOT_VERSION changes because the output `git describe` command is used for here. Actually I gave it a try. For master branch (Prepare v2013.04-rc4), I got: #define PLAIN_VERSION "2013.10-rc4" #define U_BOOT_VERSION "U-Boot 2013.10-rc4" #define CC_VERSION_STRING "arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.7.3-1ubuntu1) 4.7.3" #define LD_VERSION_STRING "GNU ld (GNU Binutils for Ubuntu) 2.23.2" For try-kbuild branch (Makefile: prepare for using Kbuild-style Makefile) I got: #define PLAIN_VERSION "2013.10-rc4-1-gc31a399" #define U_BOOT_VERSION "U-Boot 2013.10-rc4-1-gc31a399" #define CC_VERSION_STRING "arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.7.3-1ubuntu1) 4.7.3" #define LD_VERSION_STRING "GNU ld (GNU Binutils for Ubuntu) 2.23.2" For the list of things you should take into account to get identical output files, please refer the thread of version1 of this series: [U-Boot] [PATCH 00/19] First step towards Kbuild: Use Kbuild style makefiles Message-Id: <20130917093533.738a.aa925...@jp.panasonic.com> > (2) Git commit hash > > Git commit hash is contained in include/generated/version_autogenerated.h. > So, I also modified include/version.h not to include it as follows: > > #ifndef DO_DEPS_ONLY > -#include "generated/version_autogenerated.h" > +/* #include "generated/version_autogenerated.h" */ > +#define PLAIN_VERSION "__DUMMY__" > +#define U_BOOT_VERSION "__DUMMY__" > +#define CC_VERSION_STRING "__DUMMY__" > +#define LD_VERSION_STRING "__DUMMY__" > #endif This is what I did when I compared md5sum. After applying above as a prerequisite commit, I tried 'tools/buildman/buildman -b try-kbuild -k' again and I got the same size for cm41xx/u-boot.bin If you compare the size of u-boot.bin, please take care of the order of object files too. I also mentioned this in the thread of v1. > It would be nice to add a feature to buildman to compare binaries. Of > course we would need to add a Makefile option to disable the timestamp > embedding first, since all binaries are different because of that. Sounds a good idea. I will take a look when I have time. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/6] power: Explicitly select pmic device's bus
Hello Lukasz, Am 04.10.2013 10:58, schrieb Lukasz Majewski: Hi Heiko, Hello Lukasz, Am 03.10.2013 18:15, schrieb Lukasz Majewski: Hi Heiko, Sorry for a late reply. Hello Lukasz, Am 02.10.2013 17:11, schrieb Lukasz Majewski: Hi Leela, [...] but exactly I want to get rid of this code as it is in pmic_select() someday, when all i2c drivers converted to the new i2c framework. My 2 cents. I understand that pmic_select() preserves old i2c bus number, when PMIC performs transmission. This is probably done to not break the legacy code (where one driver assumed, that it is alone). If this is necessary, then I'm OK with this. However I personally think, that drivers shall call API functions from i2c core (like i2c_bus_num()) only with bus number to switch and do not store and preserve the i2c value. This is my personal comment. Full Ack. I am just thinking, that we can get rid of such constructs, independent of the new i2c framework switch. We just need to introduce a "current_i2c_cmd_bus" in common/cmd_i2c.c. This var stores the current i2c bus where i2c commands are executed ... I think that "last used bus" variable shall be stored/managed at i2c_core.c. I can use i2c without cmd_i2c.c compiled (as it is with Thats the case for the new framework! It stores the current bus, and so i2c_set_bus_num() can decide, if it is necessary to switch to a new bus ... Additionally to get rid of such "store oldbus, switch to new, restore old bus" constructs, the i2c commands needs to store somewhere, which i2c bus the i2c commands currently use, because you can do a "i2c md ..." then a "date" (maybe on antoher i2c bus) and then again a "i2c md ..." I think, thats the real historical reason for doing all over the code such "save oldbus" code ... That var (saying i2c_cur_cmd_bus) can easily stored in common/cmd_i2c.c, as commands are only useable after relocation. So, we must just add a i2c_set_bus_num(i2c_cur_cmd_bus) call before a command is executed ... That can be done in common/cmd_i2c.c also ... So, in the end, before every i2c access we call i2c_set_bus_num() and have no longer to store an "old bus" ... and if we have reached this point, we can make i2c_set_bus_num() static, and add to the i2c api a new first "int bus" parameter and can delete all i2c_set_bus_num() calls ... so every i2c device must know, on which i2c bus it works ... and as a bonus, we can get rid of all i2c_init() calls all over around the code, as i2c_set_bus_num() checks, if the drivers is initialized or not, if not initialize it, look if i2c muxes are involved on this bus, and so on ... pmic and fuel gauge, which use different buses). Yep, and its enough to call i2c_set_bus_num() before you want to access a device ... i2c_set_bus_num() do all necessary steps for you. and all other subsystems, which use the i2c_api can call i2c_set_bus_num() without a previous "save old bus" and after the i2c bus usage a "restore i2c bus" ... I try to look into this, maybe we can do this before all i2c drivers are ported to the new framework ... Ok, lets wait for a patch. I have such a patch in my queue, but it works only for drivers, which use the new framework I think ... so I must think about it, if this works for old style drivers too ... bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i2c, core: optimze i2c_set_bus_num()
Hello Lukasz,
Am 04.10.2013 10:42, schrieb Lukasz Majewski:
Hi Heiko,
check first, if we are on the bus, we want to enable. If so,
return immediately, do not calc max adapter number, nor check
other things.
Signed-off-by: Heiko Schocher
Cc: Lukasz Majewski
---
drivers/i2c/i2c_core.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
index d1072e8..170423a 100644
--- a/drivers/i2c/i2c_core.c
+++ b/drivers/i2c/i2c_core.c
@@ -278,20 +278,22 @@ unsigned int i2c_get_bus_num(void)
*/
int i2c_set_bus_num(unsigned int bus)
{
- int max = ll_entry_count(struct i2c_adapter, i2c);
+ int max;
+
+ if ((bus == I2C_BUS)&& (I2C_ADAP->init_done> 0))
+ return 0;
- if (I2C_ADAPTER(bus)>= max) {
- printf("Error, wrong i2c adapter %d max %d
possible\n",
- I2C_ADAPTER(bus), max);
- return -2;
- }
#ifndef CONFIG_SYS_I2C_DIRECT_BUS
if (bus>= CONFIG_SYS_NUM_I2C_BUSES)
return -1;
#endif
- if ((bus == I2C_BUS)&& (I2C_ADAP->init_done> 0))
- return 0;
+ max = ll_entry_count(struct i2c_adapter, i2c);
+ if (I2C_ADAPTER(bus)>= max) {
+ printf("Error, wrong i2c adapter %d max %d
possible\n",
Since you are the maintainer of the i2c code, you will decide if
those changes shall be applied (they are really cosmetic) :-).
Exactly for this reason a "Acked-by" would not disturb me ;-)
My suggestion: printf -> error() macro @ common.h
Yep ... but this should be a seperate patch.
+ I2C_ADAPTER(bus), max);
+ return -2;
I've noticed that i2c_core uses -1/-2 return values for errors
globaly.
So for a new code we could start using defines from errno.h (-2 ->
-ENODEV) ?
Yes, good point!
bye,
Heiko
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH 2/6] power: Explicitly select pmic device's bus
Hi Heiko,
> Hello Lukasz,
>
> Am 03.10.2013 18:15, schrieb Lukasz Majewski:
> > Hi Heiko,
> >
> > Sorry for a late reply.
> >
> >> Hello Lukasz,
> >>
> >> Am 02.10.2013 17:11, schrieb Lukasz Majewski:
> >>> Hi Leela,
> >>>
> The current pmic i2c code assumes the current i2c bus is
> the same as the pmic device's bus. There is nothing ensuring
> that to be true. Therefore, select the proper bus before
> performing a transaction.
>
> Signed-off-by: Aaron Durbin
> Signed-off-by: Simon Glass
> Signed-off-by: Leela Krishna Amudala
> Reviewed-by: Doug Anderson
> ---
> drivers/power/power_i2c.c | 62
> + 1 file changed, 57
> insertions(+), 5 deletions(-)
>
> diff --git a/drivers/power/power_i2c.c
> b/drivers/power/power_i2c.c index 47c606f..c22e01f 100644
> --- a/drivers/power/power_i2c.c
> +++ b/drivers/power/power_i2c.c
> [...]
> >> Yes, maybe we could optimze this in drivers/i2c/i2c_core.c. It
> >> should be enough to detect the max adapter once ... but it is not a
> >> "search"... ll_entry_count() calculates the number ...
> >
> > Yes, you are right. I've overlooked it.
> >
> > With -Os compiler flag this compiles to a few ASM instructions.
> > Obviously it is NOT a performance killer :-) (I made unnecessary
> > fuzzz... sorry).
>
> No problem!
>
> >> Looking in i2c_set_bus_num(), I think it can be optimized ...
> >> lets speaking code:
> >>
> >> diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
> >> index d1072e8..170423a 100644
> >> --- a/drivers/i2c/i2c_core.c
> >> +++ b/drivers/i2c/i2c_core.c
> >> @@ -278,20 +278,22 @@ unsigned int i2c_get_bus_num(void)
> >> */
> >>int i2c_set_bus_num(unsigned int bus)
> >>{
> >> - int max = ll_entry_count(struct i2c_adapter, i2c);
> >> + int max;
> >> +
> >> + if ((bus == I2C_BUS)&& (I2C_ADAP->init_done> 0))
> >> + return 0;
> >
> > This looks nice.
>
> Ok! I post soon a patch for it ...
>
> >> - if (I2C_ADAPTER(bus)>= max) {
> >> - printf("Error, wrong i2c adapter %d max %d
> >> possible\n",
> >> - I2C_ADAPTER(bus), max);
> >> - return -2;
> >> - }
> >>#ifndef CONFIG_SYS_I2C_DIRECT_BUS
> >> if (bus>= CONFIG_SYS_NUM_I2C_BUSES)
> >> return -1;
> >>#endif
> >>
> >> - if ((bus == I2C_BUS)&& (I2C_ADAP->init_done> 0))
> >> - return 0;
> >> + max = ll_entry_count(struct i2c_adapter, i2c);
> >> + if (I2C_ADAPTER(bus)>= max) {
> >> + printf("Error, wrong i2c adapter %d max %d
> >> possible\n",
> >> + I2C_ADAPTER(bus), max);
> >> + return -2;
> >> + }
> >>
> >>#ifndef CONFIG_SYS_I2C_DIRECT_BUS
> >> i2c_mux_disconnet_all();
> >>
> >> So, first check, if we are on the correct bus, and return
> >> immediately! What do you think?
> >
> > I think that it is acceptable.
>
> Good.
>
> >> Beside of that, pmic_select() does the check, if we are on the
> >> correct bus too, and calls i2c_set_bus_num() only, if not ... so
> >> this is here no problem ...
> >
> > Yes, I see.
> >
> >> but exactly I want to get rid of this code as it is in
> >> pmic_select() someday, when all i2c drivers converted to the new
> >> i2c framework.
> >
> > My 2 cents. I understand that pmic_select() preserves old i2c bus
> > number, when PMIC performs transmission. This is probably done to
> > not break the legacy code (where one driver assumed, that it is
> > alone).
> >
> > If this is necessary, then I'm OK with this. However I personally
> > think, that drivers shall call API functions from i2c core (like
> > i2c_bus_num()) only with bus number to switch and do not store and
> > preserve the i2c value. This is my personal comment.
>
> Full Ack. I am just thinking, that we can get rid of such constructs,
> independent of the new i2c framework switch. We just need to introduce
> a "current_i2c_cmd_bus" in common/cmd_i2c.c. This var stores the
> current i2c bus where i2c commands are executed ...
I think that "last used bus" variable shall be stored/managed at
i2c_core.c. I can use i2c without cmd_i2c.c compiled (as it is with
pmic and fuel gauge, which use different buses).
> and all other
> subsystems, which use the i2c_api can call i2c_set_bus_num() without
> a previous "save old bus" and after the i2c bus usage a "restore i2c
> bus" ...
> I try to look into this, maybe we can do this before all
> i2c drivers are ported to the new framework ...
Ok, lets wait for a patch.
>
> bye,
> Heiko
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH] i2c, core: optimze i2c_set_bus_num()
Hi Heiko,
> check first, if we are on the bus, we want to enable. If so,
> return immediately, do not calc max adapter number, nor check
> other things.
>
> Signed-off-by: Heiko Schocher
> Cc: Lukasz Majewski
> ---
> drivers/i2c/i2c_core.c | 18 ++
> 1 file changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
> index d1072e8..170423a 100644
> --- a/drivers/i2c/i2c_core.c
> +++ b/drivers/i2c/i2c_core.c
> @@ -278,20 +278,22 @@ unsigned int i2c_get_bus_num(void)
> */
> int i2c_set_bus_num(unsigned int bus)
> {
> - int max = ll_entry_count(struct i2c_adapter, i2c);
> + int max;
> +
> + if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0))
> + return 0;
>
> - if (I2C_ADAPTER(bus) >= max) {
> - printf("Error, wrong i2c adapter %d max %d
> possible\n",
> -I2C_ADAPTER(bus), max);
> - return -2;
> - }
> #ifndef CONFIG_SYS_I2C_DIRECT_BUS
> if (bus >= CONFIG_SYS_NUM_I2C_BUSES)
> return -1;
> #endif
>
> - if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0))
> - return 0;
> + max = ll_entry_count(struct i2c_adapter, i2c);
> + if (I2C_ADAPTER(bus) >= max) {
> + printf("Error, wrong i2c adapter %d max %d
> possible\n",
Since you are the maintainer of the i2c code, you will decide if
those changes shall be applied (they are really cosmetic) :-).
My suggestion: printf -> error() macro @ common.h
> +I2C_ADAPTER(bus), max);
> + return -2;
I've noticed that i2c_core uses -1/-2 return values for errors
globaly.
So for a new code we could start using defines from errno.h (-2 ->
-ENODEV) ?
> + }
>
> #ifndef CONFIG_SYS_I2C_DIRECT_BUS
> i2c_mux_disconnet_all();
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 7/9] net: tsec: Use portable types and accessors for BDs
On 10/4/2013 6:12 AM, Timur Tabi wrote: On Mon, Sep 30, 2013 at 4:44 AM, Claudiu Manoil wrote: +#define GET_BD_STAT(T, i) be16_to_cpu((__force __be16)T##BD(i).status) +#define SET_BD_STAT(T, i, v) T##BD(i).status = (__force __u16)cpu_to_be16(v) +#define GET_BD_BLEN(T, i) be16_to_cpu((__force __be16)T##BD(i).length) +#define SET_BD_BLEN(T, i, v) T##BD(i).length = (__force __u16)cpu_to_be16(v) +#define GET_BD_BPTR(T, i) be32_to_cpu((__force __be32)T##BD(i).bufptr) +#define SET_BD_BPTR(T, i, v) T##BD(i).bufptr = (__force __u32)cpu_to_be32(v) This is pretty ugly. There's got to be a better way to handle this. Are you going to be doing stuff like this for every driver for bi-endian hardware? Some time ago I suggest that we re-purpose iowrite() and ioread() to be native-endian, and not just little endian. I think something like that would make more sense than hacky macros like this. Hi Timur, We dropped these macros in favor of the in_be/out_be() I/O accessors (see http://patchwork.ozlabs.org/patch/280285/). Regards, Claudiu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/10] trats: Update TRATS config to support TIZEN download
Hi Marek, > Dear Lukasz Majewski, > > > A set of environment variables needs to be updated to provide > > support for TIZEN download command (tizendown). > > > > Since DFU is used as a flashing backend, it is also necessary to > > extent malloc pool size for DFU buffer allocation. > > Moreover, for compatibility reasons (Win vs. Lin) new USB idProduct > > number for download gadget had to be added. > > > > Signed-off-by: Lukasz Majewski > > Cc: Marek Vasut > > --- > > include/configs/trats.h | 13 +++-- > > 1 file changed, 11 insertions(+), 2 deletions(-) > > > > diff --git a/include/configs/trats.h b/include/configs/trats.h > > index 24ea06b..955bd20 100644 > > --- a/include/configs/trats.h > > +++ b/include/configs/trats.h > > @@ -50,7 +50,7 @@ > > #define CONFIG_MACH_TYPE MACH_TYPE_TRATS > > > > /* Size of malloc() pool */ > > -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + > > (16 << 20)) +#define CONFIG_SYS_MALLOC_LEN > > (CONFIG_ENV_SIZE + (80 << 20)) > > Use SZ_1M instead of that l-shift by 20. Ok, I will use it. > > > > > /* select serial console configuration */ > > #define CONFIG_SERIAL2 /* use SERIAL 2 */ > > @@ -91,12 +91,20 @@ > > > > /* USB Composite download gadget - g_dnl */ > > #define CONFIG_USBDOWNLOAD_GADGET > > + > > +/* TIZEN THOR downloader support */ > > +#define CONFIG_CMD_THOR_DOWNLOAD > > +#define CONFIG_THOR_FUNCTION > > + > > +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 << 20) > > DTTO > > > #define CONFIG_DFU_FUNCTION > > #define CONFIG_DFU_MMC > > > > /* USB Samsung's IDs */ > > #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 > > #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 > > +#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM > > +#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D > > #define CONFIG_G_DNL_MANUFACTURER "Samsung" > > > > #define CONFIG_BOOTDELAY 1 > > @@ -131,7 +139,8 @@ > > #define CONFIG_DFU_ALT \ > > "u-boot mmc 80 400;" \ > > "uImage ext4 0 2;" \ > > - "exynos4210-trats.dtb ext4 0 2\0" > > + "exynos4210-trats.dtb ext4 0 2;" \ > > + ""PARTS_ROOT" part 0 5\0" > > > > #define CONFIG_ENV_OVERWRITE > > #define CONFIG_SYS_CONSOLE_INFO_QUIET > > btw. I'm picking this patch before this set: > > [PATCH v5] usb: new board-specific USB init interface > > So you might want to wait until it's applied onto usb/next and then > rebase and repost. I will do as you suggested. Thanks for review. > > Best regards, > Marek Vasut -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/10] usb:g_dnl:f_thor: USB download function to support TIZEN's THOR protocol
Hi Marek,
> Dear Lukasz Majewski,
>
> [...]
>
> > +static struct f_thor *thor_func;
> > +static inline struct f_thor *func_to_thor(struct usb_function *f)
> > +{
> > + return container_of(f, struct f_thor, usb_function);
> > +}
> > +
> > +DEFINE_CACHE_ALIGN_BUFFER(char, thor_tx_data_buf, sizeof(struct
> > rsp_box)); +DEFINE_CACHE_ALIGN_BUFFER(char, thor_rx_data_buf,
> > sizeof(struct rqt_box));
>
> This should either be uint8_t or unsigned char. A buffer shall not be
> (signed) char.
Yes. I agree. This buffer shall be unsigned char. I will correct that.
>
> Also, I suspect you want to use DEFINE_CACHE_ALIGN_BUFFER here, no ?
I'm a bit confused I do use DEFINE_CACHE_ALIGN_BUFFER for those
buffers.
>
> > +/* ** */
> > +/* THOR protocol - transmission handling */
> > +/* ** */
> > +DEFINE_CACHE_ALIGN_BUFFER(char, f_name, F_NAME_BUF_SIZE);
>
> Ditto
I believe that buffer for storing file name (f_name) shall be defined
as char.
>
> > +static unsigned long long int thor_file_size;
> > +static int alt_setting_num;
> > +
> > +static void send_rsp(const struct rsp_box *rsp)
> > +{
> > + /* should be copy on dma duffer */
> > + memcpy(thor_tx_data_buf, rsp, sizeof(struct rsp_box));
> > + thor_tx_data(thor_tx_data_buf, sizeof(struct rsp_box));
> > +
> > + debug("-RSP: %d, %d\n", rsp->rsp, rsp->rsp_data);
> > +}
> > +
> > +static void send_data_rsp(s32 ack, s32 count)
> > +{
> > + ALLOC_CACHE_ALIGN_BUFFER(struct data_rsp_box, rsp,
> > +sizeof(struct data_rsp_box));
> > +
> > + rsp->ack = ack;
> > + rsp->count = count;
> > +
> > + /* should be copy on dma duffer */
>
> This comment really makes no sense to me.
Yes. It's pretty obvious, what I intent to do in this function. I will
remove it.
>
> > + memcpy(thor_tx_data_buf, rsp, sizeof(struct data_rsp_box));
> > + thor_tx_data(thor_tx_data_buf, sizeof(struct
> > data_rsp_box)); +
> > + debug("-DATA RSP: %d, %d\n", ack, count);
> > +}
> > +
> > +static int process_rqt_info(const struct rqt_box *rqt)
> > +{
> > + ALLOC_CACHE_ALIGN_BUFFER(struct rsp_box, rsp,
> > sizeof(struct rsp_box));
> > + memset(rsp, '\0', sizeof(struct rsp_box));
> > +
> > + rsp->rsp = rqt->rqt;
> > + rsp->rsp_data = rqt->rqt_data;
> > +
> > + switch (rqt->rqt_data) {
> > + case RQT_INFO_VER_PROTOCOL:
> > + rsp->int_data[0] = VER_PROTOCOL_MAJOR;
> > + rsp->int_data[1] = VER_PROTOCOL_MINOR;
> > + break;
> > + case RQT_INIT_VER_HW:
> > + snprintf(rsp->str_data[0],
> > sizeof(rsp->str_data[0]),
> > +"%x", checkboard());
> > + break;
> > + case RQT_INIT_VER_BOOT:
> > + sprintf(rsp->str_data[0], "%s", U_BOOT_VERSION);
> > + break;
> > + case RQT_INIT_VER_KERNEL:
> > + sprintf(rsp->str_data[0], "%s", "k unknown");
> > + break;
> > + case RQT_INIT_VER_PLATFORM:
> > + sprintf(rsp->str_data[0], "%s", "p unknown");
> > + break;
> > + case RQT_INIT_VER_CSC:
> > + sprintf(rsp->str_data[0], "%s", "c unknown");
> > + break;
> > + default:
> > + return -EINVAL;
> > + }
> > +
> > + send_rsp(rsp);
> > + return true;
> > +}
> > +
> > +static int process_rqt_cmd(const struct rqt_box *rqt)
> > +{
> > + ALLOC_CACHE_ALIGN_BUFFER(struct rsp_box, rsp,
> > sizeof(struct rsp_box));
> > + memset(rsp, '\0', sizeof(struct rsp_box));
>
> memset(rsp, 0, sizeof() ... this '\0' is unneeded, fix globally.
Good point. I will correct this.
>
> > +
> > + rsp->rsp = rqt->rqt;
> > + rsp->rsp_data = rqt->rqt_data;
> > +
> > + switch (rqt->rqt_data) {
> > + case RQT_CMD_REBOOT:
> > + debug("TARGET RESET\n");
> > + send_rsp(rsp);
> > + g_dnl_unregister();
> > + dfu_free_entities();
> > + run_command("reset", 0);
> > + break;
> > + case RQT_CMD_POWEROFF:
> > + case RQT_CMD_EFSCLEAR:
> > + send_rsp(rsp);
>
> This case fallthrough is intentional here ?
Yes. Thor protocol requires to receive response from device even when
HOST PC ordered it to power off.
Also, on the target only reboot command is supported.
>
> > + default:
> > + printf("Command not supported -> cmd: %d\n",
> > rqt->rqt_data);
> > + return -EINVAL;
> > + }
> > +
> > + return true;
> > +}
> [...]
> [...]
>
> > +static struct usb_cdc_call_mgmt_descriptor
> > thor_downloader_cdc_call = {
> > + .bLength =sizeof(thor_downloader_cdc_call),
> > + .bDescriptorType =0x24, /* CS_INTERFACE */
> > + .bDescriptorSubType = 0x01,
> > + .bmCapabilities = 0x00,
> > + .bDataInterface = 0x01,
> > +};
> > +
> > +struct usb_cdc_acm_descriptor thor_downloader_cdc_abstract = {
>
> Why is this and the rest not static ?
They shall be static. I will fix that.
>
Re: [U-Boot] [PATCH 7/9][v2] net: tsec: Use portable types and accessors for BDs
On 10/3/2013 9:37 PM, Scott Wood wrote:
On Thu, 2013-10-03 at 14:48 +0300, Claudiu Manoil wrote:
+static inline u16 read_txbd_stat(uint idx)
+{
+ return in_be16((u16 __iomem *)&txbd[idx].status);
+}
+
+static inline void write_txbd_stat(uint idx, u16 status)
+{
+ out_be16((u16 __iomem *)&txbd[idx].status, status);
+}
+
+static inline u16 read_rxbd_stat(uint idx)
+{
+ return in_be16((u16 __iomem *)&rxbd[idx].status);
+}
+
+static inline void write_rxbd_stat(uint idx, u16 status)
+{
+ out_be16((u16 __iomem *)&rxbd[idx].status, status);
+}
Do you need __force on these to make sparse happy?
No, we don't need __force in this case, in_be/out_be are less
restrictive and take plain unsigned pointers (not __beNN pointers).
On the other hand, they require the __iomem address space marker, to
make sparse happy.
I'd rather see these declared as __iomem than use casts (at which point,
you probably don't need per-field accessor functions).
Me too, but I wasn't sure how to do that. I thought __iomem works with
pointer declarations only. But it turns out it works this way too:
-static struct txbd8 txbd[TX_BUF_CNT] __aligned(8);
-static struct rxbd8 rxbd[PKTBUFSRX] __aligned(8);
[...]
+static struct txbd8 __iomem txbd[TX_BUF_CNT] __aligned(8);
+static struct rxbd8 __iomem rxbd[PKTBUFSRX] __aligned(8);
[...]
- for (i = 0; read_txbd_stat(tx_idx) & TXBD_READY; i++) {
+ for (i = 0; in_be16(&txbd[tx_idx].status) & TXBD_READY; i++) {
[...]
And sparse doesn't complain about it. In this case I'll drop the
read_txbd_stat() and friends. Is this acceptable?
Thanks.
Claudiu
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[U-Boot] Lots of SPDX-License Identifer have a trailing space
Hello Wolfgang, I noticed many of SPDX-License blocks have a trailing space after "GPL-2.0+". For example, arch/arm/cpu/arm1136/start.S * * SPDX-License-Identifier: GPL-2.0+[A Trailing Space] */ Is this space the one intentinally added? (If not, I can send a patch to fix it.) I am not sure whether I should precisely copy and paste SPDX indentifier or drop a trailing space when I add a new source file. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3][v5] mtd: move & update nand_ecclayout structure
nand_ecclayout is present in mtd.h at Linux.
Move this structure to mtd.h to comply with Linux.
Also, increase the ecc placement locations to 640 to suport device having
writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone
up to 640 bytes and consequently the maximum ecc placement locations have
also gone up to 640.
Signed-off-by: Prabhakar Kushwaha
CC: Vipin Kumar
---
Changes for v2: Incorporated Scott's comments
- move nand_ecclayout to mtd.h
- updated OOBFREE, ECCPOS max entries
Changes for v3: Sending as it is
Changes for v4: Sending as it is
Changes for v5: Sending as it is
include/linux/mtd/mtd.h | 14 ++
include/mtd/mtd-abi.h | 12
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 6f44abd..3a18f8f 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -96,6 +96,20 @@ struct mtd_oob_ops {
uint8_t *oobbuf;
};
+#define MTD_MAX_OOBFREE_ENTRIES32
+#define MTD_MAX_ECCPOS_ENTRIES 640
+
+/*
+ * ECC layout control structure. Exported to userspace for
+ * diagnosis and to allow creation of raw images
+ */
+struct nand_ecclayout {
+ uint32_t eccbytes;
+ uint32_t eccpos[MTD_MAX_ECCPOS_ENTRIES];
+ uint32_t oobavail;
+ struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
+};
+
struct mtd_info {
u_char type;
u_int32_t flags;
diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h
index d51c1ab..ac3c298 100644
--- a/include/mtd/mtd-abi.h
+++ b/include/mtd/mtd-abi.h
@@ -155,18 +155,6 @@ struct nand_oobfree {
uint32_t length;
};
-#define MTD_MAX_OOBFREE_ENTRIES8
-/*
- * ECC layout control structure. Exported to userspace for
- * diagnosis and to allow creation of raw images
- */
-struct nand_ecclayout {
- uint32_t eccbytes;
- uint32_t eccpos[128];
- uint32_t oobavail;
- struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
-};
-
/**
* struct mtd_ecc_stats - error correction stats
*
--
1.7.9.5
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Re: [U-Boot] [PATCH 01/10] usb:udc:s3c: Reduce dcache invalidate range for UDC receive buffer
Hi Marek, > Dear Lukasz Majewski, > > > The s3c udc driver sends data in a max packet size. Therefore the > > dcache invalidate range shall be equal to max packet, not the entire > > DMA_BUFFER_SIZE. > > > > Signed-off-by: Lukasz Majewski > > Cc: Marek Vasut > > --- > > drivers/usb/gadget/s3c_udc_otg_xfer_dma.c |2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index d7af5e9..5e3ba76 > > 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c > > @@ -117,7 +117,7 @@ static int setdma_rx(struct s3c_ep *ep, struct > > s3c_request *req) > > > > invalidate_dcache_range((unsigned long) > > ep->dev->dma_buf[ep_num], (unsigned long) ep->dev->dma_buf[ep_num] > > - + DMA_BUFFER_SIZE); > > + + ep->ep.maxpacket); > > Is this maxpacket _always_ multiple of cacheline big or will you need > some ROUND_UP() call here ? The maxpacket value is equal to 64 B for EP0 and 512 B for EP1 and EP2 (wMaxPacketSize field of the descriptor). Moreover this invalidation is done on already memaligned buffer (which is 16 KiB). In other words, we are copying data to specially prepared buffer (per UDC device EP, not usb_request). In my opinion the maxpacket don't need to be rounded up. > > Best regards, > Marek Vasut Since this is Samsung's UDC specific (not THOR download) - would it be possible to take this patch from this patch series (of course if my above rationale is acceptable for you)? -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
