Re: [U-Boot] [PATCH 3/7] mmc: Enhance erase handling procedure
Hi Haijun,
On Nov 5, 2013, at 8:23 AM, Haijun Zhang wrote:
Erass sequence:
1. check if erase command is support by card. If not return.
2. Check the erase range to see if it was aligned. The min erase size
should be one erase group. SD card it was one block(512), mmc card
it should be one erase group.
3. If not, aligned the erase rang according to the erase group size.
4. Send erase command to erase card once one erase group.
5. If it was SD card, erase with arg 0x should be send.
else if support secure feature, erase with arg 0x8000(Spec eMMC 4.41).
else erase with arg 0x.(Trim and discard is ingnored here)
6. Check card status after erase.
Can I get a few lines about what this patch implements before explaining
the algorithm?
Something like
This patch enhances the currently implemented erase procedure in
u-boot,
which has the following problems/missing features...
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
drivers/mmc/mmc_write.c | 70 ++---
1 file changed, 60 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index aa2fdef..f2e9baf 100644
--- a/drivers/mmc/mmc_write.c
+++ b/drivers/mmc/mmc_write.c
@@ -17,6 +17,10 @@ static ulong mmc_erase_t(struct mmc *mmc, ulong start,
lbaint_t blkcnt)
struct mmc_cmd cmd;
ulong end;
int err, start_cmd, end_cmd;
+ uint arg = 0;
+
+ if (!(mmc-cmdclass CCC_ERASE))
+ return NOT_SUPPORT;
if (mmc-high_capacity) {
end = start + blkcnt - 1;
@@ -48,8 +52,17 @@ static ulong mmc_erase_t(struct mmc *mmc, ulong start,
lbaint_t blkcnt)
if (err)
goto err_out;
+ arg = MMC_ERASE_ARG;
+
+ if (mmc-sec_feature_support EXT_CSD_SEC_ER_EN)
+ arg = MMC_SECURE_ERASE_ARG;
+
+ /* SD card only support %MMC_ERASE_ARG */
+ if (IS_SD(mmc))
+ arg = MMC_ERASE_ARG;
+
Shouldn't that be:
/* SD card only support %MMC_ERASE_ARG */
if (!IS_SD(mmc)
(mmc-sec_feature_support EXT_CSD_SEC_ER_EN))
arg = MMC_SECURE_ERASE_ARG;
else
arg = MMC_ERASE_ARG;
cmd.cmdidx = MMC_CMD_ERASE;
- cmd.cmdarg = SECURE_ERASE;
+ cmd.cmdarg = arg;
cmd.resp_type = MMC_RSP_R1b;
err = mmc_send_cmd(mmc, cmd, NULL);
@@ -69,24 +82,61 @@ unsigned long mmc_berase(int dev_num, lbaint_t start,
lbaint_t blkcnt)
struct mmc *mmc = find_mmc_device(dev_num);
lbaint_t blk = 0, blk_r = 0;
int timeout = 1000;
+ int res;
+ bool align = false;
if (!mmc)
return -1;
+ if (!(mmc-cmdclass CCC_ERASE)) {
+ printf(\nErase operation is not support by card\n);
+ return NOT_SUPPORT;
+ }
+
if ((start % mmc-erase_grp_size) || (blkcnt % mmc-erase_grp_size))
+ align = true;
+
^ The use of align here is confusing.
AFAIKT the meaning is reversed.
align actually means not_aligned.
+ res = start % mmc-erase_grp_size;
+ if (res) {
+ res = mmc-erase_grp_size - res;
+ start += res;
+ if (blkcnt res)
+ blkcnt -= res;
+ else {
+ printf(\nErase size smaller than Erase group
+ size [0x%x] is not support by the device.\n,
+ mmc-erase_grp_size);
+ return NOT_SUPPORT;
+ }
+ }
+
+ res = blkcnt % mmc-erase_grp_size;
+ if (res)
+ blkcnt -= res;
+
+ if (!blkcnt) {
+ printf(\nErase size smaller than Erase group size [0x%x]
+ is not support by the device.\n,
+ mmc-erase_grp_size);
+ return NOT_SUPPORT;
+ }
+
+ if (align)
printf(\n\nCaution! Your devices Erase group is 0x%x\n
-The erase range would be change to
-0x LBAF ~0x LBAF \n\n,
-mmc-erase_grp_size, start ~(mmc-erase_grp_size - 1),
-((start + blkcnt + mmc-erase_grp_size)
- ~(mmc-erase_grp_size - 1)) - 1);
+ The erase range would be change to
+ 0x LBAF ~0x LBAF \n\n,
+ mmc-erase_grp_size, start, start + blkcnt);
+
while (blk blkcnt) {
- blk_r = ((blkcnt - blk) mmc-erase_grp_size) ?
- mmc-erase_grp_size : (blkcnt - blk);
+ if ((blkcnt - blk) = mmc-erase_grp_size)
+ blk_r = mmc-erase_grp_size;
err = mmc_erase_t(mmc, start + blk, blk_r);
- if (err)
- break;
+ if (err) {
+ printf(\nErase range from 0x LBAF ~0x LBAF
+
Re: [U-Boot] [PATCH 4/7] mmc: Update the handling of returned erase block
Hi Haijun,
On Nov 5, 2013, at 8:23 AM, Haijun Zhang wrote:
If the block rang was not algined, We tried to algined the range,
then erase the block. So the block range erased should be less or
equal to the block range send. If error occured during erase procedure
part of them will be erased. And use should resend the block rang to
continue erase the reset of them.
Error number and zero number mean erase operation was failed.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
common/cmd_mmc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 67a94a7..15cecb7 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -397,6 +397,13 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
BUG();
}
+ if (state == MMC_ERASE) {
+ printf(%d blocks %s: %s\n,
+ (cnt = n 0) ? n : 0, argv[1],
+ (cnt = n 0) ? OK : ERROR);
+ return (cnt = n 0) ? 0 : 1;
+ }
+
I don't know what you think the test (cnt = n 0) does, but I bet it's not
what you expect.
Are you trying to test: (cnt = n n 0) ?
printf(%d blocks %s: %s\n,
n, argv[1], (n == cnt) ? OK : ERROR);
return (n == cnt) ? 0 : 1;
--
1.8.4
Regards
-- Pantelis
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Re: [U-Boot] [PATCH 5/7] mmc: Enhance mmcinfo command
Hi Haijun,
On Nov 5, 2013, at 8:23 AM, Haijun Zhang wrote:
Once mmc initialization was faild has_init should be set to 0,
prepard for the next initialization to recover from error.
Once mmcinfo command failed error should point out instead of print
incorrect mmc device information.
Error log:
= mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
= mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
common/cmd_mmc.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 15cecb7..6f0e5ff 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -115,8 +115,10 @@ static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
mmc = find_mmc_device(curr_device);
if (mmc) {
- mmc_init(mmc);
-
+ if (mmc_init(mmc)) {
+ puts(Got MMC device infor error\n);
^ Spelling error in the error message.
+ return 1;
+ }
print_mmcinfo(mmc);
return 0;
} else {
@@ -191,9 +193,10 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
mmc-has_init = 0;
- if (mmc_init(mmc))
+ if (mmc_init(mmc)) {
+ mmc-has_init = 0;
return 1;
- else
+ } else
return 0;
} else if (strncmp(argv[1], part, 4) == 0) {
block_dev_desc_t *mmc_dev;
--
1.8.4
Regards
-- Pantelis
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Re: [U-Boot] [PATCH 7/7] powerpc/esdhc: Update esdhc command execution process
Hi Haijun,
On Nov 5, 2013, at 8:23 AM, Haijun Zhang wrote:
The max timeout value esdhc host can accept was about 2.69 sec
At 50 Mhz SD_CLK period, the max busy timeout
value = 2^27 * SD_CLK period ~= 2.69 sec.
In case erase command CMD38 timeout is caculate by
^ calculated?
mult * 300ms * num(unit by erase group), so the time one erase
group need should be more than 300ms, 500ms should be enough.
1. Add data reset for data error and command with busy error.
2. Add timeout value detecting during waiting transfer complete.
3. Ignore Command inhibit (DAT) state when excuting CMD12.
4. Add command CRC error detecting.
5. Enlarged the timeout value used for busy state release.
6. In case eSDHC host version 2.3, host will signal transfer complete
interrupt once busy state was release.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
drivers/mmc/fsl_esdhc.c | 165 +++-
1 file changed, 108 insertions(+), 57 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 9f4d3a2..a8503fb 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -266,26 +266,36 @@ static int
esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
{
uintxfertyp;
- uintirqstat;
+ uintirqstat, mask;
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg-esdhc_base;
+ int ret = 0, timeout;
+
+ esdhc_write32(regs-irqstat, -1);
^ Please don't -1 for unsigned quantities. Use 0xU if need be.
I know it used to be -1, but since we're making the changes here, lets fix
it in every case.
+
+ sync();
+
+ mask = PRSSTAT_CICHB | PRSSTAT_CIDHB;
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111
if (cmd-cmdidx == MMC_CMD_STOP_TRANSMISSION)
return 0;
+#else
+ if (cmd-cmdidx == MMC_CMD_STOP_TRANSMISSION)
+ mask = ~PRSSTAT_CIDHB;
#endif
- esdhc_write32(regs-irqstat, -1);
-
- sync();
-
/* Wait for the bus to be idle */
- while ((esdhc_read32(regs-prsstat) PRSSTAT_CICHB) ||
- (esdhc_read32(regs-prsstat) PRSSTAT_CIDHB))
- ;
-
- while (esdhc_read32(regs-prsstat) PRSSTAT_DLA)
- ;
+ timeout = 1000;
+ while (esdhc_read32(regs-prsstat) mask) {
+ if (timeout == 0) {
+ printf(\nController never released inhibit bit(s).\n);
+ ret = COMM_ERR;
+ goto reset;
+ }
+ timeout--;
+ mdelay(1);
+ }
/* Wait at least 8 SD clock cycles before the next command */
/*
@@ -296,11 +306,9 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
/* Set up for a data transfer if we have one */
if (data) {
- int err;
-
- err = esdhc_setup_data(mmc, data);
- if(err)
- return err;
+ ret = esdhc_setup_data(mmc, data);
+ if (ret)
+ goto reset;
}
/* Figure out the transfer arguments */
@@ -325,43 +333,14 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
irqstat = esdhc_read32(regs-irqstat);
- /* Reset CMD and DATA portions on error */
- if (irqstat CMD_ERR) {
- esdhc_write32(regs-sysctl, esdhc_read32(regs-sysctl) |
- SYSCTL_RSTC);
- while (esdhc_read32(regs-sysctl) SYSCTL_RSTC)
- ;
-
- if (data) {
- esdhc_write32(regs-sysctl,
- esdhc_read32(regs-sysctl) |
- SYSCTL_RSTD);
- while ((esdhc_read32(regs-sysctl) SYSCTL_RSTD))
- ;
- }
+ if (irqstat IRQSTAT_CTOE) {
+ ret = TIMEOUT;
+ goto reset;
}
- if (irqstat IRQSTAT_CTOE)
- return TIMEOUT;
-
- if (irqstat CMD_ERR)
- return COMM_ERR;
-
- /* Workaround for ESDHC errata ENGcm03648 */
- if (!data (cmd-resp_type MMC_RSP_BUSY)) {
- int timeout = 2500;
-
- /* Poll on DATA0 line for cmd with busy signal for 250 ms */
- while (timeout 0 !(esdhc_read32(regs-prsstat)
- PRSSTAT_DAT0)) {
- udelay(100);
- timeout--;
- }
-
- if (timeout = 0) {
- printf(Timeout waiting for DAT0 to go high!\n);
- return TIMEOUT;
- }
+ if (irqstat CMD_ERR) {
+ ret = COMM_ERR;
+ goto reset;
}
/* Copy the response to the response buffer */
@@ -379,28
Re: [U-Boot] [PATCH 1/3] esdhc: Workaround for card can't be detected on T4240QDS
Hi Haijun, On Dec 2, 2013, at 7:25 AM, Haijun Zhang wrote: Card detection pin is ineffective on T4240QDS. This workaround force sdhc driver scan and initialize the card regardless of whether the card is inserted. if no card is in the slot, the error message card is not inserted will be prompted. Signed-off-by: Haijun Zhang haijun.zh...@freescale.com --- drivers/mmc/fsl_esdhc.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index e3cd0c7..e330379 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -500,6 +500,10 @@ static int esdhc_getcd(struct mmc *mmc) struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg-esdhc_base; int timeout = 1000; +/* Card detecting pin is not functional on T4240QDS */ +#if defined(CONFIG_T4240QDS) + return 1; +#endif Ugh, I don't like that much. How about a CONFIG_SYS_FSL_ESDHC_BROKEN_CD instead? We need to do the same for the following fragment in esdhc_xfertyp() #if defined(CONFIG_MX53) || defined(CONFIG_T4240QDS) if (cmd-cmdidx == MMC_CMD_STOP_TRANSMISSION) xfertyp |= XFERTYP_CMDTYP_ABORT; #endif CONFIG_SYS_FSL_ESDHC_STOP_ABORT while (!(esdhc_read32(regs-prsstat) PRSSTAT_CINS) --timeout) udelay(1000); -- 1.8.4 Regards -- Pantelis P.S. Add me to the CC list on the next version of the patch. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] eSDHC: Calculate envaddr accroding to the address format
Hi Haijun,
On Dec 2, 2013, at 7:25 AM, Haijun Zhang wrote:
On BSC9131 and BSC9132: For High Capacity SD Cards ( 2 GBytes), the
32-bit source address specifies the memory address in block address
format. Block length is fixed to 512 bytes as per the SD High Capacity
specification. So we need to convert the block address format
to byte address format to calculate the envaddr.
If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
board/freescale/common/sdhc_boot.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/board/freescale/common/sdhc_boot.c
b/board/freescale/common/sdhc_boot.c
index f6e2b2b..9dc9988 100644
--- a/board/freescale/common/sdhc_boot.c
+++ b/board/freescale/common/sdhc_boot.c
@@ -16,6 +16,9 @@
#define ESDHC_BOOT_IMAGE_SIZE 0x48
#define ESDHC_BOOT_IMAGE_ADDR 0x50
+#define ESDHC_DEFAULT_ENVADDR0x400
+#define UINT_MAX 0x
+
^ Definition of UINT_MAX in a c file?
int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
{
u8 *tmp_buf;
@@ -39,6 +42,34 @@ int mmc_get_env_addr(struct mmc *mmc, int copy, u32
*env_addr)
/* Get the code size from offset 0x48 */
code_len = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_SIZE);
+ /*
+ * On soc BSC9131, BSC9132:
+ * In High Capacity SD Cards ( 2 GBytes), the 32-bit source address and
+ * code length of these soc specify the memory address in block address
+ * format. Block length is fixed to 512 bytes as per the SD High
+ * Capacity specification.
+ */
+ if ((SVR_SOC_VER(get_svr()) == SVR_9131) ||
+ (SVR_SOC_VER(get_svr()) == SVR_9132)) {
+ u64 tmp;
+
+ if (mmc-high_capacity) {
+ tmp = (u64)code_offset * blklen;
+ tmp += code_len * blklen;
+ } else
+ tmp = code_offset + code_len;
+
+ if (((tmp + CONFIG_ENV_SIZE) mmc-capacity) ||
+ (tmp UINT_MAX))
Lose the parentheses and test against 0xU
+ *env_addr = ESDHC_DEFAULT_ENVADDR;
+ else
+ *env_addr = tmp;
+
+ free(tmp_buf);
+
+ return 0;
+ }
+
*env_addr = code_offset + code_len;
free(tmp_buf);
--
1.8.4
Regards
-- Pantelis
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Re: [U-Boot] [PATCH 2/3] esdhc: Detecting 8 bit width before mmc initialization
Hi Haijun, On Dec 2, 2013, at 7:25 AM, Haijun Zhang wrote: The upper 4 data signals of esdhc are shared with spi flash. So detect if the upper 4 pins are assigned to esdhc before enable sdhc 8 bit width. Signed-off-by: Haijun Zhang haijun.zh...@freescale.com --- drivers/mmc/fsl_esdhc.c| 6 ++ include/configs/T4240QDS.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index e330379..524cc10 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -593,6 +593,12 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) mmc-host_caps = ~MMC_MODE_4BIT; } + /* Detect if the upper 4 pins are used for ESDHC */ +#if defined(CONFIG_T4240QDS) + if (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) QIXIS_MUX_SDHC_WIDTH8)) + mmc-host_caps = ~MMC_MODE_8BIT; +#endif + Same comments as earlier. Use a generic CONFIG quirk define. if (caps ESDHC_HOSTCAPBLT_HSS) mmc-host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 3777ccb..77e8ac0 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -165,6 +165,8 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_BRDCFG50x55 +#define QIXIS_MUX_SDHC_WIDTH81 #define QIXIS_BASE_PHYS (0xfull | QIXIS_BASE) #define CONFIG_SYS_CSPR3_EXT (0xf) -- 1.8.4 Regards -- Pantelis ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] mmc/dwmmc: modify FIFO threshold only if value explicitly set
Hi Alexey,
On Nov 27, 2013, at 3:00 PM, Alexey Brodkin wrote:
If platform provides host-fifoth_val it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.
This implementation allows:
* escape unclear and recursive calculations that are currently in use
* use whatever custom value for DWMCI_FIFOTH initialization if any
particular SoC requires it
Signed-off-by: Alexey Brodkin abrod...@synopsys.com
Cc: Mischa Jonker mjon...@synopsys.com
Cc: Alim Akhtar alim.akh...@samsung.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung jh80.ch...@samsung.com
Cc: Amar amarendra...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Simon Glass s...@chromium.org
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
Cc: Andy Fleming aflem...@freescale.com
---
drivers/mmc/dw_mmc.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 1e0f72b..a47e02c 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -300,7 +300,6 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size;
if (host-quirks DWMCI_QUIRK_DISABLE_SMU) {
dwmci_writel(host, EMMCP_MPSBEGIN0, 0);
@@ -330,13 +329,9 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_IDINTEN, 0);
dwmci_writel(host, DWMCI_BMOD, 1);
- if (!host-fifoth_val) {
- fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
- fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
- host-fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
- TX_WMARK(fifo_size / 2);
+ if (host-fifoth_val) {
+ dwmci_writel(host, DWMCI_FIFOTH, host-fifoth_val);
}
- dwmci_writel(host, DWMCI_FIFOTH, host-fifoth_val);
dwmci_writel(host, DWMCI_CLKENA, 0);
dwmci_writel(host, DWMCI_CLKSRC, 0);
--
1.8.4.2
Acked-by: Pantelis Antoniou pa...@antoniou-consulting.com
Thanks
-- Pantelis
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Re: [U-Boot] [PATCH 1/3] esdhc: Workaround for card can't be detected on T4240QDS
Hi all On Sun, Dec 8, 2013 at 12:46 PM, Pantelis Antoniou pantelis.anton...@gmail.com wrote: Hi Haijun, On Dec 2, 2013, at 7:25 AM, Haijun Zhang wrote: Card detection pin is ineffective on T4240QDS. This workaround force sdhc driver scan and initialize the card regardless of whether the card is inserted. if no card is in the slot, the error message card is not inserted will be prompted. Signed-off-by: Haijun Zhang haijun.zh...@freescale.com --- drivers/mmc/fsl_esdhc.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index e3cd0c7..e330379 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -500,6 +500,10 @@ static int esdhc_getcd(struct mmc *mmc) struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg-esdhc_base; int timeout = 1000; +/* Card detecting pin is not functional on T4240QDS */ +#if defined(CONFIG_T4240QDS) + return 1; +#endif Ugh, I don't like that much. How about a CONFIG_SYS_FSL_ESDHC_BROKEN_CD instead? I suggest to don't use any define but flags. Michael We need to do the same for the following fragment in esdhc_xfertyp() #if defined(CONFIG_MX53) || defined(CONFIG_T4240QDS) if (cmd-cmdidx == MMC_CMD_STOP_TRANSMISSION) xfertyp |= XFERTYP_CMDTYP_ABORT; #endif CONFIG_SYS_FSL_ESDHC_STOP_ABORT while (!(esdhc_read32(regs-prsstat) PRSSTAT_CINS) --timeout) udelay(1000); -- 1.8.4 Regards -- Pantelis P.S. Add me to the CC list on the next version of the patch. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] include/mmc.h: Remove declaration for spl_mmc_load()
Hi Lad, On Dec 3, 2013, at 8:47 AM, Lad, Prabhakar wrote: From: Lad, Prabhakar prabhakar.cse...@gmail.com The spl_mmc_load() was removed while converting to CONFIG_SPL_FRAMEWORK usage the definition was removed but the declaration was missed. This patch removes this declaration. Signed-off-by: Lad, Prabhakar prabhakar.cse...@gmail.com --- include/mmc.h |1 - 1 file changed, 1 deletion(-) diff --git a/include/mmc.h b/include/mmc.h index cb558da..8f51c93 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -304,7 +304,6 @@ int board_mmc_getcd(struct mmc *mmc); int mmc_switch_part(int dev_num, unsigned int part_num); int mmc_getcd(struct mmc *mmc); int mmc_getwp(struct mmc *mmc); -void spl_mmc_load(void) __noreturn; /* Function to change the size of boot partition and rpmb partitions */ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, unsigned long rpmbsize); -- 1.7.9.5 Will leave as pending until the main changes land Regards -- Pantelis ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][v3] powerpc: mmc: Add corenet devices support in esdhc spl
Hi Priyanka,
On Nov 28, 2013, at 6:42 AM, Priyanka Jain wrote:
Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.
So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
Changes for v3:
Send as independent patch (not as part of patch set)
Changes for v2:
Updated description based on Sun York's inputs
drivers/mmc/fsl_esdhc_spl.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c
index 65c52a2..8fc263f 100644
--- a/drivers/mmc/fsl_esdhc_spl.c
+++ b/drivers/mmc/fsl_esdhc_spl.c
@@ -42,6 +42,10 @@ void __noreturn mmc_boot(void)
hang();
}
+#ifdef CONFIG_FSL_CORENET
+ offset = CONFIG_SYS_MMC_U_BOOT_OFFS;
+ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
+#else
blklen = mmc-read_bl_len;
tmp_buf = malloc(blklen);
if (!tmp_buf) {
@@ -91,6 +95,7 @@ void __noreturn mmc_boot(void)
/*
* Load U-Boot image from mmc into RAM
*/
+#endif
blk_start = ALIGN(offset, mmc-read_bl_len) / mmc-read_bl_len;
blk_cnt = ALIGN(code_len, mmc-read_bl_len) / mmc-read_bl_len;
err = mmc-block_dev.block_read(0, blk_start, blk_cnt,
--
1.7.4.1
Acked-by: Pantelis Antoniou pa...@antoniou-consulting.com
Thanks.
-- Pantelis
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Re: [U-Boot] [PATCH] mmc: add Faraday FTSDC021 SDHCI controller support
Hi Kuo-Jung,
On Nov 25, 2013, at 4:51 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.
However this driver is only verified with SD memory cards.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Andy Fleming aflem...@gmail.com
---
drivers/mmc/Makefile |1 +
drivers/mmc/ftsdc021_sdhci.c | 33 +
include/faraday/ftsdc021.h | 13 +
3 files changed, 47 insertions(+)
create mode 100644 drivers/mmc/ftsdc021_sdhci.c
create mode 100644 include/faraday/ftsdc021.h
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index a7ae38d..1ed26ca 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
+obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o
obj-$(CONFIG_GENERIC_MMC) += mmc.o
obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
obj-$(CONFIG_MMC_SPI) += mmc_spi.o
diff --git a/drivers/mmc/ftsdc021_sdhci.c b/drivers/mmc/ftsdc021_sdhci.c
new file mode 100644
index 000..1f6cdba
--- /dev/null
+++ b/drivers/mmc/ftsdc021_sdhci.c
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2013 Faraday Technology
+ * Kuo-Jung Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include sdhci.h
+
+#ifndef CONFIG_FTSDC021_CLOCK
+#define CONFIG_FTSDC021_CLOCK clk_get_rate(MMC)
+#endif
+
+int ftsdc021_sdhci_init(u32 regbase)
+{
+ struct sdhci_host *host = NULL;
+ uint32_t freq = CONFIG_FTSDC021_CLOCK;
+
+ host = calloc(1, sizeof(struct sdhci_host));
+ if (!host) {
+ puts(sdh_host malloc fail!\n);
+ return 1;
+ }
+
+ host-name = FTSDC021;
+ host-ioaddr = (void __iomem *)regbase;
+ host-quirks = 0;
+ add_sdhci(host, freq, 0);
+
+ return 0;
+}
diff --git a/include/faraday/ftsdc021.h b/include/faraday/ftsdc021.h
new file mode 100644
index 000..de8e250
--- /dev/null
+++ b/include/faraday/ftsdc021.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __FTSDC021_H
+#define __FTSDC021_H
+
+int ftsdc021_sdhci_init(u32 regbase);
+
+#endif /* __FTSDC021_H */
--
1.7.9.5
Acked-by; Pantelis Antoniou pa...@antoniou-consulting.com
Thanks
-- Pantelis
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[U-Boot] [PATCH 1/4] arm: omap: abb: add missing include
ABB code uses LDELAY but does not include the header that provides its definition. Include the header. Cc: Tom Rini tr...@ti.com Signed-off-by: Nikita Kiryanov nik...@compulab.co.il --- arch/arm/cpu/armv7/omap-common/abb.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/omap-common/abb.c b/arch/arm/cpu/armv7/omap-common/abb.c index a46783f..423aeb9 100644 --- a/arch/arm/cpu/armv7/omap-common/abb.c +++ b/arch/arm/cpu/armv7/omap-common/abb.c @@ -11,6 +11,7 @@ #include common.h #include asm/omap_common.h +#include asm/arch/clock.h #include asm/io.h #include asm/arch/sys_proto.h -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] arm: omap: abb: add missing include
Disclaimer: disregard the 1/4. This is supposed to be a standalone patch, I just forgot to remove the patch counter before sending. On 12/08/2013 02:29 PM, Nikita Kiryanov wrote: ABB code uses LDELAY but does not include the header that provides its definition. Include the header. Cc: Tom Rini tr...@ti.com Signed-off-by: Nikita Kiryanov nik...@compulab.co.il --- arch/arm/cpu/armv7/omap-common/abb.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/omap-common/abb.c b/arch/arm/cpu/armv7/omap-common/abb.c index a46783f..423aeb9 100644 --- a/arch/arm/cpu/armv7/omap-common/abb.c +++ b/arch/arm/cpu/armv7/omap-common/abb.c @@ -11,6 +11,7 @@ #include common.h #include asm/omap_common.h +#include asm/arch/clock.h #include asm/io.h #include asm/arch/sys_proto.h -- Regards, Nikita. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
On 12/7/2013 6:51 AM, Scott Wood wrote:
On Thu, 2013-12-05 at 14:19 +0800, Po Liu wrote:
diff --git a/board/freescale/c29xpcie/spl.c b/board/freescale/c29xpcie/spl.c
new file mode 100644
index 000..7bc8ce1
--- /dev/null
+++ b/board/freescale/c29xpcie/spl.c
@@ -0,0 +1,73 @@
+/* Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include ns16550.h
+#include malloc.h
+#include mmc.h
+#include nand.h
+#include i2c.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+ulong get_effective_memsize(void)
+{
+ return CONFIG_SYS_L2_SIZE;
+}
+
+void board_init_f(ulong bootflag)
+{
+ u32 plat_ratio;
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ console_init_f();
+
+ /* initialize selected port with appropriate baud rate */
+ plat_ratio = in_be32(gur-porpllsr) MPC85xx_PORPLLSR_PLAT_RATIO;
+ plat_ratio = 1;
+ gd-bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+
+ NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+gd-bus_clk / 16 / CONFIG_BAUDRATE);
+
+ /* copy code to RAM and jump to it - this should not return */
+ /* NOTE - code has to be copied out of NAND buffer before
+* other blocks can be read.
+*/
+ relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+ /* Pointer is writable since we allocated a register for it */
+ gd = (gd_t *)CONFIG_SPL_GD_ADDR;
+ bd_t *bd;
+
+ memset(gd, 0, sizeof(gd_t));
+ bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
+ memset(bd, 0, sizeof(bd_t));
+ gd-bd = bd;
+ bd-bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
+ bd-bi_memsize = CONFIG_SYS_L2_SIZE;
+
+ probecpu();
+ get_clocks();
+ mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
+ CONFIG_SPL_RELOC_MALLOC_SIZE);
+
+ /* relocate environment function pointers etc. */
+ nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_ENV_ADDR);
+ gd-env_addr = (ulong)(CONFIG_ENV_ADDR);
+ gd-env_valid = 1;
+
+ i2c_init_all();
+
+ gd-ram_size = initdram(0);
+
+ puts(\nTertiary program loader running in sram...);
Why do you assume tertiary? Couldn't this be SPL for SD/SPI? Or was it
a copy/paste error that you added things to the board config file for
SD/SPI (after all, the subject line says it's a NAND patch)?
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+ puts(\nSecond program loader running in sram...);
I see that this isn't new to this patch, but we ought to be consistent
and either change this to secondary, or change tertiary to third.
It's also probably too verbose... Simply saying SPL\n or TPL\n
would suffice to indicate progress and verify that console output is
working (if nothing is printed, then that path doesn't get tested in the
absence of a load error).
diff --git a/board/freescale/c29xpcie/tlb.c b/board/freescale/c29xpcie/tlb.c
index 84844ee..11f8a37 100644
--- a/board/freescale/c29xpcie/tlb.c
+++ b/board/freescale/c29xpcie/tlb.c
@@ -26,10 +26,20 @@ struct fsl_e_tlb_entry tlb_table[] = {
0, 0, BOOKE_PAGESZ_4K, 0),
/* TLB 1 */
+#ifdef CONFIG_SPL_NAND_MINIMAL
+ SET_TLB_ENTRY(1, 0xf000, 0xf000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 10, BOOKE_PAGESZ_4K, 1),
+ SET_TLB_ENTRY(1, 0xe000, 0xe000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 11, BOOKE_PAGESZ_4K, 1),
+#endif
CONFIG_SPL_NAND_MINIMAL should not exist. It was introduced by accident
after a different approach was chosen in patch review (and even then,
this wasn't what it meant).
I was not aware of this. My mistake :(
Prabhakar, why did you extend that to other uses? Why are both entries
ifdeffed here, but only the 0xe000 entry on existing boards?
both entry should not be in ifdef. p1010rdb/bsc9131rdb/bsc9132qds does
not have this.
i dont think NOR boot tested after this patch. NOR boot will not work
after applying this patch.
If this needs to be ifdeffed (and it probably does, if only to avoid
possible speculative instruction fetches), use (and document)
CONFIG_SPL_NAND_BOOT.
Yes, I will suggest to have CONFIG_SPL_NAND_BOOT instead of
CONFIG_SPL_NAND_MINIMAL.
I will fix for p1010rdb, bsc9131rdb, bsc9132qds.
Regards,
Prabhakar
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Re: [U-Boot] [PATCH] t2080qds/ddr: update ddr parameters
-Original Message-
From: York Sun [mailto:york...@freescale.com]
Sent: Saturday, December 07, 2013 12:39 AM
To: Liu Shengzhou-B36685; u-boot@lists.denx.de
Subject: Re: [PATCH] t2080qds/ddr: update ddr parameters
On 12/06/2013 12:53 AM, Shengzhou Liu wrote:
- optimize ddr parameters for whole frequency range from 1500MT/s to
2140MT/s.
- remove unused patameters: 'cpo', 'wrdata delay', '2T', which is
unrelated
to DDR3/3L on t2080qds.
- remove unused rdimm code(only udimm is supported on t2080qds).
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
Against master branch of git://git.denx.de/u-boot-mpc85xx.git
board/freescale/t2080qds/ddr.c | 20 ++---
board/freescale/t2080qds/ddr.h | 64
+-
2 files changed, 17 insertions(+), 67 deletions(-)
diff --git a/board/freescale/t2080qds/ddr.c
b/board/freescale/t2080qds/ddr.c index 5db5d21..bc366ae 100644
--- a/board/freescale/t2080qds/ddr.c
+++ b/board/freescale/t2080qds/ddr.c
@@ -24,24 +24,17 @@ void fsl_ddr_board_options(memctl_options_t *popts,
const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
ulong ddr_freq;
- if (ctrl_num 2) {
+ if (ctrl_num 1) {
printf(Not supported controller number %d\n, ctrl_num);
return;
}
if (!pdimm-n_ranks)
return;
- /*
-* we use identical timing for all slots. If needed, change the
code
-* to pbsp = rdimms[ctrl_num] or pbsp = udimms[ctrl_num];
-*/
- if (popts-registered_dimm_en)
- pbsp = rdimms[0];
- else
- pbsp = udimms[0];
+ pbsp = udimms[0];
This is not right. You should throw out an error if RDIMM is not supported.
[Shengzhou] okay.
But why isn't it supported? T2080 SoC can support RDIMM.
[Shengzhou] T2080 SoC can support uDIMM and rDIMM, but T2080QDS board supports
only UDIMM according to T2080QDS RM.
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Re: [U-Boot] [U-Boot, V2, 1/2] driver:i2c:s3c24x0: adapt driver to new i2c
Hello Piotr, Am 20.11.2013 10:43, schrieb Piotr Wilczek: This patch adapts the s3c24x0 driver to the new i2c framework. Config file is modified for all the boards that use the driver. Signed-off-by: Piotr Wilczekp.wilc...@samsung.com Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com CC: Minkyu Kangmk7.k...@samsung.com CC: Heiko Schocherh...@denx.de CC: Inderpal Singhinderpal.si...@linaro.org CC: David Müllerd.muel...@elsoft.ch CC: Chander Kashyapk.chan...@samsung.com CC: Lukasz Majewskil.majew...@samsung.com Tested-by: Naveen Krishna Chatradhich.nav...@samsung.com Reviewed-by: Naveen Krishna Chatradhich.nav...@samsung.com --- Boards VCMA9, Arndale and Exynos5250 are compile tested only. Boards Trats and Trats2 were hardware tested. All boards compile clean. Changes for V2: - patch series squashed to one patch - removed unnecessary blank line - change related to hsi2c moved to saparate patch board/samsung/smdk5250/exynos5-dt.c |2 - board/samsung/trats/trats.c | 21 ++--- board/samsung/trats2/trats2.c | 35 ++-- drivers/i2c/Makefile|2 +- drivers/i2c/s3c24x0_i2c.c | 152 ++- include/configs/VCMA9.h |8 +- include/configs/arndale.h |9 +-- include/configs/exynos5250-dt.h |8 +- include/configs/trats.h | 25 ++ include/configs/trats2.h| 29 +++ 10 files changed, 170 insertions(+), 121 deletions(-) Thanks! Applied to u-boot-i2c.git bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/2] driver:i2c:s3c24x0: fix clock init for hsi2c
Hello Piotr, Am 20.11.2013 10:43, schrieb Piotr Wilczek: Fix clock value initialisation for Exynos other than Exynos5 for hsi2c. Signed-off-by: Piotr Wilczekp.wilc...@samsung.com Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com Cc: Minkyu Kangmk7.k...@samsung.com Cc: Heiko Schocherh...@denx.de --- drivers/i2c/s3c24x0_i2c.c |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Thanks. Applied to u-boot-i2c.git bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 1/4] i2c: fti2c010: cosmetic: coding style cleanup
Hello Kuo-jung, Am 02.12.2013 09:02, schrieb Kuo-Jung Su: From: Kuo-Jung Sudant...@faraday-tech.com Coding style cleanup Signed-off-by: Kuo-Jung Sudant...@faraday-tech.com Cc: Heiko Schocherh...@denx.de --- Changes for v2 v3: - Nothing updates drivers/i2c/fti2c010.c | 31 --- 1 file changed, 16 insertions(+), 15 deletions(-) Applied to u-boot-i2c-git, thanks! bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 2/4] i2c: fti2c010: migrate to new i2c model
Hello Kuo-jung, Am 02.12.2013 09:02, schrieb Kuo-Jung Su: From: Kuo-Jung Sudant...@faraday-tech.com Replace the legacy i2c model with the new one. Signed-off-by: Kuo-Jung Sudant...@faraday-tech.com Cc: Heiko Schocherh...@denx.de --- Changes for v2 v3: - Nothing updates drivers/i2c/fti2c010.c | 299 +--- 1 file changed, 133 insertions(+), 166 deletions(-) Thanks! Applied to u-boot-i2c.git bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 3/4] i2c: fti2c010: serial out r/w address in MSB order
Hello Kuo-jung, Am 02.12.2013 09:02, schrieb Kuo-Jung Su: From: Kuo-Jung Sudant...@faraday-tech.com For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B), the r/w address should be serial out in MSB order. Signed-off-by: Kuo-Jung Sudant...@faraday-tech.com Cc: Heiko Schocherh...@denx.de --- Changes for v3: - Coding style update Changes for v2: - Initial release drivers/i2c/fti2c010.c | 26 ++ 1 file changed, 18 insertions(+), 8 deletions(-) Applied to u-boot-i2c.git, thanks! bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 4/4] cmd_eeprom: bug fix for i2c read/write
Hello Kuo-jung,
Am 02.12.2013 09:02, schrieb Kuo-Jung Su:
From: Kuo-Jung Sudant...@faraday-tech.com
The local pointer of address (i.e., addr) only gets
referenced under SPI mode, and it won't be appropriate
to pass only 1-byte addr[1] to i2c_read/i2c_write while
CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1.
1. In U-boot's I2C model, the address would be re-assembled
to a byte string in MSB order inside I2C controller drivers.
2. The 'CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW' option which could
be found at soft_i2c.c is always turned on in cmd_eeprom.c,
the addr[0] always contains the device address with overflowed
MSB address bits.
Signed-off-by: Kuo-Jung Sudant...@faraday-tech.com
Cc: Alexey Brodkinabrod...@synopsys.com
Cc: Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com
cc: Peter Tyserpty...@xes-inc.com
Cc: Heiko Schocherh...@denx.de
Cc: Wolfgang Denkw...@denx.de
Cc: Stefan Roeses...@denx.de
Cc: Mischa Jonkermjon...@synopsys.com
---
Changes for v3:
- It turns out that what we did before 2013-11-13
(i.e., cmd_eeprom: fix i2c_{read|write} usage if env is in I2C EEPROM)
is still the best one, this patch simply rollback to it with coding
style fix.
Changes for v2:
- Initial release
common/cmd_eeprom.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Applied to u-boot.i2c.git, thanks!
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [U-Boot, V2] arm: omap: i2c: don't zero cnt in i2c_write
Hello Nikita, Am 28.11.2013 17:04, schrieb Nikita Kiryanov: Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3 based devices. This seems to be related to the following advisory which apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as OMAP4430 TRM: Advisory: I2C Module Does Not Allow 0-Byte Data Requests Details: When configured as the master, the I2C module does not allow 0-byte data transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause undefined behavior. Workaround(s): No workaround. Do not use 0-byte data requests. The writes in question are unnecessary from a functional point of view. Most of them are done after I/O has finished, and the only one that preceds I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before actual data transmission takes place. Therefore, remove all writes that zero the cnt register. Cc: Heiko Schocherh...@denx.de Cc: Thomas Petazzonithomas.petazz...@free-electrons.com Cc: Tom Rinitr...@ti.com Cc: Lubomir Popovlpo...@mm-sol.com Cc: Enric Balletbo Serraeballe...@gmail.com Signed-off-by: Nikita Kiryanovnik...@compulab.co.il Tested-by: Thomas Petazzonithomas.petazz...@free-electrons.com Tested-by: Lubomir Popovlpo...@mm-sol.com --- Changes in V2: Removed all instances of writew(0,i2c_base-cnt) instead of just the one in i2c_write (following a test of V1 by Thomas Petazzoni). drivers/i2c/omap24xx_i2c.c | 6 -- 1 file changed, 6 deletions(-) Thanks! Applied to u-boot-i2c.git. bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2] i2c: samsung: register i2c busses for Exynso5420 and Exynos5250
Hello Naveen, Am 06.12.2013 07:42, schrieb Naveen Krishna Ch: From: Naveen Krishna Chch.nav...@samsung.com This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels on Exynos5420 and Exynos5250 and also adds support for init function for hsi2c channels Signed-off-by: Naveen Krishna Chatradhich.nav...@samsung.com --- Changes since v1: 1. Fix compiler error for trats board pointed by Heiko 2. Fix compiler warning for trats and trats2 boards README|6 ++ drivers/i2c/s3c24x0_i2c.c | 224 +++-- 2 files changed, 182 insertions(+), 48 deletions(-) Applied to u-boot-i2c.git, thanks! bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [i2c] Pull request
Hello Tom, please pull from u-boot-i2c.git. The following changes since commit f44483b57c49282299da0e5c10073b909cdad979: Merge branch 'serial' of git://git.denx.de/u-boot-microblaze (2013-12-02 08:48:02 -0500) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to e717fc6d1a2b459ae8352f7af5945cc0c216ab1e: i2c: samsung: register i2c busses for Exynso5420 and Exynos5250 (2013-12-06 07:46:23 +0100) Kuo-Jung Su (4): i2c: fti2c010: cosmetic: coding style cleanup i2c: fti2c010: migrate to new i2c model i2c: fti2c010: serial out r/w address in MSB order cmd_eeprom: bug fix for i2c read/write Naveen Krishna Ch (1): i2c: samsung: register i2c busses for Exynso5420 and Exynos5250 Nikita Kiryanov (1): arm: omap: i2c: don't zero cnt in i2c_write Piotr Wilczek (2): driver:i2c:s3c24x0: adapt driver to new i2c driver:i2c:s3c24x0: fix clock init for hsi2c README | 6 +++ board/samsung/smdk5250/exynos5-dt.c | 2 - board/samsung/trats/trats.c | 21 ++ board/samsung/trats2/trats2.c | 35 +--- common/cmd_eeprom.c | 4 +- drivers/i2c/Makefile| 2 +- drivers/i2c/fti2c010.c | 352 +--- drivers/i2c/omap24xx_i2c.c | 6 --- drivers/i2c/s3c24x0_i2c.c | 284 -- include/configs/VCMA9.h | 8 ++-- include/configs/arndale.h | 9 ++-- include/configs/exynos5250-dt.h | 8 ++-- include/configs/trats.h | 25 include/configs/trats2.h| 29 ++--- 14 files changed, 474 insertions(+), 317 deletions(-) Thanks! bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] SMDK5250 not booting on latest U-boot-samsung
Hi All, I have tried booting SMDK5250 on the latest U-boot-Samsung branch, It builds fine but does not boot. Observation: If revert the following patch it works fine: commit 47ed5dd031d7d2c587e6afd386e79ccec1a1b7f7 Author: Albert ARIBAUD albert.u.b...@aribaud.net Date: Thu Nov 7 14:21:46 2013 +0100 arm: keep all sections in ELF file Current LDS files /DISCARD/ a lot of sections when linking ELF files, causing diagnostic tools such as readelf or objdump to produce partial output. Keep all section at link stage, filter only at objcopy time so that .bin remains minimal. Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net Reviewed-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Kindly do let me know if any changes to be made. -- Regards, Rajeshwari Shinde ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
