Re: [U-Boot] [PATCH v2 0/2] usb: gadget: fotg210: workaround new hardware support
2013/12/23 Marek Vasut ma...@denx.de: On Monday, December 23, 2013 at 01:50:36 AM, Kuo-Jung Su wrote: 2013/12/20 Marek Vasut ma...@denx.de: On Friday, December 20, 2013 at 05:32:58 AM, Kuo-Jung Su wrote: From: Kuo-Jung Su dant...@faraday-tech.com 1. It's known that EP0 fifo empty indication is not reliable, an extra delay is necessary to avoid data corruption while handling packets with size greater than 64 bytes. 2. Since hardware revision 1.11.0, some fields of interrupt status registers are now write-1-clear. Changes for v2: - usb: gadget: fotg210: add w1c interrupt status support: By writting 1 then 0 to get rid of the use of CONFIG_USB_GADGET_FOTG210_ISRW1C. Thanks for Marek's comments. - usb: gadget: fotg210: EP0 fifo empty indication is non-reliable udelay_masked() - udelay(), and patch comment updates. Kuo-Jung Su (2): usb: gadget: fotg210: add w1c interrupt status support usb: gadget: fotg210: EP0 fifo empty indication is non-reliable drivers/usb/gadget/fotg210.c | 15 +++ 1 file changed, 15 insertions(+) Applied both , thanks! btw. is this FOTG210 stuff used by any platform or is this just a dead code ? It's still an active IP, and the only USB 2.0 (host, device, otg) controller we have currently in Faraday. It's used in upcoming Faraday A369 SoC patch set (I'm still waiting for the dependant NAND driver: ftnandc021 to be commited), and the new SoC platforms (For politics reason, they won't be released by myself.) in year 2013. OK, glad to see this won't be dead code soon. Next time, I suppose it'd be better to commit platform first, drivers afterwards, so we dont have dead code for an extended period of time. Got it, thanks -- Best wishes, Kuo-Jung Su ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Stack size
Hello, How to increase the user mode stack size which will be used by the standalone application in u-boot? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] net/designware: make driver compatible with data cache
Up until now this driver only worked with data cache disabled.
To make it work with enabled data cache following changes were required:
* Implement all accesses to shared structures between CPU and GMAC via
uncached reads/writes (readl/writel).
* Flush cache for data passed from CPU to GMAC
* Invalidate cache for data passed from GMAC to CPU
I tried to implement items above keeping as much code unchanged as
possible. So logic of operation is kept as it is.
Signed-off-by: Alexey Brodkin abrod...@synopsys.com
Cc: Joe Hershberger joe.hershber...@ni.com
Cc: Vipin Kumar vipin.ku...@st.com
Cc: Stefan Roese s...@denx.de
Cc: Mischa Jonker mjon...@synopsys.com
---
drivers/net/designware.c | 91 ++--
1 file changed, 58 insertions(+), 33 deletions(-)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 22155b4..04ae02c 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -30,26 +30,30 @@ static void tx_descs_init(struct eth_device *dev)
for (idx = 0; idx CONFIG_TX_DESCR_NUM; idx++) {
desc_p = desc_table_p[idx];
- desc_p-dmamac_addr = txbuffs[idx * CONFIG_ETH_BUFSIZE];
- desc_p-dmamac_next = desc_table_p[idx + 1];
+ writel(txbuffs[idx * CONFIG_ETH_BUFSIZE],
+ desc_p-dmamac_addr);
+ writel(desc_table_p[idx + 1], desc_p-dmamac_next);
#if defined(CONFIG_DW_ALTDESCRIPTOR)
- desc_p-txrx_status = ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
- DESC_TXSTS_TXFIRST | DESC_TXSTS_TXCRCDIS | \
- DESC_TXSTS_TXCHECKINSCTRL | \
- DESC_TXSTS_TXRINGEND | DESC_TXSTS_TXPADDIS);
-
- desc_p-txrx_status |= DESC_TXSTS_TXCHAIN;
- desc_p-dmamac_cntl = 0;
- desc_p-txrx_status = ~(DESC_TXSTS_MSK | DESC_TXSTS_OWNBYDMA);
+ writel(readl(desc_p-txrx_status) ~(DESC_TXSTS_TXINT |
+ DESC_TXSTS_TXLAST | DESC_TXSTS_TXFIRST |
+ DESC_TXSTS_TXCRCDIS | DESC_TXSTS_TXCHECKINSCTRL |
+ DESC_TXSTS_TXRINGEND | DESC_TXSTS_TXPADDIS),
+ desc_p-txrx_status);
+
+ writel(readl(desc_p-txrx_status) | DESC_TXSTS_TXCHAIN,
+ desc_p-txrx_status);
+ writel(0, desc_p-dmamac_cntl);
+ writel(readl(desc_p-txrx_status) ~(DESC_TXSTS_MSK |
+ DESC_TXSTS_OWNBYDMA), desc_p-txrx_status);
#else
- desc_p-dmamac_cntl = DESC_TXCTRL_TXCHAIN;
- desc_p-txrx_status = 0;
+ writel(DESC_TXCTRL_TXCHAIN, desc_p-dmamac_cntl);
+ writel(0, desc_p-txrx_status);
#endif
}
/* Correcting the last pointer of the chain */
- desc_p-dmamac_next = desc_table_p[0];
+ writel(desc_table_p[0], desc_p-dmamac_next);
writel((ulong)desc_table_p[0], dma_p-txdesclistaddr);
}
@@ -63,20 +67,30 @@ static void rx_descs_init(struct eth_device *dev)
struct dmamacdescr *desc_p;
u32 idx;
+ /* Before passing buffers to GMAC we need to make sure zeros
+* written there right after priv structure allocation were
+* flushed into RAM.
+* Otherwise there's a chance to get some of them flushed in RAM when
+* GMAC is already pushing data to RAM via DMA. This way incoming from
+* GMAC data will be corrupted. */
+ flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
+ RX_TOTAL_BUFSIZE);
+
for (idx = 0; idx CONFIG_RX_DESCR_NUM; idx++) {
desc_p = desc_table_p[idx];
- desc_p-dmamac_addr = rxbuffs[idx * CONFIG_ETH_BUFSIZE];
- desc_p-dmamac_next = desc_table_p[idx + 1];
- desc_p-dmamac_cntl =
- (MAC_MAX_FRAME_SZ DESC_RXCTRL_SIZE1MASK) | \
- DESC_RXCTRL_RXCHAIN;
+ writel(rxbuffs[idx * CONFIG_ETH_BUFSIZE],
+ desc_p-dmamac_addr);
+ writel(desc_table_p[idx + 1], desc_p-dmamac_next);
+
+ writel((MAC_MAX_FRAME_SZ DESC_RXCTRL_SIZE1MASK) |
+ DESC_RXCTRL_RXCHAIN, desc_p-dmamac_cntl);
- desc_p-txrx_status = DESC_RXSTS_OWNBYDMA;
+ writel(DESC_RXSTS_OWNBYDMA, desc_p-txrx_status);
}
/* Correcting the last pointer of the chain */
- desc_p-dmamac_next = desc_table_p[0];
+ writel(desc_table_p[0], desc_p-dmamac_next);
writel((ulong)desc_table_p[0], dma_p-rxdesclistaddr);
}
@@ -198,26 +212,32 @@ static int dw_eth_send(struct eth_device *dev, void
*packet, int length)
struct dmamacdescr *desc_p = priv-tx_mac_descrtable[desc_num];
/* Check if the descriptor is owned by CPU */
- if (desc_p-txrx_status DESC_TXSTS_OWNBYDMA) {
+ if
Re: [U-Boot] [PATCH] net/designware: make driver compatible with data cache
Hi Alexey, * Implement all accesses to shared structures between CPU and GMAC via uncached reads/writes (readl/writel). I don't know how ARC exactly implements this for u-boot, but AFAIK, readl/writel are meant for 'strongly ordered' I/O writes, not necessarily uncached. The uncached part of it us usually achieved by mapping it into an uncached area, but this is not always possible without using the MMU. So you may need to allocate descriptors on cache-line boundaries and do manually flushing/invalidating. Mischa ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc/dwmmc: use bounce buffer for data exchange between CPU and MMC controller
Bounce buffer implementation takes care of proper data buffer alignemt
and correct flush/invalidation of data cache at once so we no longer
depend on input data variety and make sure CPU and MMC controller deal
with expected data in case of enabled data cache.
Bounce buffer requires to add its definition (CONFIG_BOUNCE_BUFFER) in
board configuration, otherwise corresponding library won't be compiled
and linker will fail to build resulting executable.
Signed-off-by: Alexey Brodkin abrod...@synopsys.com
Cc: Mischa Jonker mjon...@synopsys.com
Cc: Alim Akhtar alim.akh...@samsung.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung jh80.ch...@samsung.com
Cc: Amar amarendra...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Simon Glass s...@chromium.org
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
Cc: Andy Fleming aflem...@freescale.com
---
drivers/mmc/dw_mmc.c| 32 ++--
include/configs/arndale.h | 1 +
include/configs/exynos5250-dt.h | 1 +
3 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 19d9b0b..a149d97 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -6,6 +6,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
+#include bouncebuf.h
#include common.h
#include malloc.h
#include mmc.h
@@ -41,11 +42,13 @@ static void dwmci_set_idma_desc(struct dwmci_idmac *idmac,
}
static void dwmci_prepare_data(struct dwmci_host *host,
- struct mmc_data *data, struct dwmci_idmac *cur_idmac)
+ struct mmc_data *data,
+ struct dwmci_idmac *cur_idmac,
+ void *bounce_buffer)
{
unsigned long ctrl;
unsigned int i = 0, flags, cnt, blk_cnt;
- ulong data_start, data_end, start_addr;
+ ulong data_start, data_end;
blk_cnt = data-blocks;
@@ -55,11 +58,6 @@ static void dwmci_prepare_data(struct dwmci_host *host,
data_start = (ulong)cur_idmac;
dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
- if (data-flags == MMC_DATA_READ)
- start_addr = (unsigned int)data-dest;
- else
- start_addr = (unsigned int)data-src;
-
do {
flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ;
flags |= (i == 0) ? DWMCI_IDMAC_FS : 0;
@@ -70,7 +68,7 @@ static void dwmci_prepare_data(struct dwmci_host *host,
cnt = data-blocksize * 8;
dwmci_set_idma_desc(cur_idmac, flags, cnt,
- start_addr + (i * PAGE_SIZE));
+ (u32)bounce_buffer + (i * PAGE_SIZE));
if (blk_cnt = 8)
break;
@@ -117,6 +115,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
u32 retry = 1;
u32 mask, ctrl;
ulong start = get_timer(0);
+ struct bounce_buffer bbstate;
while (dwmci_readl(host, DWMCI_STATUS) DWMCI_BUSY) {
if (get_timer(start) timeout) {
@@ -127,8 +126,19 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
- if (data)
- dwmci_prepare_data(host, data, cur_idmac);
+ if (data) {
+ if (data-flags == MMC_DATA_READ) {
+ bounce_buffer_start(bbstate, data-dest,
+ data-blocksize *
+ data-blocks, GEN_BB_WRITE);
+ } else {
+ bounce_buffer_start(bbstate, data-src,
+ data-blocksize *
+ data-blocks, GEN_BB_READ);
+ }
+ dwmci_prepare_data(host, data, cur_idmac,
+ bbstate.bounce_buffer);
+ }
dwmci_writel(host, DWMCI_CMDARG, cmd-cmdarg);
@@ -204,6 +214,8 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
ctrl = dwmci_readl(host, DWMCI_CTRL);
ctrl = ~(DWMCI_DMA_EN);
dwmci_writel(host, DWMCI_CTRL, ctrl);
+
+ bounce_buffer_stop(bbstate);
}
udelay(100);
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index a3cb56b..3d29caf 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -85,6 +85,7 @@
#define CONFIG_DWMMC
#define CONFIG_EXYNOS_DWMMC
#define CONFIG_SUPPORT_EMMC_BOOT
+#define CONFIG_BOUNCE_BUFFER
#define CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 8fb904c..b39bafc 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -102,6 +102,7 @@
#define CONFIG_DWMMC
#define CONFIG_EXYNOS_DWMMC
Re: [U-Boot] Stack size
Dear Parimala Baggiri, In message CAD6P=4hwjgozdwzhbk00fvgypry63sm4erexgpufsjpihd9...@mail.gmail.com you wrote: How to increase the user mode stack size which will be used by the standalone application in u-boot? Add more system RAM. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It's certainly convenient the way the crime (or condition) of stupidity carries with it its own punishment, automatically admisistered without remorse, pity, or prejudice. :-) -- Tom Christiansen in 559seq$ag1$1...@csnews.cs.colorado.edu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/T208xQDS: add mtdparts suppport
We use dynamical mtdparts partition instead of directly puting mtd partitions nodes in device tree. Signed-off-by: Shengzhou Liu shengzhou@freescale.com --- include/configs/T2080QDS.h | 13 + 1 file changed, 13 insertions(+) diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h index bff001f..ccb3c08 100644 --- a/include/configs/T2080QDS.h +++ b/include/configs/T2080QDS.h @@ -637,6 +637,19 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DOS_PARTITION #endif + +/* + * Dynamic MTD Partition support with mtdparts + */ +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT nor0=fe800.nor,nand0=ff80.flash +#define MTDPARTS_DEFAULT mtdparts=fe800.nor:1m(boot),5m(linux),96m(fs), \ +128k(dtb),-(user);ff80.flash:1m(boot), \ +5m(linux),96m(fs),128k(dtb),-(user); + /* * Environment */ -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
