[U-Boot] [PATCH] venice2: move device tree to fix build error

2014-02-20 Thread Masahiro Yamada
Commit 5ab502cb gathered all device tree sources
to arch/$(ARCH)/dts/.
So tegra124-venice2.dts also must go to arch/arm/dts directory
to build venice2 board.

(Commit 5ab502cb had been posted before venice2 board support
was merged. So an unvisible conflict happened.)

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Simon Glass s...@chromium.org
Cc: Tom Rini tr...@ti.com
---
 arch/arm/dts/Makefile |  5 +--
 arch/arm/dts/tegra124-venice2.dts | 84 +++
 board/nvidia/dts/tegra124-venice2.dts | 84 ---
 3 files changed, 86 insertions(+), 87 deletions(-)
 create mode 100644 arch/arm/dts/tegra124-venice2.dts
 delete mode 100644 board/nvidia/dts/tegra124-venice2.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2658911..e2fcca5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -2,7 +2,6 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
exynos5250-smdk5250.dtb \
exynos5420-smdk5420.dtb
-
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
@@ -16,8 +15,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra30-beaver.dtb \
tegra30-cardhu.dtb \
tegra30-tec-ng.dtb \
-   tegra114-dalmore.dtb
-
+   tegra114-dalmore.dtb \
+   tegra124-venice2.dtb
 dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
zynq-zc706.dtb \
zynq-zed.dtb \
diff --git a/arch/arm/dts/tegra124-venice2.dts 
b/arch/arm/dts/tegra124-venice2.dts
new file mode 100644
index 000..2f8d1dc
--- /dev/null
+++ b/arch/arm/dts/tegra124-venice2.dts
@@ -0,0 +1,84 @@
+/dts-v1/;
+
+#include tegra124.dtsi
+
+/ {
+   model = NVIDIA Venice2;
+   compatible = nvidia,venice2, nvidia,tegra124;
+
+   aliases {
+   i2c0 = /i2c@7000d000;
+   i2c1 = /i2c@7000c000;
+   i2c2 = /i2c@7000c400;
+   i2c3 = /i2c@7000c500;
+   i2c4 = /i2c@7000c700;
+   i2c5 = /i2c@7000d100;
+   sdhci0 = /sdhci@700b0600;
+   sdhci1 = /sdhci@700b0400;
+   spi0 = /spi@7000d400;
+   spi1 = /spi@7000da00;
+   usb0 = /usb@7d008000;
+   };
+
+   memory {
+   device_type = memory;
+   reg = 0x8000 0x8000;
+   };
+
+   i2c@7000c000 {
+   status = okay;
+   clock-frequency = 10;
+   };
+
+   i2c@7000c400 {
+   status = okay;
+   clock-frequency = 10;
+   };
+
+   i2c@7000c500 {
+   status = okay;
+   clock-frequency = 10;
+   };
+
+   i2c@7000c700 {
+   status = okay;
+   clock-frequency = 10;
+   };
+
+   i2c@7000d000 {
+   status = okay;
+   clock-frequency = 40;
+   };
+
+   i2c@7000d100 {
+   status = okay;
+   clock-frequency = 40;
+   };
+
+   spi@7000d400 {
+   status = okay;
+   spi-max-frequency = 2500;
+   };
+
+   spi@7000da00 {
+   status = okay;
+   spi-max-frequency = 2500;
+   };
+
+   sdhci@700b0400 {
+   status = okay;
+   cd-gpios = gpio 170 0; /* gpio PV2 */
+   power-gpios = gpio 136 0; /* gpio PR0 */
+   bus-width = 4;
+   };
+
+   sdhci@700b0600 {
+   status = okay;
+   bus-width = 8;
+   };
+
+   usb@7d008000 {
+   status = okay;
+   nvidia,vbus-gpio = gpio 109 0; /* gpio PN5, USB_VBUS_EN1 */
+   };
+};
diff --git a/board/nvidia/dts/tegra124-venice2.dts 
b/board/nvidia/dts/tegra124-venice2.dts
deleted file mode 100644
index 2f8d1dc..000
--- a/board/nvidia/dts/tegra124-venice2.dts
+++ /dev/null
@@ -1,84 +0,0 @@
-/dts-v1/;
-
-#include tegra124.dtsi
-
-/ {
-   model = NVIDIA Venice2;
-   compatible = nvidia,venice2, nvidia,tegra124;
-
-   aliases {
-   i2c0 = /i2c@7000d000;
-   i2c1 = /i2c@7000c000;
-   i2c2 = /i2c@7000c400;
-   i2c3 = /i2c@7000c500;
-   i2c4 = /i2c@7000c700;
-   i2c5 = /i2c@7000d100;
-   sdhci0 = /sdhci@700b0600;
-   sdhci1 = /sdhci@700b0400;
-   spi0 = /spi@7000d400;
-   spi1 = /spi@7000da00;
-   usb0 = /usb@7d008000;
-   };
-
-   memory {
-   device_type = memory;
-   reg = 0x8000 0x8000;
-   };
-
-   i2c@7000c000 {
-   status = okay;
-   clock-frequency = 10;
-   };
-
-   i2c@7000c400 {
-   status = okay;
-   clock-frequency = 10;
-   };
-
-   i2c@7000c500 {
-   status = okay;
-   

Re: [U-Boot] [PATCH] kbuild,tegra124: add dummy obj- for Kbuild

2014-02-20 Thread Masahiro Yamada
Hello Tom,
(ccing Simon and Stephan)



  Tom,
  Please apply this along with the Kbuild series.
 
 So with this, I then get:
 Configuring for venice2 board...
 make[2]: *** [arch/arm/dts/tegra124-venice2.dtb] Error 1
 make[1]: *** [dts/dt.dtb] Error 2
 make: *** [sub-make] Error 2
textdata bss dec hex filename
  260562   15030  309960  585552   8ef50 venice2/u-boot
   18527 421  72   190204a4c venice2/spl/u-boot-spl
 
 Device Tree Source is not correctly specified.
 Please define 'CONFIG_DEFAULT_DEVICE_TREE'
 or build with 'DEVICE_TREE=device_tree' argument
 
 make[2]: *** [arch/arm/dts/tegra124-venice2.dtb] Error 1
 make[1]: *** [dts/dt.dtb] Error 2
 make: *** [sub-make] Error 2
 
 - SUMMARY 
 Boards compiled: 1
 Boards with errors: 1 ( venice2 )
 --
 
 What's going on as the config file sets CONFIG_DEFAULT_DEVICE_TREE
 



Commit 5ab502cb89 has been applied and the build system
now expects device tree sources should reside under arch/$(ARCH)/dts/.

But the device tree of venice2 board is still remaining
in board/nvidia/dts/.
This is the cause of the build error.
(Commit 5ab502cb89 had been posted before venice2 board
support was merged. So there happened an unvisible conflict.)

Actually I did not expect dts  series was applied so soon
because Simon and I was still discussing that series.
And I guess Simon is not happy about Commit 5ab502cb89.

Anyway, we need to do something with venice2's build error
immediately.

I think we have two options.

[1] Move also venice2 device tree to arch/arm/dts directory.
I have posted a patch:
http://patchwork.ozlabs.org/patch/322082/

[2] revert the following commits in this order
3284c8b8ca (dts: generate multiple device tree blobs)
5ab502cb89 (dts: move device tree sources to arch/$(ARCH)/dts/)


If we like to gather all device trees to arch/$(ARCH)/dts,
the choice will be [1].

On the other hand, if we like to put *.dtsi to arch/$(ARCH)/dts
whilst *.dts to board/$(VENDOR)/dts, the choice will be [2].



Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH] kbuild,tegra124: add dummy obj- for Kbuild

2014-02-20 Thread Masahiro Yamada
Hello Albert, 


  --- a/arch/arm/cpu/armv7/tegra124/Makefile
  +++ b/arch/arm/cpu/armv7/tegra124/Makefile
  @@ -4,3 +4,6 @@
   #
   # SPDX-License-Identifier: GPL-2.0+
   #
  +
  +# necessary to create built-in.o
  +obj- := __dummy__.o
 
 Is there really no other way than to specify an unexisting __dummy__.o
 in order to build a useless built-in.o?

I believe this is the simplest workaround we can do now.

But I promise I'll refactor makefiles and delete
arch/arm/cpu/armv7/{tegra114,tegra30}/Makefile  lator.

For now, let me go with this solution..
We still have a mountain of refactoring to do.

Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH] kbuild,tegra124: add dummy obj- for Kbuild

2014-02-20 Thread Masahiro Yamada
Hello Stephen,


On Wed, 19 Feb 2014 09:36:14 -0700
Stephen Warren swar...@wwwdotorg.org wrote:

 On 02/19/2014 07:46 AM, Albert ARIBAUD wrote:
  Hi Masahiro,
  
  On Wed, 19 Feb 2014 22:26:43 +0900, Masahiro Yamada
  yamad...@jp.panasonic.com wrote:
  
  In Kbuild, every makefile must have non-empty obj- or obj-y.
  Otherwise, built-in.o will not be created and the link stage
  will fail.
 ...
  diff --git a/arch/arm/cpu/armv7/tegra124/Makefile 
  b/arch/arm/cpu/armv7/tegra124/Makefile
 ...
  +# necessary to create built-in.o
  +obj- := __dummy__.o
 
 obj- or obj-y?

Definitely obj-.
If you add a non-existing object to obj-y, build will fail.

 Adding something to obj-, which presumably isn't used at all, seems very
 odd.
 
  Is there really no other way than to specify an unexisting __dummy__.o
  in order to build a useless built-in.o?
 
 I haven't looked at Kbuild at all, but in the build systems I've
 written, for each sub-directory makefile that was included, the
 makefiles would include a pre-makefile first and a post-makefile
 after. The post-makefile could easily do something like:
 
 ifeq ($(obj-y),)
 obg-y := __dummy__.o
 endif


You mean
ifeq ($(obj-y),)
 obj- := __dummy__.o
endif

should be put in a common part(scripts/Makefile.build) ?

No, no. We can't do this.

It has a side effect.

If we put it in the common part, build-in.o will be generated
in all sub-directories, including tools/, tools/env,
examples/standalone/, etc.

We do not want built-in.o  in host progs / standalone progs
directories.


Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH v8 0/38] Switch over to real Kbuild

2014-02-20 Thread Masahiro Yamada
Hello Tom,


  Anyway, evaluating cc-option multiple times isn't nice and its
  optimization is on my TODO list.
 
 Can we move this up on the TODO list please?  Some quick testing
 around here says that this is the big culprit on build times.  I get
 pre-Kbuild series build time to match post-Kbuild series by building
 with CONFIG_CC_OPT_CACHE_DISABLE=y.

Sure.
I will deal with this task as the first priority.

Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH] kbuild,tegra124: add dummy obj- for Kbuild

2014-02-20 Thread Masahiro Yamada
Hello Stephen,

 
  Adding something to obj-, which presumably isn't used at all, seems very
  odd.
  
  Why do we even need arch/arm/cpu/armv7/tegra124/Makefile ?  I assume we
  need the config.mk because we can't stick CONFIG_ARCH_DEVICE_TREE into
  the config header?
 
 At least with the current build system, if I delete it, the build fails:
 
  + make 
  BUILD_DIR=/home/swarren/shared/git_wa/tegra-uboot-flasher/_build/venice2/u-boot
   -s -j9
  /home/swarren/shared/git_wa/tegra-uboot-flasher/u-boot/scripts/Makefile.build:11:
   Makefile: No such file or directory
  make[1]: *** No rule to make target `Makefile'.  Stop.
  make: *** 
  [/home/swarren/shared/git_wa/tegra-uboot-flasher/_build/venice2/u-boot/arch/arm/cpu/armv7/tegra124/built-in.o]
   Error 2

Yes, we can't delete the Makefile. (This is the same as before Kbuild.)

Venice2 board specify SoC name, tegra124 in boards.cfg.
If $(SOC) is not empty, the build system will descend into the SoC
directory, and Makefile always must be there.

I understand the special situation for Tegra, which has a different CPU
for SPL.

I guess you want to build under arch/arm/cpu/arm720t/tegra124/ for SPL,
whereas there is nothing to build under arch/arm/cpu/armv7/tegra124/.



Best Regards
Masahiro Yamada

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[U-Boot] [PATCH] .gitignore: ignore boot images by pattern rule /u-boot*

2014-02-20 Thread Masahiro Yamada
U-Boot supports various boot images for various SoCs.
It is annoying to modify .gitignore file every time
we add/delete boot images.

Fortunately, there is a simple rule:
Those with file name prefix u-boot at the top directory
are all generated files.

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
 .gitignore | 19 +--
 1 file changed, 1 insertion(+), 18 deletions(-)

diff --git a/.gitignore b/.gitignore
index 5882ff5..ffe0cc7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -31,24 +31,7 @@
 /MLO*
 /SPL
 /System.map
-/u-boot
-/u-boot.hex
-/u-boot.imx
-/u-boot-with-spl.imx
-/u-boot-with-nand-spl.imx
-/u-boot.map
-/u-boot.srec
-/u-boot.ldr
-/u-boot.ldr.hex
-/u-boot.ldr.srec
-/u-boot.img
-/u-boot.kwb
-/u-boot.sha1
-/u-boot.dis
-/u-boot.lds
-/u-boot.ubl
-/u-boot.ais
-/u-boot.sb
+/u-boot*
 
 #
 # git files that we don't want to ignore even it they are dot-files
-- 
1.8.3.2

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[U-Boot] [PATCH] kbuild: a minor optimization of make clobber

2014-02-20 Thread Masahiro Yamada
The pattern rule MLO* can delete both MLO and MLO.byteswap.

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 6ec55c5..b5fca23 100644
--- a/Makefile
+++ b/Makefile
@@ -1173,7 +1173,7 @@ CLEAN_FILES += u-boot.lds include/bmp_logo.h 
include/bmp_logo_data.h \
 CLOBBER_DIRS  += $(patsubst %,spl/%, $(filter-out Makefile, \
 $(shell ls -1 spl 2/dev/null))) \
 tpl
-CLOBBER_FILES += u-boot* MLO MLO* SPL System.map nand_spl/u-boot*
+CLOBBER_FILES += u-boot* MLO* SPL System.map nand_spl/u-boot*
 
 # Directories  files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated
-- 
1.8.3.2

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Re: [U-Boot] [PATCH] net: fec_mxc: fix mii_speed configuration for MX6's

2014-02-20 Thread Philippe De Muyter
Hi Markus,

On Thu, Feb 20, 2014 at 08:40:03AM +0100, Markus Niebel wrote:
 Hello Phillip,
 
 Am 19.02.2014 15:27, wrote Philippe De Muyter:
  On MX6DL at least, measured mdc speed was wrong (3.3 Mhz instead of 2.5
  Mhz), because of wrong assumptions about the reference clock and the
  way the divider is used.
  
  I have fixed that for all MX6's by using the IPG clock as the reference
  clock, and applying the - 1 correction when we have a ENET MAC instead
  of a FEC MAC, just like what is done in the fec linux driver.
 
 this should be fixed with
 
 ARM: imx6: fix wrong fec clk
 NET: fec_mxc: fix MDIO clock prescaler calculation
 
 and was pulled yesterday to 
 
 u-boot-arm/master

I am working with plain u-boot (git://git.denx.de/u-boot.git), and of course
those patches were not yet there yesterday :)

Thanks

Philippe
 
  
  Signed-off-by: Philippe De Muyter p...@macqel.be
  ---
   drivers/net/fec_mxc.c |   20 +---
   1 files changed, 17 insertions(+), 3 deletions(-)
  
  diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
  index 3b2b995..3ab0ecd 100644
  --- a/drivers/net/fec_mxc.c
  +++ b/drivers/net/fec_mxc.c
  @@ -124,13 +124,27 @@ static int fec_mdio_read(struct ethernet_regs *eth, 
  uint8_t phyAddr,
   
   static void fec_mii_setspeed(struct ethernet_regs *eth)
   {
  +   u32 sysclock;
  +   u32 mii_speed;
  +
  /*
   * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
   * and do not drop the Preamble.
  +* shift the result by 1, because MII_SPEED field is at bits 6..1.
   */
  -   writelimx_get_fecclk() / 100) + 2) / 5)  1,
  -   eth-mii_speed);
  -   debug(%s: mii_speed %08x\n, __func__, readl(eth-mii_speed));
  +#if defined(CONFIG_MX6)
  +   sysclock = mxc_get_clock(MXC_IPG_CLK);
  +#else
  +   sysclock = imx_get_fecclk();
  +#endif
  +#define MIIM_SPEED 250
  +   mii_speed = DIV_ROUND_UP(sysclock, (MIIM_SPEED * 2));
  +#ifdef FEC_QUIRK_ENET_MAC
  +   mii_speed -= 1;
  +#endif
  +   writel(mii_speed  1, eth-mii_speed);
  +   debug(%s: sysclock %u, mii_speed %08x\n, __func__, sysclock,
  +   readl(eth-mii_speed));
   }
   
   static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr,
  

-- 
Philippe De Muyter +32 2 6101532 Macq SA rue de l'Aeronef 2 B-1140 Bruxelles
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Re: [U-Boot] [PATCH 6/9] fdt_support: add 'const' qualifier for unchanged argument.

2014-02-20 Thread Masahiro Yamada
Hi.


 [PATCH 6/9] fdt_support: add 'const' qualifier for unchanged argument.

This might be really trivial, but I notice I had added a period at the
end of the subject by mistake.

Is it possible to remove it when this patch is applied?
Or need to post v2?

Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH] kbuild,tegra124: add dummy obj- for Kbuild

2014-02-20 Thread Albert ARIBAUD
Hi Masahiro,

On Thu, 20 Feb 2014 17:23:31 +0900, Masahiro Yamada
yamad...@jp.panasonic.com wrote:

 Hello Albert, 
 
 
   --- a/arch/arm/cpu/armv7/tegra124/Makefile
   +++ b/arch/arm/cpu/armv7/tegra124/Makefile
   @@ -4,3 +4,6 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
   +
   +# necessary to create built-in.o
   +obj- := __dummy__.o
  
  Is there really no other way than to specify an unexisting __dummy__.o
  in order to build a useless built-in.o?
 
 I believe this is the simplest workaround we can do now.
 
 But I promise I'll refactor makefiles and delete
 arch/arm/cpu/armv7/{tegra114,tegra30}/Makefile  lator.
 
 For now, let me go with this solution..
 We still have a mountain of refactoring to do.

Thanks -- as long as this is a known topic, I'm fine with it.

 Best Regards
 Masahiro Yamada

Amicalement,
-- 
Albert.
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Re: [U-Boot] [U-Boot, v3, 2/3] dts: move device tree sources to arch/$(ARCH)/dts/

2014-02-20 Thread Masahiro Yamada
Hello Tom, Simon

  Unlike Linux Kernel, U-Boot historically had *.dts files under
  board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/.
  
  I think arch/$(ARCH)/dts dicretory is a better location
  to store both *.dts and *.dtsi files.
  
  For example, before this commit, board/xilinx/dts directory
  had both Microblaze dts (microblaze-generic.dts) and
  ARM dts (zynq-*.dts), which are totally unrelated.
  
  This commit moves *.dts to arch/$(ARCH)/dts/ directories,
  allowing us to describe nicely mutiple DTBs generation in the next commit.
  
  Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 
 Applied to u-boot/master, thanks!
 
 -- 
 Tom


This series was applied sooner than I had expected.
Simon and I were still discussing this series.

So I am afraid Simon is really not happy about it
because he was opposed to moving *.dts files
from vendor directories to arch directories.

Tom also mentioned as follows:
 This, I think is backwards.  Xilinx has (and Freescale and others are or
 will be joining them) a lot of things shared between them as IP blocks
 get reused from non-ARM to ARM CPUs.  So there's a level of DT sharing
 for these blocks between the CPUs.

I'd like to know Tom's option about the device tree structure.
Let me confirm if my patch is doing right thing.


Best Regards
Masahiro Yamada

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[U-Boot] [PATCH] dfu: mmc: fs: Fix format accepted by ext4write command

2014-02-20 Thread Lukasz Majewski
The commit:

EXT4: Fix number base handling of ext4write command
 SHA1: f7740f7712b8638f08b83a7e5d00bc1d6bb086a9

Cleaned up the ext4write command format.

This commit shall be regarded as a follow up, since the DFU subsystem is
using those commands for its normal operation.

Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
 drivers/dfu/dfu_mmc.c |7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 988ec5c..dd0fca1 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -124,16 +124,12 @@ static int mmc_file_op(enum dfu_op op, struct dfu_entity 
*dfu,
op == DFU_OP_READ ? load : write,
dfu-data.mmc.dev, dfu-data.mmc.part,
(unsigned int) buf, dfu-name);
-   if (op == DFU_OP_WRITE)
-   sprintf(cmd_buf + strlen(cmd_buf),  %lx, *len);
break;
case DFU_FS_EXT4:
sprintf(cmd_buf, ext4%s mmc %d:%d 0x%x /%s,
op == DFU_OP_READ ? load : write,
dfu-data.mmc.dev, dfu-data.mmc.part,
(unsigned int) buf, dfu-name);
-   if (op == DFU_OP_WRITE)
-   sprintf(cmd_buf + strlen(cmd_buf),  %ld, *len);
break;
default:
printf(%s: Layout (%s) not (yet) supported!\n, __func__,
@@ -141,6 +137,9 @@ static int mmc_file_op(enum dfu_op op, struct dfu_entity 
*dfu,
return -1;
}
 
+   if (op == DFU_OP_WRITE)
+   sprintf(cmd_buf + strlen(cmd_buf),  %lx, *len);
+
debug(%s: %s 0x%p\n, __func__, cmd_buf, cmd_buf);
 
ret = run_command(cmd_buf, 0);
-- 
1.7.10.4

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Re: [U-Boot] [U-Boot, v3, 1/3] dts: re-write dts/Makefile more simply with Kbuild

2014-02-20 Thread Masahiro Yamada
Hello Tom, Simon,

On Wed, 19 Feb 2014 16:11:11 -0500
Tom Rini tr...@ti.com wrote:

 On Wed, Feb 05, 2014 at 11:28:25AM +0900, Masahiro Yamada wrote:
 
  Useful rules in scripts/Makefile.lib allows us to easily
  generate a device tree blob and wrap it in assembly code.
  
  We do not need to parse a linker script to get output format and arch.
  
  This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb.
  
  Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 
 Applied to u-boot/master, thanks!
 
 -- 
 Tom


Ditto.
Possibly it was missed because Simon and I were discussing
in version 2 thread.


  
   Besides,  dts/dt.dtb is a prerequisite of dts/dt.dtb.S
   when CONFIG_OF_EMBED is enabled.
  
   I believe keeping dts/dt.dtb is reasonable enough.
  
   Better to keep both?
  
  Yes I think so.
 
 
 OK.
 I will revive ./u-boot.dtb and post a new version.
 
 And I will send it as a single patch
 dropping 2/3 and 3/3.
 Do you think it's better?
 
 Many kbuild-related patches are being stuck on patchwork
 and my local branch is getting messed up.
 I don't want to delay this patch any more.


I was planning to post a new version.
But before that, version 3 was applied.

So, what should I do?
Shall I post a follow-up patch to revive a
device tree at the top directory (./u-boot.dtb) ?



Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH] ENGR00299356 ARM:imx6 Fix USDHC driver bug in PIO mode

2014-02-20 Thread Ye Li
Thanks, I will change the commit log accordingly.

Best regards,
Ye Li
-Original Message-
From: Stefano Babic [mailto:sba...@denx.de] 
Sent: Wednesday, February 19, 2014 9:41 PM
To: Li Ye-B37916; sba...@denx.de; Estevam Fabio-R49496
Cc: u-boot@lists.denx.de; Albert ARIBAUD
Subject: Re: [PATCH] ENGR00299356 ARM:imx6 Fix USDHC driver bug in PIO mode

Hi Ye.Li,

On 19/02/2014 11:33, Ye.Li wrote:
 When configure the USDHC driver to PIO mode by defining 
 CONFIG_SYS_FSL_ESDHC_USE_PIO, the SD/MMC read and write will fail.
 
 Two bugs in the driver to cause the issue:
 1. The read buffer was invalidated after reading from DATAPORT 
 register, which should be only applied to DMA mode. The valid data in 
 cache was overwritten by physical memory.
 2. The watermarks are not set in PIO mode, will cause according state 
 not be set.
 
 Signed-off-by: Ye.Li b37...@freescale.com
 ---

Why is this an  ARM/i.MX6 issue only ? As far as I read, this is not strictly 
related to the SOC. Currently, there is no ARM boards setting 
CONFIG_SYS_FSL_ESDHC_USE_PIO. The only boards using it are PowerPC boards (the 
driver is platform independent): P1_P2_RDB and MPC8308RDB.

Regards,
Stefano Babic

--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de 
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Re: [U-Boot] [PATCH v3 4/6] PPC: 85xx: Generalize DDR TLB mapping function

2014-02-20 Thread Alexander Graf

On 19.02.2014, at 00:21, Scott Wood scottw...@freescale.com wrote:

 On Tue, 2014-02-11 at 01:10 +0100, Alexander Graf wrote:
 -if (memsize)
 -print_size(memsize,  left unmapped\n);
 +if (size)
 +print_size(size,  left unmapped\n);
 +}
 
 The print_size should move to the caller, with some way to pass back the
 amout left unmapped.  Non-RAM callers would treat a non-zero unmapped
 value as an error.
 
 +unsigned int
 +setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
 +{
 +unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
 +u64 memsize = (u64)memsize_in_meg  20;
 +
 +memsize = min(memsize, CONFIG_MAX_MEM_MAPPED);
 +tlb_map_range(ram_tlb_address, p_addr, memsize, true);
  return memsize_in_meg;
 }
 
 Here you seem to be hiding the message for RAM.

It could still fail if we're running out of TLB entries, no?

 York, are you OK with just removing the message altogether, and having
 tlb_map_range return a normal error code if it can't map everything
 (with DDR size reduced in advance as above)?

How about we just change the return value of tlb_map_range to uint64_t and 
return size? That way we can 1:1 move the print code out of the function into 
the RAM map code and IO callers can just call assert(r != 0).

 
 diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
 index cadaeef..5493c51 100644
 --- a/arch/powerpc/include/asm/mmu.h
 +++ b/arch/powerpc/include/asm/mmu.h
 @@ -509,6 +509,9 @@ extern void print_tlbcam(void);
 extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg);
 extern void clear_ddr_tlbs(unsigned int memsize_in_meg);
 
 +extern void tlb_map_range(ulong v_addr, phys_addr_t p_addr, uint64_t size,
 +  bool is_ram);
 
 bool arguments tend to be hard to read at call sites -- flags (or enum)
 with something like MAP_RAM/MAP_IO would be nicer (I'm not insisting,
 though).

Good point.


Alex

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[U-Boot] [PATCH v2] esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver

2014-02-20 Thread Ye . Li
From: Ye.Li b37...@freescale.com

When configure the fsl_esdhc driver to PIO mode by defining
CONFIG_SYS_FSL_ESDHC_USE_PIO, the SD/MMC read and write will fail.

Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.

Signed-off-by: Ye.Li b37...@freescale.com
---
Changes for V2:
-Address the comments from Stefano Babic and Albert ARIBAUD to modify the 
subject

 drivers/mmc/fsl_esdhc.c |   23 +--
 1 file changed, 9 insertions(+), 14 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7b146a3..5bd0df3 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -174,7 +174,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct 
mmc_data *data)
int timeout;
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg-esdhc_base;
-#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
+
uint wml_value;
 
wml_value = data-blocksize/4;
@@ -184,12 +184,15 @@ static int esdhc_setup_data(struct mmc *mmc, struct 
mmc_data *data)
wml_value = WML_RD_WML_MAX_VAL;
 
esdhc_clrsetbits32(regs-wml, WML_RD_WML_MASK, wml_value);
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
esdhc_write32(regs-dsaddr, (u32)data-dest);
+#endif
} else {
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
flush_dcache_range((ulong)data-src,
   (ulong)data-src+data-blocks
 *data-blocksize);
-
+#endif
if (wml_value  WML_WR_WML_MAX)
wml_value = WML_WR_WML_MAX_VAL;
if ((esdhc_read32(regs-prsstat)  PRSSTAT_WPSPL) == 0) {
@@ -199,19 +202,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct 
mmc_data *data)
 
esdhc_clrsetbits32(regs-wml, WML_WR_WML_MASK,
wml_value  16);
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
esdhc_write32(regs-dsaddr, (u32)data-src);
+#endif
}
-#else  /* CONFIG_SYS_FSL_ESDHC_USE_PIO */
-   if (!(data-flags  MMC_DATA_READ)) {
-   if ((esdhc_read32(regs-prsstat)  PRSSTAT_WPSPL) == 0) {
-   printf(\nThe SD card is locked. 
-   Can not write to a locked card.\n\n);
-   return TIMEOUT;
-   }
-   esdhc_write32(regs-dsaddr, (u32)data-src);
-   } else
-   esdhc_write32(regs-dsaddr, (u32)data-dest);
-#endif /* CONFIG_SYS_FSL_ESDHC_USE_PIO */
 
esdhc_write32(regs-blkattr, data-blocks  16 | data-blocksize);
 
@@ -393,9 +387,10 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, 
struct mmc_data *data)
if (irqstat  DATA_ERR)
return COMM_ERR;
} while ((irqstat  DATA_COMPLETE) != DATA_COMPLETE);
-#endif
+
if (data-flags  MMC_DATA_READ)
check_and_invalidate_dcache_range(cmd, data);
+#endif
}
 
esdhc_write32(regs-irqstat, -1);
-- 
1.7.9.5


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Re: [U-Boot] [PATCH] socfpga: Add a signing tool that automatically signs the preloader.

2014-02-20 Thread Wolfgang Denk
Dear Charles,

In message 201402201358.19495.mannin...@actrix.gen.nz you wrote:
 
 I looked at doing a mkimage integration, but is this really the way to go in 
 all cases?

...only where it fits, of course.

 The signed image does not really apply a header as such. It mashes in 
 a header at position 0x40 and then appends a checksum at the end, then pads 
 the file out to 64k.
 
 The final file is:
 * 64 bytes of executable (interrupt vector table)
 * header
 * more code
 *crc32
 *padding with 0x00 to 64k.

Sounds exactly as if you were making an image, so yes, mkimage fits.


Best regards,

Wolfgang Denk

--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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superstition.  - Isaac Asimov
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[U-Boot] [PATCH] board/t104xRDB:remove CONFIG_SYS_FLASH_USE_BUFFER_WRITE for NOR

2014-02-20 Thread Prabhakar Kushwaha
Micron NOR flash present on T1040RDB and T1042RDB_PI do not support
write  read command running at same time.

CONFIG_SYS_FLASH_USE_BUFFER_WRITE reads NOR flash before performing write.
So, remove CONFIG_SYS_FLASH_USE_BUFFER_WRITE

Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
 include/configs/T1040RDB.h|1 -
 include/configs/T1042RDB_PI.h |1 -
 2 files changed, 2 deletions(-)

diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h
index fd010c0..0f79896 100644
--- a/include/configs/T1040RDB.h
+++ b/include/configs/T1040RDB.h
@@ -72,7 +72,6 @@
 #else
 #define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 #endif
 
 #ifndef CONFIG_SYS_NO_FLASH
diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h
index 6d07805..76cbdea 100644
--- a/include/configs/T1042RDB_PI.h
+++ b/include/configs/T1042RDB_PI.h
@@ -72,7 +72,6 @@
 #else
 #define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 #endif
 
 #ifndef CONFIG_SYS_NO_FLASH
-- 
1.7.9.5



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Re: [U-Boot] [RFC PATCH 1/3] add file with a default boot environment based heavily on Stephen Warrens recent tegra work.

2014-02-20 Thread Otavio Salvador
Hello Tom,

On Wed, Feb 19, 2014 at 4:41 PM, Tom Rini tr...@ti.com wrote:
 On Wed, Feb 19, 2014 at 12:29:19PM -0700, Stephen Warren wrote:
 On 02/19/2014 12:24 PM, Dan Murphy wrote:
 ...
  Do we have a directory where default scripts exist for each board?  Or at 
  least samples for each board?
 
  I could not find them.  If they don't exist then we should probably put 
  them in the board dirs and cp them to the respective out directory
 
  Maybe this would be something that helps defined the known good config 
  that the community can base their changes on.

 For Tegra, I have created:

 https://github.com/NVIDIA/tegra-uboot-scripts

 I imagine those scripts would work on most boards that use the U-Boot
 config in this patch series. I've certainly used almost identical
 scripts on the Raspberry Pi.

 I should perhaps put an example extlinux.conf into that repo too.

 I imagine (well, it's pretty much the whole point) that distro
 installers (e.g. Anaconda) will soon (or already do) support spitting
 out extlinux.conf that'll work on ARM U-Boot too.

 Hey Otavio, is OpenEmbedded doing this yet?  I know there's
 syslinux.conf support in since ages ago...

As Denys said it is not yet supported but should be easily doable. :-)

-- 
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http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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Re: [U-Boot] [PATCH v3 6/6] PPC 85xx: Add qemu-ppce500 machine

2014-02-20 Thread Alexander Graf

On 19.02.2014, at 01:03, Scott Wood scottw...@freescale.com wrote:

 On Tue, 2014-02-11 at 01:10 +0100, Alexander Graf wrote:
 diff --git a/arch/powerpc/cpu/mpc85xx/start.S 
 b/arch/powerpc/cpu/mpc85xx/start.S
 index bb0025c..8982c78 100644
 --- a/arch/powerpc/cpu/mpc85xx/start.S
 +++ b/arch/powerpc/cpu/mpc85xx/start.S
 @@ -80,6 +80,11 @@ _start_e500:
  li  r1,MSR_DE
  mtmsr   r1
 
 +#ifdef CONFIG_QEMU_E500
 +/* Save our ePAPR device tree pointer before we clobber it */
 +mr  r24, r3
 +#endif
 
 FWIW, it should be harmless to do this unconditionally (though in that
 case I'd insert (if we have one) in the comment.

Sure.

 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A004510
  mfspr   r3,SPRN_SVR
  rlwinm  r3,r3,0,0xff
 @@ -514,6 +519,7 @@ nexti:   mflrr1  /* R1 = our PC */
  * As a general rule, TLB0 is used for short-term TLBs, and TLB1 is used for
  * long-term TLBs, so we use TLB0 here.
  */
 +#if !defined(CONFIG_DYNAMIC_CCSRBAR)
 #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS)
 
 This shouldn't be necessary, if you have
 CONFIG_SYS_CCSR_DO_NOT_RELOCATE.

You're right :).

 
 diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
 index 2011fb8..0e0b483 100644
 --- a/arch/powerpc/cpu/mpc85xx/tlb.c
 +++ b/arch/powerpc/cpu/mpc85xx/tlb.c
 @@ -36,6 +36,10 @@ void init_tlbs(void)
tlb_table[i].mas7);
  }
 
 +#ifdef CONFIG_SYS_USE_DYNAMIC_TLBS
 +init_tlbs_dynamic();
 +#endif
 
 You could avoid the ifdef by moving a stub implementation into the
 header -- or possibly better, avoid the config symbol entirely by using
 a weak symbol.
 
 Better still, make init_tlbs() weak.  Then you don't need a config
 symbol, a new function name, or a dummy tlb_table[] -- you just redefine
 init_tlbs() in board code.

Nice idea. That radically simplifies the code.

 
 diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c 
 b/board/freescale/qemu-ppce500/qemu-ppce500.c
 new file mode 100644
 index 000..fc546b9
 --- /dev/null
 +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c
 @@ -0,0 +1,334 @@
 +/*
 + * Copyright 2007,2009-2014 Freescale Semiconductor, Inc.
 + *
 + * SPDX-License-Identifier: GPL-2.0+
 + */
 +
 +#include common.h
 +#include command.h
 +#include pci.h
 +#include asm/processor.h
 +#include asm/mmu.h
 +#include asm/fsl_pci.h
 +#include asm/io.h
 +#include libfdt.h
 +#include fdt_support.h
 +#include netdev.h
 +#include fdtdec.h
 +#include errno.h
 +#include malloc.h
 +
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +static void *get_fdt(void)
 +{
 +return (void *)gd-fdt_blob;
 +}
 
 Does this return virtual or physical?

I've split this into a get_fdt_virt() and get_fdt_phys() function to make this 
more explicit.

 
 +
 +uint64_t get_phys_ccsrbar_addr_early(void)
 +{
 +u32 mas0, mas1, mas2, mas3, mas7;
 +ulong fdt = (ulong)get_fdt();
 +uint64_t r;
 +
 +/*
 + * To be able to read the FDT we need to create a temporary TLB
 + * map for it.
 + */
 +
 +mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(10);
 +mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_1M);
 +mas2 = FSL_BOOKE_MAS2(fdt, 0);
 +mas3 = FSL_BOOKE_MAS3(fdt, 0, MAS3_SW|MAS3_SR);
 +mas7 = FSL_BOOKE_MAS7(fdt);
 
 Don't use the physical address as a virtual address.  Use a known-good
 virtual address.  Using unknown physical addresses as virtual addresses
 is generally a bad idea (it's different for stuff whose physical address
 is hardcoded in U-Boot), but it's particularly bad here because you'll
 create an overlapping TLB entry if the fdt happens to live within your
 initial memory mapping.

Ok.

 
 OK, I see you use CONFIG_SYS_TMPVIRT for this elsewhere, but I guess
 forgot to use it here (why is fdt mapping code duplicated?).

I've folded the AS=1 mapping functions into a single function and used 
tlb_map_range for the AS=0 one.

 
 +void pci_init_board(void)
 +{
 +struct pci_controller *pci_hoses;
 +void *fdt = get_fdt();
 +int pci_node;
 +int pci_num = 0;
 +int pci_count = 0;
 +const char *compat = fsl,mpc8540-pci;
 +ulong map_addr;
 
 May want to look for arbitrary PCI host controllers (device_type would
 be simplest), in case the QEMU machine ever gets an upgrade to PCIe.

Ok.

 
 +
 +puts(\n);
 +
 +/* Start MMIO and PIO range maps above RAM */
 +map_addr = CONFIG_MAX_MEM_MAPPED;
 
 It'd be better to hardcode virtual addresses for this (as other boards
 do), and limit the size you map to the smaller of the hardcoded size or
 the device tree size.

I don't understand this comment. CONFIG_MAX_MEM_MAPPED is basically the first 
address available to IO maps, so with this it is properly hardcoded and ensured 
to always map IO to the same physical address regardless of memory passed in.

 
 +/* Count and allocate PCI buses */
 +pci_node = fdt_node_offset_by_compatible(fdt, -1, compat);
 +while (pci_node != -FDT_ERR_NOTFOUND) {
 +pci_node = 

[U-Boot] [PATCH v4 6/6] PPC 85xx: Add qemu-ppce500 machine

2014-02-20 Thread Alexander Graf
For KVM we have a special PV machine type called ppce500. This machine
is inspired by the MPC8544DS board, but implements a lot less features
than that one.

It also provides more PCI slots and is supposed to be enumerated by
device tree only.

This patch adds support for the generic ppce500 machine and tries to
rely solely on device tree for device enumeration.

Signed-off-by: Alexander Graf ag...@suse.de

---

v1 - v2:

  - Write device tree offset directly into global variable
  - use r4 rather than r2 for that
  - access fdt directly from in-memory copy
  - remove unneeded header includes
  - clean up pci enumeration
  - coding style fixes
  - populate and only use fdt_addr_r
  - remove unused exported functions
  - remove unused TLB0 entries
  - make TLB1 I/O maps non-executable
  - remove unused defines in board header
  - make -kernel boot variables more clear
  - remove TLB0 invalidation
  - use tlb1.14 for temporary as=1 map
  - use CONFIG_SYS_MPC85XX_NO_RESETVEC
  - store fdt pointer in gd through cpu_init_early_f()
  - replace fixup_tlb1() with dynamic TLB creation hook

v2 - v3:

  - merge dt patches into this one
  - Document and rename CONFIG_SYS_USE_DYNAMIC_TLBS
  - remove CONFIG_DDR_SPD
  - Reduce PCI message to only base address
  - Map AS=1 fdt behind CCSRBAR
  - Use CONFIG_SYS_CCSR_DO_NOT_RELOCATE
  - remove unnecessary ccsr map
  - s/cell size/cell count/
  - add temporary map define
  - use fdt_get_base_address() to find region
  - use new APIs
  - remove myfdt helpers

v3 - v4:

  - use new tlb map syntax
  - check that tlb map mapped everything
  - always save/restore r3 for cpu_init_early_f
  - remove CONFIG_DYNAMIC_CCSRBAR
  - make init_tlbs weak and remove all init_tlbs_dynamic() cruft
  - always map fdt to fixed virtual address
  - fold together AS=1 fdt map functions
  - use tlb_map_range for CCSR map
  - search for PCI based on device type rather than compatible
  - remove unnecessary cast
  - call get_linear_ram_size directly
  - override get_tbclk with timebase-frequency fetching code
---
 arch/powerpc/cpu/mpc85xx/Makefile   |2 +
 arch/powerpc/cpu/mpc85xx/cpu.c  |4 +-
 arch/powerpc/cpu/mpc85xx/cpu_init_early.c   |8 +-
 arch/powerpc/cpu/mpc85xx/start.S|   11 +
 arch/powerpc/cpu/mpc85xx/tlb.c  |1 +
 arch/powerpc/include/asm/config_mpc85xx.h   |4 +
 board/freescale/qemu-ppce500/Makefile   |9 +
 board/freescale/qemu-ppce500/qemu-ppce500.c |  345 +++
 boards.cfg  |1 +
 include/configs/qemu-ppce500.h  |  203 
 10 files changed, 586 insertions(+), 2 deletions(-)
 create mode 100644 board/freescale/qemu-ppce500/Makefile
 create mode 100644 board/freescale/qemu-ppce500/qemu-ppce500.c
 create mode 100644 include/configs/qemu-ppce500.h

diff --git a/arch/powerpc/cpu/mpc85xx/Makefile 
b/arch/powerpc/cpu/mpc85xx/Makefile
index ef7637a..4094785 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -102,7 +102,9 @@ obj-y   += cpu.o
 obj-y  += cpu_init.o
 obj-y  += cpu_init_early.o
 obj-y  += interrupts.o
+ifneq ($(CONFIG_QEMU_E500),y)
 obj-y  += speed.o
+endif
 obj-y  += tlb.o
 obj-y  += traps.o
 
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 3e99b07..51f2085 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -272,6 +272,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 #ifndef CONFIG_SYS_FSL_TBCLK_DIV
 #define CONFIG_SYS_FSL_TBCLK_DIV 8
 #endif
+__attribute__((weak))
 unsigned long get_tbclk (void)
 {
unsigned long tbclk_div = CONFIG_SYS_FSL_TBCLK_DIV;
@@ -338,7 +339,8 @@ void mpc85xx_reginfo(void)
!defined(CONFIG_SYS_INIT_L2_ADDR)
 phys_size_t initdram(int board_type)
 {
-#if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD)
+#if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD) || \
+   defined(CONFIG_QEMU_E500)
return fsl_ddr_sdram_size();
 #else
return (phys_size_t)CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 993b8b8..998781b 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -79,7 +79,7 @@ void setup_ifc(void)
 #endif
 
 /* We run cpu_init_early_f in AS = 1 */
-void cpu_init_early_f(void)
+void cpu_init_early_f(void *fdt)
 {
u32 mas0, mas1, mas2, mas3, mas7;
int i;
@@ -102,6 +102,12 @@ void cpu_init_early_f(void)
for (i = 0; i  sizeof(gd_t); i++)
((char *)gd)[i] = 0;
 
+   /*
+* CONFIG_SYS_CCSRBAR_PHYS below may use gd-fdt_blob on ePAPR systems,
+* so we need to populate it before it accesses it.
+*/
+   gd-fdt_blob = fdt;
+
mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(13);
mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | 

[U-Boot] [PATCH v4 3/6] PPC: 85xx: Remove IVOR reset

2014-02-20 Thread Alexander Graf
There is no need to set IVORs to anything but their default values,
so let's leave them where they are.

Suggested-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/cpu/mpc85xx/cpu_init.c  |4 --
 arch/powerpc/cpu/mpc85xx/fixed_ivor.S|   63 --
 arch/powerpc/cpu/mpc85xx/release.S   |3 --
 arch/powerpc/cpu/mpc85xx/start.S |6 ---
 nand_spl/board/freescale/mpc8536ds/Makefile  |4 --
 nand_spl/board/freescale/mpc8569mds/Makefile |4 --
 nand_spl/board/freescale/mpc8572ds/Makefile  |4 --
 nand_spl/board/freescale/p1023rds/Makefile   |4 --
 nand_spl/board/freescale/p1_p2_rdb/Makefile  |4 --
 9 files changed, 96 deletions(-)
 delete mode 100644 arch/powerpc/cpu/mpc85xx/fixed_ivor.S

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index b31efb7..a49f8dd 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -705,8 +705,6 @@ skip_l2:
return 0;
 }
 
-extern void setup_ivors(void);
-
 void arch_preboot_os(void)
 {
u32 msr;
@@ -719,8 +717,6 @@ void arch_preboot_os(void)
msr = mfmsr();
msr = ~(MSR_ME|MSR_CE);
mtmsr(msr);
-
-   setup_ivors();
 }
 
 #if defined(CONFIG_CMD_SATA)  defined(CONFIG_FSL_SATA)
diff --git a/arch/powerpc/cpu/mpc85xx/fixed_ivor.S 
b/arch/powerpc/cpu/mpc85xx/fixed_ivor.S
deleted file mode 100644
index ebbb8c0..000
--- a/arch/powerpc/cpu/mpc85xx/fixed_ivor.S
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright 2009 Freescale Semiconductor, Inc.
- *
- * Kumar Gala kumar.g...@freescale.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-/* This file is intended to be included by other asm code since
- * we will want to execute this on both the primary core when
- * it does a bootm and the secondary core's that get released
- * out of the spin table */
-
-#define SET_IVOR(vector_number, vector_offset) \
-   li  r3,vector_offset@l; \
-   mtspr   SPRN_IVOR##vector_number,r3;
-
-#define SET_GIVOR(vector_number, vector_offset)\
-   li  r3,vector_offset@l; \
-   mtspr   SPRN_GIVOR##vector_number,r3;
-
-   SET_IVOR(0, 0x020) /* Critical Input */
-   SET_IVOR(1, 0x000) /* Machine Check */
-   SET_IVOR(2, 0x060) /* Data Storage */
-   SET_IVOR(3, 0x080) /* Instruction Storage */
-   SET_IVOR(4, 0x0a0) /* External Input */
-   SET_IVOR(5, 0x0c0) /* Alignment */
-   SET_IVOR(6, 0x0e0) /* Program */
-   SET_IVOR(7, 0x100) /* FP Unavailable */
-   SET_IVOR(8, 0x120) /* System Call */
-   SET_IVOR(9, 0x140) /* Auxiliary Processor Unavailable */
-   SET_IVOR(10, 0x160) /* Decrementer */
-   SET_IVOR(11, 0x180) /* Fixed Interval Timer */
-   SET_IVOR(12, 0x1a0) /* Watchdog Timer */
-   SET_IVOR(13, 0x1c0) /* Data TLB Error */
-   SET_IVOR(14, 0x1e0) /* Instruction TLB Error */
-   SET_IVOR(15, 0x040) /* Debug */
-
-/* e500v1  e500v2 only */
-#ifndef CONFIG_E500MC
-   SET_IVOR(32, 0x200) /* SPE Unavailable */
-   SET_IVOR(33, 0x220) /* Embedded FP Data */
-   SET_IVOR(34, 0x240) /* Embedded FP Round */
-#endif
-
-   SET_IVOR(35, 0x260) /* Performance monitor */
-
-/* e500mc only */
-#ifdef CONFIG_E500MC
-   SET_IVOR(36, 0x280) /* Processor doorbell */
-   SET_IVOR(37, 0x2a0) /* Processor doorbell critical */
-   SET_IVOR(38, 0x2c0) /* Guest Processor doorbell */
-   SET_IVOR(39, 0x2e0) /* Guest Processor critical  machine check */
-   SET_IVOR(40, 0x300) /* Hypervisor system call */
-   SET_IVOR(41, 0x320) /* Hypervisor Priviledge */
-
-   SET_GIVOR(2, 0x060) /* Guest Data Storage */
-   SET_GIVOR(3, 0x080) /* Guest Instruction Storage */
-   SET_GIVOR(4, 0x0a0) /* Guest External Input */
-   SET_GIVOR(8, 0x120) /* Guest System Call */
-   SET_GIVOR(13, 0x1c0) /* Guest Data TLB Error */
-   SET_GIVOR(14, 0x1e0) /* Guest Instruction TLB Error */
-#endif
diff --git a/arch/powerpc/cpu/mpc85xx/release.S 
b/arch/powerpc/cpu/mpc85xx/release.S
index c15e83b..a37c7af 100644
--- a/arch/powerpc/cpu/mpc85xx/release.S
+++ b/arch/powerpc/cpu/mpc85xx/release.S
@@ -407,9 +407,6 @@ __second_half_boot_page:
bne 3b
isync
 
-   /* setup IVORs to match fixed offsets */
-#include fixed_ivor.S
-
/* get the upper bits of the addr */
lwz r11,ENTRY_ADDR_UPPER(r10)
 
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index db84d10..bb0025c 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1967,10 +1967,4 @@ flush_dcache:
isync
 
blr
-
-.globl setup_ivors
-setup_ivors:
-
-#include fixed_ivor.S
-   blr
 #endif /* !MINIMAL_SPL */
diff --git a/nand_spl/board/freescale/mpc8536ds/Makefile 
b/nand_spl/board/freescale/mpc8536ds/Makefile
index 6233081..becf644 100644
--- 

[U-Boot] [PATCH v4 0/6] PPC 85xx: Add support for QEMU's ppce500 PV machine

2014-02-20 Thread Alexander Graf
In QEMU we implement a PV machine type called ppce500. That board is able
to run any e500+ FSL cores (e500v2, e500mc, e5500, e6500).

It is heavily inspired by the MPC8544DS SoC and board combination, but
implements only the bare minimum to make Linux happy enough to drive a
virtual machine.

This patch set implements support for this PV machine type in U-Boot, enabling
users to run their virtual machines with netboot, u-boot payload binaries or
other fun things they come up with.

---

v1 - v2:

  - Write device tree offset directly into global variable
  - use r4 rather than r2 for that
  - access fdt directly from in-memory copy
  - remove unneeded header includes
  - clean up pci enumeration
  - coding style fixes
  - populate and only use fdt_addr_r
  - remove unused exported functions
  - remove unused TLB0 entries
  - make TLB1 I/O maps non-executable
  - remove unused defines in board header
  - make -kernel boot variables more clear
  - remove TLB0 invalidation
  - use tlb1.14 for temporary as=1 map
  - use CONFIG_SYS_MPC85XX_NO_RESETVEC
  - store fdt pointer in gd through cpu_init_early_f()
  - replace fixup_tlb1() with dynamic TLB creation hook
  - find CCSRBAR from device tree
  - find PCI controllers from device tree
  - find CPU speed from device tree

v2 - v3:

  - new patch: fdt_support: split fdt_getprop_u32_default
  - new patch: fdt_support: Add helper function to read ranges property
  - new patch: PPC: 85xx: Remove IVOR reset
  - removed patch: PPC 85xx: Detect e500v2 / e500mc during runtime
  - merge dt patches into machine patch
  - Document and rename CONFIG_SYS_USE_DYNAMIC_TLBS
  - remove CONFIG_DDR_SPD
  - Reduce PCI message to only base address
  - Map AS=1 fdt behind CCSRBAR
  - Use CONFIG_SYS_CCSR_DO_NOT_RELOCATE
  - remove unnecessary ccsr map
  - s/cell size/cell count/
  - add temporary map define
  - use fdt_get_base_address() to find region
  - use new APIs
  - remove myfdt helpers

v3 - v4:

  - tlb_map_range: return unmapped size
  - tlb_map_range: take ram/io parameter as enum rather than bool
  - use new tlb map syntax
  - check that tlb map mapped everything
  - always save/restore r3 for cpu_init_early_f
  - remove CONFIG_DYNAMIC_CCSRBAR
  - make init_tlbs weak and remove all init_tlbs_dynamic() cruft
  - always map fdt to fixed virtual address
  - fold together AS=1 fdt map functions
  - use tlb_map_range for CCSR map
  - search for PCI based on device type rather than compatible
  - remove unnecessary cast
  - call get_linear_ram_size directly
  - override get_tbclk with timebase-frequency fetching code

Alexander Graf (6):
  fdt_support: split fdt_getprop_u32_default
  fdt_support: Add helper function to read ranges property
  PPC: 85xx: Remove IVOR reset
  PPC: 85xx: Generalize DDR TLB mapping function
  PPC 85xx: Add ELF entry point
  PPC 85xx: Add qemu-ppce500 machine

 arch/powerpc/cpu/mpc85xx/Makefile|2 +
 arch/powerpc/cpu/mpc85xx/cpu.c   |4 +-
 arch/powerpc/cpu/mpc85xx/cpu_init.c  |4 -
 arch/powerpc/cpu/mpc85xx/cpu_init_early.c|8 +-
 arch/powerpc/cpu/mpc85xx/fixed_ivor.S|   63 -
 arch/powerpc/cpu/mpc85xx/release.S   |3 -
 arch/powerpc/cpu/mpc85xx/start.S |   17 +-
 arch/powerpc/cpu/mpc85xx/tlb.c   |   48 ++--
 arch/powerpc/cpu/mpc85xx/u-boot.lds  |1 +
 arch/powerpc/include/asm/config_mpc85xx.h|4 +
 arch/powerpc/include/asm/mmu.h   |8 +
 board/freescale/qemu-ppce500/Makefile|9 +
 board/freescale/qemu-ppce500/qemu-ppce500.c  |  345 ++
 boards.cfg   |1 +
 common/fdt_support.c |  132 +-
 include/configs/qemu-ppce500.h   |  203 +++
 include/fdt_support.h|4 +
 nand_spl/board/freescale/mpc8536ds/Makefile  |4 -
 nand_spl/board/freescale/mpc8569mds/Makefile |4 -
 nand_spl/board/freescale/mpc8572ds/Makefile  |4 -
 nand_spl/board/freescale/p1023rds/Makefile   |4 -
 nand_spl/board/freescale/p1_p2_rdb/Makefile  |4 -
 22 files changed, 757 insertions(+), 119 deletions(-)
 delete mode 100644 arch/powerpc/cpu/mpc85xx/fixed_ivor.S
 create mode 100644 board/freescale/qemu-ppce500/Makefile
 create mode 100644 board/freescale/qemu-ppce500/qemu-ppce500.c
 create mode 100644 include/configs/qemu-ppce500.h

-- 
1.7.10.4

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[U-Boot] [PATCH v4 2/6] fdt_support: Add helper function to read ranges property

2014-02-20 Thread Alexander Graf
This patch adds a helper function that can be used to interpret most
ranges properties in the device tree.

It reads the n'th range out of a ranges array and returns the node's
virtual address of the range, the physical address that range starts at
and the size of the range.

Signed-off-by: Alexander Graf ag...@suse.de
---
 common/fdt_support.c  |   94 +
 include/fdt_support.h |2 ++
 2 files changed, 96 insertions(+)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 65c68f9..17fa852 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -1435,3 +1435,97 @@ u64 fdt_get_base_address(void *fdt, int node)
 
return prop ? fdt_translate_address(fdt, node, prop + naddr) : 0;
 }
+
+/*
+ * Read a property of size prop_len. Currently only supports 1 or 2 cells.
+ */
+static int fdt_read_prop(const fdt32_t *prop, int prop_len, int cell_off,
+uint64_t *val, int cells)
+{
+   const fdt32_t *prop32 = prop[cell_off];
+   const fdt64_t *prop64 = (const fdt64_t *)prop[cell_off];
+
+   if ((cell_off + cells)  prop_len)
+   return -FDT_ERR_NOSPACE;
+
+   switch (cells) {
+   case 1:
+   *val = fdt32_to_cpu(*prop32);
+   break;
+   case 2:
+   *val = fdt64_to_cpu(*prop64);
+   break;
+   default:
+   return -FDT_ERR_NOSPACE;
+   }
+
+   return 0;
+}
+
+/**
+ * fdt_read_range - Read a node's n'th range property
+ *
+ * @fdt: ptr to device tree
+ * @node: offset of node
+ * @n: range index
+ * @child_addr: pointer to storage for the child address field
+ * @addr: pointer to storage for the CPU view translated physical start
+ * @len: pointer to storage for the range length
+ *
+ * Convenience function that reads and interprets a specific range out of
+ * a number of the ranges property array.
+ */
+int fdt_read_range(void *fdt, int node, int n, uint64_t *child_addr,
+  uint64_t *addr, uint64_t *len)
+{
+   int pnode = fdt_parent_offset(fdt, node);
+   const fdt32_t *ranges;
+   int pacells;
+   int acells;
+   int scells;
+   int ranges_len;
+   int cell = 0;
+   int r = 0;
+
+   /*
+* The ranges property is an array of
+* { child address parent address size in child address space }
+*
+* All 3 elements can span a diffent number of cells. Fetch their size.
+*/
+   pacells = fdt_getprop_u32_default_node(fdt, pnode, 0, #address-cells, 
1);
+   acells = fdt_getprop_u32_default_node(fdt, node, 0, #address-cells, 
1);
+   scells = fdt_getprop_u32_default_node(fdt, node, 0, #size-cells, 1);
+
+   /* Now try to get the ranges property */
+   ranges = fdt_getprop(fdt, node, ranges, ranges_len);
+   if (!ranges)
+   return -FDT_ERR_NOTFOUND;
+   ranges_len /= sizeof(uint32_t);
+
+   /* Jump to the n'th entry */
+   cell = n * (pacells + acells + scells);
+
+   /* Read child address */
+   if (child_addr) {
+   r = fdt_read_prop(ranges, ranges_len, cell, child_addr,
+ acells);
+   if (r)
+   return r;
+   }
+   cell += acells;
+
+   /* Read parent address */
+   if (addr)
+   *addr = fdt_translate_address(fdt, node, ranges + cell);
+   cell += pacells;
+
+   /* Read size in child address space */
+   if (len) {
+   r = fdt_read_prop(ranges, ranges_len, cell, len, scells);
+   if (r)
+   return r;
+   }
+
+   return 0;
+}
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 3e1be57..b28fae6 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -87,6 +87,8 @@ int fdt_add_edid(void *blob, const char *compat, unsigned 
char *buf);
 int fdt_verify_alias_address(void *fdt, int anode, const char *alias,
  u64 addr);
 u64 fdt_get_base_address(void *fdt, int node);
+int fdt_read_range(void *fdt, int node, int n, uint64_t *child_addr,
+  uint64_t *addr, uint64_t *len);
 
 enum fdt_status {
FDT_STATUS_OKAY,
-- 
1.7.10.4

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[U-Boot] [PATCH v4 5/6] PPC 85xx: Add ELF entry point

2014-02-20 Thread Alexander Graf
We want to be able to directly execute the ELF binary without going
through the u-boot.bin one.

To know where we have to start executing this ELF binary  we have to
tell the linker where our entry point is.

Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/cpu/mpc85xx/u-boot.lds |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds 
b/arch/powerpc/cpu/mpc85xx/u-boot.lds
index 2af4c80..b34d212 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds
@@ -13,6 +13,7 @@
 #endif
 
 OUTPUT_ARCH(powerpc)
+ENTRY(_start_e500)
 
 PHDRS
 {
-- 
1.7.10.4

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[U-Boot] [PATCH v4 4/6] PPC: 85xx: Generalize DDR TLB mapping function

2014-02-20 Thread Alexander Graf
The DDR mapping function really is just a generic virtual - physical
mapping function. Generalize it so it can support any virtual starting
offset and IO maps just the same.

Signed-off-by: Alexander Graf ag...@suse.de

---

v3 - v4:

  - change tlb_map to return unmapped size and get ram/io as enum rather
than bool
---
 arch/powerpc/cpu/mpc85xx/tlb.c |   47 +++-
 arch/powerpc/include/asm/mmu.h |8 +++
 2 files changed, 40 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 8748ecd..fed8df9 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -236,20 +236,26 @@ void init_addr_map(void)
 }
 #endif
 
-unsigned int
-setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
+uint64_t tlb_map_range(ulong v_addr, phys_addr_t p_addr, uint64_t size,
+  enum tlb_map_type map_type)
 {
int i;
unsigned int tlb_size;
-   unsigned int wimge = MAS2_M;
-   unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
+   unsigned int wimge;
+   unsigned int perm;
unsigned int max_cam, tsize_mask;
-   u64 size, memsize = (u64)memsize_in_meg  20;
 
+   if (map_type == TLB_MAP_RAM) {
+   perm = MAS3_SX|MAS3_SW|MAS3_SR;
+   wimge = MAS2_M;
 #ifdef CONFIG_SYS_PPC_DDR_WIMGE
-   wimge = CONFIG_SYS_PPC_DDR_WIMGE;
+   wimge = CONFIG_SYS_PPC_DDR_WIMGE;
 #endif
-   size = min(memsize, CONFIG_MAX_MEM_MAPPED);
+   } else {
+   perm = MAS3_SW|MAS3_SR;
+   wimge = MAS2_I|MAS2_G;
+   }
+
if ((mfspr(SPRN_MMUCFG)  MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
/* Convert (4^max) kB to (2^max) bytes */
max_cam = ((mfspr(SPRN_TLB1CFG)  16)  0xf) * 2 + 10;
@@ -261,11 +267,11 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int 
memsize_in_meg)
}
 
for (i = 0; size  i  8; i++) {
-   int ram_tlb_index = find_free_tlbcam();
+   int tlb_index = find_free_tlbcam();
u32 camsize = __ilog2_u64(size)  tsize_mask;
-   u32 align = __ilog2(ram_tlb_address)  tsize_mask;
+   u32 align = __ilog2(v_addr)  tsize_mask;
 
-   if (ram_tlb_index == -1)
+   if (tlb_index == -1)
break;
 
if (align == -2) align = max_cam;
@@ -277,18 +283,29 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int 
memsize_in_meg)
 
tlb_size = camsize - 10;
 
-   set_tlb(1, ram_tlb_address, p_addr,
-   MAS3_SX|MAS3_SW|MAS3_SR, wimge,
-   0, ram_tlb_index, tlb_size, 1);
+   set_tlb(1, v_addr, p_addr, perm, wimge,
+   0, tlb_index, tlb_size, 1);
 
size -= 1ULL  camsize;
-   memsize -= 1ULL  camsize;
-   ram_tlb_address += 1UL  camsize;
+   v_addr += 1UL  camsize;
p_addr += 1UL  camsize;
}
 
+   return size;
+}
+
+unsigned int setup_ddr_tlbs_phys(phys_addr_t p_addr,
+unsigned int memsize_in_meg)
+{
+   unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
+   u64 memsize = (u64)memsize_in_meg  20;
+
+   memsize = min(memsize, CONFIG_MAX_MEM_MAPPED);
+   memsize = tlb_map_range(ram_tlb_address, p_addr, memsize, TLB_MAP_RAM);
+
if (memsize)
print_size(memsize,  left unmapped\n);
+
return memsize_in_meg;
 }
 
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index cadaeef..5aa916f 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -509,6 +509,14 @@ extern void print_tlbcam(void);
 extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg);
 extern void clear_ddr_tlbs(unsigned int memsize_in_meg);
 
+enum tlb_map_type {
+   TLB_MAP_RAM,
+   TLB_MAP_IO,
+};
+
+extern uint64_t tlb_map_range(ulong v_addr, phys_addr_t p_addr, uint64_t size,
+ enum tlb_map_type map_type);
+
 extern void write_tlb(u32 _mas0, u32 _mas1, u32 _mas2, u32 _mas3, u32 _mas7);
 
 #define SET_TLB_ENTRY(_tlb, _epn, _rpn, _perms, _wimge, _ts, _esel, _sz, 
_iprot) \
-- 
1.7.10.4

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[U-Boot] [PATCH v4 1/6] fdt_support: split fdt_getprop_u32_default

2014-02-20 Thread Alexander Graf
We already have a nice helper to give us a property cell value with default
fall back from a path. Split that into two helpers - one for the old path
based lookup and one to give us a value based on a node offset.

Signed-off-by: Alexander Graf ag...@suse.de
---
 common/fdt_support.c  |   38 --
 include/fdt_support.h |2 ++
 2 files changed, 34 insertions(+), 6 deletions(-)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index b9dce99..65c68f9 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -50,6 +50,37 @@ static void write_cell(u8 *addr, u64 val, int size)
 }
 
 /**
+ * fdt_getprop_u32_default_node - Return a node's property or a default
+ *
+ * @fdt: ptr to device tree
+ * @off: offset of node
+ * @cell: cell offset in property
+ * @prop: property name
+ * @dflt: default value if the property isn't found
+ *
+ * Convenience function to return a node's property or a default value if
+ * the property doesn't exist.
+ */
+u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,
+   const char *prop, const u32 dflt)
+{
+   const fdt32_t *val;
+   int len;
+
+   val = fdt_getprop(fdt, off, prop, len);
+
+   /* Check if property exists */
+   if (!val)
+   return dflt;
+
+   /* Check if property is long enough */
+   if (len  ((cell + 1) * sizeof(uint32_t)))
+   return dflt;
+
+   return fdt32_to_cpu(*val);
+}
+
+/**
  * fdt_getprop_u32_default - Find a node and return it's property or a default
  *
  * @fdt: ptr to device tree
@@ -63,18 +94,13 @@ static void write_cell(u8 *addr, u64 val, int size)
 u32 fdt_getprop_u32_default(const void *fdt, const char *path,
const char *prop, const u32 dflt)
 {
-   const fdt32_t *val;
int off;
 
off = fdt_path_offset(fdt, path);
if (off  0)
return dflt;
 
-   val = fdt_getprop(fdt, off, prop, NULL);
-   if (val)
-   return fdt32_to_cpu(*val);
-   else
-   return dflt;
+   return fdt_getprop_u32_default_node(fdt, off, 0, prop, dflt);
 }
 
 /**
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 9871e2f..3e1be57 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -12,6 +12,8 @@
 
 #include libfdt.h
 
+u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,
+   const char *prop, const u32 dflt);
 u32 fdt_getprop_u32_default(const void *fdt, const char *path,
const char *prop, const u32 dflt);
 int fdt_chosen(void *fdt, int force);
-- 
1.7.10.4

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Re: [U-Boot] [ANN] U-Boot v2014.04-rc1 released

2014-02-20 Thread Albert ARIBAUD
Hi Tom,

On Wed, 19 Feb 2014 16:11:39 -0500, Tom Rini tr...@ti.com wrote:

 Hey all,
 
 I've pushed v2014.04-rc1 out to the repository and tarballs should exist
 soon.
 
 The merge window is now, really, closed. 

Does this mean that any patch submitted before feb 19 should be
considered for 2014.04?

Amicalement,
-- 
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Re: [U-Boot] [ANN] U-Boot v2014.04-rc1 released

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 02:03:23PM +0100, Albert ARIBAUD wrote:
 Hi Tom,
 
 On Wed, 19 Feb 2014 16:11:39 -0500, Tom Rini tr...@ti.com wrote:
 
  Hey all,
  
  I've pushed v2014.04-rc1 out to the repository and tarballs should exist
  soon.
  
  The merge window is now, really, closed. 
 
 Does this mean that any patch submitted before feb 19 should be
 considered for 2014.04?

Well, I've always applied the close enough rule for the merge window.
I was 2 weeks (bah..) late closing it officially, but wouldn't have
until I got the kbuild stuff in anyhow.  And bug fixes / clarifications
are always valid, so one way or another we'll get something done about
the alignment thing (I got half my experiment done yesterday, need to
see about wrapping that up).

-- 
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Re: [U-Boot] [i2c] Pull request

2014-02-20 Thread Heiko Schocher

Hello Tom,

please pull from u-boot-i2c.git, thanks!

The following changes since commit 0a8e823ad0c5a602c93c2e8a54caf622ade6d3fb:

  Prepare v2014.04-rc1 (2014-02-19 16:01:28 -0500)

are available in the git repository at:

  git://git.denx.de/u-boot-i2c.git master

for you to fetch changes up to 39abd65c342a271d39fa580dc4c5cb7fce516ef3:

  arc: remove hardware.h (2014-02-20 06:49:19 +0100)


Alexey Brodkin (3):
  spear: move CONFIG_SYS_I2C_BASE from arch-spear/hardware to board configs
  designware_i2c: remove inclusion of asm/arch/hardware.h
  arc: remove hardware.h

Chin Liang See (1):
  designware_i2c: Enhance DesignWare I2C driver address support

Hannes Petermaier (1):
  OMAP24xx I2C: Add support for set-speed

Heiko Schocher (1):
  i2c, bootcount: add support for bootcounter on i2c devices

Marek Vasut (1):
  i2c: i2c-mxs: Wait for I2C to empty queue

Michael Burr (2):
  i2c: zynq: Support for 0-length register address
  i2c: zynq: Add support for the second i2c controller

Scott Jiang (1):
  blackfin: make i2c driver blackfin independant

Sonic Zhang (3):
  blackfin: the sclk MHz in i2c driver should be divided by 1000 other than 
1024
  blackfin: add spi and i2c specific get clock functions
  blackfin: rename bfin-twi_i2c driver to adi_i2c

 README  |  20 +
 arch/arc/include/asm/arch-arc700/hardware.h |  10 -
 arch/arm/include/asm/arch-spear/hardware.h  |   4 --
 arch/blackfin/include/asm/blackfin_local.h  |   7 ---
 arch/blackfin/include/asm/clock.h   |  11 +
 arch/blackfin/include/asm/twi.h |  15 +++
 drivers/bootcount/Makefile  |   1 +
 drivers/bootcount/bootcount_i2c.c   |  44 +++
 drivers/i2c/adi_i2c.c   | 387 
++
 drivers/i2c/bfin-twi_i2c.c  |   3 +-
 drivers/i2c/designware_i2c.c|  42 --
 drivers/i2c/mxs_i2c.c   |  39 ++---
 drivers/i2c/omap24xx_i2c.c  | 147 
+--
 drivers/i2c/zynq_i2c.c  |  82 
---
 drivers/spi/bfin_spi.c  |   7 +--
 drivers/spi/bfin_spi6xx.c   |   7 +--
 include/configs/spear-common.h  |   9 
 include/configs/x600.h  |   1 +
 include/configs/zynq-common.h   |   6 +--
 include/i2c.h   |   1 +
 20 files changed, 688 insertions(+), 155 deletions(-)
 delete mode 100644 arch/arc/include/asm/arch-arc700/hardware.h
 create mode 100644 arch/blackfin/include/asm/twi.h
 create mode 100644 drivers/bootcount/bootcount_i2c.c
 create mode 100644 drivers/i2c/adi_i2c.c

bye,
Heiko
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH] kbuild,tegra124: add dummy obj- for Kbuild

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 05:22:27PM +0900, Masahiro Yamada wrote:
 Hello Tom,
 (ccing Simon and Stephan)
 
 
 
   Tom,
   Please apply this along with the Kbuild series.
  
  So with this, I then get:
  Configuring for venice2 board...
  make[2]: *** [arch/arm/dts/tegra124-venice2.dtb] Error 1
  make[1]: *** [dts/dt.dtb] Error 2
  make: *** [sub-make] Error 2
 textdata bss dec hex filename
   260562   15030  309960  585552   8ef50 venice2/u-boot
18527 421  72   190204a4c venice2/spl/u-boot-spl
  
  Device Tree Source is not correctly specified.
  Please define 'CONFIG_DEFAULT_DEVICE_TREE'
  or build with 'DEVICE_TREE=device_tree' argument
  
  make[2]: *** [arch/arm/dts/tegra124-venice2.dtb] Error 1
  make[1]: *** [dts/dt.dtb] Error 2
  make: *** [sub-make] Error 2
  
  - SUMMARY 
  Boards compiled: 1
  Boards with errors: 1 ( venice2 )
  --
  
  What's going on as the config file sets CONFIG_DEFAULT_DEVICE_TREE
  
 
 
 
 Commit 5ab502cb89 has been applied and the build system
 now expects device tree sources should reside under arch/$(ARCH)/dts/.
 
 But the device tree of venice2 board is still remaining
 in board/nvidia/dts/.
 This is the cause of the build error.
 (Commit 5ab502cb89 had been posted before venice2 board
 support was merged. So there happened an unvisible conflict.)
 
 Actually I did not expect dts  series was applied so soon
 because Simon and I was still discussing that series.
 And I guess Simon is not happy about Commit 5ab502cb89.
 
 Anyway, we need to do something with venice2's build error
 immediately.
 
 I think we have two options.
 
 [1] Move also venice2 device tree to arch/arm/dts directory.
 I have posted a patch:
 http://patchwork.ozlabs.org/patch/322082/
 
 [2] revert the following commits in this order
 3284c8b8ca (dts: generate multiple device tree blobs)
 5ab502cb89 (dts: move device tree sources to arch/$(ARCH)/dts/)
 
 
 If we like to gather all device trees to arch/$(ARCH)/dts,
 the choice will be [1].
 
 On the other hand, if we like to put *.dtsi to arch/$(ARCH)/dts
 whilst *.dts to board/$(VENDOR)/dts, the choice will be [2].

Well, I think our long term plan here is (a) mirror the kernel today and
since their long term plan is move device trees out of tree, then deal
with it there once they've got a plan there, we can follow (and indeed
should be contributing to the conversation).

-- 
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Re: [U-Boot] [PATCH v8 0/38] Switch over to real Kbuild

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 05:25:27PM +0900, Masahiro Yamada wrote:

 Hello Tom,
 
   Anyway, evaluating cc-option multiple times isn't nice and its
   optimization is on my TODO list.
  
  Can we move this up on the TODO list please?  Some quick testing
  around here says that this is the big culprit on build times.  I get
  pre-Kbuild series build time to match post-Kbuild series by building
  with CONFIG_CC_OPT_CACHE_DISABLE=y.
 
 Sure.
 I will deal with this task as the first priority.

Thanks!  This is something we can push up to the kernel community too
and I hope they'll (a) agree with and (b) be happy about.

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Re: [U-Boot] [PATCH 6/9] fdt_support: add 'const' qualifier for unchanged argument.

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 05:55:47PM +0900, Masahiro Yamada wrote:
 Hi.
 
 
  [PATCH 6/9] fdt_support: add 'const' qualifier for unchanged argument.
 
 This might be really trivial, but I notice I had added a period at the
 end of the subject by mistake.
 
 Is it possible to remove it when this patch is applied?
 Or need to post v2?

I'll do my best to remember to fix it up.

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Re: [U-Boot] [U-Boot, v3, 1/3] dts: re-write dts/Makefile more simply with Kbuild

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 06:30:44PM +0900, Masahiro Yamada wrote:
 Hello Tom, Simon,
 
 On Wed, 19 Feb 2014 16:11:11 -0500
 Tom Rini tr...@ti.com wrote:
 
  On Wed, Feb 05, 2014 at 11:28:25AM +0900, Masahiro Yamada wrote:
  
   Useful rules in scripts/Makefile.lib allows us to easily
   generate a device tree blob and wrap it in assembly code.
   
   We do not need to parse a linker script to get output format and arch.
   
   This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb.
   
   Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
  
  Applied to u-boot/master, thanks!
  
  -- 
  Tom
 
 
 Ditto.
 Possibly it was missed because Simon and I were discussing
 in version 2 thread.
 
 
   
Besides,  dts/dt.dtb is a prerequisite of dts/dt.dtb.S
when CONFIG_OF_EMBED is enabled.
   
I believe keeping dts/dt.dtb is reasonable enough.
   
Better to keep both?
   
   Yes I think so.
  
  
  OK.
  I will revive ./u-boot.dtb and post a new version.
  
  And I will send it as a single patch
  dropping 2/3 and 3/3.
  Do you think it's better?
  
  Many kbuild-related patches are being stuck on patchwork
  and my local branch is getting messed up.
  I don't want to delay this patch any more.
 
 
 I was planning to post a new version.
 But before that, version 3 was applied.
 
 So, what should I do?
 Shall I post a follow-up patch to revive a
 device tree at the top directory (./u-boot.dtb) ?

heh, so this is what happens when I try and get ahead of the curve :)
Just do a follow up to bring things into line with what you and Simon
had agreed on.

-- 
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Re: [U-Boot] [PATCH] socfpga: Add a signing tool that automatically signs the preloader.

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 12:23:22PM +0100, Wolfgang Denk wrote:
 Dear Charles,
 
 In message 201402201358.19495.mannin...@actrix.gen.nz you wrote:
  
  I looked at doing a mkimage integration, but is this really the way to go 
  in 
  all cases?
 
 ...only where it fits, of course.
 
  The signed image does not really apply a header as such. It mashes in 
  a header at position 0x40 and then appends a checksum at the end, then 
  pads 
  the file out to 64k.
  
  The final file is:
  * 64 bytes of executable (interrupt vector table)
  * header
  * more code
  *crc32
  *padding with 0x00 to 64k.
 
 Sounds exactly as if you were making an image, so yes, mkimage fits.

Right.  This is like the omapimage case or similar where we take input,
beat it around and add stuff, then have what the HW wants, but not a
file we can further query with mkimage, and that's fine.

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Re: [U-Boot] [U-Boot, v3, 2/3] dts: move device tree sources to arch/$(ARCH)/dts/

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 06:22:20PM +0900, Masahiro Yamada wrote:
 Hello Tom, Simon
 
   Unlike Linux Kernel, U-Boot historically had *.dts files under
   board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/.
   
   I think arch/$(ARCH)/dts dicretory is a better location
   to store both *.dts and *.dtsi files.
   
   For example, before this commit, board/xilinx/dts directory
   had both Microblaze dts (microblaze-generic.dts) and
   ARM dts (zynq-*.dts), which are totally unrelated.
   
   This commit moves *.dts to arch/$(ARCH)/dts/ directories,
   allowing us to describe nicely mutiple DTBs generation in the next commit.
   
   Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
  
  Applied to u-boot/master, thanks!
  
  -- 
  Tom
 
 
 This series was applied sooner than I had expected.
 Simon and I were still discussing this series.
 
 So I am afraid Simon is really not happy about it
 because he was opposed to moving *.dts files
 from vendor directories to arch directories.
 
 Tom also mentioned as follows:
  This, I think is backwards.  Xilinx has (and Freescale and others are or
  will be joining them) a lot of things shared between them as IP blocks
  get reused from non-ARM to ARM CPUs.  So there's a level of DT sharing
  for these blocks between the CPUs.
 
 I'd like to know Tom's option about the device tree structure.
 Let me confirm if my patch is doing right thing.

So, for clarity, yes, I this this is the right way to go and we should
focus our we can do better efforts on the discussion that is / will be
happening with the kernel folks about how things should be handled once
all these blobs move out of the kernel as that'll be something we want
to leverage too.

-- 
Tom


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Re: [U-Boot] [RFC PATCH 1/3] add file with a default boot environment based heavily on Stephen Warrens recent tegra work.

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 09:31:36AM -0300, Otavio Salvador wrote:
 Hello Tom,
 
 On Wed, Feb 19, 2014 at 4:41 PM, Tom Rini tr...@ti.com wrote:
  On Wed, Feb 19, 2014 at 12:29:19PM -0700, Stephen Warren wrote:
  On 02/19/2014 12:24 PM, Dan Murphy wrote:
  ...
   Do we have a directory where default scripts exist for each board?  Or 
   at least samples for each board?
  
   I could not find them.  If they don't exist then we should probably put 
   them in the board dirs and cp them to the respective out directory
  
   Maybe this would be something that helps defined the known good config 
   that the community can base their changes on.
 
  For Tegra, I have created:
 
  https://github.com/NVIDIA/tegra-uboot-scripts
 
  I imagine those scripts would work on most boards that use the U-Boot
  config in this patch series. I've certainly used almost identical
  scripts on the Raspberry Pi.
 
  I should perhaps put an example extlinux.conf into that repo too.
 
  I imagine (well, it's pretty much the whole point) that distro
  installers (e.g. Anaconda) will soon (or already do) support spitting
  out extlinux.conf that'll work on ARM U-Boot too.
 
  Hey Otavio, is OpenEmbedded doing this yet?  I know there's
  syslinux.conf support in since ages ago...
 
 As Denys said it is not yet supported but should be easily doable. :-)

Well, can I suggest / beg that we get started? :)  I'd love to see OE be
ready when this is out in the next release.

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[U-Boot] Pull request (with merge conflict resolution): u-boot-arm/master

2014-02-20 Thread Albert ARIBAUD
Hello Tom,

The following changes since commit
0a8e823ad0c5a602c93c2e8a54caf622ade6d3fb:

  Prepare v2014.04-rc1 (2014-02-19 16:01:28 -0500)

are available in the git repository at:

  git://git.denx.de/u-boot-arm master

for you to fetch changes up to 3e11350255d9c5d4bd03c2a65769da84c05d3294:

  Merge branch 'u-boot/master' into 'u-boot-arm/master' (2014-02-20
  13:16:05 +0100)



There was a merge conflict between u-boot/master and u-boot-arm/master
initialy; I resolved and documented it on u-boot-arm/master, commit
3e113502. A 'git show' gives:

commit 3e11350255d9c5d4bd03c2a65769da84c05d3294
Merge: e7538fe 0a8e823
Author: Albert ARIBAUD albert.u.b...@aribaud.net
Date:   Thu Feb 20 13:16:05 2014 +0100

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
Makefile
drivers/net/npe/Makefile

These two conflicts arise from commit 0b2d3f20
(ARM: NET: Remove the IXP NPE ethernet driver) and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile.

diff --cc Makefile
index 0e07aa5,d9b2b7f..9a530b3
--- a/Makefile
+++ b/Makefile
@@@ -217,36 -589,35 +589,34 @@@ head-y := $(CPUDIR)/start.
  head-$(CONFIG_4xx) += arch/powerpc/cpu/ppc4xx/resetvec.o
  head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o
  
- OBJS := $(addprefix $(obj),$(head-y))
- 
- HAVE_VENDOR_COMMON_LIB = $(if $(wildcard
board/$(VENDOR)/common/Makefile),y,n)
+ HAVE_VENDOR_COMMON_LIB = $(if $(wildcard
$(srctree)/board/$(VENDOR)/common/Makefile),y,n) 
- LIBS-y += lib/
- LIBS-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
- LIBS-y += $(CPUDIR)/
+ libs-y += lib/
+ libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
+ libs-y += $(CPUDIR)/
  ifdef SOC
- LIBS-y += $(CPUDIR)/$(SOC)/
- endif
- LIBS-$(CONFIG_OF_EMBED) += dts/
- LIBS-y += arch/$(ARCH)/lib/
- LIBS-y += fs/
- LIBS-y += net/
- LIBS-y += disk/
- LIBS-y += drivers/
- LIBS-y += drivers/dma/
- LIBS-y += drivers/gpio/
- LIBS-y += drivers/i2c/
- LIBS-y += drivers/input/
- LIBS-y += drivers/mmc/
- LIBS-y += drivers/mtd/
- LIBS-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
- LIBS-y += drivers/mtd/onenand/
- LIBS-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
- LIBS-y += drivers/mtd/spi/
- LIBS-y += drivers/net/
- LIBS-y += drivers/net/phy/
- LIBS-y += drivers/pci/
- LIBS-y += drivers/power/ \
+ libs-y += $(CPUDIR)/$(SOC)/
+ endif
 -libs-$(CONFIG_IXP4XX_NPE) += drivers/net/npe/
+ libs-$(CONFIG_OF_EMBED) += dts/
+ libs-y += arch/$(ARCH)/lib/
+ libs-y += fs/
+ libs-y += net/
+ libs-y += disk/
+ libs-y += drivers/
+ libs-y += drivers/dma/
+ libs-y += drivers/gpio/
+ libs-y += drivers/i2c/
+ libs-y += drivers/input/
+ libs-y += drivers/mmc/
+ libs-y += drivers/mtd/
+ libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
+ libs-y += drivers/mtd/onenand/
+ libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
+ libs-y += drivers/mtd/spi/
+ libs-y += drivers/net/
+ libs-y += drivers/net/phy/
+ libs-y += drivers/pci/
+ libs-y += drivers/power/ \
drivers/power/fuel_gauge/ \
drivers/power/mfd/ \
drivers/power/pmic/ \

 Albert ARIBAUD (4):
  Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'
  Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'
  Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
  Merge branch 'u-boot/master' into 'u-boot-arm/master'

Andy Ng (1):
  imx6 SION bit has to be on for the pins that are used as
ENET_REF_CLK

Anson Huang (2):
  imx6: ensure AHB clock is 132MHz in low freq boot mode
  imx6: make sure MMDC_CHx_MASK is clear to avoid warm reset failure

Eric Nelson (1):
  i.MX6: nitrogen6x: pedantic: BOOT_FROM==spi, not sd

Fabio Estevam (8):
  nitrogen6x: README: Only calling 'make' is enough
  nitrogen6x: README: Do not refer to MAINTAINERS file
  mx6sl: Adjust fdt_addr to avoid address overlapping
  hummingboard: Return from cpu_eth_init() directly
  imx: Introduce a header for the imx cpu versions
  mx6: Distinguish mx6dual from mx6quad
  mx6qsabreauto: Update imximage.cfg
  mx6: Enable L2 cache support

Marek Vasut (17):
  ARM: armv7: Make indirect vector addresses globl
  ARM: mx6: Add PCI express clock configuration
  ARM: mx6: Add PCI express driver
  ARM: mx6: Enable PCIe on Sabrelite
  ARM: m53evk: Rename mxc-nand to mxc_nand
  ARM: m53evk: Enable CONFIG_REGEX
  ARM: IXP: Remove actux1 board
  ARM: IXP: Remove actux2 board
  ARM: IXP: Remove actux3 board
  ARM: IXP: Remove actux4 board
  ARM: IXP: Remove dvl_host board
  ARM: IXP: Remove the IXP architecture support
  ARM: USB: Remove the IXP EHCI driver
  ARM: PCI: Remove the IXP PCI driver
  ARM: NET: Remove the IXP NPE ethernet driver
  ARM: serial: Remove the IXP UART driver
  pci: mx6: Implement reset callback

Markus Niebel (2):
  ARM: imx6: fix wrong fec clk
  NET: 

Re: [U-Boot] [ANN] U-Boot v2014.04-rc1 released

2014-02-20 Thread Wolfgang Denk
Dear Tom,

In message 20140219211139.GU19081@bill-the-cat you wrote:
 
 I've pushed v2014.04-rc1 out to the repository and tarballs should exist
 soon.

Tarball is on the FTP server.


Best regards,

Wolfgang Denk

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Re: [U-Boot] [ANN] U-Boot v2014.04-rc1 released

2014-02-20 Thread Albert ARIBAUD
Hi Tom,

On Thu, 20 Feb 2014 08:09:56 -0500, Tom Rini tr...@ti.com wrote:

 On Thu, Feb 20, 2014 at 02:03:23PM +0100, Albert ARIBAUD wrote:
  Hi Tom,
  
  On Wed, 19 Feb 2014 16:11:39 -0500, Tom Rini tr...@ti.com wrote:
  
   Hey all,
   
   I've pushed v2014.04-rc1 out to the repository and tarballs should exist
   soon.
   
   The merge window is now, really, closed. 
  
  Does this mean that any patch submitted before feb 19 should be
  considered for 2014.04?
 
 Well, I've always applied the close enough rule for the merge window.
 I was 2 weeks (bah..) late closing it officially, but wouldn't have
 until I got the kbuild stuff in anyhow.  And bug fixes / clarifications
 are always valid, so one way or another we'll get something done about
 the alignment thing (I got half my experiment done yesterday, need to
 see about wrapping that up).

Oh... I wasn't actually thinking about the alignment patch at all,
sorry if I made it seem so. No, I was thinking about where the close
enough line was falling in my /own/ todo list. O:-)

Amicalement,
-- 
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Re: [U-Boot] [ANN] U-Boot v2014.04-rc1 released

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 03:10:14PM +0100, Albert ARIBAUD wrote:
 Hi Tom,
 
 On Thu, 20 Feb 2014 08:09:56 -0500, Tom Rini tr...@ti.com wrote:
 
  On Thu, Feb 20, 2014 at 02:03:23PM +0100, Albert ARIBAUD wrote:
   Hi Tom,
   
   On Wed, 19 Feb 2014 16:11:39 -0500, Tom Rini tr...@ti.com wrote:
   
Hey all,

I've pushed v2014.04-rc1 out to the repository and tarballs should exist
soon.

The merge window is now, really, closed. 
   
   Does this mean that any patch submitted before feb 19 should be
   considered for 2014.04?
  
  Well, I've always applied the close enough rule for the merge window.
  I was 2 weeks (bah..) late closing it officially, but wouldn't have
  until I got the kbuild stuff in anyhow.  And bug fixes / clarifications
  are always valid, so one way or another we'll get something done about
  the alignment thing (I got half my experiment done yesterday, need to
  see about wrapping that up).
 
 Oh... I wasn't actually thinking about the alignment patch at all,
 sorry if I made it seem so. No, I was thinking about where the close
 enough line was falling in my /own/ todo list. O:-)

Well, I expect everyone to use best judgement. :)

-- 
Tom


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[U-Boot] [PATCH v2 1/3] ahci-plat: Provide a weak scsi_init hook

2014-02-20 Thread Ian Campbell
This allow the platform to register the platform ahci device.

Signed-off-by: Ian Campbell i...@hellion.org.uk
---
In theory this could perhaps be used by highbank. I have access to a
Midway system (close enough for testing purposes, I think) but since
Calxeda has folded I'm not sure it is worth it, and I am not entirely
keen on reflashing firmware on the system I have access too (no safety
net)...
---
 arch/arm/lib/board.c | 6 ++
 drivers/block/ahci.c | 5 +
 2 files changed, 11 insertions(+)

diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 34f50b0..fe381a3 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -33,6 +33,7 @@
 #include nand.h
 #include onenand_uboot.h
 #include mmc.h
+#include scsi.h
 #include libfdt.h
 #include fdtdec.h
 #include post.h
@@ -593,6 +594,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
mmc_initialize(gd-bd);
 #endif
 
+#ifdef CONFIG_CMD_SCSI
+   puts(SCSI:  );
+   scsi_init();
+#endif
+
 #ifdef CONFIG_HAS_DATAFLASH
AT91F_DataflashInit();
dataflash_print_info();
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 0daad36..d5370fa 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -924,6 +924,11 @@ int ahci_init(u32 base)
 err_out:
return rc;
 }
+
+void __weak scsi_init(void)
+{
+}
+
 #endif
 
 /*
-- 
1.8.5.3

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[U-Boot] [PATCH v2 3/3] ahci: provide sunxi SATA driver using AHCI platform framework

2014-02-20 Thread Ian Campbell
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.

The bulk of the code is taken from the Linux ahci sunxi platform driver
patches, adjusted for u-boot.

This adds the PORT_DMA tweaks to the core driver, under a suitable
ifdef.

This option is enabled for Cubieboard, Cubieboard2, Cubietruck and
Olinuxino Micro based on contents of Linux DTS files, including SATA
power pin config taken from the DTS. All build tested, but runtime
tested on cubietruck (FEL) only.

Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v2:

make AHCI configurable per board, enabled for cubieboard,
cubieboard2, cubietruck and Olinuxino Micro.
---
 arch/arm/cpu/armv7/sunxi/clock.c |  4 ++
 boards.cfg   | 18 
 drivers/block/Makefile   |  1 +
 drivers/block/ahci.c | 15 ++-
 drivers/block/ahci_sunxi.c   | 95 
 include/ahci.h   |  9 
 include/configs/sunxi-common.h   | 12 +
 7 files changed, 144 insertions(+), 10 deletions(-)
 create mode 100644 drivers/block/ahci_sunxi.c

diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
index 06bc283..2cc274b 100644
--- a/arch/arm/cpu/armv7/sunxi/clock.c
+++ b/arch/arm/cpu/armv7/sunxi/clock.c
@@ -51,6 +51,10 @@ static void clock_init_safe(void)
 #ifdef CONFIG_SUN7I
writel(0x1  6 | readl(ccm-ahb_gate0), ccm-ahb_gate0);
writel(0x1  31 | readl(ccm-pll6_cfg), ccm-pll6_cfg);
+#ifdef CONFIG_SCSI_AHCI_SUNXI
+   writel(0x1  25 |readl(ccm-ahb_gate0), ccm-ahb_gate0);
+   writel(0x1  14 | readl(ccm-pll6_cfg), ccm-pll6_cfg);
+#endif
 #endif
 }
 #endif
diff --git a/boards.cfg b/boards.cfg
index 100acc8..987bc54 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -354,8 +354,8 @@ Active  arm armv7  sunxi   -
   sunxi
 Active  arm armv7  sunxi   -   sunxi   
A13-OLinuXinoM   
sun5i:A13_OLINUXINOM,SPL,NO_AXP,STATUSLED=201,CONS_INDEX=2  
  -
 Active  arm armv7  sunxi   -   sunxi   
A13-OLinuXinoM_FEL   
sun5i:A13_OLINUXINOM,SPL_FEL,NO_AXP,STATUSLED=201,CONS_INDEX=2  
  -
 Active  arm armv7  sunxi   -   sunxi   
A13_MID  sun5i:A13_MID,SPL,CONS_INDEX=2 

   -
-Active  arm armv7  sunxi   -   sunxi   
A20-OLinuXino_MICRO  
sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL,SUNXI_EMAC 
  -
-Active  arm armv7  sunxi   -   sunxi   
A20-OLinuXino_MICRO_FEL  
sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL_FEL,SUNXI_EMAC 
  -
+Active  arm armv7  sunxi   -   sunxi   
A20-OLinuXino_MICRO  
sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8)
   -
+Active  arm armv7  sunxi   -   sunxi   
A20-OLinuXino_MICRO_FEL  
sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL_FEL,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8)
   -
 Active  arm armv7  sunxi   -   sunxi   
Auxtek-T003  
sun5i:AUXTEK_T003,SPL,AXP152_POWER,STATUSLED=34 
  -
 Active  arm armv7  sunxi   -   sunxi   
Auxtek-T004  
sun5i:AUXTEK_T004,SPL,AXP152_POWER,STATUSLED=34 
  -
 Active  arm armv7  sunxi   -   sunxi   
ba10_tv_box  sun4i:BA10_TV_BOX,SPL,SUNXI_EMAC   

   -
@@ -363,13 +363,13 @@ Active  arm armv7  sunxi   -  
 sunxi
 Active  arm armv7  sunxi   -   sunxi   
Coby_MID8042 sun4i:COBY_MID8042,SPL 

   -
 Active  arm armv7  sunxi   -   sunxi   
 

[U-Boot] [PATCH v2 0/3] uboot sata support for sunxi platform

2014-02-20 Thread Ian Campbell
This is the second version of my series to add support for AHCI to the
sunxi platform. This uses the existing ahci platform support already
present in u-boot. Most of the sunxi specific code comes from the Linux
platform patches.

As requested I am also cross posting to the main uboot mailing list
since the first two patches are generic and don't rely on sunxi stuff
and so could go into mainline now.

I've tested this only on cubietruck, but it is enabled for Olinino
Micro, cubieboard and cubieboard2 based on inspection of the Linux DTS
files.

Since last time I've made this a per-board option rather than enabling
for all sunxi platforms, some of which may not have a SATA connector, or
even an AHCI controller in the processor at all. 

Ian.

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[U-Boot] [PATCH v2 2/3] ahci: wait longer for link.

2014-02-20 Thread Ian Campbell
I have observed timeouts on a cubietruck.

The increase to 40ms is completely arbitrary and Works For Me(tm). I
couldn't find a good reference for how long you are supposed to wait,
although googling around it seems like tens of ms rather than single
digits is more common. I don't think there is any harm in waiting a bit
longer.

Signed-off-by: Ian Campbell i...@hellion.org.uk
---
 drivers/block/ahci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index d5370fa..90a0719 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -41,7 +41,7 @@ u16 *ataid[AHCI_MAX_PORTS];
 #define WAIT_MS_SPINUP 2
 #define WAIT_MS_DATAIO 5000
 #define WAIT_MS_FLUSH  5000
-#define WAIT_MS_LINKUP 4
+#define WAIT_MS_LINKUP 40
 
 static inline u32 ahci_port_base(u32 base, u32 port)
 {
-- 
1.8.5.3

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Re: [U-Boot] [PATCH v2 1/3] ahci-plat: Provide a weak scsi_init hook

2014-02-20 Thread Rob Herring
On Thu, Feb 20, 2014 at 8:48 AM, Ian Campbell i...@hellion.org.uk wrote:
 This allow the platform to register the platform ahci device.

 Signed-off-by: Ian Campbell i...@hellion.org.uk
 ---
 In theory this could perhaps be used by highbank. I have access to a
 Midway system (close enough for testing purposes, I think) but since
 Calxeda has folded I'm not sure it is worth it, and I am not entirely
 keen on reflashing firmware on the system I have access too (no safety
 net)...

You can actually chainload highbank/midway u-boot. Load u-boot.bin to
0x8000 and do go 0x8000.

You can't really brick a system by updating u-boot. There are a few
things not in mainline, but it is mainly the env which is separate.

Rob

 ---
  arch/arm/lib/board.c | 6 ++
  drivers/block/ahci.c | 5 +
  2 files changed, 11 insertions(+)

 diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
 index 34f50b0..fe381a3 100644
 --- a/arch/arm/lib/board.c
 +++ b/arch/arm/lib/board.c
 @@ -33,6 +33,7 @@
  #include nand.h
  #include onenand_uboot.h
  #include mmc.h
 +#include scsi.h
  #include libfdt.h
  #include fdtdec.h
  #include post.h
 @@ -593,6 +594,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
 mmc_initialize(gd-bd);
  #endif

 +#ifdef CONFIG_CMD_SCSI
 +   puts(SCSI:  );
 +   scsi_init();
 +#endif
 +
  #ifdef CONFIG_HAS_DATAFLASH
 AT91F_DataflashInit();
 dataflash_print_info();
 diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
 index 0daad36..d5370fa 100644
 --- a/drivers/block/ahci.c
 +++ b/drivers/block/ahci.c
 @@ -924,6 +924,11 @@ int ahci_init(u32 base)
  err_out:
 return rc;
  }
 +
 +void __weak scsi_init(void)
 +{
 +}
 +
  #endif

  /*
 --
 1.8.5.3

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[U-Boot] [PATCH] blackfin: Add asm/clock.h to numerous drivers

2014-02-20 Thread Tom Rini
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include asm/clock.h in more drivers to
avoid warnings.

Cc: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Tom Rini tr...@ti.com
---
 arch/blackfin/lib/board.c   |1 +
 board/cm-bf548/video.c  |1 +
 common/cmd_otp.c|1 +
 drivers/block/pata_bfin.c   |1 +
 drivers/mmc/bfin_sdh.c  |1 +
 drivers/net/bfin_mac.c  |1 +
 drivers/usb/musb/blackfin_usb.c |1 +
 7 files changed, 7 insertions(+)

diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index facbc7a..6234201 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -23,6 +23,7 @@
 
 #include asm/cplb.h
 #include asm/mach-common/bits/mpu.h
+#include asm/clock.h
 #include kgdb.h
 
 #ifdef CONFIG_CMD_NAND
diff --git a/board/cm-bf548/video.c b/board/cm-bf548/video.c
index a43413e..c35d285 100644
--- a/board/cm-bf548/video.c
+++ b/board/cm-bf548/video.c
@@ -11,6 +11,7 @@
 #include config.h
 #include malloc.h
 #include asm/blackfin.h
+#include asm/clock.h
 #include asm/gpio.h
 #include asm/portmux.h
 #include asm/mach-common/bits/dma.h
diff --git a/common/cmd_otp.c b/common/cmd_otp.c
index 6f93335..67808aa 100644
--- a/common/cmd_otp.c
+++ b/common/cmd_otp.c
@@ -18,6 +18,7 @@
 #include command.h
 
 #include asm/blackfin.h
+#include asm/clock.h
 #include asm/mach-common/bits/otp.h
 
 static const char *otp_strerror(uint32_t err)
diff --git a/drivers/block/pata_bfin.c b/drivers/block/pata_bfin.c
index 27ecaf4..b7fd1cd 100644
--- a/drivers/block/pata_bfin.c
+++ b/drivers/block/pata_bfin.c
@@ -12,6 +12,7 @@
 #include command.h
 #include config.h
 #include asm/byteorder.h
+#include asm/clock.h
 #include asm/io.h
 #include asm/errno.h
 #include asm/portmux.h
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 2631174..bd9b641 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -15,6 +15,7 @@
 #include asm/errno.h
 #include asm/byteorder.h
 #include asm/blackfin.h
+#include asm/clock.h
 #include asm/portmux.h
 #include asm/mach-common/bits/sdh.h
 #include asm/mach-common/bits/dma.h
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
index 42e208c..0c2d2ef 100644
--- a/drivers/net/bfin_mac.c
+++ b/drivers/net/bfin_mac.c
@@ -16,6 +16,7 @@
 #include linux/mii.h
 
 #include asm/blackfin.h
+#include asm/clock.h
 #include asm/portmux.h
 #include asm/mach-common/bits/dma.h
 #include asm/mach-common/bits/emac.h
diff --git a/drivers/usb/musb/blackfin_usb.c b/drivers/usb/musb/blackfin_usb.c
index 35268ba..65fff88 100644
--- a/drivers/usb/musb/blackfin_usb.c
+++ b/drivers/usb/musb/blackfin_usb.c
@@ -11,6 +11,7 @@
 #include usb.h
 
 #include asm/blackfin.h
+#include asm/clock.h
 #include asm/mach-common/bits/usb.h
 
 #include musb_core.h
-- 
1.7.9.5

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Re: [U-Boot] [PATCH v2 3/3] ahci: provide sunxi SATA driver using AHCI platform framework

2014-02-20 Thread Rob Herring
On Thu, Feb 20, 2014 at 8:48 AM, Ian Campbell i...@hellion.org.uk wrote:
 This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
 for sun7i only since I don't have access to any other sunxi platforms
 with sata included.

 The bulk of the code is taken from the Linux ahci sunxi platform driver
 patches, adjusted for u-boot.

 This adds the PORT_DMA tweaks to the core driver, under a suitable
 ifdef.

 This option is enabled for Cubieboard, Cubieboard2, Cubietruck and
 Olinuxino Micro based on contents of Linux DTS files, including SATA
 power pin config taken from the DTS. All build tested, but runtime
 tested on cubietruck (FEL) only.

 Signed-off-by: Ian Campbell i...@hellion.org.uk
 ---
 v2:

 make AHCI configurable per board, enabled for cubieboard,
 cubieboard2, cubietruck and Olinuxino Micro.
 ---
  arch/arm/cpu/armv7/sunxi/clock.c |  4 ++
  boards.cfg   | 18 
  drivers/block/Makefile   |  1 +
  drivers/block/ahci.c | 15 ++-
  drivers/block/ahci_sunxi.c   | 95 
 
  include/ahci.h   |  9 
  include/configs/sunxi-common.h   | 12 +
  7 files changed, 144 insertions(+), 10 deletions(-)
  create mode 100644 drivers/block/ahci_sunxi.c

 diff --git a/arch/arm/cpu/armv7/sunxi/clock.c 
 b/arch/arm/cpu/armv7/sunxi/clock.c
 index 06bc283..2cc274b 100644
 --- a/arch/arm/cpu/armv7/sunxi/clock.c
 +++ b/arch/arm/cpu/armv7/sunxi/clock.c
 @@ -51,6 +51,10 @@ static void clock_init_safe(void)
  #ifdef CONFIG_SUN7I
 writel(0x1  6 | readl(ccm-ahb_gate0), ccm-ahb_gate0);
 writel(0x1  31 | readl(ccm-pll6_cfg), ccm-pll6_cfg);
 +#ifdef CONFIG_SCSI_AHCI_SUNXI
 +   writel(0x1  25 |readl(ccm-ahb_gate0), ccm-ahb_gate0);
 +   writel(0x1  14 | readl(ccm-pll6_cfg), ccm-pll6_cfg);
 +#endif
  #endif
  }
  #endif
 diff --git a/boards.cfg b/boards.cfg
 index 100acc8..987bc54 100644
 --- a/boards.cfg
 +++ b/boards.cfg
 @@ -354,8 +354,8 @@ Active  arm armv7  sunxi   -  
  sunxi
  Active  arm armv7  sunxi   -   sunxi 
   A13-OLinuXinoM   
 sun5i:A13_OLINUXINOM,SPL,NO_AXP,STATUSLED=201,CONS_INDEX=2
 -
  Active  arm armv7  sunxi   -   sunxi 
   A13-OLinuXinoM_FEL   
 sun5i:A13_OLINUXINOM,SPL_FEL,NO_AXP,STATUSLED=201,CONS_INDEX=2
 -
  Active  arm armv7  sunxi   -   sunxi 
   A13_MID  sun5i:A13_MID,SPL,CONS_INDEX=2 
   
  -
 -Active  arm armv7  sunxi   -   sunxi 
   A20-OLinuXino_MICRO  
 sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL,SUNXI_EMAC   
 -
 -Active  arm armv7  sunxi   -   sunxi 
   A20-OLinuXino_MICRO_FEL  
 sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL_FEL,SUNXI_EMAC   
 -
 +Active  arm armv7  sunxi   -   sunxi 
   A20-OLinuXino_MICRO  
 sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8)
-
 +Active  arm armv7  sunxi   -   sunxi 
   A20-OLinuXino_MICRO_FEL  
 sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL_FEL,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8)
-
  Active  arm armv7  sunxi   -   sunxi 
   Auxtek-T003  
 sun5i:AUXTEK_T003,SPL,AXP152_POWER,STATUSLED=34   
 -
  Active  arm armv7  sunxi   -   sunxi 
   Auxtek-T004  
 sun5i:AUXTEK_T004,SPL,AXP152_POWER,STATUSLED=34   
 -
  Active  arm armv7  sunxi   -   sunxi 
   ba10_tv_box  sun4i:BA10_TV_BOX,SPL,SUNXI_EMAC   
   
  -
 @@ -363,13 +363,13 @@ Active  arm armv7  sunxi   -
sunxi
  Active  arm armv7  sunxi   -   sunxi 
   Coby_MID8042 sun4i:COBY_MID8042,SPL 

Re: [U-Boot] [PATCH v3 6/6] PPC 85xx: Add qemu-ppce500 machine

2014-02-20 Thread Scott Wood
On Thu, 2014-02-20 at 13:34 +0100, Alexander Graf wrote:
 On 19.02.2014, at 01:03, Scott Wood scottw...@freescale.com wrote:
 
  On Tue, 2014-02-11 at 01:10 +0100, Alexander Graf wrote:
  +  puts(\n);
  +
  +  /* Start MMIO and PIO range maps above RAM */
  +  map_addr = CONFIG_MAX_MEM_MAPPED;
  
  It'd be better to hardcode virtual addresses for this (as other boards
  do), and limit the size you map to the smaller of the hardcoded size or
  the device tree size.
 
 I don't understand this comment. CONFIG_MAX_MEM_MAPPED is basically the
 first address available to IO maps, so with this it is properly
 hardcoded and ensured to always map IO to the same physical address
 regardless of memory passed in.

I mean an explicit address in the board config file, rather than hiding
it here.  It helps to have the full address map in one place.  Consider
what would happen if some other part of the code tried the same trick
with CONFIG_MAX_MEM_MAPPED. :-)
 
  +  mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(0);
  +  mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_1M);
  +  mas2 = FSL_BOOKE_MAS2(fdt_virt_tlb, 0);
  +  mas3 = FSL_BOOKE_MAS3(fdt_phys_tlb, 0, MAS3_SW|MAS3_SR);
  +  mas7 = FSL_BOOKE_MAS7(fdt_phys_tlb);
  
  What if the fdt straddles a 1M boundary?
 
 Then we fix the hypervisor ;). Even the 1MB is only an approximation.
 We don't know the size of the fdt. But I think we can expect the
 hypervisor to align it on 1MB. The masks here really are just to be
 nice to a hypervisor if it's broken (or knows exactly what it's doing).

What's special about 1 MiB?  If you want to rely on DTC_PAD_MASK not
changing to simplify this code, since it's QEMU-specific, fine -- but I
wouldn't consider it broken for an arbitrary hypervisor to do
differently.
 
-Scott


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Re: [U-Boot] [PATCH v3 4/6] PPC: 85xx: Generalize DDR TLB mapping function

2014-02-20 Thread Scott Wood
On Thu, 2014-02-20 at 11:25 +0100, Alexander Graf wrote:
 On 19.02.2014, at 00:21, Scott Wood scottw...@freescale.com wrote:
 
  On Tue, 2014-02-11 at 01:10 +0100, Alexander Graf wrote:
  -  if (memsize)
  -  print_size(memsize,  left unmapped\n);
  +  if (size)
  +  print_size(size,  left unmapped\n);
  +}
  
  The print_size should move to the caller, with some way to pass back the
  amout left unmapped.  Non-RAM callers would treat a non-zero unmapped
  value as an error.
  
  +unsigned int
  +setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
  +{
  +  unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
  +  u64 memsize = (u64)memsize_in_meg  20;
  +
  +  memsize = min(memsize, CONFIG_MAX_MEM_MAPPED);
  +  tlb_map_range(ram_tlb_address, p_addr, memsize, true);
 return memsize_in_meg;
  }
  
  Here you seem to be hiding the message for RAM.
 
 It could still fail if we're running out of TLB entries, no?

That's not the usual reason for that message to be printed.

  York, are you OK with just removing the message altogether, and having
  tlb_map_range return a normal error code if it can't map everything
  (with DDR size reduced in advance as above)?
 
 How about we just change the return value of tlb_map_range to uint64_t
 and return size? That way we can 1:1 move the print code out of the
 function into the RAM map code and IO callers can just call assert(r !=
 0).

That's fine.  I was just wondering if the message had value at all,
given that it's expected if you have more than 2 GiB of RAM.
 
-Scott


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Re: [U-Boot] [PATCH v4 6/6] PPC 85xx: Add qemu-ppce500 machine

2014-02-20 Thread Scott Wood
On Thu, 2014-02-20 at 13:52 +0100, Alexander Graf wrote:
 diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
 index 3e99b07..51f2085 100644
 --- a/arch/powerpc/cpu/mpc85xx/cpu.c
 +++ b/arch/powerpc/cpu/mpc85xx/cpu.c
 @@ -272,6 +272,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char 
 * const argv[])
  #ifndef CONFIG_SYS_FSL_TBCLK_DIV
  #define CONFIG_SYS_FSL_TBCLK_DIV 8
  #endif
 +__attribute__((weak))
  unsigned long get_tbclk (void)
  {
   unsigned long tbclk_div = CONFIG_SYS_FSL_TBCLK_DIV;

It's not a big deal, but we do have __weak available.

 +static void map_fdt_as(int esel)
 +{
 + u32 mas0, mas1, mas2, mas3, mas7;
 + uint64_t fdt_phys = get_fdt_phys();
 + unsigned long fdt_phys_tlb = fdt_phys  ~0xful;
 + unsigned long fdt_virt_tlb = (ulong)get_fdt_virt()  ~0xful;
 +
 + mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(10);

Shouldn't you use the esel parameter here?

-Scott


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[U-Boot] u-boot(v2014.04-rc1) make tags reports find error

2014-02-20 Thread Nishanth Menon
Doing a make tags after build for OMAP4_panda reports find error as
follows:
find: `/omap4': No such file or directory

Full steps:

u-boot$ git clean -fdx /dev/null
u-boot$ make -j6 CROSS_COMPILE=arm-linux-gnueabi- ARCH=arm
omap4_panda_config /dev/null
u-boot$ make -j6 CROSS_COMPILE=arm-linux-gnueabi- ARCH=arm /dev/null
u-boot$ make -j6 CROSS_COMPILE=arm-linux-gnueabi- ARCH=arm tags
ctags -w -o ctags `find -L  /omap4 arch/arm/lib board/ common disk
drivers drivers/dma drivers/gpio drivers/i2c drivers/input drivers/mmc
drivers/mtd drivers/mtd/onenand drivers/mtd/spi drivers/net
drivers/net/phy drivers/pci drivers/power drivers/power/battery
drivers/power/fuel_gauge drivers/power/mfd drivers/power/pmic
drivers/serial drivers/spi drivers/usb/eth drivers/usb/gadget
drivers/usb/host drivers/usb/musb-new drivers/usb/musb drivers/usb/phy
drivers/usb/ulpi fs lib lib/libfdt net test tools examples include \
-name '*.[chS]' -print`
find: `/omap4': No such file or directory
u-boot$ ls tags
ls: cannot access tags: No such file or directory
nmenon@kahuna:~/Src/opensource/u-boot$ ls ctags
ctags
u-boot$ ctags --version
Exuberant Ctags 5.9~svn20110310, Copyright (C) 1996-2009 Darren Hiebert
  Compiled: Nov  9 2011, 17:42:21
  Addresses: dhieb...@users.sourceforge.net,
http://ctags.sourceforge.net
  Optional compiled features: +wildcards, +regex

-- 
Regards,
Nishanth Menon
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Re: [U-Boot] [linux-sunxi] Re: [PATCH v2 3/3] ahci: provide sunxi SATA driver using AHCI platform framework

2014-02-20 Thread Ian Campbell
On Thu, 2014-02-20 at 09:24 -0600, Rob Herring wrote:
  +#define AHCI_PHYCS0R 0x00c0
  +#define AHCI_PHYCS1R 0x00c4
  +#define AHCI_PHYCS2R 0x00c8
[...]
  +#define AHCI_RWCR 0x00fc

 These registers are not sunxi specific, but part of a certain vendor's
 IP found in several SOCs. I can't tell you who, but it shouldn't be
 too hard to figure out.

Actually, only the 4 above are used here and if I'm guessing which
certain vendor you mean correctly then the code for those has these in
its register map as reserved and doesn't touch them (this is true in
both of the similar drivers I looked at).

The rest of the registers in that list did look a lot the DW part
(judging from the existing u-boot drivers) though.

  +#define BIT(x) (1x)
  +static u32 sunxi_getbits(u8 *reg, u8 mask, u8 shift)
  +{
  +   return (readl(reg)  shift)  mask;
  +}
  +
  +static int sunxi_ahci_phy_init(u32 base)
  +{
 [...magic...]
  +
 
 I would guess this code or something very similar already exists in u-boot.

I've had a look in the most obvious files in drivers/block/ and I don't
see anything. Perhaps I should look harder.

FWIW I also couldn't find anything similar in linux/drivers/ata.

Ian.

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Re: [U-Boot] [PATCH] kbuild,tegra124: add dummy obj- for Kbuild

2014-02-20 Thread Stephen Warren
On 02/20/2014 01:24 AM, Masahiro Yamada wrote:
 Hello Stephen,
 
 
 On Wed, 19 Feb 2014 09:36:14 -0700
 Stephen Warren swar...@wwwdotorg.org wrote:
 
 On 02/19/2014 07:46 AM, Albert ARIBAUD wrote:
 Hi Masahiro,

 On Wed, 19 Feb 2014 22:26:43 +0900, Masahiro Yamada
 yamad...@jp.panasonic.com wrote:

 In Kbuild, every makefile must have non-empty obj- or obj-y.
 Otherwise, built-in.o will not be created and the link stage
 will fail.
 ...
 diff --git a/arch/arm/cpu/armv7/tegra124/Makefile 
 b/arch/arm/cpu/armv7/tegra124/Makefile
 ...
 +# necessary to create built-in.o
 +obj- := __dummy__.o

 obj- or obj-y?
 
 Definitely obj-.

Really? Why would such a variable even exist or be used. Only obj-n or
obj-y should exist;  isn't a valid y/n value.
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Re: [U-Boot] [PATCH] venice2: move device tree to fix build error

2014-02-20 Thread Stephen Warren
On 02/20/2014 01:18 AM, Masahiro Yamada wrote:
 Commit 5ab502cb gathered all device tree sources
 to arch/$(ARCH)/dts/.
 So tegra124-venice2.dts also must go to arch/arm/dts directory
 to build venice2 board.
 
 (Commit 5ab502cb had been posted before venice2 board support
 was merged. So an unvisible conflict happened.)

Since all the other DTS have moved likewise,
Acked-by: Stephen Warren swar...@nvidia.com

(although not that Tom Warren is the Tegra U-Boot maintainer).

  arch/arm/dts/Makefile |  5 +--
  arch/arm/dts/tegra124-venice2.dts | 84 
 +++
  board/nvidia/dts/tegra124-venice2.dts | 84 
 ---

I'm assuming the file was moved with zero changes. git format-patch -M
would have been useful to make this clear.
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[U-Boot] Tegra build failure in latest master

2014-02-20 Thread Stephen Warren
I the latest u-boot/master (0a8e823ad0c5 Prepare v2014.04-rc1),
compilation of all Tegra boards fails as below. This is with the ARM
cross-compilers from Ubuntu 12.10.

[swarren@swarren-lx1 u-boot]$ ./MAKEALL -s tegra
Configuring for dalmore board...
cc1: error: bad value (armv5) for -march= switch
cc1: error: bad value (armv5) for -march= switch
/home/swarren/shared/git_wa/tegra-uboot-flasher/u-boot/lib/asm-offsets.c:1:0:
error: bad value (armv5) for -march= switch
make: *** [lib/asm-offsets.s] Error 1
size: './u-boot': No such file
cc1: error: bad value (armv5) for -march= switch
cc1: error: bad value (armv5) for -march= switch
/home/swarren/shared/git_wa/tegra-uboot-flasher/u-boot/lib/asm-offsets.c:1:0:
error: bad value (armv5) for -march= switch
make: *** [lib/asm-offsets.s] Error 1
make: *** Waiting for unfinished jobs
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Re: [U-Boot] [PATCH] venice2: move device tree to fix build error

2014-02-20 Thread Tom Warren
This fixes the MAKEALL -s tegra build break I saw this morning when I rebased 
u-boot-tegra/next against ARM master. Thanks.

TomR - will you take this into U-Boot master?

Tom

 -Original Message-
 From: Stephen Warren [mailto:swar...@wwwdotorg.org]
 Sent: Thursday, February 20, 2014 9:18 AM
 To: Masahiro Yamada; u-boot@lists.denx.de
 Cc: Tom Rini; Stephen Warren; Tom Warren
 Subject: Re: [U-Boot] [PATCH] venice2: move device tree to fix build error
 
 On 02/20/2014 01:18 AM, Masahiro Yamada wrote:
  Commit 5ab502cb gathered all device tree sources to arch/$(ARCH)/dts/.
  So tegra124-venice2.dts also must go to arch/arm/dts directory to
  build venice2 board.
 
  (Commit 5ab502cb had been posted before venice2 board support was
  merged. So an unvisible conflict happened.)
 
 Since all the other DTS have moved likewise,
 Acked-by: Stephen Warren swar...@nvidia.com
 
 (although not that Tom Warren is the Tegra U-Boot maintainer).
 
   arch/arm/dts/Makefile |  5 +--
   arch/arm/dts/tegra124-venice2.dts | 84
 +++
   board/nvidia/dts/tegra124-venice2.dts | 84
  ---
 
 I'm assuming the file was moved with zero changes. git format-patch -M
 would have been useful to make this clear.
--
nvpublic
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Re: [U-Boot] [PATCH] venice2: move device tree to fix build error

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 09:08:21AM -0800, Tom Warren wrote:

 This fixes the MAKEALL -s tegra build break I saw this morning when I rebased 
 u-boot-tegra/next against ARM master. Thanks.
 
 TomR - will you take this into U-Boot master?

Yup, I've already got it queued along with the i2c PR and a few other
small things.

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Re: [U-Boot] [PATCH] venice2: move device tree to fix build error

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 05:18:42PM +0900, Masahiro Yamada wrote:

 Commit 5ab502cb gathered all device tree sources
 to arch/$(ARCH)/dts/.
 So tegra124-venice2.dts also must go to arch/arm/dts directory
 to build venice2 board.
 
 (Commit 5ab502cb had been posted before venice2 board support
 was merged. So an unvisible conflict happened.)
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Cc: Stephen Warren swar...@nvidia.com
 Cc: Simon Glass s...@chromium.org
 Cc: Tom Rini tr...@ti.com

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [i2c] Pull request

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 02:05:54PM +0100, Heiko Schocher wrote:

 Hello Tom,
 
 please pull from u-boot-i2c.git, thanks!
 
 The following changes since commit 0a8e823ad0c5a602c93c2e8a54caf622ade6d3fb:
 
   Prepare v2014.04-rc1 (2014-02-19 16:01:28 -0500)
 
 are available in the git repository at:
 
   git://git.denx.de/u-boot-i2c.git master
 
 for you to fetch changes up to 39abd65c342a271d39fa580dc4c5cb7fce516ef3:
 
   arc: remove hardware.h (2014-02-20 06:49:19 +0100)
 
 
 Alexey Brodkin (3):
   spear: move CONFIG_SYS_I2C_BASE from arch-spear/hardware to board 
 configs
   designware_i2c: remove inclusion of asm/arch/hardware.h
   arc: remove hardware.h
 
 Chin Liang See (1):
   designware_i2c: Enhance DesignWare I2C driver address support
 
 Hannes Petermaier (1):
   OMAP24xx I2C: Add support for set-speed
 
 Heiko Schocher (1):
   i2c, bootcount: add support for bootcounter on i2c devices
 
 Marek Vasut (1):
   i2c: i2c-mxs: Wait for I2C to empty queue
 
 Michael Burr (2):
   i2c: zynq: Support for 0-length register address
   i2c: zynq: Add support for the second i2c controller
 
 Scott Jiang (1):
   blackfin: make i2c driver blackfin independant
 
 Sonic Zhang (3):
   blackfin: the sclk MHz in i2c driver should be divided by 1000 other 
 than 1024
   blackfin: add spi and i2c specific get clock functions
   blackfin: rename bfin-twi_i2c driver to adi_i2c
 
  README  |  20 +
  arch/arc/include/asm/arch-arc700/hardware.h |  10 -
  arch/arm/include/asm/arch-spear/hardware.h  |   4 --
  arch/blackfin/include/asm/blackfin_local.h  |   7 ---
  arch/blackfin/include/asm/clock.h   |  11 +
  arch/blackfin/include/asm/twi.h |  15 +++
  drivers/bootcount/Makefile  |   1 +
  drivers/bootcount/bootcount_i2c.c   |  44 +++
  drivers/i2c/adi_i2c.c   | 387 
 ++
  drivers/i2c/bfin-twi_i2c.c  |   3 +-
  drivers/i2c/designware_i2c.c|  42 --
  drivers/i2c/mxs_i2c.c   |  39 ++---
  drivers/i2c/omap24xx_i2c.c  | 147 
 +--
  drivers/i2c/zynq_i2c.c  |  82 
 ---
  drivers/spi/bfin_spi.c  |   7 +--
  drivers/spi/bfin_spi6xx.c   |   7 +--
  include/configs/spear-common.h  |   9 
  include/configs/x600.h  |   1 +
  include/configs/zynq-common.h   |   6 +--
  include/i2c.h   |   1 +
  20 files changed, 688 insertions(+), 155 deletions(-)
  delete mode 100644 arch/arc/include/asm/arch-arc700/hardware.h
  create mode 100644 arch/blackfin/include/asm/twi.h
  create mode 100644 drivers/bootcount/bootcount_i2c.c
  create mode 100644 drivers/i2c/adi_i2c.c

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [PATCH] dfu: mmc: fs: Fix format accepted by ext4write command

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 10:29:18AM +0100, Lukasz Majewski wrote:

 The commit:
 
 EXT4: Fix number base handling of ext4write command
  SHA1: f7740f7712b8638f08b83a7e5d00bc1d6bb086a9
 
 Cleaned up the ext4write command format.
 
 This commit shall be regarded as a follow up, since the DFU subsystem is
 using those commands for its normal operation.
 
 Signed-off-by: Lukasz Majewski l.majew...@samsung.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] blackfin: Add asm/clock.h to numerous drivers

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 10:16:31AM -0500, Tom Rini wrote:

 With d6a320d we moved some clock externs out of blackfin_local.h and
 into clock.h but now need to include asm/clock.h in more drivers to
 avoid warnings.
 
 Cc: Sonic Zhang sonic.zh...@analog.com
 Signed-off-by: Tom Rini tr...@ti.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] Pull request (with merge conflict resolution): u-boot-arm/master

2014-02-20 Thread Tom Rini
On Thu, Feb 20, 2014 at 02:57:42PM +0100, Albert ARIBAUD wrote:

 Hello Tom,
 
 The following changes since commit
 0a8e823ad0c5a602c93c2e8a54caf622ade6d3fb:
 
   Prepare v2014.04-rc1 (2014-02-19 16:01:28 -0500)
 
 are available in the git repository at:
 
   git://git.denx.de/u-boot-arm master
 
 for you to fetch changes up to 3e11350255d9c5d4bd03c2a65769da84c05d3294:
 
   Merge branch 'u-boot/master' into 'u-boot-arm/master' (2014-02-20
   13:16:05 +0100)
 
 
 
 There was a merge conflict between u-boot/master and u-boot-arm/master
 initialy; I resolved and documented it on u-boot-arm/master, commit
 3e113502. A 'git show' gives:
 
 commit 3e11350255d9c5d4bd03c2a65769da84c05d3294
 Merge: e7538fe 0a8e823
 Author: Albert ARIBAUD albert.u.b...@aribaud.net
 Date:   Thu Feb 20 13:16:05 2014 +0100
 
 Merge branch 'u-boot/master' into 'u-boot-arm/master'
 
 Conflicts:
 Makefile
 drivers/net/npe/Makefile
 
 These two conflicts arise from commit 0b2d3f20
 (ARM: NET: Remove the IXP NPE ethernet driver) and are
 resolved by deleting the drivers/net/npe/Makefile file
 and removing the CONFIG_IXP4XX_NPE line from Makefile.
 
 diff --cc Makefile
 index 0e07aa5,d9b2b7f..9a530b3
 --- a/Makefile
 +++ b/Makefile
 @@@ -217,36 -589,35 +589,34 @@@ head-y := $(CPUDIR)/start.
   head-$(CONFIG_4xx) += arch/powerpc/cpu/ppc4xx/resetvec.o
   head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o
   
 - OBJS := $(addprefix $(obj),$(head-y))
 - 
 - HAVE_VENDOR_COMMON_LIB = $(if $(wildcard
 board/$(VENDOR)/common/Makefile),y,n)
 + HAVE_VENDOR_COMMON_LIB = $(if $(wildcard
 $(srctree)/board/$(VENDOR)/common/Makefile),y,n) 
 - LIBS-y += lib/
 - LIBS-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
 - LIBS-y += $(CPUDIR)/
 + libs-y += lib/
 + libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
 + libs-y += $(CPUDIR)/
   ifdef SOC
 - LIBS-y += $(CPUDIR)/$(SOC)/
 - endif
 - LIBS-$(CONFIG_OF_EMBED) += dts/
 - LIBS-y += arch/$(ARCH)/lib/
 - LIBS-y += fs/
 - LIBS-y += net/
 - LIBS-y += disk/
 - LIBS-y += drivers/
 - LIBS-y += drivers/dma/
 - LIBS-y += drivers/gpio/
 - LIBS-y += drivers/i2c/
 - LIBS-y += drivers/input/
 - LIBS-y += drivers/mmc/
 - LIBS-y += drivers/mtd/
 - LIBS-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
 - LIBS-y += drivers/mtd/onenand/
 - LIBS-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
 - LIBS-y += drivers/mtd/spi/
 - LIBS-y += drivers/net/
 - LIBS-y += drivers/net/phy/
 - LIBS-y += drivers/pci/
 - LIBS-y += drivers/power/ \
 + libs-y += $(CPUDIR)/$(SOC)/
 + endif
  -libs-$(CONFIG_IXP4XX_NPE) += drivers/net/npe/
 + libs-$(CONFIG_OF_EMBED) += dts/
 + libs-y += arch/$(ARCH)/lib/
 + libs-y += fs/
 + libs-y += net/
 + libs-y += disk/
 + libs-y += drivers/
 + libs-y += drivers/dma/
 + libs-y += drivers/gpio/
 + libs-y += drivers/i2c/
 + libs-y += drivers/input/
 + libs-y += drivers/mmc/
 + libs-y += drivers/mtd/
 + libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
 + libs-y += drivers/mtd/onenand/
 + libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
 + libs-y += drivers/mtd/spi/
 + libs-y += drivers/net/
 + libs-y += drivers/net/phy/
 + libs-y += drivers/pci/
 + libs-y += drivers/power/ \
 drivers/power/fuel_gauge/ \
 drivers/power/mfd/ \
 drivers/power/pmic/ \
 
  Albert ARIBAUD (4):
   Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'
   Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'
   Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
   Merge branch 'u-boot/master' into 'u-boot-arm/master'
 
 Andy Ng (1):
   imx6 SION bit has to be on for the pins that are used as
 ENET_REF_CLK
 
 Anson Huang (2):
   imx6: ensure AHB clock is 132MHz in low freq boot mode
   imx6: make sure MMDC_CHx_MASK is clear to avoid warm reset failure
 
 Eric Nelson (1):
   i.MX6: nitrogen6x: pedantic: BOOT_FROM==spi, not sd
 
 Fabio Estevam (8):
   nitrogen6x: README: Only calling 'make' is enough
   nitrogen6x: README: Do not refer to MAINTAINERS file
   mx6sl: Adjust fdt_addr to avoid address overlapping
   hummingboard: Return from cpu_eth_init() directly
   imx: Introduce a header for the imx cpu versions
   mx6: Distinguish mx6dual from mx6quad
   mx6qsabreauto: Update imximage.cfg
   mx6: Enable L2 cache support
 
 Marek Vasut (17):
   ARM: armv7: Make indirect vector addresses globl
   ARM: mx6: Add PCI express clock configuration
   ARM: mx6: Add PCI express driver
   ARM: mx6: Enable PCIe on Sabrelite
   ARM: m53evk: Rename mxc-nand to mxc_nand
   ARM: m53evk: Enable CONFIG_REGEX
   ARM: IXP: Remove actux1 board
   ARM: IXP: Remove actux2 board
   ARM: IXP: Remove actux3 board
   ARM: IXP: Remove actux4 board
   ARM: IXP: Remove dvl_host board
   ARM: IXP: Remove the IXP architecture support
   ARM: USB: Remove the IXP EHCI driver
   ARM: PCI: Remove the IXP PCI 

Re: [U-Boot] [PATCH] endian dependency fix

2014-02-20 Thread Yoshinori Sato
At Wed, 19 Feb 2014 10:45:33 +0900,
Nobuhiro Iwamatsu wrote:
 
 Hi, all.
 
 Masahiro, thank you for the explanation.
 
 Yoshinori, please resend patches after read patch submission rules.


OK.
I'll resend after reading wiki.

Thanks.
 
 Best regards,
   Nobuhiro
 
 2014-02-18 19:19 GMT+09:00 Masahiro Yamada yamad...@jp.panasonic.com:
  Hi Yoshinori,
 
  You should read the patch submission rules
  (http://www.denx.de/wiki/U-Boot/Patches)
  before posting patches.
 
   - Use the imperative tense in your summary line
 
I mean, fix blah blah rather than blah blah fix
 
 
   - If applicable, prefix the summary line with a word describing what
  area of code is being affected followed by a colon.
 
In this case,  mmc: ...
 
Ditto in your MS7206SE series.
 
 
  Best Regards
  Masahiro Yamada
 
  ___
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  U-Boot@lists.denx.de
  http://lists.denx.de/mailman/listinfo/u-boot
 
 
 
 -- 
 Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6

-- 
Yoshinori Sato
ys...@users.sourceforge.jp
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Re: [U-Boot] Tegra build failure in latest master

2014-02-20 Thread Albert ARIBAUD
Hi Stephen,

On Thu, 20 Feb 2014 09:35:14 -0700, Stephen Warren
swar...@wwwdotorg.org wrote:

 I the latest u-boot/master (0a8e823ad0c5 Prepare v2014.04-rc1),
 compilation of all Tegra boards fails as below. This is with the ARM
 cross-compilers from Ubuntu 12.10.
 
 [swarren@swarren-lx1 u-boot]$ ./MAKEALL -s tegra
 Configuring for dalmore board...
 cc1: error: bad value (armv5) for -march= switch
 cc1: error: bad value (armv5) for -march= switch
 /home/swarren/shared/git_wa/tegra-uboot-flasher/u-boot/lib/asm-offsets.c:1:0:
 error: bad value (armv5) for -march= switch
 make: *** [lib/asm-offsets.s] Error 1
 size: './u-boot': No such file
 cc1: error: bad value (armv5) for -march= switch
 cc1: error: bad value (armv5) for -march= switch
 /home/swarren/shared/git_wa/tegra-uboot-flasher/u-boot/lib/asm-offsets.c:1:0:
 error: bad value (armv5) for -march= switch
 make: *** [lib/asm-offsets.s] Error 1
 make: *** Waiting for unfinished jobs

I've build the whole of ARM with the latest u-boot/master and all
except venice2 builds fine.

Which version of ARM compilers are you using?

Amicalement,
-- 
Albert.
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Re: [U-Boot] [U-Boot:RESEND][[PATCH 6/7] k2hk: add support for k2hk SOC and EVM

2014-02-20 Thread Andrianov, Vitaly


 -Original Message-
 From: Rini, Tom
 Sent: Monday, February 17, 2014 4:58 PM
 To: Andrianov, Vitaly
 Cc: Karicheri, Muralidharan; u-boot@lists.denx.de;
 sand...@theia.denx.de; Kwok, WingMan; Nair, Sandeep
 Subject: Re: [U-Boot] [U-Boot:RESEND][[PATCH 6/7] k2hk: add support for
 k2hk SOC and EVM
 
 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 On 02/17/2014 04:19 PM, Andrianov, Vitaly wrote:
  -Original Message-
  From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
  Sent: Monday, February 10, 2014 4:26 PM
  To: Karicheri, Muralidharan
  Cc: u-boot@lists.denx.de; sand...@theia.denx.de; Kwok, WingMan;
 Nair,
  Sandeep; Andrianov, Vitaly
  Subject: Re: [U-Boot] [U-Boot:RESEND][[PATCH 6/7] k2hk: add support
  for k2hk SOC and EVM
 
  On Fri, Feb 07, 2014 at 06:23:13PM -0500, Murali Karicheri wrote:
 
  k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler
 SoC.
  Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please refer
  the
  ti/k2hk_evm/README for details on the board, build and other
  information.
 
  This patch add support for keystone architecture and k2hk evm.
 
  [snip]
 
 
  +++ b/arch/arm/cpu/armv7/keystone/cmd_clock.c
 
  We just added a generic
 
 
  Tom,
  Where can I see this generic implementation?
 
 Start poking at common/cmd_clk.c
 

The command in that file just dump all clocks. We need to have a command
to display one particular clock. So, for now we will continue to use
the keystone2 specific implementation and change it later when the
generic will support one clock only.

 - --
 Tom
 -BEGIN PGP SIGNATURE-
 Version: GnuPG v1.4.11 (GNU/Linux)
 Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/
 
 iQIcBAEBAgAGBQJTAoXUAAoJENk4IS6UOR1WbQIQALPc/cIk4WTGLjV4lZQ+j2XH
 0LzIel0Crx4TT3XPSfepxfQM0GqDseO92ujrGM5uqG043UIji8F/KmcJR2ILLgji
 /07XiGG6fM9HSf/rnCgLFil7kY9DSoru5JLfnSkZISnowkK7/JgwRwrbXsG17rXD
 vgyuGbS/Fpi6kt4AfjF1FtmDs/l9e28nh5ds9MUjQKBiWEVeSZdBDid6mq2kyY7e
 6asozG0qIbaNS+o2F7HSbaQs8Ar78CLkM36Bsu3cjpHO+JZLtqaOvvlm6U8kbj5a
 DK77Of6zQ9ToGOVtFFxVvMFinf/BRgZ+M9cyntKWlZ12uClPGXgOW3EyDrrW2VE8
 3cXRqOlfBfUoJevtg6SQu837EeLrVOYKP8bs6A6IQ3etNGc+OhsXZnNhkmfHjtuw
 2n7sOqOdC4Hpw0rjWfY1UaWPEPHoq+HPSqJHN6VaVkopKzPX5bWqDBxT+MtMxp5q
 o196auSdfyW+z3A4MIpSWpEhB5Q7afr6v/VPs9wqkehuj/QdcFm8N2nD3s6Pg5NS
 reuqTEZZbbQ5RORgjFDBqhnpgUaHx3OGM+HsCr5Msz/QRjtiljFYI9DtLdkn0XZw
 jTbvUkEob8hVGaoptdppwUj90Cw6sJ5r15TGTHohJLkxzQfBkXeTK0fUXYSfPCMJ
 Iyf9nPf1+D1AMKzIM14q
 =Bk7g
 -END PGP SIGNATURE-

Thanks,
Vitaly
 

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Re: [U-Boot] Tegra build failure in latest master

2014-02-20 Thread Stephen Warren
On 02/20/2014 10:26 AM, Albert ARIBAUD wrote:
 Hi Stephen,
 
 On Thu, 20 Feb 2014 09:35:14 -0700, Stephen Warren
 swar...@wwwdotorg.org wrote:
 
 I the latest u-boot/master (0a8e823ad0c5 Prepare v2014.04-rc1),
 compilation of all Tegra boards fails as below. This is with the ARM
 cross-compilers from Ubuntu 12.10.

 [swarren@swarren-lx1 u-boot]$ ./MAKEALL -s tegra
 Configuring for dalmore board...
 cc1: error: bad value (armv5) for -march= switch
 cc1: error: bad value (armv5) for -march= switch
 /home/swarren/shared/git_wa/tegra-uboot-flasher/u-boot/lib/asm-offsets.c:1:0:
 error: bad value (armv5) for -march= switch
 make: *** [lib/asm-offsets.s] Error 1
 size: './u-boot': No such file
 cc1: error: bad value (armv5) for -march= switch
 cc1: error: bad value (armv5) for -march= switch
 /home/swarren/shared/git_wa/tegra-uboot-flasher/u-boot/lib/asm-offsets.c:1:0:
 error: bad value (armv5) for -march= switch
 make: *** [lib/asm-offsets.s] Error 1
 make: *** Waiting for unfinished jobs
 
 I've build the whole of ARM with the latest u-boot/master and all
 except venice2 builds fine.
 
 Which version of ARM compilers are you using?

Well, I thought I had CROSS_COMPILE pointing to the ARM cross-compilers
from Ubuntu 12.10. However, I had it set incorrectly:-(

So, false alarm:-)
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[U-Boot] [U-Boot PATCH v2 00/12] Add support for keystone2 SoC and K2HK EVM

2014-02-20 Thread Murali Karicheri
This patch series add support for keystone2 SoC and K2HK EVM

Change history:
v2
 - Review comments incorporated. Following are major comments
   addressed
- split network driver to navigator driver + ethernet
  driver
- replaced register base + offset implemenation with struct
based register access implementation
- Added Readme for NAND no subpage write option
- re-use code for davinci i2c driver on keystone2 with updates
- clock-k2hk.c merged to clock.c
- currently keeping board specific getclk() command. See the 
thread
  for the rational.
 - Added update to davinci spi driver to re-use on keystone

v1
 - added separate patch for sorting tools/Makefile entries
 - reworked gpimage patch to allow more re-use across omapimage/gpimage
 - dropped patch related to ubifs file size
 - added keystone SoC and K2HK EVM support

v0
 - preparatory patch for keystone

Murali Karicheri (5):
  tools: sort the entries in Makefile
  tools: mkimage: add support for gpimage format
  NAND: DaVinci: allow forced disable of subpage writes
  i2c, davinci: move i2c_defs.h to the drivers/i2c directory
  k2hk-evm: add configuration for spi1 and spi2 support

Rex Chang (1):
  spi: davinci: add support for multiple bus and chip select

Vitaly Andrianov (6):
  fdt: call ft_board_setup_ex() at the end of image_setup_libfdt()
  arm: add support for arch timer
  i2c, davinci: add support for multiple i2c buses
  k2hk: add support for k2hk SOC and EVM
  keystone2: add keystone multicore navigator driver
  keystone2: net: add keystone ethernet driver

 Makefile   |   19 +
 README |5 +
 arch/arm/cpu/armv7/keystone/Makefile   |   18 +
 arch/arm/cpu/armv7/keystone/aemif.c|   71 ++
 arch/arm/cpu/armv7/keystone/clock.c|  313 +++
 arch/arm/cpu/armv7/keystone/cmd_clock.c|  124 +++
 arch/arm/cpu/armv7/keystone/cmd_mon.c  |  131 +++
 arch/arm/cpu/armv7/keystone/config.mk  |   15 +
 arch/arm/cpu/armv7/keystone/ddr3.c |   69 ++
 arch/arm/cpu/armv7/keystone/init.c |   56 ++
 arch/arm/cpu/armv7/keystone/keystone_nav.c |  376 +
 arch/arm/cpu/armv7/keystone/msmc.c |   68 ++
 arch/arm/cpu/armv7/keystone/psc.c  |  238 ++
 arch/arm/cpu/armv7/keystone/spl.c  |   45 +
 arch/arm/include/asm/arch-davinci/i2c_defs.h   |   71 +-
 arch/arm/include/asm/arch-keystone/clock-k2hk.h|  109 +++
 arch/arm/include/asm/arch-keystone/clock.h |   17 +
 arch/arm/include/asm/arch-keystone/clock_defs.h|  121 +++
 arch/arm/include/asm/arch-keystone/emac_defs.h |  250 ++
 arch/arm/include/asm/arch-keystone/emif_defs.h |   73 ++
 arch/arm/include/asm/arch-keystone/hardware-k2hk.h |  145 
 arch/arm/include/asm/arch-keystone/hardware.h  |  175 
 arch/arm/include/asm/arch-keystone/i2c_defs.h  |   17 +
 arch/arm/include/asm/arch-keystone/keystone_nav.h  |  193 +
 arch/arm/include/asm/arch-keystone/nand_defs.h |   25 +
 arch/arm/include/asm/arch-keystone/psc_defs.h  |   90 ++
 arch/arm/include/asm/arch-keystone/spl.h   |   12 +
 arch/arm/lib/Makefile  |1 +
 arch/arm/lib/arch_timer.c  |   58 ++
 board/ti/k2hk_evm/Makefile |9 +
 board/ti/k2hk_evm/README   |   56 ++
 board/ti/k2hk_evm/board.c  |  301 +++
 board/ti/k2hk_evm/ddr3.c   |  269 ++
 boards.cfg |1 +
 common/image-fdt.c |5 +
 common/image.c |1 +
 drivers/i2c/davinci_i2c.c  |  345 
 drivers/i2c/davinci_i2c.h  |   78 ++
 drivers/mtd/nand/davinci_nand.c|3 +
 drivers/net/Makefile   |1 +
 drivers/net/keystone_net.c |  859 
 drivers/serial/ns16550.c   |8 +
 drivers/spi/davinci_spi.c  |   62 +-
 drivers/spi/davinci_spi.h  |   33 +
 include/configs/k2hk_evm.h |  268 ++
 include/fdt_support.h  |1 +
 include/image.h|1 +
 tools/Makefile |   20 +-
 tools/gpheader.h   |   40 +
 tools/gpimage-common.c |   80 ++
 tools/gpimage.c|   77 ++
 

[U-Boot] [U-Boot PATCH v2 01/12] fdt: call ft_board_setup_ex() at the end of image_setup_libfdt()

2014-02-20 Thread Murali Karicheri
From: Vitaly Andrianov vita...@ti.com

The keystone2 SOC requires to fix all 32 bit aliased addresses
to their 36 physical format. This has to happen after all fdt
nodes are added or modified.

Signed-off-by: Vitaly Andrianov vita...@ti.com
---
 - no update since v1
 common/image-fdt.c|5 +
 include/fdt_support.h |1 +
 2 files changed, 6 insertions(+)

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 6f9ce7d..ee4dd6f 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -487,5 +487,10 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
if (!ft_verify_fdt(blob))
return -1;
 
+#ifdef CONFIG_SOC_K2HK
+   if (IMAAGE_OF_BOARD_SETUP)
+   ft_board_setup_ex(blob, gd-bd);
+#endif
+
return 0;
 }
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 9871e2f..4c1416d 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -63,6 +63,7 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct 
pci_controller *hose);
 #endif
 
 void ft_board_setup(void *blob, bd_t *bd);
+void ft_board_setup_ex(void *blob, bd_t *bd);
 void ft_cpu_setup(void *blob, bd_t *bd);
 void ft_pci_setup(void *blob, bd_t *bd);
 
-- 
1.7.9.5

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[U-Boot] [U-Boot PATCH v2 02/12] tools: sort the entries in Makefile

2014-02-20 Thread Murali Karicheri
The NOPED_OBJ_FILES, dumpimage and mkimage object file
entries are to be kept sorted. This patch fix this issue.

Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
 - No update since v1
 tools/Makefile |   14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/tools/Makefile b/tools/Makefile
index 328cea3..3c719b3 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -77,10 +77,10 @@ NOPED_OBJ_FILES-y += aisimage.o
 NOPED_OBJ_FILES-y += default_image.o
 NOPED_OBJ_FILES-y += dumpimage.o
 NOPED_OBJ_FILES-y += fit_image.o
+NOPED_OBJ_FILES-y += imagetool.o
 NOPED_OBJ_FILES-y += image-host.o
 NOPED_OBJ_FILES-y += imximage.o
 NOPED_OBJ_FILES-y += kwbimage.o
-NOPED_OBJ_FILES-y += imagetool.o
 NOPED_OBJ_FILES-y += mkenvimage.o
 NOPED_OBJ_FILES-y += mkimage.o
 NOPED_OBJ_FILES-y += mxsimage.o
@@ -88,8 +88,8 @@ NOPED_OBJ_FILES-y += omapimage.o
 NOPED_OBJ_FILES-y += os_support.o
 NOPED_OBJ_FILES-y += pblimage.o
 NOPED_OBJ_FILES-y += proftool.o
-NOPED_OBJ_FILES-y += ublimage.o
 NOPED_OBJ_FILES-y += relocate-rela.o
+NOPED_OBJ_FILES-y += ublimage.o
 OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc.o
 OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o
 OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o
@@ -209,14 +209,14 @@ $(obj)dumpimage$(SFX):$(obj)aisimage.o \
$(FIT_SIG_OBJS) \
$(obj)crc32.o \
$(obj)default_image.o \
+   $(obj)dumpimage.o \
$(obj)fit_image.o \
-   $(obj)image-fit.o \
$(obj)image.o \
-   $(obj)image-host.o \
$(obj)imagetool.o \
+   $(obj)image-fit.o \
+   $(obj)image-host.o \
$(obj)imximage.o \
$(obj)kwbimage.o \
-   $(obj)dumpimage.o \
$(obj)md5.o \
$(obj)mxsimage.o \
$(obj)omapimage.o \
@@ -239,10 +239,10 @@ $(obj)mkimage$(SFX):  $(obj)aisimage.o \
$(obj)crc32.o \
$(obj)default_image.o \
$(obj)fit_image.o \
-   $(obj)image-fit.o \
-   $(obj)image-host.o \
$(obj)image.o \
$(obj)imagetool.o \
+   $(obj)image-host.o \
+   $(obj)image-fit.o \
$(obj)imximage.o \
$(obj)kwbimage.o \
$(obj)md5.o \
-- 
1.7.9.5

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[U-Boot] [U-Boot PATCH v2 05/12] NAND: DaVinci: allow forced disable of subpage writes

2014-02-20 Thread Murali Karicheri
This patch introduces a configurable mechanism to disable
subpage writes in the DaVinci NAND driver.

Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
 - Added README
 README  |5 +
 drivers/mtd/nand/davinci_nand.c |3 +++
 2 files changed, 8 insertions(+)

diff --git a/README b/README
index aea82be..caf60a2 100644
--- a/README
+++ b/README
@@ -4427,6 +4427,11 @@ Low Level (hardware related) configuration options:
 - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
Enables the RTC32K OSC on AM33xx based plattforms
 
+- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+   Option to disable subpage write in NAND driver
+   Example driver that use this:
+   drivers/mtd/nand/davinci_nand.c
+
 Freescale QE/FMAN Firmware Support:
 ---
 
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 5b17d7b..75b03a7 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -609,6 +609,9 @@ void davinci_nand_init(struct nand_chip *nand)
 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
nand-bbt_options |= NAND_BBT_USE_FLASH;
 #endif
+#ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+   nand-options |= NAND_NO_SUBPAGE_WRITE;
+#endif
 #ifdef CONFIG_SYS_NAND_HW_ECC
nand-ecc.mode = NAND_ECC_HW;
nand-ecc.size = 512;
-- 
1.7.9.5

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[U-Boot] [U-Boot PATCH v2 04/12] arm: add support for arch timer

2014-02-20 Thread Murali Karicheri
From: Vitaly Andrianov vita...@ti.com

This patch add basic support for the architecture timer found on recent
ARMv7 based SoCs.

Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
 - No update since v1
 arch/arm/lib/Makefile |1 +
 arch/arm/lib/arch_timer.c |   58 +
 2 files changed, 59 insertions(+)
 create mode 100644 arch/arm/lib/arch_timer.c

diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 321997c..726f229 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
 else
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
 endif
+obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
 
 ifdef CONFIG_ARM64
 obj-y  += interrupts_64.o
diff --git a/arch/arm/lib/arch_timer.c b/arch/arm/lib/arch_timer.c
new file mode 100644
index 000..0588e2b
--- /dev/null
+++ b/arch/arm/lib/arch_timer.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated, www.ti.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include div64.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int timer_init(void)
+{
+   gd-arch.tbl = 0;
+   gd-arch.tbu = 0;
+
+   gd-arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ;
+
+   return 0;
+}
+
+unsigned long long get_ticks(void)
+{
+   ulong nowl, nowu;
+
+   asm volatile(mrrc p15, 0, %0, %1, c14 : =r (nowl), =r (nowu));
+
+   gd-arch.tbl = nowl;
+   gd-arch.tbu = nowu;
+
+   return (((unsigned long long)gd-arch.tbu)  32) | gd-arch.tbl;
+}
+
+
+ulong get_timer(ulong base)
+{
+   return lldiv(get_ticks(), gd-arch.timer_rate_hz) - base;
+}
+
+void __udelay(unsigned long usec)
+{
+   unsigned long long endtime;
+
+   endtime = lldiv((unsigned long long)usec * gd-arch.timer_rate_hz,
+   1000UL);
+
+   endtime += get_ticks();
+
+   while (get_ticks()  endtime)
+   ;
+}
+
+ulong get_tbclk(void)
+{
+   return gd-arch.timer_rate_hz;
+}
-- 
1.7.9.5

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[U-Boot] [U-Boot PATCH v2 07/12] i2c, davinci: add support for multiple i2c buses

2014-02-20 Thread Murali Karicheri
From: Vitaly Andrianov vita...@ti.com

Signed-off-by: Vitaly Andrianov vita...@ti.com
---
 drivers/i2c/davinci_i2c.c |  344 ++---
 drivers/i2c/davinci_i2c.h |   27 ++--
 2 files changed, 218 insertions(+), 153 deletions(-)

diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c
index 6e5260c..c584a11 100644
--- a/drivers/i2c/davinci_i2c.c
+++ b/drivers/i2c/davinci_i2c.c
@@ -1,25 +1,37 @@
 /*
  * TI DaVinci (TMS320DM644x) I2C driver.
  *
- * Copyright (C) 2007 Sergey Kubushyn k...@koi8.net
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated, www.ti.com
+ * (C) Copyright 2007 Sergey Kubushyn k...@koi8.net
  *
- * 
- *
- * SPDX-License-Identifier:GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+
  */
 
 #include common.h
 #include i2c.h
 #include asm/arch/hardware.h
 #include asm/arch/i2c_defs.h
+#include asm/io.h
 #include davinci_i2c.h
 
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct i2c_regs __attribute__((section(.data))) *i2c_base =
+   (struct i2c_regs *)I2C_BASE;
+
+#ifdef CONFIG_I2C_MULTI_BUS
+static unsigned int __attribute__((section(.data)))
+   bus_initialized[I2C_BUS_MAX] = { [0 ... (I2C_BUS_MAX-1)] = 0 };
+static unsigned int __attribute__((section(.data))) current_bus;
+#endif
+
 #define CHECK_NACK() \
do {\
if (tmp  (I2C_TIMEOUT | I2C_STAT_NACK)) {\
-   REG(I2C_CON) = 0;\
-   return(1);\
-   }\
+   REG((i2c_base-i2c_con)) = 0;\
+   return 1;\
+   } \
} while (0)
 
 
@@ -27,20 +39,21 @@ static int wait_for_bus(void)
 {
int stat, timeout;
 
-   REG(I2C_STAT) = 0x;
+   REG((i2c_base-i2c_stat)) = 0x;
 
for (timeout = 0; timeout  10; timeout++) {
-   if (!((stat = REG(I2C_STAT))  I2C_STAT_BB)) {
-   REG(I2C_STAT) = 0x;
-   return(0);
+   stat = REG((i2c_base-i2c_stat));
+   if (!((stat)  I2C_STAT_BB)) {
+   REG((i2c_base-i2c_stat)) = 0x;
+   return 0;
}
 
-   REG(I2C_STAT) = stat;
+   REG((i2c_base-i2c_stat)) = stat;
udelay(5);
}
 
-   REG(I2C_STAT) = 0x;
-   return(1);
+   REG((i2c_base-i2c_stat)) = 0x;
+   return 1;
 }
 
 
@@ -50,25 +63,24 @@ static int poll_i2c_irq(int mask)
 
for (timeout = 0; timeout  10; timeout++) {
udelay(1000);
-   stat = REG(I2C_STAT);
-   if (stat  mask) {
-   return(stat);
-   }
+   stat = REG((i2c_base-i2c_stat));
+   if (stat  mask)
+   return stat;
}
 
-   REG(I2C_STAT) = 0x;
-   return(stat | I2C_TIMEOUT);
+   REG((i2c_base-i2c_stat)) = 0x;
+   return stat | I2C_TIMEOUT;
 }
 
 
 void flush_rx(void)
 {
while (1) {
-   if (!(REG(I2C_STAT)  I2C_STAT_RRDY))
+   if (!(REG((i2c_base-i2c_stat))  I2C_STAT_RRDY))
break;
 
-   REG(I2C_DRR);
-   REG(I2C_STAT) = I2C_STAT_RRDY;
+   REG((i2c_base-i2c_drr));
+   REG((i2c_base-i2c_stat)) = I2C_STAT_RRDY;
udelay(1000);
}
 }
@@ -78,28 +90,33 @@ void i2c_init(int speed, int slaveadd)
 {
u_int32_t   div, psc;
 
-   if (REG(I2C_CON)  I2C_CON_EN) {
-   REG(I2C_CON) = 0;
-   udelay (5);
+   if (REG((i2c_base-i2c_con))  I2C_CON_EN) {
+   REG((i2c_base-i2c_con)) = 0;
+   udelay(5);
}
 
psc = 2;
-   div = (CONFIG_SYS_HZ_CLOCK / ((psc + 1) * speed)) - 10; /* SCLL + SCLH 
*/
-   REG(I2C_PSC) = psc; /* 27MHz / (2 + 1) = 9MHz */
-   REG(I2C_SCLL) = (div * 50) / 100;   /* 50% Duty */
-   REG(I2C_SCLH) = div - REG(I2C_SCLL);
+   div = (CONFIG_SYS_HZ_CLOCK / ((psc + 1) * speed)) - 10;
+   REG((i2c_base-i2c_psc)) = psc;
+   REG((i2c_base-i2c_scll)) = (div * 50) / 100;
+   REG((i2c_base-i2c_sclh)) = div - REG((i2c_base-i2c_scll));
 
-   REG(I2C_OA) = slaveadd;
-   REG(I2C_CNT) = 0;
+   REG((i2c_base-i2c_oa)) = slaveadd;
+   REG((i2c_base-i2c_cnt)) = 0;
 
/* Interrupts must be enabled or I2C module won't work */
-   REG(I2C_IE) = I2C_IE_SCD_IE | I2C_IE_XRDY_IE |
+   REG((i2c_base-i2c_ie)) = I2C_IE_SCD_IE | I2C_IE_XRDY_IE |
I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | I2C_IE_NACK_IE;
 
/* Now enable I2C controller (get it out of reset) */
-   REG(I2C_CON) = I2C_CON_EN;
+   REG((i2c_base-i2c_con)) = I2C_CON_EN;
 
udelay(1000);
+
+#ifdef CONFIG_I2C_MULTI_BUS
+   if (gd-flags  GD_FLG_RELOC)
+   

[U-Boot] [U-Boot PATCH v2 09/12] keystone2: add keystone multicore navigator driver

2014-02-20 Thread Murali Karicheri
From: Vitaly Andrianov vita...@ti.com

Multicore navigator consists of Network Coprocessor (NetCP) and
Queue Manager sub system. More details on the hardware can
be obtained from the following links:-

Network Coprocessor: http://www.ti.com/lit/pdf/sprugz6
Multicore Navigator: http://www.ti.com/lit/pdf/sprugr9

Multicore navigator driver implements APIs to configure
the Queue Manager and NetCP Pkt DMA.

Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 - Updated based on review comments
 arch/arm/cpu/armv7/keystone/Makefile  |1 +
 arch/arm/cpu/armv7/keystone/keystone_nav.c|  376 +
 arch/arm/include/asm/arch-keystone/keystone_nav.h |  193 +++
 3 files changed, 570 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/keystone/keystone_nav.c
 create mode 100644 arch/arm/include/asm/arch-keystone/keystone_nav.h

diff --git a/arch/arm/cpu/armv7/keystone/Makefile 
b/arch/arm/cpu/armv7/keystone/Makefile
index 7924cfa..7d0374b 100644
--- a/arch/arm/cpu/armv7/keystone/Makefile
+++ b/arch/arm/cpu/armv7/keystone/Makefile
@@ -11,6 +11,7 @@ obj-y += psc.o
 obj-y  += clock.o
 obj-y  += cmd_clock.o
 obj-y  += cmd_mon.o
+obj-y  += keystone_nav.o
 obj-y  += msmc.o
 obj-$(CONFIG_SPL_BUILD)+= spl.o
 obj-y  += ddr3.o
diff --git a/arch/arm/cpu/armv7/keystone/keystone_nav.c 
b/arch/arm/cpu/armv7/keystone/keystone_nav.c
new file mode 100644
index 000..39d6f99
--- /dev/null
+++ b/arch/arm/cpu/armv7/keystone/keystone_nav.c
@@ -0,0 +1,376 @@
+/*
+ * Multicore Navigator driver for TI Keystone 2 devices.
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated, www.ti.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include common.h
+#include asm/io.h
+#include asm/arch/keystone_nav.h
+
+static int soc_type =
+#ifdef CONFIG_SOC_K2HK
+   k2hk;
+#endif
+
+struct qm_config k2hk_qm_memmap = {
+   .stat_cfg   = 0x02a4,
+   .queue  = (struct qm_reg_queue *)0x02a8,
+   .mngr_vbusm = 0x23a8,
+   .i_lram = 0x0010,
+   .proxy  = (struct qm_reg_queue *)0x02ac,
+   .status_ram = 0x02a06000,
+   .mngr_cfg   = (struct qm_cfg_reg *)0x02a02000,
+   .intd_cfg   = 0x02a0c000,
+   .desc_mem   = (struct descr_mem_setup_reg *)0x02a03000,
+   .region_num = 64,
+   .pdsp_cmd   = 0x02a2,
+   .pdsp_ctl   = 0x02a0f000,
+   .pdsp_iram  = 0x02a1,
+   .qpool_num  = 4000,
+};
+
+/*
+ * We are going to use only one type of descriptors - host packet
+ * descriptors. We staticaly allocate memory for them here
+ */
+struct qm_host_desc desc_pool[HDESC_NUM] __aligned(sizeof(struct 
qm_host_desc));
+
+static struct qm_config *qm_cfg;
+
+inline int num_of_desc_to_reg(int num_descr)
+{
+   int j, num;
+
+   for (j = 0, num = 32; j  15; j++, num *= 2) {
+   if (num_descr = num)
+   return j;
+   }
+
+   return 15;
+}
+
+static int _qm_init(struct qm_config *cfg)
+{
+   u32 j;
+
+   if (cfg == NULL)
+   return QM_ERR;
+
+   qm_cfg = cfg;
+
+   qm_cfg-mngr_cfg-link_ram_base0= qm_cfg-i_lram;
+   qm_cfg-mngr_cfg-link_ram_size0= HDESC_NUM * 8;
+   qm_cfg-mngr_cfg-link_ram_base1= 0;
+   qm_cfg-mngr_cfg-link_ram_size1= 0;
+   qm_cfg-mngr_cfg-link_ram_base2= 0;
+
+   qm_cfg-desc_mem[0].base_addr = (u32)desc_pool;
+   qm_cfg-desc_mem[0].start_idx = 0;
+   qm_cfg-desc_mem[0].desc_reg_size =
+   (((sizeof(struct qm_host_desc)  4) - 1)  16) |
+   num_of_desc_to_reg(HDESC_NUM);
+
+   memset(desc_pool, 0, sizeof(desc_pool));
+   for (j = 0; j  HDESC_NUM; j++)
+   qm_push(desc_pool[j], qm_cfg-qpool_num);
+
+   return QM_OK;
+}
+
+int qm_init(void)
+{
+   switch (soc_type) {
+   case k2hk:
+   return _qm_init(k2hk_qm_memmap);
+   }
+
+   return QM_ERR;
+}
+
+void qm_close(void)
+{
+   u32 j;
+
+   if (qm_cfg == NULL)
+   return;
+
+   queue_close(qm_cfg-qpool_num);
+
+   qm_cfg-mngr_cfg-link_ram_base0= 0;
+   qm_cfg-mngr_cfg-link_ram_size0= 0;
+   qm_cfg-mngr_cfg-link_ram_base1= 0;
+   qm_cfg-mngr_cfg-link_ram_size1= 0;
+   qm_cfg-mngr_cfg-link_ram_base2= 0;
+
+   for (j = 0; j  qm_cfg-region_num; j++) {
+   qm_cfg-desc_mem[j].base_addr = 0;
+   qm_cfg-desc_mem[j].start_idx = 0;
+   qm_cfg-desc_mem[j].desc_reg_size = 0;
+   }
+
+   qm_cfg = NULL;
+}
+
+void qm_push(struct qm_host_desc *hd, u32 qnum)
+{
+   u32 regd;
+
+   if (!qm_cfg)
+   return;
+
+   cpu_to_bus((u32 *)hd, sizeof(struct qm_host_desc)/4);
+   regd = (u32)hd | ((sizeof(struct qm_host_desc)  4) - 1);
+   

[U-Boot] [U-Boot PATCH v2 10/12] keystone2: net: add keystone ethernet driver

2014-02-20 Thread Murali Karicheri
From: Vitaly Andrianov vita...@ti.com

Ethernet driver configures the CPSW, SGMI and Phy and uses
the the Navigator APIs. The driver supports 4 Ethernet ports and
can work with only one port at a time.

Port configurations are defined in board.c.

Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 - updated based on review comments
 arch/arm/include/asm/arch-keystone/emac_defs.h |  250 +++
 board/ti/k2hk_evm/board.c  |   65 ++
 drivers/net/Makefile   |1 +
 drivers/net/keystone_net.c |  859 
 include/configs/k2hk_evm.h |   38 ++
 5 files changed, 1213 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-keystone/emac_defs.h
 create mode 100644 drivers/net/keystone_net.c

diff --git a/arch/arm/include/asm/arch-keystone/emac_defs.h 
b/arch/arm/include/asm/arch-keystone/emac_defs.h
new file mode 100644
index 000..9c1c5bc
--- /dev/null
+++ b/arch/arm/include/asm/arch-keystone/emac_defs.h
@@ -0,0 +1,250 @@
+/*
+ * emac definitions for keystone2 devices
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated, www.ti.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _EMAC_DEFS_H_
+#define _EMAC_DEFS_H_
+
+#include asm/arch/hardware.h
+#include asm/io.h
+
+#define DEVICE_REG32_R(a)  readl(a)
+#define DEVICE_REG32_W(a, v)   writel(v, a)
+
+/*#define chipLmbd(x,y) _lmbd(x,y) */
+
+#define EMAC_EMACSL_BASE_ADDR  (KS2_PASS_BASE + 0x00090900)
+#define EMAC_MDIO_BASE_ADDR(KS2_PASS_BASE + 0x00090300)
+#define EMAC_SGMII_BASE_ADDR   (KS2_PASS_BASE + 0x00090100)
+
+#define KEYSTONE2_EMAC_GIG_ENABLE
+
+#define MAC_ID_BASE_ADDR   (KS2_DEVICE_STATE_CTRL_BASE + 0x110)
+
+#ifdef CONFIG_SOC_K2HK
+/* MDIO module input frequency */
+#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk))
+/* MDIO clock output frequency */
+#define EMAC_MDIO_CLOCK_FREQ   100 /* 1.0 MHz */
+#endif
+
+/* MII Status Register */
+#define MII_STATUS_REG 1
+#define MII_STATUS_LINK_MASK   (0x4)
+
+/* Marvell 88E PHY ID */
+#define PHY_MARVELL_88E(0x01410cc0)
+
+#define MDIO_CONTROL_IDLE  (0x8000)
+#define MDIO_CONTROL_ENABLE(0x4000)
+#define MDIO_CONTROL_FAULT_ENABLE  (0x4)
+#define MDIO_CONTROL_FAULT (0x8)
+#define MDIO_USERACCESS0_GO(0x8000)
+#define MDIO_USERACCESS0_WRITE_READ(0x0)
+#define MDIO_USERACCESS0_WRITE_WRITE   (0x4000)
+#define MDIO_USERACCESS0_ACK   (0x2000)
+
+#define EMAC_MACCONTROL_MIIEN_ENABLE   (0x20)
+#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE  (0x1)
+#define EMAC_MACCONTROL_GIGABIT_ENABLE (1  7)
+#define EMAC_MACCONTROL_GIGFORCE   (1  17)
+#define EMAC_MACCONTROL_RMIISPEED_100  (1  15)
+
+#define EMAC_MIN_ETHERNET_PKT_SIZE 60
+
+struct mac_sl_cfg {
+   u_int32_t max_rx_len;   /* Maximum receive packet length. */
+   u_int32_t ctl;  /* Control bitfield */
+};
+
+/*
+ * Definition: Control bitfields used in the ctl field of hwGmacSlCfg_t
+ */
+#define GMACSL_RX_ENABLE_RCV_CONTROL_FRAMES   (1  24)
+#define GMACSL_RX_ENABLE_RCV_SHORT_FRAMES (1  23)
+#define GMACSL_RX_ENABLE_RCV_ERROR_FRAMES (1  22)
+#define GMACSL_RX_ENABLE_EXT_CTL  (1  18)
+#define GMACSL_RX_ENABLE_GIG_FORCE(1  17)
+#define GMACSL_RX_ENABLE_IFCTL_B  (1  16)
+#define GMACSL_RX_ENABLE_IFCTL_A  (1  15)
+#define GMACSL_RX_ENABLE_CMD_IDLE (1  11)
+#define GMACSL_TX_ENABLE_SHORT_GAP(1  10)
+#define GMACSL_ENABLE_GIG_MODE(1   7)
+#define GMACSL_TX_ENABLE_PACE (1   6)
+#define GMACSL_ENABLE (1   5)
+#define GMACSL_TX_ENABLE_FLOW_CTL (1   4)
+#define GMACSL_RX_ENABLE_FLOW_CTL (1   3)
+#define GMACSL_ENABLE_LOOPBACK(1   1)
+#define GMACSL_ENABLE_FULL_DUPLEX (1   0)
+
+/*
+ * DEFINTITION: function return values
+ */
+#define GMACSL_RET_OK0
+#define GMACSL_RET_INVALID_PORT -1
+#define GMACSL_RET_WARN_RESET_INCOMPLETE-2
+#define GMACSL_RET_WARN_MAXLEN_TOO_BIG  -3
+#define GMACSL_RET_CONFIG_FAIL_RESET_ACTIVE -4
+
+/* Register offsets */
+#define CPGMACSL_REG_ID 0x00
+#define CPGMACSL_REG_CTL0x04
+#define CPGMACSL_REG_STATUS 0x08
+#define CPGMACSL_REG_RESET  0x0c
+#define CPGMACSL_REG_MAXLEN 0x10
+#define CPGMACSL_REG_BOFF   0x14
+#define CPGMACSL_REG_RX_PAUSE   0x18
+#define CPGMACSL_REG_TX_PAURSE  0x1c
+#define CPGMACSL_REG_EM_CTL 0x20
+#define CPGMACSL_REG_PRI0x24
+
+/* Soft reset register values */

[U-Boot] [U-Boot PATCH v2 03/12] tools: mkimage: add support for gpimage format

2014-02-20 Thread Murali Karicheri
This patch add support for gpimage format as a preparatory
patch for porting u-boot for keystone2 devices and is
based on omapimage format. It re-uses gph header to store the
size and loadaddr as done in omapimage.c

Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
 - No update since v1
 common/image.c |1 +
 include/image.h|1 +
 tools/Makefile |6 +++
 tools/gpheader.h   |   40 +++
 tools/gpimage-common.c |   80 +
 tools/gpimage.c|   77 +++
 tools/imagetool.c  |2 +
 tools/imagetool.h  |1 +
 tools/omapimage.c  |  104 
 tools/omapimage.h  |5 ---
 10 files changed, 224 insertions(+), 93 deletions(-)
 create mode 100644 tools/gpheader.h
 create mode 100644 tools/gpimage-common.c
 create mode 100644 tools/gpimage.c

diff --git a/common/image.c b/common/image.c
index ae95c3f..cb5c656 100644
--- a/common/image.c
+++ b/common/image.c
@@ -124,6 +124,7 @@ static const table_entry_t uimage_type[] = {
{   IH_TYPE_FILESYSTEM, filesystem, Filesystem Image,   },
{   IH_TYPE_FIRMWARE,   firmware,   Firmware,   },
{   IH_TYPE_FLATDT, flat_dt,Flat Device Tree,   },
+   {   IH_TYPE_GPIMAGE,gpimage,TI Keystone SPL Image,},
{   IH_TYPE_KERNEL, kernel, Kernel Image,   },
{   IH_TYPE_KERNEL_NOLOAD, kernel_noload,  Kernel Image (no 
loading done), },
{   IH_TYPE_KWBIMAGE,   kwbimage,   Kirkwood Boot Image,},
diff --git a/include/image.h b/include/image.h
index 7de2bb2..0a3d346 100644
--- a/include/image.h
+++ b/include/image.h
@@ -214,6 +214,7 @@ struct lmb;
 #define IH_TYPE_KERNEL_NOLOAD  14  /* OS Kernel Image, can run from any 
load address */
 #define IH_TYPE_PBLIMAGE   15  /* Freescale PBL Boot Image */
 #define IH_TYPE_MXSIMAGE   16  /* Freescale MXSBoot Image  */
+#define IH_TYPE_GPIMAGE17  /* TI Keystone GPHeader Image   
*/
 
 /*
  * Compression Types
diff --git a/tools/Makefile b/tools/Makefile
index 3c719b3..421aba5 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -77,6 +77,8 @@ NOPED_OBJ_FILES-y += aisimage.o
 NOPED_OBJ_FILES-y += default_image.o
 NOPED_OBJ_FILES-y += dumpimage.o
 NOPED_OBJ_FILES-y += fit_image.o
+NOPED_OBJ_FILES-y += gpimage.o
+NOPED_OBJ_FILES-y += gpimage-common.o
 NOPED_OBJ_FILES-y += imagetool.o
 NOPED_OBJ_FILES-y += image-host.o
 NOPED_OBJ_FILES-y += imximage.o
@@ -211,6 +213,8 @@ $(obj)dumpimage$(SFX):  $(obj)aisimage.o \
$(obj)default_image.o \
$(obj)dumpimage.o \
$(obj)fit_image.o \
+   $(obj)gpimage.o \
+   $(obj)gpimage-common.o \
$(obj)image.o \
$(obj)imagetool.o \
$(obj)image-fit.o \
@@ -239,6 +243,8 @@ $(obj)mkimage$(SFX):$(obj)aisimage.o \
$(obj)crc32.o \
$(obj)default_image.o \
$(obj)fit_image.o \
+   $(obj)gpimage.o \
+   $(obj)gpimage-common.o \
$(obj)image.o \
$(obj)imagetool.o \
$(obj)image-host.o \
diff --git a/tools/gpheader.h b/tools/gpheader.h
new file mode 100644
index 000..63a28a2
--- /dev/null
+++ b/tools/gpheader.h
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated
+ * Refactored common functions in to gpimage-common.c. Include this common
+ * header file
+ *
+ * (C) Copyright 2010
+ * Linaro LTD, www.linaro.org
+ * Author: John Rigby john.ri...@linaro.org
+ * Based on TI's signGP.c
+ *
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sba...@denx.de.
+ *
+ * (C) Copyright 2008
+ * Marvell Semiconductor www.marvell.com
+ * Written-by: Prafulla Wadaskar prafu...@marvell.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _GPIMAGE_H_
+#define _GPIMAGE_H_
+
+/* common headers for gpimage and omapimage formats */
+struct gp_header {
+   uint32_t size;
+   uint32_t load_addr;
+};
+#define GPIMAGE_HDR_SIZE (sizeof(struct gp_header))
+
+/* common functions across gpimage and omapimage handlers */
+int valid_gph_size(uint32_t size);
+int valid_gph_load_addr(uint32_t load_addr);
+int gph_verify_header(struct gp_header *gph, int be);
+void gph_print_header(const struct gp_header *gph, int be);
+void gph_set_header(struct gp_header *gph, uint32_t size, uint32_t load_addr,
+   int be);
+int gpimage_check_params(struct image_tool_params *params);
+#endif
diff --git a/tools/gpimage-common.c b/tools/gpimage-common.c
new file mode 100644
index 000..b343a3a
--- /dev/null
+++ b/tools/gpimage-common.c
@@ 

[U-Boot] [U-Boot PATCH v2 06/12] i2c, davinci: move i2c_defs.h to the drivers/i2c directory

2014-02-20 Thread Murali Karicheri
This patch moves the davinci i2c_defs.h file to drivers.i2c directory.
It will allow to reuse the davinci_i2c driver for TI Keystone2 SOCs.

Not used git mv command to move the file because small part of
it with definitions specific for Davinci SOCs has to remain in the
arch/arm/include/asm/arch-davinci.

Signed-off-by: Vitaly Andrianov vita...@ti.com
---
 - updated based on review comments
 arch/arm/include/asm/arch-davinci/i2c_defs.h |   71 ++--
 drivers/i2c/davinci_i2c.c|1 +
 drivers/i2c/davinci_i2c.h|   75 ++
 3 files changed, 79 insertions(+), 68 deletions(-)
 create mode 100644 drivers/i2c/davinci_i2c.h

diff --git a/arch/arm/include/asm/arch-davinci/i2c_defs.h 
b/arch/arm/include/asm/arch-davinci/i2c_defs.h
index c388dc0..06da894 100644
--- a/arch/arm/include/asm/arch-davinci/i2c_defs.h
+++ b/arch/arm/include/asm/arch-davinci/i2c_defs.h
@@ -1,16 +1,13 @@
 /*
- * (C) Copyright 2004
+ * (C) Copyright 2004-2014
  * Texas Instruments, www.ti.com
  *
  * Some changes copyright (C) 2007 Sergey Kubushyn k...@koi8.net
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
-#ifndef _DAVINCI_I2C_H_
-#define _DAVINCI_I2C_H_
-
-#define I2C_WRITE  0
-#define I2C_READ   1
+#ifndef _I2C_DEFS_H_
+#define _I2C_DEFS_H_
 
 #ifndef CONFIG_SOC_DA8XX
 #define I2C_BASE   0x01c21000
@@ -18,66 +15,4 @@
 #define I2C_BASE   0x01c22000
 #endif
 
-#defineI2C_OA  (I2C_BASE + 0x00)
-#define I2C_IE (I2C_BASE + 0x04)
-#define I2C_STAT   (I2C_BASE + 0x08)
-#define I2C_SCLL   (I2C_BASE + 0x0c)
-#define I2C_SCLH   (I2C_BASE + 0x10)
-#define I2C_CNT(I2C_BASE + 0x14)
-#define I2C_DRR(I2C_BASE + 0x18)
-#define I2C_SA (I2C_BASE + 0x1c)
-#define I2C_DXR(I2C_BASE + 0x20)
-#define I2C_CON(I2C_BASE + 0x24)
-#define I2C_IV (I2C_BASE + 0x28)
-#define I2C_PSC(I2C_BASE + 0x30)
-
-/* I2C masks */
-
-/* I2C Interrupt Enable Register (I2C_IE): */
-#define I2C_IE_SCD_IE  (1  5)/* Stop condition detect interrupt 
enable */
-#define I2C_IE_XRDY_IE (1  4)/* Transmit data ready interrupt enable 
*/
-#define I2C_IE_RRDY_IE (1  3)/* Receive data ready interrupt enable 
*/
-#define I2C_IE_ARDY_IE (1  2)/* Register access ready interrupt 
enable */
-#define I2C_IE_NACK_IE (1  1)/* No acknowledgment interrupt enable */
-#define I2C_IE_AL_IE   (1  0)/* Arbitration lost interrupt enable */
-
-/* I2C Status Register (I2C_STAT): */
-
-#define I2C_STAT_BB(1  12)   /* Bus busy */
-#define I2C_STAT_ROVR  (1  11)   /* Receive overrun */
-#define I2C_STAT_XUDF  (1  10)   /* Transmit underflow */
-#define I2C_STAT_AAS   (1  9)/* Address as slave */
-#define I2C_STAT_SCD   (1  5)/* Stop condition detect */
-#define I2C_STAT_XRDY  (1  4)/* Transmit data ready */
-#define I2C_STAT_RRDY  (1  3)/* Receive data ready */
-#define I2C_STAT_ARDY  (1  2)/* Register access ready */
-#define I2C_STAT_NACK  (1  1)/* No acknowledgment interrupt enable */
-#define I2C_STAT_AL(1  0)/* Arbitration lost interrupt enable */
-
-
-/* I2C Interrupt Code Register (I2C_INTCODE): */
-
-#define I2C_INTCODE_MASK   7
-#define I2C_INTCODE_NONE   0
-#define I2C_INTCODE_AL 1   /* Arbitration lost */
-#define I2C_INTCODE_NAK2   /* No acknowledgement/general 
call */
-#define I2C_INTCODE_ARDY   3   /* Register access ready */
-#define I2C_INTCODE_RRDY   4   /* Rcv data ready */
-#define I2C_INTCODE_XRDY   5   /* Xmit data ready */
-#define I2C_INTCODE_SCD6   /* Stop condition detect */
-
-
-/* I2C Configuration Register (I2C_CON): */
-
-#define I2C_CON_EN (1  5)/* I2C module enable */
-#define I2C_CON_STB(1  4)/* Start byte mode (master mode only) */
-#define I2C_CON_MST(1  10)   /* Master/slave mode */
-#define I2C_CON_TRX(1  9)/* Transmitter/receiver mode (master 
mode only) */
-#define I2C_CON_XA (1  8)/* Expand address */
-#define I2C_CON_STP(1  11)   /* Stop condition (master mode only) */
-#define I2C_CON_STT(1  13)   /* Start condition (master mode only) */
-#define I2C_CON_FREE   (1  14)   /* Free run on emulation */
-
-#define I2C_TIMEOUT0x  /* Timeout mask for poll_i2c_irq() */
-
 #endif
diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c
index e56fe75..6e5260c 100644
--- a/drivers/i2c/davinci_i2c.c
+++ b/drivers/i2c/davinci_i2c.c
@@ -12,6 +12,7 @@
 #include i2c.h
 #include asm/arch/hardware.h
 #include asm/arch/i2c_defs.h
+#include davinci_i2c.h
 
 #define CHECK_NACK() \
do {\
diff --git a/drivers/i2c/davinci_i2c.h 

[U-Boot] [U-Boot PATCH v2 12/12] k2hk-evm: add configuration for spi1 and spi2 support

2014-02-20 Thread Murali Karicheri
currently only spi0 is enabled on k2hk evm. This
configuration update is needed to enable spi1 and spi2.

Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
 include/configs/k2hk_evm.h |9 +
 1 file changed, 9 insertions(+)

diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index 33c7551..861010a 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -85,7 +85,16 @@
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_DAVINCI_SPI
+#define CONFIG_SYS_SPI0
 #define CONFIG_SYS_SPI_BASEK2HK_SPI_BASE
+#define CONFIG_SYS_SPI0_NUM_CS 4
+#define CONFIG_SYS_SPI1
+#define CONFIG_SYS_SPI1_BASEK2HK_SPI1_BASE
+#define CONFIG_SYS_SPI1_NUM_CS 4
+#define CONFIG_SYS_SPI2
+#define CONFIG_SYS_SPI2_NUM_CS 4
+#define CONFIG_SYS_SPI2_BASEK2HK_SPI2_BASE
+#define CONFIG_CMD_SPI
 #define CONFIG_SYS_SPI_CLK clk_get_rate(K2HK_LPSC_EMIF25_SPI)
 #define CONFIG_SF_DEFAULT_SPEED3000
 #define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
-- 
1.7.9.5

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[U-Boot] [U-Boot PATCH v2 11/12] spi: davinci: add support for multiple bus and chip select

2014-02-20 Thread Murali Karicheri
From: Rex Chang rch...@ti.com

Currently davinci spi driver supports only bus 0 cs 0.
This patch allows driver to support bus 1 and bus 2 with
configurable number of chip selects. Also defaults are
selected in a way to avoid regression on other platforms
that uses davinci spi driver and has only one spi bus.

Signed-off-by: Rex Chang rch...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
 drivers/spi/davinci_spi.c |   62 ++---
 drivers/spi/davinci_spi.h |   33 
 2 files changed, 91 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index e3fb321..c708a04 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -23,7 +23,7 @@ void spi_init()
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
 {
-   struct davinci_spi_slave*ds;
+   struct davinci_spi_slave*ds;
 
if (!spi_cs_is_valid(bus, cs))
return NULL;
@@ -32,7 +32,27 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned 
int cs,
if (!ds)
return NULL;
 
-   ds-regs = (struct davinci_spi_regs *)CONFIG_SYS_SPI_BASE;
+   ds-slave.bus = bus;
+   ds-slave.cs = cs;
+
+   switch (bus) {
+   case SPI0_BUS:
+   ds-regs = (struct davinci_spi_regs *)SPI0_BASE;
+   break;
+#ifdef CONFIG_SYS_SPI1
+   case SPI1_BUS:
+   ds-regs = (struct davinci_spi_regs *)SPI0_BASE;
+   break;
+#endif
+#ifdef CONFIG_SYS_SPI2
+   case SPI2_BUS:
+   ds-regs = (struct davinci_spi_regs *)SPI2_BASE;
+   break;
+#endif
+   default: /* Invalid bus number */
+   return NULL;
+   }
+
ds-freq = max_hz;
 
return ds-slave;
@@ -59,7 +79,7 @@ int spi_claim_bus(struct spi_slave *slave)
writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, ds-regs-gcr1);
 
/* CS, CLK, SIMO and SOMI are functional pins */
-   writel((SPIPC0_EN0FUN_MASK | SPIPC0_CLKFUN_MASK |
+   writel(((1  slave-cs) | SPIPC0_CLKFUN_MASK |
SPIPC0_DOFUN_MASK | SPIPC0_DIFUN_MASK), ds-regs-pc0);
 
/* setup format */
@@ -262,9 +282,43 @@ out:
return 0;
 }
 
+#ifdef CONFIG_SYS_SPI1
+static int bus1_cs_valid(unsigned int bus, unsigned int cs)
+{
+   if ((bus == SPI1_BUS)  (cs  SPI1_NUM_CS))
+   return 1;
+   return 0;
+}
+#else
+static int bus1_cs_valid(unsigned int bus, unsigned int cs)
+{
+   return 0;
+}
+#endif
+
+#ifdef CONFIG_SYS_SPI2
+static int bus2_cs_valid(unsigned int bus, unsigned int cs)
+{
+   if ((bus == SPI2_BUS)  (cs  SPI2_NUM_CS))
+   return 1;
+   return 0;
+}
+#else
+static int bus2_cs_valid(unsigned int bus, unsigned int cs)
+{
+   return 0;
+}
+#endif
+
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-   return bus == 0  cs == 0;
+   if ((bus == SPI0_BUS)  (cs  SPI0_NUM_CS))
+   return 1;
+   else if (bus1_cs_valid(bus, cs))
+   return 1;
+   else if (bus2_cs_valid(bus, cs))
+   return 1;
+   return 0;
 }
 
 void spi_cs_activate(struct spi_slave *slave)
diff --git a/drivers/spi/davinci_spi.h b/drivers/spi/davinci_spi.h
index 33f69b5..d4612d3 100644
--- a/drivers/spi/davinci_spi.h
+++ b/drivers/spi/davinci_spi.h
@@ -74,6 +74,39 @@ struct davinci_spi_regs {
 /* SPIDEF */
 #define SPIDEF_CSDEF0_MASK BIT(0)
 
+#define SPI0_BUS   0
+#define SPI0_BASE  CONFIG_SYS_SPI_BASE
+/*
+ * Define default SPI0_NUM_CS as 1 for existing platforms that uses this
+ * driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS
+ * if more than one CS is supported and by defining CONFIG_SYS_SPI0.
+ */
+#ifndef CONFIG_SYS_SPI0
+#define SPI0_NUM_CS1
+#else
+#define SPI0_NUM_CSCONFIG_SYS_SPI0_NUM_CS
+#endif
+
+/*
+ * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and
+ * CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus
+ */
+#ifdef CONFIG_SYS_SPI1
+#define SPI1_BUS   1
+#define SPI1_NUM_CSCONFIG_SYS_SPI1_NUM_CS
+#define SPI1_BASE  CONFIG_SYS_SPI1_BASE
+#endif
+
+/*
+ * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and
+ * CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus
+ */
+#ifdef CONFIG_SYS_SPI2
+#define SPI2_BUS   2
+#define SPI2_NUM_CSCONFIG_SYS_SPI2_NUM_CS
+#define SPI2_BASE  CONFIG_SYS_SPI2_BASE
+#endif
+
 struct davinci_spi_slave {
struct spi_slave slave;
struct davinci_spi_regs *regs;
-- 
1.7.9.5

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[U-Boot] Questions on adding a new type to mkimage

2014-02-20 Thread Charles Manning
I am in the throes of extending mkimage to add socfpga support. This is my 
first time in mkimage, so please forgive me being on a learning curve.

It seems that the most normal path for mkimage signers is to append some 
sort of header to the front of the image
ie the flow is

write header out
copy image data with copy_file
call set_header

The socfpga preloader needs something a bit different. It does not add a 
header, but instead adds a tail (CRC+padding) and mashes some bytes into a 
known place in the image.

Unfortunately the mkimage framework does not seem to provide an add tail 
function which is really what is needed here.

The only way I can see to extend the size of the image, using the normal 
mkimage workflow would be to do something like this:

*Provide vrec_header which adds a fake header of 64k - input_size.
* Allow copy_file to then do the copy step.
* I now have a 64k image which is 64k-size 0 bytes, followed by the actual 
input_data.
* When set_header is called, shift the actual input data to where it should 
be, add the CRC and fix up the padding.

This seems needlessly contrived to work with the framework.

Or the alternative might be just to treat this as a special case

Thoughts/opinions???

Thanks

Charles


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Re: [U-Boot] [linux-sunxi] Re: [PATCH v2 3/3] ahci: provide sunxi SATA driver using AHCI platform framework

2014-02-20 Thread Rob Herring
On Thu, Feb 20, 2014 at 10:06 AM, Ian Campbell i...@hellion.org.uk wrote:
 On Thu, 2014-02-20 at 09:24 -0600, Rob Herring wrote:
  +#define AHCI_PHYCS0R 0x00c0
  +#define AHCI_PHYCS1R 0x00c4
  +#define AHCI_PHYCS2R 0x00c8
 [...]
  +#define AHCI_RWCR 0x00fc

 These registers are not sunxi specific, but part of a certain vendor's
 IP found in several SOCs. I can't tell you who, but it shouldn't be
 too hard to figure out.

 Actually, only the 4 above are used here and if I'm guessing which
 certain vendor you mean correctly then the code for those has these in
 its register map as reserved and doesn't touch them (this is true in
 both of the similar drivers I looked at).

 The rest of the registers in that list did look a lot the DW part
 (judging from the existing u-boot drivers) though.

There may be others that do this setup in firmware.

  +#define BIT(x) (1x)
  +static u32 sunxi_getbits(u8 *reg, u8 mask, u8 shift)
  +{
  +   return (readl(reg)  shift)  mask;
  +}
  +
  +static int sunxi_ahci_phy_init(u32 base)
  +{
 [...magic...]
  +

 I would guess this code or something very similar already exists in u-boot.

 I've had a look in the most obvious files in drivers/block/ and I don't
 see anything. Perhaps I should look harder.

 FWIW I also couldn't find anything similar in linux/drivers/ata.

I thought iMX needed something like this, but it doesn't look like it
now. Perhaps they figured out the bootrom is doing all this and it is
not really necessary to redo.

I don't really have any concrete suggestions here. I'm just
highlighting potential duplication. We already have 2 AHCI drivers in
u-boot. I think dwc_ahsata.c is the cleaner implementation, but ahci.c
is probably more well tested now. The Chromium folks have done various
fixes as has Calxeda. I think dwc_ahsata.c is only used for i.MX and
SATA is not the primary storage interface for most i.MX designs.

Rob
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Re: [U-Boot] [RFC] [PATCH] rewrite doc/README.arm-unaligned-accesses

2014-02-20 Thread Tom Rini
On Tue, Feb 18, 2014 at 01:52:42PM +0100, Albert ARIBAUD wrote:

 There has been a few back-and-forths (and sideways too) about how
 unaligned accesses are considered in ARM U-Boot. This post is to (try
 and) get us together in one place, get things straight about what is
 currently done and why as far as alignment is concerned, and to get
 doc/README.arm-unaligned-accesses is clear and consistent with it.

I agree that we need to get on the same page and understand what is and
isn't (and is and cannot be done for us) going on, so we can get back to
bigger problems that need solving.

I wonder if we shouldn't largely crib from
https://www.kernel.org/doc/Documentation/unaligned-memory-access.txt and
modify the examples to be relevant to our sources, and perhaps drop the
networking section (as that doesn't directly apply).

And as an aside, building with -Wcast-align shows some places we _may_
need to investigate.

[snip]
 +ii) In order to make sure the following is self-sufficient, it goes
 +through the basics of alignment and assumes only good, not expert,
 +knowledge of the C language.
 +
 +1. C99 alignment requirements
 +
 +The C99 standard [1] (henceforth: 'C99') defines alignment requirements
 +as a requirement that objects of a particular type be located on
 +storage boundaries with addresses that are particular multiples of a
 +byte address.
 +
 +In C99, unaligned accesses (those which which do not respect alignment
 +requirements of the object type being accessed) are deemed 'undefined'.
 +This means programs which contain unaligned accesses might build and
 +execute as if there were no alignment constraints, or build and execute
 +but not as expected, or build and crash at execution, or not build
 +at all--or even crash the compiler.

OK.

 +2. Implementation alignment requirements
 +
 +While C99 does define alignment requirements, it does not lay out any
 +actual alignment requirements, because these depend greatly on the
 +hardware involved; they are thus defined by C99 implementations.
 +
 +For ARM, the C alignment requirements are laid out in the ARM EABI [2].
 +For instance, is is the ARM EABI which sets the alignment constraint of
 +type 'long' to four-byte boundaries.
 +
 +Alignment requirements for a given architecture may differ from
 +hardware capabilities, i.e. they might be stricter than what the
 +hardware can actually do. One example is (32-bit) x86, which can do
 +unaligned accesses at the hardware level at some performance cost, but
 +has stricter requirement analogous to the ARM EABI ones. ARM is a mixed
 +bag: some older ARM hardware cannot perform unaligned access at all;
 +some can but at a cost; some can at virtually no cost.
 +
 +Further, even when a given architecture is capable of emitting such
 +unaligned accesses at the core or CPU level, at a higher (system) level
 +they might be forbidden because the target address falls within a
 +region in which only aligned accesses are possible.

The compiler must make reasonable decisions based on what it knows about
a particular architecture and ABI based on what it can know.  The
developer must make correct decisions based on things the compiler
cannot know such as memory region constraints.

 +3. Native vs emulated unaligned accesses.
 +
 +There is a different between the alignment of accesses in a C program
 +source code and the alignment of accesses at the core or CPU level. In
 +the following, translated accesses (core or CPU accesses) will be
 +qualified as /native/ accesses to distinguish them from (untranslated) C
 +program accesses.
 +
 +A C99 implementation might translate an unaligned access into a native
 +unaligned access, or it might emulate it by a combination of native
 +aligned accesses. 

This isn't relevant, given the contraint on the compiler to do sane
things for a given architecture.

 +4. Alignment requirements in U-Boot
 +
 +As U-Boot runs on a variety of hardware using a variety of C99
 +implementations, alignment requirements for the U-Boot code are the
 +strictest possible so that all implementations building U-Boot will have
 +their requirements satisfied. For instance, aligning longs to four-byte
 +boundaries is compatible with all implementations and is thus the
 +requirement for U-Boot.
 +
 +[U-Boot alignment requirements are actually stricter than just C99: in
 +U-Boot, at least some accesses of a given width must not be broken into
 +smaller accesses or lumped into a wider access, because they are done
 +to or from a device for which each physical access may have side
 +effects. C99 does not explicitly state such a constraint except in
 +general terms, that a C99 implementation .]
 +
 +The strict alignment requirements imply that all type declarations in
 +U-Boot should respect alignment requirements; especially, that no
 +structure should contain unaligned members.

This is where I moderately disagree.  I agree we don't want to make
things unaligned for no reason in data structures.

 +5. 

[U-Boot] [PATCH] socfpga: Add a signer that is integrated into mkimage

2014-02-20 Thread Charles Manning
This tool signs a preloader (built from SPL) when CONFIG_SOCFPGA is set.

Signed-off-by: Charles Manning cdhmann...@gmail.com
---
 common/image.c   |1 +
 include/image.h  |1 +
 spl/Makefile |8 ++
 tools/Makefile   |2 +
 tools/mkimage.c  |2 +
 tools/mkimage.h  |1 +
 tools/socfpgaimage.c |  343 ++
 7 files changed, 358 insertions(+)
 create mode 100644 tools/socfpgaimage.c

diff --git a/common/image.c b/common/image.c
index 95498e6..1a2e107 100644
--- a/common/image.c
+++ b/common/image.c
@@ -144,6 +144,7 @@ static const table_entry_t uimage_type[] = {
{   IH_TYPE_INVALID,NULL, Invalid Image,  },
{   IH_TYPE_MULTI,  multi,  Multi-File Image,   },
{   IH_TYPE_OMAPIMAGE,  omapimage,  TI OMAP SPL With GP CH,},
+   {   IH_TYPE_SOCFPGAIMAGE,  socfpgaimage,  Altera SOCFPGA 
preloader,},
{   IH_TYPE_PBLIMAGE,   pblimage,   Freescale PBL Boot Image,},
{   IH_TYPE_RAMDISK,ramdisk,RAMDisk Image,  },
{   IH_TYPE_SCRIPT, script, Script, },
diff --git a/include/image.h b/include/image.h
index f5adc50..95a0bf7 100644
--- a/include/image.h
+++ b/include/image.h
@@ -166,6 +166,7 @@
 #define IH_TYPE_AISIMAGE   13  /* TI Davinci AIS Image */
 #define IH_TYPE_KERNEL_NOLOAD  14  /* OS Kernel Image, can run from any 
load address */
 #define IH_TYPE_PBLIMAGE   15  /* Freescale PBL Boot Image */
+#define IH_TYPE_SOCFPGAIMAGE   16  /* Altera SOCFPGA Preloader Image   
*/
 
 /*
  * Compression Types
diff --git a/spl/Makefile b/spl/Makefile
index c0abe3d..8f061b0 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -144,8 +144,12 @@ $(OBJTREE)/MLO:$(obj)u-boot-spl.bin
 
 $(OBJTREE)/MLO.byteswap: $(obj)u-boot-spl.bin
$(OBJTREE)/tools/mkimage -T omapimage -n byteswap \
+
-a $(CONFIG_SPL_TEXT_BASE) -d $ $@
 
+$(OBJTREE)/socfpga-signed-preloader.bin: $(obj)u-boot-spl.bin
+   $(OBJTREE)/tools/mkimage -T socfpgaimage -d $ $@
+
 ifneq ($(CONFIG_IMX_CONFIG),)
 $(OBJTREE)/SPL:$(obj)u-boot-spl.bin
$(OBJTREE)/tools/mkimage -n  $(SRCTREE)/$(CONFIG_IMX_CONFIG) -T 
imximage \
@@ -154,6 +158,10 @@ endif
 
 ALL-y  += $(obj)u-boot-spl.bin
 
+ifdef CONFIG_SOCFPGA
+ALL-y += $(OBJTREE)/socfpga-signed-preloader.bin
+endif
+
 ifdef CONFIG_SAMSUNG
 ALL-y  += $(obj)$(BOARD)-spl.bin
 endif
diff --git a/tools/Makefile b/tools/Makefile
index 686840a..52f4bfc 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -95,6 +95,7 @@ NOPED_OBJ_FILES-y += kwbimage.o
 NOPED_OBJ_FILES-y += pblimage.o
 NOPED_OBJ_FILES-y += imximage.o
 NOPED_OBJ_FILES-y += omapimage.o
+NOPED_OBJ_FILES-y += socfpgaimage.o
 NOPED_OBJ_FILES-y += mkenvimage.o
 NOPED_OBJ_FILES-y += mkimage.o
 OBJ_FILES-$(CONFIG_SMDK5250) += mkexynosspl.o
@@ -214,6 +215,7 @@ $(obj)mkimage$(SFX):$(obj)aisimage.o \
$(obj)mkimage.o \
$(obj)os_support.o \
$(obj)omapimage.o \
+   $(obj)socfpgaimage.o \
$(obj)sha1.o \
$(obj)ublimage.o \
$(LIBFDT_OBJS)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index e43b09f..87bacc0 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -167,6 +167,8 @@ main (int argc, char **argv)
init_ubl_image_type();
/* Init Davinci AIS support */
init_ais_image_type();
+   /* Init Altera SOCFPGA image generation/list support */
+   init_socfpga_image_type();
 
params.cmdname = *argv;
params.addr = params.ep = 0;
diff --git a/tools/mkimage.h b/tools/mkimage.h
index ea45f5c..eda4832 100644
--- a/tools/mkimage.h
+++ b/tools/mkimage.h
@@ -157,5 +157,6 @@ void init_default_image_type (void);
 void init_fit_image_type (void);
 void init_ubl_image_type(void);
 void init_omap_image_type(void);
+void init_socfpga_image_type(void);
 
 #endif /* _MKIIMAGE_H_ */
diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c
new file mode 100644
index 000..92abd93
--- /dev/null
+++ b/tools/socfpgaimage.c
@@ -0,0 +1,343 @@
+/*
+ * Copyright (C) 2014 Charles Manning cdhmann...@gmail.com
+ *
+ * Use as you see fit.
+ *
+ * Reference doc http://www.altera.com.cn/literature/hb/cyclone-v/cv_5400A.pdf
+ * Note this doc is not entirely accurate.
+ *
+ * Header is a structure of the following format.
+ * this is positioned at 0x40.
+ *
+ * Endian is LSB.
+ *
+ * Offset   Length   Usage
+ * ---
+ *  04   Validation word 0x31305341
+ *  41   Version (whatever, zero is fine)
+ *  51   Flags   (unused, zero is fine)
+ *  62   Length  (in units of u32, including the end checksum).
+ *  82   Zero
+ *   0x0A2   Checksum over the heder. NB Not CRC32
+ *
+ * At the end of the code we have a 32-bit CRC checksum 

[U-Boot] [PATCH] socfpga: Add a signer that is integrated into mkimage

2014-02-20 Thread Charles Manning
This one passes checkpatch too :-)

Signed-off-by: Charles Manning cdhmann...@gmail.com
---
 common/image.c   |1 +
 include/image.h  |1 +
 spl/Makefile |8 ++
 tools/Makefile   |2 +
 tools/mkimage.c  |2 +
 tools/mkimage.h  |1 +
 tools/socfpgaimage.c |  348 ++
 7 files changed, 363 insertions(+)
 create mode 100644 tools/socfpgaimage.c

diff --git a/common/image.c b/common/image.c
index 95498e6..1a2e107 100644
--- a/common/image.c
+++ b/common/image.c
@@ -144,6 +144,7 @@ static const table_entry_t uimage_type[] = {
{   IH_TYPE_INVALID,NULL, Invalid Image,  },
{   IH_TYPE_MULTI,  multi,  Multi-File Image,   },
{   IH_TYPE_OMAPIMAGE,  omapimage,  TI OMAP SPL With GP CH,},
+   {   IH_TYPE_SOCFPGAIMAGE,  socfpgaimage,  Altera SOCFPGA 
preloader,},
{   IH_TYPE_PBLIMAGE,   pblimage,   Freescale PBL Boot Image,},
{   IH_TYPE_RAMDISK,ramdisk,RAMDisk Image,  },
{   IH_TYPE_SCRIPT, script, Script, },
diff --git a/include/image.h b/include/image.h
index f5adc50..95a0bf7 100644
--- a/include/image.h
+++ b/include/image.h
@@ -166,6 +166,7 @@
 #define IH_TYPE_AISIMAGE   13  /* TI Davinci AIS Image */
 #define IH_TYPE_KERNEL_NOLOAD  14  /* OS Kernel Image, can run from any 
load address */
 #define IH_TYPE_PBLIMAGE   15  /* Freescale PBL Boot Image */
+#define IH_TYPE_SOCFPGAIMAGE   16  /* Altera SOCFPGA Preloader Image   
*/
 
 /*
  * Compression Types
diff --git a/spl/Makefile b/spl/Makefile
index c0abe3d..8f061b0 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -144,8 +144,12 @@ $(OBJTREE)/MLO:$(obj)u-boot-spl.bin
 
 $(OBJTREE)/MLO.byteswap: $(obj)u-boot-spl.bin
$(OBJTREE)/tools/mkimage -T omapimage -n byteswap \
+
-a $(CONFIG_SPL_TEXT_BASE) -d $ $@
 
+$(OBJTREE)/socfpga-signed-preloader.bin: $(obj)u-boot-spl.bin
+   $(OBJTREE)/tools/mkimage -T socfpgaimage -d $ $@
+
 ifneq ($(CONFIG_IMX_CONFIG),)
 $(OBJTREE)/SPL:$(obj)u-boot-spl.bin
$(OBJTREE)/tools/mkimage -n  $(SRCTREE)/$(CONFIG_IMX_CONFIG) -T 
imximage \
@@ -154,6 +158,10 @@ endif
 
 ALL-y  += $(obj)u-boot-spl.bin
 
+ifdef CONFIG_SOCFPGA
+ALL-y += $(OBJTREE)/socfpga-signed-preloader.bin
+endif
+
 ifdef CONFIG_SAMSUNG
 ALL-y  += $(obj)$(BOARD)-spl.bin
 endif
diff --git a/tools/Makefile b/tools/Makefile
index 686840a..52f4bfc 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -95,6 +95,7 @@ NOPED_OBJ_FILES-y += kwbimage.o
 NOPED_OBJ_FILES-y += pblimage.o
 NOPED_OBJ_FILES-y += imximage.o
 NOPED_OBJ_FILES-y += omapimage.o
+NOPED_OBJ_FILES-y += socfpgaimage.o
 NOPED_OBJ_FILES-y += mkenvimage.o
 NOPED_OBJ_FILES-y += mkimage.o
 OBJ_FILES-$(CONFIG_SMDK5250) += mkexynosspl.o
@@ -214,6 +215,7 @@ $(obj)mkimage$(SFX):$(obj)aisimage.o \
$(obj)mkimage.o \
$(obj)os_support.o \
$(obj)omapimage.o \
+   $(obj)socfpgaimage.o \
$(obj)sha1.o \
$(obj)ublimage.o \
$(LIBFDT_OBJS)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index e43b09f..87bacc0 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -167,6 +167,8 @@ main (int argc, char **argv)
init_ubl_image_type();
/* Init Davinci AIS support */
init_ais_image_type();
+   /* Init Altera SOCFPGA image generation/list support */
+   init_socfpga_image_type();
 
params.cmdname = *argv;
params.addr = params.ep = 0;
diff --git a/tools/mkimage.h b/tools/mkimage.h
index ea45f5c..eda4832 100644
--- a/tools/mkimage.h
+++ b/tools/mkimage.h
@@ -157,5 +157,6 @@ void init_default_image_type (void);
 void init_fit_image_type (void);
 void init_ubl_image_type(void);
 void init_omap_image_type(void);
+void init_socfpga_image_type(void);
 
 #endif /* _MKIIMAGE_H_ */
diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c
new file mode 100644
index 000..9944c78
--- /dev/null
+++ b/tools/socfpgaimage.c
@@ -0,0 +1,348 @@
+/*
+ * Copyright (C) 2014 Charles Manning cdhmann...@gmail.com
+ *
+ * Use as you see fit.
+ *
+ * Reference doc http://www.altera.com.cn/literature/hb/cyclone-v/cv_5400A.pdf
+ * Note this doc is not entirely accurate.
+ *
+ * Header is a structure of the following format.
+ * this is positioned at 0x40.
+ *
+ * Endian is LSB.
+ *
+ * Offset   Length   Usage
+ * ---
+ *  04   Validation word 0x31305341
+ *  41   Version (whatever, zero is fine)
+ *  51   Flags   (unused, zero is fine)
+ *  62   Length  (in units of u32, including the end checksum).
+ *  82   Zero
+ *   0x0A2   Checksum over the heder. NB Not CRC32
+ *
+ * At the end of the code we have a 32-bit CRC checksum over whole binary
+ * excluding the 

[U-Boot] [PATCH v2] m68k: Remove M5271EVB and idmr board support

2014-02-20 Thread Masahiro Yamada
CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
as 100 and idmr.h defines it as (5000 / 64).

When compiling these two boards, a warning message is displayed:

  time.c:14:2: warning: #warning CONFIG_SYS_HZ must be 1000
  and should not be defined by platforms [-Wcpp]

There are no board maintainers for them so this commit just
deletes them.

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Jason Jin jason@freescale.com
---

Changes in v2:
  - Rebase on commit 6853e6aa
  - Fill 'Commit' column of doc/README.scrapyard for IXP boards

 board/freescale/m5271evb/Makefile   |   8 -
 board/freescale/m5271evb/config.mk  |   9 -
 board/freescale/m5271evb/m5271evb.c | 115 
 board/freescale/m5271evb/u-boot.lds |  85 -
 board/idmr/Makefile |   8 -
 board/idmr/config.mk|   9 -
 board/idmr/flash.c  | 342 
 board/idmr/idmr.c   | 152 
 board/idmr/u-boot.lds   |  82 -
 boards.cfg  |   2 -
 doc/README.scrapyard|  16 +-
 include/configs/M5271EVB.h  | 234 
 include/configs/idmr.h  | 240 -
 13 files changed, 9 insertions(+), 1293 deletions(-)
 delete mode 100644 board/freescale/m5271evb/Makefile
 delete mode 100644 board/freescale/m5271evb/config.mk
 delete mode 100644 board/freescale/m5271evb/m5271evb.c
 delete mode 100644 board/freescale/m5271evb/u-boot.lds
 delete mode 100644 board/idmr/Makefile
 delete mode 100644 board/idmr/config.mk
 delete mode 100644 board/idmr/flash.c
 delete mode 100644 board/idmr/idmr.c
 delete mode 100644 board/idmr/u-boot.lds
 delete mode 100644 include/configs/M5271EVB.h
 delete mode 100644 include/configs/idmr.h

diff --git a/board/freescale/m5271evb/Makefile 
b/board/freescale/m5271evb/Makefile
deleted file mode 100644
index 77138c6..000
--- a/board/freescale/m5271evb/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y  = m5271evb.o
diff --git a/board/freescale/m5271evb/config.mk 
b/board/freescale/m5271evb/config.mk
deleted file mode 100644
index 957f584..000
--- a/board/freescale/m5271evb/config.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-# Coldfire contribution by Bernhard Kuhn bk...@metrowerks.com
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-CONFIG_SYS_TEXT_BASE = 0xffe0
diff --git a/board/freescale/m5271evb/m5271evb.c 
b/board/freescale/m5271evb/m5271evb.c
deleted file mode 100644
index 5981a27..000
--- a/board/freescale/m5271evb/m5271evb.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * (C) Copyright 2000-2006
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/immap.h
-
-int checkboard (void) {
-   puts (Board: Freescale M5271EVB\n);
-   return 0;
-};
-
-phys_size_t initdram (int board_type) {
-
-   int i;
-
-   /* Enable Address lines 23-21 and lower 16bits of data path */
-   mbar_writeByte(MCF_GPIO_PAR_AD, MCF_GPIO_AD_ADDR23 |
-   MCF_GPIO_AD_ADDR22 | MCF_GPIO_AD_ADDR21 |
-   MCF_GPIO_AD_DATAL);
-
-   /* Set CS2 pin to be SD_CS0 */
-   mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS)
-   | MCF_GPIO_PAR_CS_PAR_CS2);
-
-   /* Configure SDRAM Control Pin Assignemnt Register */
-   mbar_writeByte(MCF_GPIO_PAR_SDRAM, MCF_GPIO_SDRAM_CSSDCS_00 |
-   MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS |
-   MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE |
-   MCF_GPIO_SDRAM_SDCS_11);
-   asm( nop);
-
-   /*
-* Check to see if the SDRAM has already been initialized
-* by a run control tool
-*/
-   if (!(mbar_readLong(MCF_SDRAMC_DACR0)  MCF_SDRAMC_DACRn_RE)) {
-   /* Initialize DRAM Control Register: DCR */
-   mbar_writeShort(MCF_SDRAMC_DCR,
-   MCF_SDRAMC_DCR_RTIM(2)
-   | MCF_SDRAMC_DCR_RC(0x2E));
-   asm( nop);
-
-   /*
-* Initialize DACR0
-*
-* CASL: 01
-* CBM: cmd at A20, bank select bits 21 and up
-* PS: 32bit port size
-*/
-   mbar_writeLong(MCF_SDRAMC_DACR0,
-   MCF_SDRAMC_DACRn_BA(CONFIG_SYS_SDRAM_BASE18)
-   | MCF_SDRAMC_DACRn_CASL(1)
-   | MCF_SDRAMC_DACRn_CBM(3)
-   | MCF_SDRAMC_DACRn_PS(0));
-   asm( nop);
-
-   /* Initialize DMR0 */
-  

[U-Boot] [PATCH] spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation

2014-02-20 Thread Axel Lin
Refactor the code a bit to make it better in readability.
Remove the comments because now the intention of the code is pretty clear.

Signed-off-by: Axel Lin axel@ingics.com
---
 drivers/spi/atmel_dataflash_spi.c | 31 ---
 1 file changed, 12 insertions(+), 19 deletions(-)

diff --git a/drivers/spi/atmel_dataflash_spi.c 
b/drivers/spi/atmel_dataflash_spi.c
index 8a5eddc..a2e9c00 100644
--- a/drivers/spi/atmel_dataflash_spi.c
+++ b/drivers/spi/atmel_dataflash_spi.c
@@ -102,33 +102,26 @@ void AT91F_SpiEnable(int cs)
 {
unsigned long mode;
 
+   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
+   mode = ~AT91_SPI_PCS;
+
switch (cs) {
-   case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
-   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
-   mode = 0xFFF0;
-   writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD16)  
AT91_SPI_PCS),
-  ATMEL_BASE_SPI0 + AT91_SPI_MR);
+   case 0:
+   mode |= AT91_SPI_PCS0_DATAFLASH_CARD  16;
break;
-   case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */
-   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
-   mode = 0xFFF0;
-   writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD16)  
AT91_SPI_PCS),
-  ATMEL_BASE_SPI0 + AT91_SPI_MR);
+   case 1:
+   mode |= AT91_SPI_PCS1_DATAFLASH_CARD  16;
break;
-   case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */
-   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
-   mode = 0xFFF0;
-   writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD16)  
AT91_SPI_PCS),
-  ATMEL_BASE_SPI0 + AT91_SPI_MR);
+   case 2:
+   mode |= AT91_SPI_PCS2_DATAFLASH_CARD  16;
break;
case 3:
-   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
-   mode = 0xFFF0;
-   writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD16)  
AT91_SPI_PCS),
-  ATMEL_BASE_SPI0 + AT91_SPI_MR);
+   mode |= AT91_SPI_PCS3_DATAFLASH_CARD  16;
break;
}
 
+   writel(mode, ATMEL_BASE_SPI0 + AT91_SPI_MR);
+
/* SPI_Enable */
writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
 }
-- 
1.8.1.2



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[U-Boot] [PATCH] kbuild: fix errors of 'make *tags' and 'make cscope'

2014-02-20 Thread Masahiro Yamada
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Reported-by: Nishanth Menon n...@ti.com
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index b91381c..a06abec 100644
--- a/Makefile
+++ b/Makefile
@@ -414,7 +414,7 @@ version_h := include/generated/version_autogenerated.h
 timestamp_h := include/generated/timestamp_autogenerated.h
 
 no-dot-config-targets := clean clobber mrproper distclean \
-cscope TAGS %tags help %docs check% coccicheck \
+help %docs check% coccicheck \
 ubootversion backup
 
 config-targets := 0
-- 
1.8.3.2

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Re: [U-Boot] u-boot(v2014.04-rc1) make tags reports find error

2014-02-20 Thread Masahiro Yamada
Hello Nishanth,

On Thu, 20 Feb 2014 10:05:02 -0600
Nishanth Menon n...@ti.com wrote:

 Doing a make tags after build for OMAP4_panda reports find error as
 follows:
 find: `/omap4': No such file or directory

Oops, sorry.

I have posted a patch.
http://patchwork.ozlabs.org/patch/322408/

Thanks for your report.

Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH V2 1/4] pxe: allow compilation when !defined(CONFIG_CMD_NET)

2014-02-20 Thread Stephen Warren
On 02/05/2014 08:49 PM, Stephen Warren wrote:
 pxe.c provides both the pxe command which relies on a network, and the
 sysboot command which doesn't. Fix the file to compile when network
 support isn't enabled. This is useful e.g. on the Raspberry Pi which has
 no network support yet, but will soon support the sysboot command.

Albert, does this series look good? Everything it relies on should be in
u-boot/master for a while now. Thanks.
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Re: [U-Boot] [PATCH 2/2] usb: ehci: fully align interrupt QHs/QTDs

2014-02-20 Thread Stephen Warren
On 02/08/2014 07:01 AM, Marek Vasut wrote:
 On Friday, February 07, 2014 at 05:24:27 PM, Stephen Warren wrote:
 On 02/07/2014 06:48 AM, Marek Vasut wrote:
 On Friday, February 07, 2014 at 07:48:06 AM, Stephen Warren wrote:
 On 02/06/2014 07:53 PM, Marek Vasut wrote:
 On Thursday, February 06, 2014 at 09:13:06 PM, Stephen Warren wrote:
 From: Stephen Warren swar...@nvidia.com

 These data structures are passed to cache-flushing routines, and hence
 must be conform to both the USB the cache-flusing alignment
 requirements. That means aligning to USB_DMA_MINALIGN. This is
 important on systems where cache lines are 32 bytes.

 Signed-off-by: Stephen Warren swar...@nvidia.com

 Acked-by: Marek Vasut ma...@denx.de

 Oh, I assumed you would be applying this?

 Yes I would , but the previous patch still needs some discussion.

 Oh OK. The patches don't depend on each-other in any way, so you can go
 ahead and apply this now if you want. I should have actually sent them
 separately rather than as a series.
 
 Yeah, applied V2 of 1 and 2/2 now.

Great, thanks. I assume these will be pulled into 2014.04?

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Re: [U-Boot] [PATCH] kbuild: fix errors of 'make *tags' and 'make cscope'

2014-02-20 Thread Nishanth Menon
Masahiro-san,

On 12:56-20140221, Masahiro Yamada wrote:
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Reported-by: Nishanth Menon n...@ti.com
 ---
  Makefile | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/Makefile b/Makefile
 index b91381c..a06abec 100644
 --- a/Makefile
 +++ b/Makefile
 @@ -414,7 +414,7 @@ version_h := include/generated/version_autogenerated.h
  timestamp_h := include/generated/timestamp_autogenerated.h
  
  no-dot-config-targets := clean clobber mrproper distclean \
 -  cscope TAGS %tags help %docs check% coccicheck \
 +  help %docs check% coccicheck \
ubootversion backup
^^ unfortunately, the patch fails to apply

$ git describe
v2014.04-rc1
$ wget -O a.patch http://patchwork.ozlabs.org/patch/322408/mbox/
--2014-02-20 22:24:24--  http://patchwork.ozlabs.org/patch/322408/mbox/
Length: unspecified [text/plain]
Saving to: `a.patch'

[ =   

  ] 1,011   --.-K/s   in 0s  
$ git am a.patch
Applying: kbuild: fix errors of 'make *tags' and 'make cscope'
error: patch failed: Makefile:414
error: Makefile: patch does not apply
Patch failed at 0001 kbuild: fix errors of 'make *tags' and 'make cscope'
When you have resolved this problem run git am --resolved.
If you would prefer to skip this patch, instead run git am --skip.
To restore the original branch and stop patching run git am --abort.
$ git am --abort
$ patch -p1a.patch 
patching file Makefile
Hunk #1 FAILED at 414.
1 out of 1 hunk FAILED -- saving rejects to file Makefile.rej

The following applies and works - you might want to rebase to rc1 and
repost perhaps?
diff --git a/Makefile b/Makefile
index d9b2b7f..a314a11 100644
--- a/Makefile
+++ b/Makefile
@@ -412,7 +412,7 @@ endif
 # of make so .config is not included in this case either (for *config).
 
 no-dot-config-targets := clean clobber mrproper distclean \
-cscope TAGS %tags help %docs check% coccicheck \
+help %docs check% coccicheck \
 backup
 
 config-targets := 0

-- 
Regards,
Nishanth Menon
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Re: [U-Boot] [PATCH REPOST] usb: create common header virtual root hub descriptors

2014-02-20 Thread Stephen Warren
On 02/13/2014 09:15 PM, Stephen Warren wrote:
 Many USB host controller drivers contain almost identical copies of the
 same virtual root hub descriptors. Put these into a common file to avoid
 duplication.
 
 Note that there were some very minor differences between the descriptors
 in the various files, such as:
 
 - USB 1.0 vs. USB 1.1
 - Manufacturer/Device ID
 - Max packet size
 - String content
 
 I assume these aren't relevant.

Marek, how long do you think we should wait for acks/naks from the CC'd
people?

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Re: [U-Boot] [PATCH] socfpga: Add a signer that is integrated into mkimage

2014-02-20 Thread Wolfgang Denk
Dear Charles Manning,

In message 1392942516-3488-1-git-send-email-cdhmann...@gmail.com you wrote:
 This one passes checkpatch too :-)
 
 Signed-off-by: Charles Manning cdhmann...@gmail.com
 ---
  common/image.c   |1 +
...

Would you please read [1] and especially [2], the section about
posting modified versions of patches ?

You are posting multiple patches with the same subject but different
content.  Do you think we have time to figure out what might be the
difference?  Please make sure to include a version tagin the Subject:
line, and to add a history oof changes in the comment section.

And - do you think that This one passes checkpatch too :-) is a
helpful and descriptive commit message?  [No, it is not.]

[1] http://www.denx.de/wiki/U-Boot/Patches
[2] http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions

 @@ -144,6 +144,7 @@ static const table_entry_t uimage_type[] = {
   {   IH_TYPE_INVALID,NULL, Invalid Image,  },
   {   IH_TYPE_MULTI,  multi,  Multi-File Image,   },
   {   IH_TYPE_OMAPIMAGE,  omapimage,  TI OMAP SPL With GP CH,},
 + {   IH_TYPE_SOCFPGAIMAGE,  socfpgaimage,  Altera SOCFPGA 
 preloader,},
   {   IH_TYPE_PBLIMAGE,   pblimage,   Freescale PBL Boot Image,},
   {   IH_TYPE_RAMDISK,ramdisk,RAMDisk Image,  },
   {   IH_TYPE_SCRIPT, script, Script, },

Please always keep such lists sorted.

 --- a/spl/Makefile
 +++ b/spl/Makefile
 @@ -144,8 +144,12 @@ $(OBJTREE)/MLO:  $(obj)u-boot-spl.bin
  
  $(OBJTREE)/MLO.byteswap: $(obj)u-boot-spl.bin
   $(OBJTREE)/tools/mkimage -T omapimage -n byteswap \
 +
   -a $(CONFIG_SPL_TEXT_BASE) -d $ $@

Did you actually test this?  IMO this will break the build.

 +$(OBJTREE)/socfpga-signed-preloader.bin: $(obj)u-boot-spl.bin
 + $(OBJTREE)/tools/mkimage -T socfpgaimage -d $ $@

socfpga-signed-preloader.bin is a terribly long name.  Can we find a
better one?

 +ifdef CONFIG_SOCFPGA
 +ALL-y += $(OBJTREE)/socfpga-signed-preloader.bin
 +endif

Can we not use ALL-$(CONFIG_SOCFPGA) and avoid the ifdef ?

  NOPED_OBJ_FILES-y += pblimage.o
  NOPED_OBJ_FILES-y += imximage.o
  NOPED_OBJ_FILES-y += omapimage.o
 +NOPED_OBJ_FILES-y += socfpgaimage.o
  NOPED_OBJ_FILES-y += mkenvimage.o
  NOPED_OBJ_FILES-y += mkimage.o

Keep sorted.

  OBJ_FILES-$(CONFIG_SMDK5250) += mkexynosspl.o
 @@ -214,6 +215,7 @@ $(obj)mkimage$(SFX):  $(obj)aisimage.o \
   $(obj)mkimage.o \
   $(obj)os_support.o \
   $(obj)omapimage.o \
 + $(obj)socfpgaimage.o \
   $(obj)sha1.o \
   $(obj)ublimage.o \
   $(LIBFDT_OBJS)

Keep sorted.

   /* Init Davinci AIS support */
   init_ais_image_type();
 + /* Init Altera SOCFPGA image generation/list support */
 + init_socfpga_image_type();

/* Init Altera SOCFPGA support */

should be sufficient.

 + * Reference doc 
 http://www.altera.com.cn/literature/hb/cyclone-v/cv_5400A.pdf
 + * Note this doc is not entirely accurate.

Would you care to explain the errors in the document that might cause
problems to the reader?

 + * This uses the CRC32 calc out of the well known Apple
 + * crc32.c code. Copyright for the CRC code:

1) Why exactly do we need another implementation of CRC32.  We already
have some - why cannot we use these?

2) Please provide _exact_ reference. See [3] 

   [3] 
http://www.denx.de/wiki/view/U-Boot/Patches#Attributing_Code_Copyrights_Sign

 + * COPYRIGHT (C) 1986 Gary S. Brown.  You may use this program, or
 + *  code or tables extracted from it, as desired without restriction.
 + *
 + */

3) You better move this into a separate file, and assign a separate
   license ID tag for it.

4) I cannot find a license ID tag in your new code. Please add.

 +/* To work in with the mkimage framework, we do some ugly stuff...
 + *
 + * First we prepend a fake header big enough to make the file 64k.
 + * When set_header is called, we fix this up by moving the image
 + * around in the buffer.
 + */

Incorrect multiline comment style. Please fix globally.

Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Put your Nose to the Grindstone!
 -- Amalgamated Plastic Surgeons and Toolmakers, Ltd.
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[U-Boot] [PATCH] kbuild: get back DTB at the top directory

2014-02-20 Thread Masahiro Yamada
Commit 6ab6b2af deleted ./u-boot.dtb because it was a copy
of dts/dt.dtb.

But Simon suggested to keep u-boot.dtb at the top directory
because it is a build output.

After discussions, we agreed on revival of ./u-boot.dtb.

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Simon Glass s...@chromium.org
Cc: Tom Rini tr...@ti.com
---

Hello Simon,

In our discussions, I memtioned to post version 4
of dts: re-write dts/Makefile more simply with Kbuild.

But, before that, version 3 has been applied.

Anyway, I promised to get back ./u-boot.dtb,
so I'm posting this patch.

To avoid a conflict with other patches,
this patch is rebased on
Follow-up for Kbuild series: more misc targets and short logs series.
(And using Kbuild style to display short log)

BTW, another question hit me when I was writing this patch.
Please let me ask you a little more questions.

I guess the reason why you want device tree at the top directory
is Sandbox. Is this right?
If so, I am 100% convinced and I'd like to suggest to modify

ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb u-boot-dtb.bin

to

ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb.bin
ALL-$(CONFIG_OF_HOSTFILE) += u-boot.dtb

Is this better?
For CONFIG_OF_SEPARATE, I think there is no opportunity to use u-boot.dtb
because we have u-boot-dtb.bin.


 Makefile | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index b91381c..db263ef 100644
--- a/Makefile
+++ b/Makefile
@@ -720,7 +720,7 @@ ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl
 ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin
 ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
 ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
-ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb.bin
+ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb u-boot-dtb.bin
 ifneq ($(CONFIG_SPL_TARGET),)
 ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:%=%)
 endif
@@ -766,6 +766,12 @@ dtbs dts/dt.dtb: checkdtc u-boot
 u-boot-dtb.bin: u-boot.bin dts/dt.dtb FORCE
$(call if_changed,cat)
 
+quiet_cmd_copy = COPY$@
+  cmd_copy = cp $ $@
+
+u-boot.dtb: dts/dt.dtb
+   $(call cmd,copy)
+
 OBJCOPYFLAGS_u-boot.hex := -O ihex
 
 OBJCOPYFLAGS_u-boot.srec := -O srec
-- 
1.8.3.2

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Re: [U-Boot] [ANN] U-Boot v2014.04-rc1 released

2014-02-20 Thread Simon Glass
Hi,

On 19 February 2014 13:11, Tom Rini tr...@ti.com wrote:
 Hey all,

 I've pushed v2014.04-rc1 out to the repository and tarballs should exist
 soon.

 The merge window is now, really, closed.  Aside from various fixups all
 around we now have Kbuild as the build system.  A big thank you to
 Masahiro Yamada for all his work on that!


And thank you from me too to Masahiro Yamada. This is great work and a
very pleasing result!

Regards,
Simon
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[U-Boot] [PATCH v2] kbuild: fix errors of 'make *tags' and 'make cscope'

2014-02-20 Thread Masahiro Yamada
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Reported-by: Nishanth Menon n...@ti.com
---

Changes in v2:
  - Rebase on the Commit 6853e6aa

 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 4cc7256..dd5f8f2 100644
--- a/Makefile
+++ b/Makefile
@@ -412,7 +412,7 @@ endif
 # of make so .config is not included in this case either (for *config).
 
 no-dot-config-targets := clean clobber mrproper distclean \
-cscope TAGS %tags help %docs check% coccicheck \
+help %docs check% coccicheck \
 backup
 
 config-targets := 0
-- 
1.8.3.2

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Re: [U-Boot] [PATCH] kbuild: fix errors of 'make *tags' and 'make cscope'

2014-02-20 Thread Masahiro Yamada
Hello Nishanth,


  --- a/Makefile
  +++ b/Makefile
  @@ -414,7 +414,7 @@ version_h := include/generated/version_autogenerated.h
   timestamp_h := include/generated/timestamp_autogenerated.h
   
   no-dot-config-targets := clean clobber mrproper distclean \
  -cscope TAGS %tags help %docs check% coccicheck \
  +help %docs check% coccicheck \
   ubootversion backup
 ^^ unfortunately, the patch fails to apply


Oops, sorry again.

I have posted version2.



Best Regards
Masahiro Yamada

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[U-Boot] [PATCH] dfu: mmc: Replace calls to u-boot commands with native mmc API

2014-02-20 Thread Lukasz Majewski
For some time we have been using the run_command() with properly crafted
string. Such approach turned to be unreliable and error prone.

Switch to native mmc subsystem API would allow better type checking and
shall improve speed.

Also, it seems that this API is changing less often than u-boot commands.
The approach similar to env operations on the eMMC has been reused.

Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
 drivers/dfu/dfu_mmc.c |   31 ---
 1 file changed, 24 insertions(+), 7 deletions(-)

diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 0816f46..651cfff 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -12,6 +12,7 @@
 #include errno.h
 #include div64.h
 #include dfu.h
+#include mmc.h
 
 static unsigned char __aligned(CONFIG_SYS_CACHELINE_SIZE)
dfu_file_buf[CONFIG_SYS_DFU_MAX_FILE_SIZE];
@@ -20,8 +21,8 @@ static long dfu_file_buf_len;
 static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
u64 offset, void *buf, long *len)
 {
-   char cmd_buf[DFU_CMD_BUF_SIZE];
-   u32 blk_start, blk_count;
+   struct mmc *mmc = find_mmc_device(dfu-dev_num);
+   u32 blk_start, blk_count, n = 0;
 
/*
 * We must ensure that we work in lba_blk_size chunks, so ALIGN
@@ -38,12 +39,28 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity 
*dfu,
return -EINVAL;
}
 
-   sprintf(cmd_buf, mmc %s %p %x %x,
-   op == DFU_OP_READ ? read : write,
-buf, blk_start, blk_count);
+   debug(%s: %s dev: %d start: %d cnt: %d buf: 0x%p\n, __func__,
+ op == DFU_OP_READ ? MMC READ : MMC WRITE, dfu-dev_num,
+ blk_start, blk_count, buf);
+   switch (op) {
+   case DFU_OP_READ:
+   n = mmc-block_dev.block_read(dfu-dev_num, blk_start,
+ blk_count, buf);
+   break;
+   case DFU_OP_WRITE:
+   n = mmc-block_dev.block_write(dfu-dev_num, blk_start,
+  blk_count, buf);
+   break;
+   default:
+   error(Operation not supported\n);
+   }
 
-   debug(%s: %s 0x%p\n, __func__, cmd_buf, cmd_buf);
-   return run_command(cmd_buf, 0);
+   if (n != blk_count) {
+   error(MMC operation failed);
+   return -EIO;
+   }
+
+   return 0;
 }
 
 static int mmc_file_buffer(struct dfu_entity *dfu, void *buf, long *len)
-- 
1.7.10.4

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