Re: [U-Boot] DM, Kconfig and clang changes

2014-07-15 Thread Heiko Schocher

Hello Tom,

Am 15.07.2014 01:17, schrieb Tom Rini:

On Mon, Jul 14, 2014 at 11:20:31PM +0200, Wolfgang Denk wrote:

Dear Tom,

In message20140714172225.GF1847@bill-the-cat  you wrote:


So the release is out, and I want to make sure that some of these big
changes get as much testing as we can.


Please also keep Heiko's MTD/UBI/UBIFS update in mind!


Yes, that however is blocked on (a) fixing of some kernel issue he found


This fix is accepted from Artem, see:

http://git.infradead.org/ubifs-2.6.git/commit/e9110361a9a4e258b072b14bd44eb78cf11453cb

This patch is only necessary in u-boot, if we update to linux v3.16
as there is the bug in v3.16.


with fastmap, iirc and (b) a follow-up patch doing another re-sync to
show that in theory his approach is sound and with sufficient care can
avoid the automerge problems Scott is (legitmately) worried about.


I wasn;t aware of, that you block the mtd/ubi/ubifs patches until I did
such a rebase to v3.15 ... so I try to do this ASAP.

bye,
Heiko
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Re: [U-Boot] [PATCH v5] mx6: add support of multi-processor command

2014-07-15 Thread Stefano Babic
Hi Gabriel,

On 13/07/2014 00:31, Gabriel Huau wrote:
 This allows u-boot to load different OS or Bare Metal application on the
 different cores of the i.MX6DQ.
 For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
 
 Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr
 ---
 Changes for v2:
   - Add a commit log message to explain the purpose of this patch
 Changes for v3:
   - Remove unnecessary check for unsigned values when they are negative
 Changes for v4:
   - Add CONFIG_MP to the common mx6 configuration
   - Get the number of CPUs dynamically instead of using a macro
 Changes for v5:
   - Rebase on the last update of the tree (conflicts solved)

However, I get several warnings applying your patch:

arch/arm/include/asm/arch/sys_proto.h:17:0: warning: is_soc_rev
redefined [enabled by default]
arch/arm/include/asm/arch/sys_proto.h:15:0: note: this is the location
of the previous definition


and:

arch/arm/cpu/armv7/mx6/mp.c:101:2: warning: implicit declaration of
function 'get_nr_cpus' [-Wimplicit-function-declaration]
In file included from arch/arm/imx-common/cpu.c:15:0:

You muxt fix them.

   - Add a dummy header to solve build issue regarding the common/board_f.c
 

I do not think this is the best solution. An empty file is a file that
is not needed.

  arch/arm/cpu/armv7/mx6/Makefile   |   1 +
  arch/arm/cpu/armv7/mx6/mp.c   | 134 
 ++
  arch/arm/cpu/armv7/mx6/soc.c  |   6 ++
  arch/arm/include/asm/arch-mx6/imx-regs.h  |  13 +++
  arch/arm/include/asm/arch-mx6/sys_proto.h |   1 +
  arch/arm/include/asm/mp.h |  11 +++
  include/configs/mx6_common.h  |   2 +
  7 files changed, 168 insertions(+)
  create mode 100644 arch/arm/cpu/armv7/mx6/mp.c
  create mode 100644 arch/arm/include/asm/mp.h
 

I have just investigate a bit. The file is included by common/board_f.c
but it is, frankly, quite not used. There are several prototype inside it:

void setup_mp(void);
void cpu_mp_lmb_reserve(struct lmb *lmb);
int is_core_disabled(int nr);

They are not used at all.

u32 determine_mp_bootpg(unsigned int *pagesize);

This is the only one that is used.

Then it makes more sense to drop mp.h from board_f.c and add a prototype
for determine_mp_bootpg(). This function is already protected by:

#if defined(CONFIG_MP)  (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))


 diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile
 index 6dc9f8e..bf6effc 100644
 --- a/arch/arm/cpu/armv7/mx6/Makefile
 +++ b/arch/arm/cpu/armv7/mx6/Makefile
 @@ -10,3 +10,4 @@
  obj-y:= soc.o clock.o
  obj-$(CONFIG_SPL_BUILD)   += ddr.o
  obj-$(CONFIG_SECURE_BOOT)+= hab.o
 +obj-$(CONFIG_MP) += mp.o
 diff --git a/arch/arm/cpu/armv7/mx6/mp.c b/arch/arm/cpu/armv7/mx6/mp.c
 new file mode 100644
 index 000..85003d3
 --- /dev/null
 +++ b/arch/arm/cpu/armv7/mx6/mp.c
 @@ -0,0 +1,134 @@
 +/*
 + * (C) Copyright 2014
 + * Gabriel Huau cont...@huau-gabriel.fr
 + *
 + * (C) Copyright 2009 Freescale Semiconductor, Inc.
 + *
 + * SPDX-License-Identifier:  GPL-2.0+
 + */
 +
 +#include common.h
 +#include asm/io.h
 +#include asm/errno.h
 +#include asm/arch/sys_proto.h
 +#include asm/arch/imx-regs.h
 +
 +int cpu_reset(int nr)
 +{
 + uint32_t reg;
 + struct src *src = (struct src *)SRC_BASE_ADDR;
 +
 + reg = __raw_readl(src-scr);
 +
 + switch (nr) {
 + case 1:
 + reg |= SRC_SCR_CORE_1_RESET_MASK;
 + break;
 +
 + case 2:
 + reg |= SRC_SCR_CORE_2_RESET_MASK;
 + break;
 +
 + case 3:
 + reg |= SRC_SCR_CORE_3_RESET_MASK;
 + break;
 + }
 +
 + /* Software reset of the CPU N */
 + __raw_writel(reg, src-scr);
 +
 + return 0;
 +}
 +
 +int cpu_status(int nr)
 +{
 + uint32_t reg;
 + struct src *src = (struct src *)SRC_BASE_ADDR;
 +
 + reg = __raw_readl(src-scr);
 +
 + switch (nr) {
 + case 1:
 + printf(core 1: %d\n, !!(reg  SRC_SCR_CORE_1_ENABLE_MASK));
 + break;
 +
 + case 2:
 + printf(core 2: %d\n, !!(reg  SRC_SCR_CORE_2_ENABLE_MASK));
 + break;
 +
 + case 3:
 + printf(core 3: %d\n, !!(reg  SRC_SCR_CORE_3_ENABLE_MASK));
 + break;
 + }
 +
 + return 0;
 +}
 +
 +int cpu_release(int nr, int argc, char *const argv[])
 +{
 + uint32_t reg;
 + struct src *src = (struct src *)SRC_BASE_ADDR;
 + uint32_t boot_addr;
 +
 + boot_addr = simple_strtoul(argv[0], NULL, 16);
 + reg = __raw_readl(src-scr);
 +
 + switch (nr) {
 + case 1:
 + __raw_writel(boot_addr, src-gpr3);
 + reg |= SRC_SCR_CORE_1_ENABLE_MASK;
 + break;
 +
 + case 2:
 + __raw_writel(boot_addr, src-gpr5);
 + reg |= SRC_SCR_CORE_2_ENABLE_MASK;
 + break;
 +
 + case 3:
 + 

Re: [U-Boot] Fwd: Re: [PATCH 2/3] env_mmc: support env partition setup in runtime

2014-07-15 Thread Igor Grinberg
ping.

On 07/03/14 11:36, Igor Grinberg wrote:
 Hi Pantelis, Tom,
 
 Apparently, Dmitry has sent the message in html format...
 
 Resending now...
 Sorry for that...
 
 
  Original Message 
 Subject:  Re: [U-Boot] [PATCH 2/3] env_mmc: support env partition setup 
 in runtime
 Date: Wed, 25 Jun 2014 10:42:11 +0300
 From: Dmitry Lifshitz lifsh...@compulab.co.il
 To:   Pantelis Antoniou pantelis.anton...@gmail.com
 CC:   u-boot@lists.denx.de, Tom Rini tr...@ti.com, Igor Grinberg 
 grinb...@compulab.co.il
 
 
 
 Hi Pantelis,
 
 On 06/12/2014 06:10 PM, Pantelis Antoniou wrote:
 Hi Dmitry,

 I took a good look at the patch and there's a problem.

 On Apr 27, 2014, at 1:18 PM, Dmitry Lifshitz wrote:

 Add callback with __weak annotation to allow setup of environment
 partition number in runtime from a board file.

 Signed-off-by: Dmitry Lifshitz lifsh...@compulab.co.il
 Signed-off-by: Igor Grinberg grinb...@compulab.co.il
 ---
 common/env_mmc.c |   35 ++-
 1 files changed, 26 insertions(+), 9 deletions(-)

 diff --git a/common/env_mmc.c b/common/env_mmc.c
 index 045428c..5d4b5f4 100644
 --- a/common/env_mmc.c
 +++ b/common/env_mmc.c
 @@ -62,6 +62,30 @@ int env_init(void)
 return 0;
 }

 +
 +#ifdef CONFIG_SYS_MMC_ENV_PART
 +__weak uint mmc_get_env_part(struct mmc *mmc)
 +{
 +   return CONFIG_SYS_MMC_ENV_PART;
 +}
 +
 +static int mmc_set_env_part(struct mmc *mmc)
 +{
 +   uint part = mmc_get_env_part(mmc);
 +
 +   if (part != mmc-part_num) {
 +   if (mmc_switch_part(CONFIG_SYS_MMC_ENV_DEV, part)) {
 +   puts(MMC partition switch failed\n);
 +   return -1;
 +   }
 +   }
 +
 +   return 0;
 +}
 +#else
 +static inline int mmc_set_env_part(struct mmc *mmc) {return 0; };
 +#endif
 +
 static int init_mmc_for_env(struct mmc *mmc)
 {
 if (!mmc) {
 @@ -74,15 +98,8 @@ static int init_mmc_for_env(struct mmc *mmc)
 return -1;
 }

 Just before this hunk, we have this:

 #ifdef CONFIG_SYS_MMC_ENV_PART
 int dev = CONFIG_SYS_MMC_ENV_DEV;

 #ifdef CONFIG_SPL_BUILD
 dev = 0;
 #endif
 #endif

 This appears to be broken for SPL in case that CONFIG_SYS_MMC_ENV_DEV is not 
 0.
 
 Exactly as it was broken before the patch, right?
 

 SPL hardcoded dev to 0, while mmc_switch_part is implicitly operating on
 CONFIG_SYS_MMC_ENV_DEV.

 Please rework it so that the SPL case is unaffected.
 
 This patch does not change the behavior and its purpose
 is not fixing the current  code.
 
 The bug describe can be fixed by later patch and possibly
 will require additional review and testing.
 
 Given that this patch does not change the behavior, can it be accepted please 
 ?
 
 Regards,
 
 Dmitry
 
 -#ifdef CONFIG_SYS_MMC_ENV_PART
 -   if (CONFIG_SYS_MMC_ENV_PART != mmc-part_num) {
 -   if (mmc_switch_part(CONFIG_SYS_MMC_ENV_DEV,
 -   CONFIG_SYS_MMC_ENV_PART)) {
 -   puts(MMC partition switch failed\n);
 -   return -1;
 -   }
 -   }
 -#endif
 +   if (mmc_set_env_part(mmc))
 +   return -1;

 return 0;
 }
 -- 
 1.7.5.4


 
 
 
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Re: [U-Boot] [PATCH v2 2/5] imx6: add gpr2 usb_otg_id iomux select control define

2014-07-15 Thread Stefano Babic
Hi Heiko,

On 12/07/2014 06:10, Heiko Schocher wrote:
 add IOMUXC_GPR1_USB_OTG_ID_OFFSET and IOMUXC_GPR1_USB_OTG_ID_SEL_MASK
 define for the USB_OTG_ID_SEL bit.
 
 Signed-off-by: Heiko Schocher h...@denx.de
 Cc: Stefano Babic sba...@denx.de
 
 ---
 - changes for v2:
   - new
 
  arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++
  1 file changed, 2 insertions(+)
 
 diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
 b/arch/arm/include/asm/arch-mx6/imx-regs.h
 index a69a753..7193118 100644
 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
 +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
 @@ -251,6 +251,8 @@ struct src {
  /* GPR1 bitfields */
  #define IOMUXC_GPR1_ENET_CLK_SEL_OFFSET  21
  #define IOMUXC_GPR1_ENET_CLK_SEL_MASK(1  
 IOMUXC_GPR1_ENET_CLK_SEL_OFFSET)
 +#define IOMUXC_GPR1_USB_OTG_ID_OFFSET13
 +#define IOMUXC_GPR1_USB_OTG_ID_SEL_MASK  (1  
 IOMUXC_GPR1_USB_OTG_ID_OFFSET)
  
  /* GPR3 bitfields */
  #define IOMUXC_GPR3_GPU_DBG_OFFSET   29
 

Acked-by: Stefano Babic sba...@denx.de

Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH v2 3/5] i.MX6: define struct pwm_regs and PWMCR_* defines

2014-07-15 Thread Stefano Babic
Hi Heiko,

On 12/07/2014 06:10, Heiko Schocher wrote:
 add defines for pwm modul found on imx6.
 
 Signed-off-by: Heiko Schocher h...@denx.de
 Cc: Stefano Babic sba...@denx.de
 
 ---
 - changes for v2:
   - new
 
  arch/arm/include/asm/arch-mx6/imx-regs.h | 16 
  1 file changed, 16 insertions(+)
 
 diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
 b/arch/arm/include/asm/arch-mx6/imx-regs.h
 index 7193118..2135051 100644
 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
 +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
 @@ -669,5 +669,21 @@ struct wdog_regs {
   u16 wmcr;   /* Miscellaneous Control */
  };
  
 +#define PWMCR_PRESCALER(x)   (((x - 1)  0xFFF)  4)
 +#define PWMCR_DOZEEN (1  24)
 +#define PWMCR_WAITEN (1  23)
 +#define PWMCR_DBGEN  (1  22)
 +#define PWMCR_CLKSRC_IPG_HIGH(2  16)
 +#define PWMCR_CLKSRC_IPG (1  16)
 +#define PWMCR_EN (1  0)
 +
 +struct pwm_regs {
 + u32 cr;
 + u32 sr;
 + u32 ir;
 + u32 sar;
 + u32 pr;
 + u32 cnr;
 +};
  #endif /* __ASSEMBLER__*/
  #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
 

I see. What do you mind to add a little effort and move the setup of the
PWM from the aristaneos board to a PWM driver ? I see there is not (yet)
such a driver, but why not ?

What we need are only three simple functions exactly as in Linux kernel:
pwm_enable() pwm_disable(), pwm_config(duty, period)

This becomes more general and can be reused by other i.MX boards.

Best regards,
Stefano

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Re: [U-Boot] [PATCH v1 3/4] i.MX6: add enable_spi_clk()

2014-07-15 Thread Stefano Babic
Hi Fabio,

On 11/07/2014 15:22, Fabio Estevam wrote:
 Hi Heiko,
 
 On Wed, May 28, 2014 at 7:16 AM, Heiko Schocher h...@denx.de wrote:
 
 --- a/arch/arm/include/asm/arch-mx6/clock.h
 +++ b/arch/arm/include/asm/arch-mx6/clock.h
 @@ -57,6 +57,7 @@ void enable_usboh3_clk(unsigned char enable);
  int enable_sata_clock(void);
  int enable_pcie_clock(void);
  int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
 +int enable_spi_clk(unsigned char enable, unsigned spi_num);
  void enable_ipu_clock(void);
  int enable_fec_anatop_clock(enum enet_freq freq);
 
 Apart from comments that Stefano pointed out, the patch looks good.
 
 However, this approach doesn't scale very well. In the future, we
 should be looking into adding Common Clock Framework into U-boot, so
 that we can better control the clocks like we do in the kernel.
 

I fully agree.

 Not sure if there is anyone interested or willing to work on this topic 
 though.

Anyway, it is good to see this issue because it shows the right way to
follow, even if there is not (yet) anybody ready to implement it.

Regards,
Stefano


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Re: [U-Boot] [PATCH v2 5/5] arm, imx6: add aristainetos board

2014-07-15 Thread Stefano Babic
Hi Heiko,

On 12/07/2014 06:10, Heiko Schocher wrote:
 CPU:   Freescale i.MX6DL rev1.1 at 792 MHz
 Board: aristaitenos
 I2C:   ready
 DRAM:  1 GiB
 NAND:  512 MiB
 MMC:   FSL_SDHC: 0, FSL_SDHC: 1
 SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
 Display: lb07wv8 (800x480)
   
   

 
 - UART5 is console
 - MMC 0 and 1
 - USB 0 and 1
 - boot from mmc0 and spi nor flash
 - Splash screen support
 
 Signed-off-by: Heiko Schocher h...@denx.de
 Cc: Stefano Babic sba...@denx.de
 
 ---
 - changes for v2:
   - change MUX_PAD_CTRL value for MX6_PAD_GPIO_16__ENET_REF_CLK
   - set cs1 from ecspi4 to high
   - add splash screen support
   - add comment from Stefano babic:
 - remove mxc_iomux_set_gpr_register instead use setbits_le32
   remove patch http://patchwork.ozlabs.org/patch/353324/
   from this patchserie, as no longer needed
 - use for loop for calling enable_spi_clk()
 - simplify board_mmc_getcd()
 - simplify board_mmc_init()
 - remove board_phy_config()
 - remove setup_fec() and work code into
   board_eth_init()
 - use define for i2c slave address
 - remove udelay in board_ehci_hcd_init()
 - remove CONFIG_SPL_BUILD, as this board does not use
   CONFIG_SPL_BUILD
 
  board/aristainetos/Makefile |   9 +
  board/aristainetos/aristainetos.c   | 632 
 
  board/aristainetos/aristainetos.cfg |  33 ++
  board/aristainetos/clocks.cfg   |  24 ++
  board/aristainetos/ddr-setup.cfg|  61 
  board/aristainetos/mt41j128M.cfg|  70 
  boards.cfg  |   1 +
  include/configs/aristainetos.h  | 330 +++
  8 files changed, 1160 insertions(+)
  create mode 100644 board/aristainetos/Makefile
  create mode 100644 board/aristainetos/aristainetos.c
  create mode 100644 board/aristainetos/aristainetos.cfg
  create mode 100644 board/aristainetos/clocks.cfg
  create mode 100644 board/aristainetos/ddr-setup.cfg
  create mode 100644 board/aristainetos/mt41j128M.cfg
  create mode 100644 include/configs/aristainetos.h
 
 diff --git a/board/aristainetos/Makefile b/board/aristainetos/Makefile
 new file mode 100644
 index 000..5de48bc
 --- /dev/null
 +++ b/board/aristainetos/Makefile
 @@ -0,0 +1,9 @@
 +#
 +# Copyright (C) 2007, Guennadi Liakhovetski l...@denx.de
 +#
 +# (C) Copyright 2011 Freescale Semiconductor, Inc.
 +#
 +# SPDX-License-Identifier:   GPL-2.0+
 +#
 +
 +obj-y  := aristainetos.o
 diff --git a/board/aristainetos/aristainetos.c 
 b/board/aristainetos/aristainetos.c
 new file mode 100644
 index 000..7a61033
 --- /dev/null
 +++ b/board/aristainetos/aristainetos.c
 @@ -0,0 +1,632 @@
 +/*
 + * (C) Copyright 2014
 + * Heiko Schocher, DENX Software Engineering, h...@denx.de.
 + *
 + * Based on:
 + * Copyright (C) 2012 Freescale Semiconductor, Inc.
 + *
 + * Author: Fabio Estevam fabio.este...@freescale.com
 + *
 + * SPDX-License-Identifier:  GPL-2.0+
 + */
 +
 +#include asm/arch/clock.h
 +#include asm/arch/imx-regs.h
 +#include asm/arch/iomux.h
 +#include asm/arch/mx6-pins.h
 +#include asm/errno.h
 +#include asm/gpio.h
 +#include asm/imx-common/iomux-v3.h
 +#include asm/imx-common/boot_mode.h
 +#include asm/imx-common/mxc_i2c.h
 +#include asm/imx-common/video.h
 +#include mmc.h
 +#include fsl_esdhc.h
 +#include miiphy.h
 +#include netdev.h
 +#include asm/arch/mxc_hdmi.h
 +#include asm/arch/crm_regs.h
 +#include linux/fb.h
 +#include ipu_pixfmt.h
 +#include asm/io.h
 +#include asm/arch/sys_proto.h
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |\
 + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
 + PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 +
 +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
 + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
 + PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 +
 +#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP |\
 + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
 +
 +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
 +   PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
 +
 +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP |  \
 + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |   \
 + PAD_CTL_ODE | PAD_CTL_SRE_FAST)
 +
 +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 +
 +#define DISP_PAD_CTRL(0x10)
 +
 +#define ECSPI4_CS1   IMX_GPIO_NR(5, 2)
 +
 +struct i2c_pads_info i2c_pad_info1 = {
 + .scl = {
 + .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC,
 + .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
 + .gp = IMX_GPIO_NR(5, 27)
 + },
 + .sda = {
 + .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
 +  

[U-Boot] [PATCH] driver/mtd: Use generic timer API for FSL IFC, eLBC

2014-07-15 Thread Prabhakar Kushwaha
Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks

Replace usec2ticks with get_timer() (generic timer API)

Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---

 drivers/mtd/nand/fsl_elbc_nand.c |8 
 drivers/mtd/nand/fsl_ifc_nand.c  |   21 ++---
 2 files changed, 14 insertions(+), 15 deletions(-)

diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 2f31fc9..58b55cb 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -37,7 +37,6 @@
 
 #define MAX_BANKS 8
 #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */
-#define FCM_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for FCM */
 
 #define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC)
 
@@ -199,7 +198,8 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
struct fsl_elbc_mtd *priv = chip-priv;
struct fsl_elbc_ctrl *ctrl = priv-ctrl;
fsl_lbc_t *lbc = ctrl-regs;
-   long long end_tick;
+   u32 timeo = (CONFIG_SYS_HZ * 10) / 1000;
+   u32 time_start;
u32 ltesr;
 
/* Setup the FMR[OP] to execute without write protection */
@@ -218,10 +218,10 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
out_be32(lbc-lsor, priv-bank);
 
/* wait for FCM complete flag or timeout */
-   end_tick = usec2ticks(FCM_TIMEOUT_MSECS * 1000) + get_ticks();
+   time_start = get_timer(0);
 
ltesr = 0;
-   while (end_tick  get_ticks()) {
+   while (get_timer(time_start)  timeo) {
ltesr = in_be32(lbc-ltesr);
if (ltesr  LTESR_CC)
break;
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 8b453cb..6c158f5 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -26,8 +26,6 @@
 #define MAX_BANKS  CONFIG_SYS_FSL_IFC_BANK_COUNT
 #define ERR_BYTE   0xFF /* Value returned for read bytes
when read failed */
-#define IFC_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for IFC
-   NAND Machine */
 
 struct fsl_ifc_ctrl;
 
@@ -292,7 +290,8 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
struct fsl_ifc_mtd *priv = chip-priv;
struct fsl_ifc_ctrl *ctrl = priv-ctrl;
struct fsl_ifc *ifc = ctrl-regs;
-   long long end_tick;
+   u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
+   u32 time_start;
u32 eccstat[4];
int i;
 
@@ -304,9 +303,9 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
  IFC_NAND_SEQ_STRT_FIR_STRT);
 
/* wait for NAND Machine complete flag or timeout */
-   end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks();
+   time_start = get_timer(0);
 
-   while (end_tick  get_ticks()) {
+   while (get_timer(time_start)  timeo) {
ctrl-status = ifc_in32(ifc-ifc_nand.nand_evter_stat);
 
if (ctrl-status  IFC_NAND_EVTER_STAT_OPC)
@@ -810,15 +809,16 @@ static int fsl_ifc_sram_init(uint32_t ver)
struct fsl_ifc *ifc = ifc_ctrl-regs;
uint32_t cs = 0, csor = 0, csor_8k = 0, csor_ext = 0;
uint32_t ncfgr = 0;
-   long long end_tick;
+   u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
+   u32 time_start;
 
if (ver  FSL_IFC_V1_1_0) {
ncfgr = ifc_in32(ifc-ifc_nand.ncfgr);
ifc_out32(ifc-ifc_nand.ncfgr, ncfgr | IFC_NAND_SRAM_INIT_EN);
 
/* wait for  SRAM_INIT bit to be clear or timeout */
-   end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks();
-   while (end_tick  get_ticks()) {
+   time_start = get_timer(0);
+   while (get_timer(time_start)  timeo) {
ifc_ctrl-status =
ifc_in32(ifc-ifc_nand.nand_evter_stat);
 
@@ -861,10 +861,9 @@ static int fsl_ifc_sram_init(uint32_t ver)
/* start read seq */
ifc_out32(ifc-ifc_nand.nandseq_strt, IFC_NAND_SEQ_STRT_FIR_STRT);
 
-   /* wait for NAND Machine complete flag or timeout */
-   end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks();
+   time_start = get_timer(0);
 
-   while (end_tick  get_ticks()) {
+   while (get_timer(time_start)  timeo) {
ifc_ctrl-status = ifc_in32(ifc-ifc_nand.nand_evter_stat);
 
if (ifc_ctrl-status  IFC_NAND_EVTER_STAT_OPC)
-- 
1.7.9.5


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Re: [U-Boot] [PATCH 06/25] dm: spi: Add a uclass for SPI

2014-07-15 Thread Pavel Herrmann
Hi

On Monday 14 of July 2014 18:56:13 Simon Glass wrote:
 Add a uclass which provides access to SPI buses and includes operations
 required by SPI.
 
 For a time driver model will need to co-exist with the legacy SPI interface
 so some parts of the header file are changed depending on which is in use.
 The exports are adjusted also since some functions are not available with
 driver model.
 
 Boards must define CONFIG_DM_SPI to use driver model for SPI.
 
 Signed-off-by: Simon Glass s...@chromium.org
 ---
 
 ...
 +int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
 +  const void *dout, void *din, unsigned long flags)
 +{
 + struct udevice *dev = slave-dev;
 + struct udevice *bus = dev-parent;

is this the best interface here?
I think it would be cleaner if bus drivers had interfaces which follow a 
certain template, such as
bus_ops(struct udevice *bus, struct udevice *child, ...)

struct spi_slave would be a prime candidate to have in child-parentdata 
(which should only be accessed by the parent IIUC)

regards
Pavel Herrmann
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Re: [U-Boot] [PATCH v2 3/5] i.MX6: define struct pwm_regs and PWMCR_* defines

2014-07-15 Thread Heiko Schocher

Hello Stefano,

Am 15.07.2014 10:12, schrieb Stefano Babic:

Hi Heiko,

On 12/07/2014 06:10, Heiko Schocher wrote:

add defines for pwm modul found on imx6.

Signed-off-by: Heiko Schocherh...@denx.de
Cc: Stefano Babicsba...@denx.de

---
- changes for v2:
   - new

  arch/arm/include/asm/arch-mx6/imx-regs.h | 16 
  1 file changed, 16 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 7193118..2135051 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -669,5 +669,21 @@ struct wdog_regs {
u16 wmcr;   /* Miscellaneous Control */
  };

+#define PWMCR_PRESCALER(x) (((x - 1)  0xFFF)  4)
+#define PWMCR_DOZEEN   (1  24)
+#define PWMCR_WAITEN   (1  23)
+#define PWMCR_DBGEN(1  22)
+#define PWMCR_CLKSRC_IPG_HIGH  (2  16)
+#define PWMCR_CLKSRC_IPG   (1  16)
+#define PWMCR_EN   (1  0)
+
+struct pwm_regs {
+   u32 cr;
+   u32 sr;
+   u32 ir;
+   u32 sar;
+   u32 pr;
+   u32 cnr;
+};
  #endif /* __ASSEMBLER__*/
  #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */



I see. What do you mind to add a little effort and move the setup of the
PWM from the aristaneos board to a PWM driver ? I see there is not (yet)
such a driver, but why not ?


Yes, I can do that ... Hmm, where do you think is a good place for this
driver?


What we need are only three simple functions exactly as in Linux kernel:
pwm_enable() pwm_disable(), pwm_config(duty, period)

This becomes more general and can be reused by other i.MX boards.


bye,
Heiko
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Re: [U-Boot] [PATCH v2 26/29] dm: Add child_pre_probe() and child_post_remove() methods

2014-07-15 Thread Pavel Herrmann
Hi

On Tuesday 08 of July 2014 21:38:16 Simon Glass wrote:
 ...
 +
 +Note that the information that controls this behaviour is in the bus's
 +driver, not the child's. In fact it is possible that child has no knowledge
 +that it is connected to a bus. The same child device may even be used on
 two +different bus types. As an example. the 'flash' device shown above may
 also +be connected on a SATA bus or standalone with no bus:
 +
 +   xhci_usb (UCLASS_USB)
 +  flash (UCLASS_FLASH_STORAGE)  - parent data/methods defined by USB
 bus +
 +   sata (UCLASS_SATA)
 +  flash (UCLASS_FLASH_STORAGE)  - parent data/methods defined by SATA
 bus +
 +   flash (UCLASS_FLASH_STORAGE)  - no parent data/methods (not on a bus)

this is not the best example, since the driver actually needs to have an idea 
what parent bus it is connected to, as it should use the parents driver.ops to 
communicate with the device.

the better (more realistic) version would show that the same device would 
operate under various xhci_usb, ohci_usb and ehci_usb busses, which might very 
well have different parent_priv structure (for example, ohci_usb would probably 
not store maximum speed supported by the device, since the bus only has the 
basic one)

as a side note, flash is a bit tricky here, since USB and SATA do not provide 
you with flash-like interface even for flash-based devices, but instead have 
a 
disk-like interface, which is simpler (does not give you the ability to 
control bad block management, among other things).


regards
Pavel Herrmann
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Re: [U-Boot] [PATCH v2 3/5] i.MX6: define struct pwm_regs and PWMCR_* defines

2014-07-15 Thread Stefano Babic
Hi Heiko,

On 15/07/2014 10:52, Heiko Schocher wrote:

 I see. What do you mind to add a little effort and move the setup of the
 PWM from the aristaneos board to a PWM driver ? I see there is not (yet)
 such a driver, but why not ?
 
 Yes, I can do that ... Hmm, where do you think is a good place for this
 driver?
 

IMHO you can create a drivers/pwm directory and add a pwm-imx.c driver.
This reflects the same we have in kernel.

Stefano

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Re: [U-Boot] [PATCH v2 3/5] i.MX6: define struct pwm_regs and PWMCR_* defines

2014-07-15 Thread Heiko Schocher

Hello Stefano,

Am 15.07.2014 10:58, schrieb Stefano Babic:

Hi Heiko,

On 15/07/2014 10:52, Heiko Schocher wrote:


I see. What do you mind to add a little effort and move the setup of the
PWM from the aristaneos board to a PWM driver ? I see there is not (yet)
such a driver, but why not ?


Yes, I can do that ... Hmm, where do you think is a good place for this
driver?



IMHO you can create a drivers/pwm directory and add a pwm-imx.c driver.
This reflects the same we have in kernel.


Yes, that was also my first thought, but we have a API for this in
include/pwm.h
but no drivers/pwm ... so I searched pwm_init and found:

pollux:u-boot hs [20140715] $ grep -lr pwm_init .
./include/.pwm.h.swp
./include/pwm.h
./arch/arm/include/asm/arch-tegra20/pwm.h
./arch/arm/cpu/armv7/s5p-common/pwm.c
./arch/arm/cpu/armv7/s5p-common/timer.c
./arch/arm/cpu/armv7/tegra20/pwm.c
./board/nvidia/common/board.c
pollux:u-boot hs [20140715] $

I think, it would better to add a arch/arm/cpu/armv7/mx6/pwm.c

Would this be ok?

bye,
Heiko
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Re: [U-Boot] SPL broken on i.mx31 platforms

2014-07-15 Thread Helmut Raiger

On 07/11/2014 09:56 AM, Magnus Lilja wrote:

Hi

On 8 July 2014 10:05, Helmut Raiger helmut.rai...@hale.at wrote:

I meant, that the SPL is now doing the RAM init and copying of the SPL code
correctly. RAM is working, the SPL code is at 0x87dc after that (CRCed
it via JTAG).
I could not track it further (I have very limited development time right now
... repeating myself).

After all I need to debug further. If someone could test the current state
on the
mx31pdk, this still would be great. Just to rule out any other board
specific issues.

I can confirm that a recent U-boot (I think it was 2014.04) did not
work for me on mx31pdk, I think I had to go back to 2013.04 to get a
working U-boot.

So I don't think it's a board specific issue.

Regards, Magnus

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Hi,

   thx Magnus for the test, could you possibly change the few lines of 
code and test again:


diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 1cfcca9..53bde12 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -91,4 +91,9 @@ cpu_init_crit:
bl  lowlevel_init   /* go setup pll,mux,memory */
mov lr, ip  /* restore link */
mov pc, lr  /* back to my caller */
+
+   nop
+   nop
+   nop
+
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index d68cc47..8c0e3c1 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -50,7 +50,8 @@ _start:
 #endif

 _start:
-   ldr pc, _reset
+   /* be position independent if SPL is linked at different 
location */

+   b   reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort


This fixes the SPL, in a later test I had to another nop and I still have
no explanation why.

Again thanks for the support.
Helmut


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[U-Boot] Tegra T30 support, bootcounting and watchdog

2014-07-15 Thread Gabriele Randelli
Hi,

I would like to know whether U-Boot supports boot counting (through
CONFIG_BOOTCOUNT_LIMIT fag) and boot watchdog (through CONFIG_WATCHDOG
flag) on T30 platforms.

Thanks
Gab

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Re: [U-Boot] [PATCH v2 3/5] i.MX6: define struct pwm_regs and PWMCR_* defines

2014-07-15 Thread Stefano Babic
Hi Heiko,

On 15/07/2014 11:27, Heiko Schocher wrote:
 Hello Stefano,
 
 Am 15.07.2014 10:58, schrieb Stefano Babic:
 Hi Heiko,

 On 15/07/2014 10:52, Heiko Schocher wrote:

 I see. What do you mind to add a little effort and move the setup of
 the
 PWM from the aristaneos board to a PWM driver ? I see there is not
 (yet)
 such a driver, but why not ?

 Yes, I can do that ... Hmm, where do you think is a good place for this
 driver?


 IMHO you can create a drivers/pwm directory and add a pwm-imx.c driver.
 This reflects the same we have in kernel.
 
 Yes, that was also my first thought, but we have a API for this in
 include/pwm.h
 but no drivers/pwm ... so I searched pwm_init and found:
 
 pollux:u-boot hs [20140715] $ grep -lr pwm_init .
 ./include/.pwm.h.swp
 ./include/pwm.h
 ./arch/arm/include/asm/arch-tegra20/pwm.h
 ./arch/arm/cpu/armv7/s5p-common/pwm.c
 ./arch/arm/cpu/armv7/s5p-common/timer.c
 ./arch/arm/cpu/armv7/tegra20/pwm.c
 ./board/nvidia/common/board.c
 pollux:u-boot hs [20140715] $
 
 I think, it would better to add a arch/arm/cpu/armv7/mx6/pwm.c
 
 Would this be ok?

Added Tom for asking his opinion. IMHO we had in the past a lot of
drivers hidden in arch/ directories, and we have already moved them to a
more generic drivers/ organization.

include/pwm.h is ok. It sets the prototypes as in kernel. Personally, I
would move the driver for tegra in drivers/pwm/ else to hide a new
driver in arch/arm/cpu/armv7/mx6/pwm.c

Best regards,
Stefano

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[U-Boot] git pull fails ?!

2014-07-15 Thread Hannes Petermaier

Hello,

at this moment i tried to fetch newest u-boot using 'git pull'

GIT answered to me:

error: Unable to find 524123a70761110c5cf3ccc5f52f6d4da071b959 under 
http://git.denx.de/u-boot.git

Cannot obtain needed object 524123a70761110c5cf3ccc5f52f6d4da071b959
error: Fetch failed.

does anybody know whats going wrong?

best regards,
Hannes

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Re: [U-Boot] git pull fails ?!

2014-07-15 Thread Wolfgang Denk
Dear Hannes Petermaier,

In message 53c51013.1020...@petermaier.org you wrote:
 
 at this moment i tried to fetch newest u-boot using 'git pull'
 
 GIT answered to me:
 
 error: Unable to find 524123a70761110c5cf3ccc5f52f6d4da071b959 under 
 http://git.denx.de/u-boot.git
 Cannot obtain needed object 524123a70761110c5cf3ccc5f52f6d4da071b959
 error: Fetch failed.
 
 does anybody know whats going wrong?


It works for me, both pulling into an existing repo and cloning from
scratch.  eventually you have local problems.  Try if git gc --prune,
eventually followed by git pack-refs --prune helps.

It it doesn't, then clone from scratch.

And of course you should use git protocol rather than HTTP.

Best regards,

Wolfgang Denk

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Re: [U-Boot] git pull fails ?!

2014-07-15 Thread Hannes Petermaier

Dear Wolfgang,

I am using the git protocol but only a clone from scratch worked for me.

many thanks and best regards,
hannes


On 2014-07-15 14:28, Wolfgang Denk wrote:

Dear Hannes Petermaier,

In message 53c51013.1020...@petermaier.org you wrote:

at this moment i tried to fetch newest u-boot using 'git pull'

GIT answered to me:

error: Unable to find 524123a70761110c5cf3ccc5f52f6d4da071b959 under
http://git.denx.de/u-boot.git
Cannot obtain needed object 524123a70761110c5cf3ccc5f52f6d4da071b959
error: Fetch failed.

does anybody know whats going wrong?


It works for me, both pulling into an existing repo and cloning from
scratch.  eventually you have local problems.  Try if git gc --prune,
eventually followed by git pack-refs --prune helps.

It it doesn't, then clone from scratch.

And of course you should use git protocol rather than HTTP.

Best regards,

Wolfgang Denk



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[U-Boot] [PATCH 1/3] Makefile: fix the {c, e}tags/cscope build targets

2014-07-15 Thread Igor Grinberg
Commit 9e41403 (kbuild: change out-of-tree build)
changed the U-Boot build working directory to the output tree
for the out-of-tree builds.
This broke the {c,e}tags/cscope build targets as TAG_SUBDIRS variable
collected directories based on assumption that the build working
directory is the U-Boot source tree directory.

Fix the {c,e}tags/cscope build targets by adding the $(srctree) prefix.
Also, remove the $(obj) prefix from the etags build target to finish
the $(obj) prefix removal started by the same commit.

Cc: Masahiro Yamada yamad...@jp.panasonic.com
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 5277781..26b29d1 100644
--- a/Makefile
+++ b/Makefile
@@ -1137,7 +1137,7 @@ spl/sunxi-spl.bin: spl/u-boot-spl
 tpl/u-boot-tpl.bin: tools prepare
$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all 
CONFIG_TPL_BUILD=y
 
-TAG_SUBDIRS := $(u-boot-dirs) include
+TAG_SUBDIRS := $(patsubst %,$(srctree)/%,$(u-boot-dirs) include)
 
 FIND := find
 FINDFLAGS := -L
@@ -1147,7 +1147,7 @@ tags ctags:
-name '*.[chS]' -print`
 
 etags:
-   etags -a -o $(obj)etags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
+   etags -a -o etags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
-name '*.[chS]' -print`
 cscope:
$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) -name '*.[chS]' -print  \
-- 
1.8.5.5

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[U-Boot] [PATCH 2/3] Makefile: fix ctags/etags clean targets

2014-07-15 Thread Igor Grinberg
Commit efcf861 (kbuild: use scripts/Makefile.clean)
refactored the cleaning targets and accidentially replaced the actually
generated ctags and etags files in the file list by tags and TAGS.
tags and TAGS are not part of the Makefile build targets and
therefore should not be a part of the list for clean targets.

Substitute the actually generated files instead, to fix the clean
targets behavior.

Cc: Masahiro Yamada yamad...@jp.panasonic.com
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 26b29d1..bfe801c 100644
--- a/Makefile
+++ b/Makefile
@@ -1222,7 +1222,7 @@ CLOBBER_FILES += u-boot* MLO* SPL System.map
 MRPROPER_DIRS  += include/config include/generated  \
  .tmp_objdiff
 MRPROPER_FILES += .config .config.old \
- tags TAGS cscope* GPATH GTAGS GRTAGS GSYMS \
+ ctags etags cscope* GPATH GTAGS GRTAGS GSYMS \
  include/config.h include/config.mk
 
 # clean - Delete most, but leave enough to build external modules
-- 
1.8.5.5

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[U-Boot] [PATCH 0/3] Fix {c,e}tags/cscope build targets

2014-07-15 Thread Igor Grinberg
Some recent changes (move to Kbuild) to the Makefile broke
the tags and cscope build targets.
This patch set brings those back again to working state.

Igor Grinberg (3):
  Makefile: fix the {c,e}tags/cscope build targets
  Makefile: fix ctags/etags clean targets
  Makefile: fix tags target documentation

 Makefile | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

-- 
1.8.5.5

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[U-Boot] [PATCH 3/3] Makefile: fix tags target documentation

2014-07-15 Thread Igor Grinberg
Replace the TAGS target name by the actual ctags target name.
Also, add etags target documentation.

Cc: Masahiro Yamada yamad...@jp.panasonic.com
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
 Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index bfe801c..ca212b5 100644
--- a/Makefile
+++ b/Makefile
@@ -1311,7 +1311,8 @@ help:
@echo  '  dir/file.[oisS] - Build specified target only'
@echo  '  dir/file.lst- Build specified mixed source/assembly 
target only'
@echo  '(requires a recent binutils and recent 
build (System.map))'
-   @echo  '  tags/TAGS   - Generate tags file for editors'
+   @echo  '  tags/ctags  - Generate ctags file for editors'
+   @echo  '  etags   - Generate etags file for editors'
@echo  '  cscope  - Generate cscope index'
@echo  '  ubootrelease- Output the release version string'
@echo  '  ubootversion- Output the version stored in Makefile'
-- 
1.8.5.5

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[U-Boot] [PATCH v1 1/2] mtd, ubi, ubifs: update for the sync with linux v3.14

2014-07-15 Thread Heiko Schocher
while playing with the new mtd/ubi/ubifs sync, found some
small updates for it:

- add del_mtd_partition() to include/linux/mtd/mtd
- mtd: add a debug_printf
- remove some not used functions

Signed-off-by: Heiko Schocher h...@denx.de
Cc: Scott Wood scottw...@freescale.com
Cc: Tom Rini tr...@ti.com

---

This patch is based on the mtd/ubi/ubifs sync with linux v3.14
patches, see:

[U-Boot] [PATCH v5 0/5] mtd, ubi, ubifs: resync with Linux-3.14
http://lists.denx.de/pipermail/u-boot/2014-June/182501.html

Patchwork [U-Boot,v5,1/5] lib, rbtree: resync with Linux-3.14
http://patchwork.ozlabs.org/patch/363332/

Patchwork [U-Boot,v5,2/5] lib, list_sort: add list_sort from linux 3.14
http://patchwork.ozlabs.org/patch/363335/

Patchwork [U-Boot,v5,3/5] linux include: add ERR_CAST
http://patchwork.ozlabs.org/patch/363334/

Patchwork [U-Boot,v5,4/5] lib, linux: move linux specific defines to 
linux/compat.h
http://patchwork.ozlabs.org/patch/36/

Patchwork [U-Boot,v5,5/5] mtd, ubi, ubifs: resync with Linux-3.14
http://patchwork.ozlabs.org/patch/363343/
---
 drivers/mtd/mtdcore.c   | 2 ++
 drivers/mtd/mtdpart.c   | 2 ++
 fs/ubifs/super.c| 6 ++
 include/linux/mtd/mtd.h | 1 +
 4 files changed, 11 insertions(+)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 796ac07..bdb94ce 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -476,6 +476,8 @@ int add_mtd_device(struct mtd_info *mtd)
   the notifier, since we hold the mtd_table_mutex */
list_for_each_entry(not, mtd_notifiers, list)
not-add(mtd);
+#else
+   pr_debug(mtd: Giving out device %d to %s\n, i, mtd-name);
 #endif
 
mutex_unlock(mtd_table_mutex);
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index d20b857..3dc47b3 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -572,6 +572,7 @@ out_register:
return slave;
 }
 
+#ifndef __UBOOT__
 int mtd_add_partition(struct mtd_info *master, const char *name,
  long long offset, long long length)
 {
@@ -651,6 +652,7 @@ int mtd_del_partition(struct mtd_info *master, int partno)
return ret;
 }
 EXPORT_SYMBOL_GPL(mtd_del_partition);
+#endif
 
 /*
  * This function, given a master MTD object and a partition table, creates
diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c
index 9c87db4..5f53691 100644
--- a/fs/ubifs/super.c
+++ b/fs/ubifs/super.c
@@ -2241,8 +2241,14 @@ static int ubifs_fill_super(struct super_block *sb, void 
*data, int silent)
int err;
 
c-vfs_sb = sb;
+#ifndef __UBOOT__
/* Re-open the UBI device in read-write mode */
c-ubi = ubi_open_volume(c-vi.ubi_num, c-vi.vol_id, UBI_READWRITE);
+#else
+   /* U-Boot read only mode */
+   c-ubi = ubi_open_volume(c-vi.ubi_num, c-vi.vol_id, UBI_READONLY);
+#endif
+
if (IS_ERR(c-ubi)) {
err = PTR_ERR(c-ubi);
goto out;
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 47fd6f0..8561b78 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -480,6 +480,7 @@ static inline int mtd_is_bitflip_or_eccerr(int err) {
 #ifdef __UBOOT__
 /* drivers/mtd/mtdcore.h */
 int add_mtd_device(struct mtd_info *mtd);
+int del_mtd_device(struct mtd_info *mtd);
 int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
 int del_mtd_partitions(struct mtd_info *);
 
-- 
1.8.3.1

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[U-Boot] [PATCH v1 2/2] mtd,ubi,ubifs: sync with linux v3.15

2014-07-15 Thread Heiko Schocher
snyc with linux v3.15:

commit 1860e379875dfe7271c649058aeddffe5afd9d0d
Author: Linus Torvalds torva...@linux-foundation.org
Date:   Sun Jun 8 11:19:54 2014 -0700

Linux 3.15

Signed-off-by: Heiko Schocher h...@denx.de
Cc: Scott Wood scottw...@freescale.com
Cc: Tom Rini tr...@ti.com

---

- how to create this patch

  - copy all linux mtd files from the last linux commit
which with U-Boot mtd,ubi,ubifs code was synced

- git diff will show you all U-Boot specific
   changes
- save this patch

  - now go in the linux tree and checkout the new commit you want
to sync U-Boot with

  - copy now all linux mtd files to the U-Boot tree
- you see now all linux specific changes.

  - commit this for documentation only

  - apply the u-boot specific changes patch now
  - fix errors
  - test
  - commit and send to ML
---
 drivers/mtd/mtdcore.c|  24 --
 drivers/mtd/mtdpart.c|  14 ++--
 drivers/mtd/nand/nand_base.c | 174 +++
 drivers/mtd/nand/nand_ids.c  |   3 +
 drivers/mtd/ubi/build.c  |  11 +++
 drivers/mtd/ubi/ubi.h|  21 +-
 drivers/mtd/ubi/wl.c |   6 ++
 fs/ubifs/super.c |   5 +-
 include/linux/mtd/mtd.h  |  16 ++--
 include/linux/mtd/nand.h | 113 +---
 include/mtd/ubi-user.h   |  22 ++
 11 files changed, 341 insertions(+), 68 deletions(-)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index bdb94ce..6ad0357 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1011,14 +1011,14 @@ EXPORT_SYMBOL_GPL(mtd_read_oob);
  * devices. The user data is one time programmable but the factory data is read
  * only.
  */
-int mtd_get_fact_prot_info(struct mtd_info *mtd, struct otp_info *buf,
-  size_t len)
+int mtd_get_fact_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen,
+  struct otp_info *buf)
 {
if (!mtd-_get_fact_prot_info)
return -EOPNOTSUPP;
if (!len)
return 0;
-   return mtd-_get_fact_prot_info(mtd, buf, len);
+   return mtd-_get_fact_prot_info(mtd, len, retlen, buf);
 }
 EXPORT_SYMBOL_GPL(mtd_get_fact_prot_info);
 
@@ -1034,14 +1034,14 @@ int mtd_read_fact_prot_reg(struct mtd_info *mtd, loff_t 
from, size_t len,
 }
 EXPORT_SYMBOL_GPL(mtd_read_fact_prot_reg);
 
-int mtd_get_user_prot_info(struct mtd_info *mtd, struct otp_info *buf,
-  size_t len)
+int mtd_get_user_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen,
+  struct otp_info *buf)
 {
if (!mtd-_get_user_prot_info)
return -EOPNOTSUPP;
if (!len)
return 0;
-   return mtd-_get_user_prot_info(mtd, buf, len);
+   return mtd-_get_user_prot_info(mtd, len, retlen, buf);
 }
 EXPORT_SYMBOL_GPL(mtd_get_user_prot_info);
 
@@ -1060,12 +1060,22 @@ EXPORT_SYMBOL_GPL(mtd_read_user_prot_reg);
 int mtd_write_user_prot_reg(struct mtd_info *mtd, loff_t to, size_t len,
size_t *retlen, u_char *buf)
 {
+   int ret;
+
*retlen = 0;
if (!mtd-_write_user_prot_reg)
return -EOPNOTSUPP;
if (!len)
return 0;
-   return mtd-_write_user_prot_reg(mtd, to, len, retlen, buf);
+   ret = mtd-_write_user_prot_reg(mtd, to, len, retlen, buf);
+   if (ret)
+   return ret;
+
+   /*
+* If no data could be written at all, we are out of memory and
+* must return -ENOSPC.
+*/
+   return (*retlen) ? 0 : -ENOSPC;
 }
 EXPORT_SYMBOL_GPL(mtd_write_user_prot_reg);
 
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 3dc47b3..2f20b92 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -178,11 +178,12 @@ static int part_read_user_prot_reg(struct mtd_info *mtd, 
loff_t from,
 retlen, buf);
 }
 
-static int part_get_user_prot_info(struct mtd_info *mtd,
-   struct otp_info *buf, size_t len)
+static int part_get_user_prot_info(struct mtd_info *mtd, size_t len,
+  size_t *retlen, struct otp_info *buf)
 {
struct mtd_part *part = PART(mtd);
-   return part-master-_get_user_prot_info(part-master, buf, len);
+   return part-master-_get_user_prot_info(part-master, len, retlen,
+buf);
 }
 
 static int part_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
@@ -193,11 +194,12 @@ static int part_read_fact_prot_reg(struct mtd_info *mtd, 
loff_t from,
 retlen, buf);
 }
 
-static int part_get_fact_prot_info(struct mtd_info *mtd, struct otp_info *buf,
-   size_t len)
+static int part_get_fact_prot_info(struct mtd_info *mtd, size_t len,
+  size_t *retlen, struct otp_info *buf)
 {
struct mtd_part *part = 

Re: [U-Boot] [PATCH v5] mx6: add support of multi-processor command

2014-07-15 Thread gabriel huau

On 07/15/2014 12:49 AM, Stefano Babic wrote:

Hi Gabriel,

On 13/07/2014 00:31, Gabriel Huau wrote:

This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.

Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr
---
Changes for v2:
- Add a commit log message to explain the purpose of this patch
Changes for v3:
- Remove unnecessary check for unsigned values when they are negative
Changes for v4:
- Add CONFIG_MP to the common mx6 configuration
- Get the number of CPUs dynamically instead of using a macro
Changes for v5:
- Rebase on the last update of the tree (conflicts solved)

However, I get several warnings applying your patch:

arch/arm/include/asm/arch/sys_proto.h:17:0: warning: is_soc_rev
redefined [enabled by default]
arch/arm/include/asm/arch/sys_proto.h:15:0: note: this is the location
of the previous definition


and:

arch/arm/cpu/armv7/mx6/mp.c:101:2: warning: implicit declaration of
function 'get_nr_cpus' [-Wimplicit-function-declaration]
In file included from arch/arm/imx-common/cpu.c:15:0:

You muxt fix them.


My bad during the merge conflict, I'll fix that for the next version of 
the patch.



- Add a dummy header to solve build issue regarding the common/board_f.c


I do not think this is the best solution. An empty file is a file that
is not needed.


  arch/arm/cpu/armv7/mx6/Makefile   |   1 +
  arch/arm/cpu/armv7/mx6/mp.c   | 134 ++
  arch/arm/cpu/armv7/mx6/soc.c  |   6 ++
  arch/arm/include/asm/arch-mx6/imx-regs.h  |  13 +++
  arch/arm/include/asm/arch-mx6/sys_proto.h |   1 +
  arch/arm/include/asm/mp.h |  11 +++
  include/configs/mx6_common.h  |   2 +
  7 files changed, 168 insertions(+)
  create mode 100644 arch/arm/cpu/armv7/mx6/mp.c
  create mode 100644 arch/arm/include/asm/mp.h


I have just investigate a bit. The file is included by common/board_f.c
but it is, frankly, quite not used. There are several prototype inside it:

void setup_mp(void);
void cpu_mp_lmb_reserve(struct lmb *lmb);
int is_core_disabled(int nr);

They are not used at all.

u32 determine_mp_bootpg(unsigned int *pagesize);

This is the only one that is used.

Then it makes more sense to drop mp.h from board_f.c and add a prototype
for determine_mp_bootpg(). This function is already protected by:

#if defined(CONFIG_MP)  (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))


I agree adding an empty is not necessary the best solution, but I'd 
rather not to add any cpu/board specific defines in the common/ folder. 
That's why I think we should keep CONFIG_PM as this is a generic define. 
If necessary, I can propose another patch to fix it.



Best regards,
Stefano Babic



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[U-Boot] [PATCH v1 0/2] mtd,ubi,ubifs: sync with v3.15

2014-07-15 Thread Heiko Schocher
as Tom Rini suggested, I tried to update the mtd,ubi and ubifs
subsystem with linux v3.15:

commit 1860e379875dfe7271c649058aeddffe5afd9d0d
Author: Linus Torvalds torva...@linux-foundation.org
Date:   Sun Jun 8 11:19:54 2014 -0700

Linux 3.15

First patch in this patchserie is a patch, which contains some
small changes based on the linux v3.14 patchserie [1]

Second patch is the real sync with linux v3.15 patch, based
on [1], created in the following way:

1) checkout linux v3.14 in the linux tree
2) copy all files [2] from the linux tree to the u-boot tree
3) git diff shows a patch, which contains all u-boot specific
   changes - save it for later use
4) checkout linux v3.15 in the linux tree
5) copy all files [2] from the linux tree to the u-boot tree
6) git diff shows all linux specific changes between v3.14 and v3.15
7) apply u-boot specific changes patch from step 3
8) fix warnings, errors
9) compile (MAKEALL compiles clean for arm, powerpc and mips)
10) test, test, test (done on the imx6 based aristainetos board)
11) commit it, make patch and send to ML

[1] linux v3.14 sync
[U-Boot] [PATCH v5 0/5] mtd, ubi, ubifs: resync with Linux-3.14
http://lists.denx.de/pipermail/u-boot/2014-June/182501.html
Patchwork [U-Boot,v5,1/5] lib, rbtree: resync with Linux-3.14
http://patchwork.ozlabs.org/patch/363332/
Patchwork [U-Boot,v5,2/5] lib, list_sort: add list_sort from linux 3.14
http://patchwork.ozlabs.org/patch/363335/
Patchwork [U-Boot,v5,3/5] linux include: add ERR_CAST
http://patchwork.ozlabs.org/patch/363334/
Patchwork [U-Boot,v5,4/5] lib, linux: move linux specific defines to 
linux/compat.h
http://patchwork.ozlabs.org/patch/36/
Patchwork [U-Boot,v5,5/5] mtd, ubi, ubifs: resync with Linux-3.14
http://patchwork.ozlabs.org/patch/363343/

[2] linux files used
drivers/mtd/mtdconcat.c
drivers/mtd/mtdcore.c
drivers/mtd/mtdpart.c
drivers/mtd/mtdcore.h
drivers/mtd/nand/nand_base.c
drivers/mtd/nand/nand_bbt.c
drivers/mtd/nand/nand_ids.c
drivers/mtd/ubi/attach.c
drivers/mtd/ubi/build.c
drivers/mtd/ubi/debug.c
drivers/mtd/ubi/debug.h
drivers/mtd/ubi/eba.c
drivers/mtd/ubi/fastmap.c
drivers/mtd/ubi/io.c
drivers/mtd/ubi/kapi.c
drivers/mtd/ubi/misc.c
drivers/mtd/ubi/ubi-media.h
drivers/mtd/ubi/ubi.h
drivers/mtd/ubi/upd.c
drivers/mtd/ubi/vmt.c
drivers/mtd/ubi/vtbl.c
drivers/mtd/ubi/wl.c
fs/ubifs/budget.c
fs/ubifs/debug.c
fs/ubifs/debug.h
fs/ubifs/io.c
fs/ubifs/key.h
fs/ubifs/log.c
fs/ubifs/lprops.c
fs/ubifs/lpt.c
fs/ubifs/lpt_commit.c
fs/ubifs/master.c
fs/ubifs/misc.h
fs/ubifs/orphan.c
fs/ubifs/recovery.c
fs/ubifs/replay.c
fs/ubifs/sb.c
fs/ubifs/scan.c
fs/ubifs/super.c
fs/ubifs/tnc.c
fs/ubifs/tnc_misc.c
fs/ubifs/ubifs-media.h
fs/ubifs/ubifs.h
include/linux/mtd/bbm.h
include/linux/mtd/flashchip.h
include/linux/mtd/mtd.h
include/linux/mtd/nand.h
include/linux/mtd/partitions.h
include/linux/mtd/ubi.h
include/uapi/mtd/mtd-abi.h
include/uapi/mtd/ubi-user.h

Cc: Scott Wood scottw...@freescale.com
Cc: Tom Rini tr...@ti.com

Heiko Schocher (2):
  mtd,ubi,ubifs: update for the sync with linux v3.14
  mtd,ubi,ubifs: sync with linux v3.15

 drivers/mtd/mtdcore.c|  26 +--
 drivers/mtd/mtdpart.c|  16 ++--
 drivers/mtd/nand/nand_base.c | 174 +++
 drivers/mtd/nand/nand_ids.c  |   3 +
 drivers/mtd/ubi/build.c  |  11 +++
 drivers/mtd/ubi/ubi.h|  21 +-
 drivers/mtd/ubi/wl.c |   6 ++
 fs/ubifs/super.c |  11 ++-
 include/linux/mtd/mtd.h  |  17 +++--
 include/linux/mtd/nand.h | 113 +---
 include/mtd/ubi-user.h   |  22 ++
 11 files changed, 352 insertions(+), 68 deletions(-)

-- 
1.8.3.1

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[U-Boot] [PATCH] lcd: support displaying 24bpp BMPs on = 24bpp LCDs

2014-07-15 Thread Hannes Petermaier
most todays LCDs support 32bpp e.g. the framebuffer memory is 32bpp
organized.

To support 24bpp BMPs we need to take only 3 byte from the bpp and set
one byte from the FB to 0.

Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
 common/lcd.c |   23 ---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/common/lcd.c b/common/lcd.c
index 54bbf9a..82ea73f 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -982,8 +982,13 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
return 1;
}
 
-   /* We support displaying 8bpp BMPs on 16bpp LCDs */
-   if (bpix != bmp_bpix  !(bmp_bpix == 8  bpix == 16)) {
+   /*
+* We support displaying 8bpp BMPs on 16bpp LCDs
+* and displaying 24bpp BMPs on 32bpp LCDs
+* */
+   if (bpix != bmp_bpix 
+   !(bmp_bpix == 8  bpix == 16) 
+   !(bmp_bpix == 24  bpix == 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix, get_unaligned_le16(bmp-header.bit_count));
return 1;
@@ -1104,7 +1109,19 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
}
break;
 #endif /* CONFIG_BMP_16BPP */
-
+#if defined(CONFIG_BMP_24BMP)
+   case 24:
+   for (i = 0; i  height; ++i) {
+   for (j = 0; j  width; j++) {
+   *(fb++) = *(bmap++);
+   *(fb++) = *(bmap++);
+   *(fb++) = *(bmap++);
+   *(fb++) = 0;
+   }
+   fb -= lcd_line_length + width * (bpix / 8);
+   }
+   break;
+#endif /* CONFIG_BMP_24BMP */
 #if defined(CONFIG_BMP_32BPP)
case 32:
for (i = 0; i  height; ++i) {
-- 
1.7.9.5

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Re: [U-Boot] [PATCH v5] mx6: add support of multi-processor command

2014-07-15 Thread Stefano Babic
Hi Gabriel,

On 15/07/2014 16:13, gabriel huau wrote:

 I have just investigate a bit. The file is included by common/board_f.c
 but it is, frankly, quite not used. There are several prototype inside
 it:

 void setup_mp(void);
 void cpu_mp_lmb_reserve(struct lmb *lmb);
 int is_core_disabled(int nr);

 They are not used at all.

 u32 determine_mp_bootpg(unsigned int *pagesize);

 This is the only one that is used.

 Then it makes more sense to drop mp.h from board_f.c and add a prototype
 for determine_mp_bootpg(). This function is already protected by:

 #if defined(CONFIG_MP)  (defined(CONFIG_MPC86xx) ||
 defined(CONFIG_E500))
 
 I agree adding an empty is not necessary the best solution, but I'd
 rather not to add any cpu/board specific defines in the common/ folder.
 That's why I think we should keep CONFIG_PM as this is a generic define.
 If necessary, I can propose another patch to fix it.

I think we are saying the same thing. I agree letting CONFIG_MP, this is
not the point. But prototype for determine_mp_bootg() can be moved in a
powerpc include file and board_f does not need to include any mp.h

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v5] mx6: add support of multi-processor command

2014-07-15 Thread Gabriel Huau
Agreed, I misunderstood sorry. I'll do the modification for the next 
version of the patch.


Thanks!
Regards,
Gabriel

On 07/15/2014 12:35 PM, Stefano Babic wrote:

Hi Gabriel,

On 15/07/2014 16:13, gabriel huau wrote:


I have just investigate a bit. The file is included by common/board_f.c
but it is, frankly, quite not used. There are several prototype inside
it:

void setup_mp(void);
void cpu_mp_lmb_reserve(struct lmb *lmb);
int is_core_disabled(int nr);

They are not used at all.

u32 determine_mp_bootpg(unsigned int *pagesize);

This is the only one that is used.

Then it makes more sense to drop mp.h from board_f.c and add a prototype
for determine_mp_bootpg(). This function is already protected by:

#if defined(CONFIG_MP)  (defined(CONFIG_MPC86xx) ||
defined(CONFIG_E500))

I agree adding an empty is not necessary the best solution, but I'd
rather not to add any cpu/board specific defines in the common/ folder.
That's why I think we should keep CONFIG_PM as this is a generic define.
If necessary, I can propose another patch to fix it.

I think we are saying the same thing. I agree letting CONFIG_MP, this is
not the point. But prototype for determine_mp_bootg() can be moved in a
powerpc include file and board_f does not need to include any mp.h

Best regards,
Stefano Babic



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Re: [U-Boot] [PATCH 0/5] ARM: Allwinner sun7i (A20) USB Host EHCI support

2014-07-15 Thread Roman B.
On Sat, Jul 12, 2014 at 2:21 PM, Ian Campbell i...@hellion.org.uk wrote:
 On Tue, 2014-07-08 at 22:21 +0200, Roman Byshko wrote:
 This patch series adds USB Host EHCI support to the sun7i SoC.

 When you repost this please could you CC the USB custodian (Marek Vasut,
 marex {AT} denx {DOT} de) for his input on the glue code.

  It was
 tested on Cubietruck. Now you could boot from a USB stick or use a
 compatible Ethernet dongle to add a second Ethernet port in U-Boot.

 ehci-sunxi.c contains some code for poking GPIOs. This code will go
 away once some other patches for sunXi SoCs are applied against upstream.
 For now this patch series is self-contained and has no dependencies.

 Which specific patches are required?
 http://patchwork.ozlabs.org/patch/356566/ Perhaps?

Yes, exactly.

Roman
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Re: [U-Boot] [PATCH] Fix help text of ext2load and fatload.

2014-07-15 Thread Pavel Machek
On Mon 2014-07-14 11:26:32, Tom Rini wrote:
 On Wed, Jul 09, 2014 at 10:40:07PM +0200, Pavel Machek wrote:
  
  Fix help text of ext2load and fatload to match code in fs/fs.c
  
  Signed-off-by: Pavel Machek pa...@denx.de
  
  diff --git a/common/cmd_ext2.c b/common/cmd_ext2.c
  index 5a4bcc1..2675ae8 100644
  --- a/common/cmd_ext2.c
  +++ b/common/cmd_ext2.c
  @@ -45,7 +45,7 @@ U_BOOT_CMD(
   U_BOOT_CMD(
  ext2load,   6,  0,  do_ext2load,
  load binary file from a Ext2 filesystem,
  -   interface dev[:part] [addr] [filename] [bytes]\n
  +   interface [dev[:part] [addr [filename [bytes [pos]\n
 
 Wait, what? [] is optional,  is mandatory.  With the rest of the
 related patches I see you fix a problem about assuming addr but we still
 have to pass along a dev at least, yes?

Do we?

fs/fs.c:

if (fs_set_blk_dev(argv[1], (argc = 3) ? argv[2] : NULL, fstype))
return 1;

This tries to handle case where interface is specified but dev is
not. Aha, and it seems to use bootdevice environment variable if
device is not specified (and also hostfs does not use bootdevice).

SOCFPGA_CYCLONE5 # setenv bootdevice 0:1
SOCFPGA_CYCLONE5 # fatload mmc
** Bad device mmc 0 **

(In older u-boots, bootdevice is indeed mandatory. And clearly I
should get recent u-boot with mmc support; working on that.).

IOW I think the patch is correct as-is.

Best regards,
Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) 
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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[U-Boot] [PATCH v2 1/5] sunxi: add defines to control USB Host clocks/resets

2014-07-15 Thread Roman Byshko
Signed-off-by: Roman Byshko rbys...@gmail.com
---
 arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h 
b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 928f3f2..fe7348a 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -253,4 +253,8 @@ struct sunxi_ccm_reg {
 #define CCM_GMAC_CTRL_GPIT_MII (0x0  2)
 #define CCM_GMAC_CTRL_GPIT_RGMII (0x1  2)
 
+#define CCM_USB_CTRL_PHY1_RST (0x1  1)
+#define CCM_USB_CTRL_PHY2_RST (0x1  2)
+#define CCM_USB_CTRL_PHYGATE (0x1  8)
+
 #endif /* _SUNXI_CLOCK_SUN4I_H */
-- 
2.0.0

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[U-Boot] [PATCH v2 5/5] sun7i: cubietruck: enable USB EHCI

2014-07-15 Thread Roman Byshko
Signed-off-by: Roman Byshko rbys...@gmail.com
---
 boards.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/boards.cfg b/boards.cfg
index 1ba2081..fda3a08 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -377,7 +377,7 @@ Active  arm armv7  rmobile renesas  
   lager
 Active  arm armv7  s5pc1xx samsung goni
s5p_goni  - 

Robert Baldyga r.bald...@samsung.com
 Active  arm armv7  s5pc1xx samsung smdkc100
smdkc100  - 

Minkyu Kang mk7.k...@samsung.com
 Active  arm armv7  socfpga altera  socfpga 
socfpga_cyclone5  - 

-
-Active  arm armv7  sunxi   -   sunxi   
Cubietrucksun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII 

-
+Active  arm armv7  sunxi   -   sunxi   
Cubietruck
sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII,USB_EHCI  
  -
 Active  arm armv7  sunxi   -   sunxi   
Cubietruck_FEL
sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII   
  -
 Active  arm armv7  u8500   st-ericsson snowball
snowball  - 

Mathieu Poirier mathieu.poir...@linaro.org
 Active  arm armv7  u8500   st-ericsson u8500   
u8500_href- 

-
-- 
2.0.0

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[U-Boot] [PATCH v2 2/5] sunxi: add USB EHCI driver

2014-07-15 Thread Roman Byshko
Signed-off-by: Roman Byshko rbys...@gmail.com
---
 drivers/usb/host/Makefile |   1 +
 drivers/usb/host/ehci-sunxi.c | 212 ++
 2 files changed, 213 insertions(+)
 create mode 100644 drivers/usb/host/ehci-sunxi.c

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 04c1a64..c4f5157 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
 obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
 obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
 obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
new file mode 100644
index 000..8e2baa9
--- /dev/null
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -0,0 +1,212 @@
+/*
+ * Copyright (C) 2014 Roman Byshko
+ *
+ * Roman Byshko rbys...@gmail.com
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include asm/arch/clock.h
+#include asm/arch/clock.h
+#include asm/arch/cpu.h
+#include asm/arch/gpio.h
+#include asm/io.h
+#include common.h
+#include ehci.h
+
+#define BIT(x) (1  (x))
+
+#define SUNXI_USB1_IO_BASE 0x01c14000
+#define SUNXI_USB2_IO_BASE 0x01c1c000
+
+#define SUNXI_USB_PMU_IRQ_ENABLE   0x800
+#define SUNXI_USB_CSR  0x01c13404
+#define SUNXI_USB_PASSBY_EN1
+
+#define SUNXI_EHCI_AHB_ICHR8_ENBIT(10)
+#define SUNXI_EHCI_AHB_INCR4_BURST_EN  BIT(9)
+#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN  BIT(8)
+#define SUNXI_EHCI_ULPI_BYPASS_EN  BIT(0)
+
+static struct sunxi_ehci_hcd {
+   void *ehci_base;
+   struct usb_hcd *hcd;
+   int usb_rst_mask;
+   int ahb_clk_mask;
+   int gpio_vbus;
+   void *csr;
+   int irq;
+   int id;
+} sunxi_echi_hcd[CONFIG_USB_MAX_CONTROLLER_COUNT] = {
+   [0] = {
+   .ehci_base = (void *) SUNXI_USB1_IO_BASE,
+   .usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
+   .ahb_clk_mask = BIT(AHB_GATE_OFFSET_USB_EHCI0),
+   .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
+   .csr = (void*) SUNXI_USB_CSR,
+   .irq = 39,
+   .id = 1,
+   },
+#if (CONFIG_USB_MAX_CONTROLLER_COUNT  1)
+   [1] = {
+   .ehci_base = (void *) SUNXI_USB2_IO_BASE,
+   .usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
+   .ahb_clk_mask = BIT(AHB_GATE_OFFSET_USB_EHCI1),
+   .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
+   .csr = (void*) SUNXI_USB_CSR,
+   .irq = 40,
+   .id = 2,
+   }
+#endif
+};
+
+static int sunxi_gpio_output(u32 pin, u32 val)
+{
+   u32 bank = GPIO_BANK(pin);
+   u32 num = GPIO_NUM(pin);
+   struct sunxi_gpio *pio =
+   ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+   if (val)
+   setbits_le32(pio-dat, 0x1  num);
+   else
+   clrbits_le32(pio-dat, 0x1  num);
+
+   return 0;
+}
+
+static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
+ int data, int len)
+{
+   int temp = 0, j = 0, usbc_bit = 0;
+   void *dest = sunxi_ehci-csr;
+
+   usbc_bit = BIT(sunxi_ehci-id * 2);
+   for (j = 0; j  len; j++) {
+   /* set the bit address to be written */
+   clrbits_le32(dest, 0xff  8);
+   setbits_le32(dest, (addr + j)  8);
+
+   clrbits_le32(dest, usbc_bit);
+   /* set data bit */
+   if (data  0x1)
+   setbits_le32(dest, BIT(7));
+   else
+   clrbits_le32(dest, BIT(7));
+
+   setbits_le32(dest, usbc_bit);
+
+   clrbits_le32(dest, usbc_bit);
+
+   data = 1;
+   }
+}
+
+static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+   /* The following comments are machine
+* translated from Chinese, you have been warned!
+*/
+
+   /* adjust PHY's magnitude and rate */
+   usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
+
+   /* threshold adjustment disconnect */
+   usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
+
+   return;
+}
+
+static void sunxi_usb_passby(struct sunxi_ehci_hcd *sunxi_ehci, int enable)
+{
+   unsigned long reg_value = 0;
+   unsigned long bits = 0;
+   void *addr = sunxi_ehci-ehci_base + SUNXI_USB_PMU_IRQ_ENABLE;
+
+   bits = SUNXI_EHCI_AHB_ICHR8_EN |
+   SUNXI_EHCI_AHB_INCR4_BURST_EN |
+   SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
+   SUNXI_EHCI_ULPI_BYPASS_EN;
+
+   if (enable)
+   setbits_le32(addr, bits);
+   else
+   clrbits_le32(addr, bits);
+

[U-Boot] [U-boot] [Patch 0/6] Add support for k2e SoC and EVM

2014-07-15 Thread Ivan Khoronzhuk
This series adds support for Keystone2 K2E SoC and k2e_evm evaluation board.
Based on Generalize Keystone2 code for other SoC types series.
https://www.mail-archive.com/u-boot@lists.denx.de/msg142007.html

Hao Zhang (4):
  ARM: keystone2: add K2E SoC hardware definitions
  ARM: keystone2: clock: add K2E clock support
  ARM: keystone2: add MSMC cache coherency support for K2E SOC
  board: k2e-evm: add board support

Ivan Khoronzhuk (2):
  keystone2: use CONFIG_SOC_KEYSTONE in common places
  ARM: keystone2: spl: add K2E SoC support

 arch/arm/cpu/armv7/keystone/Makefile   |   1 +
 arch/arm/cpu/armv7/keystone/clock-k2e.c| 101 +
 arch/arm/cpu/armv7/keystone/clock.c|   2 +
 arch/arm/cpu/armv7/keystone/cmd_clock.c|  31 ++-
 arch/arm/cpu/armv7/keystone/init.c |  12 ++-
 arch/arm/cpu/armv7/keystone/msmc.c |   4 +-
 arch/arm/cpu/armv7/keystone/spl.c  |   8 ++
 arch/arm/include/asm/arch-keystone/clock-k2e.h |  68 ++
 arch/arm/include/asm/arch-keystone/clock.h |   4 +
 arch/arm/include/asm/arch-keystone/hardware-k2e.h  |  44 +
 arch/arm/include/asm/arch-keystone/hardware-k2hk.h |  44 -
 arch/arm/include/asm/arch-keystone/hardware.h  |  63 -
 arch/arm/include/asm/arch-keystone/msmc.h  |  17 
 board/ti/ks2_evm/Makefile  |   2 +
 board/ti/ks2_evm/board_k2e.c   |  39 
 board/ti/ks2_evm/ddr3_cfg.c|  40 
 board/ti/ks2_evm/ddr3_cfg.h|   3 +
 board/ti/ks2_evm/ddr3_k2e.c|  55 +++
 boards.cfg |   1 +
 common/image-fdt.c |   2 +-
 drivers/serial/ns16550.c   |   4 +-
 include/configs/k2e_evm.h  |  37 
 include/configs/ks2_evm.h  |   2 +-
 23 files changed, 523 insertions(+), 61 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/keystone/clock-k2e.c
 create mode 100644 arch/arm/include/asm/arch-keystone/clock-k2e.h
 create mode 100644 arch/arm/include/asm/arch-keystone/hardware-k2e.h
 create mode 100644 arch/arm/include/asm/arch-keystone/msmc.h
 create mode 100644 board/ti/ks2_evm/board_k2e.c
 create mode 100644 board/ti/ks2_evm/ddr3_k2e.c
 create mode 100644 include/configs/k2e_evm.h

-- 
1.8.3.2

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[U-Boot] [U-boot] [Patch 2/6] ARM: keystone2: clock: add K2E clock support

2014-07-15 Thread Ivan Khoronzhuk
From: Hao Zhang hzh...@ti.com

This patch adds clock definitions and commands to support Keystone2
K2E SOC.

Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 arch/arm/cpu/armv7/keystone/Makefile   |   1 +
 arch/arm/cpu/armv7/keystone/clock-k2e.c| 101 +
 arch/arm/cpu/armv7/keystone/clock.c|   2 +
 arch/arm/cpu/armv7/keystone/cmd_clock.c|  31 ++--
 arch/arm/include/asm/arch-keystone/clock-k2e.h |  68 +
 arch/arm/include/asm/arch-keystone/clock.h |   4 +
 include/configs/ks2_evm.h  |   2 +-
 7 files changed, 203 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/keystone/clock-k2e.c
 create mode 100644 arch/arm/include/asm/arch-keystone/clock-k2e.h

diff --git a/arch/arm/cpu/armv7/keystone/Makefile 
b/arch/arm/cpu/armv7/keystone/Makefile
index 74c5160..f8519c0 100644
--- a/arch/arm/cpu/armv7/keystone/Makefile
+++ b/arch/arm/cpu/armv7/keystone/Makefile
@@ -9,6 +9,7 @@ obj-y   += init.o
 obj-y  += psc.o
 obj-y  += clock.o
 obj-$(CONFIG_SOC_K2HK) += clock-k2hk.o
+obj-$(CONFIG_SOC_K2E) += clock-k2e.o
 obj-y  += cmd_clock.o
 obj-y  += cmd_mon.o
 obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_nav.o
diff --git a/arch/arm/cpu/armv7/keystone/clock-k2e.c 
b/arch/arm/cpu/armv7/keystone/clock-k2e.c
new file mode 100644
index 000..42092e1
--- /dev/null
+++ b/arch/arm/cpu/armv7/keystone/clock-k2e.c
@@ -0,0 +1,101 @@
+/*
+ * Keystone2: get clk rate for K2E
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated, www.ti.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/clock.h
+#include asm/arch/clock_defs.h
+
+const struct keystone_pll_regs keystone_pll_regs[] = {
+   [CORE_PLL] = {KS2_MAINPLLCTL0, KS2_MAINPLLCTL1},
+   [PASS_PLL] = {KS2_PASSPLLCTL0, KS2_PASSPLLCTL1},
+   [DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
+};
+
+/**
+ * pll_freq_get - get pll frequency
+ * Fout = Fref * NF(mult) / NR(prediv) / OD
+ * @pll:   pll identifier
+ */
+static unsigned long pll_freq_get(int pll)
+{
+   unsigned long mult = 1, prediv = 1, output_div = 2;
+   unsigned long ret;
+   u32 tmp, reg;
+
+   if (pll == CORE_PLL) {
+   ret = external_clk[sys_clk];
+   if (pllctl_reg_read(pll, ctl)  PLLCTL_PLLEN) {
+   /* PLL mode */
+   tmp = __raw_readl(KS2_MAINPLLCTL0);
+   prediv = (tmp  PLL_DIV_MASK) + 1;
+   mult = (((tmp  PLLM_MULT_HI_SMASK)  6) |
+   (pllctl_reg_read(pll, mult) 
+   PLLM_MULT_LO_MASK)) + 1;
+   output_div = ((pllctl_reg_read(pll, secctl) 
+  PLL_CLKOD_SHIFT)  PLL_CLKOD_MASK) + 1;
+
+   ret = ret / prediv / output_div * mult;
+   }
+   } else {
+   switch (pll) {
+   case PASS_PLL:
+   ret = external_clk[pa_clk];
+   reg = KS2_PASSPLLCTL0;
+   break;
+   case DDR3_PLL:
+   ret = external_clk[ddr3_clk];
+   reg = KS2_DDR3APLLCTL0;
+   break;
+   default:
+   return 0;
+   }
+
+   tmp = __raw_readl(reg);
+
+   if (!(tmp  PLLCTL_BYPASS)) {
+   /* Bypass disabled */
+   prediv = (tmp  PLL_DIV_MASK) + 1;
+   mult = ((tmp  PLL_MULT_SHIFT)  PLL_MULT_MASK) + 1;
+   output_div = ((tmp  PLL_CLKOD_SHIFT) 
+ PLL_CLKOD_MASK) + 1;
+   ret = ((ret / prediv) * mult) / output_div;
+   }
+   }
+
+   return ret;
+}
+
+unsigned long clk_get_rate(unsigned int clk)
+{
+   switch (clk) {
+   case core_pll_clk:  return pll_freq_get(CORE_PLL);
+   case pass_pll_clk:  return pll_freq_get(PASS_PLL);
+   case ddr3_pll_clk:  return pll_freq_get(DDR3_PLL);
+   case sys_clk0_1_clk:
+   case sys_clk0_clk:  return pll_freq_get(CORE_PLL) / pll0div_read(1);
+   case sys_clk1_clk:  return pll_freq_get(CORE_PLL) / pll0div_read(2);
+   case sys_clk2_clk:  return pll_freq_get(CORE_PLL) / pll0div_read(3);
+   case sys_clk3_clk:  return pll_freq_get(CORE_PLL) / pll0div_read(4);
+   case sys_clk0_2_clk:return clk_get_rate(sys_clk0_clk) / 2;
+   case sys_clk0_3_clk:return clk_get_rate(sys_clk0_clk) / 3;
+   case sys_clk0_4_clk:return clk_get_rate(sys_clk0_clk) / 4;
+   case sys_clk0_6_clk:return clk_get_rate(sys_clk0_clk) / 6;
+   case sys_clk0_8_clk:return clk_get_rate(sys_clk0_clk) / 8;
+   case sys_clk0_12_clk:   return clk_get_rate(sys_clk0_clk) / 12;
+   case 

[U-Boot] [U-boot] [Patch 1/6] ARM: keystone2: add K2E SoC hardware definitions

2014-07-15 Thread Ivan Khoronzhuk
From: Hao Zhang hzh...@ti.com

This patch adds hardware definitions specific to Keystone II
K2E device. It has a lot common definitions with k2hk SoC, so
move them to common hardware.h. This is preparation patch for
adding K2E SoC support.

Acked-by: Murali Karicheri m-kariche...@ti.com
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 arch/arm/include/asm/arch-keystone/hardware-k2e.h  | 44 
 arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 44 
 arch/arm/include/asm/arch-keystone/hardware.h  | 61 ++
 3 files changed, 105 insertions(+), 44 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-keystone/hardware-k2e.h

diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2e.h 
b/arch/arm/include/asm/arch-keystone/hardware-k2e.h
new file mode 100644
index 000..62172a4
--- /dev/null
+++ b/arch/arm/include/asm/arch-keystone/hardware-k2e.h
@@ -0,0 +1,44 @@
+/*
+ * K2E: SoC definitions
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated, www.ti.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_K2E_H
+#define __ASM_ARCH_HARDWARE_K2E_H
+
+/* PA SS Registers */
+#define KS2_PASS_BASE  0x2400
+
+/* Power and Sleep Controller (PSC) Domains */
+#define KS2_LPSC_MOD_RST   0
+#define KS2_LPSC_USB_1 1
+#define KS2_LPSC_USB   2
+#define KS2_LPSC_EMIF25_SPI3
+#define KS2_LPSC_TSIP  4
+#define KS2_LPSC_DEBUGSS_TRC   5
+#define KS2_LPSC_TETB_TRC  6
+#define KS2_LPSC_PKTPROC   7
+#define KS2_LPSC_PAKS2_LPSC_PKTPROC
+#define KS2_LPSC_SGMII 8
+#define KS2_LPSC_CPGMACKS2_LPSC_SGMII
+#define KS2_LPSC_CRYPTO9
+#define KS2_LPSC_PCIE  10
+#define KS2_LPSC_VUSR0 12
+#define KS2_LPSC_CHIP_SRSS 13
+#define KS2_LPSC_MSMC  14
+#define KS2_LPSC_EMIF4F_DDR3   23
+#define KS2_LPSC_PCIE_127
+#define KS2_LPSC_XGE   50
+
+/* Chip Interrupt Controller */
+#define KS2_CIC2_DDR3_ECC_IRQ_NUM  -1  /* not defined in K2E */
+#define KS2_CIC2_DDR3_ECC_CHAN_NUM -1  /* not defined in K2E */
+
+/* Number of DSP cores */
+#define KS2_NUM_DSPS   1
+
+#endif
diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h 
b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
index e7dff05..eb132f7 100644
--- a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
+++ b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
@@ -10,46 +10,16 @@
 #ifndef __ASM_ARCH_HARDWARE_K2HK_H
 #define __ASM_ARCH_HARDWARE_K2HK_H
 
-#define KS2_PLL_CNTRL_BASE 0x0231
-#define KS2_CLOCK_BASE KS2_PLL_CNTRL_BASE
-#define KS2_RSTCTRL(KS2_PLL_CNTRL_BASE + 0xe8)
-#define KS2_RSTCTRL_KEY0x5a69
-#define KS2_RSTCTRL_MASK   0x
-#define KS2_RSTCTRL_SWRST  0xfffe
-
-#define KS2_DEVICE_STATE_CTRL_BASE 0x0262
-#define KS2_JTAG_ID_REG(KS2_DEVICE_STATE_CTRL_BASE + 
0x18)
-#define KS2_DEVSTAT(KS2_DEVICE_STATE_CTRL_BASE + 0x20)
-
 #define KS2_MISC_CTRL  (KS2_DEVICE_STATE_CTRL_BASE + 0xc7c)
 
 #define KS2_ARM_PLL_EN BIT(13)
 
-#define KS2_SPI0_BASE  0x21000400
-#define KS2_SPI1_BASE  0x21000600
-#define KS2_SPI2_BASE  0x21000800
-#define KS2_SPI_BASE   KS2_SPI0_BASE
-
-/* Chip configuration unlock codes and registers */
-#define KS2_KICK0  (KS2_DEVICE_STATE_CTRL_BASE + 0x38)
-#define KS2_KICK1  (KS2_DEVICE_STATE_CTRL_BASE + 0x3c)
-#define KS2_KICK0_MAGIC0x83e70b13
-#define KS2_KICK1_MAGIC0x95a4f1e0
-
 /* PA SS Registers */
 #define KS2_PASS_BASE  0x0200
 
 /* PLL control registers */
-#define KS2_MAINPLLCTL0(KS2_DEVICE_STATE_CTRL_BASE + 
0x350)
-#define KS2_MAINPLLCTL1(KS2_DEVICE_STATE_CTRL_BASE + 
0x354)
-#define KS2_PASSPLLCTL0(KS2_DEVICE_STATE_CTRL_BASE + 
0x358)
-#define KS2_PASSPLLCTL1(KS2_DEVICE_STATE_CTRL_BASE + 
0x35C)
-#define KS2_DDR3APLLCTL0   (KS2_DEVICE_STATE_CTRL_BASE + 0x360)
-#define KS2_DDR3APLLCTL1   (KS2_DEVICE_STATE_CTRL_BASE + 0x364)
 #define KS2_DDR3BPLLCTL0   (KS2_DEVICE_STATE_CTRL_BASE + 0x368)
 #define KS2_DDR3BPLLCTL1   (KS2_DEVICE_STATE_CTRL_BASE + 0x36C)
-#define KS2_ARMPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x370)
-#define KS2_ARMPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x374)
 
 /* Power and Sleep Controller (PSC) Domains */
 

[U-Boot] [U-boot] [Patch 5/6] ARM: keystone2: spl: add K2E SoC support

2014-07-15 Thread Ivan Khoronzhuk
Keystone2 K2E SoC has slightly different spl pll settings then
K2HK, so correct this.

Acked-by: Murali Karicheri m-kariche...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 arch/arm/cpu/armv7/keystone/spl.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/cpu/armv7/keystone/spl.c 
b/arch/arm/cpu/armv7/keystone/spl.c
index e07b64d..d4b0e9b 100644
--- a/arch/arm/cpu/armv7/keystone/spl.c
+++ b/arch/arm/cpu/armv7/keystone/spl.c
@@ -18,10 +18,18 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_K2HK_EVM
 static struct pll_init_data spl_pll_config[] = {
CORE_PLL_799,
TETRIS_PLL_500,
 };
+#endif
+
+#ifdef CONFIG_K2E_EVM
+static struct pll_init_data spl_pll_config[] = {
+   CORE_PLL_800,
+};
+#endif
 
 void spl_init_keystone_plls(void)
 {
-- 
1.8.3.2

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[U-Boot] [U-boot] [Patch 3/6] ARM: keystone2: add MSMC cache coherency support for K2E SOC

2014-07-15 Thread Ivan Khoronzhuk
From: Hao Zhang hzh...@ti.com

This patch adds Keystone2 K2E SOC specific code to support
MSMC cache coherency. Also create header file for msmc to hold
its API.

Acked-by: Murali Karicheri m-kariche...@ti.com
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 arch/arm/cpu/armv7/keystone/init.c| 12 +++-
 arch/arm/cpu/armv7/keystone/msmc.c|  4 ++--
 arch/arm/include/asm/arch-keystone/hardware.h |  1 -
 arch/arm/include/asm/arch-keystone/msmc.h | 17 +
 4 files changed, 26 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-keystone/msmc.h

diff --git a/arch/arm/cpu/armv7/keystone/init.c 
b/arch/arm/cpu/armv7/keystone/init.c
index f4c293a..a8f8aee 100644
--- a/arch/arm/cpu/armv7/keystone/init.c
+++ b/arch/arm/cpu/armv7/keystone/init.c
@@ -10,6 +10,7 @@
 #include common.h
 #include ns16550.h
 #include asm/io.h
+#include asm/arch/msmc.h
 #include asm/arch/clock.h
 #include asm/arch/hardware.h
 
@@ -24,11 +25,12 @@ int arch_cpu_init(void)
chip_configuration_unlock();
icache_enable();
 
-#ifdef CONFIG_SOC_K2HK
-   share_all_segments(8);
-   share_all_segments(9);
-   share_all_segments(10); /* QM PDSP */
-   share_all_segments(11); /* PCIE */
+   msmc_share_all_segments(8);  /* TETRIS */
+   msmc_share_all_segments(9);  /* NETCP */
+   msmc_share_all_segments(10); /* QM PDSP */
+   msmc_share_all_segments(11); /* PCIE 0 */
+#ifdef CONFIG_SOC_K2E
+   msmc_share_all_segments(13); /* PCIE 1 */
 #endif
 
/*
diff --git a/arch/arm/cpu/armv7/keystone/msmc.c 
b/arch/arm/cpu/armv7/keystone/msmc.c
index af858fa..7d8e597 100644
--- a/arch/arm/cpu/armv7/keystone/msmc.c
+++ b/arch/arm/cpu/armv7/keystone/msmc.c
@@ -8,7 +8,7 @@
  */
 
 #include common.h
-#include asm/arch/hardware.h
+#include asm/arch/msmc.h
 
 struct mpax {
u32 mpaxl;
@@ -56,7 +56,7 @@ struct msms_regs {
 };
 
 
-void share_all_segments(int priv_id)
+void msmc_share_all_segments(int priv_id)
 {
struct msms_regs *msmc = (struct msms_regs *)KS2_MSMC_CTRL_BASE;
int j;
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h 
b/arch/arm/include/asm/arch-keystone/hardware.h
index 9c86b69..bcfb551 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -180,7 +180,6 @@ static inline int cpu_revision(void)
return rev;
 }
 
-void share_all_segments(int priv_id);
 int cpu_to_bus(u32 *ptr, u32 length);
 void sdelay(unsigned long);
 
diff --git a/arch/arm/include/asm/arch-keystone/msmc.h 
b/arch/arm/include/asm/arch-keystone/msmc.h
new file mode 100644
index 000..c320db5
--- /dev/null
+++ b/arch/arm/include/asm/arch-keystone/msmc.h
@@ -0,0 +1,17 @@
+/*
+ * MSMC controller
+ *
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated, www.ti.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _MSMC_H_
+#define _MSMC_H_
+
+#include asm/arch/hardware.h
+
+void msmc_share_all_segments(int priv_id);
+
+#endif
-- 
1.8.3.2

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[U-Boot] [U-boot] [Patch 4/6] keystone2: use CONFIG_SOC_KEYSTONE in common places

2014-07-15 Thread Ivan Khoronzhuk
Use CONFIG_SOC_KEYSTONE in common places instead of defining
a lot of if def .. || if def  for different Keystone2 SoC types.

Acked-by: Murali Karicheri m-kariche...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 common/image-fdt.c   | 2 +-
 drivers/serial/ns16550.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 5d64009..f87cc5a 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -487,7 +487,7 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
if (!ft_verify_fdt(blob))
return -1;
 
-#ifdef CONFIG_SOC_K2HK
+#if defined(CONFIG_SOC_KEYSTONE)
if (IMAGE_OF_BOARD_SETUP)
ft_board_setup_ex(blob, gd-bd);
 #endif
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index f26979d..8e7052d 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -30,7 +30,7 @@
 #define serial_in(y)   readb(y)
 #endif
 
-#if defined(CONFIG_K2HK_EVM)
+#if defined(CONFIG_SOC_KEYSTONE)
 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1  14) | (1  13) | (1  0))
 #undef UART_MCRVAL
@@ -88,7 +88,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
/* /16 is proper to hit 115200 with 48MHz */
serial_out(0, com_port-mdr1);
 #endif /* CONFIG_OMAP */
-#if defined(CONFIG_K2HK_EVM)
+#if defined(CONFIG_SOC_KEYSTONE)
serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, com_port-regC);
 #endif
 }
-- 
1.8.3.2

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[U-Boot] [U-boot] [Patch 6/6] board: k2e-evm: add board support

2014-07-15 Thread Ivan Khoronzhuk
From: Hao Zhang hzh...@ti.com

This patch adds Keystone2 k2e_evm evaluation board support.

Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 arch/arm/include/asm/arch-keystone/hardware.h |  1 +
 board/ti/ks2_evm/Makefile |  2 +
 board/ti/ks2_evm/board_k2e.c  | 39 +++
 board/ti/ks2_evm/ddr3_cfg.c   | 40 +++
 board/ti/ks2_evm/ddr3_cfg.h   |  3 ++
 board/ti/ks2_evm/ddr3_k2e.c   | 55 +++
 boards.cfg|  1 +
 include/configs/k2e_evm.h | 37 ++
 8 files changed, 178 insertions(+)
 create mode 100644 board/ti/ks2_evm/board_k2e.c
 create mode 100644 board/ti/ks2_evm/ddr3_k2e.c
 create mode 100644 include/configs/k2e_evm.h

diff --git a/arch/arm/include/asm/arch-keystone/hardware.h 
b/arch/arm/include/asm/arch-keystone/hardware.h
index bcfb551..ddeb06e 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -119,6 +119,7 @@ typedef volatile unsigned int   *dv_reg_p;
 
 #define KS2_PLL_CNTRL_BASE 0x0231
 #define KS2_CLOCK_BASE KS2_PLL_CNTRL_BASE
+#define KS2_RSTCTRL_RSTYPE (KS2_PLL_CNTRL_BASE + 0xe4)
 #define KS2_RSTCTRL(KS2_PLL_CNTRL_BASE + 0xe8)
 #define KS2_RSTCTRL_KEY0x5a69
 #define KS2_RSTCTRL_MASK   0x
diff --git a/board/ti/ks2_evm/Makefile b/board/ti/ks2_evm/Makefile
index 774a7d5..00f1164 100644
--- a/board/ti/ks2_evm/Makefile
+++ b/board/ti/ks2_evm/Makefile
@@ -9,3 +9,5 @@ obj-y += board.o
 obj-y += ddr3_cfg.o
 obj-$(CONFIG_K2HK_EVM) += board_k2hk.o
 obj-$(CONFIG_K2HK_EVM) += ddr3_k2hk.o
+obj-$(CONFIG_K2E_EVM) += board_k2e.o
+obj-$(CONFIG_K2E_EVM) += ddr3_k2e.o
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
new file mode 100644
index 000..d2499b7
--- /dev/null
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -0,0 +1,39 @@
+/*
+ * K2E EVM : Board initialization
+ *
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated, www.ti.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/ddr3.h
+#include asm/arch/hardware.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+unsigned int external_clk[ext_clk_count] = {
+   [sys_clk]   = 1,
+   [alt_core_clk]  = 1,
+   [pa_clk]= 1,
+   [ddr3_clk]  = 1,
+   [mcm_clk]   = 31250,
+   [pcie_clk]  = 1,
+   [sgmii_clk] = 15625,
+   [xgmii_clk] = 15625,
+   [usb_clk]   = 1,
+};
+
+static struct pll_init_data pll_config[] = {
+   CORE_PLL_1200,
+   PASS_PLL_1000,
+};
+
+#if defined(CONFIG_BOARD_EARLY_INIT_F)
+int board_early_init_f(void)
+{
+   init_plls(ARRAY_SIZE(pll_config), pll_config);
+   return 0;
+}
+#endif
diff --git a/board/ti/ks2_evm/ddr3_cfg.c b/board/ti/ks2_evm/ddr3_cfg.c
index 6e55af9..f7da9f2 100644
--- a/board/ti/ks2_evm/ddr3_cfg.c
+++ b/board/ti/ks2_evm/ddr3_cfg.c
@@ -93,6 +93,46 @@ struct ddr3_emif_config ddr3_1333_2g = {
 };
 #endif
 
+#ifdef CONFIG_K2E_EVM
+/* DDR3 PHY configuration data with 1600M rate, and 4GB size  */
+struct ddr3_phy_config ddr3phy_1600_4g = {
+   .pllcr  = 0x0001C000ul,
+   .pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK),
+   .pgcr1_val  = ((1  2) | (1  7) | (1  23)),
+   .ptr0   = 0x42C21590ul,
+   .ptr1   = 0xD05612C0ul,
+   .ptr2   = 0, /* not set in gel */
+   .ptr3   = 0x08861A80ul,
+   .ptr4   = 0x0C827100ul,
+   .dcr_mask   = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
+   .dcr_val= ((1  10)),
+   .dtpr0  = 0x9D9CBB66ul,
+   .dtpr1  = 0x12840300ul,
+   .dtpr2  = 0x5002D200ul,
+   .mr0= 0x1C70ul,
+   .mr1= 0x0006ul,
+   .mr2= 0x0018ul,
+   .dtcr   = 0x710035C7ul,
+   .pgcr2  = 0x00F07A12ul,
+   .zq0cr1 = 0x0001005Dul,
+   .zq1cr1 = 0x0001005Bul,
+   .zq2cr1 = 0x0001005Bul,
+   .pir_v1 = 0x0033ul,
+   .pir_v2 = 0xFF81ul,
+};
+
+/* DDR3 EMIF configuration data with 1600M rate, and 4GB size  */
+struct ddr3_emif_config ddr3_1600_4g = {
+   .sdcfg  = 0x6200CE62ul,
+   .sdtim1 = 0x166C9855ul,
+   .sdtim2 = 0x1D4Aul,
+   .sdtim3 = 0x421DFF53ul,
+   .sdtim4 = 0x543F07FFul,
+   .zqcfg  = 0x70073200ul,
+   .sdrfc  = 0x1869ul,
+};
+#endif
+
 int ddr3_get_dimm_params(char *dimm_name)
 {
int ret;
diff --git a/board/ti/ks2_evm/ddr3_cfg.h b/board/ti/ks2_evm/ddr3_cfg.h
index d14bac3..15fcf52 100644
--- a/board/ti/ks2_evm/ddr3_cfg.h
+++ 

[U-Boot] [PATCH v2 4/5] sun7i: add USB EHCI configuration

2014-07-15 Thread Roman Byshko
Signed-off-by: Roman Byshko rbys...@gmail.com
---
 include/configs/sun7i.h | 8 
 1 file changed, 8 insertions(+)

diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index 9b693f7..0a1d83e 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -16,6 +16,14 @@
 
 #define CONFIG_SYS_PROMPT  sun7i# 
 
+#ifdef CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_SUNXI
+
+#define CONFIG_USB_MAX_CONTROLLER_COUNT2
+#define CONFIG_SUNXI_USB_VBUS0_GPIO230
+#define CONFIG_SUNXI_USB_VBUS1_GPIO227
+#endif
+
 /*
  * Include common sunxi configuration where most the settings are
  */
-- 
2.0.0

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[U-Boot] [PATCH v2 3/5] sunxi: add USB options to configs

2014-07-15 Thread Roman Byshko
Signed-off-by: Roman Byshko rbys...@gmail.com
---
 include/configs/sunxi-common.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 5d72d62..c7746bb 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -181,6 +181,12 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #endif
 
+#ifdef CONFIG_USB_EHCI
+#define CONFIG_CMD_USB
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
+#define CONFIG_USB_STORAGE
+#endif
+
 #if !defined CONFIG_ENV_IS_IN_MMC  \
 !defined CONFIG_ENV_IS_IN_NAND  \
 !defined CONFIG_ENV_IS_IN_FAT  \
-- 
2.0.0

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Re: [U-Boot] [PATCH v2 0/5] ARM: Allwinner sun7i (A20) USB Host EHCI support

2014-07-15 Thread Roman B.
Hi Marex,

I'm sorry I forgot to CC you on my submission. It would be great, if
you can take a look at it.

Best,
Roman
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[U-Boot] [PATCH v2 0/5] ARM: Allwinner sun7i (A20) USB Host EHCI support

2014-07-15 Thread Roman Byshko
This patch series adds USB Host EHCI support to the sun7i SoC. It was
tested on Cubietruck. Now you could boot from a USB stick or use a
compatible Ethernet dongle to add a second Ethernet port in U-Boot.

ehci-sunxi.c contains some code for poking GPIOs. This code will go
away once [1] is applied against upstream. For now this patch series is
self-contained and has no dependencies.

Best,
Roman Byshko

Changes since v1:
- fixed erroneous copyright author
- used SPDX tag instead of the full license
- used setbits_le32/clrbits_le32 instead of direct bit poking
- usage of setbits_le32/clrbits_le32 automatically fixed bug
  where usbc_bit was clobbered unintentionally
- added more info about commented out gpio_direction_output, it
  will be used once [1] is applied against upstream

[1] http://patchwork.ozlabs.org/patch/356566/

Roman Byshko (5):
  sunxi: add defines to control USB Host clocks/resets
  sunxi: add USB EHCI driver
  sunxi: add USB options to configs
  sun7i: add USB EHCI configuration
  sun7i: cubietruck: enable USB EHCI

 arch/arm/include/asm/arch-sunxi/clock_sun4i.h |   4 +
 boards.cfg|   2 +-
 drivers/usb/host/Makefile |   1 +
 drivers/usb/host/ehci-sunxi.c | 212 ++
 include/configs/sun7i.h   |   8 +
 include/configs/sunxi-common.h|   6 +
 6 files changed, 232 insertions(+), 1 deletion(-)
 create mode 100644 drivers/usb/host/ehci-sunxi.c

-- 
2.0.0

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[U-Boot] i.MX tree out of sync

2014-07-15 Thread Otavio Salvador
Hello Stefano,

The u-boot-imx tree is out of sync. Could you rebase it (or merge v2014.07)?

Thanks in advance,

-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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[U-Boot] [PATCH] board/ls2085a: Add support of NOR and NAND flash for simulator

2014-07-15 Thread Prabhakar Kushwaha
Add support of NOR and NAND flash for simulator target.
Here
  IFC - CS0: NOR flash
  IFC - CS1: NAND flash

Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
 This patch depeds upon below patch arm: ls102xa: Add Freescale LS102xA SoC 
support
 http://patchwork.ozlabs.org/patch/366604/

 include/configs/ls2085a_common.h |   62 ++
 include/configs/ls2085a_simu.h   |9 ++
 2 files changed, 71 insertions(+)

diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index 2bd5a47..6355e4a 100644
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -17,7 +17,9 @@
 /* Link Definitions */
 #define CONFIG_SYS_TEXT_BASE   0x3000
 
+#ifdef CONFIG_EMU
 #define CONFIG_SYS_NO_FLASH
+#endif
 
 #define CONFIG_SUPPORT_RAW_INITRD
 
@@ -118,6 +120,66 @@
 #define CONFIG_SYS_NOR_FTIM3   0x0400
 #define CONFIG_SYS_IFC_CCR 0x0100
 
+#ifndef CONFIG_SYS_NO_FLASH
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_QUIET_TEST
+#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
+
+#define CONFIG_SYS_MAX_FLASH_BANKS 1   /* number of banks */
+#define CONFIG_SYS_MAX_FLASH_SECT  1024/* sectors per device */
+#define CONFIG_SYS_FLASH_ERASE_TOUT6   /* Flash Erase Timeout (ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT500 /* Flash Write Timeout (ms) */
+
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_BANKS_LIST{ CONFIG_SYS_FLASH_BASE }
+#endif
+
+#define CONFIG_NAND_FSL_IFC
+#define CONFIG_SYS_NAND_MAX_ECCPOS 256
+#define CONFIG_SYS_NAND_MAX_OOBFREE2
+#define CONFIG_SYS_NAND_BASE   0x52000
+#define CONFIG_SYS_NAND_BASE_PHYS  0x2000
+
+#define CONFIG_SYS_NAND_CSPR_EXT   (0x0)
+#define CONFIG_SYS_NAND_CSPR   (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
+   | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \
+   | CSPR_MSEL_NAND/* MSEL = NAND */ \
+   | CSPR_V)
+#define CONFIG_SYS_NAND_AMASK  IFC_AMASK(64 * 1024)
+
+#define CONFIG_SYS_NAND_CSOR(CSOR_NAND_ECC_ENC_EN   /* ECC on encode */ \
+   | CSOR_NAND_ECC_DEC_EN  /* ECC on decode */ \
+   | CSOR_NAND_ECC_MODE_4  /* 4-bit ECC */ \
+   | CSOR_NAND_RAL_3   /* RAL = 2Byes */ \
+   | CSOR_NAND_PGS_2K  /* Page Size = 2K */ \
+   | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \
+   | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/
+
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+/* ONFI NAND Flash mode0 Timing Params */
+#define CONFIG_SYS_NAND_FTIM0  (FTIM0_NAND_TCCST(0x07) | \
+   FTIM0_NAND_TWP(0x18)   | \
+   FTIM0_NAND_TWCHT(0x07) | \
+   FTIM0_NAND_TWH(0x0a))
+#define CONFIG_SYS_NAND_FTIM1  (FTIM1_NAND_TADLE(0x32) | \
+   FTIM1_NAND_TWBE(0x39)  | \
+   FTIM1_NAND_TRR(0x0e)   | \
+   FTIM1_NAND_TRP(0x18))
+#define CONFIG_SYS_NAND_FTIM2  (FTIM2_NAND_TRAD(0x0f) | \
+   FTIM2_NAND_TREH(0x0a) | \
+   FTIM2_NAND_TWHRE(0x1e))
+#define CONFIG_SYS_NAND_FTIM3  0x0
+
+#define CONFIG_SYS_NAND_BASE_LIST  { CONFIG_SYS_NAND_BASE }
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define CONFIG_CMD_NAND
+
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
+
 #define CONFIG_SYS_CSPR0_EXT   CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0   CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR
diff --git a/include/configs/ls2085a_simu.h b/include/configs/ls2085a_simu.h
index 46d47b0..0f40b78 100644
--- a/include/configs/ls2085a_simu.h
+++ b/include/configs/ls2085a_simu.h
@@ -13,4 +13,13 @@
 #define CONFIG_SMC9
 #define CONFIG_SMC9_BASE   (0x221)
 
+#define CONFIG_SYS_CSPR1_EXT   CONFIG_SYS_NAND_CSPR_EXT
+#define CONFIG_SYS_CSPR1   CONFIG_SYS_NAND_CSPR
+#define CONFIG_SYS_AMASK1  CONFIG_SYS_NAND_AMASK
+#define CONFIG_SYS_CSOR1   CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CS1_FTIM0   CONFIG_SYS_NAND_FTIM0
+#define CONFIG_SYS_CS1_FTIM1   CONFIG_SYS_NAND_FTIM1
+#define CONFIG_SYS_CS1_FTIM2   CONFIG_SYS_NAND_FTIM2
+#define CONFIG_SYS_CS1_FTIM3   CONFIG_SYS_NAND_FTIM3
+
 #endif /* __LS2_SIMU_H */
-- 
1.7.9.5


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[U-Boot] [i2c] Pull request

2014-07-15 Thread Heiko Schocher

Hello Tom,

please pull from u-boot-i2c.git

The following changes since commit 524123a70761110c5cf3ccc5f52f6d4da071b959:

  Prepare v2014.07 (2014-07-14 13:16:45 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-i2c.git master

for you to fetch changes up to a17fd10fb516df3a0b00fcceb8678de2689951fc:

  fsl_i2c: add support for 3rd and 4th I2C (2014-07-16 05:19:15 +0200)


Heiko Schocher (1):
  i2c, omap24xx: add i2c deblock sequenz

Shengzhou Liu (1):
  fsl_i2c: add support for 3rd and 4th I2C

 drivers/i2c/fsl_i2c.c  | 22 --
 drivers/i2c/omap24xx_i2c.c | 57 
+
 2 files changed, 77 insertions(+), 2 deletions(-)

Thanks!

bye,
Heiko
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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