Re: [U-Boot] [PATCH v3 2/2] Odroid-XU3: Add support for Odroid-XU3
Hi Hyungwon, > Dear Lukasz Majewski, > > On Wed, 05 Nov 2014 11:29:53 +0100 > Lukasz Majewski wrote: > > > > +#undef CONFIG_EXYNOS_SPL > > > +#undef CONFIG_SILENT_CONSOLE > > > +#undef CONFIG_CROS_EC > > > +#undef CONFIG_CROS_EC_SPI > > > +#undef CONFIG_CROS_EC_I2C > > > +#undef CONFIG_CROS_EC_KEYB > > > +#undef CONFIG_CMD_CROS_EC > > > +#undef CONFIG_KEYBOARD > > > +#undef CONFIG_SPI_BOOTING > > > +#undef CONFIG_ENV_IS_IN_SPI_FLASH > > > +#undef CONFIG_SPI_FLASH > > > +#undef CONFIG_EXYNOS_SPI > > > +#undef CONFIG_CMD_SF > > > +#undef CONFIG_CMD_SPI > > > +#undef CONFIG_SPI_FLASH_WINBOND > > > +#undef CONFIG_SPI_FLASH_GIGADEVICE > > > +#undef CONFIG_OF_SPI > > > +#undef CONFIG_FIT_BEST_MATCH > > > +#undef CONFIG_USB_BOOTING > > > +#undef CONFIG_CMD_NET > > > +#undef CONFIG_SMC911X > > > +#undef CONFIG_CMD_PXE > > > +#undef CONFIG_MENU > > > +#undef CONFIG_ENV_IS_IN_SPI_FLASH > > > > Cannot we just remove those CONFIG_* , instead of using #undef? > > > > We can remove all of them without harm or at least no error in > operation except for CONFIG_CMD_NET. Some boards including chromebook > uses common config file with Odroid XU3. I don't know whether they > need ethernet driver for their work or not. I have no device. Will it > be good to remove the config from exynos5-common.h and add them to > the config file which inherit exynos5-common.h? I think that we can keep only the CONFIG_CMD_NET if it doesn't hurt XU3 build. > > Best regards, > Hyungwon Hwang > -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] uboot uImage binary does not boot in Qemu
I cross compiled u-boot's latest version 2014-10 using buildroot's built-in cross compiler and generated uboot.bin. When I try to invoke it like so: it throws an error complaining wrong image format: I've checked qemu's sources and as per 'uboot_image.h' , the only valid type numbers are from 0 through to 8. I am unable to understand the number 52 here. I've followed many articles on the internet in which u-boot is booted within Qemu and I do not see anything different that they are doing. I am confused. Hoping for some pointers. -- View this message in context: http://u-boot.10912.n7.nabble.com/uboot-uImage-binary-does-not-boot-in-Qemu-tp194858.html Sent from the U-Boot mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 4/5] imx: mx6sxsabresd: Use the pfuze common init function
Modify the pfuze init for mx6sxsabresd to use the shared
"pfuze_common_init" function. And move this initialization to
power_init_board.
Signed-off-by: Ye.Li
---
Changes since v1:
- Change to use pfuze common init function for sabre boards.
Changes since v2:
- Move the pfuze init to power_init_board
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 48 ---
1 files changed, 7 insertions(+), 41 deletions(-)
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index 68d3718..54c84ed 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include "../common/pfuze.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -170,52 +171,19 @@ static struct i2c_pads_info i2c_pad_info1 = {
},
};
-static int pfuze_init(void)
+int power_init_board(void)
{
struct pmic *p;
- int ret;
unsigned int reg;
- ret = power_pfuze100_init(I2C_PMIC);
- if (ret)
- return ret;
-
- p = pmic_get("PFUZE100");
- ret = pmic_probe(p);
- if (ret)
- return ret;
-
- pmic_reg_read(p, PFUZE100_DEVICEID, ®);
- printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
-
- /* Set SW1AB standby voltage to 0.975V */
- pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
- reg &= ~0x3f;
- reg |= 0x1b;
- pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
-
- /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
- pmic_reg_read(p, PUZE_100_SW1ABCONF, ®);
- reg &= ~0xc0;
- reg |= 0x40;
- pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
-
- /* Set SW1C standby voltage to 0.975V */
- pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
- reg &= ~0x3f;
- reg |= 0x1b;
- pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
-
- /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
- pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
- reg &= ~0xc0;
- reg |= 0x40;
- pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
+ p = pfuze_common_init(I2C_PMIC);
+ if (!p)
+ return -ENODEV;
/* Enable power of VGEN5 3V3, needed for SD3 */
pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
- reg &= ~0x1F;
- reg |= 0x1F;
+ reg &= ~LDO_VOL_MASK;
+ reg |= (LDOB_3_30V | (1 << LDO_EN));
pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
return 0;
@@ -282,8 +250,6 @@ int board_init(void)
int board_late_init(void)
{
- pfuze_init();
-
return 0;
}
--
1.7.4.1
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[U-Boot] [PATCH v3 5/5] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support
Add the pfuze100 initialization in power_init_board for imx6q/dl
sabreauto board.
Signed-off-by: Ye.Li
---
Changes since v1:
- Change to use pfuze common init function for sabre boards.
Changes since v2:
- Move the pfuze init to power_init_board
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 15 +++
include/configs/mx6qsabreauto.h |6 ++
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 42ae6fa..182625c 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -28,6 +28,8 @@
#include
#include
#include
+#include
+#include "../common/pfuze.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +50,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+#define I2C_PMIC 1
+
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
@@ -364,6 +368,17 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
}
#endif
+int power_init_board(void)
+{
+ struct pmic *p;
+
+ p = pfuze_common_init(I2C_PMIC);
+ if (!p)
+ return -ENODEV;
+
+ return 0;
+}
+
#ifdef CONFIG_CMD_BMODE
static const struct boot_mode board_boot_modes[] = {
/* 4 bit bus width */
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 235dd6d..91161fa 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -48,4 +48,10 @@
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 10
+/* PMIC */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_PFUZE100
+#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
+
#endif /* __MX6QSABREAUTO_CONFIG_H */
--
1.7.4.1
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[U-Boot] [PATCH v3 3/5] imx: mx6sabresd: Use the pfuze common init function
Modify the pfuze init for mx6sabresd to use the shared
"pfuze_common_init" function. And move this initialization to
power_init_board.
Signed-off-by: Ye.Li
---
Changes since v1:
- Change to use pfuze common init function for sabre boards.
Changes since v2:
- Move the pfuze init to power_init_board
board/freescale/mx6sabresd/mx6sabresd.c | 52 +-
1 files changed, 9 insertions(+), 43 deletions(-)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 3d81fff..bc3cd25 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include "../common/pfuze.h"
DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
@@ -517,60 +518,27 @@ int board_init(void)
return 0;
}
-static int pfuze_init(void)
+int power_init_board(void)
{
struct pmic *p;
- int ret;
unsigned int reg;
- ret = power_pfuze100_init(I2C_PMIC);
- if (ret)
- return ret;
-
- p = pmic_get("PFUZE100");
- ret = pmic_probe(p);
- if (ret)
- return ret;
-
- pmic_reg_read(p, PFUZE100_DEVICEID, ®);
- printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
+ p = pfuze_common_init(I2C_PMIC);
+ if (!p)
+ return -ENODEV;
/* Increase VGEN3 from 2.5 to 2.8V */
pmic_reg_read(p, PFUZE100_VGEN3VOL, ®);
- reg &= ~0xf;
- reg |= 0xa;
+ reg &= ~LDO_VOL_MASK;
+ reg |= LDOB_2_80V;
pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
/* Increase VGEN5 from 2.8 to 3V */
pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
- reg &= ~0xf;
- reg |= 0xc;
+ reg &= ~LDO_VOL_MASK;
+ reg |= LDOB_3_00V;
pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
- /* Set SW1AB stanby volage to 0.975V */
- pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
- reg &= ~0x3f;
- reg |= 0x1b;
- pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
-
- /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
- pmic_reg_read(p, PUZE_100_SW1ABCONF, ®);
- reg &= ~0xc0;
- reg |= 0x40;
- pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
-
- /* Set SW1C standby voltage to 0.975V */
- pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
- reg &= ~0x3f;
- reg |= 0x1b;
- pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
-
- /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
- pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
- reg &= ~0xc0;
- reg |= 0x40;
- pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
-
return 0;
}
@@ -597,8 +565,6 @@ int board_late_init(void)
#ifdef CONFIG_CMD_BMODE
add_board_boot_modes(board_boot_modes);
#endif
- pfuze_init();
-
return 0;
}
--
1.7.4.1
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[U-Boot] [PATCH v3 1/5] power: pfuze100: Update definitions for buck regulators
Add definitions for buck regulators (SW1A/B/C) registers and voltage
values.
Signed-off-by: Ye.Li
---
Changes since v1:
- None
Changes since v2:
- Create this patch for updating registers definitions and magic value.
include/power/pfuze100_pmic.h | 80 +
1 files changed, 80 insertions(+), 0 deletions(-)
diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h
index 0002f1e..1118489 100644
--- a/include/power/pfuze100_pmic.h
+++ b/include/power/pfuze100_pmic.h
@@ -38,6 +38,86 @@ enum {
};
/*
+ * Buck Regulators
+ */
+
+/* SW1A/B/C Output Voltage Configuration */
+#define SW1x_0_300V 0
+#define SW1x_0_325V 1
+#define SW1x_0_350V 2
+#define SW1x_0_375V 3
+#define SW1x_0_400V 4
+#define SW1x_0_425V 5
+#define SW1x_0_450V 6
+#define SW1x_0_475V 7
+#define SW1x_0_500V 8
+#define SW1x_0_525V 9
+#define SW1x_0_550V 10
+#define SW1x_0_575V 11
+#define SW1x_0_600V 12
+#define SW1x_0_625V 13
+#define SW1x_0_650V 14
+#define SW1x_0_675V 15
+#define SW1x_0_700V 16
+#define SW1x_0_725V 17
+#define SW1x_0_750V 18
+#define SW1x_0_775V 19
+#define SW1x_0_800V 20
+#define SW1x_0_825V 21
+#define SW1x_0_850V 22
+#define SW1x_0_875V 23
+#define SW1x_0_900V 24
+#define SW1x_0_925V 25
+#define SW1x_0_950V 26
+#define SW1x_0_975V 27
+#define SW1x_1_000V 28
+#define SW1x_1_025V 29
+#define SW1x_1_050V 30
+#define SW1x_1_075V 31
+#define SW1x_1_100V 32
+#define SW1x_1_125V 33
+#define SW1x_1_150V 34
+#define SW1x_1_175V 35
+#define SW1x_1_200V 36
+#define SW1x_1_225V 37
+#define SW1x_1_250V 38
+#define SW1x_1_275V 39
+#define SW1x_1_300V 40
+#define SW1x_1_325V 41
+#define SW1x_1_350V 42
+#define SW1x_1_375V 43
+#define SW1x_1_400V 44
+#define SW1x_1_425V 45
+#define SW1x_1_450V 46
+#define SW1x_1_475V 47
+#define SW1x_1_500V 48
+#define SW1x_1_525V 49
+#define SW1x_1_550V 50
+#define SW1x_1_575V 51
+#define SW1x_1_600V 52
+#define SW1x_1_625V 53
+#define SW1x_1_650V 54
+#define SW1x_1_675V 55
+#define SW1x_1_700V 56
+#define SW1x_1_725V 57
+#define SW1x_1_750V 58
+#define SW1x_1_775V 59
+#define SW1x_1_800V 60
+#define SW1x_1_825V 61
+#define SW1x_1_850V 62
+#define SW1x_1_875V 63
+
+#define SW1x_NORMAL_MASK 0x3f
+#define SW1x_STBY_MASK0x3f
+#define SW1x_OFF_MASK 0x3f
+
+#define SW1xCONF_DVSSPEED_MASK 0xc0
+#define SW1xCONF_DVSSPEED_2US 0x00
+#define SW1xCONF_DVSSPEED_4US 0x40
+#define SW1xCONF_DVSSPEED_8US 0x80
+#define SW1xCONF_DVSSPEED_16US 0xc0
+
+/*
* LDO Configuration
*/
--
1.7.4.1
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[U-Boot] [PATCH v3 2/5] imx: mx6sabre common: Factorize the Pfuze init function
Since the Pfuze initializations are similar on various mx6 SABRE
boards. Factorize the initialization to a common function in file
board/freescale/common/pfuze.c. So that all SABRE boards BSP can
share the function.
Signed-off-by: Ye.Li
---
Changes since v1:
- Factorize the pfuze init function for sabre boards
Changes since v2:
- Replace the magic value to definitions in pfuze driver.
board/freescale/common/Makefile |1 +
board/freescale/common/pfuze.c | 54 +++
board/freescale/common/pfuze.h | 12
3 files changed, 67 insertions(+), 0 deletions(-)
create mode 100644 board/freescale/common/pfuze.c
create mode 100644 board/freescale/common/pfuze.h
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 32b5a3b..25a1bc1 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_P5040DS) += ics307_clk.o
obj-$(CONFIG_VSC_CROSSBAR)+= vsc3316_3308.o
obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o
obj-$(CONFIG_ZM7300) += zm7300.o
+obj-$(CONFIG_POWER_PFUZE100) += pfuze.o
# deal with common files for P-series corenet based devices
obj-$(CONFIG_P2041RDB) += p_corenet/
diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c
new file mode 100644
index 000..b6893c7
--- /dev/null
+++ b/board/freescale/common/pfuze.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+struct pmic * pfuze_common_init(unsigned char i2cbus)
+{
+ struct pmic *p;
+ int ret;
+ unsigned int reg;
+
+ ret = power_pfuze100_init(i2cbus);
+ if (ret)
+ return NULL;
+
+ p = pmic_get("PFUZE100");
+ ret = pmic_probe(p);
+ if (ret)
+ return NULL;
+
+ pmic_reg_read(p, PFUZE100_DEVICEID, ®);
+ printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
+
+ /* Set SW1AB stanby volage to 0.975V */
+ pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
+ reg &= ~SW1x_STBY_MASK;
+ reg |= SW1x_0_975V;
+ pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
+
+ /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+ pmic_reg_read(p, PUZE_100_SW1ABCONF, ®);
+ reg &= ~SW1xCONF_DVSSPEED_MASK;
+ reg |= SW1xCONF_DVSSPEED_4US;
+ pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
+
+ /* Set SW1C standby voltage to 0.975V */
+ pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
+ reg &= ~SW1x_STBY_MASK;
+ reg |= SW1x_0_975V;
+ pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
+
+ /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
+ pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
+ reg &= ~SW1xCONF_DVSSPEED_MASK;
+ reg |= SW1xCONF_DVSSPEED_4US;
+ pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
+
+ return p;
+}
diff --git a/board/freescale/common/pfuze.h b/board/freescale/common/pfuze.h
new file mode 100644
index 000..c5d1771
--- /dev/null
+++ b/board/freescale/common/pfuze.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __PFUZE_BOARD_HELPER__
+#define __PFUZE_BOARD_HELPER__
+
+struct pmic * pfuze_common_init(unsigned char i2cbus);
+
+#endif
--
1.7.4.1
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