Re: [U-Boot] [PATCH 0/2] spl: MMC U-Boot image load from raw partition
Hello Paul, On Sat, 08 Nov 2014 23:23:04 +0100, Paul Kocialkowski wrote: > Le samedi 08 novembre 2014 à 23:19 +0100, Albert ARIBAUD a écrit : > > Hello Paul, > > > > On Sat, 8 Nov 2014 23:14:54 +0100, Paul Kocialkowski > > wrote: > > > This is a first attempt at adding support for U-Boot image load > > > from raw partitions. It does not support OS boot as I cannot test > > > it on my current setup. > > > > > > This is going to be useful for the Optimus Black port (please do > > > not consider this as dead code because no board is using it right > > > now, there will be one soon)! > > > > Well... Why don't you just post these two patches a little later, as > > part of the upcoming series which will add support for the Optimus > > Black? > > The honest answer here is that I don't think I'll have time to handle > having the patches reviewed all at once and that I prefer to do things > step by step, week after week (work on the next thing when the > previous piece is ready or nearly so). Things are independent enough > for this to work. My own honest answer in turn is that potential reviewers of your code may not think they'll have time to look at code which they cannot assess because they don't know how it is (going to be) called. If you feel you cannot handle reviews of the whole set all at once, then it seems to me the problem is yours to solve: post the whole series, let the whole review happen, and then just look at the comments for each patch in turn at your own pace. This way you avoid posting dead code *and* you get to handle patch reviews piecewise as you would like. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 7/8] imx6: SPL support for iMX6 SabreSD
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port.
---
board/freescale/mx6sabresd/mx6sabresd.c | 211 +++-
1 file changed, 209 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 3d81fff..f443337 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -55,8 +55,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
- gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
-
+ gd->ram_size = imx_ddr_size();
return 0;
}
@@ -607,3 +606,211 @@ int checkboard(void)
puts("Board: MX6-SabreSD\n");
return 0;
}
+
+#ifdef CONFIG_SPL_BUILD
+#include
+#include
+
+#define BOOT_CFG 0x20D8004
+#define __REG(x)(*((volatile u32 *)(x)))
+
+struct fsl_esdhc_cfg spl_usdhc_cfg;
+/*
+ * Got it from mx6q_4x_mt41j128.cfg file
+ */
+void set_mt41j128_ddr(void)
+{
+ __REG(0x020e05a8) = 0x0028;
+ __REG(0x020e05b0) = 0x0028;
+ __REG(0x020e0524) = 0x0028;
+ __REG(0x020e051c) = 0x0028;
+
+ __REG(0x020e0518) = 0x0028;
+ __REG(0x020e050c) = 0x0028;
+ __REG(0x020e05b8) = 0x0028;
+ __REG(0x020e05c0) = 0x0028;
+
+ __REG(0x020e05ac) = 0x0028;
+ __REG(0x020e05b4) = 0x0028;
+ __REG(0x020e0528) = 0x0028;
+ __REG(0x020e0520) = 0x0028;
+
+ __REG(0x020e0514) = 0x0028;
+ __REG(0x020e0510) = 0x0028;
+ __REG(0x020e05bc) = 0x0028;
+ __REG(0x020e05c4) = 0x0028;
+
+ __REG(0x020e056c) = 0x0030;
+ __REG(0x020e0578) = 0x0030;
+ __REG(0x020e0588) = 0x0030;
+ __REG(0x020e0594) = 0x0030;
+
+ __REG(0x020e057c) = 0x0030;
+ __REG(0x020e0590) = 0x0030;
+ __REG(0x020e0598) = 0x0030;
+ __REG(0x020e058c) = 0x;
+
+ __REG(0x020e059c) = 0x3030;
+ __REG(0x020e05a0) = 0x3030;
+ __REG(0x020e0784) = 0x0028;
+ __REG(0x020e0788) = 0x0028;
+
+ __REG(0x020e0794) = 0x0028;
+ __REG(0x020e079c) = 0x0028;
+ __REG(0x020e07a0) = 0x0028;
+ __REG(0x020e07a4) = 0x0028;
+
+ __REG(0x020e07a8) = 0x0028;
+ __REG(0x020e0748) = 0x0028;
+ __REG(0x020e074c) = 0x0030;
+ __REG(0x020e0750) = 0x0002;
+
+ __REG(0x020e0758) = 0x;
+ __REG(0x020e0774) = 0x0002;
+ __REG(0x020e078c) = 0x0030;
+ __REG(0x020e0798) = 0x000C;
+
+ __REG(0x021b081c) = 0x;
+ __REG(0x021b0820) = 0x;
+ __REG(0x021b0824) = 0x;
+ __REG(0x021b0828) = 0x;
+
+ __REG(0x021b481c) = 0x;
+ __REG(0x021b4820) = 0x;
+ __REG(0x021b4824) = 0x;
+ __REG(0x021b4828) = 0x;
+
+ __REG(0x021b0018) = 0x1740;
+
+ __REG(0x021b001c) = 0x8000;
+ __REG(0x021b000c) = 0x8A8F7975;
+ __REG(0x021b0010) = 0xFF538E64;
+ __REG(0x021b0014) = 0x01FF00DB;
+ __REG(0x021b002c) = 0x26D2;
+
+ __REG(0x021b0030) = 0x008F0E21;
+ __REG(0x021b0008) = 0x09444040;
+ __REG(0x021b0004) = 0x00020036;
+ __REG(0x021b0040) = 0x0047;
+ __REG(0x021b) = 0x841A;
+
+ __REG(0x021b001c) = 0x04088032;
+ __REG(0x021b001c) = 0x8033;
+ __REG(0x021b001c) = 0x00428031;
+ __REG(0x021b001c) = 0x09408030;
+
+ __REG(0x021b001c) = 0x04008040;
+ __REG(0x021b0800) = 0xA1380003;
+ __REG(0x021b0020) = 0x5800;
+ __REG(0x021b0818) = 0x0007;
+ __REG(0x021b4818) = 0x0007;
+
+ /* Calibration values based on ARD and 528MHz */
+ __REG(0x021b083c) = 0x434B0358;
+ __REG(0x021b0840) = 0x033D033C;
+ __REG(0x021b483c) = 0x03520362;
+ __REG(0x021b4840) = 0x03480318;
+ __REG(0x021b0848) = 0x41383A3C;
+ __REG(0x021b4848) = 0x3F3C374A;
+ __REG(0x021b0850) = 0x4243;
+ __REG(0x021b4850) = 0x4932473A;
+
+ __REG(0x021b080c) = 0x001F001F;
+ __REG(0x021b0810) = 0x001F001F;
+
+ __REG(0x021b480c) = 0x001F001F;
+ __REG(0x021b4810) = 0x001F001F;
+
+ __REG(0x021b08b8) = 0x0800;
+ __REG(0x021b48b8) = 0x0800;
+
+ __REG(0x021b0404) = 0x00011006;
+ __REG(0x021b0004) = 0x00025576;
+
+ __REG(0x021b001c) = 0x;
+
+ __REG(0x020c4068) = 0x00C03F3F;
+ __REG(0x020c406c) = 0x0030FC00;
+ __REG(0x020c4070) = 0x0FFFC000;
+ __REG(0x020c4074) = 0x3FF0;
+ __REG(0x020c4078) = 0x00FFF300;
+ __REG(0x020c407c) = 0x0FC3;
+ __REG(0x020c4080) = 0x03FF;
+}
+
+/*
+ * This section require the differentiation
+ * between iMX6 Sabre Families.
+ * But for now, it will configure only for
+ * SabreSD.
+ */
+static void spl_dram_init(void)
+{
+ set_mt41
[U-Boot] [PATCH v3 5/8] imx6: add spl on board configuration
add the spl on build configuration of iMX6 SabreSD --- configs/mx6qsabresd_defconfig | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index 67c1b77..14c80cc 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -1,3 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" -CONFIG_ARM=y -CONFIG_TARGET_MX6SABRESD=y +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6sabresd_spl.cfg,SPL,MX6Q" ++S:CONFIG_ARM=y ++S:CONFIG_TARGET_MX6SABRESD=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 8/8] kconfig: imx6: add SUPPORT_SPL
add SUPPORT_SPL for iMX6 SabreSD by default --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 22eb2d5..ab0d284 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -609,6 +609,7 @@ config TARGET_MX6QSABREAUTO config TARGET_MX6SABRESD bool "Support mx6sabresd" select CPU_V7 + select SUPPORT_SPL config TARGET_MX6SLEVK bool "Support mx6slevk" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 6/8] imx6: add data configuration file for SPL
This file is the default DCD configuration file for SPL --- board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 54 +++ 1 file changed, 54 insertions(+) create mode 100644 board/freescale/mx6sabresd/mx6sabresd_spl.cfg diff --git a/board/freescale/mx6sabresd/mx6sabresd_spl.cfg b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg new file mode 100644 index 000..2e2f850 --- /dev/null +++ b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg @@ -0,0 +1,54 @@ +/* + * Maintainer : Richard Hu + * + * Derived from Nitrogen6x code by Boundary Devices + * + * SPDX-License-Identifier:GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +#define __ASSEMBLY__ +#include +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +/* set the default clock gate to save power */ +DATA 4 0x020C4068 0x00C03F3F /* CCM_CCGR0 */ +DATA 4 0x020C406c 0x0030FC03 /* CCM_CCGR1 */ +DATA 4 0x020C4070 0x0FFFC000 /* CCM_CCGR2 */ +DATA 4 0x020C4074 0x3FF0 /* CCM_CCGR3 */ +DATA 4 0x020C4078 0xFFF300 /* CCM_CCGR4 */ +DATA 4 0x020C407c 0x0FF3 /* CCM_CCGR5 - enable SATA clocks */ +DATA 4 0x020C4080 0x03FF /* CCM_CCGR6 - enable ushdc and usb clocks */ + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF0CF /* IOMUXC_GPR4 */ +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F /* IOMUXC_GPR6 */ +DATA 4 0x020e001c 0x007F007F /* IOMUXC_GPR7 */ + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4 0x020c4060 0x00fb /* CCM_CCOSR */ + + -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/8] imx6: add spl on include header file
add the spl on include header file of iMX6 SabreSD --- include/configs/mx6sabresd.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 938030d..4d2e54a 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -12,6 +12,13 @@ #include #include +#ifdef CONFIG_SPL +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_STACK 0x0093FFB8 +#include "imx6_spl.h" +#endif + #define CONFIG_MACH_TYPE 3980 #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_CONSOLE_DEV "ttymxc0" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 4/8] imx6: add some flexibility for defining macros
iMX6 SabreSD has different stack address compare to the default stack address defined on the file. The CONFIG_SYS_TEXT_BASE is defined in mx6sabre_common.h which is same address defined on file. At the same time to avoid compilation warnings. --- include/configs/imx6_spl.h | 4 1 file changed, 4 insertions(+) diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 5a5f940..4ff37b3 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -29,7 +29,9 @@ #define CONFIG_SPL_TEXT_BASE 0x00908000 #define CONFIG_SPL_MAX_SIZE0x1 #define CONFIG_SPL_START_S_PATH"arch/arm/cpu/armv7" +#ifndef CONFIG_SPL_STACK #define CONFIG_SPL_STACK 0x0091FFB8 +#endif #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -66,7 +68,9 @@ #define CONFIG_SPL_BSS_MAX_SIZE0x10/* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START0x1830 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x320 /* 50 MB */ +#ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0x1780 #endif +#endif #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/8] mmc: imx6: call spl_board_mmc_init
Add to call spl_board_mmc_init when CONFIG_SPL_MMC_SUPPORT is defined,
by default the mmc_initialize function will call board_mmc_init. But,
the said function is not link to the spl image.
---
drivers/mmc/mmc.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 44a4feb..88c1b03 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1441,11 +1441,14 @@ int mmc_initialize(bd_t *bis)
INIT_LIST_HEAD (&mmc_devices);
cur_dev_num = 0;
- if (board_mmc_init(bis) < 0)
+#ifdef CONFIG_SPL_BUILD
+ if (spl_board_mmc_init(bis) < 0)
cpu_mmc_init(bis);
+#else
+if (board_mmc_init(bis) < 0)
+cpu_mmc_init(bis);
-#ifndef CONFIG_SPL_BUILD
- print_mmc_devices(',');
+print_mmc_devices(',');
#endif
do_preinit();
--
1.9.1
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[U-Boot] [PATCH v3 1/8] mmc: add spl_board_mmc_init
To avoid compilation warning it need to define it in the header file. --- include/mmc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/mmc.h b/include/mmc.h index d74a190..37119b8 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -388,6 +388,9 @@ int mmc_legacy_init(int verbose); int board_mmc_init(bd_t *bis); int cpu_mmc_init(bd_t *bis); int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); +#ifdef CONFIG_SPL +int spl_board_mmc_init(bd_t *bis); +#endif /* Set block count limit because of 16 bit register limit on some hardware*/ #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/8] *** iMX6 SabreSD SPL Support ***
This patch is for SPL support for iMX6 SabreSD. The said patches has been tested to work on SD2 and SD3 port of the said board. After applying the following patches, it will produces SPL and u-boot.img binary images. You should run the two commands below to store it in your SD or eMMC. sudo dd if=SPL of=/dev/xxx bs=1K seek=1; sync sudo dd if=u-boot.img of=/dev/xxx bs=1K seek=69 Changes (v2): Merged the SPL support into the main board file Remove the compilation warmings Changes (v3): Removed sp and gd Use imx_ddr_size to set the ram_size John Tobias (8): mmc: add spl_board_mmc_init mmc: imx6: call spl_board_mmc_init imx6: add spl on include header file imx6: add some flexibility for defining macros imx6: add spl on board configuration imx6: add data configuration file for SPL imx6: SPL support for iMX6 SabreSD kconfig: imx6: add SUPPORT_SPL arch/arm/Kconfig | 1 + board/freescale/mx6sabresd/mx6sabresd.c | 211 +- board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 54 +++ configs/mx6qsabresd_defconfig | 7 +- drivers/mmc/mmc.c | 9 +- include/configs/imx6_spl.h| 4 + include/configs/mx6sabresd.h | 7 + include/mmc.h | 3 + 8 files changed, 288 insertions(+), 8 deletions(-) create mode 100644 board/freescale/mx6sabresd/mx6sabresd_spl.cfg -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] spl: MMC U-Boot image load from raw partition
Le samedi 08 novembre 2014 à 23:19 +0100, Albert ARIBAUD a écrit : > Hello Paul, > > On Sat, 8 Nov 2014 23:14:54 +0100, Paul Kocialkowski > wrote: > > This is a first attempt at adding support for U-Boot image load from raw > > partitions. It does not support OS boot as I cannot test it on my current > > setup. > > > > This is going to be useful for the Optimus Black port (please do not > > consider > > this as dead code because no board is using it right now, there will be one > > soon)! > > Well... Why don't you just post these two patches a little later, as > part of the upcoming series which will add support for the Optimus > Black? The honest answer here is that I don't think I'll have time to handle having the patches reviewed all at once and that I prefer to do things step by step, week after week (work on the next thing when the previous piece is ready or nearly so). Things are independent enough for this to work. > > On the Optimus Black, the second stage bootloader (U-Boot in our case) > > is stored on the second partition of the internal EMMC. This patch allows > > reading from that partition without the need of providing the U-Boot config > > with a sector address, but with the partition address. > > > > It makes sense as there is already code to read partition tables, so it > > would > > be a shame to hardcode the sector address while it can be obtained > > dynamically. > > > > ___ > > U-Boot mailing list > > U-Boot@lists.denx.de > > http://lists.denx.de/mailman/listinfo/u-boot > > > > Amicalement, signature.asc Description: This is a digitally signed message part ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] spl: MMC U-Boot image load from raw partition
Hello Paul, On Sat, 8 Nov 2014 23:14:54 +0100, Paul Kocialkowski wrote: > This is a first attempt at adding support for U-Boot image load from raw > partitions. It does not support OS boot as I cannot test it on my current > setup. > > This is going to be useful for the Optimus Black port (please do not consider > this as dead code because no board is using it right now, there will be one > soon)! Well... Why don't you just post these two patches a little later, as part of the upcoming series which will add support for the Optimus Black? > On the Optimus Black, the second stage bootloader (U-Boot in our case) > is stored on the second partition of the internal EMMC. This patch allows > reading from that partition without the need of providing the U-Boot config > with a sector address, but with the partition address. > > It makes sense as there is already code to read partition tables, so it would > be a shame to hardcode the sector address while it can be obtained > dynamically. > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 6/8] imx6: SPL support for iMX6 SabreSD
Hi Jeroen,
Thanks for the info. and you are correct. I have version 3 already...
Will send the v3 in a moment...
Regards,
john
On Sat, Nov 8, 2014 at 1:18 PM, Jeroen Hofstee wrote:
> Hello John,
>
> On 08-11-14 19:22, John Tobias wrote:
>>
>> This patch will enable the support for SPL on iMX6 SabreSD.
>> It tested on SD2 and SD3 mmc port.
>> ---
>
>
>
>>
>> board/freescale/mx6sabresd/mx6sabresd.c | 216
>>
>> 1 file changed, 216 insertions(+)
>>
>> diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
>> b/board/freescale/mx6sabresd/mx6sabresd.c
>> index 3d81fff..d090487 100644
>> --- a/board/freescale/mx6sabresd/mx6sabresd.c
>> +++ b/board/freescale/mx6sabresd/mx6sabresd.c
>> @@ -607,3 +607,219 @@ int checkboard(void)
>> puts("Board: MX6-SabreSD\n");
>> return 0;
>> }
>>
>> +
>> +void board_init_f(ulong dummy)
>> +{
>> + u32 ram_size;
>> +
>> + /* Set the stack pointer. */
>> + asm volatile("mov sp, %0\n" : : "r"(CONFIG_SPL_STACK));
>> +
>> + ram_size = spl_dram_init();
>> +
>> + arch_cpu_init();
>> +
>> + /* Clear the BSS. */
>> + memset(__bss_start, 0, __bss_end - __bss_start);
>> +
>> + /* Set global data pointer. */
>> + gd = &gdata;
>> + gd->ram_size = ram_size;
>> +
>
>
> sp and gd should already be valid by the time
> board_init_f is called. There is no need to set them
> again.
>>
>> + board_early_init_f();
>> +
>> + timer_init();
>> +
>> + preloader_console_init();
>> +
>> + board_init_r(NULL, 0);
>> +}
>> +
>
>
> Regards,
> Jeroen
>
>
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[U-Boot] [PATCH 1/2] MMC SD fs boot partition config coding style and proper description
CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION ought to be called CONFIG_SYS_MMCSD_FS_BOOT_PARTITION to keep it consistent with other config options such as: CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR. In addition, it is not related to raw mode booting but to fs mode instead. Signed-off-by: Paul Kocialkowski --- README |7 +-- common/spl/spl_mmc.c |8 include/configs/am3517_crane.h |2 +- include/configs/am3517_evm.h |2 +- include/configs/cm_t35.h |2 +- include/configs/devkit8000.h |2 +- include/configs/imx6_spl.h |2 +- include/configs/mcx.h |2 +- include/configs/omap3_evm.h|2 +- include/configs/omap3_evm_quick_mmc.h |2 +- include/configs/sama5d3_xplained.h |2 +- include/configs/sama5d3xek.h |2 +- include/configs/siemens-am33x-common.h |2 +- include/configs/tao3530.h |2 +- include/configs/ti814x_evm.h |2 +- include/configs/ti816x_evm.h |2 +- include/configs/ti_armv7_common.h |2 +- include/configs/tricorder.h|2 +- include/configs/zynq-common.h |2 +- 19 files changed, 26 insertions(+), 23 deletions(-) diff --git a/README b/README index 7b5538e..0b5fad9 100644 --- a/README +++ b/README @@ -3547,8 +3547,7 @@ FIT uImage format: CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS, - CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION - Address, size and partition on the MMC to load U-Boot from + Address and partition on the MMC to load U-Boot from when the MMC is being used in raw mode. CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR @@ -3561,6 +3560,10 @@ FIT uImage format: parameters from when MMC is being used in raw mode (for falcon mode) + CONFIG_SYS_MMCSD_FS_BOOT_PARTITION + Partition on the MMC to load U-Boot from when the MMC is being + used in fs mode + CONFIG_SPL_FAT_SUPPORT Support for fs/fat/libfat.o in SPL binary diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index ee71f79..f9c3851 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -106,10 +106,10 @@ void spl_mmc_load_image(void) #ifdef CONFIG_SPL_FAT_SUPPORT #ifdef CONFIG_SPL_OS_BOOT if (spl_start_uboot() || spl_load_image_fat_os(&mmc->block_dev, - CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION)) + CONFIG_SYS_MMCSD_FS_BOOT_PARTITION)) #endif err = spl_load_image_fat(&mmc->block_dev, - CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION, + CONFIG_SYS_MMCSD_FS_BOOT_PARTITION, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME); if(err) #endif /* CONFIG_SPL_FAT_SUPPORT */ @@ -117,10 +117,10 @@ void spl_mmc_load_image(void) #ifdef CONFIG_SPL_EXT_SUPPORT #ifdef CONFIG_SPL_OS_BOOT if (spl_start_uboot() || spl_load_image_ext_os(&mmc->block_dev, - CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION)) + CONFIG_SYS_MMCSD_FS_BOOT_PARTITION)) #endif err = spl_load_image_ext(&mmc->block_dev, - CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION, + CONFIG_SYS_MMCSD_FS_BOOT_PARTITION, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME); #endif /* CONFIG_SPL_EXT_SUPPORT */ } diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 0fbfa3f..09ee10c 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -304,7 +304,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR0x300 /* address 0x6 */ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION1 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img" #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 8719f76..190ef0e 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -313,7 +313,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR0x300 /* address 0x6 */ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION1 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img" #define CONFIG_SPL_LIBCOMM
[U-Boot] [PATCH 0/2] spl: MMC U-Boot image load from raw partition
This is a first attempt at adding support for U-Boot image load from raw partitions. It does not support OS boot as I cannot test it on my current setup. This is going to be useful for the Optimus Black port (please do not consider this as dead code because no board is using it right now, there will be one soon)! On the Optimus Black, the second stage bootloader (U-Boot in our case) is stored on the second partition of the internal EMMC. This patch allows reading from that partition without the need of providing the U-Boot config with a sector address, but with the partition address. It makes sense as there is already code to read partition tables, so it would be a shame to hardcode the sector address while it can be obtained dynamically. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] spl: MMC U-Boot image load from raw partition
Raw images of U-Boot can be stored inside MMC partitions, so it makes sense to
read the partition table, looking for a partition number instead of using
a fixed sector address.
Signed-off-by: Paul Kocialkowski
---
README |4
common/spl/spl_mmc.c | 26 +++---
2 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/README b/README
index 0b5fad9..5444b2e 100644
--- a/README
+++ b/README
@@ -3550,6 +3550,10 @@ FIT uImage format:
Address and partition on the MMC to load U-Boot from
when the MMC is being used in raw mode.
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
+ Partition on the MMC to load U-Boot from when the MMC is being
+ used in raw mode
+
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
Sector to load kernel uImage from when MMC is being
used in raw mode (for Falcon mode)
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index f9c3851..31ddcdc 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -15,7 +15,7 @@
DECLARE_GLOBAL_DATA_PTR;
-static int mmc_load_image_raw(struct mmc *mmc, unsigned long sector)
+static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
{
unsigned long err;
u32 image_size_sectors;
@@ -51,6 +51,20 @@ end:
return (err == 0);
}
+static int mmc_load_image_raw_partition(struct mmc *mmc, int partition)
+{
+ disk_partition_t info;
+
+ if (get_partition_info(&mmc->block_dev, partition, &info)) {
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ printf("spl: partition error\n");
+#endif
+ return -1;
+ }
+
+ return mmc_load_image_raw_sector(mmc, info.start);
+}
+
#ifdef CONFIG_SPL_OS_BOOT
static int mmc_load_image_raw_os(struct mmc *mmc)
{
@@ -64,7 +78,8 @@ static int mmc_load_image_raw_os(struct mmc *mmc)
return -1;
}
- return mmc_load_image_raw(mmc, CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
+ return mmc_load_image_raw_sector(mmc,
+
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
}
#endif
@@ -98,8 +113,13 @@ void spl_mmc_load_image(void)
#ifdef CONFIG_SPL_OS_BOOT
if (spl_start_uboot() || mmc_load_image_raw_os(mmc))
#endif
- err = mmc_load_image_raw(mmc,
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
+ err = mmc_load_image_raw_partition(mmc,
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
+#else
+ err = mmc_load_image_raw_sector(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
+#endif
#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
} else if (boot_mode == MMCSD_MODE_FS) {
debug("boot mode - FS\n");
--
1.7.9.5
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Re: [U-Boot] [PATCH v4 3/3] omap_hsmmc: Board-specific TWL4030 MMC power initializations
Le samedi 08 novembre 2014 à 20:55 +0100, Paul Kocialkowski a écrit :
> Boards using the TWL4030 regulator may not all use the LDOs the same way
> (e.g. MMC2 power can be controlled by another LDO than VMMC2).
> This delegates TWL4030 MMC power initializations to board-specific functions,
> that may still call twl4030_power_mmc_init for the default behavior.
>
> Signed-off-by: Paul Kocialkowski
> ---
> board/comelit/dig297/dig297.c | 5 +
> board/compulab/cm_t35/cm_t35.c | 7 +++
> board/corscience/tricorder/tricorder.c | 7 +++
> board/isee/igep00x0/igep00x0.c | 7 +++
> board/logicpd/omap3som/omap3logic.c| 7 +++
> board/logicpd/zoom1/zoom1.c| 5 +
> board/matrix_vision/mvblx/mvblx.c | 6 ++
> board/nokia/rx51/rx51.c| 6 ++
> board/overo/overo.c| 7 +++
> board/pandora/pandora.c| 5 +
> board/technexion/tao3530/tao3530.c | 7 +++
> board/ti/beagle/beagle.c | 7 +++
> board/ti/evm/evm.c | 7 +++
> board/ti/sdp3430/sdp.c | 5 +
> board/timll/devkit8000/devkit8000.c| 7 +++
> drivers/mmc/omap_hsmmc.c | 7 +--
> 16 files changed, 96 insertions(+), 6 deletions(-)
>
> diff --git a/board/comelit/dig297/dig297.c b/board/comelit/dig297/dig297.c
> index 2b826df..9d4c41b 100644
> --- a/board/comelit/dig297/dig297.c
> +++ b/board/comelit/dig297/dig297.c
> @@ -133,6 +133,11 @@ int board_mmc_init(bd_t *bis)
> {
> return omap_mmc_init(0, 0, 0, -1, -1);
> }
> +
> +void board_mmc_power_init(void)
> +{
I just figured, in the context of the SPL, board_mmc_init will be called
from omap3/board.c instead of the board file, so perhaps it would be
worth adding, in board_mmc_power_init: #ifdef CONFIG_SPL_BUILD and then
checking spl_boot_device to only enable the relevant LDO.
In addition (on v4), board_mmc_init may call omap_mmc_init with a
dev_index that is not used in the board's board_mmc_init, hence not
listed to be enabled on board_mmc_power_init, leaving the MMC device
potentially unpowered in that case. This is why we need to treat SPL
context separately.
This should never actually be a problem as spl_boot_device() will return
what the BootROM booted the SPL from, so it must have already enabled
the relevant LDO. However, I'm using peripheral booting on the Optimus
Black so I hardcode omap3_boot_device to MMC 1/2, so the LDOs are not
enabled at all in my case. And after all, we shouldn't rely on what the
BootROM did or didn't do.
While I'm not suggesting harcoding different behavior should happen on
upstream code, we can imagine that omap3's spl_boot_device could become
more flexible and return something else than what the BootROM booted the
SPL from, hence making that case a valid one.
What do you think?
> + twl4030_power_mmc_init(0);
> +}
> #endif
>
> #ifdef CONFIG_CMD_NET
> diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c
> index 886c723..43463d5 100644
> --- a/board/compulab/cm_t35/cm_t35.c
> +++ b/board/compulab/cm_t35/cm_t35.c
> @@ -382,6 +382,13 @@ int board_mmc_init(bd_t *bis)
> }
> #endif
>
> +#if defined(CONFIG_GENERIC_MMC)
> +void board_mmc_power_init(void)
> +{
> + twl4030_power_mmc_init(0);
> +}
> +#endif
> +
> #ifdef CONFIG_SYS_I2C_OMAP34XX
> /*
> * Routine: reset_net_chip
> diff --git a/board/corscience/tricorder/tricorder.c
> b/board/corscience/tricorder/tricorder.c
> index 9e81bf3..0fddf45 100644
> --- a/board/corscience/tricorder/tricorder.c
> +++ b/board/corscience/tricorder/tricorder.c
> @@ -147,6 +147,13 @@ int board_mmc_init(bd_t *bis)
> }
> #endif
>
> +#if defined(CONFIG_GENERIC_MMC)
> +void board_mmc_power_init(void)
> +{
> + twl4030_power_mmc_init(0);
> +}
> +#endif
> +
> /*
> * Routine: get_board_mem_timings
> * Description: If we use SPL then there is no x-loader nor config header
> diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
> index 7b87cc2..47522f8 100644
> --- a/board/isee/igep00x0/igep00x0.c
> +++ b/board/isee/igep00x0/igep00x0.c
> @@ -150,6 +150,13 @@ int board_mmc_init(bd_t *bis)
> }
> #endif
>
> +#if defined(CONFIG_GENERIC_MMC)
> +void board_mmc_power_init(void)
> +{
> + twl4030_power_mmc_init(0);
> +}
> +#endif
> +
> void set_fdt(void)
> {
> switch (gd->bd->bi_arch_number) {
> diff --git a/board/logicpd/omap3som/omap3logic.c
> b/board/logicpd/omap3som/omap3logic.c
> index 1fd9f2c..609edf1 100644
> --- a/board/logicpd/omap3som/omap3logic.c
> +++ b/board/logicpd/omap3som/omap3logic.c
> @@ -128,6 +128,13 @@ int board_mmc_init(bd_t *bis)
> }
> #endif
>
> +#if defined(CONFIG_GENERIC_MMC)
> +void board_mmc_power_init(void)
> +{
> + twl4030_power_mmc_init(0);
> +}
> +#endif
> +
> #ifdef CONFIG_SMC911X
> /* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
> static const u32 gpmc_lan92xx_config[] = {
> diff --
Re: [U-Boot] [PATCH v2 6/8] imx6: SPL support for iMX6 SabreSD
Hello John,
On 08-11-14 19:22, John Tobias wrote:
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port.
---
board/freescale/mx6sabresd/mx6sabresd.c | 216
1 file changed, 216 insertions(+)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 3d81fff..d090487 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -607,3 +607,219 @@ int checkboard(void)
puts("Board: MX6-SabreSD\n");
return 0;
}
+
+void board_init_f(ulong dummy)
+{
+ u32 ram_size;
+
+ /* Set the stack pointer. */
+ asm volatile("mov sp, %0\n" : : "r"(CONFIG_SPL_STACK));
+
+ ram_size = spl_dram_init();
+
+ arch_cpu_init();
+
+ /* Clear the BSS. */
+ memset(__bss_start, 0, __bss_end - __bss_start);
+
+ /* Set global data pointer. */
+ gd = &gdata;
+ gd->ram_size = ram_size;
+
sp and gd should already be valid by the time
board_init_f is called. There is no need to set them
again.
+ board_early_init_f();
+
+ timer_init();
+
+ preloader_console_init();
+
+ board_init_r(NULL, 0);
+}
+
Regards,
Jeroen
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[U-Boot] [PATCH v4 3/3] omap_hsmmc: Board-specific TWL4030 MMC power initializations
Boards using the TWL4030 regulator may not all use the LDOs the same way
(e.g. MMC2 power can be controlled by another LDO than VMMC2).
This delegates TWL4030 MMC power initializations to board-specific functions,
that may still call twl4030_power_mmc_init for the default behavior.
Signed-off-by: Paul Kocialkowski
---
board/comelit/dig297/dig297.c | 5 +
board/compulab/cm_t35/cm_t35.c | 7 +++
board/corscience/tricorder/tricorder.c | 7 +++
board/isee/igep00x0/igep00x0.c | 7 +++
board/logicpd/omap3som/omap3logic.c| 7 +++
board/logicpd/zoom1/zoom1.c| 5 +
board/matrix_vision/mvblx/mvblx.c | 6 ++
board/nokia/rx51/rx51.c| 6 ++
board/overo/overo.c| 7 +++
board/pandora/pandora.c| 5 +
board/technexion/tao3530/tao3530.c | 7 +++
board/ti/beagle/beagle.c | 7 +++
board/ti/evm/evm.c | 7 +++
board/ti/sdp3430/sdp.c | 5 +
board/timll/devkit8000/devkit8000.c| 7 +++
drivers/mmc/omap_hsmmc.c | 7 +--
16 files changed, 96 insertions(+), 6 deletions(-)
diff --git a/board/comelit/dig297/dig297.c b/board/comelit/dig297/dig297.c
index 2b826df..9d4c41b 100644
--- a/board/comelit/dig297/dig297.c
+++ b/board/comelit/dig297/dig297.c
@@ -133,6 +133,11 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
#endif
#ifdef CONFIG_CMD_NET
diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c
index 886c723..43463d5 100644
--- a/board/compulab/cm_t35/cm_t35.c
+++ b/board/compulab/cm_t35/cm_t35.c
@@ -382,6 +382,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
#ifdef CONFIG_SYS_I2C_OMAP34XX
/*
* Routine: reset_net_chip
diff --git a/board/corscience/tricorder/tricorder.c
b/board/corscience/tricorder/tricorder.c
index 9e81bf3..0fddf45 100644
--- a/board/corscience/tricorder/tricorder.c
+++ b/board/corscience/tricorder/tricorder.c
@@ -147,6 +147,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
/*
* Routine: get_board_mem_timings
* Description: If we use SPL then there is no x-loader nor config header
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 7b87cc2..47522f8 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -150,6 +150,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
void set_fdt(void)
{
switch (gd->bd->bi_arch_number) {
diff --git a/board/logicpd/omap3som/omap3logic.c
b/board/logicpd/omap3som/omap3logic.c
index 1fd9f2c..609edf1 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -128,6 +128,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
#ifdef CONFIG_SMC911X
/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
static const u32 gpmc_lan92xx_config[] = {
diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c
index 9ef0026..d39203a 100644
--- a/board/logicpd/zoom1/zoom1.c
+++ b/board/logicpd/zoom1/zoom1.c
@@ -109,6 +109,11 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
#endif
#ifdef CONFIG_CMD_NET
diff --git a/board/matrix_vision/mvblx/mvblx.c
b/board/matrix_vision/mvblx/mvblx.c
index a69359f..c9d615b 100644
--- a/board/matrix_vision/mvblx/mvblx.c
+++ b/board/matrix_vision/mvblx/mvblx.c
@@ -94,6 +94,12 @@ int board_mmc_init(bd_t *bis)
omap_mmc_init(1, 0, 0, -1, -1);
return 0;
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+ twl4030_power_mmc_init(1);
+}
#endif
#if defined(CONFIG_CMD_NET)
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index c2e07db..b6b8ad6 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -659,3 +659,9 @@ int board_mmc_init(bd_t *bis)
omap_mmc_init(1, 0, 0, -1, -1);
return 0;
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+ twl4030_power_mmc_init(1);
+}
diff --git a/board/overo/overo.c b/board/overo/overo.c
index dfb8602..b7f85e7 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -493,6 +493,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
[U-Boot] [PATCH v4 1/3] mmc: Board-specific MMC power initializations
Some devices may use non-standard combinations of regulators to power MMC:
this allows these devices to provide a board-specific MMC power init function
to set everything up in their own way.
Signed-off-by: Paul Kocialkowski
---
drivers/mmc/mmc.c | 7 +++
include/mmc.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 44a4feb..8436bc7 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1277,6 +1277,11 @@ block_dev_desc_t *mmc_get_dev(int dev)
}
#endif
+/* board-specific MMC power initializations. */
+__weak void board_mmc_power_init(void)
+{
+}
+
int mmc_start_init(struct mmc *mmc)
{
int err;
@@ -1293,6 +1298,8 @@ int mmc_start_init(struct mmc *mmc)
if (mmc->has_init)
return 0;
+ board_mmc_power_init();
+
/* made sure it's not NULL earlier */
err = mmc->cfg->ops->init(mmc);
diff --git a/include/mmc.h b/include/mmc.h
index d74a190..adffc35 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -385,6 +385,7 @@ struct mmc *mmc_spi_init(uint bus, uint cs, uint speed,
uint mode);
int mmc_legacy_init(int verbose);
#endif
+void board_mmc_power_init(void);
int board_mmc_init(bd_t *bis);
int cpu_mmc_init(bd_t *bis);
int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
--
1.9.1
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[U-Boot] [PATCH v4 0/3] mmc: Board-specific MMC power initializations
Changelog: v4: * Switch board_mmc_power_init to void since there is no return value check * Add dev_index to twl4030_power_mmc_init, common ramp-up delay * twl4030_power_mmc_init call with the relevant dev_index on boards * No check against CONFIG_TWL4030_POWER (an obvious linker error is better than a strange runtime error) v3: Changes to make v2 apply on master v2: Implement board_mmc_power_init instead of define ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 2/3] twl4030: device-index-specific MMC power initializations, common ramp-up delay
Not every device has multiple MMC slots available, so it makes sense to enable
only the required LDOs for the available slots. Generic code in omap_hsmmc will
enable both VMMC1 and VMMC2, in doubt.
Signed-off-by: Paul Kocialkowski
---
drivers/mmc/omap_hsmmc.c | 4 ++--
drivers/power/twl4030.c | 28 +---
include/twl4030.h| 2 +-
3 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index ffb5284..ae04939 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -137,8 +137,8 @@ static unsigned char mmc_board_init(struct mmc *mmc)
writel(pbias_lite, &t2_base->pbias_lite);
#endif
#if defined(CONFIG_TWL4030_POWER)
- twl4030_power_mmc_init();
- mdelay(100);/* ramp-up delay from Linux code */
+ twl4030_power_mmc_init(0);
+ twl4030_power_mmc_init(1);
#endif
#if defined(CONFIG_OMAP34XX)
writel(pbias_lite | PBIASLITEPWRDNZ1 |
diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c
index e578ae6..7f1fdd1 100644
--- a/drivers/power/twl4030.c
+++ b/drivers/power/twl4030.c
@@ -91,17 +91,23 @@ void twl4030_power_init(void)
TWL4030_PM_RECEIVER_DEV_GRP_P1);
}
-void twl4030_power_mmc_init(void)
+void twl4030_power_mmc_init(int dev_index)
{
- /* Set VMMC1 to 3.15 Volts */
- twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
- TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
- TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
- TWL4030_PM_RECEIVER_DEV_GRP_P1);
+ if (dev_index == 0) {
+ /* Set VMMC1 to 3.15 Volts */
+ twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
+ TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
+ TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
+ TWL4030_PM_RECEIVER_DEV_GRP_P1);
- /* Set VMMC2 to 3.15 Volts */
- twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
- TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
- TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
- TWL4030_PM_RECEIVER_DEV_GRP_P1);
+ mdelay(100);/* ramp-up delay from Linux code */
+ } else if (dev_index == 1) {
+ /* Set VMMC2 to 3.15 Volts */
+ twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
+ TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
+ TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
+ TWL4030_PM_RECEIVER_DEV_GRP_P1);
+
+ mdelay(100);/* ramp-up delay from Linux code */
+ }
}
diff --git a/include/twl4030.h b/include/twl4030.h
index f33cd1e..50f8da8 100644
--- a/include/twl4030.h
+++ b/include/twl4030.h
@@ -651,7 +651,7 @@ void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
/* For initializing power device */
void twl4030_power_init(void);
/* For initializing mmc power */
-void twl4030_power_mmc_init(void);
+void twl4030_power_mmc_init(int dev_index);
/*
* LED
--
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[U-Boot] [PATCH v2 5/8] imx6: add spl on board configuration
add the spl on build configuration of iMX6 SabreSD --- configs/mx6qsabresd_defconfig | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index 67c1b77..14c80cc 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -1,3 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" -CONFIG_ARM=y -CONFIG_TARGET_MX6SABRESD=y +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6sabresd_spl.cfg,SPL,MX6Q" ++S:CONFIG_ARM=y ++S:CONFIG_TARGET_MX6SABRESD=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 8/8] kconfig: imx6: add SUPPORT_SPL
add SUPPORT_SPL for iMX6 SabreSD by default --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 22eb2d5..ab0d284 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -609,6 +609,7 @@ config TARGET_MX6QSABREAUTO config TARGET_MX6SABRESD bool "Support mx6sabresd" select CPU_V7 + select SUPPORT_SPL config TARGET_MX6SLEVK bool "Support mx6slevk" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 6/8] imx6: SPL support for iMX6 SabreSD
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port.
---
board/freescale/mx6sabresd/mx6sabresd.c | 216
1 file changed, 216 insertions(+)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 3d81fff..d090487 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -607,3 +607,219 @@ int checkboard(void)
puts("Board: MX6-SabreSD\n");
return 0;
}
+
+#ifdef CONFIG_SPL_BUILD
+#include
+#include
+
+#define BOOT_CFG 0x20D8004
+#define __REG(x)(*((volatile u32 *)(x)))
+
+struct fsl_esdhc_cfg spl_usdhc_cfg;
+/*
+ * Got it from mx6q_4x_mt41j128.cfg file
+ */
+void set_mt41j128_ddr(void)
+{
+ __REG(0x020e05a8) = 0x0028;
+ __REG(0x020e05b0) = 0x0028;
+ __REG(0x020e0524) = 0x0028;
+ __REG(0x020e051c) = 0x0028;
+
+ __REG(0x020e0518) = 0x0028;
+ __REG(0x020e050c) = 0x0028;
+ __REG(0x020e05b8) = 0x0028;
+ __REG(0x020e05c0) = 0x0028;
+
+ __REG(0x020e05ac) = 0x0028;
+ __REG(0x020e05b4) = 0x0028;
+ __REG(0x020e0528) = 0x0028;
+ __REG(0x020e0520) = 0x0028;
+
+ __REG(0x020e0514) = 0x0028;
+ __REG(0x020e0510) = 0x0028;
+ __REG(0x020e05bc) = 0x0028;
+ __REG(0x020e05c4) = 0x0028;
+
+ __REG(0x020e056c) = 0x0030;
+ __REG(0x020e0578) = 0x0030;
+ __REG(0x020e0588) = 0x0030;
+ __REG(0x020e0594) = 0x0030;
+
+ __REG(0x020e057c) = 0x0030;
+ __REG(0x020e0590) = 0x0030;
+ __REG(0x020e0598) = 0x0030;
+ __REG(0x020e058c) = 0x;
+
+ __REG(0x020e059c) = 0x3030;
+ __REG(0x020e05a0) = 0x3030;
+ __REG(0x020e0784) = 0x0028;
+ __REG(0x020e0788) = 0x0028;
+
+ __REG(0x020e0794) = 0x0028;
+ __REG(0x020e079c) = 0x0028;
+ __REG(0x020e07a0) = 0x0028;
+ __REG(0x020e07a4) = 0x0028;
+
+ __REG(0x020e07a8) = 0x0028;
+ __REG(0x020e0748) = 0x0028;
+ __REG(0x020e074c) = 0x0030;
+ __REG(0x020e0750) = 0x0002;
+
+ __REG(0x020e0758) = 0x;
+ __REG(0x020e0774) = 0x0002;
+ __REG(0x020e078c) = 0x0030;
+ __REG(0x020e0798) = 0x000C;
+
+ __REG(0x021b081c) = 0x;
+ __REG(0x021b0820) = 0x;
+ __REG(0x021b0824) = 0x;
+ __REG(0x021b0828) = 0x;
+
+ __REG(0x021b481c) = 0x;
+ __REG(0x021b4820) = 0x;
+ __REG(0x021b4824) = 0x;
+ __REG(0x021b4828) = 0x;
+
+ __REG(0x021b0018) = 0x1740;
+
+ __REG(0x021b001c) = 0x8000;
+ __REG(0x021b000c) = 0x8A8F7975;
+ __REG(0x021b0010) = 0xFF538E64;
+ __REG(0x021b0014) = 0x01FF00DB;
+ __REG(0x021b002c) = 0x26D2;
+
+ __REG(0x021b0030) = 0x008F0E21;
+ __REG(0x021b0008) = 0x09444040;
+ __REG(0x021b0004) = 0x00020036;
+ __REG(0x021b0040) = 0x0047;
+ __REG(0x021b) = 0x841A;
+
+ __REG(0x021b001c) = 0x04088032;
+ __REG(0x021b001c) = 0x8033;
+ __REG(0x021b001c) = 0x00428031;
+ __REG(0x021b001c) = 0x09408030;
+
+ __REG(0x021b001c) = 0x04008040;
+ __REG(0x021b0800) = 0xA1380003;
+ __REG(0x021b0020) = 0x5800;
+ __REG(0x021b0818) = 0x0007;
+ __REG(0x021b4818) = 0x0007;
+
+ /* Calibration values based on ARD and 528MHz */
+ __REG(0x021b083c) = 0x434B0358;
+ __REG(0x021b0840) = 0x033D033C;
+ __REG(0x021b483c) = 0x03520362;
+ __REG(0x021b4840) = 0x03480318;
+ __REG(0x021b0848) = 0x41383A3C;
+ __REG(0x021b4848) = 0x3F3C374A;
+ __REG(0x021b0850) = 0x4243;
+ __REG(0x021b4850) = 0x4932473A;
+
+ __REG(0x021b080c) = 0x001F001F;
+ __REG(0x021b0810) = 0x001F001F;
+
+ __REG(0x021b480c) = 0x001F001F;
+ __REG(0x021b4810) = 0x001F001F;
+
+ __REG(0x021b08b8) = 0x0800;
+ __REG(0x021b48b8) = 0x0800;
+
+ __REG(0x021b0404) = 0x00011006;
+ __REG(0x021b0004) = 0x00025576;
+
+ __REG(0x021b001c) = 0x;
+
+ __REG(0x020c4068) = 0x00C03F3F;
+ __REG(0x020c406c) = 0x0030FC00;
+ __REG(0x020c4070) = 0x0FFFC000;
+ __REG(0x020c4074) = 0x3FF0;
+ __REG(0x020c4078) = 0x00FFF300;
+ __REG(0x020c407c) = 0x0FC3;
+ __REG(0x020c4080) = 0x03FF;
+}
+
+/*
+ * This section require the differentiation
+ * between iMX6 Sabre Families.
+ * But for now, it will configure only for
+ * SabreSD.
+ */
+static u32 spl_dram_init(void)
+{
+ u32 ddr_size;
+
+ set_mt41j128_ddr();
+ ddr_size = 0x4000;
+
+ return ddr_size;
+}
+
+int spl_board_mmc_init(bd_t *bis)
+{
+ unsigned reg = readl(BOOT_CFG);
+ /*
+* Upon reading BOOT_
[U-Boot] [PATCH v2 7/8] imx6: add data configuration file for SPL
This file is the default DCD configuration file for SPL --- board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 54 +++ 1 file changed, 54 insertions(+) create mode 100644 board/freescale/mx6sabresd/mx6sabresd_spl.cfg diff --git a/board/freescale/mx6sabresd/mx6sabresd_spl.cfg b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg new file mode 100644 index 000..2e2f850 --- /dev/null +++ b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg @@ -0,0 +1,54 @@ +/* + * Maintainer : Richard Hu + * + * Derived from Nitrogen6x code by Boundary Devices + * + * SPDX-License-Identifier:GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +#define __ASSEMBLY__ +#include +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +/* set the default clock gate to save power */ +DATA 4 0x020C4068 0x00C03F3F /* CCM_CCGR0 */ +DATA 4 0x020C406c 0x0030FC03 /* CCM_CCGR1 */ +DATA 4 0x020C4070 0x0FFFC000 /* CCM_CCGR2 */ +DATA 4 0x020C4074 0x3FF0 /* CCM_CCGR3 */ +DATA 4 0x020C4078 0xFFF300 /* CCM_CCGR4 */ +DATA 4 0x020C407c 0x0FF3 /* CCM_CCGR5 - enable SATA clocks */ +DATA 4 0x020C4080 0x03FF /* CCM_CCGR6 - enable ushdc and usb clocks */ + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF0CF /* IOMUXC_GPR4 */ +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F /* IOMUXC_GPR6 */ +DATA 4 0x020e001c 0x007F007F /* IOMUXC_GPR7 */ + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4 0x020c4060 0x00fb /* CCM_CCOSR */ + + -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/8] mmc: imx6: call spl_board_mmc_init
Add to call spl_board_mmc_init when CONFIG_SPL_MMC_SUPPORT is defined,
by default the mmc_initialize function will call board_mmc_init. But,
the said function is not link to the spl image.
---
drivers/mmc/mmc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 44a4feb..d641c2a 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1441,10 +1441,13 @@ int mmc_initialize(bd_t *bis)
INIT_LIST_HEAD (&mmc_devices);
cur_dev_num = 0;
+#ifdef CONFIG_SPL_BUILD
+ if (spl_board_mmc_init(bis) < 0)
+ cpu_mmc_init(bis);
+#else
if (board_mmc_init(bis) < 0)
cpu_mmc_init(bis);
-#ifndef CONFIG_SPL_BUILD
print_mmc_devices(',');
#endif
--
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[U-Boot] [PATCH v2 4/8] imx6: add some flexibility for defining macros
iMX6 SabreSD has different stack address compare to the default stack address defined on the file. The CONFIG_SYS_TEXT_BASE is defined in mx6sabre_common.h which is same address defined on file. At the same time to avoid compilation warnings. --- include/configs/imx6_spl.h | 4 1 file changed, 4 insertions(+) diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 5a5f940..4ff37b3 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -29,7 +29,9 @@ #define CONFIG_SPL_TEXT_BASE 0x00908000 #define CONFIG_SPL_MAX_SIZE0x1 #define CONFIG_SPL_START_S_PATH"arch/arm/cpu/armv7" +#ifndef CONFIG_SPL_STACK #define CONFIG_SPL_STACK 0x0091FFB8 +#endif #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -66,7 +68,9 @@ #define CONFIG_SPL_BSS_MAX_SIZE0x10/* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START0x1830 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x320 /* 50 MB */ +#ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0x1780 #endif +#endif #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/8] imx6: add spl on board configuration
add the spl on build configuration of iMX6 SabreSD --- include/configs/mx6sabresd.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 938030d..4d2e54a 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -12,6 +12,13 @@ #include #include +#ifdef CONFIG_SPL +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_STACK 0x0093FFB8 +#include "imx6_spl.h" +#endif + #define CONFIG_MACH_TYPE 3980 #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_CONSOLE_DEV "ttymxc0" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/8] mmc: add spl_board_mmc_init
To avoid compilation warning it need to define it in the header file. --- include/mmc.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/mmc.h b/include/mmc.h index d74a190..1d48bba 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -388,7 +388,9 @@ int mmc_legacy_init(int verbose); int board_mmc_init(bd_t *bis); int cpu_mmc_init(bd_t *bis); int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); - +#ifdef CONFIG_SPL +int spl_board_mmc_init(bd_t *bis); +#endif /* Set block count limit because of 16 bit register limit on some hardware*/ #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/8] *** iMX6 SabreSD SPL Support ***
This patch is for SPL support for iMX6 SabreSD. The said patches has been tested to work on SD2 and SD3 port of the said board. After applying the following patches, it will produces SPL and u-boot.img binary images. You should run the two commands below to store it in your SD or eMMC. sudo dd if=SPL of=/dev/xxx bs=1K seek=1; sync sudo dd if=u-boot.img of=/dev/xxx bs=1K seek=69 Changes: Merged the SPL support into the main board file Remove the compilation warmings John Tobias (8): mmc: add spl_board_mmc_init mmc: imx6: call spl_board_mmc_init imx6: add spl on board configuration imx6: add some flexibility for defining macros imx6: add spl on board configuration imx6: SPL support for iMX6 SabreSD imx6: add data configuration file for SPL kconfig: imx6: add SUPPORT_SPL arch/arm/Kconfig | 1 + board/freescale/mx6sabresd/mx6sabresd.c | 216 ++ board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 54 +++ configs/mx6qsabresd_defconfig | 7 +- drivers/mmc/mmc.c | 5 +- include/configs/imx6_spl.h| 4 + include/configs/mx6sabresd.h | 7 + include/mmc.h | 4 +- 8 files changed, 293 insertions(+), 5 deletions(-) create mode 100644 board/freescale/mx6sabresd/mx6sabresd_spl.cfg -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 13/39] x86: Use the standard dram_init() function
On 7 November 2014 02:42, Bin Meng wrote:
> On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote:
>> Instead of having an x86-specific DRAM init function, adjust things so we
>> can use the normal one.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> arch/x86/cpu/coreboot/sdram.c | 11 ---
>> arch/x86/include/asm/u-boot-x86.h | 4 ++--
>> common/board_f.c | 6 +-
>> 3 files changed, 7 insertions(+), 14 deletions(-)
>>
>> diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
>> index 959feaa..ca651c7 100644
>> --- a/arch/x86/cpu/coreboot/sdram.c
>> +++ b/arch/x86/cpu/coreboot/sdram.c
>> @@ -11,6 +11,7 @@
>> #include
>> #include
>> #include
>> +#include
>> #include
>> #include
>> #include
>> @@ -79,7 +80,7 @@ ulong board_get_usable_ram_top(ulong total_size)
>> return (ulong)dest_addr;
>> }
>>
>> -int dram_init_f(void)
>> +int dram_init(void)
>> {
>> int i;
>> phys_size_t ram_size = 0;
>> @@ -94,7 +95,8 @@ int dram_init_f(void)
>> gd->ram_size = ram_size;
>> if (ram_size == 0)
>> return -1;
>> - return 0;
>> +
>> + return calculate_relocation_address();
>> }
>>
>> int dram_init_banksize(void)
>> @@ -116,8 +118,3 @@ int dram_init_banksize(void)
>> }
>> return 0;
>> }
>> -
>> -int dram_init(void)
>> -{
>> - return dram_init_banksize();
>> -}
>> diff --git a/arch/x86/include/asm/u-boot-x86.h
>> b/arch/x86/include/asm/u-boot-x86.h
>> index 9e525dd..89618c7 100644
>> --- a/arch/x86/include/asm/u-boot-x86.h
>> +++ b/arch/x86/include/asm/u-boot-x86.h
>> @@ -27,8 +27,8 @@ unsigned long get_tbclk_mhz(void);
>> void timer_set_base(uint64_t base);
>> int pcat_timer_init(void);
>>
>> -/* Architecture specific - can be in arch/x86/cpu/, arch/x86/lib/, or
>> $(BOARD)/ */
>> -int dram_init_f(void);
>> +/* Architecture specific DRAM init */
>> +int dram_init(void);
>>
>> /* cpu/.../interrupts.c */
>> int cpu_init_interrupts(void);
>> diff --git a/common/board_f.c b/common/board_f.c
>> index 31f1d5c..df02ca5 100644
>> --- a/common/board_f.c
>> +++ b/common/board_f.c
>> @@ -903,13 +903,9 @@ static init_fnc_t init_sequence_f[] = {
>> #if defined(CONFIG_HARD_SPI)
>> init_func_spi,
>> #endif
>> -#ifdef CONFIG_X86
>> - dram_init_f,/* configure available RAM banks */
>> - calculate_relocation_address,
>> -#endif
>> announce_dram_init,
>> /* TODO: unify all these dram functions? */
>> -#ifdef CONFIG_ARM
>> +#if defined(CONFIG_ARM) || defined(CONFIG_X86)
>> dram_init, /* configure available RAM banks */
>> #endif
>> #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
>> --
>
> Reviewed-by: Bin Meng
Applied to u-boot-x86.
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Re: [U-Boot] [PATCH 16/39] x86: Fix up some missing prototypes
On 7 November 2014 03:07, Bin Meng wrote:
> On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote:
>> Some functions are missing prototypes. Fix those that are specific to x86.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> arch/x86/cpu/coreboot/coreboot.c | 4 +---
>> arch/x86/cpu/coreboot/sdram.c | 4 ++--
>> arch/x86/cpu/cpu.c| 3 +--
>> arch/x86/cpu/interrupts.c | 2 +-
>> arch/x86/include/asm/u-boot-x86.h | 9 +
>> 5 files changed, 14 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/x86/cpu/coreboot/coreboot.c
>> b/arch/x86/cpu/coreboot/coreboot.c
>> index b640f35..c430ab1 100644
>> --- a/arch/x86/cpu/coreboot/coreboot.c
>> +++ b/arch/x86/cpu/coreboot/coreboot.c
>> @@ -95,7 +95,7 @@ int board_eth_init(bd_t *bis)
>> #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
>> #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
>>
>> -int board_final_cleanup(void)
>> +void board_final_cleanup(void)
>> {
>> /* Un-cache the ROM so the kernel has one
>> * more MTRR available.
>> @@ -117,8 +117,6 @@ int board_final_cleanup(void)
>> /* Issue SMI to Coreboot to lock down ME and registers */
>> printf("Finalizing Coreboot\n");
>> outb(0xcb, 0xb2);
>> -
>> - return 0;
>> }
>>
>> void panic_puts(const char *str)
>> diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
>> index ca651c7..342ff30 100644
>> --- a/arch/x86/cpu/coreboot/sdram.c
>> +++ b/arch/x86/cpu/coreboot/sdram.c
>> @@ -14,6 +14,7 @@
>> #include
>> #include
>> #include
>> +#include
>> #include
>> #include
>>
>> @@ -99,7 +100,7 @@ int dram_init(void)
>> return calculate_relocation_address();
>> }
>>
>> -int dram_init_banksize(void)
>> +void dram_init_banksize(void)
>> {
>> int i, j;
>>
>> @@ -116,5 +117,4 @@ int dram_init_banksize(void)
>> }
>> }
>> }
>> - return 0;
>> }
>> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
>> index d6ba246..6441dde 100644
>> --- a/arch/x86/cpu/cpu.c
>> +++ b/arch/x86/cpu/cpu.c
>> @@ -197,14 +197,13 @@ asm(".globl generate_gpf\n"
>> "generate_gpf:\n"
>> "ljmp $0x70, $0x47114711\n");
>>
>> -void __reset_cpu(ulong addr)
>> +__weak void reset_cpu(ulong addr)
>> {
>> printf("Resetting using x86 Triple Fault\n");
>> set_vector(13, generate_gpf); /* general protection fault handler
>> */
>> set_vector(8, generate_gpf);/* double fault handler */
>> generate_gpf(); /* start the show */
>> }
>> -void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));
>>
>> int dcache_status(void)
>> {
>> diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
>> index 6f3d85f..51e2c59 100644
>> --- a/arch/x86/cpu/interrupts.c
>> +++ b/arch/x86/cpu/interrupts.c
>> @@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
>> "pushl $"#x"\n" \
>> "jmp irq_common_entry\n"
>>
>> -void dump_regs(struct irq_regs *regs)
>> +static void dump_regs(struct irq_regs *regs)
>> {
>> unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
>> unsigned long d0, d1, d2, d3, d6, d7;
>> diff --git a/arch/x86/include/asm/u-boot-x86.h
>> b/arch/x86/include/asm/u-boot-x86.h
>> index fdb8a6c..8d5b438 100644
>> --- a/arch/x86/include/asm/u-boot-x86.h
>> +++ b/arch/x86/include/asm/u-boot-x86.h
>> @@ -37,6 +37,15 @@ int cpu_init_interrupts(void);
>> /* board/.../... */
>> int dram_init(void);
>>
>> +int cleanup_before_linux(void);
>> +int x86_cleanup_before_linux(void);
>> +void x86_enable_caches(void);
>> +void x86_disable_caches(void);
>> +int x86_init_cache(void);
>> +void reset_cpu(ulong addr);
>> +ulong board_get_usable_ram_top(ulong total_size);
>> +void dram_init_banksize(void);
>> +
>> void setup_pcat_compatibility(void);
>>
>> void isa_unmap_rom(u32 addr);
>> --
>
> Reviewed-by: Bin Meng
Applied to u-boot-x86.
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Re: [U-Boot] [PATCH 14/39] x86: Use the standard arch_cpu_init() function
On 7 November 2014 02:49, Bin Meng wrote:
> On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote:
>> Instead of an x86-specific cpu_init_f() function, use the normal U-Boot one
>> for this purpose. Also remove a useless/misleading comment.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> arch/x86/cpu/coreboot/coreboot.c | 5 +
>> arch/x86/cpu/cpu.c| 1 -
>> arch/x86/include/asm/u-boot-x86.h | 1 +
>> common/board_f.c | 1 -
>> 4 files changed, 2 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/x86/cpu/coreboot/coreboot.c
>> b/arch/x86/cpu/coreboot/coreboot.c
>> index e24f13a..b640f35 100644
>> --- a/arch/x86/cpu/coreboot/coreboot.c
>> +++ b/arch/x86/cpu/coreboot/coreboot.c
>> @@ -20,10 +20,7 @@
>>
>> DECLARE_GLOBAL_DATA_PTR;
>>
>> -/*
>> - * Miscellaneous platform dependent initializations
>> - */
>> -int cpu_init_f(void)
>> +int arch_cpu_init(void)
>> {
>> int ret = get_coreboot_info(&lib_sysinfo);
>> if (ret != 0)
>> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
>> index 2e25253..d6ba246 100644
>> --- a/arch/x86/cpu/cpu.c
>> +++ b/arch/x86/cpu/cpu.c
>> @@ -130,7 +130,6 @@ int x86_cpu_init_f(void)
>>
>> return 0;
>> }
>> -int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f")));
>>
>> int x86_cpu_init_r(void)
>> {
>> diff --git a/arch/x86/include/asm/u-boot-x86.h
>> b/arch/x86/include/asm/u-boot-x86.h
>> index 89618c7..fdb8a6c 100644
>> --- a/arch/x86/include/asm/u-boot-x86.h
>> +++ b/arch/x86/include/asm/u-boot-x86.h
>> @@ -9,6 +9,7 @@
>> #define _U_BOOT_I386_H_1
>>
>> /* cpu/.../cpu.c */
>> +int arch_cpu_init(void);
>> int x86_cpu_init_r(void);
>> int cpu_init_r(void);
>> int x86_cpu_init_f(void);
>> diff --git a/common/board_f.c b/common/board_f.c
>> index df02ca5..f81f70d 100644
>> --- a/common/board_f.c
>> +++ b/common/board_f.c
>> @@ -819,7 +819,6 @@ static init_fnc_t init_sequence_f[] = {
>> #endif
>> arch_cpu_init, /* basic arch cpu dependent setup */
>> #ifdef CONFIG_X86
>> - cpu_init_f, /* TODO(s...@chromium.org): remove */
>> # ifdef CONFIG_OF_CONTROL
>> find_fdt, /* TODO(s...@chromium.org): remove */
>> # endif
>> --
>
> Reviewed-by: Bin Meng
Applied to u-boot-x86.
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Re: [U-Boot] [PATCH 18/39] x86: Save the BIST value on reset
On 7 November 2014 03:21, Bin Meng wrote:
> On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote:
>> The built in self test value is available in register eax on start-up. Save
>> it so that it can be accessed later. Unfortunately we must wait until the
>> global_data is available before we can do this, so there is a little bit of
>> shuffling to keep it around.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> arch/x86/cpu/start.S | 9 ++---
>> arch/x86/cpu/start16.S | 7 ++-
>> arch/x86/include/asm/global_data.h | 1 +
>> lib/asm-offsets.c | 3 +++
>> 4 files changed, 16 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
>> index c41e1ae..7f41475 100644
>> --- a/arch/x86/cpu/start.S
>> +++ b/arch/x86/cpu/start.S
>> @@ -49,6 +49,8 @@ _start:
>> */
>> movw$GD_FLG_COLD_BOOT, %bx
>> 1:
>> + /* Save BIST */
>> + movl%eax, %ebp
>>
>> /* Load the segement registes to match the gdt loaded in start16.S */
>> movl$(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
>> @@ -112,9 +114,10 @@ car_init_ret:
>> addl$GD_MALLOC_BASE, %edx
>> movl%esp, (%edx)
>> #endif
>> -
>> - /* Align temporary global descriptor table to 16-byte boundary */
>> - andl$0xfff0, %esp
>> + /* Store BIST */
>> + movl%eax, %edx
>> + addl$GD_BIST, %edx
>> + movl%ebp, (%edx)
>>
>> /* Set second parameter to setup_gdt */
>> movl%ecx, %edx
>> diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
>> index 445d5a1..9550502 100644
>> --- a/arch/x86/cpu/start16.S
>> +++ b/arch/x86/cpu/start16.S
>> @@ -21,6 +21,9 @@
>> .code16
>> .globl start16
>> start16:
>> + /* Save BIST */
>> + movl%eax, %ecx
>> +
>> /* Set the Cold Boot / Hard Reset flag */
>> movl$GD_FLG_COLD_BOOT, %ebx
>>
>> @@ -45,9 +48,11 @@ o32 cs lgdtgdt_ptr
>> /* Flush the prefetch queue */
>> jmp ff
>> ff:
>> - /* Finally jump to the 32bit initialization code */
>> +
>> + /* Finally restore BIST and jump to the 32bit initialization code */
>> movw$code32start, %ax
>> movw%ax, %bp
>> + movl%ecx, %eax
>> o32 cs ljmp*(%bp)
>>
>> /* 48-bit far pointer */
>> diff --git a/arch/x86/include/asm/global_data.h
>> b/arch/x86/include/asm/global_data.h
>> index 3e8e2cd..9eae228 100644
>> --- a/arch/x86/include/asm/global_data.h
>> +++ b/arch/x86/include/asm/global_data.h
>> @@ -17,6 +17,7 @@ struct arch_global_data {
>> uint32_t tsc_base_kclocks; /* Initial tsc as a kclocks value */
>> uint32_t tsc_prev; /* For show_boot_progress() */
>> void *new_fdt; /* Relocated FDT */
>> + uint32_t bist; /* Built-in self test value */
>> };
>>
>> #endif
>> diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
>> index 129bc3e..580f763 100644
>> --- a/lib/asm-offsets.c
>> +++ b/lib/asm-offsets.c
>> @@ -31,6 +31,9 @@ int main(void)
>> #ifdef CONFIG_SYS_MALLOC_F_LEN
>> DEFINE(GD_MALLOC_BASE, offsetof(struct global_data, malloc_base));
>> #endif
>> +#ifdef CONFIG_X86
>> + DEFINE(GD_BIST, offsetof(struct global_data, arch.bist));
>> +#endif
>>
>> #if defined(CONFIG_ARM)
>>
>> --
>
> Reviewed-by: Bin Meng
Applied to u-boot-x86.
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Re: [U-Boot] [PATCH 12/39] x86: Tidy up global descriptor table setup
On 7 November 2014 02:37, Bin Meng wrote: > On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote: >> This code is a little muddled, so tidy it up. Make sure that we put the >> GDT in the right place and set it up properly. >> >> Signed-off-by: Simon Glass >> --- >> >> arch/x86/cpu/start.S | 19 --- >> 1 file changed, 16 insertions(+), 3 deletions(-) >> >> diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S >> index 62ac4cd..c41e1ae 100644 >> --- a/arch/x86/cpu/start.S >> +++ b/arch/x86/cpu/start.S >> @@ -69,6 +69,16 @@ car_init_ret: >> * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, >> * or fully initialised SDRAM - we really don't care which) >> * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack >> +* and early malloc area. >> +* >> +* Stack grows down from top of CAR. We have: >> +* >> +* top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE >> +* global_data >> +* x86 global descriptor table >> +* early malloc area >> +* stack >> +* bottom-> CONFIG_SYS_CAR_ADDR >> */ >> >> /* Stack grows down from top of CAR */ >> @@ -86,12 +96,16 @@ car_init_ret: >> movl%esp, %edi >> rep stosb >> >> - /* Setup first parameter to setup_gdt */ >> + /* Setup first parameter to setup_gdt, pointer to global_data */ >> movl%esp, %eax >> >> /* Reserve space for global descriptor table */ >> subl$X86_GDT_SIZE, %esp >> >> + /* Align temporary global descriptor table to 16-byte boundary */ >> + andl$0xfff0, %esp >> + movl%esp, %ecx >> + >> #if defined(CONFIG_SYS_MALLOC_F_LEN) >> subl$CONFIG_SYS_MALLOC_F_LEN, %esp >> movl%eax, %edx >> @@ -103,14 +117,13 @@ car_init_ret: >> andl$0xfff0, %esp >> >> /* Set second parameter to setup_gdt */ >> - movl%esp, %edx >> + movl%ecx, %edx >> >> /* Setup global descriptor table so gd->xyz works */ >> callsetup_gdt >> >> /* Set parameter to board_init_f() to boot flags */ >> xorl%eax, %eax >> - movw%bx, %ax >> >> /* Enter, U-boot! */ >> callboard_init_f >> -- > > Reviewed-by: Bin Meng Applied to u-boot-x86. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/39] x86: Remove REALMODE_BASE which is no longer used
On 6 November 2014 19:55, Bin Meng wrote: > On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote: >> This was missed when the real mode support was dropped. Remove it. >> >> Signed-off-by: Simon Glass >> --- >> >> arch/x86/config.mk | 1 - >> 1 file changed, 1 deletion(-) >> >> diff --git a/arch/x86/config.mk b/arch/x86/config.mk >> index 3e7fedb..bb2da46 100644 >> --- a/arch/x86/config.mk >> +++ b/arch/x86/config.mk >> @@ -15,7 +15,6 @@ PF_CPPFLAGS_X86 := $(call cc-option, >> -fno-toplevel-reorder, \ >> $(call cc-option, -mpreferred-stack-boundary=2) >> PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_X86) >> PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm >> -PLATFORM_CPPFLAGS += -DREALMODE_BASE=0x7c0 >> PLATFORM_CPPFLAGS += -march=i386 -m32 >> >> # Support generic board on x86 >> -- > > Reviewed-by: Bin Meng Applied to u-boot-x86. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 11/39] x86: Invalidate TLB as early as possible
On 6 November 2014 20:49, Bin Meng wrote: > On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote: >> We should invalidate the TLB right at the start to ensure that we don't get >> false address translations even though paging is disabled. >> >> Signed-off-by: Simon Glass >> --- >> >> arch/x86/cpu/start16.S | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S >> index e718d4b..445d5a1 100644 >> --- a/arch/x86/cpu/start16.S >> +++ b/arch/x86/cpu/start16.S >> @@ -24,6 +24,9 @@ start16: >> /* Set the Cold Boot / Hard Reset flag */ >> movl$GD_FLG_COLD_BOOT, %ebx >> >> + xorl%eax, %eax >> + movl%eax, %cr3/* Invalidate TLB */ >> + >> /* Turn off cache (this might require a 486-class CPU) */ >> movl%cr0, %eax >> orl $(X86_CR0_NW | X86_CR0_CD), %eax >> -- > > Reviewed-by: Bin Meng Applied to u-boot-x86. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 09/39] x86: Remove board_init16() call which is not used
On 6 November 2014 19:57, Bin Meng wrote: > On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote: >> This allows a board to do very early init, but no boards need to do this. >> We may as well drop this feature. >> >> Signed-off-by: Simon Glass >> --- >> >> arch/x86/cpu/start16.S | 10 +- >> 1 file changed, 1 insertion(+), 9 deletions(-) >> >> diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S >> index 6968fda..e718d4b 100644 >> --- a/arch/x86/cpu/start16.S >> +++ b/arch/x86/cpu/start16.S >> @@ -24,15 +24,7 @@ start16: >> /* Set the Cold Boot / Hard Reset flag */ >> movl$GD_FLG_COLD_BOOT, %ebx >> >> - /* >> -* First we let the BSP do some early initialization >> -* this code have to map the flash to its final position >> -*/ >> - jmp board_init16 >> -.globl board_init16_ret >> -board_init16_ret: >> - >> - /* Turn of cache (this might require a 486-class CPU) */ >> + /* Turn off cache (this might require a 486-class CPU) */ >> movl%cr0, %eax >> orl $(X86_CR0_NW | X86_CR0_CD), %eax >> movl%eax, %cr0 >> -- > > Reviewed-by: Bin Meng Applied to u-boot-x86. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/10] x86: image: Add new image type for x64_64
On 10 October 2014 08:21, Simon Glass wrote: > This is a bit odd in that we are permitted to boot images for either, even > though they are separate architectures. > > Signed-off-by: Simon Glass Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/10] x86: config: Increase CONFIG_SYS_BOOTM_LEN to 16MB
On 10 October 2014 08:22, Simon Glass wrote: > The code density of x86_64 is not wonderful. Increase the maximum boot > size and adjust the load address to cope. > > Signed-off-by: Simon Glass > --- > > include/configs/coreboot.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 07/10] x86: bootm: Support booting a 64-bit raw kernel
On 10 October 2014 08:21, Simon Glass wrote: > Detect an x86_64 kernel and boot it in 64-bit mode. > > Signed-off-by: Simon Glass > --- > > arch/x86/lib/bootm.c | 10 -- > 1 file changed, 8 insertions(+), 2 deletions(-) Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/10] x86: Move kernel boot function to arch/x86/lib/bootm.c
On 10 October 2014 08:21, Simon Glass wrote: > The boot_zimage() function is badly named it can also boot a raw kernel. > Rename it, and try to avoid pointers for memory addresses as it involves > lots of casting. > > Signed-off-by: Simon Glass > --- > > arch/x86/include/asm/bootm.h | 16 +++ > arch/x86/include/asm/zimage.h | 4 +--- > arch/x86/lib/bootm.c | 48 > ++- > arch/x86/lib/zimage.c | 43 -- > 4 files changed, 63 insertions(+), 48 deletions(-) > Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/10] x86: Correct a few progress message nits
On 10 October 2014 08:21, Simon Glass wrote: > We should use puts() instead of printf() where possible. Also clarify > the setup.bin message. > > Signed-off-by: Simon Glass > --- > > arch/x86/lib/bootm.c | 2 +- > arch/x86/lib/zimage.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/10] x86: Add support for starting 64-bit kernel
On 10 October 2014 08:21, Simon Glass wrote: > Add code to jump to a 64-bit Linux kernel. We need to set up a flat page > table structure, a new GDT and then go through a few hoops in the right > order. > > Signed-off-by: Simon Glass Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/10] x86: Display basic CPU information on boot
On 10 October 2014 08:21, Simon Glass wrote: > Display the type of CPU (x86 or x86_64) when starting up. > > Signed-off-by: Simon Glass Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/10] x86: Bring in msr-index.h from linux 3.8
On 10 October 2014 08:21, Simon Glass wrote: > Update this file to include x86_64 fields. > > Signed-off-by: Simon Glass > --- > > arch/x86/include/asm/msr-index.h | 108 > ++- > 1 file changed, 106 insertions(+), 2 deletions(-) Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/10] x86: Move paging functions into cpu.c
On 10 October 2014 08:21, Simon Glass wrote: > These functions really don't belong in physmem as they relate to the > cpu. Move them. > > Signed-off-by: Simon Glass > --- > > arch/x86/cpu/cpu.c | 35 +++ > arch/x86/include/asm/cpu.h | 22 ++ > arch/x86/lib/physmem.c | 33 +++-- > 3 files changed, 60 insertions(+), 30 deletions(-) > create mode 100644 arch/x86/include/asm/cpu.h Applied to u-boot-x86 and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] x86: Display more detailed CPU information on boot
Hi Bin,
On 8 November 2014 08:18, Bin Meng wrote:
> Hi Simon,
>
> On Fri, Nov 7, 2014 at 10:22 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 4 November 2014 07:58, Bin Meng wrote:
>>> Currently only basic CPU information (x86 or x86_64) is displayed
>>> on boot. This commit adds more detailed information output including
>>> CPU vendor name, device id, family, model and stepping as well as
>>> the CPU brand string, all of which are extracted from CPUID result.
>>>
>>> The CPU identification happens in x86_cpu_init_f() and corresponding
>>> fields are saved in the global data. Later print_cpuinfo() just uses
>>> these fields to display CPU information without the need to probe
>>> again in real time.
>>>
>>> Signed-off-by: Bin Meng
>>> ---
>>> arch/x86/cpu/cpu.c | 282
>>> +++--
>>> arch/x86/include/asm/cpu.h | 142 +++
>>> arch/x86/include/asm/global_data.h | 5 +
>>> 3 files changed, 385 insertions(+), 44 deletions(-)
>>>
>>> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
>>> index 2e25253..e9058f7 100644
>>> --- a/arch/x86/cpu/cpu.c
>>> +++ b/arch/x86/cpu/cpu.c
>>> @@ -13,6 +13,9 @@
>>> * Sysgo Real-Time Solutions, GmbH
>>> * Alex Zuepke
>>> *
>>> + * Part of this file is adapted from coreboot
>>> + * src/arch/x86/lib/cpu.c
>>> + *
>>> * SPDX-License-Identifier:GPL-2.0+
>>> */
>>>
>>> @@ -27,6 +30,8 @@
>>> #include
>>> #include
>>>
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>> /*
>>> * Constructor for a conventional segment GDT (or LDT) entry
>>> * This is a macro so it can be used in initialisers
>>> @@ -43,6 +48,51 @@ struct gdt_ptr {
>>> u32 ptr;
>>> } __packed;
>>>
>>> +struct cpu_device_id {
>>> + unsigned vendor;
>>> + unsigned device;
>>> +};
>>> +
>>> +struct cpuinfo_x86 {
>>> +uint8_tx86;/* CPU family */
>>> +uint8_tx86_vendor; /* CPU vendor */
>>> +uint8_tx86_model;
>>> +uint8_tx86_mask;
>>> +};
>>> +
>>> +/* List of cpu vendor strings along with their normalized
>>
>> Can we put /* on its own line?
>>
>> /*
>> * List of CPU vendor strings ...
>> * ...
>> */
>>
>
> Sure.
>
>>> + * id values.
>>> + */
>>> +static struct {
>>> + int vendor;
>>> + const char *name;
>>> +} x86_vendors[] = {
>>> + { X86_VENDOR_INTEL, "GenuineIntel", },
>>> + { X86_VENDOR_CYRIX, "CyrixInstead", },
>>> + { X86_VENDOR_AMD, "AuthenticAMD", },
>>> + { X86_VENDOR_UMC, "UMC UMC UMC ", },
>>> + { X86_VENDOR_NEXGEN,"NexGenDriven", },
>>> + { X86_VENDOR_CENTAUR, "CentaurHauls", },
>>> + { X86_VENDOR_RISE, "RiseRiseRise", },
>>> + { X86_VENDOR_TRANSMETA, "GenuineTMx86", },
>>> + { X86_VENDOR_TRANSMETA, "TransmetaCPU", },
>>> + { X86_VENDOR_NSC, "Geode by NSC", },
>>> + { X86_VENDOR_SIS, "SiS SiS SiS ", },
>>> +};
>>> +
>>> +static const char *x86_vendor_name[] = {
>>> + [X86_VENDOR_INTEL] = "Intel",
>>> + [X86_VENDOR_CYRIX] = "Cyrix",
>>> + [X86_VENDOR_AMD] = "AMD",
>>> + [X86_VENDOR_UMC] = "UMC",
>>> + [X86_VENDOR_NEXGEN]= "NexGen",
>>> + [X86_VENDOR_CENTAUR] = "Centaur",
>>> + [X86_VENDOR_RISE] = "Rise",
>>> + [X86_VENDOR_TRANSMETA] = "Transmeta",
>>> + [X86_VENDOR_NSC] = "NSC",
>>> + [X86_VENDOR_SIS] = "SiS",
>>> +};
>>> +
>>> static void load_ds(u32 segment)
>>> {
>>> asm volatile("movl %0, %%ds" : : "r" (segment *
>>> X86_GDT_ENTRY_SIZE));
>>> @@ -115,6 +165,131 @@ int __weak x86_cleanup_before_linux(void)
>>> return 0;
>>> }
>>>
>>> +/*
>>> + * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
>>> + * by the fact that they preserve the flags across the division of 5/2.
>>> + * PII and PPro exhibit this behavior too, but they have cpuid available.
>>> + */
>>> +
>>> +/*
>>> + * Perform the Cyrix 5/2 test. A Cyrix won't change
>>> + * the flags, while other 486 chips will.
>>> + */
>>> +static inline int test_cyrix_52div(void)
>>> +{
>>> + unsigned int test;
>>> +
>>> + __asm__ __volatile__(
>>> +"sahf\n\t" /* clear flags (%eax = 0x0005) */
>>> +"div %b2\n\t" /* divide 5 by 2 */
>>> +"lahf" /* store flags into %ah */
>>> +: "=a" (test)
>>> +: "0" (5), "q" (2)
>>> +: "cc");
>>> +
>>> + /* AH is 0x02 on Cyrix after the divide.. */
>>> + return (unsigned char) (test >> 8) == 0x02;
>>> +}
>>> +
>>> +/*
>>> + * Detect a NexGen CPU running without BIOS hypercode new enough
>>> + * to have CPUID. (Thanks to Herbert Oppmann)
>>> + */
>>> +
>>> +static int deep_magic_nexgen_probe(void)
>>> +{
>>> + int ret;
>>> +
>>> + __asm__ __volatile__ (
>>> + " movw$0x, %%ax\n"
>>> + " xorw%%dx,%%dx\n"
>>>
[U-Boot] [U-Boot,v2] mpc85xx: inhibit bman portals by default
Not all portals might be managed and therefore visible.
Set the isdr register so that the corresponding isr register
won't be set. This is needed for deepsleep.
Signed-off-by: Jeffrey Ladouceur
---
The following dependent patches should be applied first:
http://patchwork.ozlabs.org/patch/403532
http://patchwork.ozlabs.org/patch/403533
http://patchwork.ozlabs.org/patch/403540
http://patchwork.ozlabs.org/patch/403534
http://patchwork.ozlabs.org/patch/403535
http://patchwork.ozlabs.org/patch/403538
http://patchwork.ozlabs.org/patch/403536
http://patchwork.ozlabs.org/patch/403539
Changes in v2:
- Removed P1023RDS as it is no longer supported.
arch/powerpc/cpu/mpc85xx/portals.c | 41 +++
include/configs/B4860QDS.h |8 +++
include/configs/P1023RDB.h |8 +++
include/configs/P2041RDB.h |8 +++
include/configs/T102xQDS.h |8 +++
include/configs/T102xRDB.h |8 +++
include/configs/T1040QDS.h |8 +++
include/configs/T104xRDB.h |8 +++
include/configs/T208xQDS.h |8 +++
include/configs/T208xRDB.h |8 +++
include/configs/T4240EMU.h |8 +++
include/configs/T4240QDS.h |8 +++
include/configs/T4240RDB.h |8 +++
include/configs/corenet_ds.h|8 +++
include/configs/km/kmp204x-common.h |8 +++
15 files changed, 153 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/portals.c
b/arch/powerpc/cpu/mpc85xx/portals.c
index 98815f8..4c2ee98 100644
--- a/arch/powerpc/cpu/mpc85xx/portals.c
+++ b/arch/powerpc/cpu/mpc85xx/portals.c
@@ -14,6 +14,44 @@
#include
#include
+#define MAX_PORTALS (CONFIG_SYS_BMAN_CINH_SIZE / CONFIG_SYS_BMAN_SP_CINH_SIZE)
+void inhibit_bman_portals(void)
+{
+ void __iomem *addr = (void *)CONFIG_SYS_BMAN_CINH_BASE +
+ CONFIG_SYS_BMAN_SWP_ISDR_REG;
+ uint32_t val;
+ int portal_count = 0;
+
+ /* Dynamically determine number of portals */
+ do {
+ val = in_be32(addr);
+ if (val) {
+ printf("ERROR: should be zero at 0x%p\n", addr);
+ goto done;
+ }
+ out_be32(addr, -1);
+ val = in_be32(addr);
+ if (!val) {
+ /* end of portals */
+ if (!portal_count)
+ printf("ERROR: No portals\n");
+ goto done;
+ }
+ portal_count++;
+ addr += CONFIG_SYS_BMAN_SP_CINH_SIZE;
+ if (portal_count >= MAX_PORTALS)
+ goto done;
+ } while (1);
+
+done:
+
+#ifdef DEBUG
+ printf("BMan portal counted %u, defined is %u\n",
+ portal_count, CONFIG_SYS_BMAN_NUM_PORTALS);
+#endif
+ return;
+}
+
void setup_portals(void)
{
ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
@@ -38,6 +76,9 @@ void setup_portals(void)
out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
#endif
out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
+
+ /* Change default state of BMan ISDR portals to all 1s */
+ inhibit_bman_portals();
}
/* Update portal containter to match LAW setup of portal in phy map */
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index dc1a9bc..31f1d3f 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -641,6 +641,14 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE
#endif
#define CONFIG_SYS_BMAN_MEM_SIZE 0x0200
+#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000
+#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000
+#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE
+#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \
+ CONFIG_SYS_BMAN_CENA_SIZE)
+#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08
#define CONFIG_SYS_QMAN_NUM_PORTALS25
#define CONFIG_SYS_QMAN_MEM_BASE 0xf600
#ifdef CONFIG_PHYS_64BIT
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index ba3da06..107db72 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -347,6 +347,14 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_BMAN_MEM_BASE 0xff20
#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE
#define CONFIG_SYS_BMAN_MEM_SIZE 0x0020
+#define CONFIG_SYS_BMAN_SP_CENA_SIZE0x4000
+#define CONFIG_SYS_BMAN_SP_CINH_SIZE0x1000
+#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE
+#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define
Re: [U-Boot] [PATCH 8/8] imx: SPL support for iMX6 SabreSD
Thanks for the info. I got a 2nd revision and will send it later. Regards, john On Sat, Nov 8, 2014 at 5:13 AM, Otavio Salvador wrote: > On Fri, Nov 7, 2014 at 8:12 PM, John Tobias wrote: >> This file will enable the support for SPL on iMX6 Sabrex families. >> It tested on SD2 and SD3 mmc port. > > This needs to be included before we actually use it. So before the > makefile inclusion. In fact I see no reason to split it so much. > > -- > Otavio Salvador O.S. Systems > http://www.ossystems.com.brhttp://code.ossystems.com.br > Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] x86: Display more detailed CPU information on boot
Hi Simon, On Fri, Nov 7, 2014 at 10:23 AM, Simon Glass wrote: > Hi Bin, > > On 6 November 2014 19:22, Simon Glass wrote: >> Hi Bin, >> >> On 4 November 2014 07:58, Bin Meng wrote: >>> Currently only basic CPU information (x86 or x86_64) is displayed >>> on boot. This commit adds more detailed information output including >>> CPU vendor name, device id, family, model and stepping as well as >>> the CPU brand string, all of which are extracted from CPUID result. >>> >>> The CPU identification happens in x86_cpu_init_f() and corresponding >>> fields are saved in the global data. Later print_cpuinfo() just uses >>> these fields to display CPU information without the need to probe >>> again in real time. > > Sorry...one more point. For CPU info it should fit on one line. So > maybe use debug() for the extra stuff. If you like you can create a > 'cpuinfo' command or similar to get more detailed information, but > U-Boot should start up with the minimum of verbiage. OK, I will rework the patch. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] x86: Display more detailed CPU information on boot
Hi Simon,
On Fri, Nov 7, 2014 at 10:22 AM, Simon Glass wrote:
> Hi Bin,
>
> On 4 November 2014 07:58, Bin Meng wrote:
>> Currently only basic CPU information (x86 or x86_64) is displayed
>> on boot. This commit adds more detailed information output including
>> CPU vendor name, device id, family, model and stepping as well as
>> the CPU brand string, all of which are extracted from CPUID result.
>>
>> The CPU identification happens in x86_cpu_init_f() and corresponding
>> fields are saved in the global data. Later print_cpuinfo() just uses
>> these fields to display CPU information without the need to probe
>> again in real time.
>>
>> Signed-off-by: Bin Meng
>> ---
>> arch/x86/cpu/cpu.c | 282
>> +++--
>> arch/x86/include/asm/cpu.h | 142 +++
>> arch/x86/include/asm/global_data.h | 5 +
>> 3 files changed, 385 insertions(+), 44 deletions(-)
>>
>> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
>> index 2e25253..e9058f7 100644
>> --- a/arch/x86/cpu/cpu.c
>> +++ b/arch/x86/cpu/cpu.c
>> @@ -13,6 +13,9 @@
>> * Sysgo Real-Time Solutions, GmbH
>> * Alex Zuepke
>> *
>> + * Part of this file is adapted from coreboot
>> + * src/arch/x86/lib/cpu.c
>> + *
>> * SPDX-License-Identifier:GPL-2.0+
>> */
>>
>> @@ -27,6 +30,8 @@
>> #include
>> #include
>>
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> /*
>> * Constructor for a conventional segment GDT (or LDT) entry
>> * This is a macro so it can be used in initialisers
>> @@ -43,6 +48,51 @@ struct gdt_ptr {
>> u32 ptr;
>> } __packed;
>>
>> +struct cpu_device_id {
>> + unsigned vendor;
>> + unsigned device;
>> +};
>> +
>> +struct cpuinfo_x86 {
>> +uint8_tx86;/* CPU family */
>> +uint8_tx86_vendor; /* CPU vendor */
>> +uint8_tx86_model;
>> +uint8_tx86_mask;
>> +};
>> +
>> +/* List of cpu vendor strings along with their normalized
>
> Can we put /* on its own line?
>
> /*
> * List of CPU vendor strings ...
> * ...
> */
>
Sure.
>> + * id values.
>> + */
>> +static struct {
>> + int vendor;
>> + const char *name;
>> +} x86_vendors[] = {
>> + { X86_VENDOR_INTEL, "GenuineIntel", },
>> + { X86_VENDOR_CYRIX, "CyrixInstead", },
>> + { X86_VENDOR_AMD, "AuthenticAMD", },
>> + { X86_VENDOR_UMC, "UMC UMC UMC ", },
>> + { X86_VENDOR_NEXGEN,"NexGenDriven", },
>> + { X86_VENDOR_CENTAUR, "CentaurHauls", },
>> + { X86_VENDOR_RISE, "RiseRiseRise", },
>> + { X86_VENDOR_TRANSMETA, "GenuineTMx86", },
>> + { X86_VENDOR_TRANSMETA, "TransmetaCPU", },
>> + { X86_VENDOR_NSC, "Geode by NSC", },
>> + { X86_VENDOR_SIS, "SiS SiS SiS ", },
>> +};
>> +
>> +static const char *x86_vendor_name[] = {
>> + [X86_VENDOR_INTEL] = "Intel",
>> + [X86_VENDOR_CYRIX] = "Cyrix",
>> + [X86_VENDOR_AMD] = "AMD",
>> + [X86_VENDOR_UMC] = "UMC",
>> + [X86_VENDOR_NEXGEN]= "NexGen",
>> + [X86_VENDOR_CENTAUR] = "Centaur",
>> + [X86_VENDOR_RISE] = "Rise",
>> + [X86_VENDOR_TRANSMETA] = "Transmeta",
>> + [X86_VENDOR_NSC] = "NSC",
>> + [X86_VENDOR_SIS] = "SiS",
>> +};
>> +
>> static void load_ds(u32 segment)
>> {
>> asm volatile("movl %0, %%ds" : : "r" (segment * X86_GDT_ENTRY_SIZE));
>> @@ -115,6 +165,131 @@ int __weak x86_cleanup_before_linux(void)
>> return 0;
>> }
>>
>> +/*
>> + * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
>> + * by the fact that they preserve the flags across the division of 5/2.
>> + * PII and PPro exhibit this behavior too, but they have cpuid available.
>> + */
>> +
>> +/*
>> + * Perform the Cyrix 5/2 test. A Cyrix won't change
>> + * the flags, while other 486 chips will.
>> + */
>> +static inline int test_cyrix_52div(void)
>> +{
>> + unsigned int test;
>> +
>> + __asm__ __volatile__(
>> +"sahf\n\t" /* clear flags (%eax = 0x0005) */
>> +"div %b2\n\t" /* divide 5 by 2 */
>> +"lahf" /* store flags into %ah */
>> +: "=a" (test)
>> +: "0" (5), "q" (2)
>> +: "cc");
>> +
>> + /* AH is 0x02 on Cyrix after the divide.. */
>> + return (unsigned char) (test >> 8) == 0x02;
>> +}
>> +
>> +/*
>> + * Detect a NexGen CPU running without BIOS hypercode new enough
>> + * to have CPUID. (Thanks to Herbert Oppmann)
>> + */
>> +
>> +static int deep_magic_nexgen_probe(void)
>> +{
>> + int ret;
>> +
>> + __asm__ __volatile__ (
>> + " movw$0x, %%ax\n"
>> + " xorw%%dx,%%dx\n"
>> + " movw$2, %%cx\n"
>> + " divw%%cx\n"
>> + " movl$0, %%eax\n"
>> + " jnz 1f\n"
>> + " movl$1
Re: [U-Boot] [PATCH 8/8] imx: SPL support for iMX6 SabreSD
On Fri, Nov 7, 2014 at 8:12 PM, John Tobias wrote: > This file will enable the support for SPL on iMX6 Sabrex families. > It tested on SD2 and SD3 mmc port. This needs to be included before we actually use it. So before the makefile inclusion. In fact I see no reason to split it so much. -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/8] kconfig: add SUPPORT_SPL
On Fri, Nov 7, 2014 at 8:12 PM, John Tobias wrote: > add SUPPORT_SPL for iMX6 SabreSD by default This should be the last patch from the serie or it will break bisect. -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb_storage: blacklist Enclosure Service Devices
>> > Skip enclosure service devices when probing for usb storage devices. >> > >> > This avoids long timeouts when probing for external usb harddisks >> > which provide "Enclosure Services". >> > >> > Signed-off-by: Soeren Moch > Is it possible to provide a configuration option and some default > behavior, instead of just disabling it? > Nikolay, I don't understand your concern, why do you need some other default behavior? Since the "block device" part of the harddisk keeps active, why not skipping the "enclosure service" part? Is there any command to access enclosure services from u-boot? Please keep me (and maintainers) on cc when answering the mail. But since the patch is already applied (thanks Marek!), it may be to late for discussions anyway... Regards, Soeren ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4 v4] spi: Add Cadence QSPI DM driver used by SoCFPGA
On 07.11.2014 20:56, Dinh Nguyen wrote: +CC: Graham Moore On 11/07/2014 09:26 AM, Stefan Roese wrote: Hi Dinh, Hi Vince! Could we not just use a "plain" GPL (v2) license here as well. Especially since the other files in this driver are just normal GPL files. Comments welcome. Graham recent posted to lkml a patch series for QSPI that has a plain GPLv2. http://marc.info/?l=linux-kernel&m=141417788514196&w=2 Interesting. Thanks for this info. But what is the implication of this new plain GPLv2'ed driver code to the current code in this patch (based on your Rocketboard.org version)? Frankly, I really don't have time and motivation to re-port this new Linux version to U-Boot to get the GPLv2 version. How could we solve this? Can you re-release this code under this new license (header)? Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] usb:ehci-mx6 add board_usb_phy_mode function
On Saturday, November 08, 2014 at 05:07:21 AM, Peng Fan wrote:
> 在 11/7/2014 8:17 PM, Marek Vasut 写道:
> > On Friday, November 07, 2014 at 12:45:51 PM, Peng Fan wrote:
> >> 在 11/7/2014 7:09 PM, Marek Vasut 写道:
> >>> On Friday, November 07, 2014 at 12:03:30 PM, Peng Fan wrote:
> >>>
> >>> [...]
> >>>
> >> @@ -160,7 +174,7 @@ static int usb_phy_enable(int index, struct
> >> usb_ehci *ehci) val |= (USBPHY_CTRL_ENUTMILEVEL2 |
> >> USBPHY_CTRL_ENUTMILEVEL3);
> >>
> >>__raw_writel(val, phy_ctrl);
> >>
> >> - return val & USBPHY_CTRL_OTG_ID;
> >> + return board_usb_phy_mode(index);
> >
> > This should be called from ehci_hcd_init() right after
> > usb_phy_enable(). Afterall, the mode detection has nothing to do with
> > the PHY enabling.
>
> This back to what I did in patch v2. right after usb_phy_enable(),
> just paste that piece of code here:
>
> The weak function:
> +int __weak board_ehci_usb_mode(int index, enum usb_init_type *type)
> +{
> + return 0;
> +}
> +
>
> type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE :
> USB_INIT_HOST;
>
> + board_usb_phy_mode(index, &type);
> +
> >>>
> >>> The usb_phy_enable() should not return the PHY mode at all though.
> >>> It should be the board_usb_phy_mode() which adjusts the PHY type.
> >>> The usb_phy_enable() should return just a success/failure return
> >>> value.
> >>
> >> ok. got it.
> >>
> What need to do is to let board can modify the `type` like following:
> +int board_usb_phy_mode(int port, enum usb_init_type *type)
> +{
> +if (port == 1)
> + /* port1 works in HOST Mode */
> +*type = USB_INIT_HOST;
> +
> + return 0;
> +}
> +
> This is the way that I did in patch v2. If this is fine, I'll resent
> this patch set.
> >>>
> >>> It should really explicitly set it, not modify it, see above.
> >>
> >> I have an idea about this patch:
> >> 1. usb_phy_enable will not be touched.
> >> 2. replace "type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE :
> >> USB_INIT_HOST;" with "usb_phy_enable(index, ehci)".
> >> 3. right after usb_phy_enable, add this line "type =
> >> board_usb_phy_mode(index)" or "type = board_usb_phy_mode((struct usb_phy
> >> *)PHY_ADDRESS)". Here I also think pass phy register definition to board
> >> level code is not fine just as what we talked about passing ehci struct
> >> to board level code in patch v2.
> >> 4. in ehci-mx6.c, implement the weak function "int __weak
> >> board_usb_phy_mode(xxx)", and it's return value is the mode, HOST or
> >> DEVICE. If the board code want to implement this function, just return
> >> what the board want.
> >>
> >> After all, this patch may looks like this:
> >> In ehci-mx6.c
> >> +int __weak board_usb_phy_mode(int port)
> >> +{
> >> + void __iomem *phy_reg;
> >> + void __iomem *phy_ctrl;
> >> + u32 val;
> >> +
> >> + phy_reg = (void __iomem *)phy_bases[port];
> >> + phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
> >> +
> >> + val = __raw_readl(phy_ctrl);
> >> +
> >> + return val & USBPHY_CTRL_OTG_ID;
> >> +}
> >> +
> >>
> >> - type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE : USB_INIT_HOST;
> >> + usb_phy_enable(index, ehci);
> >> + type = board_usb_phy_mode(index);
> >>
> >> in board code, which is not in this patch, just list here:
> >> +int board_usb_phy_mode(int port)
> >> +{
> >> + if (port == 1)
> >> + return USB_INIT_HOST;
> >> + else
> >> + return USB_INIT_DEVICE;
> >> +}
> >> I just want to keep it simple and do not want to touch usb phy register
> >> in board code.
> >>
> >> Any ideas?
> >
> > This seems OKish for all but the part where usb_phy_enable() shouldn't be
> > touched. The return value of usb_phy_enable() should really be a regular
> > return code, not the PHY mode.
>
> ok. I'll fix this.
>
> > You can also still implement a function to query a PHY for it's mode, so
> > you don't need to explicitly read the USBPHY_CTRL_OTG_ID in the board
> > code.
>
> I am not sure whether this following way is fine or not.
> +int board_usb_phy_mode(int index)
> + __attribute__((weak, alias("usb_phy_mode")));
__weak board_usb_phy_mode(int index) is fine.
> +
> in usb_phy_mode, query a PHY for it's mode.
>
> And righter after usb_phy_enable in ehci-mx6.c.
> - type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE :
> USB_INIT_HOST;
> + usb_phy_enable(index, ehci);
> + type = usb_phy_mode(index);
>
> usb_phy_enable return 0 but not return val & USBPHY_CTRL_OTG_ID. There
> is no status bit for query enabled or not, so just return 0.
>
> In board file:
> int board_usb_phy_mode(int port)
> {
> if (port == 1)
> return USB_INIT_HOST;
> else
> return usb_phy_mode(port);
> }
>
> I thin
Re: [U-Boot] [PATCH V4 2/3] usb: eth: add ASIX AX88179 DRIVER
On Friday, November 07, 2014 at 04:53:48 PM, Rene Griessl wrote: > This patch adds driver support for the ASIX AX88179 USB3.0 to GbE network > adapter. > > Driver has been tested on the RECS5250 COM module (similar to ARDALE5250). > Testcase was DHCP and PXE boot. > > Signed-off-by: Rene Griessl Reviewed-by: Marek Vasut Joe, can you take a look? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb_storage: blacklist Enclosure Service Devices
On Saturday, November 08, 2014 at 07:02:14 AM, Soeren Moch wrote: > Skip enclosure service devices when probing for usb storage devices. > > This avoids long timeouts when probing for external usb harddisks > which provide "Enclosure Services". > > Signed-off-by: Soeren Moch I tweaked the comment so it matches the patch guidelines [1] and applied. Thanks! [1] http://www.denx.de/wiki/U-Boot/Patches Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 06/11] sun6i: Add dram initialization code
Hi, Thanks for all the reviews! On 11/08/2014 11:25 AM, Ian Campbell wrote: > On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: >> Add full support for dram initialization, using a fixed clock and >> autodetection >> of the memory organization (numbers of channels, bus-width, etc.). >> >> This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 >> SDK, >> extended with extra initialization sequences and the autodetect algorithm >> from boot0. >> >> Signed-off-by: Hans de Goede > > Acked-by: Ian Campbell > >> +/* Bunch of magic writes performed by boot0 */ >> +writel(0x00400302, &mctl_com->rmcr[0]); > [...] > > :-/ Have you pinged Allwinner about these/docs for these? No, and neither for the next patch. I'll drop them a mail. In this case in the mean time I think I know what this is, this is *probably* setting up access rights / priorities for all the DRAM masters. Regards, Hans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 11/11] sun6i: ehci: Add sun6i ehci support
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > Add support for the 2 ehci controllers found on the sun6i (A31) soc. > > Signed-off-by: Hans de Goede You should probably run this by the usb custodian (Marek?) but for my part: Acked-by: Ian Campbell ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 10/11] sunxi: ehci: Add proper Kconfig options to select the usb Vbus gpio-s
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to > Kconfig being the right thing to do, an added advantage of this is that it > allows for boards without Vbus gpio-s. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 09/11] sun6i: Add Mele M9 board
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > Signed-off-by: Hans de Goede Acked-by: Ian Campbell ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 08/11] sun6i: Enable SPL
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > Enable the SPL now that we've all the necessary bits in place. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 07/11] sun6i: Poke magic sram controller register to avoid cache issues
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > Without this the cache will only work in write-through mode, and as soon as > it is put in write-back mode things break. > > Signed-off-by: Hans de Goede Urk. Have Allwinner been prodded? Acked-by: Ian Campbell ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 06/11] sun6i: Add dram initialization code
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > Add full support for dram initialization, using a fixed clock and > autodetection > of the memory organization (numbers of channels, bus-width, etc.). > > This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK, > extended with extra initialization sequences and the autodetect algorithm > from boot0. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell > + /* Bunch of magic writes performed by boot0 */ > + writel(0x00400302, &mctl_com->rmcr[0]); [...] :-/ Have you pinged Allwinner about these/docs for these? Ian. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 01/11] sun6i: Add new p2wi controller driver
Hi,
On 11/08/2014 11:14 AM, Ian Campbell wrote:
> On Fri, 2014-11-07 at 20:46 +0100, Hans de Goede wrote:
>> From: Oliver Schinagl
>>
>> The A31 uses a new push-pull two wire interface, which features higher
>> transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8
>> bytes each time, this driver will only see very little use and thus is
>> limited to single byte transmission only.
>>
>> Signed-off-by: Oliver Schinagl
>> Signed-off-by: Hans de Goede
>
> Acked-by: Ian Campbell
>
> One question:
>> +int p2wi_change_to_p2wi_mode(u8 slave_addr, u8 ctrl_reg, u8 init_data)
>> +{
>> +struct sunxi_p2wi_reg *p2wi = (struct sunxi_p2wi_reg *)SUNXI_P2WI_BASE;
>> +unsigned long tmo = timer_get_us() + 100;
>> +
>> +writel(P2WI_PM_DEV_ADDR(slave_addr) |
>> + P2WI_PM_CTRL_ADDR(ctrl_reg) |
>> + P2WI_PM_INIT_DATA(init_data) |
>> + P2WI_PM_INIT_SEND,
>> + &p2wi->pm);
>> +
>> +while ((readl(&p2wi->pm) & P2WI_PM_INIT_SEND)) {
>> +if (timer_get_us() > tmo)
>> +return -EFAULT;
>
> You don't mean ETIME(DOUT) or something here, do you? EFAULT seems a bit
> odd.
Yes, ETIME would be much better will fix for v4.
Regards,
Hans
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Re: [U-Boot] [PATCH v3 05/11] sun4i: Rename dram files to dram_sun4i.x
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > In preparation for adding sun6i dram support. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 04/11] sun6i: Add cpucfg register definitions
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > Not used atm, for future use (e.g. PSCI). > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 03/11] sun6i: Add clock functions needed for SPL / DRAM init
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > Add clock_init_safe and clockset_pll5 functions, as these are needed for > SPL support resp. DRAM init (which is needed for SPL too). > > Also add some extra clock register constant defines. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 02/11] sun6i: Add basic axp221 driver
On Fri, 2014-11-07 at 20:47 +0100, Hans de Goede wrote: > From: Oliver Schinagl > > The A31 uses the AXP221 pmic for various voltages. > > Signed-off-by: Oliver Schinagl > Signed-off-by: Hans de Goede > + cfg |= 1 << 7; > + cfg |= 1 << 3; > + cfg |= 1 << 4; > + cfg |= 1 << 5; > + cfg |= 1 << 6; > + cfg |= 1 << 6; > + cfg |= 1 << 7; > + cfg |= 1 << 7; Could we get some symbolic names for these please? Looks like a helper to read/modify/write a p2wi register would reduce the repetition a fair bit. Ian. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 01/11] sun6i: Add new p2wi controller driver
On Fri, 2014-11-07 at 20:46 +0100, Hans de Goede wrote:
> From: Oliver Schinagl
>
> The A31 uses a new push-pull two wire interface, which features higher
> transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8
> bytes each time, this driver will only see very little use and thus is
> limited to single byte transmission only.
>
> Signed-off-by: Oliver Schinagl
> Signed-off-by: Hans de Goede
Acked-by: Ian Campbell
One question:
> +int p2wi_change_to_p2wi_mode(u8 slave_addr, u8 ctrl_reg, u8 init_data)
> +{
> + struct sunxi_p2wi_reg *p2wi = (struct sunxi_p2wi_reg *)SUNXI_P2WI_BASE;
> + unsigned long tmo = timer_get_us() + 100;
> +
> + writel(P2WI_PM_DEV_ADDR(slave_addr) |
> +P2WI_PM_CTRL_ADDR(ctrl_reg) |
> +P2WI_PM_INIT_DATA(init_data) |
> +P2WI_PM_INIT_SEND,
> +&p2wi->pm);
> +
> + while ((readl(&p2wi->pm) & P2WI_PM_INIT_SEND)) {
> + if (timer_get_us() > tmo)
> + return -EFAULT;
You don't mean ETIME(DOUT) or something here, do you? EFAULT seems a bit
odd.
Ian.
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Re: [U-Boot] [PATCH v2 34/40] malloc: Output region when debugging
Hello Thierry,
On Tue, 26 Aug 2014 17:34:22 +0200, Thierry Reding
wrote:
> From: Thierry Reding
>
> When DEBUG is set, output memory region used for malloc().
>
> Signed-off-by: Thierry Reding
> ---
> common/dlmalloc.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/common/dlmalloc.c b/common/dlmalloc.c
> index f9873393c183..3d6391e60acf 100644
> --- a/common/dlmalloc.c
> +++ b/common/dlmalloc.c
> @@ -1533,6 +1533,9 @@ void mem_malloc_init(ulong start, ulong size)
> mem_malloc_end = start + size;
> mem_malloc_brk = start;
>
> + debug("using memory %#lx-%#lx for malloc()\n", mem_malloc_start,
> + mem_malloc_end);
> +
> memset((void *)mem_malloc_start, 0, size);
>
> malloc_bin_reloc();
> --
> 2.0.4
>
Applied to u-boot-arm/master, thanks!
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH v2 33/40] ARM: cache-cp15: Use more accurate types
Hello Thierry,
On Tue, 26 Aug 2014 17:34:21 +0200, Thierry Reding
wrote:
> From: Thierry Reding
>
> size_t is the canonical type to represent variables that contain a size.
> Use it instead of signed integer. Physical addresses can be larger than
> 32-bit, so use a more appropriate type for them as well. phys_addr_t is
> a type that is 32-bit on systems that use 32-bit addresses and 64-bit if
> the system is 64-bit or uses a form of physical address extension to use
> a larger address space on 32-bit systems. Using these types the same API
> can be implemented on a wider range of systems.
>
> Signed-off-by: Thierry Reding
> ---
> arch/arm/include/asm/system.h | 2 +-
> arch/arm/lib/cache-cp15.c | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
> index d51ba668f323..fb31a8faf2b1 100644
> --- a/arch/arm/include/asm/system.h
> +++ b/arch/arm/include/asm/system.h
> @@ -200,7 +200,7 @@ enum {
> * \param size size of memory region to change
> * \param option dcache option to select
> */
> -void mmu_set_region_dcache_behaviour(u32 start, int size,
> +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
>enum dcache_option option);
>
> /**
> diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
> index 5fdfdbfca541..e6c1c83e5758 100644
> --- a/arch/arm/lib/cache-cp15.c
> +++ b/arch/arm/lib/cache-cp15.c
> @@ -47,15 +47,15 @@ __weak void mmu_page_table_flush(unsigned long start,
> unsigned long stop)
> debug("%s: Warning: not implemented\n", __func__);
> }
>
> -void mmu_set_region_dcache_behaviour(u32 start, int size,
> +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
>enum dcache_option option)
> {
> u32 *page_table = (u32 *)gd->arch.tlb_addr;
> - u32 upto, end;
> + unsigned long upto, end;
>
> end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
> start = start >> MMU_SECTION_SHIFT;
> - debug("%s: start=%x, size=%x, option=%d\n", __func__, start, size,
> + debug("%s: start=%pa, size=%zu, option=%d\n", __func__, &start, size,
> option);
> for (upto = start; upto < end; upto++)
> set_section_dcache(upto, option);
> --
> 2.0.4
>
Applied to u-boot-arm/master, thanks!
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH v2 32/40] ARM: cache_v7: Various minor cleanups
Hello Thierry,
On Tue, 26 Aug 2014 17:34:20 +0200, Thierry Reding
wrote:
> From: Thierry Reding
>
> Remove two gratuituous blank lines, uses u32 (instead of int) as the
> type for values that will be written to a register, moves the beginning
> of the variable declaration section to a separate line (rather than the
> one with the opening brace) and keeps the function signature on a single
> line where possible.
>
> Signed-off-by: Thierry Reding
> ---
> arch/arm/cpu/armv7/cache_v7.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
> index a2c4032fed8c..0f9d8377ed5a 100644
> --- a/arch/arm/cpu/armv7/cache_v7.c
> +++ b/arch/arm/cpu/armv7/cache_v7.c
> @@ -21,7 +21,8 @@
> * to get size details from Current Cache Size ID Register(CCSIDR)
> */
> static void set_csselr(u32 level, u32 type)
> -{u32 csselr = level << 1 | type;
> +{
> + u32 csselr = level << 1 | type;
>
> /* Write to Cache Size Selection Register(CSSELR) */
> asm volatile ("mcr p15, 2, %0, c0, c0, 0" : : "r" (csselr));
> @@ -49,7 +50,8 @@ static void v7_inval_dcache_level_setway(u32 level, u32
> num_sets,
>u32 num_ways, u32 way_shift,
>u32 log2_line_len)
> {
> - int way, set, setway;
> + int way, set;
> + u32 setway;
>
> /*
>* For optimal assembly code:
> @@ -73,7 +75,8 @@ static void v7_clean_inval_dcache_level_setway(u32 level,
> u32 num_sets,
> u32 num_ways, u32 way_shift,
> u32 log2_line_len)
> {
> - int way, set, setway;
> + int way, set;
> + u32 setway;
>
> /*
>* For optimal assembly code:
> @@ -134,7 +137,6 @@ static void v7_maint_dcache_level_setway(u32 level, u32
> operation)
> static void v7_maint_dcache_all(u32 operation)
> {
> u32 level, cache_type, level_start_bit = 0;
> -
> u32 clidr = get_clidr();
>
> for (level = 0; level < 7; level++) {
> @@ -147,8 +149,7 @@ static void v7_maint_dcache_all(u32 operation)
> }
> }
>
> -static void v7_dcache_clean_inval_range(u32 start,
> - u32 stop, u32 line_len)
> +static void v7_dcache_clean_inval_range(u32 start, u32 stop, u32 line_len)
> {
> u32 mva;
>
> @@ -256,7 +257,6 @@ void flush_dcache_all(void)
> */
> void invalidate_dcache_range(unsigned long start, unsigned long stop)
> {
> -
> v7_dcache_maint_range(start, stop, ARMV7_DCACHE_INVAL_RANGE);
>
> v7_outer_cache_inval_range(start, stop);
> --
> 2.0.4
>
Applied to u-boot-arm/master, thanks!
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH] broadcom: add seven boards
Hello Steve, On Fri, 7 Nov 2014 18:13:18 -0800, Steve Rae wrote: > - 5 based on cygnus, 2 based on 28155 > - updates to support board families better > - add functions so CONFIG_ARMV7_NONSEC can be enabled on Cygnus boards > > Signed-off-by: Steve Rae > --- Could you just add board names or at least prefixes in the commit message or better yet, in the commit summary / subject? This will allow people who look for board info based on (start of) name to find this commit more easily. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/8] ARM: PSCI: Update psci.h for psci v0.2 -- CORRECTION
Hello Albert, On Sat, 8 Nov 2014 08:43:16 +0100, Albert ARIBAUD wrote: > Hello Arnab, > > On Thu, 28 Aug 2014 01:59:54 +0530, Arnab Basu > wrote: > > Signed-off-by: Arnab Basu > > Reviewed-by: Bhupesh Sharma > > Cc: Marc Zyngier > > --- > > arch/arm/include/asm/psci.h | 42 > > +- > > 1 files changed, 41 insertions(+), 1 deletions(-) > > > > diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h > > index 704b4b0..68579cd 100644 > > --- a/arch/arm/include/asm/psci.h > > +++ b/arch/arm/include/asm/psci.h > > @@ -2,6 +2,10 @@ > > * Copyright (C) 2013 - ARM Ltd > > * Author: Marc Zyngier > > * > > + * Copyright (C) 2014 - Freescale Semiconductor Ltd > > + * Author: Arnab Basu > > + *updated file for PSCI v0.2 > > + * > > * This program is free software; you can redistribute it and/or modify > > * it under the terms of the GNU General Public License version 2 as > > * published by the Free Software Foundation. > > @@ -18,7 +22,7 @@ > > #ifndef __ARM_PSCI_H__ > > #define __ARM_PSCI_H__ > > > > -/* PSCI interface */ > > +/* PSCI v0.1 interface */ > > #define ARM_PSCI_FN_BASE 0x95c1ba5e > > #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n)) > > > > @@ -27,9 +31,45 @@ > > #define ARM_PSCI_FN_CPU_ON ARM_PSCI_FN(2) > > #define ARM_PSCI_FN_MIGRATEARM_PSCI_FN(3) > > > > +/* PSCI v0.2 interface */ > > +#define PSCI_0_2_FN_BASE 0x8400 > > +#define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) > > +#define PSCI_0_2_64BIT 0x4000 > > +#define PSCI_0_2_FN64_BASE \ > > + (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) > > +#define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) > > + > > +#define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) > > +#define PSCI_0_2_FN_CPU_SUSPENDPSCI_0_2_FN(1) > > +#define PSCI_0_2_FN_CPU_OFFPSCI_0_2_FN(2) > > +#define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) > > +#define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) > > +#define PSCI_0_2_FN_MIGRATEPSCI_0_2_FN(5) > > +#define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) > > +#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPUPSCI_0_2_FN(7) > > +#define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) > > +#define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) > > + > > +#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) > > +#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) > > +#define PSCI_0_2_FN64_AFFINITY_INFOPSCI_0_2_FN64(4) > > +#define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) > > +#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) > > + > > + > > +/* > > + * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED, > > + * INVALID_PARAMS, and DENIED defined below are applicable > > + * to PSCI v0.1. > > + */ > > #define ARM_PSCI_RET_SUCCESS 0 > > #define ARM_PSCI_RET_NI(-1) > > #define ARM_PSCI_RET_INVAL (-2) > > #define ARM_PSCI_RET_DENIED(-3) > > +#define PSCI_RET_ALREADY_ON(-4) > > +#define PSCI_RET_ON_PENDING(-5) > > +#define PSCI_RET_INTERNAL_FAILURE (-6) > > +#define PSCI_RET_NOT_PRESENT (-7) > > +#define PSCI_RET_DISABLED (-8) > > > > #endif /* __ARM_PSCI_H__ */ > > -- > > 1.7.7.4 > > Applied, with apologies for the delay. This patch will appear in > 2015.01. Drat -- I'd forgotten Arnab had hinted on possibly modifying patches from the series, and I assumed this one would not. Un-applied for now. > Amicalement, > -- > Albert. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
