[U-Boot] [PATCH v2 2/4] i2c: UniPhier: add driver for UniPhier FIFO-builtin i2c controller
This commit adds on-chip I2C driver used on newer SoCs of Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Reviewed-by: Simon Glass s...@chromium.org --- Changes in v2: - Fix a typo. s/freqency/frequency/ - Rename the struct member for clarification. s/wait_us/timeout/ - Add comments on all the registers - Skip stop condition if the next message is read drivers/i2c/Kconfig | 8 + drivers/i2c/Makefile | 1 + drivers/i2c/i2c-uniphier-f.c | 358 +++ 3 files changed, 367 insertions(+) create mode 100644 drivers/i2c/i2c-uniphier-f.c diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 6a479ef..202ea5d 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -12,3 +12,11 @@ config SYS_I2C_UNIPHIER help Support for Panasonic UniPhier I2C controller driver. This I2C controller is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs. + +config SYS_I2C_UNIPHIER_F + bool UniPhier FIFO-builtin I2C driver + depends on ARCH_UNIPHIER DM_I2C + default y + help + Support for Panasonic UniPhier FIFO-builtin I2C controller driver. + This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs. diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index e2fcd24..0e4c9f4 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -32,4 +32,5 @@ obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o +obj-$(CONFIG_SYS_I2C_UNIPHIER_F) += i2c-uniphier-f.o obj-$(CONFIG_SYS_I2C_ZYNQ) += zynq_i2c.o diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c new file mode 100644 index 000..61e67c8 --- /dev/null +++ b/drivers/i2c/i2c-uniphier-f.c @@ -0,0 +1,358 @@ +/* + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada yamad...@jp.panasonic.com + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/* #define DEBUG */ + +#include common.h +#include linux/types.h +#include asm/io.h +#include asm/errno.h +#include dm/device.h +#include dm/root.h +#include i2c.h +#include fdtdec.h + +DECLARE_GLOBAL_DATA_PTR; + +#define I2C_CR 0x00/* control register */ +#defineI2C_CR_MST (1 3)/* master mode */ +#defineI2C_CR_STA (1 2)/* start condition */ +#defineI2C_CR_STO (1 1)/* stop condition */ +#defineI2C_CR_NACK (1 0)/* not ACK */ + +#define I2C_DTTX 0x04/* send FIFO */ +#define I2C_DTRX 0x04/* receive FIFO */ +#defineI2C_DTTX_CMD(1 8)/* send command (slave addr) */ +#defineI2C_DTTX_RD (1 0)/* read */ +#define I2C_SLAD 0x0c/* slave address */ +#define I2C_CYC0x10/* clock cycle control */ +#define I2C_LCTL 0x14/* clock low period control */ +#define I2C_SSUT 0x18/* restart/stop setup time control */ +#define I2C_DSUT 0x1c/* data setup time control */ +#define I2C_INT0x20/* interrupt status */ +#define I2C_IE 0x24/* interrupt enable */ +#define I2C_IC 0x28/* interrupt clear */ +#defineI2C_INT_TE (1 9)/* TX FIFO empty */ +#defineI2C_INT_RB (1 4)/* received specified bytes */ +#defineI2C_INT_NA (1 2)/* no answer */ +#defineI2C_INT_AL (1 1)/* arbitration lost */ +#define I2C_SR 0x2c/* status register */ +#defineI2C_SR_DB (1 12) /* device busy */ +#defineI2C_SR_BB (1 8)/* bus busy */ +#defineI2C_SR_RFF (1 3)/* Rx FIFO full */ +#defineI2C_SR_RNE (1 2)/* Rx FIFO not empty */ +#defineI2C_SR_TNF (1 1)/* Tx FIFO not full */ +#defineI2C_SR_TFE (1 0)/* Tx FIFO empty */ +#define I2C_RST0x34/* reset control */ +#defineI2C_RST_TBRST (1 2)/* clear Tx FIFO */ +#defineI2C_RST_RBRST (1 1)/* clear Rx FIFO */ +#defineI2C_RST_RST (1 0)/* forcible bus reset */ +#define I2C_BM 0x38/* bus monitor */ +#define I2C_NOISE 0x3c/* noise filter control */ +#define I2C_TBC0x40/* Tx byte count setting */ +#define I2C_RBC0x44/* Rx byte count setting */ +#define I2C_TBCM 0x48/* Tx byte count monitor */ +#define I2C_RBCM 0x4c/* Rx byte count monitor */ +#define I2C_BRST 0x50/* bus reset */ +#defineI2C_BRST_FOEN (1
[U-Boot] [PATCH v2 3/4] ARM: UniPhier: enable I2C for UniPhier SoCs
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Changes in v2: None configs/ph1_ld4_defconfig | 2 ++ configs/ph1_pro4_defconfig | 2 ++ configs/ph1_sld8_defconfig | 2 ++ 3 files changed, 6 insertions(+) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 2e9dd00..86b4b15 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_LOADB=y CONFIG_CMD_LOADS=y CONFIG_CMD_FLASH=y CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y CONFIG_CMD_USB=y CONFIG_CMD_ECHO=y CONFIG_CMD_ITEST=y @@ -34,6 +35,7 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_DM_SERIAL=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 5dca64b..242bcf9 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_LOADB=y CONFIG_CMD_LOADS=y CONFIG_CMD_FLASH=y CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y CONFIG_CMD_USB=y CONFIG_CMD_ECHO=y CONFIG_CMD_ITEST=y @@ -34,6 +35,7 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_DM_SERIAL=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 2a6e334..8e95f17 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_LOADB=y CONFIG_CMD_LOADS=y CONFIG_CMD_FLASH=y CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y CONFIG_CMD_USB=y CONFIG_CMD_ECHO=y CONFIG_CMD_ITEST=y @@ -34,6 +35,7 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_DM_SERIAL=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/4] i2c: UniPhier: add driver for UniPhier i2c controller
This commit adds on-chip I2C driver used on some old Panasonic
UniPhier SoCs.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Fix a typo. s/freqency/frequency/
- Add some comments to explain the formula calculating
wait time.
- add comments on every register
- skip stop condition if the next message is read
drivers/i2c/Kconfig| 14 +++
drivers/i2c/Makefile | 1 +
drivers/i2c/i2c-uniphier.c | 233 +
3 files changed, 248 insertions(+)
create mode 100644 drivers/i2c/i2c-uniphier.c
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index e69de29..6a479ef 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -0,0 +1,14 @@
+config DM_I2C
+ bool Enable Driver Model for I2C drivers
+ depends on DM
+ help
+ If you want to use driver model for I2C drivers, say Y.
+ To use legacy I2C drivers, say N.
+
+config SYS_I2C_UNIPHIER
+ bool UniPhier I2C driver
+ depends on ARCH_UNIPHIER DM_I2C
+ default y
+ help
+ Support for Panasonic UniPhier I2C controller driver. This I2C
+ controller is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 6f3c86c..e2fcd24 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -31,4 +31,5 @@ obj-$(CONFIG_SYS_I2C_SANDBOX) += sandbox_i2c.o
i2c-emul-uclass.o
obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o
obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
+obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o
obj-$(CONFIG_SYS_I2C_ZYNQ) += zynq_i2c.o
diff --git a/drivers/i2c/i2c-uniphier.c b/drivers/i2c/i2c-uniphier.c
new file mode 100644
index 000..5c39c3c
--- /dev/null
+++ b/drivers/i2c/i2c-uniphier.c
@@ -0,0 +1,233 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ * Author: Masahiro Yamada yamad...@jp.panasonic.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include linux/types.h
+#include asm/io.h
+#include asm/errno.h
+#include dm/device.h
+#include dm/root.h
+#include i2c.h
+#include fdtdec.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define I2C_DTRM 0x00/* data transmission */
+#defineI2C_DTRM_STA(1 10)
+#defineI2C_DTRM_STO(1 9)
+#defineI2C_DTRM_NACK (1 8)
+#defineI2C_DTRM_RD (1 0)
+#define I2C_DREC 0x04/* data reception */
+#defineI2C_DREC_STS(1 12)
+#defineI2C_DREC_LRB(1 11)
+#defineI2C_DREC_LAB(1 9)
+#define I2C_MYAD 0x08/* slave address */
+#define I2C_CLK0x0c/* clock frequency control */
+#define I2C_BRST 0x10/* bus reset */
+#defineI2C_BRST_FOEN (1 1)
+#defineI2C_BRST_BRST (1 0)
+#define I2C_HOLD 0x14/* hold time control */
+#define I2C_BSTS 0x18/* bus status monitor */
+#define I2C_NOISE 0x1c/* noise filter control */
+#define I2C_SETUP 0x20/* setup time control */
+
+#define IOBUS_FREQ 1
+
+struct uniphier_i2c_dev {
+ void __iomem *base; /* register base */
+ unsigned long input_clk;/* master clock (Hz) */
+ unsigned long wait_us; /* wait for every byte transfer (us) */
+};
+
+static int uniphier_i2c_probe(struct udevice *dev)
+{
+ fdt_addr_t addr;
+ fdt_size_t size;
+ struct uniphier_i2c_dev *priv = dev_get_priv(dev);
+
+ addr = fdtdec_get_addr_size(gd-fdt_blob, dev-of_offset, reg, size);
+
+ priv-base = map_sysmem(addr, size);
+
+ if (!priv-base)
+ return -ENOMEM;
+
+ priv-input_clk = IOBUS_FREQ;
+
+ /* deassert reset */
+ writel(0x3, priv-base + I2C_BRST);
+
+ return 0;
+}
+
+static int uniphier_i2c_remove(struct udevice *dev)
+{
+ struct uniphier_i2c_dev *priv = dev_get_priv(dev);
+
+ unmap_sysmem(priv-base);
+
+ return 0;
+}
+
+static int uniphier_i2c_child_pre_probe(struct udevice *dev)
+{
+ struct dm_i2c_chip *i2c_chip = dev_get_parentdata(dev);
+
+ if (dev-of_offset == -1)
+ return 0;
+ return i2c_chip_ofdata_to_platdata(gd-fdt_blob, dev-of_offset,
+ i2c_chip);
+}
+
+static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm)
+{
+ writel(dtrm, dev-base + I2C_DTRM);
+
+ /*
+* This controller only provides interruption to inform the completion
+* of each byte transfer. (No status register to poll it.)
+* Unfortunately, U-Boot does not have a good support of interrupt.
+* Wait for a while.
+*/
+ udelay(dev-wait_us);
+
+ return readl(dev-base + I2C_DREC);
+}
+
+static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool *stop)
+{
+ int
[U-Boot] [PATCH v2 4/4] ARM: UniPhier: enable CONFIG_I2C_EEPROM
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- To apply this commit, the following must be applied in advance: http://patchwork.ozlabs.org/patch/422543/ Changes in v2: None include/configs/uniphier.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 5a53c50..9ad47f6 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -43,6 +43,9 @@ #define CONFIG_SDRAM1_SIZE 0x1000 #endif +#define CONFIG_I2C_EEPROM +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 + /* * Support card address map */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/4] i2c: UniPhier: add I2C drivers based on driver model
Masahiro Yamada (4): i2c: UniPhier: add driver for UniPhier i2c controller i2c: UniPhier: add driver for UniPhier FIFO-builtin i2c controller ARM: UniPhier: enable UniPhier I2C driver ARM: UniPhier: enable CONFIG_I2C_EEPROM configs/ph1_ld4_defconfig| 2 + configs/ph1_pro4_defconfig | 2 + configs/ph1_sld8_defconfig | 2 + drivers/i2c/Kconfig | 22 +++ drivers/i2c/Makefile | 2 + drivers/i2c/i2c-uniphier-f.c | 358 +++ drivers/i2c/i2c-uniphier.c | 233 include/configs/uniphier.h | 3 + 8 files changed, 624 insertions(+) create mode 100644 drivers/i2c/i2c-uniphier-f.c create mode 100644 drivers/i2c/i2c-uniphier.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/17] sunxi: video: Move sunxi_drc_init
On Thu, Dec 25, 2014 at 3:06 AM, Hans de Goede hdego...@redhat.com wrote:
Move sunxi_drc_init to directly above sunxi_engines_init, to avoid unnecessary
Unfinished commit message?
ChenYu
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/video/sunxi_display.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c
index aed6ae6..ea7548b 100644
--- a/drivers/video/sunxi_display.c
+++ b/drivers/video/sunxi_display.c
@@ -472,18 +472,6 @@ static void sunxi_lcdc_tcon1_mode_set(const struct
ctfb_res_modes *mode,
sunxi_lcdc_pll_set(1, mode-pixclock_khz, clk_div, clk_double);
}
-#ifdef CONFIG_MACH_SUN6I
-static void sunxi_drc_init(void)
-{
- struct sunxi_ccm_reg * const ccm =
- (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
- /* On sun6i the drc must be clocked even when in pass-through mode */
- setbits_le32(ccm-ahb_reset1_cfg, 1 AHB_RESET_OFFSET_DRC0);
- clock_set_de_mod_clock(ccm-iep_drc0_clk_cfg, 3);
-}
-#endif
-
static void sunxi_hdmi_setup_info_frames(const struct ctfb_res_modes *mode)
{
struct sunxi_hdmi_reg * const hdmi =
@@ -592,13 +580,23 @@ static void sunxi_hdmi_enable(void)
setbits_le32(hdmi-video_ctrl, SUNXI_HDMI_VIDEO_CTRL_ENABLE);
}
+static void sunxi_drc_init(void)
+{
+#ifdef CONFIG_MACH_SUN6I
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* On sun6i the drc must be clocked even when in pass-through mode */
+ setbits_le32(ccm-ahb_reset1_cfg, 1 AHB_RESET_OFFSET_DRC0);
+ clock_set_de_mod_clock(ccm-iep_drc0_clk_cfg, 3);
+#endif
+}
+
static void sunxi_engines_init(void)
{
sunxi_composer_init();
sunxi_lcdc_init();
-#ifdef CONFIG_MACH_SUN6I
sunxi_drc_init();
-#endif
}
static void sunxi_mode_set(const struct ctfb_res_modes *mode,
--
2.1.0
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Re: [U-Boot] [PATCH 15/17] sunxi: Ippo_q8h defconfigs: Enable the LCD panel found on these tablets.
Hi, On Thu, Dec 25, 2014 at 3:06 AM, Hans de Goede hdego...@redhat.com wrote: Enable the new LCD support on Ippo_q8h tablets. Signed-off-by: Hans de Goede hdego...@redhat.com --- configs/Ippo_q8h_v1_2_defconfig | 5 - configs/Ippo_q8h_v5_defconfig | 5 - 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/configs/Ippo_q8h_v1_2_defconfig b/configs/Ippo_q8h_v1_2_defconfig index fefed32..c773f5f 100644 --- a/configs/Ippo_q8h_v1_2_defconfig +++ b/configs/Ippo_q8h_v1_2_defconfig @@ -1,7 +1,10 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS=CONS_INDEX=5 CONFIG_FDTFILE=sun8i-a23-ippo-q8h-v1.2.dtb -CONFIG_VIDEO=n +CONFIG_VIDEO_LCD_MODE=x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 +CONFIG_VIDEO_LCD_POWER=PH7 +CONFIG_VIDEO_LCD_BL_EN=PH6 +CONFIG_VIDEO_LCD_BL_PWM=PH0 CONFIG_USB_KEYBOARD=n +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y diff --git a/configs/Ippo_q8h_v5_defconfig b/configs/Ippo_q8h_v5_defconfig index b8d3afe..ce4f0b8 100644 --- a/configs/Ippo_q8h_v5_defconfig +++ b/configs/Ippo_q8h_v5_defconfig @@ -1,7 +1,10 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS=CONS_INDEX=5 CONFIG_FDTFILE=sun8i-a23-ippo-q8h-v5.dtb -CONFIG_VIDEO=n +CONFIG_VIDEO_LCD_MODE=x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 The display on my Q8H is a bit off to the left. With the simplefb bindings from your kernel sunxi-wip branch, I get a nice console. Though I've no way to type, at least I can tell my tablet is on. :) Could you briefly explain how to convert the values in the fex file to the mode line here? It could also help others with enabling display on their tablets. Thanks ChenYu +CONFIG_VIDEO_LCD_POWER=PH7 +CONFIG_VIDEO_LCD_BL_EN=PH6 +CONFIG_VIDEO_LCD_BL_PWM=PH0 CONFIG_USB_KEYBOARD=n +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: Fix buggy sun6i/sun8i DRAM size detection logic
Hi,
On 25-12-14 03:07, Siarhei Siamashka wrote:
On Wed, 24 Dec 2014 19:39:33 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
On Wed, 24 Dec 2014 18:58:17 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
After reboot, reset or even short power off, DRAM typically retains
the old stale data for some period of time (for this type of memory,
the bits of data are stored in slowly discharging capacitors).
The current sun6i/sun8i DRAM size detection logic, which is
inherited from the Allwinner code, relies on using a large magic
signature with the hope that it is unique enough and unlikely to
ever accidentally match this leftover garbage data in RAM. But
this approach is inherently unsafe, as can be demonstrated using
the following test program:
/* A testcase for reproducing the problem **/
#include stdlib.h
#include stdio.h
#include stdint.h
void main(int argc, char *argv[])
{
size_t size, i;
uint32_t *buf;
/* Allocate the buffer */
if (argc 2 || !(size = (size_t)atoi(argv[1]) * 1048576) ||
!(buf = malloc(size))) {
printf(Need buffer size in MiB as a cmdline argument\n);
exit(1);
}
/* Fill it with the Allwinner DRAM magic values */
for (i = 0; i size / 4; i++)
buf[i] = 0xaa55aa55 + ((uintptr_t)buf[i] / 4) % 64;
/* Try to reboot */
system(reboot);
/* And wait */
for (;;) {}
}
/***/
If this test program is run on the device (giving it a large
chunk of memory), then the DRAM size detection logic in u-boot
gets confused after reboot and fails to initialize DRAM properly.
A better approach is not to rely on luck and abstain from making
any assumptions about the properties of the leftover garbage
data in RAM. Instead just use a more reliable code for testing
whether two different addresses refer to the same memory location.
Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
Thanks for the patch, it looks good to me, I'll give it a test on my
own sun6i and sun8i boards when I find some time to do so.
---
Done only very limited testing on MSI Primo81 tablet (Allwinner A31s),
which is currently a rather impractical device for doing any sun6i code
development due to having no access to the serial console, USB or other
convenient ways to interact with the device.
Got a serial console on my tablet via a MicroSD breakout board. So I'm
retracting this statement :-)
Nice. Note that my personal u-boot git repo has lcd support in the sunxi-wip
branch, so that we can have at least u-boot output messages on tablets, but
I guess that FEL + console via microsd breakout works too.
If you can point me to a fex file for your board I can add a defconfig for
your tablet with hopefully working LCD support.
And indeed, the DRAM parameters get incorrectly detected after running
the test program (the system fails to boot later on):
Bummer, does this happen with both the old and the new memcmp functions ?
I'll send you a private mail with a statically linked util I've written
called mmio-dump, which can dump any hardware address from within android,
assuming you've an adb shell as root on your tablet, you can then copy
this to /system/bin and use it to dump the dram controller registers,
compare with what u-boot selects and see where we're getting things wrong.
Usage is e.g.:
mmio-dump 0x01c62000 64
U-Boot 2015.01-rc3-02809-g02f4a69-dirty (Dec 25 2014 - 03:05:03) Allwinner
Technology
CPU: Allwinner A31s (SUN6I)
I2C: ready
DRAM: 248 MiB
Using default environment
It might be a good idea to backup/restore the data in RAM when doing
this check in the code.
BTW, I only mentioned this because the 'get_ram_size' function restores
memory to the original state after it has done the job. But if being
non-destructive is not a requirement for the 'mctl_mem_matches'
function, then there is no need to care.
I don't think we care, at least not until we add support for coming out
of standby / self-refresh mode, and when we do we should have the
dram paras stored in SoC sram somewhere, and thus not use the detect
path at all.
Using the standard u-boot 'get_ram_size' function could be also an
option to replace the loops and simplify the sun6i/sun8i dram code
in the future. The only inconvenience is that 'get_ram_size' returns
'size' instead of 'log2(size)'. This could be probably resolved by
introducing a new 'get_ram_size_log2' common function.
Just noticed that there is actually '__ilog2' function in u-boot. This
makes it easier to switch the sun6i/sun8i dram code to using the
standard 'get_ram_size' function.
With the use of __ilog2(get_ram_size(...)), the DRAM parameters
detection may look like the piece of code below. But not sure if this
is actually any better than the use of 'mctl_mem_matches' at least on
sun6i hardware. Still on sun8i it fits quite fine.
On sun8i this seems to make sense, on sun6i I'm not
Re: [U-Boot] [PATCH 08/17] sunxi: video: Move sunxi_drc_init
Hi,
On 25-12-14 10:08, Chen-Yu Tsai wrote:
On Thu, Dec 25, 2014 at 3:06 AM, Hans de Goede hdego...@redhat.com wrote:
Move sunxi_drc_init to directly above sunxi_engines_init, to avoid unnecessary
Unfinished commit message?
Sortof the next line read:
#ifdef-ery in later patches.
But git commit acted on the # and treated the line as a comment, and I did not
notice this until you pointed it out.
I'll amend the commit message in my personal tree.
Regards,
Hans
ChenYu
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/video/sunxi_display.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c
index aed6ae6..ea7548b 100644
--- a/drivers/video/sunxi_display.c
+++ b/drivers/video/sunxi_display.c
@@ -472,18 +472,6 @@ static void sunxi_lcdc_tcon1_mode_set(const struct
ctfb_res_modes *mode,
sunxi_lcdc_pll_set(1, mode-pixclock_khz, clk_div, clk_double);
}
-#ifdef CONFIG_MACH_SUN6I
-static void sunxi_drc_init(void)
-{
- struct sunxi_ccm_reg * const ccm =
- (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
- /* On sun6i the drc must be clocked even when in pass-through mode */
- setbits_le32(ccm-ahb_reset1_cfg, 1 AHB_RESET_OFFSET_DRC0);
- clock_set_de_mod_clock(ccm-iep_drc0_clk_cfg, 3);
-}
-#endif
-
static void sunxi_hdmi_setup_info_frames(const struct ctfb_res_modes *mode)
{
struct sunxi_hdmi_reg * const hdmi =
@@ -592,13 +580,23 @@ static void sunxi_hdmi_enable(void)
setbits_le32(hdmi-video_ctrl, SUNXI_HDMI_VIDEO_CTRL_ENABLE);
}
+static void sunxi_drc_init(void)
+{
+#ifdef CONFIG_MACH_SUN6I
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* On sun6i the drc must be clocked even when in pass-through mode */
+ setbits_le32(ccm-ahb_reset1_cfg, 1 AHB_RESET_OFFSET_DRC0);
+ clock_set_de_mod_clock(ccm-iep_drc0_clk_cfg, 3);
+#endif
+}
+
static void sunxi_engines_init(void)
{
sunxi_composer_init();
sunxi_lcdc_init();
-#ifdef CONFIG_MACH_SUN6I
sunxi_drc_init();
-#endif
}
static void sunxi_mode_set(const struct ctfb_res_modes *mode,
--
2.1.0
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Re: [U-Boot] [PATCH 15/17] sunxi: Ippo_q8h defconfigs: Enable the LCD panel found on these tablets.
Hi, On 25-12-14 11:00, Chen-Yu Tsai wrote: Hi, On Thu, Dec 25, 2014 at 3:06 AM, Hans de Goede hdego...@redhat.com wrote: Enable the new LCD support on Ippo_q8h tablets. Signed-off-by: Hans de Goede hdego...@redhat.com --- configs/Ippo_q8h_v1_2_defconfig | 5 - configs/Ippo_q8h_v5_defconfig | 5 - 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/configs/Ippo_q8h_v1_2_defconfig b/configs/Ippo_q8h_v1_2_defconfig index fefed32..c773f5f 100644 --- a/configs/Ippo_q8h_v1_2_defconfig +++ b/configs/Ippo_q8h_v1_2_defconfig @@ -1,7 +1,10 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS=CONS_INDEX=5 CONFIG_FDTFILE=sun8i-a23-ippo-q8h-v1.2.dtb -CONFIG_VIDEO=n +CONFIG_VIDEO_LCD_MODE=x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 +CONFIG_VIDEO_LCD_POWER=PH7 +CONFIG_VIDEO_LCD_BL_EN=PH6 +CONFIG_VIDEO_LCD_BL_PWM=PH0 CONFIG_USB_KEYBOARD=n +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y diff --git a/configs/Ippo_q8h_v5_defconfig b/configs/Ippo_q8h_v5_defconfig index b8d3afe..ce4f0b8 100644 --- a/configs/Ippo_q8h_v5_defconfig +++ b/configs/Ippo_q8h_v5_defconfig @@ -1,7 +1,10 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS=CONS_INDEX=5 CONFIG_FDTFILE=sun8i-a23-ippo-q8h-v5.dtb -CONFIG_VIDEO=n +CONFIG_VIDEO_LCD_MODE=x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 The display on my Q8H is a bit off to the left. With the simplefb bindings from your kernel sunxi-wip branch, I get a nice console. Though I've no way to type, at least I can tell my tablet is on. :) Could you briefly explain how to convert the values in the fex file to the mode line here? It could also help others with enabling display on their tablets. Ah yes, I used the slightly different timings from the olimex 7 lcd panel for olinuxino boards, and since those worked fine on my a23 tablet I never adjusted things. Here is a translation table: CONFIG_VIDEO_LCD_MODE fex value(s) x lcd_x y lcd_y depth:18lcd_frm = 1 pclk_khzlcd_dclk_freq * 1000 hs lcd_hv_hspw (with a minimum of 1) vs lcd_hv_vspw (with a minimum of 1) le lcd_hbp - hs ri lcd_ht - lcd_x - lcd_hbp up lcd_vbp - vs On sun4i/sun5i/sun7i: lo (lcd_vt / 2) - lcd_y - lcd_vbp On sun8i: lo lcd_vt - lcd_y - lcd_vbp sync0 mode0 I notice that the Ippo_q8h_v5 fex uses 0 for lcd_hv_hspw and lcd_hv_vspw, which is not a valid value as the register value contains hspw - 1, so the minimum is 1, and looking at a register dump under android with my A23 tablet the value indeed should be 1. So if I'm not mistaken for the Ippo_q8h_v5 the timings should be: CONFIG_VIDEO_LCD_MODE=x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:168,up:31,lo:13,hs:1,vs:1,sync:0,vmode:0 Regards, Hans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: Fix CONFIG_UART0_PORT_F build and add it to menuconfig
Hi, On 25-12-14 01:34, Siarhei Siamashka wrote: The CONFIG_UART0_PORT_F option has been supported since http://git.denx.de/?p=u-boot.git;a=commit;h=ff2b47f6a9cc1025 This option is primarily useful only for low level u-boot debugging on tablets, where normal UART0 is difficult to access and requires device disassembly and/or soldering. This patch now allows it to be selected from menuconfig. A dependency on SPL_FEL is added because u-boot does not support booting from NAND yet and also booting from SD card is impossible when a MicroSD breakout board is plugged into the SD slot. Additionally a compilation problem is fixed: common/spl/built-in.o: In function `spl_mmc_load_image': /tmp/u-boot-sunxi/common/spl/spl_mmc.c:94: undefined reference to `mmc_initialize' /tmp/u-boot-sunxi/common/spl/spl_mmc.c:96: undefined reference to `find_mmc_device' /tmp/u-boot-sunxi/common/spl/spl_mmc.c:104: undefined reference to `mmc_init' scripts/Makefile.spl:206: recipe for target 'spl/u-boot-spl' failed Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com Thanks, I've queued this up in u-boot-sunxi/next for merging upstream. Regards, Hans --- board/sunxi/Kconfig| 12 include/configs/sunxi-common.h | 3 +++ 2 files changed, 15 insertions(+) diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 5a88ba0..7140b80 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -178,6 +178,18 @@ config SPL_FEL depends on SPL default n +config UART0_PORT_F + bool UART0 on MicroSD breakout board + depends on SPL_FEL + default n + ---help--- + Repurpose the SD card slot for getting access to the UART0 serial + console. Primarily useful only for low level u-boot debugging on + tablets, where normal UART0 is difficult to access and requires + device disassembly and/or soldering. As the SD card can't be used + at the same time, the system can be only booted in the FEL mode. + Only enable this if you really know what you are doing. + config FDTFILE string Default fdtfile env setting for this board diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 3f890b2..f7e87a2 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -160,7 +160,10 @@ #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ #define CONFIG_SPL_LIBDISK_SUPPORT + +#if !defined(CONFIG_UART0_PORT_F) #define CONFIG_SPL_MMC_SUPPORT +#endif #define CONFIG_SPL_LDSCRIPT arch/arm/cpu/armv7/sunxi/u-boot-spl.lds ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: Fix buggy sun6i/sun8i DRAM size detection logic
On Thu, 25 Dec 2014 11:14:23 +0100
Hans de Goede hdego...@redhat.com wrote:
Hi,
On 25-12-14 03:07, Siarhei Siamashka wrote:
On Wed, 24 Dec 2014 19:39:33 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
On Wed, 24 Dec 2014 18:58:17 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
After reboot, reset or even short power off, DRAM typically retains
the old stale data for some period of time (for this type of memory,
the bits of data are stored in slowly discharging capacitors).
The current sun6i/sun8i DRAM size detection logic, which is
inherited from the Allwinner code, relies on using a large magic
signature with the hope that it is unique enough and unlikely to
ever accidentally match this leftover garbage data in RAM. But
this approach is inherently unsafe, as can be demonstrated using
the following test program:
/* A testcase for reproducing the problem **/
#include stdlib.h
#include stdio.h
#include stdint.h
void main(int argc, char *argv[])
{
size_t size, i;
uint32_t *buf;
/* Allocate the buffer */
if (argc 2 || !(size = (size_t)atoi(argv[1]) * 1048576) ||
!(buf = malloc(size))) {
printf(Need buffer size in MiB as a cmdline argument\n);
exit(1);
}
/* Fill it with the Allwinner DRAM magic values */
for (i = 0; i size / 4; i++)
buf[i] = 0xaa55aa55 + ((uintptr_t)buf[i] / 4) % 64;
/* Try to reboot */
system(reboot);
/* And wait */
for (;;) {}
}
/***/
If this test program is run on the device (giving it a large
chunk of memory), then the DRAM size detection logic in u-boot
gets confused after reboot and fails to initialize DRAM properly.
A better approach is not to rely on luck and abstain from making
any assumptions about the properties of the leftover garbage
data in RAM. Instead just use a more reliable code for testing
whether two different addresses refer to the same memory location.
Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
Thanks for the patch, it looks good to me, I'll give it a test on my
own sun6i and sun8i boards when I find some time to do so.
Thanks.
---
Done only very limited testing on MSI Primo81 tablet (Allwinner A31s),
which is currently a rather impractical device for doing any sun6i code
development due to having no access to the serial console, USB or other
convenient ways to interact with the device.
Got a serial console on my tablet via a MicroSD breakout board. So I'm
retracting this statement :-)
Nice. Note that my personal u-boot git repo has lcd support in the sunxi-wip
branch, so that we can have at least u-boot output messages on tablets, but
I guess that FEL + console via microsd breakout works too.
HDMI works too. Too bad that neither LCD nor HDMI can handle input. But
at least the UART console can. I was hoping to just get WLAN working as
the next step in order to use it instead of the UART console for
communicating with the device.
The MSI Primo81 is quite a nice tablet:
* has a HDMI connector (can run a real desktop Linux system on a HDMI
monitor, that is if we get USB OTG working)
* has access to the hardware FEL button (this makes the device truly
unbrickable)
* has a sturdy slim metal frame, but a downside is that it may be
more difficult/dangerous to disassemble
* has an IPS LCD display with good colors and viewing angles but
unfortunately relatively low resolution (1024x768)
* The current price seems to be around or under 100 EUR on amazon.de
and other places.
If you can point me to a fex file for your board I can add a defconfig for
your tablet with hopefully working LCD support.
If you really insist on doing this yourself, then you can find the fex
file in the sunxi-boards git repository:
https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31s/msi_primo81.fex
In any case, this tablet is not going to be really usable until the
mainline kernel gets USB OTG support. Which gives us some weeks/months
to take care of the necessary dts/defconfig files.
And indeed, the DRAM parameters get incorrectly detected after running
the test program (the system fails to boot later on):
Bummer, does this happen with both the old and the new memcmp functions ?
Everything works fine after the sunxi: Fix buggy sun6i/sun8i DRAM size
detection logic patch is applied. Sorry for not stating this clearly
enough.
Without the patch and after running the test program, I just see that
the system fails to boot. Typically with the HDMI not coming up at all.
The UART console allows to see why it fails and makes debugging
possible.
I'll send you a private mail with a statically linked util I've written
called mmio-dump, which can dump any hardware address from within android,
assuming you've an adb shell as root on
[U-Boot] [PATCH 1/2] mmc: Avoid redundant switching to 1-bit bus width for MMC cards
If all the commands switching an MMC card to 4- or 8-bit bus width fail,
and the bus width for the controller and the driver is still set
to default 1 bit, there is no need to send one more command to switch
the card to 1-bit bus width. Also, if the card or host controller do not
support wider bus widths, there is no need to send a switch command at all.
However, if one of switch commands succeeds, but the subsequent ext_csd
fields comparison fails, the card should be switched to some other bus width
(next in the list for the loop), or to default 1-bit bus width as a last
resort. That's why it would be incorrect to just remove the 1-bit bus width
case from the list, it should still be processed in some cases.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
Tested-by: Alexey Brodkin abrod...@synopsys.com
---
drivers/mmc/mmc.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 1eb9c27..c0cf318 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1139,6 +1139,18 @@ static int mmc_startup(struct mmc *mmc)
unsigned int caps = ext_to_hostcaps[extw];
/*
+* If the bus width is still not changed,
+* don't try to set the default again.
+* Otherwise, recover from switch attempts
+* by switching to 1-bit bus width.
+*/
+ if ((extw == EXT_CSD_BUS_WIDTH_1)
+ (mmc-bus_width == 1)) {
+ err = 0;
+ break;
+ }
+
+ /*
* Check to make sure the card and controller support
* these capabilities
*/
--
2.1.0
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[U-Boot] [PATCH 0/2] Fix some corner cases in bus width setting
Among other fixes, the commit 786e8f818c25265d12d5d06e257fe2b1ba516134 mmc: Fix handling of bus widths and DDR card capabilities changed bus width setting code so that if the attempt to switch to last 1-bit width item fails, the whole initialization fails. This seems to be more correct than earlier ignoring of such error, but this makes sense if the bus width was actually switched. But if all the switching commands fail (e.g. because the card does not support bus width switching at all), then we could just skip last switching to default bus width and treat it as a success. Also, MMC cards of earlier versions than MMC standard version 4.0 do not support wider bus widths, so it doesn't make sense to even try to switch the bus width for such cards. Andrew Gabbasov (2): mmc: Avoid redundant switching to 1-bit bus width for MMC cards mmc: Skip changing bus width for MMC cards earlier than version 4.0 drivers/mmc/mmc.c | 19 +-- 1 file changed, 17 insertions(+), 2 deletions(-) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] mmc: Skip changing bus width for MMC cards earlier than version 4.0
Wider bus widths (larger than default 1 bit) appeared in MMC standard
version 4.0. So, for MMC cards of any earlier version trying to change
the bus width (including ext_csd comparison) does not make any sense.
It may work incorrectly and at least cause unnecessary timeouts.
So, just skip the entire bus width related activity for earlier versions.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
Tested-by: Alexey Brodkin abrod...@synopsys.com
---
drivers/mmc/mmc.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index c0cf318..14d6a13 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -486,7 +486,7 @@ static int mmc_change_freq(struct mmc *mmc)
char cardtype;
int err;
- mmc-card_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
+ mmc-card_caps = 0;
if (mmc_host_is_spi(mmc))
return 0;
@@ -495,6 +495,8 @@ static int mmc_change_freq(struct mmc *mmc)
if (mmc-version MMC_VERSION_4)
return 0;
+ mmc-card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
+
err = mmc_send_ext_csd(mmc, ext_csd);
if (err)
@@ -1107,7 +1109,8 @@ static int mmc_startup(struct mmc *mmc)
mmc-tran_speed = 5000;
else
mmc-tran_speed = 2500;
- } else {
+ } else if (mmc-version = MMC_VERSION_4) {
+ /* Only version 4 of MMC supports wider bus widths */
int idx;
/* An array of possible bus widths in order of preference */
--
2.1.0
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Re: [U-Boot] [PATCH] sunxi: Fix buggy sun6i/sun8i DRAM size detection logic
Hi,
On 25-12-14 17:13, Siarhei Siamashka wrote:
On Thu, 25 Dec 2014 11:14:23 +0100
Hans de Goede hdego...@redhat.com wrote:
Hi,
On 25-12-14 03:07, Siarhei Siamashka wrote:
On Wed, 24 Dec 2014 19:39:33 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
On Wed, 24 Dec 2014 18:58:17 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
After reboot, reset or even short power off, DRAM typically retains
the old stale data for some period of time (for this type of memory,
the bits of data are stored in slowly discharging capacitors).
The current sun6i/sun8i DRAM size detection logic, which is
inherited from the Allwinner code, relies on using a large magic
signature with the hope that it is unique enough and unlikely to
ever accidentally match this leftover garbage data in RAM. But
this approach is inherently unsafe, as can be demonstrated using
the following test program:
/* A testcase for reproducing the problem **/
#include stdlib.h
#include stdio.h
#include stdint.h
void main(int argc, char *argv[])
{
size_t size, i;
uint32_t *buf;
/* Allocate the buffer */
if (argc 2 || !(size = (size_t)atoi(argv[1]) * 1048576) ||
!(buf = malloc(size))) {
printf(Need buffer size in MiB as a cmdline argument\n);
exit(1);
}
/* Fill it with the Allwinner DRAM magic values */
for (i = 0; i size / 4; i++)
buf[i] = 0xaa55aa55 + ((uintptr_t)buf[i] / 4) % 64;
/* Try to reboot */
system(reboot);
/* And wait */
for (;;) {}
}
/***/
If this test program is run on the device (giving it a large
chunk of memory), then the DRAM size detection logic in u-boot
gets confused after reboot and fails to initialize DRAM properly.
A better approach is not to rely on luck and abstain from making
any assumptions about the properties of the leftover garbage
data in RAM. Instead just use a more reliable code for testing
whether two different addresses refer to the same memory location.
Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
Thanks for the patch, it looks good to me, I'll give it a test on my
own sun6i and sun8i boards when I find some time to do so.
Thanks.
---
Done only very limited testing on MSI Primo81 tablet (Allwinner A31s),
which is currently a rather impractical device for doing any sun6i code
development due to having no access to the serial console, USB or other
convenient ways to interact with the device.
Got a serial console on my tablet via a MicroSD breakout board. So I'm
retracting this statement :-)
Nice. Note that my personal u-boot git repo has lcd support in the sunxi-wip
branch, so that we can have at least u-boot output messages on tablets, but
I guess that FEL + console via microsd breakout works too.
HDMI works too. Too bad that neither LCD nor HDMI can handle input. But
at least the UART console can. I was hoping to just get WLAN working as
the next step in order to use it instead of the UART console for
communicating with the device.
The MSI Primo81 is quite a nice tablet:
* has a HDMI connector (can run a real desktop Linux system on a HDMI
monitor, that is if we get USB OTG working)
* has access to the hardware FEL button (this makes the device truly
unbrickable)
* has a sturdy slim metal frame, but a downside is that it may be
more difficult/dangerous to disassemble
* has an IPS LCD display with good colors and viewing angles but
unfortunately relatively low resolution (1024x768)
* The current price seems to be around or under 100 EUR on amazon.de
and other places.
If you can point me to a fex file for your board I can add a defconfig for
your tablet with hopefully working LCD support.
If you really insist on doing this yourself, then you can find the fex
file in the sunxi-boards git repository:
https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31s/msi_primo81.fex
In any case, this tablet is not going to be really usable until the
mainline kernel gets USB OTG support. Which gives us some weeks/months
to take care of the necessary dts/defconfig files.
Ack, I offered to create the defconfig since the alternative was to
write a short howto on the VIDEO_LCD_MODE Kconfig, but since I've done
that now anyways I'll happily wait for you to provide a defconfig.
And indeed, the DRAM parameters get incorrectly detected after running
the test program (the system fails to boot later on):
Bummer, does this happen with both the old and the new memcmp functions ?
Everything works fine after the sunxi: Fix buggy sun6i/sun8i DRAM size
detection logic patch is applied. Sorry for not stating this clearly
enough.
Ah, ok, that is good to know.
Without the patch and after running the test program, I just see that
the system fails to boot. Typically with the HDMI not coming up at all.
The UART console allows to see why it fails and makes debugging
[U-Boot] Pull request: u-boot-sh/rmolbile
Dear Tom Rini.
Please pull u-boot-sh rmobile branch.
The following changes since commit d8bec60c1b0de7770f9b56ad092ab9be801d99af:
ARM: UniPhier: enable CONFIG_CMD_DM (2014-12-18 23:34:30 +0900)
are available in the git repository at:
git://git.denx.de/u-boot-sh rmobile
for you to fetch changes up to 2a1d2a0351ac14390ccaad6433d27a1c58dab46f:
arm: rmobile: kconfig: Remove '+S:' prefix from defconfig files
(2014-12-26 10:21:17 +0900)
Nobuhiro Iwamatsu (1):
arm: rmobile: kconfig: Remove '+S:' prefix from defconfig files
configs/armadillo-800eva_defconfig | 2 +-
configs/kzm9g_defconfig| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6
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[U-Boot] [PATCH v3 2/4] i2c: UniPhier: add driver for UniPhier FIFO-builtin i2c controller
This commit adds on-chip I2C driver used on newer SoCs of Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Reviewed-by: Simon Glass s...@chromium.org --- Changes in v3: - Fix a bug in that device busy is checked even if the stop condition is not issued. Changes in v2: - Fix a typo. s/freqency/frequency/ - Rename the struct member for clarification. s/wait_us/timeout/ - Add comments on all the registers - Skip stop condition if the next message is read drivers/i2c/Kconfig | 8 + drivers/i2c/Makefile | 1 + drivers/i2c/i2c-uniphier-f.c | 374 +++ 3 files changed, 383 insertions(+) create mode 100644 drivers/i2c/i2c-uniphier-f.c diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 6a479ef..202ea5d 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -12,3 +12,11 @@ config SYS_I2C_UNIPHIER help Support for Panasonic UniPhier I2C controller driver. This I2C controller is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs. + +config SYS_I2C_UNIPHIER_F + bool UniPhier FIFO-builtin I2C driver + depends on ARCH_UNIPHIER DM_I2C + default y + help + Support for Panasonic UniPhier FIFO-builtin I2C controller driver. + This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs. diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index e2fcd24..0e4c9f4 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -32,4 +32,5 @@ obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o +obj-$(CONFIG_SYS_I2C_UNIPHIER_F) += i2c-uniphier-f.o obj-$(CONFIG_SYS_I2C_ZYNQ) += zynq_i2c.o diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c new file mode 100644 index 000..8b163fd --- /dev/null +++ b/drivers/i2c/i2c-uniphier-f.c @@ -0,0 +1,374 @@ +/* + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada yamad...@jp.panasonic.com + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include common.h +#include linux/types.h +#include asm/io.h +#include asm/errno.h +#include dm/device.h +#include dm/root.h +#include i2c.h +#include fdtdec.h + +DECLARE_GLOBAL_DATA_PTR; + +#define I2C_CR 0x00/* control register */ +#defineI2C_CR_MST (1 3)/* master mode */ +#defineI2C_CR_STA (1 2)/* start condition */ +#defineI2C_CR_STO (1 1)/* stop condition */ +#defineI2C_CR_NACK (1 0)/* not ACK */ + +#define I2C_DTTX 0x04/* send FIFO */ +#define I2C_DTRX 0x04/* receive FIFO */ +#defineI2C_DTTX_CMD(1 8)/* send command (slave addr) */ +#defineI2C_DTTX_RD (1 0)/* read */ +#define I2C_SLAD 0x0c/* slave address */ +#define I2C_CYC0x10/* clock cycle control */ +#define I2C_LCTL 0x14/* clock low period control */ +#define I2C_SSUT 0x18/* restart/stop setup time control */ +#define I2C_DSUT 0x1c/* data setup time control */ +#define I2C_INT0x20/* interrupt status */ +#define I2C_IE 0x24/* interrupt enable */ +#define I2C_IC 0x28/* interrupt clear */ +#defineI2C_INT_TE (1 9)/* TX FIFO empty */ +#defineI2C_INT_RB (1 4)/* received specified bytes */ +#defineI2C_INT_NA (1 2)/* no answer */ +#defineI2C_INT_AL (1 1)/* arbitration lost */ +#define I2C_SR 0x2c/* status register */ +#defineI2C_SR_DB (1 12) /* device busy */ +#defineI2C_SR_BB (1 8)/* bus busy */ +#defineI2C_SR_RFF (1 3)/* Rx FIFO full */ +#defineI2C_SR_RNE (1 2)/* Rx FIFO not empty */ +#defineI2C_SR_TNF (1 1)/* Tx FIFO not full */ +#defineI2C_SR_TFE (1 0)/* Tx FIFO empty */ +#define I2C_RST0x34/* reset control */ +#defineI2C_RST_TBRST (1 2)/* clear Tx FIFO */ +#defineI2C_RST_RBRST (1 1)/* clear Rx FIFO */ +#defineI2C_RST_RST (1 0)/* forcible bus reset */ +#define I2C_BM 0x38/* bus monitor */ +#define I2C_NOISE 0x3c/* noise filter control */ +#define I2C_TBC0x40/* Tx byte count setting */ +#define I2C_RBC0x44/* Rx byte count setting */ +#define I2C_TBCM 0x48/* Tx byte count monitor */ +#define I2C_RBCM 0x4c/* Rx byte count monitor */ +#define
[U-Boot] [PATCH v3 3/4] ARM: UniPhier: enable I2C for UniPhier SoCs
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Changes in v3: None Changes in v2: None configs/ph1_ld4_defconfig | 2 ++ configs/ph1_pro4_defconfig | 2 ++ configs/ph1_sld8_defconfig | 2 ++ 3 files changed, 6 insertions(+) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 2e9dd00..86b4b15 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_LOADB=y CONFIG_CMD_LOADS=y CONFIG_CMD_FLASH=y CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y CONFIG_CMD_USB=y CONFIG_CMD_ECHO=y CONFIG_CMD_ITEST=y @@ -34,6 +35,7 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_DM_SERIAL=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 5dca64b..242bcf9 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_LOADB=y CONFIG_CMD_LOADS=y CONFIG_CMD_FLASH=y CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y CONFIG_CMD_USB=y CONFIG_CMD_ECHO=y CONFIG_CMD_ITEST=y @@ -34,6 +35,7 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_DM_SERIAL=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 2a6e334..8e95f17 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_LOADB=y CONFIG_CMD_LOADS=y CONFIG_CMD_FLASH=y CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y CONFIG_CMD_USB=y CONFIG_CMD_ECHO=y CONFIG_CMD_ITEST=y @@ -34,6 +35,7 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_DM_SERIAL=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/4] i2c: UniPhier: add driver for UniPhier i2c controller
This commit adds on-chip I2C driver used on some old Panasonic
UniPhier SoCs.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Fix a typo. s/freqency/frequency/
- Add some comments to explain the formula calculating
wait time.
- add comments on every register
- skip stop condition if the next message is read
drivers/i2c/Kconfig| 14 +++
drivers/i2c/Makefile | 1 +
drivers/i2c/i2c-uniphier.c | 233 +
3 files changed, 248 insertions(+)
create mode 100644 drivers/i2c/i2c-uniphier.c
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index e69de29..6a479ef 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -0,0 +1,14 @@
+config DM_I2C
+ bool Enable Driver Model for I2C drivers
+ depends on DM
+ help
+ If you want to use driver model for I2C drivers, say Y.
+ To use legacy I2C drivers, say N.
+
+config SYS_I2C_UNIPHIER
+ bool UniPhier I2C driver
+ depends on ARCH_UNIPHIER DM_I2C
+ default y
+ help
+ Support for Panasonic UniPhier I2C controller driver. This I2C
+ controller is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 6f3c86c..e2fcd24 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -31,4 +31,5 @@ obj-$(CONFIG_SYS_I2C_SANDBOX) += sandbox_i2c.o
i2c-emul-uclass.o
obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o
obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
+obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o
obj-$(CONFIG_SYS_I2C_ZYNQ) += zynq_i2c.o
diff --git a/drivers/i2c/i2c-uniphier.c b/drivers/i2c/i2c-uniphier.c
new file mode 100644
index 000..5c39c3c
--- /dev/null
+++ b/drivers/i2c/i2c-uniphier.c
@@ -0,0 +1,233 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ * Author: Masahiro Yamada yamad...@jp.panasonic.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include linux/types.h
+#include asm/io.h
+#include asm/errno.h
+#include dm/device.h
+#include dm/root.h
+#include i2c.h
+#include fdtdec.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define I2C_DTRM 0x00/* data transmission */
+#defineI2C_DTRM_STA(1 10)
+#defineI2C_DTRM_STO(1 9)
+#defineI2C_DTRM_NACK (1 8)
+#defineI2C_DTRM_RD (1 0)
+#define I2C_DREC 0x04/* data reception */
+#defineI2C_DREC_STS(1 12)
+#defineI2C_DREC_LRB(1 11)
+#defineI2C_DREC_LAB(1 9)
+#define I2C_MYAD 0x08/* slave address */
+#define I2C_CLK0x0c/* clock frequency control */
+#define I2C_BRST 0x10/* bus reset */
+#defineI2C_BRST_FOEN (1 1)
+#defineI2C_BRST_BRST (1 0)
+#define I2C_HOLD 0x14/* hold time control */
+#define I2C_BSTS 0x18/* bus status monitor */
+#define I2C_NOISE 0x1c/* noise filter control */
+#define I2C_SETUP 0x20/* setup time control */
+
+#define IOBUS_FREQ 1
+
+struct uniphier_i2c_dev {
+ void __iomem *base; /* register base */
+ unsigned long input_clk;/* master clock (Hz) */
+ unsigned long wait_us; /* wait for every byte transfer (us) */
+};
+
+static int uniphier_i2c_probe(struct udevice *dev)
+{
+ fdt_addr_t addr;
+ fdt_size_t size;
+ struct uniphier_i2c_dev *priv = dev_get_priv(dev);
+
+ addr = fdtdec_get_addr_size(gd-fdt_blob, dev-of_offset, reg, size);
+
+ priv-base = map_sysmem(addr, size);
+
+ if (!priv-base)
+ return -ENOMEM;
+
+ priv-input_clk = IOBUS_FREQ;
+
+ /* deassert reset */
+ writel(0x3, priv-base + I2C_BRST);
+
+ return 0;
+}
+
+static int uniphier_i2c_remove(struct udevice *dev)
+{
+ struct uniphier_i2c_dev *priv = dev_get_priv(dev);
+
+ unmap_sysmem(priv-base);
+
+ return 0;
+}
+
+static int uniphier_i2c_child_pre_probe(struct udevice *dev)
+{
+ struct dm_i2c_chip *i2c_chip = dev_get_parentdata(dev);
+
+ if (dev-of_offset == -1)
+ return 0;
+ return i2c_chip_ofdata_to_platdata(gd-fdt_blob, dev-of_offset,
+ i2c_chip);
+}
+
+static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm)
+{
+ writel(dtrm, dev-base + I2C_DTRM);
+
+ /*
+* This controller only provides interruption to inform the completion
+* of each byte transfer. (No status register to poll it.)
+* Unfortunately, U-Boot does not have a good support of interrupt.
+* Wait for a while.
+*/
+ udelay(dev-wait_us);
+
+ return readl(dev-base + I2C_DREC);
+}
+
+static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool
[U-Boot] [PATCH v3 4/4] ARM: UniPhier: enable CONFIG_I2C_EEPROM
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- To apply this commit, the following must be applied in advance: http://patchwork.ozlabs.org/patch/422543/ Changes in v3: None Changes in v2: None include/configs/uniphier.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 5a53c50..9ad47f6 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -43,6 +43,9 @@ #define CONFIG_SDRAM1_SIZE 0x1000 #endif +#define CONFIG_I2C_EEPROM +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 + /* * Support card address map */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/4] i2c: UniPhier: add I2C drivers based on driver model
Masahiro Yamada (4): i2c: UniPhier: add driver for UniPhier i2c controller i2c: UniPhier: add driver for UniPhier FIFO-builtin i2c controller ARM: UniPhier: enable I2C for UniPhier SoCs ARM: UniPhier: enable CONFIG_I2C_EEPROM configs/ph1_ld4_defconfig| 2 + configs/ph1_pro4_defconfig | 2 + configs/ph1_sld8_defconfig | 2 + drivers/i2c/Kconfig | 22 +++ drivers/i2c/Makefile | 2 + drivers/i2c/i2c-uniphier-f.c | 374 +++ drivers/i2c/i2c-uniphier.c | 233 +++ include/configs/uniphier.h | 3 + 8 files changed, 640 insertions(+) create mode 100644 drivers/i2c/i2c-uniphier-f.c create mode 100644 drivers/i2c/i2c-uniphier.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot
As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are only enabled in QSPI boot, and disabled in other boot modes. IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot. This patch will add fdt support for the above rules. Signed-off-by: Alison Wang alison.w...@freescale.com --- arch/arm/cpu/armv7/ls102xa/fdt.c | 13 + arch/arm/include/asm/arch-ls102xa/config.h | 4 2 files changed, 17 insertions(+) diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c index 989780d..b5c8d9d 100644 --- a/arch/arm/cpu/armv7/ls102xa/fdt.c +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c @@ -133,4 +133,17 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, fsl, ls1021a-flexcan, clock-frequency, busclk / 2, 1); + +#ifdef CONFIG_QSPI_BOOT + off = fdt_node_offset_by_compat_reg(blob, FSL_IFC_COMPAT, + CONFIG_SYS_IFC_ADDR); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); +#else + off = fdt_node_offset_by_compat_reg(blob, FSL_QSPI_COMPAT, + QSPI0_BASE_ADDR); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); + off = fdt_node_offset_by_compat_reg(blob, FSL_DSPI_COMPAT, + DSPI1_BASE_ADDR); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); +#endif } diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 5e934da..884c30e 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -101,4 +101,8 @@ #error SoC not defined #endif +#define FSL_IFC_COMPAT fsl,ifc +#define FSL_QSPI_COMPATfsl,ls1-qspi +#define FSL_DSPI_COMPATfsl,vf610-dspi + #endif /* _ASM_ARMV7_LS102XA_CONFIG_ */ -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 15/17] sunxi: Ippo_q8h defconfigs: Enable the LCD panel found on these tablets.
Hi, On Thu, Dec 25, 2014 at 6:59 PM, Hans de Goede hdego...@redhat.com wrote: Hi, On 25-12-14 11:00, Chen-Yu Tsai wrote: Hi, On Thu, Dec 25, 2014 at 3:06 AM, Hans de Goede hdego...@redhat.com wrote: Enable the new LCD support on Ippo_q8h tablets. Signed-off-by: Hans de Goede hdego...@redhat.com --- configs/Ippo_q8h_v1_2_defconfig | 5 - configs/Ippo_q8h_v5_defconfig | 5 - 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/configs/Ippo_q8h_v1_2_defconfig b/configs/Ippo_q8h_v1_2_defconfig index fefed32..c773f5f 100644 --- a/configs/Ippo_q8h_v1_2_defconfig +++ b/configs/Ippo_q8h_v1_2_defconfig @@ -1,7 +1,10 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS=CONS_INDEX=5 CONFIG_FDTFILE=sun8i-a23-ippo-q8h-v1.2.dtb -CONFIG_VIDEO=n +CONFIG_VIDEO_LCD_MODE=x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 +CONFIG_VIDEO_LCD_POWER=PH7 +CONFIG_VIDEO_LCD_BL_EN=PH6 +CONFIG_VIDEO_LCD_BL_PWM=PH0 CONFIG_USB_KEYBOARD=n +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y diff --git a/configs/Ippo_q8h_v5_defconfig b/configs/Ippo_q8h_v5_defconfig index b8d3afe..ce4f0b8 100644 --- a/configs/Ippo_q8h_v5_defconfig +++ b/configs/Ippo_q8h_v5_defconfig @@ -1,7 +1,10 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS=CONS_INDEX=5 CONFIG_FDTFILE=sun8i-a23-ippo-q8h-v5.dtb -CONFIG_VIDEO=n +CONFIG_VIDEO_LCD_MODE=x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 The display on my Q8H is a bit off to the left. With the simplefb bindings from your kernel sunxi-wip branch, I get a nice console. Though I've no way to type, at least I can tell my tablet is on. :) Could you briefly explain how to convert the values in the fex file to the mode line here? It could also help others with enabling display on their tablets. Ah yes, I used the slightly different timings from the olimex 7 lcd panel for olinuxino boards, and since those worked fine on my a23 tablet I never adjusted things. Here is a translation table: CONFIG_VIDEO_LCD_MODE fex value(s) x lcd_x y lcd_y depth:18lcd_frm = 1 pclk_khzlcd_dclk_freq * 1000 hs lcd_hv_hspw (with a minimum of 1) vs lcd_hv_vspw (with a minimum of 1) le lcd_hbp - hs ri lcd_ht - lcd_x - lcd_hbp up lcd_vbp - vs On sun4i/sun5i/sun7i: lo (lcd_vt / 2) - lcd_y - lcd_vbp On sun8i: lo lcd_vt - lcd_y - lcd_vbp sync0 mode0 I notice that the Ippo_q8h_v5 fex uses 0 for lcd_hv_hspw and lcd_hv_vspw, which is not a valid value as the register value contains hspw - 1, so the minimum is 1, and looking at a register dump under android with my A23 tablet the value indeed should be 1. So if I'm not mistaken for the Ippo_q8h_v5 the timings should be: CONFIG_VIDEO_LCD_MODE=x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:168,up:31,lo:13,hs:1,vs:1,sync:0,vmode:0 The new values look better. I haven't tested displaying anything other than a framebuffer console, so I can't say if the other margins are correct. I've created a simple wiki page to put the translation table: http://linux-sunxi.org/LCD Thanks! ChenYu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
