Re: [U-Boot] [PATCH] QE/DeepSleep: add QE deepsleep support for mpc85xx
On 03/25/2015 02:02 AM, Zhao Qiang wrote: > Muram will power off during deepsleep, and the microcode of qe > in muram will be lost, it should be reload when resume. > > Signed-off-by: Zhao Qiang > --- Applied to fsl-qoriq master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] drivers/ddr/fsl: Update DDR driver for DDR4
On 03/19/2015 09:30 AM, York Sun wrote: > Add/update registers for DDR4, including DQ mappings. Allow raw timing > method used for all controllers. Update mode_9 register to 0x500 for > improved stability. Check DDR controller version number individually > in case a SoC has multiple DDR controllers of different versions. > Increase read-write turnaround for DDR4 high speeds. > > Signed-off-by: York Sun > --- This set is applied to fsl-qoriq master, awaiting upstream. [U-Boot,1/4] drivers/ddr/fsl: Update DDR driver for DDR4 [U-Boot,2/4] driver/ddr/fsl: Fix driver to support empty first slot [U-Boot,3/4] driver/ddr/fsl: Add built-in memory test for DDR4 driver [U-Boot,4/4] driver/ddr/fsl: Add workaround for DDR erratum A008511 York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/2] drivers:usb:fsl: Add affected SOCs for USB Erratum A007792
On 03/11/2015 03:14 AM, Nikhil Badola wrote: > Add following affected SOCs and their personalities for USB > Erratum A007792 : > T1040 Rev 1.1 > T1024 Rev 1.0 > > Signed-off-by: Nikhil Badola > --- Applied to fsl-qoriq master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/mpc85xx: Use GOT when loading IVORs post-relocation
Commit 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
simplified IVOR initialization a bit too much, failing to use the
post-relocation offset. This doesn't cause a problem with normal NOR
boot, in which both the pre-relocation and post-relocation addresses
are 64 KiB aligned. However, if TEXT_BASE is only 4 KiB aligned, such
as for NAND/SD/etc. boot on some targets, as well as the QEMU target,
the post-relocation address will not be the same in the lower 16 bits,
as reserve_uboot() ensures that the relocation address is always 64
KiB aligned even if the pre-relocation address was not.
Use the GOT to get the proper post-relocation offsets.
Fixes: 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
Signed-off-by: Scott Wood
Cc: Alexander Graf
Cc: Shaohui Xie
---
arch/powerpc/cpu/mpc85xx/start.S | 35 ---
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 28f04ee..e61d8e0 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1664,41 +1664,46 @@ clear_bss:
*/
.globl trap_init
trap_init:
+ mflrr11
+ bl _GLOBAL_OFFSET_TABLE_-4
+ mflrr12
+
/* Update IVORs as per relocation */
mtspr IVPR,r3
- li r4,CriticalInput@l
+ lwz r4,CriticalInput@got(r12)
mtspr IVOR0,r4/* 0: Critical input */
- li r4,MachineCheck@l
+ lwz r4,MachineCheck@got(r12)
mtspr IVOR1,r4/* 1: Machine check */
- li r4,DataStorage@l
+ lwz r4,DataStorage@got(r12)
mtspr IVOR2,r4/* 2: Data storage */
- li r4,InstStorage@l
+ lwz r4,InstStorage@got(r12)
mtspr IVOR3,r4/* 3: Instruction storage */
- li r4,ExtInterrupt@l
+ lwz r4,ExtInterrupt@got(r12)
mtspr IVOR4,r4/* 4: External interrupt */
- li r4,Alignment@l
+ lwz r4,Alignment@got(r12)
mtspr IVOR5,r4/* 5: Alignment */
- li r4,ProgramCheck@l
+ lwz r4,ProgramCheck@got(r12)
mtspr IVOR6,r4/* 6: Program check */
- li r4,FPUnavailable@l
+ lwz r4,FPUnavailable@got(r12)
mtspr IVOR7,r4/* 7: floating point unavailable */
- li r4,SystemCall@l
+ lwz r4,SystemCall@got(r12)
mtspr IVOR8,r4/* 8: System call */
/* 9: Auxiliary processor unavailable(unsupported) */
- li r4,Decrementer@l
+ lwz r4,Decrementer@got(r12)
mtspr IVOR10,r4 /* 10: Decrementer */
- li r4,IntervalTimer@l
+ lwz r4,IntervalTimer@got(r12)
mtspr IVOR11,r4 /* 11: Interval timer */
- li r4,WatchdogTimer@l
+ lwz r4,WatchdogTimer@got(r12)
mtspr IVOR12,r4 /* 12: Watchdog timer */
- li r4,DataTLBError@l
+ lwz r4,DataTLBError@got(r12)
mtspr IVOR13,r4 /* 13: Data TLB error */
- li r4,InstructionTLBError@l
+ lwz r4,InstructionTLBError@got(r12)
mtspr IVOR14,r4 /* 14: Instruction TLB error */
- li r4,DebugBreakpoint@l
+ lwz r4,DebugBreakpoint@got(r12)
mtspr IVOR15,r4 /* 15: Debug */
+ mtlrr11
blr
.globl unlock_ram_in_cache
--
2.1.0
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Re: [U-Boot] drivers:usb: Check if USB Erratum A005697 is applicable on BSC913x
On 03/17/2015 05:46 AM, Nikhil Badola wrote: > Check if USB Erratum A005697 is applicable on BSC913x and > add corresponding property in the device tree via device > tree fixup which is used by linux driver > > Signed-off-by: Nikhil Badola > --- > Depends on "drivers:usb:fsl: Add affected SOCs for USB Erratum A007792" > http://patchwork.ozlabs.org/patch/448965/ Applied to fsl-qoriq master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_mem: Store last address/size/etc as ulong
On 03/19/2015 10:50 AM, Simon Glass wrote: > On 19 March 2015 at 10:43, York Sun wrote: >> From: Scott Wood >> >> Otherwise the high 32 bits get truncated on 64-bit U-boot. >> >> Signed-off-by: Scott Wood >> CC: Simon Glass >> --- >> common/cmd_mem.c |6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/common/cmd_mem.c b/common/cmd_mem.c >> index bcb3ee3..62a0404 100644 >> --- a/common/cmd_mem.c >> +++ b/common/cmd_mem.c >> @@ -35,9 +35,9 @@ static int mod_mem(cmd_tbl_t *, int, int, int, char * >> const []); >> /* Display values from last command. >> * Memory modify remembered values are different from display memory. >> */ >> -static uintdp_last_addr, dp_last_size; >> -static uintdp_last_length = 0x40; >> -static uintmm_last_addr, mm_last_size; >> +static ulong dp_last_addr, dp_last_size; >> +static ulong dp_last_length = 0x40; >> +static ulong mm_last_addr, mm_last_size; >> >> static ulong base_address = 0; > > Reviewed-by: Simon Glass Applied to fsl-qoriq master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: usb: fsl: Workaround for Erratum A004477
On 04/09/2015 08:29 PM, nikhil.bad...@freescale.com wrote:
>> -Original Message-
>> From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
>> Sent: Friday, November 21, 2014 6:00 PM
>> To: Badola Nikhil-B46172
>> Cc: u-boot@lists.denx.de
>> Subject: Re: [U-Boot] [PATCH] drivers: usb: fsl: Workaround for Erratum
>> A004477
>>
>> Hello Nikhil,
>>
>> On Fri, 21 Nov 2014 17:25:21 +0530, Nikhil Badola
>> wrote:
>>> Add a delay of 1 microsecond before issuing soft reset to the
>>> controller to let ongoing ULPI transaction complete.
>>> This prevents corruption of ULPI Function Control Register which
>>> eventually prevents phy clock from entering to low power mode
>>>
>>> Signed-off-by: Nikhil Badola
>>> ---
>>> Depends on patch https://patchwork.ozlabs.org/patch/404879/
>>>
>>> arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4
>>> arch/powerpc/include/asm/config_mpc85xx.h | 6 ++
>>> drivers/usb/host/ehci-fsl.c | 10 ++
>>> include/fsl_usb.h | 29
>>> +
>>> 4 files changed, 49 insertions(+)
>>>
>>> diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
>>> b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
>>> index fe3eb06..bc59352 100644
>>> --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
>>> +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
>>> @@ -298,6 +298,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int
>> argc, char * const argv[])
>>> if (has_erratum_a007798())
>>> puts("Work-around for Erratum A007798 enabled\n");
>> #endif
>>> +#ifdef CONFIG_SYS_FSL_ERRATUM_A004477
>>> + if (has_erratum_a004477())
>>> + puts("Work-around for Erratum A004477 enabled\n"); #endif
>>> #ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>>> if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
>>> (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV)) diff --git
>>> a/arch/powerpc/include/asm/config_mpc85xx.h
>>> b/arch/powerpc/include/asm/config_mpc85xx.h
>>> index 7860b40..fe9e9c1 100644
>>> --- a/arch/powerpc/include/asm/config_mpc85xx.h
>>> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
>>> @@ -161,6 +161,7 @@
>>> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define
>>> CONFIG_SYS_FSL_ERRATUM_A007075 #define
>> CONFIG_SYS_FSL_ERRATUM_A006261
>>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
>>> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
>>> #define CONFIG_ESDHC_HC_BLK_ADDR
>>>
>>> @@ -292,6 +293,7 @@
>>> #define CONFIG_FSL_SATA_ERRATUM_A001
>>> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define
>>> CONFIG_SYS_FSL_ERRATUM_A005125
>>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
>>>
>>> #elif defined(CONFIG_P1023)
>>> #define CONFIG_MAX_CPUS2
>>> @@ -372,6 +374,7 @@
>>> #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
>>> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define
>>> CONFIG_SYS_FSL_ERRATUM_A005125
>>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
>>> #define CONFIG_USB_MAX_CONTROLLER_COUNT1
>>>
>>> #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ @@ -589,6
>>> +592,7 @@ #define CONFIG_NAND_FSL_IFC #define
>>> CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define
>>> CONFIG_SYS_FSL_ERRATUM_A005125
>>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
>>> #define CONFIG_ESDHC_HC_BLK_ADDR
>>>
>>> #elif defined(CONFIG_BSC9132)
>>> @@ -613,6 +617,7 @@
>>> #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
>>> #define CONFIG_SYS_FSL_ERRATUM_A005125 #define
>>> CONFIG_SYS_FSL_ERRATUM_A005434
>>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
>>> #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>>> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
>>> #define CONFIG_ESDHC_HC_BLK_ADDR
>>> @@ -712,6 +717,7 @@
>>> #define CONFIG_SYS_FSL_ERRATUM_A006475 #define
>>> CONFIG_SYS_FSL_ERRATUM_A006384 #define
>> CONFIG_SYS_FSL_ERRATUM_A007212
>>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
>>> #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe00
>>> #define CONFIG_SYS_FSL_SFP_VER_3_0
>>>
>>> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
>>> index 5d4288d..41ff1a7 100644
>>> --- a/drivers/usb/host/ehci-fsl.c
>>> +++ b/drivers/usb/host/ehci-fsl.c
>>> @@ -138,6 +138,16 @@ int ehci_hcd_init(int index, enum usb_init_type
>> init,
>>> if (has_erratum_a007798())
>>> set_txfifothresh(ehci, TXFIFOTHRESH);
>>>
>>> + if (has_erratum_a004477()) {
>>> + /*
>>> +* When reset is issued while any ULPI transaction is ongoing
>>> +* then it may result to corruption of ULPI Function Control
>>> +* Register which eventually causes phy clock to enter low
>>> +* power mode which stops the clock. Thus delay is required
>>> +* before reset to let ongoing ULPI transaction complete.
>>
>> Actually the erratum suggests checking transaction status before issuing a
>> soft reset. Here, could the code do this check and wait for the transation to
>> finish, rather than wait for an arbitrary duration?
>
> There have been discussions with
Re: [U-Boot] [PATCH 0/4] x86: support of pin-muxing from device tree
Hi Gabriel, On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote: > This serie of patches adds the support of pin-muxing from the device tree > through > different properties. I have put two example to enable the USB Host on the > minnowboard max. > > The support of the call to 'setup_pch_gpios' is still supported and > only the minnowboard has been tested with the device tree implementation. > > Because the GPIO and IO base register ares different, I have also defined > some proxy function to set the function/value and direction of the GPIO as > the GPIO register can override some registers in the IO. > > Gabriel Huau (4): > x86: baytrail: fix the GPIOBASE address > x86: minnowmax: add GPIO banks in the device tree > x86: gpio: add pinctrl support from the device tree > x86: minnowmax: initialize the pin-muxing from device tree > > arch/x86/dts/minnowmax.dts| 63 + > arch/x86/include/asm/arch-baytrail/gpio.h | 3 +- > arch/x86/include/asm/gpio.h | 1 + > board/intel/minnowmax/minnowmax.c | 9 ++ > drivers/gpio/intel_ich6_gpio.c| 222 > ++ > include/configs/minnowmax.h | 1 + > include/dt-bindings/gpio/gpio.h | 20 +++ > 7 files changed, 292 insertions(+), 27 deletions(-) > > -- Thanks for these patches! Just a general comment, you don't need send emails to u-boot-patc...@bugs.denx.de, and always include a simple sentence in the commit message :) Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] x86: baytrail: fix the GPIOBASE address
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote: > Signed-off-by: Gabriel Huau > --- > arch/x86/include/asm/arch-baytrail/gpio.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h > b/arch/x86/include/asm/arch-baytrail/gpio.h > index ab4e059..4e8987c 100644 > --- a/arch/x86/include/asm/arch-baytrail/gpio.h > +++ b/arch/x86/include/asm/arch-baytrail/gpio.h > @@ -8,6 +8,6 @@ > #define _X86_ARCH_GPIO_H_ > > /* Where in config space is the register that points to the GPIO registers? > */ > -#define PCI_CFG_GPIOBASE 0x44 > +#define PCI_CFG_GPIOBASE 0x48 > > #endif /* _X86_ARCH_GPIO_H_ */ > -- Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] x86: baytrail: fix the GPIOBASE address
Hi Gabriel, On 23 April 2015 at 19:40, Bin Meng wrote: > On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau > wrote: >> Signed-off-by: Gabriel Huau Can you please add a commit message? >> --- >> arch/x86/include/asm/arch-baytrail/gpio.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h >> b/arch/x86/include/asm/arch-baytrail/gpio.h >> index ab4e059..4e8987c 100644 >> --- a/arch/x86/include/asm/arch-baytrail/gpio.h >> +++ b/arch/x86/include/asm/arch-baytrail/gpio.h >> @@ -8,6 +8,6 @@ >> #define _X86_ARCH_GPIO_H_ >> >> /* Where in config space is the register that points to the GPIO registers? >> */ >> -#define PCI_CFG_GPIOBASE 0x44 >> +#define PCI_CFG_GPIOBASE 0x48 >> >> #endif /* _X86_ARCH_GPIO_H_ */ >> -- > > Reviewed-by: Bin Meng Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Fat filesystem format support in u-boot
Hi All, I just want to know whether we have FAT file system formatting support in u-boot? I would like to format my SD card from u-boot. Regards, Siva ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] x86: queensbay: Implement PIRQ routing
Hi Simon,
On Fri, Apr 24, 2015 at 11:02 AM, Simon Glass wrote:
> Hi Bin,
>
> On 21 April 2015 at 19:56, Bin Meng wrote:
>> Implement Intel Queensbay platform-specific PIRQ routing support.
>> The chipset PIRQ routing setup is called in the arch_mist_init().
>
> arch_misc_init()?
Will fix.
> Also how can this be used on other boards? Should part of this code be
> moved to a generic place?
Generally Intel interrupt router should be compatible, but the offsets
of these interrupt routing registers might be different from platform
to platform. The platform-specific part is the internal PCI devices'
interrupt pin to PIRQ map.
>>
>> Signed-off-by: Bin Meng
>>
>> ---
>>
>> arch/x86/cpu/queensbay/Makefile | 2 +-
>> arch/x86/cpu/queensbay/irq.c | 236
>> +++
>> arch/x86/cpu/queensbay/tnc.c | 10 +-
>> arch/x86/include/asm/arch-queensbay/device.h | 94 +++
>> arch/x86/include/asm/arch-queensbay/irq.h| 55 +++
>> arch/x86/include/asm/arch-queensbay/tnc.h| 26 ++-
>> arch/x86/include/asm/u-boot-x86.h| 2 +
>> configs/crownbay_defconfig | 1 +
>> include/configs/crownbay.h | 1 +
>> 9 files changed, 423 insertions(+), 4 deletions(-)
>> create mode 100644 arch/x86/cpu/queensbay/irq.c
>> create mode 100644 arch/x86/include/asm/arch-queensbay/device.h
>> create mode 100644 arch/x86/include/asm/arch-queensbay/irq.h
>>
>> diff --git a/arch/x86/cpu/queensbay/Makefile
>> b/arch/x86/cpu/queensbay/Makefile
>> index d8761fd..4599a48 100644
>> --- a/arch/x86/cpu/queensbay/Makefile
>> +++ b/arch/x86/cpu/queensbay/Makefile
>> @@ -5,5 +5,5 @@
>> #
>>
>> obj-y += fsp_configs.o
>> -obj-y += tnc.o topcliff.o
>> +obj-y += irq.o tnc.o topcliff.o
>> obj-$(CONFIG_PCI) += tnc_pci.o
>> diff --git a/arch/x86/cpu/queensbay/irq.c b/arch/x86/cpu/queensbay/irq.c
>> new file mode 100644
>> index 000..cf433d3
>> --- /dev/null
>> +++ b/arch/x86/cpu/queensbay/irq.c
>> @@ -0,0 +1,236 @@
>> +/*
>> + * Copyright (C) 2015, Bin Meng
>> + *
>> + * SPDX-License-Identifier:GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +static struct irq_routing_table *pirq_routing_table;
>> +
>> +bool pirq_check_irq_routed(int link, u8 irq)
>> +{
>> + u8 pirq;
>> +
>> + pirq = x86_pci_read_config8(TNC_LPC, LINK_N2V(link));
>> + pirq &= 0xf;
>> +
>> + /* IRQ# 0/1/2/8/13 are reserved */
>> + if (pirq < 3 || pirq == 8 || pirq == 13)
>> + return false;
>> +
>> + return pirq == irq ? true : false;
>> +}
>> +
>> +int pirq_translate_link(int link)
>> +{
>> + return LINK_V2N(link);
>> +}
>> +
>> +void pirq_assign_irq(int link, u8 irq)
>> +{
>> + /* IRQ# 0/1/2/8/13 are reserved */
>> + if (irq < 3 || irq == 8 || irq == 13)
>> + return;
>> +
>> + x86_pci_write_config8(TNC_LPC, LINK_N2V(link), irq);
>> +}
>> +
>> +static inline void fill_irq_info(struct irq_info **slot, int *entries, u8
>> bus,
>> +u8 device, u8 func, u8 pin, u8 pirq)
>> +{
>
> Please declare a local variable
>
> struct irq_info *slot = *slotp;
>
> and rename the param to slotp, to avoid the first four (*slot).
Will fix.
>> + (*slot)->bus = bus;
>> + (*slot)->devfn = (device << 3) | func;
>> + (*slot)->irq[pin - 1].link = LINK_N2V(pirq);
>> + (*slot)->irq[pin - 1].bitmap = PIRQ_BITMAP;
>> + (*entries)++;
>> + (*slot)++;
>> +}
>> +
>> +/* PCIe port downstream INTx swizzle */
>> +static inline u8 pin_swizzle(u8 pin, int port)
>> +{
>> + return (pin + port) % 4;
>> +}
>> +
>> +__weak int board_fill_irq_info(struct irq_info *slot)
>> +{
>> + return 0;
>> +}
>> +
>> +static int create_pirq_routing_table(void)
>> +{
>> + struct irq_routing_table *rt;
>> + struct irq_info *slot;
>> + int irq_entries = 0;
>> + pci_dev_t tcf_bdf;
>> + u8 tcf_bus, bus;
>> + int i;
>> +
>> + rt = malloc(sizeof(struct irq_routing_table));
>> + if (!rt)
>> + return -ENOMEM;
>> + memset((char *)rt, 0, sizeof(struct irq_routing_table));
>> +
>> + /* Populate the PIRQ table fields */
>> + rt->signature = PIRQ_SIGNATURE;
>> + rt->version = PIRQ_VERSION;
>> + rt->rtr_bus = 0;
>> + rt->rtr_devfn = (TNC_LPC_DEV << 3) | TNC_LPC_FUNC;
>> + rt->rtr_vendor = PCI_VENDOR_ID_INTEL;
>> + rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
>> +
>> + slot = rt->slots;
>> +
>> + /*
>> +* Now fill in the irq_info entries in the PIRQ table
>> +*
>> +* We start from internal TunnelCreek PCI devices first, then
>> +* followed by all the 4 PCIe ports downstream devices, including
>> +* the Queensbay platform Topcliff chipset devices.
>> +
Re: [U-Boot] [PATCH 01/11] sandbox: Enable some ENV commands
On 21 April 2015 at 16:02, Joe Hershberger wrote: > Enable some additional ENV commands in sandbox to aid in build testing > and run testing. > > Signed-off-by: Joe Hershberger > --- > > include/configs/sandbox.h | 5 + > 1 file changed, 5 insertions(+) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/11] sandbox: Enable regex support
On 21 April 2015 at 16:02, Joe Hershberger wrote: > Enable regex support on sandbox. > > Signed-off-by: Joe Hershberger > --- > > configs/sandbox_defconfig | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/11] env: Distinguish finer between source of env change
On 21 April 2015 at 16:02, Joe Hershberger wrote: > We already could tell the difference in the callback between an import > and "other" which we called interactive. Now add further distinction > between interactive (i.e. running env set / env edit / env ask / etc. > from the U-Boot command line) and programmatic (i.e. when u-boot source > calls any variant of setenv() ). > > Signed-off-by: Joe Hershberger > --- > > common/cmd_nvedit.c | 26 +++--- > include/search.h| 2 ++ > 2 files changed, 21 insertions(+), 7 deletions(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/11] env: Fix return values in env_attr_lookup()
On 21 April 2015 at 16:02, Joe Hershberger wrote: > This function returned numbers for error codes. Change them to error > codes. > > Signed-off-by: Joe Hershberger > --- > > common/env_attr.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] x86: Install a default e820 table in the __weak install_e820_map()
Hi Bin,
On 21 April 2015 at 19:01, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Apr 21, 2015 at 9:52 PM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 20 April 2015 at 22:21, Bin Meng wrote:
>>> Create a default e820 table with 3 entries which is enough to boot
>>> a Linux kernel.
>>>
>>> Signed-off-by: Bin Meng
>>> ---
>>>
>>> arch/x86/lib/zimage.c | 29 ++---
>>> 1 file changed, 22 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
>>> index 566b048..c3f8a73 100644
>>> --- a/arch/x86/lib/zimage.c
>>> +++ b/arch/x86/lib/zimage.c
>>> @@ -25,6 +25,8 @@
>>> #endif
>>> #include
>>>
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>> /*
>>> * Memory lay-out:
>>> *
>>> @@ -40,16 +42,29 @@
>>>
>>> #define COMMAND_LINE_SIZE 2048
>>>
>>> -unsigned generic_install_e820_map(unsigned max_entries,
>>> - struct e820entry *entries)
>>> +/*
>>> + * Install a default e820 table with 3 entries as follows:
>>> + *
>>> + * 0x00-0x0a Useable RAM
>>> + * 0x0a-0x10 Reserved for ISA
>>> + * 0x10-gd->ram_size Useable RAM
>>> + */
>>> +__weak unsigned install_e820_map(unsigned max_entries,
>>> +struct e820entry *entries)
>>> {
>>> - return 0;
>>> + entries[0].addr = 0;
>>> + entries[0].size = ISA_START_ADDRESS;
>>> + entries[0].type = E820_RAM;
>>> + entries[1].addr = ISA_START_ADDRESS;
>>> + entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
>>> + entries[1].type = E820_RESERVED;
>>> + entries[2].addr = ISA_END_ADDRESS;
>>> + entries[2].size = gd->ram_size - ISA_END_ADDRESS;
>>> + entries[2].type = E820_RAM;
>>> +
>>> + return 3;
>>> }
>>>
>>> -unsigned install_e820_map(unsigned max_entries,
>>> - struct e820entry *entries)
>>> - __attribute__((weak, alias("generic_install_e820_map")));
>>> -
>>> static void build_command_line(char *command_line, int auto_boot)
>>> {
>>> char *env_command_line;
>>> --
>>> 1.8.2.1
>>>
>>
>> Why is this code sitting in zimage.c? Should it be used with bootm also?
>
> Sorry I am not sure I understand your point. setup_zimage() is called
> by boot_prep_linux() in bootm.c.
I mean that install_e820_map() seems to be unrelated to zimage, and is
perhaps better kept in a more generic place, perhaps
arch/x86/lib/bootm.c or even arch/x86/lib/e820. Anyway let's apply
this and we can figure that out later.
Acked-by: Simon Glass
Regards,
Simon
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Re: [U-Boot] [PATCH 1/3] sandbox: Add test function to advance time
On 21 April 2015 at 12:57, Joe Hershberger wrote: > Add a function that maintains an offset to include in the system timer > values returned from the lib/time.c APIs. > > This will allow timeouts to be skipped instantly in tests > > Signed-off-by: Joe Hershberger > --- > > arch/sandbox/cpu/cpu.c | 5 - > arch/sandbox/include/asm/test.h | 8 > board/sandbox/sandbox.c | 11 ++- > 3 files changed, 18 insertions(+), 6 deletions(-) Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 09/11] net: Apply default format rules to all ethaddr
On 21 April 2015 at 16:02, Joe Hershberger wrote:
> Use a regular expression to apply the default formatting flags for all
> ethaddr env vars.
>
> Signed-off-by: Joe Hershberger
> ---
>
> include/env_flags.h | 11 ---
> test/dm/eth.c | 1 +
> 2 files changed, 9 insertions(+), 3 deletions(-)
Reviewed-by: Simon Glass
Q below.
>
> diff --git a/include/env_flags.h b/include/env_flags.h
> index 3ef6311..fc6d0d8 100644
> --- a/include/env_flags.h
> +++ b/include/env_flags.h
> @@ -38,13 +38,18 @@ enum env_flags_varaccess {
> #endif
>
> #ifdef CONFIG_CMD_NET
> +#ifdef CONFIG_REGEX
> +#define ETHADDR_WILDCARD "\\d?"
> +#else
> +#define ETHADDR_WILDCARD
> +#endif
> #ifdef CONFIG_ENV_OVERWRITE
> -#define ETHADDR_FLAGS "ethaddr:ma,"
> +#define ETHADDR_FLAGS "eth" ETHADDR_WILDCARD "addr:ma,"
> #else
> #ifdef CONFIG_OVERWRITE_ETHADDR_ONCE
> -#define ETHADDR_FLAGS "ethaddr:mc,"
> +#define ETHADDR_FLAGS "eth" ETHADDR_WILDCARD "addr:mc,"
> #else
> -#define ETHADDR_FLAGS "ethaddr:mo,"
> +#define ETHADDR_FLAGS "eth" ETHADDR_WILDCARD "addr:mo,"
> #endif
> #endif
> #else
> diff --git a/test/dm/eth.c b/test/dm/eth.c
> index 4891f3a..9b714a1 100644
> --- a/test/dm/eth.c
> +++ b/test/dm/eth.c
> @@ -89,6 +89,7 @@ static int dm_test_eth_rotate(struct dm_test_state *dms)
> /* Invalidate eth1's MAC address */
> net_ping_ip = string_to_ip("1.1.2.2");
> strcpy(ethaddr, getenv("eth1addr"));
Can you explain this next line, please?
> + setenv(".flags", "eth1addr");
> setenv("eth1addr", NULL);
>
> /* Make sure that the default is to rotate to the next interface */
> --
> 1.7.11.5
>
Regards,
Simon
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Re: [U-Boot] [PATCH 07/11] env: Add regex support to env_attrs
On 21 April 2015 at 16:02, Joe Hershberger wrote: > Allow the features that use env_attrs to specify regexs for the name > > Signed-off-by: Joe Hershberger > --- > > common/env_attr.c | 85 > ++ > include/env_callback.h | 10 -- > 2 files changed, 93 insertions(+), 2 deletions(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] sandbox: eth: Add a function to skip ping timeouts
On 21 April 2015 at 12:57, Joe Hershberger wrote: > When called, the next call to receive will trigger a 10-second leap > forward in time to avoid waiting for time to pass when tests are > evaluating timeout behavior. > > Signed-off-by: Joe Hershberger > --- > > arch/sandbox/include/asm/eth.h | 2 ++ > drivers/net/sandbox.c | 17 + > 2 files changed, 19 insertions(+) Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] x86: minnowmax: initialize the pin-muxing from device tree
Hi Grabriel,
On 23 April 2015 at 10:16, Gabriel Huau wrote:
> Signed-off-by: Gabriel Huau
> ---
> board/intel/minnowmax/minnowmax.c | 9 +
> include/configs/minnowmax.h | 1 +
> 2 files changed, 10 insertions(+)
>
> diff --git a/board/intel/minnowmax/minnowmax.c
> b/board/intel/minnowmax/minnowmax.c
> index 6e82b16..60dd2bb 100644
> --- a/board/intel/minnowmax/minnowmax.c
> +++ b/board/intel/minnowmax/minnowmax.c
> @@ -7,6 +7,7 @@
> #include
> #include
> #include
> +#include
This should go up one line I think, for ordering.
> #include
> #include
>
> @@ -14,6 +15,14 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +int arch_early_init_r(void)
> +{
> + /* do the pin-muxing */
> + gpio_ich6_pinctrl_init();
> +
> + return 0;
> +}
> +
> int board_early_init_f(void)
> {
> lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
> diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
> index 823e051..3c7b266 100644
> --- a/include/configs/minnowmax.h
> +++ b/include/configs/minnowmax.h
> @@ -15,6 +15,7 @@
>
> #define CONFIG_SYS_MONITOR_LEN (1 << 20)
> #define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_ARCH_EARLY_INIT_R
>
> #define CONFIG_NR_DRAM_BANKS 1
>
> --
> 2.1.4
>
Regards,
Simon
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Re: [U-Boot] [PATCH 02/10] board_init_f_mem(): Don't require memset()
Hi Masahiro, On 20 April 2015 at 22:30, Masahiro Yamada wrote: > 2015-04-21 12:47 GMT+09:00 Simon Glass : >> Hi Masahiro, >> >> On 20 April 2015 at 21:42, Masahiro Yamada >> wrote: >>> Hi Simon, >>> >>> >>> >>> 2015-04-16 10:14 GMT+09:00 Simon Glass : Unfortunately memset() is not always available, so provide a substitute when needed. Signed-off-by: Simon Glass --- common/init/global_data.c | 8 1 file changed, 8 insertions(+) diff --git a/common/init/global_data.c b/common/init/global_data.c index 2633f0d..ef055c4 100644 --- a/common/init/global_data.c +++ b/common/init/global_data.c @@ -21,7 +21,15 @@ ulong board_init_f_mem(ulong top) top -= sizeof(struct global_data); top = ALIGN(top, 16); gd = (struct global_data *)top; +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBGENERIC_SUPPORT) memset((void *)gd, '\0', sizeof(*gd)); +#else + int *ptr = (int *)gd; + int *end = (int *)(gd + 1); + + while (ptr < end) + *ptr++ = 0; +#endif #ifdef CONFIG_SYS_MALLOC_F_LEN top -= CONFIG_SYS_MALLOC_F_LEN; >>> >>> >>> This patch implies that all the SPLs should have memset(). >>> >>> Is it better to build lib/ unconditionally? >>> I posted a patch to do so. >>> >>> Please consider to use it as a prerequisite >>> for cleaning up 01/10 and 02/10. >> >> That would be better I think - how did you manage it? I cannot see the >> patch you are referring to. > > It is under moderation because of too many recipients. > (I think you have already received it because you were listed in CC.) > > Please wait until it is approved. > > >> Although what about if SPL is very close >> to the maximum size and adding memset() makes it too large? I suppose >> in that case we would get a build error and notice the problem? > > Buildman-test passed, but I am not sure about run-test. > > For those boards that define CONFIG_SPL_MAX_SIZE, > CONFIG_SPL_MAX_FOOTPRINT etc., we should notice the problem at the > build time. (and it did not occur.) > > I'd like to encourage the board maintainers to do run-test just in case. > (and also to support such CONFIG options for boards with the limited > memory footprint) OK, I tried it out for code size and it looked fine. I will see if I can test it on some boards, but I imagine it would be fine. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] dm: sf: Make SST flash write op work again
On 23 April 2015 at 03:00, Bin Meng wrote: > With SPI flash moving to driver model, commit fbb0991 "dm: Convert > spi_flash_probe() and 'sf probe' to use driver model" ignored the > SST flash-specific write op (byte program & word program), which > actually broke the SST flash from wroking. > > This commit makes SST flash work again under driver model, by adding > a new SST flash-specific driver to handle the different write op > from the standard one. > > Signed-off-by: Bin Meng > --- > > drivers/mtd/spi/sf_probe.c | 31 +++ > 1 file changed, 31 insertions(+) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 0/28] Adding LS2085AQDS and RDB
On 03/20/2015 07:28 PM, York Sun wrote: > This set adds necessary support in common ls2085a support and board > support for QDS and RDB. > > Changes in v5: > Re-generate patches using patman default flags > s/LayerScape/Layerscape/g > Fix board README for inconsistent SoC name > Fix comment in board header file > s/LS2080/LS2085/g > Fix Kconfig help for inconsistent SoC name > Update LS2085AQDS README to include instructions to form NAND image > Update LS2085ARDB README to include instructions to form NAND image > > Changes in v4: > Remove temporary variable cntfrq. > Fix board README for inconsistent SoC name > Fix comments in board header file > Update MAINTAINERS file > Update MAINTAINERS file > > Changes in v3: > Move secondary core fix to mp.c. > Replace hard-coded value with COUNTER_FREQUENCY. > > Changes in v2: > Rebase after adding macros CONFIG_SYS_I2C_MXC_I2C3 in another patch set > Fix CNTFRQ for secondary cores when COUNTER_FREQUENCY_REAL is defined. > Add comment to I2C workaround > > Bhupesh Sharma (1): > armv8/fsl-ch3: Add support to print RCW configuration > > J. German Rivera (2): > drivers/fsl-mc: Changed MC firmware loading for new boot architecture > drivers/fsl-mc: Autoload AOIP image from NOR flash > > Jaiprakash Singh (1): > driver/ifc: Add 64KB page support > > Minghuan Lian (1): > armv8: Add SerDes framework for Layerscape Architecture > > Prabhakar Kushwaha (4): > armv8/ls2085a: Update common header file > driver/ldpaa_eth: Update ldpaa ethernet driver > driver/ldpaa: Add support of WRIOP static data structure > board/ls2085qds: Add support ethernet > > Scott Wood (8): > armv8/fsl-lsch3: Set nodes in DVM domain > fsl-lsch3: Introduce place for common early SoC init > armv8/ls2085a: Add workaround for USB erratum A-008751 > armv8/fsl-lsch3: Use correct compatible for serial clock fixup > armv8/fsl-lsch3: Enable system error aborts > armv8/ls2085aqds: NAND boot support > freescale/qixis: Add support for booting from NAND > armv8/ls2085ardb: Enable NAND SPL support > > Shaohui Xie (1): > net/memac_phy: reuse driver for little endian SoCs > > Yangbo Lu (1): > ls2085a: esdhc: Add esdhc support for ls2085a > > York Sun (7): > armv8/fsl-lsch3: Implement workaround for erratum A008585 > armv8/fsl-lsch3: Fix platform clock calculation > armv8/ls2085a: Fix generic timer clock source > armv8/fsl-lsch3: Update early MMU table > armv8/ls2085aqds: Add support of LS2085AQDS platform > armv8/ls2085ardb: Add support of LS2085ARDB platform > armv8/fsl-lsch3: Implement workaround for I2C issue > > pankaj chauhan (2): > armv8/ls2085a: Add support for reset request > net/phy/cortina: Fix compilation warning > This set (except 17/28 and 21/28) is applied to fsl-qoriq master, awaiting upstream. [U-Boot,v5,01/28] armv8/fsl-lsch3: Implement workaround for erratum A008585 [U-Boot,v5,02/28] armv8/ls2085a: Update common header file [U-Boot,v5,03/28] armv8/fsl-lsch3: Fix platform clock calculation [U-Boot,v5,04/28] armv8/ls2085a: Fix generic timer clock source [U-Boot,v5,05/28] armv8/ls2085a: Add support for reset request [U-Boot,v5,06/28] armv8/fsl-lsch3: Set nodes in DVM domain [U-Boot,v5,07/28] armv8/fsl-lsch3: Update early MMU table [U-Boot,v5,08/28] fsl-lsch3: Introduce place for common early SoC init [U-Boot,v5,09/28] armv8/ls2085a: Add workaround for USB erratum A-008751 [U-Boot,v5,10/28] armv8/fsl-lsch3: Use correct compatible for serial clock fixup [U-Boot,v5,11/28] driver/ldpaa_eth: Update ldpaa ethernet driver [U-Boot,v5,12/28] armv8: Add SerDes framework for Layerscape Architecture [U-Boot,v5,13/28] net/phy/cortina: Fix compilation warning [U-Boot,v5,14/28] drivers/fsl-mc: Changed MC firmware loading for new boot architecture [U-Boot,v5,15/28] net/memac_phy: reuse driver for little endian SoCs [U-Boot,v5,16/28] armv8/fsl-ch3: Add support to print RCW configuration [U-Boot,v5,18/28] driver/ldpaa: Add support of WRIOP static data structure [U-Boot,v5,19/28] armv8/ls2085aqds: Add support of LS2085AQDS platform [U-Boot,v5,20/28] armv8/ls2085ardb: Add support of LS2085ARDB platform [U-Boot,v5,22/28] board/ls2085qds: Add support ethernet [U-Boot,v5,23/28] driver/ifc: Add 64KB page support [U-Boot,v9,24/28] armv8/ls2085aqds: NAND boot support [U-Boot,v5,25/28] freescale/qixis: Add support for booting from NAND [U-Boot,v9,26/28] armv8/ls2085ardb: Enable NAND SPL support [U-Boot,v5,27/28] ls2085a: esdhc: Add esdhc support for ls2085a [U-Boot,v6,28/28] armv8/fsl-lsch3: Implement workaround for I2C erratum A009203 York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] unassigned-patches/144: Re: [PATCH 3/4] x86: gpio: add pinctrl support from the device tree
Hi,
On 23 April 2015 at 10:16, Gabriel Huau wrote:
> A set of properties has been defined for the device tree to select for
> each pin the pull/func/default output configuration.
>
> The offset for the PAD needs to be provided and if a GPIO needs to be
> configured, his offset needs to be provided as well.
>
> Here is an example:
> pin_usb_host_en0@0 {
> gpio-offset = <0x80 8>;
> pad-offset = <0x260>;
> mode-gpio;
> output-value = <1>;
> direction = ;
> };
>
> Signed-off-by: Gabriel Huau
> ---
> arch/x86/dts/minnowmax.dts| 21 +++
> arch/x86/include/asm/arch-baytrail/gpio.h | 1 +
> arch/x86/include/asm/gpio.h | 1 +
> drivers/gpio/intel_ich6_gpio.c| 222
> ++
> include/dt-bindings/gpio/gpio.h | 20 +++
> 5 files changed, 239 insertions(+), 26 deletions(-)
>
> diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
> index c73e421..3936e21 100644
> --- a/arch/x86/dts/minnowmax.dts
> +++ b/arch/x86/dts/minnowmax.dts
> @@ -6,6 +6,8 @@
>
> /dts-v1/;
>
> +#include
> +
> /include/ "skeleton.dtsi"
> /include/ "serial.dtsi"
>
> @@ -21,6 +23,25 @@
> silent_console = <0>;
> };
>
> + pch_pinctrl {
> + compatible = "intel,ich6-pinctrl";
Make sure you use tabs for indenting here.
You should create a binding file to describe your binding - in
doc/device-tree-bindings.
> + pin_usb_host_en0@0 {
> + gpio-offset = <0x80 8>;
> + pad-offset = <0x260>;
> + mode-gpio;
> + output-value = <1>;
> + direction = ;
> + };
> +
> + pin_usb_host_en1@0 {
> + gpio-offset = <0x80 9>;
> + pad-offset = <0x258>;
> + mode-gpio;
> + output-value = <1>;
> + direction = ;
> + };
> + };
> +
> gpioa {
> compatible = "intel,ich6-gpio";
> u-boot,dm-pre-reloc;
> diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h
> b/arch/x86/include/asm/arch-baytrail/gpio.h
> index 4e8987c..85a65a8 100644
> --- a/arch/x86/include/asm/arch-baytrail/gpio.h
> +++ b/arch/x86/include/asm/arch-baytrail/gpio.h
> @@ -9,5 +9,6 @@
>
> /* Where in config space is the register that points to the GPIO registers?
> */
> #define PCI_CFG_GPIOBASE 0x48
> +#define PCI_CFG_IOBASE 0x4c
>
> #endif /* _X86_ARCH_GPIO_H_ */
> diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
> index 1099427..ed85b08 100644
> --- a/arch/x86/include/asm/gpio.h
> +++ b/arch/x86/include/asm/gpio.h
> @@ -147,6 +147,7 @@ struct pch_gpio_map {
> } set3;
> };
>
> +int gpio_ich6_pinctrl_init(void);
> void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
> void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
>
> diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
> index 7e679a0..a110d5b 100644
> --- a/drivers/gpio/intel_ich6_gpio.c
> +++ b/drivers/gpio/intel_ich6_gpio.c
> @@ -44,21 +44,32 @@ struct ich6_bank_priv {
> uint16_t lvl;
> };
>
> +#define GPIO_USESEL_OFFSET(x) (x)
> +#define GPIO_IOSEL_OFFSET(x) (x + 4)
> +#define GPIO_LVL_OFFSET(x) (x + 8)
Comments on the above
> +
> +#define IOPAD_MODE_MASK0x7
> +#define IOPAD_PULL_ASSIGN_MASK 0x3
> +#define IOPAD_PULL_ASSIGN_SHIFT7
Can you make the mask value an actual valid mask, like:
+#define IOPAD_PULL_ASSIGN_MASK (0x3 << IOPAD_PULL_ASSIGN_SHIFT)
> +#define IOPAD_PULL_STRENGTH_MASK 0x3
> +#define IOPAD_PULL_STRENGTH_SHIFT 9
> +
> +static int __ich6_gpio_set_value(uint16_t base, unsigned offset, int value);
Can you reorder the functions to avoid the need for these forward
declarations? Also only one underscore prefix please.
> +static int __ich6_gpio_set_direction(uint16_t base, unsigned offset, int
> dir);
> +static int __ich6_gpio_set_function(uint16_t base, unsigned offset, int
> func);
> +
> /* TODO: Move this to device tree, or platform data */
> void ich_gpio_set_gpio_map(const struct pch_gpio_map *map)
> {
> gd->arch.gpio_map = map;
> }
>
> -static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
> +static int gpio_ich6_get_base(unsigned long base)
> {
> - struct ich6_bank_platdata *plat = dev_get_platdata(dev);
> pci_dev_t pci_dev; /* handle for 0:1f:0 */
> u8 tmpbyte;
> u16 tmpword;
> u32 tmplong;
> - u16 gpiobase;
> - int offset;
>
> /* Where should it be? */
> pci_dev = PCI_BDF(0, 0x1f, 0);
> @@ -123,9 +134,9 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice
> *dev)
> * while on the Ivybridge the bit0 is used to indicate it is an
> * I/O space.
> */
Re: [U-Boot] [PATCH 3/4] x86: Support platform PIRQ routing
On 21 April 2015 at 19:56, Bin Meng wrote: > On x86 boards, platform chipset receives up to four different > interrupt signals from PCI devices (INTA/B/C/D), which in turn > will be routed to chipset internal PIRQ lines then routed to > 8259 PIC finally if configuring the whole system to work under > the so-called PIC mode (in contrast to symmetric IO mode which > uses IOAPIC). > > We add two major APIs to aid this, one for routing PIRQ and the > other one for generating a PIRQ routing table. > > Signed-off-by: Bin Meng > --- > > arch/x86/Kconfig| 31 > arch/x86/include/asm/pirq_routing.h | 139 > > arch/x86/lib/Makefile | 1 + > arch/x86/lib/pirq_routing.c | 129 + > 4 files changed, 300 insertions(+) > create mode 100644 arch/x86/include/asm/pirq_routing.h > create mode 100644 arch/x86/lib/pirq_routing.c Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] dm: i2c: mxc support DM
Hi Peng,
On 19 April 2015 at 23:49, Peng Fan wrote:
> Hi Simon,
>
> Thanks for reviewing. I'll address most comments and try to merge DM and
> non-DM part into one. will send out v2 for review.
> The only unsure part is bus_i2c_init, I also reply you inline. I want to
> pass force_idle_bus and pinmux setting to i2c driver, so i use bus_i2c_init,
> same with non-DM way.
We should not pass functions to driver model. It is better to just
have a weak function or something like that, that your driver calls
out to.
With pinmux, you should be able to encode it in the device tree. If
not, again I think it is the lesser of two evils to call out to a
separate function.
If we get a pinctl uclass one day then you could move it over then.
>
>
> On 4/19/2015 9:53 PM, Simon Glass wrote:
>>
>> Hi Peng,
>>
>> On 15 April 2015 at 03:35, Peng Fan wrote:
>>>
>>> Add support when CONFIG_DM_I2C configured.
>>>
>>> Test results:
>>> => i2c dev 0
>>> Setting bus to 0
>>> => i2c probe
>>> Valid chip addresses: 08 50
>>> => i2c md 8 38
>>> 0038: 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08
>>> => i2c mw 8 38 5 1
>>> => i2c md 8 38
>>> 0038: 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05
>>> => dm tree
>>> Class Probed Name
>>>
>>> root[ + ]root_driver
>>> thermal [ ]|-- imx_thermal
>>> simple_bus [ + ]|-- soc
>>> simple_bus [ ]| |-- aips-bus@3000
>>> simple_bus [ ]| | |-- anatop@3036
>>> simple_bus [ ]| | `-- snvs@3037
>>> simple_bus [ ]| |-- aips-bus@3040
>>> simple_bus [ + ]| `-- aips-bus@3080
>>> i2c [ + ]| |-- i2c@30a2
>>> i2c_generic [ + ]| | |-- generic_8
>>> i2c_generic [ + ]| | `-- generic_50
>>> i2c [ ]| |-- i2c@30a4
>>> spi [ ]| `-- qspi@30bb
>>> simple_bus [ ]`-- regulators
>>>
>>> Signed-off-by: Peng Fan
>>> ---
>>> arch/arm/imx-common/i2c-mxv7.c| 4 +
>>> arch/arm/include/asm/imx-common/mxc_i2c.h | 5 +
>>> drivers/i2c/mxc_i2c.c | 354
>>> ++
>>> 3 files changed, 363 insertions(+)
>>>
>>> diff --git a/arch/arm/imx-common/i2c-mxv7.c
>>> b/arch/arm/imx-common/i2c-mxv7.c
>>> index 1a632e7..99fe112 100644
>>> --- a/arch/arm/imx-common/i2c-mxv7.c
>>> +++ b/arch/arm/imx-common/i2c-mxv7.c
>>> @@ -99,8 +99,12 @@ int setup_i2c(unsigned i2c_index, int speed, int
>>> slave_addr,
>>> if (ret)
>>> goto err_idle;
>>>
>>> +#ifndef CONFIG_DM_I2C
>>> bus_i2c_init(i2c_bases[i2c_index], speed, slave_addr,
>>> force_idle_bus, p);
>>> +#else
>>> + bus_i2c_init(i2c_index, speed, slave_addr, force_idle_bus, p);
>>
>> One of the goals of driver model is to remove code like this, and have
>> the devices init themselves when they are used. Here you are probing
>> each device and then changing its configuration outside the device's
>> probe() method. This should not be needed with driver model. See
>> below.
>
> Agree. But i want to pass force_idle_bus and pinmux settings(parameter p) to
> i2c driver. I did not find a good way how to pass these two to DM mxc_i2c
> driver.
>
>>
>>> +#endif
>>>
>>> return 0;
>>>
>>> diff --git a/arch/arm/include/asm/imx-common/mxc_i2c.h
>>> b/arch/arm/include/asm/imx-common/mxc_i2c.h
>>> index af86163..8f9c83e 100644
>>> --- a/arch/arm/include/asm/imx-common/mxc_i2c.h
>>> +++ b/arch/arm/include/asm/imx-common/mxc_i2c.h
>>> @@ -54,8 +54,13 @@ struct i2c_pads_info {
>>>
>>> int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
>>>struct i2c_pads_info *p);
>>> +#ifndef CONFIG_DM_I2C
>>> void bus_i2c_init(void *base, int speed, int slave_addr,
>>> int (*idle_bus_fn)(void *p), void *p);
>>> +#else
>>> +void bus_i2c_init(int index, int speed, int slave_addr,
>>> + int (*idle_bus_fn)(void *p), void *p);
>>> +#endif
>>> int bus_i2c_read(void *base, uchar chip, uint addr, int alen, uchar
>>> *buf,
>>> int len);
>>> int bus_i2c_write(void *base, uchar chip, uint addr, int alen,
>>> diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
>>> index fc5ee35..9488e24 100644
>>> --- a/drivers/i2c/mxc_i2c.c
>>> +++ b/drivers/i2c/mxc_i2c.c
>>> @@ -21,6 +21,8 @@
>>> #include
>>> #include
>>> #include
>>> +#include
>>> +#include
>>>
>>> DECLARE_GLOBAL_DATA_PTR;
>>>
>>> @@ -224,6 +226,7 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8
>>> byte)
>>> return 0;
>>> }
>>>
>>> +#ifndef CONFIG_DM_I2C
>>> /*
>>>* Stop I2C transaction
>>>*/
>>> @@ -552,3 +555,354 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init,
>>> mxc_i2c_probe,
>>> CONFIG_SYS_MXC_I2C3_SPEED,
>>> CONFIG_SYS_MXC_I2C3_SLAVE, 2)
>>> #endif
>>>
Re: [U-Boot] [PATCH 3/3] test: dm: eth: Skip timeouts on ping tests
On 21 April 2015 at 12:57, Joe Hershberger wrote: > Indicate to the emulated sandbox Ethernet driver when we expect a > timeout and tell it to leap forward. > > Signed-off-by: Joe Hershberger > --- > > test/dm/eth.c | 2 ++ > 1 file changed, 2 insertions(+) Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] unassigned-patches/145: Re: [PATCH 4/4] x86: minnowmax: initialize the pin-muxing from device tree
Hi Grabriel,
On 23 April 2015 at 10:16, Gabriel Huau wrote:
> Signed-off-by: Gabriel Huau
> ---
> board/intel/minnowmax/minnowmax.c | 9 +
> include/configs/minnowmax.h | 1 +
> 2 files changed, 10 insertions(+)
>
> diff --git a/board/intel/minnowmax/minnowmax.c
> b/board/intel/minnowmax/minnowmax.c
> index 6e82b16..60dd2bb 100644
> --- a/board/intel/minnowmax/minnowmax.c
> +++ b/board/intel/minnowmax/minnowmax.c
> @@ -7,6 +7,7 @@
> #include
> #include
> #include
> +#include
This should go up one line I think, for ordering.
> #include
> #include
>
> @@ -14,6 +15,14 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +int arch_early_init_r(void)
> +{
> + /* do the pin-muxing */
> + gpio_ich6_pinctrl_init();
> +
> + return 0;
> +}
> +
> int board_early_init_f(void)
> {
> lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
> diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
> index 823e051..3c7b266 100644
> --- a/include/configs/minnowmax.h
> +++ b/include/configs/minnowmax.h
> @@ -15,6 +15,7 @@
>
> #define CONFIG_SYS_MONITOR_LEN (1 << 20)
> #define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_ARCH_EARLY_INIT_R
>
> #define CONFIG_NR_DRAM_BANKS 1
>
> --
> 2.1.4
>
Regards,
Simon
---
Added to GNATS database as unassigned-patches/145
>Responsible:patch-coord
>Message-Id:
>
>In-Reply-To:<1429805775-1809-5-git-send-email-cont...@huau-gabriel.fr>
>References: <1429805775-1809-1-git-send-email-cont...@huau-gabriel.fr>
><1429805775-1809-5-git-send-email-cont...@huau-gabriel.fr>
>Patch-Date: Fri Apr 24 05:37:28 +0200 2015
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Re: [U-Boot] [PATCH 2/4] x86: minnowmax: add GPIO banks in the device tree
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote:
> There is 6 banks:
There are
> 4 banks for CORE: available in S0 mode
> 2 banks for SUS (Suspend): available in S0-S5 mode
>
> Signed-off-by: Gabriel Huau
> ---
> arch/x86/dts/minnowmax.dts | 42 ++
> 1 file changed, 42 insertions(+)
>
> diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
> index 8f34369..c73e421 100644
> --- a/arch/x86/dts/minnowmax.dts
> +++ b/arch/x86/dts/minnowmax.dts
> @@ -21,6 +21,48 @@
> silent_console = <0>;
> };
>
> + gpioa {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0 0x20>;
> + bank-name = "A";
> + };
> +
> + gpiob {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0x20 0x20>;
> + bank-name = "B";
> + };
> +
> + gpioc {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0x40 0x20>;
> + bank-name = "C";
> + };
> +
> + gpiod {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0x60 0x20>;
> + bank-name = "D";
> + };
> +
> + gpioe {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0x80 0x20>;
> + bank-name = "E";
> + };
> +
> + gpiof {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0xA0 0x20>;
> + bank-name = "F";
> + };
> +
> chosen {
> stdout-path = "/serial";
> };
> --
Reviewed-by: Bin Meng
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Re: [U-Boot] [PATCH v4 11/16] dm: regulator: add fixed voltage regulator driver
Hi Przemyslaw, On 23 April 2015 at 06:31, Przemyslaw Marczak wrote: > Hello Simon, > > On 04/20/2015 08:07 PM, Przemyslaw Marczak wrote: >> >> This driver implements regulator operations for fixed Voltage/Current >> value regulators. beside the standard regulator constraints, which are >> put into the uclass platform data, a typical fixed regulator node provides >> few additional properties like: >> - gpio >> - gpio-open-drain >> - enable-active-high >> - startup-delay-us >> The only 'gpio' is used by this driver and is kept in structure of type >> 'fixed_regulator_platdata', as a device platform data (dev->platdata). >> >> The driver implements: >> - get_value >> - get_current >> - get_enable >> - set_enable >> >> The regulator calls and commands can be used for fixed-regulator devices, >> and the proper error will be returned for prohibited. >> >> Signed-off-by: Przemyslaw Marczak >> > > I missed the separation (---) here and I see that you add ACK below the > changes. > Could you remove them from the tree? OK, done. You could try patman which handles this automatically. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 00/16] Power(full) framework based on Driver Model
Hi Przemyslaw, On 23 April 2015 at 05:33, Przemyslaw Marczak wrote: > Hello Simon, > > > On 04/22/2015 06:29 PM, Simon Glass wrote: >> >> Hi Przemyslaw, >> >> On 20 April 2015 at 12:07, Przemyslaw Marczak >> wrote: >>> >>> Hello, >>> Again the next version. The changes are described below each commit >>> message. >>> This is rebased on last u-boot-dm/master after apply this patchset: >>> https://patchwork.ozlabs.org/patch/462775/ >>> https://patchwork.ozlabs.org/patch/462777/ >>> https://patchwork.ozlabs.org/patch/462776/ >>> >>> This all can be found in here: >>> https://github.com/bobenstein/u-boot/tree/dm-pmic-v4 >>> >>> Best regards, >>> >>> Przemyslaw Marczak (16): >>>exynos5: fix build break by adding CONFIG_POWER >>>exynos4-common: remove the unsued CONFIG_CMD_PMIC >>>lib: Kconfig: add entry for errno_str() function >>>dm: pmic: add implementation of driver model pmic uclass >>>dm: regulator: add implementation of driver model regulator uclass >>>dm: pmic: add pmic command >>>dm: regulator: add regulator command >>>pmic: max77686 set the same compatible as in the kernel >>>dm: pmic: add max77686 pmic driver >>>dm: regulator: add max77686 regulator driver >>>dm: regulator: add fixed voltage regulator driver >>>doc: driver-model: pmic and regulator uclass documentation >>>dm: board:samsung: power_init_board: add requirement of CONFIG_DM_PMIC >>>odroid: board: add support to dm pmic api >>>odroid: dts: add 'voltage-regulators' description to max77686 node >>>odroid: config: enable dm pmic, dm regulator and max77686 driver >>> >>> Makefile | 3 +- >>> arch/arm/dts/exynos4412-odroid.dts | 255 ++- >>> arch/arm/dts/exynos4412-trats2.dts | 2 +- >>> arch/arm/dts/exynos5250-smdk5250.dts | 2 +- >>> arch/arm/dts/exynos5250-snow.dts | 2 +- >>> board/samsung/common/board.c | 4 +- >>> board/samsung/common/misc.c | 1 + >>> board/samsung/odroid/odroid.c| 77 ++- >>> common/Kconfig | 36 + >>> common/Makefile | 4 + >>> common/cmd_pmic.c| 231 +++ >>> common/cmd_regulator.c | 403 +++ >>> configs/odroid_defconfig | 8 +- >>> doc/device-tree-bindings/pmic/max77686.txt | 36 + >>> doc/device-tree-bindings/regulator/fixed.txt | 38 ++ >>> doc/device-tree-bindings/regulator/max77686.txt | 70 ++ >>> doc/device-tree-bindings/regulator/regulator.txt | 55 ++ >>> doc/driver-model/pmic-framework.txt | 142 >>> drivers/power/Kconfig| 8 + >>> drivers/power/Makefile | 1 - >>> drivers/power/pmic/Kconfig | 18 + >>> drivers/power/pmic/Makefile | 2 + >>> drivers/power/pmic/max77686.c| 87 +++ >>> drivers/power/pmic/pmic-uclass.c | 158 + >>> drivers/power/pmic/pmic_max77686.c | 2 +- >>> drivers/power/regulator/Kconfig | 33 + >>> drivers/power/regulator/Makefile | 10 + >>> drivers/power/regulator/fixed.c | 126 >>> drivers/power/regulator/max77686.c | 825 >>> +++ >>> drivers/power/regulator/regulator-uclass.c | 300 + >>> include/configs/exynos4-common.h | 1 - >>> include/configs/exynos5-common.h | 4 + >>> include/configs/odroid.h | 5 - >>> include/dm/uclass-id.h | 4 + >>> include/power/max77686_pmic.h| 29 +- >>> include/power/pmic.h | 189 ++ >>> include/power/regulator.h| 384 +++ >>> lib/Kconfig | 8 + >>> lib/fdtdec.c | 2 +- >>> 39 files changed, 3512 insertions(+), 53 deletions(-) >>> create mode 100644 common/cmd_pmic.c >>> create mode 100644 common/cmd_regulator.c >>> create mode 100644 doc/device-tree-bindings/pmic/max77686.txt >>> create mode 100644 doc/device-tree-bindings/regulator/fixed.txt >>> create mode 100644 doc/device-tree-bindings/regulator/max77686.txt >>> create mode 100644 doc/device-tree-bindings/regulator/regulator.txt >>> create mode 100644 doc/driver-model/pmic-framework.txt >>> create mode 100644 drivers/power/pmic/Kconfig >>> create mode 100644 drivers/power/pmic/max77686.c >>> create mode 100644 drivers/power/pmic/pmic-uclass.c >>> create mode 100644 drivers/power/regulator/Kconfig >>> create mode 100644 drivers/power/regulator/Makefile >>> create mode 100644 drivers/power/regula
Re: [U-Boot] [PATCH 4/4] x86: queensbay: Implement PIRQ routing
Hi Simon,
On Fri, Apr 24, 2015 at 11:39 AM, Simon Glass wrote:
> Hi Bin,
>
> On 23 April 2015 at 21:36, Bin Meng wrote:
>> Hi Simon,
>>
>> On Fri, Apr 24, 2015 at 11:02 AM, Simon Glass wrote:
>>> Hi Bin,
>>>
>>> On 21 April 2015 at 19:56, Bin Meng wrote:
Implement Intel Queensbay platform-specific PIRQ routing support.
The chipset PIRQ routing setup is called in the arch_mist_init().
>>>
>>> arch_misc_init()?
>>
>> Will fix.
>>
>>> Also how can this be used on other boards? Should part of this code be
>>> moved to a generic place?
>>
>> Generally Intel interrupt router should be compatible, but the offsets
>> of these interrupt routing registers might be different from platform
>> to platform. The platform-specific part is the internal PCI devices'
>> interrupt pin to PIRQ map.
>>
Signed-off-by: Bin Meng
---
arch/x86/cpu/queensbay/Makefile | 2 +-
arch/x86/cpu/queensbay/irq.c | 236
+++
arch/x86/cpu/queensbay/tnc.c | 10 +-
arch/x86/include/asm/arch-queensbay/device.h | 94 +++
arch/x86/include/asm/arch-queensbay/irq.h| 55 +++
arch/x86/include/asm/arch-queensbay/tnc.h| 26 ++-
arch/x86/include/asm/u-boot-x86.h| 2 +
configs/crownbay_defconfig | 1 +
include/configs/crownbay.h | 1 +
9 files changed, 423 insertions(+), 4 deletions(-)
create mode 100644 arch/x86/cpu/queensbay/irq.c
create mode 100644 arch/x86/include/asm/arch-queensbay/device.h
create mode 100644 arch/x86/include/asm/arch-queensbay/irq.h
> [snip]
>
+ writew(PIRQE, rcba + D02IR);
+ writew(PIRQF, rcba + D03IR);
+ writew(PIRQG, rcba + D27IR);
+ writew(PIRQH, rcba + D31IR);
+ writew(PIRQE, rcba + D23IR);
+ writew(PIRQF, rcba + D24IR);
+ writew(PIRQG, rcba + D25IR);
+ writew(PIRQH, rcba + D26IR);
+
+ if (!create_pirq_routing_table()) {
>>>
>>> Can you add a comment here as to why you do this next bit if
>>> create_pirq_routing_table() fails?
>>
>> I am not sure if you misread the codes? If create_pirq_routing_table()
>> fails, it returns non-zero value and the following pirq_route_irqs()
>> will not be called.
>
> Yes I misread it. So should this function return the error code it
> gets? Or maybe add debug()?
Yep, adding one debug() is nice. Will do that in v2.
>>
+ /* Route PIRQ */
+ pirq_route_irqs(pirq_routing_table->slots,
+ get_irq_slot_count(pirq_routing_table));
+ }
+}
+
Regards,
Bin
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Re: [U-Boot] [PATCH v4 04/16] dm: pmic: add implementation of driver model pmic uclass
Hi Przemyslaw, On 23 April 2015 at 05:33, Przemyslaw Marczak wrote: > Hello Simon, > > > On 04/22/2015 06:30 PM, Simon Glass wrote: >> >> Hi Przemyslaw, >> >> On 20 April 2015 at 12:07, Przemyslaw Marczak >> wrote: >>> >>> This commit introduces the PMIC uclass implementation. >>> It allows providing the basic I/O interface for PMIC devices. >>> For the multi-function PMIC devices, this can be used as I/O >>> parent device, for each IC's interface. Then, each PMIC particular >>> function can be provided by the child device's operations, and the >>> child devices will use its parent for read/write by the common API. >>> >>> Core files: >>> - 'include/power/pmic.h' >>> - 'drivers/power/pmic/pmic-uclass.c' >>> >>> The old pmic framework is still kept and is independent. >>> >>> For more detailed informations, please look into the header file. >>> >>> Changes: >>> - new uclass-id: UCLASS_PMIC >>> - new config: CONFIG_DM_PMIC >>> >>> Signed-off-by: Przemyslaw Marczak >>> --- >>> Changes V2: >>> - pmic uclass: adjust uclass code to the mainline changes >>> - pmic uclass: remove pmic_i2c and pmic_spi >>> - pmic uclass: modify pmic_platdata >>> - pmic uclass: add pmic_if_* functions >>> - pmic uclass: remove pmic_init_dm() >>> - pmic uclass: cleanup >>> - pmic.h: define pmic ops structure (read/write operations) >>> - pmic.h: add comments to functions >>> >>> Changes V3: >>> - pmic-uclass.c and pmic.h: >>>-- remove pmic_if_* functions >>>-- add new function pmic_child_node_scan() >>> - add Kconfig entry >>> >>> Changes V4: >>> - move drivers/power/pmic-uclass.c to drivers/power/pmic/pmic-uclass.c >>> - move DM_PMIC Kconfig entry: drivers/power/Kconfig to >>> drivers/power/pmic/Kconfig >>> - drivers/power/Kconfig: Add menu "Power" and include pmic Kconfig >>> - Kconfig: provide only the general information about the PMIC >>> - pmic-uclass.c: add pmic_bind_childs() >>> - pmic-uclass.c: add debug >>> - pmic-uclass.c: cleanup includes >>> - pmic-uclass.c: remove pmic_get_uclass_ops() and use of >>> dev_get_driver_ops() >>> - pmic-uclass.c: use of uclass_get_device_by_name() >>> - pmic-uclass.c: add str_get_num() - for get number from string >>> - include/power/pmic.h - start comments rewording >>> - power/pmic.h: comments update >>> --- >>> drivers/power/Kconfig| 6 ++ >>> drivers/power/pmic/Kconfig | 11 +++ >>> drivers/power/pmic/Makefile | 1 + >>> drivers/power/pmic/pmic-uclass.c | 158 >>> include/dm/uclass-id.h | 3 + >>> include/power/pmic.h | 189 >>> +++ >>> 6 files changed, 368 insertions(+) >>> create mode 100644 drivers/power/pmic/Kconfig >>> create mode 100644 drivers/power/pmic/pmic-uclass.c >> >> >> Acked-by: Simon Glass >> >> I have a few nits below - perhaps they can be targeted in a follow-up >> patch or two? I'd like to merge this soon and it is not worth holding >> up the series for nits. >> > > That's good information. I will fix it all and resend ASAP. > > >>> >>> diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig >>> index f8f0239..d03626e 100644 >>> --- a/drivers/power/Kconfig >>> +++ b/drivers/power/Kconfig >>> @@ -1,3 +1,7 @@ >>> +menu "Power" >>> + >>> +source "drivers/power/pmic/Kconfig" >>> + >>> config AXP221_POWER >>> boolean "axp221 / axp223 pmic support" >>> depends on MACH_SUN6I || MACH_SUN8I >>> @@ -73,3 +77,5 @@ config AXP221_ELDO3_VOLT >>> disable eldo3. On some A31(s) tablets it might be used to supply >>> 1.2V for the SSD2828 chip (converter of parallel LCD interface >>> into MIPI DSI). >>> + >>> +endmenu >>> diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig >>> new file mode 100644 >>> index 000..d06d632 >>> --- /dev/null >>> +++ b/drivers/power/pmic/Kconfig >>> @@ -0,0 +1,11 @@ >>> +config DM_PMIC >>> + bool "Enable Driver Model for PMIC drivers (UCLASS_PMIC)" >>> + depends on DM >>> + ---help--- >>> + This config enables the driver-model PMIC support. >>> + UCLASS_PMIC - designed to provide an I/O interface for PMIC >>> devices. >>> + For the multi-function PMIC devices, this can be used as parent >>> I/O >>> + device for each IC's interface. Then, each children uses its >>> parent >>> + for read/write. For detailed description, please refer to the >>> files: >>> + - 'drivers/power/pmic/pmic-uclass.c' >>> + - 'include/power/pmic.h' >>> diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile >>> index 985cfdb..594f620 100644 >>> --- a/drivers/power/pmic/Makefile >>> +++ b/drivers/power/pmic/Makefile >>> @@ -5,6 +5,7 @@ >>> # SPDX-License-Identifier: GPL-2.0+ >>> # >>> >>> +obj-$(CONFIG_DM_PMIC) += pmic-uclass.o >>> obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o >>> obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o >>> obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o >>> diff --
Re: [U-Boot] [PATCH v4 07/16] dm: regulator: add regulator command
Hi Przemyslaw,
On 23 April 2015 at 05:33, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 04/22/2015 06:30 PM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 20 April 2015 at 12:07, Przemyslaw Marczak
>> wrote:
>>>
>>> This command is based on driver model regulator's API.
>>> The user interface provides:
>>> - list UCLASS regulator devices
>>> - show or [set] operating regulator device
>>> - print constraints info
>>> - print operating status
>>> - print/[set] voltage value [uV] (force)
>>> - print/[set] current value [uA]
>>> - print/[set] operating mode id
>>> - enable the regulator output
>>> - disable the regulator output
>>>
>>> The 'force' option can be used for setting the value which exceeds
>>> the constraints min/max limits.
>>>
>>> Signed-off-by: Przemyslaw Marczak
>>> ---
>>> Changes v3:
>>> - new file
>>> - Kconfig entry
>>>
>>> Changes V4:
>>> - cmd regulator: move platdata to uc pdata
>>> - cmd_regulator: includes cleanup
>>> - cmd_regulator: add get_curr_dev_and_pl() check type
>>> - move config name: CONFIG_DM_REGULATOR_CMD to CONFIG_CMD_REGULATOR
>>> - common/Kconfig - cleanup
>>> ---
>>> common/Kconfig | 22 +++
>>> common/Makefile| 1 +
>>> common/cmd_regulator.c | 403
>>> +
>>> 3 files changed, 426 insertions(+)
>>> create mode 100644 common/cmd_regulator.c
>>
>>
>> Acked-by: Simon Glass
>>
>> I have a few nits that could be dealt with by a follow-on patch.
>>
>
> Ok.
>
>
>>>
>>> diff --git a/common/Kconfig b/common/Kconfig
>>> index 4666f8e..52f8bb1 100644
>>> --- a/common/Kconfig
>>> +++ b/common/Kconfig
>>> @@ -470,5 +470,27 @@ config CMD_PMIC
>>>- pmic read address - read byte of register at address
>>>- pmic write address - write byte to register at address
>>>The only one change for this command is 'dev' subcommand.
>>> +
>>> +config CMD_REGULATOR
>>> + bool "Enable Driver Model REGULATOR command"
>>> + depends on DM_REGULATOR
>>> + help
>>> + This command is based on driver model regulator's API.
>>> + User interface features:
>>> + - list - list regulator devices
>>> + - regulator dev - show or [set] operating regulator device
>>> + - regulator info - print constraints info
>>> + - regulator status - print operating status
>>> + - regulator value - print/[set] voltage value [uV]
>>> + - regulator current - print/[set] current value [uA]
>>> + - regulator mode - print/[set] operating mode id
>>> + - regulator enable - enable the regulator output
>>> + - regulator disable - disable the regulator output
>>> +
>>> + The '-f' (force) option can be used for set the value which
>>> exceeds
>>> + the limits, which are found in device-tree and are kept in
>>> regulator's
>>> + uclass platdata structure.
>>> +
>>> endmenu
>>> +
>>> endmenu
>>> diff --git a/common/Makefile b/common/Makefile
>>> index 87a3efe..93bded3 100644
>>> --- a/common/Makefile
>>> +++ b/common/Makefile
>>> @@ -212,6 +212,7 @@ obj-$(CONFIG_CMD_GPT) += cmd_gpt.o
>>>
>>> # Power
>>> obj-$(CONFIG_CMD_PMIC) += cmd_pmic.o
>>> +obj-$(CONFIG_CMD_REGULATOR) += cmd_regulator.o
>>> endif
>>>
>>> ifdef CONFIG_SPL_BUILD
>>> diff --git a/common/cmd_regulator.c b/common/cmd_regulator.c
>>> new file mode 100644
>>> index 000..b1b9e87
>>> --- /dev/null
>>> +++ b/common/cmd_regulator.c
>>> @@ -0,0 +1,403 @@
>>> +/*
>>> + * Copyright (C) 2014-2015 Samsung Electronics
>>> + * Przemyslaw Marczak
>>> + *
>>> + * SPDX-License-Identifier:GPL-2.0+
>>> + */
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +
>>> +#define LIMIT_SEQ 3
>>> +#define LIMIT_DEVNAME 20
>>> +#define LIMIT_OFNAME 20
>>> +#define LIMIT_INFO 16
>>> +
>>> +static struct udevice *currdev;
>>> +
>>> +static int failed(const char *getset, const char *thing,
>>> + const char *for_dev, int ret)
>>> +{
>>> + printf("Can't %s %s %s.\nError: %d (%s)\n", getset, thing,
>>> for_dev,
>>> + ret, errno_str(ret));
>>
>>
>> blank line here.
>
>
> I don't see the blank line here in the patch, which I send.
Odd, there seem to be two blank lines there, and we only need one.
>
>>
>> I worry that if someone gets one of these messages they will not be
>> able to find it in the source code. How about passing in the full
>> printf() string in each case, or just using printf() in situ? I don't
>> think the code space saving is significant.
>>
>
> It's not a debug message. And each one is different, and easy to grep
> "failed". The code is a little cleaner with this. Also the command code is
> not complicated.
git grep -i failed |wc -l
2089
Is there some way to know it is a PMIC error message, and find it that way?
>
>>> + return CMD_RET_FAILURE;
>>> +
Re: [U-Boot] [PATCH 3/4] x86: gpio: add pinctrl support from the device tree
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote:
> A set of properties has been defined for the device tree to select for
> each pin the pull/func/default output configuration.
>
> The offset for the PAD needs to be provided and if a GPIO needs to be
> configured, his offset needs to be provided as well.
>
> Here is an example:
> pin_usb_host_en0@0 {
> gpio-offset = <0x80 8>;
> pad-offset = <0x260>;
> mode-gpio;
> output-value = <1>;
> direction = ;
> };
>
> Signed-off-by: Gabriel Huau
> ---
> arch/x86/dts/minnowmax.dts| 21 +++
> arch/x86/include/asm/arch-baytrail/gpio.h | 1 +
> arch/x86/include/asm/gpio.h | 1 +
> drivers/gpio/intel_ich6_gpio.c| 222
> ++
> include/dt-bindings/gpio/gpio.h | 20 +++
> 5 files changed, 239 insertions(+), 26 deletions(-)
>
> diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
> index c73e421..3936e21 100644
> --- a/arch/x86/dts/minnowmax.dts
> +++ b/arch/x86/dts/minnowmax.dts
> @@ -6,6 +6,8 @@
>
> /dts-v1/;
>
> +#include
> +
> /include/ "skeleton.dtsi"
> /include/ "serial.dtsi"
>
> @@ -21,6 +23,25 @@
> silent_console = <0>;
> };
>
> + pch_pinctrl {
> + compatible = "intel,ich6-pinctrl";
I guess the prefix 'ich6' is debatable.
> + pin_usb_host_en0@0 {
> + gpio-offset = <0x80 8>;
> + pad-offset = <0x260>;
> + mode-gpio;
> + output-value = <1>;
> + direction = ;
> + };
> +
> + pin_usb_host_en1@0 {
> + gpio-offset = <0x80 9>;
> + pad-offset = <0x258>;
> + mode-gpio;
> + output-value = <1>;
> + direction = ;
> + };
> + };
> +
> gpioa {
> compatible = "intel,ich6-gpio";
> u-boot,dm-pre-reloc;
> diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h
> b/arch/x86/include/asm/arch-baytrail/gpio.h
> index 4e8987c..85a65a8 100644
> --- a/arch/x86/include/asm/arch-baytrail/gpio.h
> +++ b/arch/x86/include/asm/arch-baytrail/gpio.h
> @@ -9,5 +9,6 @@
>
> /* Where in config space is the register that points to the GPIO registers?
> */
> #define PCI_CFG_GPIOBASE 0x48
> +#define PCI_CFG_IOBASE 0x4c
>
> #endif /* _X86_ARCH_GPIO_H_ */
> diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
> index 1099427..ed85b08 100644
> --- a/arch/x86/include/asm/gpio.h
> +++ b/arch/x86/include/asm/gpio.h
> @@ -147,6 +147,7 @@ struct pch_gpio_map {
> } set3;
> };
>
> +int gpio_ich6_pinctrl_init(void);
> void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
> void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
>
> diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
> index 7e679a0..a110d5b 100644
> --- a/drivers/gpio/intel_ich6_gpio.c
> +++ b/drivers/gpio/intel_ich6_gpio.c
> @@ -44,21 +44,32 @@ struct ich6_bank_priv {
> uint16_t lvl;
> };
>
> +#define GPIO_USESEL_OFFSET(x) (x)
> +#define GPIO_IOSEL_OFFSET(x) (x + 4)
> +#define GPIO_LVL_OFFSET(x) (x + 8)
>
> +#define IOPAD_MODE_MASK0x7
> +#define IOPAD_PULL_ASSIGN_MASK 0x3
> +#define IOPAD_PULL_ASSIGN_SHIFT7
> +#define IOPAD_PULL_STRENGTH_MASK 0x3
> +#define IOPAD_PULL_STRENGTH_SHIFT 9
> +
> +static int __ich6_gpio_set_value(uint16_t base, unsigned offset, int value);
> +static int __ich6_gpio_set_direction(uint16_t base, unsigned offset, int
> dir);
> +static int __ich6_gpio_set_function(uint16_t base, unsigned offset, int
> func);
> +
> /* TODO: Move this to device tree, or platform data */
> void ich_gpio_set_gpio_map(const struct pch_gpio_map *map)
> {
> gd->arch.gpio_map = map;
> }
>
> -static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
> +static int gpio_ich6_get_base(unsigned long base)
> {
> - struct ich6_bank_platdata *plat = dev_get_platdata(dev);
> pci_dev_t pci_dev; /* handle for 0:1f:0 */
> u8 tmpbyte;
> u16 tmpword;
> u32 tmplong;
> - u16 gpiobase;
> - int offset;
>
> /* Where should it be? */
> pci_dev = PCI_BDF(0, 0x1f, 0);
> @@ -123,9 +134,9 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice
> *dev)
> * while on the Ivybridge the bit0 is used to indicate it is an
> * I/O space.
> */
> - tmplong = x86_pci_read_config32(pci_dev, PCI_CFG_GPIOBASE);
> + tmplong = x86_pci_read_config32(pci_dev, base);
> if (tmplong == 0x || tmplong == 0x) {
> - debug("%s: unexpected GPIOBASE value\n", __func__);
> + debug("%s: unexpected BASE value\n", __func__);
> return -ENODE
Re: [U-Boot] [PATCH 4/4] x86: queensbay: Implement PIRQ routing
Hi Bin,
On 21 April 2015 at 19:56, Bin Meng wrote:
> Implement Intel Queensbay platform-specific PIRQ routing support.
> The chipset PIRQ routing setup is called in the arch_mist_init().
arch_misc_init()?
Also how can this be used on other boards? Should part of this code be
moved to a generic place?
>
> Signed-off-by: Bin Meng
>
> ---
>
> arch/x86/cpu/queensbay/Makefile | 2 +-
> arch/x86/cpu/queensbay/irq.c | 236
> +++
> arch/x86/cpu/queensbay/tnc.c | 10 +-
> arch/x86/include/asm/arch-queensbay/device.h | 94 +++
> arch/x86/include/asm/arch-queensbay/irq.h| 55 +++
> arch/x86/include/asm/arch-queensbay/tnc.h| 26 ++-
> arch/x86/include/asm/u-boot-x86.h| 2 +
> configs/crownbay_defconfig | 1 +
> include/configs/crownbay.h | 1 +
> 9 files changed, 423 insertions(+), 4 deletions(-)
> create mode 100644 arch/x86/cpu/queensbay/irq.c
> create mode 100644 arch/x86/include/asm/arch-queensbay/device.h
> create mode 100644 arch/x86/include/asm/arch-queensbay/irq.h
>
> diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile
> index d8761fd..4599a48 100644
> --- a/arch/x86/cpu/queensbay/Makefile
> +++ b/arch/x86/cpu/queensbay/Makefile
> @@ -5,5 +5,5 @@
> #
>
> obj-y += fsp_configs.o
> -obj-y += tnc.o topcliff.o
> +obj-y += irq.o tnc.o topcliff.o
> obj-$(CONFIG_PCI) += tnc_pci.o
> diff --git a/arch/x86/cpu/queensbay/irq.c b/arch/x86/cpu/queensbay/irq.c
> new file mode 100644
> index 000..cf433d3
> --- /dev/null
> +++ b/arch/x86/cpu/queensbay/irq.c
> @@ -0,0 +1,236 @@
> +/*
> + * Copyright (C) 2015, Bin Meng
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +static struct irq_routing_table *pirq_routing_table;
> +
> +bool pirq_check_irq_routed(int link, u8 irq)
> +{
> + u8 pirq;
> +
> + pirq = x86_pci_read_config8(TNC_LPC, LINK_N2V(link));
> + pirq &= 0xf;
> +
> + /* IRQ# 0/1/2/8/13 are reserved */
> + if (pirq < 3 || pirq == 8 || pirq == 13)
> + return false;
> +
> + return pirq == irq ? true : false;
> +}
> +
> +int pirq_translate_link(int link)
> +{
> + return LINK_V2N(link);
> +}
> +
> +void pirq_assign_irq(int link, u8 irq)
> +{
> + /* IRQ# 0/1/2/8/13 are reserved */
> + if (irq < 3 || irq == 8 || irq == 13)
> + return;
> +
> + x86_pci_write_config8(TNC_LPC, LINK_N2V(link), irq);
> +}
> +
> +static inline void fill_irq_info(struct irq_info **slot, int *entries, u8
> bus,
> +u8 device, u8 func, u8 pin, u8 pirq)
> +{
Please declare a local variable
struct irq_info *slot = *slotp;
and rename the param to slotp, to avoid the first four (*slot).
> + (*slot)->bus = bus;
> + (*slot)->devfn = (device << 3) | func;
> + (*slot)->irq[pin - 1].link = LINK_N2V(pirq);
> + (*slot)->irq[pin - 1].bitmap = PIRQ_BITMAP;
> + (*entries)++;
> + (*slot)++;
> +}
> +
> +/* PCIe port downstream INTx swizzle */
> +static inline u8 pin_swizzle(u8 pin, int port)
> +{
> + return (pin + port) % 4;
> +}
> +
> +__weak int board_fill_irq_info(struct irq_info *slot)
> +{
> + return 0;
> +}
> +
> +static int create_pirq_routing_table(void)
> +{
> + struct irq_routing_table *rt;
> + struct irq_info *slot;
> + int irq_entries = 0;
> + pci_dev_t tcf_bdf;
> + u8 tcf_bus, bus;
> + int i;
> +
> + rt = malloc(sizeof(struct irq_routing_table));
> + if (!rt)
> + return -ENOMEM;
> + memset((char *)rt, 0, sizeof(struct irq_routing_table));
> +
> + /* Populate the PIRQ table fields */
> + rt->signature = PIRQ_SIGNATURE;
> + rt->version = PIRQ_VERSION;
> + rt->rtr_bus = 0;
> + rt->rtr_devfn = (TNC_LPC_DEV << 3) | TNC_LPC_FUNC;
> + rt->rtr_vendor = PCI_VENDOR_ID_INTEL;
> + rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
> +
> + slot = rt->slots;
> +
> + /*
> +* Now fill in the irq_info entries in the PIRQ table
> +*
> +* We start from internal TunnelCreek PCI devices first, then
> +* followed by all the 4 PCIe ports downstream devices, including
> +* the Queensbay platform Topcliff chipset devices.
> +*/
> + fill_irq_info(&slot, &irq_entries, 0, TNC_IGD_DEV,
> + TNC_IGD_FUNC, INTA, PIRQE);
> + fill_irq_info(&slot, &irq_entries, 0, TNC_SDVO_DEV,
> + TNC_SDVO_FUNC, INTA, PIRQF);
> + fill_irq_info(&slot, &irq_entries, 0, TNC_HDA_DEV,
> + TNC_HDA_FUNC, INTA, PIRQG);
> + fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE0_DEV,
> + TNC_PCIE0_FUNC, INTA, PIRQE);
> + fill_irq_info(&sl
Re: [U-Boot] [PATCH 1/4] x86: Add a function to assign IRQ numbers to PCI device
On 21 April 2015 at 19:56, Bin Meng wrote: > Add a function to assign an IRQ number to PCI device's interrupt > line register in its configuration space, so that the PCI device > can have its interrupt working under PIC mode after OS boots up. > > Signed-off-by: Bin Meng > --- > > arch/x86/cpu/pci.c | 21 + > arch/x86/include/asm/pci.h | 14 ++ > 2 files changed, 35 insertions(+) Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v4, 7/7] colibri_vf: Enable USB support for Colibri Vybrid
On Fri, Apr 17, 2015 at 06:56:42PM +0530, Sanchayan Maity wrote: > Enable USB support on Toradex Colibri Vybrid Modules. > > Signed-off-by: Sanchayan Maity > Acked-by: Marek Vasut Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] unassigned-patches/146: Re: [PATCH 2/4] x86: minnowmax: add GPIO banks in the device tree
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote:
> There is 6 banks:
There are
> 4 banks for CORE: available in S0 mode
> 2 banks for SUS (Suspend): available in S0-S5 mode
>
> Signed-off-by: Gabriel Huau
> ---
> arch/x86/dts/minnowmax.dts | 42 ++
> 1 file changed, 42 insertions(+)
>
> diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
> index 8f34369..c73e421 100644
> --- a/arch/x86/dts/minnowmax.dts
> +++ b/arch/x86/dts/minnowmax.dts
> @@ -21,6 +21,48 @@
> silent_console = <0>;
> };
>
> + gpioa {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0 0x20>;
> + bank-name = "A";
> + };
> +
> + gpiob {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0x20 0x20>;
> + bank-name = "B";
> + };
> +
> + gpioc {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0x40 0x20>;
> + bank-name = "C";
> + };
> +
> + gpiod {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0x60 0x20>;
> + bank-name = "D";
> + };
> +
> + gpioe {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0x80 0x20>;
> + bank-name = "E";
> + };
> +
> + gpiof {
> + compatible = "intel,ich6-gpio";
> + u-boot,dm-pre-reloc;
> + reg = <0xA0 0x20>;
> + bank-name = "F";
> + };
> +
> chosen {
> stdout-path = "/serial";
> };
> --
Reviewed-by: Bin Meng
---
Added to GNATS database as unassigned-patches/146
>Responsible:patch-coord
>Message-Id:
>
>In-Reply-To:<1429805775-1809-3-git-send-email-cont...@huau-gabriel.fr>
>References: <1429805775-1809-1-git-send-email-cont...@huau-gabriel.fr>
><1429805775-1809-3-git-send-email-cont...@huau-gabriel.fr>
>Patch-Date: Fri Apr 24 04:03:19 +0200 2015
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Re: [U-Boot] [PATCH] drivers: usb: fsl: Workaround for Erratum A004477
> -Original Message-
> From: Sun York-R58495
> Sent: Friday, April 24, 2015 9:10 AM
> To: Badola Nikhil-B46172; Albert ARIBAUD
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH] drivers: usb: fsl: Workaround for Erratum
> A004477
>
>
>
> On 04/09/2015 08:29 PM, nikhil.bad...@freescale.com wrote:
> >> -Original Message-
> >> From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
> >> Sent: Friday, November 21, 2014 6:00 PM
> >> To: Badola Nikhil-B46172
> >> Cc: u-boot@lists.denx.de
> >> Subject: Re: [U-Boot] [PATCH] drivers: usb: fsl: Workaround for
> >> Erratum
> >> A004477
> >>
> >> Hello Nikhil,
> >>
> >> On Fri, 21 Nov 2014 17:25:21 +0530, Nikhil Badola
> >> wrote:
> >>> Add a delay of 1 microsecond before issuing soft reset to the
> >>> controller to let ongoing ULPI transaction complete.
> >>> This prevents corruption of ULPI Function Control Register which
> >>> eventually prevents phy clock from entering to low power mode
> >>>
> >>> Signed-off-by: Nikhil Badola
> >>> ---
> >>> Depends on patch https://patchwork.ozlabs.org/patch/404879/
> >>>
> >>> arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4
> >>> arch/powerpc/include/asm/config_mpc85xx.h | 6 ++
> >>> drivers/usb/host/ehci-fsl.c | 10 ++
> >>> include/fsl_usb.h | 29
> >>> +
> >>> 4 files changed, 49 insertions(+)
> >>>
> >>> diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> >>> b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> >>> index fe3eb06..bc59352 100644
> >>> --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> >>> +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> >>> @@ -298,6 +298,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int
> >>> flag, int
> >> argc, char * const argv[])
> >>> if (has_erratum_a007798())
> >>> puts("Work-around for Erratum A007798 enabled\n");
> >> #endif
> >>> +#ifdef CONFIG_SYS_FSL_ERRATUM_A004477
> >>> + if (has_erratum_a004477())
> >>> + puts("Work-around for Erratum A004477 enabled\n"); #endif
> >>> #ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
> >>> if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
> >>> (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV)) diff --git
> >>> a/arch/powerpc/include/asm/config_mpc85xx.h
> >>> b/arch/powerpc/include/asm/config_mpc85xx.h
> >>> index 7860b40..fe9e9c1 100644
> >>> --- a/arch/powerpc/include/asm/config_mpc85xx.h
> >>> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
> >>> @@ -161,6 +161,7 @@
> >>> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define
> >>> CONFIG_SYS_FSL_ERRATUM_A007075 #define
> >> CONFIG_SYS_FSL_ERRATUM_A006261
> >>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
> >>> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
> >>> #define CONFIG_ESDHC_HC_BLK_ADDR
> >>>
> >>> @@ -292,6 +293,7 @@
> >>> #define CONFIG_FSL_SATA_ERRATUM_A001 #define
> >>> CONFIG_SYS_FSL_ERRATUM_A004508 #define
> >>> CONFIG_SYS_FSL_ERRATUM_A005125
> >>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
> >>>
> >>> #elif defined(CONFIG_P1023)
> >>> #define CONFIG_MAX_CPUS 2
> >>> @@ -372,6 +374,7 @@
> >>> #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
> >>> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define
> >>> CONFIG_SYS_FSL_ERRATUM_A005125
> >>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
> >>> #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
> >>>
> >>> #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ @@ -589,6
> >>> +592,7 @@ #define CONFIG_NAND_FSL_IFC #define
> >>> CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define
> >>> CONFIG_SYS_FSL_ERRATUM_A005125
> >>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
> >>> #define CONFIG_ESDHC_HC_BLK_ADDR
> >>>
> >>> #elif defined(CONFIG_BSC9132)
> >>> @@ -613,6 +617,7 @@
> >>> #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
> >>> #define CONFIG_SYS_FSL_ERRATUM_A005125 #define
> >>> CONFIG_SYS_FSL_ERRATUM_A005434
> >>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
> >>> #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
> >>> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
> >>> #define CONFIG_ESDHC_HC_BLK_ADDR
> >>> @@ -712,6 +717,7 @@
> >>> #define CONFIG_SYS_FSL_ERRATUM_A006475 #define
> >>> CONFIG_SYS_FSL_ERRATUM_A006384 #define
> >> CONFIG_SYS_FSL_ERRATUM_A007212
> >>> +#define CONFIG_SYS_FSL_ERRATUM_A004477
> >>> #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe00
> >>> #define CONFIG_SYS_FSL_SFP_VER_3_0
> >>>
> >>> diff --git a/drivers/usb/host/ehci-fsl.c
> >>> b/drivers/usb/host/ehci-fsl.c index 5d4288d..41ff1a7 100644
> >>> --- a/drivers/usb/host/ehci-fsl.c
> >>> +++ b/drivers/usb/host/ehci-fsl.c
> >>> @@ -138,6 +138,16 @@ int ehci_hcd_init(int index, enum usb_init_type
> >> init,
> >>> if (has_erratum_a007798())
> >>> set_txfifothresh(ehci, TXFIFOTHRESH);
> >>>
> >>> + if (has_erratum_a004477()) {
> >>> + /*
> >>> + * When reset is issued while any ULPI transaction is ongoing
> >>> + * then it may result to corruption of ULPI Function Control
> >>> + *
[U-Boot] unassigned-patches/147: Re: [PATCH 2/4] x86: minnowmax: add GPIO banks in the device tree
On 23 April 2015 at 10:16, Gabriel Huau wrote: > There is 6 banks: > 4 banks for CORE: available in S0 mode > 2 banks for SUS (Suspend): available in S0-S5 mode > > Signed-off-by: Gabriel Huau > --- > arch/x86/dts/minnowmax.dts | 42 ++ > 1 file changed, 42 insertions(+) Acked-by: Simon Glass --- Added to GNATS database as unassigned-patches/147 >Responsible:patch-coord >Message-Id: > >In-Reply-To:<1429805775-1809-3-git-send-email-cont...@huau-gabriel.fr> >References: <1429805775-1809-1-git-send-email-cont...@huau-gabriel.fr> ><1429805775-1809-3-git-send-email-cont...@huau-gabriel.fr> >Patch-Date: Fri Apr 24 05:26:17 +0200 2015 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] unassigned-patches/148: Re: [PATCH 0/4] x86: support of pin-muxing from device tree
Hi Gabriel, On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote: > This serie of patches adds the support of pin-muxing from the device tree > through > different properties. I have put two example to enable the USB Host on the > minnowboard max. > > The support of the call to 'setup_pch_gpios' is still supported and > only the minnowboard has been tested with the device tree implementation. > > Because the GPIO and IO base register ares different, I have also defined > some proxy function to set the function/value and direction of the GPIO as > the GPIO register can override some registers in the IO. > > Gabriel Huau (4): > x86: baytrail: fix the GPIOBASE address > x86: minnowmax: add GPIO banks in the device tree > x86: gpio: add pinctrl support from the device tree > x86: minnowmax: initialize the pin-muxing from device tree > > arch/x86/dts/minnowmax.dts| 63 + > arch/x86/include/asm/arch-baytrail/gpio.h | 3 +- > arch/x86/include/asm/gpio.h | 1 + > board/intel/minnowmax/minnowmax.c | 9 ++ > drivers/gpio/intel_ich6_gpio.c| 222 > ++ > include/configs/minnowmax.h | 1 + > include/dt-bindings/gpio/gpio.h | 20 +++ > 7 files changed, 292 insertions(+), 27 deletions(-) > > -- Thanks for these patches! Just a general comment, you don't need send emails to u-boot-patc...@bugs.denx.de, and always include a simple sentence in the commit message :) Regards, Bin --- Added to GNATS database as unassigned-patches/148 >Responsible:patch-coord >Message-Id: > >In-Reply-To:<1429805775-1809-1-git-send-email-cont...@huau-gabriel.fr> >References: <1429805775-1809-1-git-send-email-cont...@huau-gabriel.fr> >Patch-Date: Fri Apr 24 05:23:35 +0200 2015 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] x86: minnowmax: use the correct NOR in the configuration
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote:
> The SPI NOR on the minnowboard max is a MICRON N25Q064A
>
> Signed-off-by: Gabriel Huau
> ---
> include/configs/minnowmax.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
> index 3c7b266..72393fa 100644
> --- a/include/configs/minnowmax.h
> +++ b/include/configs/minnowmax.h
> @@ -43,7 +43,7 @@
>
> #define CONFIG_SCSI_DEV_LIST\
> {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}
> -#define CONFIG_SPI_FLASH_SST
> +#define CONFIG_SPI_FLASH_STMICRO
>
> #define CONFIG_MMC
> #define CONFIG_SDHCI
> --
I think you need also update minnowmax.dts file to change the compatible string.
Regards,
Bin
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Re: [U-Boot] [PATCH v3 0/7] Add support for Colibri Vybrid Modules
On Thursday, April 23, 2015 at 03:13:51 PM, Tom Rini wrote:
> On Thu, Apr 23, 2015 at 06:08:43PM +0530, maitysancha...@gmail.com wrote:
> > Hello,
> >
> > On 15-04-15 16:24:21, Sanchayan Maity wrote:
> > > Hello,
> > >
> > > This is the third version of the patchset which adds support for the
> > > Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested
> > > using the serial loader over UART. Compile tested for
> > > vf610twr_defconfig and vf610twr_nand_defconfig as well.
> > >
> > > First patch in the series refactors the DDR related code for use by
> > > both the tower board and colibri modules. It also introduces a DDR3
> > > based JEDEC timing structure.
> > >
> > > Second third and fourth patch in this series are improvement patches
> > > related to RTC, SoC/CPU detection and caches.
> > >
> > > Fifth patch introduces USB support for Vybrid modules. Much of the code
> > > is similar to the ehci-mx6 driver. Both host and client modes are
> > > working and DFU has also been tested with client. Currently, we
> > > restrict the ports to be in one of host and client mode.
> > >
> > > Sixth patch adds the actual support for the Colibri modules.
> > >
> > > Comments and feedback are most welcome. Thanks for the feedback till
> > > now.
> > >
> > > The patchset is based and tested on the latest master branch as of
> > > this writing.
> > >
> > > Discussion on the version 2 of the patchset can be found at the below
> > > link:
> > > https://www.mail-archive.com/u-boot@lists.denx.de/msg168727.html
> > >
> > > Discussion on the version 1 of the patchset can be found at the below
> > > link:
> > > https://www.mail-archive.com/u-boot@lists.denx.de/msg168136.html
> > >
> > > Changes since v2:
> > > - Rework the USB driver to use register + offset method in light of
> > > discussion which Fabio Estevam pointed out instead of the regular
> > > struct{} method which v2 used. The discussion is at the below link:
> > > https://www.marc.info/?l=u-boot&m=142609602127309&w=2
> > >
> > > - Reorder the patchset, putting the USB support in the end and add an
> > > additional patch for adding USB support to Colibri modules. By chance
> > > if more discussions happen on the USB support, this allows picking up
> > > of atleast the first patches on which no issues have been reported so
> > > far.
> > >
> > > - The register definitions have been moved under arch/arm/include/asm/
> > > imx-common in the regs-usbphy.h file. This was agreed on after
> > > discussion with Marek and some input from Peter Chen. Since it is not
> > > clear if SoC's other than Freescale's use the Sigmatel Phy's which seem
> > > to be use in iMX/VF/MXS, put the USH PHY register definitions in
> > > imx-common rather than include/usb in a chipidea specific file.
> > >
> > > - Remove setting of a PLL divisor select which was added for USB but is
> > > actually not required considering default value. It also seems to break
> > > USB after my latest rebase. The file in question concerning the change
> > > is colibri_vf.c. PLL divisor selects the PLL Multiplication factor
> > > which by default is 0, setting Fout = Fref * 20 giving 480MHz. The
> > > earlier patch set this to 1 giving Fout = Fref * 22 where Fref =
> > > 24MHz.
> > >
> > > - Rebased on the latest master branch.
> > >
> > > Changes since v1:
> > > - Rework the USB driver to use register offsets using the regular
> > > struct {} method
> > >
> > > - Some cleanups and fixes in the sixth patch for the colibri_vf.h file
> > > which takes care of environment variables in uboot
> > >
> > > - Purge some useless defines in the fifth and sixth patch which were
> > > related to USB.
> >
> > Ping!?
> >
> > Anything preventing this patch from getting applied?
>
> I'll pick this up soon, thanks!
This should go through u-boot-imx though ;-)
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Re: [U-Boot] [PATCH 02/20] dm: i2c: sandbox: Add debugging to the speed limit
Hello Simon,
Am 23.04.2015 17:12, schrieb Simon Glass:
Hi Heiko,
On 20 April 2015 at 23:04, Heiko Schocher wrote:
Hello Simon,
Am 20.04.2015 20:37, schrieb Simon Glass:
Print a debug() message with the I2C speed is exceeded.
Signed-off-by: Simon Glass
---
drivers/i2c/sandbox_i2c.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/sandbox_i2c.c b/drivers/i2c/sandbox_i2c.c
index d6adc0f..621caec 100644
--- a/drivers/i2c/sandbox_i2c.c
+++ b/drivers/i2c/sandbox_i2c.c
@@ -73,8 +73,10 @@ static int sandbox_i2c_xfer(struct udevice *bus, struct
i2c_msg *msg,
* 400KHz for reads
*/
is_read = nmsgs > 1;
- if (i2c->speed_hz > (is_read ? 40 : 10))
+ if (i2c->speed_hz > (is_read ? 40 : 10)) {
+ debug("%s: Max speed exceeded\n", __func__);
return -EINVAL;
+ }
Why different speeds for reading/writing?
This is just test code - in fact a later patch adds a flag to enable
it only when running tests. See test/dm/i2c.c.
Ah, thanks for the clarification, so:
Acked-by: Heiko Schocher
bye,
Heiko
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Re: [U-Boot] [PATCH 2/4] x86: minnowmax: add GPIO banks in the device tree
On 23 April 2015 at 10:16, Gabriel Huau wrote: > There is 6 banks: > 4 banks for CORE: available in S0 mode > 2 banks for SUS (Suspend): available in S0-S5 mode > > Signed-off-by: Gabriel Huau > --- > arch/x86/dts/minnowmax.dts | 42 ++ > 1 file changed, 42 insertions(+) Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4][v2]drivers:usb:fsl: Add XHCI driver support
On Thursday, April 23, 2015 at 07:02:54 PM, Ramneek Mehresh wrote:
> Add xhci driver support for all FSL socs
>
> Signed-off-by: Ramneek Mehresh
Next time, please follow
http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions
> ---
> arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 6 ++
> drivers/usb/host/Makefile | 1 +
> drivers/usb/host/xhci-fsl.c | 107
> ++ include/linux/usb/xhci-fsl.h |
> 54 +++ 4 files changed, 168 insertions(+)
> create mode 100644 drivers/usb/host/xhci-fsl.c
> create mode 100644 include/linux/usb/xhci-fsl.h
>
> diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 3a64afc..9c1f1ce
> 100644
> --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> @@ -538,4 +538,10 @@ struct ccsr_cci400 {
> } pcounter[4]; /* Performance Counter */
> u8 res_e004[0x1 - 0xe004];
> };
> +
> +/* USB-XHCI */
> +#define FSL_XHCI_BASE 0x310
> +#define FSL_OCP1_SCP_BASE 0x4a084c00
> +#define FSL_OTG_WRAPPER_BASE 0x4A02
> +
> #endif /* __ASM_ARCH_LS102XA_IMMAP_H_ */
This file looks like a dumpster . Maybe it's about time for someone
in Freescale to clean that mess up. I don't want you to fix it before
this patchset is applied, but certainly this could use some fixing.
[...]
> +static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci)
> +{
> + /* Currently fsl socs do not support PHY shutdown from
> + * sw. But this support may be added in future socs.
> + */
Multiline comment ;-)
> + return 0;
> +}
[...]
> diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
> new file mode 100644
> index 000..8eaab2c
> --- /dev/null
> +++ b/include/linux/usb/xhci-fsl.h
> @@ -0,0 +1,54 @@
> +/*
> + * Copyright 2015 Freescale Semiconductor, Inc.
> + *
> + * FSL USB HOST xHCI Controller
> + *
> + * Author: Ramneek Mehresh
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef _ASM_ARCH_XHCI_FSL_H_
> +#define _ASM_ARCH_XHCI_FSL_H_
> +
> +/* Default to the FSL XHCI defines */
> +#define USB3_PWRCTL_CLK_CMD_MASK 0x3FE000
> +#define USB3_PWRCTL_CLK_FREQ_MASK0xFFC
> +#define USB3_PHY_PARTIAL_RX_POWERON BIT(6)
> +#define USB3_PHY_RX_POWERON BIT(14)
> +#define USB3_PHY_TX_POWERON BIT(15)
> +#define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON |
USB3_PHY_TX_POWERON)
> +#define USB3_PWRCTL_CLK_CMD_SHIFT 14
> +#define USB3_PWRCTL_CLK_FREQ_SHIFT 22
How much of this is actually DWC3 stuff please ? Or are all
these bits really FSL-specific ?
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Re: [U-Boot] [U-Boot, v3, 6/7] usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
On Wed, Apr 15, 2015 at 04:24:27PM +0530, Sanchayan Maity wrote: > This driver adds support for the USB peripheral on Freescale Vybrid > SoC's. > > Signed-off-by: Sanchayan Maity Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] socfpga: implement socdk SPI flash config in dts
On Thursday, April 23, 2015 at 09:14:01 AM, Pavel Machek wrote: > SocDK has same QSPI and SPI flash configuration as Socrates. Add > support for it. > > Signed-off-by: Pavel Machek Applied, thanks. Can you please cook one for Arria V too while at it, so we're consistent ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 0/8] Extend LPC32xx functionality and add LPC32xx-based work_92015 board
Hi Simon, Le Thu, 23 Apr 2015 09:16:32 -0600, Simon Glass a écrit : > Hi Albert, > > On 8 April 2015 at 00:12, Albert ARIBAUD wrote: > > Hi Simon, > > > > Le Tue, 7 Apr 2015 21:20:22 -0600, Simon Glass a > > écrit : > > > >> Well the problem is that we don't have driver model support in rtc, We > >> do have an eeprom uclass, but it is currently implemented only for > >> sandbox. We don't have a hwmon uclass (although there is thermal, and > >> I wonder if that is similar? > > > > No idea. :/ > > > >> I'd be willing to create an rtc uclass and convert over ds1374 if you > >> are happy to test it? > > > > I can test ds1374 right now, but that is not a hardware that I can keep. > > I should be able to test eeprom on some other HW which I own. > > I posted an RTC conversion series. Are you still able to test ds1374? I should, but I only have a slight chance to do so today; otherwise, not before sunday afternoon. > Regards, > Simon Cordialement, Albert ARIBAUD 3ADEV ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] cmd, nand: add more info to "nand info"
On Sun, Apr 12, 2015 at 10:18:09AM +0200, Heiko Schocher wrote: > add subpagesize, nand options and bbt options to the > "nand info" output. > > => nand info > > Device 0: nand0, sector size 256 KiB > Page size 4096 b > OOB size 256 b > Erase size262144 b > subpagesize 4096 b > options 0x 200 > bbt options 0x8000 > > Signed-off-by: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 1/7] ARM: vf610: Move DDR3 initialization to imx-common
On Wed, Apr 15, 2015 at 04:24:22PM +0530, Sanchayan Maity wrote: > In order to avoid code duplication, move the DDR3 initialization to the > common place under imx-common. Currently ROW_DIFF and COL_DIFF can be > chosen from the board file. The JEDEC timings are specified using a > common ddr3_jedec_timings structure. > > Signed-off-by: Stefan Agner > Signed-off-by: Sanchayan Maity Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4][v2]include:configs:ls1021atwr: Enable USB IP support
On Thursday, April 23, 2015 at 07:03:14 PM, Ramneek Mehresh wrote:
> Enable USB IP support for both EHCI and XHCI for
> ls1021atwr platform
>
> Signed-off-by: Ramneek Mehresh
> ---
> include/configs/ls1021atwr.h | 36
> include/linux/usb/xhci-fsl.h | 5 +
> 2 files changed, 41 insertions(+)
>
> diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
> index a13876b..f208638 100644
> --- a/include/configs/ls1021atwr.h
> +++ b/include/configs/ls1021atwr.h
> @@ -28,6 +28,42 @@
> #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
>
> /*
> + * USB
> + */
> +
> +/* EHCI Support - disbaled by default as
> + * there is no signal coming out of soc on
> + * this board for this controller. However,
> + * the silicon still has this controller,
> + * and anyone can use this controller by
> + * taking signals out on their board.
> + */
Multiline comment again ;-)
> +/*#define CONFIG_HAS_FSL_DR_USB*/
> +
> +#ifdef CONFIG_HAS_FSL_DR_USB
> +#define CONFIG_USB_EHCI
> +#define CONFIG_USB_EHCI_FSL
> +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
> +#endif
> +
> +/* XHCI Support - enabled by default */
> +#define CONFIG_HAS_FSL_XHCI_USB
> +
> +#ifdef CONFIG_HAS_FSL_XHCI_USB
> +#define CONFIG_USB_XHCI_FSL
> +#define CONFIG_USB_XHCI_DWC3
> +#define CONFIG_USB_XHCI
> +#define CONFIG_USB_MAX_CONTROLLER_COUNT1
> +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
> +#endif
> +
> +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
> +#define CONFIG_CMD_USB
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_CMD_EXT2
> +#endif
> +
> +/*
> * Generic Timer Definitions
> */
> #define GENERIC_TIMER_CLK1250
> diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
> index 8eaab2c..329abf7 100644
> --- a/include/linux/usb/xhci-fsl.h
> +++ b/include/linux/usb/xhci-fsl.h
> @@ -46,6 +46,11 @@
> #define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16)
> #define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17)
>
> +#ifdef CONFIG_LS102XA
> +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR
> +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
Do you need to define this _bogus_ address at all? If so, then the driver
which depends on this is broken. Why can't you just define a list of addresses
instead ? You would be able to use ARRAY_SIZE() in the driver to determine
how many controllers there are then. This is how it would look like:
#define CONFIG_FOO_BAR_ADDRS { USB1_ADDR, USB2_ADDR, ..., USBn_ADDR }
In the driver, there'd be:
addrs[] = CONFIG_FOO_BAR_ADDRS;
> +#endif
> +
> struct fsl_xhci {
> struct xhci_hccr *hcd;
> struct dwc3 *dwc3_reg;
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Re: [U-Boot] [U-Boot, v3, 3/7] ARM: vf610: Add SoC and CPU type detection
On Wed, Apr 15, 2015 at 04:24:24PM +0530, Sanchayan Maity wrote:
> Vybrid product family consists of several rather similar SoC which
> can be determined by softare during boot time. This allows use of
> variable ${soc} for Linux device tree files. Detect VF5xx CPU's by
> reading the CPU count register. We can determine the second number
> of the CPU type (VF6x0) which indicates the presence of a L2 cache.
>
> Signed-off-by: Stefan Agner
> Signed-off-by: Sanchayan Maity
Applied to u-boot/master, thanks!
--
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Re: [U-Boot] [PATCH v5 2/3] mtd, nand: move common functions from cmd_nand.c to common place
On Fri, 2015-04-24 at 06:59 +0200, Heiko Schocher wrote: > Hello Scott, > > Am 23.04.2015 19:48, schrieb Scott Wood: > > On Thu, 2015-04-23 at 13:12 +0200, Heiko Schocher wrote: > >> Hello Scott, > >> > >> Am 23.04.2015 08:55, schrieb Scott Wood: > >>> On Thu, 2015-04-23 at 07:57 +0200, Heiko Schocher wrote: > Hello Scott, > > Am 23.04.2015 00:47, schrieb Scott Wood: > > On Mon, 2015-04-20 at 07:47 +0200, Heiko Schocher wrote: > >> +int str2off(const char *p, loff_t *num); > >> +int str2long(const char *p, ulong *num); > > > > These should be moved somewhere more generic, especially if they're no > > longer file-local. > > Hmm... the code is currently in "drivers/mtd/mtd_uboot.c" ... maybe > we add a "mtd_" prefix to them? I think these functions are mtd specific > ... > >>> > >>> What is mtd-specific about them? > >> > >> Hmm... I thought: > >> > >> return *p != '\0' && *endptr == '\0'; > >> > >> is more or less mtd specific ... but you are right, it is not really > >> mtd specific ... so I move them to "./lib/vsprintf.c" ... Ok? > > > > OK. Maybe change the return to bool while you're at it, to make it > > clear that it isn't return-zero-on-success. > > Hmm.. tried this, but I get: > >CC common/cmd_test.o > In file included from /home/hs/abb/imx6/u-boot/include/common.h:760:0, > from /home/hs/abb/imx6/u-boot/common/cmd_test.c:17: > /home/hs/abb/imx6/u-boot/include/vsprintf.h:176:1: error: unknown type name > 'bool' > /home/hs/abb/imx6/u-boot/include/vsprintf.h:177:1: error: unknown type name > 'bool' > /home/hs/abb/imx6/u-boot/scripts/Makefile.build:276: recipe for target > 'common/cmd_test.o' failed > make[2]: *** [common/cmd_test.o] Error 1 > /home/hs/abb/imx6/u-boot/Makefile:1156: recipe for target 'common' failed > make[1]: *** [common] Error 2 > > reason is in common/cmd_test.c: > > /* > * Define _STDBOOL_H here to avoid macro expansion of true and false. > * If the future code requires macro true or false, remove this define > * and undef true and false before U_BOOT_CMD. This define and comment > * shall be removed if change to U_BOOT_CMD is made to take string > * instead of stringifying it. > */ > #define _STDBOOL_H Ugh. Maybe add a variant of U_BOOT_CMD_COMPLETE that takes a string for the user-visible name that is separate from the C-visible symbol used for the ll entry. Or you could either define bool manually, or do what the comment says and undef true/false. > #include > > Hmm... I tend to say, this is another patch changing the returntype > from int to bool ... It's related because you're moving it from being a local static function to being an API exposed treewide, so higher standards apply. Another option would be to convert it to returning zero on success and a negative error code on error. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 2/7] ARM: vf610: Enable external 32KHz oscillator
On Wed, Apr 15, 2015 at 04:24:23PM +0530, Sanchayan Maity wrote: > From: Stefan Agner > > Enable the SCSC (Slow Clock Source Controller) and select the external > 32KHz oscillator. This improves the accuracy of the RTC. > > Signed-off-by: Sanchayan Maity Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/5] mx6cuboxi: Differentiate Cubox-i and Hummingboard
Hi Fabio, On 23/04/2015 21:29, Fabio Estevam wrote: > Introduce is_hummingboard() function that reads GPIOs that can distinguish > between Cubox-i and Hummingboard. > > Print the board name accordingly. > > Based on a patch from Rabeeh Khoury. > > Signed-off-by: Fabio Estevam Just to be sure: it is enough to refered to another patch in the commit message ? I have supposed we have to add a Signed-off-by for Rabeeh, too. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net/phy: refactor RTL8211F initialization
> -Original Message-
> From: Joe Hershberger [mailto:joe.hershber...@gmail.com]
> Sent: Thursday, April 23, 2015 10:42 PM
> To: Liu Shengzhou-B36685
> Cc: u-boot
> Subject: Re: [PATCH] net/phy: refactor RTL8211F initialization
>
> Hi Shengzhou Liu,
>
> On Wed, Apr 22, 2015 at 5:22 AM, Shengzhou Liu
> wrote:
> > RTL8211F needs to enalbe TXDLY for RGMII during phy initialization, so
> > move it to rtl8211f_config for early initialization.
> >
> > Signed-off-by: Shengzhou Liu
> > cc: Joe Hershberger
> > ---
> > drivers/net/phy/realtek.c | 25 +
> > 1 file changed, 17 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
> > index 3917c82..d48095b 100644
> > --- a/drivers/net/phy/realtek.c
> > +++ b/drivers/net/phy/realtek.c
> > @@ -43,6 +43,22 @@ static int rtl8211x_config(struct phy_device *phydev)
> > return 0;
> > }
> >
> > +static int rtl8211f_config(struct phy_device *phydev) {
> > + phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
>
> Do you not need to disable the phy interrupt here?
No need, It's disabled by default.
> > +
> > + if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
> > + /* enable TXDLY */
> > + phy_write(phydev, MDIO_DEVAD_NONE,
> > + MIIM_RTL8211F_PAGE_SELECT, 0xd08);
>
> Why do you not need to change the page back to default? Does it only apply to
> one following command or something? I haven't read the data sheet for this
> phy to understand its behavior, but want to make sure it's clear here.
> Please at least add a comment describing why the page need not be changed
> back.
There is no other command, so it's working without back to default.
To avoid potential problem if one not set expected page, will have the page
back to default 0 in v2.
> > + phy_write(phydev, MDIO_DEVAD_NONE, 0x11, 0x109);
>
> Is this TX delay board specific? Seems like it would be. Should it be
> parameterized to come from a board CONFIG_? If not, at least add a comment
> describing these magic numbers.
It is not board specific. Will replace the magic number.
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[U-Boot] [PATCH] dm: core: drop device removal error path correctly
Trivial bug fix for commit 5a87c4174d18 (dm: core: Drop device
removal error path when not supported).
Signed-off-by: Masahiro Yamada
---
drivers/core/device.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 3b77d23..85fd1fc 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -135,7 +135,7 @@ int device_bind(struct udevice *parent, const struct driver
*drv,
return 0;
fail_child_post_bind:
- if (IS_ENABLED(DM_DEVICE_REMOVE)) {
+ if (IS_ENABLED(CONFIG_DM_DEVICE_REMOVE)) {
if (drv->unbind && drv->unbind(dev)) {
dm_warn("unbind() method failed on dev '%s' on error
path\n",
dev->name);
@@ -143,14 +143,14 @@ fail_child_post_bind:
}
fail_bind:
- if (IS_ENABLED(DM_DEVICE_REMOVE)) {
+ if (IS_ENABLED(CONFIG_DM_DEVICE_REMOVE)) {
if (uclass_unbind_device(dev)) {
dm_warn("Failed to unbind dev '%s' on error path\n",
dev->name);
}
}
fail_uclass_bind:
- if (IS_ENABLED(DM_DEVICE_REMOVE)) {
+ if (IS_ENABLED(CONFIG_DM_DEVICE_REMOVE)) {
list_del(&dev->sibling_node);
if (dev->flags & DM_FLAG_ALLOC_PARENT_PDATA) {
free(dev->parent_platdata);
--
1.9.1
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Re: [U-Boot] [U-Boot, v3, 5/7] ARM: vf610: Initial integration for Colibri VF50/VF61
On Wed, Apr 15, 2015 at 04:24:26PM +0530, Sanchayan Maity wrote: > This adds initial support for Colibri VF50/VF61 based on Freescale > Vybrid SoC. > > - CPU clocked at 396/500 MHz > - DDR3 at 396MHz > - for VF50, use PLL2 as memory clock (synchronous mode) > - for VF61, use PLL1 as memory clock (asynchronous mode) > - Console on UART0 (Colibri UART_A) > - Ethernet on FEC1 > - PLL5 based RMII clocking (E.g. No external crystal) > - UART_A and UART_C I/O muxing > - Boot from NAND by default > > Tested on Colibri VF50/VF61 booting using serial loader over UART. > > Signed-off-by: Sanchayan Maity > Acked-by: Stefan Agner Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] net/phy: refactor RTL8211F initialization
RTL8211F needs to enalbe TXDLY for RGMII during
phy initialization, so move it to rtl8211f_config
for early initialization.
Signed-off-by: Shengzhou Liu
cc: Joe Hershberger
---
v2: add default page and use macro instead of magic number.
drivers/net/phy/realtek.c | 33 +
1 file changed, 25 insertions(+), 8 deletions(-)
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 3917c82..7e1c316 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -32,6 +32,7 @@
#define MIIM_RTL8211F_PHYSTAT_LINK 0x0004
#define MIIM_RTL8211F_PAGE_SELECT 0x1f
+#define MIIM_RTL8211F_TX_DELAY 0x100
/* RealTek RTL8211x */
static int rtl8211x_config(struct phy_device *phydev)
@@ -43,6 +44,29 @@ static int rtl8211x_config(struct phy_device *phydev)
return 0;
}
+static int rtl8211f_config(struct phy_device *phydev)
+{
+ u16 reg;
+
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
+
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
+ /* enable TXDLY */
+ phy_write(phydev, MDIO_DEVAD_NONE,
+ MIIM_RTL8211F_PAGE_SELECT, 0xd08);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11);
+ reg |= MIIM_RTL8211F_TX_DELAY;
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg);
+ /* restore to default page 0 */
+ phy_write(phydev, MDIO_DEVAD_NONE,
+ MIIM_RTL8211F_PAGE_SELECT, 0x0);
+ }
+
+ genphy_config_aneg(phydev);
+
+ return 0;
+}
+
static int rtl8211x_parse_status(struct phy_device *phydev)
{
unsigned int speed;
@@ -142,13 +166,6 @@ static int rtl8211f_parse_status(struct phy_device *phydev)
phydev->speed = SPEED_10;
}
- if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
- /* enable TXDLY */
- phy_write(phydev, MDIO_DEVAD_NONE,
- MIIM_RTL8211F_PAGE_SELECT, 0xd08);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x11, 0x109);
- }
-
return 0;
}
@@ -209,7 +226,7 @@ static struct phy_driver RTL8211F_driver = {
.uid = 0x1cc916,
.mask = 0xff,
.features = PHY_GBIT_FEATURES,
- .config = &rtl8211x_config,
+ .config = &rtl8211f_config,
.startup = &rtl8211f_startup,
.shutdown = &genphy_shutdown,
};
--
2.1.0.27.g96db324
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Re: [U-Boot] [PATCH 1/2] dm: sf: Make SST flash write op work again
Hi Jagan,
On Fri, Apr 24, 2015 at 4:07 PM, Jagan Teki wrote:
> Hi Bin,
>
> On 23 April 2015 at 14:30, Bin Meng wrote:
>> With SPI flash moving to driver model, commit fbb0991 "dm: Convert
>> spi_flash_probe() and 'sf probe' to use driver model" ignored the
>> SST flash-specific write op (byte program & word program), which
>> actually broke the SST flash from wroking.
>>
>> This commit makes SST flash work again under driver model, by adding
>> a new SST flash-specific driver to handle the different write op
>> from the standard one.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> drivers/mtd/spi/sf_probe.c | 31 +++
>> 1 file changed, 31 insertions(+)
>>
>> diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
>> index d19138d..47438d2 100644
>> --- a/drivers/mtd/spi/sf_probe.c
>> +++ b/drivers/mtd/spi/sf_probe.c
>> @@ -511,4 +511,35 @@ U_BOOT_DRIVER(spi_flash_std) = {
>> .ops= &spi_flash_std_ops,
>> };
>>
>> +int spi_flash_sst_write(struct udevice *dev, u32 offset, size_t len,
>> + const void *buf)
>> +{
>> + struct spi_flash *flash = dev_get_uclass_priv(dev);
>> +
>> + if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
>> + return sst_write_bp(flash, offset, len, buf);
>> + else
>> + return sst_write_wp(flash, offset, len, buf);
>> +}
>> +
>> +static const struct dm_spi_flash_ops spi_flash_sst_ops = {
>> + .read = spi_flash_std_read,
>> + .write = spi_flash_sst_write,
>> + .erase = spi_flash_std_erase,
>> +};
>> +
>> +static const struct udevice_id spi_flash_sst_ids[] = {
>> + { .compatible = "spi-flash-sst" },
>> + { }
>> +};
>> +
>> +U_BOOT_DRIVER(spi_flash_sst) = {
>> + .name = "spi_flash_sst",
>> + .id = UCLASS_SPI_FLASH,
>> + .of_match = spi_flash_sst_ids,
>> + .probe = spi_flash_std_probe,
>> + .priv_auto_alloc_size = sizeof(struct spi_flash),
>> + .ops= &spi_flash_sst_ops,
>> +};
>> +
>> #endif /* CONFIG_DM_SPI_FLASH */
>> --
>> 1.8.2.1
>
> I'm just curiosity to see different approach of being code duplicate
> with just for sst write call.
>
> What about this-
> int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
> const void *buf)
> {
> struct spi_flash *flash = dev_get_uclass_priv(dev);
>
> if defined(CONFIG_SPI_FLASH_SST)
> if (flash->flags & SST_WR) {
> if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
> return sst_write_bp(flash, offset, len, buf);
> else
> return sst_write_wp(flash, offset, len, buf);
> }
> #endif
>
> return spi_flash_cmd_write_ops(flash, offset, len, buf);
> }
>
> Of course this requires extra flags member in spi_flash, any other thoughts?
>
Yep, this way works too. Let me know which way you prefer and I can respin a v2.
Regards,
Bin
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[U-Boot] [PATCH v2] board/p2020rdb: fix the FDT_ERR_NOTFOUND issue
From: Ying Zhang
Because the function ft_board_setup() delete the USB2 device node, it
leads to can't find the device node and hung up.
In fact only P1020RDB needs to delete the USB2 node, this patch fixes
this issue.
Signed-off-by: Ying Zhang
---
Change from v1:
- To define the parameter "err" to eliminate the compiling error.
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 3f47cfb..61b7a91 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -428,8 +428,13 @@ int ft_board_setup(void *blob, bd_t *bd)
{
phys_addr_t base;
phys_size_t size;
+#if defined(CONFIG_P1020RDB_PD) || defined(CONFIG_P1020RDB_PC)
const char *soc_usb_compat = "fsl-usb2-dr";
- int err, usb1_off, usb2_off;
+ int usb_err, usb1_off, usb2_off;
+#endif
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
+ int err;
+#endif
ft_cpu_setup(blob, bd);
@@ -473,6 +478,7 @@ int ft_board_setup(void *blob, bd_t *bd)
}
#endif
+#if defined(CONFIG_P1020RDB_PD) || defined(CONFIG_P1020RDB_PC)
/* Delete USB2 node as it is muxed with eLBC */
usb1_off = fdt_node_offset_by_compatible(blob, -1,
soc_usb_compat);
@@ -488,11 +494,12 @@ int ft_board_setup(void *blob, bd_t *bd)
soc_usb_compat);
return usb2_off;
}
- err = fdt_del_node(blob, usb2_off);
- if (err < 0) {
+ usb_err = fdt_del_node(blob, usb2_off);
+ if (usb_err < 0) {
printf("WARNING: could not remove %s\n", soc_usb_compat);
- return err;
+ return usb_err;
}
+#endif
return 0;
}
--
1.8.4.1
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[U-Boot] Test
Hi all, since midnight i didn't receive anything from the mailinglist ... is there something wrong with it ? or is my mail-provider defective? best regards, HAnnes ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] biosemu: Do not free vga_info->BIOSImage when it is 0xc0000
On 24 April 2015 at 01:48, Bin Meng wrote: > For x86, vga_info->BIOSImage points to 0xc which cannot be freed. > > Signed-off-by: Bin Meng > --- > > drivers/bios_emulator/atibios.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Booting Xen from a FIT - Additional discussion about a refactor
Hi Karl,
On 23 April 2015 at 15:39, Karl Apsite wrote:
>
>
> On 04/23/2015 01:06 PM, Simon Glass wrote:
>> Hi Karl,
>>
>> On 23 April 2015 at 07:15, Karl Apsite wrote:
>>>
>>> On 04/22/2015 09:55 PM, Simon Glass wrote:
+Tom
Hi Karl,
On 22 April 2015 at 13:05, Karl Apsite wrote:
> Hi!
>
> I work at DornerWorks with the Xen Hypervisor. We work with a variety of
> embedded systems, and we wanted to facilitate Xen's boot procedure through
> U-boot's Flattened Image Tree (FIT) format. I've already prototyped some
> of the
> functionality we were hoping to see, so we thought it'd be prudent to
> begin a
> discussion with denx to get your opinion on the matter,
>
> First Objective: (Summary of what was prototyped)
> A Flattened Image Tree is capable of holding all of the necessary binaries
> already, so we only need to make a quick change to allow u-boot to load
> an extra
> binary (in this case, a linux kernel) so that Xen can boot and load the
> kernel
> when it's ready. I started by simply adding a line in the configuration
> of my
> tree-source (.its) to look like:
>
> config@1 {
> description = "Xen 4.6.0-unstable configuration";
> kernel = "xen_kernel@1";
> fdt = "fdt@1";
> gen_bin0 = "linux_kernel@1";
> };
>
> I investigated what effort would be needed to load the additional binary.
>
> Booting Xen is easy (only a kernel and fdt are required), but Xen will
> look at a
> hard-coded memory address to try a load a linux kernel. This has to be
> placed
> in memory by u-boot. The only major addition I needed, was to make
> u-boot care
> about a config option named "generic-binary" and load it, no questions
> asked. I
> chose the name "generic binary" as I simply needed u-boot to load a
> [thing]
> without any additional behavior. I'm using it to specifically load a
> linux
> kernel at a specific memory address in preparation for xen, but there
> could be
> potential future uses, hence the ambiguous name.
I wonder whether you should add a new type for the target kernel?
General binary seems a bit vague. Just a thought.
>>>
>>> I do agree, I don't really like the term "generic binary" either.
>>>
>>> When preparing to boot Xen, u-boot needs to take a binary, and simply put
>>> it in
>>> place. Unlike the other images/objects (kernel, fdt, ramdisk, etc) u-boot's
>>> role is very simple in this regard: "Take these bits, and make sure they go
>>> over
>>> here."
>>>
>>> In this scenario, the action taken by u-boot should be agnostic to what the
>>> image actually is. U-boot should simply move a binary, without any
>>> additional
>>> behavior. This led me to choose a name just as generic.
>>
>> What is this additional behaviour you are referring to?
>
> In each of the existing boot_get_ functions, I saw that U-boot stores
> various addresses in the images parameter: bootm_headers_t *images. I am
> making
> an assumption that these addresses are used later for any possible "additional
> behaviors." That could very well be a misunderstanding, but I thought those
> addresses are used by u-boot later in the boot process.
There is a load and an exec address. The first tells U-Boot where to
copy it (likely you will want this) and exec tells it where to start
execution (which is only used for some image types).
So I would be quite comfortable with you just adding a new image for
your special type of kernel.
[snip]
Regards,
Simon
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[U-Boot] [PATCH 15/21] sunxi: emac: Add device model support
Modify the sunxi-emac eth driver to support device model.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/board.c | 4 +-
drivers/net/sunxi_emac.c | 81
2 files changed, 84 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 7e9cf11..cde13ef 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -12,7 +12,9 @@
#include
#include
+#ifndef CONFIG_DM_ETH
#include
+#endif
#include
#include
#ifdef CONFIG_SPL_BUILD
@@ -224,7 +226,7 @@ int cpu_eth_init(bd_t *bis)
mdelay(200);
#endif
-#ifdef CONFIG_SUNXI_EMAC
+#if defined CONFIG_SUNXI_EMAC && !defined CONFIG_DM_ETH
rc = sunxi_emac_initialize(bis);
if (rc < 0) {
printf("sunxi: failed to initialize emac\n");
diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c
index 038f474..a9efe11 100644
--- a/drivers/net/sunxi_emac.c
+++ b/drivers/net/sunxi_emac.c
@@ -7,6 +7,7 @@
*/
#include
+#include
#include
#include
#include
@@ -160,6 +161,9 @@ struct emac_eth_dev {
struct mii_dev *bus;
struct phy_device *phydev;
int link_printed;
+#ifdef CONFIG_DM_ETH
+ uchar rx_buf[DMA_CPU_TRRESHOLD];
+#endif
};
struct emac_rxhdr {
@@ -509,6 +513,7 @@ static void sunxi_emac_board_setup(struct emac_eth_dev
*priv)
clrsetbits_le32(®s->mac_mcfg, 0xf << 2, 0xd << 2);
}
+#ifndef CONFIG_DM_ETH
static int sunxi_emac_eth_init(struct eth_device *dev, bd_t *bis)
{
return _sunxi_emac_eth_init(dev->priv, dev->enetaddr);
@@ -573,3 +578,79 @@ int sunxi_emac_initialize(void)
return sunxi_emac_init_phy(priv, dev);
}
+#endif
+
+#ifdef CONFIG_DM_ETH
+static int sunxi_emac_eth_start(struct udevice *dev)
+{
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+
+ return _sunxi_emac_eth_init(dev->priv, pdata->enetaddr);
+}
+
+static int sunxi_emac_eth_send(struct udevice *dev, void *packet, int length)
+{
+ struct emac_eth_dev *priv = dev_get_priv(dev);
+
+ return _sunxi_emac_eth_send(priv, packet, length);
+}
+
+static int sunxi_emac_eth_recv(struct udevice *dev, uchar **packetp)
+{
+ struct emac_eth_dev *priv = dev_get_priv(dev);
+ int rx_len;
+
+ rx_len = _sunxi_emac_eth_recv(priv, priv->rx_buf);
+ *packetp = priv->rx_buf;
+
+ return rx_len;
+}
+
+static void sunxi_emac_eth_stop(struct udevice *dev)
+{
+ /* Nothing to do here */
+}
+
+static int sunxi_emac_eth_probe(struct udevice *dev)
+{
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct emac_eth_dev *priv = dev_get_priv(dev);
+
+ priv->regs = (struct emac_regs *)pdata->iobase;
+ sunxi_emac_board_setup(priv);
+
+ return sunxi_emac_init_phy(priv, dev);
+}
+
+static const struct eth_ops sunxi_emac_eth_ops = {
+ .start = sunxi_emac_eth_start,
+ .send = sunxi_emac_eth_send,
+ .recv = sunxi_emac_eth_recv,
+ .stop = sunxi_emac_eth_stop,
+};
+
+static int sunxi_emac_eth_ofdata_to_platdata(struct udevice *dev)
+{
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+
+ pdata->iobase = dev_get_addr(dev);
+
+ return 0;
+}
+
+static const struct udevice_id sunxi_emac_eth_ids[] = {
+ { .compatible = "allwinner,sun4i-a10-emac" },
+ { }
+};
+
+U_BOOT_DRIVER(eth_sunxi_emac) = {
+ .name = "eth_sunxi_emac",
+ .id = UCLASS_ETH,
+ .of_match = sunxi_emac_eth_ids,
+ .ofdata_to_platdata = sunxi_emac_eth_ofdata_to_platdata,
+ .probe = sunxi_emac_eth_probe,
+ .ops= &sunxi_emac_eth_ops,
+ .priv_auto_alloc_size = sizeof(struct emac_eth_dev),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+};
+#endif
--
2.3.5
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[U-Boot] [PATCH 11/21] sunxi: gpio: Add support for AXP gpios to the dm gpio code
This really should be part of the axp pmic driver, but that is not converted
yet to device-model, and the upstream kernel does not support axp gpios
yet so there is no devicetree binding for them yet.
So for now bolt on the axp gpio support to the SoC's own gpio support like
we've been doing for the non dm case. This allows boards using axp gpios
to be converted to dm.
Signed-off-by: Hans de Goede
---
arch/arm/include/asm/arch-sunxi/gpio.h | 6 ++--
drivers/gpio/sunxi_gpio.c | 64 +-
2 files changed, 60 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index c9bfb4c..cbb3328 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -204,8 +204,10 @@ enum sunxi_gpio_number {
#define SUNXI_GPIO_PULL_DOWN 2
/* Virtual AXP0 GPIOs */
-#define SUNXI_GPIO_AXP0_VBUS_DETECT8
-#define SUNXI_GPIO_AXP0_VBUS_ENABLE9
+#define SUNXI_GPIO_AXP0_PREFIX "AXP0-"
+#define SUNXI_GPIO_AXP0_VBUS_DETECT4
+#define SUNXI_GPIO_AXP0_VBUS_ENABLE5
+#define SUNXI_GPIO_AXP0_GPIO_COUNT 6
void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val);
void sunxi_gpio_set_cfgpin(u32 pin, u32 val);
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 0774b70..38d72b7 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -126,7 +126,7 @@ int sunxi_name_to_gpio(const char *name)
char *eptr;
#ifdef AXP_GPIO
- if (strncasecmp(name, "AXP0-", 5) == 0) {
+ if (strncasecmp(name, SUNXI_GPIO_AXP0_PREFIX, 5) == 0) {
name += 5;
if (strcmp(name, "VBUS-DETECT") == 0)
return SUNXI_GPIO_AXP0_START +
@@ -172,12 +172,56 @@ int sunxi_name_to_gpio_bank(const char *name)
}
#ifdef CONFIG_DM_GPIO
+
+#ifdef AXP_GPIO
+/* FIXME this should be part of the axp drivers */
+static const struct dm_gpio_ops gpio_axp_ops = {
+ .direction_input= axp_gpio_direction_input,
+ .direction_output = axp_gpio_direction_output,
+ .get_value = axp_gpio_get_value,
+ .set_value = axp_gpio_set_value,
+};
+
+static int gpio_axp_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ /* Tell the uclass how many GPIOs we have */
+ uc_priv->bank_name = strdup(SUNXI_GPIO_AXP0_PREFIX);
+ uc_priv->gpio_count = SUNXI_GPIO_AXP0_GPIO_COUNT;
+
+ return 0;
+}
+
+struct driver gpio_axp_driver = {
+ .name = "gpio_axp",
+ .id = UCLASS_GPIO,
+ .ops= &gpio_axp_ops,
+ .probe = gpio_axp_probe,
+};
+#endif
+
/* TODO(s...@chromium.org): Remove this function and use device tree */
int sunxi_name_to_gpio(const char *name)
{
unsigned int gpio;
int ret;
-
+#ifdef AXP_GPIO
+ char lookup[8];
+
+ if (strncasecmp(name, SUNXI_GPIO_AXP0_PREFIX, 5) == 0) {
+ int len = strlen(SUNXI_GPIO_AXP0_PREFIX);
+ if (strcmp(name + len, "VBUS-DETECT") == 0) {
+ sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
+ SUNXI_GPIO_AXP0_VBUS_DETECT);
+ name = lookup;
+ } else if (strcmp(name + len, "VBUS-ENABLE") == 0) {
+ sprintf(lookup, "AXP0-%d\n",
+ SUNXI_GPIO_AXP0_VBUS_ENABLE);
+ name = lookup;
+ }
+ }
+#endif
ret = gpio_lookup_name(name, NULL, NULL, &gpio);
return ret ? ret : gpio;
@@ -222,7 +266,7 @@ static int sunxi_gpio_set_value(struct udevice *dev,
unsigned offset,
struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
u32 num = GPIO_NUM(offset);
- clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
+; clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
return 0;
}
@@ -289,21 +333,19 @@ static int gpio_sunxi_probe(struct udevice *dev)
*/
static int gpio_sunxi_bind(struct udevice *parent)
{
- struct sunxi_gpio_platdata *plat = parent->platdata;
+ struct sunxi_gpio_platdata *plat;
struct sunxi_gpio_reg *ctlr;
+ struct udevice *dev;
int bank;
int ret;
/* If this is a child device, there is nothing to do here */
- if (plat)
+ if (parent->platdata)
return 0;
ctlr = (struct sunxi_gpio_reg *)fdtdec_get_addr(gd->fdt_blob,
parent->of_offset, "reg");
for (bank = 0; bank < SUNXI_GPIO_BANKS; bank++) {
- struct sunxi_gpio_platdata *plat;
- struct udevice *dev;
-
plat = calloc(1, sizeof(*plat));
if (!plat)
return -ENOMEM;
@@ -318,6 +360,12 @@ static int gpio_sunxi_bind(struct udevice *parent)
Re: [U-Boot] [PATCH v3 3/5] mx6cuboxi: Introduce multi-SoC support
Hi Stefano, On Fri, Apr 24, 2015 at 9:27 AM, Stefano Babic wrote: > Hi Fabio, Rabeeh, > > On 24/04/2015 13:46, Fabio Estevam wrote: >> From: Fabio Estevam >> >> Cubox-i and Hummingboard support several MX6 SoCs: mx6solo, mx6dual-lite, >> mx6dual and mx6quad. Add support for the different SoC/memory sizes >> combinations. >> >> DDR initialization values were extracted from Solid-run internal U-boot. >> >> Tested on a CuBox-i4Pro, HummingBoard-i2eX and HummingBoard-i1. >> >> Signed-off-by: Fabio Estevam >> --- > > Thanks - Tom wrote in his comments, that even this patch was taken from > solidrun and should have Rabeeh's Signed-off-by, too. You do not need to > repost it, I will do myself by merging, but I do not know if it is > correct. Is it ? Please add Rabeeh's Signed-off-by tag to this patch. Thanks, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/21] sunxi: gpio: Build sunxi_name_to_gpio_bank for device-model code too
When doing a device-model enabled build we still need sunxi_name_to_gpio_bank
(for now) for the mmc pinmux code in board/sunxi/board.c, so build it for
device-model enabled builds too.
Signed-off-by: Hans de Goede
---
drivers/gpio/sunxi_gpio.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index e6a90b9..91af1a5 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -118,20 +118,6 @@ int gpio_set_value(unsigned gpio, int value)
return sunxi_gpio_output(gpio, value);
}
-int sunxi_name_to_gpio_bank(const char *name)
-{
- int group = 0;
-
- if (*name == 'P' || *name == 'p')
- name++;
- if (*name >= 'A') {
- group = *name - (*name > 'a' ? 'a' : 'A');
- return group;
- }
-
- return -1;
-}
-
int sunxi_name_to_gpio(const char *name)
{
int group = 0;
@@ -171,6 +157,20 @@ int sunxi_name_to_gpio(const char *name)
}
#endif
+int sunxi_name_to_gpio_bank(const char *name)
+{
+ int group = 0;
+
+ if (*name == 'P' || *name == 'p')
+ name++;
+ if (*name >= 'A') {
+ group = *name - (*name > 'a' ? 'a' : 'A');
+ return group;
+ }
+
+ return -1;
+}
+
#ifdef CONFIG_DM_GPIO
/* TODO(s...@chromium.org): Remove this function and use device tree */
int sunxi_name_to_gpio(const char *name)
--
2.3.5
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[U-Boot] [PATCH 07/21] sunxi: gpio: Add temporary implementation of name_to_gpio()
From: Simon Glass
Until sunxi moves to device tree (e.g. for USB) we need to convert named
GPIOs to numbers. Add a function to do this.
This fixes the USB / EHCI support not working on the LinkSprite pcDuino3
(which uses devicemodel).
Signed-off-by: Simon Glass
Acked-by: Hans de Goede
Signed-off-by: Hans de Goede
---
drivers/gpio/sunxi_gpio.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 29301c4..89209df 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -172,6 +172,17 @@ int sunxi_name_to_gpio(const char *name)
#endif
#ifdef CONFIG_DM_GPIO
+/* TODO(s...@chromium.org): Remove this function and use device tree */
+int sunxi_name_to_gpio(const char *name)
+{
+ unsigned int gpio;
+ int ret;
+
+ ret = gpio_lookup_name(name, NULL, NULL, &gpio);
+
+ return ret ? ret : gpio;
+}
+
static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
{
struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
--
2.3.5
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Re: [U-Boot] [PATCH v4 07/16] dm: regulator: add regulator command
Hi Przemyslaw, On 24 April 2015 at 06:53, Przemyslaw Marczak wrote: > Hello Simon, > > > On 04/24/2015 02:34 PM, Simon Glass wrote: >> >> Hi Przemyslaw, >> >> On 24 April 2015 at 06:18, Przemyslaw Marczak >> wrote: >>> >>> Hello Simon, >>> >>> >>> On 04/24/2015 06:51 AM, Simon Glass wrote: Hi Przemyslaw, On 23 April 2015 at 05:33, Przemyslaw Marczak wrote: > > > Hello Simon, > > > On 04/22/2015 06:30 PM, Simon Glass wrote: >> >> >> >> Hi Przemyslaw, >> >> On 20 April 2015 at 12:07, Przemyslaw Marczak >> wrote: >>> >>> >>> >>> This command is based on driver model regulator's API. >>> The user interface provides: >>> - list UCLASS regulator devices >>> - show or [set] operating regulator device >>> - print constraints info >>> - print operating status >>> - print/[set] voltage value [uV] (force) >>> - print/[set] current value [uA] >>> - print/[set] operating mode id >>> - enable the regulator output >>> - disable the regulator output >>> >>> The 'force' option can be used for setting the value which exceeds >>> the constraints min/max limits. >>> >>> Signed-off-by: Przemyslaw Marczak >>> --- >>> Changes v3: >>> - new file >>> - Kconfig entry >>> >>> Changes V4: >>> - cmd regulator: move platdata to uc pdata >>> - cmd_regulator: includes cleanup >>> - cmd_regulator: add get_curr_dev_and_pl() check type >>> - move config name: CONFIG_DM_REGULATOR_CMD to CONFIG_CMD_REGULATOR >>> - common/Kconfig - cleanup >>> --- >>> common/Kconfig | 22 +++ >>> common/Makefile| 1 + >>> common/cmd_regulator.c | 403 >>> + >>> 3 files changed, 426 insertions(+) >>> create mode 100644 common/cmd_regulator.c >> >> >> >> >> Acked-by: Simon Glass >> >> I have a few nits that could be dealt with by a follow-on patch. >> > > Ok. > > >>> >>> diff --git a/common/Kconfig b/common/Kconfig >>> index 4666f8e..52f8bb1 100644 >>> --- a/common/Kconfig >>> +++ b/common/Kconfig >>> @@ -470,5 +470,27 @@ config CMD_PMIC >>> - pmic read address - read byte of register at address >>> - pmic write address - write byte to register at address >>> The only one change for this command is 'dev' >>> subcommand. >>> + >>> +config CMD_REGULATOR >>> + bool "Enable Driver Model REGULATOR command" >>> + depends on DM_REGULATOR >>> + help >>> + This command is based on driver model regulator's API. >>> + User interface features: >>> + - list - list regulator devices >>> + - regulator dev - show or [set] operating regulator >>> device >>> + - regulator info - print constraints info >>> + - regulator status - print operating status >>> + - regulator value - print/[set] voltage value >>> [uV] >>> + - regulator current - print/[set] current value >>> [uA] >>> + - regulator mode - print/[set] operating mode >>> id >>> + - regulator enable - enable the regulator output >>> + - regulator disable - disable the regulator output >>> + >>> + The '-f' (force) option can be used for set the value which >>> exceeds >>> + the limits, which are found in device-tree and are kept in >>> regulator's >>> + uclass platdata structure. >>> + >>> endmenu >>> + >>> endmenu >>> diff --git a/common/Makefile b/common/Makefile >>> index 87a3efe..93bded3 100644 >>> --- a/common/Makefile >>> +++ b/common/Makefile >>> @@ -212,6 +212,7 @@ obj-$(CONFIG_CMD_GPT) += cmd_gpt.o >>> >>> # Power >>> obj-$(CONFIG_CMD_PMIC) += cmd_pmic.o >>> +obj-$(CONFIG_CMD_REGULATOR) += cmd_regulator.o >>> endif >>> >>> ifdef CONFIG_SPL_BUILD >>> diff --git a/common/cmd_regulator.c b/common/cmd_regulator.c >>> new file mode 100644 >>> index 000..b1b9e87 >>> --- /dev/null >>> +++ b/common/cmd_regulator.c >>> @@ -0,0 +1,403 @@ >>> +/* >>> + * Copyright (C) 2014-2015 Samsung Electronics >>> + * Przemyslaw Marczak >>> + * >>> + * SPDX-License-Identifier:GPL-2.0+ >>> + */ >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +#define LIMIT_SEQ 3 >>> +#define LIMIT_DEVNAME 20 >>> +#define LIMIT_OFNAME 20 >>> +#define LIMIT_INFO 16 >>> + >>> +static struct udevice *currdev; >>> + >>> +static int failed(const char *getset, const char *thing, >>> +
[U-Boot] unassigned-patches/149: [PATCH] stm32f4: fix serial output bug
Signed-off-by: kunhuahuang
---
Added to GNATS database as unassigned-patches/149
>Responsible:patch-coord
>Message-Id: <1429868904-4779-1-git-send-email-huangkun...@gmail.com>
>In-Reply-To:
>References:
>Patch-Date: Fri Apr 24 11:48:24 +0200 2015
---
drivers/serial/serial_stm32.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 3c80096..693a7fa 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -81,6 +81,10 @@ static int stm32_serial_getc(void)
static void stm32_serial_putc(const char c)
{
struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
+
+ if(c == '\n')
+ stm32_serial_putc('\r');
+
while ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
;
writel(c, &usart->dr);
--
1.9.1
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Re: [U-Boot] [PATCH 1/2] dm: sf: Make SST flash write op work again
Hi Jagan,
On Fri, Apr 24, 2015 at 5:25 PM, Jagan Teki wrote:
> On 24 April 2015 at 14:12, Bin Meng wrote:
>> Hi Jagan,
>>
>> On Fri, Apr 24, 2015 at 4:07 PM, Jagan Teki wrote:
>>> Hi Bin,
>>>
>>> On 23 April 2015 at 14:30, Bin Meng wrote:
With SPI flash moving to driver model, commit fbb0991 "dm: Convert
spi_flash_probe() and 'sf probe' to use driver model" ignored the
SST flash-specific write op (byte program & word program), which
actually broke the SST flash from wroking.
This commit makes SST flash work again under driver model, by adding
a new SST flash-specific driver to handle the different write op
from the standard one.
Signed-off-by: Bin Meng
---
drivers/mtd/spi/sf_probe.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index d19138d..47438d2 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -511,4 +511,35 @@ U_BOOT_DRIVER(spi_flash_std) = {
.ops= &spi_flash_std_ops,
};
+int spi_flash_sst_write(struct udevice *dev, u32 offset, size_t len,
+ const void *buf)
+{
+ struct spi_flash *flash = dev_get_uclass_priv(dev);
+
+ if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
+ return sst_write_bp(flash, offset, len, buf);
+ else
+ return sst_write_wp(flash, offset, len, buf);
+}
+
+static const struct dm_spi_flash_ops spi_flash_sst_ops = {
+ .read = spi_flash_std_read,
+ .write = spi_flash_sst_write,
+ .erase = spi_flash_std_erase,
+};
+
+static const struct udevice_id spi_flash_sst_ids[] = {
+ { .compatible = "spi-flash-sst" },
+ { }
+};
+
+U_BOOT_DRIVER(spi_flash_sst) = {
+ .name = "spi_flash_sst",
+ .id = UCLASS_SPI_FLASH,
+ .of_match = spi_flash_sst_ids,
+ .probe = spi_flash_std_probe,
+ .priv_auto_alloc_size = sizeof(struct spi_flash),
+ .ops= &spi_flash_sst_ops,
+};
+
#endif /* CONFIG_DM_SPI_FLASH */
--
1.8.2.1
>>>
>>> I'm just curiosity to see different approach of being code duplicate
>>> with just for sst write call.
>>>
>>> What about this-
>>> int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
>>> const void *buf)
>>> {
>>> struct spi_flash *flash = dev_get_uclass_priv(dev);
>>>
>>> if defined(CONFIG_SPI_FLASH_SST)
>>> if (flash->flags & SST_WR) {
>>> if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
>>> return sst_write_bp(flash, offset, len, buf);
>>> else
>>> return sst_write_wp(flash, offset, len, buf);
>>> }
>>> #endif
>>>
>>> return spi_flash_cmd_write_ops(flash, offset, len, buf);
>>> }
>>>
>>> Of course this requires extra flags member in spi_flash, any other thoughts?
>>>
>>
>> Yep, this way works too. Let me know which way you prefer and I can respin a
>> v2.
>
> I preferred second.
>
OK, will respin a v2 soon. Thanks,
Regards,
Bin
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[U-Boot] [PATCH] image: android: handle default kernel address
The two tools that create android boot images, mkbootimg and the fastboot
client, set the kernel address by default to 0x10008000.
U-boot always honors this field, and will try to relocate the kernel to
whatever value is set in the header, which won't be mapped to the actual RAM on
most platforms, resulting in the kernel obviously not booting.
All the targets in U-Boot right now will download the android boot image to
CONFIG_SYS_LOAD_ADDR, which means that it will already have been downloaded to
some location that is suitable for execution.
In order to have the kernel booting even with the default boot image kernel
address, if that address is used, just execute the kernel where it is.
Signed-off-by: Maxime Ripard
---
common/image-android.c | 27 +--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/common/image-android.c b/common/image-android.c
index 59079fc32b51..d946c2f814c1 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -10,8 +10,29 @@
#include
#include
+#define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR 0x10008000
+
static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
+static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
+{
+ /*
+* All the Android tools that generate a boot.img use this
+* address as the default.
+*
+* Even though it doesn't really make a lot of sense, and it
+* might be valid on some platforms, we treat that adress as
+* the default value for this field, and try to execute the
+* kernel in place in such a case.
+*
+* Otherwise, we will return the actual value set by the user.
+*/
+ if (hdr->kernel_addr == ANDROID_IMAGE_DEFAULT_KERNEL_ADDR)
+ return (ulong)hdr + hdr->page_size;
+
+ return hdr->kernel_addr;
+}
+
/**
* android_image_get_kernel() - processes kernel part of Android boot images
* @hdr: Pointer to image header, which is at the start
@@ -30,6 +51,8 @@ static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
ulong *os_data, ulong *os_len)
{
+ u32 kernel_addr = android_image_get_kernel_addr(hdr);
+
/*
* Not all Android tools use the id field for signing the image with
* sha1 (or anything) so we don't check it. It is not obvious that the
@@ -41,7 +64,7 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr,
int verify,
printf("Android's image name: %s\n", andr_tmp_str);
printf("Kernel load addr 0x%08x size %u KiB\n",
- hdr->kernel_addr, DIV_ROUND_UP(hdr->kernel_size, 1024));
+ kernel_addr, DIV_ROUND_UP(hdr->kernel_size, 1024));
int len = 0;
if (*hdr->cmdline) {
@@ -101,7 +124,7 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr)
ulong android_image_get_kload(const struct andr_img_hdr *hdr)
{
- return hdr->kernel_addr;
+ return android_image_get_kernel_addr(hdr);
}
int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
--
2.3.5
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Re: [U-Boot] [PATCH v4 07/16] dm: regulator: add regulator command
Hi Przemyslaw,
On 24 April 2015 at 06:18, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 04/24/2015 06:51 AM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 23 April 2015 at 05:33, Przemyslaw Marczak
>> wrote:
>>>
>>> Hello Simon,
>>>
>>>
>>> On 04/22/2015 06:30 PM, Simon Glass wrote:
Hi Przemyslaw,
On 20 April 2015 at 12:07, Przemyslaw Marczak
wrote:
>
>
> This command is based on driver model regulator's API.
> The user interface provides:
> - list UCLASS regulator devices
> - show or [set] operating regulator device
> - print constraints info
> - print operating status
> - print/[set] voltage value [uV] (force)
> - print/[set] current value [uA]
> - print/[set] operating mode id
> - enable the regulator output
> - disable the regulator output
>
> The 'force' option can be used for setting the value which exceeds
> the constraints min/max limits.
>
> Signed-off-by: Przemyslaw Marczak
> ---
> Changes v3:
> - new file
> - Kconfig entry
>
> Changes V4:
> - cmd regulator: move platdata to uc pdata
> - cmd_regulator: includes cleanup
> - cmd_regulator: add get_curr_dev_and_pl() check type
> - move config name: CONFIG_DM_REGULATOR_CMD to CONFIG_CMD_REGULATOR
> - common/Kconfig - cleanup
> ---
>common/Kconfig | 22 +++
>common/Makefile| 1 +
>common/cmd_regulator.c | 403
> +
>3 files changed, 426 insertions(+)
>create mode 100644 common/cmd_regulator.c
Acked-by: Simon Glass
I have a few nits that could be dealt with by a follow-on patch.
>>>
>>> Ok.
>>>
>>>
>
> diff --git a/common/Kconfig b/common/Kconfig
> index 4666f8e..52f8bb1 100644
> --- a/common/Kconfig
> +++ b/common/Kconfig
> @@ -470,5 +470,27 @@ config CMD_PMIC
> - pmic read address - read byte of register at address
> - pmic write address - write byte to register at address
> The only one change for this command is 'dev' subcommand.
> +
> +config CMD_REGULATOR
> + bool "Enable Driver Model REGULATOR command"
> + depends on DM_REGULATOR
> + help
> + This command is based on driver model regulator's API.
> + User interface features:
> + - list - list regulator devices
> + - regulator dev - show or [set] operating regulator
> device
> + - regulator info - print constraints info
> + - regulator status - print operating status
> + - regulator value - print/[set] voltage value [uV]
> + - regulator current - print/[set] current value [uA]
> + - regulator mode - print/[set] operating mode id
> + - regulator enable - enable the regulator output
> + - regulator disable - disable the regulator output
> +
> + The '-f' (force) option can be used for set the value which
> exceeds
> + the limits, which are found in device-tree and are kept in
> regulator's
> + uclass platdata structure.
> +
>endmenu
> +
>endmenu
> diff --git a/common/Makefile b/common/Makefile
> index 87a3efe..93bded3 100644
> --- a/common/Makefile
> +++ b/common/Makefile
> @@ -212,6 +212,7 @@ obj-$(CONFIG_CMD_GPT) += cmd_gpt.o
>
># Power
>obj-$(CONFIG_CMD_PMIC) += cmd_pmic.o
> +obj-$(CONFIG_CMD_REGULATOR) += cmd_regulator.o
>endif
>
>ifdef CONFIG_SPL_BUILD
> diff --git a/common/cmd_regulator.c b/common/cmd_regulator.c
> new file mode 100644
> index 000..b1b9e87
> --- /dev/null
> +++ b/common/cmd_regulator.c
> @@ -0,0 +1,403 @@
> +/*
> + * Copyright (C) 2014-2015 Samsung Electronics
> + * Przemyslaw Marczak
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define LIMIT_SEQ 3
> +#define LIMIT_DEVNAME 20
> +#define LIMIT_OFNAME 20
> +#define LIMIT_INFO 16
> +
> +static struct udevice *currdev;
> +
> +static int failed(const char *getset, const char *thing,
> + const char *for_dev, int ret)
> +{
> + printf("Can't %s %s %s.\nError: %d (%s)\n", getset, thing,
> for_dev,
> + ret,
> errno_str(ret));
blank line here.
>>>
>>>
>>>
>>> I don't see the blank line here in the patch, which I send.
>>
>>
>> Odd, there seem to be two blank lines there, and we only need one.
>>
>
> Ah, sorry. You mean, that there should be added a blank line.
> Ok, will add one.
>
>>>
I
Re: [U-Boot] Patchwork flaky?
On Fri, Apr 24, 2015 at 8:50 AM, Simon Glass wrote: > Hi, > > I don't see the latest patches in patchwork. It seems to be suffering > problems of late. Does anyone know the cause? > > Also perhaps unrelated last night I noticed I could not access > git.denx.de using 'git fetch'. Related. DENX hosting is currently hiccuping so patchwork isn't being fed because the mailing list isn't sending emails right now. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-Boot PATCH v2] sf: Fix to compute proper sector_size
Upto now flash sector_size is assigned from params which isn't
necessarily a sector size from vendor, so based on the SECT_*
flags from flash_params the erase_size will compute and it will
become the sector_size finally.
Bug report (from Bin Meng):
=> sf probe
SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB,
total 2 MiB, mapped at ffe0
=> sf erase 0 +100
SF: 65536 bytes @ 0x0 Erased: OK
Signed-off-by: Jagannadha Sutradharudu Teki
Reported-by: Bin Meng
---
Changes for v2:
-
drivers/mtd/spi/sf_internal.h | 3 ++-
drivers/mtd/spi/sf_probe.c| 3 +++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index bd834dc..bef8701 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -119,7 +119,8 @@ int sst_write_bp(struct spi_flash *flash, u32 offset,
size_t len,
* @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
* @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
* @ext_jedec: Device ext_jedec ID
- * @sector_size: Sector size of this device
+ * @sector_size: Isn't necessarily a sector size from vendor,
+ * the size here is what works with Sector erase (64KB)
* @nr_sectors:No.of sectors on this device
* @e_rd_cmd: Enum list for read commands
* @flags: Important param, for flash specific behaviour
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index de8d0b7..3f6b882 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -184,6 +184,9 @@ static int spi_flash_validate_params(struct spi_slave *spi,
u8 *idcode,
flash->erase_size = flash->sector_size;
}
+ /* Now erase size becomes valid sector size */
+ flash->sector_size = flash->erase_size;
+
/* Look for the fastest read cmd */
cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx);
if (cmd) {
--
1.9.1
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Re: [U-Boot] fatload from eMMC general purpose partition
Hi Andreas, I am facing a similar problem not able to access the GP partitions from uboot. Did you have any luck accessing these partitions?? Thanks, Harsha -- View this message in context: http://u-boot.10912.n7.nabble.com/fatload-from-eMMC-general-purpose-partition-tp185166p212395.html Sent from the U-Boot mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] pci: Option rom class is a 24-bit number
On 24 April 2015 at 01:48, Bin Meng wrote: > We should pass a u32 class number to pci_rom_probe() instead of a u16. > > Signed-off-by: Bin Meng > --- > > drivers/pci/pci_rom.c | 20 +++- > 1 file changed, 11 insertions(+), 9 deletions(-) Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] socfpga: implement socdk SPI flash config in dts
On Fri 2015-04-24 05:22:55, Marek Vasut wrote: > On Thursday, April 23, 2015 at 09:14:01 AM, Pavel Machek wrote: > > SocDK has same QSPI and SPI flash configuration as Socrates. Add > > support for it. > > > > Signed-off-by: Pavel Machek > > Applied, thanks. > > Can you please cook one for Arria V too while at it, so we're consistent ? Ok (if you are sure it has same hardware?). Should something like socfpga_devel_board.dtsi be created so we don't have to copy same piece of dts 3 times? Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 00/21] sunxi: Move ALL boards to the device-model
Hi Simon, Ian, As promised here is my patch-set to move all sunxi boards to the device-model, it was slightly more work then I expected, and as such the patch-set is also somewhat larger then expected, but it is done :) Please review, since this all only touches sunxi specific files the intention is to merge this through the sunxi tree as soon as all the patches are acked. Regards, Hans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/5] mx6cuboxi: Fix the defconfig name
From: Fabio Estevam The correct name of the defconfig file is 'mx6cuboxi_defconfig'. Signed-off-by: Fabio Estevam --- Changes since v2: - None Changes since v1: - None board/solidrun/mx6cuboxi/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/solidrun/mx6cuboxi/MAINTAINERS b/board/solidrun/mx6cuboxi/MAINTAINERS index 3d468ed..a3506c2 100644 --- a/board/solidrun/mx6cuboxi/MAINTAINERS +++ b/board/solidrun/mx6cuboxi/MAINTAINERS @@ -3,4 +3,4 @@ M: Fabio Estevam S: Maintained F: board/solidrun/mx6cuboxi/ F: include/configs/mx6cuboxi.h -F: configs/mx6cuboxi_spl_defconfig +F: configs/mx6cuboxi_defconfig -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 17/21] sunxi: dts: Add dts files which have been submitted but not yet merged upstream
We need dts files for all boards we support, so bring in a few unmerged ones,
these will be replaced with the upstream merged versions the next time we
sync dts files.
Signed-off-by: Hans de Goede
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/sun4i-a10-jesurun-q5.dts | 194 ++
arch/arm/dts/sun7i-a20-primo73.dts| 102 ++
3 files changed, 298 insertions(+)
create mode 100644 arch/arm/dts/sun4i-a10-jesurun-q5.dts
create mode 100644 arch/arm/dts/sun7i-a20-primo73.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3ff55dd..a18c565 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -65,6 +65,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-hackberry.dtb \
sun4i-a10-hyundai-a7hd.dtb \
sun4i-a10-inet97fv2.dtb \
+ sun4i-a10-jesurun-q5.dtb \
sun4i-a10-marsboard.dtb \
sun4i-a10-mini-xplus.dtb \
sun4i-a10-mk802.dtb \
@@ -102,6 +103,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-orangepi-mini.dtb \
sun7i-a20-pcduino3.dtb \
sun7i-a20-pcduino3-nano.dtb \
+ sun7i-a20-primo73.dtb \
sun7i-a20-wexler-tab7200.dtb
dtb-$(CONFIG_MACH_SUN8I_A23) += \
sun8i-a23-ippo-q8h-v5.dtb \
diff --git a/arch/arm/dts/sun4i-a10-jesurun-q5.dts
b/arch/arm/dts/sun4i-a10-jesurun-q5.dts
new file mode 100644
index 000..1b0452f
--- /dev/null
+++ b/arch/arm/dts/sun4i-a10-jesurun-q5.dts
@@ -0,0 +1,194 @@
+/*
+ * Copyright 2015 Gábor Nyers
+ *
+ * Gábor Nyers
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun4i-a10.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include
+#include
+
+/ {
+ model = "Jesurun Q5";
+ compatible = "jesurun,q5", "allwinner,sun4i-a10";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins_q5>;
+
+ green {
+ label = "q5:green:usr";
+ gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* PH20 */
+ };
+
+ };
+
+ reg_emac_3v3: emac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_power_pin_q5>;
+ regulator-name = "emac-3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ enable-active-high;
+ gpio = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */
+ };
+};
+
+&ahci {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+
[U-Boot] [PATCH 20/21] sunxi: Move all boards to the device-model
Now that we've everything prepared for it remove the DM settings from the defconfig(s) and simply always set them for sunxi, so that all sunxi boards will allways use dm now. Signed-off-by: Hans de Goede --- arch/arm/Kconfig | 5 + board/sunxi/Kconfig| 12 configs/A20-OLinuXino-Lime2_defconfig | 2 -- configs/A20-OLinuXino-Lime_defconfig | 2 -- configs/A20-OLinuXino_MICRO_defconfig | 2 -- configs/Bananapi_defconfig | 2 -- configs/Bananapro_defconfig| 2 -- configs/CSQ_CS908_defconfig| 2 -- configs/Colombus_defconfig | 2 -- configs/Cubieboard2_defconfig | 2 -- configs/Cubietruck_defconfig | 2 -- configs/Hummingbird_A31_defconfig | 2 -- configs/Linksprite_pcDuino3_Nano_defconfig | 2 -- configs/Linksprite_pcDuino3_defconfig | 9 - configs/Mele_I7_defconfig | 2 -- configs/Mele_M3_defconfig | 2 -- configs/Mele_M5_defconfig | 2 -- configs/Mele_M9_defconfig | 2 -- configs/Orangepi_defconfig | 2 -- configs/Orangepi_mini_defconfig| 2 -- configs/UTOO_P66_defconfig | 1 + configs/Wits_Pro_A20_DKT_defconfig | 2 -- configs/i12-tvbox_defconfig| 2 -- configs/mixtile_loftq_defconfig| 2 -- include/configs/sunxi-common.h | 2 +- 25 files changed, 19 insertions(+), 50 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b39bb4f..d681fcc 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -627,6 +627,11 @@ config TARGET_SOCFPGA_CYCLONE5 config ARCH_SUNXI bool "Support sunxi (Allwinner) SoCs" + select DM + select DM_GPIO + select OF_CONTROL + select OF_SEPARATE + select SPL_DISABLE_OF_CONTROL config TARGET_SNOWBALL bool "Support snowball" diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 3831d3b..3997637 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -529,4 +529,16 @@ config GMAC_TX_DELAY ---help--- Set the GMAC Transmit Clock Delay Chain value. +config NET + default y + +config NETDEVICES + default y + +config DM_ETH + default y + +config DM_SERIAL + default y + endif diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 7c1490e..59e7473 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -11,5 +11,3 @@ CONFIG_DRAM_CLK=480 CONFIG_DRAM_ZQ=127 CONFIG_DRAM_EMR1=4 CONFIG_ETH_DESIGNWARE=y -CONFIG_NETDEVICES=y -CONFIG_NET=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index 879b939..2ba70f7 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -8,5 +8,3 @@ CONFIG_DRAM_CLK=480 CONFIG_DRAM_ZQ=127 CONFIG_DRAM_EMR1=4 CONFIG_ETH_DESIGNWARE=y -CONFIG_NETDEVICES=y -CONFIG_NET=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index a530d13..7d2e810 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -12,5 +12,3 @@ CONFIG_DRAM_CLK=384 CONFIG_DRAM_ZQ=127 CONFIG_DRAM_EMR1=4 CONFIG_ETH_DESIGNWARE=y -CONFIG_NETDEVICES=y -CONFIG_NET=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 0e1d7b5..8dcf4a7 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -9,5 +9,3 @@ CONFIG_DRAM_CLK=432 CONFIG_DRAM_ZQ=127 CONFIG_DRAM_EMR1=4 CONFIG_ETH_DESIGNWARE=y -CONFIG_NETDEVICES=y -CONFIG_NET=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index b68333f..d3e015c 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -11,5 +11,3 @@ CONFIG_DRAM_CLK=432 CONFIG_DRAM_ZQ=127 CONFIG_DRAM_EMR1=4 CONFIG_ETH_DESIGNWARE=y -CONFIG_NETDEVICES=y -CONFIG_NET=y diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index 4d9e1e9..817cd6d 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -14,5 +14,3 @@ CONFIG_AXP221_ALDO1_VOLT=3300 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" CONFIG_ETH_DESIGNWARE=y -CONFIG_NETDEVICES=y -CONFIG_NET=y diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 96b55ba..c7efabc 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -11,5 +11,3 @@ CONFIG_AXP221_ALDO1_VOLT=3300 # No Vbus gpio for usb1 CONFIG_USB1_VBUS_PIN="" CONFIG_ETH_DESIGNWARE=y -CONFIG_NETDEVICES=y -CONFIG_NET=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index ca0be1f..092d6b0 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -9,5 +9,3 @@ CONFIG_DRAM_CLK=480 CONFIG_DRAM_ZQ=127 CONFIG_DRAM_EMR1=4 CONFIG_ETH_DESIGNWARE=y -C
Re: [U-Boot] [PATCH v2] f_thor: Dont perform reset at the end of thor
Hi Michal,
> From: Siva Durga Prasad Paladugu
>
> Dont perform reset at the end of thor download
> if configured to do reset off.
> Reset may not be required in all cases and hence
> provided an option to do so.
>
> The case would be to download the images to DDR instead
> of flash device.
>
> Signed-off-by: Siva Durga Prasad Paladugu
> Signed-off-by: Michal Simek
> ---
>
> Changes in v2:
> - Update commit message with additional description
>
> drivers/usb/gadget/f_thor.c | 7 +++
> drivers/usb/gadget/f_thor.h | 3 +++
> 2 files changed, 10 insertions(+)
>
> diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
> index e9a690eff5f1..5c8f6768519c 100644
> --- a/drivers/usb/gadget/f_thor.c
> +++ b/drivers/usb/gadget/f_thor.c
> @@ -123,6 +123,9 @@ static int process_rqt_cmd(const struct rqt_box
> *rqt) send_rsp(rsp);
> g_dnl_unregister();
> dfu_free_entities();
> +#ifdef CONFIG_THOR_RESET_OFF
> + return RESET_DONE;
> +#endif
> run_command("reset", 0);
> break;
> case RQT_CMD_POWEROFF:
> @@ -728,6 +731,10 @@ int thor_handle(void)
>
> if (ret > 0) {
> ret = process_data();
> +#ifdef CONFIG_THOR_RESET_OFF
> + if (ret == RESET_DONE)
> + break;
> +#endif
> if (ret < 0)
> return ret;
> } else {
> diff --git a/drivers/usb/gadget/f_thor.h b/drivers/usb/gadget/f_thor.h
> index 833a9d24ae7e..83412851dd17 100644
> --- a/drivers/usb/gadget/f_thor.h
> +++ b/drivers/usb/gadget/f_thor.h
> @@ -121,4 +121,7 @@ struct f_thor {
> #define F_NAME_BUF_SIZE 32
> #define THOR_PACKET_SIZE SZ_1M /* 1 MiB */
> #define THOR_STORE_UNIT_SIZE SZ_32M /* 32 MiB */
> +#ifdef CONFIG_THOR_RESET_OFF
> +#define RESET_DONE 0x
> +#endif
> #endif /* _USB_THOR_H_ */
Applied to u-boot-dfu. Thanks
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH v2] dm: sf: Add Atmel DataFlash spi flash driver
Atmel DataFlash chips have commands different from common spi
flash commands.
Atmel DataFlash also have special page-size.
This driver add support for accessing Atmel DataFlash.
It is based on the Driver Model.
Signed-off-by: Haikun Wang
---
Verified with AT45DB021B.
Changes in v2:
- 1. Correct comment style
- 2. Use get_timer in dataflash_waitready to check whether timeout
- 3. Remove struct spi_flash * in struct dataflash, and get it from
udevice->uclass_priv
- 4. Replace spi_flash_write_common with spi_flash_cmd_write
- 5. Replace spi_flash_read with spi_flash_cmd_read
- 6. Change type of varible "status" form char to u8 in dataflash_status
- 7. Change add_dataflash's argument type due to
- 8. Add claim_bus and release_bus in erase/write/read due to
Changes in v1: None
drivers/mtd/spi/Makefile| 1 +
drivers/mtd/spi/spi_dataflash.c | 704
2 files changed, 705 insertions(+)
create mode 100644 drivers/mtd/spi/spi_dataflash.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index c61b784..42acd24 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -15,6 +15,7 @@ endif
#ifndef CONFIG_DM_SPI
obj-$(CONFIG_SPI_FLASH) += sf_probe.o
#endif
+obj-$(CONFIG_DM_SPI_DATAFLASH) += spi_dataflash.o
obj-$(CONFIG_CMD_SF) += sf.o
obj-$(CONFIG_SPI_FLASH) += sf_ops.o sf_params.o
obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o
diff --git a/drivers/mtd/spi/spi_dataflash.c b/drivers/mtd/spi/spi_dataflash.c
new file mode 100644
index 000..c68cf2e
--- /dev/null
+++ b/drivers/mtd/spi/spi_dataflash.c
@@ -0,0 +1,704 @@
+/*
+ *
+ * Atmel DataFlash probing
+ *
+ * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc.
+ * Haikun Wang (haikun.w...@freescale.com)
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+*/
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "sf_internal.h"
+
+/*
+ * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
+ * each chip, which may be used for double buffered I/O; but this driver
+ * doesn't (yet) use these for any kind of i/o overlap or prefetching.
+ *
+ * Sometimes DataFlash is packaged in MMC-format cards, although the
+ * MMC stack can't (yet?) distinguish between MMC and DataFlash
+ * protocols during enumeration.
+ */
+
+/* reads can bypass the buffers */
+#define OP_READ_CONTINUOUS 0xE8
+#define OP_READ_PAGE 0xD2
+
+/* group B requests can run even while status reports "busy" */
+#define OP_READ_STATUS 0xD7/* group B */
+
+/* move data between host and buffer */
+#define OP_READ_BUFFER10xD4/* group B */
+#define OP_READ_BUFFER20xD6/* group B */
+#define OP_WRITE_BUFFER1 0x84/* group B */
+#define OP_WRITE_BUFFER2 0x87/* group B */
+
+/* erasing flash */
+#define OP_ERASE_PAGE 0x81
+#define OP_ERASE_BLOCK 0x50
+
+/* move data between buffer and flash */
+#define OP_TRANSFER_BUF1 0x53
+#define OP_TRANSFER_BUF2 0x55
+#define OP_MREAD_BUFFER1 0xD4
+#define OP_MREAD_BUFFER2 0xD6
+#define OP_MWERASE_BUFFER1 0x83
+#define OP_MWERASE_BUFFER2 0x86
+#define OP_MWRITE_BUFFER1 0x88/* sector must be pre-erased */
+#define OP_MWRITE_BUFFER2 0x89/* sector must be pre-erased */
+
+/* write to buffer, then write-erase to flash */
+#define OP_PROGRAM_VIA_BUF10x82
+#define OP_PROGRAM_VIA_BUF20x85
+
+/* compare buffer to flash */
+#define OP_COMPARE_BUF10x60
+#define OP_COMPARE_BUF20x61
+
+/* read flash to buffer, then write-erase to flash */
+#define OP_REWRITE_VIA_BUF10x58
+#define OP_REWRITE_VIA_BUF20x59
+
+/*
+ * newer chips report JEDEC manufacturer and device IDs; chip
+ * serial number and OTP bits; and per-sector writeprotect.
+ */
+#define OP_READ_ID 0x9F
+#define OP_READ_SECURITY 0x77
+#define OP_WRITE_SECURITY_REVC 0x9A
+#define OP_WRITE_SECURITY 0x9B/* revision D */
+
+
+struct dataflash {
+ uint8_t command[16];
+ unsigned short page_offset;/* offset in flash address */
+};
+
+/*
+ * Return the status of the DataFlash device.
+ */
+static inline int dataflash_status(struct spi_slave *spi)
+{
+ int ret;
+ u8 status;
+ /*
+* NOTE: at45db321c over 25 MHz wants to write
+* a dummy byte after the opcode...
+*/
+ ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1);
+ return ret ? -EIO : status;
+}
+
+/*
+ * Poll the DataFlash device until it is READY.
+ * This usually takes 5-20 msec or so; more for sector erase.
+ * ready: return > 0
+ */
+static int dataflash_waitready(struct spi_slave *spi)
+{
+ int status;
+ int timeout = 2 * CONFIG_SYS_HZ;
+ int timebase;
+
+ timebase = get_timer(0);
+ do {
+ status = dataflash_status(spi);
+ if (status < 0)
+
[U-Boot] [PATCH v3 2/5] mx6cuboxi: Prepare for multi SoC support
From: Fabio Estevam
Cubox-i and Hummingboard support several MX6 SoCs: mx6solo, mx6dual-lite,
mx6dual and mx6quad.
Use IOMUX_PADS() macro in order to prepare for the multi-SoC support.
Also pass 'MX6QDL' in the defconfig to indicate it.
Signed-off-by: Fabio Estevam
---
Changes since v2:
- None
Changes since v1:
- None
board/solidrun/mx6cuboxi/mx6cuboxi.c | 60 ++--
configs/mx6cuboxi_defconfig | 2 +-
2 files changed, 31 insertions(+), 31 deletions(-)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index b696dcb..0377dc4 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -28,7 +28,6 @@
#include
#include
#include
-#include
#include
DECLARE_GLOBAL_DATA_PTR;
@@ -59,22 +58,22 @@ int dram_init(void)
}
static iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
+ IOMUX_PADS(PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+ IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
static iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_SD2_CLK__SD2_CLK| MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CMD__SD2_CMD| MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
};
static void setup_iomux_uart(void)
{
- imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+ SETUP_IOMUX_PADS(uart1_pads);
}
static struct fsl_esdhc_cfg usdhc_cfg[1] = {
@@ -88,7 +87,7 @@ int board_mmc_getcd(struct mmc *mmc)
int board_mmc_init(bd_t *bis)
{
- imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+ SETUP_IOMUX_PADS(usdhc2_pads);
usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
@@ -97,33 +96,33 @@ int board_mmc_init(bd_t *bis)
}
static iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
/* AR8035 reset */
- MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
+ IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
/* AR8035 interrupt */
- MX6_PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL),
+ IOMUX_PADS(PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),
/* GPIO16 -> AR8035 25MHz */
- MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
MUX_PAD_CTRL(ENET_PAD_CTRL)),
/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK),
- MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
- MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
- MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD3__RGMII_RD3
Re: [U-Boot] [PATCH v2] dm: sf: Add Atmel DataFlash spi flash driver
Hi Haikun,
On 24 April 2015 at 07:22, Haikun Wang wrote:
> Atmel DataFlash chips have commands different from common spi
> flash commands.
> Atmel DataFlash also have special page-size.
> This driver add support for accessing Atmel DataFlash.
> It is based on the Driver Model.
>
> Signed-off-by: Haikun Wang
> ---
> Verified with AT45DB021B.
>
> Changes in v2:
> - 1. Correct comment style
> - 2. Use get_timer in dataflash_waitready to check whether timeout
> - 3. Remove struct spi_flash * in struct dataflash, and get it from
> udevice->uclass_priv
> - 4. Replace spi_flash_write_common with spi_flash_cmd_write
> - 5. Replace spi_flash_read with spi_flash_cmd_read
> - 6. Change type of varible "status" form char to u8 in dataflash_status
> - 7. Change add_dataflash's argument type due to
> - 8. Add claim_bus and release_bus in erase/write/read due to
>
> Changes in v1: None
> drivers/mtd/spi/Makefile| 1 +
> drivers/mtd/spi/spi_dataflash.c | 704
>
> 2 files changed, 705 insertions(+)
> create mode 100644 drivers/mtd/spi/spi_dataflash.c
Reviewed-by: Simon Glass
See a small questoin below.
>
> diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
> index c61b784..42acd24 100644
> --- a/drivers/mtd/spi/Makefile
> +++ b/drivers/mtd/spi/Makefile
> @@ -15,6 +15,7 @@ endif
> #ifndef CONFIG_DM_SPI
> obj-$(CONFIG_SPI_FLASH) += sf_probe.o
> #endif
> +obj-$(CONFIG_DM_SPI_DATAFLASH) += spi_dataflash.o
> obj-$(CONFIG_CMD_SF) += sf.o
> obj-$(CONFIG_SPI_FLASH) += sf_ops.o sf_params.o
> obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o
> diff --git a/drivers/mtd/spi/spi_dataflash.c b/drivers/mtd/spi/spi_dataflash.c
> new file mode 100644
> index 000..c68cf2e
> --- /dev/null
> +++ b/drivers/mtd/spi/spi_dataflash.c
> @@ -0,0 +1,704 @@
> +/*
> + *
> + * Atmel DataFlash probing
> + *
> + * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc.
> + * Haikun Wang (haikun.w...@freescale.com)
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> +*/
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "sf_internal.h"
> +
> +/*
> + * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
> + * each chip, which may be used for double buffered I/O; but this driver
> + * doesn't (yet) use these for any kind of i/o overlap or prefetching.
> + *
> + * Sometimes DataFlash is packaged in MMC-format cards, although the
> + * MMC stack can't (yet?) distinguish between MMC and DataFlash
> + * protocols during enumeration.
> + */
> +
> +/* reads can bypass the buffers */
> +#define OP_READ_CONTINUOUS 0xE8
> +#define OP_READ_PAGE 0xD2
> +
> +/* group B requests can run even while status reports "busy" */
> +#define OP_READ_STATUS 0xD7/* group B */
> +
> +/* move data between host and buffer */
> +#define OP_READ_BUFFER10xD4/* group B */
> +#define OP_READ_BUFFER20xD6/* group B */
> +#define OP_WRITE_BUFFER1 0x84/* group B */
> +#define OP_WRITE_BUFFER2 0x87/* group B */
> +
> +/* erasing flash */
> +#define OP_ERASE_PAGE 0x81
> +#define OP_ERASE_BLOCK 0x50
> +
> +/* move data between buffer and flash */
> +#define OP_TRANSFER_BUF1 0x53
> +#define OP_TRANSFER_BUF2 0x55
> +#define OP_MREAD_BUFFER1 0xD4
> +#define OP_MREAD_BUFFER2 0xD6
> +#define OP_MWERASE_BUFFER1 0x83
> +#define OP_MWERASE_BUFFER2 0x86
> +#define OP_MWRITE_BUFFER1 0x88/* sector must be pre-erased */
> +#define OP_MWRITE_BUFFER2 0x89/* sector must be pre-erased */
> +
> +/* write to buffer, then write-erase to flash */
> +#define OP_PROGRAM_VIA_BUF10x82
> +#define OP_PROGRAM_VIA_BUF20x85
> +
> +/* compare buffer to flash */
> +#define OP_COMPARE_BUF10x60
> +#define OP_COMPARE_BUF20x61
> +
> +/* read flash to buffer, then write-erase to flash */
> +#define OP_REWRITE_VIA_BUF10x58
> +#define OP_REWRITE_VIA_BUF20x59
> +
> +/*
> + * newer chips report JEDEC manufacturer and device IDs; chip
> + * serial number and OTP bits; and per-sector writeprotect.
> + */
> +#define OP_READ_ID 0x9F
> +#define OP_READ_SECURITY 0x77
> +#define OP_WRITE_SECURITY_REVC 0x9A
> +#define OP_WRITE_SECURITY 0x9B/* revision D */
> +
> +
> +struct dataflash {
> + uint8_t command[16];
> + unsigned short page_offset;/* offset in flash address */
> +};
> +
> +/*
> + * Return the status of the DataFlash device.
> + */
> +static inline int dataflash_status(struct spi_slave *spi)
> +{
> + int ret;
> + u8 status;
> + /*
> +* NOTE: at45db321c over 25 MHz wants to write
> +* a dummy byte after the opcode...
> +*/
> + ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1);
> + return ret ? -EIO : status;
> +}
> +
> +/*
> + * Po
[U-Boot] [PATCH v3 5/5] mx6cuboxi: Load the correct 'fdt_file' variable
From: Fabio Estevam
Instead of hardcoding the 'fdt_file' variable, let's detect the SoC and
board variant on the fly and change the dtb name.
Based on a patch from Rabeeh Khoury.
Signed-off-by: Rabeeh Khoury
Signed-off-by: Fabio Estevam
---
Changes since v2:
- Add Rabeeh's Signed-off-by
Changes since v1:
- Attribute the credit to Rabeeh
- Create a U-boot command for checking if the board is hummingboard
board/solidrun/mx6cuboxi/mx6cuboxi.c | 30 ++
include/configs/mx6cuboxi.h | 12 ++--
2 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 83410b2..4ea6081 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -212,6 +212,36 @@ int checkboard(void)
return 0;
}
+static const char *build_dts_prefix(void)
+{
+ if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
+ return "imx6q";
+ else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO))
+ return "imx6dl";
+
+ return "unknown";
+}
+
+static int do_is_hummingboard(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
+{
+ if (is_hummingboard())
+ return CMD_RET_SUCCESS;
+ else
+ return CMD_RET_FAILURE;
+}
+
+U_BOOT_CMD(
+ is_hummingboard, 1, 1, do_is_hummingboard,
+ "detect if it is a Hummingboard or Cubox-i",
+ ""
+);
+
+int misc_init_r(void)
+{
+ setenv("dts_prefix", build_dts_prefix());
+ return 0;
+}
+
#ifdef CONFIG_SPL_BUILD
#include
static const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 5d58b16..c3cf633 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -29,6 +29,7 @@
#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
#define CONFIG_CMD_FUSE
@@ -81,14 +82,19 @@
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV "ttymxc0"
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
-#define CONFIG_DEFAULT_FDT_FILE"imx6q-hummingboard.dtb"
#define CONFIG_SYS_FSL_USDHC_NUM 1
#define CONFIG_SYS_MMC_ENV_DEV 0 /* SDHC2 */
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
- "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "check_suffix=" \
+ "if is_hummingboard; then " \
+ "setenv dts_suffix -hummingboard.dtb;" \
+ "else " \
+ "setenv dts_suffix -cubox-i.dtb;" \
+ "fi; "\
+ "setenv fdt_file ${dts_prefix}${dts_suffix};" \
"fdt_addr=0x1800\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
@@ -119,6 +125,7 @@
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
+ "run check_suffix; "\
"run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
@@ -137,6 +144,7 @@
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
+ "run check_suffix; "\
"run netargs; " \
"if test ${ip_dyn} = yes; then " \
"setenv get_cmd dhcp; " \
--
1.9.1
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/5] mx6cuboxi: Introduce multi-SoC support
From: Fabio Estevam
Cubox-i and Hummingboard support several MX6 SoCs: mx6solo, mx6dual-lite,
mx6dual and mx6quad. Add support for the different SoC/memory sizes
combinations.
DDR initialization values were extracted from Solid-run internal U-boot.
Tested on a CuBox-i4Pro, HummingBoard-i2eX and HummingBoard-i1.
Signed-off-by: Fabio Estevam
---
Changes since v2:
- None
Changes since v1:
- Mention that the DDR init came from Solid-run
board/solidrun/mx6cuboxi/mx6cuboxi.c | 134 ---
1 file changed, 125 insertions(+), 9 deletions(-)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 0377dc4..1f240ae 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -175,7 +175,7 @@ int checkboard(void)
#ifdef CONFIG_SPL_BUILD
#include
-static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
+static const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {
.dram_sdclk_0 = 0x00020030,
.dram_sdclk_1 = 0x00020030,
.dram_cas = 0x00020030,
@@ -204,7 +204,36 @@ static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
.dram_dqm7 = 0x00020030,
};
-static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {
+static const struct mx6sdl_iomux_ddr_regs mx6dl_ddr_ioregs = {
+ .dram_sdclk_0 = 0x0028,
+ .dram_sdclk_1 = 0x0028,
+ .dram_cas = 0x0028,
+ .dram_ras = 0x0028,
+ .dram_reset = 0x000c0028,
+ .dram_sdcke0 = 0x3000,
+ .dram_sdcke1 = 0x3000,
+ .dram_sdba2 = 0x,
+ .dram_sdodt0 = 0x3030,
+ .dram_sdodt1 = 0x3030,
+ .dram_sdqs0 = 0x0028,
+ .dram_sdqs1 = 0x0028,
+ .dram_sdqs2 = 0x0028,
+ .dram_sdqs3 = 0x0028,
+ .dram_sdqs4 = 0x0028,
+ .dram_sdqs5 = 0x0028,
+ .dram_sdqs6 = 0x0028,
+ .dram_sdqs7 = 0x0028,
+ .dram_dqm0 =0x0028,
+ .dram_dqm1 =0x0028,
+ .dram_dqm2 =0x0028,
+ .dram_dqm3 =0x0028,
+ .dram_dqm4 =0x0028,
+ .dram_dqm5 =0x0028,
+ .dram_dqm6 =0x0028,
+ .dram_dqm7 =0x0028,
+};
+
+static const struct mx6dq_iomux_grp_regs mx6q_grp_ioregs = {
.grp_ddr_type = 0x000C,
.grp_ddrmode_ctl = 0x0002,
.grp_ddrpke = 0x,
@@ -221,7 +250,25 @@ static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {
.grp_b7ds = 0x0030,
};
-static const struct mx6_mmdc_calibration mx6_mmcd_calib = {
+static const struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {
+ .grp_ddr_type = 0x000c,
+ .grp_ddrmode_ctl = 0x0002,
+ .grp_ddrpke = 0x,
+ .grp_addds = 0x0028,
+ .grp_ctlds = 0x0028,
+ .grp_ddrmode = 0x0002,
+ .grp_b0ds = 0x0028,
+ .grp_b1ds = 0x0028,
+ .grp_b2ds = 0x0028,
+ .grp_b3ds = 0x0028,
+ .grp_b4ds = 0x0028,
+ .grp_b5ds = 0x0028,
+ .grp_b6ds = 0x0028,
+ .grp_b7ds = 0x0028,
+};
+
+/* microSOM with Dual processor and 1GB memory */
+static const struct mx6_mmdc_calibration mx6q_1g_mmcd_calib = {
.p0_mpwldectrl0 = 0x,
.p0_mpwldectrl1 = 0x,
.p1_mpwldectrl0 = 0x,
@@ -236,7 +283,49 @@ static const struct mx6_mmdc_calibration mx6_mmcd_calib = {
.p1_mpwrdlctl =0x422a423c,
};
-static struct mx6_ddr3_cfg mem_ddr = {
+/* microSOM with Quad processor and 2GB memory */
+static const struct mx6_mmdc_calibration mx6q_2g_mmcd_calib = {
+ .p0_mpwldectrl0 = 0x,
+ .p0_mpwldectrl1 = 0x,
+ .p1_mpwldectrl0 = 0x,
+ .p1_mpwldectrl1 = 0x,
+ .p0_mpdgctrl0 =0x0314031c,
+ .p0_mpdgctrl1 =0x023e0304,
+ .p1_mpdgctrl0 =0x03240330,
+ .p1_mpdgctrl1 =0x03180260,
+ .p0_mprddlctl =0x3630323c,
+ .p1_mprddlctl =0x3436283a,
+ .p0_mpwrdlctl =0x36344038,
+ .p1_mpwrdlctl =0x422a423c,
+};
+
+/* microSOM with Solo processor and 512MB memory */
+static const struct mx6_mmdc_calibration mx6dl_512m_mmcd_calib = {
+ .p0_mpwldectrl0 = 0x0045004D,
+ .p0_mpwldectrl1 = 0x003A0047,
+ .p0_mpdgctrl0 = 0x023C0224,
+ .p0_mpdgctrl1 = 0x02000220,
+ .p0_mprddlctl = 0x4846,
+ .p0_mpwrdlctl = 0x32343032,
+};
+
+/* microSOM with Dual lite processor and 1GB memory */
+static const struct mx6_mmdc_calibration mx6dl_1g_mmcd_calib = {
+ .p0_mpwldectrl0 = 0x0045004D,
+ .p0_mpwldectrl1 = 0x003A0047,
+ .p1_mpwldectrl0 = 0x001F001F,
+ .p1_mpwldectrl1 = 0x00210035,
+ .p0_mpdgctrl0 =0x023C0224,
+ .p0_mpdgctrl1 =0x02000220,
+ .p1_mpdgctrl0 =0x02200220,
+ .p1_mpdgctrl1 =0x02000220,
+ .p0_mprddlctl =0x4846,
+ .p
Re: [U-Boot] [PATCH v4 07/16] dm: regulator: add regulator command
Hello Simon,
On 04/24/2015 02:34 PM, Simon Glass wrote:
Hi Przemyslaw,
On 24 April 2015 at 06:18, Przemyslaw Marczak wrote:
Hello Simon,
On 04/24/2015 06:51 AM, Simon Glass wrote:
Hi Przemyslaw,
On 23 April 2015 at 05:33, Przemyslaw Marczak
wrote:
Hello Simon,
On 04/22/2015 06:30 PM, Simon Glass wrote:
Hi Przemyslaw,
On 20 April 2015 at 12:07, Przemyslaw Marczak
wrote:
This command is based on driver model regulator's API.
The user interface provides:
- list UCLASS regulator devices
- show or [set] operating regulator device
- print constraints info
- print operating status
- print/[set] voltage value [uV] (force)
- print/[set] current value [uA]
- print/[set] operating mode id
- enable the regulator output
- disable the regulator output
The 'force' option can be used for setting the value which exceeds
the constraints min/max limits.
Signed-off-by: Przemyslaw Marczak
---
Changes v3:
- new file
- Kconfig entry
Changes V4:
- cmd regulator: move platdata to uc pdata
- cmd_regulator: includes cleanup
- cmd_regulator: add get_curr_dev_and_pl() check type
- move config name: CONFIG_DM_REGULATOR_CMD to CONFIG_CMD_REGULATOR
- common/Kconfig - cleanup
---
common/Kconfig | 22 +++
common/Makefile| 1 +
common/cmd_regulator.c | 403
+
3 files changed, 426 insertions(+)
create mode 100644 common/cmd_regulator.c
Acked-by: Simon Glass
I have a few nits that could be dealt with by a follow-on patch.
Ok.
diff --git a/common/Kconfig b/common/Kconfig
index 4666f8e..52f8bb1 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -470,5 +470,27 @@ config CMD_PMIC
- pmic read address - read byte of register at address
- pmic write address - write byte to register at address
The only one change for this command is 'dev' subcommand.
+
+config CMD_REGULATOR
+ bool "Enable Driver Model REGULATOR command"
+ depends on DM_REGULATOR
+ help
+ This command is based on driver model regulator's API.
+ User interface features:
+ - list - list regulator devices
+ - regulator dev - show or [set] operating regulator
device
+ - regulator info - print constraints info
+ - regulator status - print operating status
+ - regulator value - print/[set] voltage value [uV]
+ - regulator current - print/[set] current value [uA]
+ - regulator mode - print/[set] operating mode id
+ - regulator enable - enable the regulator output
+ - regulator disable - disable the regulator output
+
+ The '-f' (force) option can be used for set the value which
exceeds
+ the limits, which are found in device-tree and are kept in
regulator's
+ uclass platdata structure.
+
endmenu
+
endmenu
diff --git a/common/Makefile b/common/Makefile
index 87a3efe..93bded3 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -212,6 +212,7 @@ obj-$(CONFIG_CMD_GPT) += cmd_gpt.o
# Power
obj-$(CONFIG_CMD_PMIC) += cmd_pmic.o
+obj-$(CONFIG_CMD_REGULATOR) += cmd_regulator.o
endif
ifdef CONFIG_SPL_BUILD
diff --git a/common/cmd_regulator.c b/common/cmd_regulator.c
new file mode 100644
index 000..b1b9e87
--- /dev/null
+++ b/common/cmd_regulator.c
@@ -0,0 +1,403 @@
+/*
+ * Copyright (C) 2014-2015 Samsung Electronics
+ * Przemyslaw Marczak
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+
+#define LIMIT_SEQ 3
+#define LIMIT_DEVNAME 20
+#define LIMIT_OFNAME 20
+#define LIMIT_INFO 16
+
+static struct udevice *currdev;
+
+static int failed(const char *getset, const char *thing,
+ const char *for_dev, int ret)
+{
+ printf("Can't %s %s %s.\nError: %d (%s)\n", getset, thing,
for_dev,
+ ret,
errno_str(ret));
blank line here.
I don't see the blank line here in the patch, which I send.
Odd, there seem to be two blank lines there, and we only need one.
Ah, sorry. You mean, that there should be added a blank line.
Ok, will add one.
I worry that if someone gets one of these messages they will not be
able to find it in the source code. How about passing in the full
printf() string in each case, or just using printf() in situ? I don't
think the code space saving is significant.
It's not a debug message. And each one is different, and easy to grep
"failed". The code is a little cleaner with this. Also the command code
is
not complicated.
git grep -i failed |wc -l
2089
Is there some way to know it is a PMIC error message, and find it that
way?
Ok, I assumed that you know which command you called, and where to find it,
so you could use:
grep -i "failed" common/cmd_regulator.c | wc -l
15
But this was only the function name, not a useful text for grep.
Now I see that this should
[U-Boot] [PATCH v2 0/4] x86: Add platform PIRQ routing
Although by default (without pci=nomsi in the kernel bootline) Linux device drivers try to use MSI for device's interrupt generation, there are still some devices which only support INTx generation. Currently U-Boot on some x86 boards do not configure those devices' IRQ and route them to 8259 PIC, so when Linux kernel boots up it complains: pci :00:17.0: can't find IRQ for PCI INT A; please try using pci=biosirq This series adds the platform PIRQ routing support, so that all PCI devices found are set up to route their INTx correctly to 8259 PIC (the so-called PIC mode, as defined in the Multi-Processor Sepcification v1.4). A new Kconfig option GENERATE_PIRQ_TABLE is introduced to control whether U-Boot needs to generate a PIRQ routing table for OS to use. Changes in v2: - Correct a typo in the commit message - Use a local variable in fill_irq_info() - Print a debug message if creating pirq table fails - Use a C structure for RCBA register access Bin Meng (4): x86: Add a function to assign IRQ numbers to PCI device x86: Write configuration tables in last_stage_init() x86: Support platform PIRQ routing x86: queensbay: Implement PIRQ routing arch/x86/Kconfig | 31 arch/x86/cpu/cpu.c | 10 ++ arch/x86/cpu/pci.c | 21 +++ arch/x86/cpu/queensbay/Makefile | 2 +- arch/x86/cpu/queensbay/irq.c | 242 +++ arch/x86/cpu/queensbay/tnc.c | 10 +- arch/x86/include/asm/arch-queensbay/device.h | 94 +++ arch/x86/include/asm/arch-queensbay/irq.h| 55 ++ arch/x86/include/asm/arch-queensbay/tnc.h| 39 - arch/x86/include/asm/pci.h | 14 ++ arch/x86/include/asm/pirq_routing.h | 139 +++ arch/x86/include/asm/tables.h| 49 ++ arch/x86/include/asm/u-boot-x86.h| 2 + arch/x86/lib/Makefile| 2 + arch/x86/lib/pirq_routing.c | 129 ++ arch/x86/lib/tables.c| 30 configs/crownbay_defconfig | 1 + include/configs/crownbay.h | 1 + include/configs/x86-common.h | 1 + 19 files changed, 868 insertions(+), 4 deletions(-) create mode 100644 arch/x86/cpu/queensbay/irq.c create mode 100644 arch/x86/include/asm/arch-queensbay/device.h create mode 100644 arch/x86/include/asm/arch-queensbay/irq.h create mode 100644 arch/x86/include/asm/pirq_routing.h create mode 100644 arch/x86/include/asm/tables.h create mode 100644 arch/x86/lib/pirq_routing.c create mode 100644 arch/x86/lib/tables.c -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/5] board/BuR/tseries: Add simplefb support
Since the used AM3352 SoC doesn't have GPU it isn't allways necessary to build
in complete drm-stuff into linux kernel. In very small applications only we use
the simple-framebuffer.
So we have 2 use-cases:
- device operating on drm-driver (let simplefb node disabled)
- device operating on simplefb-driver (activate simplefb node and reserve mem)
The decision is made by means of "simplefb" environment variable.
simplefb = 0
we don't enable the (maybe) existing simplefb node and all the rest around
display is up to the linux-kernel. We just disable the backlight, beceause we
do not want see the flicker during take over of drm-driver.
simplefb = 1
we enable the (maybe) existing simplefb node and reserve framebuffers size
in memory.
Signed-off-by: Hannes Petermaier
---
board/BuR/common/common.c | 134 +
include/configs/tseries.h |4 ++
2 files changed, 90 insertions(+), 48 deletions(-)
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 3036f86..5b356fb 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -34,6 +34,7 @@
#include "bur_common.h"
#include "../../../drivers/video/am335x-fb.h"
#include
+#include
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
@@ -47,6 +48,64 @@ DECLARE_GLOBAL_DATA_PTR;
/* --*/
#if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \
!defined(CONFIG_SPL_BUILD)
+void lcdbacklight(int on)
+{
+#ifdef CONFIG_USE_FDT
+ if (gd->fdt_blob == NULL) {
+ printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
+ return;
+ }
+ unsigned int driver = FDTPROP(PATHINF, "brightdrv");
+ unsigned int bright = FDTPROP(PATHINF, "brightdef");
+ unsigned int pwmfrq = FDTPROP(PATHINF, "brightfdim");
+#else
+ unsigned int driver = getenv_ulong("ds1_bright_drv", 16, 0UL);
+ unsigned int bright = getenv_ulong("ds1_bright_def", 10, 50);
+ unsigned int pwmfrq = getenv_ulong("ds1_pwmfreq", 10, ~0UL);
+#endif
+ unsigned int tmp;
+
+ struct gptimer *const timerhw = (struct gptimer *)DM_TIMER6_BASE;
+
+ if (on)
+ bright = bright != ~0UL ? bright : 50;
+ else
+ bright = 0;
+
+ switch (driver) {
+ case 0: /* PMIC LED-Driver */
+ /* brightness level */
+ tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
+ TPS65217_WLEDCTRL2, bright, 0xFF);
+ /* current sink */
+ tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
+ TPS65217_WLEDCTRL1,
+ bright != 0 ? 0x0A : 0x02,
+ 0xFF);
+ break;
+ case 1: /* PWM using timer6 */
+ if (pwmfrq != ~0UL) {
+ timerhw->tiocp_cfg = TCFG_RESET;
+ udelay(10);
+ while (timerhw->tiocp_cfg & TCFG_RESET)
+ ;
+ tmp = ~0UL-(V_OSCK/pwmfrq); /* bottom value */
+ timerhw->tldr = tmp;
+ timerhw->tcrr = tmp;
+ tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright;
+ timerhw->tmar = tmp;
+ timerhw->tclr = (TCLR_PT | (2 << TCLR_TRG_SHIFT) |
+ TCLR_CE | TCLR_AR | TCLR_ST);
+ } else {
+ puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n");
+ }
+ break;
+ default:
+ puts("no suitable backlightdriver in env/dtb!\n");
+ break;
+ }
+}
+
int load_lcdtiming(struct am335x_lcdpanel *panel)
{
struct am335x_lcdpanel pnltmp;
@@ -304,6 +363,32 @@ int ft_board_setup(void *blob, bd_t *bd)
puts("set bootloader version 'bl-version' prop. not in dtb!\n");
return -1;
}
+ /*
+* if no simplefb is requested through environment, we don't set up
+* one, instead we turn off backlight.
+*/
+ if (getenv_ulong("simplefb", 10, 0) == 0) {
+ lcdbacklight(0);
+ return 0;
+ }
+ /* Setup simplefb devicetree node, also adapt memory-node,
+* upper limit for kernel e.g. linux is memtop-framebuffer alligned
+* to a full megabyte.
+*/
+ u64 start = gd->bd->bi_dram[0].start;
+ u64 size = (gd->fb_base - start) & ~0xF;
+ int rc = fdt_fixup_memory_banks(blob, &start, &size, 1);
+
+ if (rc) {
+ puts("cannot setup simplefb: Error reserving memory!\n");
+ return rc;
+ }
+ rc = lcd_dt_simplefb_enable_existing_node(blob);
+ if (rc) {
+ puts("cannot setup simplefb: error enabling simplefb node!\n");
+
[U-Boot] [PATCH 2/5] board/BuR/tseries: remove unnary CONFIG_LCD_NOSTDOUT
the CONFIG_LCD_NOSTDOUT feature never had become mainline in uboot due to the fact that the problem of "not writing out whole console to lcd" can be solved with another way. So we remove this unnary define. Signed-off-by: Hannes Petermaier --- include/configs/tseries.h |1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/tseries.h b/include/configs/tseries.h index 4406e6f..f2df358 100644 --- a/include/configs/tseries.h +++ b/include/configs/tseries.h @@ -16,7 +16,6 @@ /* - */ #define CONFIG_AM335X_LCD #define CONFIG_LCD -#define CONFIG_LCD_NOSTDOUT #define CONFIG_LCD_ROTATION #define CONFIG_SYS_WHITE_ON_BLACK #define LCD_BPPLCD_COLOR32 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] spi: omap3: Fix timeout handling
As requested:
Tested-by: David Dueck
Am Freitag, 24. April 2015 schrieb Jagan Teki :
> On 7 April 2015 at 05:55, Tom Rini >
> wrote:
> > On Wed, Apr 01, 2015 at 04:21:50PM +0100, Andy Pont wrote:
> >> Hi David,
> >>
> >>
> >>
> >> > for (i = 0; i < len; i++) {
> >> > /* wait till TX register is empty (TXS == 1) */
> >> > + start = get_timer(0);
> >> > while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) &
> >> > OMAP3_MCSPI_CHSTAT_TXS)) {
> >> > - if (--timeout <= 0) {
> >> > + if (get_timer(start) > SPI_WAIT_TIMEOUT) {
> >> > printf("SPI TXS timed out,
> status=0x%08x\n",
> >> >readl(&ds->regs->channel[ds-
> >> > >slave.cs].chstat));
> >> > return -1;
> >>
> >> I have a couple of questions...
> >>
> >> Firstly, when in SPL is there access to the get_timer() function?
> >
> > We call timer_init() from board_init_r() in SPL, prior to diving down
> > into loading (or checking for Falcon vs Regular) so this is safe.
> >
> >> Secondly, when using Falcon mode to load Linux directly from SPI (Falcon
> >> mode) then we want to maximise the throughput and save every CPU cycle
> we
> >> possibly can. Adding yet another function call into the for loop and
> hence
> >> calling it a couple of million times seems, on the face of it, like it
> is
> >> going to slow things down.
> >
> > I'd like to see measurements to prove me wrong but this both seems like
> > a bad idea (optimizing by being incorrect, this gives us a correct
> > timeout check like other drivers do) and really unlikely I would think
> > to be noticable. Since we'll be doing the same code-paths in both
> > regular and SPL, trying to time things (by loading a big file) would be
> > easy enough I think. Thanks!
>
> Ping
>
> thanks!
> --
> Jagan.
>
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[U-Boot] [PATCH] common/lcd_simplefb: Add support for 32bit organized framebuffers
Signed-off-by: Hannes Petermaier
---
common/lcd_simplefb.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/common/lcd_simplefb.c b/common/lcd_simplefb.c
index 8db2add..7153c40 100644
--- a/common/lcd_simplefb.c
+++ b/common/lcd_simplefb.c
@@ -16,11 +16,14 @@ DECLARE_GLOBAL_DATA_PTR;
static int lcd_dt_simplefb_configure_node(void *blob, int off)
{
-#if LCD_BPP == LCD_COLOR16
int vl_col = lcd_get_pixel_width();
int vl_row = lcd_get_pixel_height();
+#if LCD_BPP == LCD_COLOR16
return fdt_setup_simplefb_node(blob, off, gd->fb_base, vl_col, vl_row,
vl_col * 2, "r5g6b5");
+#elif LCD_BPP == LCD_COLOR32
+ return fdt_setup_simplefb_node(blob, off, gd->fb_base, vl_col, vl_row,
+ vl_col * 4, "a8b8g8r8");
#else
return -1;
#endif
--
1.7.9.5
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[U-Boot] [PATCH 1/5] board/BuR/tseries: take usage of CONFIG_LCD_ROTATION
We take use of the new LCD_ROTATION feature.
The information about how the display is rotated is taken from B&R specific
(/factory-settings/rotation) information in the devicetree.
The information there is stored as string (cw, ud, ccw, none) since starting
support of this devices and cannot be changed, so we have to convert it into
none = 0
cw = 1
ud = 2
ccw = 3
Signed-off-by: Hannes Petermaier
---
board/BuR/common/common.c | 23 +++
include/configs/tseries.h |8 +---
2 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 23a98e4..3036f86 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -52,6 +52,9 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
struct am335x_lcdpanel pnltmp;
#ifdef CONFIG_USE_FDT
u32 dtbprop;
+ char buf[32];
+ const char *nodep = 0;
+ int nodeoff;
if (gd->fdt_blob == NULL) {
printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
@@ -97,6 +100,25 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
dtbprop = FDTPROP(PATHTIM, "de-active");
if (dtbprop == 0)
pnltmp.pol |= DE_INVERT;
+
+ nodeoff = fdt_path_offset(gd->fdt_blob, "/factory-settings");
+ if (nodeoff >= 0) {
+ nodep = fdt_getprop(gd->fdt_blob, nodeoff, "rotation", NULL);
+ if (nodep != 0) {
+ if (strcmp(nodep, "cw") == 0)
+ panel_info.vl_rot = 1;
+ else if (strcmp(nodep, "ud") == 0)
+ panel_info.vl_rot = 2;
+ else if (strcmp(nodep, "ccw") == 0)
+ panel_info.vl_rot = 3;
+ else
+ panel_info.vl_rot = 0;
+ }
+ } else {
+ puts("no 'factory-settings / rotation' in dtb!\n");
+ }
+ snprintf(buf, sizeof(buf), "fbcon=rotate:%d", panel_info.vl_rot);
+ setenv("optargs_rot", buf);
#else
pnltmp.hactive = getenv_ulong("ds1_hactive", 10, ~0UL);
pnltmp.vactive = getenv_ulong("ds1_vactive", 10, ~0UL);
@@ -111,6 +133,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
pnltmp.pol = getenv_ulong("ds1_pol", 16, ~0UL);
pnltmp.pup_delay = getenv_ulong("ds1_pupdelay", 10, ~0UL);
pnltmp.pon_delay = getenv_ulong("ds1_tondelay", 10, ~0UL);
+ panel_info.vl_rot = getenv_ulong("ds1_rotation", 10, 0);
#endif
if (
~0UL == (pnltmp.hactive) ||
diff --git a/include/configs/tseries.h b/include/configs/tseries.h
index 1e41a12..4406e6f 100644
--- a/include/configs/tseries.h
+++ b/include/configs/tseries.h
@@ -17,6 +17,7 @@
#define CONFIG_AM335X_LCD
#define CONFIG_LCD
#define CONFIG_LCD_NOSTDOUT
+#define CONFIG_LCD_ROTATION
#define CONFIG_SYS_WHITE_ON_BLACK
#define LCD_BPPLCD_COLOR32
@@ -105,6 +106,7 @@
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"nandargs=setenv bootargs console=${console} " \
"${optargs} " \
+ "${optargs_rot} " \
"root=mtd6 " \
"rootfstype=jffs2\0" \
"kernelsize=0x40\0" \
@@ -127,9 +129,9 @@
"bmp display ${loadaddr} 0 0\0" \
"logo1=ext4load mmc 0:1 ${loadaddr} /PPTLogo.bmp.gz && " \
"bmp display ${loadaddr} 0 0\0" \
-"mmcroot0=setenv bootargs ${optargs} console=${console}\0" \
-"mmcroot1=setenv bootargs ${optargs} console=${console} root=/dev/mmcblk0p2 " \
- "rootfstype=ext4\0" \
+"mmcroot0=setenv bootargs ${optargs_rot} ${optargs} console=${console}\0" \
+"mmcroot1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
+ "root=/dev/mmcblk0p2 rootfstype=ext4\0" \
"mmcboot0=echo booting Updatesystem from mmc (ext4-fs) ...; " \
"ext4load mmc 0:1 ${loadaddr} /${kernel}; " \
"ext4load mmc 0:1 ${ramaddr} /${ramdisk}; " \
--
1.7.9.5
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