date:20150920

Re: [U-Boot] [PATCH 2/3] mx6ul_14x14_evk: Staticize when possible

2015-09-20 Thread Stefano Babic



On 14/09/2015 16:06, Fabio Estevam wrote:
> Make the internal symbols static when possible.
> 
> This prevents sparse build warnings.
> 
> Signed-off-by: Fabio Estevam 
> ---
>  board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c 
> b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
> index acb8431..3d5c285 100644


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 3/3] mx6ul_14x14_evk: Remove get_board_rev()

2015-09-20 Thread Stefano Babic



On 14/09/2015 16:06, Fabio Estevam wrote:
> get_board_rev() is not actually providing the board revision.
> 
> It just returns the CPU revision instead.
> 
> As the CPU revision is already printed on boot, there is no
> reason to have get_board_rev(), so let's remove it.
> 
> Signed-off-by: Fabio Estevam 
> ---


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/3] mx6ul_14x14_evk: Remove dead code

2015-09-20 Thread Stefano Babic



On 14/09/2015 16:06, Fabio Estevam wrote:
> iox74lv_set() is not used anywhere, so let's remove it.
> 
> Signed-off-by: Fabio Estevam 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/2] imx: mx7: drop select CPU_V7 for board target

2015-09-20 Thread Stefano Babic



On 14/09/2015 16:18, Peng Fan wrote:
> drop select CPU_V7 for board target, since ARCH_MX7 selects CPU_V7.
> 
> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 2/3] cgtqmx6eval: Add SPL support

2015-09-20 Thread Stefano Babic

Hi Otavio,

On 18/09/2015 19:34, Otavio Salvador wrote:
> Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
> 
> Add SPL support so that all the variants can be supported.
> 
> Signed-off-by: Otavio Salvador 
> ---
> 
>  arch/arm/cpu/armv7/mx6/Kconfig |   3 +
>  board/congatec/cgtqmx6eval/README  |  78 ++-
>  board/congatec/cgtqmx6eval/cgtqmx6eval.c   | 573 
> +
>  board/congatec/cgtqmx6eval/imximage.cfg| 143 -
>  ...gtqmx6qeval_defconfig => cgtqmx6eval_defconfig} |   5 +-
>  include/configs/cgtqmx6eval.h  |  21 +-
>  6 files changed, 562 insertions(+), 261 deletions(-)
>  delete mode 100644 board/congatec/cgtqmx6eval/imximage.cfg
>  rename configs/{cgtqmx6qeval_defconfig => cgtqmx6eval_defconfig} (57%)
> 

It is waiting until SPI-NOR patches are applied by Jagan.

Acked-by: Stefano Babic 

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/7] omap-common: Common omap_die_id definition

2015-09-20 Thread Paul Kocialkowski

Hi,

Le vendredi 04 septembre 2015 à 14:14 -0400, Tom Rini a écrit :
> On Thu, Aug 27, 2015 at 07:37:08PM +0200, Paul Kocialkowski wrote:
> 
> > This introduces a common definition for omap_die_id, that aims at providing 
> > a
> > common interface for accessing omap platform's die id bits.
> > 
> > Signed-off-by: Paul Kocialkowski 
> 
> Reviewed-by: Tom Rini 

These patches have been laying around for some time now, would you agree
to merge them?

Thanks!

-- 
Paul Kocialkowski, Replicant developer

Replicant is a fully free Android distribution running on several
devices, a free software mobile operating system putting the emphasis on
freedom and privacy/security.

Website: https://www.replicant.us/
Blog: https://blog.replicant.us/
Wiki/tracker/forums: https://redmine.replicant.us/



signature.asc
Description: This is a digitally signed message part
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/3] imx-common: fix iomux settings

2015-09-20 Thread Stefano Babic



On 14/09/2015 07:34, Peng Fan wrote:
> When setting iomux for a pin mux, there is no need to check mux_ctrl_ofs.
> Also If still checking mux_ctrl_ofs, we have no chance to set iomux
> for i.MX7D IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00, because the mux_ctrl_ofs
> for this register is 0.
> 
> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 
> Cc: Fabio Estevam 
> ---
>  arch/arm/imx-common/iomux-v3.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
> index b4f481f..9b9cf58 100644
> --- a/arch/arm/imx-common/iomux-v3.c
> +++ b/arch/arm/imx-common/iomux-v3.c
> @@ -53,8 +53,7 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
>   }
>  #endif
>  
> - if (mux_ctrl_ofs)
> - __raw_writel(mux_mode, base + mux_ctrl_ofs);
> + __raw_writel(mux_mode, base + mux_ctrl_ofs);
>  
>   if (sel_input_ofs)
>   __raw_writel(sel_input, base + sel_input_ofs);
> 

Applied (whole series) to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 2/2] imx: mx7dsabresd: drom SYS_SOC from board Kconfig

2015-09-20 Thread Stefano Babic

Hi Peng,

On 14/09/2015 16:18, Peng Fan wrote:
> We have defined this kconfig entry in arch/arm/cpu/armv7/mx7/Kconfig,
> no need to redefine it in board Kconfig.
> 

Fixed "drom" in commit message with "drop".

> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] imximage: fix commands other than write_data

2015-09-20 Thread Stefano Babic



On 15/09/2015 03:06, Troy Kisky wrote:
> When CHECK_BITS_SET was added, they forgot to add
> a new command table, and instead overwrote the
> previous table.
> 
> Signed-off-by: Troy Kisky 
> 
> ---


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH v6] nios2: convert altera_jtag_uart to driver model

2015-09-20 Thread Thomas Chou

Convert altera_jtag_uart to driver model.

Signed-off-by: Thomas Chou 
Acked-by: Marek Vasut 
Reviewed-by: Simon Glass 
---
v2
  add ioremap.
  make the change to dts compatible with linux.

v3
  use fdt address translation patch from Stefan Roese.
  fix watchdog and loop as Marek suggested.

v4
  add clear AC flag to probe().
  remove polling loops and watchdog reset because they are
done in the serial-uclass.c.

v5
  fix coding style as Marek suggested to altera_uart.

v6
  add early debug uart.
  use chosen stdout-path to assign console.
  fix coding style as Simon suggested.

 arch/nios2/dts/3c120_devboard.dts |   2 +
 configs/nios2-generic_defconfig   |   3 +
 drivers/serial/Kconfig|  26 ++
 drivers/serial/altera_jtag_uart.c | 171 +-
 include/configs/nios2-generic.h   |   3 -
 5 files changed, 142 insertions(+), 63 deletions(-)

diff --git a/arch/nios2/dts/3c120_devboard.dts 
b/arch/nios2/dts/3c120_devboard.dts
index 02524ab..07bec69 100644
--- a/arch/nios2/dts/3c120_devboard.dts
+++ b/arch/nios2/dts/3c120_devboard.dts
@@ -93,6 +93,7 @@
reg = <0x4d50 0x0008>;
interrupt-parent = <>;
interrupts = <1>;
+   u-boot,dm-pre-reloc;
};
 
tse_mac: ethernet@0x4000 {
@@ -149,5 +150,6 @@
 
chosen {
bootargs = "debug console=ttyJ0,115200";
+   stdout-path = _uart;
};
 };
diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
index 9c1bec5..9dc6a72 100644
--- a/configs/nios2-generic_defconfig
+++ b/configs/nios2-generic_defconfig
@@ -1,4 +1,5 @@
 CONFIG_NIOS2=y
+CONFIG_DM_SERIAL=y
 CONFIG_TARGET_NIOS2_GENERIC=y
 CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
 CONFIG_HUSH_PARSER=y
@@ -14,3 +15,5 @@ CONFIG_CMD_PING=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_ALTERA_JTAG_UART=y
+CONFIG_ALTERA_JTAG_UART_BYPASS=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ccb80d2..10505dc 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -54,6 +54,13 @@ choice
prompt "Select which UART will provide the debug UART"
depends on DEBUG_UART
 
+config DEBUG_UART_ALTERA_JTAGUART
+   bool "Altera JTAG UART"
+   help
+ Select this to enable a debug UART using the altera_jtag_uart driver.
+ You will need to provide parameters to make this work. The driver will
+ be available until the real driver model serial is running.
+
 config DEBUG_UART_NS16550
bool "ns16550"
help
@@ -109,6 +116,25 @@ config DEBUG_UART_SHIFT
  value. Use this value to specify the shift to use, where 0=byte
  registers, 2=32-bit word registers, etc.
 
+config ALTERA_JTAG_UART
+   bool "Altera JTAG UART support"
+   depends on DM_SERIAL
+   help
+ Select this to enable an JTAG UART for Altera devices.The JTAG UART
+ core implements a method to communicate serial character streams
+ between a host PC and a Qsys system on an Altera FPGA. Please find
+ details on the "Embedded Peripherals IP User Guide" of Altera.
+
+config ALTERA_JTAG_UART_BYPASS
+   bool "Bypass output when no connection"
+   depends on ALTERA_JTAG_UART
+   help
+ Bypass console output and keep going even if there is no JTAG
+ terminal connection with the host. The console output will resume
+ once the JTAG terminal is connected. Without the bypass, the console
+ output will wait forever until a JTAG terminal is connected. If you
+ not are sure, say Y.
+
 config ROCKCHIP_SERIAL
bool "Rockchip on-chip UART support"
depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/drivers/serial/altera_jtag_uart.c 
b/drivers/serial/altera_jtag_uart.c
index 9a81402..39d4a4e 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -6,98 +6,149 @@
  */
 
 #include 
-#include 
+#include 
+#include 
 #include 
 #include 
 #include 
 
-typedef volatile struct {
-   unsigneddata;   /* Data register */
-   unsignedcontrol;/* Control register */
-} nios_jtag_t;
+struct altera_jtaguart_regs {
+   u32 data;   /* Data register */
+   u32 control;/* Control register */
+};
+
+struct altera_jtaguart_platdata {
+   struct altera_jtaguart_regs *regs;
+};
 
 /* data register */
-#define NIOS_JTAG_RVALID   (1<<15) /* Read valid */
-#define NIOS_JTAG_DATA(d)  ((d)&0x0ff) /* Read data */
-#define NIOS_JTAG_RAVAIL(d)((d)>>16)   /* Read space avail */
+#define ALTERA_JTAG_RVALID (1<<15) /* Read valid */
 
 /* control register */
-#define NIOS_JTAG_RE   (1

Re: [U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

2015-09-20 Thread Thomas Chou


Hi Simon,

On 09/20/2015 11:22 AM, Thomas Chou wrote:

Hi Simon,

On 09/20/2015 05:55 AM, Simon Glass wrote:

 Actually I have one more comment - consider implementing
CONFIG_DEBUG_UART in this driver. That way you can have UART output
before driver model is ready.


Thanks a lot for your helpful reviews and suggestions. I will add the
early debug to both altera jtag uart and uart.


I added the early debug uart. But how can I test it?
Is there a DEBUG definition that I can test the output of early debug?

Best regards,
Thomas Chou
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 2/5] mx7dsabreasd: Remove dead code

2015-09-20 Thread Stefano Babic



On 13/09/2015 18:06, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> iox74lv_set() is not used anywhere, so let's remove it.
> 
> Signed-off-by: Fabio Estevam 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 5/5] mx7dsabresd: Remove unused config option

2015-09-20 Thread Stefano Babic



On 13/09/2015 18:06, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> CONFIG_FEC_DMA_MINALIGN is not used anywhere, so let's remove it.
> 
> Signed-off-by: Fabio Estevam 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 4/5] mx7dsabresd: Remove get_board_rev()

2015-09-20 Thread Stefano Babic



On 13/09/2015 18:06, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> get_board_rev() is not actually providing the board revision.
> 
> It just returns the CPU revision instead.
> 
> As the CPU revision is already printed on boot, there is no
> reason to have get_board_rev(), so let's remove it.
> 
> Signed-off-by: Fabio Estevam 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 3/5] mx7dsabresd: Include USB header

2015-09-20 Thread Stefano Babic



On 13/09/2015 18:06, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> Include  in order to fix the following sparse warning:
> 
> board/freescale/mx7dsabresd/mx7dsabresd.c:538:5: warning: symbol 
> 'board_ehci_hcd_init' was not declared. Should it be static?
> 
> Signed-off-by: Fabio Estevam 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/5] mx7dsabresd: Staticize when possible

2015-09-20 Thread Stefano Babic



On 13/09/2015 18:06, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> Make the internal symbols static when possible.
> 
> This prevents sparse build warnings.
> 
> Signed-off-by: Fabio Estevam 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] imx6, aristaintetos2: add me as maintainer

2015-09-20 Thread Stefano Babic



On 17/09/2015 10:39, Heiko Schocher wrote:
> Add me as Maintainer for the aristainetos2b board.
> 
> Signed-off-by: Heiko Schocher 
> ---


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH V3] mtd: nand: mxs check maximum ecc that platfrom supports

2015-09-20 Thread Stefano Babic



On 07/09/2015 10:12, Peng Fan wrote:
> Check maximum ecc strength for each platfrom to avoid the calculated ecc
> exceed the limitation.
> 
> Signed-off-by: Peng Fan 
> Signed-off-by: Han Xu 
> Tested-By: Tim Harvey 
> Reviewed-by: Marek Vasut 
> Acked-by: Scott Wood 
> Cc: Stefano Babic 
> ---
> 


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 0/3] Pending patches for Congatec QMX6 SPL support

2015-09-20 Thread Stefano Babic

Hi Otavio,

On 18/09/2015 19:34, Otavio Salvador wrote:
> This patchset includes all changes we have pending for proper
> SPL support and board revamp.
> 
> 
> Otavio Salvador (3):
>   cgtqmx6eval: Add fastboot support
>   cgtqmx6eval: Add SPL support
>   iomux-v3: Take MX6D in consideration for imx_iomux_v3_setup_pad()
> 
>  arch/arm/cpu/armv7/mx6/Kconfig |   3 +
>  arch/arm/include/asm/imx-common/iomux-v3.h |   2 +-
>  board/congatec/cgtqmx6eval/README  |  78 ++-
>  board/congatec/cgtqmx6eval/cgtqmx6eval.c   | 573 
> +
>  board/congatec/cgtqmx6eval/imximage.cfg| 143 -
>  ...gtqmx6qeval_defconfig => cgtqmx6eval_defconfig} |   5 +-
>  include/configs/cgtqmx6eval.h  |  27 +-
>  7 files changed, 569 insertions(+), 262 deletions(-)
>  delete mode 100644 board/congatec/cgtqmx6eval/imximage.cfg
>  rename configs/{cgtqmx6qeval_defconfig => cgtqmx6eval_defconfig} (57%)
> 

I am applying them. I have also noted that the board is "orphan". What
do you mind to take over and set yourself as maintainer ?

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] Missing maintainer and status for imx6 boards

2015-09-20 Thread Stefano Babic

Hi Peng,

the following boards you recently pushed are missing info about status
and maintainer.  This generates a warning by build.

WARNING: no status info for 'mx6qpsabreauto'
WARNING: no maintainers for 'mx6qpsabreauto'
WARNING: no status info for 'mx6ul_9x9_evk'
WARNING: no maintainers for 'mx6ul_9x9_evk'
WARNING: no status info for 'mx6slevk_spl'
WARNING: no maintainers for 'mx6slevk_spl'

Would you add yourself as maintainer (and post a patch for the MAINTAINR
file) or indicate who will take over tese boards ? Thanks !

Best regards,
Stefano babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] imximage: fix commands other than write_data

2015-09-20 Thread Stefano Babic

Hi Troy,

On 15/09/2015 03:06, Troy Kisky wrote:
> When CHECK_BITS_SET was added, they forgot to add
> a new command table, and instead overwrote the
> previous table.
> 
> Signed-off-by: Troy Kisky 
> 
> ---
> 

This patch breaks building boards with SPL:

Building current source for 85 boards (6 threads, 1 job per thread)
   arm:  +   colibri_vf_dtb
+Error: Image corrupt DCD size 536870911 exceed maximum 220
+make[2]: *** [u-boot-dtb.imx] Error 1
+make[1]: *** [u-boot-dtb.imx] Error 2
+make: *** [sub-make] Error 2
   arm:  +   mx6sabresd_spl
+Error: Image corrupt DCD size 536870911 exceed maximum 220
+make[2]: *** [SPL] Error 1
+make[1]: *** [SPL] Error 2
+make: *** [sub-make] Error 2
   arm:  +   colibri_vf
+Error: Image corrupt DCD size 536870911 exceed maximum 220
+make[2]: *** [u-boot.imx] Error 1
+make[1]: *** [u-boot.imx] Error 2
+make: *** [sub-make] Error 2
   arm:  +   vf610twr
+Error: Image corrupt DCD size 536870911 exceed maximum 220
+make[2]: *** [u-boot.imx] Error 1
+make[1]: *** [u-boot.imx] Error 2
+make: *** [sub-make] Error 2
   arm:  +   cm_fx6
+Error: Image corrupt DCD size 536870911 exceed maximum 220
+make[2]: *** [SPL] Error 1
+make[1]: *** [SPL] Error 2
+make: *** [sub-make] Error 2
   arm:  +   vf610twr_nand
+Error: Image corrupt DCD size 536870911 exceed maximum 220
+make[2]: *** [u-boot.imx] Error 1
+make[1]: *** [u-boot.imx] Error 2
+make: *** [sub-make] Error 2
   arm:  +   mx6cuboxi
+Error: Image corrupt DCD size 536870911 exceed maximum 220
+make[2]: *** [SPL] Error 1
+make[1]: *** [SPL] Error 2
+make: *** [sub-make] Error 2

Can you take a look ? Thanks !

Best regards,
Stefano Babic

> Note: this needs tested to make sure imx7dsabresd still boots
> as its dcd header has changed
> 
> 
> diff --git a/tools/imximage.c b/tools/imximage.c
> index 0da48a7..97a6880 100644
> --- a/tools/imximage.c
> +++ b/tools/imximage.c
> @@ -160,54 +160,80 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, 
> char *name, int lineno,
>   }
>  }
>  
> +static struct dcd_v2_cmd *gd_last_cmd;
> +
>  static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
>   int32_t cmd)
>  {
>   dcd_v2_t *dcd_v2 = >header.hdr_v2.dcd_table;
> + struct dcd_v2_cmd *d = gd_last_cmd;
> + struct dcd_v2_cmd *d2;
> + int len;
> +
> + if (!d)
> + d = _v2->dcd_cmd;
> + d2 = d;
> + len = be16_to_cpu(d->write_dcd_command.length);
> + if (len > 4)
> + d2 = (struct dcd_v2_cmd *)(((char *)d) + len);
>  
>   switch (cmd) {
>   case CMD_WRITE_DATA:
> - dcd_v2->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
> - dcd_v2->write_dcd_command.length = cpu_to_be16(
> - dcd_len * sizeof(dcd_addr_data_t) + 4);
> - dcd_v2->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
> + if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
> + (d->write_dcd_command.param == DCD_WRITE_DATA_PARAM))
> + break;
> + d = d2;
> + d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
> + d->write_dcd_command.length = cpu_to_be16(4);
> + d->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
>   break;
>   case CMD_WRITE_CLR_BIT:
> - dcd_v2->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
> - dcd_v2->write_dcd_command.length = cpu_to_be16(
> - dcd_len * sizeof(dcd_addr_data_t) + 4);
> - dcd_v2->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
> + if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
> + (d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM))
> + break;
> + d = d2;
> + d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
> + d->write_dcd_command.length = cpu_to_be16(4);
> + d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
>   break;
>   /*
>* Check data command only supports one entry,
> -  * so use 0xC = size(address + value + command).
>*/
>   case CMD_CHECK_BITS_SET:
> - dcd_v2->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
> - dcd_v2->write_dcd_command.length = cpu_to_be16(0xC);
> - dcd_v2->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
> + d = d2;
> + d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
> + d->write_dcd_command.length = cpu_to_be16(4);
> + d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
>   break;
>   case CMD_CHECK_BITS_CLR:
> - dcd_v2->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
> - dcd_v2->write_dcd_command.length = cpu_to_be16(0xC);
> - dcd_v2->write_dcd_command.param =

Re: [U-Boot] [PATCH 2/3] imx: wdog: correct wcr register settings

2015-09-20 Thread Stefano Babic



On 14/09/2015 14:11, Fabio Estevam wrote:
> On Mon, Sep 14, 2015 at 2:34 AM, Peng Fan  wrote:
>> We should not simple use "writew(WCR_WDE, >wcr)" to set
>> wcr, since this will override bits set before reset_cpu.
>>
>> Use clrsetbits_le32 instead of writew to fix this issue.
> 
> There is a typo here: it should be clrsetbits_le16.
> 


Corrected by applying, thanks to point it out.

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 0/3] Pending patches for Congatec QMX6 SPL support

2015-09-20 Thread Stefano Babic



On 20/09/2015 10:07, Stefano Babic wrote:
> Hi Otavio,
> 
> On 18/09/2015 19:34, Otavio Salvador wrote:
>> This patchset includes all changes we have pending for proper
>> SPL support and board revamp.
>>
>>
>> Otavio Salvador (3):
>>   cgtqmx6eval: Add fastboot support
>>   cgtqmx6eval: Add SPL support
>>   iomux-v3: Take MX6D in consideration for imx_iomux_v3_setup_pad()
>>
>>  arch/arm/cpu/armv7/mx6/Kconfig |   3 +
>>  arch/arm/include/asm/imx-common/iomux-v3.h |   2 +-
>>  board/congatec/cgtqmx6eval/README  |  78 ++-
>>  board/congatec/cgtqmx6eval/cgtqmx6eval.c   | 573 
>> +
>>  board/congatec/cgtqmx6eval/imximage.cfg| 143 -
>>  ...gtqmx6qeval_defconfig => cgtqmx6eval_defconfig} |   5 +-
>>  include/configs/cgtqmx6eval.h  |  27 +-
>>  7 files changed, 569 insertions(+), 262 deletions(-)
>>  delete mode 100644 board/congatec/cgtqmx6eval/imximage.cfg
>>  rename configs/{cgtqmx6qeval_defconfig => cgtqmx6eval_defconfig} (57%)
>>
> 
> I am applying them. I have also noted that the board is "orphan". What
> do you mind to take over and set yourself as maintainer ?


Sorry for noise, I see you already posted a patch.

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH v3 3/4] dm: tpm: Remove every compilation switch for TPM driver model

2015-09-20 Thread Christophe Ricard

As every TPM drivers support UCLASS_TPM, we can only rely on DM_TPM
functions.

This simplify a bit the code.

Signed-off-by: Christophe Ricard 
Reviewed-by: Tom Rini 
---

Changes in v3: None

 common/cmd_tpm.c   | 13 +
 drivers/tpm/tpm_tis_infineon.c |  1 -
 include/tis.h  | 60 --
 include/tpm.h  |  6 -
 lib/tpm.c  | 20 +++---
 5 files changed, 4 insertions(+), 96 deletions(-)
 delete mode 100644 include/tis.h

diff --git a/common/cmd_tpm.c b/common/cmd_tpm.c
index 97501cc..add6bfb 100644
--- a/common/cmd_tpm.c
+++ b/common/cmd_tpm.c
@@ -443,7 +443,6 @@ TPM_COMMAND_NO_ARG(tpm_force_clear)
 TPM_COMMAND_NO_ARG(tpm_physical_enable)
 TPM_COMMAND_NO_ARG(tpm_physical_disable)
 
-#ifdef CONFIG_DM_TPM
 static int get_tpm(struct udevice **devp)
 {
int rc;
@@ -476,11 +475,11 @@ static int do_tpm_info(cmd_tbl_t *cmdtp, int flag, int 
argc,
 
return 0;
 }
-#endif
 
 static int do_tpm_raw_transfer(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
 {
+   struct udevice *dev;
void *command;
uint8_t response[1024];
size_t count, response_length = sizeof(response);
@@ -492,17 +491,11 @@ static int do_tpm_raw_transfer(cmd_tbl_t *cmdtp, int flag,
return CMD_RET_FAILURE;
}
 
-#ifdef CONFIG_DM_TPM
-   struct udevice *dev;
-
rc = get_tpm();
if (rc)
return rc;
 
rc = tpm_xfer(dev, command, count, response, _length);
-#else
-   rc = tis_sendrecv(command, count, response, _length);
-#endif
free(command);
if (!rc) {
puts("tpm response:\n");
@@ -657,9 +650,7 @@ TPM_COMMAND_NO_ARG(tpm_end_oiap)
U_BOOT_CMD_MKENT(cmd, 0, 1, do_tpm_ ## cmd, "", "")
 
 static cmd_tbl_t tpm_commands[] = {
-#ifdef CONFIG_DM_TPM
U_BOOT_CMD_MKENT(info, 0, 1, do_tpm_info, "", ""),
-#endif
U_BOOT_CMD_MKENT(init, 0, 1,
do_tpm_init, "", ""),
U_BOOT_CMD_MKENT(startup, 0, 1,
@@ -730,9 +721,7 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "cmd args...\n"
 "- Issue TPM command  with arguments .\n"
 "Admin Startup and State Commands:\n"
-#ifdef CONFIG_DM_TPM
 "  info - Show information about the TPM\n"
-#endif
 "  init\n"
 "- Put TPM into a state where it waits for 'startup' command.\n"
 "  startup mode\n"
diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c
index 88eb786..f57c328 100644
--- a/drivers/tpm/tpm_tis_infineon.c
+++ b/drivers/tpm/tpm_tis_infineon.c
@@ -24,7 +24,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/include/tis.h b/include/tis.h
deleted file mode 100644
index 1985d9e..000
--- a/include/tis.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef __TIS_H
-#define __TIS_H
-
-#ifndef CONFIG_DM_TPM
-
-#include 
-
-/* Low-level interface to access TPM */
-
-/*
- * tis_init()
- *
- * Initialize the TPM device. Returns 0 on success or -1 on
- * failure (in case device probing did not succeed).
- */
-int tis_init(void);
-
-/*
- * tis_open()
- *
- * Requests access to locality 0 for the caller. After all commands have been
- * completed the caller is supposed to call tis_close().
- *
- * Returns 0 on success, -1 on failure.
- */
-int tis_open(void);
-
-/*
- * tis_close()
- *
- * terminate the currect session with the TPM by releasing the locked
- * locality. Returns 0 on success of -1 on failure (in case lock
- * removal did not succeed).
- */
-int tis_close(void);
-
-/*
- * tis_sendrecv()
- *
- * Send the requested data to the TPM and then try to get its response
- *
- * @sendbuf - buffer of the data to send
- * @send_size size of the data to send
- * @recvbuf - memory to save the response to
- * @recv_len - pointer to the size of the response buffer
- *
- * Returns 0 on success (and places the number of response bytes at recv_len)
- * or -1 on failure.
- */
-int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, uint8_t *recvbuf,
-   size_t *recv_len);
-#endif
-
-#endif /* __TIS_H */
diff --git a/include/tpm.h b/include/tpm.h
index 086b672..9a6585d 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -8,8 +8,6 @@
 #ifndef __TPM_H
 #define __TPM_H
 
-#include 
-
 /*
  * Here is a partial implementation of TPM commands.  Please consult TCG Main
  * Specification for definitions of TPM commands.
@@ -196,8 +194,6 @@ struct tpm_permanent_flags {
u8  disable_full_da_logic_info;
 } __packed;
 
-#ifdef CONFIG_DM_TPM
-
 /* Max buffer size supported by our tpm */
 #define TPM_DEV_BUFSIZE1260
 
@@ -375,8 +371,6 @@ int tpm_get_desc(struct udevice *dev, char *buf, int size);
 int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, size_t

[U-Boot] [PATCH v3 4/4] dm: tpm: Every TPM drivers should depends on DM_TPM

2015-09-20 Thread Christophe Ricard

Every TPM drivers should now depends on DM_TPM and not only TPM.

Signed-off-by: Christophe Ricard 
Reviewed-by: Tom Rini 
---

Changes in v3: None

 drivers/tpm/Kconfig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig
index ff2cdbe..3ab652c 100644
--- a/drivers/tpm/Kconfig
+++ b/drivers/tpm/Kconfig
@@ -24,7 +24,7 @@ config TPM_TIS_SANDBOX
 
 config TPM_ATMEL_TWI
bool "Enable Atmel TWI TPM device driver"
-   depends on TPM && DM_I2C
+   depends on DM_TPM && DM_I2C
help
  This driver supports an Atmel TPM device connected on the I2C bus.
  The usual tpm operations and the 'tpm' command can be used to talk
@@ -33,7 +33,7 @@ config TPM_ATMEL_TWI
 
 config TPM_TIS_INFINEON
bool "Enable support for Infineon SLB9635/45 TPMs on I2C"
-   depends on TPM && DM_I2C
+   depends on DM_TPM && DM_I2C
help
  This driver supports Infineon TPM devices connected on the I2C bus.
  The usual tpm operations and the 'tpm' command can be used to talk
@@ -57,7 +57,7 @@ config TPM_TIS_I2C_BURST_LIMITATION_LEN
 
 config TPM_TIS_LPC
bool "Enable support for Infineon SLB9635/45 TPMs on LPC"
-   depends on TPM && X86
+   depends on DM_TPM && X86
help
  This driver supports Infineon TPM devices connected on the I2C bus.
  The usual tpm operations and the 'tpm' command can be used to talk
-- 
2.1.4

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH v3 0/4] Move tpm_tis_i2c to tpm_tis_infineon and convert last tpm driver to use DM_TPM

2015-09-20 Thread Christophe Ricard

Hi Simon,

This patch serie move tpm_tis_i2c driver to tpm_tis_infineon.
It also convert the latest tpm driver tpm_atmel_twi to DM_TPM.

In this version i am only adding mention to Tom Rini review

Best Regards
Christophe

Changes in v3:
- Adding mention to Tom Rini review

Christophe Ricard (4):
  dm: tpm: Move tpm_tis_i2c to tpm_i2c_infineon
  dm: tpm: Add Driver Model support for tpm_atmel_twi driver
  dm: tpm: Remove every compilation switch for TPM driver model
  dm: tpm: Every TPM drivers should depends on DM_TPM

 README|  4 +-
 common/cmd_tpm.c  | 13 +---
 configs/nyan-big_defconfig|  2 +-
 configs/peach-pi_defconfig|  2 +-
 configs/peach-pit_defconfig   |  2 +-
 configs/snow_defconfig|  2 +-
 configs/spring_defconfig  |  2 +-
 drivers/tpm/Kconfig   | 10 +--
 drivers/tpm/Makefile  |  2 +-
 drivers/tpm/tpm_atmel_twi.c   | 74 ---
 drivers/tpm/{tpm_tis_i2c.c => tpm_tis_infineon.c} |  5 +-
 drivers/tpm/{tpm_tis_i2c.h => tpm_tis_infineon.h} |  0
 include/tis.h | 60 --
 include/tpm.h |  6 --
 lib/tpm.c | 20 +-
 15 files changed, 72 insertions(+), 132 deletions(-)
 rename drivers/tpm/{tpm_tis_i2c.c => tpm_tis_infineon.c} (99%)
 rename drivers/tpm/{tpm_tis_i2c.h => tpm_tis_infineon.h} (100%)
 delete mode 100644 include/tis.h

-- 
2.1.4

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH v3 2/4] dm: tpm: Add Driver Model support for tpm_atmel_twi driver

2015-09-20 Thread Christophe Ricard

tpm_atmel_twi can fit perfectly to the new UCLASS_TPM class.

Signed-off-by: Christophe Ricard 
Reviewed-by: Tom Rini 
---

Changes in v3: None

 drivers/tpm/Kconfig |  2 +-
 drivers/tpm/tpm_atmel_twi.c | 74 -
 2 files changed, 54 insertions(+), 22 deletions(-)

diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig
index dacb847..ff2cdbe 100644
--- a/drivers/tpm/Kconfig
+++ b/drivers/tpm/Kconfig
@@ -24,7 +24,7 @@ config TPM_TIS_SANDBOX
 
 config TPM_ATMEL_TWI
bool "Enable Atmel TWI TPM device driver"
-   depends on TPM
+   depends on TPM && DM_I2C
help
  This driver supports an Atmel TPM device connected on the I2C bus.
  The usual tpm operations and the 'tpm' command can be used to talk
diff --git a/drivers/tpm/tpm_atmel_twi.c b/drivers/tpm/tpm_atmel_twi.c
index 205d7a5..361291d 100644
--- a/drivers/tpm/tpm_atmel_twi.c
+++ b/drivers/tpm/tpm_atmel_twi.c
@@ -7,51 +7,56 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
 
+#include "tpm_internal.h"
+
 #define ATMEL_TPM_TIMEOUT_MS 5000 /* sufficient for anything but
 generating/exporting keys */
 
 /*
- * tis_init()
- *
- * Initialize the TPM device. Returns 0 on success or -1 on
- * failure (in case device probing did not succeed).
- */
-int tis_init(void)
-{
-   return 0;
-}
-
-/*
- * tis_open()
+ * tpm_atmel_twi_open()
  *
  * Requests access to locality 0 for the caller. After all commands have been
  * completed the caller is supposed to call tis_close().
  *
  * Returns 0 on success, -1 on failure.
  */
-int tis_open(void)
+static int tpm_atmel_twi_open(struct udevice *dev)
 {
return 0;
 }
 
 /*
- * tis_close()
+ * tpm_atmel_twi_close()
  *
  * terminate the currect session with the TPM by releasing the locked
  * locality. Returns 0 on success of -1 on failure (in case lock
  * removal did not succeed).
  */
-int tis_close(void)
+static int tpm_atmel_twi_close(struct udevice *dev)
+{
+   return 0;
+}
+
+/*
+ * tpm_atmel_twi_get_desc()
+ *
+ * @dev:Device to check
+ * @buf:Buffer to put the string
+ * @size:   Maximum size of buffer
+ * @return length of string, or -ENOSPC it no space
+ */
+static int tpm_atmel_twi_get_desc(struct udevice *dev, char *buf, int size)
 {
return 0;
 }
 
 /*
- * tis_sendrecv()
+ * tpm_atmel_twi_xfer()
  *
  * Send the requested data to the TPM and then try to get its response
  *
@@ -63,8 +68,9 @@ int tis_close(void)
  * Returns 0 on success (and places the number of response bytes at recv_len)
  * or -1 on failure.
  */
-int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, uint8_t *recvbuf,
-   size_t *recv_len)
+static int tpm_atmel_twi_xfer(struct udevice *dev,
+ const uint8_t *sendbuf, size_t send_size,
+ uint8_t *recvbuf, size_t *recv_len)
 {
int res;
unsigned long start;
@@ -75,14 +81,15 @@ int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, 
uint8_t *recvbuf,
print_buffer(0, (void *)sendbuf, 1, send_size, 0);
 #endif
 
-   res = i2c_write(0x29, 0, 0, (uchar *)sendbuf, send_size);
+   res = dm_i2c_write(dev, 0, (uchar *)sendbuf, send_size);
if (res) {
printf("i2c_write returned %d\n", res);
return -1;
}
 
start = get_timer(0);
-   while ((res = i2c_read(0x29, 0, 0, recvbuf, 10))) {
+   while ((res = dm_i2c_read(dev, 0, recvbuf, TPM_HEADER_SIZE))) {
+   /* TODO Use TIS_TIMEOUT from tpm_tis_infineon.h */
if (get_timer(start) > ATMEL_TPM_TIMEOUT_MS) {
puts("tpm timed out\n");
return -1;
@@ -92,7 +99,7 @@ int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, 
uint8_t *recvbuf,
if (!res) {
*recv_len = get_unaligned_be32(recvbuf + 2);
if (*recv_len > 10)
-   res = i2c_read(0x29, 0, 0, recvbuf, *recv_len);
+   res = dm_i2c_read(dev, 0, recvbuf, *recv_len);
}
if (res) {
printf("i2c_read returned %d (rlen=%d)\n", res, *recv_len);
@@ -110,3 +117,28 @@ int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, 
uint8_t *recvbuf,
 
return res;
 }
+
+static int tpm_atmel_twi_probe(struct udevice *dev)
+{
+   return 0;
+}
+
+static const struct udevice_id tpm_atmel_twi_ids[] = {
+   { .compatible = "atmel,at97sc3204t"},
+   { }
+};
+
+static const struct tpm_ops tpm_atmel_twi_ops = {
+   .open = tpm_atmel_twi_open,
+   .close = tpm_atmel_twi_close,
+   .xfer = tpm_atmel_twi_xfer,
+   .get_desc = tpm_atmel_twi_get_desc,
+};
+
+U_BOOT_DRIVER(tpm_atmel_twi) = {
+   .name = "tpm_atmel_twi",
+   .id = UCLASS_TPM,
+   .of_match = tpm_atmel_twi_ids,
+   .ops = _atmel_twi_ops,
+

[U-Boot] [PATCH v3 1/4] dm: tpm: Move tpm_tis_i2c to tpm_i2c_infineon

2015-09-20 Thread Christophe Ricard

As there is no TCG specification or recommendation for i2c TPM 1.2,
move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel
or STMicroelectronics may have a different transport protocol for i2c.

Signed-off-by: Christophe Ricard 
Reviewed-by: Tom Rini 
---

Changes in v3:
- Adding mention to Tom Rini review

 README| 4 ++--
 configs/nyan-big_defconfig| 2 +-
 configs/peach-pi_defconfig| 2 +-
 configs/peach-pit_defconfig   | 2 +-
 configs/snow_defconfig| 2 +-
 configs/spring_defconfig  | 2 +-
 drivers/tpm/Kconfig   | 4 ++--
 drivers/tpm/Makefile  | 2 +-
 drivers/tpm/{tpm_tis_i2c.c => tpm_tis_infineon.c} | 4 ++--
 drivers/tpm/{tpm_tis_i2c.h => tpm_tis_infineon.h} | 0
 10 files changed, 12 insertions(+), 12 deletions(-)
 rename drivers/tpm/{tpm_tis_i2c.c => tpm_tis_infineon.c} (99%)
 rename drivers/tpm/{tpm_tis_i2c.h => tpm_tis_infineon.h} (100%)

diff --git a/README b/README
index 1acc355..f8fb46a 100644
--- a/README
+++ b/README
@@ -1490,8 +1490,8 @@ The following options need to be configured:
CONFIG_TPM
Support TPM devices.
 
-   CONFIG_TPM_TIS_I2C
-   Support for i2c bus TPM devices. Only one device
+   CONFIG_TPM_TIS_INFINEON
+   Support for Infineon i2c bus TPM devices. Only one device
per system is supported at this time.
 
CONFIG_TPM_TIS_I2C_BURST_LIMITATION
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index 6464c37..04c6a21 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -18,7 +18,7 @@ CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_CROS_EC_KEYB=y
 CONFIG_DM_TPM=y
-CONFIG_TPM_TIS_I2C=y
+CONFIG_TPM_TIS_INFINEON=y
 CONFIG_TEGRA114_SPI=y
 CONFIG_DISPLAY_PORT=y
 CONFIG_VIDEO_TEGRA124=y
diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig
index 56a5185..1a0837e 100644
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@@ -15,7 +15,7 @@ CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_CROS_EC_KEYB=y
 CONFIG_DM_TPM=y
-CONFIG_TPM_TIS_I2C=y
+CONFIG_TPM_TIS_INFINEON=y
 CONFIG_DM_I2C=y
 CONFIG_DM_I2C_COMPAT=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig
index 1934bf3..6567226 100644
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@@ -15,7 +15,7 @@ CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_CROS_EC_KEYB=y
 CONFIG_DM_TPM=y
-CONFIG_TPM_TIS_I2C=y
+CONFIG_TPM_TIS_INFINEON=y
 CONFIG_DM_I2C=y
 CONFIG_DM_I2C_COMPAT=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
diff --git a/configs/snow_defconfig b/configs/snow_defconfig
index 32c7c5d..583a838 100644
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@@ -20,7 +20,7 @@ CONFIG_DEBUG_UART_S5P=y
 CONFIG_DEBUG_UART_BASE=0x12c3
 CONFIG_DEBUG_UART_CLOCK=1
 CONFIG_DM_TPM=y
-CONFIG_TPM_TIS_I2C=y
+CONFIG_TPM_TIS_INFINEON=y
 CONFIG_DM_I2C=y
 CONFIG_DM_I2C_COMPAT=y
 CONFIG_I2C_CROS_EC_LDO=y
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
index b20bfed..112afa1 100644
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@@ -20,7 +20,7 @@ CONFIG_DEBUG_UART_S5P=y
 CONFIG_DEBUG_UART_BASE=0x12c3
 CONFIG_DEBUG_UART_CLOCK=1
 CONFIG_DM_TPM=y
-CONFIG_TPM_TIS_I2C=y
+CONFIG_TPM_TIS_INFINEON=y
 CONFIG_DM_I2C=y
 CONFIG_DM_I2C_COMPAT=y
 CONFIG_I2C_CROS_EC_LDO=y
diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig
index 6bc8fdd..dacb847 100644
--- a/drivers/tpm/Kconfig
+++ b/drivers/tpm/Kconfig
@@ -31,7 +31,7 @@ config TPM_ATMEL_TWI
  to the device using the standard TPM Interface Specification (TIS)
  protocol
 
-config TPM_TIS_I2C
+config TPM_TIS_INFINEON
bool "Enable support for Infineon SLB9635/45 TPMs on I2C"
depends on TPM && DM_I2C
help
@@ -42,7 +42,7 @@ config TPM_TIS_I2C
 
 config TPM_TIS_I2C_BURST_LIMITATION
bool "Enable I2C burst length limitation"
-   depends on TPM_TIS_I2C
+   depends on TPM_TIS_INFINEON
help
  Some broken TPMs have a limitation on the number of bytes they can
  receive in one message. Enable this option to allow you to set this
diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile
index 0d328f8..5748145 100644
--- a/drivers/tpm/Makefile
+++ b/drivers/tpm/Makefile
@@ -6,6 +6,6 @@
 obj-$(CONFIG_DM_TPM) += tpm-uclass.o
 
 obj-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o
-obj-$(CONFIG_TPM_TIS_I2C) += tpm_tis_i2c.o
+obj-$(CONFIG_TPM_TIS_INFINEON) += tpm_tis_infineon.o
 obj-$(CONFIG_TPM_TIS_LPC) += tpm_tis_lpc.o
 obj-$(CONFIG_TPM_TIS_SANDBOX) += tpm_tis_sandbox.o
diff --git a/drivers/tpm/tpm_tis_i2c.c b/drivers/tpm/tpm_tis_infineon.c
similarity index 99%
rename from drivers/tpm/tpm_tis_i2c.c

[U-Boot] [PATCH v2] sunxi_nand_spl: Be smarter about where to look for backup u-boot.bin

2015-09-20 Thread Hans de Goede

We know when u-boot is written to its own partition, in this case the
layout always is:

eb 0 spl
eb 1 spl-backup
eb 2 u-boot
eb 3 u-boot-backup

eb: erase-block

So if we cannot load u-boot from its primary offset we know exactly where
to look for it.

Signed-off-by: Hans de Goede 
---
Changes in v2:
-Add an eraseblock_size helper variable to make the calculation for finding
 the backup u-boot easier to understand
---
 drivers/mtd/nand/sunxi_nand_spl.c | 26 --
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c 
b/drivers/mtd/nand/sunxi_nand_spl.c
index 5985534..b0e07aa 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -356,18 +356,32 @@ static int nand_read_buffer(uint32_t offs, unsigned int 
size, void *dest,
 
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)
 {
+#if CONFIG_SYS_NAND_U_BOOT_OFFS == CONFIG_SPL_PAD_TO
+   /*
+* u-boot-dtb.bin appended to SPL, use syndrome (like the BROM does)
+* and try different erase block sizes to find the backup.
+*/
const uint32_t boot_offsets[] = {
0 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS,
1 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS,
2 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS,
4 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS,
};
-   int i, syndrome;
-
-   if (CONFIG_SYS_NAND_U_BOOT_OFFS == CONFIG_SPL_PAD_TO)
-   syndrome = 1; /* u-boot-dtb.bin appended to SPL */
-   else
-   syndrome = 0; /* u-boot-dtb.bin on its own partition */
+   const int syndrome = 1;
+#else
+   /*
+* u-boot-dtb.bin on its own partition, do not use syndrome, u-boot
+* partition sits after 2 eraseblocks (spl, spl-backup), look for
+* backup u-boot 1 erase block further.
+*/
+   const uint32_t eraseblock_size = CONFIG_SYS_NAND_U_BOOT_OFFS / 2;
+   const uint32_t boot_offsets[] = {
+   CONFIG_SYS_NAND_U_BOOT_OFFS,
+   CONFIG_SYS_NAND_U_BOOT_OFFS + eraseblock_size,
+   };
+   const int syndrome = 0;
+#endif
+   int i;
 
if (offs == CONFIG_SYS_NAND_U_BOOT_OFFS) {
for (i = 0; i < ARRAY_SIZE(boot_offsets); i++) {
-- 
2.4.3

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/3] imx-common: fix iomux settings

2015-09-20 Thread Benoît Thébaudeau

Hi Peng,

On Sun, Sep 20, 2015 at 3:02 PM, Peng Fan  wrote:
> On Sun, Sep 20, 2015 at 01:33:20PM +0200, Benoît Thébaudeau wrote:
>>Hi Stefano, Peng, Fabio, all,
>>
>>Sorry for seeing this only now, but...
>>
>>On Sun, Sep 20, 2015 at 9:43 AM, Stefano Babic  wrote:
>>>
>>>
>>> On 14/09/2015 07:34, Peng Fan wrote:
 When setting iomux for a pin mux, there is no need to check mux_ctrl_ofs.
>>
>>This assumption is wrong. This check was there for a reason. Some i.MX
>>SoCs have some registers controlling pads but not muxes, either for a
>>single pin or for groups of pins:
>>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx25/iomux-mx25.h;h=220cf4ef2e94aa69482557852ed0cc0690a79cec;hb=HEAD
>>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx35/iomux-mx35.h;h=5898b46f4720088b18882e21d0d2424fff987ab5;hb=HEAD
>>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx5/iomux-mx51.h;h=b7b169505f91c4a213be59efca47e8a5aed770e7;hb=HEAD
>>
>>I have not checked whether these cases are currently used in-tree by
>>U-Boot, but they have to be possible anyway in order to support these
>>SoCs.
>
> Benoît,
>
> Thanks for pointing this out.
> You mean piece of code like this, right?
> 509 MX25_PAD_CTL_GRP_DVS_MISC   = IOMUX_PAD(0x418, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 510 MX25_PAD_CTL_GRP_DSE_FEC= IOMUX_PAD(0x41c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 511 MX25_PAD_CTL_GRP_DVS_JTAG   = IOMUX_PAD(0x420, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 512 MX25_PAD_CTL_GRP_DSE_NFC= IOMUX_PAD(0x424, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 513 MX25_PAD_CTL_GRP_DSE_CSI= IOMUX_PAD(0x428, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 514 MX25_PAD_CTL_GRP_DSE_WEIM   = IOMUX_PAD(0x42c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 515 MX25_PAD_CTL_GRP_DSE_DDR= IOMUX_PAD(0x430, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 516 MX25_PAD_CTL_GRP_DVS_CRM= IOMUX_PAD(0x434, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 517 MX25_PAD_CTL_GRP_DSE_KPP= IOMUX_PAD(0x438, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 518 MX25_PAD_CTL_GRP_DSE_SDHC1  = IOMUX_PAD(0x43c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 519 MX25_PAD_CTL_GRP_DSE_LCD= IOMUX_PAD(0x440, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 520 MX25_PAD_CTL_GRP_DSE_UART   = IOMUX_PAD(0x444, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 521 MX25_PAD_CTL_GRP_DVS_NFC= IOMUX_PAD(0x448, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 522 MX25_PAD_CTL_GRP_DVS_CSI= IOMUX_PAD(0x44c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 523 MX25_PAD_CTL_GRP_DSE_CSPI1  = IOMUX_PAD(0x450, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 524 MX25_PAD_CTL_GRP_DDRTYPE= IOMUX_PAD(0x454, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 525 MX25_PAD_CTL_GRP_DVS_SDHC1  = IOMUX_PAD(0x458, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 526 MX25_PAD_CTL_GRP_DVS_LCD= IOMUX_PAD(0x45c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL)

Correct.

> My bad. I only took i.mx6/7 into consideration when working this patch.
>>
 Also If still checking mux_ctrl_ofs, we have no chance to set iomux
 for i.MX7D IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00, because the mux_ctrl_ofs
 for this register is 0.
>>
>>The need is clear, but then the test mechanism should be changed, not
>>removed. You could find a free bit in mux_ctrl_ofs or in mux_mode or
>>elsewhere in IOMUX_PAD (e.g. bit 63, which is currently reserved),
>>something like NO_PAD_CTRL, or create a reserved value other than
>>__NA_ for mux_ctrl_ofs/mux_mode.
>
> Stefano,
>
> There is '#define NO_PAD_CTRL (1 << 17)' now,
> we can add'NO_MUX_CTRL' and 'NO_SEL_CTRL(select input)', but need to check
> whether the __NA__ pads are used or not now.
> also need a big change for the layout and related macro definition:
> 39  * MUX_CTRL_OFS:0..11 (12)
> 40  * PAD_CTRL_OFS:   12..23 (12)
> 41  * SEL_INPUT_OFS:  24..35 (12)
> 42  * MUX_MODE + SION:36..40  (5)
> 43  * PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
> 44  * SEL_INP:59..62  (4)
> 45  * reserved: 63(1)
>
> Can we just use the following way, since only i.mx7 has the requirement of
> mux_ctrl_ofs maybe at 0.
> if (is_soc_type(MX7)) {
> __raw_writel(mux_mode, base + mux_ctrl_ofs);
> } else {
> if (mux_ctrl_ofs)
> __raw_writel(mux_mode, base + mux_ctrl_ofs);
> }
> I prefer this simple way for now, since we are at RC2 now. Later we can
> refactor the code using the way to provide macros NO_MUX_CTRL or NO_SEL_CTRL.
> What do you think?

Maybe, but instead of NO_MUX_CTRL and the like we could also just
define __NA_ to (-1) instead of 0 and mask the passed values
appropriately in IOMUX_PAD().

Re: [U-Boot] [PATCH 1/3] imx-common: fix iomux settings

2015-09-20 Thread Peng Fan

On Sun, Sep 20, 2015 at 01:33:20PM +0200, Benoît Thébaudeau wrote:
>Hi Stefano, Peng, Fabio, all,
>
>Sorry for seeing this only now, but...
>
>On Sun, Sep 20, 2015 at 9:43 AM, Stefano Babic  wrote:
>>
>>
>> On 14/09/2015 07:34, Peng Fan wrote:
>>> When setting iomux for a pin mux, there is no need to check mux_ctrl_ofs.
>
>This assumption is wrong. This check was there for a reason. Some i.MX
>SoCs have some registers controlling pads but not muxes, either for a
>single pin or for groups of pins:
>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx25/iomux-mx25.h;h=220cf4ef2e94aa69482557852ed0cc0690a79cec;hb=HEAD
>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx35/iomux-mx35.h;h=5898b46f4720088b18882e21d0d2424fff987ab5;hb=HEAD
>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx5/iomux-mx51.h;h=b7b169505f91c4a213be59efca47e8a5aed770e7;hb=HEAD
>
>I have not checked whether these cases are currently used in-tree by
>U-Boot, but they have to be possible anyway in order to support these
>SoCs.

Benoît,

Thanks for pointing this out.
You mean piece of code like this, right?
509 MX25_PAD_CTL_GRP_DVS_MISC   = IOMUX_PAD(0x418, 0x000, 
0, 0, 0, NO_PAD_CTRL),
510 MX25_PAD_CTL_GRP_DSE_FEC= IOMUX_PAD(0x41c, 0x000, 
0, 0, 0, NO_PAD_CTRL),
511 MX25_PAD_CTL_GRP_DVS_JTAG   = IOMUX_PAD(0x420, 0x000, 
0, 0, 0, NO_PAD_CTRL),
512 MX25_PAD_CTL_GRP_DSE_NFC= IOMUX_PAD(0x424, 0x000, 
0, 0, 0, NO_PAD_CTRL),
513 MX25_PAD_CTL_GRP_DSE_CSI= IOMUX_PAD(0x428, 0x000, 
0, 0, 0, NO_PAD_CTRL),
514 MX25_PAD_CTL_GRP_DSE_WEIM   = IOMUX_PAD(0x42c, 0x000, 
0, 0, 0, NO_PAD_CTRL),
515 MX25_PAD_CTL_GRP_DSE_DDR= IOMUX_PAD(0x430, 0x000, 
0, 0, 0, NO_PAD_CTRL),
516 MX25_PAD_CTL_GRP_DVS_CRM= IOMUX_PAD(0x434, 0x000, 
0, 0, 0, NO_PAD_CTRL),
517 MX25_PAD_CTL_GRP_DSE_KPP= IOMUX_PAD(0x438, 0x000, 
0, 0, 0, NO_PAD_CTRL),
518 MX25_PAD_CTL_GRP_DSE_SDHC1  = IOMUX_PAD(0x43c, 0x000, 
0, 0, 0, NO_PAD_CTRL),
519 MX25_PAD_CTL_GRP_DSE_LCD= IOMUX_PAD(0x440, 0x000, 
0, 0, 0, NO_PAD_CTRL),
520 MX25_PAD_CTL_GRP_DSE_UART   = IOMUX_PAD(0x444, 0x000, 
0, 0, 0, NO_PAD_CTRL),
521 MX25_PAD_CTL_GRP_DVS_NFC= IOMUX_PAD(0x448, 0x000, 
0, 0, 0, NO_PAD_CTRL),
522 MX25_PAD_CTL_GRP_DVS_CSI= IOMUX_PAD(0x44c, 0x000, 
0, 0, 0, NO_PAD_CTRL),
523 MX25_PAD_CTL_GRP_DSE_CSPI1  = IOMUX_PAD(0x450, 0x000, 
0, 0, 0, NO_PAD_CTRL),
524 MX25_PAD_CTL_GRP_DDRTYPE= IOMUX_PAD(0x454, 0x000, 
0, 0, 0, NO_PAD_CTRL),
525 MX25_PAD_CTL_GRP_DVS_SDHC1  = IOMUX_PAD(0x458, 0x000, 
0, 0, 0, NO_PAD_CTRL),
526 MX25_PAD_CTL_GRP_DVS_LCD= IOMUX_PAD(0x45c, 0x000, 
0, 0, 0, NO_PAD_CTRL)

My bad. I only took i.mx6/7 into consideration when working this patch.
>
>>> Also If still checking mux_ctrl_ofs, we have no chance to set iomux
>>> for i.MX7D IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00, because the mux_ctrl_ofs
>>> for this register is 0.
>
>The need is clear, but then the test mechanism should be changed, not
>removed. You could find a free bit in mux_ctrl_ofs or in mux_mode or
>elsewhere in IOMUX_PAD (e.g. bit 63, which is currently reserved),
>something like NO_PAD_CTRL, or create a reserved value other than
>__NA_ for mux_ctrl_ofs/mux_mode.

Stefano,

There is '#define NO_PAD_CTRL (1 << 17)' now,
we can add'NO_MUX_CTRL' and 'NO_SEL_CTRL(select input)', but need to check
whether the __NA__ pads are used or not now.
also need a big change for the layout and related macro definition:
39  * MUX_CTRL_OFS:0..11 (12)
40  * PAD_CTRL_OFS:   12..23 (12)
41  * SEL_INPUT_OFS:  24..35 (12)
42  * MUX_MODE + SION:36..40  (5)
43  * PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
44  * SEL_INP:59..62  (4)
45  * reserved: 63(1)

Can we just use the following way, since only i.mx7 has the requirement of
mux_ctrl_ofs maybe at 0. 
if (is_soc_type(MX7)) {
__raw_writel(mux_mode, base + mux_ctrl_ofs);
} else {
if (mux_ctrl_ofs)
__raw_writel(mux_mode, base + mux_ctrl_ofs);
}
I prefer this simple way for now, since we are at RC2 now. Later we can
refactor the code using the way to provide macros NO_MUX_CTRL or NO_SEL_CTRL.
What do you think?

Regards,
Peng.

>
>>> Signed-off-by: Peng Fan 
>>> Cc: Stefano Babic 
>>> Cc: Fabio Estevam 
>>> ---
>>>  arch/arm/imx-common/iomux-v3.c | 3 +--
>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>
>>> diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
>>> index b4f481f..9b9cf58 100644
>>> ---

[U-Boot] [PATCH v3] nios2: convert altera_uart to driver model

2015-09-20 Thread Thomas Chou

Convert altera_uart to driver model.

Signed-off-by: Thomas Chou 
Reviewed-by: Simon Glass 
Acked-by: Marek Vasut 
---
v2
  fix coding style as Marek suggested.

v3
  add early debug uart.
  fix coding style as Simon suggested.

 arch/nios2/dts/3c120_devboard.dts |   1 +
 drivers/serial/Kconfig|  14 +++
 drivers/serial/altera_uart.c  | 198 --
 include/configs/nios2-generic.h   |   9 +-
 4 files changed, 123 insertions(+), 99 deletions(-)

diff --git a/arch/nios2/dts/3c120_devboard.dts 
b/arch/nios2/dts/3c120_devboard.dts
index 07bec69..a35f5fe 100644
--- a/arch/nios2/dts/3c120_devboard.dts
+++ b/arch/nios2/dts/3c120_devboard.dts
@@ -130,6 +130,7 @@
interrupts = <10>;
current-speed = <115200>;
clock-frequency = <6250>;
+   u-boot,dm-pre-reloc;
};
};
 
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 10505dc..0282883 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -61,6 +61,13 @@ config DEBUG_UART_ALTERA_JTAGUART
  You will need to provide parameters to make this work. The driver will
  be available until the real driver model serial is running.
 
+config DEBUG_UART_ALTERA_UART
+   bool "Altera UART"
+   help
+ Select this to enable a debug UART using the altera_uart driver.
+ You will need to provide parameters to make this work. The driver will
+ be available until the real driver model serial is running.
+
 config DEBUG_UART_NS16550
bool "ns16550"
help
@@ -135,6 +142,13 @@ config ALTERA_JTAG_UART_BYPASS
  output will wait forever until a JTAG terminal is connected. If you
  not are sure, say Y.
 
+config ALTERA_UART
+   bool "Altera UART support"
+   depends on DM_SERIAL
+   help
+ Select this to enable an UART for Altera devices. Please find
+ details on the "Embedded Peripherals IP User Guide" of Altera.
+
 config ROCKCHIP_SERIAL
bool "Rockchip on-chip UART support"
depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
index d6b1484..4ff9fe2 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/serial/altera_uart.c
@@ -5,133 +5,149 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 
-
 #include 
-#include 
+#include 
+#include 
 #include 
 #include 
 #include 
 
-typedef volatile struct {
-   unsignedrxdata; /* Rx data reg */
-   unsignedtxdata; /* Tx data reg */
-   unsignedstatus; /* Status reg */
-   unsignedcontrol;/* Control reg */
-   unsigneddivisor;/* Baud rate divisor reg */
-   unsignedendofpacket;/* End-of-packet reg */
-} nios_uart_t;
+struct altera_uart_regs {
+   u32 rxdata; /* Rx data reg */
+   u32 txdata; /* Tx data reg */
+   u32 status; /* Status reg */
+   u32 control;/* Control reg */
+   u32 divisor;/* Baud rate divisor reg */
+   u32 endofpacket;/* End-of-packet reg */
+};
+
+struct altera_uart_platdata {
+   struct altera_uart_regs *regs;
+   unsigned int uartclk;
+};
 
 /* status register */
-#define NIOS_UART_PE   (1 << 0)/* parity error */
-#define NIOS_UART_FE   (1 << 1)/* frame error */
-#define NIOS_UART_BRK  (1 << 2)/* break detect */
-#define NIOS_UART_ROE  (1 << 3)/* rx overrun */
-#define NIOS_UART_TOE  (1 << 4)/* tx overrun */
-#define NIOS_UART_TMT  (1 << 5)/* tx empty */
-#define NIOS_UART_TRDY (1 << 6)/* tx ready */
-#define NIOS_UART_RRDY (1 << 7)/* rx ready */
-#define NIOS_UART_E(1 << 8)/* exception */
-#define NIOS_UART_DCTS (1 << 10)   /* cts change */
-#define NIOS_UART_CTS  (1 << 11)   /* cts */
-#define NIOS_UART_EOP  (1 << 12)   /* eop detected */
-
-/* control register */
-#define NIOS_UART_IPE  (1 << 0)/* parity error int ena*/
-#define NIOS_UART_IFE  (1 << 1)/* frame error int ena */
-#define NIOS_UART_IBRK (1 << 2)/* break detect int ena */
-#define NIOS_UART_IROE (1 << 3)/* rx overrun int ena */
-#define NIOS_UART_ITOE (1 << 4)/* tx overrun int ena */
-#define NIOS_UART_ITMT (1 << 5)/* tx empty int ena */
-#define NIOS_UART_ITRDY(1 << 6)/* tx ready int ena */
-#define NIOS_UART_IRRDY(1 << 7)/* rx ready int ena */
-#define NIOS_UART_IE   (1 << 8)/* exception int ena */
-#define NIOS_UART_TBRK (1 << 9)

Re: [U-Boot] [PATCH 1/3] imx-common: fix iomux settings

2015-09-20 Thread Benoît Thébaudeau

Hi Stefano, Peng, Fabio, all,

Sorry for seeing this only now, but...

On Sun, Sep 20, 2015 at 9:43 AM, Stefano Babic  wrote:
>
>
> On 14/09/2015 07:34, Peng Fan wrote:
>> When setting iomux for a pin mux, there is no need to check mux_ctrl_ofs.

This assumption is wrong. This check was there for a reason. Some i.MX
SoCs have some registers controlling pads but not muxes, either for a
single pin or for groups of pins:
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx25/iomux-mx25.h;h=220cf4ef2e94aa69482557852ed0cc0690a79cec;hb=HEAD
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx35/iomux-mx35.h;h=5898b46f4720088b18882e21d0d2424fff987ab5;hb=HEAD
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx5/iomux-mx51.h;h=b7b169505f91c4a213be59efca47e8a5aed770e7;hb=HEAD

I have not checked whether these cases are currently used in-tree by
U-Boot, but they have to be possible anyway in order to support these
SoCs.

>> Also If still checking mux_ctrl_ofs, we have no chance to set iomux
>> for i.MX7D IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00, because the mux_ctrl_ofs
>> for this register is 0.

The need is clear, but then the test mechanism should be changed, not
removed. You could find a free bit in mux_ctrl_ofs or in mux_mode or
elsewhere in IOMUX_PAD (e.g. bit 63, which is currently reserved),
something like NO_PAD_CTRL, or create a reserved value other than
__NA_ for mux_ctrl_ofs/mux_mode.

>> Signed-off-by: Peng Fan 
>> Cc: Stefano Babic 
>> Cc: Fabio Estevam 
>> ---
>>  arch/arm/imx-common/iomux-v3.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
>> index b4f481f..9b9cf58 100644
>> --- a/arch/arm/imx-common/iomux-v3.c
>> +++ b/arch/arm/imx-common/iomux-v3.c
>> @@ -53,8 +53,7 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
>>   }
>>  #endif
>>
>> - if (mux_ctrl_ofs)
>> - __raw_writel(mux_mode, base + mux_ctrl_ofs);
>> + __raw_writel(mux_mode, base + mux_ctrl_ofs);
>>
>>   if (sel_input_ofs)
>>   __raw_writel(sel_input, base + sel_input_ofs);
>>
>
> Applied (whole series) to u-boot-imx, thanks !

Please fix.

Best regards,
Benoît
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH v3 1/4] sunxi: move SPL-related definitions to platform-specific include

2015-09-20 Thread Hans de Goede


Hi,

On 09/18/2015 03:58 AM, Bernhard Nortmann wrote:

Am 17.09.2015 um 18:52 schrieb Bernhard Nortmann:

The sunxi platform currently doesn't seem to make any use of the
asm/arch-sunxi/spl.h file. This patch moves some declarations from
tools/mksunxiboot.c into it.

This enables us to reuse those definitions when extending the
sunxi board code (boards/sunxi/boards.c).

Signed-off-by: Bernhard Nortmann 

---

Changes in v3:
- (new with v3)

Changes in v2: None

  arch/arm/include/asm/arch-sunxi/spl.h | 25 +
  tools/mksunxiboot.c   | 17 +
  2 files changed, 18 insertions(+), 24 deletions(-)

diff --git a/arch/arm/include/asm/arch-sunxi/spl.h 
b/arch/arm/include/asm/arch-sunxi/spl.h
index acbec46..751de75 100644
--- a/arch/arm/include/asm/arch-sunxi/spl.h
+++ b/arch/arm/include/asm/arch-sunxi/spl.h
@@ -9,12 +9,21 @@
  #ifndef_ASM_ARCH_SPL_H_
  #define_ASM_ARCH_SPL_H_
-#define BOOT_DEVICE_NONE0
-#define BOOT_DEVICE_XIP1
-#define BOOT_DEVICE_NAND2
-#define BOOT_DEVICE_ONE_NAND3
-#define BOOT_DEVICE_MMC25 /*emmc*/
-#define BOOT_DEVICE_MMC16
-#define BOOT_DEVICE_XIPWAIT7
-#define BOOT_DEVICE_MMC2_2  0xff
+#define BOOT0_MAGIC"eGON.BT0"
+
+/* boot head definition from sun4i boot code */
+struct boot_file_head {
+uint32_t b_instruction;/* one intruction jumping to real code */
+uint8_t magic[8];/* ="eGON.BT0" or "eGON.BT1", not C-style str */
+uint32_t check_sum;/* generated by PC */
+uint32_t length;/* generated by PC */
+/*
+ * We use a simplified header, only filling in what is needed
+ * by the boot ROM. To be compatible with Allwinner tools we
+ * would need to implement the proper fields here instead of
+ * padding.
+ */
+uint8_t pad[12];/* align to 32 bytes */
+};
+
  #endif
diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c
index 676d392..54f4d05 100644
--- a/tools/mksunxiboot.c
+++ b/tools/mksunxiboot.c
@@ -15,23 +15,8 @@
  #include 
  #include 
  #include 
+#include "asm/arch/spl.h"
-/* boot head definition from sun4i boot code */
-struct boot_file_head {
-uint32_t b_instruction;/* one intruction jumping to real code */
-uint8_t magic[8];/* ="eGON.BT0" or "eGON.BT1", not C-style str */
-uint32_t check_sum;/* generated by PC */
-uint32_t length;/* generated by PC */
-/*
- * We use a simplified header, only filling in what is needed
- * by the boot ROM. To be compatible with Allwinner tools we
- * would need to implement the proper fields here instead of
- * padding.
- */
-uint8_t pad[12];/* align to 32 bytes */
-};
-
-#define BOOT0_MAGIC "eGON.BT0"
  #define STAMP_VALUE 0x5F0A6C39
  /* check sum functon from sun4i boot code */


One minor thing: This doesn't touch the boilerplate header of
asm/arch-sunxi/spl.h. However "a copy of omap3/spl.h" and the
copyright notice don't really apply any longer, so feel free
to change that to something more suitable...


Good point, I've fixed this up in my personal tree.

Regards,

Hans
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/4] sunxi_nand_spl: Rename SPL_NAND_SUNXIto NAND_SUNXI

2015-09-20 Thread Hans de Goede


Hi,

On 09/18/2015 07:43 AM, Olliver Schinagl wrote:

Hans de Goede  redhat.com> writes:

Hey Hans,


We eventually want to add full nand support, since it makes no sense
to build SPL with nand support and u-boot without, or the other way
around, a single option will suffice.

Renaming the Kconfig option now makes things easier when we add full
nand support in the future.

The "obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o" is moved to an
"ifdef CONFIG_SPL_BUILD" block in the Makefile.

Signed-off-by: Hans de Goede  redhat.com>
---
  board/sunxi/board.c|  2 +-
  drivers/mtd/nand/Kconfig   | 18 +-
  drivers/mtd/nand/Makefile  |  2 +-
  include/configs/sunxi-common.h |  2 +-
  4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index d411e96..9c855f6 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
  -108,7 +108,7  int dram_init(void)
return 0;
  }

-#if defined(CONFIG_SPL_NAND_SUNXI) && defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_NAND_SUNXI) && defined(CONFIG_SPL_BUILD)


While I agree this being a good way forward, the latest (and probably this
change included) break nand support entirely and cause link errors when
enabeling sunxi nand.

sunxi-bsp/u-boot-sunxi/drivers/mtd/nand/nand.c:104: undefined reference to
`board_nand_init' (which is from board/sunxi/board.c:144)

I think it's wise (for now) to remove the && defined(CONFIG_SPL_BUILD) and
re-add this guard later.

By removing we atleast can still build u-boot with nand support (thus
opening the option of testing and patches for users) and don't break
previously working systems.


I just tried to set CONFIG_NAND_SUNXI=y in q8_a13_tablet_defconfig and
did a build with the latest master and this works fine for me ...

Regards,

Hans
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] imx: boards: Add maintainers info

2015-09-20 Thread Peng Fan

Add MAINTAINERS info for mx6slevk_spl, mx6ul_9x9_evk and mx6qpsabreauto.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---
 board/freescale/mx6qsabreauto/MAINTAINERS   | 2 ++
 board/freescale/mx6slevk/MAINTAINERS| 2 ++
 board/freescale/mx6ul_14x14_evk/MAINTAINERS | 1 +
 3 files changed, 5 insertions(+)

diff --git a/board/freescale/mx6qsabreauto/MAINTAINERS 
b/board/freescale/mx6qsabreauto/MAINTAINERS
index fb65ce4..75a8862 100644
--- a/board/freescale/mx6qsabreauto/MAINTAINERS
+++ b/board/freescale/mx6qsabreauto/MAINTAINERS
@@ -1,7 +1,9 @@
 MX6QSABREAUTO BOARD
 M: Fabio Estevam 
+M: Peng Fan 
 S: Maintained
 F: board/freescale/mx6qsabreauto/
 F: include/configs/mx6qsabreauto.h
 F: configs/mx6dlsabreauto_defconfig
 F: configs/mx6qsabreauto_defconfig
+F: configs/mx6qpsabreauto_defconfig
diff --git a/board/freescale/mx6slevk/MAINTAINERS 
b/board/freescale/mx6slevk/MAINTAINERS
index 18d31a8..f4e74ba 100644
--- a/board/freescale/mx6slevk/MAINTAINERS
+++ b/board/freescale/mx6slevk/MAINTAINERS
@@ -1,7 +1,9 @@
 MX6SLEVK BOARD
 M: Fabio Estevam 
+M: Peng Fan 
 S: Maintained
 F: board/freescale/mx6slevk/
 F: include/configs/mx6slevk.h
 F: configs/mx6slevk_defconfig
+F: configs/mx6slevk_spl_defconfig
 F: configs/mx6slevk_spinor_defconfig
diff --git a/board/freescale/mx6ul_14x14_evk/MAINTAINERS 
b/board/freescale/mx6ul_14x14_evk/MAINTAINERS
index 611feca..d5f74b7 100644
--- a/board/freescale/mx6ul_14x14_evk/MAINTAINERS
+++ b/board/freescale/mx6ul_14x14_evk/MAINTAINERS
@@ -4,3 +4,4 @@ S:  Maintained
 F: board/freescale/mx6ul_14x14_evk/
 F: include/configs/mx6ul_14x14_evk.h
 F: configs/mx6ul_14x14_evk_defconfig
+F: configs/mx6ul_9x9_evk_defconfig
-- 
1.8.4


___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/3] imx-common: fix iomux settings

2015-09-20 Thread Stefano Babic

Hi Peng,

On 20/09/2015 15:02, Peng Fan wrote:
> On Sun, Sep 20, 2015 at 01:33:20PM +0200, Benoît Thébaudeau wrote:
>> Hi Stefano, Peng, Fabio, all,
>>
>> Sorry for seeing this only now, but...
>>
>> On Sun, Sep 20, 2015 at 9:43 AM, Stefano Babic  wrote:
>>>
>>>
>>> On 14/09/2015 07:34, Peng Fan wrote:
 When setting iomux for a pin mux, there is no need to check mux_ctrl_ofs.
>>
>> This assumption is wrong. This check was there for a reason. Some i.MX
>> SoCs have some registers controlling pads but not muxes, either for a
>> single pin or for groups of pins:
>> http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx25/iomux-mx25.h;h=220cf4ef2e94aa69482557852ed0cc0690a79cec;hb=HEAD
>> http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx35/iomux-mx35.h;h=5898b46f4720088b18882e21d0d2424fff987ab5;hb=HEAD
>> http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx5/iomux-mx51.h;h=b7b169505f91c4a213be59efca47e8a5aed770e7;hb=HEAD
>>
>> I have not checked whether these cases are currently used in-tree by
>> U-Boot, but they have to be possible anyway in order to support these
>> SoCs.
> 
> Benoît,
> 
> Thanks for pointing this out.
> You mean piece of code like this, right?
> 509 MX25_PAD_CTL_GRP_DVS_MISC   = IOMUX_PAD(0x418, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 510 MX25_PAD_CTL_GRP_DSE_FEC= IOMUX_PAD(0x41c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 511 MX25_PAD_CTL_GRP_DVS_JTAG   = IOMUX_PAD(0x420, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 512 MX25_PAD_CTL_GRP_DSE_NFC= IOMUX_PAD(0x424, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 513 MX25_PAD_CTL_GRP_DSE_CSI= IOMUX_PAD(0x428, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 514 MX25_PAD_CTL_GRP_DSE_WEIM   = IOMUX_PAD(0x42c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 515 MX25_PAD_CTL_GRP_DSE_DDR= IOMUX_PAD(0x430, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 516 MX25_PAD_CTL_GRP_DVS_CRM= IOMUX_PAD(0x434, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 517 MX25_PAD_CTL_GRP_DSE_KPP= IOMUX_PAD(0x438, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 518 MX25_PAD_CTL_GRP_DSE_SDHC1  = IOMUX_PAD(0x43c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 519 MX25_PAD_CTL_GRP_DSE_LCD= IOMUX_PAD(0x440, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 520 MX25_PAD_CTL_GRP_DSE_UART   = IOMUX_PAD(0x444, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 521 MX25_PAD_CTL_GRP_DVS_NFC= IOMUX_PAD(0x448, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 522 MX25_PAD_CTL_GRP_DVS_CSI= IOMUX_PAD(0x44c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 523 MX25_PAD_CTL_GRP_DSE_CSPI1  = IOMUX_PAD(0x450, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 524 MX25_PAD_CTL_GRP_DDRTYPE= IOMUX_PAD(0x454, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 525 MX25_PAD_CTL_GRP_DVS_SDHC1  = IOMUX_PAD(0x458, 0x000, 
> 0, 0, 0, NO_PAD_CTRL),
> 526 MX25_PAD_CTL_GRP_DVS_LCD= IOMUX_PAD(0x45c, 0x000, 
> 0, 0, 0, NO_PAD_CTRL)
> 
> My bad. I only took i.mx6/7 into consideration when working this patch.
>>
 Also If still checking mux_ctrl_ofs, we have no chance to set iomux
 for i.MX7D IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00, because the mux_ctrl_ofs
 for this register is 0.
>>
>> The need is clear, but then the test mechanism should be changed, not
>> removed. You could find a free bit in mux_ctrl_ofs or in mux_mode or
>> elsewhere in IOMUX_PAD (e.g. bit 63, which is currently reserved),
>> something like NO_PAD_CTRL, or create a reserved value other than
>> __NA_ for mux_ctrl_ofs/mux_mode.
> 
> Stefano,
> 
> There is '#define NO_PAD_CTRL (1 << 17)' now,
> we can add'NO_MUX_CTRL' and 'NO_SEL_CTRL(select input)', but need to check
> whether the __NA__ pads are used or not now.
> also need a big change for the layout and related macro definition:

Right

> 39  * MUX_CTRL_OFS:0..11 (12)
> 40  * PAD_CTRL_OFS:   12..23 (12)
> 41  * SEL_INPUT_OFS:  24..35 (12)
> 42  * MUX_MODE + SION:36..40  (5)
> 43  * PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
> 44  * SEL_INP:59..62  (4)
> 45  * reserved: 63(1)
> 
> Can we just use the following way, since only i.mx7 has the requirement of
> mux_ctrl_ofs maybe at 0. 
> if (is_soc_type(MX7)) {
>   __raw_writel(mux_mode, base + mux_ctrl_ofs);
> } else {
>   if (mux_ctrl_ofs)
> __raw_writel(mux_mode, base + mux_ctrl_ofs);
> }
> I prefer this simple way for now, since we are at RC2 now. Later we can
> refactor the code using the way to provide macros NO_MUX_CTRL or NO_SEL_CTRL.
> What do you think?

Yes, it is ok for now, green light on my side.

Best regards,
Stefano Babic

-- 
=
DENX Software

Re: [U-Boot] [PATCH 1/3] imx-common: fix iomux settings

2015-09-20 Thread Peng Fan

On Sun, Sep 20, 2015 at 05:02:58PM +0200, Benoît Thébaudeau wrote:
>Hi Peng,
>
>On Sun, Sep 20, 2015 at 3:02 PM, Peng Fan  wrote:
>> On Sun, Sep 20, 2015 at 01:33:20PM +0200, Benoît Thébaudeau wrote:
>>>Hi Stefano, Peng, Fabio, all,
>>>
>>>Sorry for seeing this only now, but...
>>>
>>>On Sun, Sep 20, 2015 at 9:43 AM, Stefano Babic  wrote:


 On 14/09/2015 07:34, Peng Fan wrote:
> When setting iomux for a pin mux, there is no need to check mux_ctrl_ofs.
>>>
>>>This assumption is wrong. This check was there for a reason. Some i.MX
>>>SoCs have some registers controlling pads but not muxes, either for a
>>>single pin or for groups of pins:
>>>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx25/iomux-mx25.h;h=220cf4ef2e94aa69482557852ed0cc0690a79cec;hb=HEAD
>>>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx35/iomux-mx35.h;h=5898b46f4720088b18882e21d0d2424fff987ab5;hb=HEAD
>>>http://git.denx.de/?p=u-boot/u-boot-imx.git;a=blob;f=arch/arm/include/asm/arch-mx5/iomux-mx51.h;h=b7b169505f91c4a213be59efca47e8a5aed770e7;hb=HEAD
>>>
>>>I have not checked whether these cases are currently used in-tree by
>>>U-Boot, but they have to be possible anyway in order to support these
>>>SoCs.
>>
>> Benoît,
>>
>> Thanks for pointing this out.
>> You mean piece of code like this, right?
>> 509 MX25_PAD_CTL_GRP_DVS_MISC   = IOMUX_PAD(0x418, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 510 MX25_PAD_CTL_GRP_DSE_FEC= IOMUX_PAD(0x41c, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 511 MX25_PAD_CTL_GRP_DVS_JTAG   = IOMUX_PAD(0x420, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 512 MX25_PAD_CTL_GRP_DSE_NFC= IOMUX_PAD(0x424, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 513 MX25_PAD_CTL_GRP_DSE_CSI= IOMUX_PAD(0x428, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 514 MX25_PAD_CTL_GRP_DSE_WEIM   = IOMUX_PAD(0x42c, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 515 MX25_PAD_CTL_GRP_DSE_DDR= IOMUX_PAD(0x430, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 516 MX25_PAD_CTL_GRP_DVS_CRM= IOMUX_PAD(0x434, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 517 MX25_PAD_CTL_GRP_DSE_KPP= IOMUX_PAD(0x438, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 518 MX25_PAD_CTL_GRP_DSE_SDHC1  = IOMUX_PAD(0x43c, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 519 MX25_PAD_CTL_GRP_DSE_LCD= IOMUX_PAD(0x440, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 520 MX25_PAD_CTL_GRP_DSE_UART   = IOMUX_PAD(0x444, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 521 MX25_PAD_CTL_GRP_DVS_NFC= IOMUX_PAD(0x448, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 522 MX25_PAD_CTL_GRP_DVS_CSI= IOMUX_PAD(0x44c, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 523 MX25_PAD_CTL_GRP_DSE_CSPI1  = IOMUX_PAD(0x450, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 524 MX25_PAD_CTL_GRP_DDRTYPE= IOMUX_PAD(0x454, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 525 MX25_PAD_CTL_GRP_DVS_SDHC1  = IOMUX_PAD(0x458, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL),
>> 526 MX25_PAD_CTL_GRP_DVS_LCD= IOMUX_PAD(0x45c, 
>> 0x000, 0, 0, 0, NO_PAD_CTRL)
>
>Correct.
>
>> My bad. I only took i.mx6/7 into consideration when working this patch.
>>>
> Also If still checking mux_ctrl_ofs, we have no chance to set iomux
> for i.MX7D IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00, because the mux_ctrl_ofs
> for this register is 0.
>>>
>>>The need is clear, but then the test mechanism should be changed, not
>>>removed. You could find a free bit in mux_ctrl_ofs or in mux_mode or
>>>elsewhere in IOMUX_PAD (e.g. bit 63, which is currently reserved),
>>>something like NO_PAD_CTRL, or create a reserved value other than
>>>__NA_ for mux_ctrl_ofs/mux_mode.
>>
>> Stefano,
>>
>> There is '#define NO_PAD_CTRL (1 << 17)' now,
>> we can add'NO_MUX_CTRL' and 'NO_SEL_CTRL(select input)', but need to check
>> whether the __NA__ pads are used or not now.
>> also need a big change for the layout and related macro definition:
>> 39  * MUX_CTRL_OFS:0..11 (12)
>> 40  * PAD_CTRL_OFS:   12..23 (12)
>> 41  * SEL_INPUT_OFS:  24..35 (12)
>> 42  * MUX_MODE + SION:36..40  (5)
>> 43  * PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
>> 44  * SEL_INP:59..62  (4)
>> 45  * reserved: 63(1)
>>
>> Can we just use the following way, since only i.mx7 has the requirement of
>> mux_ctrl_ofs maybe at 0.
>> if (is_soc_type(MX7)) {
>> __raw_writel(mux_mode, base + mux_ctrl_ofs);
>> } else {
>> if (mux_ctrl_ofs)
>> __raw_writel(mux_mode, base + mux_ctrl_ofs);
>> }
>> I prefer this simple way for now, since we are at RC2 now. Later we can
>> refactor the code using the way to provide macros NO_MUX_CTRL or NO_SEL_CTRL.
>> What

[U-Boot] [PATCH 0/4] Fix operation on Odroid devices

2015-09-20 Thread Tobias Jakobi

Hello,

currently operation on Exynos4412-based Odroid devices is broken.

The bootloader stops with this message:
Card did not respond to voltage select!
*** Warning - MMC init failed, using default environment

This series fixes error handling in the s5p sdhci driver
and the cause of the issue, which is an inverted card
detection check.

Thanks goes to Marek Vasut and Sjoerd Simons who helped
me on IRC to get this triaged.

With best wishes,
Tobias

Tobias Jakobi (4):
  exynos: Properly initialize host_caps in s5p_sdhci_core_init()
  exynos: Fix passing of errors in exynos_mmc_init()
  exynos: be more verbose in process_nodes()
  exynos: fix and cleanup do_sdhci_init()

 drivers/mmc/s5p_sdhci.c | 39 +++
 1 file changed, 23 insertions(+), 16 deletions(-)

-- 
2.0.5

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 2/4] exynos: Fix passing of errors in exynos_mmc_init()

2015-09-20 Thread Tobias Jakobi

exynos_mmc_init() always returns zero, so for the caller
it looks like it never fails.

Correct this by returning the error code of process_nodes().
For process_nodes() do something similar and return early
when do_sdhci_init() fails.

Signed-off-by: Tobias Jakobi 
---
 drivers/mmc/s5p_sdhci.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index e9c43a9..bc2102a 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -187,7 +187,11 @@ static int process_nodes(const void *blob, int 
node_list[], int count)
printf("%s: failed to decode dev %d\n", __func__, i);
return -1;
}
-   do_sdhci_init(host);
+
+   if (do_sdhci_init(host)) {
+   printf("%s: failed to initialize dev %d\n", __func__, 
i);
+   return -2;
+   }
}
return 0;
 }
@@ -201,8 +205,6 @@ int exynos_mmc_init(const void *blob)
COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
SDHCI_MAX_HOSTS);
 
-   process_nodes(blob, node_list, count);
-
-   return 0;
+   return process_nodes(blob, node_list, count);
 }
 #endif
-- 
2.0.5

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 1/4] exynos: Properly initialize host_caps in s5p_sdhci_core_init()

2015-09-20 Thread Tobias Jakobi

The sdhci_host struct is allocated in s5p_sdhci_init() but the
fields are not initialized.

Signed-off-by: Tobias Jakobi 
---
 drivers/mmc/s5p_sdhci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 4db51d6..e9c43a9 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -76,6 +76,7 @@ static int s5p_sdhci_core_init(struct sdhci_host *host)
host->set_control_reg = _sdhci_set_control_reg;
host->set_clock = set_mmc_clk;
 
+   host->host_caps = 0;
if (host->bus_width == 8)
host->host_caps |= MMC_MODE_8BIT;
 
-- 
2.0.5

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 3/4] exynos: be more verbose in process_nodes()

2015-09-20 Thread Tobias Jakobi

In case sdhci_get_config() or do_sdhci_init() fail, show
the error code that was returned.

Signed-off-by: Tobias Jakobi 
---
 drivers/mmc/s5p_sdhci.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index bc2102a..6be3609 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -171,7 +171,7 @@ static int sdhci_get_config(const void *blob, int node, 
struct sdhci_host *host)
 static int process_nodes(const void *blob, int node_list[], int count)
 {
struct sdhci_host *host;
-   int i, node;
+   int i, node, ret;
 
debug("%s: count = %d\n", __func__, count);
 
@@ -183,13 +183,15 @@ static int process_nodes(const void *blob, int 
node_list[], int count)
 
host = _host[i];
 
-   if (sdhci_get_config(blob, node, host)) {
-   printf("%s: failed to decode dev %d\n", __func__, i);
+   ret = sdhci_get_config(blob, node, host);
+   if (ret) {
+   printf("%s: failed to decode dev %d (%d)\n", __func__, 
i, ret);
return -1;
}
 
-   if (do_sdhci_init(host)) {
-   printf("%s: failed to initialize dev %d\n", __func__, 
i);
+   ret = do_sdhci_init(host);
+   if (ret) {
+   printf("%s: failed to initialize dev %d (%d)\n", 
__func__, i, ret);
return -2;
}
}
-- 
2.0.5

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 4/4] exynos: fix and cleanup do_sdhci_init()

2015-09-20 Thread Tobias Jakobi

The CD check is currently inverted. dm_gpio_get_value() returns
one when a card is detected. All other values (zero when there
is no card, or negative values for the internal errors) indicate
failure.

Signed-off-by: Tobias Jakobi 
---
 drivers/mmc/s5p_sdhci.c | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 6be3609..bc04370 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -102,29 +102,31 @@ struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
 
 static int do_sdhci_init(struct sdhci_host *host)
 {
-   int dev_id, flag;
-   int err = 0;
+   int dev_id, flag, ret;
 
flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
dev_id = host->index + PERIPH_ID_SDMMC0;
 
if (dm_gpio_is_valid(>pwr_gpio)) {
dm_gpio_set_value(>pwr_gpio, 1);
-   err = exynos_pinmux_config(dev_id, flag);
-   if (err) {
+   ret = exynos_pinmux_config(dev_id, flag);
+   if (ret) {
debug("MMC not configured\n");
-   return err;
+   return ret;
}
}
 
if (dm_gpio_is_valid(>cd_gpio)) {
-   if (dm_gpio_get_value(>cd_gpio))
+   ret = dm_gpio_get_value(>cd_gpio);
+   if (ret != 1) {
+   debug("No card detected (%d)\n", ret);
return -ENODEV;
+   }
 
-   err = exynos_pinmux_config(dev_id, flag);
-   if (err) {
+   ret = exynos_pinmux_config(dev_id, flag);
+   if (ret) {
printf("external SD not configured\n");
-   return err;
+   return ret;
}
}
 
-- 
2.0.5

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/1] Kconfig: net: give PHYLIB to designware driver

2015-09-20 Thread Bin Meng

Hi Olliver,

On Fri, Sep 18, 2015 at 11:29 PM, Olliver Schinagl
 wrote:
> From: Olliver Schinagl 
>
> The designware driver has a build guard which makes it to only work when
> using the PHYLIB. With b68fe152272 the PHYLIB was added to the net
> Kconfig but not selected by all hardware depending on it.
>
> This patch enables PHYLIB for the Designware MAC
>
> Signed-off-by: Olliver Schinagl 
> ---
>  drivers/net/Kconfig | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
> index bbec6a6..51b1668 100644
> --- a/drivers/net/Kconfig
> +++ b/drivers/net/Kconfig
> @@ -79,10 +79,10 @@ config ETH_SANDBOX_RAW
>
>  config ETH_DESIGNWARE
> bool "Synopsys Designware Ethernet MAC"
> +   select PHYLIB
> help
>   This MAC is present in SoCs from various vendors. It supports
> - 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
> - provide the PHY (physical media interface).
> + 100Mbit and 1 Gbit operation.
>
>  config PCH_GBE
> bool "Intel Platform Controller Hub EG20T GMAC driver"
> --

This is not enough. You need update all borads' config.h files to
remove CONFIG_PHYLIB, otherwise it causes redefinition warnings.

Regards,
Bin
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

44 matches

Mail list logo