Re: [U-Boot] [PATCH v3 2/3] cfi_flash: convert to driver model

[Stefan Roese]

Hi Thomas,

On 03.11.2015 07:25, Thomas Chou wrote:

On 2015年11月03日 13:56, Stefan Roese wrote:

if (CONFIG_IS_ENABLED(CFI_FLASH)) {
 struct udevice *dev;
 cfi_flash_num_flash_banks = 0;
 /* probe every MTD device to find cfi-flash device */
 for (uclass_first_device(UCLASS_MTD, &dev);
  dev;
  uclass_next_device(&dev)) {
 }
}


I'm still not an expert in the DM internals. I fail to see, where
the actual probing is happening in the loop. Is it buried in the
uclass_first_device() call?


The probing is happening in both uclass_first_device() and
uclass_next_device().

The uclass_first_device() will probe the first device.
While uclass_next_device() will probe the rest if they exist.


Okay. So cfi_flash_probe() will get called assigning the base
addresses that are available. The real "probing" (meaning
detection) is happening later in flash_init().

I think adding (or extending) a comment here to describe this
would be helpful in v2.

Thanks,
Stefan

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Re: [U-Boot] [PATCH 2/2] mpc85xx: Add support for the Varisys Cyrus board

[Andy Fleming]

On Fri, Oct 30, 2015 at 12:10 PM, York Sun  wrote:
>
>
> On 10/21/2015 04:59 PM, Andy Fleming wrote:
>> This board runs a P5020 or P5040 chip, and utilizes
>> an EEPROM with similar formatting to the Freescale P5020DS.
>>
>> Large amounts of this code were developed by
>> Adrian Cox 
>>
>> Signed-off-by: Andy Fleming 
>> ---
>>  arch/powerpc/cpu/mpc85xx/Kconfig |   4 +
>>  board/varisys/common/Makefile|  23 ++
>>  board/varisys/common/eeprom.h|   6 +
>>  board/varisys/common/sys_eeprom.c| 605 
>> +++
>>  board/varisys/cyrus/Kconfig  |  13 +
>>  board/varisys/cyrus/Makefile |   8 +
>>  board/varisys/cyrus/README   |  21 ++
>>  board/varisys/cyrus/cyrus.c  | 116 +++
>>  board/varisys/cyrus/cyrus.h  |  11 +
>>  board/varisys/cyrus/ddr.c| 188 +++
>>  board/varisys/cyrus/eth.c| 100 ++
>>  board/varisys/cyrus/law.c|  27 ++
>>  board/varisys/cyrus/pbi.cfg  |  35 ++
>>  board/varisys/cyrus/pci.c|  23 ++
>>  board/varisys/cyrus/rcw_p5020_v2.cfg |  11 +
>>  board/varisys/cyrus/rcw_p5040.cfg|  11 +
>>  board/varisys/cyrus/tlb.c| 106 ++
>>  configs/Cyrus_P5020_defconfig|   9 +
>>  configs/Cyrus_P5040_defconfig|   9 +
>>  include/configs/cyrus.h  | 590 
>> ++
>>  20 files changed, 1916 insertions(+)
>>  create mode 100644 board/varisys/common/Makefile
>>  create mode 100644 board/varisys/common/eeprom.h
>>  create mode 100644 board/varisys/common/sys_eeprom.c
>>  create mode 100644 board/varisys/cyrus/Kconfig
>>  create mode 100644 board/varisys/cyrus/Makefile
>>  create mode 100644 board/varisys/cyrus/README
>>  create mode 100644 board/varisys/cyrus/cyrus.c
>>  create mode 100644 board/varisys/cyrus/cyrus.h
>>  create mode 100644 board/varisys/cyrus/ddr.c
>>  create mode 100644 board/varisys/cyrus/eth.c
>>  create mode 100644 board/varisys/cyrus/law.c
>>  create mode 100644 board/varisys/cyrus/pbi.cfg
>>  create mode 100644 board/varisys/cyrus/pci.c
>>  create mode 100644 board/varisys/cyrus/rcw_p5020_v2.cfg
>>  create mode 100644 board/varisys/cyrus/rcw_p5040.cfg
>>  create mode 100644 board/varisys/cyrus/tlb.c
>>  create mode 100644 configs/Cyrus_P5020_defconfig
>>  create mode 100644 configs/Cyrus_P5040_defconfig
>>  create mode 100644 include/configs/cyrus.h
>>
>
> Andy,
>
> I presume you have examined the difference between
> board/varisys/common/sys_eeprom.c and the original file
> board/freescale/common/sys_eeprom.c. Is it possible to reuse the existing 
> file?
> This is a 600+ lines copy-n-paste.

This code presents some challenges. The code is nearly identical to
the Freescale code, and quite unnecessarily so. If I were working at
Varisys, I would recommend that we pare down this code to only what we
need. As I am not, and as I presume that some amount of eeprom
programming may be done in manufacturing, I don't feel comfortable
changing this code (other than to perhaps remove the MPC85xx-specific
stuff I missed).

Sadly, while it is nearly identical to the Freescale code, there are a
number of differences. This code uses NXID version 0, which has been
removed from the FSL code. It also supports an alternate mechanism for
reading the eeprom (mac_read_from_generic_eeprom).

I can imagine some ways I might refactor the code to ensure that it
works for both FSL and Varisys systems, but this raises the issue that
these files implement two completely separate APIs which are only
nearly-identical in current implementation. Freescale could decide to
change the format of their eeproms, and provide scripts to any
affected customers to shift them to the new format (they have before).
Freescale could discover that manufacturing made a mistake in the
formatting, and submit code to accommodate this. Likewise, Varisys
could decide that the current format is more than they need, or that
it's redundant with some other board mechanism. In such cases,
unifying this code would actually make code maintenance *more*
difficult for the two companies.

I did initially intend to refactor the code, but changed my mind when
I realized how difficult it would be to make sure I hadn't broken
anyone else's board. If you think it's necessary, I would probably
just try to strip down the varisys version of the file to the bare
essentials. I'm just not sure which parts *are* essential at the
moment.

Andy
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Re: [U-Boot] [PATCH v3 2/3] cfi_flash: convert to driver model

[Thomas Chou]

Hi Stefan,

On 2015年11月03日 13:56, Stefan Roese wrote:

if (CONFIG_IS_ENABLED(CFI_FLASH)) {
 struct udevice *dev;
 cfi_flash_num_flash_banks = 0;
 /* probe every MTD device to find cfi-flash device */
 for (uclass_first_device(UCLASS_MTD, &dev);
  dev;
  uclass_next_device(&dev)) {
 }
}


I'm still not an expert in the DM internals. I fail to see, where
the actual probing is happening in the loop. Is it buried in the
uclass_first_device() call?


The probing is happening in both uclass_first_device() and 
uclass_next_device().


The uclass_first_device() will probe the first device.
While uclass_next_device() will probe the rest if they exist.

Best regards,
Thomas
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[U-Boot] [PATCH 2/3] nios2: remove CONFIG_SYS_INIT_SP macro

[Thomas Chou]

Remove CONFIG_SYS_INIT_SP macro, as the initial stack is set to
below the u-boot code.

Signed-off-by: Thomas Chou 
---
 arch/nios2/cpu/start.S  | 3 +--
 include/configs/nios2-generic.h | 1 -
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
index 8758e7e..bb86bbf 100644
--- a/arch/nios2/cpu/start.S
+++ b/arch/nios2/cpu/start.S
@@ -81,6 +81,7 @@ _cur: movhi   r5, %hi(_cur - _start)
mov r8, r4
movhi   r5, %hi(_start)
ori r5, r5, %lo(_start) /* r5 <- linked _start */
+   mov sp, r5  /* initial stack below u-boot code */
beq r4, r5, 3f
 
movhi   r6, %hi(CONFIG_SYS_MONITOR_LEN)
@@ -100,8 +101,6 @@ _cur:   movhi   r5, %hi(_cur - _start)
 _reloc:
 
/* STACK INIT -- zero top two words for call back chain. */
-   movhi   sp, %hi(CONFIG_SYS_INIT_SP)
-   ori sp, sp, %lo(CONFIG_SYS_INIT_SP)
addisp, sp, -8
stw r0, 0(sp)
stw r0, 4(sp)
diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
index 74c715d..3a559f1 100644
--- a/include/configs/nios2-generic.h
+++ b/include/configs/nios2-generic.h
@@ -84,7 +84,6 @@
 CONFIG_SYS_SDRAM_SIZE - \
 CONFIG_SYS_MONITOR_LEN)
 #define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + 0x2)
-#define CONFIG_SYS_INIT_SP CONFIG_SYS_MALLOC_BASE
 
 /*
  * MISC
-- 
2.5.0

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[U-Boot] [PATCH 1/3] nios2: remove CONFIG_SYS_MALLOC_BASE macro

[Thomas Chou]

Remove CONFIG_SYS_MALLOC_BASE macro, as it is not used by
the generic board.

Signed-off-by: Thomas Chou 
---
 include/configs/nios2-generic.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
index 84faa4c..74c715d 100644
--- a/include/configs/nios2-generic.h
+++ b/include/configs/nios2-generic.h
@@ -84,8 +84,6 @@
 CONFIG_SYS_SDRAM_SIZE - \
 CONFIG_SYS_MONITOR_LEN)
 #define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + 0x2)
-#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - \
-CONFIG_SYS_MALLOC_LEN)
 #define CONFIG_SYS_INIT_SP CONFIG_SYS_MALLOC_BASE
 
 /*
-- 
2.5.0

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[U-Boot] [PATCH 3/3] nios2: fix cached mode in clearing the BSS

[Thomas Chou]

As the generic board runs in cached mode, it should not use
"stwio" which bypass the cache.

Signed-off-by: Thomas Chou 
---
 arch/nios2/cpu/start.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
index bb86bbf..54787c5 100644
--- a/arch/nios2/cpu/start.S
+++ b/arch/nios2/cpu/start.S
@@ -158,7 +158,7 @@ relocate_code:
ori r6, r6, %lo(__bss_end)
beq r5, r6, 5f
 
-4: stwio   r0, 0(r5)
+4: stw r0, 0(r5)
addir5, r5, 4
bne r5, r6, 4b
 5:
-- 
2.5.0

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[U-Boot] [PATCH 2/2] altera_uart: Adjust the declaration of debug_uart_init()

[Thomas Chou]

Follow commit 97b059730218 ("debug_uart: Adjust the declaration of
debug_uart_init()")

Signed-off-by: Thomas Chou 
---
 drivers/serial/altera_uart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
index 4c4794e..6228981 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/serial/altera_uart.c
@@ -124,7 +124,7 @@ U_BOOT_DRIVER(altera_uart) = {
 
 #include 
 
-void debug_uart_init(void)
+void _debug_uart_init(void)
 {
struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
u32 div;
-- 
2.5.0

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[U-Boot] [PATCH 1/2] altera_jtag_uart: Adjust the declaration of debug_uart_init()

[Thomas Chou]

Follow commit 97b059730218 ("debug_uart: Adjust the declaration of
debug_uart_init()")

Signed-off-by: Thomas Chou 
---
 drivers/serial/altera_jtag_uart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/serial/altera_jtag_uart.c 
b/drivers/serial/altera_jtag_uart.c
index 767603c..5f0d7ac 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -130,7 +130,7 @@ U_BOOT_DRIVER(altera_jtaguart) = {
 
 #include 
 
-void debug_uart_init(void)
+void _debug_uart_init(void)
 {
 }
 
-- 
2.5.0

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Re: [U-Boot] [PATCH] armv8: ls2085a: Add workaround of errata A009635

[Kushwaha Prabhakar]

Got it,

Let me sent v2 version as per your suggestion.

Regards,
Prabhakar

From: Sun York-R58495
Sent: Tuesday, November 03, 2015 10:23 AM
To: Kushwaha Prabhakar-B32579 ; u-boot@lists.denx.de
Cc: Sun York-R58495 
Subject: RE: [PATCH] armv8: ls2085a: Add workaround of errata A009635

We don't have to put the erratum information into commit message, as far as we 
explain why and what. The errata document is available to public.

York

 Original message 
From: Prabhakar Kushwaha
Date:11/02/2015 8:37 PM (GMT-08:00)
To: u-boot@lists.denx.de
Cc: Sun York-R58495 , Kushwaha Prabhakar-B32579
Subject: [PATCH] armv8: ls2085a: Add workaround of errata A009635

Description:
When an A57 core is waiting for certain condition, it might use WFE to put
itself into lower power mode to save power if the condition is not met.
Another core can send an event to wake up the first core to check if the
condition is met or not.

When the second A57 core executes SEV instruction,it drives EVENTO for 3
core cycles. The SoC Run Control block samples the signal with the
platform clock, ORed with its own EVENTI event and drive it back to A57
cores as EVENTI.
If the core runs at higher than x3 speed of the platform, EVENTO is
shorter than one platform clock and might be missed by the platform sampling
logic. Taking into the consideration of jitter between A57 PLL
and the platform PLL, A57 must run at no greater than 2.5x speed of
the platform  to guarantee the reliable sampling.

Workaround:
Configure Run Control and EPU to periodically send out EVENTI signals to
wake up A57 cores so that cores that are in WFE loop have
chance to check whether the condition for it to exit WFE loop is true
or not. This will make sure that in case SEV instruction is lost,
the core in WFE loop  has a bounded time to exit the WFE loop.

Followings are the register values the software need to write to set
up Run Control and EPU:

0x7_0007_0914 = 0x_0200;
0x7_0006_0914 = ;
0x7_0006_0814 = 0x8282_;
0x7_0006_0228 = 0x002f_;
0x7_0006_0314 = 0x2000_;
0x7_0006_ = 0x8000_;

For  value above,  it is the number of platform cycles between wake
up events generated by EPU.  For example: A typical value is 1 microsecond.
If the platform frequency is 500MHz, each cycle is 2ns.
interval = 1us/2ns=500=0x1F4.

Signed-off-by: Prabhakar Kushwaha 
mailto:prabha...@freescale.com>>
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   |  6 
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 39 +++
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  9 ++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h|  3 ++
 4 files changed, 57 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 0cb0afa..dbb12c2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -484,7 +484,13 @@ int arch_early_init_r(void)
 {
 #ifdef CONFIG_MP
 int rv = 1;
+#endif
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
+   erratum_a009635();
+#endif

+#ifdef CONFIG_MP
 rv = fsl_layerscape_wake_seconday_cores();
 if (rv)
 printf("Did not wake secondary cores\n");
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 637853d..e8cdb10 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -9,10 +9,49 @@
 #include 
 #include 
 #include 
+#include 

 DECLARE_GLOBAL_DATA_PTR;

 #ifdef CONFIG_LS2085A
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
+#define PLATFORM_CYCLE_ENV_VAR "a009635_interval_val"
+
+static unsigned long get_internval_val_mhz(void)
+{
+   char *interval = getenv(PLATFORM_CYCLE_ENV_VAR);
+   ulong interval_mhz = get_bus_freq(0) / (1000 * 1000);
+
+   if (interval)
+   interval_mhz = simple_strtoul(interval, NULL, 10);
+
+   return interval_mhz;
+}
+
+void erratum_a009635(void)
+{
+   u32 val;
+   unsigned long interval_mhz = get_internval_val_mhz();
+
+   if (!interval_mhz)
+   return;
+
+   val = in_le32(DCSR_CGACRE5);
+   writel(val | 0x0200, DCSR_CGACRE5);
+
+   val = in_le32(EPU_EPCMPR5);
+   writel(interval_mhz, EPU_EPCMPR5);
+   val = in_le32(EPU_EPCCR5);
+   writel(val | 0x8282, EPU_EPCCR5);
+   val = in_le32(EPU_EPSMCR5);
+   writel(val | 0x002f, EPU_EPSMCR5);
+   val = in_le32(EPU_EPECR5);
+   writel(val | 0x2000, EPU_EPECR5);
+   val = in_le32(EPU_EPGCR);
+   writel(val | 0x8000, EPU_EPGCR);
+}
+#endif
+
 static void erratum_a008751(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A008751
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 87bb937..c7169ab 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -84,1

Re: [U-Boot] [PATCH v3 2/3] cfi_flash: convert to driver model

[Stefan Roese]

Hi Thomas,

On 03.11.2015 01:23, Thomas Chou wrote:

   #ifdef CONFIG_SYS_FLASH_PROTECTION
   /* read environment from EEPROM */
@@ -2322,6 +2337,14 @@ unsigned long flash_init (void)
   getenv_f("unlock", s, sizeof(s));
   #endif

+#ifdef CONFIG_CFI_FLASH /* for driver model */
+cfi_flash_num_flash_banks = 0;
+/* probe every MTD device */
+for (uclass_first_device(UCLASS_MTD, &dev);
+ dev;
+ uclass_next_device(&dev)) {
+}
+#endif


What is this loop above exactly doing?


I want to get the cfi-flash device probed and flash_info[] got
initialized. So I look in every mtd uclass device.

I will use CONFIG_IS_ENABLED to remove the warning above.


Thats good, thanks.


if (CONFIG_IS_ENABLED(CFI_FLASH)) {
 struct udevice *dev;
 cfi_flash_num_flash_banks = 0;
 /* probe every MTD device to find cfi-flash device */
 for (uclass_first_device(UCLASS_MTD, &dev);
  dev;
  uclass_next_device(&dev)) {
 }
}


I'm still not an expert in the DM internals. I fail to see, where
the actual probing is happening in the loop. Is it buried in the
uclass_first_device() call?

Thanks,
Stefan

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Re: [U-Boot] [PATCH 7/8] misc: altera_sysid: minor clean up

[Thomas Chou]

On 2015年10月30日 15:18, Thomas Chou wrote:

- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou 
---
  drivers/misc/altera_sysid.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)



Applied to u-boot-nios.


diff --git a/drivers/misc/altera_sysid.c b/drivers/misc/altera_sysid.c
index 249b273..1859b80 100644
--- a/drivers/misc/altera_sysid.c
+++ b/drivers/misc/altera_sysid.c
@@ -87,7 +87,7 @@ static const struct misc_ops altera_sysid_ops = {
  };

  static const struct udevice_id altera_sysid_ids[] = {
-   { .compatible = "altr,sysid-1.0", },
+   { .compatible = "altr,sysid-1.0" },
{ }
  };



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Re: [U-Boot] [PATCH 8/8] spi: altera_spi: minor clean up

[Thomas Chou]

On 2015年10月30日 15:18, Thomas Chou wrote:

- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou 
Cc: Jagan Teki 
---
  drivers/spi/altera_spi.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)



Applied to u-boot-nios.


diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
index e49949b..432a8e7 100644
--- a/drivers/spi/altera_spi.c
+++ b/drivers/spi/altera_spi.c
@@ -193,7 +193,7 @@ static const struct dm_spi_ops altera_spi_ops = {
  };

  static const struct udevice_id altera_spi_ids[] = {
-   { .compatible = "altr,spi-1.0", },
+   { .compatible = "altr,spi-1.0" },
{ }
  };



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Re: [U-Boot] [PATCH 6/8] timer: altera_timer: minor clean up

[Thomas Chou]

On 2015年10月30日 15:18, Thomas Chou wrote:

- Moved macro definitions to top
- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou 
---
  drivers/timer/altera_timer.c | 12 ++--
  1 file changed, 6 insertions(+), 6 deletions(-)



Applied to u-boot-nios.


diff --git a/drivers/timer/altera_timer.c b/drivers/timer/altera_timer.c
index 288357c..7952ad7 100644
--- a/drivers/timer/altera_timer.c
+++ b/drivers/timer/altera_timer.c
@@ -16,6 +16,11 @@

  DECLARE_GLOBAL_DATA_PTR;

+/* control register */
+#define ALTERA_TIMER_CONT  BIT(1)  /* Continuous mode */
+#define ALTERA_TIMER_START BIT(2)  /* Start timer */
+#define ALTERA_TIMER_STOP  BIT(3)  /* Stop timer */
+
  struct altera_timer_regs {
u32 status; /* Timer status reg */
u32 control;/* Timer control reg */
@@ -30,11 +35,6 @@ struct altera_timer_platdata {
unsigned long clock_rate;
  };

-/* control register */
-#define ALTERA_TIMER_CONT  BIT(1)  /* Continuous mode */
-#define ALTERA_TIMER_START BIT(2)  /* Start timer */
-#define ALTERA_TIMER_STOP  BIT(3)  /* Stop timer */
-
  static int altera_timer_get_count(struct udevice *dev, unsigned long *count)
  {
struct altera_timer_platdata *plat = dev->platdata;
@@ -88,7 +88,7 @@ static const struct timer_ops altera_timer_ops = {
  };

  static const struct udevice_id altera_timer_ids[] = {
-   { .compatible = "altr,timer-1.0", },
+   { .compatible = "altr,timer-1.0" },
{ }
  };



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Re: [U-Boot] [PATCH 5/8] timer: altera_timer: use BIT macro

[Thomas Chou]

On 2015年10月30日 15:18, Thomas Chou wrote:

Replace numerical bit shift with BIT macro
in altera_timer

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2  31

Signed-off-by: Thomas Chou 
---
  drivers/timer/altera_timer.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)



Applied to u-boot-nios.


diff --git a/drivers/timer/altera_timer.c b/drivers/timer/altera_timer.c
index 2ef9ad6..288357c 100644
--- a/drivers/timer/altera_timer.c
+++ b/drivers/timer/altera_timer.c
@@ -31,9 +31,9 @@ struct altera_timer_platdata {
  };

  /* control register */
-#define ALTERA_TIMER_CONT  (1 << 1)  /* Continuous mode */
-#define ALTERA_TIMER_START (1 << 2)  /* Start timer */
-#define ALTERA_TIMER_STOP  (1 << 3)  /* Stop timer */
+#define ALTERA_TIMER_CONT  BIT(1)  /* Continuous mode */
+#define ALTERA_TIMER_START BIT(2)  /* Start timer */
+#define ALTERA_TIMER_STOP  BIT(3)  /* Stop timer */

  static int altera_timer_get_count(struct udevice *dev, unsigned long *count)
  {


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Re: [U-Boot] [PATCH 4/8] serial: altera_uart: minor clean up

[Thomas Chou]

On 2015年10月30日 15:18, Thomas Chou wrote:

- Moved macro definitions to top
- Re-arrange header includes ascending order
- Remove unused header linux/compiler.h
- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou 
---
  drivers/serial/altera_uart.c | 19 +--
  1 file changed, 9 insertions(+), 10 deletions(-)



Applied to u-boot-nios.



diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
index 7d5197a..cc68b1c 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/serial/altera_uart.c
@@ -8,9 +8,15 @@
  #include 
  #include 
  #include 
-#include 
-#include 
  #include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* status register */
+#define ALTERA_UART_TMTBIT(5)  /* tx empty */
+#define ALTERA_UART_TRDY   BIT(6)  /* tx ready */
+#define ALTERA_UART_RRDY   BIT(7)  /* rx ready */

  struct altera_uart_regs {
u32 rxdata; /* Rx data reg */
@@ -26,13 +32,6 @@ struct altera_uart_platdata {
unsigned int uartclk;
  };

-/* status register */
-#define ALTERA_UART_TMTBIT(5)  /* tx empty */
-#define ALTERA_UART_TRDY   BIT(6)  /* tx ready */
-#define ALTERA_UART_RRDY   BIT(7)  /* rx ready */
-
-DECLARE_GLOBAL_DATA_PTR;
-
  static int altera_uart_setbrg(struct udevice *dev, int baudrate)
  {
struct altera_uart_platdata *plat = dev->platdata;
@@ -106,7 +105,7 @@ static const struct dm_serial_ops altera_uart_ops = {
  };

  static const struct udevice_id altera_uart_ids[] = {
-   { .compatible = "altr,uart-1.0", },
+   { .compatible = "altr,uart-1.0" },
{ }
  };



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Re: [U-Boot] [PATCH 3/8] serial: altera_uart: use BIT macro

[Thomas Chou]

On 2015年10月30日 15:18, Thomas Chou wrote:

Replace numerical bit shift with BIT macro
in altera_uart

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2  31

Signed-off-by: Thomas Chou 
---
  drivers/serial/altera_uart.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)



Applied to u-boot-nios.


diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
index 4ff9fe2..7d5197a 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/serial/altera_uart.c
@@ -27,9 +27,9 @@ struct altera_uart_platdata {
  };

  /* status register */
-#define ALTERA_UART_TMT(1 << 5)  /* tx empty */
-#define ALTERA_UART_TRDY   (1 << 6)  /* tx ready */
-#define ALTERA_UART_RRDY   (1 << 7)  /* rx ready */
+#define ALTERA_UART_TMTBIT(5)  /* tx empty */
+#define ALTERA_UART_TRDY   BIT(6)  /* tx ready */
+#define ALTERA_UART_RRDY   BIT(7)  /* rx ready */

  DECLARE_GLOBAL_DATA_PTR;



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Re: [U-Boot] [PATCH 2/8] serial: altera_jtag_uart: minor clean up

[Thomas Chou]

On 2015年10月30日 15:18, Thomas Chou wrote:

- Moved macro definitions to top
- Give spaces around the '>>' in ALTERA_JTAG_WSPACE()
- Re-arrange header includes ascending order
- Remove unused header linux/compiler.h
- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou 
---
  drivers/serial/altera_jtag_uart.c | 25 -
  1 file changed, 12 insertions(+), 13 deletions(-)



Applied to u-boot-nios.


diff --git a/drivers/serial/altera_jtag_uart.c 
b/drivers/serial/altera_jtag_uart.c
index 0aa741c..fd69188 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -8,18 +8,10 @@
  #include 
  #include 
  #include 
-#include 
-#include 
  #include 
+#include 

-struct altera_jtaguart_regs {
-   u32 data;   /* Data register */
-   u32 control;/* Control register */
-};
-
-struct altera_jtaguart_platdata {
-   struct altera_jtaguart_regs *regs;
-};
+DECLARE_GLOBAL_DATA_PTR;

  /* data register */
  #define ALTERA_JTAG_RVALIDBIT(15) /* Read valid */
@@ -27,11 +19,18 @@ struct altera_jtaguart_platdata {
  /* control register */
  #define ALTERA_JTAG_ACBIT(10) /* activity indicator */
  #define ALTERA_JTAG_RRDY  BIT(12) /* read available */
-#define ALTERA_JTAG_WSPACE(d)  ((d)>>16) /* Write space avail */
+#define ALTERA_JTAG_WSPACE(d)  ((d) >> 16)   /* Write space avail */
  /* Write fifo size. FIXME: this should be extracted with sopc2dts */
  #define ALTERA_JTAG_WRITE_DEPTH   64

-DECLARE_GLOBAL_DATA_PTR;
+struct altera_jtaguart_regs {
+   u32 data;   /* Data register */
+   u32 control;/* Control register */
+};
+
+struct altera_jtaguart_platdata {
+   struct altera_jtaguart_regs *regs;
+};

  static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate)
  {
@@ -112,7 +111,7 @@ static const struct dm_serial_ops altera_jtaguart_ops = {
  };

  static const struct udevice_id altera_jtaguart_ids[] = {
-   { .compatible = "altr,juart-1.0", },
+   { .compatible = "altr,juart-1.0" },
{ }
  };



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Re: [U-Boot] [PATCH 1/8] serial: altera_jtag_uart: use BIT macro

[Thomas Chou]

On 2015年10月30日 15:18, Thomas Chou wrote:

Replace numerical bit shift with BIT macro
in altera_jtag_uart

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2  31

Signed-off-by: Thomas Chou 
---
  drivers/serial/altera_jtag_uart.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)



Applied to u-boot-nios.


diff --git a/drivers/serial/altera_jtag_uart.c 
b/drivers/serial/altera_jtag_uart.c
index 39d4a4e..0aa741c 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -22,11 +22,11 @@ struct altera_jtaguart_platdata {
  };

  /* data register */
-#define ALTERA_JTAG_RVALID (1<<15)   /* Read valid */
+#define ALTERA_JTAG_RVALID BIT(15) /* Read valid */

  /* control register */
-#define ALTERA_JTAG_AC (1 << 10) /* activity indicator */
-#define ALTERA_JTAG_RRDY   (1 << 12) /* read available */
+#define ALTERA_JTAG_AC BIT(10) /* activity indicator */
+#define ALTERA_JTAG_RRDY   BIT(12) /* read available */
  #define ALTERA_JTAG_WSPACE(d) ((d)>>16) /* Write space avail */
  /* Write fifo size. FIXME: this should be extracted with sopc2dts */
  #define ALTERA_JTAG_WRITE_DEPTH   64


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Re: [U-Boot] [PATCH 2/2] nios2: enable setexpr command in defconfig

[Thomas Chou]

On 2015年10月29日 16:45, Thomas Chou wrote:

Enable setexpr command in defconfig because it is really
useful as suggested by Marek.

Signed-off-by: Thomas Chou 
---
  configs/nios2-generic_defconfig | 1 -
  1 file changed, 1 deletion(-)



Applied to u-boot-nios.


diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
index d4403fc..0a6de6f 100644
--- a/configs/nios2-generic_defconfig
+++ b/configs/nios2-generic_defconfig
@@ -10,7 +10,6 @@ CONFIG_CMD_CPU=y
  # CONFIG_CMD_XIMG is not set
  # CONFIG_CMD_FPGA is not set
  # CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
  CONFIG_CMD_DHCP=y
  # CONFIG_CMD_NFS is not set
  CONFIG_CMD_PING=y


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Re: [U-Boot] [PATCH 1/2] nios2: clean up macros that do not need a value in board header

[Thomas Chou]

On 2015年10月29日 16:45, Thomas Chou wrote:

Clean up macros that do not need a value as suggested by
Marek.

Signed-off-by: Thomas Chou 
---
  include/configs/nios2-generic.h | 8 
  1 file changed, 4 insertions(+), 4 deletions(-)



Applied to u-boot-nios.


diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
index 4283c95..144534d 100644
--- a/include/configs/nios2-generic.h
+++ b/include/configs/nios2-generic.h
@@ -35,10 +35,10 @@
  /*
   * MII/PHY
   */
-#define CONFIG_CMD_MII 1
-#define CONFIG_PHY_GIGE1
-#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN1
-#define CONFIG_PHY_MARVELL 1
+#define CONFIG_CMD_MII
+#define CONFIG_PHY_GIGE
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#define CONFIG_PHY_MARVELL

  /*
   * BOOTP options


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Re: [U-Boot] [PATCH] nios2: remove the useless parenthesis in asm/io.h

[Thomas Chou]

On 2015年10月29日 21:03, Thomas Chou wrote:

Remove the useless parenthesis in asm/io.h as suggested
by Marek.

Signed-off-by: Thomas Chou 
---
  arch/nios2/include/asm/io.h | 8 
  1 file changed, 4 insertions(+), 4 deletions(-)



Applied to u-boot-nios.

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Re: [U-Boot] [PATCH] nios2: use common sequence for reserve_uboot

[Thomas Chou]

On 2015年10月27日 11:24, Thomas Chou wrote:

Use common sequence for reserve_uboot, as the result is
the same.

Signed-off-by: Thomas Chou 
---
  common/board_f.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)



Applied to u-boot-nios.


diff --git a/common/board_f.c b/common/board_f.c
index d88ada3..64c33b3 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -894,7 +894,7 @@ static init_fnc_t init_sequence_f[] = {
 *  - board info struct
 */
setup_dest_addr,
-#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
+#if defined(CONFIG_BLACKFIN)
/* Blackfin u-boot monitor should be on top of the ram */
reserve_uboot,
  #endif
@@ -919,7 +919,7 @@ static init_fnc_t init_sequence_f[] = {
!defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
reserve_video,
  #endif
-#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
+#if !defined(CONFIG_BLACKFIN)
reserve_uboot,
  #endif
  #ifndef CONFIG_SPL_BUILD


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Re: [U-Boot] [PATCH v2] nios2: use dram bank in board info

[Thomas Chou]

On 2015年10月27日 10:23, Thomas Chou wrote:

Use dram bank in board info, so that it displays correct
memory values in bdinfo command.

Signed-off-by: Thomas Chou 
---
v2
   change to use dram bank.

  common/cmd_bdinfo.c | 9 +++--
  include/configs/nios2-generic.h | 1 +
  2 files changed, 8 insertions(+), 2 deletions(-)



Applied to u-boot-nios.
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Re: [U-Boot] [PATCH] nios2: fix map_physmem to do real cache mapping

[Thomas Chou]

On 2015年10月27日 09:09, Thomas Chou wrote:

Fix the map_physmem() to do real cache mapping.

Signed-off-by: Thomas Chou 
---
  arch/nios2/cpu/cpu.c | 3 ++-
  arch/nios2/include/asm/global_data.h | 1 +
  arch/nios2/include/asm/io.h  | 8 ++--
  3 files changed, 9 insertions(+), 3 deletions(-)



Applied to u-boot-nios.

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Re: [U-Boot] [PATCH] nios2: change virt_to_phys to use physaddr_mask in global data

[Thomas Chou]

On 2015年10月27日 09:09, Thomas Chou wrote:

As virt_to_phys() is used a lot in DMA transfer, change it
to use physaddr_mask in global data. This will save an "if"
statement and get a little faster.

Signed-off-by: Thomas Chou 
---
  arch/nios2/cpu/cpu.c | 1 +
  arch/nios2/include/asm/global_data.h | 1 +
  arch/nios2/include/asm/io.h  | 5 +
  3 files changed, 3 insertions(+), 4 deletions(-)



Applied to u-boot-nios.
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[U-Boot] please pull u-boot-samsung master

[Minkyu Kang]

Dear Tom,

The following changes since commit 0e067a65f57189703668826d9841fea477026bf6:

  x86: Select the ns16550 debug UART for minnowmax, chromebook_link (2015-10-30 
18:04:14 -0400)

are available in the git repository at:

  http://git.denx.de/u-boot-samsung 

for you to fetch changes up to de5f9733f653091d4b227914d04432099a6448dc:

  samsung: clean up checkpatch issues (2015-11-02 10:38:22 +0900)


Minkyu Kang (5):
  arm: exynos: clean up checkpatch issues
  smdkv310: clean up checkpatch issues
  smdk2410: clean up checkpatch issues
  odroid: clean up checkpatch issues
  samsung: clean up checkpatch issues

Przemyslaw Marczak (16):
  samsung: board/misc: check returned pointer for get_board_type() calls
  s5p: cpu_info: print "cpu-model" if exists in dts
  Peach-Pi: dts: add cpu-model string
  Exynos5422/5800: set cpu id to 0x5422
  dm: pmic: add s2mps11 PMIC I/O driver
  dm: regulator: add function device_get_supply_regulator()
  dm: adc: add simple ADC uclass implementation
  dm: adc: add Exynos54xx compatible ADC driver
  Odroid-XU3: enable s2mps11 PMIC support
  Exynos54xx: dts: add ADC node
  Odroid-XU3: dts: enable ADC, with request for pre-reloc bind
  exynos5-dt-types: add board detection for Odroid XU3/XU3L/XU4.
  sandbox: add ADC driver
  sandbox: add ADC unit tests
  Exynos4412: pinmux: disable pull for MMC pins
  s5p sdhci: call pinmux for card's gpio pins before use them

 arch/arm/cpu/armv7/s5p-common/cpu_info.c   |   14 +-
 arch/arm/dts/exynos5422-odroidxu3.dts  |   12 +
 arch/arm/dts/exynos54xx.dtsi   |7 +
 arch/arm/dts/exynos5800-peach-pi.dts   |1 +
 arch/arm/mach-exynos/clock.c   |   16 +-
 arch/arm/mach-exynos/clock_init_exynos5.c  |2 +-
 arch/arm/mach-exynos/common_setup.h|4 +-
 arch/arm/mach-exynos/dmc_init_ddr3.c   |8 +-
 arch/arm/mach-exynos/include/mach/adc.h|   44 +++
 arch/arm/mach-exynos/include/mach/cpu.h|6 +-
 arch/arm/mach-exynos/include/mach/gpio.h   |4 +-
 arch/arm/mach-exynos/pinmux.c  |4 +-
 arch/arm/mach-exynos/power.c   |2 +-
 arch/sandbox/dts/sandbox_pmic.dtsi |2 +-
 arch/sandbox/dts/test.dts  |6 +
 board/samsung/common/Makefile  |5 +-
 board/samsung/common/board.c   |4 +-
 board/samsung/common/exynos5-dt-types.c|  196 +
 board/samsung/common/exynos5-dt.c  |   12 +
 board/samsung/common/misc.c|   10 +-
 board/samsung/odroid/odroid.c  |   15 +-
 board/samsung/smdk2410/smdk2410.c  |   10 +-
 board/samsung/smdkv310/smdkv310.c  |8 +-
 configs/odroid-xu3_defconfig   |5 +
 configs/sandbox_defconfig  |2 +
 doc/device-tree-bindings/adc/adc.txt   |   62 +
 doc/device-tree-bindings/exynos/soc.txt|   21 ++
 doc/device-tree-bindings/pmic/s2mps11.txt  |   17 ++
 drivers/Kconfig|2 +
 drivers/Makefile   |1 +
 drivers/adc/Kconfig|   30 ++
 drivers/adc/Makefile   |   10 +
 drivers/adc/adc-uclass.c   |  409 
 drivers/adc/exynos-adc.c   |  145 ++
 drivers/adc/sandbox.c  |  174 
 drivers/mmc/s5p_sdhci.c|   14 +-
 drivers/power/pmic/Kconfig |   14 +
 drivers/power/pmic/Makefile|1 +
 drivers/power/pmic/s2mps11.c   |   62 +
 drivers/power/regulator/regulator-uclass.c |7 +
 include/adc.h  |  288 
 include/configs/odroid_xu3.h   |   12 +
 include/dm/uclass-id.h |1 +
 include/power/regulator.h  |   16 ++
 include/power/s2mps11.h|  109 
 include/power/sandbox_pmic.h   |4 +
 include/samsung/exynos5-dt-types.h |   27 ++
 test/dm/Makefile   |1 +
 test/dm/adc.c  |  165 +++
 49 files changed, 1935 insertions(+), 56 deletions(-)
 create mode 100644 board/samsung/common/exynos5-dt-types.c
 create mode 100644 doc/device-tree-bindings/adc/adc.txt
 create mode 100644 doc/device-tree-bindings/exynos/soc.txt
 create mode 100644 doc/device-tree-bindings/pmic/s2mps11.txt
 create mode 100644 drivers/adc/Kconfig
 create mode 100644 drivers/adc/Makefile
 create mode 100644 drivers/adc/adc-uclass.c
 create mode 100644 drivers/adc/exynos-adc.c
 create mode 100644 drivers/adc/sandbox.c
 create mode 100644 drivers/power/pmic/s2mps11.c
 create mode 100644 include/adc.h
 create mode 100644 include/power/s2mps11.h
 create mode 100644 include/samsung/exynos5-dt-types.h
 create mode 100644 test

Re: [U-Boot] [PATCH] armv8: ls2085a: Add workaround of errata A009635

[York Sun]

We don't have to put the erratum information into commit message, as far as we 
explain why and what. The errata document is available to public.

York


 Original message 
From: Prabhakar Kushwaha
Date:11/02/2015 8:37 PM (GMT-08:00)
To: u-boot@lists.denx.de
Cc: Sun York-R58495 , Kushwaha Prabhakar-B32579
Subject: [PATCH] armv8: ls2085a: Add workaround of errata A009635

Description:
When an A57 core is waiting for certain condition, it might use WFE to put
itself into lower power mode to save power if the condition is not met.
Another core can send an event to wake up the first core to check if the
condition is met or not.

When the second A57 core executes SEV instruction,it drives EVENTO for 3
core cycles. The SoC Run Control block samples the signal with the
platform clock, ORed with its own EVENTI event and drive it back to A57
cores as EVENTI.
If the core runs at higher than x3 speed of the platform, EVENTO is
shorter than one platform clock and might be missed by the platform sampling
logic. Taking into the consideration of jitter between A57 PLL
and the platform PLL, A57 must run at no greater than 2.5x speed of
the platform  to guarantee the reliable sampling.

Workaround:
Configure Run Control and EPU to periodically send out EVENTI signals to
wake up A57 cores so that cores that are in WFE loop have
chance to check whether the condition for it to exit WFE loop is true
or not. This will make sure that in case SEV instruction is lost,
the core in WFE loop  has a bounded time to exit the WFE loop.

Followings are the register values the software need to write to set
up Run Control and EPU:

0x7_0007_0914 = 0x_0200;
0x7_0006_0914 = ;
0x7_0006_0814 = 0x8282_;
0x7_0006_0228 = 0x002f_;
0x7_0006_0314 = 0x2000_;
0x7_0006_ = 0x8000_;

For  value above,  it is the number of platform cycles between wake
up events generated by EPU.  For example: A typical value is 1 microsecond.
If the platform frequency is 500MHz, each cycle is 2ns.
interval = 1us/2ns=500=0x1F4.

Signed-off-by: Prabhakar Kushwaha 
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   |  6 
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 39 +++
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  9 ++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h|  3 ++
 4 files changed, 57 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 0cb0afa..dbb12c2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -484,7 +484,13 @@ int arch_early_init_r(void)
 {
 #ifdef CONFIG_MP
 int rv = 1;
+#endif
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
+   erratum_a009635();
+#endif

+#ifdef CONFIG_MP
 rv = fsl_layerscape_wake_seconday_cores();
 if (rv)
 printf("Did not wake secondary cores\n");
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 637853d..e8cdb10 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -9,10 +9,49 @@
 #include 
 #include 
 #include 
+#include 

 DECLARE_GLOBAL_DATA_PTR;

 #ifdef CONFIG_LS2085A
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
+#define PLATFORM_CYCLE_ENV_VAR "a009635_interval_val"
+
+static unsigned long get_internval_val_mhz(void)
+{
+   char *interval = getenv(PLATFORM_CYCLE_ENV_VAR);
+   ulong interval_mhz = get_bus_freq(0) / (1000 * 1000);
+
+   if (interval)
+   interval_mhz = simple_strtoul(interval, NULL, 10);
+
+   return interval_mhz;
+}
+
+void erratum_a009635(void)
+{
+   u32 val;
+   unsigned long interval_mhz = get_internval_val_mhz();
+
+   if (!interval_mhz)
+   return;
+
+   val = in_le32(DCSR_CGACRE5);
+   writel(val | 0x0200, DCSR_CGACRE5);
+
+   val = in_le32(EPU_EPCMPR5);
+   writel(interval_mhz, EPU_EPCMPR5);
+   val = in_le32(EPU_EPCCR5);
+   writel(val | 0x8282, EPU_EPCCR5);
+   val = in_le32(EPU_EPSMCR5);
+   writel(val | 0x002f, EPU_EPSMCR5);
+   val = in_le32(EPU_EPECR5);
+   writel(val | 0x2000, EPU_EPECR5);
+   val = in_le32(EPU_EPGCR);
+   writel(val | 0x8000, EPU_EPGCR);
+}
+#endif
+
 static void erratum_a008751(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A008751
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 87bb937..c7169ab 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -84,11 +84,20 @@
 #define TZPCDECPROT_2_SET_BASE  (TZPC_BASE + 0x81C)
 #define TZPCDECPROT_2_CLR_BASE  (TZPC_BASE + 0x820)

+#define DCSR_CGACRE5   0x700070914ULL
+#define EPU_EPCMPR50x700060914ULL
+#define EPU_EPCCR5 0x700060814ULL
+#define EPU_EPSMCR50x700060228ULL
+#define

[U-Boot] [PATCH] armv8: ls2085a: Add workaround of errata A009635

[Prabhakar Kushwaha]

Description:
When an A57 core is waiting for certain condition, it might use WFE to put
itself into lower power mode to save power if the condition is not met.
Another core can send an event to wake up the first core to check if the
condition is met or not.

When the second A57 core executes SEV instruction,it drives EVENTO for 3
core cycles. The SoC Run Control block samples the signal with the
platform clock, ORed with its own EVENTI event and drive it back to A57
cores as EVENTI.
If the core runs at higher than x3 speed of the platform, EVENTO is
shorter than one platform clock and might be missed by the platform sampling
logic. Taking into the consideration of jitter between A57 PLL
and the platform PLL, A57 must run at no greater than 2.5x speed of
the platform  to guarantee the reliable sampling.

Workaround:
Configure Run Control and EPU to periodically send out EVENTI signals to
wake up A57 cores so that cores that are in WFE loop have
chance to check whether the condition for it to exit WFE loop is true
or not. This will make sure that in case SEV instruction is lost,
the core in WFE loop  has a bounded time to exit the WFE loop.

Followings are the register values the software need to write to set
up Run Control and EPU:

0x7_0007_0914 = 0x_0200;
0x7_0006_0914 = ;
0x7_0006_0814 = 0x8282_;
0x7_0006_0228 = 0x002f_;
0x7_0006_0314 = 0x2000_;
0x7_0006_ = 0x8000_;

For  value above,  it is the number of platform cycles between wake
up events generated by EPU.  For example: A typical value is 1 microsecond.
If the platform frequency is 500MHz, each cycle is 2ns.
interval = 1us/2ns=500=0x1F4.

Signed-off-by: Prabhakar Kushwaha 
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   |  6 
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 39 +++
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  9 ++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h|  3 ++
 4 files changed, 57 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 0cb0afa..dbb12c2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -484,7 +484,13 @@ int arch_early_init_r(void)
 {
 #ifdef CONFIG_MP
int rv = 1;
+#endif
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
+   erratum_a009635();
+#endif
 
+#ifdef CONFIG_MP
rv = fsl_layerscape_wake_seconday_cores();
if (rv)
printf("Did not wake secondary cores\n");
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 637853d..e8cdb10 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -9,10 +9,49 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_LS2085A
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
+#define PLATFORM_CYCLE_ENV_VAR "a009635_interval_val"
+
+static unsigned long get_internval_val_mhz(void)
+{
+   char *interval = getenv(PLATFORM_CYCLE_ENV_VAR);
+   ulong interval_mhz = get_bus_freq(0) / (1000 * 1000);
+
+   if (interval)
+   interval_mhz = simple_strtoul(interval, NULL, 10);
+
+   return interval_mhz;
+}
+
+void erratum_a009635(void)
+{
+   u32 val;
+   unsigned long interval_mhz = get_internval_val_mhz();
+
+   if (!interval_mhz)
+   return;
+
+   val = in_le32(DCSR_CGACRE5);
+   writel(val | 0x0200, DCSR_CGACRE5);
+
+   val = in_le32(EPU_EPCMPR5);
+   writel(interval_mhz, EPU_EPCMPR5);
+   val = in_le32(EPU_EPCCR5);
+   writel(val | 0x8282, EPU_EPCCR5);
+   val = in_le32(EPU_EPSMCR5);
+   writel(val | 0x002f, EPU_EPSMCR5);
+   val = in_le32(EPU_EPECR5);
+   writel(val | 0x2000, EPU_EPECR5);
+   val = in_le32(EPU_EPGCR);
+   writel(val | 0x8000, EPU_EPGCR);
+}
+#endif
+
 static void erratum_a008751(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A008751
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 87bb937..c7169ab 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -84,11 +84,20 @@
 #define TZPCDECPROT_2_SET_BASE (TZPC_BASE + 0x81C)
 #define TZPCDECPROT_2_CLR_BASE (TZPC_BASE + 0x820)
 
+#define DCSR_CGACRE5   0x700070914ULL
+#define EPU_EPCMPR50x700060914ULL
+#define EPU_EPCCR5 0x700060814ULL
+#define EPU_EPSMCR50x700060228ULL
+#define EPU_EPECR5 0x700060314ULL
+#define EPU_EPCTR5 0x700060a14ULL
+#define EPU_EPGCR  0x70006ULL
+
 #define CONFIG_SYS_FSL_ERRATUM_A008336
 #define CONFIG_SYS_FSL_ERRATUM_A008511
 #define CONFIG_SYS_FSL_ERRATUM_A008514
 #define CONFIG_SYS_FSL_ERRATUM_A008585
 #define CONFIG_SYS_FSL_ERRATUM_A008751
+#define CONFIG_SYS_FSL_ERRATUM_A009635
 #elif defined(CO

Re: [U-Boot] [PATCH] arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

[Marek Vasut]

On Tuesday, November 03, 2015 at 04:13:37 AM, Dinh Nguyen wrote:
> On Tue, 3 Nov 2015, Marek Vasut wrote:
> > On Tuesday, November 03, 2015 at 12:11:21 AM,
> > dingu...@opensource.altera.com
> > 
> > wrote:
> > > From: Dinh Nguyen 
> > > 
> > > The DMA, QSPI, and SD/MMC reset bits are located in the permodrst
> > > register, not the mpumodrst. So the bank for these reset bits should
> > > be 1, not 0.
> > > 
> > > Signed-off-by: Dinh Nguyen 
> > 
> > Thanks for finding this:
> > Acked-by: Marek Vasut 
> > 
> > btw. how did you find this? I doubt it was some casual reading of the
> > source code :)
> 
> I stumbled on this when I started adding the reset driver for Arria10, and
> did a quick code review.

Neat !

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/2] armv8: LS2080A: Rename LS2085A to reflect LS2080A

[Kushwaha Prabhakar]

> -Original Message-
> From: York Sun [mailto:york...@freescale.com]
> Sent: Tuesday, November 03, 2015 2:57 AM
> To: Kushwaha Prabhakar-B32579 ; u-
> b...@lists.denx.de
> Cc: Srivastava Pratiyush-B46174 
> Subject: Re: [PATCH 1/2] armv8: LS2080A: Rename LS2085A to reflect
> LS2080A
> 
> 
> 
> On 10/15/2015 02:14 AM, Prabhakar Kushwaha wrote:
> > From: Pratiyush Mohan Srivastava 
> >
> > LS2080A is a prime personality of Freescale’s LS2085A. It is a
> > non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe
> endpoint etc.
> >
> > So renaming existing LS2085A code base to reflect LS2080A (Prime
> > personality)
> >
> > Signed-off-by: Pratiyush Mohan Srivastava
> > 
> > ---
> 
> Prabhakar,
> 
> Please rebase your patch to latest u-boot.
> 

Got it, We will rebase for u-boot-fsl-qoriq

--prabhakar
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Re: [U-Boot] [PATCH] arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

[Dinh Nguyen]

On Tue, 3 Nov 2015, Marek Vasut wrote:

> On Tuesday, November 03, 2015 at 12:11:21 AM, dingu...@opensource.altera.com 
> wrote:
> > From: Dinh Nguyen 
> > 
> > The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
> > not the mpumodrst. So the bank for these reset bits should be 1, not 0.
> > 
> > Signed-off-by: Dinh Nguyen 
> 
> Thanks for finding this:
> Acked-by: Marek Vasut 
> 
> btw. how did you find this? I doubt it was some casual reading of the source
> code :)
> 

I stumbled on this when I started adding the reset driver for Arria10, and did
a quick code review. 

BR,
Dinh
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Re: [U-Boot] [PATCH] arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

[Marek Vasut]

On Tuesday, November 03, 2015 at 12:11:21 AM, dingu...@opensource.altera.com 
wrote:
> From: Dinh Nguyen 
> 
> The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
> not the mpumodrst. So the bank for these reset bits should be 1, not 0.
> 
> Signed-off-by: Dinh Nguyen 

Thanks for finding this:
Acked-by: Marek Vasut 

btw. how did you find this? I doubt it was some casual reading of the source
code :)

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 5/6] novena: Remove empty reset_cpu()

[Marek Vasut]

On Tuesday, November 03, 2015 at 01:21:34 AM, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> There is really no need to provide an empty reset_cpu() implementation,
> so just remove it.
> 
> Cc: Marek Vasut 
> Signed-off-by: Fabio Estevam 

Right, probably some obscure remnant from times long past.

Acked-by: Marek Vasut 

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v4 16/16] spi: Add SPI NOR protection mechanism

[Fabio Estevam]

On Fri, Oct 30, 2015 at 4:23 PM, Jagan Teki  wrote:

>> Looks like you are happy with patches 1 to 15 of this series.
>>
>> Could you please apply patches 1 to 15 and then I rework only this last one?
>
> I will pick the entire series once, since 15/16 and 16/16 are same feature 
> set.

Hopefully that will happen some day soon :-)

>
> My questions with 16/16 is
>
> 1. We need to check the idcode as well because if we compile other
> flash vendor with micron, non
> micron flash got initialized with these lock ops' and also assign
> stm_* calls if the idcode is micro.

Done in v5.

>
>> +#if defined(CONFIG_SPI_FLASH_STMICRO)
>> +   flash->lock = spi_flash_cmd_lock_ops;
>> +   flash->unlock = spi_flash_cmd_unlock_ops;
>> +   flash->is_locked = spi_flash_cmd_is_locked_ops;
>> +#endif
>
> 2. Do the 1 for dm as well, probably in probe.

Done in v5.

> 3. What about adding  'sf protect is_locked' since we have code already?

We can add this later if someone thinks it is really needed.
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Re: [U-Boot] [PATCH v3 2/3] cfi_flash: convert to driver model

[Thomas Chou]

Hi Stefan,

On 2015年11月02日 16:20, Stefan Roese wrote:

@@ -2315,6 +2329,7 @@ unsigned long flash_init (void)
   {
unsigned long size = 0;
int i;
+   struct udevice *dev;


I'm seeing this warning while compiling for some powerpc boards
(e.g. canyonlands):

drivers/mtd/cfi_flash.c: In function 'flash_init':
drivers/mtd/cfi_flash.c:2332:18: warning: unused variable 'dev' 
[-Wunused-variable]

Perhaps an "__maybe_unused" needed here.






   #ifdef CONFIG_SYS_FLASH_PROTECTION
/* read environment from EEPROM */
@@ -2322,6 +2337,14 @@ unsigned long flash_init (void)
getenv_f("unlock", s, sizeof(s));
   #endif

+#ifdef CONFIG_CFI_FLASH /* for driver model */
+   cfi_flash_num_flash_banks = 0;
+   /* probe every MTD device */
+   for (uclass_first_device(UCLASS_MTD, &dev);
+dev;
+uclass_next_device(&dev)) {
+   }
+#endif


What is this loop above exactly doing?


I want to get the cfi-flash device probed and flash_info[] got 
initialized. So I look in every mtd uclass device.


I will use CONFIG_IS_ENABLED to remove the warning above.

if (CONFIG_IS_ENABLED(CFI_FLASH)) {
struct udevice *dev;
cfi_flash_num_flash_banks = 0;
/* probe every MTD device to find cfi-flash device */
for (uclass_first_device(UCLASS_MTD, &dev);
 dev;
 uclass_next_device(&dev)) {
}
}

Thanks a lot.

Best regards,
Thomas
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[U-Boot] [PATCH 6/6] ot1200: Remove empty reset_cpu()

[Fabio Estevam]

From: Fabio Estevam 

There is really no need to provide an empty reset_cpu() implementation,
so just remove it.

Cc: Christian Gmeiner 
Signed-off-by: Fabio Estevam 
---
 board/bachmann/ot1200/ot1200_spl.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/board/bachmann/ot1200/ot1200_spl.c 
b/board/bachmann/ot1200/ot1200_spl.c
index 9c77fd3..f651a40 100644
--- a/board/bachmann/ot1200/ot1200_spl.c
+++ b/board/bachmann/ot1200/ot1200_spl.c
@@ -156,7 +156,3 @@ void board_init_f(ulong dummy)
/* load/boot image from boot device */
board_init_r(NULL, 0);
 }
-
-void reset_cpu(ulong addr)
-{
-}
-- 
1.9.1

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[U-Boot] [PATCH 4/6] mx6ul_14x14_evk: Remove empty reset_cpu()

[Fabio Estevam]

From: Fabio Estevam 

There is really no need to provide an empty reset_cpu() implementation,
so just remove it.

Signed-off-by: Fabio Estevam 
---
 board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c 
b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 8650f35..1a9c1e9 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -811,8 +811,4 @@ void board_init_f(ulong dummy)
/* load/boot image from boot device */
board_init_r(NULL, 0);
 }
-
-void reset_cpu(ulong addr)
-{
-}
 #endif
-- 
1.9.1

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[U-Boot] [PATCH 3/6] mx6sxsabresd: Remove empty reset_cpu()

[Fabio Estevam]

From: Fabio Estevam 

There is really no need to provide an empty reset_cpu() implementation,
so just remove it.

Signed-off-by: Fabio Estevam 
---
 board/freescale/mx6sxsabresd/mx6sxsabresd.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c 
b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index b9af7e7..3ee4662 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -598,8 +598,4 @@ void board_init_f(ulong dummy)
/* load/boot image from boot device */
board_init_r(NULL, 0);
 }
-
-void reset_cpu(ulong addr)
-{
-}
 #endif
-- 
1.9.1

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[U-Boot] [PATCH 1/6] mx6sabresd: Remove empty reset_cpu()

[Fabio Estevam]

From: Fabio Estevam 

There is really no need to provide an empty reset_cpu() implementation,
so just remove it.

Signed-off-by: Fabio Estevam 
---
 board/freescale/mx6sabresd/mx6sabresd.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index 5644167..de2561d 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -857,8 +857,4 @@ void board_init_f(ulong dummy)
/* load/boot image from boot device */
board_init_r(NULL, 0);
 }
-
-void reset_cpu(ulong addr)
-{
-}
 #endif
-- 
1.9.1

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[U-Boot] [PATCH 5/6] novena: Remove empty reset_cpu()

[Fabio Estevam]

From: Fabio Estevam 

There is really no need to provide an empty reset_cpu() implementation,
so just remove it.

Cc: Marek Vasut 
Signed-off-by: Fabio Estevam 
---
 board/kosagi/novena/novena_spl.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index b1688e0..eb46265 100644
--- a/board/kosagi/novena/novena_spl.c
+++ b/board/kosagi/novena/novena_spl.c
@@ -607,7 +607,3 @@ void board_init_f(ulong dummy)
/* load/boot image from boot device */
board_init_r(NULL, 0);
 }
-
-void reset_cpu(ulong addr)
-{
-}
-- 
1.9.1

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[U-Boot] [PATCH 2/6] mx6slevk: Remove empty reset_cpu()

[Fabio Estevam]

From: Fabio Estevam 

There is really no need to provide an empty reset_cpu() implementation,
so just remove it.

Signed-off-by: Fabio Estevam 
---
 board/freescale/mx6slevk/mx6slevk.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/board/freescale/mx6slevk/mx6slevk.c 
b/board/freescale/mx6slevk/mx6slevk.c
index 6ba604e..5eab4b5 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -520,8 +520,4 @@ void board_init_f(ulong dummy)
/* load/boot image from boot device */
board_init_r(NULL, 0);
 }
-
-void reset_cpu(ulong addr)
-{
-}
 #endif
-- 
1.9.1

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Re: [U-Boot] [PATCH v5 15/18] powerpc: Remove __ilog2_u64 and ffs4 from bitops

[York Sun]

From: Fabio Estevam 
Sent: Monday, November 2, 2015 3:38 PM
To: jt...@openedev.com
Cc: tr...@konsulko.com; ota...@ossystems.com.br; u-boot@lists.denx.de; Estevam 
Fabio-R49496; Sun York-R58495
Subject: [PATCH v5 15/18] powerpc: Remove __ilog2_u64 and ffs4 from bitops

From: Fabio Estevam 

Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the
kernel implementation.

Use the generic __ffs64 instead of a custom powerpc implementation.

Cc: York Sun 
Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None


Reviewed-by: York Sun 
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[U-Boot] [PATCH v5 18/18] sf_probe: Extend the SPI NOR protection for SST flashes

[Fabio Estevam]

From: Fabio Estevam 

SST flashes have a similar SPI NOR protection scheme as STMICRO, so 
add support for it.

Signed-off-by: Fabio Estevam 
---
Changes since v4:
- None. Newly introduced in this version

 drivers/mtd/spi/sf_internal.h | 1 +
 drivers/mtd/spi/sf_probe.c| 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index db46aa8..214ceaa 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -63,6 +63,7 @@ enum spi_nor_option_flags {
 /* CFI Manufacture ID's */
 #define SPI_FLASH_CFI_MFR_SPANSION 0x01
 #define SPI_FLASH_CFI_MFR_STMICRO  0x20
+#define SPI_FLASH_CFI_MFR_SST  0xbf
 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
 #define SPI_FLASH_CFI_MFR_WINBOND  0xef
 
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 3626433..8a736c4 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -140,7 +140,8 @@ int static is_stm(struct spi_slave *spi, struct spi_flash 
*flash)
if (ret < 0)
return ret;
 
-   if (idcode[0] == SPI_FLASH_CFI_MFR_STMICRO)
+   if (idcode[0] == SPI_FLASH_CFI_MFR_STMICRO ||
+   idcode[0] == SPI_FLASH_CFI_MFR_SST)
return 1;
else
return 0;
-- 
1.9.1

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[U-Boot] [PATCH v5 17/18] spi: Add SPI NOR protection mechanism

[Fabio Estevam]

From: Fabio Estevam 

Many SPI flashes have protection bits (BP2, BP1 and BP0) in the
status register that can protect selected regions of the SPI NOR.

Take these bits into account when performing erase operations,
making sure that the protected areas are skipped.

Tested on a mx6qsabresd:

=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB
=> sf protect lock  0x3f 0x1
=> sf erase 0x3f 0x1
offset 0x3f is protected and cannot be erased
SF: 65536 bytes @ 0x3f Erased: ERROR
=> sf protect unlock  0x3f 0x1
=> sf erase 0x3f 0x1
SF: 65536 bytes @ 0x3f Erased: OK

Signed-off-by: Fabio Estevam 
---
Changes since v4:
- Only apply lock operations if the SPI NOR flash ID matches STMicro (Jagan)

 common/cmd_sf.c   | 35 +
 drivers/mtd/spi/sf-uclass.c   |  8 ++
 drivers/mtd/spi/sf_internal.h |  8 ++
 drivers/mtd/spi/sf_ops.c  | 25 ++
 drivers/mtd/spi/sf_probe.c| 61 +++
 include/spi_flash.h   | 41 +
 6 files changed, 178 insertions(+)

diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index ac7f5df..42862d9 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -348,6 +348,37 @@ static int do_spi_flash_erase(int argc, char * const 
argv[])
return ret == 0 ? 0 : 1;
 }
 
+static int do_spi_protect(int argc, char * const argv[])
+{
+   int ret = 0;
+   loff_t start, len;
+   bool prot = false;
+
+   if (argc != 4)
+   return -1;
+
+   if (!str2off(argv[2], &start)) {
+   puts("start sector is not a valid number\n");
+   return 1;
+   }
+
+   if (!str2off(argv[3], &len)) {
+   puts("len is not a valid number\n");
+   return 1;
+   }
+
+   if (strcmp(argv[1], "lock") == 0)
+   prot = true;
+   else if (strcmp(argv[1], "unlock") == 0)
+   prot = false;
+   else
+   return -1;  /* Unknown parameter */
+
+   ret = spi_flash_protect(flash, start, len, prot);
+
+   return ret == 0 ? 0 : 1;
+}
+
 #ifdef CONFIG_CMD_SF_TEST
 enum {
STAGE_ERASE,
@@ -540,6 +571,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int 
argc,
ret = do_spi_flash_read_write(argc, argv);
else if (strcmp(cmd, "erase") == 0)
ret = do_spi_flash_erase(argc, argv);
+   else if (strcmp(cmd, "protect") == 0)
+   ret = do_spi_protect(argc, argv);
 #ifdef CONFIG_CMD_SF_TEST
else if (!strcmp(cmd, "test"))
ret = do_spi_flash_test(argc, argv);
@@ -579,5 +612,7 @@ U_BOOT_CMD(
"sf update addr offset|partition len- erase and write `len' bytes 
from memory\n"
" at `addr' to flash at 
`offset'\n"
" or to start of mtd 
`partition'\n"
+   "sf protect lock/unlock sector len  - protect/unprotect 'len' bytes 
starting\n"
+   " at address 'sector'\n"
SF_TEST_HELP
 );
diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c
index 350e21a..7663885 100644
--- a/drivers/mtd/spi/sf-uclass.c
+++ b/drivers/mtd/spi/sf-uclass.c
@@ -27,6 +27,14 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset, 
size_t len)
return sf_get_ops(dev)->erase(dev, offset, len);
 }
 
+int spi_flash_protect_dm(struct udevice *dev, u32 offset, size_t len, bool 
prot)
+{
+   if (prot)
+   return sf_get_ops(dev)->lock(dev, offset, len);
+   else
+   return sf_get_ops(dev)->unlock(dev, offset, len);
+}
+
 /*
  * TODO(s...@chromium.org): This is an old-style function. We should remove
  * it when all SPI flash drivers use dm
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index adfcd89..db46aa8 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -177,6 +177,10 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, u8 
*rs);
 /* Program the status register */
 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
 
+int stm_is_locked(struct spi_flash *nor, loff_t ofs, u32 len);
+int stm_lock(struct spi_flash *nor, u32 ofs, u32 len);
+int stm_unlock(struct spi_flash *nor, u32 ofs, u32 len);
+
 /* Read the config register */
 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
 
@@ -231,6 +235,10 @@ int spi_flash_read_common(struct spi_flash *flash, const 
u8 *cmd,
 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
size_t len, void *data);
 
+int spi_flash_cmd_lock_ops(struct spi_flash *flash, u32 offset, size_t len);
+int spi_flash_cmd_unlock_ops(struct spi_flash *flash, u32 offset, size_t len);
+int spi_flash_cmd_is_locked_ops(struct spi_flash *flash, u32 offset, size_t 
len);
+
 #ifdef CONFIG_SPI_FLASH_MTD
 int spi_flash_

[U-Boot] [PATCH v5 16/18] spi: sf_ops: Add SPI protection mechanism from the kernel

[Fabio Estevam]

From: Fabio Estevam 

Add the SPI NOR protection mechanism from the kernel.

This code is based on the work from Brian Norris 

https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/drivers/mtd/spi-nor/spi-nor.c?id=62593cf40b23b523b9fc9334ca61ba6c595ebb09

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- Place SR_BP bits into "sf_internal.h" (Jagan)

 drivers/mtd/spi/sf_internal.h |   4 +
 drivers/mtd/spi/sf_ops.c  | 170 ++
 2 files changed, 174 insertions(+)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 8a3e5ec..adfcd89 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -106,6 +106,10 @@ enum spi_nor_option_flags {
 #define STATUS_QEB_MXIC(1 << 6)
 #define STATUS_PEC (1 << 7)
 
+#define SR_BP0 BIT(2)  /* Block protect 0 */
+#define SR_BP1 BIT(3)  /* Block protect 1 */
+#define SR_BP2 BIT(4)  /* Block protect 2 */
+
 /* Flash timeout values */
 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
 #define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index f2a9244..4ada13f 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "sf_internal.h"
 
@@ -565,3 +566,172 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, 
size_t len,
return ret;
 }
 #endif
+
+#ifdef CONFIG_SPI_FLASH_STMICRO
+static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
+u32 *len)
+{
+   u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
+   int shift = ffs(mask) - 1;
+   int pow;
+
+   if (!(sr & mask)) {
+   /* No protection */
+   *ofs = 0;
+   *len = 0;
+   } else {
+   pow = ((sr & mask) ^ mask) >> shift;
+   *len = flash->size >> pow;
+   *ofs = flash->size - *len;
+   }
+}
+
+/*
+ * Return 1 if the entire region is locked, 0 otherwise
+ */
+static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u32 len,
+   u8 sr)
+{
+   loff_t lock_offs;
+   u32 lock_len;
+
+   stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
+
+   return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
+}
+
+/*
+ * Check if a region of the flash is (completely) locked. See stm_lock() for
+ * more info.
+ *
+ * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
+ * negative on errors.
+ */
+int stm_is_locked(struct spi_flash *flash, loff_t ofs, u32 len)
+{
+   int status;
+   u8 sr;
+
+   status = spi_flash_cmd_read_status(flash, &sr);
+   if (status < 0)
+   return status;
+
+   return stm_is_locked_sr(flash, ofs, len, sr);
+}
+
+/*
+ * Lock a region of the flash. Compatible with ST Micro and similar flash.
+ * Supports only the block protection bits BP{0,1,2} in the status register
+ * (SR). Does not support these features found in newer SR bitfields:
+ *   - TB: top/bottom protect - only handle TB=0 (top protect)
+ *   - SEC: sector/block protect - only handle SEC=0 (block protect)
+ *   - CMP: complement protect - only support CMP=0 (range is not complemented)
+ *
+ * Sample table portion for 8MB flash (Winbond w25q64fw):
+ *
+ *   SEC  |  TB   |  BP2  |  BP1  |  BP0  |  Prot Length  | Protected Portion
+ *  --
+ *X   |   X   |   0   |   0   |   0   |  NONE | NONE
+ *0   |   0   |   0   |   0   |   1   |  128 KB   | Upper 1/64
+ *0   |   0   |   0   |   1   |   0   |  256 KB   | Upper 1/32
+ *0   |   0   |   0   |   1   |   1   |  512 KB   | Upper 1/16
+ *0   |   0   |   1   |   0   |   0   |  1 MB | Upper 1/8
+ *0   |   0   |   1   |   0   |   1   |  2 MB | Upper 1/4
+ *0   |   0   |   1   |   1   |   0   |  4 MB | Upper 1/2
+ *X   |   X   |   1   |   1   |   1   |  8 MB | ALL
+ *
+ * Returns negative on errors, 0 on success.
+ */
+int stm_lock(struct spi_flash *flash, u32 ofs, u32 len)
+{
+   u8 status_old, status_new;
+   u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
+   u8 shift = ffs(mask) - 1, pow, val;
+
+   spi_flash_cmd_read_status(flash, &status_old);
+
+   /* SPI NOR always locks to the end */
+   if (ofs + len != flash->size) {
+   /* Does combined region extend to end? */
+   if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
+ status_old))
+   return -EINVAL;
+   len = flash->size - ofs;
+   }
+
+   /*
+* Need smallest pow such that:
+*

[U-Boot] [PATCH v5 15/18] powerpc: Remove __ilog2_u64 and ffs4 from bitops

[Fabio Estevam]

From: Fabio Estevam 

Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the
kernel implementation.

Use the generic __ffs64 instead of a custom powerpc implementation.

Cc: York Sun 
Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/powerpc/cpu/mpc83xx/law.c  |  5 +++--
 arch/powerpc/cpu/mpc85xx/tlb.c  |  2 ++
 arch/powerpc/cpu/mpc8xxx/law.c  |  5 +++--
 arch/powerpc/include/asm/bitops.h   | 11 +--
 arch/powerpc/include/asm/fsl_law.h  |  1 +
 arch/powerpc/include/asm/fsl_srio.h |  2 ++
 6 files changed, 12 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/law.c b/arch/powerpc/cpu/mpc83xx/law.c
index 66c88b6..262ae7f 100644
--- a/arch/powerpc/cpu/mpc83xx/law.c
+++ b/arch/powerpc/cpu/mpc83xx/law.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 {
@@ -20,7 +21,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
if (start == 0)
start_align = 1ull << (LAW_SIZE_2G + 1);
else
-   start_align = 1ull << (ffs64(start) - 1);
+   start_align = 1ull << (__ffs64(start) - 1);
law_sz = min(start_align, sz);
law_sz_enc = __ilog2_u64(law_sz) - 1;
 
@@ -40,7 +41,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
if (sz) {
start += law_sz;
 
-   start_align = 1ull << (ffs64(start) - 1);
+   start_align = 1ull << (__ffs64(start) - 1);
law_sz = min(start_align, sz);
law_sz_enc = __ilog2_u64(law_sz) - 1;
ecm = &immap->sysconf.ddrlaw[1];
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 8e0508f..cf31eb2 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -14,6 +14,8 @@
 #include 
 #endif
 
+#include 
+
 DECLARE_GLOBAL_DATA_PTR;
 
 void invalidate_tlb(u8 tlb)
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index 33d53a8..24baad4 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -187,7 +188,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
if (start == 0)
start_align = 1ull << (LAW_SIZE_32G + 1);
else
-   start_align = 1ull << (ffs64(start) - 1);
+   start_align = 1ull << (__ffs64(start) - 1);
law_sz = min(start_align, sz);
law_sz_enc = __ilog2_u64(law_sz) - 1;
 
@@ -202,7 +203,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
if (sz) {
start += law_sz;
 
-   start_align = 1ull << (ffs64(start) - 1);
+   start_align = 1ull << (__ffs64(start) - 1);
law_sz = min(start_align, sz);
law_sz_enc = __ilog2_u64(law_sz) - 1;
 
diff --git a/arch/powerpc/include/asm/bitops.h 
b/arch/powerpc/include/asm/bitops.h
index a6bcf3c..14217ef 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -6,6 +6,7 @@
 #define _PPC_BITOPS_H
 
 #include 
+#include 
 
 extern void set_bit(int nr, volatile void *addr);
 extern void clear_bit(int nr, volatile void *addr);
@@ -209,16 +210,6 @@ static inline int fls64(__u64 x)
 #error BITS_PER_LONG not 32 or 64
 #endif
 
-static inline int __ilog2_u64(u64 n)
-{
-   return fls64(n) - 1;
-}
-
-static inline int ffs64(u64 x)
-{
-   return __ilog2_u64(x & -x) + 1ull;
-}
-
 #ifdef __KERNEL__
 
 /*
diff --git a/arch/powerpc/include/asm/fsl_law.h 
b/arch/powerpc/include/asm/fsl_law.h
index 3b50487..8e1d22a 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -10,6 +10,7 @@
 #define _FSL_LAW_H_
 
 #include 
+#include 
 
 #define LAW_EN 0x8000
 
diff --git a/arch/powerpc/include/asm/fsl_srio.h 
b/arch/powerpc/include/asm/fsl_srio.h
index e5aab2a..ec25e16 100644
--- a/arch/powerpc/include/asm/fsl_srio.h
+++ b/arch/powerpc/include/asm/fsl_srio.h
@@ -7,6 +7,8 @@
 #ifndef _FSL_SRIO_H_
 #define _FSL_SRIO_H_
 
+#include 
+
 enum atmu_size {
ATMU_SIZE_4K = 0xb,
ATMU_SIZE_8K,
-- 
1.9.1

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[U-Boot] [PATCH v5 12/18] nds32: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/nds32/include/asm/bitops.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/nds32/include/asm/bitops.h b/arch/nds32/include/asm/bitops.h
index f1aa9a3..7ee37c3 100644
--- a/arch/nds32/include/asm/bitops.h
+++ b/arch/nds32/include/asm/bitops.h
@@ -21,6 +21,10 @@
 #ifdef __KERNEL__
 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 #define smp_mb__before_clear_bit() do { } while (0)
 #define smp_mb__after_clear_bit()  do { } while (0)
-- 
1.9.1

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[U-Boot] [PATCH v5 11/18] openrisc: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/openrisc/include/asm/bitops.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/openrisc/include/asm/bitops.h 
b/arch/openrisc/include/asm/bitops.h
index 6d0b57c..28c4658 100644
--- a/arch/openrisc/include/asm/bitops.h
+++ b/arch/openrisc/include/asm/bitops.h
@@ -12,6 +12,10 @@
 #define PLATFORM_FFS
 #include 
 
+#include 
+#include 
+#include 
+
 #define hweight32(x) generic_hweight32(x)
 #define hweight16(x) generic_hweight16(x)
 #define hweight8(x) generic_hweight8(x)
-- 
1.9.1

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[U-Boot] [PATCH v5 10/18] sparc: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/sparc/include/asm/bitops.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/sparc/include/asm/bitops.h b/arch/sparc/include/asm/bitops.h
index fa39fa3..c66f730 100644
--- a/arch/sparc/include/asm/bitops.h
+++ b/arch/sparc/include/asm/bitops.h
@@ -9,4 +9,9 @@
 #ifndef _SPARC_BITOPS_H
 #define _SPARC_BITOPS_H
 
+#include 
+#include 
+#include 
+#include 
+
 #endif /* _SPARC_BITOPS_H */
-- 
1.9.1

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[U-Boot] [PATCH v5 09/18] sandbox: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/sandbox/include/asm/bitops.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/sandbox/include/asm/bitops.h 
b/arch/sandbox/include/asm/bitops.h
index f1a7aee..f27d5e9 100644
--- a/arch/sandbox/include/asm/bitops.h
+++ b/arch/sandbox/include/asm/bitops.h
@@ -21,6 +21,10 @@
 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 #ifdef __KERNEL__
 
-- 
1.9.1

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[U-Boot] [PATCH v5 13/18] nios2: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Acked-by: Thomas Chou 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/nios2/include/asm/bitops.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/nios2/include/asm/bitops.h b/arch/nios2/include/asm/bitops.h
index 3e17964..ee46f37 100644
--- a/arch/nios2/include/asm/bitops.h
+++ b/arch/nios2/include/asm/bitops.h
@@ -13,4 +13,9 @@
 #include 
 #include 
 
+#include 
+#include 
+#include 
+#include 
+
 #endif /* __ASM_NIOS2_BITOPS_H */
-- 
1.9.1

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[U-Boot] [PATCH v5 14/18] compat: Remove is_power_of_2() definition

[Fabio Estevam]

From: Fabio Estevam 

Use the is_power_of_2() definition from log2.h to align with the
kernel implementation.

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/arm/mach-mvebu/mbus.c | 2 +-
 drivers/mtd/mtdcore.c  | 2 +-
 drivers/mtd/ubi/build.c| 2 +-
 fs/ubifs/super.c   | 2 +-
 include/linux/compat.h | 6 --
 5 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c
index 771cce6..346278e 100644
--- a/arch/arm/mach-mvebu/mbus.c
+++ b/arch/arm/mach-mvebu/mbus.c
@@ -52,7 +52,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 /* DDR target is the same on all platforms */
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 2f2172b..81be0f7 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -27,8 +27,8 @@
 #include 
 #include 
 #else
-#include 
 #include 
+#include 
 #include 
 #endif
 
diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index f0a3b67..f484e62 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -30,7 +30,7 @@
 #include 
 #include 
 #else
-#include 
+#include 
 #endif
 #include 
 #include 
diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c
index c474313..abe861a 100644
--- a/fs/ubifs/super.c
+++ b/fs/ubifs/super.c
@@ -31,7 +31,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include "ubifs.h"
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 59937de..e561ee3 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -130,12 +130,6 @@ static inline void led_trigger_unregister_simple(struct 
led_trigger *trigger) {}
 static inline void led_trigger_event(struct led_trigger *trigger,
enum led_brightness event) {}
 
-/* include/linux/log2.h */
-static inline int is_power_of_2(unsigned long n)
-{
-   return (n != 0 && ((n & (n - 1)) == 0));
-}
-
 /* uapi/linux/limits.h */
 #define XATTR_LIST_MAX 65536   /* size of extended attribute namelist (64k) */
 
-- 
1.9.1

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[U-Boot] [PATCH v5 06/18] blackfin: bitops: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/blackfin/include/asm/bitops.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/blackfin/include/asm/bitops.h 
b/arch/blackfin/include/asm/bitops.h
index cd7e356..6cde6db 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -15,6 +15,10 @@
 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 #ifdef __KERNEL__
 /*
-- 
1.9.1

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[U-Boot] [PATCH v5 08/18] microblaze: bitops: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
---
Changes since v4:
- Split the sh and microblaze changes in two patches (Jagan)

 arch/microblaze/include/asm/bitops.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/microblaze/include/asm/bitops.h 
b/arch/microblaze/include/asm/bitops.h
index 0ac78d7..d24f2cf 100644
--- a/arch/microblaze/include/asm/bitops.h
+++ b/arch/microblaze/include/asm/bitops.h
@@ -7,6 +7,10 @@
 
 #include  /* swab32 */
 #include /* save_flags */
+#include 
+#include 
+#include 
+#include 
 
 #ifdef __KERNEL__
 /*
-- 
1.9.1

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[U-Boot] [PATCH v5 05/18] m68k: bitops: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/m68k/include/asm/bitops.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/m68k/include/asm/bitops.h b/arch/m68k/include/asm/bitops.h
index f9c434b..69ea26a 100644
--- a/arch/m68k/include/asm/bitops.h
+++ b/arch/m68k/include/asm/bitops.h
@@ -6,6 +6,10 @@
 #define _M68K_BITOPS_H
 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 extern void set_bit(int nr, volatile void *addr);
 extern void clear_bit(int nr, volatile void *addr);
-- 
1.9.1

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[U-Boot] [PATCH v5 03/18] ARM: bitops: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/arm/include/asm/bitops.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index 9b78043..d479a38 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -190,4 +190,9 @@ found_middle:
 
 #endif /* __KERNEL__ */
 
+#include 
+#include 
+#include 
+#include 
+
 #endif /* _ARM_BITOPS_H */
-- 
1.9.1

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[U-Boot] [PATCH v5 04/18] x86: bitops: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

Use the generic bitops and also add custom __ffs() implementation
as per the kernel.

Also align the ffs() implementation with the kernel.

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 arch/x86/include/asm/bitops.h | 21 -
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 5a7e4cb..f97dc66 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -14,6 +14,10 @@
  * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
  */
 
+#include 
+#include 
+#include 
+
 #ifdef CONFIG_SMP
 #define LOCK_PREFIX "lock ; "
 #else
@@ -332,6 +336,20 @@ static __inline__ unsigned long ffz(unsigned long word)
 #ifdef __KERNEL__
 
 /**
+ * __ffs - find first set bit in word
+ * @word: The word to search
+ *
+ * Undefined if no bit exists, so code should check against 0 first.
+ */
+static inline unsigned long __ffs(unsigned long word)
+{
+   __asm__("rep; bsf %1,%0"
+   : "=r" (word)
+   : "rm" (word));
+   return word;
+}
+
+/**
  * ffs - find first bit set
  * @x: the word to search
  *
@@ -346,7 +364,8 @@ static __inline__ int ffs(int x)
__asm__("bsfl %1,%0\n\t"
"jnz 1f\n\t"
"movl $-1,%0\n"
-   "1:" : "=r" (r) : "g" (x));
+   "1:" : "=r" (r) : "rm" (x));
+
return r+1;
 }
 #define PLATFORM_FFS
-- 
1.9.1

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[U-Boot] [PATCH v5 07/18] sh: bitops: Use the generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

The generic bitops headers are required when calling logarithimic
functions, such as ilog2().

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
---
Changes since v4:
- None

 arch/sh/include/asm/bitops.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h
index c57d628..8cb8385 100644
--- a/arch/sh/include/asm/bitops.h
+++ b/arch/sh/include/asm/bitops.h
@@ -1,6 +1,11 @@
 #ifndef __ASM_SH_BITOPS_H
 #define __ASM_SH_BITOPS_H
 
+#include 
+#include 
+#include 
+#include 
+
 #ifdef __KERNEL__
 #include 
 /* For __swab32 */
-- 
1.9.1

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[U-Boot] [PATCH v5 02/18] include: Add generic bitops headers

[Fabio Estevam]

From: Fabio Estevam 

Use the generic bitops header files from the kernel.

Imported from kernel 4.2.3.

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 include/asm-generic/bitops/__ffs.h | 43 ++
 include/asm-generic/bitops/__fls.h | 43 ++
 include/asm-generic/bitops/fls.h   | 41 
 include/asm-generic/bitops/fls64.h | 36 +++
 include/linux/bitops.h | 27 
 5 files changed, 190 insertions(+)
 create mode 100644 include/asm-generic/bitops/__ffs.h
 create mode 100644 include/asm-generic/bitops/__fls.h
 create mode 100644 include/asm-generic/bitops/fls.h
 create mode 100644 include/asm-generic/bitops/fls64.h

diff --git a/include/asm-generic/bitops/__ffs.h 
b/include/asm-generic/bitops/__ffs.h
new file mode 100644
index 000..937d7c4
--- /dev/null
+++ b/include/asm-generic/bitops/__ffs.h
@@ -0,0 +1,43 @@
+#ifndef _ASM_GENERIC_BITOPS___FFS_H_
+#define _ASM_GENERIC_BITOPS___FFS_H_
+
+#include 
+
+/**
+ * __ffs - find first bit in word.
+ * @word: The word to search
+ *
+ * Undefined if no bit exists, so code should check against 0 first.
+ */
+static __always_inline unsigned long __ffs(unsigned long word)
+{
+   int num = 0;
+
+#if BITS_PER_LONG == 64
+   if ((word & 0x) == 0) {
+   num += 32;
+   word >>= 32;
+   }
+#endif
+   if ((word & 0x) == 0) {
+   num += 16;
+   word >>= 16;
+   }
+   if ((word & 0xff) == 0) {
+   num += 8;
+   word >>= 8;
+   }
+   if ((word & 0xf) == 0) {
+   num += 4;
+   word >>= 4;
+   }
+   if ((word & 0x3) == 0) {
+   num += 2;
+   word >>= 2;
+   }
+   if ((word & 0x1) == 0)
+   num += 1;
+   return num;
+}
+
+#endif /* _ASM_GENERIC_BITOPS___FFS_H_ */
diff --git a/include/asm-generic/bitops/__fls.h 
b/include/asm-generic/bitops/__fls.h
new file mode 100644
index 000..a60a7cc
--- /dev/null
+++ b/include/asm-generic/bitops/__fls.h
@@ -0,0 +1,43 @@
+#ifndef _ASM_GENERIC_BITOPS___FLS_H_
+#define _ASM_GENERIC_BITOPS___FLS_H_
+
+#include 
+
+/**
+ * __fls - find last (most-significant) set bit in a long word
+ * @word: the word to search
+ *
+ * Undefined if no set bit exists, so code should check against 0 first.
+ */
+static __always_inline unsigned long __fls(unsigned long word)
+{
+   int num = BITS_PER_LONG - 1;
+
+#if BITS_PER_LONG == 64
+   if (!(word & (~0ul << 32))) {
+   num -= 32;
+   word <<= 32;
+   }
+#endif
+   if (!(word & (~0ul << (BITS_PER_LONG-16 {
+   num -= 16;
+   word <<= 16;
+   }
+   if (!(word & (~0ul << (BITS_PER_LONG-8 {
+   num -= 8;
+   word <<= 8;
+   }
+   if (!(word & (~0ul << (BITS_PER_LONG-4 {
+   num -= 4;
+   word <<= 4;
+   }
+   if (!(word & (~0ul << (BITS_PER_LONG-2 {
+   num -= 2;
+   word <<= 2;
+   }
+   if (!(word & (~0ul << (BITS_PER_LONG-1
+   num -= 1;
+   return num;
+}
+
+#endif /* _ASM_GENERIC_BITOPS___FLS_H_ */
diff --git a/include/asm-generic/bitops/fls.h b/include/asm-generic/bitops/fls.h
new file mode 100644
index 000..0576d1f
--- /dev/null
+++ b/include/asm-generic/bitops/fls.h
@@ -0,0 +1,41 @@
+#ifndef _ASM_GENERIC_BITOPS_FLS_H_
+#define _ASM_GENERIC_BITOPS_FLS_H_
+
+/**
+ * fls - find last (most-significant) bit set
+ * @x: the word to search
+ *
+ * This is defined the same way as ffs.
+ * Note fls(0) = 0, fls(1) = 1, fls(0x8000) = 32.
+ */
+
+static __always_inline int fls(int x)
+{
+   int r = 32;
+
+   if (!x)
+   return 0;
+   if (!(x & 0xu)) {
+   x <<= 16;
+   r -= 16;
+   }
+   if (!(x & 0xff00u)) {
+   x <<= 8;
+   r -= 8;
+   }
+   if (!(x & 0xf000u)) {
+   x <<= 4;
+   r -= 4;
+   }
+   if (!(x & 0xc000u)) {
+   x <<= 2;
+   r -= 2;
+   }
+   if (!(x & 0x8000u)) {
+   x <<= 1;
+   r -= 1;
+   }
+   return r;
+}
+
+#endif /* _ASM_GENERIC_BITOPS_FLS_H_ */
diff --git a/include/asm-generic/bitops/fls64.h 
b/include/asm-generic/bitops/fls64.h
new file mode 100644
index 000..b097cf8
--- /dev/null
+++ b/include/asm-generic/bitops/fls64.h
@@ -0,0 +1,36 @@
+#ifndef _ASM_GENERIC_BITOPS_FLS64_H_
+#define _ASM_GENERIC_BITOPS_FLS64_H_
+
+#include 
+
+/**
+ * fls64 - find last set bit in a 64-bit word
+ * @x: the word to search
+ *
+ * This is defined in a similar way as the libc and compiler builtin
+ * ffsll, but returns the position of the most significant se

[U-Boot] [PATCH v5 01/18] include: Add log2 header from the kernel

[Fabio Estevam]

From: Fabio Estevam 

Use the log2 header files from the kernel.

Imported from kernel 4.2.3.

Signed-off-by: Fabio Estevam 
Reviewed-by: Tom Rini 
Reviewed-by: Heiko Schocher 
Reviewed-by: Jagan Teki 
---
Changes since v4:
- None

 include/linux/log2.h | 205 +++
 1 file changed, 205 insertions(+)
 create mode 100644 include/linux/log2.h

diff --git a/include/linux/log2.h b/include/linux/log2.h
new file mode 100644
index 000..aa1de63
--- /dev/null
+++ b/include/linux/log2.h
@@ -0,0 +1,205 @@
+/* Integer base 2 logarithm calculation
+ *
+ * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowe...@redhat.com)
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _LINUX_LOG2_H
+#define _LINUX_LOG2_H
+
+#include 
+#include 
+
+/*
+ * deal with unrepresentable constant logarithms
+ */
+extern __attribute__((const, noreturn))
+int ilog2_NaN(void);
+
+/*
+ * non-constant log of base 2 calculators
+ * - the arch may override these in asm/bitops.h if they can be implemented
+ *   more efficiently than using fls() and fls64()
+ * - the arch is not required to handle n==0 if implementing the fallback
+ */
+#ifndef CONFIG_ARCH_HAS_ILOG2_U32
+static inline __attribute__((const))
+int __ilog2_u32(u32 n)
+{
+   return fls(n) - 1;
+}
+#endif
+
+#ifndef CONFIG_ARCH_HAS_ILOG2_U64
+static inline __attribute__((const))
+int __ilog2_u64(u64 n)
+{
+   return fls64(n) - 1;
+}
+#endif
+
+/*
+ *  Determine whether some value is a power of two, where zero is
+ * *not* considered a power of two.
+ */
+
+static inline __attribute__((const))
+bool is_power_of_2(unsigned long n)
+{
+   return (n != 0 && ((n & (n - 1)) == 0));
+}
+
+/*
+ * round up to nearest power of two
+ */
+static inline __attribute__((const))
+unsigned long __roundup_pow_of_two(unsigned long n)
+{
+   return 1UL << fls_long(n - 1);
+}
+
+/*
+ * round down to nearest power of two
+ */
+static inline __attribute__((const))
+unsigned long __rounddown_pow_of_two(unsigned long n)
+{
+   return 1UL << (fls_long(n) - 1);
+}
+
+/**
+ * ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value
+ * @n - parameter
+ *
+ * constant-capable log of base 2 calculation
+ * - this can be used to initialise global variables from constant data, hence
+ *   the massive ternary operator construction
+ *
+ * selects the appropriately-sized optimised version depending on sizeof(n)
+ */
+#define ilog2(n)   \
+(  \
+   __builtin_constant_p(n) ? ( \
+   (n) < 1 ? ilog2_NaN() : \
+   (n) & (1ULL << 63) ? 63 :   \
+   (n) & (1ULL << 62) ? 62 :   \
+   (n) & (1ULL << 61) ? 61 :   \
+   (n) & (1ULL << 60) ? 60 :   \
+   (n) & (1ULL << 59) ? 59 :   \
+   (n) & (1ULL << 58) ? 58 :   \
+   (n) & (1ULL << 57) ? 57 :   \
+   (n) & (1ULL << 56) ? 56 :   \
+   (n) & (1ULL << 55) ? 55 :   \
+   (n) & (1ULL << 54) ? 54 :   \
+   (n) & (1ULL << 53) ? 53 :   \
+   (n) & (1ULL << 52) ? 52 :   \
+   (n) & (1ULL << 51) ? 51 :   \
+   (n) & (1ULL << 50) ? 50 :   \
+   (n) & (1ULL << 49) ? 49 :   \
+   (n) & (1ULL << 48) ? 48 :   \
+   (n) & (1ULL << 47) ? 47 :   \
+   (n) & (1ULL << 46) ? 46 :   \
+   (n) & (1ULL << 45) ? 45 :   \
+   (n) & (1ULL << 44) ? 44 :   \
+   (n) & (1ULL << 43) ? 43 :   \
+   (n) & (1ULL << 42) ? 42 :   \
+   (n) & (1ULL << 41) ? 41 :   \
+   (n) & (1ULL << 40) ? 40 :   \
+   (n) & (1ULL << 39) ? 39 :   \
+   (n) & (1ULL << 38) ? 38 :   \
+   (n) & (1ULL << 37) ? 37 :   \
+   (n) & (1ULL << 36) ? 36 :   \
+   (n) & (1ULL << 35) ? 35 :   \
+   (n) & (1ULL << 34) ? 34 :   \
+   (n) & (1ULL << 33) ? 33 :   \
+   (n) & (1ULL << 32) ? 32 :   \
+   (n) & (1ULL << 31) ? 31 :   \
+   (n) & (1ULL << 30) ? 30 :   \
+   (n) & (1ULL << 29) ? 29 :   \
+   (n) & (1ULL << 28) ? 28 :   \
+   (n) & (1ULL << 27) ? 27 :   \
+   (n) & (1ULL << 26) ? 26 :   \
+   (n) & (1ULL << 25) ? 25 :   \
+   (n) & (1ULL << 24) ? 24 :   \
+   (n) & (1ULL << 23) ? 23 :   \
+   (n) & (1ULL << 22) ? 22 :   \
+   (n) & (1ULL << 21) ? 21 :   \
+   (n) & (1ULL << 20) ? 20 :   \
+   (n) & (1ULL << 19) ? 19 :   \
+   (n) & (1ULL << 18) ? 18 :   \
+   (n) & (1ULL << 17

Re: [U-Boot] [PATCH 3/3] MIPS: bootm: use CONFIG_IS_ENABLED() everywhere

[Tom Rini]

On Sun, Nov 01, 2015 at 05:36:15PM +0100, Daniel Schwierzeck wrote:

> Signed-off-by: Daniel Schwierzeck 
> 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] [PATCH 1/3] common/board_f: enable setup_board_part1() for MIPS

[Tom Rini]

On Sun, Nov 01, 2015 at 05:36:13PM +0100, Daniel Schwierzeck wrote:

> The variables bd_t:bi_memstart and bd_t:bi_memsize have to be
> initialized also on MIPS. Otherwise LMB and cmd_bdinfo do not
> correctly work. This currently breaks the booting of FIT images
> on MIPS. Enable the board_init_f hook setup_board_part1()
> for MIPS to fix this.
> 
> Signed-off-by: Daniel Schwierzeck 
> 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] [PATCH 2/3] MIPS: bootm: rework and fix broken bootm code

[Tom Rini]

On Sun, Nov 01, 2015 at 05:36:14PM +0100, Daniel Schwierzeck wrote:

> The move to 'generic board' as well as changes in the generic
> bootm code broke the boot of FIT uImage's. Especially uImage's
> with additional initramfs images or FDT's do not work anymore.
> 
> Refactor the bootm code to work again with the generic bootm code.
> 
> Always relocate ramdisk and FDT in step 'bootm prep' because the
> generic bootm code does this only for legacy uImage's.
> 
> Move the step 'bootm cmdline' to 'bootm prep' because the Linux
> kernel parameters rd_start and rd_size have to be initialized after
> the relocation of the ramdisk.
> 
> Furthermore support the step 'bootm fake'.
> 
> Signed-off-by: Daniel Schwierzeck 
> 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [BUG] am335x_evm_defconfig doesn't boot with 2015.10

[Tom Rini]

On Mon, Nov 02, 2015 at 06:57:14PM +0300, Matwey V. Kornilov wrote:

> 
> Hi,
> 
> I am facing the following when trying to boot on beaglebone black:
> 
> U-Boot SPL 2015.10 (Nov 01 2015 - 17:51:08)
> bad magic
> bad magic
> spl_register_fat_device: fat register err - -1
> spl_register_fat_device: fat register err - -1
> spl_load_image_fat: error reading image u-boot.img, err - -1
> spl: ext4fs_open failed
> spl: ext4fs_open failed
> spl_load_image_ext: error reading image uImage, err - -1
> 
> 
> U-Boot 2015.10 (Nov 01 2015 - 17:51:08 +)
> 
>Watchdog enabled
> I2C:   ready
> DRAM:  512 MiB
> NAND:  0 MiB
> MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
> *** Error - No Valid Environment Area found
> *** Warning - bad CRC, using default environment
> 
> Net:not set. Validating first E-fuse MAC
> cpsw, usb_ether
> Hit any key to stop autoboot:  0
> switch to partitions #0, OK
> mmc0 is current device
> SD/MMC found on device 0
> 2777 bytes read in 10 ms (270.5 KiB/s)
> Running bootscript from mmc0 ...
> ## Executing script at 8200
> switch to partitions #0, OK
> mmc0 is current device
> 7316696 bytes read in 444 ms (15.7 MiB/s)
> 48645094 bytes read in 2814 ms (16.5 MiB/s)
> 35700 bytes read in 24 ms (1.4 MiB/s)
> Kernel image @ 0x8200 [ 0x00 - 0x6fa4d8 ]
> data abort
> pc : [<9ff63ece>]  lr : [<9ff63f25>]
> reloc pc : [<80810ece>]lr : [<80810f25>]
> sp : 9ef32228  ip : 001c fp : 9ef39bf4
> r10: 0003  r9 : 9ef32ed8 r8 : 0002
> r7 : 9ffa421c  r6 : 9ffa4220 r5 : 0003  r4 : 9ffa4184
> r3 : 56190527  r2 : 9ffa4184 r1 : 9ef39bf4  r0 : 
> Flags: nZcv  IRQs off  FIQs on  Mode SVC_32
> Resetting CPU ...
> 
> resetting ...
> 
> 
> Last working version was 2015.10-rc4. 2015.10-rc5 does not work.
> gcc version is 5.2.1
> u-boot has been compiled as the following:
> 
> make -j 1 'CFLAGS=-fmessage-length=0 -grecord-gcc-switches -O2 -Wall
> -D_FORTIFY_SOURCE=2 -fstack-protector -funwind-tables
> -fasynchronous-unwind-tables' am335x_evm_defconfig
> make -j 1 'CFLAGS=-fmessage-length=0 -grecord-gcc-switches -O2 -Wall
> -D_FORTIFY_SOURCE=2 -fstack-protector -funwind-tables
> -fasynchronous-unwind-tables' USE_PRIVATE_LIBGG=yes

You need https://patchwork.ozlabs.org/patch/537133/

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Re: [U-Boot] [PATCH v2 2/2] fdt: Rewrite the logic in fdt_fixup_ethernet()

[Tom Rini]

On Sun, Nov 01, 2015 at 11:58:15PM -0800, Bin Meng wrote:

> Currently in fdt_fixup_ethernet() the MAC address fix up is
> handled in a loop of which the exit condition is to test the
> "eth%daddr" env is not NULL. However this creates unnecessary
> constrains that those "eth%daddr" env variables must be
> sequential even if "ethernet%d" does not start from 0 in the
> "/aliases" node. For example, with "/aliases" node below:
> 
> aliases {
> ethernet3 = &enet3;
> ethernet4 = &enet4;
> };
> 
> "ethaddr", "eth1addr", "eth2addr" must exist in order to fix
> up ethernet3's MAC address successfully.
> 
> Now we change the loop logic to iterate the properties in the
> "/aliases" node. For each property, test if it is in a format
> of "ethernet%d", then get its MAC address from corresponding
> "eth%daddr" env and fix it up in the dtb.
> 
> Signed-off-by: Bin Meng 
> Reviewed-by: Tom Rini 
> Acked-by: Joe Hershberger 
> 

Reviewed-by: Tom Rini 
On OMAP4 Panda (+v4.3 kernel)
Tested-by: Tom Rini 

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Re: [U-Boot] [PATCH v2 1/2] fdt: Deprecate "usbethaddr" usage in fdt_fixup_ethernet()

[Tom Rini]

On Sun, Nov 01, 2015 at 11:58:14PM -0800, Bin Meng wrote:

> In fdt_fixup_ethernet() only "usbethaddr" is handled to fix up the
> first usb ethernet port MAC address. Other additional usb ethernet
> ports are ignored as there is no logic to handle "usbeth%daddr".
> 
> It is suggested we should use "ethaddr" for all ethernet devices.
> Hence deprecate "usbethaddr" usage in fdt_fixup_ethernet(). Note
> this actually reverts commit b1f49ab.
> 
> Signed-off-by: Bin Meng 
> 

Reviewed-by: Tom Rini 
On OMAP4 Panda (+ v4.3 kernel)
Tested-by: Tom Rini 

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[U-Boot] [PATCH] arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

[dinguyen]

From: Dinh Nguyen 

The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.

Signed-off-by: Dinh Nguyen 
---
 arch/arm/mach-socfpga/include/mach/reset_manager.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 8e59578..666a2ef 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -69,9 +69,9 @@ struct socfpga_reset_manager {
 #define RSTMGR_UART0   RSTMGR_DEFINE(1, 16)
 #define RSTMGR_SPIM0   RSTMGR_DEFINE(1, 18)
 #define RSTMGR_SPIM1   RSTMGR_DEFINE(1, 19)
-#define RSTMGR_QSPIRSTMGR_DEFINE(0, 5)
-#define RSTMGR_SDMMC   RSTMGR_DEFINE(0, 22)
-#define RSTMGR_DMA RSTMGR_DEFINE(0, 28)
+#define RSTMGR_QSPIRSTMGR_DEFINE(1, 5)
+#define RSTMGR_SDMMC   RSTMGR_DEFINE(1, 22)
+#define RSTMGR_DMA RSTMGR_DEFINE(1, 28)
 #define RSTMGR_SDR RSTMGR_DEFINE(1, 29)
 
 /* Create a human-readable reference to SoCFPGA reset. */
-- 
2.6.2

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Re: [U-Boot] Please pull u-boot-mpc85xx master

[Tom Rini]

On Mon, Nov 02, 2015 at 01:06:42PM -0800, York Sun wrote:

> Tom,
> 
> The following changes since commit a61047370d0b73ab886c5863e952695b5ee0d75b:
> 
>   ARM: at91: sama5: change the environment address to 0x6000 (2015-11-01
> 22:02:16 +0100)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-mpc85xx.git master
> 
> for you to fetch changes up to 96d59e9d6aa74e35c63dc74da10e41f8ba0f6de4:
> 
>   mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1 (2015-11-02 
> 08:51:50
> -0800)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] ARM: zynq: Remove zc70x target

[Joe Hershberger]

On Fri, Oct 30, 2015 at 9:51 AM, Michal Simek  wrote:
> Remove zc70x target which was one setting for zc702 and zc706.
> Currently zc702 and zc706 are separated.
>
> Signed-off-by: Michal Simek 

Reviewed-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 5/8] net: zynq: Wait till packet is sent

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek  wrote:
> Wait till BD is process to ensure that packet was sent successfully.

process -> processed

>
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/net/zynq_gem.c | 33 -
>  1 file changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index e49aa86127d1..c56e02132ae9 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -23,6 +23,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  #if !defined(CONFIG_PHYLIB)
>  # error XILINX_GEM_ETHERNET requires PHYLIB
> @@ -86,6 +87,8 @@
> ZYNQ_GEM_DMACR_TXSIZE | \
> ZYNQ_GEM_DMACR_RXBUF)
>
> +#define ZYNQ_GEM_TSR_DONE  0x0020 /* Tx done mask */
> +
>  /* Use MII register 1 (MII status register) to detect PHY */
>  #define PHY_DETECT_REG  1
>
> @@ -427,6 +430,33 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * 
> bis)
> return 0;
>  }
>
> +static inline int wait_for_bit(const char *func, u32 *reg, const u32 mask,
> +  bool set, unsigned int timeout)

There is no need to specify "inline" here.

> +{
> +   u32 val;
> +   unsigned long start = get_timer(0);
> +
> +   while (1) {
> +   val = readl(reg);
> +
> +   if (!set)
> +   val = ~val;
> +
> +   if ((val & mask) == mask)
> +   return 0;
> +
> +   if (get_timer(start) > timeout)
> +   break;
> +
> +   udelay(1);
> +   }
> +
> +   debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n",
> + func, reg, mask, set);
> +
> +   return -ETIMEDOUT;
> +}
> +
>  static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
>  {
> u32 addr, size;
> @@ -467,7 +497,8 @@ static int zynq_gem_send(struct eth_device *dev, void 
> *ptr, int len)
> if (priv->tx_bd->status & ZYNQ_GEM_TXBUF_EXHAUSTED)
> printf("TX buffers exhausted in mid frame\n");
>
> -   return 0;
> +   return wait_for_bit(__func__, ®s->txsr, ZYNQ_GEM_TSR_DONE,
> +   true, 2);
>  }
>
>  /* Do not check frame_recd flag in rx_status register 0x20 - just poll BD */
> --
> 2.5.0
>
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Re: [U-Boot] [PATCH 4/8] net: zynq: Add dummy packet to fix packet duplication issue

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek  wrote:
> Target is duplicating packets. IP prefetches another BD and process it
> when the first one is sent. Adding one dummy BD to the chain fix the
> problem with packet duplication.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 7/8] net: zynq: Remove unused MDCCLKDIV2 macro

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek  wrote:
> Driver cleanup.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 3/8] net: zynq: Do not report TX underrun

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek  wrote:
Don't you need some body here to appease checkpatch.pl?

> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 2/8] net: zynq: Setup BD when structures are filled

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek  wrote:
> Fix incorrect sequence in BD handling.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 6/8] net: zynq: Fix mdc clock division setting for 100Mbit/s

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek  wrote:
> Using set and clear macro is incorrect because it is not overwritting
> origin mdc clock division setup.
> For example origin setup is 8(0b001) and new setup is 64(0b100) which
> means 0b101 is setup which is 96 divider.
> Using writel to rewrite all setting like for 1000Mbit/s case.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 8/8] net: zynq: Fix MDC setting for zynq

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek  wrote:
> Based on spec:
> "MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and
> write operations)"
> Zynq is running on 111MHz. Current setting is 32 which is 111/32=3.47

Isn't it dependent on which board and what the clock setup is? Should
this be specified by the board?

> which is above of 2.5MHz.
> Using 48 divider will give us correct setting according spec
> (111/48=2.31).
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 1/8] net: zynq: Allocate BD_SPACE in connection to RX_BUF

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek  wrote:
> BD_SEPRN_SPACE should not have hard coded value and it will be
> calculated based on the number of buffer descriptors that we
> would like to use.
>
> Signed-off-by: Michal Simek 

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Re: [U-Boot] [PATCH 3/3] net: zynq: Disable secondary queues

[Joe Hershberger]

Hi Michal & Edgar,

On Tue, Oct 27, 2015 at 10:08 AM, Michal Simek  wrote:
> From: "Edgar E. Iglesias" 
>
> Zynq has no priority queues.
> ZynqMP requires this change to get network working.
> This patch was not needed on ep108 for uknown reason even it should be
> used.
> Tested on Zynq and ZynqMP.
>
> Signed-off-by: Edgar E. Iglesias 
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/net/zynq_gem.c | 26 ++
>  1 file changed, 26 insertions(+)
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index f32862fd0b2e..0e741dd605a6 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -131,6 +131,10 @@ struct zynq_gem_regs {
> u32 reserved6[18];
>  #define STAT_SIZE  44
> u32 stat[STAT_SIZE]; /* 0x100 - Octects transmitted Low reg */
> +   u32 reserved7[164];
> +   u32 transmit_q1_ptr; /* 0x440 - Transmit priority queue 1 */
> +   u32 reserved8[15];
> +   u32 receive_q1_ptr; /* 0x480 - Receive priority queue 1 */
>  };
>
>  /* BD descriptors */
> @@ -304,6 +308,8 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * 
> bis)
> struct phy_device *phydev;
> struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
> struct zynq_gem_priv *priv = dev->priv;
> +   struct emac_bd *dummy_tx_bd = &priv->tx_bd[4];
> +   struct emac_bd *dummy_rx_bd = &priv->tx_bd[6];

Please add comments about the magic "4" and "6".

> const u32 supported = SUPPORTED_10baseT_Half |
> SUPPORTED_10baseT_Full |
> SUPPORTED_100baseT_Half |
> @@ -352,6 +358,26 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * 
> bis)
> /* Setup for Network Control register, MDIO, Rx and Tx enable 
> */
> setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_MDEN_MASK);
>
> +   /*
> +* Disable the second priority queue.
> +* FIXME: Consider GEMs with more than 2 queues.
> +*/

Please don't include FIXME comments.

> +   dummy_tx_bd->addr = 0;
> +   dummy_tx_bd->status = ZYNQ_GEM_TXBUF_WRAP_MASK |
> +   ZYNQ_GEM_TXBUF_LAST_MASK|
> +   ZYNQ_GEM_TXBUF_USED_MASK;
> +
> +   dummy_rx_bd->addr = ZYNQ_GEM_RXBUF_WRAP_MASK |
> +   ZYNQ_GEM_RXBUF_NEW_MASK;
> +   dummy_rx_bd->status = 0;
> +   flush_dcache_range((ulong)&dummy_tx_bd, (ulong)&dummy_tx_bd +
> +  sizeof(dummy_tx_bd));
> +   flush_dcache_range((ulong)&dummy_rx_bd, (ulong)&dummy_rx_bd +
> +  sizeof(dummy_rx_bd));
> +
> +   writel((u32)dummy_tx_bd, ®s->transmit_q1_ptr);
> +   writel((u32)dummy_rx_bd, ®s->receive_q1_ptr);
> +
> priv->init++;
> }
>
> --
> 2.5.0
>
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Re: [U-Boot] [PATCH 2/3] net: zynq: Fix clearing statistic

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:08 AM, Michal Simek  wrote:
> Previous loop was completely bogus. Iterration should go just over
> statistic counters.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 1/3] net: zynq: Extend register description with offsets

[Joe Hershberger]

Hi Michal,

On Tue, Oct 27, 2015 at 10:08 AM, Michal Simek  wrote:
> Extend comments with register offset to help with debuggging.
>
> Signed-off-by: Michal Simek 

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Re: [U-Boot] [PATCH 1/2] armv8: LS2080A: Rename LS2085A to reflect LS2080A

[York Sun]

On 10/15/2015 02:14 AM, Prabhakar Kushwaha wrote:
> From: Pratiyush Mohan Srivastava 
> 
> LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
> personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
> 
> So renaming existing LS2085A code base to reflect LS2080A (Prime personality)
> 
> Signed-off-by: Pratiyush Mohan Srivastava 
> ---

Prabhakar,

Please rebase your patch to latest u-boot.

York

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Re: [U-Boot] [PATCH] net: gem: Build warning fixes for 64-bit

[Joe Hershberger]

Hi Michal,

On Fri, Oct 30, 2015 at 10:00 AM, Michal Simek  wrote:
> Cast pointers to unsigned long instead of a sized 32-bit type to avoid
> pointer to integer cast size mismatch warnings.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 1/2] net: zynq: Add debug message to phyread/phywrite

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:06 AM, Michal Simek  wrote:
> Add debug messages to phyread/write to help with PHY debug.
>
> Signed-off-by: Michal Simek 

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Re: [U-Boot] [PATCH 2/2] net: zynq: Add support for different PHY interface types

[Joe Hershberger]

On Tue, Oct 27, 2015 at 10:06 AM, Michal Simek  wrote:
> MII is setup by default for all cases. The most of boards are using
> RGMII but PHY drivers are not doing any specific setting that's why MII
> setting was working fine. With TI DP83867 is necessary to setup
> paramaters based on interface type.
>
> Use one setting per board for it which is something what will be removed
> when driver is moved to DM.
>
> Signed-off-by: Michal Simek 

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Re: [U-Boot] [PATCH] net: phy: Add support for Texas Instruments DP83867

[Joe Hershberger]

Hi Michal,

On Tue, Oct 27, 2015 at 10:04 AM, Michal Simek  wrote:
> From: "Edgar E. Iglesias" 
>
> Code is taken from Linux kernel driver.
>
> Signed-off-by: Edgar E. Iglesias 
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/net/phy/Makefile |   1 +
>  drivers/net/phy/phy.c|   3 +
>  drivers/net/phy/ti.c | 205 
> +++
>  3 files changed, 209 insertions(+)
>  create mode 100644 drivers/net/phy/ti.c
>
> diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
> index d096db87a276..9e4d4927e676 100644
> --- a/drivers/net/phy/Makefile
> +++ b/drivers/net/phy/Makefile
> @@ -24,4 +24,5 @@ obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
>  obj-$(CONFIG_PHY_REALTEK) += realtek.o
>  obj-$(CONFIG_PHY_SMSC) += smsc.o
>  obj-$(CONFIG_PHY_TERANETICS) += teranetics.o
> +obj-$(CONFIG_PHY_TI) += ti.o
>  obj-$(CONFIG_PHY_VITESSE) += vitesse.o
> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> index a6023f1033ec..c6046e4abc4e 100644
> --- a/drivers/net/phy/phy.c
> +++ b/drivers/net/phy/phy.c
> @@ -484,6 +484,9 @@ int phy_init(void)
>  #ifdef CONFIG_PHY_TERANETICS
> phy_teranetics_init();
>  #endif
> +#ifdef CONFIG_PHY_TI
> +   phy_ti_init();
> +#endif
>  #ifdef CONFIG_PHY_VITESSE
> phy_vitesse_init();
>  #endif
> diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
> new file mode 100644
> index ..bb30450d7531
> --- /dev/null
> +++ b/drivers/net/phy/ti.c
> @@ -0,0 +1,205 @@
> +/*
> + * TI PHY drivers
> + *
> + * SPDX-License-Identifier:GPL-2.0
> + *
> + */
> +#include 
> +#include 
> +
> +/* TI DP83867 */
> +#define DP83867_DEVADDR 0x1f
> +
> +#define MII_DP83867_PHYCTRL 0x10
> +#define MII_DP83867_MICR0x12
> +#define DP83867_CTRL0x1f
> +
> +/* Extended Registers */
> +#define DP83867_RGMIICTL0x0032
> +#define DP83867_RGMIIDCTL   0x0086
> +
> +/* FIXME this is consolidated in the latest U-Boot version */
> +#define BIT(x) (1UL << (x))

Indeed.

> +#define DP83867_SW_RESET(1 << 15)
> +#define DP83867_SW_RESTART  (1 << 14)
> +
> +/* MICR Interrupt bits */
> +#define MII_DP83867_MICR_AN_ERR_INT_EN  BIT(15)
> +#define MII_DP83867_MICR_SPEED_CHNG_INT_EN  BIT(14)
> +#define MII_DP83867_MICR_DUP_MODE_CHNG_INT_EN   BIT(13)
> +#define MII_DP83867_MICR_PAGE_RXD_INT_ENBIT(12)
> +#define MII_DP83867_MICR_AUTONEG_COMP_INT_ENBIT(11)
> +#define MII_DP83867_MICR_LINK_STS_CHNG_INT_EN   BIT(10)
> +#define MII_DP83867_MICR_FALSE_CARRIER_INT_EN   BIT(8)
> +#define MII_DP83867_MICR_SLEEP_MODE_CHNG_INT_EN BIT(4)
> +#define MII_DP83867_MICR_WOL_INT_EN BIT(3)
> +#define MII_DP83867_MICR_XGMII_ERR_INT_EN   BIT(2)
> +#define MII_DP83867_MICR_POL_CHNG_INT_ENBIT(1)
> +#define MII_DP83867_MICR_JABBER_INT_EN  BIT(0)
> +
> +/* RGMIICTL bits */
> +#define DP83867_RGMII_TX_CLK_DELAY_EN   BIT(1)
> +#define DP83867_RGMII_RX_CLK_DELAY_EN   BIT(0)
> +
> +/* PHY CTRL bits */
> +#define DP83867_PHYCR_FIFO_DEPTH_SHIFT  14
> +
> +/* RGMIIDCTL bits */
> +#define DP83867_RGMII_TX_CLK_DELAY_SHIFT4
> +
> +#define MII_MMD_CTRL0x0d/* MMD Access Control Register */
> +#define MII_MMD_DATA0x0e/* MMD Access Data Register */
> +
> +/* MMD Access Control register fields */
> +#define MII_MMD_CTRL_DEVAD_MASK 0x1f/* Mask MMD DEVAD*/
> +#define MII_MMD_CTRL_ADDR   0x  /* Address */
> +#define MII_MMD_CTRL_NOINCR 0x4000  /* no post increment */
> +#define MII_MMD_CTRL_INCR_RDWT  0x8000  /* post increment on reads & writes 
> */
> +#define MII_MMD_CTRL_INCR_ON_WT 0xC000  /* post increment on writes only */
> +
> +/* FIXME: These indirect PHY writes should go into common code.  */

By this comment, you mean common to this phy and other phys?

Either fix or remove the comment.

> +/**
> + * phy_read_mmd_indirect - reads data from the MMD registers
> + * @phydev: The PHY device bus
> + * @prtad: MMD Address
> + * @devad: MMD DEVAD
> + * @addr: PHY address on the MII bus
> + *
> + * Description: it reads data from the MMD registers (clause 22 to access to
> + * clause 45) of the specified phy address.
> + * To read these register we have:

register -> registers

> + * 1) Write reg 13 // DEVAD
> + * 2) Write reg 14 // MMD Address
> + * 3) Write reg 13 // MMD Data Command for MMD DEVAD
> + * 3) Read  reg 14 // Read MMD data
> + */
> +int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
> + int devad, int addr)
> +{
> +   int value = -1;
> +
> +   /* Write the desired MMD Devad */
> +   phy_write(phydev, addr, MII_MMD_CTRL, devad);
> +
> +   /* Write the desired MMD register address */
> +   phy_write(phydev, addr, MII_MMD_DATA, prtad);
> +
> +   /* Select the Function : DATA with no post increment */
> +   phy_write(phydev, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
> +
> +   /* Read the content of the MMD's selected re

[U-Boot] Please pull u-boot-mpc85xx master

[York Sun]

Tom,

The following changes since commit a61047370d0b73ab886c5863e952695b5ee0d75b:

  ARM: at91: sama5: change the environment address to 0x6000 (2015-11-01
22:02:16 +0100)

are available in the git repository at:

  git://git.denx.de/u-boot-mpc85xx.git master

for you to fetch changes up to 96d59e9d6aa74e35c63dc74da10e41f8ba0f6de4:

  mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1 (2015-11-02 08:51:50
-0800)


Codrin Ciubotariu (1):
  T104xD4RDB: Fix PHY address for PHY connected to FM1@DTSEC3

Shaohui Xie (1):
  Powerpc: eSDHC: expand a fix to T4160

Shengzhou Liu (1):
  mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1

Yangbo Lu (4):
  mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter Card
  powerpc/t1040qds: enable adapter card type identification support
  powerpc/t1040qds: enable peripheral clock for eSDHC
  mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter 
Card

Zhao Qiang (1):
  t1040d4rdb: assign muxed pins to qe-tdm when set hwconfig qe-tdm

 arch/powerpc/cpu/mpc85xx/fdt.c  |   11 +++
 arch/powerpc/cpu/mpc85xx/speed.c|3 ++-
 arch/powerpc/include/asm/fsl_fdt.h  |   11 +++
 board/freescale/common/qixis.h  |5 +
 board/freescale/t104xrdb/cpld.h |1 +
 board/freescale/t104xrdb/t104xrdb.c |   10 ++
 drivers/mmc/fsl_esdhc.c |9 -
 include/configs/T1040QDS.h  |2 ++
 include/configs/T104xRDB.h  |4 +++-
 9 files changed, 53 insertions(+), 3 deletions(-)
 create mode 100644 arch/powerpc/include/asm/fsl_fdt.h

Thanks.

York
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Re: [U-Boot] [PATCH] mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1

[York Sun]

On 10/25/2015 10:51 PM, Shengzhou Liu wrote:
> T2081 rev 1.1 changes MEM_PLL_RAT in RCW which requires new parsing for ratio.
> 
> Signed-off-by: Shengzhou Liu 
> ---

Applied to u-boot-mpc85xx, awaiting upstream. Thanks.

York
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Re: [U-Boot] [PATCH] T104xD4RDB: Fix PHY address for PHY connected to FM1@DTSEC3

[York Sun]

On 10/12/2015 06:33 AM, Codrin Ciubotariu wrote:
> On T1040D4RDB board, u-boot fails to connect port FM1@DTSEC3 to
> the Ethernet PHY because the wrong PHY address is used. Also,
> T1040D4RDB supports SGMII on one port only.
> 
> Signed-off-by: Codrin Ciubotariu 
> ---

Applied to u-boot-mpc85xx, awaiting upstream. Thanks.

York
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Re: [U-Boot] [v2, 4/4] mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter Card

[York Sun]

On 09/16/2015 07:27 PM, Yangbo Lu wrote:
> When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card), enable 
> EVDD
> automatic control via SDHC_VS. This could support SD card IO voltage switching
> for UHS-1 speed mode.
> 
> Signed-off-by: Yangbo Lu 
> ---

Applied to u-boot-mpc85xx, awaiting upstream. Thanks.

York
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Re: [U-Boot] [v2, 3/4] powerpc/t1040qds: enable peripheral clock for eSDHC

[York Sun]

On 09/16/2015 07:27 PM, Yangbo Lu wrote:
> Signed-off-by: Yangbo Lu 
> ---

Applied to u-boot-mpc85xx, awaiting upstream. Thanks.

York
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Re: [U-Boot] [v2, 2/4] powerpc/t1040qds: enable adapter card type identification support

[York Sun]

On 09/16/2015 07:27 PM, Yangbo Lu wrote:
> Signed-off-by: Yangbo Lu 
> ---

Applied to u-boot-mpc85xx, awaiting upstream. Thanks.

York
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Re: [U-Boot] [v2, 1/4] mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter Card

[York Sun]

On 09/16/2015 07:27 PM, Yangbo Lu wrote:
> If adapter card type identification is supported for platform, we would
> enable dat[4:7] for eMMC4.5 Adapter Card.
> 
> Signed-off-by: Yangbo Lu 
> ---
> Changes for v2:
>   - Modified the commit message
>   - Added a patch enabling EVDD automatic control

Applied to u-boot-mpc85xx, awaiting upstream. Thanks.

York
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Re: [U-Boot] [PATCH] Powerpc: eSDHC: expand a fix to T4160

[York Sun]

On 09/11/2015 04:02 AM, shh@gmail.com wrote:
> From: Shaohui Xie 
> 
> commit b8e5b07225 "Powerpc: eSDHC: Fix mmc read write err in uboot of
> T4240QDS board", T4160 also needs this fix.
> 
> Signed-off-by: Shaohui Xie 
> ---

Applied to u-boot-mpc85xx, awaiting upstream. Thanks.

York
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Re: [U-Boot] [PATCH V2] t1040d4rdb: assign muxed pins to qe-tdm when set hwconfig qe-tdm

[York Sun]

On 08/27/2015 07:31 PM, Zhao Qiang wrote:
> qe-tdm is muxed with diu, if hwconfig setted as qe-tdm,
> assign muxed pins to qe-tdm, then delete diu node from
> device tree.
> 
> Signed-off-by: Zhao Qiang 
> ---
> changes for v2
>   - move fdt_del_diu to arch/powerpc/cpu/mpc85xx/fdt.c
>   - add new .h file arch/powerpc/include/asm/fsl_fdt.h for FSL-FDT

Applied to u-boot-mpc85xx, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2 1/2] fdt: Deprecate "usbethaddr" usage in fdt_fixup_ethernet()

[Joe Hershberger]

Hi Bin,

On Mon, Nov 2, 2015 at 1:58 AM, Bin Meng  wrote:
> In fdt_fixup_ethernet() only "usbethaddr" is handled to fix up the
> first usb ethernet port MAC address. Other additional usb ethernet
> ports are ignored as there is no logic to handle "usbeth%daddr".
>
> It is suggested we should use "ethaddr" for all ethernet devices.
> Hence deprecate "usbethaddr" usage in fdt_fixup_ethernet(). Note
> this actually reverts commit b1f49ab.

Please include the subject of this commit that is reverted. Also a
good idea to include the entire commit ID.

>
> Signed-off-by: Bin Meng 

Other than that,
Acked-by: Joe Hershberger 

> ---
>
> Changes in v2:
> - New patch to deprecate "usbethaddr" usage in fdt_fixup_ethernet()
>
>  common/fdt_support.c | 12 +---
>  1 file changed, 1 insertion(+), 11 deletions(-)
>
> diff --git a/common/fdt_support.c b/common/fdt_support.c
> index a7ff2df..ec72b86 100644
> --- a/common/fdt_support.c
> +++ b/common/fdt_support.c
> @@ -490,18 +490,8 @@ void fdt_fixup_ethernet(void *fdt)
> if (node < 0)
> return;
>
> -   if (!getenv("ethaddr")) {
> -   if (getenv("usbethaddr")) {
> -   strcpy(mac, "usbethaddr");
> -   } else {
> -   debug("No ethernet MAC Address defined\n");
> -   return;
> -   }
> -   } else {
> -   strcpy(mac, "ethaddr");
> -   }
> -
> i = 0;
> +   strcpy(mac, "ethaddr");
> while ((tmp = getenv(mac)) != NULL) {
> sprintf(enet, "ethernet%d", i);
> path = fdt_getprop(fdt, node, enet, NULL);
> --
> 1.8.2.1
>
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Re: [U-Boot] [RFC PATCH 7/8] net: IPv6 documentation

[Joe Hershberger]

Hi Chris,

On Mon, Oct 12, 2015 at 2:43 AM, Chris Packham  wrote:
> Signed-off-by: Chris Packham 
> ---

Acked-by: Joe Hershberger 
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Re: [U-Boot] [RFC PATCH 8/8] net: e1000 enable multicast reception

[Joe Hershberger]

Hi Chris,

On Mon, Oct 12, 2015 at 2:43 AM, Chris Packham  wrote:
> IPv6 neighbor discovery uses various multicast addresses to send the
> request and receive the response. For neighbor discovery to work
> properly in U-boot the Ethernet device needs to support joining/leaving
> various L2 multicast groups or it needs to support multicast/promiscuous
> mode. For the sake of simplicity the latter approach has been taken. The
> e1000 hardware has slightly finer grained control in that it is possible
> to enable support for multicast-promiscuous mode separately from unicast
> so the extra traffic received is less.
>
> Signed-off-by: Chris Packham 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [RFC PATCH 5/8] net: ipv6 support

[Joe Hershberger]

Hi Chris,

On Mon, Oct 12, 2015 at 2:43 AM, Chris Packham  wrote:
> Adds basic support for IPv6. Neighbor discovery and ping6 are the only
> things supported at the moment.
>
> Helped-by: Hanna Hawa  [endian & alignment fixes]
> Signed-off-by: Chris Packham 
> ---
> Now we have something functional. With this you can do something like
> 'setenv ipaddr6 3ffe::2' and 'ping6 3ffe::1' should work.
>
> I seem to have a problem that when you send a ping6 for a non-existent
> address that ends up stuck and the next non-ipv6 net operation tries to
> resolve it. I suspect this is because the pending neighbor discovery
> information isn't cleaned up properly, I need to look into that.
>
> The environment variable prefixlength6 is a bit fiddly. No-one uses a
> netmask6 (it'd mean a lot of ::...) it's almost always done by
> including the prefix length in the address (e.g. ip addr add
> 2001:db8::1/64) I'm contemplating adopting that syntax and dropping
> prefixlength6.
>
> This patch is bigger than I'd like it to be but I'm not sure how to
> split it up and keep the parts build able.

It is pretty huge. It's taken me a while to get through it.

>  common/Kconfig |  15 ++
>  common/cmd_net.c   |  28 
>  include/env_callback.h |   9 ++
>  include/env_flags.h|  10 ++
>  include/net.h  |   5 +-
>  include/net6.h | 212 
>  net/Kconfig|   5 +
>  net/Makefile   |   3 +
>  net/ndisc.c| 269 +++
>  net/ndisc.h|  27 
>  net/net.c  |  36 -
>  net/net6.c | 375 
> +
>  net/ping6.c| 111 +++
>  13 files changed, 1102 insertions(+), 3 deletions(-)
>  create mode 100644 net/ndisc.c
>  create mode 100644 net/ndisc.h
>  create mode 100644 net/net6.c
>  create mode 100644 net/ping6.c
>
> diff --git a/common/Kconfig b/common/Kconfig
> index 2c42b8e..c72563d 100644
> --- a/common/Kconfig
> +++ b/common/Kconfig
> @@ -389,6 +389,15 @@ config CMD_NET
>   bootp - boot image via network using BOOTP/TFTP protocol
>   tftpboot - boot image via network using TFTP protocol
>
> +config CMD_NET6
> +   bool "ipv6 commands"
> +   select NET
> +   select NET6
> +   default n
> +   help
> + IPv6 network commands
> + tftpboot6 - boot image via network using TFTP protocol

This is added in the next patch, so should probably move there.

> +
>  config CMD_TFTPPUT
> bool "tftp put"
> help
> @@ -420,6 +429,12 @@ config CMD_PING
> help
>   Send ICMP ECHO_REQUEST to network host
>
> +config CMD_PING6
> +   bool "ping6"
> +   depends on CMD_NET6
> +   help
> + Send ICMPv6 ECHO_REQUEST to network host

What makes ping inseparable from the core support?

> +
>  config CMD_CDP
> bool "cdp"
> help
> diff --git a/common/cmd_net.c b/common/cmd_net.c
> index b2f3c7b..271f91d 100644
> --- a/common/cmd_net.c
> +++ b/common/cmd_net.c
> @@ -11,6 +11,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  static int netboot_common(enum proto_t, cmd_tbl_t *, int, char * const []);
>
> @@ -284,6 +285,33 @@ U_BOOT_CMD(
>  );
>  #endif
>
> +#ifdef CONFIG_CMD_PING6
> +int do_ping6(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
> +{
> +   if (argc < 2)
> +   return -1;
> +
> +   if (string_to_ip6(argv[1], &net_ping_ip6) != 0)
> +   return CMD_RET_USAGE;
> +
> +   if (net_loop(PING6) < 0) {
> +   printf("ping6 failed; host %pI6c is not alive\n",
> +  &net_ping_ip6);
> +   return 1;
> +   }
> +
> +   printf("host %pI6c is alive\n", &net_ping_ip6);
> +
> +   return 0;
> +}
> +
> +U_BOOT_CMD(
> +   ping6,  2,  1,  do_ping6,
> +   "send ICMPv6 ECHO_REQUEST to network host",
> +   "pingAddress"
> +);
> +#endif /* CONFIG_CMD_PING6 */
> +
>  #if defined(CONFIG_CMD_CDP)
>
>  static void cdp_update_env(void)
> diff --git a/include/env_callback.h b/include/env_callback.h
> index 90b95b5..9027f3f 100644
> --- a/include/env_callback.h
> +++ b/include/env_callback.h
> @@ -60,6 +60,14 @@
>  #define NET_CALLBACKS
>  #endif
>
> +#ifdef CONFIG_NET6
> +#define NET6_CALLBACKS \
> +   "ip6addr:ip6addr," \
> +   "serverip6:serverip6," \
> +   "prefixlength6:prefixlength6,"

I like the other nomenclature better as well (included in the address).

> +#else
> +#define NET6_CALLBACKS
> +#endif
>  /*
>   * This list of callback bindings is static, but may be overridden by 
> defining
>   * a new association in the ".callbacks" environment variable.
> @@ -68,6 +76,7 @@
> ENV_DOT_ESCAPE ENV_FLAGS_VAR ":flags," \
> "baudrate:baudrate," \
> NET_CALLBACKS \
> +   NET6_CALLBACKS \
> "loadaddr:loadaddr," \
> SILENT_CALLBACK \
> SPLASHIMAGE_CALLBACK \
> diff 

Re: [U-Boot] [RFC PATCH 6/8] net: TFTP over IPv6

[Joe Hershberger]

Hi Chris,

On Mon, Oct 12, 2015 at 2:43 AM, Chris Packham  wrote:
> Add support for UDP/TFTP over IPv6.
>
> Signed-off-by: Chris Packham 
> ---
> One problem with the [hostIpAddr:]fileName syntax is that IPv6 addresses
> contains colons. So tftp_start() would be confused by 'tftpboot6
> $loadaddr 2001:db8::1:zImage'. It is probably possible to change the
> parsing to separate the host from the filename by parsing from the end
> (i.e. use strrchr() instead of strchr()) but then there are error cases
> that may not be handled correctly (e.g. omitting the filename).

I think we should just change the filename separator for tftp6. How about ','?

>  common/cmd_net.c | 13 
>  include/net6.h   |  4 
>  net/net.c|  3 +++
>  net/net6.c   | 64 
> 
>  net/tftp.c   | 37 
>  5 files changed, 121 insertions(+)
>
> diff --git a/common/cmd_net.c b/common/cmd_net.c
> index 271f91d..3541599 100644
> --- a/common/cmd_net.c
> +++ b/common/cmd_net.c
> @@ -42,6 +42,19 @@ U_BOOT_CMD(
> "[loadAddress] [[hostIPaddr:]bootfilename]"
>  );
>
> +#ifdef CONFIG_CMD_NET6
> +int do_tftpb6(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
> +{
> +   return netboot_common(TFTP6, cmdtp, argc, argv);
> +}
> +
> +U_BOOT_CMD(
> +   tftpboot6,  3,  1,  do_tftpb6,
> +   "boot image via network using TFTP protocol",
> +   "[loadAddress] [bootfilename]"
> +);
> +#endif
> +
>  #ifdef CONFIG_CMD_TFTPPUT
>  int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
>  {
> diff --git a/include/net6.h b/include/net6.h
> index a0374df..df6d38e 100644
> --- a/include/net6.h
> +++ b/include/net6.h
> @@ -264,6 +264,10 @@ void ping6_start(void);
>  void ping6_receive(struct ethernet_hdr *et, struct ip6_hdr *ip6,
>   int len);
>
> +/* Transmit UDP packet using IPv6, performing neighbour discovery if needed 
> */
> +int net_send_udp_packet6(uchar *ether, struct in6_addr *dest,
> +   int dport, int sport, int len);
> +
>  /* handler for incoming IPv6 echo packet */
>  void net_ip6_handler(struct ethernet_hdr *et, struct ip6_hdr *ip6,
> int len);
> diff --git a/net/net.c b/net/net.c
> index 349a18e..9e682b4 100644
> --- a/net/net.c
> +++ b/net/net.c
> @@ -454,6 +454,9 @@ restart:
>  #ifdef CONFIG_CMD_TFTPPUT
> case TFTPPUT:
>  #endif
> +#ifdef CONFIG_CMD_NET6
> +   case TFTP6:
> +#endif
> /* always use ARP to get server ethernet address */
> tftp_start(protocol);
> break;
> diff --git a/net/net6.c b/net/net6.c
> index 2315704..f5e272a 100644
> --- a/net/net6.c
> +++ b/net/net6.c
> @@ -322,6 +322,50 @@ ip6_add_hdr(uchar *xip, struct in6_addr *src, struct 
> in6_addr *dest,
> return sizeof(struct ip6_hdr);
>  }
>
> +int
> +net_send_udp_packet6(uchar *ether, struct in6_addr *dest, int dport, int 
> sport, int len)
> +{
> +   uchar *pkt;
> +   struct udp_hdr *udp;
> +
> +   udp = (struct udp_hdr *)((uchar *)net_tx_packet + net_eth_hdr_size() 
> + IP6_HDR_SIZE);
> +
> +   udp->udp_dst = htons(dport);
> +   udp->udp_src = htons(sport);
> +   udp->udp_len = htons(len + IP6_UDPHDR_SIZE);
> +   /* checksum */
> +   udp->udp_xsum = 0;
> +   udp->udp_xsum = csum_ipv6_magic(&net_ip6, dest, len + IP6_UDPHDR_SIZE,
> +   IPPROTO_UDP, csum_partial((__u8 *)udp, len + IP6_UDPHDR_SIZE, 
> 0));
> +
> +   /* if MAC address was not discovered yet, save the packet and do 
> neighbour discovery */
> +   if (memcmp(ether, net_null_ethaddr, 6) == 0) {
> +   net_copy_ip6(&net_nd_sol_packet_ip6, dest);
> +   net_nd_packet_mac = ether;
> +
> +   pkt = net_nd_tx_packet;
> +   pkt += net_set_ether(pkt, net_nd_packet_mac, PROT_IP6);
> +   pkt += ip6_add_hdr(pkt, &net_ip6, dest, IPPROTO_UDP, 64, len 
> + IP6_UDPHDR_SIZE);
> +   memcpy(pkt, (uchar *)udp, len + IP6_UDPHDR_SIZE);
> +
> +   /* size of the waiting packet */
> +   net_nd_tx_packet_size = (pkt - net_nd_tx_packet) + 
> IP6_UDPHDR_SIZE + len;
> +
> +   /* and do the neighbor solicitation */
> +   net_nd_try = 1;
> +   net_nd_timer_start = get_timer(0);
> +   ip6_NDISC_Request();
> +   return 1;   /* waiting */
> +   }
> +
> +   pkt = (uchar *)net_tx_packet;
> +   pkt += net_set_ether(pkt, ether, PROT_IP6);
> +   pkt += ip6_add_hdr(pkt, &net_ip6, dest, IPPROTO_UDP, 64, len + 
> IP6_UDPHDR_SIZE);
> +   (void) eth_send(net_tx_packet, (pkt - net_tx_packet) + 
> IP6_UDPHDR_SIZE + len);
> +
> +   return 0;   /* transmitted */
> +}
> +
>  void net_ip6_handler(struct ethernet_hdr *et, struct ip6_hdr *ip6, int len)
>  {
> struct in_addr

Re: [U-Boot] [RFC PATCH 3/8] lib: net_utils: make string_to_ip stricter

[Joe Hershberger]

Hi Chris,

On Mon, Oct 12, 2015 at 2:43 AM, Chris Packham  wrote:
> Previously values greater than 255 were implicitly truncated. Add some
> stricter checking to reject addresses with components >255.
>
> With the input "1234192.168.1.1" the old behaviour would truncate the
> address to 192.168.1.1. New behaviour rejects the string outright and
> returns 0.0.0.0, which for the purposes of IP addresses can be
> considered an error.
>
> Signed-off-by: Chris Packham 
> ---

Acked-by: Joe Hershberger
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