Re: [U-Boot] [PATCH 7/7] usb: dwc2: Do not mix data toggle for IN and OUT endpoints, check bounds

2016-01-21 Thread Marek Vasut
On Friday, January 22, 2016 at 02:30:43 AM, Stefan Brüns wrote:
> USB protocol allows for 16 IN and 16 OUT endpoints (USB 2.0 Spec,
> 8.3.2.2 Endpoint Field). A function may have an EP 1 for both IN and OUT,
> so these two should be kept separate. As EPs are either BULK or INTERRUPT
> (or ISO), it is fine to have one array per direction for all transfer
> types (also see e236519b7365ef75c5da6a5623f0b03d9c00cfae).
> 
> USB device address is 7 bits, so a bus may have more than 16 devices.
> Check the device number, as the DWC2 driver only supports BULK/ISO for
> the first 16 devices.
> 
> Signed-off-by: Stefan Brüns 
> ---

Since this is patch 7/7, where are the remaining 6 ?

>  drivers/usb/host/dwc2.c | 29 +++--
>  1 file changed, 19 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
> index 291e4a5..7c107bc 100644
> --- a/drivers/usb/host/dwc2.c
> +++ b/drivers/usb/host/dwc2.c
> @@ -34,7 +34,8 @@ struct dwc2_priv {
>   uint8_t *aligned_buffer;
>   uint8_t *status_buffer;
>  #endif
> - int bulk_data_toggle[MAX_DEVICE][MAX_ENDPOINT];
> + uint8_t in_data_toggle[MAX_DEVICE][MAX_ENDPOINT];
> + uint8_t out_data_toggle[MAX_DEVICE][MAX_ENDPOINT];

Use u8/u16/u32 please. All around the place .

>   struct dwc2_core_regs *regs;
>   int root_hub_devnum;
>  };

The rest is fine,

Acked-by: Marek Vasut 

Thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 0/8] Convert lpuart serial driver to driver model

2016-01-21 Thread Bhuvanchandra DV

Hi Simon,

On 01/22/2016 08:46 AM, Simon Glass wrote:

Hi,

On 12 January 2016 at 02:30, Bhuvanchandra DV
 wrote:

Hi Bin,


On 01/12/2016 12:21 PM, Bin Meng wrote:


Hi Bhuvanchandra,

On Tue, Jan 12, 2016 at 2:43 PM, Bhuvanchandra DV
 wrote:


Hi Bin,


On 01/12/2016 11:05 AM, Bin Meng wrote:



Hi Bhuvanchandra,

On Tue, Jan 12, 2016 at 12:28 PM, Bhuvanchandra DV
 wrote:



- Convert lpuart driver to driver model and remove the legacy code.
- Update Toradex Colibri VF50/VF61 serial support with driver model.
- Update Freescale vf610twr serial support with driver model.
- Update Freescale ls1021atwr serial support with driver model.
- Update Phytec pcm052 serial support with driver model.
- Tested the driver on Toradex Colibri VF50/VF61 hardware.
- Compile checked board files for vf610twr, ls1021atwr and pcm052
 since I don't have access to such hardware at my end. Reviewers
 and testers welcome!

Bhuvanchandra DV (8):
 dm: lpuart: Add driver model support for the serial driver
 colibri_vf: Update enabling lpuart support with driver model
 arm: vf610twr: Add driver model support
 vf610twr: Update enabling lpuart with driver model
 arm: ls102xa: Add driver model support
 ls1021x: Update enabling lpuart with driver model
 arm: pcm052: Enable driver model support
 pcm052: Update enabling lpuart support with driver model

arch/arm/include/asm/arch-ls102xa/serial.h |  16 
arch/arm/include/asm/arch-vf610/serial.h   |  16 
board/freescale/ls1021atwr/ls1021atwr.c|  15 ++-
board/freescale/vf610twr/vf610twr.c|  13 +++
board/phytec/pcm052/pcm052.c   |  13 +++
board/toradex/colibri_vf/colibri_vf.c  |  13 +++
configs/ls1021atwr_nor_lpuart_defconfig|   1 +
configs/pcm052_defconfig   |   1 +
configs/vf610twr_defconfig |   1 +
configs/vf610twr_nand_defconfig|   1 +
drivers/serial/Kconfig |   6 ++
drivers/serial/serial_lpuart.c | 148
+++--
include/configs/colibri_vf.h   |   6 +-
include/configs/ls1021atwr.h   |   1 +
include/configs/pcm052.h   |   6 +-
include/configs/vf610twr.h |   6 +-
16 files changed, 180 insertions(+), 83 deletions(-)
create mode 100644 arch/arm/include/asm/arch-ls102xa/serial.h
create mode 100644 arch/arm/include/asm/arch-vf610/serial.h

--




Please see existing patch series @
http://patchwork.ozlabs.org/patch/561855/. You can drop the ls102xa
changes and rebase your patch series on top of that. Thanks!




We are not aware of this patch set, sorry! about that. You want me to
drop
only the ls102xa changes? How about the changes/updates to the lpuart
driver? should i update them with your device tree support stuff and
rebase
the remaining patch set along with your Signed-off-by tag ?
Any suggestions ?



I believe you can:
- Drop the LPUART DM conversion patch in your series, which was already
done



I believe that the patch set[1] is now _only_ supporting device tree enabled
boards, there are boards using lpuart which are not yet having device trees,
boards like vf610twr and Phytec pcm052. Even with driver model enabled i
guess these boards canont use lpuart via platform data with this patch set.
I think it would be nice to have the support for both platform data and
device tree so that we can use it with platform data via board files and
device tree too.

Since only few boards are using lpuart driver we can update the driver
completly to driver model, drop the legacy code and update the boards.

Seems the legacy code in lpuart driver is broken:
drivers/serial/serial_lpuart.c:148:9: error: too few arguments to function
'_lpuart_serial_tstc'

I will test the patch set[1] atleast on Toradex Colibri VF50/VF61 h/w and
will provide a detailed report of my observations.


[1] http://patchwork.ozlabs.org/patch/561855/


- Drop the ls1021atwr changes, which was already done
- Do the similar changes to all other boards in your series, by
following ls1021atwr changes in my series
- There is no need to add my SOB tag in your series as I was actually
not doing anything :)


Please go ahead and post any new patches that are required here now
that Bin's series has landed.


Will submit the new patchset ASAP.



Regards,
Simon



--
Best regards,
Bhuvan
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[U-Boot] [PATCH 1/7] arm: vf: Enable lpuart support

2016-01-21 Thread Bhuvanchandra DV
Add device tree node for lpuart on Vybrid platform
---
 arch/arm/dts/vf.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/dts/vf.dtsi b/arch/arm/dts/vf.dtsi
index 78706e1..5f5bd4c 100644
--- a/arch/arm/dts/vf.dtsi
+++ b/arch/arm/dts/vf.dtsi
@@ -17,6 +17,8 @@
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
+   serial0 = &uart0;
+   serial1 = &uart1;
spi0 = &dspi0;
spi1 = &dspi1;
};
@@ -33,6 +35,18 @@
#size-cells = <1>;
ranges;
 
+   uart0: serial@40027000 {
+   compatible = "fsl,vf610-lpuart";
+   reg = <0x40027000 0x1000>;
+   status = "disabled";
+   };
+
+   uart1: serial@40028000 {
+   compatible = "fsl,vf610-lpuart";
+   reg = <0x40028000 0x1000>;
+   status = "disabled";
+   };
+
dspi0: dspi0@4002c000 {
#address-cells = <1>;
#size-cells = <0>;
-- 
2.7.0

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[U-Boot] [PATCH 5/7] dm: lpuart: Drop the legacy code

2016-01-21 Thread Bhuvanchandra DV
All boards using this driver are with device tree support,
hence drop the legacy code in driver to have a pure DT solution.
---
 drivers/serial/serial_lpuart.c | 101 +
 1 file changed, 2 insertions(+), 99 deletions(-)

diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 3f9c4d1..fc3321f 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -48,8 +48,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE;
-
 struct lpuart_serial_platdata {
struct lpuart_fsl *reg;
 };
@@ -127,43 +125,6 @@ static int _lpuart_serial_init(struct lpuart_fsl *base)
return 0;
 }
 
-#ifndef CONFIG_DM_SERIAL
-static void lpuart_serial_setbrg(void)
-{
-   _lpuart_serial_setbrg(base, gd->baudrate);
-}
-
-static int lpuart_serial_getc(void)
-{
-   return _lpuart_serial_getc(base);
-}
-
-static void lpuart_serial_putc(const char c)
-{
-   _lpuart_serial_putc(base, c);
-}
-
-static int lpuart_serial_tstc(void)
-{
-   return _lpuart_serial_tstc(base);
-}
-
-static int lpuart_serial_init(void)
-{
-   return _lpuart_serial_init(base);
-}
-
-static struct serial_device lpuart_serial_drv = {
-   .name = "lpuart_serial",
-   .start = lpuart_serial_init,
-   .stop = NULL,
-   .setbrg = lpuart_serial_setbrg,
-   .putc = lpuart_serial_putc,
-   .puts = default_serial_puts,
-   .getc = lpuart_serial_getc,
-   .tstc = lpuart_serial_tstc,
-};
-#else /* CONFIG_DM_SERIAL */
 static int lpuart_serial_setbrg(struct udevice *dev, int baudrate)
 {
struct lpuart_serial_platdata *plat = dev->platdata;
@@ -210,8 +171,8 @@ static int lpuart_serial_probe(struct udevice *dev)
 
return _lpuart_serial_init(reg);
 }
-#endif /* CONFIG_DM_SERIAL */
 #else
+
 static void _lpuart32_serial_setbrg(struct lpuart_fsl *base, int baudrate)
 {
u32 clk = CONFIG_SYS_CLK_FREQ;
@@ -281,43 +242,6 @@ static int _lpuart32_serial_init(struct lpuart_fsl *base)
return 0;
 }
 
-#ifndef CONFIG_DM_SERIAL
-static void lpuart32_serial_setbrg(void)
-{
-   _lpuart32_serial_setbrg(base, gd->baudrate);
-}
-
-static int lpuart32_serial_getc(void)
-{
-   return _lpuart32_serial_getc(base);
-}
-
-static void lpuart32_serial_putc(const char c)
-{
-   _lpuart32_serial_putc(base, c);
-}
-
-static int lpuart32_serial_tstc(void)
-{
-   return _lpuart32_serial_tstc(base);
-}
-
-static int lpuart32_serial_init(void)
-{
-   return _lpuart32_serial_init(base);
-}
-
-static struct serial_device lpuart32_serial_drv = {
-   .name = "lpuart32_serial",
-   .start = lpuart32_serial_init,
-   .stop = NULL,
-   .setbrg = lpuart32_serial_setbrg,
-   .putc = lpuart32_serial_putc,
-   .puts = default_serial_puts,
-   .getc = lpuart32_serial_getc,
-   .tstc = lpuart32_serial_tstc,
-};
-#else /* CONFIG_DM_SERIAL */
 static int lpuart32_serial_setbrg(struct udevice *dev, int baudrate)
 {
struct lpuart_serial_platdata *plat = dev->platdata;
@@ -364,28 +288,8 @@ static int lpuart32_serial_probe(struct udevice *dev)
 
return _lpuart32_serial_init(reg);
 }
-#endif /* CONFIG_DM_SERIAL */
-#endif
-
-#ifndef CONFIG_DM_SERIAL
-void lpuart_serial_initialize(void)
-{
-#ifdef CONFIG_LPUART_32B_REG
-   serial_register(&lpuart32_serial_drv);
-#else
-   serial_register(&lpuart_serial_drv);
-#endif
-}
+#endif /* CONFIG_LPUART_32B_REG */
 
-__weak struct serial_device *default_serial_console(void)
-{
-#ifdef CONFIG_LPUART_32B_REG
-   return &lpuart32_serial_drv;
-#else
-   return &lpuart_serial_drv;
-#endif
-}
-#else /* CONFIG_DM_SERIAL */
 static int lpuart_serial_ofdata_to_platdata(struct udevice *dev)
 {
struct lpuart_serial_platdata *plat = dev->platdata;
@@ -447,4 +351,3 @@ U_BOOT_DRIVER(serial_lpuart32) = {
.flags = DM_FLAG_PRE_RELOC,
 };
 #endif /* CONFIG_LPUART_32B_REG */
-#endif /* CONFIG_DM_SERIAL */
-- 
2.7.0

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[U-Boot] [PATCH 0/7] Add/enable lpuart support on Vybrid based boards

2016-01-21 Thread Bhuvanchandra DV
- Add serial support to Vybrid device tree.
- Enable lpuart support on Colibri VF50/VF61.
- Add device tree files to VF610-twr board and enable lpuart support.
- Add device tree files to pcm-052 board and enable lpuart support.
- Droped legacy code in lpuart serial driver.
- Droped non DT defconfigs for Vybrid based boards.
- Compile checked for vf610twr and pcm052  since I don't have access
  to such hardware at my end. Reviewers and testers welcome!

Bhuvanchandra DV (7):
  arm: vf: Enable lpuart support
  arm: colibri-vf: Enable serial support
  arm: vf610-twr: Add device tree files
  arm: pcm052: Add device tree files
  dm: lpuart: Drop the legacy code
  arm: vybrid: Drop enabling serial in legacy mode
  arm: vf: Remove the legacy defconfigs

 arch/arm/dts/Makefile|   4 +-
 arch/arm/dts/pcm052.dts  |  27 +++
 arch/arm/dts/vf-colibri.dtsi |  10 
 arch/arm/dts/vf.dtsi |  14 ++
 arch/arm/dts/vf610-twr.dts   |  27 +++
 configs/colibri_vf_defconfig |  11 -
 configs/colibri_vf_dtb_defconfig |   1 +
 configs/pcm052_defconfig |   6 ---
 configs/pcm052_dtb_defconfig |  10 
 configs/vf610twr_defconfig   |   9 
 configs/vf610twr_dtb_defconfig   |  13 +
 drivers/serial/serial_lpuart.c   | 101 +--
 include/configs/colibri_vf.h |   3 --
 include/configs/pcm052.h |   3 --
 include/configs/vf610twr.h   |   3 --
 15 files changed, 107 insertions(+), 135 deletions(-)
 create mode 100644 arch/arm/dts/pcm052.dts
 create mode 100644 arch/arm/dts/vf610-twr.dts
 delete mode 100644 configs/colibri_vf_defconfig
 delete mode 100644 configs/pcm052_defconfig
 create mode 100644 configs/pcm052_dtb_defconfig
 delete mode 100644 configs/vf610twr_defconfig
 create mode 100644 configs/vf610twr_dtb_defconfig

-- 
2.7.0

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[U-Boot] [PATCH 2/7] arm: colibri-vf: Enable serial support

2016-01-21 Thread Bhuvanchandra DV
---
 arch/arm/dts/vf-colibri.dtsi | 10 ++
 configs/colibri_vf_dtb_defconfig |  1 +
 2 files changed, 11 insertions(+)

diff --git a/arch/arm/dts/vf-colibri.dtsi b/arch/arm/dts/vf-colibri.dtsi
index 7a8e9bee..0718486 100644
--- a/arch/arm/dts/vf-colibri.dtsi
+++ b/arch/arm/dts/vf-colibri.dtsi
@@ -10,6 +10,12 @@
  */
 #include "vf.dtsi"
 
+/ {
+   chosen {
+   stdout-path = &uart0;
+   };
+};
+
 &dspi1 {
status = "okay";
bus-num = <1>;
@@ -19,3 +25,7 @@
spi-max-frequency = <5000>;
};
 };
+
+&uart0 {
+   status = "okay";
+};
diff --git a/configs/colibri_vf_dtb_defconfig b/configs/colibri_vf_dtb_defconfig
index b1a843a..b204fb8 100644
--- a/configs/colibri_vf_dtb_defconfig
+++ b/configs/colibri_vf_dtb_defconfig
@@ -11,4 +11,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_NAND_VF610_NFC=y
 CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y
+CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
-- 
2.7.0

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[U-Boot] [PATCH 3/7] arm: vf610-twr: Add device tree files

2016-01-21 Thread Bhuvanchandra DV
Add device tree files and enable serial support
---
 arch/arm/dts/Makefile  |  3 ++-
 arch/arm/dts/vf610-twr.dts | 27 +++
 configs/vf610twr_dtb_defconfig | 13 +
 3 files changed, 42 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/vf610-twr.dts
 create mode 100644 configs/vf610twr_dtb_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f66ff41..c6fb50c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -190,7 +190,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-cubieboard4.dtb
 
 dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
-   vf610-colibri.dtb
+   vf610-colibri.dtb \
+   vf610-twr.dtb
 
 dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
new file mode 100644
index 000..8f86a80
--- /dev/null
+++ b/arch/arm/dts/vf610-twr.dts
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2016 Toradex AG
+ *
+ * SPDX-License-Identifier: GPL-2.0+ or X11
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "vf.dtsi"
+
+/ {
+   model = "VF610 Tower Board";
+   compatible = "fsl,vf610-twr", "fsl,vf610";
+
+   choosen {
+   stdout-path = &uart1;
+   };
+
+};
+
+&uart1 {
+   status = "okay";
+};
diff --git a/configs/vf610twr_dtb_defconfig b/configs/vf610twr_dtb_defconfig
new file mode 100644
index 000..24a7223
--- /dev/null
+++ b/configs/vf610twr_dtb_defconfig
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_TARGET_VF610TWR=y
+CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_MMC"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_NAND_VF610_NFC=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPI_FLASH=y
+CONFIG_DM=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
-- 
2.7.0

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[U-Boot] [PATCH 6/7] arm: vybrid: Drop enabling serial in legacy mode

2016-01-21 Thread Bhuvanchandra DV
Remove the legacy way of handling serial ports on Vybrid based
boards since lpuart driver now only supports DT mode.
---
 include/configs/colibri_vf.h | 3 ---
 include/configs/pcm052.h | 3 ---
 include/configs/vf610twr.h   | 3 ---
 3 files changed, 9 deletions(-)

diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 5aed3a5..e17f76a 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -36,13 +36,10 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define LPUART_BASEUART0_BASE
-
 /* Allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 #define CONFIG_VERSION_VARIABLE
-#define CONFIG_SYS_UART_PORT   (0)
 #define CONFIG_BAUDRATE115200
 #define CONFIG_CMD_ASKENV
 
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 891bdb0..f3353f2 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -27,11 +27,8 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define LPUART_BASEUART1_BASE
-
 /* Allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_UART_PORT   (1)
 #define CONFIG_BAUDRATE115200
 
 #undef CONFIG_CMD_IMLS
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index dcfafaf..84ad2c3 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -34,11 +34,8 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define LPUART_BASEUART1_BASE
-
 /* Allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_UART_PORT   (1)
 #define CONFIG_BAUDRATE115200
 
 /* NAND support */
-- 
2.7.0

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[U-Boot] [PATCH 4/7] arm: pcm052: Add device tree files

2016-01-21 Thread Bhuvanchandra DV
Add device tree files and enable serial support
---
 arch/arm/dts/Makefile|  3 ++-
 arch/arm/dts/pcm052.dts  | 27 +++
 configs/pcm052_dtb_defconfig | 10 ++
 3 files changed, 39 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/pcm052.dts
 create mode 100644 configs/pcm052_dtb_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c6fb50c..b3bde5a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -191,7 +191,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \
 
 dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
vf610-colibri.dtb \
-   vf610-twr.dtb
+   vf610-twr.dtb \
+   pcm052.dtb
 
 dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
diff --git a/arch/arm/dts/pcm052.dts b/arch/arm/dts/pcm052.dts
new file mode 100644
index 000..068ba2f
--- /dev/null
+++ b/arch/arm/dts/pcm052.dts
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2016 Toradex AG
+ *
+ * SPDX-License-Identifier: GPL-2.0+ or X11
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "vf.dtsi"
+
+/ {
+   model = "Phytec phyCORE-Vybrid";
+   compatible = "phytec,pcm052", "fsl,vf610";
+
+   choosen {
+   stdout-path = &uart1;
+   };
+
+};
+
+&uart1 {
+   status = "okay";
+};
diff --git a/configs/pcm052_dtb_defconfig b/configs/pcm052_dtb_defconfig
new file mode 100644
index 000..877d973
--- /dev/null
+++ b/configs/pcm052_dtb_defconfig
@@ -0,0 +1,10 @@
+CONFIG_ARM=y
+CONFIG_TARGET_PCM052=y
+CONFIG_DEFAULT_DEVICE_TREE="pcm-052"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg,ENV_IS_IN_NAND"
+CONFIG_NAND_VF610_NFC=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_DM=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
-- 
2.7.0

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[U-Boot] [PATCH 7/7] arm: vf: Remove the legacy defconfigs

2016-01-21 Thread Bhuvanchandra DV
Let's go with pure DT solution!
Since in long run U-Boot anyway is evolving to pure DT solution.
---
 configs/colibri_vf_defconfig | 11 ---
 configs/pcm052_defconfig |  6 --
 configs/vf610twr_defconfig   |  9 -
 3 files changed, 26 deletions(-)
 delete mode 100644 configs/colibri_vf_defconfig
 delete mode 100644 configs/pcm052_defconfig
 delete mode 100644 configs/vf610twr_defconfig

diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
deleted file mode 100644
index 45917c8..000
--- a/configs/colibri_vf_defconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_COLIBRI_VF=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,ENV_IS_IN_NAND,IMX_NAND"
-CONFIG_SYS_PROMPT="Colibri VFxx # "
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_GPIO=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_DM=y
-CONFIG_NAND_VF610_NFC=y
-CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y
-CONFIG_FSL_LPUART=y
diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
deleted file mode 100644
index 26ab733..000
--- a/configs/pcm052_defconfig
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_PCM052=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg,ENV_IS_IN_NAND"
-CONFIG_NAND_VF610_NFC=y
-CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
-CONFIG_FSL_LPUART=y
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
deleted file mode 100644
index d51c93b..000
--- a/configs/vf610twr_defconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_VF610TWR=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_MMC"
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_NAND_VF610_NFC=y
-CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
-CONFIG_SPI_FLASH=y
-CONFIG_FSL_LPUART=y
-- 
2.7.0

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Re: [U-Boot] [PATCH] armv8/ls1043a: Implement workaround for erratum A009660

2016-01-21 Thread Mingkai Hu


> -Original Message-
> From: Mingkai Hu
> Sent: Thursday, January 21, 2016 11:18 AM
> To: york sun; Mingkai Hu; u-boot@lists.denx.de
> Subject: RE: [PATCH] armv8/ls1043a: Implement workaround for erratum
> A009660
> 
> 
> 
> > -Original Message-
> > From: york sun
> > Sent: Thursday, January 21, 2016 12:21 AM
> > To: Mingkai Hu; u-boot@lists.denx.de
> > Cc: Mingkai Hu
> > Subject: Re: [PATCH] armv8/ls1043a: Implement workaround for erratum
> > A009660
> >
> > On 01/19/2016 10:44 PM, Mingkai Hu wrote:
> > > From: Mingkai Hu 
> > >
> > > Memory controller performance is not optimal with default internal
> > > target queue register value, write required value for optimal DDR
> > > performance.
> > >
> > > Signed-off-by: Mingkai Hu 
> > > ---
> > >  arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 13 +
> > >  arch/arm/include/asm/arch-fsl-layerscape/config.h |  1 +
> > >  2 files changed, 14 insertions(+)
> > >
> > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > > b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > > index 23d6b73..485f5cd 100644
> > > --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > > @@ -210,6 +210,18 @@ static void erratum_a009929(void)  #endif  }
> > >
> > > +/*
> > > + * This erratum requires setting a value to eddrtqcr1 to
> > > + * optimal the DDR performance.
> > > + */
> > > +static void erratum_a009660(void)
> > > +{
> > > +#ifdef CONFIG_SYS_FSL_ERRATUM_A009660
> > > + u32 *eddrtqcr1 = (void *)CONFIG_SYS_FSL_SCFG_ADDR + 0x20c;
> > > + out_be32(eddrtqcr1, 0x63b20042);
> > > +#endif
> > > +}
> > > +
> > >  void fsl_lsch2_early_init_f(void)
> > >  {
> > >   struct ccsr_cci400 *cci = (struct ccsr_cci400
> > > *)CONFIG_SYS_CCI400_ADDR; @@ -232,6 +244,7 @@ void
> > > fsl_lsch2_early_init_f(void)
> > >
> > >   /* Erratum */
> > >   erratum_a009929();
> > > + erratum_a009660();
> > >  }
> > >  #endif
> > >
> > > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > > b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > > index 49b113d..66399b2 100644
> > > --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > > +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > > @@ -167,6 +167,7 @@
> > >  #define GICC_BASE0x01402000
> > >
> > >  #define CONFIG_SYS_FSL_ERRATUM_A009929
> > > +#define CONFIG_SYS_FSL_ERRATUM_A009660
> > >  #else
> > >  #error SoC not defined
> > >  #endif
> > >
> >
> > NACK.
> >
> > Erratum A009660 is cancelled. The workaround is integrated into A008514.
> > Please revise workaround for A008514. Besides, you are using ARMv7
> > offset for ARMv8.
> > Please check if this workaround applies to LS2 SoCs. While you are on
> > it, please add a comment to LS1 workaround with the word A008514 so we
> > can grep it.
> >
> 
> Hi York,
> 
> I discussed with design team and got the erratum in LS1043A CE before
> preparing the patch. The value (0x63b20042) is the same one described in
> A008514 of LS1021A and the register offset of LS1043A is same with the
> one used for LS1021A which is in the SCFG space.
> 
> I will double check with the design team about if the erraum number is
> still A009660 and keep you in the loop.
> 
> For LS2, I got the A008514 in the LS2085A CE, but 1. The value is
> 63b2_0002 which is different from the value used on ls1043 platform.
> 2. The address is in DCFG space.
> 3. I did not get the A008514 in the LS2080A CE (RevD).
> 
> So it's better to confirm with design team about the value used and the
> consistence between LS2085A and LS2080A.
> 
York,

As discussed with design team, the erratum A009660 is the correct one and the 
value/offset is also correct.

Do you prefer to submit a new patch to fix ls2085 or fix it on this patch?

> Thanks,
> Mingkai
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