Re: [U-Boot] Sunxi (Allwinner A20) GPIO problems on u-boot 2016.1 and 2016.3-rc3 but not on 2015.10

[Hans de Goede]

Hi,

On 03-03-16 17:54, Hendrik wrote:

Hello Hans,

Thank you very much for your message. The PIO program reported 
'PE6<0><0><1><1>' for both U-Boots but changing the configuration's 
CONFIG_AXP_ALDO3_VOLT and CONFIG_AXP_ALDO4_VOLT back to 2800 did indeed solve the problem. I can run 
U-Boot 2016.01 now and control PE6 properly.

LDO3 is connected to pin F19 in the Olimex schematics (VCC_CSI0, in the A20 
datasheet mentioned as Port E Power Supply) and LDO4 is connected to pin E18 
(VCC_CSI1 mentioned as Port G Power Supply).

So would the change in u-boot make sense by setting the default to 0 now? I'm 
not sure if the git remark 'LDO3 and LDO4 are normally either unused, or used 
to power csi attached camera sensors' is correct as it seems (also?) to be the 
source or reference for the A20 chip pins itself..? At least this is the case 
for multiple (all?) Olimex A10/A20 boards (I checked A20-SOM, A20-LIME2, 
A20-Lime and A10-Lime).


The using of ldo3/4 for pins which are on a general header seems to be an 
olimex board thing, I've checked a few non olimex schematics:

-cubieboard: has E18 / E19 connected to VCC-3V3
-cubietruck: has E18 / E19 connected to VCC-3V3
-bananapi: has E18 connected to VCC-3V3, E19 to VCC-CSI which seems to come 
from the camera connector
-orangepi: has E18 / VCC-PE connected to VCC-3V3, E19 to VCC-CSI0 which comes 
from a dedicated LDO, not one the axp ldo-s
-orangepi-mini: has E18 / VCC-PE connected to VCC-3V3, E19 to VCC-CSI0 which 
comes from a dedicated LDO, not one the axp ldo-s

Also note that even if you enable LDO3 and LDO4 in the boot-loader,
the kernel will go and turn them off as soon as it is done booting,
the fact that it doesn't for you means that you probably do not
have the dts bits for the kernel to properly control the
axp209 regulators yet, as soon as you add this ldo3 and ldo4
will get turned off after kernel boot, unless you spcecificaly
declare them as always-on in the dts.

With that said, I will happily accept u-boot patches to
enable LDO3 / LDO4 for Olimex boards where the PE / PF
pins are connected to a general purpose header.

Regards,

Hans
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[U-Boot] [PATCHv3 1/2] power: as3722: Allow using on any i2c bus with any address

[Julian Scheel]

From: Alban Bedel 

The init simply hardcoded the i2c bus and address to those used on
jetson. Extend the init function to take the bus number and device
address as parameter. As only jetson is using this code for now just
fix this single use of the function.

Signed-off-by: Alban Bedel 
Reviewed-by: Julian Scheel 
Signed-off-by: Julian Scheel 
---
Changes in v2:
 - add signed off by me
---
 arch/arm/mach-tegra/board2.c | 2 +-
 board/nvidia/jetson-tk1/jetson-tk1.c | 2 +-
 drivers/power/as3722.c   | 4 +---
 include/power/as3722.h   | 2 +-
 4 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index ac274e1..55c50df 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -148,7 +148,7 @@ int board_init(void)
 #  endif
 # endif /* CONFIG_TEGRA_PMU */
 #ifdef CONFIG_AS3722_POWER
-   err = as3722_init(NULL);
+   err = as3722_init(NULL, 0, 0x40);
if (err && err != -ENODEV)
return err;
 #endif
diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c 
b/board/nvidia/jetson-tk1/jetson-tk1.c
index 14f0ce5..7f16a4a 100644
--- a/board/nvidia/jetson-tk1/jetson-tk1.c
+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
@@ -39,7 +39,7 @@ int tegra_pcie_board_init(void)
struct udevice *pmic;
int err;
 
-   err = as3722_init();
+   err = as3722_init(, 0, 0x40);
if (err) {
error("failed to initialize AS3722 PMIC: %d\n", err);
return err;
diff --git a/drivers/power/as3722.c b/drivers/power/as3722.c
index c09e1de..321d65d 100644
--- a/drivers/power/as3722.c
+++ b/drivers/power/as3722.c
@@ -243,12 +243,10 @@ int as3722_get(struct udevice **devp)
return i2c_get_chip_for_busnum(bus, address, 1, devp);
 }
 
-int as3722_init(struct udevice **devp)
+int as3722_init(struct udevice **devp, unsigned int bus, unsigned int address)
 {
struct udevice *pmic;
u8 id, revision;
-   const unsigned int bus = 0;
-   const unsigned int address = 0x40;
int err;
 
err = i2c_get_chip_for_busnum(bus, address, 1, );
diff --git a/include/power/as3722.h b/include/power/as3722.h
index 0f22482..c37b43a 100644
--- a/include/power/as3722.h
+++ b/include/power/as3722.h
@@ -14,7 +14,7 @@
 
 struct udevice;
 
-int as3722_init(struct udevice **devp);
+int as3722_init(struct udevice **devp, unsigned int bus, unsigned int address);
 int as3722_sd_enable(struct udevice *pmic, unsigned int sd);
 int as3722_sd_set_voltage(struct udevice *pmic, unsigned int sd, u8 value);
 int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo);
-- 
2.7.1

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[U-Boot] [PATCHv3 2/2] Add support the Avionic Design Meerkat COM and Kein Baseboard

[Julian Scheel]

Add support for platforms based on the Meerkat COM module. Includes support
for the minimal reference platform called Kein Baseboard, which in fact is
sufficient to run most existing Meerkat carriers.

Signed-off-by: Julian Scheel 
---
Changes in v3:
 - Remove bad as3722 gpio manipulations on pcie init (this time for real)

Changes in v2:
 - Rename config options to TARGET_KEIN_BASEBOARD
 - Remove unnecessary CONFIG options from kein-baseboard.h
 - Add clocks to meerkat dtsi, as it was removed from tegra124-dtsi lately
---
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/tegra124-kein-baseboard.dts   |  66 
 arch/arm/dts/tegra124-meerkat.dtsi | 408 +
 arch/arm/mach-tegra/tegra124/Kconfig   |   9 +
 board/avionic-design/common/meerkat.c  |  57 +++
 .../avionic-design/common/pinmux-config-meerkat.h  | 233 
 board/avionic-design/kein-baseboard/Kconfig|  15 +
 board/avionic-design/kein-baseboard/MAINTAINERS|   7 +
 board/avionic-design/kein-baseboard/Makefile   |   9 +
 configs/kein-baseboard_defconfig   |  21 ++
 include/configs/kein-baseboard.h   |  74 
 11 files changed, 900 insertions(+)
 create mode 100644 arch/arm/dts/tegra124-kein-baseboard.dts
 create mode 100644 arch/arm/dts/tegra124-meerkat.dtsi
 create mode 100644 board/avionic-design/common/meerkat.c
 create mode 100644 board/avionic-design/common/pinmux-config-meerkat.h
 create mode 100644 board/avionic-design/kein-baseboard/Kconfig
 create mode 100644 board/avionic-design/kein-baseboard/MAINTAINERS
 create mode 100644 board/avionic-design/kein-baseboard/Makefile
 create mode 100644 configs/kein-baseboard_defconfig
 create mode 100644 include/configs/kein-baseboard.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b574284..5452e69 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -41,6 +41,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra30-tec-ng.dtb \
tegra114-dalmore.dtb \
tegra124-jetson-tk1.dtb \
+   tegra124-kein-baseboard.dtb \
tegra124-nyan-big.dtb \
tegra124-venice2.dtb \
tegra210-e2220-1170.dtb \
diff --git a/arch/arm/dts/tegra124-kein-baseboard.dts 
b/arch/arm/dts/tegra124-kein-baseboard.dts
new file mode 100644
index 000..75a0b99
--- /dev/null
+++ b/arch/arm/dts/tegra124-kein-baseboard.dts
@@ -0,0 +1,66 @@
+/dts-v1/;
+
+#include "tegra124-meerkat.dtsi"
+
+/ {
+   model = "Avionic Design Kein Baseboard";
+   compatible = "ad,kein-baseboard", "ad,meerkat", "nvidia,tegra124";
+
+   chosen {
+   stdout-path = 
+   };
+
+   serial@70006300 {
+   status = "okay";
+   };
+
+   sdhci@700b0400 {
+   status = "okay";
+   };
+
+   usb@7d00 {
+   status = "okay";
+   };
+
+   usb@7d004000 {
+   status = "okay";
+   };
+
+   usb@7d008000 {
+   status = "okay";
+   };
+
+   pcie-controller@01003000 {
+   status = "okay";
+
+   pci@1,0 {
+   status = "okay";
+   };
+
+   pci@2,0 {
+   status = "okay";
+   };
+   };
+
+   regulators {
+   vdd_5v0: regulator@100 {
+   compatible = "regulator-fixed";
+   reg = <100>;
+   regulator-name = "+VDD_5V";
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vdd_3v3: regulator@101 {
+   compatible = "regulator-fixed";
+   reg = <101>;
+   regulator-name = "+VDD_3V3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+   };
+};
diff --git a/arch/arm/dts/tegra124-meerkat.dtsi 
b/arch/arm/dts/tegra124-meerkat.dtsi
new file mode 100644
index 000..a056542
--- /dev/null
+++ b/arch/arm/dts/tegra124-meerkat.dtsi
@@ -0,0 +1,408 @@
+
+#include "tegra124.dtsi"
+
+/ {
+   model = "Avionic-Design Meerkat";
+   compatible = "ad,meerkat", "nvidia,tegra124";
+
+   aliases {
+   i2c0 = "/i2c@7000c000";
+   i2c1 = "/i2c@7000c400";
+   i2c2 = "/i2c@7000c500";
+   i2c3 = "/i2c@7000c700";
+   i2c4 = "/i2c@7000d000";
+   i2c5 = "/i2c@7000d100";
+
+   sdhci0 = "/sdhci@700b0600";
+   sdhci1 = "/sdhci@700b0400";
+
+   usb0 = "/usb@7d00";
+   usb1 = "/usb@7d008000";
+   };
+
+   

Re: [U-Boot] U-Boot as first bootloader on Exynos platforms

[Paul Kocialkowski]

Hi,

Le mardi 01 mars 2016 à 06:27 -0700, Simon Glass a écrit :
> On 1 March 2016 at 01:10, Paul Kocialkowski  wrote:
> > Hi,
> > Le lundi 29 février 2016 à 19:03 -0700, Simon Glass a écrit :
> > > On 29 February 2016 at 03:15, Lukasz Majewski 
> > > wrote:
> > > > > I was told some time ago that a publicly-available version of the
> > > > > Samsung Chromebook 2 (supposedly, the one with an Exynos 5800 SoC)
> > > > > allows running unsigned code (the U-Boot SPL) directly after the
> > > > > bootrom. Is that correct?
> > > > > 
> > > > > Do you know of any (other) publicly available device with an Exynos
> > > > > SoC that doesn't check for the first bootloader's signature, and thus
> > > > > could load the U- Boot SPL without any intermediary signed stage on
> > > > > storage memory?
> > > > 
> > > > For sure Odroid XU3 needs signed SPL to boot up, so this devel board
> > > > will not work for you.
> > > 
> > > You can use snow which is Chromebook 1, or pit / pi which are
> > > Chromebook 2. I have not tried its 'BL1' with Odroid XU3 but I doubt
> > > it will work.
> > 
> > I know those have U-Boot support, but do any of them work without the
> > proprietary and signed on-memory first stage bootloaders?
> > 
> > I was told that at least snow's bootrom checks the signature of the first
> > bootloader it loads from memory. Is it the case for all Exynos devices?
> 
> I think that is true for all. But in the case of these Chromebooks,
> the BL1 does not check the signature of the image it loads, which
> breaks the chain. For Chrome OS, this kind of restriction is not
> useful, since the user should be able to run their own software on the
> platform. I'm really not sure why XU3 cannot do this too.

Thanks for the clarification!

-- 
Paul Kocialkowski, low-level free software developer on embedded devices

Website: https://www.paulk.fr/
Coding blog: https://code.paulk.fr/
Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/


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[U-Boot] [PATCH] pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIER

[Masahiro Yamada]

CONFIG_PINCTRL_UNIPHIER is more suitable than CONFIG_ARCH_UNIPHIER
to guard the drivers/pinctrl/uniphier directory.

The current CONFIG_PINCTRL_UNIPHIER_CORE is a bit long, so rename it
into CONFIG_PINCTRL_UNIPHIER.

Signed-off-by: Masahiro Yamada 
---

 drivers/pinctrl/Makefile  |  2 +-
 drivers/pinctrl/uniphier/Kconfig  | 14 +++---
 drivers/pinctrl/uniphier/Makefile |  2 +-
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index d7b6180..37dc904 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -9,5 +9,5 @@ obj-y   += nxp/
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_PINCTRL_SANDBOX)  += pinctrl-sandbox.o
 
-obj-$(CONFIG_ARCH_UNIPHIER)+= uniphier/
+obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
 obj-$(CONFIG_PIC32_PINCTRL)+= pinctrl_pic32.o
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig
index 2ff616e..33d6763 100644
--- a/drivers/pinctrl/uniphier/Kconfig
+++ b/drivers/pinctrl/uniphier/Kconfig
@@ -1,42 +1,42 @@
 if ARCH_UNIPHIER
 
-config PINCTRL_UNIPHIER_CORE
+config PINCTRL_UNIPHIER
bool
 
 config PINCTRL_UNIPHIER_PH1_LD4
bool "UniPhier PH1-LD4 SoC pinctrl driver"
depends on ARCH_UNIPHIER_PH1_LD4
default y
-   select PINCTRL_UNIPHIER_CORE
+   select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_PH1_PRO4
bool "UniPhier PH1-Pro4 SoC pinctrl driver"
depends on ARCH_UNIPHIER_PH1_PRO4
default y
-   select PINCTRL_UNIPHIER_CORE
+   select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_PH1_SLD8
bool "UniPhier PH1-sLD8 SoC pinctrl driver"
depends on ARCH_UNIPHIER_PH1_SLD8
default y
-   select PINCTRL_UNIPHIER_CORE
+   select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_PH1_PRO5
bool "UniPhier PH1-Pro5 SoC pinctrl driver"
depends on ARCH_UNIPHIER_PH1_PRO5
default y
-   select PINCTRL_UNIPHIER_CORE
+   select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_PROXSTREAM2
bool "UniPhier ProXstream2 SoC pinctrl driver"
depends on ARCH_UNIPHIER_PROXSTREAM2
default y
-   select PINCTRL_UNIPHIER_CORE
+   select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_PH1_LD6B
bool "UniPhier PH1-LD6b SoC pinctrl driver"
depends on ARCH_UNIPHIER_PH1_LD6B
default y
-   select PINCTRL_UNIPHIER_CORE
+   select PINCTRL_UNIPHIER
 
 endif
diff --git a/drivers/pinctrl/uniphier/Makefile 
b/drivers/pinctrl/uniphier/Makefile
index c5cdd84..3667bd3 100644
--- a/drivers/pinctrl/uniphier/Makefile
+++ b/drivers/pinctrl/uniphier/Makefile
@@ -2,7 +2,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-$(CONFIG_PINCTRL_UNIPHIER_CORE)+= pinctrl-uniphier-core.o
+obj-y  += pinctrl-uniphier-core.o
 
 obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o
 obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4)+= pinctrl-ph1-pro4.o
-- 
1.9.1

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[U-Boot] [PATCH] pinctrl: uniphier: set input-enable before pin-muxing

[Masahiro Yamada]

While IECTRL is disabled, input signals are pulled-down internally.
If pin-muxing is set up first, glitch signals (Low to High transition)
might be input to hardware blocks.

Bad case scenario:
[1] The hardware block is already running before pinctrl is handled.
   (the reset is de-asserted by default or by a firmware, for example)
[2] The pin-muxing is set up.  The input signals to hardware block
   are pulled-down by the chip-internal biasing.
[3] The pins are input-enabled.  The signals from the board reach the
hardware block.

Actually, one invalid character is input to the UART blocks for such
SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the
power on reset.

To avoid such problems, pins should be input-enabled before muxing.

[ ported from Linux commit bac7f4c1bf5e7c6ccd5bb71edc015b26c77f7460 ]

Fixes: 5dc626f83619 ("pinctrl: uniphier: add UniPhier pinctrl core support")
Signed-off-by: Masahiro Yamada 
---

 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c 
b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index 37a920c..ffdccab 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -74,6 +74,9 @@ static void uniphier_pinmux_set_one(struct udevice *dev, 
unsigned pin,
unsigned reg, reg_end, shift, mask;
u32 tmp;
 
+   /* some pins need input-enabling */
+   uniphier_pinconf_input_enable(dev, pin);
+
reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
reg_end = reg + reg_stride;
shift = pin * mux_bits % 32;
@@ -94,9 +97,6 @@ static void uniphier_pinmux_set_one(struct udevice *dev, 
unsigned pin,
 
if (priv->socdata->load_pinctrl)
writel(1, priv->base + UNIPHIER_PINCTRL_LOAD_PINMUX);
-
-   /* some pins need input-enabling */
-   uniphier_pinconf_input_enable(dev, pin);
 }
 
 static int uniphier_pinmux_group_set(struct udevice *dev,
-- 
1.9.1

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[U-Boot] [PATCH] ARM: uniphier: fix build error when CONFIG_CMD_DDRMPHY_DUMP=y

[Masahiro Yamada]

The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit
46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data").

Fixes: 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data")
Signed-off-by: Masahiro Yamada 
---

 arch/arm/mach-uniphier/dram/cmd_ddrmphy.c | 18 ++
 1 file changed, 2 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c 
b/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c
index c18f099..7ac9378 100644
--- a/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c
+++ b/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c
@@ -28,28 +28,14 @@ static int get_nr_ch(void)
 {
const struct uniphier_board_data *bd = uniphier_get_board_param();
 
-   return bd->dram_ch2_width ? 3 : 2;
+   return bd->dram_ch[2].size ? 3 : 2;
 }
 
 static int get_nr_datx8(int ch)
 {
-   unsigned int width;
-
const struct uniphier_board_data *bd = uniphier_get_board_param();
 
-   switch (ch) {
-   case 0:
-   width = bd->dram_ch0_width;
-   break;
-   case 1:
-   width = bd->dram_ch1_width;
-   break;
-   default:
-   width = bd->dram_ch2_width;
-   break;
-   }
-
-   return width / 8;
+   return bd->dram_ch[ch].width / 8;
 }
 
 static void print_bdl(void __iomem *reg, int n)
-- 
1.9.1

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[U-Boot] [PATCH 3/3] OMAP3: am3517_evm: Misc. comment and option cleanup

[Derald D. Woods]

- Make comment 'one-liners' truly one line
- Drop some CFI verbage and definitions
  * NOR Support needs to be added with current conventions

Signed-off-by: Derald D. Woods 
---
 include/configs/am3517_evm.h | 255 +++
 1 file changed, 111 insertions(+), 144 deletions(-)

diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 734b8ba..5b689a8 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -13,14 +13,17 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_CACHELINE_SIZE  64
+/* High Level Configuration Options */
 
-/*
- * High Level Configuration Options
- */
-#define CONFIG_OMAP1   /* in a TI OMAP core */
-#define CONFIG_OMAP3_AM3517EVM 1   /* working with AM3517EVM */
+#define CONFIG_OMAP
 #define CONFIG_OMAP_COMMON
+
+#define CONFIG_SYS_CACHELINE_SIZE  64
+
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_NR_DRAM_BANKS   2   /* CS1 may or may not be populated */
+
 /* Common ARM Erratas */
 #define CONFIG_ARM_ERRATA_454179
 #define CONFIG_ARM_ERRATA_430973
@@ -28,59 +31,48 @@
 
 #define CONFIG_EMIF4   /* The chip has EMIF4 controller */
 
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x8010 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE   0x8010
+#define CONFIG_SYS_SPL_MALLOC_START0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10
+
 #include   /* get chip and board defs */
 #include 
 
-/*
- * Display CPU and Board information
- */
+/* Display CPU and Board information */
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
-
-/* Clock Defines */
-#define V_OSCK 2600/* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-#define CONFIG_MISC_INIT_R
-
 #define CONFIG_OF_LIBFDT
-
+#define CONFIG_MISC_INIT_R
 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 
-/*
- * Size of malloc() pool
- */
-#define CONFIG_ENV_SIZE(128 << 10) /* 128 KiB 
sector */
+/* Clock Defines */
+#define V_OSCK 2600/* Clock output from T2 */
+#define V_SCLK (V_OSCK >> 1)
+
+/* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN  (16 << 20)
-/*
- * DDR related
- */
-#define CONFIG_SYS_CS0_SIZE(256 * 1024 * 1024)
 
-/*
- * Hardware drivers
- */
+/* Hardware drivers */
 
-/*
- * OMAP GPIO configuration
- */
+/* OMAP GPIO configuration */
 #define CONFIG_OMAP_GPIO
 
-/*
- * NS16550 Configuration
- */
+/* NS16550 Configuration */
 #define V_NS16550_CLK  4800/* 48MHz (APLL96/2) */
-
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE(-4)
 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
 
-/*
- * select serial console configuration
- */
+/* select serial console configuration */
 #define CONFIG_CONS_INDEX  3
 #define CONFIG_SYS_NS16550_COM3OMAP34XX_UART3
 #define CONFIG_SERIAL3 3   /* UART3 on AM3517 EVM */
@@ -90,6 +82,8 @@
 #define CONFIG_BAUDRATE115200
 #define CONFIG_SYS_BAUDRATE_TABLE  {4800, 9600, 19200, 38400, 57600,\
115200}
+
+/* SD/MMC */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
 #define CONFIG_OMAP_HSMMC
@@ -111,7 +105,6 @@
 
 #define CONFIG_USB_STORAGE
 #define CONGIG_CMD_STORAGE
-#define CONFIG_CMD_FAT
 
 #ifdef CONFIG_USB_KEYBOARD
 #define CONFIG_SYS_USB_EVENT_POLL
@@ -129,33 +122,29 @@
 #endif /* CONFIG_USB_MUSB_AM35X */
 
 /* commands to include */
+#define CONFIG_CMD_NAND
 #define CONFIG_CMD_CACHE
-#define CONFIG_CMD_FAT /* FAT support  */
-#define CONFIG_CMD_EXT2/* EXT2 Support */
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
 #define CONFIG_CMD_EXT4
 #define CONFIG_CMD_EXT4_WRITE
 #define CONFIG_CMD_FS_GENERIC
-#define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
 #define CONFIG_CMD_ASKENV
-
 #define CONFIG_CMD_BOOTZ
-
-#define CONFIG_CMD_I2C /* I2C serial bus support   */
-#define CONFIG_CMD_MMC /* MMC support  */
-#define CONFIG_CMD_NAND/* NAND support */
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MMC
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_MTDPARTS
 
-#define CONFIG_SYS_NO_FLASH
+/* I2C */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED10
 #define CONFIG_SYS_OMAP24_I2C_SLAVE1
 #define CONFIG_SYS_I2C_OMAP34XX
 
-/*
- * Ethernet
- */
+/* Ethernet */
 #define CONFIG_DRIVER_TI_EMAC
 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 #define 

[U-Boot] [PATCH 1/3] OMAP3: am3517_evm: Use BCH8 ECC for NAND

[Derald D. Woods]

Select 8-bit BCH ecc-scheme with s/w based error correction
- OMAP_ECC_BCH8_CODE_HW_DETECTION_SW

Signed-off-by: Derald D. Woods 
---
 include/configs/am3517_evm.h | 23 ---
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 4d662ad..98a59c5 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -328,8 +328,8 @@
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_TEXT_BASE   0x40200800
-#define CONFIG_SPL_MAX_SIZE(54 * 1024) /* 8 KB for stack */
+#define CONFIG_SPL_TEXT_BASE   0x4020
+#define CONFIG_SPL_MAX_SIZE(64 * 1024)
 
 #define CONFIG_SPL_BSS_START_ADDR  0x8000
 #define CONFIG_SPL_BSS_MAX_SIZE0x8 /* 512 KB */
@@ -354,17 +354,26 @@
 #define CONFIG_SPL_LDSCRIPT"$(CPUDIR)/omap-common/u-boot-spl.lds"
 
 /* NAND boot config */
+#define CONFIG_BCH
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT 64
 #define CONFIG_SYS_NAND_PAGE_SIZE  2048
 #define CONFIG_SYS_NAND_OOBSIZE64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
-   10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCPOS { 2,  3,  4,  5,  6,  7,  8,  9, 10, \
+11, 12, 13, 14, 16, 17, 18, 19, 20, \
+21, 22, 23, 24, 25, 26, 27, 28, 30, \
+31, 32, 33, 34, 35, 36, 37, 38, 39, \
+40, 41, 42, 44, 45, 46, 47, 48, 49, \
+50, 51, 52, 53, 54, 55, 56 }
+
 #define CONFIG_SYS_NAND_ECCSIZE512
-#define CONFIG_SYS_NAND_ECCBYTES   3
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
+#define CONFIG_SYS_NAND_ECCBYTES   13
+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_MAX_OOBFREE2
+#define CONFIG_SYS_NAND_MAX_ECCPOS 56
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS0x8
 
-- 
2.7.2

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[U-Boot] [PATCH 2/3] OMAP3: am3517_evm: Replace JFFS2 with UBI/UBIFS on NAND

[Derald D. Woods]

Signed-off-by: Derald D. Woods 
---
 configs/am3517_evm_defconfig |   2 +
 include/configs/am3517_evm.h | 102 +++
 2 files changed, 66 insertions(+), 38 deletions(-)

diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index cde84fe..c7699e0 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -4,9 +4,11 @@ CONFIG_TARGET_AM3517_EVM=y
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_SYS_PROMPT="AM3517_EVM # "
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_GPIO=y
 CONFIG_SYS_NS16550=y
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 98a59c5..734b8ba 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -34,8 +34,8 @@
 /*
  * Display CPU and Board information
  */
-#define CONFIG_DISPLAY_CPUINFO 1
-#define CONFIG_DISPLAY_BOARDINFO   1
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
 
 /* Clock Defines */
 #define V_OSCK 2600/* Clock output from T2 */
@@ -45,16 +45,16 @@
 
 #define CONFIG_OF_LIBFDT
 
-#define CONFIG_CMDLINE_TAG 1   /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
-#define CONFIG_REVISION_TAG1
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
 
 /*
  * Size of malloc() pool
  */
 #define CONFIG_ENV_SIZE(128 << 10) /* 128 KiB 
sector */
-#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (128 << 10))
+#define CONFIG_SYS_MALLOC_LEN  (16 << 20)
 /*
  * DDR related
  */
@@ -90,10 +90,10 @@
 #define CONFIG_BAUDRATE115200
 #define CONFIG_SYS_BAUDRATE_TABLE  {4800, 9600, 19200, 38400, 57600,\
115200}
-#define CONFIG_MMC 1
-#define CONFIG_GENERIC_MMC 1
-#define CONFIG_OMAP_HSMMC  1
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_DOS_PARTITION
 
 /*
  * USB configuration
@@ -129,11 +129,15 @@
 #endif /* CONFIG_USB_MUSB_AM35X */
 
 /* commands to include */
-#define CONFIG_CMD_EXT2/* EXT2 Support */
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_FAT /* FAT support  */
-#define CONFIG_CMD_JFFS2   /* JFFS2 Support*/
+#define CONFIG_CMD_EXT2/* EXT2 Support */
 #define CONFIG_CMD_EXT4
 #define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+#define CONFIG_CMD_ASKENV
 
 #define CONFIG_CMD_BOOTZ
 
@@ -141,8 +145,7 @@
 #define CONFIG_CMD_MMC /* MMC support  */
 #define CONFIG_CMD_NAND/* NAND support */
 #define CONFIG_CMD_DHCP
-#undef CONFIG_CMD_PING
-
+#define CONFIG_CMD_PING
 
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_SYS_I2C
@@ -162,9 +165,33 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT 10
 
-/*
- * Board NAND Info.
+/* UBI and NAND partitioning */
+#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
+#define CONFIG_CMD_UBIFS   /* Read-only UBI volume operations */
+#define CONFIG_RBTREE  /* required by CONFIG_CMD_UBI */
+#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
+#define CONFIG_MTD_PARTITIONS  /* required for UBI partition support */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_CMD_MTDPARTS
+/* NAND block size is 128 KiB.  Synchronize these values with
+ * corresponding Device Tree entries in Linux:
+ *  MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB  @ 0x00
+ *  U-Boot  15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x08
+ *  U-Boot environment   2 * NAND_BLOCK_SIZE = 256 KiB  @ 0x26
+ *  Kernel  64 * NAND_BLOCK_SIZE = 8 MiB@ 0x2A
+ *  DTB  4 * NAND_BLOCK_SIZE = 512 KiB  @ 0xAA
+ *  RootFS  Remaining Flash Space   @ 0xB2
  */
+#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
+#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"  \
+   "512k(MLO),"\
+   "1920k(u-boot),"\
+   "256k(u-boot-env)," \
+   "8m(kernel),"   \
+   "512k(dtb),"\
+   "-(rootfs)"
+
+/* Board NAND Info. */
 #define CONFIG_SYS_NAND_ADDR   NAND_BASE   /* physical address */
/* to access nand */
 #define 

[U-Boot] OMAP3: am3517_evm: Add BCH8 ECC and UBIFS NAND support

[Derald D. Woods]

This patch series updates NAND support for the LogicPD AM3517 EVM/EXP
development boards and their corresponding System On Modules.

OMAP3: am3517_evm: Use BCH8 ECC for NAND
OMAP3: am3517_evm: Replace JFFS2 with UBI/UBIFS on NAND
OMAP3: am3517_evm: Misc. comment and option cleanup

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[U-Boot] [PATCH v5 19/30] efi_loader: Add "bootefi" command

[Alexander Graf]

In order to execute an EFI application, we need to bridge the gap between
U-Boot's notion of executing images and EFI's notion of doing the same.

The best path forward IMHO here is to stick completely to the way U-Boot
deals with payloads. You manually load them using whatever method to RAM
and then have a simple boot command to execute them. So in our case, you
would do

  # load mmc 0:1 $loadaddr grub.efi
  # bootefi $loadaddr

which then gets you into a grub shell. Fdt information known to U-boot
via the fdt addr command is also passed to the EFI payload.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 

---

v1 -> v2:

  - Move to GPLv2+

v2 -> v3:

  - Move to new cmd directory
  - Add kconfig option
  - Fix comment style
  - Add help text
  - s/-1/-ENOENT
  - Move obj list to lib

v4 -> v5:

  - Mark fdt memory as boot services data
---
 cmd/Kconfig   |   7 +++
 cmd/Makefile  |   1 +
 cmd/bootefi.c | 178 ++
 3 files changed, 186 insertions(+)
 create mode 100644 cmd/bootefi.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 2ed0263..7cdff04 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -148,6 +148,13 @@ config CMD_BOOTM
help
  Boot an application image from the memory.
 
+config CMD_BOOTEFI
+   bool "bootefi"
+   depends on EFI_LOADER
+   default y
+   help
+ Boot an EFI image from memory.
+
 config CMD_ELF
bool "bootelf, bootvx"
default y
diff --git a/cmd/Makefile b/cmd/Makefile
index 03f7e0a..7604621 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_CMD_SOURCE) += source.o
 obj-$(CONFIG_CMD_BDI) += bdinfo.o
 obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
 obj-$(CONFIG_CMD_BMP) += bmp.o
+obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
 obj-$(CONFIG_CMD_BOOTLDR) += bootldr.o
 obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
new file mode 100644
index 000..2a40fb0
--- /dev/null
+++ b/cmd/bootefi.c
@@ -0,0 +1,178 @@
+/*
+ *  EFI application loader
+ *
+ *  Copyright (c) 2016 Alexander Graf
+ *
+ *  SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * When booting using the "bootefi" command, we don't know which
+ * physical device the file came from. So we create a pseudo-device
+ * called "bootefi" with the device path /bootefi.
+ *
+ * In addition to the originating device we also declare the file path
+ * of "bootefi" based loads to be /bootefi.
+ */
+static struct efi_device_path_file_path bootefi_dummy_path[] = {
+   {
+   .dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE,
+   .dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH,
+   .dp.length = sizeof(bootefi_dummy_path[0]),
+   .str = { 'b','o','o','t','e','f','i' },
+   }, {
+   .dp.type = DEVICE_PATH_TYPE_END,
+   .dp.sub_type = DEVICE_PATH_SUB_TYPE_END,
+   .dp.length = sizeof(bootefi_dummy_path[0]),
+   }
+};
+
+static efi_status_t bootefi_open_dp(void *handle, efi_guid_t *protocol,
+   void **protocol_interface, void *agent_handle,
+   void *controller_handle, uint32_t attributes)
+{
+   *protocol_interface = bootefi_dummy_path;
+   return EFI_SUCCESS;
+}
+
+/* The EFI loaded_image interface for the image executed via "bootefi" */
+static struct efi_loaded_image loaded_image_info = {
+   .device_handle = bootefi_dummy_path,
+   .file_path = bootefi_dummy_path,
+};
+
+/* The EFI object struct for the image executed via "bootefi" */
+static struct efi_object loaded_image_info_obj = {
+   .handle = _image_info,
+   .protocols = {
+   {
+   /*
+* When asking for the loaded_image interface, just
+* return handle which points to loaded_image_info
+*/
+   .guid = _guid_loaded_image,
+   .open = _return_handle,
+   },
+   {
+   /*
+* When asking for the device path interface, return
+* bootefi_dummy_path
+*/
+   .guid = _guid_device_path,
+   .open = _open_dp,
+   },
+   },
+};
+
+/* The EFI object struct for the device the "bootefi" image was loaded from */
+static struct efi_object bootefi_device_obj = {
+   .handle = bootefi_dummy_path,
+   .protocols = {
+   {
+   /* When asking for the device path interface, return
+* bootefi_dummy_path */
+   .guid = _guid_device_path,
+   .open = _open_dp,
+   }
+   },
+};
+
+/*
+ * Load an 

[U-Boot] [PATCH v5 05/30] zymqmp: Replace home grown mmu code with generic table approach

[Alexander Graf]

Now that we have nice table driven page table creating code that gives
us everything we need, move to that.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Move mmu tables into board file
---
 arch/arm/cpu/armv8/zynqmp/cpu.c | 217 +---
 include/configs/xilinx_zynqmp.h |   2 +
 2 files changed, 50 insertions(+), 169 deletions(-)

diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c
index c71f291..5dd3cd8 100644
--- a/arch/arm/cpu/armv8/zynqmp/cpu.c
+++ b/arch/arm/cpu/armv8/zynqmp/cpu.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define ZYNQ_SILICON_VER_MASK  0xF000
@@ -15,6 +16,53 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static struct mm_region zynqmp_mem_map[] = {
+   {
+   .base = 0x0UL,
+   .size = 0x8000UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
+   }, {
+   .base = 0x8000UL,
+   .size = 0x7000UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+   }, {
+   .base = 0xf800UL,
+   .size = 0x07e0UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+   }, {
+   .base = 0xffe0UL,
+   .size = 0x0020UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
+   }, {
+   .base = 0x4UL,
+   .size = 0x2UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+   }, {
+   .base = 0x6UL,
+   .size = 0x8UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
+   }, {
+   .base = 0xeUL,
+   .size = 0xf2UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+   }, {
+   /* List terminator */
+   0,
+   }
+};
+struct mm_region *mem_map = zynqmp_mem_map;
+
 static unsigned int zynqmp_get_silicon_version_secure(void)
 {
u32 ver;
@@ -44,172 +92,3 @@ unsigned int zynqmp_get_silicon_version(void)
 
return ZYNQMP_CSU_VERSION_SILICON;
 }
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-#include 
-
-#define SECTION_SHIFT_L1   30UL
-#define SECTION_SHIFT_L2   21UL
-#define BLOCK_SIZE_L0  0x80UL
-#define BLOCK_SIZE_L1  (1 << SECTION_SHIFT_L1)
-#define BLOCK_SIZE_L2  (1 << SECTION_SHIFT_L2)
-
-#define TCR_TG1_4K (1 << 31)
-#define TCR_EPD1_DISABLE   (1 << 23)
-#define ZYNQMO_VA_BITS 40
-#define ZYNQMP_TCR TCR_TG1_4K | \
-   TCR_EPD1_DISABLE | \
-   TCR_SHARED_OUTER | \
-   TCR_SHARED_INNER | \
-   TCR_IRGN_WBWA | \
-   TCR_ORGN_WBWA | \
-   TCR_T0SZ(ZYNQMO_VA_BITS)
-
-#define MEMORY_ATTRPMD_SECT_AF | PMD_SECT_INNER_SHARE |\
-   PMD_ATTRINDX(MT_NORMAL) |   \
-   PMD_TYPE_SECT
-#define DEVICE_ATTRPMD_SECT_AF | PMD_SECT_PXN |\
-   PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_NGNRNE) | \
-   PMD_TYPE_SECT
-
-/* 4K size is required to place 512 entries in each level */
-#define TLB_TABLE_SIZE 0x1000
-
-struct attr_tbl {
-   u32 num;
-   u64 attr;
-};
-
-static struct attr_tbl attr_tbll1t0[4] = { {16, 0x0},
-  {8, DEVICE_ATTR},
-  {32, MEMORY_ATTR},
-  {456, DEVICE_ATTR}
-};
-static struct attr_tbl attr_tbll2t3[4] = { {0x180, DEVICE_ATTR},
-  {0x40, 0x0},
-  {0x3F, DEVICE_ATTR},
-  {0x1, MEMORY_ATTR}
-};
-
-/*
- * This mmu table looks as below
- * Level 0 table contains two entries to 512GB sizes. One is Level1 Table 0
- * and other Level1 Table1.
- * Level1 Table0 contains entries for each 1GB from 0 to 511GB.
- * Level1 Table1 contains entries for each 1GB from 512GB to 1TB.
- * Level2 Table0, Level2 Table1, Level2 Table2 and Level2 Table3 contains
- * entries for each 2MB starting from 0GB, 1GB, 2GB and 3GB respectively.
- */
-static void zynqmp_mmu_setup(void)
-{
-  

[U-Boot] [PATCH v5 26/30] efi_loader: Add MAINTAINERS entry

[Alexander Graf]

Now that everything's in place, let's add myself as the maintainer for
the efi payload support.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
---
 MAINTAINERS | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 9d447ea..32f97b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -230,6 +230,13 @@ F: drivers/core/
 F: include/dm/
 F: test/dm/
 
+EFI PAYLOAD
+M: Alexander Graf 
+S: Maintained
+F: include/efi_loader.h
+F: lib/efi_loader/
+F: cmd/bootefi.c
+
 FLATTENED DEVICE TREE
 M: Simon Glass 
 S: Maintained
-- 
1.8.5.6

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[U-Boot] [PATCH v5 29/30] efi_loader: Call fdt preparation functions

[Alexander Graf]

We have a nice framework around image fils to prepare a device tree
for OS execution. That one patches in missing device tree nodes and
fixes up the memory range bits.

We need to call that one from the EFI boot path too to get all those
nice fixups. This patch adds the call.

Signed-off-by: Alexander Graf 
---
 cmd/bootefi.c  | 8 
 common/image-fdt.c | 8 +---
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 2a40fb0..7fce1d0 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -92,6 +92,7 @@ static unsigned long do_bootefi_exec(void *efi)
 {
ulong (*entry)(void *image_handle, struct efi_system_table *st);
ulong fdt_pages, fdt_size, fdt_start, fdt_end;
+   bootm_headers_t img = { 0 };
 
/*
 * gd lives in a fixed register which may get clobbered while we execute
@@ -102,6 +103,13 @@ static unsigned long do_bootefi_exec(void *efi)
/* Update system table to point to our currently loaded FDT */
 
if (working_fdt) {
+   /* Prepare fdt for payload */
+   if (image_setup_libfdt(, working_fdt, 0, NULL)) {
+   printf("ERROR: Failed to process device tree\n");
+   return -EINVAL;
+   }
+
+   /* Link to it in the efi tables */
systab.tables[0].guid = EFI_FDT_GUID;
systab.tables[0].table = working_fdt;
systab.nr_tables = 1;
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 79fa655..5a1b432 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -502,8 +502,9 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
fdt_fixup_ethernet(blob);
 
/* Delete the old LMB reservation */
-   lmb_free(lmb, (phys_addr_t)(u32)(uintptr_t)blob,
-(phys_size_t)fdt_totalsize(blob));
+   if (lmb)
+   lmb_free(lmb, (phys_addr_t)(u32)(uintptr_t)blob,
+(phys_size_t)fdt_totalsize(blob));
 
ret = fdt_shrink_to_minimum(blob);
if (ret < 0)
@@ -515,7 +516,8 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
fdt_set_totalsize(blob, of_size);
}
/* Create a new LMB reservation */
-   lmb_reserve(lmb, (ulong)blob, of_size);
+   if (lmb)
+   lmb_reserve(lmb, (ulong)blob, of_size);
 
fdt_initrd(blob, *initrd_start, *initrd_end);
if (!ft_verify_fdt(blob))
-- 
1.8.5.6

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[U-Boot] [PATCH v5 27/30] arm64: Replace fdt_name env variables with fdtfile

[Alexander Graf]

The commonly defined environment variable to determine the device tree
file name is called fdtfile rather than fdt_name. Replace all occurences
of fdt_name with fdtfile.

Signed-off-by: Alexander Graf 
---
 include/config_distro_bootcmd.h   |  4 ++--
 include/configs/hikey.h   |  2 +-
 include/configs/vexpress_aemv8a.h | 10 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index c19f1b0..e7d7002 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -107,7 +107,7 @@
\
"load_efi_dtb="   \
"load ${devtype} ${devnum}:${distro_bootpart} "   \
-   "${fdt_addr_r} ${prefix}${fdt_name}; "   \
+   "${fdt_addr_r} ${prefix}${fdtfile}; " \
"fdt addr ${fdt_addr_r}\0"\
\
"efi_dtb_prefixes=/ /dtb/ /dtb/current/\0"\
@@ -115,7 +115,7 @@
"for prefix in ${efi_dtb_prefixes}; do "  \
"if test -e ${devtype} "  \
"${devnum}:${distro_bootpart} "   \
-   "${prefix}${fdt_name}; then " \
+   "${prefix}${fdtfile}; then "  \
"run load_efi_dtb; "  \
"fi;" \
"done;"   \
diff --git a/include/configs/hikey.h b/include/configs/hikey.h
index 2d9ace9..f3ae0dd 100644
--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@@ -121,7 +121,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS  \
"kernel_name=Image\0"   \
"kernel_addr_r=0x0008\0" \
-   "fdt_name=hi6220-hikey.dtb\0" \
+   "fdtfile=hi6220-hikey.dtb\0" \
"fdt_addr_r=0x0200\0" \
"fdt_high=0x\0" \
"initrd_high=0x\0" \
diff --git a/include/configs/vexpress_aemv8a.h 
b/include/configs/vexpress_aemv8a.h
index 2949170..3e588c0 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -191,7 +191,7 @@
"kernel_addr=0x8008\0" \
"initrd_name=ramdisk.img\0" \
"initrd_addr=0x8400\0"  \
-   "fdt_name=board.dtb\0" \
+   "fdtfile=board.dtb\0" \
"fdt_alt_name=juno\0" \
"fdt_addr=0x8300\0" \
"fdt_high=0x\0" \
@@ -213,10 +213,10 @@
"${kernel_name}; "\
"  afs load ${kernel_alt_name} ${kernel_addr};"\
"fi ; "\
-   "afs load  ${fdt_name} ${fdt_addr} ; " \
+   "afs load  ${fdtfile} ${fdt_addr} ; " \
"if test $? -eq 1; then "\
"  echo Loading ${fdt_alt_name} instead of "\
-   "${fdt_name}; "\
+   "${fdtfile}; "\
"  afs load ${fdt_alt_name} ${fdt_addr}; "\
"fi ; "\
"fdt addr ${fdt_addr}; fdt resize; " \
@@ -235,7 +235,7 @@
"kernel_addr=0x8008\0"  \
"initrd_name=ramdisk.img\0" \
"initrd_addr=0x8800\0"  \
-   "fdt_name=devtree.dtb\0"\
+   "fdtfile=devtree.dtb\0" \
"fdt_addr=0x8300\0" \
"fdt_high=0x\0" \
"initrd_high=0x\0"
@@ -245,7 +245,7 @@
"loglevel=9"
 
 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
-   "smhload ${fdt_name} ${fdt_addr}; " \
+   "smhload ${fdtfile} ${fdt_addr}; " \
"smhload ${initrd_name} ${initrd_addr} "\
"initrd_end; " \
"fdt addr ${fdt_addr}; fdt resize; " \
-- 
1.8.5.6

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[U-Boot] [PATCH v5 30/30] efi_loader: Pass proper device path in on boot

[Alexander Graf]

EFI payloads can query for the device they were booted from. Because
we have a disconnect between loading binaries and running binaries,
we passed in a dummy device path so far.

Unfortunately that breaks grub2's logic to find its configuration
file from the same device it was booted from.

This patch adds logic to have the "load" command call into our efi
code to set the device path to the one we last loaded a binary from.

With this grub2 properly detects where we got booted from and can
find its configuration file, even when searching by-partition.

Signed-off-by: Alexander Graf 
---
 cmd/bootefi.c | 34 +-
 cmd/fs.c  |  2 ++
 include/efi_loader.h  | 10 ++
 lib/efi_loader/efi_disk.c |  6 --
 4 files changed, 37 insertions(+), 15 deletions(-)

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 7fce1d0..de17e49 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -21,16 +21,16 @@
  * In addition to the originating device we also declare the file path
  * of "bootefi" based loads to be /bootefi.
  */
-static struct efi_device_path_file_path bootefi_dummy_path[] = {
+static struct efi_device_path_file_path bootefi_image_path[] = {
{
.dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE,
.dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH,
-   .dp.length = sizeof(bootefi_dummy_path[0]),
+   .dp.length = sizeof(bootefi_image_path[0]),
.str = { 'b','o','o','t','e','f','i' },
}, {
.dp.type = DEVICE_PATH_TYPE_END,
.dp.sub_type = DEVICE_PATH_SUB_TYPE_END,
-   .dp.length = sizeof(bootefi_dummy_path[0]),
+   .dp.length = sizeof(bootefi_image_path[0]),
}
 };
 
@@ -38,14 +38,14 @@ static efi_status_t bootefi_open_dp(void *handle, 
efi_guid_t *protocol,
void **protocol_interface, void *agent_handle,
void *controller_handle, uint32_t attributes)
 {
-   *protocol_interface = bootefi_dummy_path;
+   *protocol_interface = bootefi_image_path;
return EFI_SUCCESS;
 }
 
 /* The EFI loaded_image interface for the image executed via "bootefi" */
 static struct efi_loaded_image loaded_image_info = {
-   .device_handle = bootefi_dummy_path,
-   .file_path = bootefi_dummy_path,
+   .device_handle = bootefi_image_path,
+   .file_path = bootefi_image_path,
 };
 
 /* The EFI object struct for the image executed via "bootefi" */
@@ -63,7 +63,7 @@ static struct efi_object loaded_image_info_obj = {
{
/*
 * When asking for the device path interface, return
-* bootefi_dummy_path
+* bootefi_image_path
 */
.guid = _guid_device_path,
.open = _open_dp,
@@ -73,11 +73,11 @@ static struct efi_object loaded_image_info_obj = {
 
 /* The EFI object struct for the device the "bootefi" image was loaded from */
 static struct efi_object bootefi_device_obj = {
-   .handle = bootefi_dummy_path,
+   .handle = bootefi_image_path,
.protocols = {
{
/* When asking for the device path interface, return
-* bootefi_dummy_path */
+* bootefi_image_path */
.guid = _guid_device_path,
.open = _open_dp,
}
@@ -184,3 +184,19 @@ U_BOOT_CMD(
"Boots an EFI payload from memory\n",
bootefi_help_text
 );
+
+void efi_set_bootdev(const char *dev, const char *devnr)
+{
+   char devname[16] = { 0 }; /* dp->str is u16[16] long */
+   char *colon;
+
+   /* Assemble the condensed device name we use in efi_disk.c */
+   snprintf(devname, sizeof(devname), "%s%s", dev, devnr);
+   colon = strchr(devname, ':');
+   if (colon)
+   *colon = '\0';
+
+   /* Patch the bootefi_image_path to the target device */
+   memset(bootefi_image_path[0].str, 0, sizeof(bootefi_image_path[0].str));
+   ascii2unicode(bootefi_image_path[0].str, devname);
+}
diff --git a/cmd/fs.c b/cmd/fs.c
index 8f8f1b2..be8f289 100644
--- a/cmd/fs.c
+++ b/cmd/fs.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static int do_size_wrapper(cmd_tbl_t *cmdtp, int flag, int argc, char * const 
argv[])
 {
@@ -26,6 +27,7 @@ U_BOOT_CMD(
 static int do_load_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
 {
+   efi_set_bootdev(argv[1], (argc > 2) ? argv[2] : "");
return do_load(cmdtp, flag, argc, argv, FS_TYPE_ANY);
 }
 
diff --git a/include/efi_loader.h b/include/efi_loader.h
index e344566..385239b 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -108,6 +108,8 @@ void efi_restore_gd(void);
 efi_status_t efi_exit_func(efi_status_t ret);
 

[U-Boot] [PATCH v5 25/30] efi_loader: Add README section in README.efi

[Alexander Graf]

To preserve all cover letter knowledge of the status on UEFI payload
support, let's add some sections to README.efi.

Signed-off-by: Alexander Graf 

v3 -> v4:

  - Add section about config options
  - s/10kb/10KB/
---
 doc/README.efi | 83 +-
 1 file changed, 82 insertions(+), 1 deletion(-)

diff --git a/doc/README.efi b/doc/README.efi
index 23a3cdd..1fd3f00 100644
--- a/doc/README.efi
+++ b/doc/README.efi
@@ -4,6 +4,28 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+=== Table of Contents ===
+
+  1  U-Boot on EFI
+  1.1  In God's Name, Why?
+  1.2  Status
+  1.3  Build Instructions
+  1.4  Trying it out
+  1.5  Inner workings
+  1.6  EFI Application
+  1.7  EFI Payload
+  1.8  Tables
+  1.9  Interrupts
+  1.10 32/64-bit
+  1.11 Future work
+  1.12 Where is the code?
+
+  2  EFI on U-Boot
+  2.1  In God's Name, Why?
+  2.2  How do I get it?
+  2.3  Status
+  2.4  Future work
+
 U-Boot on EFI
 =
 This document provides information about U-Boot running on top of EFI, either
@@ -234,7 +256,6 @@ board/efi/efi-x86/efi.c
 common/cmd_efi.c
the 'efi' command
 
-
 --
 Ben Stoltz, Simon Glass
 Google, Inc
@@ -242,3 +263,63 @@ July 2015
 
 [1] http://www.qemu.org
 [2] http://www.tianocore.org/ovmf/
+
+---
+
+EFI on U-Boot
+=
+
+In addition to support for running U-Boot as a UEFI application, U-Boot itself
+can also expose the UEFI interfaces and thus allow UEFI payloads to run under
+it.
+
+In God's Name, Why?
+---
+
+With this support in place, you can run any UEFI payload (such as the Linux
+kernel, grub2 or gummiboot) on U-Boot. This dramatically simplifies boot loader
+configuration, as U-Boot based systems now look and feel (almost) the same way
+as TianoCore based systems.
+
+How do I get it?
+
+
+EFI support for 32bit ARM and AArch64 is already included in U-Boot. All you
+need to do is enable
+
+  CONFIG_CMD_BOOTEFI=y
+  CONFIG_EFI_LOADER=y
+
+in your .config file and you will automatically get a bootefi command to run
+an efi application as well as snippet in the default distro boot script that
+scans for removable media efi binaries as fallback.
+
+Status
+--
+
+I am successfully able to run grub2 and Linux EFI binaries with this code on
+ARMv7 as well as AArch64 systems.
+
+When enabled, the resulting U-Boot binary only grows by ~10KB, so it's very
+light weight.
+
+All storage devices are directly accessible from the uEFI payload
+
+Removable media booting (search for /efi/boot/boota{a64,arm}.efi) is supported.
+
+Simple use cases like "Plug this SD card into my ARM device and it just
+boots into grub which boots into Linux", work very well.
+
+Future work
+---
+
+Of course, there are still a few things one could do on top:
+
+   - Improve disk media detection (don't scan, use what information we
+have)
+   - Add EFI variable support using NVRAM
+   - Add GFX support
+   - Make EFI Shell work
+   - Network device support
+   - Support for payload exit
+   - Payload Watchdog support
-- 
1.8.5.6

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[U-Boot] [PATCH v5 23/30] efi_loader: hook up in build environment

[Alexander Graf]

Now that we have all the bits and pieces ready for EFI payload loading
support, hook them up in Makefiles and KConfigs so that we can build.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 

---

v1 -> v2:

  - Move to GPLv2+
  - Default to y

v2 -> v3:

  - Add memory file
---
 lib/Kconfig |  1 +
 lib/Makefile|  1 +
 lib/efi_loader/Kconfig  |  9 +
 lib/efi_loader/Makefile | 12 
 4 files changed, 23 insertions(+)
 create mode 100644 lib/efi_loader/Kconfig
 create mode 100644 lib/efi_loader/Makefile

diff --git a/lib/Kconfig b/lib/Kconfig
index c7eab46..a67df3c 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -129,5 +129,6 @@ config ERRNO_STR
  - if errno is negative - a pointer to errno related message
 
 source lib/efi/Kconfig
+source lib/efi_loader/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 1e21bcc..4aaa2ea 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -8,6 +8,7 @@
 ifndef CONFIG_SPL_BUILD
 
 obj-$(CONFIG_EFI) += efi/
+obj-$(CONFIG_EFI_LOADER) += efi_loader/
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_LZMA) += lzma/
 obj-$(CONFIG_LZO) += lzo/
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
new file mode 100644
index 000..6da1c7f
--- /dev/null
+++ b/lib/efi_loader/Kconfig
@@ -0,0 +1,9 @@
+config EFI_LOADER
+   bool "Support running EFI Applications in U-Boot"
+   depends on ARM64 || ARM
+   default y
+   help
+ Select this option if you want to run EFI applications (like grub2)
+ on top of U-Boot. If this option is enabled, U-Boot will expose EFI
+ interfaces to a loaded EFI application, enabling it to reuse U-Boot's
+ device drivers.
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
new file mode 100644
index 000..28725a2
--- /dev/null
+++ b/lib/efi_loader/Makefile
@@ -0,0 +1,12 @@
+#
+# (C) Copyright 2016 Alexander Graf
+#
+#  SPDX-License-Identifier: GPL-2.0+
+#
+
+# This file only gets included with CONFIG_EFI_LOADER set, so all
+# object inclusion implicitly depends on it
+
+obj-y += efi_image_loader.o efi_boottime.o efi_runtime.o efi_console.o
+obj-y += efi_memory.o
+obj-$(CONFIG_PARTITIONS) += efi_disk.o
-- 
1.8.5.6

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[U-Boot] [PATCH v5 03/30] arm64: Make full va map code more dynamic

[Alexander Graf]

The idea to generate our pages tables from an array of memory ranges
is very sound. However, instead of hard coding the code to create up
to 2 levels of 64k granule page tables, we really should just create
normal 4k page tables that allow us to set caching attributes on 2M
or 4k level later on.

So this patch moves the full_va mapping code to 4k page size and
makes it fully flexible to dynamically create as many levels as
necessary for a map (including dynamic 1G/2M pages). It also adds
support to dynamically split a large map into smaller ones when
some code wants to set dcache attributes.

With all this in place, there is very little reason to create your
own page tables in board specific files.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Fix comment for create_table()
  - Rework page table size calculation
  - s/DPRINTF/debug/g
  - Improve panic messages

v2 -> v3:

  - Move PGTABLE_SIZE out of the ASSEMBLY section
  - Run pte splitting code in separate page table
  - Replace is_level in count_required_pts with more obvious pte_type

v3 -> v4:

  - Lv3 PTEs are always of type table
---
 arch/arm/cpu/armv8/cache.S |  54 +
 arch/arm/cpu/armv8/cache_v8.c  | 453 -
 arch/arm/include/asm/armv8/mmu.h   |  68 +++---
 arch/arm/include/asm/global_data.h |   5 +-
 arch/arm/include/asm/system.h  |  14 +-
 include/configs/thunderx_88xx.h|  14 +-
 6 files changed, 500 insertions(+), 108 deletions(-)

diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S
index ab8c089..a9f4fec 100644
--- a/arch/arm/cpu/armv8/cache.S
+++ b/arch/arm/cpu/armv8/cache.S
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /*
@@ -160,3 +161,56 @@ ENTRY(__asm_flush_l3_cache)
ret
 ENDPROC(__asm_flush_l3_cache)
.weak   __asm_flush_l3_cache
+
+/*
+ * void __asm_switch_ttbr(ulong new_ttbr)
+ *
+ * Safely switches to a new page table.
+ */
+ENTRY(__asm_switch_ttbr)
+   /* x2 = SCTLR (alive throghout the function) */
+   switch_el x4, 3f, 2f, 1f
+3: mrs x2, sctlr_el3
+   b   0f
+2: mrs x2, sctlr_el2
+   b   0f
+1: mrs x2, sctlr_el1
+0:
+
+   /* Unset CR_M | CR_C | CR_I from SCTLR to disable all caches */
+   movnx1, #(CR_M | CR_C | CR_I)
+   and x1, x2, x1
+   switch_el x4, 3f, 2f, 1f
+3: msr sctlr_el3, x1
+   b   0f
+2: msr sctlr_el2, x1
+   b   0f
+1: msr sctlr_el1, x1
+0: isb
+
+   /* This call only clobbers x30 (lr) and x9 (unused) */
+   mov x3, x30
+   bl  __asm_invalidate_tlb_all
+
+   /* From here on we're running safely with caches disabled */
+
+   /* Set TTBR to our first argument */
+   switch_el x4, 3f, 2f, 1f
+3: msr ttbr0_el3, x0
+   b   0f
+2: msr ttbr0_el2, x0
+   b   0f
+1: msr ttbr0_el1, x0
+0: isb
+
+   /* Restore original SCTLR and thus enable caches again */
+   switch_el x4, 3f, 2f, 1f
+3: msr sctlr_el3, x2
+   b   0f
+2: msr sctlr_el2, x2
+   b   0f
+1: msr sctlr_el1, x2
+0: isb
+
+   ret x3
+ENDPROC(__asm_switch_ttbr)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index d92f2d1..73628c9 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -2,6 +2,9 @@
  * (C) Copyright 2013
  * David Feng 
  *
+ * (C) Copyright 2016
+ * Alexander Graf 
+ *
  * SPDX-License-Identifier:GPL-2.0+
  */
 
@@ -13,31 +16,28 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #ifndef CONFIG_SYS_DCACHE_OFF
 
-#ifdef CONFIG_SYS_FULL_VA
-static void set_ptl1_entry(u64 index, u64 ptl2_entry)
-{
-   u64 *pgd = (u64 *)gd->arch.tlb_addr;
-   u64 value;
-
-   value = ptl2_entry | PTL1_TYPE_TABLE;
-   pgd[index] = value;
-}
-
-static void set_ptl2_block(u64 ptl1, u64 bfn, u64 address, u64 memory_attrs)
-{
-   u64 *pmd = (u64 *)ptl1;
-   u64 value;
-
-   value = address | PTL2_TYPE_BLOCK | PTL2_BLOCK_AF;
-   value |= memory_attrs;
-   pmd[bfn] = value;
-}
+/*
+ *  With 4k page granule, a virtual address is split into 4 lookup parts
+ *  spanning 9 bits each:
+ *
+ *___
+ *   |   |   |   |   |   |   |
+ *   |   0   |  Lv0  |  Lv1  |  Lv2  |  Lv3  |  off  |
+ *   |___|___|___|___|___|___|
+ * 63-48   47-39   38-30   29-21   20-12   11-00
+ *
+ * maskpage size
+ *
+ *Lv0: FF80   --
+ *Lv1:   7FC000   1G
+ *Lv2: 3FE0   2M
+ *Lv3:   1FF000   4K
+ *off:  FFF
+ */
 
+#ifdef CONFIG_SYS_FULL_VA
 static struct mm_region mem_map[] = CONFIG_SYS_MEM_MAP;
 
-#define PTL1_ENTRIES CONFIG_SYS_PTL1_ENTRIES
-#define PTL2_ENTRIES CONFIG_SYS_PTL2_ENTRIES
-
 static u64 get_tcr(int el, u64 *pips, 

[U-Boot] [PATCH v5 24/30] efi_loader: Add distro boot script for removable media

[Alexander Graf]

UEFI defines a simple boot protocol for removable media. There we should look
at the EFI (first GPT FAT) partition and search for /efi/boot/bootXXX.efi with
XXX being different between different platforms (x86, x64, arm, aa64, ...).

This patch implements a simple version of that protocol for the default distro
boot script. With this we can automatically boot from valid UEFI enabled
removable media.

Because from all I could see U-Boot by default doesn't deliver device tree
blobs with its firmware, we also need to load the dtb from somewhere. Traverse
the same EFI partition for an fdt file that fits our current board so that
an OS receives a valid device tree when booted automatically.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
---
 include/config_distro_bootcmd.h | 47 -
 1 file changed, 46 insertions(+), 1 deletion(-)

diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 37c6b43..c19f1b0 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -90,6 +90,48 @@
BOOT_TARGET_DEVICES_references_UBIFS_without_CONFIG_CMD_UBIFS
 #endif
 
+#ifdef CONFIG_EFI_LOADER
+#if defined(CONFIG_ARM64)
+#define BOOTEFI_NAME "bootaa64.efi"
+#elif defined(CONFIG_ARM)
+#define BOOTEFI_NAME "bootarm.efi"
+#endif
+#endif
+
+#ifdef BOOTEFI_NAME
+#define BOOTENV_SHARED_EFI\
+   "boot_efi_binary="\
+   "load ${devtype} ${devnum}:${distro_bootpart} "   \
+   "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; "  \
+   "bootefi ${kernel_addr_r}\0"  \
+   \
+   "load_efi_dtb="   \
+   "load ${devtype} ${devnum}:${distro_bootpart} "   \
+   "${fdt_addr_r} ${prefix}${fdt_name}; "   \
+   "fdt addr ${fdt_addr_r}\0"\
+   \
+   "efi_dtb_prefixes=/ /dtb/ /dtb/current/\0"\
+   "scan_dev_for_efi="   \
+   "for prefix in ${efi_dtb_prefixes}; do "  \
+   "if test -e ${devtype} "  \
+   "${devnum}:${distro_bootpart} "   \
+   "${prefix}${fdt_name}; then " \
+   "run load_efi_dtb; "  \
+   "fi;" \
+   "done;"   \
+   "if test -e ${devtype} ${devnum}:${distro_bootpart} " \
+   "efi/boot/"BOOTEFI_NAME"; then "  \
+   "echo Found EFI removable media binary "  \
+   "efi/boot/"BOOTEFI_NAME"; "   \
+   "run boot_efi_binary; "   \
+   "echo EFI LOAD FAILED: continuing...; "   \
+   "fi; "
+#define SCAN_DEV_FOR_EFI "run scan_dev_for_efi;"
+#else
+#define BOOTENV_SHARED_EFI
+#define SCAN_DEV_FOR_EFI
+#endif
+
 #ifdef CONFIG_CMD_SATA
 #define BOOTENV_SHARED_SATABOOTENV_SHARED_BLKDEV(sata)
 #define BOOTENV_DEV_SATA   BOOTENV_DEV_BLKDEV
@@ -217,6 +259,7 @@
BOOTENV_SHARED_SCSI \
BOOTENV_SHARED_IDE \
BOOTENV_SHARED_UBIFS \
+   BOOTENV_SHARED_EFI \
"boot_prefixes=/ /boot/\0" \
"boot_scripts=boot.scr.uimg boot.scr\0" \
"boot_script_dhcp=boot.scr.uimg\0" \
@@ -258,7 +301,9 @@
"for prefix in ${boot_prefixes}; do " \
"run scan_dev_for_extlinux; " \
"run scan_dev_for_scripts; "  \
-   "done\0"  \
+   "done;"   \
+   SCAN_DEV_FOR_EFI  \
+   "\0"  \
\
"scan_dev_for_boot_part=" \
"part list ${devtype} ${devnum} -bootable devplist; " \
-- 
1.8.5.6

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[U-Boot] [PATCH v5 17/30] efi_loader: Add runtime services

[Alexander Graf]

After booting has finished, EFI allows firmware to still interact with the OS
using the "runtime services". These callbacks live in a separate address space,
since they are available long after U-Boot has been overwritten by the OS.

This patch adds enough framework for arbitrary code inside of U-Boot to become
a runtime service with the right section attributes set. For now, we don't make
use of it yet though.

We could maybe in the future map U-boot environment variables to EFI variables
here.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 

---

v1 -> v2:

  - Fix runtime service sections
  - Add runtime detach
  - Enable runtime relocations
  - Add get_time
  - Fix relocation
  - Fix 32bit
  - Add am335x support
  - Move section definition to header
  - Add systab to runtime section
  - Add self-relocation hook table
  - Fix self-relocation
  - Relocate efi_runtime section early during bootup
  - Fix return values for a number of callbacks to be more UEFI compliant
  - Move to GPLv2+

v2 -> v3:

  - Patch reset to NULL
  - Add EFIAPI to function prototypes
  - Document header
  - Add dm.h include
  - Remove non-dm rtc support
  - Return DEVICE_ERROR in rtc path
---
 arch/arm/config.mk|   4 +
 arch/arm/cpu/armv8/u-boot.lds |  16 +++
 arch/arm/cpu/u-boot.lds   |  30 +
 arch/arm/lib/sections.c   |   4 +
 board/ti/am335x/u-boot.lds|  30 +
 common/board_r.c  |   4 +
 include/efi_loader.h  |  17 +++
 lib/efi_loader/efi_boottime.c |   6 +-
 lib/efi_loader/efi_runtime.c  | 290 ++
 9 files changed, 398 insertions(+), 3 deletions(-)
 create mode 100644 lib/efi_loader/efi_runtime.c

diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 8fa57ec..9af6c37 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -122,6 +122,10 @@ ifdef CONFIG_OF_EMBED
 OBJCOPYFLAGS += -j .dtb.init.rodata
 endif
 
+ifdef CONFIG_EFI_LOADER
+OBJCOPYFLAGS += -j .efi_runtime -j .efi_runtime_rel
+endif
+
 ifneq ($(CONFIG_IMX_CONFIG),)
 ifdef CONFIG_SPL
 ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
index 4c1..fd15ad5 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -42,6 +42,22 @@ SECTIONS
 
. = ALIGN(8);
 
+   .efi_runtime : {
+__efi_runtime_start = .;
+   *(efi_runtime_text)
+   *(efi_runtime_data)
+__efi_runtime_stop = .;
+   }
+
+   .efi_runtime_rel : {
+__efi_runtime_rel_start = .;
+   *(.relaefi_runtime_text)
+   *(.relaefi_runtime_data)
+__efi_runtime_rel_stop = .;
+   }
+
+   . = ALIGN(8);
+
.image_copy_end :
{
*(.__image_copy_end)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index e148ab7..13aa4fa 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -90,6 +90,36 @@ SECTIONS
 
. = ALIGN(4);
 
+   .__efi_runtime_start : {
+   *(.__efi_runtime_start)
+   }
+
+   .efi_runtime : {
+   *(efi_runtime_text)
+   *(efi_runtime_data)
+   }
+
+   .__efi_runtime_stop : {
+   *(.__efi_runtime_stop)
+   }
+
+   .efi_runtime_rel_start :
+   {
+   *(.__efi_runtime_rel_start)
+   }
+
+   .efi_runtime_rel : {
+   *(.relefi_runtime_text)
+   *(.relefi_runtime_data)
+   }
+
+   .efi_runtime_rel_stop :
+   {
+   *(.__efi_runtime_rel_stop)
+   }
+
+   . = ALIGN(4);
+
.image_copy_end :
{
*(.__image_copy_end)
diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c
index a1205c3..6a94522 100644
--- a/arch/arm/lib/sections.c
+++ b/arch/arm/lib/sections.c
@@ -27,4 +27,8 @@ char __rel_dyn_start[0] 
__attribute__((section(".__rel_dyn_start")));
 char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));
 char __secure_start[0] __attribute__((section(".__secure_start")));
 char __secure_end[0] __attribute__((section(".__secure_end")));
+char __efi_runtime_start[0] __attribute__((section(".__efi_runtime_start")));
+char __efi_runtime_stop[0] __attribute__((section(".__efi_runtime_stop")));
+char __efi_runtime_rel_start[0] 
__attribute__((section(".__efi_runtime_rel_start")));
+char __efi_runtime_rel_stop[0] 
__attribute__((section(".__efi_runtime_rel_stop")));
 char _end[0] __attribute__((section(".__end")));
diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds
index 78f294a..a56cc82 100644
--- a/board/ti/am335x/u-boot.lds
+++ b/board/ti/am335x/u-boot.lds
@@ -59,6 +59,36 @@ SECTIONS
 
. = ALIGN(4);
 
+   .__efi_runtime_start : {
+   *(.__efi_runtime_start)
+   }
+
+   .efi_runtime : {
+   *(efi_runtime_text)
+ 

[U-Boot] [PATCH v5 21/30] arm64: Allow exceptions to return

[Alexander Graf]

Our current arm64 exception handlers all panic and never return to the
exception triggering code.

But if any handler wanted to continue execution after fixups, it would
need help from the exception handling code to restore all registers.

This patch implements that help. With this code, exception handlers on
aarch64 can successfully return to the place the exception happened (or
somewhere else if they modify elr).

Signed-off-by: Alexander Graf 
---
 arch/arm/cpu/armv8/exceptions.S | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index baf9401..4f4f526 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -82,31 +82,65 @@ vectors:
 _do_bad_sync:
exception_entry
bl  do_bad_sync
+   b   exception_exit
 
 _do_bad_irq:
exception_entry
bl  do_bad_irq
+   b   exception_exit
 
 _do_bad_fiq:
exception_entry
bl  do_bad_fiq
+   b   exception_exit
 
 _do_bad_error:
exception_entry
bl  do_bad_error
+   b   exception_exit
 
 _do_sync:
exception_entry
bl  do_sync
+   b   exception_exit
 
 _do_irq:
exception_entry
bl  do_irq
+   b   exception_exit
 
 _do_fiq:
exception_entry
bl  do_fiq
+   b   exception_exit
 
 _do_error:
exception_entry
bl  do_error
+   b   exception_exit
+
+exception_exit:
+   ldp x2, x0, [sp],#16
+   switch_el x11, 3f, 2f, 1f
+3: msr elr_el3, x2
+   b   0f
+2: msr elr_el2, x2
+   b   0f
+1: msr elr_el1, x2
+0:
+   ldp x1, x2, [sp],#16
+   ldp x3, x4, [sp],#16
+   ldp x5, x6, [sp],#16
+   ldp x7, x8, [sp],#16
+   ldp x9, x10, [sp],#16
+   ldp x11, x12, [sp],#16
+   ldp x13, x14, [sp],#16
+   ldp x15, x16, [sp],#16
+   ldp x17, x18, [sp],#16
+   ldp x19, x20, [sp],#16
+   ldp x21, x22, [sp],#16
+   ldp x23, x24, [sp],#16
+   ldp x25, x26, [sp],#16
+   ldp x27, x28, [sp],#16
+   ldp x29, x30, [sp],#16
+   eret
-- 
1.8.5.6

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[U-Boot] [PATCH v5 15/30] efi_loader: Add boot time services

[Alexander Graf]

When an EFI application runs, it has access to a few descriptor and callback
tables to instruct the EFI compliant firmware to do things for it. The bulk
of those interfaces are "boot time services". They handle all object management,
and memory allocation.

This patch adds support for the boot time services and also exposes a system
table, which is the point of entry descriptor table for EFI payloads.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 

---

v1 -> v2:

  - Fix typo s/does now/does not/
  - Add #ifdefs around header to allow inclusion when efi_loader is disabled
  - Add stub efi_restore_gd() function when efi_loader is disabled
  - Disable debug
  - Mark runtime region as such
  - Fix up memory map
  - Allow efi_restore_gd to be called before first efi entry
  - Add 32bit arm cache workaround
  - Move memory map to separate patch
  - Change BTS version to 2.5
  - Fix return values for a few callbacks to more EFI compliant ones
  - Change vendor to "Das U-Boot"
  - Add warning when truncating timer trigger
  - Move to GPLv2+

v2 -> v3:

  - Use external efi_memory helpers
  - Add EFIAPI to function prototypes
  - Initialize event timer to -1ULL to prevent early firing
  - Document header
  - Move obj list to lib
  - Remove implicit guid table
  - Add guid compare function
  - Fix return values
  - Implement efi_wait_for_event
  - Implement efi_install_configuration_table

v3 -> v4:

  - s/polimorphic/polymorphic
---
 include/efi_loader.h  |  84 +
 lib/efi_loader/efi_boottime.c | 781 ++
 2 files changed, 865 insertions(+)
 create mode 100644 lib/efi_loader/efi_boottime.c

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 5618185..d63fa3a 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -6,15 +6,99 @@
  *  SPDX-License-Identifier: GPL-2.0+
  */
 
+#include 
 #include 
 #include 
+
+#ifdef CONFIG_EFI_LOADER
+
 #include 
 
+/* #define DEBUG_EFI */
+
+#ifdef DEBUG_EFI
+#define EFI_ENTRY(format, ...) do { \
+   efi_restore_gd(); \
+   printf("EFI: Entry %s(" format ")\n", __func__, ##__VA_ARGS__); \
+   } while(0)
+#else
+#define EFI_ENTRY(format, ...) do { \
+   efi_restore_gd(); \
+   } while(0)
+#endif
+
+#define EFI_EXIT(ret) efi_exit_func(ret);
+
+extern struct efi_system_table systab;
+
 extern const efi_guid_t efi_guid_device_path;
 extern const efi_guid_t efi_guid_loaded_image;
 
+/*
+ * While UEFI objects can have callbacks, you can also call functions on
+ * protocols (classes) themselves. This struct maps a protocol GUID to its
+ * interface (usually a struct with callback functions).
+ */
+struct efi_class_map {
+   const efi_guid_t *guid;
+   const void *interface;
+};
+
+/*
+ * When the UEFI payload wants to open a protocol on an object to get its
+ * interface (usually a struct with callback functions), this struct maps the
+ * protocol GUID to the respective protocol handler open function for that
+ * object protocol combination.
+ */
+struct efi_handler {
+   const efi_guid_t *guid;
+   efi_status_t (EFIAPI *open)(void *handle,
+   efi_guid_t *protocol, void **protocol_interface,
+   void *agent_handle, void *controller_handle,
+   uint32_t attributes);
+};
+
+/*
+ * UEFI has a poor man's OO model where one "object" can be polymorphic and 
have
+ * multiple different protocols (classes) attached to it.
+ *
+ * This struct is the parent struct for all of our actual implementation 
objects
+ * that can include it to make themselves an EFI object
+ */
+struct efi_object {
+   /* Every UEFI object is part of a global object list */
+   struct list_head link;
+   /* We support up to 4 "protocols" an object can be accessed through */
+   struct efi_handler protocols[4];
+   /* The object spawner can either use this for data or as identifier */
+   void *handle;
+};
+
+/* This list contains all UEFI objects we know of */
+extern struct list_head efi_obj_list;
+
+/*
+ * Stub implementation for a protocol opener that just returns the handle as
+ * interface
+ */
 efi_status_t efi_return_handle(void *handle,
efi_guid_t *protocol, void **protocol_interface,
void *agent_handle, void *controller_handle,
uint32_t attributes);
+/* Called from places to check whether a timer expired */
+void efi_timer_check(void);
+/* PE loader implementation */
 void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info);
+/* Called once to store the pristine gd pointer */
+void efi_save_gd(void);
+/* Called from EFI_ENTRY on callback entry to put gd into the gd register */
+void efi_restore_gd(void);
+/* Called from EFI_EXIT on callback exit to restore the gd register */
+efi_status_t efi_exit_func(efi_status_t ret);
+
+#else /* defined(EFI_LOADER) */
+
+/* No loader 

[U-Boot] [PATCH v5 18/30] efi_loader: Add disk interfaces

[Alexander Graf]

A EFI applications usually want to access storage devices to load data from.

This patch adds support for EFI disk interfaces. It loops through all block
storage interfaces known to U-Boot and creates an EFI object for each existing
one. EFI applications can then through these objects call U-Boot's read and
write functions.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 

---

v1 -> v2:

  - Move to block_drvr array
  - Move to GPLv2+
  - Fix header order
  - Document efi block object struct
  - Use calloc rather than malloc & memset

v2 -> v3:

  - Adapt to newer u-boot block API
  - Add EFIAPI to function prototypes
  - Document header
  - Check for DEV_TYPE_UNKNOWN
  - Document 16byte limit for dp string
---
 include/efi_loader.h  |   2 +
 lib/efi_loader/efi_disk.c | 218 ++
 2 files changed, 220 insertions(+)
 create mode 100644 lib/efi_loader/efi_disk.c

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 3a71a77..32e0632 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -86,6 +86,8 @@ struct efi_object {
 /* This list contains all UEFI objects we know of */
 extern struct list_head efi_obj_list;
 
+/* Called by bootefi to make all disk storage accessible as EFI objects */
+int efi_disk_register(void);
 /*
  * Stub implementation for a protocol opener that just returns the handle as
  * interface
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
new file mode 100644
index 000..f93fcb2
--- /dev/null
+++ b/lib/efi_loader/efi_disk.c
@@ -0,0 +1,218 @@
+/*
+ *  EFI application disk support
+ *
+ *  Copyright (c) 2016 Alexander Graf
+ *
+ *  SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static const efi_guid_t efi_block_io_guid = BLOCK_IO_GUID;
+
+struct efi_disk_obj {
+   /* Generic EFI object parent class data */
+   struct efi_object parent;
+   /* EFI Interface callback struct for block I/O */
+   struct efi_block_io ops;
+   /* U-Boot ifname for block device */
+   const char *ifname;
+   /* U-Boot dev_index for block device */
+   int dev_index;
+   /* EFI Interface Media descriptor struct, referenced by ops */
+   struct efi_block_io_media media;
+   /* EFI device path to this block device */
+   struct efi_device_path_file_path *dp;
+};
+
+static void ascii2unicode(u16 *unicode, char *ascii)
+{
+   while (*ascii)
+   *(unicode++) = *(ascii++);
+}
+
+static efi_status_t efi_disk_open_block(void *handle, efi_guid_t *protocol,
+   void **protocol_interface, void *agent_handle,
+   void *controller_handle, uint32_t attributes)
+{
+   struct efi_disk_obj *diskobj = handle;
+
+   *protocol_interface = >ops;
+
+   return EFI_SUCCESS;
+}
+
+static efi_status_t efi_disk_open_dp(void *handle, efi_guid_t *protocol,
+   void **protocol_interface, void *agent_handle,
+   void *controller_handle, uint32_t attributes)
+{
+   struct efi_disk_obj *diskobj = handle;
+
+   *protocol_interface = diskobj->dp;
+
+   return EFI_SUCCESS;
+}
+
+static efi_status_t EFIAPI efi_disk_reset(struct efi_block_io *this,
+   char extended_verification)
+{
+   EFI_ENTRY("%p, %x", this, extended_verification);
+   return EFI_EXIT(EFI_DEVICE_ERROR);
+}
+
+enum efi_disk_direction {
+   EFI_DISK_READ,
+   EFI_DISK_WRITE,
+};
+
+static efi_status_t EFIAPI efi_disk_rw_blocks(struct efi_block_io *this,
+   u32 media_id, u64 lba, unsigned long buffer_size,
+   void *buffer, enum efi_disk_direction direction)
+{
+   struct efi_disk_obj *diskobj;
+   struct block_dev_desc *desc;
+   int blksz;
+   int blocks;
+   unsigned long n;
+
+   EFI_ENTRY("%p, %x, %"PRIx64", %lx, %p", this, media_id, lba,
+ buffer_size, buffer);
+
+   diskobj = container_of(this, struct efi_disk_obj, ops);
+   if (!(desc = get_dev(diskobj->ifname, diskobj->dev_index)))
+   return EFI_EXIT(EFI_DEVICE_ERROR);
+   blksz = desc->blksz;
+   blocks = buffer_size / blksz;
+
+#ifdef DEBUG_EFI
+   printf("EFI: %s:%d blocks=%x lba=%"PRIx64" blksz=%x dir=%d\n", __func__,
+  __LINE__, blocks, lba, blksz, direction);
+#endif
+
+   /* We only support full block access */
+   if (buffer_size & (blksz - 1))
+   return EFI_EXIT(EFI_DEVICE_ERROR);
+
+   if (direction == EFI_DISK_READ)
+   n = desc->block_read(desc, lba, blocks, buffer);
+   else
+   n = desc->block_write(desc, lba, blocks, buffer);
+
+   /* We don't do interrupts, so check for timers cooperatively */
+   efi_timer_check();
+
+#ifdef DEBUG_EFI
+   printf("EFI: %s:%d n=%lx blocks=%x\n", __func__, 

[U-Boot] [PATCH v5 28/30] arm: Allow EFI payload code to take exceptions

[Alexander Graf]

There are 2 ways an EFI payload could return into u-boot:

  - Callback function
  - Exception

While in EFI payload mode, r9 is owned by the payload and may not contain
a valid pointer to gd, so we need to fix it up. We do that properly for the
payload to callback path already.

This patch also adds gd pointer restoral for the exception path.

Signed-off-by: Alexander Graf 
---
 arch/arm/lib/interrupts.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index ec3fb77..ed83043 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -165,6 +166,7 @@ void show_regs (struct pt_regs *regs)
 
 void do_undefined_instruction (struct pt_regs *pt_regs)
 {
+   efi_restore_gd();
printf ("undefined instruction\n");
show_regs (pt_regs);
bad_mode ();
@@ -172,6 +174,7 @@ void do_undefined_instruction (struct pt_regs *pt_regs)
 
 void do_software_interrupt (struct pt_regs *pt_regs)
 {
+   efi_restore_gd();
printf ("software interrupt\n");
show_regs (pt_regs);
bad_mode ();
@@ -179,6 +182,7 @@ void do_software_interrupt (struct pt_regs *pt_regs)
 
 void do_prefetch_abort (struct pt_regs *pt_regs)
 {
+   efi_restore_gd();
printf ("prefetch abort\n");
show_regs (pt_regs);
bad_mode ();
@@ -186,6 +190,7 @@ void do_prefetch_abort (struct pt_regs *pt_regs)
 
 void do_data_abort (struct pt_regs *pt_regs)
 {
+   efi_restore_gd();
printf ("data abort\n");
show_regs (pt_regs);
bad_mode ();
@@ -193,6 +198,7 @@ void do_data_abort (struct pt_regs *pt_regs)
 
 void do_not_used (struct pt_regs *pt_regs)
 {
+   efi_restore_gd();
printf ("not used\n");
show_regs (pt_regs);
bad_mode ();
@@ -200,6 +206,7 @@ void do_not_used (struct pt_regs *pt_regs)
 
 void do_fiq (struct pt_regs *pt_regs)
 {
+   efi_restore_gd();
printf ("fast interrupt request\n");
show_regs (pt_regs);
bad_mode ();
@@ -208,6 +215,7 @@ void do_fiq (struct pt_regs *pt_regs)
 #ifndef CONFIG_USE_IRQ
 void do_irq (struct pt_regs *pt_regs)
 {
+   efi_restore_gd();
printf ("interrupt request\n");
show_regs (pt_regs);
bad_mode ();
-- 
1.8.5.6

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[U-Boot] [PATCH v5 22/30] arm64: Allow EFI payload code to take exceptions

[Alexander Graf]

There are 2 ways an EFI payload could return into u-boot:

  - Callback function
  - Exception

While in EFI payload mode, x18 is owned by the payload and may not contain
a valid pointer to gd, so we need to fix it up. We do that properly for the
payload to callback path already.

This patch also adds gd pointer restoral for the exception path.

Signed-off-by: Alexander Graf 
---
 arch/arm/lib/interrupts_64.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index b476722..7c9cfce 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -7,6 +7,7 @@
 
 #include 
 #include 
+#include 
 
 
 int interrupt_init(void)
@@ -41,6 +42,7 @@ void show_regs(struct pt_regs *regs)
  */
 void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr)
 {
+   efi_restore_gd();
printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08x\n", esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
@@ -51,6 +53,7 @@ void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr)
  */
 void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr)
 {
+   efi_restore_gd();
printf("Bad mode in \"Irq\" handler, esr 0x%08x\n", esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
@@ -61,6 +64,7 @@ void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr)
  */
 void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr)
 {
+   efi_restore_gd();
printf("Bad mode in \"Fiq\" handler, esr 0x%08x\n", esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
@@ -71,6 +75,7 @@ void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr)
  */
 void do_bad_error(struct pt_regs *pt_regs, unsigned int esr)
 {
+   efi_restore_gd();
printf("Bad mode in \"Error\" handler, esr 0x%08x\n", esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
@@ -81,6 +86,7 @@ void do_bad_error(struct pt_regs *pt_regs, unsigned int esr)
  */
 void do_sync(struct pt_regs *pt_regs, unsigned int esr)
 {
+   efi_restore_gd();
printf("\"Synchronous Abort\" handler, esr 0x%08x\n", esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
@@ -91,6 +97,7 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
  */
 void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 {
+   efi_restore_gd();
printf("\"Irq\" handler, esr 0x%08x\n", esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
@@ -101,6 +108,7 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
  */
 void do_fiq(struct pt_regs *pt_regs, unsigned int esr)
 {
+   efi_restore_gd();
printf("\"Fiq\" handler, esr 0x%08x\n", esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
@@ -114,6 +122,7 @@ void do_fiq(struct pt_regs *pt_regs, unsigned int esr)
  */
 void __weak do_error(struct pt_regs *pt_regs, unsigned int esr)
 {
+   efi_restore_gd();
printf("\"Error\" handler, esr 0x%08x\n", esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
-- 
1.8.5.6

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[U-Boot] [PATCH v5 13/30] include/efi_api.h: Add more detailed API definitions

[Alexander Graf]

The EFI API header is great, but missing a good chunk of function prototype,
GUID defines and enum declarations.

This patch extends it to cover more of the EFI API. It's still not 100%
complete, but sufficient enough for our EFI payload interface.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 

---

v2 -> v3:

  - Add EFIAPI to notify_function
  - Add access denied code

v3 -> v4:

  - Add EFI_PAGE_MASK define
---
 include/efi.h |   2 +
 include/efi_api.h | 198 --
 2 files changed, 163 insertions(+), 37 deletions(-)

diff --git a/include/efi.h b/include/efi.h
index fcafda0..1dbc3b7 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -38,6 +38,7 @@ struct efi_device_path;
 #define EFI_WRITE_PROTECTED(8 | (1UL << (BITS_PER_LONG - 1)))
 #define EFI_OUT_OF_RESOURCES   (9 | (1UL << (BITS_PER_LONG - 1)))
 #define EFI_NOT_FOUND  (14 | (1UL << (BITS_PER_LONG - 1)))
+#define EFI_ACCESS_DENIED  (15 | (1UL << (BITS_PER_LONG - 1)))
 #define EFI_SECURITY_VIOLATION (26 | (1UL << (BITS_PER_LONG - 1)))
 
 typedef unsigned long efi_status_t;
@@ -139,6 +140,7 @@ enum {
 
 #define EFI_PAGE_SHIFT 12
 #define EFI_PAGE_SIZE  (1UL << EFI_PAGE_SHIFT)
+#define EFI_PAGE_MASK  (EFI_PAGE_SIZE - 1)
 
 struct efi_mem_desc {
u32 type;
diff --git a/include/efi_api.h b/include/efi_api.h
index 4fd17d6..03f6687 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -17,11 +17,18 @@
 
 #include 
 
+/* Types and defines for EFI CreateEvent */
+enum efi_event_type {
+   EFI_TIMER_STOP = 0,
+   EFI_TIMER_PERIODIC = 1,
+   EFI_TIMER_RELATIVE = 2
+};
+
 /* EFI Boot Services table */
 struct efi_boot_services {
struct efi_table_hdr hdr;
-   void *raise_tpl;
-   void *restore_tpl;
+   efi_status_t (EFIAPI *raise_tpl)(unsigned long new_tpl);
+   void (EFIAPI *restore_tpl)(unsigned long old_tpl);
 
efi_status_t (EFIAPI *allocate_pages)(int, int, unsigned long,
  efi_physical_addr_t *);
@@ -32,21 +39,33 @@ struct efi_boot_services {
efi_status_t (EFIAPI *allocate_pool)(int, unsigned long, void **);
efi_status_t (EFIAPI *free_pool)(void *);
 
-   void *create_event;
-   void *set_timer;
-   efi_status_t(EFIAPI *wait_for_event)(unsigned long number_of_events,
-void *event, unsigned long *index);
-   void *signal_event;
-   void *close_event;
-   void *check_event;
-
-   void *install_protocol_interface;
-   void *reinstall_protocol_interface;
-   void *uninstall_protocol_interface;
+   efi_status_t (EFIAPI *create_event)(enum efi_event_type type,
+   unsigned long notify_tpl,
+   void (EFIAPI *notify_function) (void *event,
+   void *context),
+   void *notify_context, void **event);
+   efi_status_t (EFIAPI *set_timer)(void *event, int type,
+   uint64_t trigger_time);
+   efi_status_t (EFIAPI *wait_for_event)(unsigned long number_of_events,
+   void *event, unsigned long *index);
+   efi_status_t (EFIAPI *signal_event)(void *event);
+   efi_status_t (EFIAPI *close_event)(void *event);
+   efi_status_t (EFIAPI *check_event)(void *event);
+
+   efi_status_t (EFIAPI *install_protocol_interface)(
+   void **handle, efi_guid_t *protocol,
+   int protocol_interface_type, void *protocol_interface);
+   efi_status_t (EFIAPI *reinstall_protocol_interface)(
+   void *handle, efi_guid_t *protocol,
+   void *old_interface, void *new_interface);
+   efi_status_t (EFIAPI *uninstall_protocol_interface)(void *handle,
+   efi_guid_t *protocol, void *protocol_interface);
efi_status_t (EFIAPI *handle_protocol)(efi_handle_t, efi_guid_t *,
   void **);
void *reserved;
-   void *register_protocol_notify;
+   efi_status_t (EFIAPI *register_protocol_notify)(
+   efi_guid_t *protocol, void *event,
+   void **registration);
efi_status_t (EFIAPI *locate_handle)(
enum efi_locate_search_type search_type,
efi_guid_t *protocol, void *search_key,
@@ -54,7 +73,8 @@ struct efi_boot_services {
efi_status_t (EFIAPI *locate_device_path)(efi_guid_t *protocol,
struct efi_device_path **device_path,
efi_handle_t *device);
-   void *install_configuration_table;
+   efi_status_t (EFIAPI *install_configuration_table)(
+   efi_guid_t *guid, void *table);
 
efi_status_t (EFIAPI 

[U-Boot] [PATCH v5 14/30] efi_loader: Add PE image loader

[Alexander Graf]

EFI uses the PE binary format for its application images. Add support to EFI PE
binaries as well as all necessary bits for the "EFI image loader" interfaces.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 

---

v1 -> v2:

  - move memory allocation to separate patch
  - limit 32/64 to hosts that support it
  - check 32bit optional nt header magic
  - switch to GPL2+

v2 -> v3:

  - use efi_alloc
  - add EFIAPI to function prototypes
  - remove unused macros
  - reorder header inclusion
  - split relocation code into function
  - flush cache after loading

v3 -> v4:

  - Use EFI_PAGE_SHIFT define
  - Flush icache after image load
  - Fix white space in pe header

v4 -> v5:

  - Provide icache flush stub for archs which don't have it
---
 include/efi_loader.h  |  20 +++
 include/pe.h  | 263 ++
 lib/efi_loader/efi_image_loader.c | 188 +++
 3 files changed, 471 insertions(+)
 create mode 100644 include/efi_loader.h
 create mode 100644 include/pe.h
 create mode 100644 lib/efi_loader/efi_image_loader.c

diff --git a/include/efi_loader.h b/include/efi_loader.h
new file mode 100644
index 000..5618185
--- /dev/null
+++ b/include/efi_loader.h
@@ -0,0 +1,20 @@
+/*
+ *  EFI application loader
+ *
+ *  Copyright (c) 2016 Alexander Graf
+ *
+ *  SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+extern const efi_guid_t efi_guid_device_path;
+extern const efi_guid_t efi_guid_loaded_image;
+
+efi_status_t efi_return_handle(void *handle,
+   efi_guid_t *protocol, void **protocol_interface,
+   void *agent_handle, void *controller_handle,
+   uint32_t attributes);
+void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info);
diff --git a/include/pe.h b/include/pe.h
new file mode 100644
index 000..deb35a0
--- /dev/null
+++ b/include/pe.h
@@ -0,0 +1,263 @@
+/*
+ *  Portable Executable binary format structures
+ *
+ *  Copyright (c) 2016 Alexander Graf
+ *
+ *  Based on wine code
+ *
+ *  SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _PE_H
+#define _PE_H
+
+typedef struct _IMAGE_DOS_HEADER {
+   uint16_t e_magic;   /* 00: MZ Header signature */
+   uint16_t e_cblp;/* 02: Bytes on last page of file */
+   uint16_t e_cp;  /* 04: Pages in file */
+   uint16_t e_crlc;/* 06: Relocations */
+   uint16_t e_cparhdr; /* 08: Size of header in paragraphs */
+   uint16_t e_minalloc;/* 0a: Minimum extra paragraphs needed */
+   uint16_t e_maxalloc;/* 0c: Maximum extra paragraphs needed */
+   uint16_t e_ss;  /* 0e: Initial (relative) SS value */
+   uint16_t e_sp;  /* 10: Initial SP value */
+   uint16_t e_csum;/* 12: Checksum */
+   uint16_t e_ip;  /* 14: Initial IP value */
+   uint16_t e_cs;  /* 16: Initial (relative) CS value */
+   uint16_t e_lfarlc;  /* 18: File address of relocation table */
+   uint16_t e_ovno;/* 1a: Overlay number */
+   uint16_t e_res[4];  /* 1c: Reserved words */
+   uint16_t e_oemid;   /* 24: OEM identifier (for e_oeminfo) */
+   uint16_t e_oeminfo; /* 26: OEM information; e_oemid specific */
+   uint16_t e_res2[10];/* 28: Reserved words */
+   uint32_t e_lfanew;  /* 3c: Offset to extended header */
+} IMAGE_DOS_HEADER, *PIMAGE_DOS_HEADER;
+
+#define IMAGE_DOS_SIGNATURE0x5A4D /* MZ   */
+#define IMAGE_NT_SIGNATURE 0x4550 /* PE00 */
+
+#define IMAGE_FILE_MACHINE_ARM 0x01c0
+#define IMAGE_FILE_MACHINE_THUMB   0x01c2
+#define IMAGE_FILE_MACHINE_ARMNT   0x01c4
+#define IMAGE_FILE_MACHINE_AMD64   0x8664
+#define IMAGE_FILE_MACHINE_ARM64   0xaa64
+#define IMAGE_NT_OPTIONAL_HDR32_MAGIC  0x10b
+#define IMAGE_NT_OPTIONAL_HDR64_MAGIC  0x20b
+#define IMAGE_SUBSYSTEM_EFI_APPLICATION10
+
+typedef struct _IMAGE_FILE_HEADER {
+   uint16_t Machine;
+   uint16_t NumberOfSections;
+   uint32_t TimeDateStamp;
+   uint32_t PointerToSymbolTable;
+   uint32_t NumberOfSymbols;
+   uint16_t SizeOfOptionalHeader;
+   uint16_t Characteristics;
+} IMAGE_FILE_HEADER, *PIMAGE_FILE_HEADER;
+
+typedef struct _IMAGE_DATA_DIRECTORY {
+   uint32_t VirtualAddress;
+   uint32_t Size;
+} IMAGE_DATA_DIRECTORY, *PIMAGE_DATA_DIRECTORY;
+
+#define IMAGE_NUMBEROF_DIRECTORY_ENTRIES 16
+
+typedef struct _IMAGE_OPTIONAL_HEADER64 {
+   uint16_t Magic; /* 0x20b */
+   uint8_t  MajorLinkerVersion;
+   uint8_t  MinorLinkerVersion;
+   uint32_t SizeOfCode;
+   uint32_t SizeOfInitializedData;
+   uint32_t SizeOfUninitializedData;
+   uint32_t AddressOfEntryPoint;
+   uint32_t BaseOfCode;
+   uint64_t ImageBase;
+   uint32_t SectionAlignment;
+   uint32_t 

[U-Boot] [PATCH v5 11/30] arm64: Only allow dcache disabled in SPL builds

[Alexander Graf]

Now that we have an easy way to describe memory regions and enable the MMU,
there really shouldn't be anything holding people back from running with
caches enabled on AArch64. To make sure people catch early if they're missing
on the caching fun, give them a compile error.

Signed-off-by: Alexander Graf 
---
 arch/arm/cpu/armv8/cache_v8.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index df15e00..d1bd06b 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -566,6 +566,15 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, 
size_t size,
 
 #else  /* CONFIG_SYS_DCACHE_OFF */
 
+/*
+ * For SPL builds, we may want to not have dcache enabled. Any real U-Boot
+ * running however really wants to have dcache and the MMU active. Check that
+ * everything is sane and give the developer a hint if it isn't.
+ */
+#ifndef CONFIG_SPL_BUILD
+#error Please describe your MMU layout in CONFIG_SYS_MEM_MAP and enable dcache.
+#endif
+
 void invalidate_dcache_all(void)
 {
 }
-- 
1.8.5.6

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[U-Boot] [PATCH v5 10/30] arm64: Remove non-full-va map code

[Alexander Graf]

By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.

To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Add layerscape empty mmu table in .c file
---
 arch/arm/cpu/armv8/cache_v8.c  | 90 
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 37 --
 arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 94 +-
 arch/arm/include/asm/armv8/mmu.h   | 66 +-
 arch/arm/include/asm/global_data.h |  2 +-
 arch/arm/include/asm/system.h  | 12 ++--
 doc/README.arm64   | 20 --
 include/configs/hikey.h|  1 -
 include/configs/tegra210-common.h  |  2 -
 include/configs/thunderx_88xx.h| 14 
 include/configs/vexpress_aemv8a.h  |  1 -
 include/configs/xilinx_zynqmp.h|  2 -
 12 files changed, 85 insertions(+), 256 deletions(-)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 55c6f2f..df15e00 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -35,7 +35,6 @@ DECLARE_GLOBAL_DATA_PTR;
  *off:  FFF
  */
 
-#ifdef CONFIG_SYS_FULL_VA
 static u64 get_tcr(int el, u64 *pips, u64 *pva_bits)
 {
u64 max_addr = 0;
@@ -386,38 +385,11 @@ static void setup_all_pgtables(void)
gd->arch.tlb_addr = tlb_addr;
 }
 
-#else
-
-inline void set_pgtable_section(u64 *page_table, u64 index, u64 section,
-u64 memory_type, u64 attribute)
-{
-   u64 value;
-
-   value = section | PMD_TYPE_SECT | PMD_SECT_AF;
-   value |= PMD_ATTRINDX(memory_type);
-   value |= attribute;
-   page_table[index] = value;
-}
-
-inline void set_pgtable_table(u64 *page_table, u64 index, u64 *table_addr)
-{
-   u64 value;
-
-   value = (u64)table_addr | PMD_TYPE_TABLE;
-   page_table[index] = value;
-}
-#endif
-
 /* to activate the MMU we need to set up virtual memory */
 __weak void mmu_setup(void)
 {
-#ifndef CONFIG_SYS_FULL_VA
-   bd_t *bd = gd->bd;
-   u64 *page_table = (u64 *)gd->arch.tlb_addr, i, j;
-#endif
int el;
 
-#ifdef CONFIG_SYS_FULL_VA
/* Set up page tables only once */
if (!gd->arch.tlb_fillptr)
setup_all_pgtables();
@@ -425,40 +397,6 @@ __weak void mmu_setup(void)
el = current_el();
set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL),
  MEMORY_ATTRIBUTES);
-#else
-   /* Setup an identity-mapping for all spaces */
-   for (i = 0; i < (PGTABLE_SIZE >> 3); i++) {
-   set_pgtable_section(page_table, i, i << SECTION_SHIFT,
-   MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE);
-   }
-
-   /* Setup an identity-mapping for all RAM space */
-   for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-   ulong start = bd->bi_dram[i].start;
-   ulong end = bd->bi_dram[i].start + bd->bi_dram[i].size;
-   for (j = start >> SECTION_SHIFT;
-j < end >> SECTION_SHIFT; j++) {
-   set_pgtable_section(page_table, j, j << SECTION_SHIFT,
-   MT_NORMAL, PMD_SECT_NON_SHARE);
-   }
-   }
-
-   /* load TTBR0 */
-   el = current_el();
-   if (el == 1) {
-   set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
- TCR_EL1_RSVD | TCR_FLAGS | TCR_EL1_IPS_BITS,
- MEMORY_ATTRIBUTES);
-   } else if (el == 2) {
-   set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
- TCR_EL2_RSVD | TCR_FLAGS | TCR_EL2_IPS_BITS,
- MEMORY_ATTRIBUTES);
-   } else {
-   set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
- TCR_EL3_RSVD | TCR_FLAGS | TCR_EL3_IPS_BITS,
- MEMORY_ATTRIBUTES);
-   }
-#endif
 
/* enable the mmu */
set_sctlr(get_sctlr() | CR_M);
@@ -544,33 +482,6 @@ u64 *__weak arch_get_page_table(void) {
return NULL;
 }
 
-#ifndef CONFIG_SYS_FULL_VA
-void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
-enum dcache_option option)
-{
-   u64 *page_table = arch_get_page_table();
-   u64 upto, end;
-
-   if (page_table == NULL)
-   return;
-
-   end = ALIGN(start + size, (1 << MMU_SECTION_SHIFT)) >>
- MMU_SECTION_SHIFT;
-   start = start >> MMU_SECTION_SHIFT;
-   for (upto = start; upto < end; upto++) {
-   page_table[upto] &= ~PMD_ATTRINDX_MASK;
-   page_table[upto] |= 

[U-Boot] [PATCH v5 01/30] thunderx: Calculate TCR dynamically

[Alexander Graf]

Based on the memory map we can determine a lot of hard coded fields of
TCR, like the maximum VA and max PA we want to support. Calculate those
dynamically to reduce the chance for pit falls.

Signed-off-by: Alexander Graf 
---
 arch/arm/cpu/armv8/cache_v8.c| 59 +++-
 arch/arm/include/asm/armv8/mmu.h |  6 +---
 include/configs/thunderx_88xx.h  |  3 --
 3 files changed, 59 insertions(+), 9 deletions(-)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 71f0020..9229532 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -38,6 +38,58 @@ static struct mm_region mem_map[] = CONFIG_SYS_MEM_MAP;
 #define PTL1_ENTRIES CONFIG_SYS_PTL1_ENTRIES
 #define PTL2_ENTRIES CONFIG_SYS_PTL2_ENTRIES
 
+static u64 get_tcr(int el, u64 *pips, u64 *pva_bits)
+{
+   u64 max_addr = 0;
+   u64 ips, va_bits;
+   u64 tcr;
+   int i;
+
+   /* Find the largest address we need to support */
+   for (i = 0; i < ARRAY_SIZE(mem_map); i++)
+   max_addr = max(max_addr, mem_map[i].base + mem_map[i].size);
+
+   /* Calculate the maximum physical (and thus virtual) address */
+   if (max_addr > (1ULL << 44)) {
+   ips = 5;
+   va_bits = 48;
+   } else  if (max_addr > (1ULL << 42)) {
+   ips = 4;
+   va_bits = 44;
+   } else  if (max_addr > (1ULL << 40)) {
+   ips = 3;
+   va_bits = 42;
+   } else  if (max_addr > (1ULL << 36)) {
+   ips = 2;
+   va_bits = 40;
+   } else  if (max_addr > (1ULL << 32)) {
+   ips = 1;
+   va_bits = 36;
+   } else {
+   ips = 0;
+   va_bits = 32;
+   }
+
+   if (el == 1) {
+   tcr = TCR_EL1_RSVD | (ips << 32);
+   } else if (el == 2) {
+   tcr = TCR_EL2_RSVD | (ips << 16);
+   } else {
+   tcr = TCR_EL3_RSVD | (ips << 16);
+   }
+
+   /* PTWs cacheable, inner/outer WBWA and inner shareable */
+   tcr |= TCR_TG0_64K | TCR_SHARED_INNER | TCR_ORGN_WBWA | TCR_IRGN_WBWA;
+   tcr |= TCR_T0SZ(VA_BITS);
+
+   if (pips)
+   *pips = ips;
+   if (pva_bits)
+   *pva_bits = va_bits;
+
+   return tcr;
+}
+
 static void setup_pgtables(void)
 {
int l1_e, l2_e;
@@ -110,6 +162,10 @@ __weak void mmu_setup(void)
/* Set up page tables only on BSP */
if (coreid == BSP_COREID)
setup_pgtables();
+
+   el = current_el();
+   set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL),
+ MEMORY_ATTRIBUTES);
 #else
/* Setup an identity-mapping for all spaces */
for (i = 0; i < (PGTABLE_SIZE >> 3); i++) {
@@ -128,7 +184,6 @@ __weak void mmu_setup(void)
}
}
 
-#endif
/* load TTBR0 */
el = current_el();
if (el == 1) {
@@ -144,6 +199,8 @@ __weak void mmu_setup(void)
  TCR_EL3_RSVD | TCR_FLAGS | TCR_EL3_IPS_BITS,
  MEMORY_ATTRIBUTES);
}
+#endif
+
/* enable the mmu */
set_sctlr(get_sctlr() | CR_M);
 }
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 897f010..39ff745 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -159,11 +159,6 @@
 #define TCR_EL1_IPS_BITS   (UL(3) << 32)   /* 42 bits physical address */
 #define TCR_EL2_IPS_BITS   (3 << 16)   /* 42 bits physical address */
 #define TCR_EL3_IPS_BITS   (3 << 16)   /* 42 bits physical address */
-#else
-#define TCR_EL1_IPS_BITS   CONFIG_SYS_TCR_EL1_IPS_BITS
-#define TCR_EL2_IPS_BITS   CONFIG_SYS_TCR_EL2_IPS_BITS
-#define TCR_EL3_IPS_BITS   CONFIG_SYS_TCR_EL3_IPS_BITS
-#endif
 
 /* PTWs cacheable, inner/outer WBWA and inner shareable */
 #define TCR_FLAGS  (TCR_TG0_64K |  \
@@ -171,6 +166,7 @@
TCR_ORGN_WBWA | \
TCR_IRGN_WBWA | \
TCR_T0SZ(VA_BITS))
+#endif
 
 #define TCR_EL1_RSVD   (1 << 31)
 #define TCR_EL2_RSVD   (1 << 31 | 1 << 23)
diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index cece4dd..b9f93ad 100644
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -50,9 +50,6 @@
 #define CONFIG_SYS_PGTABLE_SIZE\
((CONFIG_SYS_PTL1_ENTRIES + \
  CONFIG_SYS_MEM_MAP_SIZE * CONFIG_SYS_PTL2_ENTRIES) * 8)
-#define CONFIG_SYS_TCR_EL1_IPS_BITS(5UL << 32)
-#define CONFIG_SYS_TCR_EL2_IPS_BITS(5 << 16)
-#define CONFIG_SYS_TCR_EL3_IPS_BITS(5 << 16)
 
 /* Link Definitions */
 #define CONFIG_SYS_TEXT_BASE   0x0050
-- 
1.8.5.6

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[U-Boot] [PATCH v5 12/30] disk/part.c: Expose list of available block drivers

[Alexander Graf]

We have a pretty nice and generic interface to ask for a specific block
device. However, that one is still based around the magic notion that
we know the driver name.

In order to be able to write fully generic disk access code, expose the
currently internal list to other source files so that they can scan through
all available block drivers.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 
---
 disk/part.c| 7 +--
 include/part.h | 8 
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/disk/part.c b/disk/part.c
index 1935b28..d265c2b 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -20,13 +20,8 @@
 #define PRINTF(fmt,args...)
 #endif
 
-struct block_drvr {
-   char *name;
-   block_dev_desc_t* (*get_dev)(int dev);
-   int (*select_hwpart)(int dev_num, int hwpart);
-};
 
-static const struct block_drvr block_drvr[] = {
+const struct block_drvr block_drvr[] = {
 #if defined(CONFIG_CMD_IDE)
{ .name = "ide", .get_dev = ide_get_dev, },
 #endif
diff --git a/include/part.h b/include/part.h
index dc23949..6e6205b 100644
--- a/include/part.h
+++ b/include/part.h
@@ -42,6 +42,12 @@ struct block_dev_desc {
void*priv;  /* driver private struct pointer */
 };
 
+struct block_drvr {
+   char *name;
+   block_dev_desc_t* (*get_dev)(int dev);
+   int (*select_hwpart)(int dev_num, int hwpart);
+};
+
 #define BLOCK_CNT(size, block_dev_desc) (PAD_COUNT(size, 
block_dev_desc->blksz))
 #define PAD_TO_BLOCKSIZE(size, block_dev_desc) \
(PAD_SIZE(size, block_dev_desc->blksz))
@@ -123,6 +129,8 @@ int get_device(const char *ifname, const char *dev_str,
 int get_device_and_partition(const char *ifname, const char *dev_part_str,
 block_dev_desc_t **dev_desc,
 disk_partition_t *info, int allow_whole_dev);
+
+extern const struct block_drvr block_drvr[];
 #else
 static inline block_dev_desc_t *get_dev(const char *ifname, int dev)
 { return NULL; }
-- 
1.8.5.6

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[U-Boot] [PATCH v5 04/30] thunderx: Move mmu table into board file

[Alexander Graf]

The MMU range table can vary depending on things we may only find
out at runtime. While the very simple ThunderX variant does not
change, other boards will, so move the definition from a static
entry in a header file to the board file.

Signed-off-by: Alexander Graf 
---
 arch/arm/cpu/armv8/cache_v8.c|  8 +++-
 arch/arm/include/asm/armv8/mmu.h |  2 ++
 board/cavium/thunderx/thunderx.c | 24 
 include/configs/thunderx_88xx.h  | 11 ---
 4 files changed, 29 insertions(+), 16 deletions(-)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 73628c9..55c6f2f 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -36,8 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 
 #ifdef CONFIG_SYS_FULL_VA
-static struct mm_region mem_map[] = CONFIG_SYS_MEM_MAP;
-
 static u64 get_tcr(int el, u64 *pips, u64 *pva_bits)
 {
u64 max_addr = 0;
@@ -46,7 +44,7 @@ static u64 get_tcr(int el, u64 *pips, u64 *pva_bits)
int i;
 
/* Find the largest address we need to support */
-   for (i = 0; i < ARRAY_SIZE(mem_map); i++)
+   for (i = 0; mem_map[i].size || mem_map[i].attrs; i++)
max_addr = max(max_addr, mem_map[i].base + mem_map[i].size);
 
/* Calculate the maximum physical (and thus virtual) address */
@@ -266,7 +264,7 @@ static int count_required_pts(u64 addr, int level, u64 
maxaddr)
int i;
enum pte_type pte_type = PTE_INVAL;
 
-   for (i = 0; i < ARRAY_SIZE(mem_map); i++) {
+   for (i = 0; mem_map[i].size || mem_map[i].attrs; i++) {
struct mm_region *map = _map[i];
u64 start = map->base;
u64 end = start + map->size;
@@ -364,7 +362,7 @@ static void setup_pgtables(void)
create_table();
 
/* Now add all MMU table entries one after another to the table */
-   for (i = 0; i < ARRAY_SIZE(mem_map); i++)
+   for (i = 0; mem_map[i].size || mem_map[i].attrs; i++)
add_map(_map[i]);
 
/* Create the same thing once more for our emergency page table */
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 1c490dc..06126c8 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -203,6 +203,8 @@ struct mm_region {
u64 size;
u64 attrs;
 };
+
+extern struct mm_region *mem_map;
 #endif
 
 #endif /* _ASM_ARMV8_MMU_H_ */
diff --git a/board/cavium/thunderx/thunderx.c b/board/cavium/thunderx/thunderx.c
index b926767..9131a38 100644
--- a/board/cavium/thunderx/thunderx.c
+++ b/board/cavium/thunderx/thunderx.c
@@ -10,6 +10,7 @@
 #include 
 
 #include 
+#include 
 
 #if !CONFIG_IS_ENABLED(OF_CONTROL)
 #include 
@@ -42,6 +43,29 @@ U_BOOT_DEVICE(thunderx_serial1) = {
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static struct mm_region thunderx_mem_map[] = {
+   {
+   .base = 0xUL,
+   .size = 0x400UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
+   }, {
+   .base = 0x8000UL,
+   .size = 0x400UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE,
+   }, {
+   .base = 0x8400UL,
+   .size = 0x400UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE,
+   }, {
+   /* List terminator */
+   0,
+   }
+};
+
+struct mm_region *mem_map = thunderx_mem_map;
+
 int board_init(void)
 {
return 0;
diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index 20b25f7..64e4616 100644
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -26,17 +26,6 @@
 
 #define CONFIG_SYS_LOWMEM_BASE MEM_BASE
 
-#define CONFIG_SYS_MEM_MAP {{0xUL, 0x400UL, \
- PTE_BLOCK_MEMTYPE(MT_NORMAL) | \
- PTE_BLOCK_NON_SHARE},  \
-{0x8000UL, 0x400UL, \
- PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | 
\
- PTE_BLOCK_NON_SHARE},  \
-{0x8400UL, 0x400UL, \
- PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | 
\
- PTE_BLOCK_NON_SHARE},  \
-   }
-
 #define CONFIG_SYS_MEM_MAP_SIZE3
 
 #define CONFIG_SYS_VA_BITS 48
-- 
1.8.5.6

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[U-Boot] [PATCH v5 00/30] EFI payload / application support

[Alexander Graf]

This is my (now very late) Christmas present for my openSUSE friends :).

U-Boot is a great project for embedded devices. However, convincing
everyone involved that only for "a few oddball ARM devices" we need to
support different configuration formats from grub2 when all other platforms
(PPC, System Z, x86) are standardized on a single format is a nightmare.

So we started to explore alternatives. At first, people tried to get
grub2 running using the u-boot api interface. However, that one didn't
support relocations, so you had to know where to link grub2 to at compile
time. It also seems to be broken more often than not. And on top of it all,
it's a one-off interface, so yet another thing to maintain.

That led to a nifty idea. What if we can just implement the EFI application
protocol on top of U-Boot? Then we could compile a single grub2 binary for
uEFI based systems and U-Boot based systems and as soon as that one's loaded,
everything looks and feels (almost) the same.

This patch set is the result of pursuing this endeavor.

  - I am successfully able to run grub2 and Linux EFI binaries with this code.
  - When enabled, the resulting U-Boot binary only grows by ~10kb,
so it's very light weight.
  - It works on 32bit ARM and AArch64. 
  - All storage devices are directly accessible
  - No EFI variables
  - Removable media booting (search for /efi/boot/boota{a64,arm}.efi)
  - Everything in place for runtime service support

Of course, there are still a few things one could do on top:

  - Improve disk media detection (don't scan, use what information we have)
  - Add EFI variable support using NVRAM
  - Add GFX support
  - Make EFI Shell work ;)
  - Network device support
  - Support for payload exit

But so far, I'm very happy with the state of the patches. They completely
eliminate potential arguments against U-Boot internally and give users the
chance to run with the same level of comfort on all firmware types.

Version 5 was successfully tested to boot grub2 and Linux from there on a
beagle-xm. Please apply the arm64 mmu patch set if you want to run this on an
AArch64 system.

If you read this far and want to try out the patches, feel free to grab
the source from git at:

  https://github.com/agraf/u-boot efi-v5

v1 -> v2:
  - move memory allocation to separate patch
  - limit 32/64 to hosts that support it
  - check 32bit optional nt header magic
  - switch to GPLv2+
  - Fix typo s/does now/does not/
  - Add #ifdefs around header to allow inclusion when efi_loader is disabled
  - Add stub efi_restore_gd() function when efi_loader is disabled
  - Disable debug
  - Mark runtime region as such
  - Fix up memory map
  - Allow efi_restore_gd to be called before first efi entry
  - Add 32bit arm cache workaround
  - Move memory map to separate patch
  - Change BTS version to 2.5
  - Fix return values for a few callbacks to more EFI compliant ones
  - Change vendor to "Das U-Boot"
  - Add warning when truncating timer trigger
  - Add runtime detach
  - Enable runtime relocations
  - Add get_time
  - Fix relocation
  - Fix 32bit
  - Add am335x support
  - Move section definition to header
  - Add systab to runtime section
  - Add self-relocation hook table
  - Relocate efi_runtime section early during bootup
  - Fix return values for a number of callbacks to be more UEFI compliant
  - Move to block_drvr array
  - Fix header order
  - Document efi block object struct
  - Use calloc rather than malloc & memset
  - Default to y
  - New patches: 
- disk/part.c: Expose list of available block drivers
- arm64: Allow exceptions to return
- arm64: Allow EFI payload code to take exceptions
- efi_loader: Add DCACHE_OFF support for arm64
- efi_loader: Add distro boot script for removable media

v2 -> v3:

  - Add EFIAPI to notify_function
  - Add access denied code
  - use efi_alloc
  - add EFIAPI to function prototypes
  - remove unused macros
  - reorder header inclusion
  - split relocation code into function
  - flush cache after loading
  - Use external efi_memory helpers
  - Add EFIAPI to function prototypes
  - Initialize event timer to -1ULL to prevent early firing
  - Document header
  - Move obj list to lib
  - Remove implicit guid table
  - Add guid compare function
  - Fix return values
  - Implement efi_wait_for_event
  - Add EFIAPI to function prototypes
  - Patch reset to NULL
  - Add EFIAPI to function prototypes
  - Document header
  - Add dm.h include
  - Remove non-dm rtc support
  - Return DEVICE_ERROR in rtc path
  - Adapt to newer u-boot block API
  - Add EFIAPI to function prototypes
  - Document header
  - Check for DEV_TYPE_UNKNOWN
  - Document 16byte limit for dp string
  - Move to new cmd directory
  - Add kconfig option
  - Fix comment style
  - Add help text
  - s/-1/-ENOENT
  - Move obj list to lib
  - Rewrite memory allocation and map
  - Document header
  - Add memory file
  - New files:
- README patch
- MAINTAINERS patch

v3 -> v4:

  - Add 

[U-Boot] [PATCH v5 06/30] tegra: Replace home grown mmu code with generic table approach

[Alexander Graf]

Now that we have nice table driven page table creating code that gives
us everything we need, move to that.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Move mmu tables into .c file
---
 arch/arm/mach-tegra/arm64-mmu.c   | 132 +-
 include/configs/tegra210-common.h |   2 +
 2 files changed, 19 insertions(+), 115 deletions(-)

diff --git a/arch/arm/mach-tegra/arm64-mmu.c b/arch/arm/mach-tegra/arm64-mmu.c
index c227652..501c4f0 100644
--- a/arch/arm/mach-tegra/arm64-mmu.c
+++ b/arch/arm/mach-tegra/arm64-mmu.c
@@ -12,120 +12,22 @@
 #include 
 #include 
 
-DECLARE_GLOBAL_DATA_PTR;
-
-#define SECTION_SHIFT_L1   30UL
-#define SECTION_SHIFT_L2   21UL
-#define BLOCK_SIZE_L0  0x80UL
-#define BLOCK_SIZE_L1  (1 << SECTION_SHIFT_L1)
-#define BLOCK_SIZE_L2  (1 << SECTION_SHIFT_L2)
-
-#define TCR_TG1_4K (1 << 31)
-#define TCR_EPD1_DISABLE   (1 << 23)
-#define TEGRA_VA_BITS  40
-#define TEGRA_TCR  TCR_TG1_4K | \
-   TCR_EPD1_DISABLE | \
-   TCR_SHARED_OUTER | \
-   TCR_SHARED_INNER | \
-   TCR_IRGN_WBWA | \
-   TCR_ORGN_WBWA | \
-   TCR_T0SZ(TEGRA_VA_BITS)
-
-#define MEMORY_ATTRPMD_SECT_AF | PMD_SECT_INNER_SHARE |\
-   PMD_ATTRINDX(MT_NORMAL) |   \
-   PMD_TYPE_SECT
-#define DEVICE_ATTRPMD_SECT_AF | PMD_SECT_PXN |\
-   PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_NGNRNE) | \
-   PMD_TYPE_SECT
-
-/* 4K size is required to place 512 entries in each level */
-#define TLB_TABLE_SIZE 0x1000
-
-/*
- * This mmu table looks as below
- * Level 0 table contains two entries to 512GB sizes. One is Level1 Table 0
- * and other Level1 Table1.
- * Level1 Table0 contains entries for each 1GB from 0 to 511GB.
- * Level1 Table1 contains entries for each 1GB from 512GB to 1TB.
- * Level2 Table0, Level2 Table1, Level2 Table2 and Level2 Table3 contains
- * entries for each 2MB starting from 0GB, 1GB, 2GB and 3GB respectively.
- */
-void mmu_setup(void)
-{
-   int el;
-   u64 i, section_l1t0, section_l1t1;
-   u64 section_l2t0, section_l2t1, section_l2t2, section_l2t3;
-   u64 *level0_table = (u64 *)gd->arch.tlb_addr;
-   u64 *level1_table_0 = (u64 *)(gd->arch.tlb_addr + TLB_TABLE_SIZE);
-   u64 *level1_table_1 = (u64 *)(gd->arch.tlb_addr + (2 * TLB_TABLE_SIZE));
-   u64 *level2_table_0 = (u64 *)(gd->arch.tlb_addr + (3 * TLB_TABLE_SIZE));
-   u64 *level2_table_1 = (u64 *)(gd->arch.tlb_addr + (4 * TLB_TABLE_SIZE));
-   u64 *level2_table_2 = (u64 *)(gd->arch.tlb_addr + (5 * TLB_TABLE_SIZE));
-   u64 *level2_table_3 = (u64 *)(gd->arch.tlb_addr + (6 * TLB_TABLE_SIZE));
-
-   /* Invalidate all table entries */
-   memset(level0_table, 0, PGTABLE_SIZE);
-
-   level0_table[0] =
-   (u64)level1_table_0 | PMD_TYPE_TABLE;
-   level0_table[1] =
-   (u64)level1_table_1 | PMD_TYPE_TABLE;
-
-   /*
-* set level 1 table 0, covering 0 to 512GB
-* set level 1 table 1, covering 512GB to 1TB
-*/
-   section_l1t0 = 0;
-   section_l1t1 = BLOCK_SIZE_L0;
-
-   for (i = 0; i < 512; i++) {
-   level1_table_0[i] = section_l1t0;
-   if (i >= 4)
-   level1_table_0[i] |= MEMORY_ATTR;
-   level1_table_1[i] = section_l1t1;
-   level1_table_1[i] |= MEMORY_ATTR;
-   section_l1t0 += BLOCK_SIZE_L1;
-   section_l1t1 += BLOCK_SIZE_L1;
+static struct mm_region tegra_mem_map[] = {
+   {
+   .base = 0x0UL,
+   .size = 0x8000UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+   }, {
+   .base = 0x8000UL,
+   .size = 0xff8000UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
+   }, {
+   /* List terminator */
+   0,
}
+};
 
-   level1_table_0[0] =
-   (u64)level2_table_0 | PMD_TYPE_TABLE;
-   level1_table_0[1] =
-   (u64)level2_table_1 | PMD_TYPE_TABLE;
-   level1_table_0[2] =
-   (u64)level2_table_2 | PMD_TYPE_TABLE;
-   level1_table_0[3] =
-   (u64)level2_table_3 | PMD_TYPE_TABLE;
-
-   section_l2t0 = 0;
-   section_l2t1 = section_l2t0 + BLOCK_SIZE_L1; /* 1GB */
-   section_l2t2 = section_l2t1 + BLOCK_SIZE_L1; /* 2GB */
-   section_l2t3 = section_l2t2 + BLOCK_SIZE_L1; /* 3GB */
-
-   for (i = 0; i < 512; i++) {
-   level2_table_0[i] = section_l2t0 | DEVICE_ATTR;
-   level2_table_1[i] = section_l2t1 | 

[U-Boot] [PATCH v5 16/30] efi_loader: Add console interface

[Alexander Graf]

One of the basic EFI interfaces is the console interface. Using it an EFI
application can interface with the user. This patch implements an EFI console
interface using getc() and putc().

Today, we only implement text based consoles. We also convert the EFI Unicode
characters to UTF-8 on the fly, hoping that everyone managed to jump on the
train by now.

Signed-off-by: Alexander Graf 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass 

---

v1 -> v2:

  - Move to GPLv2+

v2 -> v3:

  - Add EFIAPI to function prototypes

v3 -> v4:

  - return EFI_SUCCESS in efi_cout_enable_cursor()
---
 include/efi_loader.h |   5 +
 lib/efi_loader/efi_console.c | 360 +++
 2 files changed, 365 insertions(+)
 create mode 100644 lib/efi_loader/efi_console.c

diff --git a/include/efi_loader.h b/include/efi_loader.h
index d63fa3a..b4e82ac 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -31,6 +31,11 @@
 
 extern struct efi_system_table systab;
 
+extern const struct efi_simple_text_output_protocol efi_con_out;
+extern const struct efi_simple_input_interface efi_con_in;
+extern const struct efi_console_control_protocol efi_console_control;
+
+extern const efi_guid_t efi_guid_console_control;
 extern const efi_guid_t efi_guid_device_path;
 extern const efi_guid_t efi_guid_loaded_image;
 
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
new file mode 100644
index 000..2e0228c
--- /dev/null
+++ b/lib/efi_loader/efi_console.c
@@ -0,0 +1,360 @@
+/*
+ *  EFI application console interface
+ *
+ *  Copyright (c) 2016 Alexander Graf
+ *
+ *  SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+
+/* If we can't determine the console size, default to 80x24 */
+static int console_columns = 80;
+static int console_rows = 24;
+static bool console_size_queried;
+
+const efi_guid_t efi_guid_console_control = CONSOLE_CONTROL_GUID;
+
+#define cESC '\x1b'
+#define ESC "\x1b"
+
+static efi_status_t EFIAPI efi_cin_get_mode(
+   struct efi_console_control_protocol *this,
+   int *mode, char *uga_exists, char *std_in_locked)
+{
+   EFI_ENTRY("%p, %p, %p, %p", this, mode, uga_exists, std_in_locked);
+
+   if (mode)
+   *mode = EFI_CONSOLE_MODE_TEXT;
+   if (uga_exists)
+   *uga_exists = 0;
+   if (std_in_locked)
+   *std_in_locked = 0;
+
+   return EFI_EXIT(EFI_SUCCESS);
+}
+
+static efi_status_t EFIAPI efi_cin_set_mode(
+   struct efi_console_control_protocol *this, int mode)
+{
+   EFI_ENTRY("%p, %d", this, mode);
+   return EFI_EXIT(EFI_UNSUPPORTED);
+}
+
+static efi_status_t EFIAPI efi_cin_lock_std_in(
+   struct efi_console_control_protocol *this,
+   uint16_t *password)
+{
+   EFI_ENTRY("%p, %p", this, password);
+   return EFI_EXIT(EFI_UNSUPPORTED);
+}
+
+const struct efi_console_control_protocol efi_console_control = {
+   .get_mode = efi_cin_get_mode,
+   .set_mode = efi_cin_set_mode,
+   .lock_std_in = efi_cin_lock_std_in,
+};
+
+static struct simple_text_output_mode efi_con_mode = {
+   .max_mode = 0,
+   .mode = 0,
+   .attribute = 0,
+   .cursor_column = 0,
+   .cursor_row = 0,
+   .cursor_visible = 1,
+};
+
+static int term_read_reply(int *n, int maxnum, char end_char)
+{
+   char c;
+   int i = 0;
+
+   c = getc();
+   if (c != cESC)
+   return -1;
+   c = getc();
+   if (c != '[')
+   return -1;
+
+   n[0] = 0;
+   while (1) {
+   c = getc();
+   if (c == ';') {
+   i++;
+   if (i >= maxnum)
+   return -1;
+   n[i] = 0;
+   continue;
+   } else if (c == end_char) {
+   break;
+   } else if (c > '9' || c < '0') {
+   return -1;
+   }
+
+   /* Read one more decimal position */
+   n[i] *= 10;
+   n[i] += c - '0';
+   }
+
+   return 0;
+}
+
+static efi_status_t EFIAPI efi_cout_reset(
+   struct efi_simple_text_output_protocol *this,
+   char extended_verification)
+{
+   EFI_ENTRY("%p, %d", this, extended_verification);
+   return EFI_EXIT(EFI_UNSUPPORTED);
+}
+
+static void print_unicode_in_utf8(u16 c)
+{
+   char utf8[4] = { 0 };
+   char *b = utf8;
+
+   if (c < 0x80) {
+   *(b++) = c;
+   } else if (c < 0x800) {
+   *(b++) = 192 + c / 64;
+   *(b++) = 128 + c % 64;
+   } else {
+   *(b++) = 224 + c / 4096;
+   *(b++) = 128 + c / 64 % 64;
+   *(b++) = 128 + c % 64;
+   }
+
+   puts(utf8);
+}
+
+static efi_status_t EFIAPI 

[U-Boot] [PATCH v5 20/30] efi_loader: Implement memory allocation and map

[Alexander Graf]

The EFI loader needs to maintain views of memory - general system memory
windows as well as used locations inside those and potential runtime service
MMIO windows.

To manage all of these, add a few helpers that maintain an internal
representation of the map the similar to how the EFI API later on reports
it to the application.

For allocations, the scheme is very simple. We basically allow allocations
to replace chunks of previously done maps, so that a new LOADER_DATA
allocation for example can remove a piece of the RAM map. When no specific
address is given, we just take the highest possible address in the lowest
RAM map that fits the allocation size.

Signed-off-by: Alexander Graf 
Tested-by: Simon Glass 

---

v2 -> v3:

  - Rewrite memory allocation and map
  - Document header

v3 -> v4:

  - Use EFI_PAGE_.* defines
  - Return EFI_OUT_OF_RESOURCES in efi_allocate_pages
---
 common/board_r.c|   3 +
 include/efi_loader.h|  19 +++
 lib/efi_loader/efi_memory.c | 319 
 3 files changed, 341 insertions(+)
 create mode 100644 lib/efi_loader/efi_memory.c

diff --git a/common/board_r.c b/common/board_r.c
index 6432d23..2cb6836 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -795,6 +795,9 @@ init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_CLOCKS
set_cpu_clk_info, /* Setup clock information */
 #endif
+#ifdef CONFIG_EFI_LOADER
+   efi_memory_init,
+#endif
stdio_init_tables,
initr_serial,
initr_announce,
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 32e0632..e344566 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -109,6 +109,25 @@ efi_status_t efi_exit_func(efi_status_t ret);
 /* Call this to relocate the runtime section to an address space */
 void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
 
+/* Generic EFI memory allocator, call this to get memory */
+void *efi_alloc(uint64_t len, int memory_type);
+/* More specific EFI memory allocator, called by EFI payloads */
+efi_status_t efi_allocate_pages(int type, int memory_type, unsigned long pages,
+   uint64_t *memory);
+/* EFI memory free function. Not implemented today */
+efi_status_t efi_free_pages(uint64_t memory, unsigned long pages);
+/* Returns the EFI memory map */
+efi_status_t efi_get_memory_map(unsigned long *memory_map_size,
+   struct efi_mem_desc *memory_map,
+   unsigned long *map_key,
+   unsigned long *descriptor_size,
+   uint32_t *descriptor_version);
+/* Adds a range into the EFI memory map */
+uint64_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type,
+   bool overlap_only_ram);
+/* Called by board init to initialize the EFI memory map */
+int efi_memory_init(void);
+
 /*
  * Use these to indicate that your code / data should go into the EFI runtime
  * section and thus still be available when the OS is running
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
new file mode 100644
index 000..c82b53f
--- /dev/null
+++ b/lib/efi_loader/efi_memory.c
@@ -0,0 +1,319 @@
+/*
+ *  EFI application memory management
+ *
+ *  Copyright (c) 2016 Alexander Graf
+ *
+ *  SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* #define DEBUG_EFI */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct efi_mem_list {
+   struct list_head link;
+   struct efi_mem_desc desc;
+};
+
+/* This list contains all memory map items */
+LIST_HEAD(efi_mem);
+
+/*
+ * Unmaps all memory occupied by the carve_desc region from the
+ * list entry pointed to by map.
+ *
+ * Returns 1 if carving was performed or 0 if the regions don't overlap.
+ * Returns -1 if it would affect non-RAM regions but overlap_only_ram is set.
+ * Carving is only guaranteed to complete when all regions return 0.
+ */
+static int efi_mem_carve_out(struct efi_mem_list *map,
+struct efi_mem_desc *carve_desc,
+bool overlap_only_ram)
+{
+   struct efi_mem_list *newmap;
+   struct efi_mem_desc *map_desc = >desc;
+   uint64_t map_start = map_desc->physical_start;
+   uint64_t map_end = map_start + (map_desc->num_pages << EFI_PAGE_SHIFT);
+   uint64_t carve_start = carve_desc->physical_start;
+   uint64_t carve_end = carve_start +
+(carve_desc->num_pages << EFI_PAGE_SHIFT);
+
+   /* check whether we're overlapping */
+   if ((carve_end <= map_start) || (carve_start >= map_end))
+   return 0;
+
+   /* We're overlapping with non-RAM, warn the caller if desired */
+   if (overlap_only_ram && (map_desc->type != EFI_CONVENTIONAL_MEMORY))
+   return -1;
+
+   /* Sanitize carve_start and carve_end to lie 

[U-Boot] [PATCH v5 08/30] dwmmc: Increase retry timeout

[Alexander Graf]

When enable dcache on HiKey, we're running into MMC command timeouts
because our retry loop is now faster than the eMMC (or an external SD
card) can answer.

Increase the retry count to the same as the timeout value for status
reports.

The real fix is obviously to not base this whole thing on a cycle counter
but on real wall time, but that would be slightly more intrusive.

Signed-off-by: Alexander Graf 
---
 drivers/mmc/dw_mmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 909e3ca..7329f40 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -189,7 +189,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd 
*cmd,
 data ? DIV_ROUND_UP(data->blocks, 8) : 0);
int ret = 0, flags = 0, i;
unsigned int timeout = 10;
-   u32 retry = 1;
+   u32 retry = 10;
u32 mask, ctrl;
ulong start = get_timer(0);
struct bounce_buffer bbstate;
-- 
1.8.5.6

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[U-Boot] [PATCH v5 09/30] hikey: Add MMU tables

[Alexander Graf]

The hikey runs with dcache disabled today. There really should be no reason
not to use caches on AArch64, so let's add MMU definitions and enable the
dcache.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Move tables to .c file
---
 board/hisilicon/hikey/hikey.c | 21 +
 include/configs/hikey.h   |  5 +++--
 2 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
index c4ae40b..1edc807 100644
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /*TODO drop this table in favour of device tree */
 static const struct hikey_gpio_platdata hi6220_gpio[] = {
@@ -87,6 +88,26 @@ U_BOOT_DEVICE(hikey_seriala) = {
.platdata = _platdata,
 };
 
+static struct mm_region hikey_mem_map[] = {
+   {
+   .base = 0x0UL,
+   .size = 0x8000UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
+   }, {
+   .base = 0x8000UL,
+   .size = 0x8000UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+   }, {
+   /* List terminator */
+   0,
+   }
+};
+
+struct mm_region *mem_map = hikey_mem_map;
+
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_uart_init(void)
 {
diff --git a/include/configs/hikey.h b/include/configs/hikey.h
index 796861e..d33dcef 100644
--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@@ -21,8 +21,9 @@
 
 #define CONFIG_SUPPORT_RAW_INITRD
 
-/* Cache Definitions */
-#define CONFIG_SYS_DCACHE_OFF
+/* MMU Definitions */
+#define CONFIG_SYS_CACHELINE_SIZE  64
+#define CONFIG_SYS_FULL_VA
 
 #define CONFIG_IDENT_STRING"hikey"
 
-- 
1.8.5.6

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[U-Boot] [PATCH v5 07/30] vexpress64: Add MMU tables

[Alexander Graf]

There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Move tables to .c file
---
 board/armltd/vexpress64/vexpress64.c | 21 +
 include/configs/vexpress_aemv8a.h|  6 +++---
 2 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/board/armltd/vexpress64/vexpress64.c 
b/board/armltd/vexpress64/vexpress64.c
index 6efc8c1..973b579 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include "pcie.h"
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -28,6 +29,26 @@ U_BOOT_DEVICE(vexpress_serials) = {
.platdata = _platdata,
 };
 
+static struct mm_region vexpress64_mem_map[] = {
+   {
+   .base = 0x0UL,
+   .size = 0x8000UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+   }, {
+   .base = 0x8000UL,
+   .size = 0xff8000UL,
+   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
+   }, {
+   /* List terminator */
+   0,
+   }
+};
+
+struct mm_region *mem_map = vexpress64_mem_map;
+
 /* This function gets replaced by platforms supporting PCIe.
  * The replacement function, eg. on Juno, initialises the PCIe bus.
  */
diff --git a/include/configs/vexpress_aemv8a.h 
b/include/configs/vexpress_aemv8a.h
index 133041b..ddb9848 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -19,9 +19,9 @@
 
 #define CONFIG_SUPPORT_RAW_INITRD
 
-/* Cache Definitions */
-#define CONFIG_SYS_DCACHE_OFF
-#define CONFIG_SYS_ICACHE_OFF
+/* MMU Definitions */
+#define CONFIG_SYS_CACHELINE_SIZE  64
+#define CONFIG_SYS_FULL_VA
 
 #define CONFIG_IDENT_STRING" vexpress_aemv8a"
 #define CONFIG_BOOTP_VCI_STRING"U-Boot.armv8.vexpress_aemv8a"
-- 
1.8.5.6

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[U-Boot] [PATCH v5 02/30] arm64: Disable TTBR1 maps in EL1

[Alexander Graf]

When running in EL1, AArch64 knows two page table maps. One with addresses
that start with all zeros (TTBR0) and one with addresses that start with all
ones (TTBR1).

In U-Boot we don't care about the high up maps, so just disable them to ensure
we don't walk an invalid page table by accident.

Reported-by: Mark Rutland 
Signed-off-by: Alexander Graf 
---
 arch/arm/cpu/armv8/cache_v8.c| 2 +-
 arch/arm/include/asm/armv8/mmu.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 9229532..d92f2d1 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -71,7 +71,7 @@ static u64 get_tcr(int el, u64 *pips, u64 *pva_bits)
}
 
if (el == 1) {
-   tcr = TCR_EL1_RSVD | (ips << 32);
+   tcr = TCR_EL1_RSVD | (ips << 32) | TCR_EPD1_DISABLE;
} else if (el == 2) {
tcr = TCR_EL2_RSVD | (ips << 16);
} else {
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 39ff745..0080ae6 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -154,6 +154,7 @@
 #define TCR_TG0_4K (0 << 14)
 #define TCR_TG0_64K(1 << 14)
 #define TCR_TG0_16K(2 << 14)
+#define TCR_EPD1_DISABLE   (1 << 23)
 
 #ifndef CONFIG_SYS_FULL_VA
 #define TCR_EL1_IPS_BITS   (UL(3) << 32)   /* 42 bits physical address */
-- 
1.8.5.6

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Re: [U-Boot] Newbie SPL question for socfpga_sockit

[George Broz]

On 3 March 2016 at 15:07, Marek Vasut  wrote:

>> On 3 March 2016 at 14:42, Marek Vasut  wrote:
>>> On 03/03/2016 11:27 PM, George Broz wrote:
 Hi Marek,
>>>
>>> Hi!
>>>
 Yes - would love to be using the SPL from 2016.01 for the Terasic board,
 but it does not seem to be working for me with the files from the repo or
 with handoff files I supply & run through qts-filter.sh. This is about two
 layers below where my normal expertise is, so any help getting 2016.01
 (or later) SPL working (with the end goal of having working USB) would
 be much appreciated!
>>>
>>> Are you using sockit ? Which revision (it's etched in the PCB from the
>>> bottom, it's not silkscreen but really part of the copper) ? I'll test
>>> it and get back to you. If I happen to forget about it, remind me ;-)
>>>
 Best regards,
 --George Broz


 On 3 March 2016 at 14:09, Marek Vasut  wrote:
> On 03/03/2016 11:00 PM, George Broz wrote:
>> On 3 March 2016 at 06:51, Marek Vasut  wrote:
>>> On 03/03/2016 03:48 PM, Dinh Nguyen wrote:


 On 03/02/2016 05:24 PM, Marek Vasut wrote:
>
> Well, that's our usual USB/QSPI cache issue that's tormenting your 
> soul.
> CCing Chin ;-)
>
> Does the issue by any chance magically disappear if you apply this 
> patch:
>
> diff --git a/arch/arm/include/asm/system.h 
> b/arch/arm/include/asm/system.h
> index 026e7ef..06802c6 100644
> --- a/arch/arm/include/asm/system.h
> +++ b/arch/arm/include/asm/system.h
> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>
>  /* options available for data cache on each page */
>  enum dcache_option {
> -   DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
> +   DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
> TTB_SECT_XN_MASK | TTB_SECT,
> DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
> DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
> DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>
>>
>> The 2016.01 code I'm using already includes this patch. If I try
>> reading a USB stick with dcache on or off
>> I get the same result:
>>
>> => dcache off
>> => usb reset
>> resetting USB...
>> USB0:   Core Release: 2.93a
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> scanning bus 0 for devices... 1 USB Device(s) found
>> => usb tree
>> USB device tree:
>>   1  Hub (480 Mb/s, 0mA)
>>   U-Boot Root Hub
>
> This more likely means that either clock or reset bits are not
> configured correctly OR you're using the wrong controller. Since
> you're mixing old U-Boot SPL with new U-Boot, there can be some
> discrepancy and I have no idea how to help you with that :(
>
>
> Best regards,
> Marek Vasut
>>>
>>>
>>> --
>>> Best regards,
>>> Marek Vasut

> On 03/03/2016 11:57 PM, George Broz wrote:
>> Yes - using SocKit, revision D (etching is 10-31212180-D0).
>>
>> Thanks - any help is much appreciated!
>
> Try attached patch.
>

Thanks, Marek. The patch applied cleanly, but the end result is the same

(with DLEVEL=1 in sequencer.c) I get
U-Boot SPL 2016.01 (Mar 03 2016 - 15:28:06)
scc_mgr_initialize:281: Clearing SCC RFILE index 0
scc_mgr_initialize:281: Clearing SCC RFILE index 1
scc_mgr_initialize:281: Clearing SCC RFILE index 2
scc_mgr_initialize:281: Clearing SCC RFILE index 3
scc_mgr_initialize:281: Clearing SCC RFILE index 4
scc_mgr_initialize:281: Clearing SCC RFILE index 5
scc_mgr_initialize:281: Clearing SCC RFILE index 6
scc_mgr_initialize:281: Clearing SCC RFILE index 7
scc_mgr_initialize:281: Clearing SCC RFILE index 8
scc_mgr_initialize:281: Clearing SCC RFILE index 9
scc_mgr_initialize:281: Clearing SCC RFILE index 10
scc_mgr_initialize:281: Clearing SCC RFILE index 11
scc_mgr_initialize:281: Clearing SCC RFILE index 12
scc_mgr_initialize:281: Clearing SCC RFILE index 13
scc_mgr_initialize:281: Clearing SCC RFILE index 14
scc_mgr_initialize:281: Clearing SCC RFILE index 15

4x then hang.



>
>> Best regards,
>> --George
>>


>
> --
> Best regards,
> Marek Vasut
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Re: [U-Boot] [PATCH 2/2] imx: mx7d: move MX7D to Kconfig entry

[Fabio Estevam]

On Thu, Mar 3, 2016 at 4:56 AM, Peng Fan  wrote:
> If including MX7D in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS
>  will not effect.So move MX7D to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS 
> to
> "select MX7D" to boards using i.MX7 Dual.
>
> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 
> Cc: Fabio Estevam 

Reviewed-by: Fabio Estevam 
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Re: [U-Boot] [PATCH 1/2] imx: mx6sx: move MX6SX to Kconfig entry

[Fabio Estevam]

On Thu, Mar 3, 2016 at 4:56 AM, Peng Fan  wrote:
> If including MX6SX in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS
> will not effect.So move MX6SX to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS 
> to
> "select MX6SX" to boards using i.MX6 SoloX.
>
> Signed-off-by: Peng Fan 

Don't you want to put in your nxp address?

> Cc: Stefano Babic 
> Cc: Fabio Estevam 

Reviewed-by: Fabio Estevam 
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Re: [U-Boot] Newbie SPL question for socfpga_sockit

[Marek Vasut]

On 03/03/2016 11:00 PM, George Broz wrote:
> On 3 March 2016 at 06:51, Marek Vasut  wrote:
>> On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
>>>
>>>
>>> On 03/02/2016 05:24 PM, Marek Vasut wrote:

 Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
 CCing Chin ;-)

 Does the issue by any chance magically disappear if you apply this patch:

 diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
 index 026e7ef..06802c6 100644
 --- a/arch/arm/include/asm/system.h
 +++ b/arch/arm/include/asm/system.h
 @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)

  /* options available for data cache on each page */
  enum dcache_option {
 -   DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
 +   DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
 TTB_SECT_XN_MASK | TTB_SECT,
 DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
 DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
 DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),

> 
> The 2016.01 code I'm using already includes this patch. If I try
> reading a USB stick with dcache on or off
> I get the same result:
> 
> => dcache off
> => usb reset
> resetting USB...
> USB0:   Core Release: 2.93a
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> scanning bus 0 for devices... 1 USB Device(s) found
> => usb tree
> USB device tree:
>   1  Hub (480 Mb/s, 0mA)
>   U-Boot Root Hub

This more likely means that either clock or reset bits are not
configured correctly OR you're using the wrong controller. Since
you're mixing old U-Boot SPL with new U-Boot, there can be some
discrepancy and I have no idea how to help you with that :(


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Re: [U-Boot] Newbie SPL question for socfpga_sockit

[George Broz]

On 3 March 2016 at 06:51, Marek Vasut  wrote:
> On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
>>
>>
>> On 03/02/2016 05:24 PM, Marek Vasut wrote:
>>>
>>> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
>>> CCing Chin ;-)
>>>
>>> Does the issue by any chance magically disappear if you apply this patch:
>>>
>>> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>>> index 026e7ef..06802c6 100644
>>> --- a/arch/arm/include/asm/system.h
>>> +++ b/arch/arm/include/asm/system.h
>>> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>>>
>>>  /* options available for data cache on each page */
>>>  enum dcache_option {
>>> -   DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
>>> +   DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
>>> TTB_SECT_XN_MASK | TTB_SECT,
>>> DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>>> DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>>> DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>>>

The 2016.01 code I'm using already includes this patch. If I try
reading a USB stick with dcache on or off
I get the same result:

=> dcache off
=> usb reset
resetting USB...
USB0:   Core Release: 2.93a
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
scanning bus 0 for devices... 1 USB Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  U-Boot Root Hub


>>
>> I'm away from my office today and don't have access to the sockit. I can
>> test this tomorrow.
>>
>> But what's interesting is that I have the DE0-NANO-SOCKIT board at home,
>> and USB seems to be working fine with dcache on.
>
> Yeah, the USB issue happens only with some stick :-/

I've tried five different sticks, same result.

--George

>
>
> --
> Best regards,
> Marek Vasut
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Re: [U-Boot] Newbie SPL question for socfpga_sockit

[George Broz]

On 2 March 2016 at 23:11, Phil Reid  wrote:
> On 3/03/2016 2:49 PM, George Broz wrote:
>>
>> On 1 March 2016 at 19:49, Phil Reid  wrote:
>>>
>>> On 2/03/2016 10:40 AM, George Broz wrote:
>>>
 Sorry for the delayed response - got called away, but am back to this
 now. I patched
 socfpga_common.h and re-built the project. I picked up
 spl/u-boot-spl-dtb.sfp and
 u-boot-dtb.img and transferred them to the SD card with:

 dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
 dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4

 Tried this with both the original DT set (socfpga.dtsi,
 socfpga_cyclone.dtsi,
 socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download
 and
 also an Altera-patched DT set that I've used to boot into Linux numerous
 times.

 When I start up the board I get:

 U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14)
 drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
 drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
 drivers/ddr/altera/sequencer.c: Calibration complete
 SDRAM calibration failed.
 ### ERROR ### Please RESET the board ###

 I'm not a Quartus user, so I haven't done anything with the
 qts-filter.sh script you
 mentioned. Do I need to? I don't have any custom FPGA logic - it's
 just the Terasic
 board out of the box.

 Thanks for any help!

>>>
>>> Even without the custom FPGA logic the files generated from qts-filter.sh
>>> need to match your board.
>>> Sets up PLL and SDRAM parameters.
>>> I'm not familiar with the Terasic dev board ( I do have the altera
>>> devkit,
>>> but haven't used it for awhile).
>>> I'd hope the files in the git repo are correct for your board.
>>> Without the corresponding qsys project it's hard to be sure.
>>>
>> Hi Phil,
>>
>> So as my next attempt, there was a Quartus/Qsys example that came
>> with the Terasic board (specific to my Rev. of the board).
>>
>> * I took the contents of the 'handoff folder', .sof, and .sopcinfo file.
>> * launched an "Embedded Command Shell" from EDS 15.0 and then the BSP
>> editor GUI
>> * pointed the BSP editor to the "handoff folder", and hit "Generate"
>> to produce iocsr, pinmux, pll, etc. files
>> * applied qts-filter.sh to these files, the output of which I then
>> dropped into the u-boot source @ ../board/terasic/sockit/qts
>> * rebuilt uboot spl & image, but got a similar result:

> What does a diff of the new files show compared to the ones in uboot.
> I'm using the Quartus 15.0 tool chain at the moment.
> Turning on debugging in drivers/ddr/altera/sequencer.c may help.
>
>
> --
> Regards
> Phil Reid
>

If I build the SPL using in the embedded_command_shell environment:

~/altera/15/embedded/embedded_command_shell.sh
cd ~//software/spl_bsp
make

I get a working preloader-mkpimage.bin that seems to work with the
u-boot.img generated from the 2016.01 release:

U-Boot SPL 2013.01.01 (Mar 03 2016 - 08:10:01)
BOARD : Altera SOCFPGA Cyclone V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 925 MHz
CLOCK: DDR clock 400 MHz
CLOCK: UART clock 10 KHz
CLOCK: MMC clock 5 KHz
CLOCK: QSPI clock 37 KHz
RESET: WARM
INFO : Watchdog enabled
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 1024 MiB
ALTERA DWMMC: 0


U-Boot 2016.01 (Mar 03 2016 - 13:02:56 -0800)

CPU:   Altera SoCFPGA Platform
FPGA:  Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0
BOOT:  SD/MMC Internal Transceiver (3.0V)
   Watchdog enabled
I2C:   ready
DRAM:  1 GiB
MMC:   dwmmc0@ff704000: 0
In:serial
Out:   serial
Err:   serial
Model: Terasic SoCkit
Net:
Error: ethernet@ff702000 address not set.
No ethernet found.
Hit any key to stop autoboot:  0


That would seem to indicate at least my quartus/qsys project and the files it
generates are valid and that something is amiss with the terasic board
support code?


BTW - if I set DLEVEL=1 in sequencer.c with the 2016.01-generated SPL I get:

U-Boot SPL 2016.01 (Mar 03 2016 - 11:24:11)
scc_mgr_initialize:281: Clearing SCC RFILE index 0
scc_mgr_initialize:281: Clearing SCC RFILE index 1
scc_mgr_initialize:281: Clearing SCC RFILE index 2
scc_mgr_initialize:281: Clearing SCC RFILE index 3
scc_mgr_initialize:281: Clearing SCC RFILE index 4
scc_mgr_initialize:281: Clearing SCC RFILE index 5
scc_mgr_initialize:281: Clearing SCC RFILE index 6
scc_mgr_initialize:281: Clearing SCC RFILE index 7
scc_mgr_initialize:281: Clearing SCC RFILE index 8
scc_mgr_initialize:281: Clearing SCC RFILE index 9
scc_mgr_initialize:281: Clearing SCC RFILE index 10
scc_mgr_initialize:281: Clearing SCC RFILE index 11
scc_mgr_initialize:281: Clearing SCC RFILE index 12
scc_mgr_initialize:281: Clearing SCC RFILE index 13

Re: [U-Boot] [PATCH v6 00/76] mtd: Add SPI-NOR core support

[york sun]

On 02/29/2016 04:26 AM, Jagan Teki wrote:
> Hi York,
> 
> On 27 February 2016 at 02:14, york sun  wrote:
>> On 02/22/2016 10:18 AM, Jagan Teki wrote:
>>> Hi York,
>>>
>>> On 15 February 2016 at 02:16, Jagan Teki  wrote:
 Compared to previous patch series this series adds spi-nor
 core with spi-nor controller drivers are of "mtd uclass"

 This is whole series for all spi-nor related changes, and while
 series tested on spansion spi-nor chip.

 Know issue:
 - arch/x86/lib/mrccache.c uses dm_spi_flash_ops, this need to fix.

 Why this framework:

 Some of the SPI device drivers at drivers/spi not a real
 spi controllers, Unlike normal/generic SPI controllers they
 operates only with SPI-NOR flash devices. these were technically
 termed as SPI-NOR controllers, Ex: drivers/spi/fsl_qspi.c

 The problem with these were resides at drivers/spi is entire
 SPI layer becomes SPI-NOR flash oriented which is absolutely
 a wrong indication where SPI layer getting effected more with
 flash operations - So this SPI-NOR core will resolve this issue
 by separating all SPI-NOR flash operations from spi layer and
 creats a generic layer called SPI-NOR core which can be used to
 interact SPI-NOR to SPI driver interface layer and the SPI-NOR
 controller driver. The idea is taken from Linux spi-nor framework.

 Before SPI-NOR:

 ---
 cmd/sf.c
 ---
 spi_flash.c
 ---
 sf_probe.c
 ---
 spi-uclass
 ---
 spi drivers
 ---
 SPI NOR chip
 ---

 After SPI-NOR:

 --
 cmd/sf.c
 --
 spi-nor.c
 ---
 m25p80.cspi nor drivers
 ---
 spi-uclass  SPI NOR chip
 ---
 spi drivers
 ---
 SPI NOR chip
 ---

 SPI-NOR with MTD:

 --
 cmd/sf.c
 --
 MTD core
 --
 spi-nor.c
 ---
 m25p80.cspi nor drivers
 ---
 spi-uclass  SPI NOR chip
 ---
 spi drivers
 ---
 SPI NOR chip
 ---

 drivers/mtd/spi-nor/spi-nor.c: spi-nor core
 drivers/mtd/spi-nor/m25p80.c: mtd uclass driver
 which is an interface layer b/w spi-nor core drivers/spi
 drivers/mtd/spi-nor/fsl_qspi.c: spi-nor controller driver(mtd uclass)

 Changes for v6:
 - Fixed git bisectable issues, with buildman.
 - Fixed spi-nor compilation issues
 - newly designed changes.

 Changes for v5:
 - newly designed changes

 Testing:
 $ git clone git://git.denx.de/u-boot-spi.git
 $ cd u-boot-spi
 $ git checkout -b spi-nor origin/spi-nor

 Jagan Teki (76):
   mtd: Add m25p80 driver
   mtd: Add Kconfig entry for MTD_M25P80
   mtd: Add SPI-NOR core support
   doc: device-tree-bindings: jedec,spi-nor
   mtd: spi-nor: Add Kconfig entry for MTD_SPI_NOR
   mtd: spi-nor: Add kconfig for MTD_SPI_NOR_USE_4K_SECTORS
   mtd: spi-nor: Add MTD support
   mtd: spi-nor: Add spi_nor support in m25p80
   mtd: spi-nor: Add dm spi-nor probing
   mtd: spi-nor: Add spi_flash_probe for mtd-dm-spi-nor
   mtd: spi-nor: Add spi_flash_free for mtd-dm-spi-nor
   mtd: spi-nor: m25p80: Add spi_nor support for non-dm
   sf: Rename erase_size to erasesize
   sf: Use erasesize instead of sector_size
   sf: Use uint64_t for flash->size
   spi_flash: Use mtd_info operation for SPI-NOR
   spi_flash: Use spi_flash_t instead of struct spi_flash
   mtd: spi-nor: Move spi_read_then_write to spi layer
   spi: Rename spi_read_then_write to spi_write_then_read
   mtd: spi-nor: Rename SPI_FLASH_BAR to SPI_NOR_BAR
   mtd: spi-nor: Add Kconfig entry for SPI_NOR_BAR
   mtd: spi-nor: Copy spl files from drivers/mtd/spi
   mtd: spi-nor: spl: Follow ascending order of include headers
   mtd: spi-nor: fsl_espi_spl: Use mtd_info
   mtd: spi-nor: spi_spl_load: Use mtd_info
   mtd: spi-nor: Add flash vendor Kconfig entries
   arm: zynq: Kconfig: Select MTD uclass
   arm: zynq: Kconfig: Drop DM_SPI_FLASH
   defconfigs: zynq_microzed: Drop CONFIG_SPI_FLASH
   defconfig: zynq_microzed: Enable CONFIG_MTD_M25P80
   defconfig: zynq_microzed: Enable CONFIG_MTD_SPI_NOR
   spl: Add 

Re: [U-Boot] [PATCH 2/2] arm: socfpga: sr1500: Misc updates (SPI speed, env location)

[Marek Vasut]

On 03/03/2016 04:57 PM, Stefan Roese wrote:
> This patch makes the following changes to the SR1500 board port:
> 
> - Update defconfig to support SPI NOR (use make savedefconfig).
> - Increase SPI speed to a maximum of 100MHz for faster system
>   bootup.
> - Change environment location, so that its not between SPL and
>   main U-Boot. This way the combined SPL / U-Boot image can
>   be used for updates.
> 
> Signed-off-by: Stefan Roese 
> Cc: Marek Vasut 
> ---
>  arch/arm/dts/socfpga_cyclone5_sr1500.dts |  2 +-
>  configs/socfpga_sr1500_defconfig | 11 ++-
>  include/configs/socfpga_sr1500.h | 19 ---
>  3 files changed, 19 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/dts/socfpga_cyclone5_sr1500.dts 
> b/arch/arm/dts/socfpga_cyclone5_sr1500.dts
> index 3729ca0..32c6aad 100644
> --- a/arch/arm/dts/socfpga_cyclone5_sr1500.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_sr1500.dts
> @@ -88,7 +88,7 @@
>   #size-cells = <1>;
>   compatible = "n25q00", "spi-flash";
>   reg = <0>;  /* chip select */
> - spi-max-frequency = <5000>;
> + spi-max-frequency = <1>;
>   m25p,fast-read;
>   page-size = <256>;
>   block-size = <16>; /* 2^16, 64KB */
> diff --git a/configs/socfpga_sr1500_defconfig 
> b/configs/socfpga_sr1500_defconfig
> index a4f0835..a87dc61 100644
> --- a/configs/socfpga_sr1500_defconfig
> +++ b/configs/socfpga_sr1500_defconfig
> @@ -4,18 +4,19 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
>  CONFIG_SPL_DM=y
>  CONFIG_DM_GPIO=y
>  CONFIG_TARGET_SOCFPGA_SR1500=y
> +CONFIG_SPL_STACK_R_ADDR=0x0080
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
>  CONFIG_SPL=y
> -CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_STACK_R=y
> -CONFIG_SPL_STACK_R_ADDR=0x0080
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
> -CONFIG_SPL_SIMPLE_BUS=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_DWAPB_GPIO=y
> +CONFIG_DM_MMC=y
>  CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
>  CONFIG_DM_ETH=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_SYS_NS16550=y
> -CONFIG_DM_MMC=y
> -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> +CONFIG_CADENCE_QSPI=y
> diff --git a/include/configs/socfpga_sr1500.h 
> b/include/configs/socfpga_sr1500.h
> index e4aafaa..6414eeb 100644
> --- a/include/configs/socfpga_sr1500.h
> +++ b/include/configs/socfpga_sr1500.h
> @@ -93,22 +93,27 @@
>  #define CONFIG_SYS_BOOTCOUNT_BE
>  
>  /* Environment setting for SPI flash */
> -#undef CONFIG_ENV_SIZE
>  #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
>  #define CONFIG_ENV_SECT_SIZE (64 * 1024)
>  #define CONFIG_ENV_SIZE  (16 * 1024)
> -#define CONFIG_ENV_OFFSET0x0004
> +#define CONFIG_ENV_OFFSET0x000e
>  #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
>  #define CONFIG_ENV_SPI_BUS   0
>  #define CONFIG_ENV_SPI_CS0
>  #define CONFIG_ENV_SPI_MODE  SPI_MODE_3
> -#define CONFIG_ENV_SPI_MAX_HZCONFIG_SF_DEFAULT_SPEED
> +#define CONFIG_ENV_SPI_MAX_HZ1   /* Use max of 100MHz */
> +#define CONFIG_SF_DEFAULT_SPEED  1
> +
> +/*
> + * The QSPI NOR flash layout on SR1500:
> + *
> + * . - 0003.: SPL (4 times)
> + * 0004. - 000d.: U-Boot
> + * 000e. - 000e.: env1
> + * 000f. - 000f.: env2
> + */
>  
>  /* The rest of the configuration is shared */
>  #include 
>  
> -/* U-Boot payload is stored at offset 0x6 */
> -#undef CONFIG_SYS_SPI_U_BOOT_OFFS
> -#define CONFIG_SYS_SPI_U_BOOT_OFFS   0x6
> -
>  #endif   /* __CONFIG_SOCFPGA_SR1500_H__ */
> 
Applied, thanks!

-- 
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Re: [U-Boot] [PATCH 1/2] arm: socfpga: Allow boards to define a custom environment size

[Marek Vasut]

On 03/03/2016 04:57 PM, Stefan Roese wrote:
> This patch makes it possible that boards can define a board-specific env
> size. This is used by the SR1500 SoCFPGA board port.
> 
> Signed-off-by: Stefan Roese 
> Cc: Chin Liang See 
> Cc: Dinh Nguyen 
> Cc: Marek Vasut 
> ---
>  include/configs/socfpga_common.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/configs/socfpga_common.h 
> b/include/configs/socfpga_common.h
> index 66beaf5..fd084cc 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -286,7 +286,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>  #define CONFIG_SYS_CONSOLE_IS_IN_ENV
>  #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
>  #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
> +#if !defined(CONFIG_ENV_SIZE)
>  #define CONFIG_ENV_SIZE  4096
> +#endif
>  
>  /* Environment for SDMMC boot */
>  #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET)
> 
Applied, thanks!

-- 
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Re: [U-Boot] [PATCH 09/12] armv8: ls2080aqds: Enable QSPI boot support

[york sun]

On 03/02/2016 06:30 PM, Yao Yuan wrote:
> On 03/03/2016 12:52 AM, York Sun wrote:
>> On 03/02/2016 02:41 AM, Yuan Yao wrote:
>>> From: Yuan Yao 
>>>
>>> This patch adds QSPI boot support for LS2080AQDS board.
>>> The QSPI boot image need to be programmed into the QSPI flash first.
>>> Then the booting will start from QSPI memory space.
>>>
>>> Signed-off-by: Yuan Yao 
>>> ---
>>
>> Please update the README file to include procedure to deply QSPI image.
>>
>> York
> 
> Hi York,
> 
> Thanks for your review.
> So where should I put the README file? 
> 

board/freescale/ls2080aqds/README

York

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Re: [U-Boot] [PATCH 06/12] armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot

[york sun]

On 03/02/2016 06:28 PM, Yao Yuan wrote:
> On 03/03/2016 12:52 AM, York Sun wrote:
>> On 03/02/2016 02:41 AM, Yuan Yao wrote:
>>> From: Yuan Yao 
>>>
>>> If we want to access QSPI flash when boot from NAND,
>>
>> Is this "either this or that" choice? Is there any limitation after 
>> configuring pin
>> mux?
> 
> No, there is no any limitation.
> Just make a distinction between the different NAND source.
> And deasserted unused ISO will approve the performance.
> 
> Such as for LS2080AQDS, the last three bits for brdcfg[9] should be set to 
> 0b'001.
> 
>>> we need below board configuration:
>>> Boot Source ISO1ISO2IBOOT
>>> On-board NAND   1   0   0
>>> IFCCARD NAND0   0   1
>>
>> This should be added to README file.
>>
> 
> So I need remove it from the uboot code?
> 

No. I misunderstood you. Your change is to isolate IFC card. I didn't see why it
has something to do with QSPI. At least you didn't make it clear in the commit
message. You may consider to move the comment closer to the code.

York

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Re: [U-Boot] [PATCH 4/9] sandbox: Avoid calling commands when not available

[Stephen Warren]

On 03/02/2016 05:25 PM, Simon Glass wrote:

Hi Stephen,

On 29 February 2016 at 16:39, Stephen Warren  wrote:

On 02/25/2016 09:00 PM, Simon Glass wrote:


Don't try to run commands when not supported.




diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c




+int board_run_command(const char *cmdline)
+{
+   printf("## Commands are disabled. Please enable
CONFIG_CMDLINE.\n");
+
+   return 1;
+}
+



Isn't this part of patch 5/9?


No - this is the sandbox support. That patch merely declares the
function in a header. Any board can implement it, and each would do so
in a separate patch.


OK, but this patch implements the function before there's a prototype 
for it in the header. That doesn't seem like the correct order.

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Re: [U-Boot] Sunxi (Allwinner A20) GPIO problems on u-boot 2016.1 and 2016.3-rc3 but not on 2015.10

[Hendrik]

Hello Hans,

Thank you very much for your message. The PIO program reported 
'PE6<0><0><1><1>' for both U-Boots but changing the configuration's 
CONFIG_AXP_ALDO3_VOLT and CONFIG_AXP_ALDO4_VOLT back to 2800 did indeed 
solve the problem. I can run U-Boot 2016.01 now and control PE6 properly.


LDO3 is connected to pin F19 in the Olimex schematics (VCC_CSI0, in the 
A20 datasheet mentioned as Port E Power Supply) and LDO4 is connected to 
pin E18 (VCC_CSI1 mentioned as Port G Power Supply).


So would the change in u-boot make sense by setting the default to 0 
now? I'm not sure if the git remark 'LDO3 and LDO4 are normally either 
unused, or used to power csi attached camera sensors' is correct as it 
seems (also?) to be the source or reference for the A20 chip pins 
itself..? At least this is the case for multiple (all?) Olimex A10/A20 
boards (I checked A20-SOM, A20-LIME2, A20-Lime and A10-Lime).


Regards,
Hendrik

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[U-Boot] [PATCH 2/2] arm: socfpga: sr1500: Misc updates (SPI speed, env location)

[Stefan Roese]

This patch makes the following changes to the SR1500 board port:

- Update defconfig to support SPI NOR (use make savedefconfig).
- Increase SPI speed to a maximum of 100MHz for faster system
  bootup.
- Change environment location, so that its not between SPL and
  main U-Boot. This way the combined SPL / U-Boot image can
  be used for updates.

Signed-off-by: Stefan Roese 
Cc: Marek Vasut 
---
 arch/arm/dts/socfpga_cyclone5_sr1500.dts |  2 +-
 configs/socfpga_sr1500_defconfig | 11 ++-
 include/configs/socfpga_sr1500.h | 19 ---
 3 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/arch/arm/dts/socfpga_cyclone5_sr1500.dts 
b/arch/arm/dts/socfpga_cyclone5_sr1500.dts
index 3729ca0..32c6aad 100644
--- a/arch/arm/dts/socfpga_cyclone5_sr1500.dts
+++ b/arch/arm/dts/socfpga_cyclone5_sr1500.dts
@@ -88,7 +88,7 @@
#size-cells = <1>;
compatible = "n25q00", "spi-flash";
reg = <0>;  /* chip select */
-   spi-max-frequency = <5000>;
+   spi-max-frequency = <1>;
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index a4f0835..a87dc61 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -4,18 +4,19 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SR1500=y
+CONFIG_SPL_STACK_R_ADDR=0x0080
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
 CONFIG_SPL=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x0080
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
-CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
-CONFIG_DM_MMC=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_CADENCE_QSPI=y
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index e4aafaa..6414eeb 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -93,22 +93,27 @@
 #define CONFIG_SYS_BOOTCOUNT_BE
 
 /* Environment setting for SPI flash */
-#undef CONFIG_ENV_SIZE
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 #define CONFIG_ENV_SECT_SIZE   (64 * 1024)
 #define CONFIG_ENV_SIZE(16 * 1024)
-#define CONFIG_ENV_OFFSET  0x0004
+#define CONFIG_ENV_OFFSET  0x000e
 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SPI_BUS 0
 #define CONFIG_ENV_SPI_CS  0
 #define CONFIG_ENV_SPI_MODESPI_MODE_3
-#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SPI_MAX_HZ  1   /* Use max of 100MHz */
+#define CONFIG_SF_DEFAULT_SPEED1
+
+/*
+ * The QSPI NOR flash layout on SR1500:
+ *
+ * . - 0003.: SPL (4 times)
+ * 0004. - 000d.: U-Boot
+ * 000e. - 000e.: env1
+ * 000f. - 000f.: env2
+ */
 
 /* The rest of the configuration is shared */
 #include 
 
-/* U-Boot payload is stored at offset 0x6 */
-#undef CONFIG_SYS_SPI_U_BOOT_OFFS
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x6
-
 #endif /* __CONFIG_SOCFPGA_SR1500_H__ */
-- 
2.7.2

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[U-Boot] [PATCH 1/2] arm: socfpga: Allow boards to define a custom environment size

[Stefan Roese]

This patch makes it possible that boards can define a board-specific env
size. This is used by the SR1500 SoCFPGA board port.

Signed-off-by: Stefan Roese 
Cc: Chin Liang See 
Cc: Dinh Nguyen 
Cc: Marek Vasut 
---
 include/configs/socfpga_common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 66beaf5..fd084cc 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -286,7 +286,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+#if !defined(CONFIG_ENV_SIZE)
 #define CONFIG_ENV_SIZE4096
+#endif
 
 /* Environment for SDMMC boot */
 #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET)
-- 
2.7.2

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Re: [U-Boot] [PATCH V4] OMAP3: Various: Future-proof serial platdata

[Adam Ford]

On Mar 2, 2016 9:13 AM, "Alexander Graf"  wrote:
>
>
>
> > Am 02.03.2016 um 12:29 schrieb Adam Ford :
> >
> >> On Tue, Mar 1, 2016 at 6:01 PM, Alexander Graf  wrote:
> >>
> >>
> >>> On 02.03.16 00:23, Adam Ford wrote:
> >>> A few boards still use ns16550_platdata structures, but assume the
structure
> >>> is going to be in a specific order. By explicitly naming each entry,
> >>> this should also help 'future-proof' in the event the structure
changes.
> >>>
> >>> Tested on the Logic PD Torpedo + Wireless.
> >>>
> >>> I only changed a handful of devices that used the same syntax as the
Logic
> >>> board.  Appologies if I missed one or stepped on toes.  Thanks to
Derald Woods
> >>> and Alexander Graf.
> >>>
> >>> Signed-off-by: Adam Ford 
> >>>
> >>> V4: Fix subject heading
> >>>
> >>> V3: Remove  reg_offset out in all the structs. It was reverted out,
and and if
> >>> it did exist, it would get initialized to 0 by default.
> >>>
> >>> V2: I hastily copy-pasted the boards without looking at the UART
number.
> >>> This addresses 3 boards that use UART3 and not UART1.
> >>> ---
> >>> board/isee/igep00x0/igep00x0.c  | 6 +++---
> >>> board/logicpd/omap3som/omap3logic.c | 6 +++---
> >>> board/logicpd/zoom1/zoom1.c | 6 +++---
> >>> board/overo/overo.c | 6 +++---
> >>> board/quipos/cairo/cairo.c  | 6 +++---
> >>> board/ti/beagle/beagle.c| 6 +++---
> >>> board/timll/devkit8000/devkit8000.c | 6 +++---
> >>
> >> Looks to me like you didn't catch all boards out there. I don't think
it
> >> makes sense to limit yourself to OMAP3, otherwise different boards
(that
> >> people may not realize are broken that fast) break next time...
> >>
> >> arch/arm/cpu/arm926ejs/lpc32xx/devices.c
> > I will fix and  CC its maintainer.
> >
> >> arch/arm/cpu/armv7/am33xx/board.c
> > These boards already have a pending patch from TI.
> >
> >> arch/arm/mach-tegra/board.c
> > Already in git master.
> >
> >> board/isee/igep00x0/igep00x0.c
> > I my patch
> >
> >> board/lge/sniper/sniper.c
> > Already in git master
> >
> >> board/logicpd/omap3som/omap3logic.c
> >> board/logicpd/zoom1/zoom1.c
> >> board/overo/overo.c
> >> board/quipos/cairo/cairo.c
> >> board/ti/beagle/beagle.c
> >> board/timll/devkit8000/devkit8000.c
> >
> > The rest should have all been included in my original patch, so I
> > think they are addressed.  Does that address your concern?  If so,
> > I'll push another revision that adds
> > arch/arm/cpu/arm926ejs/lpc32xx/devices.c.
>
> Yes, thanks a lot!

No problem. After discussing it with Mugunthan, I will add the am33xx into
the patch, but I won't be able to get to it until this weekend. My house is
undergoing some minor updates at the moment and I can use the computer.
>
> Alex
>
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Re: [U-Boot] Newbie SPL question for socfpga_sockit

[George Broz]

On 2 March 2016 at 23:11, Phil Reid  wrote:
> On 3/03/2016 2:49 PM, George Broz wrote:
>>
>> On 1 March 2016 at 19:49, Phil Reid  wrote:
>>>
>>> On 2/03/2016 10:40 AM, George Broz wrote:
>>>
 Sorry for the delayed response - got called away, but am back to this
 now. I patched
 socfpga_common.h and re-built the project. I picked up
 spl/u-boot-spl-dtb.sfp and
 u-boot-dtb.img and transferred them to the SD card with:

 dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
 dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4

 Tried this with both the original DT set (socfpga.dtsi,
 socfpga_cyclone.dtsi,
 socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download
 and
 also an Altera-patched DT set that I've used to boot into Linux numerous
 times.

 When I start up the board I get:

 U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14)
 drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
 drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
 drivers/ddr/altera/sequencer.c: Calibration complete
 SDRAM calibration failed.
 ### ERROR ### Please RESET the board ###

 I'm not a Quartus user, so I haven't done anything with the
 qts-filter.sh script you
 mentioned. Do I need to? I don't have any custom FPGA logic - it's
 just the Terasic
 board out of the box.

 Thanks for any help!

>>>
>>> Even without the custom FPGA logic the files generated from qts-filter.sh
>>> need to match your board.
>>> Sets up PLL and SDRAM parameters.
>>> I'm not familiar with the Terasic dev board ( I do have the altera
>>> devkit,
>>> but haven't used it for awhile).
>>> I'd hope the files in the git repo are correct for your board.
>>> Without the corresponding qsys project it's hard to be sure.
>>>
>> Hi Phil,
>>
>> So as my next attempt, there was a Quartus/Qsys example that came
>> with the Terasic board (specific to my Rev. of the board).
>>
>> * I took the contents of the 'handoff folder', .sof, and .sopcinfo file.
>> * launched an "Embedded Command Shell" from EDS 15.0 and then the BSP
>> editor GUI
>> * pointed the BSP editor to the "handoff folder", and hit "Generate"
>> to produce iocsr, pinmux, pll, etc. files
>> * applied qts-filter.sh to these files, the output of which I then
>> dropped into the u-boot source @ ../board/terasic/sockit/qts
>> * rebuilt uboot spl & image, but got a similar result:
>>
>> U-Boot SPL 2016.01 (Mar 02 2016 - 22:13:31)
>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
>> drivers/ddr/altera/sequencer.c: Calibration complete
>> SDRAM calibration failed.
>> ### ERROR ### Please RESET the board ###
>>
>> Except now it repeats four times, whereas before it only printed out once.
>>
>> It that essentially the correct procedure? Is it now a matter of
>> looking through
>> the include files that where generated by qts-filter.sh to find a
>> setting that is "off"?
>>
>> (BTW - my first attempt was to use EDS 13.0, but that resulted in
>> several undefined macros when it
>> came time to compile u-boot with the qts-filter-generated code. How
>> does one know which tool version to use?)
>>
>
> What does a diff of the new files show compared to the ones in uboot.

Here's two of them...

--- 
/home/mcis/altera/uboot-native/u-boot-socfpga-2016.01/board/terasic/sockit/qts/sdram_config.h.orig
+++ 
/home/mcis/altera/uboot-native/u-boot-socfpga-2016.01/board/terasic/sockit/qts/sdram_config.h

@@ -33,10 +33,10 @@
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE 1
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL 0
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL 7
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL 6
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW 12
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC 104
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD 4
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL 7
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW 15
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC 120
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD 3
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD 6
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI 3120
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP 6

@@ -46,12 +46,12 @@
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD 4
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS 14
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC 20
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP 4
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP 3
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT 3
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT 512
 #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC 0
 #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE 0
-#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST 0x1FF
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST 0x0
 #define 

Re: [U-Boot] Newbie SPL question for socfpga_sockit

[Marek Vasut]

On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
> 
> 
> On 03/02/2016 05:24 PM, Marek Vasut wrote:
>>
>> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
>> CCing Chin ;-)
>>
>> Does the issue by any chance magically disappear if you apply this patch:
>>
>> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>> index 026e7ef..06802c6 100644
>> --- a/arch/arm/include/asm/system.h
>> +++ b/arch/arm/include/asm/system.h
>> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>>
>>  /* options available for data cache on each page */
>>  enum dcache_option {
>> -   DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
>> +   DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
>> TTB_SECT_XN_MASK | TTB_SECT,
>> DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>> DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>> DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>>
> 
> I'm away from my office today and don't have access to the sockit. I can
> test this tomorrow.
> 
> But what's interesting is that I have the DE0-NANO-SOCKIT board at home,
> and USB seems to be working fine with dcache on.

Yeah, the USB issue happens only with some stick :-/


-- 
Best regards,
Marek Vasut
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Re: [U-Boot] Newbie SPL question for socfpga_sockit

[Dinh Nguyen]

On 03/02/2016 05:24 PM, Marek Vasut wrote:
> 
> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
> CCing Chin ;-)
> 
> Does the issue by any chance magically disappear if you apply this patch:
> 
> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
> index 026e7ef..06802c6 100644
> --- a/arch/arm/include/asm/system.h
> +++ b/arch/arm/include/asm/system.h
> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
> 
>  /* options available for data cache on each page */
>  enum dcache_option {
> -   DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
> +   DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
> TTB_SECT_XN_MASK | TTB_SECT,
> DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
> DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
> DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
> 

I'm away from my office today and don't have access to the sockit. I can
test this tomorrow.

But what's interesting is that I have the DE0-NANO-SOCKIT board at home,
and USB seems to be working fine with dcache on.

Dinh
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Re: [U-Boot] [PATCH v3 2/3] board:freescale:usb: Remove code duplication for fdt_usb_get_node_type

[Marek Vasut]

On 03/03/2016 12:11 PM, Sriram Dash wrote:
> 
> 
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Thursday, March 03, 2016 3:29 PM
>> To: Sriram Dash ; u-boot@lists.denx.de
>> Cc: york sun ; Ramneek Mehresh
>> ; Rajesh Bhagat 
>> Subject: Re: [PATCH v3 2/3] board:freescale:usb: Remove code duplication for
>> fdt_usb_get_node_type
>>
>> On 03/03/2016 09:30 AM, Sriram Dash wrote:
>>>
 -Original Message-
 From: Marek Vasut [mailto:ma...@denx.de]
 Sent: Wednesday, March 02, 2016 3:57 AM
 To: Sriram Dash ; u-boot@lists.denx.de
 Cc: york sun ; Ramneek Mehresh
 ; Rajesh Bhagat 
 Subject: Re: [PATCH v3 2/3] board:freescale:usb: Remove code
 duplication for fdt_usb_get_node_type

 On 03/01/2016 08:03 AM, Sriram Dash wrote:
> Call fdt_usb_get_node_type() from fdt_fixup_usb_mode_phy_type() to
> avoid code duplication.
>
> Signed-off-by: Ramneek Mehresh 
> Signed-off-by: Sriram Dash 
> ---
>  board/freescale/common/usb.c | 72
> ++--
>  1 file changed, 29 insertions(+), 43 deletions(-)
>
> diff --git a/board/freescale/common/usb.c
> b/board/freescale/common/usb.c index 85cb1bf..d815dc1 100644
> --- a/board/freescale/common/usb.c
> +++ b/board/freescale/common/usb.c
> @@ -18,33 +18,45 @@
>  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1  #endif
>
> -static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
> -const char *phy_type, int start_offset)
> +static const char *fdt_usb_get_node_type(void *blob, int start_offset,
> +  int *node_offset)
>  {
>   const char *compat_dr = "fsl-usb2-dr";
>   const char *compat_mph = "fsl-usb2-mph";
> - const char *prop_mode = "dr_mode";
> - const char *prop_type = "phy_type";
>   const char *node_type = NULL;
> - int node_offset;
> - int err;
>
> - node_offset = fdt_node_offset_by_compatible(blob,
> - start_offset, compat_mph);
> - if (node_offset < 0) {
> - node_offset = fdt_node_offset_by_compatible(blob,
> - start_offset,
> - compat_dr);
> - if (node_offset < 0) {
> - printf("WARNING: could not find compatible node: %s",
> -fdt_strerror(node_offset));
> - return -1;
> + *node_offset = fdt_node_offset_by_compatible(blob, start_offset,
> +  compat_mph);
> + if (*node_offset < 0) {
> + *node_offset = fdt_node_offset_by_compatible(blob,
> +  start_offset,
> +  compat_dr);
> + if (*node_offset < 0) {
> + printf("ERROR: could not find compatible node: %s\n",
> +fdt_strerror(*node_offset));
> + } else {
> + node_type = compat_dr;
>   }
> - node_type = compat_dr;
>   } else {
>   node_type = compat_mph;
>   }
>
> + return node_type;

 The function should be able to return error code. If you need to
 return some more stuff from the function, return it via reference.

>>>
>>> This patch is not altering the fdt_usb_get_node_type(). It is only
>>> calling the function from fdt_fixup_usb_mode_phy_type(), to avoid code
>> duplication.
>>
>> I am not complaining about that part. I am complaining about the new 
>> function,
>> fdt_usb_get_node_type(), which returns pointer as a return value instead of
>> returning proper error code as a return value.
>>
> 
> I think git diff tool is creating confusion here, I have just moved function 
> fdt_usb_get_node_type
> above fdt_fixup_usb_mode_phy_type which created all the diff and looked as if 
> new function is 
> added. 
> 
> Please check below created patch where declaration is added to call 
> fdt_usb_get_node_type 
> in fdt_usb_get_mode_phy_type. We will be sending below in V4. 
> 
> #
> 
> diff --git a/board/freescale/common/usb.c b/board/freescale/common/usb.c
> index 85cb1bf..5553225 100644
> --- a/board/freescale/common/usb.c
> +++ b/board/freescale/common/usb.c
> @@ -18,32 +18,21 @@
>  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
>  #endif
>  
> +const char *fdt_usb_get_node_type(void *blob, int start_offset,
> +int *node_offset);
> 

Re: [U-Boot] [PATCH v3 1/3] board:freescale:common: Move device-tree fixup framework to common file

[Marek Vasut]

On 03/03/2016 12:10 PM, Sriram Dash wrote:
> 
> 
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Thursday, March 03, 2016 3:26 PM
>> To: Sriram Dash ; u-boot@lists.denx.de
>> Cc: york sun ; Ramneek Mehresh
>> ; Rajesh Bhagat ; Tom
>> Rini 
>> Subject: Re: [PATCH v3 1/3] board:freescale:common: Move device-tree fixup
>> framework to common file
>>
>> On 03/03/2016 09:29 AM, Sriram Dash wrote:
>>>
>>>
 -Original Message-
 From: Marek Vasut [mailto:ma...@denx.de]
 Sent: Wednesday, March 02, 2016 3:43 AM
 To: Sriram Dash ; u-boot@lists.denx.de
 Cc: york sun ; Ramneek Mehresh
 ; Rajesh Bhagat ; Tom
 Rini 
 Subject: Re: [PATCH v3 1/3] board:freescale:common: Move device-tree
 fixup framework to common file

 On 03/01/2016 08:03 AM, Sriram Dash wrote:
> Move usb device-tree fixup framework from ehci-fsl.c to common place
> so that it can be used by other drivers as well (xhci-fsl.c).
>
> Signed-off-by: Ramneek Mehresh 
> Signed-off-by: Sriram Dash 
> ---
>  board/freescale/common/Makefile|   2 +
>  .../ehci-fsl.c => board/freescale/common/usb.c | 160 
> +
>  drivers/usb/host/ehci-fsl.c| 195 
> -
>  3 files changed, 3 insertions(+), 354 deletions(-)  copy
> drivers/usb/host/ehci-fsl.c => board/freescale/common/usb.c (53%)

 Where is the changelog ?
>>>
>>> Will include changelog for v2 and v3 in v4.
>>>

> diff --git a/board/freescale/common/Makefile
> b/board/freescale/common/Makefile index be114ce..62de45c 100644
> --- a/board/freescale/common/Makefile
> +++ b/board/freescale/common/Makefile
> @@ -13,6 +13,8 @@ MINIMAL=y
>  endif
>  endif
>
> +obj-$(CONFIG_USB_EHCI_FSL) += usb.o
> +
>  ifdef MINIMAL
>  # necessary to create built-in.o
>  obj- := __dummy__.o
> diff --git a/drivers/usb/host/ehci-fsl.c
> b/board/freescale/common/usb.c similarity index 53% copy from
> drivers/usb/host/ehci-fsl.c copy to board/freescale/common/usb.c
> index 97b7f14..85cb1bf 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/board/freescale/common/usb.c
> @@ -1,9 +1,5 @@
>  /*
> - * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
> - *
> - * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
> - *
> - * Author: Tor Krill t...@excito.com
> + * (C) Copyright 2016 Freescale Semiconductor, Inc.

 What's with this copyright change here ?
>>>
>>> It is a new file named common/usb.c. Shall I include the complete ehci-fsl.c
>> copyright information in the new file?
>>
>> There is already a file named common/usb.c , you surely mean
>> board/freescale/common/usb.c , yes ?
>>
> 
> Yes
> 
>> According to git, it's not a new file:
>>
>> b/board/freescale/common/usb.c similarity index 53% copy from
>> drivers/usb/host/ehci-fsl.c copy to board/freescale/common/usb.c
>>
>> so yes, it should retain all copyright info.
>>
> 
> Ok, We will retain copyright info in v4.
> 
>> And now that I am looking at it, I would much rather see the fixup bits in
>> drivers/usb/host/ than some board-specific file. You can very well put those 
>> into
>> fsl-dt-fixup.c or whatever there.
>>
> 
> drivers/usb/host/ was a good option, but we want to make it independent of 
> host and gadget. So, whenever there is a specific requirement for freescale 
> boards,
> it will use the same from board: freescale: common: usb
> 
> Else, another option is to have drivers/usb/common/fsl-dt-fixup.c.
> What do you say?

That is fine. Moving it to board code would make it problematic to
convert to DM afterward, so I want to prevent that.


>   * SPDX-License-Identifier:  GPL-2.0+
>   */
> @@ -17,164 +13,11 @@
>  #include 
>  #include 
>
> -#include "ehci.h"
 [...]

 --
 Best regards,
 Marek Vasut
>>>
>>> Best Regards,
>>> Sriram
>>>
>>
>>
>> --
>> Best regards,
>> Marek Vasut


-- 
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Marek Vasut
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Re: [U-Boot] Problem with attaching UBI partition

[Marek Vasut]

On 03/03/2016 12:51 PM, Stefan Roese wrote:
> Hi Chin Liang,
> 
> On 02.03.2016 13:24, Chin Liang See wrote:
>>> On 01.03.2016 14:38, Chin Liang See wrote:
 On Tue, 2016-03-01 at 08:23 +0100, Stefan Roese wrote:
> On 01.03.2016 07:53, Chin Liang See wrote:
>> On Mon, 2016-02-29 at 23:55 +0100, Marek Vasut wrote:
>>> On 02/24/2016 09:59 AM, Bakhvalov, Denis (Nokia - PL/Wroclaw)
>>> wrote:
 Hello Heiko,

> Which U-Boot version? Which board?

 This is U-Boot v2016.03-rc1. I have custom board with
 socfpga
 Arria5
 onboard.

> Where does this leading 0xff come from? There seems a
> problem
> with
> your spi nor flash driver?

 Yes, you're right. I have problems with the driver. As I
 mentioned
 in
 previous mail when I read the contents from the flash some
 data
 is
 corrupted.

 How to find out if the problem is because U-Boot has no
 support
 for
 my flash (Spansion S25FL512S NOR flash with SPI) or I have
 not
 proper
 configured SPI in U-Boot?
>>>
>>> I believe there is a problem with caches , which we still
>>> didn't
>>> identify. CCing Dinh and Chin, as they were the last ones
>>> looking
>>> into this problem.
>>>
>>> For now, try doing "dcache off" before using the QSPI NOR.
>>>
>>
>> We managed to get it work for socfpga. One of the issue dragged
>> me
>> long
>> is the CONFIG_SPI_FLASH_USE_4K_SECTORS. Need to ensure its not
>> defined
>> in the defconfig. Hope it helps
>
> This is not clear to me. You mean you were able to reproduce and
> solve this cache (S-bit) related issue by disabling
> CONFIG_SPI_FLASH_USE_4K_SECTORS? This option is disabled for all
> SoCFPGA board in mainline.
>
> Could you please explain in more details what exactly you did to
> solve this issue on SPI NOR?
>

 Nope, I am not replicating the issue. My board is having Micron
 instead
 of Spansion flash. In previously, CONFIG_SPI_FLASH_USE_4K_SECTORS
 is
 defined in socfpga as most serial NOR flash are supporting 4k sub
 sector. With that, it would be good to ensure the 4K is undefined.

 In this case, wonder any details on the failure? Intermittent?
>>>
>>> I think we are talking about different things here. I'm referring
>>> to Marek mentioning the cache problem (S-bit related) on current
>>> SoCFPGA U-Boot mainline. With caches enabled you can experience
>>> problems on QSPI and on USB (reported from Marek - I didn't test
>>> USB yet).
>>>
>>
>> For QSPI, wonder the issue is on the read or write?
> 
> I'm not 100% sure here if this never happens on read. But it definitely
> happens on write. saveeenv to SPI NOR causes serious problems here
> for example.
>  
>>> So do you have any updated on this cache / S-bit problem?
>>
>> I am still debugging this as I notice the hub is not able to detect the
>> mass storage. This is only for certain pen drive.
>>
>>> Or can you
>>> use QSPI NOR without any issues on current mainline U-Boot with
>>> caches enabled on your platforms?
>>>
>>
>> The issue I have is on USB only. For NOR, I can ubifsmount and
>> ubifsload with Micron NOR flash without issue. This is with dcache
>> enabled
> 
> Strange. I have Micron here on the SR1500 as well:
> 
> => sf probe 
> SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
> 
> Thanks,
> Stefan
> 

The testcase is that you write some 8 MiB or so of data into the SPI
NOR. Upon read-back, you will notice that the last two or so bytes of
some sectors were not written completely and are corrupted.

-- 
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Marek Vasut
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Re: [U-Boot] Problem with attaching UBI partition

[Stefan Roese]

Hi Chin Liang,

On 02.03.2016 13:24, Chin Liang See wrote:
>> On 01.03.2016 14:38, Chin Liang See wrote:
>>> On Tue, 2016-03-01 at 08:23 +0100, Stefan Roese wrote:
 On 01.03.2016 07:53, Chin Liang See wrote:
> On Mon, 2016-02-29 at 23:55 +0100, Marek Vasut wrote:
>> On 02/24/2016 09:59 AM, Bakhvalov, Denis (Nokia - PL/Wroclaw)
>> wrote:
>>> Hello Heiko,
>>>
 Which U-Boot version? Which board?
>>>
>>> This is U-Boot v2016.03-rc1. I have custom board with
>>> socfpga
>>> Arria5
>>> onboard.
>>>
 Where does this leading 0xff come from? There seems a
 problem
 with
 your spi nor flash driver?
>>>
>>> Yes, you're right. I have problems with the driver. As I
>>> mentioned
>>> in
>>> previous mail when I read the contents from the flash some
>>> data
>>> is
>>> corrupted.
>>>
>>> How to find out if the problem is because U-Boot has no
>>> support
>>> for
>>> my flash (Spansion S25FL512S NOR flash with SPI) or I have
>>> not
>>> proper
>>> configured SPI in U-Boot?
>>
>> I believe there is a problem with caches , which we still
>> didn't
>> identify. CCing Dinh and Chin, as they were the last ones
>> looking
>> into this problem.
>>
>> For now, try doing "dcache off" before using the QSPI NOR.
>>
>
> We managed to get it work for socfpga. One of the issue dragged
> me
> long
> is the CONFIG_SPI_FLASH_USE_4K_SECTORS. Need to ensure its not
> defined
> in the defconfig. Hope it helps

 This is not clear to me. You mean you were able to reproduce and
 solve this cache (S-bit) related issue by disabling
 CONFIG_SPI_FLASH_USE_4K_SECTORS? This option is disabled for all
 SoCFPGA board in mainline.

 Could you please explain in more details what exactly you did to
 solve this issue on SPI NOR?

>>>
>>> Nope, I am not replicating the issue. My board is having Micron
>>> instead
>>> of Spansion flash. In previously, CONFIG_SPI_FLASH_USE_4K_SECTORS
>>> is
>>> defined in socfpga as most serial NOR flash are supporting 4k sub
>>> sector. With that, it would be good to ensure the 4K is undefined.
>>>
>>> In this case, wonder any details on the failure? Intermittent?
>>
>> I think we are talking about different things here. I'm referring
>> to Marek mentioning the cache problem (S-bit related) on current
>> SoCFPGA U-Boot mainline. With caches enabled you can experience
>> problems on QSPI and on USB (reported from Marek - I didn't test
>> USB yet).
>>
> 
> For QSPI, wonder the issue is on the read or write?

I'm not 100% sure here if this never happens on read. But it definitely
happens on write. saveeenv to SPI NOR causes serious problems here
for example.
 
>> So do you have any updated on this cache / S-bit problem?
> 
> I am still debugging this as I notice the hub is not able to detect the
> mass storage. This is only for certain pen drive.
> 
>> Or can you
>> use QSPI NOR without any issues on current mainline U-Boot with
>> caches enabled on your platforms?
>>
> 
> The issue I have is on USB only. For NOR, I can ubifsmount and
> ubifsload with Micron NOR flash without issue. This is with dcache
> enabled

Strange. I have Micron here on the SR1500 as well:

=> sf probe 
SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB

Thanks,
Stefan

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Re: [U-Boot] [PATCH v3 1/3] board:freescale:common: Move device-tree fixup framework to common file

[Sriram Dash]

>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Thursday, March 03, 2016 3:26 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; Ramneek Mehresh
>; Rajesh Bhagat ; Tom
>Rini 
>Subject: Re: [PATCH v3 1/3] board:freescale:common: Move device-tree fixup
>framework to common file
>
>On 03/03/2016 09:29 AM, Sriram Dash wrote:
>>
>>
>>> -Original Message-
>>> From: Marek Vasut [mailto:ma...@denx.de]
>>> Sent: Wednesday, March 02, 2016 3:43 AM
>>> To: Sriram Dash ; u-boot@lists.denx.de
>>> Cc: york sun ; Ramneek Mehresh
>>> ; Rajesh Bhagat ; Tom
>>> Rini 
>>> Subject: Re: [PATCH v3 1/3] board:freescale:common: Move device-tree
>>> fixup framework to common file
>>>
>>> On 03/01/2016 08:03 AM, Sriram Dash wrote:
 Move usb device-tree fixup framework from ehci-fsl.c to common place
 so that it can be used by other drivers as well (xhci-fsl.c).

 Signed-off-by: Ramneek Mehresh 
 Signed-off-by: Sriram Dash 
 ---
  board/freescale/common/Makefile|   2 +
  .../ehci-fsl.c => board/freescale/common/usb.c | 160 +
  drivers/usb/host/ehci-fsl.c| 195 
 -
  3 files changed, 3 insertions(+), 354 deletions(-)  copy
 drivers/usb/host/ehci-fsl.c => board/freescale/common/usb.c (53%)
>>>
>>> Where is the changelog ?
>>
>> Will include changelog for v2 and v3 in v4.
>>
>>>
 diff --git a/board/freescale/common/Makefile
 b/board/freescale/common/Makefile index be114ce..62de45c 100644
 --- a/board/freescale/common/Makefile
 +++ b/board/freescale/common/Makefile
 @@ -13,6 +13,8 @@ MINIMAL=y
  endif
  endif

 +obj-$(CONFIG_USB_EHCI_FSL) += usb.o
 +
  ifdef MINIMAL
  # necessary to create built-in.o
  obj- := __dummy__.o
 diff --git a/drivers/usb/host/ehci-fsl.c
 b/board/freescale/common/usb.c similarity index 53% copy from
 drivers/usb/host/ehci-fsl.c copy to board/freescale/common/usb.c
 index 97b7f14..85cb1bf 100644
 --- a/drivers/usb/host/ehci-fsl.c
 +++ b/board/freescale/common/usb.c
 @@ -1,9 +1,5 @@
  /*
 - * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
 - *
 - * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
 - *
 - * Author: Tor Krill t...@excito.com
 + * (C) Copyright 2016 Freescale Semiconductor, Inc.
>>>
>>> What's with this copyright change here ?
>>
>> It is a new file named common/usb.c. Shall I include the complete ehci-fsl.c
>copyright information in the new file?
>
>There is already a file named common/usb.c , you surely mean
>board/freescale/common/usb.c , yes ?
>

Yes

>According to git, it's not a new file:
>
>b/board/freescale/common/usb.c similarity index 53% copy from
>drivers/usb/host/ehci-fsl.c copy to board/freescale/common/usb.c
>
>so yes, it should retain all copyright info.
>

Ok, We will retain copyright info in v4.

>And now that I am looking at it, I would much rather see the fixup bits in
>drivers/usb/host/ than some board-specific file. You can very well put those 
>into
>fsl-dt-fixup.c or whatever there.
>

drivers/usb/host/ was a good option, but we want to make it independent of 
host and gadget. So, whenever there is a specific requirement for freescale 
boards,
it will use the same from board: freescale: common: usb

Else, another option is to have drivers/usb/common/fsl-dt-fixup.c.
What do you say?

>>>
   * SPDX-License-Identifier:   GPL-2.0+
   */
 @@ -17,164 +13,11 @@
  #include 
  #include 

 -#include "ehci.h"
>>> [...]
>>>
>>> --
>>> Best regards,
>>> Marek Vasut
>>
>> Best Regards,
>> Sriram
>>
>
>
>--
>Best regards,
>Marek Vasut
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Re: [U-Boot] [PATCH v3 2/3] board:freescale:usb: Remove code duplication for fdt_usb_get_node_type

[Sriram Dash]

>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Thursday, March 03, 2016 3:29 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; Ramneek Mehresh
>; Rajesh Bhagat 
>Subject: Re: [PATCH v3 2/3] board:freescale:usb: Remove code duplication for
>fdt_usb_get_node_type
>
>On 03/03/2016 09:30 AM, Sriram Dash wrote:
>>
>>> -Original Message-
>>> From: Marek Vasut [mailto:ma...@denx.de]
>>> Sent: Wednesday, March 02, 2016 3:57 AM
>>> To: Sriram Dash ; u-boot@lists.denx.de
>>> Cc: york sun ; Ramneek Mehresh
>>> ; Rajesh Bhagat 
>>> Subject: Re: [PATCH v3 2/3] board:freescale:usb: Remove code
>>> duplication for fdt_usb_get_node_type
>>>
>>> On 03/01/2016 08:03 AM, Sriram Dash wrote:
 Call fdt_usb_get_node_type() from fdt_fixup_usb_mode_phy_type() to
 avoid code duplication.

 Signed-off-by: Ramneek Mehresh 
 Signed-off-by: Sriram Dash 
 ---
  board/freescale/common/usb.c | 72
 ++--
  1 file changed, 29 insertions(+), 43 deletions(-)

 diff --git a/board/freescale/common/usb.c
 b/board/freescale/common/usb.c index 85cb1bf..d815dc1 100644
 --- a/board/freescale/common/usb.c
 +++ b/board/freescale/common/usb.c
 @@ -18,33 +18,45 @@
  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1  #endif

 -static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
 - const char *phy_type, int start_offset)
 +static const char *fdt_usb_get_node_type(void *blob, int start_offset,
 +   int *node_offset)
  {
const char *compat_dr = "fsl-usb2-dr";
const char *compat_mph = "fsl-usb2-mph";
 -  const char *prop_mode = "dr_mode";
 -  const char *prop_type = "phy_type";
const char *node_type = NULL;
 -  int node_offset;
 -  int err;

 -  node_offset = fdt_node_offset_by_compatible(blob,
 -  start_offset, compat_mph);
 -  if (node_offset < 0) {
 -  node_offset = fdt_node_offset_by_compatible(blob,
 -  start_offset,
 -  compat_dr);
 -  if (node_offset < 0) {
 -  printf("WARNING: could not find compatible node: %s",
 - fdt_strerror(node_offset));
 -  return -1;
 +  *node_offset = fdt_node_offset_by_compatible(blob, start_offset,
 +   compat_mph);
 +  if (*node_offset < 0) {
 +  *node_offset = fdt_node_offset_by_compatible(blob,
 +   start_offset,
 +   compat_dr);
 +  if (*node_offset < 0) {
 +  printf("ERROR: could not find compatible node: %s\n",
 + fdt_strerror(*node_offset));
 +  } else {
 +  node_type = compat_dr;
}
 -  node_type = compat_dr;
} else {
node_type = compat_mph;
}

 +  return node_type;
>>>
>>> The function should be able to return error code. If you need to
>>> return some more stuff from the function, return it via reference.
>>>
>>
>> This patch is not altering the fdt_usb_get_node_type(). It is only
>> calling the function from fdt_fixup_usb_mode_phy_type(), to avoid code
>duplication.
>
>I am not complaining about that part. I am complaining about the new function,
>fdt_usb_get_node_type(), which returns pointer as a return value instead of
>returning proper error code as a return value.
>

I think git diff tool is creating confusion here, I have just moved function 
fdt_usb_get_node_type
above fdt_fixup_usb_mode_phy_type which created all the diff and looked as if 
new function is 
added. 

Please check below created patch where declaration is added to call 
fdt_usb_get_node_type 
in fdt_usb_get_mode_phy_type. We will be sending below in V4. 

#

diff --git a/board/freescale/common/usb.c b/board/freescale/common/usb.c
index 85cb1bf..5553225 100644
--- a/board/freescale/common/usb.c
+++ b/board/freescale/common/usb.c
@@ -18,32 +18,21 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 #endif
 
+const char *fdt_usb_get_node_type(void *blob, int start_offset,
+int *node_offset);
+
 static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
   const char *phy_type, int start_offset)
 {
-   const 

Re: [U-Boot] [PATCH v3 3/3] board:freescale:usb: Add device-tree fixup support for xhci controller

[Sriram Dash]

>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Thursday, March 03, 2016 3:33 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; Ramneek Mehresh
>; Rajesh Bhagat 
>Subject: Re: [PATCH v3 3/3] board:freescale:usb: Add device-tree fixup support 
>for
>xhci controller
>
>On 03/03/2016 09:32 AM, Sriram Dash wrote:
>>> -Original Message-
>>> From: Marek Vasut [mailto:ma...@denx.de]
>>> Sent: Wednesday, March 02, 2016 3:55 AM
>>> To: Sriram Dash ; u-boot@lists.denx.de
>>> Cc: york sun ; Ramneek Mehresh
>>> ; Rajesh Bhagat 
>>> Subject: Re: [PATCH v3 3/3] board:freescale:usb: Add device-tree
>>> fixup support for xhci controller
>>>
>>> On 03/01/2016 08:03 AM, Sriram Dash wrote:
 Enables usb device-tree fixup code to incorporate xhci controller

 Signed-off-by: Ramneek Mehresh 
 Signed-off-by: Sriram Dash 
>>>
>>> Changelog ?
>>>
>>
>> Will include changelog for v2 and v3 in v4.
>>
 ---
  board/freescale/common/Makefile |  1 +
  board/freescale/common/usb.c| 30 +-
  include/fdt_support.h   |  4 ++--
  3 files changed, 16 insertions(+), 19 deletions(-)

 diff --git a/board/freescale/common/Makefile
 b/board/freescale/common/Makefile index 62de45c..c644896 100644
 --- a/board/freescale/common/Makefile
 +++ b/board/freescale/common/Makefile
 @@ -14,6 +14,7 @@ endif
  endif

  obj-$(CONFIG_USB_EHCI_FSL) += usb.o
 +obj-$(CONFIG_USB_XHCI_FSL) += usb.o

  ifdef MINIMAL
  # necessary to create built-in.o
 diff --git a/board/freescale/common/usb.c
 b/board/freescale/common/usb.c index d815dc1..8e423be 100644
 --- a/board/freescale/common/usb.c
 +++ b/board/freescale/common/usb.c
 @@ -18,29 +18,25 @@
  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1  #endif

 +const char compat_usb_fsl[][16] = {"fsl-usb2-mph",
 + "fsl-usb2-dr",
 + "snps,dwc3"};
>>>
>>> This is const char *foo[].
>>>
>>
>> Reference from "char compat[][16] = { "cfi-flash", "jedec-flash" };"
>> I will change to const char *compat_usb_fsl[] in v4.
>>
  static const char *fdt_usb_get_node_type(void *blob, int start_offset,
 int *node_offset)
  {
 -  const char *compat_dr = "fsl-usb2-dr";
 -  const char *compat_mph = "fsl-usb2-mph";
const char *node_type = NULL;
 -
 -  *node_offset = fdt_node_offset_by_compatible(blob, start_offset,
 -   compat_mph);
 -  if (*node_offset < 0) {
 -  *node_offset = fdt_node_offset_by_compatible(blob,
 -   start_offset,
 -   compat_dr);
 -  if (*node_offset < 0) {
 -  printf("ERROR: could not find compatible node: %s\n",
 - fdt_strerror(*node_offset));
 -  } else {
 -  node_type = compat_dr;
 +  int size = sizeof(compat_usb_fsl)/sizeof(compat_usb_fsl[0]);
>>>
>>> Oh the art of counting. Firstly, what you did here is
>>> reimplementation of ARRAY_SIZE(), but that's wrong in this context.
>>> Each one of the array elements is differently sized, so to avoid
>>> problems with this crap, the code hard-codes random constant defining
>>> the element size, which is another crap workaround as it will break once a 
>>> longer
>element is added.
>>> And it wastes space. No, instead, use a terminating entry in the array.
>>>
>>
>> Will change compat_usb_fsl[][16] into const char *compat_usb_fsl[],
>> and use ARRAY_SIZE(compat_usb_fsl) . What is your opinion?
>
>My opinion is to use a terminating NULL entry and iterate over the array until 
>you
>reach it.
>

Accepted. Will do it in v4.

>--
>Best regards,
>Marek Vasut
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Re: [U-Boot] [PATCH v3 3/3] board:freescale:usb: Add device-tree fixup support for xhci controller

[Marek Vasut]

On 03/03/2016 09:32 AM, Sriram Dash wrote:
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Wednesday, March 02, 2016 3:55 AM
>> To: Sriram Dash ; u-boot@lists.denx.de
>> Cc: york sun ; Ramneek Mehresh
>> ; Rajesh Bhagat 
>> Subject: Re: [PATCH v3 3/3] board:freescale:usb: Add device-tree fixup 
>> support for
>> xhci controller
>>
>> On 03/01/2016 08:03 AM, Sriram Dash wrote:
>>> Enables usb device-tree fixup code to incorporate xhci controller
>>>
>>> Signed-off-by: Ramneek Mehresh 
>>> Signed-off-by: Sriram Dash 
>>
>> Changelog ?
>>
> 
> Will include changelog for v2 and v3 in v4.
> 
>>> ---
>>>  board/freescale/common/Makefile |  1 +
>>>  board/freescale/common/usb.c| 30 +-
>>>  include/fdt_support.h   |  4 ++--
>>>  3 files changed, 16 insertions(+), 19 deletions(-)
>>>
>>> diff --git a/board/freescale/common/Makefile
>>> b/board/freescale/common/Makefile index 62de45c..c644896 100644
>>> --- a/board/freescale/common/Makefile
>>> +++ b/board/freescale/common/Makefile
>>> @@ -14,6 +14,7 @@ endif
>>>  endif
>>>
>>>  obj-$(CONFIG_USB_EHCI_FSL) += usb.o
>>> +obj-$(CONFIG_USB_XHCI_FSL) += usb.o
>>>
>>>  ifdef MINIMAL
>>>  # necessary to create built-in.o
>>> diff --git a/board/freescale/common/usb.c
>>> b/board/freescale/common/usb.c index d815dc1..8e423be 100644
>>> --- a/board/freescale/common/usb.c
>>> +++ b/board/freescale/common/usb.c
>>> @@ -18,29 +18,25 @@
>>>  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1  #endif
>>>
>>> +const char compat_usb_fsl[][16] = {"fsl-usb2-mph",
>>> +  "fsl-usb2-dr",
>>> +  "snps,dwc3"};
>>
>> This is const char *foo[].
>>
> 
> Reference from "char compat[][16] = { "cfi-flash", "jedec-flash" };"
> I will change to const char *compat_usb_fsl[] in v4. 
> 
>>>  static const char *fdt_usb_get_node_type(void *blob, int start_offset,
>>>  int *node_offset)
>>>  {
>>> -   const char *compat_dr = "fsl-usb2-dr";
>>> -   const char *compat_mph = "fsl-usb2-mph";
>>> const char *node_type = NULL;
>>> -
>>> -   *node_offset = fdt_node_offset_by_compatible(blob, start_offset,
>>> -compat_mph);
>>> -   if (*node_offset < 0) {
>>> -   *node_offset = fdt_node_offset_by_compatible(blob,
>>> -start_offset,
>>> -compat_dr);
>>> -   if (*node_offset < 0) {
>>> -   printf("ERROR: could not find compatible node: %s\n",
>>> -  fdt_strerror(*node_offset));
>>> -   } else {
>>> -   node_type = compat_dr;
>>> +   int size = sizeof(compat_usb_fsl)/sizeof(compat_usb_fsl[0]);
>>
>> Oh the art of counting. Firstly, what you did here is reimplementation of
>> ARRAY_SIZE(), but that's wrong in this context. Each one of the array 
>> elements is
>> differently sized, so to avoid problems with this crap, the code hard-codes 
>> random
>> constant defining the element size, which is another crap workaround as it 
>> will
>> break once a longer element is added.
>> And it wastes space. No, instead, use a terminating entry in the array.
>>
> 
> Will change compat_usb_fsl[][16] into const char *compat_usb_fsl[], 
> and use ARRAY_SIZE(compat_usb_fsl) . What is your opinion?

My opinion is to use a terminating NULL entry and iterate over the array
until you reach it.

-- 
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Marek Vasut
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Re: [U-Boot] [PATCH v3 2/3] board:freescale:usb: Remove code duplication for fdt_usb_get_node_type

[Marek Vasut]

On 03/03/2016 09:30 AM, Sriram Dash wrote:
> 
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Wednesday, March 02, 2016 3:57 AM
>> To: Sriram Dash ; u-boot@lists.denx.de
>> Cc: york sun ; Ramneek Mehresh
>> ; Rajesh Bhagat 
>> Subject: Re: [PATCH v3 2/3] board:freescale:usb: Remove code duplication for
>> fdt_usb_get_node_type
>>
>> On 03/01/2016 08:03 AM, Sriram Dash wrote:
>>> Call fdt_usb_get_node_type() from fdt_fixup_usb_mode_phy_type() to
>>> avoid code duplication.
>>>
>>> Signed-off-by: Ramneek Mehresh 
>>> Signed-off-by: Sriram Dash 
>>> ---
>>>  board/freescale/common/usb.c | 72
>>> ++--
>>>  1 file changed, 29 insertions(+), 43 deletions(-)
>>>
>>> diff --git a/board/freescale/common/usb.c
>>> b/board/freescale/common/usb.c index 85cb1bf..d815dc1 100644
>>> --- a/board/freescale/common/usb.c
>>> +++ b/board/freescale/common/usb.c
>>> @@ -18,33 +18,45 @@
>>>  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1  #endif
>>>
>>> -static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>>> -  const char *phy_type, int start_offset)
>>> +static const char *fdt_usb_get_node_type(void *blob, int start_offset,
>>> +int *node_offset)
>>>  {
>>> const char *compat_dr = "fsl-usb2-dr";
>>> const char *compat_mph = "fsl-usb2-mph";
>>> -   const char *prop_mode = "dr_mode";
>>> -   const char *prop_type = "phy_type";
>>> const char *node_type = NULL;
>>> -   int node_offset;
>>> -   int err;
>>>
>>> -   node_offset = fdt_node_offset_by_compatible(blob,
>>> -   start_offset, compat_mph);
>>> -   if (node_offset < 0) {
>>> -   node_offset = fdt_node_offset_by_compatible(blob,
>>> -   start_offset,
>>> -   compat_dr);
>>> -   if (node_offset < 0) {
>>> -   printf("WARNING: could not find compatible node: %s",
>>> -  fdt_strerror(node_offset));
>>> -   return -1;
>>> +   *node_offset = fdt_node_offset_by_compatible(blob, start_offset,
>>> +compat_mph);
>>> +   if (*node_offset < 0) {
>>> +   *node_offset = fdt_node_offset_by_compatible(blob,
>>> +start_offset,
>>> +compat_dr);
>>> +   if (*node_offset < 0) {
>>> +   printf("ERROR: could not find compatible node: %s\n",
>>> +  fdt_strerror(*node_offset));
>>> +   } else {
>>> +   node_type = compat_dr;
>>> }
>>> -   node_type = compat_dr;
>>> } else {
>>> node_type = compat_mph;
>>> }
>>>
>>> +   return node_type;
>>
>> The function should be able to return error code. If you need to return some 
>> more
>> stuff from the function, return it via reference.
>>
> 
> This patch is not altering the fdt_usb_get_node_type(). It is only calling 
> the function from
> fdt_fixup_usb_mode_phy_type(), to avoid code duplication. 

I am not complaining about that part. I am complaining about the new
function, fdt_usb_get_node_type(), which returns pointer as a return
value instead of returning proper error code as a return value.

>>> +}
>>> +
>>> +static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>>> +   const char *phy_type, int start_offset) 
>>> {
>>> +   const char *prop_mode = "dr_mode";
>>> +   const char *prop_type = "phy_type";
>>> +   const char *node_type = NULL;
>>> +   int node_offset;
>>> +   int err;
>>> +
>>> +   node_type = fdt_usb_get_node_type(blob, start_offset, _offset);
>>> +   if (!node_type)
>>> +   return -1;
>>> +
>>> if (mode) {
>>> err = fdt_setprop(blob, node_offset, prop_mode, mode,
>>>   strlen(mode) + 1);
>>> @@ -64,32 +76,6 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const
>> char *mode,
>>> return node_offset;
>>>  }
>>>
>>> -static const char *fdt_usb_get_node_type(void *blob, int start_offset,
>>> -int *node_offset)
>>> -{
>>> -   const char *compat_dr = "fsl-usb2-dr";
>>> -   const char *compat_mph = "fsl-usb2-mph";
>>> -   const char *node_type = NULL;
>>> -
>>> -   *node_offset = fdt_node_offset_by_compatible(blob, start_offset,
>>> -compat_mph);
>>> -   if (*node_offset < 0) {
>>> -   *node_offset = fdt_node_offset_by_compatible(blob,
>>> -start_offset,
>>> - 

Re: [U-Boot] [PATCH v3 1/3] board:freescale:common: Move device-tree fixup framework to common file

[Marek Vasut]

On 03/03/2016 09:29 AM, Sriram Dash wrote:
> 
> 
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Wednesday, March 02, 2016 3:43 AM
>> To: Sriram Dash ; u-boot@lists.denx.de
>> Cc: york sun ; Ramneek Mehresh
>> ; Rajesh Bhagat ; Tom
>> Rini 
>> Subject: Re: [PATCH v3 1/3] board:freescale:common: Move device-tree fixup
>> framework to common file
>>
>> On 03/01/2016 08:03 AM, Sriram Dash wrote:
>>> Move usb device-tree fixup framework from ehci-fsl.c to common place
>>> so that it can be used by other drivers as well (xhci-fsl.c).
>>>
>>> Signed-off-by: Ramneek Mehresh 
>>> Signed-off-by: Sriram Dash 
>>> ---
>>>  board/freescale/common/Makefile|   2 +
>>>  .../ehci-fsl.c => board/freescale/common/usb.c | 160 +
>>>  drivers/usb/host/ehci-fsl.c| 195 
>>> -
>>>  3 files changed, 3 insertions(+), 354 deletions(-)  copy
>>> drivers/usb/host/ehci-fsl.c => board/freescale/common/usb.c (53%)
>>
>> Where is the changelog ?
> 
> Will include changelog for v2 and v3 in v4.
> 
>>
>>> diff --git a/board/freescale/common/Makefile
>>> b/board/freescale/common/Makefile index be114ce..62de45c 100644
>>> --- a/board/freescale/common/Makefile
>>> +++ b/board/freescale/common/Makefile
>>> @@ -13,6 +13,8 @@ MINIMAL=y
>>>  endif
>>>  endif
>>>
>>> +obj-$(CONFIG_USB_EHCI_FSL) += usb.o
>>> +
>>>  ifdef MINIMAL
>>>  # necessary to create built-in.o
>>>  obj- := __dummy__.o
>>> diff --git a/drivers/usb/host/ehci-fsl.c
>>> b/board/freescale/common/usb.c similarity index 53% copy from
>>> drivers/usb/host/ehci-fsl.c copy to board/freescale/common/usb.c index
>>> 97b7f14..85cb1bf 100644
>>> --- a/drivers/usb/host/ehci-fsl.c
>>> +++ b/board/freescale/common/usb.c
>>> @@ -1,9 +1,5 @@
>>>  /*
>>> - * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
>>> - *
>>> - * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
>>> - *
>>> - * Author: Tor Krill t...@excito.com
>>> + * (C) Copyright 2016 Freescale Semiconductor, Inc.
>>
>> What's with this copyright change here ?
> 
> It is a new file named common/usb.c. Shall I include the complete ehci-fsl.c 
> copyright information in the new file?

There is already a file named common/usb.c , you surely mean
board/freescale/common/usb.c , yes ?

According to git, it's not a new file:

b/board/freescale/common/usb.c similarity index 53% copy from
drivers/usb/host/ehci-fsl.c copy to board/freescale/common/usb.c

so yes, it should retain all copyright info.

And now that I am looking at it, I would much rather see the fixup bits
in drivers/usb/host/ than some board-specific file. You can very well
put those into fsl-dt-fixup.c or whatever there.

>>
>>>   * SPDX-License-Identifier:GPL-2.0+
>>>   */
>>> @@ -17,164 +13,11 @@
>>>  #include 
>>>  #include 
>>>
>>> -#include "ehci.h"
>> [...]
>>
>> --
>> Best regards,
>> Marek Vasut
> 
> Best Regards,
> Sriram
> 


-- 
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Marek Vasut
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Re: [U-Boot] Newbie SPL question for socfpga_sockit

[Marek Vasut]

On 03/03/2016 07:55 AM, George Broz wrote:
> On 2 March 2016 at 14:54, Dinh Nguyen  wrote:
> 
>>> socfpga_common.h and re-built the project. I picked up
>>> spl/u-boot-spl-dtb.sfp and
>>> u-boot-dtb.img and transferred them to the SD card with:
>>>
>>> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
>>> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4
>>>
>>
>> You can just do a 'make u-boot-with-spl.sfp' and burn the
>> u-boot-with-spl.sfp file straight to the a2 partition, or sdf3.
>>
> Thanks, Dinh. That's a time saver.
> 
> On my version that target is: 'make u-boot-with-spl-dtb.sfp'

This was changed after 2016.01 was out by the following patch:

commit bd7dc3883bf4e61538e5519ca2d6798b3e8e0695
Author: Simon Glass 
Date:   Sun Jan 31 18:10:53 2016 -0700

socfpga: Simplify Makefile filenames

-- 
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Marek Vasut
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Re: [U-Boot] [PATCH v3 1/3] board:freescale:common: Move device-tree fixup framework to common file

[Sriram Dash]

>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Wednesday, March 02, 2016 3:43 AM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; Ramneek Mehresh
>; Rajesh Bhagat ; Tom
>Rini 
>Subject: Re: [PATCH v3 1/3] board:freescale:common: Move device-tree fixup
>framework to common file
>
>On 03/01/2016 08:03 AM, Sriram Dash wrote:
>> Move usb device-tree fixup framework from ehci-fsl.c to common place
>> so that it can be used by other drivers as well (xhci-fsl.c).
>>
>> Signed-off-by: Ramneek Mehresh 
>> Signed-off-by: Sriram Dash 
>> ---
>>  board/freescale/common/Makefile|   2 +
>>  .../ehci-fsl.c => board/freescale/common/usb.c | 160 +
>>  drivers/usb/host/ehci-fsl.c| 195 
>> -
>>  3 files changed, 3 insertions(+), 354 deletions(-)  copy
>> drivers/usb/host/ehci-fsl.c => board/freescale/common/usb.c (53%)
>
>Where is the changelog ?

Will include changelog for v2 and v3 in v4.

>
>> diff --git a/board/freescale/common/Makefile
>> b/board/freescale/common/Makefile index be114ce..62de45c 100644
>> --- a/board/freescale/common/Makefile
>> +++ b/board/freescale/common/Makefile
>> @@ -13,6 +13,8 @@ MINIMAL=y
>>  endif
>>  endif
>>
>> +obj-$(CONFIG_USB_EHCI_FSL) += usb.o
>> +
>>  ifdef MINIMAL
>>  # necessary to create built-in.o
>>  obj- := __dummy__.o
>> diff --git a/drivers/usb/host/ehci-fsl.c
>> b/board/freescale/common/usb.c similarity index 53% copy from
>> drivers/usb/host/ehci-fsl.c copy to board/freescale/common/usb.c index
>> 97b7f14..85cb1bf 100644
>> --- a/drivers/usb/host/ehci-fsl.c
>> +++ b/board/freescale/common/usb.c
>> @@ -1,9 +1,5 @@
>>  /*
>> - * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
>> - *
>> - * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
>> - *
>> - * Author: Tor Krill t...@excito.com
>> + * (C) Copyright 2016 Freescale Semiconductor, Inc.
>
>What's with this copyright change here ?

It is a new file named common/usb.c. Shall I include the complete ehci-fsl.c 
copyright information in the new file?

>
>>   * SPDX-License-Identifier: GPL-2.0+
>>   */
>> @@ -17,164 +13,11 @@
>>  #include 
>>  #include 
>>
>> -#include "ehci.h"
>[...]
>
>--
>Best regards,
>Marek Vasut

Best Regards,
Sriram
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Re: [U-Boot] [PATCH v3 2/3] board:freescale:usb: Remove code duplication for fdt_usb_get_node_type

[Sriram Dash]

>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Wednesday, March 02, 2016 3:57 AM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; Ramneek Mehresh
>; Rajesh Bhagat 
>Subject: Re: [PATCH v3 2/3] board:freescale:usb: Remove code duplication for
>fdt_usb_get_node_type
>
>On 03/01/2016 08:03 AM, Sriram Dash wrote:
>> Call fdt_usb_get_node_type() from fdt_fixup_usb_mode_phy_type() to
>> avoid code duplication.
>>
>> Signed-off-by: Ramneek Mehresh 
>> Signed-off-by: Sriram Dash 
>> ---
>>  board/freescale/common/usb.c | 72
>> ++--
>>  1 file changed, 29 insertions(+), 43 deletions(-)
>>
>> diff --git a/board/freescale/common/usb.c
>> b/board/freescale/common/usb.c index 85cb1bf..d815dc1 100644
>> --- a/board/freescale/common/usb.c
>> +++ b/board/freescale/common/usb.c
>> @@ -18,33 +18,45 @@
>>  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1  #endif
>>
>> -static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>> -   const char *phy_type, int start_offset)
>> +static const char *fdt_usb_get_node_type(void *blob, int start_offset,
>> + int *node_offset)
>>  {
>>  const char *compat_dr = "fsl-usb2-dr";
>>  const char *compat_mph = "fsl-usb2-mph";
>> -const char *prop_mode = "dr_mode";
>> -const char *prop_type = "phy_type";
>>  const char *node_type = NULL;
>> -int node_offset;
>> -int err;
>>
>> -node_offset = fdt_node_offset_by_compatible(blob,
>> -start_offset, compat_mph);
>> -if (node_offset < 0) {
>> -node_offset = fdt_node_offset_by_compatible(blob,
>> -start_offset,
>> -compat_dr);
>> -if (node_offset < 0) {
>> -printf("WARNING: could not find compatible node: %s",
>> -   fdt_strerror(node_offset));
>> -return -1;
>> +*node_offset = fdt_node_offset_by_compatible(blob, start_offset,
>> + compat_mph);
>> +if (*node_offset < 0) {
>> +*node_offset = fdt_node_offset_by_compatible(blob,
>> + start_offset,
>> + compat_dr);
>> +if (*node_offset < 0) {
>> +printf("ERROR: could not find compatible node: %s\n",
>> +   fdt_strerror(*node_offset));
>> +} else {
>> +node_type = compat_dr;
>>  }
>> -node_type = compat_dr;
>>  } else {
>>  node_type = compat_mph;
>>  }
>>
>> +return node_type;
>
>The function should be able to return error code. If you need to return some 
>more
>stuff from the function, return it via reference.
>

This patch is not altering the fdt_usb_get_node_type(). It is only calling the 
function from
fdt_fixup_usb_mode_phy_type(), to avoid code duplication. 

>> +}
>> +
>> +static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>> +const char *phy_type, int start_offset) 
>> {
>> +const char *prop_mode = "dr_mode";
>> +const char *prop_type = "phy_type";
>> +const char *node_type = NULL;
>> +int node_offset;
>> +int err;
>> +
>> +node_type = fdt_usb_get_node_type(blob, start_offset, _offset);
>> +if (!node_type)
>> +return -1;
>> +
>>  if (mode) {
>>  err = fdt_setprop(blob, node_offset, prop_mode, mode,
>>strlen(mode) + 1);
>> @@ -64,32 +76,6 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const
>char *mode,
>>  return node_offset;
>>  }
>>
>> -static const char *fdt_usb_get_node_type(void *blob, int start_offset,
>> - int *node_offset)
>> -{
>> -const char *compat_dr = "fsl-usb2-dr";
>> -const char *compat_mph = "fsl-usb2-mph";
>> -const char *node_type = NULL;
>> -
>> -*node_offset = fdt_node_offset_by_compatible(blob, start_offset,
>> - compat_mph);
>> -if (*node_offset < 0) {
>> -*node_offset = fdt_node_offset_by_compatible(blob,
>> - start_offset,
>> - compat_dr);
>> -if (*node_offset < 0) {
>> -printf("ERROR: could not find compatible node: %s\n",
>> -   fdt_strerror(*node_offset));
>> -} else {
>> -node_type = compat_dr;
>> -}
>> -} else {
>> -   

Re: [U-Boot] [PATCH v3 3/3] board:freescale:usb: Add device-tree fixup support for xhci controller

[Sriram Dash]

>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Wednesday, March 02, 2016 3:55 AM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; Ramneek Mehresh
>; Rajesh Bhagat 
>Subject: Re: [PATCH v3 3/3] board:freescale:usb: Add device-tree fixup support 
>for
>xhci controller
>
>On 03/01/2016 08:03 AM, Sriram Dash wrote:
>> Enables usb device-tree fixup code to incorporate xhci controller
>>
>> Signed-off-by: Ramneek Mehresh 
>> Signed-off-by: Sriram Dash 
>
>Changelog ?
>

Will include changelog for v2 and v3 in v4.

>> ---
>>  board/freescale/common/Makefile |  1 +
>>  board/freescale/common/usb.c| 30 +-
>>  include/fdt_support.h   |  4 ++--
>>  3 files changed, 16 insertions(+), 19 deletions(-)
>>
>> diff --git a/board/freescale/common/Makefile
>> b/board/freescale/common/Makefile index 62de45c..c644896 100644
>> --- a/board/freescale/common/Makefile
>> +++ b/board/freescale/common/Makefile
>> @@ -14,6 +14,7 @@ endif
>>  endif
>>
>>  obj-$(CONFIG_USB_EHCI_FSL) += usb.o
>> +obj-$(CONFIG_USB_XHCI_FSL) += usb.o
>>
>>  ifdef MINIMAL
>>  # necessary to create built-in.o
>> diff --git a/board/freescale/common/usb.c
>> b/board/freescale/common/usb.c index d815dc1..8e423be 100644
>> --- a/board/freescale/common/usb.c
>> +++ b/board/freescale/common/usb.c
>> @@ -18,29 +18,25 @@
>>  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1  #endif
>>
>> +const char compat_usb_fsl[][16] = {"fsl-usb2-mph",
>> +   "fsl-usb2-dr",
>> +   "snps,dwc3"};
>
>This is const char *foo[].
>

Reference from "char compat[][16] = { "cfi-flash", "jedec-flash" };"
I will change to const char *compat_usb_fsl[] in v4. 

>>  static const char *fdt_usb_get_node_type(void *blob, int start_offset,
>>   int *node_offset)
>>  {
>> -const char *compat_dr = "fsl-usb2-dr";
>> -const char *compat_mph = "fsl-usb2-mph";
>>  const char *node_type = NULL;
>> -
>> -*node_offset = fdt_node_offset_by_compatible(blob, start_offset,
>> - compat_mph);
>> -if (*node_offset < 0) {
>> -*node_offset = fdt_node_offset_by_compatible(blob,
>> - start_offset,
>> - compat_dr);
>> -if (*node_offset < 0) {
>> -printf("ERROR: could not find compatible node: %s\n",
>> -   fdt_strerror(*node_offset));
>> -} else {
>> -node_type = compat_dr;
>> +int size = sizeof(compat_usb_fsl)/sizeof(compat_usb_fsl[0]);
>
>Oh the art of counting. Firstly, what you did here is reimplementation of
>ARRAY_SIZE(), but that's wrong in this context. Each one of the array elements 
>is
>differently sized, so to avoid problems with this crap, the code hard-codes 
>random
>constant defining the element size, which is another crap workaround as it will
>break once a longer element is added.
>And it wastes space. No, instead, use a terminating entry in the array.
>

Will change compat_usb_fsl[][16] into const char *compat_usb_fsl[], 
and use ARRAY_SIZE(compat_usb_fsl) . What is your opinion?

>btw use checkpatch before your next submission.
>
>> +int i;
>> +
>> +for (i = 0; i < size ; i++) {
>> +*node_offset = fdt_node_offset_by_compatible
>> +(blob, start_offset, compat_usb_fsl[i]);
>> +if (*node_offset >= 0) {
>> +node_type = compat_usb_fsl[i];
>> +break;
>>  }
>> -} else {
>> -node_type = compat_mph;
>>  }
>> -
>>  return node_type;
>>  }
>>
>> diff --git a/include/fdt_support.h b/include/fdt_support.h index
>> 296add0..d34e959 100644
>> --- a/include/fdt_support.h
>> +++ b/include/fdt_support.h
>> @@ -113,11 +113,11 @@ void fdt_fixup_qe_firmware(void *fdt);
>>   */
>>  int fdt_fixup_display(void *blob, const char *path, const char
>> *display);
>>
>> -#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
>> +#if defined(CONFIG_USB_EHCI_FSL) || defined(CONFIG_USB_XHCI_FSL)
>>  void fdt_fixup_dr_usb(void *blob, bd_t *bd);  #else  static inline
>> void fdt_fixup_dr_usb(void *blob, bd_t *bd) {} -#endif /*
>> defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) */
>> +#endif /* defined(CONFIG_USB_EHCI_FSL) ||
>> +defined(CONFIG_USB_XHCI_FSL) */
>>
>>  #if defined(CONFIG_SYS_FSL_SEC_COMPAT)
>>  void fdt_fixup_crypto_node(void *blob, int sec_rev);
>>
>
>
>--
>Best regards,
>Marek Vasut
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[U-Boot] [PATCH 3/3] include/crc.h: Remove unreferenced cyg_xxx() prototypes

[Stefan Roese]

These cyg_ prototypes are not referenced anywhere in current mainline
U-Boot. So lets remove them.

Signed-off-by: Stefan Roese 
---
 include/crc.h | 26 --
 1 file changed, 26 deletions(-)

diff --git a/include/crc.h b/include/crc.h
index b0031b2..111cb4a 100644
--- a/include/crc.h
+++ b/include/crc.h
@@ -36,32 +36,6 @@
 # endif
 #endif
 
-/* Compute a CRC, using the POSIX 1003 definition */
-extern uint32_t
-cyg_posix_crc32(unsigned char *s, int len);
-
-/* Gary S. Brown's 32 bit CRC */
-
-extern uint32_t
-cyg_crc32(unsigned char *s, int len);
-
-/* Gary S. Brown's 32 bit CRC, but accumulate the result from a */
-/* previous CRC calculation */
-
-extern uint32_t
-cyg_crc32_accumulate(uint32_t crc, unsigned char *s, int len);
-
-/* Ethernet FCS Algorithm */
-
-extern uint32_t
-cyg_ether_crc32(unsigned char *s, int len);
-
-/* Ethernet FCS algorithm, but accumulate the result from a previous */
-/* CRC calculation. */
-
-extern uint32_t
-cyg_ether_crc32_accumulate(uint32_t crc, unsigned char *s, int len);
-
 /* 16 bit CRC with polynomial x^16+x^12+x^5+1 (CRC-CCITT) */
 
 uint16_t crc16_ccitt(uint16_t crc_start, unsigned char *s, int len);
-- 
2.7.2

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[U-Boot] [PATCH 2/3] lib/crc16.c: Rename cyg_crc16() to crc16_ccitt() and add crc start value

[Stefan Roese]

The original name of this function is unclear. This patch renames this
CRC16 function to crc16_ccitt() matching its name with its
implementation.

To make the usage of this function more flexible, lets add the CRC start
value as parameter to this function. This way it can be used by other
functions requiring different start values than 0 as well.

Signed-off-by: Stefan Roese 
---
 common/xyzModem.c | 2 +-
 drivers/mmc/mmc_spi.c | 4 ++--
 include/crc.h | 4 ++--
 lib/crc16.c   | 4 ++--
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/common/xyzModem.c b/common/xyzModem.c
index 56f4bca..5656aac 100644
--- a/common/xyzModem.c
+++ b/common/xyzModem.c
@@ -446,7 +446,7 @@ xyzModem_get_hdr (void)
   /* Verify checksum/CRC */
   if (xyz.crc_mode)
 {
-  cksum = cyg_crc16 (xyz.pkt, xyz.len);
+  cksum = crc16_ccitt(0, xyz.pkt, xyz.len);
   if (cksum != ((xyz.crc1 << 8) | xyz.crc2))
{
  ZM_DEBUG (zm_dprintf ("CRC error - recvd: %02x%02x, computed: %x\n",
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index 9032a73..7547e1a 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -91,7 +91,7 @@ static uint mmc_spi_readdata(struct mmc *mmc, void *xbuf,
spi_xfer(spi, bsize * 8, NULL, buf, 0);
spi_xfer(spi, 2 * 8, NULL, , 0);
 #ifdef CONFIG_MMC_SPI_CRC_ON
-   if (be_to_cpu16(cyg_crc16(buf, bsize)) != crc) {
+   if (be_to_cpu16(crc16_ccitt(0, buf, bsize)) != crc) {
debug("%s: CRC error\n", mmc->cfg->name);
r1 = R1_SPI_COM_CRC;
break;
@@ -120,7 +120,7 @@ static uint mmc_spi_writedata(struct mmc *mmc, const void 
*xbuf,
tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
while (bcnt--) {
 #ifdef CONFIG_MMC_SPI_CRC_ON
-   crc = cpu_to_be16(cyg_crc16((u8 *)buf, bsize));
+   crc = cpu_to_be16(crc16_ccitt(0, (u8 *)buf, bsize));
 #endif
spi_xfer(spi, 2 * 8, tok, NULL, 0);
spi_xfer(spi, bsize * 8, buf, NULL, 0);
diff --git a/include/crc.h b/include/crc.h
index 5085d4e..b0031b2 100644
--- a/include/crc.h
+++ b/include/crc.h
@@ -62,8 +62,8 @@ cyg_ether_crc32(unsigned char *s, int len);
 extern uint32_t
 cyg_ether_crc32_accumulate(uint32_t crc, unsigned char *s, int len);
 
-/* 16 bit CRC with polynomial x^16+x^12+x^5+1 */
+/* 16 bit CRC with polynomial x^16+x^12+x^5+1 (CRC-CCITT) */
 
-extern uint16_t cyg_crc16(unsigned char *s, int len);
+uint16_t crc16_ccitt(uint16_t crc_start, unsigned char *s, int len);
 
 #endif /* _SERVICES_CRC_CRC_H_ */
diff --git a/lib/crc16.c b/lib/crc16.c
index 57e46f8..753b987 100644
--- a/lib/crc16.c
+++ b/lib/crc16.c
@@ -61,12 +61,12 @@ static const uint16_t crc16_tab[] = {
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0,
 };
 
-uint16_t cyg_crc16(unsigned char *buf, int len)
+uint16_t crc16_ccitt(uint16_t crc_start, unsigned char *buf, int len)
 {
int i;
uint16_t cksum;
 
-   cksum = 0;
+   cksum = crc_start;
for (i = 0;  i < len;  i++)
cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xff] ^ (cksum << 8);
 
-- 
2.7.2

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[U-Boot] [PATCH 1/3] lib/crc16.c: Coding-style cleanup

[Stefan Roese]

lib/crc16.c is changed to match the common U-Boot coding-style.

Signed-off-by: Stefan Roese 
---
 lib/crc16.c | 81 ++---
 1 file changed, 40 insertions(+), 41 deletions(-)

diff --git a/lib/crc16.c b/lib/crc16.c
index c63fde9..57e46f8 100644
--- a/lib/crc16.c
+++ b/lib/crc16.c
@@ -27,49 +27,48 @@
 
 /* Table of CRC constants - implements x^16+x^12+x^5+1 */
 static const uint16_t crc16_tab[] = {
-0x, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
-0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
-0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
-0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
-0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
-0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
-0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
-0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
-0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
-0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
-0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
-0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
-0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
-0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
-0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
-0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
-0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
-0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
-0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
-0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
-0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
-0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
-0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
-0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
-0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
-0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
-0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
-0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
-0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
-0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
-0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
-0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0,
+   0x, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+   0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+   0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+   0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+   0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+   0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+   0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+   0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+   0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+   0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+   0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+   0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+   0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+   0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+   0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+   0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+   0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+   0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+   0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+   0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+   0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+   0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+   0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+   0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+   0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+   0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+   0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+   0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+   0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+   0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+   0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+   0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0,
 };
 
-uint16_t

Re: [U-Boot] Sunxi (Allwinner A20) GPIO problems on u-boot 2016.1 and 2016.3-rc3 but not on 2015.10

[Hans de Goede]

Hi,

On 02-03-16 17:54, Hendrik wrote:

I am trying to get an Olimex A20-SOM running but I am experiencing strange 
problems on some of the GPIO pins on the device.

We are using (amongst others) pin PE6  as GPIO output but somehow there seems 
to be a change between U-Boot 2015.10 and 2016.01 in the default behaviour of 
these particular pins.

When generating a default config in 2016.01 (for example using 
'A20-OLinuXino-Lime_defconfig' or 'A20-Olimex-SOM-EVB_defconfig') and then 
booting the device with this config I can observe the following:

'gpio status -a PE6' tells me that the pin is INPUT and the value is sometimes 
0 and sometimes 1. When I measure the pin that is connected to 3V3 using a 10K 
pull up on my board, I measure 0.83V. That is strange because it should be 3.3V 
(as it is said to be an input).

'gpio set PE6' tells me that the pin is now OUTPUT and set to 1, so I should 
measure 3V3 on the pin but the pin Voltage is actually around 0.71V. Switching 
the pin low with 'gpio clear PE6' gives back a voltage of 0.83V. It seems that 
internally there is a pull down active or something although I cannot find this 
specifically set in the .config configuration file.

When using U-Boot 2015.10 the problem disappears completely (still using the 
defconfig). Although I'm fine with using U-Boot 2015.10, I think it is weird 
that the GPIO pin does not follow any of my instructions and seems to live its 
own life in 2016.01 and 2016.03-rc3.

So summarized, pin PE6 in U-Boot 2015.10 is OK:

 PE6 Set to input (default at startup) = 3V3 measured
 PE6 Set to output, high = 3V3 measured
 PE6 Set to output, low = 0V measured

In U-Boot 2016.01 and 2016.03-rc3 it's not OK

 PE6 Set to input (default at startup) = 0.83V measured
 PE6 Set to output, high = 0.83V measured
 PE6 Set to output, low = 0.71V measured

In addition to this; I'm booting a mainline kernel (not the special sunxi 
kernel). I can manage the GPIO pins there as well but the behaviour is the same 
(the same voltages measured). The kernel does not seem to have any specific 
runtime option for enabling or disabling pull ups or downs, but I didn't really 
look into this as u-boot already misbehaves and some of our peripherals won't 
start on boot because of this.


You can compare the drive-strength and internal pull-up/down
settings between versions by booting into Linux and then doing:

sudo ./pio -m PE6

This will show 4 numbers first number is the pinmux, second the
pull-up/down setting, third the drive strength
and last the value (read / driven out).

You can find the pio tool here:

https://github.com/linux-sunxi/sunxi-tools/blob/master/pio.c

I expect you to find that the values have not changed
between u-boot versions, more likely the board is using
some ldo or some such to provide PORTE with power, and
this commit is the culprit:

http://git.denx.de/?p=u-boot.git;a=commitdiff;h=02cc27c74f9b884b538bcd1b93342a4c05b5d608

You could try reverting that, or simply adding:

CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800

to the defconfig for your board

Regards,

Hans
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[U-Boot] [PATCH 2/2] imx: mx7d: move MX7D to Kconfig entry

[Peng Fan]

If including MX7D in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS
 will not effect.So move MX7D to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to
"select MX7D" to boards using i.MX7 Dual.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/cpu/armv7/mx7/Kconfig | 1 +
 configs/mx7dsabresd_defconfig  | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig
index 97d6238..aa3ace8 100644
--- a/arch/arm/cpu/armv7/mx7/Kconfig
+++ b/arch/arm/cpu/armv7/mx7/Kconfig
@@ -15,6 +15,7 @@ choice
 
 config TARGET_MX7DSABRESD
bool "mx7dsabresd"
+   select MX7D
select DM
select DM_THERMAL
 
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 1d262c1..6638475 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -3,7 +3,7 @@ CONFIG_ARCH_MX7=y
 CONFIG_TARGET_MX7DSABRESD=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg,MX7D"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
-- 
2.6.2

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[U-Boot] [PATCH 1/2] imx: mx6sx: move MX6SX to Kconfig entry

[Peng Fan]

If including MX6SX in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS
will not effect.So move MX6SX to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to
"select MX6SX" to boards using i.MX6 SoloX.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/cpu/armv7/mx6/Kconfig | 2 ++
 configs/mx6sxsabreauto_defconfig   | 2 +-
 configs/mx6sxsabresd_defconfig | 2 +-
 configs/mx6sxsabresd_spl_defconfig | 2 +-
 4 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index c72a150..8827caa 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -92,12 +92,14 @@ config TARGET_MX6SLEVK
 
 config TARGET_MX6SXSABRESD
bool "mx6sxsabresd"
+   select MX6SX
select SUPPORT_SPL
select DM
select DM_THERMAL
 
 config TARGET_MX6SXSABREAUTO
 bool "mx6sxsabreauto"
+   select MX6SX
 select DM
 select DM_THERMAL
 
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index d9e35df..631a998 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SXSABREAUTO=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg,MX6SX"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg"
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 953a246..6f97279 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SXSABRESD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg"
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
diff --git a/configs/mx6sxsabresd_spl_defconfig 
b/configs/mx6sxsabresd_spl_defconfig
index 3843f99..2b76e09 100644
--- a/configs/mx6sxsabresd_spl_defconfig
+++ b/configs/mx6sxsabresd_spl_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SXSABRESD=y
 CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6SX"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
-- 
2.6.2

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