[U-Boot] [PATCH] Fix spelling of "occurred".

2016-04-30 Thread Vagrant Cascadian
Signed-off-by: Vagrant Cascadian 
---

 board/bf533-ezkit/flash.c  |  2 +-
 board/mpl/pip405/pip405.c  |  2 +-
 board/tqc/tqm5200/cmd_stk52xx.c|  2 +-
 cmd/fdc.c  |  8 
 common/kgdb.c  |  2 +-
 common/usb_hub.c   |  2 +-
 drivers/ddr/marvell/a38x/ddr3_init.h   |  2 +-
 drivers/ddr/marvell/axp/ddr3_hw_training.h |  2 +-
 drivers/i2c/kona_i2c.c |  2 +-
 drivers/mtd/nand/omap_gpmc.c   |  4 ++--
 drivers/net/4xx_enet.c |  4 ++--
 drivers/net/enc28j60.c |  2 +-
 drivers/net/ne2000_base.c  |  4 ++--
 drivers/usb/gadget/mpc8xx_udc.c|  2 +-
 drivers/usb/musb/musb_hcd.c|  6 +++---
 include/linux/fb.h |  4 ++--
 include/test/ut.h  | 12 ++--
 include/usbdevice.h|  2 +-
 18 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/board/bf533-ezkit/flash.c b/board/bf533-ezkit/flash.c
index 3180a76..a7b3519 100644
--- a/board/bf533-ezkit/flash.c
+++ b/board/bf533-ezkit/flash.c
@@ -320,7 +320,7 @@ int poll_toggle_bit(long lOffset)
}
timeout--;
}
-   printf("Time out occured \n");
+   printf("Time out occurred \n");
if (timeout < 0)
return FLASH_FAIL;
 }
diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c
index 7c7690f..1bd2fbf 100644
--- a/board/mpl/pip405/pip405.c
+++ b/board/mpl/pip405/pip405.c
@@ -777,7 +777,7 @@ void print_pip405_info (void)
((sysman & 0x10) == 0x10) ? "" : "not ");
printf ("INIT asserts %sINT1# (NMI)\n",
((sysman & 0x20) == 0x20) ? "" : "not ");
-   printf ("INIT occured %d\n", (sysman >> 6) & 0x1);
+   printf ("INIT occurred %d\n", (sysman >> 6) & 0x1);
printf ("SER1 is routed to %s\n",
((flashcom & 0x1) == 0x1) ? "RS485" : "RS232");
printf ("COM2 is routed to %s\n",
diff --git a/board/tqc/tqm5200/cmd_stk52xx.c b/board/tqc/tqm5200/cmd_stk52xx.c
index 9d2d5a8..dc22ee4 100644
--- a/board/tqc/tqm5200/cmd_stk52xx.c
+++ b/board/tqc/tqm5200/cmd_stk52xx.c
@@ -72,7 +72,7 @@ static int spi_transmit(unsigned char data)
spi->dr = data;
/* wait for SPI transmission completed */
while (!(spi->sr & 0x80)) {
-   if (spi->sr & 0x40) {   /* if write collision occured */
+   if (spi->sr & 0x40) {   /* if write collision occurred */
int dummy;
 
/* do dummy read to clear status register */
diff --git a/cmd/fdc.c b/cmd/fdc.c
index 058ae89..d2281ab 100644
--- a/cmd/fdc.c
+++ b/cmd/fdc.c
@@ -189,7 +189,7 @@ int wait_for_fdc_int(void)
while((read_fdc_reg(FDC_SRA)&0x80)==0) {
timeout--;
udelay(10);
-   if(timeout==0) /* timeout occured */
+   if(timeout==0) /* timeout occurred */
return false;
}
return true;
@@ -205,7 +205,7 @@ int read_fdc_byte(void)
/* direction out and ready */
udelay(10);
timeout--;
-   if(timeout==0) /* timeout occured */
+   if(timeout==0) /* timeout occurred */
return -1;
}
return read_fdc_reg(FDC_FIFO);
@@ -235,7 +235,7 @@ int write_fdc_byte(unsigned char val)
timeout--;
udelay(10);
fdc_need_more_output();
-   if(timeout==0) /* timeout occured */
+   if(timeout==0) /* timeout occurred */
return false;
}
write_fdc_reg(FDC_FIFO,val);
@@ -395,7 +395,7 @@ int fdc_terminate(FDC_COMMAND_STRUCT *pCMD)
int i;
for(i=0;i<100;i++)
udelay(500); /* wait 500usec for fifo overrun */
-   while((read_fdc_reg(FDC_SRA)&0x80)==0x00); /* wait as long as no int 
has occured */
+   while((read_fdc_reg(FDC_SRA)&0x80)==0x00); /* wait as long as no int 
has occurred */
for(i=0;i<7;i++) {
pCMD->result[i]=(unsigned char)read_fdc_byte();
}
diff --git a/common/kgdb.c b/common/kgdb.c
index d357463..daf53be 100644
--- a/common/kgdb.c
+++ b/common/kgdb.c
@@ -326,7 +326,7 @@ handle_exception (struct pt_regs *regs)
return (0);
}
 
-   /* probably should check which exception occured as well */
+   /* probably should check which exception occurred as well */
if (longjmp_on_fault) {
longjmp_on_fault = 0;
kgdb_longjmp(error_jmp_buf, KGDBERR_MEMFAULT);
diff --git a/common/usb_hub.c b/common/usb_hub.c
index e6a2cdb..4f59802 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -475,7 +475,7 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
   

[U-Boot] [PATCH] Change my mailaddress

2016-04-30 Thread Andreas Bießmann
I'll switch my mails to my own server, so drop all gmail references.

Signed-off-by: Andreas Bießmann 
---

 .mailmap| 1 +
 MAINTAINERS | 4 ++--
 arch/arm/lib/stack.c| 2 +-
 arch/arm/mach-at91/arm920t/at91rm9200_devices.c | 2 +-
 arch/arm/mach-at91/arm920t/cpu.c| 2 +-
 arch/avr32/cpu/mmc.c| 2 +-
 arch/avr32/lib/bootm.c  | 2 +-
 arch/avr32/lib/dram_init.c  | 2 +-
 arch/powerpc/lib/stack.c| 2 +-
 board/atmel/at91rm9200ek/MAINTAINERS| 2 +-
 board/atmel/at91rm9200ek/at91rm9200ek.c | 2 +-
 board/atmel/at91rm9200ek/led.c  | 2 +-
 board/atmel/atngw100mkii/MAINTAINERS| 2 +-
 board/atmel/atngw100mkii/atngw100mkii.c | 2 +-
 board/in-circuit/grasshopper/MAINTAINERS| 2 +-
 doc/README.at91-soc | 2 +-
 doc/README.atmel_pmecc  | 2 +-
 doc/git-mailrc  | 2 +-
 include/configs/atngw100mkii.h  | 2 +-
 include/linux/mtd/omap_gpmc.h   | 2 +-
 lib/hang.c  | 2 +-
 tools/atmel_pmecc_params.c  | 2 +-
 tools/atmelimage.c  | 2 +-
 23 files changed, 24 insertions(+), 23 deletions(-)

diff --git a/.mailmap b/.mailmap
index 5ea9f93..14b5ad7 100644
--- a/.mailmap
+++ b/.mailmap
@@ -10,6 +10,7 @@
 
 Allen Martin 
 Andreas Bießmann 
+Andreas Bießmann 
 Aneesh V 
 Dirk Behme 
 Fabio Estevam 
diff --git a/MAINTAINERS b/MAINTAINERS
index 27eb8e5..1db8243 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -73,7 +73,7 @@ F:arch/arm/cpu/armv7/socfpga/
 F: board/altera/socfpga/
 
 ARM ATMEL AT91
-M: Andreas Bießmann 
+M: Andreas Bießmann 
 S: Maintained
 T: git git://git.denx.de/u-boot-atmel.git
 F: arch/arm/mach-at91/
@@ -206,7 +206,7 @@ F:  arch/arm/cpu/armv8/zynqmp/
 F: arch/arm/include/asm/arch-zynqmp/
 
 AVR32
-M: Andreas Bießmann 
+M: Andreas Bießmann 
 S: Maintained
 T: git git://git.denx.de/u-boot-avr32.git
 F: arch/avr32/
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index cf10a53..4614d26 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015 Andreas Bießmann 
+ * Copyright (c) 2015 Andreas Bießmann 
  *
  * Copyright (c) 2011 The Chromium OS Authors.
  * (C) Copyright 2002-2006
diff --git a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c 
b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c
index 9b9800a..f139b91 100644
--- a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c
@@ -2,7 +2,7 @@
  * [partely copied from arch/arm/cpu/arm926ejs/at91/arm9260_devices.c]
  *
  * (C) Copyright 2011
- * Andreas Bießmann 
+ * Andreas Bießmann 
  *
  * (C) Copyright 2007-2008
  * Stelian Pop 
diff --git a/arch/arm/mach-at91/arm920t/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c
index b0f411b..926d1c9 100644
--- a/arch/arm/mach-at91/arm920t/cpu.c
+++ b/arch/arm/mach-at91/arm920t/cpu.c
@@ -2,7 +2,7 @@
  * [origin: arch/arm/cpu/arm926ejs/at91/cpu.c]
  *
  * (C) Copyright 2011
- * Andreas Bießmann, andreas.de...@googlemail.com
+ * Andreas Bießmann, andr...@biessmann.org
  * (C) Copyright 2010
  * Reinhard Meyer, reinhard.me...@emk-elektronik.de
  * (C) Copyright 2009
diff --git a/arch/avr32/cpu/mmc.c b/arch/avr32/cpu/mmc.c
index b7213e4..26ba3a2 100644
--- a/arch/avr32/cpu/mmc.c
+++ b/arch/avr32/cpu/mmc.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2004-2006 Atmel Corporation
- * Copyright (C) 2015 Andreas Bießmann 
+ * Copyright (C) 2015 Andreas Bießmann 
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c
index 1c26f1b..342b9e2 100644
--- a/arch/avr32/lib/bootm.c
+++ b/arch/avr32/lib/bootm.c
@@ -174,7 +174,7 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
/*
 * allow the PREP bootm subcommand, it is required for bootm to work
 *
-* TODO: Andreas Bießmann  refactor the
+* TODO: Andreas Bießmann  refactor the
 * do_bootm_linux() for avr32
 */
if (flag & BOOTM_STATE_OS_PREP)
diff --git a/arch/avr32/lib/dram_init.c b/arch/avr32/lib/dram_init.c
index 5078e77..79c2455 100644
--- a/arch/avr32/lib/dram_init.c
+++ b/arch/avr32/lib/dram_init.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 Andreas Bießmann 
+ * Copyright (C) 2015 Andreas Bießmann 
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
diff --git a/arch/powerpc/lib/stack.c b/arch/powerpc/lib/stack.c
index 1985f03..7eccfe0 100644
--- a/arch/powerpc/lib/stack.c
+++ b/arch/powerpc/lib/stack.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015 Andreas Bießmann 
+ * Copyright (c) 2015 Andreas Bießmann 
  *
  * Copyright (c) 2011 The Chromium OS Au

[U-Boot] [PATCH] mkimage: fix argument parsing on BSD systems

2016-04-30 Thread Andreas Bießmann
The getopt(3) optstring '-' is a GNU extension which is not available on BSD
systems like OS X.

Remove this dependency by implementing argument parsing in another way. This
will also change the lately introduced '-b' switch behaviour.

Signed-off-by: Andreas Bießmann 
---

 Makefile|  2 +-
 doc/mkimage.1   |  6 +++---
 tools/mkimage.c | 33 -
 3 files changed, 16 insertions(+), 25 deletions(-)

diff --git a/Makefile b/Makefile
index f03fec1..293fad0 100644
--- a/Makefile
+++ b/Makefile
@@ -898,7 +898,7 @@ ifdef CONFIG_SPL_LOAD_FIT
 MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
-   -b $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST)))
+   $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST)))
 else
 MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
diff --git a/doc/mkimage.1 b/doc/mkimage.1
index e0f210a..4b3a255 100644
--- a/doc/mkimage.1
+++ b/doc/mkimage.1
@@ -97,8 +97,8 @@ Set XIP (execute in place) flag.
 .B Create FIT image:
 
 .TP
-.BI "\-b
-Specifies that the following arguments are device tree binary files (.dtb).
+.BI "\-b [" "device tree file" "]
+Appends the device tree binary file (.dtb) to the FIT.
 
 .TP
 .BI "\-c [" "comment" "]"
@@ -211,7 +211,7 @@ automatic mode. No .its file is required.
 .B mkimage -f auto -A arm -O linux -T kernel -C none -a 43e0 -e 0 
 .br
 .B -c """Kernel 4.4 image for production devices""" -d vmlinuz 
-.B -b /path/to/rk3288-firefly.dtb /path/to/rk3288-jerry.dtb kernel.itb
+.B -b /path/to/rk3288-firefly.dtb -b /path/to/rk3288-jerry.dtb kernel.itb
 .fi
 
 .SH HOMEPAGE
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 2931783..b407aed 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -85,8 +85,8 @@ static void usage(const char *msg)
"  -x ==> set XIP (execute in place)\n",
params.cmdname);
fprintf(stderr,
-   "   %s [-D dtc_options] [-f fit-image.its|-f auto|-F] [-b 
] fit-image\n"
-   "is used with -f auto, and is a 
space-separated list of .dtb files\n",
+   "   %s [-D dtc_options] [-f fit-image.its|-f auto|-F] [-b 
 [-b ]] fit-image\n"
+   "file is used with -f auto, it may occour 
multiple times.\n",
params.cmdname);
fprintf(stderr,
"  -D => set all options for device tree compiler\n"
@@ -138,7 +138,7 @@ static void process_args(int argc, char **argv)
 
expecting = IH_TYPE_COUNT;  /* Unknown */
while ((opt = getopt(argc, argv,
-"-a:A:bcC:d:D:e:Ef:Fk:K:ln:O:rR:sT:vVx")) != -1) {
+"a:A:b:cC:d:D:e:Ef:Fk:K:ln:O:rR:sT:vVx")) != -1) {
switch (opt) {
case 'a':
params.addr = strtoull(optarg, &ptr, 16);
@@ -155,6 +155,12 @@ static void process_args(int argc, char **argv)
break;
case 'b':
expecting = IH_TYPE_FLATDT;
+   if (add_content(expecting, optarg)) {
+   fprintf(stderr,
+   "%s: Out of memory adding content '%s'",
+   params.cmdname, optarg);
+   exit(EXIT_FAILURE);
+   }
break;
case 'c':
params.comment = optarg;
@@ -243,29 +249,14 @@ static void process_args(int argc, char **argv)
case 'x':
params.xflag++;
break;
-   case 1:
-   if (expecting == type || optind == argc) {
-   params.imagefile = optarg;
-   expecting = IH_TYPE_INVALID;
-   } else if (expecting == IH_TYPE_INVALID) {
-   fprintf(stderr,
-   "%s: Unknown content type: use -b 
before device tree files",
-   params.cmdname);
-   exit(EXIT_FAILURE);
-   } else {
-   if (add_content(expecting, optarg)) {
-   fprintf(stderr,
-   "%s: Out of memory adding 
content '%s'",
-   params.cmdname, optarg);
-   exit(EXIT_FAILURE);
-   }
-   }
-   break;
default:
usage("Invalid option");
   

Re: [U-Boot] [PATCH] omap3: Reduce logic/overo SPL max image size

2016-04-30 Thread Derald D. Woods

On 04/28/2016 06:34 PM, Tom Rini wrote:

On Thu, Apr 28, 2016 at 05:55:17PM -0500, Adam Ford wrote:


I am hoping to look at this tomorrow at work. Any suggested toolchain you
recommend?

gcc-4.9.x fails (too large), gcc-5.3.x succeeds, gcc-6.x is also likely
fine but I haven't started using those SDKs I just made today.


Hi Tom,

Using gcc-5.3.0, for 'omap3_logic', I get the following:

---8<--
arm-cortexa8-linux-gnueabihf-ld.bfd: u-boot-spl section `.data' will not 
fit in region `.sram'

arm-cortexa8-linux-gnueabihf-ld.bfd: region `.sram' overflowed by 948 bytes
---8<--

I built the compiler today with crosstool-ng.

gcc version 5.3.0 (crosstool-NG crosstool-ng-1.22.0-134-ge1d494a)

What things could/should be removed, from the configuration, to avoid 
these kinds of things in the future?


I would expect that the default board configuration to be less 
sensitive, in general. I guess I want to know what is the right size for 
an OMAP3 with SPL enabled.


Changing compilers, just for this, can cause quite a ripple on projects 
and the products that are supported by them.



Derald Woods





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[U-Boot] [PATCH 1/2] ARM: exynos: Fix build error if SERIAL is disabled in SPL

2016-04-30 Thread Marek Vasut
If CONFIG_SPL_SERIAL_SUPPORT is not defined in include/configs/exynos5-common.h
the following error is produced during the build of the SPL:

arch/arm/mach-exynos/built-in.o: In function `do_lowlevel_init':
...u-boot/arch/arm/mach-exynos/lowlevel_init.c:221: undefined reference to 
`debug_uart_init'

Add additional condition to check if SPL build is in progress and
in that case check if CONFIG_SPL_SERIAL_SUPPORT is also set before
enabling the debug UART.

Signed-off-by: Marek Vasut 
Cc: Simon Glass 
Cc: Tom Rini 
---
 arch/arm/mach-exynos/lowlevel_init.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-exynos/lowlevel_init.c 
b/arch/arm/mach-exynos/lowlevel_init.c
index 6c39cb2..1e090fd 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -216,9 +216,12 @@ int do_lowlevel_init(void)
if (actions & DO_CLOCKS) {
system_clock_init();
 #ifdef CONFIG_DEBUG_UART
+#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)) || \
+!defined(CONFIG_SPL_BUILD)
exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
debug_uart_init();
 #endif
+#endif
mem_ctrl_init(actions & DO_MEM_RESET);
tzpc_init();
}
-- 
2.7.0

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[U-Boot] [PATCH] cmd: disk: Fix unused variable warning

2016-04-30 Thread Marek Vasut
If serial support is not compiled into U-Boot, which may be the case
for some SPL builds, the following warning will be generated in disk.c:

cmd/disk.c: In function 'common_diskboot':
cmd/disk.c:16:6: warning: variable 'dev' set but not used 
[-Wunused-but-set-variable]
  int dev, part;
  ^
The warning is a result of printf() calls being optimized away, and
thus the whole dev variable becomes indeed unused. Mark the variable
as __maybe_unused .

Signed-off-by: Marek Vasut 
Cc: Simon Glass 
Cc: Tom Rini 
---
 cmd/disk.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/cmd/disk.c b/cmd/disk.c
index 2fd1717..4c88554 100644
--- a/cmd/disk.c
+++ b/cmd/disk.c
@@ -13,7 +13,8 @@
 int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc,
char *const argv[])
 {
-   int dev, part;
+   __maybe_unused int dev;
+   int part;
ulong addr = CONFIG_SYS_LOAD_ADDR;
ulong cnt;
disk_partition_t info;
-- 
2.7.0

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[U-Boot] [PATCH 2/2] ARM: exynos: Disable serial support in SPL

2016-04-30 Thread Marek Vasut
The exynos5 platforms use DM in U-Boot and do not use DM in SPL. The serial
driver, serial_s5p.c, is DM-only. This is OK for U-Boot, but in SPL, this
will fail with the following compile error:

drivers/built-in.o: In function `get_current':
...u-boot/drivers/serial/serial.c:387: undefined reference to 
`default_serial_console'

This warning happens because common/console.c is compiled into U-Boot SPL
if CONFIG_SPL_SERIAL_SUPPORT . The common/console.c invokes serial_*()
functions and since exynos5 does not use DM in SPL, these functions come
from drivers/serial/serial.c . The serial_*() locate default serial port
by calling default_serial_console(), but because the serial_s5p.c is DM-only,
it does no longer define default_serial_console(). Thus the error.

Signed-off-by: Marek Vasut 
Cc: Simon Glass 
Cc: Tom Rini 
---
 include/configs/exynos5-common.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index b2ff4dd..6846ad6 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -60,7 +60,6 @@
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 
 /* specific .lds file */
-- 
2.7.0

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[U-Boot] pull request: u-boot-uniphier/master

2016-04-30 Thread Masahiro Yamada
Hi Tom,

Please pull some more fixes for v2016.05.


The following changes since commit fccdb287f5f5f2349d3ca1c7cdf972015417d46d:

  Merge branch 'master' of git://git.denx.de/u-boot-video (2016-04-28
13:15:52 -0400)

are available in the git repository at:


  git://git.denx.de/u-boot-uniphier.git master

for you to fetch changes up to bef4b024e9839ea7afe689b050fc95118eeb0b01:

  ARM: uniphier: move pin-mux code into pin_init function (2016-05-01
01:13:45 +0900)


Masahiro Yamada (4):
  ARM: uniphier: fix boot mode table of PH1-LD20
  ARM: uniphier: enable Peripherl clock to use UART in SPL
  ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20
  ARM: uniphier: move pin-mux code into pin_init function

 arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c |  2 +-
 arch/arm/mach-uniphier/early-clk/early-clk-ld20.c |  4 
 arch/arm/mach-uniphier/early-pinctrl/Makefile |  1 +
 arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c | 32

 arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c |  2 ++
 arch/arm/mach-uniphier/init.h |  7 +--
 arch/arm/mach-uniphier/init/init-ld20.c   |  2 ++
 arch/arm/mach-uniphier/init/init-sld3.c   |  5 ++---
 arch/arm/mach-uniphier/sbc/Makefile   |  4 ++--
 arch/arm/mach-uniphier/sbc/sbc-sld3.c | 17
-
 10 files changed, 47 insertions(+), 29 deletions(-)
 create mode 100644 arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c
 delete mode 100644 arch/arm/mach-uniphier/sbc/sbc-sld3.c


-- 
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Masahiro Yamada
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Re: [U-Boot] [PATCH 0/4] ARM: uniphier: some fixes for U-Boot v2016.05

2016-04-30 Thread Masahiro Yamada
2016-04-28 15:37 GMT+09:00 Masahiro Yamada :
>
>
> Masahiro Yamada (4):
>   ARM: uniphier: fix boot mode table of PH1-LD20
>   ARM: uniphier: enable Peripherl clock to use UART in SPL
>   ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20
>   ARM: uniphier: move pin-mux code into pin_init function

Series, applied to u-boot-uniphier/master.

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[U-Boot] [PATCH] phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXID

2016-04-30 Thread Andrea Merello
This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.

This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)

Signed-off-by: Andrea Merello 

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index e57c412..694a338 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -31,6 +31,22 @@ static int ar8035_config(struct phy_device *phydev)
regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100));

+   if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
+   (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
+   /* select debug reg 5 */
+   phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x5);
+   /* enable tx delay */
+   phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x0100);
+   }
+
+   if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
+   (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)) {
+   /* select debug reg 0 */
+   phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x0);
+   /* enable rx delay */
+   phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x8000);
+   }
+
phydev->supported = phydev->drv->features;

genphy_config_aneg(phydev);
--
2.1.4
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Re: [U-Boot] [Patch v2] fsl-layerscape: fdt: add IFC fixup if no IFC is avaliable in U-Boot

2016-04-30 Thread Mingkai Hu


> -Original Message-
> From: Gong Qianyu [mailto:qianyu.g...@nxp.com]
> Sent: Thursday, April 28, 2016 2:05 PM
> To: u-boot@lists.denx.de; york sun; o...@buserror.net
> Cc: Mingkai Hu; Qianyu Gong
> Subject: [Patch v2] fsl-layerscape: fdt: add IFC fixup if no IFC is avaliable 
> in
> U-Boot
> 
> IFC is considered as a required component in Layerscape platforms' Linux.
> But if IFC is not enabled in U-Boot on some boards, accessing IFC memory space
> would cause kernel call trace. So disable IFC node in such cases.
> 
> Signed-off-by: Gong Qianyu 
> ---
> V2:
>  - Revised the title and message.
>  - Used #ifndef CONFIG_FSL_IFC rather than #ifdef CONFIG_FSL_QSPI.
> 
>  arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-
> layerscape/fdt.c
> index 1e875c4..96dab56 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> @@ -98,4 +98,9 @@ void ft_cpu_setup(void *blob, bd_t *bd)  #ifdef
> CONFIG_SYS_DPAA_FMAN
>   fdt_fixup_fman_firmware(blob);
>  #endif
> +
> +#ifndef CONFIG_FSL_IFC
> + do_fixup_by_compat(blob, "fsl,ifc",
> +"status", "disabled", 8 + 1, 1);
> +#endif
>  }

Reviewed-by: Mingkai Hu 

Regards,
Mingkai

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Re: [U-Boot] [PATCH] armv8/ls1043ardb: fix the limitation of using 'cpld reset'

2016-04-30 Thread Mingkai Hu
Qianyu,

The reset command is used to boot from the location set in the hardware switch.

Regards,
Mingkai

> -Original Message-
> From: Gong Qianyu [mailto:qianyu.g...@nxp.com]
> Sent: Monday, April 25, 2016 4:39 PM
> To: u-boot@lists.denx.de; york sun; Mingkai Hu
> Cc: Shaohui Xie; Zhiqiang Hou; Wenbin Song; Qianyu Gong
> Subject: [PATCH] armv8/ls1043ardb: fix the limitation of using 'cpld reset'
> 
> The current 'cpld reset' will just write global_rst register but couldn't 
> switch
> to NOR boot if the board's switches are for NAND/SD boot. So need to write rcw
> source registers for NOR boot as well.
> 
> Signed-off-by: Gong Qianyu 
> ---
>  board/freescale/ls1043ardb/cpld.c | 26 --
> board/freescale/ls1043ardb/cpld.h |  1 +
>  2 files changed, 25 insertions(+), 2 deletions(-)
> 
> diff --git a/board/freescale/ls1043ardb/cpld.c
> b/board/freescale/ls1043ardb/cpld.c
> index 78c2824..c645283 100644
> --- a/board/freescale/ls1043ardb/cpld.c
> +++ b/board/freescale/ls1043ardb/cpld.c
> @@ -28,10 +28,18 @@ void cpld_write(unsigned int reg, u8 value)
>  /* Set the boot bank to the alternate bank */  void cpld_set_altbank(void)  {
> + u16 reg = CPLD_CFG_RCW_SRC_NOR;
>   u8 reg4 = CPLD_READ(soft_mux_on);
> + u8 reg5 = (u8)(reg >> 1);
> + u8 reg6 = (u8)(reg & 1);
>   u8 reg7 = CPLD_READ(vbank);
> 
> - CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL);
> + cpld_rev_bit(®5);
> +
> + CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
> +
> + CPLD_WRITE(cfg_rcw_src1, reg5);
> + CPLD_WRITE(cfg_rcw_src2, reg6);
> 
>   reg7 = (reg7 & ~CPLD_BANK_SEL_MASK) | CPLD_BANK_SEL_ALTBANK;
>   CPLD_WRITE(vbank, reg7);
> @@ -42,7 +50,21 @@ void cpld_set_altbank(void)
>  /* Set the boot bank to the default bank */  void cpld_set_defbank(void)  {
> - CPLD_WRITE(global_rst, 1);
> + u16 reg = CPLD_CFG_RCW_SRC_NOR;
> + u8 reg4 = CPLD_READ(soft_mux_on);
> + u8 reg5 = (u8)(reg >> 1);
> + u8 reg6 = (u8)(reg & 1);
> +
> + cpld_rev_bit(®5);
> +
> + CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
> +
> + CPLD_WRITE(cfg_rcw_src1, reg5);
> + CPLD_WRITE(cfg_rcw_src2, reg6);
> +
> + CPLD_WRITE(vbank, 0);
> +
> + CPLD_WRITE(system_rst, 1);
>  }
> 
>  void cpld_set_nand(void)
> diff --git a/board/freescale/ls1043ardb/cpld.h
> b/board/freescale/ls1043ardb/cpld.h
> index bd59c0e..cb175b5 100644
> --- a/board/freescale/ls1043ardb/cpld.h
> +++ b/board/freescale/ls1043ardb/cpld.h
> @@ -40,6 +40,7 @@ void cpld_rev_bit(unsigned char *value);
>  #define CPLD_SW_MUX_BANK_SEL 0x40
>  #define CPLD_BANK_SEL_MASK   0x07
>  #define CPLD_BANK_SEL_ALTBANK0x04
> +#define CPLD_CFG_RCW_SRC_NOR 0x025
>  #define CPLD_CFG_RCW_SRC_NAND0x106
>  #define CPLD_CFG_RCW_SRC_SD  0x040
>  #endif
> --
> 2.1.0.27.g96db324

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[U-Boot] [PATCH] arm: Treat arm946es as v5te

2016-04-30 Thread Marek Vasut
The arm946es is armv5te , so use -march=armv5te instead of armv4t.

Signed-off-by: Marek Vasut 
Cc: Albert Aribaud 
Cc: Tom Rini 
---
 arch/arm/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d516345..dbc81c0 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -11,7 +11,7 @@ endif
 arch-$(CONFIG_CPU_ARM720T) =-march=armv4
 arch-$(CONFIG_CPU_ARM920T) =-march=armv4t
 arch-$(CONFIG_CPU_ARM926EJS)   =-march=armv5te
-arch-$(CONFIG_CPU_ARM946ES)=-march=armv4
+arch-$(CONFIG_CPU_ARM946ES)=-march=armv5te
 arch-$(CONFIG_CPU_SA1100)  =-march=armv4
 arch-$(CONFIG_CPU_PXA) =
 arch-$(CONFIG_CPU_ARM1136) =-march=armv5
-- 
2.7.0

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[U-Boot] [PATCH] arm: mvebu: a38x: Weed out floating point use

2016-04-30 Thread Marek Vasut
For reason unknown, recently, the DDR init code writers are really fond
of hiding some small floating point operating deep in their creations.
This patch removes one from the Marvell A38x code.

Instead of returning size of chip as float from ddr3_get_device_size()
in GiB units, return it as int in MiB units. Since this would interfere
with the huge switch code in ddr3_calc_mem_cs_size(), rework the code
to match the change.

Before this patch, the cs_mem_size variable could have these values:
 ( { 16, 32 } x { 8, 16 } x { 0.01, 0.5, 1, 2, 4, 8 } ) / 8 =
   { 0.00, 0.001250, 0.002500, 0.005000, 0.062500, 0.125000,
 0.25, 0.50, 1.00, 2.00, 4.00, }
The switch code checked for a subset of the resulting RAM sizes, which
is in range 128 MiB ... 2048 MiB.

With this patch, the cs_mem_size variable can have these values:
 ( { 16, 32 } x { 8, 16 } x { 0, 512, 1024, 2048, 4096, 8192 } ) / 8 =
   { 0, 64, 128, 256, 512, 1024, 2048, 4096 }
To retain previous behavior, filter out 0 MiB (invalid size), 64 MiB
and 4096 MiB options.

Removing the floating point stuff also saves 1.5k from text segment:
  clearfog   :  spl/u-boot-spl:all -1592  spl/u-boot-spl:text -1592

Signed-off-by: Marek Vasut 
Cc: Dirk Eibach 
Cc: Stefan Roese 
---
 drivers/ddr/marvell/a38x/ddr3_init.c | 29 ++---
 1 file changed, 10 insertions(+), 19 deletions(-)

diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c 
b/drivers/ddr/marvell/a38x/ddr3_init.c
index ee05f57..55baad4 100644
--- a/drivers/ddr/marvell/a38x/ddr3_init.c
+++ b/drivers/ddr/marvell/a38x/ddr3_init.c
@@ -678,7 +678,7 @@ u32 ddr3_get_device_width(u32 cs)
return (device_width == 0) ? 8 : 16;
 }
 
-float ddr3_get_device_size(u32 cs)
+static int ddr3_get_device_size(u32 cs)
 {
u32 device_size_low, device_size_high, device_size;
u32 data, cs_low_offset, cs_high_offset;
@@ -695,15 +695,15 @@ float ddr3_get_device_size(u32 cs)
 
switch (device_size) {
case 0:
-   return 2;
+   return 2048;
case 2:
-   return 0.5;
+   return 512;
case 3:
-   return 1;
+   return 1024;
case 4:
-   return 4;
+   return 4096;
case 5:
-   return 8;
+   return 8192;
case 1:
default:
DEBUG_INIT_C("Error: Wrong device size of Cs: ", cs, 1);
@@ -711,13 +711,13 @@ float ddr3_get_device_size(u32 cs)
 * Small value will give wrong emem size in
 * ddr3_calc_mem_cs_size
 */
-   return 0.01;
+   return 0;
}
 }
 
 int ddr3_calc_mem_cs_size(u32 cs, u32 *cs_size)
 {
-   float cs_mem_size;
+   int cs_mem_size;
 
/* Calculate in GiB */
cs_mem_size = ((ddr3_get_bus_width() / ddr3_get_device_width(cs)) *
@@ -731,21 +731,12 @@ int ddr3_calc_mem_cs_size(u32 cs, u32 *cs_size)
 */
cs_mem_size *= DDR_CONTROLLER_BUS_WIDTH_MULTIPLIER;
 
-   if (cs_mem_size == 0.125) {
-   *cs_size = 128 << 20;
-   } else if (cs_mem_size == 0.25) {
-   *cs_size = 256 << 20;
-   } else if (cs_mem_size == 0.5) {
-   *cs_size = 512 << 20;
-   } else if (cs_mem_size == 1) {
-   *cs_size = 1 << 30;
-   } else if (cs_mem_size == 2) {
-   *cs_size = 2 << 30;
-   } else {
+   if (!cs_mem_size || (cs_mem_size == 64) || (cs_mem_size == 4096)) {
DEBUG_INIT_C("Error: Wrong Memory size of Cs: ", cs, 1);
return MV_BAD_VALUE;
}
 
+   *cs_size = cs_mem_size << 20;
return MV_OK;
 }
 
-- 
2.7.0

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Re: [U-Boot] Devicetree specification process

2016-04-30 Thread Grant Likely
On Sat, Apr 30, 2016 at 12:23 AM, Grant Likely  wrote:
> I'm pleased to announce the first *very early draft* of the new
> devicetree specification that I and several others have been working
> on since January. This document picks up where ePAPR left off in 2012.
> I'm announcing it now along with the new devicetree.org organization
> which will handle governance for the spec.
>
> We're still in the process of getting all the details sorted out (not
> everything on the website is accurate at the moment), but in the mean
> time you can look at the current state of the document. At the moment,
> it is little more than repackaging the ePAPR text. The next step will
> be pulling in the new core bindings that were never covered by ePAPR.
> You can look at a draft copy of the document here:
>
> https://github.com/kvekaria/devicetree-specification-released/blob/master/prerelease/DevicetreeSpecification-20160429-pre1.pdf

Oops, wrong link. This should be:

https://github.com/devicetree-org/devicetree-specification-released/blob/master/prerelease/devicetree-specification-v0.1-pre1-20160429.pdf

g.
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