Re: [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines

[Bin Meng]

Hi Simon,

On Sun, May 8, 2016 at 2:46 AM, Simon Glass  wrote:
> On 7 May 2016 at 08:46, Bin Meng  wrote:
>> Use u32 instead of unsigned long in the table write routines, as
>> other routines do.
>>
>> Signed-off-by: Bin Meng 
>>
>> ---
>>
>> Changes in v2:
>> - Update several more places to use u32 in acpi_table.c
>>
>>  arch/x86/include/asm/acpi_table.h |  4 ++--
>>  arch/x86/lib/acpi_table.c | 14 +++---
>>  2 files changed, 9 insertions(+), 9 deletions(-)
>
> Reviewed-by: Simon Glass 
>
> I guess this will be 32-bit even if U-Boot is built for 64-bit mode?
>

Yes, as all pointers are below 4G with our current implementation.

Regards,
Bin
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Re: [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail

[Bin Meng]

Hi Simon,

On Sun, May 8, 2016 at 2:45 AM, Simon Glass  wrote:
> Hi Bin,
>
> On 7 May 2016 at 08:46, Bin Meng  wrote:
>> This series introduces initial ACPI support for Intel BayTrail.
>>
>> Advanced Configuration and Power Interface (ACPI) aims to establish
>> industry-standard interfaces enabling OS-directed configuration, power
>> management, and thermal management of mobile, desktop, and server platforms.
>>
>> Linux can boot without ACPI with "acpi=off" command line parameter, but
>> with ACPI the kernel gains the capabilities to handle power management.
>> For Windows, ACPI is a must-have firmware feature since Windows Vista.
>> CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
>> U-Boot. This requires Intel ACPI compiler to be installed on your host to
>> compile ACPI DSDT table written in ASL format to AML format. You can get
>> the compiler via "apt-get install iasl" if you are on Ubuntu or download
>> the source from acpica website to compile one by yourself.
>>
>> Current ACPI support in U-Boot is not complete. More features will be added
>> in the future. The status as of today is:
>>
>>  * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
>>  * Support one static DSDT table only, compiled by Intel ACPI compiler.
>>  * Support S0/S5, reboot and shutdown from OS.
>>  * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
>>  * Support ACPI interrupts with SCI only.
>>
>> Features not supported so far (to make it a complete ACPI solution):
>>  * S3 (Suspend to RAM), S4 (Suspend to Disk).
>>  * Install and boot Ubuntu 14.04 (or above) from U-Boot with legacy 
>> interface.
>>  * Install and boot Windows 8.1/10 from U-Boot with legacy interface.
>>
>> Features that are optional:
>>  * ACPI global NVS support. We may need it to simplify ASL code logic if
>>utilizing NVS variables. Most likely we will need this sooner or later.
>>  * Dynamic AML bytecodes insertion at run-time. We may need this to support
>>SSDT table generation and DSDT fix up.
>>  * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
>>those legacy stuff into U-Boot. ACPI spec allows a system that does not
>>support SMI (a legacy-free system).
>>
>> So far ACPI is enabled on BayTrail based boards. Testing was done by booting
>> a pre-installed Ubuntu 14.04 from a SATA drive. Most devices seem to work
>> correctly and the board can respond a reboot/shutdown command from Ubuntu.
>
> It's great to see this - a big step forward!
>

Thanks for the review.

> A few general comments:
> - when building, the Intel ACPI tools output some non-warning info -
> can you quieten this down? It should not appear when 'make -s' is used

Sure.

> - is it OK to enable other tables along with ACPI? The docs seem to be
> silent on this point

I believe other tables are optional, as Linux can boot now. But maybe
there are some tables that Windows need. I will continue working on
this.

> - for me Ubuntu does not offer an option in the GUI to restart...I can
> do it from the command line. On my normal desktop I see a power button
> in the top right. I wonder why this doesn't work on minnowmax?
>

Maybe there are some issues with your installation? I can see a power
button in the top right on my minnowmax. I installed Ubuntun 14.04.4
64-bit OS (http://releases.ubuntu.com/14.04/ubuntu-14.04.4-desktop-amd64.iso)
with the original UEFI BIOS on the board.

[snip]

Regards,
Bin
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Re: [U-Boot] [PATCH 1/6] arm/arm64: Move barrier instructions into separate header

[André Przywara]

Hi Tom,

On 04/05/16 22:15, Andre Przywara wrote:
> Commit bfb33f0bc45b ("sunxi: mctl_mem_matches: Add missing memory
> barrier") broke compilation for the Pine64, as dram_helper.c now
> includes , which does not compile on arm64.

I just realized that the 2016.05 release is due anytime now.
Can we at least take this single patch still?
The current HEAD is broken for Pine64 (as buildman armv8 easily proves).
It worked before the above mentioned patch - so with 2016.05-rc3.
This patch fixes it. I ran "buildman arm armv8" on HEAD + this fix and
didn't spot any regressions (I don't have a softfp toolchain, though).

Taking this one should prevent the new board support for Pine64 to be
broken on release.

Cheers,
Andre.

> Fix this by moving all barrier instructions into a separate header
> file, which can easily be shared between arm and arm64.
> Also extend the inline assembly to take the "sy" argument, which is
> optional for ARMv7, but mandatory for v8.
> 
> This fixes compilation for 64-bit sunxi boards (Pine64).
> 
> Signed-off-by: Andre Przywara 
> ---
>  arch/arm/include/asm/armv7.h   | 21 +-
>  arch/arm/include/asm/barriers.h| 44 
> ++
>  arch/arm/mach-sunxi/dram_helpers.c |  2 +-
>  3 files changed, 46 insertions(+), 21 deletions(-)
>  create mode 100644 arch/arm/include/asm/barriers.h
> 
> diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
> index 30e7939..423fc70 100644
> --- a/arch/arm/include/asm/armv7.h
> +++ b/arch/arm/include/asm/armv7.h
> @@ -59,26 +59,7 @@
>  #ifndef __ASSEMBLY__
>  #include 
>  #include 
> -
> -/*
> - * CP15 Barrier instructions
> - * Please note that we have separate barrier instructions in ARMv7
> - * However, we use the CP15 based instructtions because we use
> - * -march=armv5 in U-Boot
> - */
> -#define CP15ISB  asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" 
> (0))
> -#define CP15DSB  asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" 
> (0))
> -#define CP15DMB  asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" 
> (0))
> -
> -#ifdef __ARM_ARCH_7A__
> -#define ISB  asm volatile ("isb" : : : "memory")
> -#define DSB  asm volatile ("dsb" : : : "memory")
> -#define DMB  asm volatile ("dmb" : : : "memory")
> -#else
> -#define ISB  CP15ISB
> -#define DSB  CP15DSB
> -#define DMB  CP15DMB
> -#endif
> +#include 
>  
>  /*
>   * Workaround for ARM errata # 798870
> diff --git a/arch/arm/include/asm/barriers.h b/arch/arm/include/asm/barriers.h
> new file mode 100644
> index 000..37870f9
> --- /dev/null
> +++ b/arch/arm/include/asm/barriers.h
> @@ -0,0 +1,44 @@
> +/*
> + * Copyright (C) 2016 ARM Ltd.
> + *
> + * ARM and ARM64 barrier instructions
> + * split from armv7.h to allow sharing between ARM and ARM64
> + *
> + * Original copyright in armv7.h was:
> + * (C) Copyright 2010 Texas Instruments,  Aneesh V 
> 
> + *
> + * Much of the original barrier code was contributed by:
> + *   Valentine Barshak 
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +#ifndef __BARRIERS_H__
> +#define __BARRIERS_H__
> +
> +#ifndef __ASSEMBLY__
> +
> +#ifndef CONFIG_ARM64
> +/*
> + * CP15 Barrier instructions
> + * Please note that we have separate barrier instructions in ARMv7
> + * However, we use the CP15 based instructtions because we use
> + * -march=armv5 in U-Boot
> + */
> +#define CP15ISB  asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" 
> (0))
> +#define CP15DSB  asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" 
> (0))
> +#define CP15DMB  asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" 
> (0))
> +
> +#endif /* !CONFIG_ARM64 */
> +
> +#if defined(__ARM_ARCH_7A__) || defined(CONFIG_ARM64)
> +#define ISB  asm volatile ("isb sy" : : : "memory")
> +#define DSB  asm volatile ("dsb sy" : : : "memory")
> +#define DMB  asm volatile ("dmb sy" : : : "memory")
> +#else
> +#define ISB  CP15ISB
> +#define DSB  CP15DSB
> +#define DMB  CP15DMB
> +#endif
> +
> +#endif   /* __ASSEMBLY__ */
> +#endif   /* __BARRIERS_H__ */
> diff --git a/arch/arm/mach-sunxi/dram_helpers.c 
> b/arch/arm/mach-sunxi/dram_helpers.c
> index e0c823a..20b430f 100644
> --- a/arch/arm/mach-sunxi/dram_helpers.c
> +++ b/arch/arm/mach-sunxi/dram_helpers.c
> @@ -7,7 +7,7 @@
>   */
>  
>  #include 
> -#include 
> +#include 
>  #include 
>  #include 
>  
> 

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Re: [U-Boot] [PATCH v2 1/2] serial: Introduce linflex uart support

[Eddy Petrișor]

Pe 7 mai 2016 5:56 p.m., "Bin Meng"  a scris:
>
> +Simon
>
> Hi Eddy,
>
> On Thu, Apr 28, 2016 at 6:07 AM, Eddy Petrișor 
wrote:
> > From: Stoica Cosmin-Stefan 
> >
> > The Linflex module is integrated on some NXP automotive SoCs part of
the former
> > Freescale portfolio, like S32V234, an SoC for Advanced Driver Assistance
> > Systems.
> >
> > Original-signed-off-by: Stoica Cosmin-Stefan <
cosminstefan.sto...@freescale.com>
> > Original-signed-off-by: Chircu Bogdan 
> > Original-signed-off-by: Depons Eric 
> > Original-signed-off-by: Eddy Petrișor 
> >
> > Signed-off-by: Eddy Petrișor 
> > ---
> >
> > Notes:
> > Changes in v2:
> > Added support for device model. Compatibility with non-DM code is
kept
> > for easier synchronization with the code on the vendor branch where
the
> > conversion to DM is not done for all boards.
>
> I see this is a NEW driver. Then you should only add DM support. We
> don't want to carry forward any legacy stuff.

Ok, I'll kill the legacy stuff and send version 3.

Eddy
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Re: [U-Boot] [PATCH v2 2/2] armv8: s32v234: Introduce basic support for s32v234evb

[Eddy Petrișor]

Pe 7 mai 2016 7:22 p.m., "Alexander Graf"  a scris:
>
>
> On Apr 28, 2016, at 12:07 AM, Eddy Petrișor  wrote:
>
> > From: Eddy Petrișor 
>
> […]
>
> > +#define CONFIG_CMD_ENV
> > +#define CONFIG_EXTRA_ENV_SETTINGS \
> > + "script=boot.scr\0" \
> > + "uimage=uImage\0" \
> > + "ramdisk=rootfs.uimg\0"\
> > + "console=ttyLF0\0" \
> > + "fdt_high=0x\0" \
> > + "initrd_high=0x\0" \
> > + "fdt_file=s32v234-evb.dtb\0" \
> > + "fdt_addr=0xC200\0" \
> > + "kernel_addr=0xC307FFC0\0" \
> > + "ramdisk_addr=0xC400\0" \
> > + "boot_fdt=try\0" \
> > + "ip_dyn=yes\0" \
> > + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
> > + "mmcpart=1\0" \
> > + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
> > + "update_sd_firmware_filename=u-boot.imx\0" \
> > + "update_sd_firmware=" \
> > + "if test ${ip_dyn} = yes; then " \
> > + "setenv get_cmd dhcp; " \
> > + "else " \
> > + "setenv get_cmd tftp; " \
> > + "fi; " \
> > + "if mmc dev ${mmcdev}; then "   \
> > + "if ${get_cmd} ${update_sd_firmware_filename};
then " \
> > + "setexpr fw_sz ${filesize} / 0x200; " \
> > + "setexpr fw_sz ${fw_sz} + 1; "  \
> > + "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
> > + "fi; "  \
> > + "fi\0" \
> > + "mmcargs=setenv bootargs console=${console},${baudrate} " \
> > + "root=${mmcroot}\0" \
> > + "loadbootscript=" \
> > + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
${script};\0" \
> > + "bootscript=echo Running bootscript from mmc ...; " \
> > + "source\0" \
> > + "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${kernel_addr}
${uimage}\0" \
> > + "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr}
${ramdisk}\0" \
> > + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr}
${fdt_file}\0" \
> > + "jtagboot=echo Booting using jtag...; " \
> > + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
> > + "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; "
\
> > + "run loaduimage; run loadramdisk; run loadfdt;"\
> > + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
> > + "mmcboot=echo Booting from mmc ...; " \
> > + "run mmcargs; " \
> > + "if test ${boot_fdt} = yes || test ${boot_fdt} = try;
then " \
> > + "if run loadfdt; then " \
> > + "bootm ${loadaddr} - ${fdt_addr}; " \
> > + "else " \
> > + "if test ${boot_fdt} = try; then " \
> > + "bootm; " \
> > + "else " \
> > + "echo WARN: Cannot load the DT; "
\
> > + "fi; " \
> > + "fi; " \
> > + "else " \
> > + "bootm; " \
> > + "fi;\0" \
> > + "netargs=setenv bootargs console=${console},${baudrate} " \
> > + "root=/dev/nfs " \
> > + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
> > + "netboot=echo Booting from net ...; " \
> > + "run netargs; " \
> > + "if test ${ip_dyn} = yes; then " \
> > + "setenv get_cmd dhcp; " \
> > + "else " \
> > + "setenv get_cmd tftp; " \
> > + "fi; " \
> > + "${get_cmd} ${uimage}; " \
> > + "if test ${boot_fdt} = yes || test ${boot_fdt} = try;
then " \
> > + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
> > + "bootm ${loadaddr} - ${fdt_addr}; " \
> > + "else " \
> > + "if test ${boot_fdt} = try; then " \
> > + "bootm; " \
> > + "else " \
> > + "echo WARN: Cannot load the DT; "
\
> > + "fi; " \
> > + "fi; " \
> > + "else " \
> > + "bootm; " \
> > + "fi;\0"
> > +
> > +#define CONFIG_BOOTCOMMAND \
> > +"mmc dev ${mmcdev}; if mmc rescan; then " \
> > +"if run loadbootscript; then " \
> > +"run bootscript; " \
> > +"else " \
> > +"if run loaduimage; then " \
> > +"run mmcboot; " \
> > +"else run netboot; " \
> > +"fi; " \
> > +"fi; " \
> > +"else run netboot; fi"
>
> Do you think you could move all of that to distro boot
(config_distro_defaults.h)?

Re: [U-Boot] [PATCH 59/60] ARM: tegra: unify+move tegra.h to mach-tegra/

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Most of arch/arm/include/asm/arch-tegra*/tegra.h is only used by code in
> arch/arm/mach-tegra, so move the header files there to avoid polluting the
> global include path. While moving, unify the per-SoC files into one using
> a couple of simple ifdefs; this avoids having so many headers.
>
> Many source files relied on  including the board config.h file,
> which in turned used to include tegra.h. Now that we've removed this, we
> need to include tegra.h from those files, hence this patch adds a few new
> include statements.
>
> A few defines from tegra.h are used by code outside mach-tegra. These are
> dealt with as follows:
>
> - A few drivers program clock registers directly and hence use
> NV_PA_CLK_RST_BASE to locate the registers. Move this into clk_rst.h; that
> makes sense since it defines the register layout and may as well define
> the address too. Later patches will hopefully clean up the Tegra clock
> driver and hide this information too.
>
> - Various other definitions are used by the board config headers and/or
> core U-Boot code (e.g. ARMv8 boot assembly). These can't include
> SoC-specific headers from . Hence, move those definitions into
> tegra-common.h so they're generally available.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/include/asm/arch-tegra/clk_rst.h  |  2 ++
>  arch/arm/include/asm/arch-tegra114/tegra.h | 25 --
>  arch/arm/include/asm/arch-tegra124/tegra.h | 27 ---
>  arch/arm/include/asm/arch-tegra20/tegra.h  | 20 ---
>  arch/arm/include/asm/arch-tegra210/tegra.h | 29 
>  arch/arm/include/asm/arch-tegra30/tegra.h  | 19 ---
>  arch/arm/mach-tegra/ap.c   |  2 +-
>  arch/arm/mach-tegra/board.c|  2 +-
>  arch/arm/mach-tegra/board2.c   |  2 +-
>  arch/arm/mach-tegra/clock.c|  2 +-
>  arch/arm/mach-tegra/cmd_enterrcm.c |  2 +-
>  arch/arm/mach-tegra/cpu.c  |  2 +-
>  arch/arm/mach-tegra/gpu.c  |  2 +-
>  arch/arm/mach-tegra/i2c_early.c|  1 +
>  arch/arm/mach-tegra/lowlevel_init.S|  3 +-
>  arch/arm/mach-tegra/pinmux-common.c|  1 +
>  arch/arm/mach-tegra/powergate.c|  2 +-
>  arch/arm/mach-tegra/spl.c  |  2 +-
>  arch/arm/mach-tegra/spl_uart.c |  1 +
>  .../{include/asm/arch-tegra => mach-tegra}/tegra.h | 39 
> ++
>  arch/arm/mach-tegra/tegra114/clock.c   |  2 +-
>  arch/arm/mach-tegra/tegra114/cpu.c |  2 +-
>  arch/arm/mach-tegra/tegra124/clock.c   |  2 +-
>  arch/arm/mach-tegra/tegra124/cpu.c |  2 +-
>  arch/arm/mach-tegra/tegra124/psci.c|  1 +
>  arch/arm/mach-tegra/tegra20/clock.c|  2 +-
>  arch/arm/mach-tegra/tegra20/cpu.c  |  2 +-
>  arch/arm/mach-tegra/tegra20/emc.c  |  2 +-
>  arch/arm/mach-tegra/tegra20/pmu.c  |  2 +-
>  arch/arm/mach-tegra/tegra20/sku.c  |  1 +
>  arch/arm/mach-tegra/tegra20/warmboot.c |  2 +-
>  arch/arm/mach-tegra/tegra20/warmboot_avp.c |  2 +-
>  arch/arm/mach-tegra/tegra210/clock.c   |  2 +-
>  arch/arm/mach-tegra/tegra210/xusb-padctl.c |  3 +-
>  arch/arm/mach-tegra/tegra30/clock.c|  2 +-
>  arch/arm/mach-tegra/tegra30/cpu.c  |  2 +-
>  drivers/gpio/tegra_gpio.c  |  2 ++
>  drivers/pci/pci_tegra.c|  1 +
>  include/configs/tegra-common.h | 14 ++--
>  39 files changed, 81 insertions(+), 152 deletions(-)
>  delete mode 100644 arch/arm/include/asm/arch-tegra114/tegra.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra124/tegra.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra20/tegra.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra210/tegra.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra30/tegra.h
>  rename arch/arm/{include/asm/arch-tegra => mach-tegra}/tegra.h (59%)


Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 60/60] ARM: tegra: move clock headers

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> These are the last files in arch/arm/include/asm/arch-tegra*. Move them
> into arch/arm/mach-tegra. The Tegra clock API currently exposes a lot of
> internal implementation details, which are unfortunately relied upon
> throughout the code base. Consequently, the headers are moved to 
> rather than being hidden out of the global include path. This needs
> cleanup/refactoring, especially since the current state cannot support the
> next chip at all. However, this cleanup series is already rather long, and
> the work to cleanup the clock API rather involved, so I'll do that later.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/ap.c   |  2 +-
>  arch/arm/mach-tegra/board.c|  2 +-
>  arch/arm/mach-tegra/board2.c   |  4 ++--
>  arch/arm/mach-tegra/clock.c|  4 ++--
>  arch/arm/mach-tegra/cpu.c  |  4 ++--
>  .../asm/arch-tegra => mach-tegra/include/mach}/clk_rst.h   |  6 +++---
>  .../clock.h => mach-tegra/include/mach/clock_common.h} |  8 
>  arch/arm/mach-tegra/include/mach/powergate.h   |  2 +-
>  arch/arm/mach-tegra/spl.c  |  2 +-
>  arch/arm/mach-tegra/spl_uart.c |  2 +-
>  arch/arm/mach-tegra/tegra114/clock.c   |  4 ++--
>  arch/arm/mach-tegra/tegra114/cpu.c |  4 ++--
>  .../tegra114/include/mach}/clock-tables.h  |  8 
>  .../arch-tegra114 => mach-tegra/tegra114/include/mach}/clock.h | 10 
> +-
>  arch/arm/mach-tegra/tegra114/pllx.c|  2 +-
>  arch/arm/mach-tegra/tegra124/clock.c   |  4 ++--
>  arch/arm/mach-tegra/tegra124/cpu.c |  4 ++--
>  .../tegra124/include/mach}/clock-tables.h  |  8 
>  .../arch-tegra124 => mach-tegra/tegra124/include/mach}/clock.h | 10 
> +-
>  arch/arm/mach-tegra/tegra124/pllx.c|  2 +-
>  arch/arm/mach-tegra/tegra20/clock.c|  4 ++--
>  arch/arm/mach-tegra/tegra20/emc.c  |  2 +-
>  .../tegra20/include/mach}/clock-tables.h   |  8 
>  .../arch-tegra20 => mach-tegra/tegra20/include/mach}/clock.h   |  5 +++--
>  arch/arm/mach-tegra/tegra20/pllx.c |  2 +-
>  arch/arm/mach-tegra/tegra20/warmboot.c |  4 ++--
>  arch/arm/mach-tegra/tegra20/warmboot_avp.c |  4 ++--
>  arch/arm/mach-tegra/tegra210/clock.c   |  4 ++--
>  .../tegra210/include/mach}/clock-tables.h  |  8 
>  .../arch-tegra210 => mach-tegra/tegra210/include/mach}/clock.h |  8 
>  arch/arm/mach-tegra/tegra210/pllx.c|  2 +-
>  arch/arm/mach-tegra/tegra210/xusb-padctl.c |  8 +++-
>  arch/arm/mach-tegra/tegra30/clock.c|  4 ++--
>  arch/arm/mach-tegra/tegra30/cpu.c  |  4 ++--
>  .../tegra30/include/mach}/clock-tables.h   |  8 
>  .../arch-tegra30 => mach-tegra/tegra30/include/mach}/clock.h   | 10 
> +-
>  arch/arm/mach-tegra/tegra30/pllx.c |  2 +-
>  arch/arm/mach-tegra/xusb-padctl-common.c   |  6 ++
>  board/nvidia/jetson-tk1/jetson-tk1.c   |  3 +--
>  board/nvidia/nyan-big/nyan-big.c   |  2 +-
>  drivers/i2c/tegra_i2c.c|  4 ++--
>  drivers/input/tegra-kbc.c  |  2 +-
>  drivers/mmc/tegra_mmc.c|  4 ++--
>  drivers/mtd/nand/tegra_nand.c  |  4 ++--
>  drivers/pci/pci_tegra.c|  5 ++---
>  drivers/pwm/tegra_pwm.c|  2 +-
>  drivers/spi/tegra114_spi.c |  6 +++---
>  drivers/spi/tegra20_sflash.c   |  4 ++--
>  drivers/spi/tegra20_slink.c|  6 +++---
>  drivers/spi/tegra210_qspi.c|  6 +++---
>  drivers/usb/host/ehci-tegra.c  |  5 ++---
>  drivers/video/tegra.c  |  2 +-
>  drivers/video/tegra124/display.c   |  2 +-
>  drivers/video/tegra124/sor.c   |  2 +-
>  54 files changed, 119 insertions(+), 125 deletions(-)
>  rename 

Re: [U-Boot] [PATCH 58/60] ARM: tegra: clean up board include statements

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Tegra board files currently include many headers they don't need. Remove
> the unused include statements.
>
> Signed-off-by: Stephen Warren 
> ---
>  board/avionic-design/common/tamonten.c  | 5 -
>  board/compal/paz00/paz00.c  | 3 ---
>  board/compulab/trimslice/trimslice.c| 4 
>  board/nvidia/harmony/harmony.c  | 5 -
>  board/nvidia/jetson-tk1/jetson-tk1.c| 1 -
>  board/nvidia/nyan-big/nyan-big.c| 3 ---
>  board/nvidia/seaboard/seaboard.c| 3 ---
>  board/nvidia/venice2/as3722_init.c  | 1 -
>  board/nvidia/whistler/whistler.c| 3 ---
>  board/toradex/apalis_t30/apalis_t30.c   | 1 -
>  board/toradex/colibri_t20/colibri_t20.c | 2 --
>  board/toradex/colibri_t30/colibri_t30.c | 2 --
>  drivers/gpio/tegra_gpio.c   | 1 -
>  13 files changed, 34 deletions(-)


Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 00/60] ARM: tegra: cleanup part 1

[Simon Glass]

Hi Stephen,

On 19 April 2016 at 14:58, Stephen Warren  wrote:
> From: Stephen Warren 
>
> This series cleans up Tegra code:
> - Removes unused definitions.
> - Unifies duplicate definitions and code.
> - Moves Tegra headers from arch/arm/include to arch/arm/mach-tegra so
> all Tegra files are located together. Headers for Tegra-specific APIs
> (intended e.g. for public/driver use) are placed into , whereas
> headers intended only for use by code in arch/arm/mach-tegra are placed
> into .
> - Hides as much internal Tegra information as possible, to reduce the
> size of the "API" provided to Tegra boards. This will help refactoring
> that "API" later; the next chip is quite different and various parts of
> this API (e.g. clock, reset, GPIO, ...) will need alternative
> implementations. This will hopefully be a bit easier after this series.
> - Cleans up the set of functions the core Tegra "board" support calls and
> which are implemented by Tegra board files.
> - Replaces funcmux with pinmux functions so that pinmux is set up in as
> much the same way across all Tegra SoCs as possible.
> - Various other cleanup.
> - Removes almost 3000 lines!
>
> Future changes/series will likely/hopefully:
> - Refactor C files in arch/arm/mach-tegra to allow Makefiles to easily
> decide which parts to pull in for each chip, and avoid a mess of ifdefs
> in the C files when adding support for the next chip.
> - Convert Tegra to standard clock/reset APIs, since the next chipd will
> use a different implementation, yet we need them to share the same API
> so that drivers don't need conditional code.
> - Add some new drivers for the next chip.

I've reviewed the reset of the patches. It is a huge improvement in
the tegra code. It's more consistent and fixes up some of the weird
code placement and muddy concepts.

If there are any patches I am missed, let me know.

My main comment is that the pinctrl stuff should go in a driver. There
is not way we should be inventing a new pinmux API for tegra now that
we have driver model pinctrl :-)

I am happy to help with this if you like.

Regards,
Simon
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Re: [U-Boot] [PATCH 57/60] ARM: tegra: don't access Boot Info Table from board code

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> The only use of the BIT was to print a message indicating whether the
> system booted via cold boot or USB ReCovery Mode (RCM). If that is worth
> doing for some boards, it's worth doing for all, so make the core Tegra
> code do that.
>
> This will allow the definitions related to the BIT to be removed from
> global visibility, and isolated into Tegra-specific code. This also avoids
> the need to implement arch_misc_init() for a couple of boards.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/board2.c|  4 
>  board/toradex/apalis_t30/apalis_t30.c   | 10 --
>  board/toradex/colibri_t20/colibri_t20.c |  5 -
>  board/toradex/colibri_t30/colibri_t30.c | 10 --
>  include/configs/apalis_t30.h|  2 --
>  include/configs/colibri_t30.h   |  2 --
>  6 files changed, 4 insertions(+), 29 deletions(-)


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Re: [U-Boot] [PATCH 54/60] video: tegra: move pinmux setup to board files

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Remove funcmux calls from the Tegra20 video driver. Knowledge of pinmux
> setup must come from either board files or DT; it should not be embedded
> into board-agnostic driver code. The DT pinmux bindings do not allow
> drivers to derive funcmux-style information, since the DT bindings are
> pin-based whereas funcmux is controller-based, so there's no good way to
> call the existing funcmux APIs from drivers. Converting drivers to use a
> new (as yet non-existent in U-Boot) API that pulls pinmux information from
> DT isn't useful for Tegra, since Tegra's DT files don't contain any
> per-device pinmux tables, so this would simply be extra code that has no
> effect; doesn't actually set up the pinmux. We are left with moving the
> pinmux setup functionality into board files. In theory the board files
> could be converted later to use DT, but that would be a separate change.
>
> Signed-off-by: Stephen Warren 
> ---
>  board/avionic-design/common/tamonten.c  | 1 +
>  board/compal/paz00/paz00.c  | 3 +++
>  board/nvidia/harmony/harmony.c  | 1 +
>  board/nvidia/seaboard/seaboard.c| 1 +
>  board/toradex/colibri_t20/colibri_t20.c | 1 +
>  drivers/video/tegra.c   | 3 ---
>  6 files changed, 7 insertions(+), 3 deletions(-)

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Re: [U-Boot] [PATCH 56/60] ARM: tegra: remove funcmux API

[Simon Glass]

Hi Stephen,

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Replace all usage of funcmux APIs with the pinmux functions previously
> added to replace then. Delete the funcmux implementation since it's no
> longer used. This merges all pinmux-related logic into the pinmux code
> and avoids use of the funcmux "IOCTL" functions, which compile in
> support for all possible pinmux options even when they won't ever be
> used by a particular build.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/include/asm/arch-tegra/funcmux.h|  29 ---
>  arch/arm/include/asm/arch-tegra114/funcmux.h |  21 --
>  arch/arm/include/asm/arch-tegra124/funcmux.h |  23 ---
>  arch/arm/include/asm/arch-tegra20/funcmux.h  |  52 -
>  arch/arm/include/asm/arch-tegra210/funcmux.h |  23 ---
>  arch/arm/include/asm/arch-tegra30/funcmux.h  |  21 --
>  arch/arm/mach-tegra/board.c  |   1 -
>  arch/arm/mach-tegra/board2.c |   1 -
>  arch/arm/mach-tegra/tegra114/Makefile|   2 +-
>  arch/arm/mach-tegra/tegra114/funcmux.c   |  57 -
>  arch/arm/mach-tegra/tegra124/Makefile|   1 -
>  arch/arm/mach-tegra/tegra124/funcmux.c   |  71 ---
>  arch/arm/mach-tegra/tegra20/Makefile |   2 +-
>  arch/arm/mach-tegra/tegra20/funcmux.c| 299 
> ---
>  arch/arm/mach-tegra/tegra210/Makefile|   1 -
>  arch/arm/mach-tegra/tegra210/funcmux.c   |  39 
>  arch/arm/mach-tegra/tegra30/Makefile |   2 +-
>  arch/arm/mach-tegra/tegra30/funcmux.c|  51 -
>  board/avionic-design/common/tamonten.c   |  11 +-
>  board/compal/paz00/paz00.c   |   4 +-
>  board/compulab/trimslice/trimslice.c |   5 +-
>  board/nvidia/harmony/harmony.c   |  11 +-
>  board/nvidia/seaboard/seaboard.c |  17 +-
>  board/nvidia/whistler/whistler.c |   7 +-
>  board/toradex/colibri_t20/colibri_t20.c  |  14 +-
>  drivers/mtd/nand/tegra_nand.c|   3 +-
>  26 files changed, 34 insertions(+), 734 deletions(-)
>  delete mode 100644 arch/arm/include/asm/arch-tegra/funcmux.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra114/funcmux.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra124/funcmux.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra20/funcmux.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra210/funcmux.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra30/funcmux.h
>  delete mode 100644 arch/arm/mach-tegra/tegra114/funcmux.c
>  delete mode 100644 arch/arm/mach-tegra/tegra124/funcmux.c
>  delete mode 100644 arch/arm/mach-tegra/tegra20/funcmux.c
>  delete mode 100644 arch/arm/mach-tegra/tegra210/funcmux.c
>  delete mode 100644 arch/arm/mach-tegra/tegra30/funcmux.c

The concept is fine, but this should use a pinctrl drive.r

- Simon
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Re: [U-Boot] [PATCH 53/60] tegra: keyboard: move pinmux setup to board files

[Simon Glass]

Hi Stephen.

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Remove funcmux calls from the Tegra keyboard driver. Knowledge of pinmux
> setup must come from either board files or DT; it should not be embedded
> into board-agnostic driver code. The DT pinmux bindings do not allow
> drivers to derive funcmux-style information, since the DT bindings are
> pin-based whereas funcmux is controller-based, so there's no good way to
> call the existing funcmux APIs from drivers. Converting drivers to use a
> new (as yet non-existent in U-Boot) API that pulls pinmux information from
> DT isn't useful for Tegra, since Tegra's DT files don't contain any
> per-device pinmux tables, so this would simply be extra code that has no
> effect; doesn't actually set up the pinmux. We are left with moving the
> pinmux setup functionality into board files. In theory the board files
> could be converted later to use DT, but that would be a separate change.
>
> Signed-off-by: Stephen Warren 
> ---
>  board/nvidia/seaboard/seaboard.c | 1 +
>  drivers/input/tegra-kbc.c| 3 ---
>  2 files changed, 1 insertion(+), 3 deletions(-)

Reviewed-by: Simon Glass 

With a pinctrl driver this can happen automatically, or you can load
your single table in the probe() method.

Regards,
Simon
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Re: [U-Boot] [PATCH 49/60] ARM: tegra: convert boards to new hooks

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Implementations of the following functions are converted to use the new
> standardized hooks: gpio_early_init, gpio_early_init_uart, pinmux_init,
> board_init_uart_f. This simplifies the core board files.
>
> SPL UART configuration is moved out of config headers and into board code.
> This removes logic from the board configuration files.
>
> The now-unused board_init_uart_f() implementation is deleted, simplifying
> the core board files and removing code that's hard to port to future SoCs.
>
> Whitespace was removed from tegra_board_early_init_f() to save space and
> be consistent between boards.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/Makefile  |   1 +
>  arch/arm/mach-tegra/board.c   | 114 
> --
>  arch/arm/mach-tegra/board2.c  |  15 
>  arch/arm/mach-tegra/cpu.h |   2 -
>  arch/arm/mach-tegra/include/mach/board.h  |   7 --
>  arch/arm/mach-tegra/spl.c |   5 --
>  board/avionic-design/common/tamonten-ng.c |  22 --
>  board/avionic-design/common/tamonten.c|  12 +++-
>  board/compal/paz00/paz00.c|   8 +++
>  board/compulab/trimslice/trimslice.c  |  10 ++-
>  board/nvidia/cardhu/cardhu.c  |  18 ++---
>  board/nvidia/dalmore/dalmore.c|  21 +++---
>  board/nvidia/e2220-1170/e2220-1170.c  |  10 +--
>  board/nvidia/harmony/harmony.c|   8 +++
>  board/nvidia/jetson-tk1/jetson-tk1.c  |  21 +++---
>  board/nvidia/nyan-big/nyan-big.c  |  14 ++--
>  board/nvidia/p2371-/p2371-.c  |  10 +--
>  board/nvidia/p2371-2180/p2371-2180.c  |  10 +--
>  board/nvidia/p2571/p2571.c|  10 +--
>  board/nvidia/seaboard/seaboard.c  |  12 ++--
>  board/nvidia/venice2/venice2.c|  14 ++--
>  board/nvidia/whistler/whistler.c  |  10 ++-
>  board/toradex/apalis_t30/apalis_t30.c |  20 +++---
>  board/toradex/colibri_t20/colibri_t20.c   |   8 +++
>  board/toradex/colibri_t30/colibri_t30.c   |  14 ++--
>  include/configs/apalis_t30.h  |   5 +-
>  include/configs/cardhu.h  |   6 +-
>  include/configs/colibri_t20.h |   6 +-
>  include/configs/colibri_t30.h |   5 +-
>  include/configs/dalmore.h |   6 +-
>  include/configs/e2220-1170.h  |   5 +-
>  include/configs/harmony.h |  12 +---
>  include/configs/jetson-tk1.h  |   6 +-
>  include/configs/nyan-big.h|   6 +-
>  include/configs/p2371-.h  |   5 +-
>  include/configs/p2371-2180.h  |   5 +-
>  include/configs/p2571.h   |   6 +-
>  include/configs/paz00.h   |   6 +-
>  include/configs/seaboard.h|   4 --
>  include/configs/tec-ng.h  |   5 +-
>  include/configs/tec.h |   6 +-
>  include/configs/trimslice.h   |   7 +-
>  include/configs/venice2.h |   6 +-
>  include/configs/whistler.h|   7 +-
>  44 files changed, 174 insertions(+), 336 deletions(-)


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Re: [U-Boot] [PATCH 52/60] ARM: tegra: convert pin_mux_*() to new hooks

[Simon Glass]

Hi Stephen,

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Implementations of the following functions are converted to use the new
> standardized hooks: pin_mux_usb, pin_mux_spi, pin_mux_nand, pin_mux_mmc,
> pin_mux_display. This simplifies the core board files.
>
> For some boards, function sort order was changed so that functions appear
> in they order they're called.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/board2.c  |  36 --
>  arch/arm/mach-tegra/include/mach/board.h  |  13 
>  board/avionic-design/common/tamonten-ng.c |  11 ++-
>  board/avionic-design/common/tamonten.c|   9 ---
>  board/compal/paz00/paz00.c|  25 +--
>  board/compulab/trimslice/trimslice.c  |  17 +
>  board/nvidia/cardhu/cardhu.c  |  18 ++---
>  board/nvidia/dalmore/dalmore.c|  18 ++---
>  board/nvidia/e2220-1170/e2220-1170.c  |  26 +++
>  board/nvidia/harmony/harmony.c|  33 +++--
>  board/nvidia/p2371-/p2371-.c  |  26 +++
>  board/nvidia/p2371-2180/p2371-2180.c  |  26 +++
>  board/nvidia/p2571/p2571.c|  26 +++
>  board/nvidia/seaboard/seaboard.c  |  18 ++---
>  board/nvidia/whistler/whistler.c  |  57 +++
>  board/toradex/colibri_t20/colibri_t20.c   | 114 
> +++---
>  board/toradex/colibri_t30/colibri_t30.c   |   8 +--
>  17 files changed, 161 insertions(+), 320 deletions(-)

This should use a pinmux driver.

- Simon
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Re: [U-Boot] [PATCH 50/60] ARM: tegra: remove unused includes

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/board2.c | 8 
>  1 file changed, 8 deletions(-)

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Re: [U-Boot] [PATCH 51/60] ARM: tegra: move SPL-specific GPIO device to spl.c

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> SPL-specific code generally belongs in an SPL-specific file. This allows
> an ifdef to be removed too:-)
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/board2.c | 8 
>  arch/arm/mach-tegra/spl.c| 6 ++
>  2 files changed, 6 insertions(+), 8 deletions(-)


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Re: [U-Boot] [PATCH 46/60] ARM: tegra: add pinmux APIs to replace funcmux

[Simon Glass]

Hi Stephen.

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> The existing funcmux APIs have the disadvantage that clients call a single
> monolithic/IOCTL-style function which performs different operations based
> on its parameter. All branches of that function are always compiled into
> the binary even when they're not used.
>
> Another disadvantage is that funcmux is pinmux functionality, but
> implemented outside the Tegra pinmux driver.
>
> This patch creates a separate function per operation, and implements them
> as part of the pinmux driver. Later patches will convert callers to these
> functions and eventually remove the funcmux files.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/tegra114/include/mach/pinmux.h |   2 +
>  arch/arm/mach-tegra/tegra114/pinmux.c  |  18 ++
>  arch/arm/mach-tegra/tegra124/include/mach/pinmux.h |   3 +
>  arch/arm/mach-tegra/tegra124/pinmux.c  |  30 +++
>  arch/arm/mach-tegra/tegra20/include/mach/pinmux.h  |  22 +++
>  arch/arm/mach-tegra/tegra20/pinmux.c   | 208 
> +
>  arch/arm/mach-tegra/tegra30/include/mach/pinmux.h  |   2 +
>  arch/arm/mach-tegra/tegra30/pinmux.c   |  12 ++
>  8 files changed, 297 insertions(+)

This should go in a pinctrl driver for each SoC.

Regards,
Simon
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Re: [U-Boot] [PATCH 45/60] ARM: tegra: move custom pinmux.h to

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Machine-specific headers should be in this location. Eventually, we'll
> move all headers from arch/arm/include to arch/arm/mach-tegra/include,
> or find a way to delete them.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/board2.c  |  1 -
>  arch/arm/mach-tegra/cpu.c |  1 -
>  .../pinmux.h => mach-tegra/include/mach/pinmux_common.h}  | 11 
> +--
>  arch/arm/mach-tegra/pinmux-common.c   |  4 ++--
>  arch/arm/mach-tegra/spl.c |  1 -
>  arch/arm/mach-tegra/tegra114/cpu.c|  2 +-
>  arch/arm/mach-tegra/tegra114/funcmux.c|  4 ++--
>  .../tegra114/include/mach}/pinmux.h   |  8 
>  arch/arm/mach-tegra/tegra114/pinmux.c |  4 ++--
>  arch/arm/mach-tegra/tegra124/cpu.c|  2 +-
>  arch/arm/mach-tegra/tegra124/funcmux.c|  4 ++--
>  .../tegra124/include/mach}/pinmux.h   |  8 
>  arch/arm/mach-tegra/tegra124/pinmux.c |  4 ++--
>  arch/arm/mach-tegra/tegra20/funcmux.c |  3 ++-
>  .../arch-tegra20 => mach-tegra/tegra20/include/mach}/pinmux.h | 10 +-
>  arch/arm/mach-tegra/tegra20/pinmux.c  |  3 ++-
>  arch/arm/mach-tegra/tegra20/warmboot.c|  1 -
>  arch/arm/mach-tegra/tegra20/warmboot_avp.c|  1 -
>  arch/arm/mach-tegra/tegra210/funcmux.c|  3 +--
>  .../tegra210/include/mach}/pinmux.h   |  8 
>  arch/arm/mach-tegra/tegra210/pinmux.c |  4 ++--
>  arch/arm/mach-tegra/tegra30/funcmux.c |  4 ++--
>  .../arch-tegra30 => mach-tegra/tegra30/include/mach}/pinmux.h |  8 
>  arch/arm/mach-tegra/tegra30/pinmux.c  |  4 ++--
>  board/avionic-design/common/tamonten-ng.c |  2 +-
>  board/avionic-design/common/tamonten.c|  2 +-
>  board/compal/paz00/paz00.c|  4 ++--
>  board/compulab/trimslice/trimslice.c  |  4 ++--
>  board/nvidia/cardhu/cardhu.c  |  2 +-
>  board/nvidia/dalmore/dalmore.c|  2 +-
>  board/nvidia/e2220-1170/e2220-1170.c  |  2 +-
>  board/nvidia/harmony/harmony.c|  4 ++--
>  board/nvidia/jetson-tk1/jetson-tk1.c  |  2 +-
>  board/nvidia/nyan-big/nyan-big.c  |  2 +-
>  board/nvidia/p2371-/p2371-.c  |  2 +-
>  board/nvidia/p2371-2180/p2371-2180.c  |  2 +-
>  board/nvidia/p2571/p2571.c|  2 +-
>  board/nvidia/seaboard/seaboard.c  |  2 +-
>  board/nvidia/venice2/venice2.c|  2 +-
>  board/nvidia/whistler/whistler.c  |  4 ++--
>  board/toradex/apalis_t30/apalis_t30.c |  2 +-
>  board/toradex/colibri_t20/colibri_t20.c   |  2 +-
>  board/toradex/colibri_t30/colibri_t30.c   |  2 +-
>  drivers/i2c/tegra_i2c.c   |  1 -
>  drivers/spi/tegra20_sflash.c  |  4 ++--
>  drivers/video/tegra.c |  2 +-
>  46 files changed, 75 insertions(+), 81 deletions(-)
>  rename arch/arm/{include/asm/arch-tegra/pinmux.h => 
> mach-tegra/include/mach/pinmux_common.h} (97%)
>  rename arch/arm/{include/asm/arch-tegra114 => 
> mach-tegra/tegra114/include/mach}/pinmux.h (98%)
>  rename arch/arm/{include/asm/arch-tegra124 => 
> mach-tegra/tegra124/include/mach}/pinmux.h (98%)
>  rename arch/arm/{include/asm/arch-tegra20 => 
> mach-tegra/tegra20/include/mach}/pinmux.h (96%)
>  rename arch/arm/{include/asm/arch-tegra210 => 
> mach-tegra/tegra210/include/mach}/pinmux.h (98%)
>  rename arch/arm/{include/asm/arch-tegra30 => 
> mach-tegra/tegra30/include/mach}/pinmux.h (98%)


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Re: [U-Boot] [PATCH 47/60] ARM: tegra: provide API for SPL code to init UART

[Simon Glass]

Hi Stephen,

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Currently, SPL console initialization on Tegra suffers from two problems:
>
> 1) It's a monolithic function that knows about all possibilities using
> tables and ifdefs set by board config.h, and contained in core files that
> are always built into U-Boot. Some of the code can't be ported to future
> SoCs since the clock APIs will be different. Equally, future SoCs don't
> need the code since earlier boot FW will always initialized the UART.
>
> 2) It's unnecessarily invoked twice, once by SPL and once by the main
> U-Boot binary.
>
> This patch adds simpler APIs to initialize the UART from SPL. This code
> can be omitted from non-SPL builds.
>
> A future patch will add the code to the Makefile when board files are
> converted. Adding it now would cause duplicate symbols for the UART
> device itself which will cause the link to fail. Even if that were
> resolved by changing the symbol name, duplicate UART devices would be
> registered, which would likely cause runtime problems.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/include/mach/spl_uart.h | 20 +++
>  arch/arm/mach-tegra/spl_uart.c  | 39 
> +
>  2 files changed, 59 insertions(+)
>  create mode 100644 arch/arm/mach-tegra/include/mach/spl_uart.h
>  create mode 100644 arch/arm/mach-tegra/spl_uart.c

Reviewed-by: Simon Glass 

One thought below.

>
> diff --git a/arch/arm/mach-tegra/include/mach/spl_uart.h 
> b/arch/arm/mach-tegra/include/mach/spl_uart.h
> new file mode 100644
> index ..28b14acce93b
> --- /dev/null
> +++ b/arch/arm/mach-tegra/include/mach/spl_uart.h
> @@ -0,0 +1,20 @@
> +/*
> + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
> + *
> + * SPDX-License-Identifier: GPL-2.0
> + */
> +
> +#ifndef _MACH_SPL_UART_H
> +#define _MACH_SPL_UART_H
> +
> +enum tegra_spl_uart {
> +   TEGRA_SPL_UART_A,
> +   TEGRA_SPL_UART_B,
> +   TEGRA_SPL_UART_C,
> +   TEGRA_SPL_UART_D,
> +   TEGRA_SPL_UART_E,
> +};
> +
> +void tegra_spl_setup_uart(enum tegra_spl_uart uart_id);
> +
> +#endif
> diff --git a/arch/arm/mach-tegra/spl_uart.c b/arch/arm/mach-tegra/spl_uart.c
> new file mode 100644
> index ..2c1d237174fd
> --- /dev/null
> +++ b/arch/arm/mach-tegra/spl_uart.c
> @@ -0,0 +1,39 @@
> +/*
> + * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
> + *
> + * SPDX-License-Identifier: GPL-2.0
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static struct ns16550_platdata ns16550_com1_pdata = {
> +   .reg_shift = 2,
> +   .clock = CONFIG_SYS_NS16550_CLK,
> +};
> +
> +U_BOOT_DEVICE(ns16550_com1) = {
> +   "ns16550_serial", _com1_pdata
> +};
> +
> +static const struct {
> +   unsigned long addr;
> +   enum periph_id periph_id;
> +} uart_info[] = {
> +   { NV_PA_APB_UARTA_BASE, PERIPH_ID_UART1, },
> +   { NV_PA_APB_UARTB_BASE, PERIPH_ID_UART2, },
> +   { NV_PA_APB_UARTC_BASE, PERIPH_ID_UART3, },
> +   { NV_PA_APB_UARTD_BASE, PERIPH_ID_UART4, },
> +   { NV_PA_APB_UARTE_BASE, PERIPH_ID_UART5, },
> +};
> +
> +void tegra_spl_setup_uart(unsigned int uart_id)

I wonder whether we could eliminate the uart_id concept at some point?

> +{
> +   if (uart_id >= ARRAY_SIZE(uart_info))
> +   return;
> +   clock_ll_start_uart(uart_info[uart_id].periph_id);
> +   ns16550_com1_pdata.base = uart_info[uart_id].addr;
> +}
> --
> 2.8.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH 43/60] ARM: tegra: move PLLX configuration into SoC directories

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Rather than building a large table of all possible PLLX configurations
> into U-Boot and having it select the right one at run-time, push the
> configuration into SoC-specific files, and have the linker pick up the
> correct one.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/cpu.c | 124 
> +-
>  arch/arm/mach-tegra/cpu.h |   7 --
>  arch/arm/mach-tegra/pllx.h|  20 ++
>  arch/arm/mach-tegra/tegra114/Makefile |   3 +-
>  arch/arm/mach-tegra/tegra114/pllx.c   |  33 +
>  arch/arm/mach-tegra/tegra124/Makefile |   3 +-
>  arch/arm/mach-tegra/tegra124/pllx.c   |  33 +
>  arch/arm/mach-tegra/tegra20/Makefile  |   1 +
>  arch/arm/mach-tegra/tegra20/pllx.c|  59 
>  arch/arm/mach-tegra/tegra210/Makefile |   3 +-
>  arch/arm/mach-tegra/tegra210/pllx.c   |  33 +
>  arch/arm/mach-tegra/tegra30/Makefile  |   3 +-
>  arch/arm/mach-tegra/tegra30/pllx.c|  34 ++
>  13 files changed, 224 insertions(+), 132 deletions(-)
>  create mode 100644 arch/arm/mach-tegra/pllx.h
>  create mode 100644 arch/arm/mach-tegra/tegra114/pllx.c
>  create mode 100644 arch/arm/mach-tegra/tegra124/pllx.c
>  create mode 100644 arch/arm/mach-tegra/tegra20/pllx.c
>  create mode 100644 arch/arm/mach-tegra/tegra210/pllx.c
>  create mode 100644 arch/arm/mach-tegra/tegra30/pllx.c

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Re: [U-Boot] [PATCH 44/60] ARM: tegra: remove tegra_get_chip_sku()

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> This is now only used by some Tegra20-specific code, and only to select
> between T20/T25 code paths. Introduce a simpler function for that case,
> and isolate it to the tegra20/ directory.
>
> If we need SoC differentiation in the future, we should isolate the SKU-
> specific logic to the SoC-specific directories, and provide a higher level
> interface that the SoC-agnostic code can use; similar to pllx.h in the
> previous commit.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/include/asm/arch-tegra/tegra.h  | 38 
>  arch/arm/mach-tegra/ap.c | 40 -
>  arch/arm/mach-tegra/cpu.h|  6 -
>  arch/arm/mach-tegra/tegra20/Makefile |  1 +
>  arch/arm/mach-tegra/tegra20/emc.c| 15 ---
>  arch/arm/mach-tegra/{ => tegra20}/fuse.h |  4 +--
>  arch/arm/mach-tegra/tegra20/pllx.c   |  7 ++
>  arch/arm/mach-tegra/tegra20/pmu.c| 16 
>  arch/arm/mach-tegra/tegra20/sku.c| 43 
> 
>  arch/arm/mach-tegra/tegra20/sku.h| 12 +
>  arch/arm/mach-tegra/tegra20/warmboot.c   |  2 +-
>  11 files changed, 71 insertions(+), 113 deletions(-)
>  rename arch/arm/mach-tegra/{ => tegra20}/fuse.h (91%)
>  create mode 100644 arch/arm/mach-tegra/tegra20/sku.c
>  create mode 100644 arch/arm/mach-tegra/tegra20/sku.h


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Re: [U-Boot] [PATCH 42/60] ARM: tegra: move EMC code to tegra20/ directory

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> EMC scaling is specific to Tegra20. Move the code into tegra20/ to isolate
> it. If it becomes more generic in the future, it should likely be moved
> somewhere in drivers/, but at the least be reworked to have a leaner and
> cleaner interface to its caller (i.e. fewer dependencies, interactions).
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/Makefile   |  1 -
>  arch/arm/mach-tegra/board2.c   |  6 --
>  arch/arm/mach-tegra/emc.c  | 36 
> --
>  arch/arm/mach-tegra/emc.h  | 27 -
>  arch/arm/mach-tegra/tegra20/Makefile   |  4 ++--
>  arch/arm/mach-tegra/tegra20/emc.c  | 34 +++-
>  arch/arm/mach-tegra/tegra20/emc.h  | 14 +
>  arch/arm/mach-tegra/tegra20/warmboot.c |  4 ++--
>  include/configs/seaboard.h |  4 ++--
>  9 files changed, 57 insertions(+), 73 deletions(-)
>  delete mode 100644 arch/arm/mach-tegra/emc.c
>  delete mode 100644 arch/arm/mach-tegra/emc.h
>  create mode 100644 arch/arm/mach-tegra/tegra20/emc.h


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Re: [U-Boot] [PATCH 41/60] ARM: tegra: remove tegra_get_sku_info()

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> This is part of the internal implementation of tegra_get_chip_sku().
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/ap.c  | 14 +++---
>  arch/arm/mach-tegra/cpu.c |  5 +
>  arch/arm/mach-tegra/cpu.h |  6 --
>  3 files changed, 4 insertions(+), 21 deletions(-)

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Re: [U-Boot] [PATCH 40/60] ARM: tegra: remove gp_padctrl.h

[Simon Glass]

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> The only place this is still used is Tegra20's warmboot.c. Keep the T20
> copy around for that use, but remove the other unused duplicates.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/include/asm/arch-tegra/gp_padctrl.h   | 24 
>  arch/arm/include/asm/arch-tegra/tegra.h|  1 -
>  arch/arm/include/asm/arch-tegra114/gp_padctrl.h| 67 -
>  arch/arm/include/asm/arch-tegra124/gp_padctrl.h| 68 
> --
>  arch/arm/include/asm/arch-tegra210/gp_padctrl.h| 68 
> --
>  arch/arm/include/asm/arch-tegra30/gp_padctrl.h | 49 
>  .../tegra20}/gp_padctrl.h  | 13 +++--
>  arch/arm/mach-tegra/tegra20/warmboot.c |  2 +-
>  board/toradex/colibri_t30/colibri_t30.c|  1 -
>  9 files changed, 9 insertions(+), 284 deletions(-)
>  delete mode 100644 arch/arm/include/asm/arch-tegra/gp_padctrl.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra114/gp_padctrl.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra124/gp_padctrl.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra210/gp_padctrl.h
>  delete mode 100644 arch/arm/include/asm/arch-tegra30/gp_padctrl.h
>  rename arch/arm/{include/asm/arch-tegra20 => 
> mach-tegra/tegra20}/gp_padctrl.h (88%)


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Re: [U-Boot] [PATCH v2 00/24] dm: mmc: Add driver-model block-device support to MMC

[Simon Glass]

Hi,

On 1 May 2016 at 13:52, Simon Glass  wrote:
> This series adds support for using CONFIG_BLK with MMC, such that it uses
> the block interface correctly. The old interface in part.c is removed.
>
> With driver model, when CONFIG_BLK is enabled, MMC devices must have a child
> block device. A new mmc_bind() function takes care of this. It should be
> called when new MMC devices are bound.
>
> MMC support is added to sandbox along with a simple driver-model test.
>
> Code size does unfortunately increase slightly in SPL. For example firefly
> (Thumb 2) adds 128 bytes of code overall due to the new block driver table
> support. There may be some potential after this series to rationalise the
> common/spl/ implementations and reduce code size a little, but that remains
> to be seen.
>
> This series follows on from the previous series which refactored block
> devices. It is available at u-boot-dm/blkb-working

Are there any more comments on this series please? I'd like to apply
it in the next few days so it has lots of test time with the new
release.

Regards,
Simon

>
> Changes in v2:
> - Rebase to master
>
> Simon Glass (24):
>   dm: blk: Fix allocation of block-device numbering
>   dm: core: Allow device names to be freed automatically
>   dm: blk: Free the block device name when unbound
>   dm: mmc: Move mmc_switch_part() above its callers
>   dm: mmc: Implement the select_hwpart() method
>   dm: mmc: Add a function to obtain the block device
>   dm: mmc: spl: Use the legacy block interface in SPL
>   dm: mmc: Use the new select_hwpart() API
>   dm: blk: Add functions to select a hardware partition
>   dm: part: Use the legacy block driver for hardware partition support
>   dm: part: Drop the block_drvr table
>   dm: blk: Add a comment as to why the bdev member is needed
>   dm: mmc: Set up the device pointer when using the MMC uclass
>   dm: mmc: Move the device list into a separate file
>   dm: blk: Use the correct error code for blk_get_device_by_str()
>   dm: mmc: Adjust mmc_switch_part() to use a struct mmc
>   dm: sandbox: Only enable the sandbox MMC driver when valid
>   dm: mmc: Implement the MMC functions for block devices
>   dm: mmc: Add a way to bind MMC devices with driver model
>   dm: mmc: Add support for driver-model block devices
>   dm: mmc: sandbox: Add an SD-card emulation
>   dm: sandbox: mmc: Enable building MMC code for sandbox
>   dm: mmc: test: Add tests for MMC
>   Revert "Revert "dm: sandbox: Drop the pre-DM host implementation""
>
>  cmd/mmc.c |  16 ++-
>  common/env_mmc.c  |   4 +-
>  common/spl/spl_mmc.c  |   2 +-
>  configs/sandbox_defconfig |   2 +
>  disk/part.c   |  81 +++-
>  drivers/Makefile  |   1 +
>  drivers/block/blk-uclass.c|  59 +++--
>  drivers/block/sandbox.c   |  97 --
>  drivers/core/device-remove.c  |   2 +
>  drivers/core/device.c |   6 +
>  drivers/dfu/dfu_mmc.c |  13 +-
>  drivers/mmc/Kconfig   |  11 +-
>  drivers/mmc/Makefile  |  12 +-
>  drivers/mmc/mmc-uclass.c  | 106 
>  drivers/mmc/mmc.c | 289 
> ++
>  drivers/mmc/mmc_legacy.c  | 108 
>  drivers/mmc/mmc_private.h |  33 -
>  drivers/mmc/mmc_write.c   |  18 ++-
>  drivers/mmc/omap_hsmmc.c  |   1 +
>  drivers/mmc/pic32_sdhci.c |   7 +-
>  drivers/mmc/rockchip_dw_mmc.c |   1 +
>  drivers/mmc/sandbox_mmc.c | 134 +++-
>  drivers/mmc/socfpga_dw_mmc.c  |   1 +
>  drivers/mmc/uniphier-sd.c |   1 +
>  drivers/mmc/zynq_sdhci.c  |   1 +
>  include/blk.h |  35 +
>  include/configs/sandbox.h |   2 +
>  include/dm/device.h   |  16 +++
>  include/mmc.h |  38 +-
>  include/part.h|  18 ---
>  lib/efi_loader/efi_disk.c |  27 ++--
>  test/dm/blk.c |   4 +-
>  test/dm/mmc.c |  19 +++
>  33 files changed, 799 insertions(+), 366 deletions(-)
>  create mode 100644 drivers/mmc/mmc_legacy.c
>
> --
> 2.8.0.rc3.226.g39d4020
>
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Re: [U-Boot] [PATCH v2 00/44] dm: blk: Add more driver-model support for block devices

[Simon Glass]

Hi,

On 1 May 2016 at 11:35, Simon Glass  wrote:
> This series adjusts the block device code to support conversion to driver
> model. Specifically
>
> - A new 'legacy' block interface is created, allowing block devices to be
> defined by a linker list and accessed through function calls
> - Block device commands (such as sata and scsi) are adjusted to use these
> functions rather than the block device array directly
> - These same function calls are then implemented by the block uclass
> - The existing block-device table in part.c is dropped
> - The opportunity is taken to clean up the code style, as block devices are
> one of the few remaining dark corners in U-Boot
>
> It is useful to enable all block device drivers with sandbox. This improves
> sandbox code coverage and allows tests to be written. The following are
> enabled by this series:
>
> - IDE
> - SCSI
> - SATA
> - Systemace
>
> USB was already enabled. MMC will be enabled by a future series. Note that
> these devices do not actually function in sandbox, but the code is compiled.
>
> As mentioned, future work will enable MMC for sandbox including adding
> rudimentary sandbox SD card emulation. It would also be possible to create
> emulations for IDE, SCSI, SATA and Systemace but that work is not planned.
>
> It should be noted that the current CONFIG_DM_MMC option does not fully
> enable driver model for MMC, since the MMC operations are not running
> through driver model. This will need to be addressed at some point.
>
> This series is available at u-boot-dm/blka-working

I'd like to apply this series in the next few days - please let me
know if there are any more comments.

Regards,
Simon
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Re: [U-Boot] [PATCH v2 00/25] exynos: video: Convert exynos LCD driver to use driver model

[Simon Glass]

Hi,

On 1 March 2016 at 18:51, Minkyu Kang  wrote:
> Hi,
>
> On 29/02/16 16:18, Jaehoon Chung wrote:
>> Hi,
>>
>> On 02/29/2016 01:23 PM, Simon Glass wrote:
>>> Hi,
>>>
>>> On 23 February 2016 at 05:04, Minkyu Kang  wrote:
 Dear Simon Glass,

 On 23/02/16 15:42, Simon Glass wrote:
> Hi Minkyu,
>
> On 21 February 2016 at 21:08, Simon Glass  wrote:
>>
>> This series converts the exynos LCD driver to work with driver model. 
>> Only
>> the eDP display is converted - the MIPI display is left mostly alone as I
>> do not have a device to test with.
>>
>> The conversion involves some refactoring to simplify the code, reduce the
>> amount of global/static data and allow boards to be built without LCD
>> support.
>>
>> The series is tested with snow, spring, pit and pi. It disables LCD on 
>> other
>> exynos boards so that they will still build with these changes. Further 
>> work
>> will be needed (by someone with a board) to convert the others. I am not
>> sure when this series can be applied.
>>
>> The series also brings in device tree features from Linux v4.4. It would 
>> be
>> useful to do a full sync with the kernel on these files, but this is 
>> really
>> a job for the Samsung maintainer :-)
>>
>> The series is available at u-boot-dm/rkg-working.
>>
>> Changes in v2:
>> - Rebase to master
>> - Rebase to master
>>
>
> What do you think we should do about applying this series?
>

 Although we have to do remaining work, I think applying is possible 
 without next work.

 Board maintainers, what do you think?

 Remaining Work:
 - MIPI display driver
 - s5pc210_universal
 - smdk5420
 - smdk5250
 - trats
 - trats2

 Thanks,
 Minkyu Kang.
>>>
>>> Well, no replies as yet. The main work requires is MIPI, but as I
>>> don't have the hardware, I can't help with that. At least I have made
>>> sure that everything builds OK.
>>
>> Sorry for late..I will check these patches on this week..Tomorrow is 
>> holiday..
>> So I can check from Wed.
>
> Thank you, Jaehoon.

It has been a few months now - if you like I can apply these via the -dm tree.

Regards,
Simon
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Re: [U-Boot] [RESEND PATCH V2 6/6] gpio: exynos(s5p): remove gpio_xlate routine

[Simon Glass]

On 20 April 2016 at 09:37, Eric Nelson  wrote:
> With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass,
> the Exynos/S5P gpio driver doesn't need a custom xlate routine.
>
> Signed-off-by: Eric Nelson 
> Acked-by: Simon Glass 
> Acked-by: Minkyu Kang 
> ---
>  V2 removes the include of 
>  drivers/gpio/s5p_gpio.c | 11 ---
>  1 file changed, 11 deletions(-)

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Re: [U-Boot] [RESEND PATCH V2 5/6] gpio: rk: remove gpio_xlate routine

[Simon Glass]

On 20 April 2016 at 09:37, Eric Nelson  wrote:
> With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass,
> the Rockchip gpio driver doesn't need a custom xlate routine.
>
> Signed-off-by: Eric Nelson 
> Acked-by: Simon Glass 
> ---
>  V2 removes the include of 
>  drivers/gpio/rk_gpio.c | 11 ---
>  1 file changed, 11 deletions(-)

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Re: [U-Boot] [RESEND PATCH V2 3/6] gpio: omap: remove gpio_xlate routine

[Simon Glass]

On 20 April 2016 at 09:37, Eric Nelson  wrote:
> With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass,
> the omap gpio driver doesn't need a custom xlate routine.
>
> Signed-off-by: Eric Nelson 
> Acked-by: Simon Glass 
> ---
>  V2 removes the include of 
>  drivers/gpio/omap_gpio.c | 11 ---
>  1 file changed, 11 deletions(-)

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Re: [U-Boot] [RESEND PATCH V2 4/6] gpio: pic32: remove gpio_xlate routine

[Simon Glass]

On 20 April 2016 at 09:37, Eric Nelson  wrote:
> With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass,
> the pic32 gpio driver doesn't need a custom xlate routine.
>
> Signed-off-by: Eric Nelson 
> Acked-by: Simon Glass 
> Reviewed-by: Purna Chandra Mandal 
> ---
>  V2 removes the include of 
>  drivers/gpio/pic32_gpio.c | 10 --
>  1 file changed, 10 deletions(-)

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Re: [U-Boot] [RESEND PATCH V2 2/6] gpio: intel_broadwell: remove gpio_xlate routine

[Simon Glass]

On 20 April 2016 at 09:37, Eric Nelson  wrote:
> With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass,
> the intel_broadwell driver doesn't need a custom xlate routine.
>
> Signed-off-by: Eric Nelson 
> Acked-by: Simon Glass 
> ---
>  Nothing changed in V2.
>  drivers/gpio/intel_broadwell_gpio.c | 10 --
>  1 file changed, 10 deletions(-)

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Re: [U-Boot] [PATCH V4, 1/6] dm: gpio: add a default gpio xlate routine

[Simon Glass]

On 27 April 2016 at 09:12, Simon Glass  wrote:
> On 24 April 2016 at 17:32, Eric Nelson  wrote:
>> Many drivers use a common form of offset + flags for device
>> tree nodes. e.g.:
>> < 2 GPIO_ACTIVE_LOW>
>>
>> This patch adds a common implementation of this type of parsing
>> and calls it when a gpio driver doesn't supply its' own xlate
>> routine.
>>
>> This will allow removal of the driver-specific versions in a
>> handful of drivers and simplify the addition of new drivers.
>>
>> Signed-off-by: Eric Nelson 
>> Reviewed-by: Stephen Warren 
>> ---
>>   V2 removes parsing of offset from the gpio_find_and_xlate routine,
>>   and only parses the offset and GPIO_ACTIVE_LOW flag when a
>>   driver-specific xlate is unavailable.
>>
>>   V3 re-works tests of the argument count as suggested by Stephen Warren
>>   and will allow parsing of nodes with no flags field:
>> < 2>
>>
>>   V4 fixes an indent with spaces instead of tabs
>>
>>  drivers/gpio/gpio-uclass.c | 30 +++---
>>  include/asm-generic/gpio.h | 19 ++-
>>  2 files changed, 37 insertions(+), 12 deletions(-)
>
> Acked-by: Simon Glass 

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Re: [U-Boot] [PATCH V4 4/4] dm: gpio: introduce 74x164 driver

[Simon Glass]

On 2 May 2016 at 20:02, Peng Fan  wrote:
> Introduce driver to support "fairchild,74hc595" devices.
> 1. Take linux drivers/drivers/gpio/gpio-74x164.c as reference.
> 2. Following the naming used in Linux driver with gen_7x164 as the prefix.
> 3. Enable CONFIG_DM_74X164 to use this driver.
> 4. Follow Documentation/devicetree/bindings/gpio/gpio-74x164.txt to add device
>nodes
> 5. Tested on i.MX6 UltraLite with 74LV595 using gpio command and oscillograph.
>
> Signed-off-by: Peng Fan 
> Cc: Simon Glass 
> Cc: Masahiro Yamada 
> Cc: Chin Liang See 
> Cc: Bhuvanchandra DV 
> Cc: Daniel Schwierzeck 
> Cc: Fabio Estevam 
> Cc: Stefano Babic 
> Reviewed-by: Simon Glass 
> ---
>
> V4:
>  Add Simon's review tag.
>
> V3:
>  Use dm_spi_claim_bus and dm_spi_xfer and dm_spi_release_bus
>  Drop spi_slave from struct gen_74x164_priv.
>
> V2:
>  Address Simon's comments:
>  Drop unused dev entry of gen_74x164_priv
>  Rename gen_74x164_info to gen_74x164_priv
>  Change u8 to uint
>  Change EINVAL to ENOSYS
>  Drop dm_gpio_set_value when probe, since GPIOD_IS_OUT_ACTIVE already
>  active the gpio.
>  Drop complicated spi_get_bus_and_cs, use dev_get_parent_priv.
>  To Kconfig help msg, I add 74lv165 and 75hc595, actually, the linux
>  one does not contain manufacture info.
>
>  drivers/gpio/74x164_gpio.c | 193 
> +
>  drivers/gpio/Kconfig   |   8 ++
>  drivers/gpio/Makefile  |   1 +
>  3 files changed, 202 insertions(+)
>  create mode 100644 drivers/gpio/74x164_gpio.c

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Re: [U-Boot] [PATCH V4 2/4] dm: spi: soft_spi: switch to use linux compatible string

[Simon Glass]

On 2 May 2016 at 20:02, Peng Fan  wrote:
> 1. Support compatible string "spi-gpio" which is used by Linux
>Linux use different bindings, so use UBOOT_COMPAT and
>LINUX_COMPAT to differentiate them.
> 2. Introduce SPI_MASTER_NO_RX and SPI_MASTER_NO_TX to handle
>no rx or no tx case.
> 3. Tested on i.MX6 UltraLite board with 74LV595 spi-gpio chip.
>
> Signed-off-by: Peng Fan 
> Cc: Simon Glass 
> Cc: Przemyslaw Marczak 
> Reviewed-by: Simon Glass 
> ---
>
> V4:
>  None
> V3:
>  None
> V2:
>  Follow Simon's comments, drop uboot compatible string, convert to use
>  Linux compatile string, and convert the universal board.
>
>  arch/arm/dts/exynos4210-universal_c210.dts | 10 
>  drivers/spi/soft_spi.c | 38 
> ++
>  2 files changed, 33 insertions(+), 15 deletions(-)

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Re: [U-Boot] [PATCH 1/1] drivers: usb: common: add common code for usb drivers to use

[Simon Glass]

On 13 April 2016 at 05:47, Marek Vasut  wrote:
> On 04/13/2016 01:19 PM, Simon Glass wrote:
>> On 12 April 2016 at 04:31, Mugunthan V N  wrote:
>>> Add common usb code which usb drivers makes use of it.
>>>
>>> Signed-off-by: Mugunthan V N 
>>> ---
>>>
>>> This was in my musb dm bringup patch list, and I did dwc3 over
>>> the same branch so missed submitting this patch for dwc3 bringup.
>>> So submitting the dwc3 dependent patch separately and will drop
>>> this while submitting v2 for musb.
>>>
>>> Simon, before applying [1], can you apply this first so that the
>>> dependents are met.
>>>
>>> [1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg206602.html
>>>
>>> ---
>>>  Makefile|  1 +
>>>  drivers/usb/common/Makefile |  8 
>>>  drivers/usb/common/common.c | 40 
>>>  include/linux/usb/otg.h |  9 +
>>>  4 files changed, 58 insertions(+)
>>>  create mode 100644 drivers/usb/common/Makefile
>>>  create mode 100644 drivers/usb/common/common.c
>>
>> Reviewed-by: Simon Glass 
>>
>> Marek, if you are OK with it, i'd like to bring this into u-boot-dm as
>> it is a prerequisite for a series in my patchwork todo list.
>
> That's fine, thanks.
>
>
> --
> Best regards,
> Marek Vasut

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Re: [U-Boot] [PATCH V4 3/4] dm: spi: introduce dm api

[Simon Glass]

Applied to u-boot-dm, thanks!

On 7 May 2016 at 09:11, Simon Glass  wrote:
> On 2 May 2016 at 20:02, Peng Fan  wrote:
>> Introduce dm_spi_claim_bus, dm_spi_release_bus and dm_spi_xfer
>> Convert spi_claim_bus, spi_release_bus and spi_xfer to use
>> the new API.
>>
>> Signed-off-by: Peng Fan 
>> Cc: Simon Glass 
>> Cc: Jagan Teki 
>> ---
>>
>>
>> V4:
>>  Convert spi_claim_bus, spi_release_bus and spi_xfer to call the use APIs.
>> V3:
>>  As Simon suggested, introduce new API. New patch.
>>
>>  drivers/spi/spi-uclass.c | 28 +++---
>>  include/spi.h| 52 
>> 
>>  2 files changed, 73 insertions(+), 7 deletions(-)
>
> Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 1/2] dm: core: allow drivers to refuse to bind

[Simon Glass]

On 4 May 2016 at 14:09, Simon Glass  wrote:
> Hi Stephen,
>
> On 4 May 2016 at 14:02, Stephen Warren  wrote:
>> On 05/04/2016 01:48 PM, Simon Glass wrote:
>>>
>>> +Tom Rini
>>>
>>> Hi Stephen,
>>>
>>> On 4 May 2016 at 13:46, Stephen Warren  wrote:

 On 05/04/2016 01:31 PM, Simon Glass wrote:
>
>
> Hi Stephen,
>
> On 4 May 2016 at 12:57, Stephen Warren  wrote:
>>
>>
>> On 04/19/2016 04:19 PM, Stephen Warren wrote:
>>>
>>>
>>>
>>> From: Stephen Warren 
>>>
>>> In some cases, drivers may not want to bind to a device. Allow bind()
>>> to
>>> return -ENODEV in this case, and don't treat this as an error. This
>>> can
>>> be useful in situations where some information source other than the
>>> DT
>>> node's main status property indicates whether the device should be
>>> enabled, for example other DT properties might indicate this, or the
>>> driver might query non-DT sources such as system fuses or a version
>>> number
>>> register.
>>
>>
>>
>>
>> Simon, this series is assigned to you in patchwork. Are you the right
>> person
>> to apply it?
>
>
>
> Yes. but not for this release, right?



 Patch 2 in the series (which depends on this patch) fixes a bug for Tegra
 boards with LCD panels. Admittedly it appears to be only cosmetic (an
 error
 message is printed at boot), but "it's a bug" seems to satisfy the
 requirement to apply it for this release.
>>>
>>>
>>> Sorry, I didn't know that. Given the core nature of this patch I would
>>> rather wait, and apply it next week. Let me know if you disagree.
>>
>>
>> I suppose that it's been broken long enough that another release won't
>> matter.
>>
>> Was my explanation of the bug in the description of patch 2/2 not clear in
>> some way?
>
> Looks good to me. Were you expecting me to apply both as a bug fix? If
> so I'd prefer to have Tom Warren's ACK. Even so, a core patch like
> this really needs the full test cycle IMO.
>
> Regards,
> Simon

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Re: [U-Boot] [PATCH V4 1/4] dm: spi: soft_spi bug fix

[Simon Glass]

On 2 May 2016 at 19:59, Peng Fan  wrote:
> When doing xfer, should use device->parent, but not device
> When doing bit xfer, should use "!!(tmpdout & 0x80)", but not
> "(tmpdout & 0x80)"
>
> Signed-off-by: Peng Fan 
> Cc: Simon Glass 
> Cc: Jagan Teki 
> Reviewed-by: Simon Glass 
> ---
>
> V4:
>  None
>
> V3:
>  None
>
> V2:
>  Follow Simon's comments, split bug fix into seperate patch.
>
>  drivers/spi/soft_spi.c | 19 ---
>  1 file changed, 12 insertions(+), 7 deletions(-)

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Re: [U-Boot] [PATCH V2] buildman: allow more incremental building

[Simon Glass]

On 4 May 2016 at 14:30, Simon Glass  wrote:
> On 4 May 2016 at 14:27, Tom Rini  wrote:
>> On Wed, May 04, 2016 at 01:30:47PM -0600, Simon Glass wrote:
>>> Hi Tom,
>>>
>>> On 4 May 2016 at 13:09, Stephen Warren  wrote:
>>> > On 05/04/2016 12:58 PM, Tom Rini wrote:
>>> >>
>>> >> On Wed, May 04, 2016 at 12:55:15PM -0600, Stephen Warren wrote:
>>> >>>
>>> >>> On 04/11/2016 10:48 AM, Stephen Warren wrote:
>>> 
>>>  From: Stephen Warren 
>>> 
>>>  One use-case for buildman is to continually run it interactively after
>>>  each small step in a large refactoring operation. This gives more
>>>  immediate feedback than making a number of commits and then going back
>>>  and
>>>  testing them. For this to work well, buildman needs to be extremely
>>>  fast.
>>>  At present, a couple issues prevent it being as fast as it could be:
>>> 
>>>  1) Each time buildman runs "make %_defconfig", it runs "make mrproper"
>>>  first. This throws away all previous build results, requiring a
>>>  from-scratch build. Optionally avoiding this would speed up the build,
>>>  at
>>>  the cost of potentially causing or missing some build issues.
>>> 
>>>  2) A build tree is created per thread rather than per board. When a
>>>  thread
>>>  switches between building different boards, this often causes many 
>>>  files
>>>  to be rebuilt due to changing config options. Using a separate build
>>>  tree
>>>  for each board would avoid this. This does put more strain on the
>>>  system's
>>>  disk cache, but it is worth it on my system at least.
>>> 
>>>  This commit adds two command-line options to implement the changes
>>>  described above; -I ("--incremental") turns of "make mrproper" and -P
>>>  ("--per-board-out-dir") creats a build directory per board rather than
>>>  per
>>>  thread.
>>> 
>>>  Tested:
>>> 
>>>   ./tools/buildman/buildman.py tegra
>>>   ./tools/buildman/buildman.py -I -P tegra
>>>   ./tools/buildman/buildman.py -b tegra_dev tegra
>>>   ./tools/buildman/buildman.py -b tegra_dev -I -P tegra
>>> 
>>>  ... each once after deleting the buildman result/work directory, and
>>>  once
>>>  "incrementally" after a previous identical invocation.
>>> 
>>>  Signed-off-by: Stephen Warren 
>>>  Reviewed-by: Tom Rini 
>>>  Acked-by: Simon Glass  # v1
>>>  Tested-by: Simon Glass  # v1
>>> >>>
>>> >>>
>>> >>> Tom, it's been over 3 weeks since I posted this, and Simon ack'd v2.
>>> >>
>>> >>
>>> >> Well, the release is next week.  Simon didn't include it in a PR since
>>> >> v2 was posted so I assume he was figuring on waiting until next release
>>> >> for it.  Does this really need to come in before the release or can it
>>> >> wait?
>>>
>>> No I was just expecting you to pick it up as it is in your queue :-)
>>
>> Welp, there you go then. pah, sorry, my fault.
>
> No worries, I just grabbed it and will apply when the merge window opens.
>
> - Simon

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Re: [U-Boot] [PATCH 2/2] video: tegra: refuse to bind to disabled dcs

[Simon Glass]

On 20 April 2016 at 07:16, Simon Glass  wrote:
> On 19 April 2016 at 16:19, Stephen Warren  wrote:
>> From: Stephen Warren 
>>
>> This prevents the following boot-time message on any board where only the
>> first DC is in use, yet the DC's DT node is enabled:
>>
>> stdio_add_devices: Video device failed (ret=-22)
>>
>> (This happens on at least Harmony, Ventana, and likely any other Tegra20
>> board with display enabled other than Seaboard).
>>
>> The Tegra DC's DT node represents a display controller. It may itself
>> drive an integrated RGB display output, or be used by some other display
>> controller such as HDMI. For this reason the DC node itself is not
>> enabled/disabled in DT; the DC itself is considered a shared resource, not
>> the final (board-specific) display output. The node should instantiate a
>> display output driver only if the rgb subnode is enabled. Other output
>> drivers are free to use the DC if they are enabled and their DT node
>> references the DC's DT node. Adapt the Tegra display drivers' bind()
>> routine to only bind to the DC's DT node if the RGB subnode is enabled.
>>
>> Now that the display driver does the right thing, remove the workaround
>> for this issue from Seaboard's DT file.
>>
>> Cc: Thierry Reding 
>> Signed-off-by: Stephen Warren 
>> ---
>> Thierry, I assume this is how the DC nodes are intended to be interpreted?
>> It's certainly how the kernel's DT files and driver work, even if by
>> accident.
>> ---
>> arch/arm/dts/tegra20-seaboard.dts | 4 
>> drivers/video/tegra.c | 7 +++
>> 2 files changed, 7 insertions(+), 4 deletions(-)
>
> Well it seems reasonable to me.
>
> Reviewed-by: Simon Glass 

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Re: [U-Boot] [PATCH] fdt: fix dev_get_addr_name node offset

[Simon Glass]

On 29 April 2016 at 08:02, Simon Glass  wrote:
> On 28 April 2016 at 16:04, Stephen Warren  wrote:
>> From: Stephen Warren 
>>
>> Use the device's own DT offset, not the device's parent's.
>>
>> Fixes: 43c4d44e3330 ("fdt: implement dev_get_addr_name()")
>> Signed-off-by: Stephen Warren 
>> ---
>>  drivers/core/device.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> Acked-by: Simon Glass 

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Re: [U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Remove ACPI from the TODO list and add a new section to document
> current ACPI support in U-Boot.
>
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - Update ACPI support status in more details: what's supported,
>   what's not supported, what's optional.
>
>  doc/README.x86 | 44 +++-
>  1 file changed, 43 insertions(+), 1 deletion(-)

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Re: [U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> This updates the doc for the following places:
> - Mention CRB for Bayley Bay
> - Mention Congatec QEVAL 2.0 & conga-QA3/E3845
> - Limit part of the QEMU paragraphs to 80 cols
> - Correct some typos (drive, it's, Ubuntu)
> - Add description for "console=ttyS0,115200"
> - Remove CONFIG_BOOTDELAY description which is already
>   in x86-common.h
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
>
> ---
>
> Changes in v2:
> - Update support board list, adding Congatec QEVAL 2.0 & conga-QA3/E3845
>
>  doc/README.x86 | 41 ++---
>  1 file changed, 18 insertions(+), 23 deletions(-)

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Re: [U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> This adds basic BayTrail platform ASL files. They are intended to be
> included in dsdt.asl of any board that is based on this platform.
>
> Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for
> now. They will be added in the future.
>
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - Reserve IRQ3 and IRQ4 in the IRQ links to support external SuperIO
>   chipset serial ports
> - Fix SIO1 and SIO2 interrupt mapping in irqroute.h
>
>  .../include/asm/arch-baytrail/acpi/irq_helper.h| 111 +
>  .../include/asm/arch-baytrail/acpi/irqlinks.asl| 489 
> +
>  .../include/asm/arch-baytrail/acpi/irqroute.asl|  48 ++
>  arch/x86/include/asm/arch-baytrail/acpi/irqroute.h |  27 ++
>  arch/x86/include/asm/arch-baytrail/acpi/lpc.asl| 121 +
>  .../include/asm/arch-baytrail/acpi/platform.asl|  33 ++
>  .../include/asm/arch-baytrail/acpi/sleepstates.asl |  13 +
>  .../asm/arch-baytrail/acpi/southcluster.asl| 211 +
>  arch/x86/include/asm/arch-baytrail/acpi/usb.asl|  34 ++
>  arch/x86/include/asm/arch-baytrail/acpi/xhci.asl   |  31 ++
>  arch/x86/include/asm/arch-baytrail/device.h|  74 
>  arch/x86/include/asm/arch-baytrail/iomap.h |  70 +++
>  arch/x86/include/asm/arch-baytrail/irq.h   |  86 
>  13 files changed, 1348 insertions(+)
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/platform.asl
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/usb.asl
>  create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
>  create mode 100644 arch/x86/include/asm/arch-baytrail/device.h
>  create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h
>  create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h


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Re: [U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  board/congatec/conga-qeval20-qa3-e3845/.gitignore | 3 +++
>  board/intel/bayleybay/.gitignore  | 3 +++
>  board/intel/minnowmax/.gitignore  | 3 +++
>  3 files changed, 9 insertions(+)
>  create mode 100644 board/congatec/conga-qeval20-qa3-e3845/.gitignore
>  create mode 100644 board/intel/bayleybay/.gitignore
>  create mode 100644 board/intel/minnowmax/.gitignore

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Re: [U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Enable ACPI table generation by creating a DSDT table for all baytrail
> boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  board/congatec/conga-qeval20-qa3-e3845/Makefile   |  1 +
>  board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl | 13 +
>  board/congatec/conga-qeval20-qa3-e3845/dsdt.asl   | 14 ++
>  board/intel/bayleybay/Makefile|  1 +
>  board/intel/bayleybay/acpi/mainboard.asl  | 11 +++
>  board/intel/bayleybay/dsdt.asl| 14 ++
>  board/intel/minnowmax/Makefile|  1 +
>  board/intel/minnowmax/acpi/mainboard.asl  | 11 +++
>  board/intel/minnowmax/dsdt.asl| 14 ++
>  configs/bayleybay_defconfig   |  1 +
>  configs/conga-qeval20-qa3-e3845_defconfig |  1 +
>  configs/minnowmax_defconfig   |  1 +
>  12 files changed, 83 insertions(+)
>  create mode 100644 board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
>  create mode 100644 board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
>  create mode 100644 board/intel/bayleybay/acpi/mainboard.asl
>  create mode 100644 board/intel/bayleybay/dsdt.asl
>  create mode 100644 board/intel/minnowmax/acpi/mainboard.asl
>  create mode 100644 board/intel/minnowmax/dsdt.asl

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Remove the kernel boot parameter acpi=off so that kernel can turn on
> ACPI support.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  include/configs/x86-common.h | 9 +++--
>  1 file changed, 7 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> FADT/MADT tables are platform specific. Generate them for BayTrail.
>
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - Use existing macros in FADT whenever possible
> - Rename acpi_madt_irq_overrides() to acpi_create_madt_irq_overrides()
>   for consistency, and make it static
> - Return table length in acpi_create_madt_irq_overrides() so that the
>   code logic in acpi_fill_madt() looks consistent (eg: current += ...)
>
>  arch/x86/cpu/baytrail/Makefile |   1 +
>  arch/x86/cpu/baytrail/acpi.c   | 163 
> +
>  2 files changed, 164 insertions(+)
>  create mode 100644 arch/x86/cpu/baytrail/acpi.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Use u32 instead of unsigned long in the table write routines, as
> other routines do.
>
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - Update several more places to use u32 in acpi_table.c
>
>  arch/x86/include/asm/acpi_table.h |  4 ++--
>  arch/x86/lib/acpi_table.c | 14 +++---
>  2 files changed, 9 insertions(+), 9 deletions(-)

Reviewed-by: Simon Glass 

I guess this will be 32-bit even if U-Boot is built for 64-bit mode?

- Simon
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Re: [U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Per ACPI spec, the FACS table address must be aligned to a 64 byte
> boundary (Windows checks this, but Linux does not).
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
>
> ---
>
> Changes in v2:
> - Add comments before the 64 byte alignment for FACS
>
>  arch/x86/lib/acpi_table.c | 6 +-
>  1 file changed, 5 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics()

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Like other MADT table write routines, make acpi_create_madt_lapics()
> return how many bytes it has written instead of the table end addr.
>
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - New patch to return table length in acpi_create_madt_lapics()
>
>  arch/x86/include/asm/acpi_table.h | 2 +-
>  arch/x86/lib/acpi_table.c | 8 +---
>  2 files changed, 6 insertions(+), 4 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> The comment of initializing table header revision says:
>
> /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
>
> which might mislead it may increase per ACPI spec revision.
> However this is not the case. It's actually a fixed number
> as defined in ACPI spec, and in the laest ACPI spec 6.1,
> some table header revisions are still 1. Clean these up.
>
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - New patch to clean up table header revisions
>
>  arch/x86/include/asm/acpi_table.h |  6 --
>  arch/x86/lib/acpi_table.c | 16 
>  2 files changed, 4 insertions(+), 18 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> This adds several generic ASL libraries that can be included by
> other ASL files, which are:
>
> - debug.asl: for debug output using POST I/O port and legacy serial port
> - globutil.asl: for string compare routines
> - statdef.asl: for _STA status values
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  arch/x86/include/asm/acpi/debug.asl| 136 
> +
>  arch/x86/include/asm/acpi/globutil.asl | 113 +++
>  arch/x86/include/asm/acpi/statdef.asl  |  82 
>  3 files changed, 331 insertions(+)
>  create mode 100644 arch/x86/include/asm/acpi/debug.asl
>  create mode 100644 arch/x86/include/asm/acpi/globutil.asl
>  create mode 100644 arch/x86/include/asm/acpi/statdef.asl

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 11/28] x86: acpi: Remove unused codes

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> - Remove #include <> header files.
> - Remove APM_CNT register defines, which should not be here as
>   they are SMI related.
> - Remove MP_IRQ_ defines as they are duplicates of the same ones
>   in asm/mpspec.h.
> - Remove ACTL register defines, which should not be here as they
>   are chipset specific.
> - Remove functional fixed hardware defines, which are not used.
> - Remove dev_scope related defines, which are not used.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
>
> ---
>
> Changes in v2:
> - Change commit subject per review comments
>
>  arch/x86/include/asm/acpi_table.h | 68 
> ---
>  1 file changed, 68 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Rearrange the routine order a little bit, to follow the order
> in which ACPI table is defined in acpi_table.h.
>
> Signed-off-by: Bin Meng 
>
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2:
> - Change 'orders' to 'order' in the commit subject
> - Correct wrong indention in acpi_create_madt_lapics()
>
>  arch/x86/include/asm/acpi_table.h |  14 +--
>  arch/x86/lib/acpi_table.c | 236 
> +++---
>  2 files changed, 126 insertions(+), 124 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> - Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID.
> - Do not typedef acpi_header_t, instead use struct acpi_table_hader.
> - Use a shorter name aslc_id and aslc-revision.
> - Change MCFG base address to use 32-bit value pairs (_l and _h).
> - Apply ACPI_APIC_ prefix to MADT APIC type macros and make
>   their names to be more readable.
> - Apply __packed to struct acpi_madt_irqoverride and struct
>   acpi_madt_lapic_nmi tables, as they are not naturally aligned
>   by the compiler which leads to wrong sizeof(struct).
> - Rename model to res1 as it is reserved after ACPI spec 1.0.
> - Apply ACPI_ prefix to the PM profile macros and change them
>   to enum.
> - Add ospm_flags to FACS structure which is defined since ACPI 4.0.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
>
> ---
>
> Changes in v2:
> - Update commit message to mention the reason of adding __packed
>
>  arch/x86/include/asm/acpi_table.h | 72 
> +--
>  arch/x86/lib/acpi_table.c | 71 --
>  2 files changed, 75 insertions(+), 68 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator()

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> This acpi_create_ssdt_generator() currently does nothing.
> Remove this for now.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  arch/x86/include/asm/acpi_table.h |  3 ---
>  arch/x86/lib/acpi_table.c | 33 -
>  2 files changed, 36 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 15/28] x86: acpi: Change fill_header()

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Rename fill_header() to acpi_fill_header() for consistency.
> Change its signature to remove the 'length' parameter and
> make it a public API.
>
> Also remove the unnecessary include files, and improve the
> AmlCode[] comment a little bit.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  arch/x86/include/asm/acpi_table.h |  1 +
>  arch/x86/lib/acpi_table.c | 22 --
>  2 files changed, 9 insertions(+), 14 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Reorder the ACPI tables appearance by following the order:
> RSDP, RSDT, XSDT, FADT, FACS, MADT, MCFG. And adjust the
> table flag defines accordingly.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
>
> ---
>
> Changes in v2:
> - Update the commit message per review comments
>
>  arch/x86/include/asm/acpi_table.h | 347 
> +++---
>  1 file changed, 169 insertions(+), 178 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 10/28] acpi: Output all errors/warnings/remarks when compiling ASL

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Remove -va option when invoking IASL compiler so that we can see
> errors/warnings/remarks in the build log.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  scripts/Makefile.lib | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass 

But note that a 'make -s' build without V=1 should not print output in
normal operation.

- Simon
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Re: [U-Boot] [PATCH v2 08/28] acpi: Explicitly spell out dsdt.c in the make rule

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Currently the make rule for dsdt.c uses a wildcard, as below:
>
>   $(obj)/%.c:$(src)/%.asl
>
> To avoid any side effect, explicitly mention dsdt.c as this is
> the file we intend to use for ACPI DSDT AML generation.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  scripts/Makefile.lib | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH 05/26] x86: irq: Enable SCI on IRQ9

[Simon Glass]

On 2 May 2016 at 01:33, Bin Meng  wrote:
> By default SCI is disabled after power on. ACTL is the register to
> enable SCI and route it to PIC/APIC. To support both ACPI in PIC
> mode and APIC mode, configure SCI to use IRQ9.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/irq.c | 25 
> ++
>  arch/x86/include/asm/irq.h |  4 
>  doc/device-tree-bindings/misc/intel,irq-router.txt |  5 +
>  3 files changed, 34 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 09/28] acpi: Specify U-Boot include path for ASL files

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> It will be much easier if we split the whole dsdt.asl file into
> multiple smaller ASL parts and have access to U-Boot include files.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  scripts/Makefile.lib | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 07/28] acpi: Change build log for ASL files

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Currently when compiling U-Boot with ASL file, the build log says:
>
>   ASL board/intel/bayleybay/dsdt.c
>
> This looks odd as ASL compiler's input is ASL file, not C file.
> Change the make rule to use >lt; instead.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  scripts/Makefile.lib | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH v2 04/28] x86: irq: Reserve IRQ9 for ACPI in PIC mode

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Reserve IRQ9 which is to be used as SCI interrupt number
> for ACPI in PIC mode.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
>
> ---
>
> Changes in v2:
> - Change to use IS_ENABLED()
>
>  arch/x86/cpu/irq.c | 5 +
>  1 file changed, 5 insertions(+)

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Re: [U-Boot] [PATCH v2 06/28] x86: dts: Update to include ACTL register details

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> This updates all x86 boards that currently have IRQ router in the
> dts files to include ACTL register details.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  arch/x86/dts/bayleybay.dts   | 1 +
>  arch/x86/dts/conga-qeval20-qa3-e3845.dts | 1 +
>  arch/x86/dts/crownbay.dts| 1 +
>  arch/x86/dts/galileo.dts | 1 +
>  arch/x86/dts/minnowmax.dts   | 1 +
>  arch/x86/dts/qemu-x86_q35.dts| 2 ++
>  6 files changed, 7 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Remove asm/acpi.h which is never used.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  arch/x86/cpu/ivybridge/lpc.c |  1 -
>  arch/x86/cpu/ivybridge/model_206ax.c |  1 -
>  arch/x86/cpu/ivybridge/northbridge.c |  1 -
>  arch/x86/include/asm/acpi.h  | 24 
>  4 files changed, 27 deletions(-)
>  delete mode 100644 arch/x86/include/asm/acpi.h

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Re: [U-Boot] [PATCH v2 02/28] x86: Fix build warning in tables.c when CONFIG_SEABIOS

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> The following build warning is seen in tables.c:
>
>   warning: implicit declaration of function 'memalign'
>
> Add the missing header file to fix it.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  arch/x86/lib/tables.c | 1 +
>  1 file changed, 1 insertion(+)

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Re: [U-Boot] [PATCH v2 03/28] x86: acpi: Fix compiler warnings in write_acpi_tables()

[Simon Glass]

On 7 May 2016 at 08:46, Bin Meng  wrote:
> Fix the following two build warnings in function 'write_acpi_tables':
>
>   warning: format '%lx' expects argument of type 'long unsigned int',
>   but argument 2 has type 'u32' [-Wformat=]
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Stefan Roese 
> Tested-by: Stefan Roese 
> ---
>
> Changes in v2: None
>
>  arch/x86/lib/acpi_table.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass 

(nit - you could remove the period in 'Writing ACPI tables')
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Re: [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail

[Simon Glass]

Hi Bin,

On 7 May 2016 at 08:46, Bin Meng  wrote:
> This series introduces initial ACPI support for Intel BayTrail.
>
> Advanced Configuration and Power Interface (ACPI) aims to establish
> industry-standard interfaces enabling OS-directed configuration, power
> management, and thermal management of mobile, desktop, and server platforms.
>
> Linux can boot without ACPI with "acpi=off" command line parameter, but
> with ACPI the kernel gains the capabilities to handle power management.
> For Windows, ACPI is a must-have firmware feature since Windows Vista.
> CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
> U-Boot. This requires Intel ACPI compiler to be installed on your host to
> compile ACPI DSDT table written in ASL format to AML format. You can get
> the compiler via "apt-get install iasl" if you are on Ubuntu or download
> the source from acpica website to compile one by yourself.
>
> Current ACPI support in U-Boot is not complete. More features will be added
> in the future. The status as of today is:
>
>  * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
>  * Support one static DSDT table only, compiled by Intel ACPI compiler.
>  * Support S0/S5, reboot and shutdown from OS.
>  * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
>  * Support ACPI interrupts with SCI only.
>
> Features not supported so far (to make it a complete ACPI solution):
>  * S3 (Suspend to RAM), S4 (Suspend to Disk).
>  * Install and boot Ubuntu 14.04 (or above) from U-Boot with legacy interface.
>  * Install and boot Windows 8.1/10 from U-Boot with legacy interface.
>
> Features that are optional:
>  * ACPI global NVS support. We may need it to simplify ASL code logic if
>utilizing NVS variables. Most likely we will need this sooner or later.
>  * Dynamic AML bytecodes insertion at run-time. We may need this to support
>SSDT table generation and DSDT fix up.
>  * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
>those legacy stuff into U-Boot. ACPI spec allows a system that does not
>support SMI (a legacy-free system).
>
> So far ACPI is enabled on BayTrail based boards. Testing was done by booting
> a pre-installed Ubuntu 14.04 from a SATA drive. Most devices seem to work
> correctly and the board can respond a reboot/shutdown command from Ubuntu.

It's great to see this - a big step forward!

A few general comments:
- when building, the Intel ACPI tools output some non-warning info -
can you quieten this down? It should not appear when 'make -s' is used
- is it OK to enable other tables along with ACPI? The docs seem to be
silent on this point
- for me Ubuntu does not offer an option in the GUI to restart...I can
do it from the command line. On my normal desktop I see a power button
in the top right. I wonder why this doesn't work on minnowmax?

>
> This series is available at u-boot-x86/acpi-working.
>
> Changes in v2:
> - Change to use IS_ENABLED()
> - Change commit subject per review comments
> - Update commit message to mention the reason of adding __packed
> - Update the commit message per review comments
> - Change 'orders' to 'order' in the commit subject
> - Correct wrong indention in acpi_create_madt_lapics()
> - Update several more places to use u32 in acpi_table.c
> - Add comments before the 64 byte alignment for FACS
> - New patch to clean up table header revisions
> - New patch to return table length in acpi_create_madt_lapics()
> - Reserve IRQ3 and IRQ4 in the IRQ links to support external SuperIO
>   chipset serial ports
> - Fix SIO1 and SIO2 interrupt mapping in irqroute.h
> - Use existing macros in FADT whenever possible
> - Rename acpi_madt_irq_overrides() to acpi_create_madt_irq_overrides()
>   for consistency, and make it static
> - Return table length in acpi_create_madt_irq_overrides() so that the
>   code logic in acpi_fill_madt() looks consistent (eg: current += ...)
> - Update support board list, adding Congatec QEVAL 2.0 & conga-QA3/E3845
> - Update ACPI support status in more details: what's supported,
>   what's not supported, what's optional.
>
> Bin Meng (28):
>   x86: Drop asm/acpi.h
>   x86: Fix build warning in tables.c when CONFIG_SEABIOS
>   x86: acpi: Fix compiler warnings in write_acpi_tables()
>   x86: irq: Reserve IRQ9 for ACPI in PIC mode
>   x86: irq: Enable SCI on IRQ9
>   x86: dts: Update to include ACTL register details
>   acpi: Change build log for ASL files
>   acpi: Explicitly spell out dsdt.c in the make rule
>   acpi: Specify U-Boot include path for ASL files
>   acpi: Output all errors/warnings/remarks when compiling ASL
>   x86: acpi: Remove unused codes
>   x86: acpi: Various changes to acpi_table.h
>   x86: acpi: Reorder code in acpi_table.h
>   x86: acpi: Remove acpi_create_ssdt_generator()
>   x86: acpi: Change fill_header()
>   x86: acpi: Adjust order in acpi_table.c
>   x86: acpi: Use u32 in table write routines
>   x86: acpi: Align FACS 

Re: [U-Boot] Partition UUIDs in U-Boot and Linux (blkid vs 'part list')

[Tom Rini]

On Sat, May 07, 2016 at 11:51:12AM -0600, Simon Glass wrote:
> Hi,
> 
> I find that blkid provides different output from 'part list' and I'm
> not sure why:
> 
> => part list scsi 0
> 
> Partition Map for SCSI device 0  --   Partition Type: EFI
> 
> Part Start LBA End LBA Name
> Attributes
> Type GUID
> Partition GUID
>   1 0x0800 0x001007ff ""
> attrs: 0x
> type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
> guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c
>   2 0x00100800 0x037d8fff ""
> attrs: 0x
> type: 0fc63daf-8483-4772-8e79-3d69d8477de4
> guid: 965c59ee-1822-4326-90d2-b02446050059
>   3 0x037d9000 0x03ba27ff ""
> attrs: 0x
> type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
> guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17
> 
> $ sudo blkid
> /dev/sda1: UUID="819A-4923" TYPE="vfat"
> /dev/sda2: UUID="b2aaf743-0418-4d90-94cc-3e6108d7d968" TYPE="ext4"
> /dev/sda3: UUID="742df38d-6a50-4b47-a39a-c0076b0cc057" TYPE="swap"
> 
> Does anyone know? I'd like U-Boot to be able to show the same
> information as well as the TYPE.

Hmm.  A quick test here shows that it _is_ matching for MBR style
partition tables (which is what is common for TI/armv7 and why
ti_armv7_common.h grabs the likely rootfs PARTUUID and boots with
root=PARTUUID= like I imagine you're trying).

-- 
Tom


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[U-Boot] Partition UUIDs in U-Boot and Linux (blkid vs 'part list')

[Simon Glass]

Hi,

I find that blkid provides different output from 'part list' and I'm
not sure why:

=> part list scsi 0

Partition Map for SCSI device 0  --   Partition Type: EFI

Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
  1 0x0800 0x001007ff ""
attrs: 0x
type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c
  2 0x00100800 0x037d8fff ""
attrs: 0x
type: 0fc63daf-8483-4772-8e79-3d69d8477de4
guid: 965c59ee-1822-4326-90d2-b02446050059
  3 0x037d9000 0x03ba27ff ""
attrs: 0x
type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17

$ sudo blkid
/dev/sda1: UUID="819A-4923" TYPE="vfat"
/dev/sda2: UUID="b2aaf743-0418-4d90-94cc-3e6108d7d968" TYPE="ext4"
/dev/sda3: UUID="742df38d-6a50-4b47-a39a-c0076b0cc057" TYPE="swap"

Does anyone know? I'd like U-Boot to be able to show the same
information as well as the TYPE.

Regards,
Simon
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Re: [U-Boot] [PATCH v2 2/2] armv8: s32v234: Introduce basic support for s32v234evb

[Alexander Graf]

On Apr 28, 2016, at 12:07 AM, Eddy Petrișor  wrote:

> From: Eddy Petrișor 
> 
> Add initial support for NXP's S32V234 SoC and S32V234EVB board.
> 
> The S32V230 family is designed to support computation-intensive applications
> for image processing. The S32V234, as part of the S32V230 family, is a
> high-performance automotive processor designed to support safe
> computation-intensive applications in the area of vision and sensor fusion.
> 
> Code originally writen by:
> Original-signed-off-by: Stoica Cosmin-Stefan 
> 
> Original-signed-off-by: Mihaela Martinas 
> Original-signed-off-by: Eddy Petrișor 
> 
> Signed-off-by: Eddy Petrișor 
> ---
> 

[…]

> +#define CONFIG_CMD_ENV
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "script=boot.scr\0" \
> + "uimage=uImage\0" \
> + "ramdisk=rootfs.uimg\0"\
> + "console=ttyLF0\0" \
> + "fdt_high=0x\0" \
> + "initrd_high=0x\0" \
> + "fdt_file=s32v234-evb.dtb\0" \
> + "fdt_addr=0xC200\0" \
> + "kernel_addr=0xC307FFC0\0" \
> + "ramdisk_addr=0xC400\0" \
> + "boot_fdt=try\0" \
> + "ip_dyn=yes\0" \
> + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
> + "mmcpart=1\0" \
> + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
> + "update_sd_firmware_filename=u-boot.imx\0" \
> + "update_sd_firmware=" \
> + "if test ${ip_dyn} = yes; then " \
> + "setenv get_cmd dhcp; " \
> + "else " \
> + "setenv get_cmd tftp; " \
> + "fi; " \
> + "if mmc dev ${mmcdev}; then "   \
> + "if ${get_cmd} ${update_sd_firmware_filename}; then " \
> + "setexpr fw_sz ${filesize} / 0x200; " \
> + "setexpr fw_sz ${fw_sz} + 1; "  \
> + "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
> + "fi; "  \
> + "fi\0" \
> + "mmcargs=setenv bootargs console=${console},${baudrate} " \
> + "root=${mmcroot}\0" \
> + "loadbootscript=" \
> + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
> + "bootscript=echo Running bootscript from mmc ...; " \
> + "source\0" \
> + "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${kernel_addr} 
> ${uimage}\0" \
> + "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} 
> ${ramdisk}\0" \
> + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
> + "jtagboot=echo Booting using jtag...; " \
> + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
> + "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
> + "run loaduimage; run loadramdisk; run loadfdt;"\
> + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
> + "mmcboot=echo Booting from mmc ...; " \
> + "run mmcargs; " \
> + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
> + "if run loadfdt; then " \
> + "bootm ${loadaddr} - ${fdt_addr}; " \
> + "else " \
> + "if test ${boot_fdt} = try; then " \
> + "bootm; " \
> + "else " \
> + "echo WARN: Cannot load the DT; " \
> + "fi; " \
> + "fi; " \
> + "else " \
> + "bootm; " \
> + "fi;\0" \
> + "netargs=setenv bootargs console=${console},${baudrate} " \
> + "root=/dev/nfs " \
> + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
> + "netboot=echo Booting from net ...; " \
> + "run netargs; " \
> + "if test ${ip_dyn} = yes; then " \
> + "setenv get_cmd dhcp; " \
> + "else " \
> + "setenv get_cmd tftp; " \
> + "fi; " \
> + "${get_cmd} ${uimage}; " \
> + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
> + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
> + "bootm ${loadaddr} - ${fdt_addr}; " \
> + "else " \
> + "if test ${boot_fdt} = try; then " \
> + "bootm; " \
> + "else " \
> + "echo WARN: Cannot load the DT; " \
> + "fi; " \
> + "fi; " \
> + "else " \
> + "bootm; " \
> + "fi;\0"
> +
> +#define CONFIG_BOOTCOMMAND \
> +"mmc dev ${mmcdev}; if mmc rescan; then " \
> +"if run loadbootscript; 

Re: [U-Boot] [PATCH 05/26] x86: irq: Enable SCI on IRQ9

[Stefan Roese]

Hi Bin,

On 07.05.2016 17:46, Bin Meng wrote:

On Sat, May 7, 2016 at 11:42 PM, Stefan Roese  wrote:

Hi Bin,


On 07.05.2016 16:06, Bin Meng wrote:


On Tue, May 3, 2016 at 8:31 PM, Stefan Roese  wrote:


Hi Bin,


On 02.05.2016 09:33, Bin Meng wrote:



By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to use IRQ9.

Signed-off-by: Bin Meng 
---

arch/x86/cpu/irq.c | 25
++
arch/x86/include/asm/irq.h |  4 
doc/device-tree-bindings/misc/intel,irq-router.txt |  5 +
3 files changed, 34 insertions(+)

diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index ae90b0c..487ac23 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -146,6 +146,9 @@ static int create_pirq_routing_table(struct udevice
*dev)
  priv->ibase &= ~0xf;
  }

+   priv->actl_8bit = fdtdec_get_bool(blob, node,
"intel,actl-8bit");
+   priv->actl_addr = fdtdec_get_int(blob, node, "intel,actl-addr",
0);
+
  cell = fdt_getprop(blob, node, "intel,pirq-routing", );
  if (!cell || len % sizeof(struct pirq_routing))
  return -EINVAL;
@@ -215,6 +218,24 @@ static int create_pirq_routing_table(struct udevice
*dev)
  return 0;
}

+#ifdef CONFIG_GENERATE_ACPI_TABLE
+static void irq_enable_sci(struct udevice *dev)
+{
+   struct irq_router *priv = dev_get_priv(dev);
+
+   if (priv->actl_8bit) {
+   /* Bit7 must be turned on to enable ACPI */
+   dm_pci_write_config8(dev->parent, priv->actl_addr,
0x80);
+   } else {
+   /* Write 0 to enable SCI on IRQ9 */
+   if (priv->config == PIRQ_VIA_PCI)
+   dm_pci_write_config32(dev->parent,
priv->actl_addr, 0);
+   else
+   writel(0, priv->ibase + priv->actl_addr);
+   }
+}
+#endif
+
int irq_router_common_init(struct udevice *dev)
{
  int ret;
@@ -228,6 +249,10 @@ int irq_router_common_init(struct udevice *dev)
  pirq_route_irqs(dev, pirq_routing_table->slots,
  get_irq_slot_count(pirq_routing_table));

+#ifdef CONFIG_GENERATE_ACPI_TABLE
+   irq_enable_sci(dev);
+#endif




Again, this could also use IS_ENABLED.



If changing to use IS_ENABLED here, buildman reports:

05: x86: irq: Enable SCI on IRQ9
 x86:  +   coreboot-x86 cougarcanyon2 minnowmax
chromebox_panther chromebook_samus crownbay conga-qeval20-qa3-e3845
efi-x86 bayleybay galileo chromebook_link
+   irq_enable_sci(dev);
+   ^
w+../arch/x86/cpu/irq.c: In function 'irq_router_common_init':
w+../arch/x86/cpu/irq.c:254:3: warning: implicit declaration of
function 'irq_enable_sci' [-Wimplicit-function-declaration]

This is due to irq_enable_sci() is wrapped by #ifdef
CONFIG_GENERATE_ACPI_TABLE and I don't think IS_ENABLED can be used
there.



Right. This only works in functions. I think the general rule is,
that the #ifdef in the code itself are much worse than "just"
around a whole function body. Thats why its okay (I think) to
do it this way.



So for this commit, leave it as it was?


What does the compiler generate when you remove the #ifdef
around the function body?

Thanks,
Stefan
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Re: [U-Boot] [PATCH 05/26] x86: irq: Enable SCI on IRQ9

[Bin Meng]

Hi Stefan,

On Sat, May 7, 2016 at 11:42 PM, Stefan Roese  wrote:
> Hi Bin,
>
>
> On 07.05.2016 16:06, Bin Meng wrote:
>>
>> On Tue, May 3, 2016 at 8:31 PM, Stefan Roese  wrote:
>>>
>>> Hi Bin,
>>>
>>>
>>> On 02.05.2016 09:33, Bin Meng wrote:


 By default SCI is disabled after power on. ACTL is the register to
 enable SCI and route it to PIC/APIC. To support both ACPI in PIC
 mode and APIC mode, configure SCI to use IRQ9.

 Signed-off-by: Bin Meng 
 ---

arch/x86/cpu/irq.c | 25
 ++
arch/x86/include/asm/irq.h |  4 
doc/device-tree-bindings/misc/intel,irq-router.txt |  5 +
3 files changed, 34 insertions(+)

 diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
 index ae90b0c..487ac23 100644
 --- a/arch/x86/cpu/irq.c
 +++ b/arch/x86/cpu/irq.c
 @@ -146,6 +146,9 @@ static int create_pirq_routing_table(struct udevice
 *dev)
  priv->ibase &= ~0xf;
  }

 +   priv->actl_8bit = fdtdec_get_bool(blob, node,
 "intel,actl-8bit");
 +   priv->actl_addr = fdtdec_get_int(blob, node, "intel,actl-addr",
 0);
 +
  cell = fdt_getprop(blob, node, "intel,pirq-routing", );
  if (!cell || len % sizeof(struct pirq_routing))
  return -EINVAL;
 @@ -215,6 +218,24 @@ static int create_pirq_routing_table(struct udevice
 *dev)
  return 0;
}

 +#ifdef CONFIG_GENERATE_ACPI_TABLE
 +static void irq_enable_sci(struct udevice *dev)
 +{
 +   struct irq_router *priv = dev_get_priv(dev);
 +
 +   if (priv->actl_8bit) {
 +   /* Bit7 must be turned on to enable ACPI */
 +   dm_pci_write_config8(dev->parent, priv->actl_addr,
 0x80);
 +   } else {
 +   /* Write 0 to enable SCI on IRQ9 */
 +   if (priv->config == PIRQ_VIA_PCI)
 +   dm_pci_write_config32(dev->parent,
 priv->actl_addr, 0);
 +   else
 +   writel(0, priv->ibase + priv->actl_addr);
 +   }
 +}
 +#endif
 +
int irq_router_common_init(struct udevice *dev)
{
  int ret;
 @@ -228,6 +249,10 @@ int irq_router_common_init(struct udevice *dev)
  pirq_route_irqs(dev, pirq_routing_table->slots,
  get_irq_slot_count(pirq_routing_table));

 +#ifdef CONFIG_GENERATE_ACPI_TABLE
 +   irq_enable_sci(dev);
 +#endif
>>>
>>>
>>>
>>> Again, this could also use IS_ENABLED.
>>>
>>
>> If changing to use IS_ENABLED here, buildman reports:
>>
>> 05: x86: irq: Enable SCI on IRQ9
>> x86:  +   coreboot-x86 cougarcanyon2 minnowmax
>> chromebox_panther chromebook_samus crownbay conga-qeval20-qa3-e3845
>> efi-x86 bayleybay galileo chromebook_link
>> +   irq_enable_sci(dev);
>> +   ^
>> w+../arch/x86/cpu/irq.c: In function 'irq_router_common_init':
>> w+../arch/x86/cpu/irq.c:254:3: warning: implicit declaration of
>> function 'irq_enable_sci' [-Wimplicit-function-declaration]
>>
>> This is due to irq_enable_sci() is wrapped by #ifdef
>> CONFIG_GENERATE_ACPI_TABLE and I don't think IS_ENABLED can be used
>> there.
>
>
> Right. This only works in functions. I think the general rule is,
> that the #ifdef in the code itself are much worse than "just"
> around a whole function body. Thats why its okay (I think) to
> do it this way.
>

So for this commit, leave it as it was?

Regards,
Bin
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Re: [U-Boot] [PATCH 05/26] x86: irq: Enable SCI on IRQ9

[Stefan Roese]

Hi Bin,

On 07.05.2016 16:06, Bin Meng wrote:

On Tue, May 3, 2016 at 8:31 PM, Stefan Roese  wrote:

Hi Bin,


On 02.05.2016 09:33, Bin Meng wrote:


By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to use IRQ9.

Signed-off-by: Bin Meng 
---

   arch/x86/cpu/irq.c | 25
++
   arch/x86/include/asm/irq.h |  4 
   doc/device-tree-bindings/misc/intel,irq-router.txt |  5 +
   3 files changed, 34 insertions(+)

diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index ae90b0c..487ac23 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -146,6 +146,9 @@ static int create_pirq_routing_table(struct udevice
*dev)
 priv->ibase &= ~0xf;
 }

+   priv->actl_8bit = fdtdec_get_bool(blob, node, "intel,actl-8bit");
+   priv->actl_addr = fdtdec_get_int(blob, node, "intel,actl-addr",
0);
+
 cell = fdt_getprop(blob, node, "intel,pirq-routing", );
 if (!cell || len % sizeof(struct pirq_routing))
 return -EINVAL;
@@ -215,6 +218,24 @@ static int create_pirq_routing_table(struct udevice
*dev)
 return 0;
   }

+#ifdef CONFIG_GENERATE_ACPI_TABLE
+static void irq_enable_sci(struct udevice *dev)
+{
+   struct irq_router *priv = dev_get_priv(dev);
+
+   if (priv->actl_8bit) {
+   /* Bit7 must be turned on to enable ACPI */
+   dm_pci_write_config8(dev->parent, priv->actl_addr, 0x80);
+   } else {
+   /* Write 0 to enable SCI on IRQ9 */
+   if (priv->config == PIRQ_VIA_PCI)
+   dm_pci_write_config32(dev->parent,
priv->actl_addr, 0);
+   else
+   writel(0, priv->ibase + priv->actl_addr);
+   }
+}
+#endif
+
   int irq_router_common_init(struct udevice *dev)
   {
 int ret;
@@ -228,6 +249,10 @@ int irq_router_common_init(struct udevice *dev)
 pirq_route_irqs(dev, pirq_routing_table->slots,
 get_irq_slot_count(pirq_routing_table));

+#ifdef CONFIG_GENERATE_ACPI_TABLE
+   irq_enable_sci(dev);
+#endif



Again, this could also use IS_ENABLED.



If changing to use IS_ENABLED here, buildman reports:

05: x86: irq: Enable SCI on IRQ9
x86:  +   coreboot-x86 cougarcanyon2 minnowmax
chromebox_panther chromebook_samus crownbay conga-qeval20-qa3-e3845
efi-x86 bayleybay galileo chromebook_link
+   irq_enable_sci(dev);
+   ^
w+../arch/x86/cpu/irq.c: In function 'irq_router_common_init':
w+../arch/x86/cpu/irq.c:254:3: warning: implicit declaration of
function 'irq_enable_sci' [-Wimplicit-function-declaration]

This is due to irq_enable_sci() is wrapped by #ifdef
CONFIG_GENERATE_ACPI_TABLE and I don't think IS_ENABLED can be used
there.


Right. This only works in functions. I think the general rule is,
that the #ifdef in the code itself are much worse than "just"
around a whole function body. Thats why its okay (I think) to
do it this way.

Thanks,
Stefan
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Re: [U-Boot] [PATCH] dm: core: Add dev_get_addr_ptr() to return a pointer to the reg address

[Stefan Roese]

Hi Simon,

On 07.05.2016 17:33, Simon Glass wrote:

Hi Bin,

On 7 May 2016 at 09:31, Bin Meng  wrote:

Hi Simon,

On Sat, May 7, 2016 at 11:19 PM, Simon Glass  wrote:

Hi Stefan,

On 20 April 2016 at 10:10, Simon Glass  wrote:

Hi Stefan,

On 20 April 2016 at 10:08, Stefan Roese  wrote:

On some platforms (e.g. x86), the return value of dev_get_addr() can't
be assigned to a pointer type variable directly. As there might be a
difference between the size of fdt_addr_t and the pointer type. On
x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So
assigning the register base directly in dev_get_addr() results in this
compilation warning:
   warning: cast to pointer from integer of different size

This patch introduces the new function dev_get_addr_ptr() that
returns a pointer to the 'reg' address that can be used by drivers
in this case.

Signed-off-by: Stefan Roese 
Cc: Simon Glass 
---
  drivers/core/device.c |  5 +
  include/dm/device.h   | 10 ++
  2 files changed, 15 insertions(+)


Reviewed-by: Simon Glass 

Request below...



diff --git a/drivers/core/device.c b/drivers/core/device.c
index 269087a..1322991 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -673,6 +673,11 @@ fdt_addr_t dev_get_addr(struct udevice *dev)
 return dev_get_addr_index(dev, 0);
  }

+void *dev_get_addr_ptr(struct udevice *dev)
+{
+   return (void *)(uintptr_t)dev_get_addr_index(dev, 0);
+}
+
  bool device_has_children(struct udevice *dev)
  {
 return !list_empty(>child_head);
diff --git a/include/dm/device.h b/include/dm/device.h
index dad7591..0bcbead 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -454,6 +454,16 @@ int device_find_next_child(struct udevice **devp);
  fdt_addr_t dev_get_addr(struct udevice *dev);

  /**
+ * dev_get_addr_ptr() - Return pointer to the address of the reg property
+ *  of a device
+ *
+ * @dev: Pointer to a device
+ *
+ * @return Pointer to addr


Please mention the error condition, e.g. ", or NULL if there is no
such property"


I'd like to get this applied. If you like I can fix this when applying?



Looks this was already applied an in mainline. See
28027521be95d27fcb83669e09ce3563bb4dd977


OK thanks, not sure what happened there.


Yes, IIRC, Heiko  applied it with the I2C DWC patches. I've also
added the comment in the header, so this should hopefully be okay.

Thanks,
Stefan
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Re: [U-Boot] [PATCH] dm: core: Add dev_get_addr_ptr() to return a pointer to the reg address

[Simon Glass]

Hi Bin,

On 7 May 2016 at 09:31, Bin Meng  wrote:
> Hi Simon,
>
> On Sat, May 7, 2016 at 11:19 PM, Simon Glass  wrote:
>> Hi Stefan,
>>
>> On 20 April 2016 at 10:10, Simon Glass  wrote:
>>> Hi Stefan,
>>>
>>> On 20 April 2016 at 10:08, Stefan Roese  wrote:
 On some platforms (e.g. x86), the return value of dev_get_addr() can't
 be assigned to a pointer type variable directly. As there might be a
 difference between the size of fdt_addr_t and the pointer type. On
 x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So
 assigning the register base directly in dev_get_addr() results in this
 compilation warning:
   warning: cast to pointer from integer of different size

 This patch introduces the new function dev_get_addr_ptr() that
 returns a pointer to the 'reg' address that can be used by drivers
 in this case.

 Signed-off-by: Stefan Roese 
 Cc: Simon Glass 
 ---
  drivers/core/device.c |  5 +
  include/dm/device.h   | 10 ++
  2 files changed, 15 insertions(+)
>>>
>>> Reviewed-by: Simon Glass 
>>>
>>> Request below...
>>>

 diff --git a/drivers/core/device.c b/drivers/core/device.c
 index 269087a..1322991 100644
 --- a/drivers/core/device.c
 +++ b/drivers/core/device.c
 @@ -673,6 +673,11 @@ fdt_addr_t dev_get_addr(struct udevice *dev)
 return dev_get_addr_index(dev, 0);
  }

 +void *dev_get_addr_ptr(struct udevice *dev)
 +{
 +   return (void *)(uintptr_t)dev_get_addr_index(dev, 0);
 +}
 +
  bool device_has_children(struct udevice *dev)
  {
 return !list_empty(>child_head);
 diff --git a/include/dm/device.h b/include/dm/device.h
 index dad7591..0bcbead 100644
 --- a/include/dm/device.h
 +++ b/include/dm/device.h
 @@ -454,6 +454,16 @@ int device_find_next_child(struct udevice **devp);
  fdt_addr_t dev_get_addr(struct udevice *dev);

  /**
 + * dev_get_addr_ptr() - Return pointer to the address of the reg property
 + *  of a device
 + *
 + * @dev: Pointer to a device
 + *
 + * @return Pointer to addr
>>>
>>> Please mention the error condition, e.g. ", or NULL if there is no
>>> such property"
>>
>> I'd like to get this applied. If you like I can fix this when applying?
>>
>
> Looks this was already applied an in mainline. See
> 28027521be95d27fcb83669e09ce3563bb4dd977

OK thanks, not sure what happened there.

Regards,
Simon
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Re: [U-Boot] [PATCH] dm: core: Add dev_get_addr_ptr() to return a pointer to the reg address

[Bin Meng]

Hi Simon,

On Sat, May 7, 2016 at 11:19 PM, Simon Glass  wrote:
> Hi Stefan,
>
> On 20 April 2016 at 10:10, Simon Glass  wrote:
>> Hi Stefan,
>>
>> On 20 April 2016 at 10:08, Stefan Roese  wrote:
>>> On some platforms (e.g. x86), the return value of dev_get_addr() can't
>>> be assigned to a pointer type variable directly. As there might be a
>>> difference between the size of fdt_addr_t and the pointer type. On
>>> x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So
>>> assigning the register base directly in dev_get_addr() results in this
>>> compilation warning:
>>>   warning: cast to pointer from integer of different size
>>>
>>> This patch introduces the new function dev_get_addr_ptr() that
>>> returns a pointer to the 'reg' address that can be used by drivers
>>> in this case.
>>>
>>> Signed-off-by: Stefan Roese 
>>> Cc: Simon Glass 
>>> ---
>>>  drivers/core/device.c |  5 +
>>>  include/dm/device.h   | 10 ++
>>>  2 files changed, 15 insertions(+)
>>
>> Reviewed-by: Simon Glass 
>>
>> Request below...
>>
>>>
>>> diff --git a/drivers/core/device.c b/drivers/core/device.c
>>> index 269087a..1322991 100644
>>> --- a/drivers/core/device.c
>>> +++ b/drivers/core/device.c
>>> @@ -673,6 +673,11 @@ fdt_addr_t dev_get_addr(struct udevice *dev)
>>> return dev_get_addr_index(dev, 0);
>>>  }
>>>
>>> +void *dev_get_addr_ptr(struct udevice *dev)
>>> +{
>>> +   return (void *)(uintptr_t)dev_get_addr_index(dev, 0);
>>> +}
>>> +
>>>  bool device_has_children(struct udevice *dev)
>>>  {
>>> return !list_empty(>child_head);
>>> diff --git a/include/dm/device.h b/include/dm/device.h
>>> index dad7591..0bcbead 100644
>>> --- a/include/dm/device.h
>>> +++ b/include/dm/device.h
>>> @@ -454,6 +454,16 @@ int device_find_next_child(struct udevice **devp);
>>>  fdt_addr_t dev_get_addr(struct udevice *dev);
>>>
>>>  /**
>>> + * dev_get_addr_ptr() - Return pointer to the address of the reg property
>>> + *  of a device
>>> + *
>>> + * @dev: Pointer to a device
>>> + *
>>> + * @return Pointer to addr
>>
>> Please mention the error condition, e.g. ", or NULL if there is no
>> such property"
>
> I'd like to get this applied. If you like I can fix this when applying?
>

Looks this was already applied an in mainline. See
28027521be95d27fcb83669e09ce3563bb4dd977

Regards,
Bin
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Re: [U-Boot] [PATCH] dm: core: Add dev_get_addr_ptr() to return a pointer to the reg address

[Simon Glass]

Hi Stefan,

On 20 April 2016 at 10:10, Simon Glass  wrote:
> Hi Stefan,
>
> On 20 April 2016 at 10:08, Stefan Roese  wrote:
>> On some platforms (e.g. x86), the return value of dev_get_addr() can't
>> be assigned to a pointer type variable directly. As there might be a
>> difference between the size of fdt_addr_t and the pointer type. On
>> x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So
>> assigning the register base directly in dev_get_addr() results in this
>> compilation warning:
>>   warning: cast to pointer from integer of different size
>>
>> This patch introduces the new function dev_get_addr_ptr() that
>> returns a pointer to the 'reg' address that can be used by drivers
>> in this case.
>>
>> Signed-off-by: Stefan Roese 
>> Cc: Simon Glass 
>> ---
>>  drivers/core/device.c |  5 +
>>  include/dm/device.h   | 10 ++
>>  2 files changed, 15 insertions(+)
>
> Reviewed-by: Simon Glass 
>
> Request below...
>
>>
>> diff --git a/drivers/core/device.c b/drivers/core/device.c
>> index 269087a..1322991 100644
>> --- a/drivers/core/device.c
>> +++ b/drivers/core/device.c
>> @@ -673,6 +673,11 @@ fdt_addr_t dev_get_addr(struct udevice *dev)
>> return dev_get_addr_index(dev, 0);
>>  }
>>
>> +void *dev_get_addr_ptr(struct udevice *dev)
>> +{
>> +   return (void *)(uintptr_t)dev_get_addr_index(dev, 0);
>> +}
>> +
>>  bool device_has_children(struct udevice *dev)
>>  {
>> return !list_empty(>child_head);
>> diff --git a/include/dm/device.h b/include/dm/device.h
>> index dad7591..0bcbead 100644
>> --- a/include/dm/device.h
>> +++ b/include/dm/device.h
>> @@ -454,6 +454,16 @@ int device_find_next_child(struct udevice **devp);
>>  fdt_addr_t dev_get_addr(struct udevice *dev);
>>
>>  /**
>> + * dev_get_addr_ptr() - Return pointer to the address of the reg property
>> + *  of a device
>> + *
>> + * @dev: Pointer to a device
>> + *
>> + * @return Pointer to addr
>
> Please mention the error condition, e.g. ", or NULL if there is no
> such property"

I'd like to get this applied. If you like I can fix this when applying?

>
>> + */
>> +void *dev_get_addr_ptr(struct udevice *dev);
>> +
>> +/**
>>   * dev_get_addr_index() - Get the indexed reg property of a device
>>   *
>>   * @dev: Pointer to a device
>> --
>> 2.8.1


Regards,
Simon
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Re: [U-Boot] [PATCH V4 3/4] dm: spi: introduce dm api

[Simon Glass]

On 2 May 2016 at 20:02, Peng Fan  wrote:
> Introduce dm_spi_claim_bus, dm_spi_release_bus and dm_spi_xfer
> Convert spi_claim_bus, spi_release_bus and spi_xfer to use
> the new API.
>
> Signed-off-by: Peng Fan 
> Cc: Simon Glass 
> Cc: Jagan Teki 
> ---
>
>
> V4:
>  Convert spi_claim_bus, spi_release_bus and spi_xfer to call the use APIs.
> V3:
>  As Simon suggested, introduce new API. New patch.
>
>  drivers/spi/spi-uclass.c | 28 +++---
>  include/spi.h| 52 
> 
>  2 files changed, 73 insertions(+), 7 deletions(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 1/2] serial: Introduce linflex uart support

[Bin Meng]

+Simon

Hi Eddy,

On Thu, Apr 28, 2016 at 6:07 AM, Eddy Petrișor  wrote:
> From: Stoica Cosmin-Stefan 
>
> The Linflex module is integrated on some NXP automotive SoCs part of the 
> former
> Freescale portfolio, like S32V234, an SoC for Advanced Driver Assistance
> Systems.
>
> Original-signed-off-by: Stoica Cosmin-Stefan 
> 
> Original-signed-off-by: Chircu Bogdan 
> Original-signed-off-by: Depons Eric 
> Original-signed-off-by: Eddy Petrișor 
>
> Signed-off-by: Eddy Petrișor 
> ---
>
> Notes:
> Changes in v2:
> Added support for device model. Compatibility with non-DM code is kept
> for easier synchronization with the code on the vendor branch where the
> conversion to DM is not done for all boards.

I see this is a NEW driver. Then you should only add DM support. We
don't want to carry forward any legacy stuff.

>
>  drivers/serial/Makefile |   1 +
>  drivers/serial/serial_linflexuart.c | 274 
> 
>  2 files changed, 275 insertions(+)
>  create mode 100644 drivers/serial/serial_linflexuart.c
>

[snip]

Regards,
Bin
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[U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support

[Bin Meng]

Remove ACPI from the TODO list and add a new section to document
current ACPI support in U-Boot.

Signed-off-by: Bin Meng 

---

Changes in v2:
- Update ACPI support status in more details: what's supported,
  what's not supported, what's optional.

 doc/README.x86 | 44 +++-
 1 file changed, 43 insertions(+), 1 deletion(-)

diff --git a/doc/README.x86 b/doc/README.x86
index 732d375..ce806ee 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -958,12 +958,52 @@ transformations. Remember to add attribution to coreboot 
for new files added
 to U-Boot. This should go at the top of each file and list the coreboot
 filename where the code originated.
 
+ACPI Support Status
+---
+Advanced Configuration and Power Interface (ACPI) [16] aims to establish
+industry-standard interfaces enabling OS-directed configuration, power
+management, and thermal management of mobile, desktop, and server platforms.
+
+Linux can boot without ACPI with "acpi=off" command line parameter, but
+with ACPI the kernel gains the capabilities to handle power management.
+For Windows, ACPI is a must-have firmware feature since Windows Vista.
+CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
+U-Boot. This requires Intel ACPI compiler to be installed on your host to
+compile ACPI DSDT table written in ASL format to AML format. You can get
+the compiler via "apt-get install iasl" if you are on Ubuntu or download
+the source from [17] to compile one by yourself.
+
+Current ACPI support in U-Boot is not complete. More features will be added
+in the future. The status as of today is:
+
+ * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
+ * Support one static DSDT table only, compiled by Intel ACPI compiler.
+ * Support S0/S5, reboot and shutdown from OS.
+ * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
+ * Support ACPI interrupts with SCI only.
+
+Features not supported so far (to make it a complete ACPI solution):
+ * S3 (Suspend to RAM), S4 (Suspend to Disk).
+ * Install and boot Ubuntu 14.04 (or above) from U-Boot with legacy interface.
+ * Install and boot Windows 8.1/10 from U-Boot with legacy interface.
+
+Features that are optional:
+ * ACPI global NVS support. We may need it to simplify ASL code logic if
+   utilizing NVS variables. Most likely we will need this sooner or later.
+ * Dynamic AML bytecodes insertion at run-time. We may need this to support
+   SSDT table generation and DSDT fix up.
+ * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
+   those legacy stuff into U-Boot. ACPI spec allows a system that does not
+   support SMI (a legacy-free system).
+
+So far ACPI is enabled on BayTrail based boards. Testing was done by booting
+a pre-installed Ubuntu 14.04 from a SATA drive. Most devices seem to work
+correctly and the board can respond a reboot/shutdown command from Ubuntu.
 
 TODO List
 -
 - Audio
 - Chrome OS verified boot
-- SMI and ACPI support, to provide platform info and facilities to Linux
 
 References
 --
@@ -982,3 +1022,5 @@ References
 [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
 [14] http://www.seabios.org/SeaBIOS
 [15] doc/device-tree-bindings/misc/intel,irq-router.txt
+[16] http://www.acpi.info
+[17] https://www.acpica.org/downloads
-- 
1.8.2.1

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[U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy

[Bin Meng]

This updates the doc for the following places:
- Mention CRB for Bayley Bay
- Mention Congatec QEVAL 2.0 & conga-QA3/E3845
- Limit part of the QEMU paragraphs to 80 cols
- Correct some typos (drive, it's, Ubuntu)
- Add description for "console=ttyS0,115200"
- Remove CONFIG_BOOTDELAY description which is already
  in x86-common.h

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 

---

Changes in v2:
- Update support board list, adding Congatec QEVAL 2.0 & conga-QA3/E3845

 doc/README.x86 | 41 ++---
 1 file changed, 18 insertions(+), 23 deletions(-)

diff --git a/doc/README.x86 b/doc/README.x86
index c5c3010..732d375 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -23,7 +23,8 @@ In this case, known as bare mode, from the fact that it runs 
on the
 'bare metal', U-Boot acts like a BIOS replacement. The following platforms
 are supported:
 
-   - Bayley Bay
+   - Bayley Bay CRB
+   - Congatec QEVAL 2.0 & conga-QA3/E3845
- Cougar Canyon 2 CRB
- Crown Bay CRB
- Galileo
@@ -412,18 +413,19 @@ If you want to check both consoles, use '-serial stdio'.
 Multicore is also supported by QEMU via '-smp n' where n is the number of cores
 to instantiate. Note, the maximum supported CPU number in QEMU is 255.
 
-The fw_cfg interface in QEMU also provides information about kernel data, 
initrd,
-command-line arguments and more. U-Boot supports directly accessing these 
informtion
-from fw_cfg interface, this saves the time of loading them from hard disk or
-network again, through emulated devices. To use it , simply providing them in
-QEMU command line:
+The fw_cfg interface in QEMU also provides information about kernel data,
+initrd, command-line arguments and more. U-Boot supports directly accessing
+these informtion from fw_cfg interface, which saves the time of loading them
+from hard disk or network again, through emulated devices. To use it , simply
+providing them in QEMU command line:
 
 $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel 
/path/to/bzImage
 -append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
 
 Note: -initrd and -smp are both optional
 
-Then start QEMU, in U-Boot command line use the following U-Boot command to 
setup kernel:
+Then start QEMU, in U-Boot command line use the following U-Boot command to
+setup kernel:
 
  => qfw
 qfw - QEMU firmware interface
@@ -437,8 +439,8 @@ qfw 
 => qfw load
 loading kernel to address 0100 size 5d9d30 initrd 0400 size 1b1ab50
 
-Here the kernel (bzImage) is loaded to 0100 and initrd is to 0400. 
Then, 'zboot'
-can be used to boot the kernel:
+Here the kernel (bzImage) is loaded to 0100 and initrd is to 0400. 
Then,
+'zboot' can be used to boot the kernel:
 
 => zboot 0200 - 0400 1b1ab50
 
@@ -490,8 +492,8 @@ Booting Ubuntu
 --
 As an example of how to set up your boot flow with U-Boot, here are
 instructions for starting Ubuntu from U-Boot. These instructions have been
-tested on Minnowboard MAX with a SATA driver but are equally applicable on
-other platforms and other media. There are really only four steps and its a
+tested on Minnowboard MAX with a SATA drive but are equally applicable on
+other platforms and other media. There are really only four steps and it's a
 very simple script, but a more detailed explanation is provided here for
 completeness.
 
@@ -499,7 +501,7 @@ Note: It is possible to set up U-Boot to boot automatically 
using syslinux.
 It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
 GUID. If you figure these out, please post patches to this README.
 
-Firstly, you will need Ubunutu installed on an available disk. It should be
+Firstly, you will need Ubuntu installed on an available disk. It should be
 possible to make U-Boot start a USB start-up disk but for now let's assume
 that you used another boot loader to install Ubuntu.
 
@@ -659,7 +661,7 @@ U-Boot:
Loading bzImage at address 10 (5805728 bytes)
Magic signature found
Initial RAM disk at linear address 0x0400, size 19215259 bytes
-   Kernel command line: "console=ttyS0,115200 
root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
+   Kernel command line: 
"root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
 
Starting kernel ...
 
@@ -679,13 +681,14 @@ above commands into a script since then it will be faster.
   240,329  ahci
 1,422,704  vesa display
 
-Now the kernel actually starts:
+Now the kernel actually starts: (if you want to examine kernel boot up message
+on the serial console, append "console=ttyS0,115200" to the kernel command 
line)
 
[0.00] Initializing cgroup subsys cpuset
[0.00] Initializing cgroup subsys cpu
[0.00] Initializing cgroup subsys cpuacct
[0.00] Linux version 3.13.0-58-generic (buildd@allspice) 

[U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on

[Bin Meng]

Remove the kernel boot parameter acpi=off so that kernel can turn on
ACPI support.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 
---

Changes in v2: None

 include/configs/x86-common.h | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index ea815c2..1e0f451 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -207,14 +207,19 @@
 #define CONFIG_HOSTNAMEx86
 #define CONFIG_BOOTFILE"bzImage"
 #define CONFIG_LOADADDR0x100
-#define CONFIG_RAMDISK_ADDR0x400
+#define CONFIG_RAMDISK_ADDR0x400
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+#define CONFIG_OTHBOOTARGS "othbootargs=\0"
+#else
+#define CONFIG_OTHBOOTARGS "othbootargs=acpi=off\0"
+#endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS  \
CONFIG_STD_DEVICES_SETTINGS \
"pciconfighost=1\0" \
"netdev=eth0\0" \
"consoledev=ttyS0\0"\
-   "othbootargs=acpi=off\0"\
+   CONFIG_OTHBOOTARGS  \
"ramdiskaddr=0x400\0"   \
"ramdiskfile=initramfs.gz\0"
 
-- 
1.8.2.1

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[U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables

[Bin Meng]

FADT/MADT tables are platform specific. Generate them for BayTrail.

Signed-off-by: Bin Meng 

---

Changes in v2:
- Use existing macros in FADT whenever possible
- Rename acpi_madt_irq_overrides() to acpi_create_madt_irq_overrides()
  for consistency, and make it static
- Return table length in acpi_create_madt_irq_overrides() so that the
  code logic in acpi_fill_madt() looks consistent (eg: current += ...)

 arch/x86/cpu/baytrail/Makefile |   1 +
 arch/x86/cpu/baytrail/acpi.c   | 163 +
 2 files changed, 164 insertions(+)
 create mode 100644 arch/x86/cpu/baytrail/acpi.c

diff --git a/arch/x86/cpu/baytrail/Makefile b/arch/x86/cpu/baytrail/Makefile
index 5be5491..a0216f3 100644
--- a/arch/x86/cpu/baytrail/Makefile
+++ b/arch/x86/cpu/baytrail/Makefile
@@ -8,3 +8,4 @@ obj-y += cpu.o
 obj-y += early_uart.o
 obj-y += fsp_configs.o
 obj-y += valleyview.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
new file mode 100644
index 000..1d54f7d
--- /dev/null
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2016, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
+ void *dsdt)
+{
+   struct acpi_table_header *header = &(fadt->header);
+   u16 pmbase = ACPI_BASE_ADDRESS;
+
+   memset((void *)fadt, 0, sizeof(struct acpi_fadt));
+
+   acpi_fill_header(header, "FACP");
+   header->length = sizeof(struct acpi_fadt);
+   header->revision = 4;
+
+   fadt->firmware_ctrl = (u32)facs;
+   fadt->dsdt = (u32)dsdt;
+   fadt->preferred_pm_profile = ACPI_PM_MOBILE;
+   fadt->sci_int = 9;
+   fadt->smi_cmd = 0;
+   fadt->acpi_enable = 0;
+   fadt->acpi_disable = 0;
+   fadt->s4bios_req = 0;
+   fadt->pstate_cnt = 0;
+   fadt->pm1a_evt_blk = pmbase;
+   fadt->pm1b_evt_blk = 0x0;
+   fadt->pm1a_cnt_blk = pmbase + 0x4;
+   fadt->pm1b_cnt_blk = 0x0;
+   fadt->pm2_cnt_blk = pmbase + 0x50;
+   fadt->pm_tmr_blk = pmbase + 0x8;
+   fadt->gpe0_blk = pmbase + 0x20;
+   fadt->gpe1_blk = 0;
+   fadt->pm1_evt_len = 4;
+   fadt->pm1_cnt_len = 2;
+   fadt->pm2_cnt_len = 1;
+   fadt->pm_tmr_len = 4;
+   fadt->gpe0_blk_len = 8;
+   fadt->gpe1_blk_len = 0;
+   fadt->gpe1_base = 0;
+   fadt->cst_cnt = 0;
+   fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
+   fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
+   fadt->flush_size = 0;
+   fadt->flush_stride = 0;
+   fadt->duty_offset = 1;
+   fadt->duty_width = 0;
+   fadt->day_alrm = 0x0d;
+   fadt->mon_alrm = 0x00;
+   fadt->century = 0x00;
+   fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
+   fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+   ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
+   ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_RESET_REGISTER |
+   ACPI_FADT_PLATFORM_CLOCK;
+
+   fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
+   fadt->reset_reg.bit_width = 8;
+   fadt->reset_reg.bit_offset = 0;
+   fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
+   fadt->reset_reg.addrl = IO_PORT_RESET;
+   fadt->reset_reg.addrh = 0;
+   fadt->reset_value = SYS_RST | RST_CPU;
+
+   fadt->x_firmware_ctl_l = (u32)facs;
+   fadt->x_firmware_ctl_h = 0;
+   fadt->x_dsdt_l = (u32)dsdt;
+   fadt->x_dsdt_h = 0;
+
+   fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+   fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
+   fadt->x_pm1a_evt_blk.bit_offset = 0;
+   fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
+   fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk;
+   fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+   fadt->x_pm1b_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+   fadt->x_pm1b_evt_blk.bit_width = 0;
+   fadt->x_pm1b_evt_blk.bit_offset = 0;
+   fadt->x_pm1b_evt_blk.access_size = 0;
+   fadt->x_pm1b_evt_blk.addrl = 0x0;
+   fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+   fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+   fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
+   fadt->x_pm1a_cnt_blk.bit_offset = 0;
+   fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
+   fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk;
+   fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+   fadt->x_pm1b_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+   fadt->x_pm1b_cnt_blk.bit_width = 0;
+   fadt->x_pm1b_cnt_blk.bit_offset = 0;
+   fadt->x_pm1b_cnt_blk.access_size = 0;
+   fadt->x_pm1b_cnt_blk.addrl = 0x0;
+   fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+   fadt->x_pm2_cnt_blk.space_id = 

[U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards

[Bin Meng]

Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 
---

Changes in v2: None

 board/congatec/conga-qeval20-qa3-e3845/.gitignore | 3 +++
 board/intel/bayleybay/.gitignore  | 3 +++
 board/intel/minnowmax/.gitignore  | 3 +++
 3 files changed, 9 insertions(+)
 create mode 100644 board/congatec/conga-qeval20-qa3-e3845/.gitignore
 create mode 100644 board/intel/bayleybay/.gitignore
 create mode 100644 board/intel/minnowmax/.gitignore

diff --git a/board/congatec/conga-qeval20-qa3-e3845/.gitignore 
b/board/congatec/conga-qeval20-qa3-e3845/.gitignore
new file mode 100644
index 000..6eb8a54
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/intel/bayleybay/.gitignore b/board/intel/bayleybay/.gitignore
new file mode 100644
index 000..6eb8a54
--- /dev/null
+++ b/board/intel/bayleybay/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/intel/minnowmax/.gitignore b/board/intel/minnowmax/.gitignore
new file mode 100644
index 000..6eb8a54
--- /dev/null
+++ b/board/intel/minnowmax/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
-- 
1.8.2.1

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[U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary

[Bin Meng]

Per ACPI spec, the FACS table address must be aligned to a 64 byte
boundary (Windows checks this, but Linux does not).

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 

---

Changes in v2:
- Add comments before the 64 byte alignment for FACS

 arch/x86/lib/acpi_table.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 7cde9c8..056d012 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -339,7 +339,11 @@ u32 write_acpi_tables(u32 start)
current = ALIGN(current, 16);
xsdt = (struct acpi_xsdt *)current;
current += sizeof(struct acpi_xsdt);
-   current = ALIGN(current, 16);
+   /*
+* Per ACPI spec, the FACS table address must be aligned to a 64 byte
+* boundary (Windows checks this, but Linux does not).
+*/
+   current = ALIGN(current, 64);
 
/* clear all table memory */
memset((void *)start, 0, current - start);
-- 
1.8.2.1

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[U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files

[Bin Meng]

This adds basic BayTrail platform ASL files. They are intended to be
included in dsdt.asl of any board that is based on this platform.

Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for
now. They will be added in the future.

Signed-off-by: Bin Meng 

---

Changes in v2:
- Reserve IRQ3 and IRQ4 in the IRQ links to support external SuperIO
  chipset serial ports
- Fix SIO1 and SIO2 interrupt mapping in irqroute.h

 .../include/asm/arch-baytrail/acpi/irq_helper.h| 111 +
 .../include/asm/arch-baytrail/acpi/irqlinks.asl| 489 +
 .../include/asm/arch-baytrail/acpi/irqroute.asl|  48 ++
 arch/x86/include/asm/arch-baytrail/acpi/irqroute.h |  27 ++
 arch/x86/include/asm/arch-baytrail/acpi/lpc.asl| 121 +
 .../include/asm/arch-baytrail/acpi/platform.asl|  33 ++
 .../include/asm/arch-baytrail/acpi/sleepstates.asl |  13 +
 .../asm/arch-baytrail/acpi/southcluster.asl| 211 +
 arch/x86/include/asm/arch-baytrail/acpi/usb.asl|  34 ++
 arch/x86/include/asm/arch-baytrail/acpi/xhci.asl   |  31 ++
 arch/x86/include/asm/arch-baytrail/device.h|  74 
 arch/x86/include/asm/arch-baytrail/iomap.h |  70 +++
 arch/x86/include/asm/arch-baytrail/irq.h   |  86 
 13 files changed, 1348 insertions(+)
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/platform.asl
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/usb.asl
 create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
 create mode 100644 arch/x86/include/asm/arch-baytrail/device.h
 create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h
 create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h

diff --git a/arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h 
b/arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
new file mode 100644
index 000..2c3585a
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2014 Sage Electronics Engineering, LLC.
+ * Copyright (C) 2016 Bin Meng 
+ *
+ * Modified from coreboot src/soc/intel/baytrail/include/soc/irq_helper.h
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * This file intentionally gets included multiple times, to set pic and apic
+ * modes, so should not have guard statements added.
+ */
+
+/*
+ * This file will use irqroute.asl and irqroute.h to generate the ACPI IRQ
+ * routing for the platform being compiled.
+ *
+ * This method uses #defines in irqroute.h along with the macros contained
+ * in this file to generate an IRQ routing for each PCI device in the system.
+ */
+
+#undef PCI_DEV_PIRQ_ROUTES
+#undef PCI_DEV_PIRQ_ROUTE
+#undef ACPI_DEV_IRQ
+#undef PCIE_BRIDGE_DEV
+#undef RP_IRQ_ROUTES
+#undef ROOTPORT_METHODS
+#undef ROOTPORT_IRQ_ROUTES
+#undef RP_METHOD
+
+#if defined(PIC_MODE)
+
+#define ACPI_DEV_IRQ(dev_, pin_, pin_name_) \
+   Package() { ## dev_ ## , pin_, \_SB.PCI0.LPCB.LNK ## pin_name_, 0 }
+
+#define RP_IRQ_ROUTES(prefix_, func_, a_, b_, c_, d_) \
+Name(prefix_ ## func_ ## P, Package() \
+{ \
+   ACPI_DEV_IRQ(0x, 0, a_), \
+   ACPI_DEV_IRQ(0x, 1, b_), \
+   ACPI_DEV_IRQ(0x, 2, c_), \
+   ACPI_DEV_IRQ(0x, 3, d_), \
+})
+
+/* define as blank so ROOTPORT_METHODS only gets inserted once */
+#define ROOTPORT_METHODS(prefix_, dev_)
+
+#else /* defined(PIC_MODE) */
+
+#define ACPI_DEV_IRQ(dev_, pin_, pin_name_) \
+   Package() { ## dev_ ## , pin_, 0, PIRQ ## pin_name_ ## _APIC_IRQ }
+
+#define RP_IRQ_ROUTES(prefix_, func_, a_, b_, c_, d_) \
+Name(prefix_ ## func_ ## A, Package() \
+{ \
+   ACPI_DEV_IRQ(0x, 0, a_), \
+   ACPI_DEV_IRQ(0x, 1, b_), \
+   ACPI_DEV_IRQ(0x, 2, c_), \
+   ACPI_DEV_IRQ(0x, 3, d_), \
+})
+
+#define ROOTPORT_METHODS(prefix_, dev_) \
+   RP_METHOD(prefix_, dev_, 0) \
+   RP_METHOD(prefix_, dev_, 1) \
+   RP_METHOD(prefix_, dev_, 2) \
+   RP_METHOD(prefix_, dev_, 3) \
+   RP_METHOD(prefix_, dev_, 4) \
+   RP_METHOD(prefix_, dev_, 5) \
+   RP_METHOD(prefix_, dev_, 6) \
+   RP_METHOD(prefix_, dev_, 7)
+
+#endif /* defined(PIC_MODE) */
+
+#define PCI_DEV_PIRQ_ROUTE(dev_, a_, b_, c_, d_) \
+   ACPI_DEV_IRQ(dev_, 0, a_), \
+   ACPI_DEV_IRQ(dev_, 1, b_), \
+   ACPI_DEV_IRQ(dev_, 2, c_), \
+   ACPI_DEV_IRQ(dev_, 3, d_)
+
+#define PCIE_BRIDGE_DEV(prefix_, dev_, a_, b_, c_, d_) \
+  

[U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards

[Bin Meng]

Enable ACPI table generation by creating a DSDT table for all baytrail
boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 
---

Changes in v2: None

 board/congatec/conga-qeval20-qa3-e3845/Makefile   |  1 +
 board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl | 13 +
 board/congatec/conga-qeval20-qa3-e3845/dsdt.asl   | 14 ++
 board/intel/bayleybay/Makefile|  1 +
 board/intel/bayleybay/acpi/mainboard.asl  | 11 +++
 board/intel/bayleybay/dsdt.asl| 14 ++
 board/intel/minnowmax/Makefile|  1 +
 board/intel/minnowmax/acpi/mainboard.asl  | 11 +++
 board/intel/minnowmax/dsdt.asl| 14 ++
 configs/bayleybay_defconfig   |  1 +
 configs/conga-qeval20-qa3-e3845_defconfig |  1 +
 configs/minnowmax_defconfig   |  1 +
 12 files changed, 83 insertions(+)
 create mode 100644 board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
 create mode 100644 board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
 create mode 100644 board/intel/bayleybay/acpi/mainboard.asl
 create mode 100644 board/intel/bayleybay/dsdt.asl
 create mode 100644 board/intel/minnowmax/acpi/mainboard.asl
 create mode 100644 board/intel/minnowmax/dsdt.asl

diff --git a/board/congatec/conga-qeval20-qa3-e3845/Makefile 
b/board/congatec/conga-qeval20-qa3-e3845/Makefile
index 23b8748..b784510 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/Makefile
+++ b/board/congatec/conga-qeval20-qa3-e3845/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-y  += conga-qeval20-qa3.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl 
b/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
new file mode 100644
index 000..eace459
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2016, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+   Name(_HID, EISAID("PNP0C0C"))
+}
+
+/* TODO: Need add Winbond SuperIO chipset W83627 ASL codes */
diff --git a/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl 
b/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
new file mode 100644
index 000..6042011
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x0001)
+{
+   /* platform specific */
+   #include 
+
+   /* board specific */
+   #include "acpi/mainboard.asl"
+}
diff --git a/board/intel/bayleybay/Makefile b/board/intel/bayleybay/Makefile
index 88b5aad..52dda7d 100644
--- a/board/intel/bayleybay/Makefile
+++ b/board/intel/bayleybay/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-y  += bayleybay.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/bayleybay/acpi/mainboard.asl 
b/board/intel/bayleybay/acpi/mainboard.asl
new file mode 100644
index 000..21785ea
--- /dev/null
+++ b/board/intel/bayleybay/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+   Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/intel/bayleybay/dsdt.asl b/board/intel/bayleybay/dsdt.asl
new file mode 100644
index 000..6042011
--- /dev/null
+++ b/board/intel/bayleybay/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x0001)
+{
+   /* platform specific */
+   #include 
+
+   /* board specific */
+   #include "acpi/mainboard.asl"
+}
diff --git a/board/intel/minnowmax/Makefile b/board/intel/minnowmax/Makefile
index 1a61432..73e5a8f 100644
--- a/board/intel/minnowmax/Makefile
+++ b/board/intel/minnowmax/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-y  += minnowmax.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/minnowmax/acpi/mainboard.asl 
b/board/intel/minnowmax/acpi/mainboard.asl
new file mode 100644
index 000..21785ea
--- /dev/null
+++ b/board/intel/minnowmax/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+   Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/intel/minnowmax/dsdt.asl b/board/intel/minnowmax/dsdt.asl
new file mode 100644
index 000..6042011
--- /dev/null
+++ 

[U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines

[Bin Meng]

Use u32 instead of unsigned long in the table write routines, as
other routines do.

Signed-off-by: Bin Meng 

---

Changes in v2:
- Update several more places to use u32 in acpi_table.c

 arch/x86/include/asm/acpi_table.h |  4 ++--
 arch/x86/lib/acpi_table.c | 14 +++---
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/acpi_table.h 
b/arch/x86/include/asm/acpi_table.h
index ad39902..44f528e 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -307,12 +307,12 @@ struct acpi_mcfg_mmconfig {
 void acpi_fill_header(struct acpi_table_header *header, char *signature);
 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
  void *dsdt);
-unsigned long acpi_create_madt_lapics(unsigned long current);
+u32 acpi_create_madt_lapics(u32 current);
 int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
u32 addr, u32 gsi_base);
 int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
 u8 bus, u8 source, u32 gsirq, u16 flags);
 int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
   u8 cpu, u16 flags, u8 lint);
-unsigned long acpi_fill_madt(unsigned long current);
+u32 acpi_fill_madt(u32 current);
 u32 write_acpi_tables(u32 start);
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index c2009ef..7cde9c8 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -183,7 +183,7 @@ static int acpi_create_madt_lapic(struct acpi_madt_lapic 
*lapic,
return lapic->length;
 }
 
-unsigned long acpi_create_madt_lapics(unsigned long current)
+u32 acpi_create_madt_lapics(u32 current)
 {
struct udevice *dev;
 
@@ -241,7 +241,7 @@ int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi 
*lapic_nmi,
 static void acpi_create_madt(struct acpi_madt *madt)
 {
struct acpi_table_header *header = &(madt->header);
-   unsigned long current = (unsigned long)madt + sizeof(struct acpi_madt);
+   u32 current = (u32)madt + sizeof(struct acpi_madt);
 
memset((void *)madt, 0, sizeof(struct acpi_madt));
 
@@ -258,7 +258,7 @@ static void acpi_create_madt(struct acpi_madt *madt)
current = acpi_fill_madt(current);
 
/* (Re)calculate length and checksum */
-   header->length = current - (unsigned long)madt;
+   header->length = current - (u32)madt;
 
header->checksum = table_compute_checksum((void *)madt, header->length);
 }
@@ -276,7 +276,7 @@ static int acpi_create_mcfg_mmconfig(struct 
acpi_mcfg_mmconfig *mmconfig,
return sizeof(struct acpi_mcfg_mmconfig);
 }
 
-static unsigned long acpi_fill_mcfg(unsigned long current)
+static u32 acpi_fill_mcfg(u32 current)
 {
current += acpi_create_mcfg_mmconfig
((struct acpi_mcfg_mmconfig *)current,
@@ -289,7 +289,7 @@ static unsigned long acpi_fill_mcfg(unsigned long current)
 static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
 {
struct acpi_table_header *header = &(mcfg->header);
-   unsigned long current = (unsigned long)mcfg + sizeof(struct acpi_mcfg);
+   u32 current = (u32)mcfg + sizeof(struct acpi_mcfg);
 
memset((void *)mcfg, 0, sizeof(struct acpi_mcfg));
 
@@ -303,7 +303,7 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
current = acpi_fill_mcfg(current);
 
/* (Re)calculate length and checksum */
-   header->length = current - (unsigned long)mcfg;
+   header->length = current - (u32)mcfg;
header->checksum = table_compute_checksum((void *)mcfg, header->length);
 }
 
@@ -366,7 +366,7 @@ u32 write_acpi_tables(u32 start)
current += dsdt->length - sizeof(struct acpi_table_header);
 
/* (Re)calculate length and checksum */
-   dsdt->length = current - (unsigned long)dsdt;
+   dsdt->length = current - (u32)dsdt;
dsdt->checksum = 0;
dsdt->checksum = table_compute_checksum((void *)dsdt,
dsdt->length);
-- 
1.8.2.1

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[U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries

[Bin Meng]

This adds several generic ASL libraries that can be included by
other ASL files, which are:

- debug.asl: for debug output using POST I/O port and legacy serial port
- globutil.asl: for string compare routines
- statdef.asl: for _STA status values

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 
---

Changes in v2: None

 arch/x86/include/asm/acpi/debug.asl| 136 +
 arch/x86/include/asm/acpi/globutil.asl | 113 +++
 arch/x86/include/asm/acpi/statdef.asl  |  82 
 3 files changed, 331 insertions(+)
 create mode 100644 arch/x86/include/asm/acpi/debug.asl
 create mode 100644 arch/x86/include/asm/acpi/globutil.asl
 create mode 100644 arch/x86/include/asm/acpi/statdef.asl

diff --git a/arch/x86/include/asm/acpi/debug.asl 
b/arch/x86/include/asm/acpi/debug.asl
new file mode 100644
index 000..8e7b603
--- /dev/null
+++ b/arch/x86/include/asm/acpi/debug.asl
@@ -0,0 +1,136 @@
+/*
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2016 Bin Meng 
+ *
+ * Modified from coreboot src/arch/x86/acpi/debug.asl
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/* POST register region */
+OperationRegion(X80, SystemIO, 0x80, 1)
+Field(X80, ByteAcc, NoLock, Preserve)
+{
+   P80, 8
+}
+
+/* Legacy serial port register region */
+OperationRegion(CREG, SystemIO, 0x3F8, 8)
+Field(CREG, ByteAcc, NoLock, Preserve)
+{
+   CDAT, 8,
+   CDLM, 8,
+   , 8,
+   CLCR, 8,
+   CMCR, 8,
+   CLSR, 8
+}
+
+/* DINI - Initialize the serial port to 115200 8-N-1 */
+Method(DINI)
+{
+   Store(0x83, CLCR)
+   Store(0x01, CDAT)   /* 115200 baud (low) */
+   Store(0x00, CDLM)   /* 115200 baud (high) */
+   Store(0x03, CLCR)   /* word=8 stop=1 parity=none */
+   Store(0x03, CMCR)   /* DTR=1 RTS=1 out1/2=Off loop=Off */
+   Store(0x00, CDLM)   /* turn off interrupts */
+}
+
+/* THRE - Wait for serial port transmitter holding register to go empty */
+Method(THRE)
+{
+   And(CLSR, 0x20, Local0)
+   While (LEqual(Local0, Zero)) {
+   And(CLSR, 0x20, Local0)
+   }
+}
+
+/* OUTX - Send a single raw character */
+Method(OUTX, 1)
+{
+   THRE()
+   Store(Arg0, CDAT)
+}
+
+/* OUTC - Send a single character, expanding LF into CR/LF */
+Method(OUTC, 1)
+{
+   If (LEqual(Arg0, 0x0a)) {
+   OUTX(0x0d)
+   }
+   OUTX(Arg0)
+}
+
+/* DBGN - Send a single hex nibble */
+Method(DBGN, 1)
+{
+   And(Arg0, 0x0f, Local0)
+   If (LLess(Local0, 10)) {
+   Add(Local0, 0x30, Local0)
+   } Else {
+   Add(Local0, 0x37, Local0)
+   }
+   OUTC(Local0)
+}
+
+/* DBGB - Send a hex byte */
+Method(DBGB, 1)
+{
+   ShiftRight(Arg0, 4, Local0)
+   DBGN(Local0)
+   DBGN(Arg0)
+}
+
+/* DBGW - Send a hex word */
+Method(DBGW, 1)
+{
+   ShiftRight(Arg0, 8, Local0)
+   DBGB(Local0)
+   DBGB(Arg0)
+}
+
+/* DBGD - Send a hex dword */
+Method(DBGD, 1)
+{
+   ShiftRight(Arg0, 16, Local0)
+   DBGW(Local0)
+   DBGW(Arg0)
+}
+
+/* Get a char from a string */
+Method(GETC, 2)
+{
+   CreateByteField(Arg0, Arg1, DBGC)
+   Return (DBGC)
+}
+
+/* DBGO - Send either a string or an integer */
+Method(DBGO, 1, Serialized)
+{
+   If (LEqual(ObjectType(Arg0), 1)) {
+   If (LGreater(Arg0, 0x)) {
+   DBGD(Arg0)
+   } Else {
+   If (LGreater(Arg0, 0xff)) {
+   DBGW(Arg0)
+   } Else {
+   DBGB(Arg0)
+   }
+   }
+   } Else {
+   Name(BDBG, Buffer(80) {})
+   Store(Arg0, BDBG)
+   Store(0, Local1)
+   While (One) {
+   Store(GETC(BDBG, Local1), Local0)
+   If (LEqual(Local0, 0)) {
+   Return (Zero)
+   }
+   OUTC(Local0)
+   Increment(Local1)
+   }
+   }
+
+   Return (Zero)
+}
diff --git a/arch/x86/include/asm/acpi/globutil.asl 
b/arch/x86/include/asm/acpi/globutil.asl
new file mode 100644
index 000..46381b6
--- /dev/null
+++ b/arch/x86/include/asm/acpi/globutil.asl
@@ -0,0 +1,113 @@
+/*
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2016 Bin Meng 
+ *
+ * Modified from coreboot src/arch/x86/acpi/globutil.asl
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+Method(MIN, 2)
+{
+   If (LLess(Arg0, Arg1)) {
+   Return (Arg0)
+   } Else {
+   Return (Arg1)
+   }
+}
+
+Method(SLEN, 1)
+{
+   Store(Arg0, Local0)
+   Return (Sizeof(Local0))
+}
+
+Method(S2BF, 1, Serialized)
+{
+   Add(SLEN(Arg0), One, Local0)
+   Name(BUFF, Buffer(Local0) 

[U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator()

[Bin Meng]

This acpi_create_ssdt_generator() currently does nothing.
Remove this for now.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 
---

Changes in v2: None

 arch/x86/include/asm/acpi_table.h |  3 ---
 arch/x86/lib/acpi_table.c | 33 -
 2 files changed, 36 deletions(-)

diff --git a/arch/x86/include/asm/acpi_table.h 
b/arch/x86/include/asm/acpi_table.h
index 9175e7a..c6688ea 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -302,9 +302,6 @@ struct acpi_mcfg_mmconfig {
u8 reserved[4];
 };
 
-#define OEM_REVISION   42
-#define ASL_COMPILER_REVISION  42
-
 /* These can be used by the target port */
 
 unsigned long acpi_create_madt_lapics(unsigned long current);
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 75fa429..62fe39d 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -311,29 +311,6 @@ static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct 
acpi_rsdt *rsdt,
sizeof(struct acpi_rsdp));
 }
 
-static void acpi_create_ssdt_generator(struct acpi_table_header *ssdt,
-const char *oem_table_id)
-{
-   unsigned long current = (unsigned long)ssdt +
-   sizeof(struct acpi_table_header);
-
-   memset((void *)ssdt, 0, sizeof(struct acpi_table_header));
-
-   memcpy(>signature, "SSDT", 4);
-   /* Access size in ACPI 2.0c/3.0/4.0/5.0 */
-   ssdt->revision = ACPI_REV_ACPI_3_0;
-   memcpy(>oem_id, OEM_ID, 6);
-   memcpy(>oem_table_id, oem_table_id, 8);
-   ssdt->oem_revision = OEM_REVISION;
-   memcpy(>aslc_id, ASLC_ID, 4);
-   ssdt->aslc_revision = ASL_COMPILER_REVISION;
-   ssdt->length = sizeof(struct acpi_table_header);
-
-   /* (Re)calculate length and checksum */
-   ssdt->length = current - (unsigned long)ssdt;
-   ssdt->checksum = table_compute_checksum((void *)ssdt, ssdt->length);
-}
-
 /*
  * QEMU's version of write_acpi_tables is defined in
  * arch/x86/cpu/qemu/fw_cfg.c
@@ -349,7 +326,6 @@ u32 write_acpi_tables(u32 start)
struct acpi_fadt *fadt;
struct acpi_mcfg *mcfg;
struct acpi_madt *madt;
-   struct acpi_table_header *ssdt;
 
current = start;
 
@@ -426,15 +402,6 @@ u32 write_acpi_tables(u32 start)
}
current = ALIGN(current, 16);
 
-   debug("ACPI:* SSDT\n");
-   ssdt = (struct acpi_table_header *)current;
-   acpi_create_ssdt_generator(ssdt, OEM_TABLE_ID);
-   if (ssdt->length > sizeof(struct acpi_table_header)) {
-   current += ssdt->length;
-   acpi_add_table(rsdp, ssdt);
-   current = ALIGN(current, 16);
-   }
-
debug("current = %x\n", current);
 
debug("ACPI: done.\n");
-- 
1.8.2.1

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[U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions

[Bin Meng]

The comment of initializing table header revision says:

/* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */

which might mislead it may increase per ACPI spec revision.
However this is not the case. It's actually a fixed number
as defined in ACPI spec, and in the laest ACPI spec 6.1,
some table header revisions are still 1. Clean these up.

Signed-off-by: Bin Meng 

---

Changes in v2:
- New patch to clean up table header revisions

 arch/x86/include/asm/acpi_table.h |  6 --
 arch/x86/lib/acpi_table.c | 16 
 2 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/arch/x86/include/asm/acpi_table.h 
b/arch/x86/include/asm/acpi_table.h
index 44f528e..b450c43 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -31,12 +31,6 @@ struct acpi_rsdp {
u8 reserved[3];
 };
 
-#define ACPI_REV_ACPI_1_0  1
-#define ACPI_REV_ACPI_2_0  1
-#define ACPI_REV_ACPI_3_0  2
-#define ACPI_REV_ACPI_4_0  3
-#define ACPI_REV_ACPI_5_0  5
-
 /* Generic ACPI header, provided by (almost) all tables */
 struct acpi_table_header {
char signature[4];  /* ACPI signature (4 ASCII characters) */
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 056d012..201b16e 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -67,9 +67,7 @@ static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
/* Fill out header fields */
acpi_fill_header(header, "RSDT");
header->length = sizeof(struct acpi_rsdt);
-
-   /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
-   header->revision = ACPI_REV_ACPI_2_0;
+   header->revision = 1;
 
/* Entries are filled in later, we come with an empty set */
 
@@ -85,9 +83,7 @@ static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
/* Fill out header fields */
acpi_fill_header(header, "XSDT");
header->length = sizeof(struct acpi_xsdt);
-
-   /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
-   header->revision = ACPI_REV_ACPI_2_0;
+   header->revision = 1;
 
/* Entries are filled in later, we come with an empty set */
 
@@ -248,9 +244,7 @@ static void acpi_create_madt(struct acpi_madt *madt)
/* Fill out header fields */
acpi_fill_header(header, "APIC");
header->length = sizeof(struct acpi_madt);
-
-   /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
-   header->revision = ACPI_REV_ACPI_2_0;
+   header->revision = 4;
 
madt->lapic_addr = LAPIC_DEFAULT_BASE;
madt->flags = ACPI_MADT_PCAT_COMPAT;
@@ -296,9 +290,7 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
/* Fill out header fields */
acpi_fill_header(header, "MCFG");
header->length = sizeof(struct acpi_mcfg);
-
-   /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
-   header->revision = ACPI_REV_ACPI_2_0;
+   header->revision = 1;
 
current = acpi_fill_mcfg(current);
 
-- 
1.8.2.1

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[U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c

[Bin Meng]

Rearrange the routine order a little bit, to follow the order
in which ACPI table is defined in acpi_table.h.

Signed-off-by: Bin Meng 

Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 
---

Changes in v2:
- Change 'orders' to 'order' in the commit subject
- Correct wrong indention in acpi_create_madt_lapics()

 arch/x86/include/asm/acpi_table.h |  14 +--
 arch/x86/lib/acpi_table.c | 236 +++---
 2 files changed, 126 insertions(+), 124 deletions(-)

diff --git a/arch/x86/include/asm/acpi_table.h 
b/arch/x86/include/asm/acpi_table.h
index 5a829de..ad39902 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -305,14 +305,14 @@ struct acpi_mcfg_mmconfig {
 /* These can be used by the target port */
 
 void acpi_fill_header(struct acpi_table_header *header, char *signature);
+void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
+ void *dsdt);
 unsigned long acpi_create_madt_lapics(unsigned long current);
-int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr,
-u32 gsi_base);
+int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
+   u32 addr, u32 gsi_base);
 int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
-u8 bus, u8 source, u32 gsirq, u16 flags);
+u8 bus, u8 source, u32 gsirq, u16 flags);
+int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
+  u8 cpu, u16 flags, u8 lint);
 unsigned long acpi_fill_madt(unsigned long current);
-void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
-void *dsdt);
-int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi, u8 cpu,
-u16 flags, u8 lint);
 u32 write_acpi_tables(u32 start);
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 97d90f7..c2009ef 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -2,6 +2,7 @@
  * Based on acpi.c from coreboot
  *
  * Copyright (C) 2015, Saket Sinha 
+ * Copyright (C) 2016, Bin Meng 
  *
  * SPDX-License-Identifier: GPL-2.0+
  */
@@ -20,10 +21,85 @@
  */
 extern const unsigned char AmlCode[];
 
+static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
+   struct acpi_xsdt *xsdt)
+{
+   memset(rsdp, 0, sizeof(struct acpi_rsdp));
+
+   memcpy(rsdp->signature, RSDP_SIG, 8);
+   memcpy(rsdp->oem_id, OEM_ID, 6);
+
+   rsdp->length = sizeof(struct acpi_rsdp);
+   rsdp->rsdt_address = (u32)rsdt;
+
+   /*
+* Revision: ACPI 1.0: 0, ACPI 2.0/3.0/4.0: 2
+*
+* Some OSes expect an XSDT to be present for RSD PTR revisions >= 2.
+* If we don't have an ACPI XSDT, force ACPI 1.0 (and thus RSD PTR
+* revision 0)
+*/
+   if (xsdt == NULL) {
+   rsdp->revision = ACPI_RSDP_REV_ACPI_1_0;
+   } else {
+   rsdp->xsdt_address = (u64)(u32)xsdt;
+   rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
+   }
+
+   /* Calculate checksums */
+   rsdp->checksum = table_compute_checksum((void *)rsdp, 20);
+   rsdp->ext_checksum = table_compute_checksum((void *)rsdp,
+   sizeof(struct acpi_rsdp));
+}
+
+void acpi_fill_header(struct acpi_table_header *header, char *signature)
+{
+   memcpy(header->signature, signature, 4);
+   memcpy(header->oem_id, OEM_ID, 6);
+   memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
+   memcpy(header->aslc_id, ASLC_ID, 4);
+}
+
+static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
+{
+   struct acpi_table_header *header = &(rsdt->header);
+
+   /* Fill out header fields */
+   acpi_fill_header(header, "RSDT");
+   header->length = sizeof(struct acpi_rsdt);
+
+   /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
+   header->revision = ACPI_REV_ACPI_2_0;
+
+   /* Entries are filled in later, we come with an empty set */
+
+   /* Fix checksum */
+   header->checksum = table_compute_checksum((void *)rsdt,
+   sizeof(struct acpi_rsdt));
+}
+
+static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
+{
+   struct acpi_table_header *header = &(xsdt->header);
+
+   /* Fill out header fields */
+   acpi_fill_header(header, "XSDT");
+   header->length = sizeof(struct acpi_xsdt);
+
+   /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
+   header->revision = ACPI_REV_ACPI_2_0;
+
+   /* Entries are filled in later, we come with an empty set */
+
+   /* Fix checksum */
+   header->checksum = table_compute_checksum((void *)xsdt,
+   sizeof(struct acpi_xsdt));
+}
+
 /**
-* Add an ACPI table to the RSDT (and XSDT) structure, 

[U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h

[Bin Meng]

- Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID.
- Do not typedef acpi_header_t, instead use struct acpi_table_hader.
- Use a shorter name aslc_id and aslc-revision.
- Change MCFG base address to use 32-bit value pairs (_l and _h).
- Apply ACPI_APIC_ prefix to MADT APIC type macros and make
  their names to be more readable.
- Apply __packed to struct acpi_madt_irqoverride and struct
  acpi_madt_lapic_nmi tables, as they are not naturally aligned
  by the compiler which leads to wrong sizeof(struct).
- Rename model to res1 as it is reserved after ACPI spec 1.0.
- Apply ACPI_ prefix to the PM profile macros and change them
  to enum.
- Add ospm_flags to FACS structure which is defined since ACPI 4.0.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 

---

Changes in v2:
- Update commit message to mention the reason of adding __packed

 arch/x86/include/asm/acpi_table.h | 72 +--
 arch/x86/lib/acpi_table.c | 71 --
 2 files changed, 75 insertions(+), 68 deletions(-)

diff --git a/arch/x86/include/asm/acpi_table.h 
b/arch/x86/include/asm/acpi_table.h
index e82752a..418870e 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -6,10 +6,10 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 
-#define RSDP_SIG   "RSD PTR "  /* RSDT pointer signature */
-#define ACPI_TABLE_CREATOR "UBOOT   "  /* Must be 8 bytes long! */
-#define OEM_ID "UBOOT "/* Must be 6 bytes long! */
-#define ASLC   "INTL"  /* Must be 4 bytes long! */
+#define RSDP_SIG   "RSD PTR "  /* RSDP pointer signature */
+#define OEM_ID "U-BOOT"/* U-Boot */
+#define OEM_TABLE_ID   "U-BOOTBL"  /* U-Boot Table */
+#define ASLC_ID"INTL"  /* Intel ASL Compiler */
 
 #define OEM_REVISION   42
 #define ASL_COMPILER_REVISION  42
@@ -74,7 +74,7 @@ enum acpi_address_space_size {
 };
 
 /* Generic ACPI header, provided by (almost) all tables */
-typedef struct acpi_table_header {
+struct acpi_table_header {
char signature[4];  /* ACPI signature (4 ASCII characters) */
u32 length; /* Table length in bytes (incl. header) */
u8 revision;/* Table version (not ACPI version!) */
@@ -82,9 +82,9 @@ typedef struct acpi_table_header {
char oem_id[6]; /* OEM identification */
char oem_table_id[8];   /* OEM table identification */
u32 oem_revision;   /* OEM revision number */
-   char asl_compiler_id[4]; /* ASL compiler vendor ID */
-   u32 asl_compiler_revision; /* ASL compiler revision number */
-} acpi_header_t;
+   char aslc_id[4];/* ASL compiler vendor ID */
+   u32 aslc_revision;  /* ASL compiler revision number */
+};
 
 /* A maximum number of 32 ACPI tables ought to be enough for now */
 #define MAX_ACPI_TABLES32
@@ -108,8 +108,8 @@ struct acpi_mcfg {
 };
 
 struct acpi_mcfg_mmconfig {
-   u32 base_address;
-   u32 base_reserved;
+   u32 base_address_l;
+   u32 base_address_h;
u16 pci_segment_group_number;
u8 start_bus_number;
u8 end_bus_number;
@@ -125,17 +125,17 @@ struct acpi_madt {
 
 /* MADT: APIC Structure Type*/
 enum acpi_apic_types {
-   LOCALAPIC   = 0,/* Processor local APIC */
-   IOAPIC, /* I/O APIC */
-   IRQSOURCEOVERRIDE,  /* Interrupt source override */
-   NMITYPE,/* NMI source */
-   LOCALNMITYPE,   /* Local APIC NMI */
-   LAPICADDRESSOVERRIDE,   /* Local APIC address override */
-   IOSAPIC,/* I/O SAPIC */
-   LOCALSAPIC, /* Local SAPIC */
-   PLATFORMIRQSOURCES, /* Platform interrupt sources */
-   LOCALX2SAPIC,   /* Processor local x2APIC */
-   LOCALX2APICNMI, /* Local x2APIC NMI */
+   ACPI_APIC_LAPIC = 0,/* Processor local APIC */
+   ACPI_APIC_IOAPIC,   /* I/O APIC */
+   ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
+   ACPI_APIC_NMI_SRC,  /* NMI source */
+   ACPI_APIC_LAPIC_NMI,/* Local APIC NMI */
+   ACPI_APIC_LAPIC_ADDR_OVERRIDE,  /* Local APIC address override */
+   ACPI_APIC_IOSAPIC,  /* I/O SAPIC */
+   ACPI_APIC_LSAPIC,   /* Local SAPIC */
+   ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
+   ACPI_APIC_LX2APIC,  /* Processor local x2APIC */
+   ACPI_APIC_LX2APIC_NMI,  /* Local x2APIC NMI */
 };
 
 /* MADT: Processor Local APIC Structure */
@@ -153,7 +153,7 @@ struct acpi_madt_lapic {
 /* bits 1-31: reserved */
 
 /* MADT: Local APIC NMI Structure */
-struct acpi_madt_lapic_nmi {
+struct __packed 

[U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics()

[Bin Meng]

Like other MADT table write routines, make acpi_create_madt_lapics()
return how many bytes it has written instead of the table end addr.

Signed-off-by: Bin Meng 

---

Changes in v2:
- New patch to return table length in acpi_create_madt_lapics()

 arch/x86/include/asm/acpi_table.h | 2 +-
 arch/x86/lib/acpi_table.c | 8 +---
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/acpi_table.h 
b/arch/x86/include/asm/acpi_table.h
index b450c43..ff4802a 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -301,7 +301,7 @@ struct acpi_mcfg_mmconfig {
 void acpi_fill_header(struct acpi_table_header *header, char *signature);
 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
  void *dsdt);
-u32 acpi_create_madt_lapics(u32 current);
+int acpi_create_madt_lapics(u32 current);
 int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
u32 addr, u32 gsi_base);
 int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 201b16e..83cb8b5 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -179,21 +179,23 @@ static int acpi_create_madt_lapic(struct acpi_madt_lapic 
*lapic,
return lapic->length;
 }
 
-u32 acpi_create_madt_lapics(u32 current)
+int acpi_create_madt_lapics(u32 current)
 {
struct udevice *dev;
+   int length = 0;
 
for (uclass_find_first_device(UCLASS_CPU, );
 dev;
 uclass_find_next_device()) {
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
 
-   current += acpi_create_madt_lapic(
+   length += acpi_create_madt_lapic(
(struct acpi_madt_lapic *)current,
plat->cpu_id, plat->cpu_id);
+   current += length;
}
 
-   return current;
+   return length;
 }
 
 int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
-- 
1.8.2.1

___
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[U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h

[Bin Meng]

Reorder the ACPI tables appearance by following the order:
RSDP, RSDT, XSDT, FADT, FACS, MADT, MCFG. And adjust the
table flag defines accordingly.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 

---

Changes in v2:
- Update the commit message per review comments

 arch/x86/include/asm/acpi_table.h | 347 +++---
 1 file changed, 169 insertions(+), 178 deletions(-)

diff --git a/arch/x86/include/asm/acpi_table.h 
b/arch/x86/include/asm/acpi_table.h
index 418870e..9175e7a 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -2,6 +2,7 @@
  * Based on acpi.c from coreboot
  *
  * Copyright (C) 2015, Saket Sinha 
+ * Copyright (C) 2016, Bin Meng 
  *
  * SPDX-License-Identifier: GPL-2.0+
  */
@@ -11,33 +12,9 @@
 #define OEM_TABLE_ID   "U-BOOTBL"  /* U-Boot Table */
 #define ASLC_ID"INTL"  /* Intel ASL Compiler */
 
-#define OEM_REVISION   42
-#define ASL_COMPILER_REVISION  42
-
-#define ACPI_REV_ACPI_1_0  1
-#define ACPI_REV_ACPI_2_0  1
-#define ACPI_REV_ACPI_3_0  2
-#define ACPI_REV_ACPI_4_0  3
-#define ACPI_REV_ACPI_5_0  5
-
 #define ACPI_RSDP_REV_ACPI_1_0 0
 #define ACPI_RSDP_REV_ACPI_2_0 2
 
-typedef struct acpi_gen_regaddr {
-   u8  space_id;   /* Address space ID */
-   u8  bit_width;  /* Register size in bits */
-   u8  bit_offset; /* Register bit offset */
-   union {
-   /* Reserved in ACPI 2.0 - 2.0b */
-   u8  resv;
-   /* Access size in ACPI 2.0c/3.0/4.0/5.0 */
-   u8  access_size;
-   };
-   u32 addrl;  /* Register address, low 32 bits */
-   u32 addrh;  /* Register address, high 32 bits */
-} acpi_addr_t;
-
-
 /*
  * RSDP (Root System Description Pointer)
  * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
@@ -46,7 +23,7 @@ struct acpi_rsdp {
char signature[8];  /* RSDP signature */
u8 checksum;/* Checksum of the first 20 bytes */
char oem_id[6]; /* OEM ID */
-   u8 revision;/* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0/4.0 */
+   u8 revision;/* 0 for ACPI 1.0, others 2 */
u32 rsdt_address;   /* Physical address of RSDT (32 bits) */
u32 length; /* Total RSDP length (incl. extended part) */
u64 xsdt_address;   /* Physical address of XSDT (64 bits) */
@@ -54,24 +31,11 @@ struct acpi_rsdp {
u8 reserved[3];
 };
 
-enum acpi_address_space_type {
-   ACPI_ADDRESS_SPACE_MEMORY = 0,  /* System memory */
-   ACPI_ADDRESS_SPACE_IO,  /* System I/O */
-   ACPI_ADDRESS_SPACE_PCI, /* PCI config space */
-   ACPI_ADDRESS_SPACE_EC,  /* Embedded controller */
-   ACPI_ADDRESS_SPACE_SMBUS,   /* SMBus */
-   ACPI_ADDRESS_SPACE_PCC = 0x0a,  /* Platform Comm. Channel */
-   ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
-};
-
-/* Access size definitions for Generic address structure */
-enum acpi_address_space_size {
-   ACPI_ACCESS_SIZE_UNDEFINED = 0, /* Undefined (legacy reasons) */
-   ACPI_ACCESS_SIZE_BYTE_ACCESS = 1,
-   ACPI_ACCESS_SIZE_WORD_ACCESS = 2,
-   ACPI_ACCESS_SIZE_DWORD_ACCESS = 3,
-   ACPI_ACCESS_SIZE_QWORD_ACCESS = 4
-};
+#define ACPI_REV_ACPI_1_0  1
+#define ACPI_REV_ACPI_2_0  1
+#define ACPI_REV_ACPI_3_0  2
+#define ACPI_REV_ACPI_4_0  3
+#define ACPI_REV_ACPI_5_0  5
 
 /* Generic ACPI header, provided by (almost) all tables */
 struct acpi_table_header {
@@ -87,7 +51,7 @@ struct acpi_table_header {
 };
 
 /* A maximum number of 32 ACPI tables ought to be enough for now */
-#define MAX_ACPI_TABLES32
+#define MAX_ACPI_TABLES32
 
 /* RSDT (Root System Description Table) */
 struct acpi_rsdt {
@@ -101,84 +65,80 @@ struct acpi_xsdt {
u64 entry[MAX_ACPI_TABLES];
 };
 
-/* MCFG (PCI Express MMIO config space BAR description table) */
-struct acpi_mcfg {
-   struct acpi_table_header header;
-   u8 reserved[8];
-};
-
-struct acpi_mcfg_mmconfig {
-   u32 base_address_l;
-   u32 base_address_h;
-   u16 pci_segment_group_number;
-   u8 start_bus_number;
-   u8 end_bus_number;
-   u8 reserved[4];
+/* FADT Preferred Power Management Profile */
+enum acpi_pm_profile {
+   ACPI_PM_UNSPECIFIED = 0,
+   ACPI_PM_DESKTOP,
+   ACPI_PM_MOBILE,
+   ACPI_PM_WORKSTATION,
+   ACPI_PM_ENTERPRISE_SERVER,
+   ACPI_PM_SOHO_SERVER,
+   ACPI_PM_APPLIANCE_PC,
+   ACPI_PM_PERFORMANCE_SERVER,
+   ACPI_PM_TABLET
 };
 
-/* MADT (Multiple APIC Description Table) */
-struct acpi_madt {
-   struct acpi_table_header header;
-   u32 lapic_addr; /* Local APIC address */
-   u32 flags;  /* Multiple APIC flags */