Re: [U-Boot] [PATCH v3 13/13] config: sandbox: enable qfw and cmd_qfw for testing

[Bin Meng]

On Mon, May 23, 2016 at 10:37 AM, Miao Yan  wrote:
> This patch enables qfw and cmd_qfw on sandbox for build coverage test
>
> Signed-off-by: Miao Yan 
> ---
> Changes in v3:
>  - fix config option order
>
>  configs/sandbox_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
> index afdf4a3..4cc3a14 100644
> --- a/configs/sandbox_defconfig
> +++ b/configs/sandbox_defconfig
> @@ -47,6 +47,7 @@ CONFIG_CMD_LINK_LOCAL=y
>  CONFIG_CMD_TIME=y
>  CONFIG_CMD_TIMER=y
>  CONFIG_CMD_SOUND=y
> +CONFIG_CMD_QFW=y
>  CONFIG_CMD_BOOTSTAGE=y
>  CONFIG_CMD_PMIC=y
>  CONFIG_CMD_REGULATOR=y
> @@ -96,6 +97,7 @@ CONFIG_CROS_EC_SPI=y
>  CONFIG_PWRSEQ=y
>  CONFIG_SPL_PWRSEQ=y
>  CONFIG_RESET=y
> +CONFIG_QFW=y

This isn't needed as it will be selected by CONFIG_CMD_QFW above. I
will fix it when applying.

>  CONFIG_DM_MMC=y
>  CONFIG_SPI_FLASH_SANDBOX=y
>  CONFIG_SPI_FLASH=y
> --

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 05/15] x86: Use latest microcode for all BayTrail boards

[Stefan Roese]

On 22.05.2016 10:45, Bin Meng wrote:

Update board device tree to include latest microcode.

Signed-off-by: Bin Meng 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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[U-Boot] [PATCH v3 13/13] config: sandbox: enable qfw and cmd_qfw for testing

[Miao Yan]

This patch enables qfw and cmd_qfw on sandbox for build coverage test

Signed-off-by: Miao Yan 
---
Changes in v3:
 - fix config option order

 configs/sandbox_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index afdf4a3..4cc3a14 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -47,6 +47,7 @@ CONFIG_CMD_LINK_LOCAL=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_SOUND=y
+CONFIG_CMD_QFW=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
@@ -96,6 +97,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_SPL_PWRSEQ=y
 CONFIG_RESET=y
+CONFIG_QFW=y
 CONFIG_DM_MMC=y
 CONFIG_SPI_FLASH_SANDBOX=y
 CONFIG_SPI_FLASH=y
-- 
1.9.1

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[U-Boot] [PATCH v3 09/13] cmd: qfw: do not require default macros when building qfw command

[Miao Yan]

The qfw command interface makes use of CONFIG_LOADADDR and
CONFIG_RAMDISKADDR to setup kernel. But not all boards have these macros,
which causes build problem on those platforms.

This patch fixes this issue.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 cmd/qfw.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/cmd/qfw.c b/cmd/qfw.c
index c6730bf..12436ec 100644
--- a/cmd/qfw.c
+++ b/cmd/qfw.c
@@ -126,12 +126,20 @@ static int qemu_fwcfg_do_load(cmd_tbl_t *cmdtp, int flag,
env = getenv("loadaddr");
load_addr = env ?
(void *)simple_strtoul(env, NULL, 16) :
+#ifdef CONFIG_LOADADDR
(void *)CONFIG_LOADADDR;
+#else
+   NULL;
+#endif
 
env = getenv("ramdiskaddr");
initrd_addr = env ?
(void *)simple_strtoul(env, NULL, 16) :
+#ifdef CONFIG_RAMDISK_ADDR
(void *)CONFIG_RAMDISK_ADDR;
+#else
+   NULL;
+#endif
 
if (argc == 2) {
load_addr = (void *)simple_strtoul(argv[0], NULL, 16);
@@ -140,6 +148,11 @@ static int qemu_fwcfg_do_load(cmd_tbl_t *cmdtp, int flag,
load_addr = (void *)simple_strtoul(argv[0], NULL, 16);
}
 
+   if (!load_addr || !initrd_addr) {
+   printf("missing load or initrd address\n");
+   return CMD_RET_FAILURE;
+   }
+
return qemu_fwcfg_setup_kernel(load_addr, initrd_addr);
 }
 
-- 
1.9.1

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[U-Boot] [PATCH v3 10/13] cmd: qfw: do not depend on x86

[Miao Yan]

The qfw command interface used to depend on X86, this patch removes
this restriction so it can be built for sandbox for testing. For normal
usage, it can only be used with CONFIG_QEMU.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 cmd/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index c5a7a59..d51645c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -595,7 +595,6 @@ config CMD_SOUND
 
 config CMD_QFW
bool "qfw"
-   depends on X86
select QFW
help
  This provides access to the QEMU firmware interface.  The main
-- 
1.9.1

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[U-Boot] [PATCH v3 11/13] cmd: qfw: bring ACPI generation code into qfw core

[Miao Yan]

Loading ACPI table from QEMU's fw_cfg interface is not x86 specific
(ARM64 may also make use of it). So move the code to common place.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 arch/x86/cpu/qemu/acpi_table.c | 209 -
 drivers/misc/qfw.c | 206 
 2 files changed, 206 insertions(+), 209 deletions(-)

diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/acpi_table.c
index 5bb1756..63853e4 100644
--- a/arch/x86/cpu/qemu/acpi_table.c
+++ b/arch/x86/cpu/qemu/acpi_table.c
@@ -5,139 +5,7 @@
  */
 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 #include 
-#include 
-#include 
-
-/*
- * This function allocates memory for ACPI tables
- *
- * @entry : BIOS linker command entry which tells where to allocate memory
- *  (either high memory or low memory)
- * @addr  : The address that should be used for low memory allcation. If the
- *  memory allocation request is 'ZONE_HIGH' then this parameter will
- *  be ignored.
- * @return: 0 on success, or negative value on failure
- */
-static int bios_linker_allocate(struct bios_linker_entry *entry, u32 *addr)
-{
-   uint32_t size, align;
-   struct fw_file *file;
-   unsigned long aligned_addr;
-
-   align = le32_to_cpu(entry->alloc.align);
-   /* align must be power of 2 */
-   if (align & (align - 1)) {
-   printf("error: wrong alignment %u\n", align);
-   return -EINVAL;
-   }
-
-   file = qemu_fwcfg_find_file(entry->alloc.file);
-   if (!file) {
-   printf("error: can't find file %s\n", entry->alloc.file);
-   return -ENOENT;
-   }
-
-   size = be32_to_cpu(file->cfg.size);
-
-   /*
-* ZONE_HIGH means we need to allocate from high memory, since
-* malloc space is already at the end of RAM, so we directly use it.
-* If allocation zone is ZONE_FSEG, then we use the 'addr' passed
-* in which is low memory
-*/
-   if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH) {
-   aligned_addr = (unsigned long)memalign(align, size);
-   if (!aligned_addr) {
-   printf("error: allocating resource\n");
-   return -ENOMEM;
-   }
-   } else if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG) {
-   aligned_addr = ALIGN(*addr, align);
-   } else {
-   printf("error: invalid allocation zone\n");
-   return -EINVAL;
-   }
-
-   debug("bios_linker_allocate: allocate file %s, size %u, zone %d, align 
%u, addr 0x%lx\n",
- file->cfg.name, size, entry->alloc.zone, align, aligned_addr);
-
-   qemu_fwcfg_read_entry(be16_to_cpu(file->cfg.select),
- size, (void *)aligned_addr);
-   file->addr = aligned_addr;
-
-   /* adjust address for low memory allocation */
-   if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG)
-   *addr = (aligned_addr + size);
-
-   return 0;
-}
-
-/*
- * This function patches ACPI tables previously loaded
- * by bios_linker_allocate()
- *
- * @entry : BIOS linker command entry which tells how to patch
- *  ACPI tables
- * @return: 0 on success, or negative value on failure
- */
-static int bios_linker_add_pointer(struct bios_linker_entry *entry)
-{
-   struct fw_file *dest, *src;
-   uint32_t offset = le32_to_cpu(entry->pointer.offset);
-   uint64_t pointer = 0;
-
-   dest = qemu_fwcfg_find_file(entry->pointer.dest_file);
-   if (!dest || !dest->addr)
-   return -ENOENT;
-   src = qemu_fwcfg_find_file(entry->pointer.src_file);
-   if (!src || !src->addr)
-   return -ENOENT;
-
-   debug("bios_linker_add_pointer: dest->addr 0x%lx, src->addr 0x%lx, 
offset 0x%x size %u, 0x%llx\n",
- dest->addr, src->addr, offset, entry->pointer.size, pointer);
-
-   memcpy(, (char *)dest->addr + offset, entry->pointer.size);
-   pointer = le64_to_cpu(pointer);
-   pointer += (unsigned long)src->addr;
-   pointer = cpu_to_le64(pointer);
-   memcpy((char *)dest->addr + offset, , entry->pointer.size);
-
-   return 0;
-}
-
-/*
- * This function updates checksum fields of ACPI tables previously loaded
- * by bios_linker_allocate()
- *
- * @entry : BIOS linker command entry which tells where to update ACPI table
- *  checksums
- * @return: 0 on success, or negative value on failure
- */
-static int bios_linker_add_checksum(struct bios_linker_entry *entry)
-{
-   struct fw_file *file;
-   uint8_t *data, cksum = 0;
-   uint8_t *cksum_start;
-
-   file = qemu_fwcfg_find_file(entry->cksum.file);
-   if (!file || !file->addr)
-   return -ENOENT;
-
-   data = (uint8_t 

[U-Boot] [PATCH v3 12/13] x86: qemu: rename qemu/acpi_table.c

[Miao Yan]

Rename qemu/acpi_table.c to qemu/e820.c, because ACPI stuff is moved
to qfw core, this file only contains code for installing e820 table.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 arch/x86/cpu/qemu/Makefile | 3 +--
 arch/x86/cpu/qemu/{acpi_table.c => e820.c} | 0
 2 files changed, 1 insertion(+), 2 deletions(-)
 rename arch/x86/cpu/qemu/{acpi_table.c => e820.c} (100%)

diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 7c08c3d..a080c5e 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,5 +8,4 @@ ifndef CONFIG_EFI_STUB
 obj-y += car.o dram.o
 endif
 obj-y += qemu.o
-obj-$(CONFIG_QFW) += cpu.o
-obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi_table.o
+obj-$(CONFIG_QFW) += cpu.o e820.o
diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/e820.c
similarity index 100%
rename from arch/x86/cpu/qemu/acpi_table.c
rename to arch/x86/cpu/qemu/e820.c
-- 
1.9.1

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[U-Boot] [PATCH v3 06/13] x86: qemu: move x86 specific operations out of qfw core

[Miao Yan]

The original implementation of qfw includes several x86 specific
operations, like directly calling outb/inb and using some inline
assembly code which prevents it being ported to other architectures.

This patch adds callback functions and moves those to arch/x86/

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 arch/x86/cpu/qemu/qemu.c   | 39 ++-
 drivers/misc/qemu_fw_cfg.c | 30 +-
 include/qemu_fw_cfg.h  | 15 +--
 3 files changed, 60 insertions(+), 24 deletions(-)

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 32a4351..6ff9947 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -15,6 +15,43 @@
 
 static bool i440fx;
 
+#ifdef CONFIG_QFW
+
+#define FW_CONTROL_PORT0x510
+#define FW_DATA_PORT   0x511
+#define FW_DMA_PORT_LOW0x514
+#define FW_DMA_PORT_HIGH   0x518
+
+static void qemu_x86_fwcfg_read_entry_pio(uint16_t entry,
+   uint32_t size, void *address)
+{
+   uint32_t i = 0;
+   uint8_t *data = address;
+
+   /*
+* writting FW_CFG_INVALID will cause read operation to resume at
+* last offset, otherwise read will start at offset 0
+*/
+   if (entry != FW_CFG_INVALID)
+   outw(entry, FW_CONTROL_PORT);
+   while (size--)
+   data[i++] = inb(FW_DATA_PORT);
+}
+
+static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)
+{
+   outl(cpu_to_be32((uint32_t)dma), FW_DMA_PORT_HIGH);
+
+   while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR)
+   __asm__ __volatile__ ("pause");
+}
+
+static struct fw_cfg_arch_ops fwcfg_x86_ops = {
+   .arch_read_pio = qemu_x86_fwcfg_read_entry_pio,
+   .arch_read_dma = qemu_x86_fwcfg_read_entry_dma
+};
+#endif
+
 static void enable_pm_piix(void)
 {
u8 en;
@@ -89,7 +126,7 @@ static void qemu_chipset_init(void)
}
 
 #ifdef CONFIG_QFW
-   qemu_fwcfg_init();
+   qemu_fwcfg_init(_x86_ops);
 #endif
 }
 
diff --git a/drivers/misc/qemu_fw_cfg.c b/drivers/misc/qemu_fw_cfg.c
index a574bd1..0f72549 100644
--- a/drivers/misc/qemu_fw_cfg.c
+++ b/drivers/misc/qemu_fw_cfg.c
@@ -14,6 +14,7 @@
 
 static bool fwcfg_present;
 static bool fwcfg_dma_present;
+static struct fw_cfg_arch_ops *fwcfg_arch_ops;
 
 static LIST_HEAD(fw_list);
 
@@ -21,17 +22,10 @@ static LIST_HEAD(fw_list);
 static void qemu_fwcfg_read_entry_pio(uint16_t entry,
uint32_t size, void *address)
 {
-   uint32_t i = 0;
-   uint8_t *data = address;
+   debug("qemu_fwcfg_read_entry_pio: entry 0x%x, size %u address %p\n",
+ entry, size, address);
 
-   /*
-* writting FW_CFG_INVALID will cause read operation to resume at
-* last offset, otherwise read will start at offset 0
-*/
-   if (entry != FW_CFG_INVALID)
-   outw(entry, FW_CONTROL_PORT);
-   while (size--)
-   data[i++] = inb(FW_DATA_PORT);
+   return fwcfg_arch_ops->arch_read_pio(entry, size, address);
 }
 
 /* Read configuration item using fw_cfg DMA interface */
@@ -53,13 +47,10 @@ static void qemu_fwcfg_read_entry_dma(uint16_t entry,
 
barrier();
 
-   debug("qemu_fwcfg_dma_read_entry: addr %p, length %u control 0x%x\n",
- address, size, be32_to_cpu(dma.control));
-
-   outl(cpu_to_be32((uint32_t)), FW_DMA_PORT_HIGH);
+   debug("qemu_fwcfg_read_entry_dma: entry 0x%x, size %u address %p, 
control 0x%x\n",
+ entry, size, address, be32_to_cpu(dma.control));
 
-   while (be32_to_cpu(dma.control) & ~FW_CFG_DMA_ERROR)
-   __asm__ __volatile__ ("pause");
+   fwcfg_arch_ops->arch_read_dma();
 }
 
 bool qemu_fwcfg_present(void)
@@ -164,13 +155,18 @@ bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter 
*iter)
return iter->entry == _list;
 }
 
-void qemu_fwcfg_init(void)
+void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops)
 {
uint32_t qemu;
uint32_t dma_enabled;
 
fwcfg_present = false;
fwcfg_dma_present = false;
+   fwcfg_arch_ops = NULL;
+
+   if (!ops || !ops->arch_read_pio || !ops->arch_read_dma)
+   return;
+   fwcfg_arch_ops = ops;
 
qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, );
if (be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE)
diff --git a/include/qemu_fw_cfg.h b/include/qemu_fw_cfg.h
index f718e09..b0b3b59 100644
--- a/include/qemu_fw_cfg.h
+++ b/include/qemu_fw_cfg.h
@@ -7,11 +7,6 @@
 #ifndef __FW_CFG__
 #define __FW_CFG__
 
-#define FW_CONTROL_PORT0x510
-#define FW_DATA_PORT   0x511
-#define FW_DMA_PORT_LOW0x514
-#define FW_DMA_PORT_HIGH   0x518
-
 #include 
 
 enum qemu_fwcfg_items {
@@ -97,6 +92,12 @@ struct fw_cfg_dma_access {
__be64 address;
 };
 
+struct fw_cfg_arch_ops {
+   void (*arch_read_pio)(uint16_t selector, 

[U-Boot] [PATCH v3 08/13] cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]

[Miao Yan]

Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - squash with patch v2 #13

 arch/x86/cpu/mp_init.c| 2 +-
 arch/x86/cpu/qemu/acpi_table.c| 2 +-
 arch/x86/cpu/qemu/cpu.c   | 2 +-
 arch/x86/cpu/qemu/qemu.c  | 2 +-
 cmd/Kconfig   | 2 +-
 cmd/Makefile  | 2 +-
 cmd/qfw.c | 2 +-
 configs/qemu-x86_defconfig| 2 +-
 drivers/misc/Kconfig  | 2 +-
 drivers/misc/Makefile | 2 +-
 drivers/misc/{qemu_fw_cfg.c => qfw.c} | 2 +-
 include/{qemu_fw_cfg.h => qfw.h}  | 0
 12 files changed, 11 insertions(+), 11 deletions(-)
 rename drivers/misc/{qemu_fw_cfg.c => qfw.c} (99%)
 rename include/{qemu_fw_cfg.h => qfw.h} (100%)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index c44a286..8207274 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -11,7 +11,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/acpi_table.c
index b17fa03..5bb1756 100644
--- a/arch/x86/cpu/qemu/acpi_table.c
+++ b/arch/x86/cpu/qemu/acpi_table.c
@@ -8,7 +8,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/cpu/qemu/cpu.c b/arch/x86/cpu/qemu/cpu.c
index 4d2989a..b1a965e 100644
--- a/arch/x86/cpu/qemu/cpu.c
+++ b/arch/x86/cpu/qemu/cpu.c
@@ -8,7 +8,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index c29add3..680e558 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -6,7 +6,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 08b761f..c5a7a59 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -593,7 +593,7 @@ config CMD_SOUND
 sound init   - set up sound system
 sound play   - play a sound
 
-config CMD_QEMU_FW_CFG
+config CMD_QFW
bool "qfw"
depends on X86
select QFW
diff --git a/cmd/Makefile b/cmd/Makefile
index 0b7f7a2..1bbd14f 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -105,7 +105,7 @@ endif
 obj-y += pcmcia.o
 obj-$(CONFIG_CMD_PORTIO) += portio.o
 obj-$(CONFIG_CMD_PXE) += pxe.o
-obj-$(CONFIG_CMD_QEMU_FW_CFG) += qfw.o
+obj-$(CONFIG_CMD_QFW) += qfw.o
 obj-$(CONFIG_CMD_READ) += read.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-$(CONFIG_CMD_REISER) += reiser.o
diff --git a/cmd/qfw.c b/cmd/qfw.c
index 37f1aa6..c6730bf 100644
--- a/cmd/qfw.c
+++ b/cmd/qfw.c
@@ -7,7 +7,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 /*
  * This function prepares kernel for zboot. It loads kernel data
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index a813e5b..45bb3ec 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -20,7 +20,7 @@ CONFIG_CMD_DHCP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_PING=y
 CONFIG_CMD_TIME=y
-CONFIG_CMD_QEMU_FW_CFG=y
+CONFIG_CMD_QFW=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index fa53700..c40f6b5 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -142,6 +142,6 @@ config QFW
bool
help
  Hidden option to enable QEMU fw_cfg interface. This will be selected 
by
- either CONFIG_CMD_QEMU_FW_CFG or CONFIG_GENERATE_ACPI_TABLE.
+ either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE.
 
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 4893086..98704f2 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -43,4 +43,4 @@ obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
 obj-$(CONFIG_RESET) += reset-uclass.o
 obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
-obj-$(CONFIG_QFW) += qemu_fw_cfg.o
+obj-$(CONFIG_QFW) += qfw.o
diff --git a/drivers/misc/qemu_fw_cfg.c b/drivers/misc/qfw.c
similarity index 99%
rename from drivers/misc/qemu_fw_cfg.c
rename to drivers/misc/qfw.c
index 0f72549..59d9376 100644
--- a/drivers/misc/qemu_fw_cfg.c
+++ b/drivers/misc/qfw.c
@@ -8,7 +8,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
diff --git a/include/qemu_fw_cfg.h b/include/qfw.h
similarity index 100%
rename from include/qemu_fw_cfg.h
rename to include/qfw.h
-- 
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[U-Boot] [PATCH v3 05/13] x86: qemu: split qfw command interface and qfw core

[Miao Yan]

This patch splits qfw command interface and qfw core function into two
files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.

Now when qfw command interface is enabled, it will automatically select
qfw core. This patch also makes the ACPI table generation select
CONFIG_QFW.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - fix a typo in commit message

 arch/x86/Kconfig |   2 +-
 arch/x86/cpu/mp_init.c   |   4 +-
 arch/x86/cpu/qemu/Makefile   |   3 +-
 arch/x86/cpu/qemu/qemu.c |   2 +
 cmd/Kconfig  |   1 +
 cmd/Makefile |   2 +-
 cmd/{qemu_fw_cfg.c => qfw.c} | 172 
 drivers/misc/Kconfig |   6 ++
 drivers/misc/Makefile|   1 +
 drivers/misc/qemu_fw_cfg.c   | 184 +++
 10 files changed, 200 insertions(+), 177 deletions(-)
 rename cmd/{qemu_fw_cfg.c => qfw.c} (55%)
 create mode 100644 drivers/misc/qemu_fw_cfg.c

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 3e360ec..2f63170 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -436,7 +436,7 @@ config GENERATE_MP_TABLE
 config GENERATE_ACPI_TABLE
bool "Generate an ACPI (Advanced Configuration and Power Interface) 
table"
default n
-   select CMD_QEMU_FW_CFG if QEMU
+   select QFW if QEMU
help
  The Advanced Configuration and Power Interface (ACPI) specification
  provides an open standard for device configuration and management
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 13bec7a..c44a286 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -420,7 +420,7 @@ static int init_bsp(struct udevice **devp)
return 0;
 }
 
-#ifdef CONFIG_QEMU
+#ifdef CONFIG_QFW
 static int qemu_cpu_fixup(void)
 {
int ret;
@@ -496,7 +496,7 @@ int mp_init(struct mp_params *p)
if (ret)
return ret;
 
-#ifdef CONFIG_QEMU
+#ifdef CONFIG_QFW
ret = qemu_cpu_fixup();
if (ret)
return ret;
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 43ee4bd..7c08c3d 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -7,5 +7,6 @@
 ifndef CONFIG_EFI_STUB
 obj-y += car.o dram.o
 endif
-obj-y += cpu.o qemu.o
+obj-y += qemu.o
+obj-$(CONFIG_QFW) += cpu.o
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi_table.o
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index b41e4ec..32a4351 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -88,7 +88,9 @@ static void qemu_chipset_init(void)
enable_pm_ich9();
}
 
+#ifdef CONFIG_QFW
qemu_fwcfg_init();
+#endif
 }
 
 int arch_cpu_init(void)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index c0fffe3..08b761f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -596,6 +596,7 @@ config CMD_SOUND
 config CMD_QEMU_FW_CFG
bool "qfw"
depends on X86
+   select QFW
help
  This provides access to the QEMU firmware interface.  The main
  feature is to allow easy loading of files passed to qemu-system
diff --git a/cmd/Makefile b/cmd/Makefile
index f99e67d..0b7f7a2 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -105,7 +105,7 @@ endif
 obj-y += pcmcia.o
 obj-$(CONFIG_CMD_PORTIO) += portio.o
 obj-$(CONFIG_CMD_PXE) += pxe.o
-obj-$(CONFIG_CMD_QEMU_FW_CFG) += qemu_fw_cfg.o
+obj-$(CONFIG_CMD_QEMU_FW_CFG) += qfw.o
 obj-$(CONFIG_CMD_READ) += read.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-$(CONFIG_CMD_REISER) += reiser.o
diff --git a/cmd/qemu_fw_cfg.c b/cmd/qfw.c
similarity index 55%
rename from cmd/qemu_fw_cfg.c
rename to cmd/qfw.c
index aab6b1a..37f1aa6 100644
--- a/cmd/qemu_fw_cfg.c
+++ b/cmd/qfw.c
@@ -7,90 +7,7 @@
 #include 
 #include 
 #include 
-#include 
 #include 
-#include 
-#include 
-
-static bool fwcfg_present;
-static bool fwcfg_dma_present;
-
-static LIST_HEAD(fw_list);
-
-/* Read configuration item using fw_cfg PIO interface */
-static void qemu_fwcfg_read_entry_pio(uint16_t entry,
-   uint32_t size, void *address)
-{
-   uint32_t i = 0;
-   uint8_t *data = address;
-
-   /*
-* writting FW_CFG_INVALID will cause read operation to resume at
-* last offset, otherwise read will start at offset 0
-*/
-   if (entry != FW_CFG_INVALID)
-   outw(entry, FW_CONTROL_PORT);
-   while (size--)
-   data[i++] = inb(FW_DATA_PORT);
-}
-
-/* Read configuration item using fw_cfg DMA interface */
-static void qemu_fwcfg_read_entry_dma(uint16_t entry,
-   uint32_t size, void *address)
-{
-   struct fw_cfg_dma_access dma;
-
-   dma.length = cpu_to_be32(size);
-   dma.address = cpu_to_be64((uintptr_t)address);
-   dma.control = cpu_to_be32(FW_CFG_DMA_READ);
-
-   /*
-* writting FW_CFG_INVALID will cause read operation to resume at
-* last offset, 

[U-Boot] [PATCH v3 03/13] cmd: qfw: remove qemu_fwcfg_free_files()

[Miao Yan]

This patch is part of the qfw refactor work.

The qemu_fwcfg_free_files() function is only used in error handling in
ACPI table generation, let's not make this a core function and move it
to the right place.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 arch/x86/cpu/qemu/acpi_table.c | 13 +++--
 cmd/qemu_fw_cfg.c  | 12 
 include/qemu_fw_cfg.h  |  1 -
 3 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/acpi_table.c
index 49381ac..b17fa03 100644
--- a/arch/x86/cpu/qemu/acpi_table.c
+++ b/arch/x86/cpu/qemu/acpi_table.c
@@ -235,8 +235,17 @@ u32 write_acpi_tables(u32 addr)
}
 
 out:
-   if (ret)
-   qemu_fwcfg_free_files();
+   if (ret) {
+   struct fw_cfg_file_iter iter;
+   for (file = qemu_fwcfg_file_iter_init();
+!qemu_fwcfg_file_iter_end();
+file = qemu_fwcfg_file_iter_next()) {
+   if (file->addr) {
+   free((void *)file->addr);
+   file->addr = 0;
+   }
+   }
+   }
 
free(table_loader);
return addr;
diff --git a/cmd/qemu_fw_cfg.c b/cmd/qemu_fw_cfg.c
index 192b7d1..9f03ab6 100644
--- a/cmd/qemu_fw_cfg.c
+++ b/cmd/qemu_fw_cfg.c
@@ -217,18 +217,6 @@ struct fw_file *qemu_fwcfg_find_file(const char *name)
return NULL;
 }
 
-void qemu_fwcfg_free_files(void)
-{
-   struct fw_file *file;
-   struct list_head *list;
-
-   list_for_each(list, _list) {
-   file = list_entry(list, struct fw_file, list);
-   if (file->addr)
-   free((void *)file->addr);
-   }
-}
-
 struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter)
 {
iter->entry = fw_list.next;
diff --git a/include/qemu_fw_cfg.h b/include/qemu_fw_cfg.h
index 19d0ba0..986f4b2 100644
--- a/include/qemu_fw_cfg.h
+++ b/include/qemu_fw_cfg.h
@@ -154,7 +154,6 @@ void qemu_fwcfg_init(void);
 void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address);
 int qemu_fwcfg_read_firmware_list(void);
 struct fw_file *qemu_fwcfg_find_file(const char *name);
-void qemu_fwcfg_free_files(void);
 
 /**
  * Get system cpu number
-- 
1.9.1

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[U-Boot] [PATCH v3 04/13] cmd: qfw: make fwcfg_present and fwcfg_dma_present public

[Miao Yan]

This patch is part of the qfw refactor work. This patch makes
qemu_fwcfg_present() and qemu_fwcfg_dma_present() public functions.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 cmd/qemu_fw_cfg.c | 37 -
 include/qemu_fw_cfg.h |  3 +++
 2 files changed, 23 insertions(+), 17 deletions(-)

diff --git a/cmd/qemu_fw_cfg.c b/cmd/qemu_fw_cfg.c
index 9f03ab6..aab6b1a 100644
--- a/cmd/qemu_fw_cfg.c
+++ b/cmd/qemu_fw_cfg.c
@@ -62,23 +62,14 @@ static void qemu_fwcfg_read_entry_dma(uint16_t entry,
__asm__ __volatile__ ("pause");
 }
 
-static bool qemu_fwcfg_present(void)
+bool qemu_fwcfg_present(void)
 {
-   uint32_t qemu;
-
-   qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, );
-   return be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE;
+   return fwcfg_present;
 }
 
-static bool qemu_fwcfg_dma_present(void)
+bool qemu_fwcfg_dma_present(void)
 {
-   uint8_t dma_enabled;
-
-   qemu_fwcfg_read_entry_pio(FW_CFG_ID, 1, _enabled);
-   if (dma_enabled & FW_CFG_DMA_ENABLED)
-   return true;
-
-   return false;
+   return fwcfg_dma_present;
 }
 
 void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address)
@@ -257,9 +248,21 @@ static int qemu_fwcfg_list_firmware(void)
 
 void qemu_fwcfg_init(void)
 {
-   fwcfg_present = qemu_fwcfg_present();
-   if (fwcfg_present)
-   fwcfg_dma_present = qemu_fwcfg_dma_present();
+   uint32_t qemu;
+   uint32_t dma_enabled;
+
+   fwcfg_present = false;
+   fwcfg_dma_present = false;
+
+   qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, );
+   if (be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE)
+   fwcfg_present = true;
+
+   if (fwcfg_present) {
+   qemu_fwcfg_read_entry_pio(FW_CFG_ID, 1, _enabled);
+   if (dma_enabled & FW_CFG_DMA_ENABLED)
+   fwcfg_dma_present = true;
+   }
 }
 
 static int qemu_fwcfg_do_list(cmd_tbl_t *cmdtp, int flag,
@@ -323,7 +326,7 @@ static int do_qemu_fw(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
int ret;
cmd_tbl_t *fwcfg_cmd;
 
-   if (!fwcfg_present) {
+   if (!qemu_fwcfg_present()) {
printf("QEMU fw_cfg interface not found\n");
return CMD_RET_USAGE;
}
diff --git a/include/qemu_fw_cfg.h b/include/qemu_fw_cfg.h
index 986f4b2..f718e09 100644
--- a/include/qemu_fw_cfg.h
+++ b/include/qemu_fw_cfg.h
@@ -167,4 +167,7 @@ struct fw_file *qemu_fwcfg_file_iter_init(struct 
fw_cfg_file_iter *iter);
 struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter);
 bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter);
 
+bool qemu_fwcfg_present(void);
+bool qemu_fwcfg_dma_present(void);
+
 #endif
-- 
1.9.1

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[U-Boot] [PATCH v3 07/13] x86: qemu: add comment about qfw register endianness

[Miao Yan]

This patch adds some comments about qfw register endianness for clarity.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 arch/x86/cpu/qemu/qemu.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 6ff9947..c29add3 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -17,6 +17,7 @@ static bool i440fx;
 
 #ifdef CONFIG_QFW
 
+/* on x86, the qfw registers are all IO ports */
 #define FW_CONTROL_PORT0x510
 #define FW_DATA_PORT   0x511
 #define FW_DMA_PORT_LOW0x514
@@ -31,15 +32,21 @@ static void qemu_x86_fwcfg_read_entry_pio(uint16_t entry,
/*
 * writting FW_CFG_INVALID will cause read operation to resume at
 * last offset, otherwise read will start at offset 0
+*
+* Note: on platform where the control register is IO port, the
+* endianness is little endian.
 */
if (entry != FW_CFG_INVALID)
-   outw(entry, FW_CONTROL_PORT);
+   outw(cpu_to_le16(entry), FW_CONTROL_PORT);
+
+   /* the endianness of data register is string-preserving */
while (size--)
data[i++] = inb(FW_DATA_PORT);
 }
 
 static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)
 {
+   /* the DMA address register is big endian */
outl(cpu_to_be32((uint32_t)dma), FW_DMA_PORT_HIGH);
 
while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR)
-- 
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[U-Boot] [PATCH v3 01/13] x86: qemu: fix ACPI Kconfig options

[Miao Yan]

CONFIG_GENENRATE_ACPI_TABLE controls the generation of ACPI table which
uses U-Boot's built-in methods and CONFIG_QEMU_ACPI_TABLE controls whether
to load ACPI table from QEMU's fw_cfg interface.

But with commit "697ec431469ce0a4c2fc2c02d8685d907491af84 x86: qemu: Drop
our own ACPI implementation", there is only one way to support ACPI table
for QEMU targets which is the fw_cfg interface. Having two Kconfig options
for this purpose is not necessary any more, so this patch consolidates
the two.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 arch/x86/Kconfig   | 10 +-
 arch/x86/cpu/qemu/Makefile |  2 +-
 arch/x86/lib/Makefile  |  2 +-
 3 files changed, 3 insertions(+), 11 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 4ef27dc..3e360ec 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -436,21 +436,13 @@ config GENERATE_MP_TABLE
 config GENERATE_ACPI_TABLE
bool "Generate an ACPI (Advanced Configuration and Power Interface) 
table"
default n
+   select CMD_QEMU_FW_CFG if QEMU
help
  The Advanced Configuration and Power Interface (ACPI) specification
  provides an open standard for device configuration and management
  by the operating system. It defines platform-independent interfaces
  for configuration and power management monitoring.
 
-config QEMU_ACPI_TABLE
-   bool "Load ACPI table from QEMU fw_cfg interface"
-   depends on GENERATE_ACPI_TABLE && QEMU
-   default y
-   help
- By default, U-Boot generates its own ACPI tables. This option, if
- enabled, disables U-Boot's version and loads ACPI tables generated
- by QEMU.
-
 config GENERATE_SMBIOS_TABLE
bool "Generate an SMBIOS (System Management BIOS) table"
default y
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 97b965c..43ee4bd 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,4 +8,4 @@ ifndef CONFIG_EFI_STUB
 obj-y += car.o dram.o
 endif
 obj-y += cpu.o qemu.o
-obj-$(CONFIG_QEMU_ACPI_TABLE) += acpi_table.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi_table.o
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index dc90df2..ce5eb82 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -31,7 +31,7 @@ obj-$(CONFIG_X86_RAMTEST) += ramtest.o
 obj-y += sfi.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-y  += string.o
-ifndef CONFIG_QEMU_ACPI_TABLE
+ifndef CONFIG_QEMU
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi_table.o
 endif
 obj-y  += tables.o
-- 
1.9.1

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[U-Boot] [PATCH v3 02/13] cmd: qfw: add API to iterate firmware list

[Miao Yan]

This patch is part of the refactor work of qfw. It adds 3 APIs to qfw
core to iterate firmware list.

Signed-off-by: Miao Yan 
Reviewed-by: Bin Meng 
---
Changes in v3:
 - none

 cmd/qemu_fw_cfg.c | 25 ++---
 include/qemu_fw_cfg.h |  9 +
 2 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/cmd/qemu_fw_cfg.c b/cmd/qemu_fw_cfg.c
index 48ae476..192b7d1 100644
--- a/cmd/qemu_fw_cfg.c
+++ b/cmd/qemu_fw_cfg.c
@@ -229,10 +229,27 @@ void qemu_fwcfg_free_files(void)
}
 }
 
+struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter)
+{
+   iter->entry = fw_list.next;
+   return list_entry(iter->entry, struct fw_file, list);
+}
+
+struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter)
+{
+   iter->entry = iter->entry->next;
+   return list_entry(iter->entry, struct fw_file, list);
+}
+
+bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter)
+{
+   return iter->entry == _list;
+}
+
 static int qemu_fwcfg_list_firmware(void)
 {
int ret;
-   struct list_head *entry;
+   struct fw_cfg_file_iter iter;
struct fw_file *file;
 
/* make sure fw_list is loaded */
@@ -240,8 +257,10 @@ static int qemu_fwcfg_list_firmware(void)
if (ret)
return ret;
 
-   list_for_each(entry, _list) {
-   file = list_entry(entry, struct fw_file, list);
+
+   for (file = qemu_fwcfg_file_iter_init();
+!qemu_fwcfg_file_iter_end();
+file = qemu_fwcfg_file_iter_next()) {
printf("%-56s\n", file->cfg.name);
}
 
diff --git a/include/qemu_fw_cfg.h b/include/qemu_fw_cfg.h
index e21f150..19d0ba0 100644
--- a/include/qemu_fw_cfg.h
+++ b/include/qemu_fw_cfg.h
@@ -87,6 +87,10 @@ struct fw_file {
struct list_head list;  /* list node to link to fw_list */
 };
 
+struct fw_cfg_file_iter {
+   struct list_head *entry; /* structure to iterate file list */
+};
+
 struct fw_cfg_dma_access {
__be32 control;
__be32 length;
@@ -159,4 +163,9 @@ void qemu_fwcfg_free_files(void);
  */
 int qemu_fwcfg_online_cpus(void);
 
+/* helper functions to iterate firmware file list */
+struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter);
+struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter);
+bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter);
+
 #endif
-- 
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[U-Boot] [PATCH v3 00/13] cleanup QEMU fw_cfg code

[Miao Yan]

This patchset cleans the QEMU fw_cfg code:

  *) split qfw core and qfw command interface
  *) split x86 specific operations from qfw core
  *) move x86 ACPI generation code into qfw core as this can also
 be used by others like ARM64
  *) various cleanups

Changes in v2:

  *) make git format-patch detect renames
  *) add a patch to enable qfw for sandbox_defconfig
  *) address other trivial review comments

Changes in v3:
  *) correct config option order in sandbox_defconfig
  *) squash patch v2 #8 and patch v2 #13
  *) fix typos in commit message

Miao Yan (13):
  x86: qemu: fix ACPI Kconfig options
  cmd: qfw: add API to iterate firmware list
  cmd: qfw: remove qemu_fwcfg_free_files()
  cmd: qfw: make fwcfg_present and fwcfg_dma_present public
  x86: qemu: split qfw command interface and qfw core
  x86: qemu: move x86 specific operations out of qfw core
  x86: qemu: add comment about qfw register endianness
  cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]
  cmd: qfw: do not require default macros when building qfw command
  cmd: qfw: do not depend on x86
  cmd: qfw: bring ACPI generation code into qfw core
  x86: qemu: rename qemu/acpi_table.c
  config: sandbox: enable qfw and cmd_qfw for testing

 arch/x86/Kconfig   |  10 +-
 arch/x86/cpu/mp_init.c |   6 +-
 arch/x86/cpu/qemu/Makefile |   4 +-
 arch/x86/cpu/qemu/cpu.c|   2 +-
 arch/x86/cpu/qemu/e820.c   |  43 
 arch/x86/cpu/qemu/qemu.c   |  50 -
 arch/x86/lib/Makefile  |   2 +-
 cmd/Kconfig|   4 +-
 cmd/Makefile   |   2 +-
 cmd/{qemu_fw_cfg.c => qfw.c}   | 189 ++---
 configs/qemu-x86_defconfig |   2 +-
 configs/sandbox_defconfig  |   2 +
 drivers/misc/Kconfig   |   6 +
 drivers/misc/Makefile  |   1 +
 .../cpu/qemu/acpi_table.c => drivers/misc/qfw.c| 223 +
 include/{qemu_fw_cfg.h => qfw.h}   |  28 ++-
 16 files changed, 336 insertions(+), 238 deletions(-)
 create mode 100644 arch/x86/cpu/qemu/e820.c
 rename cmd/{qemu_fw_cfg.c => qfw.c} (54%)
 rename arch/x86/cpu/qemu/acpi_table.c => drivers/misc/qfw.c (57%)
 rename include/{qemu_fw_cfg.h => qfw.h} (84%)

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Re: [U-Boot] [PATCH 10/15] x86: quark: Assign a unique I/O APIC ID

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> After power-on, both LAPIC and I/O APIC appear with the same APIC ID
> zero, which creates an ID conflict. When generating MP table, U-Boot
> reports zero as the LAPIC ID in the processor entry, and zero as the
> I/O APIC ID in the I/O APIC as well as the I/O interrupt assignment
> entries. Such MP table confuses Linux kernel and finally a kernel
> panic is seen during boot:
>
>   BUG: unable to handle kernel paging request at 9000
>   IP: [] native_io_apic_write+0x22/0x30
>   *pdpt = 014fb001 *pde = 014ff067 *pte = 
>   Oops: 0002 [#1]
>   Modules linked in:
>   Pid: 1, comm: swapper Tainted: GW3.8.7 #3 intel galileo/galileo
>   EIP: 0060:[] EFLAGS: 00010086 CPU: 0
>   EIP is at native_io_apic_write+0x22/0x30
>   ...
>   Kernel panic - not syncing: Attempted to kill init! exitcode=0x0009
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/quark/quark.c | 4 
>  1 file changed, 4 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 12/15] x86: galileo: Enable MP table generation

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Now that we have added CPU uclass driver and fixed the IOAPIC ID
> conflict, enable MP table generation so that IOAPIC can be used
> by the Linux kernel.
>
> Signed-off-by: Bin Meng 
> ---
>
>  configs/galileo_defconfig | 1 +
>  1 file changed, 1 insertion(+)

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Re: [U-Boot] [PATCH 15/15] x86: galileo: Override SMBIOS product name

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Override the default product name U-Boot reports in the SMBIOS
> table, to be compatible with the Intel provided UEFI BIOS, as
> Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
> drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
> it to do different board level configuration.
>
> Signed-off-by: Bin Meng 
>
> ---
>
>  board/intel/galileo/Kconfig | 11 +++
>  1 file changed, 11 insertions(+)

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Re: [U-Boot] [PATCH 14/15] x86: Switch to use SMBIOS Kconfig options when writing SMBIOS tables

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Make use of the newly added Kconfig options of board manufacturer
> and product name to write SMBIOS tables.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/lib/smbios.c | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)

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Re: [U-Boot] [PATCH 13/15] x86: kconfig: Add two options for SMBIOS manufacturer and product name

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> This introduces two Kconfig options to be used by SMBIOS tables:
> board manufacturer and product name.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/Kconfig | 16 
>  1 file changed, 16 insertions(+)

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Re: [U-Boot] [PATCH 11/15] x86: broadwell: Correct I/O APIC ID

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Currently ID 2 is assgined to broadwell I/O APIC, however per
> chromebook_samus.dts 2 is the core#2 LAPIC ID. Now we change
> I/O APIC ID to 4 to avoid conflict.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/broadwell/pch.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

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Re: [U-Boot] [PATCH 08/15] x86: Remove SMP limitation in lapic_setup()

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> At present LAPIC is enabled and configured as virtual wire mode
> in lapic_setup() only when CONFIG_SMP is on. This limitation is
> however not necessary as for uniprocessor this is still needed.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/lapic.c | 7 +--
>  1 file changed, 1 insertion(+), 6 deletions(-)

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Re: [U-Boot] [PATCH 06/15] x86: galileo: Enable CPU driver

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Add a cpu node in the device tree and enable CPU driver.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/dts/galileo.dts  | 12 
>  configs/galileo_defconfig |  2 ++
>  2 files changed, 14 insertions(+)

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Re: [U-Boot] [PATCH 04/15] x86: baytrail: Update to latest microcode

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Update BayTrail microcde to rev 325 (for CPUID 30673), rev 907
> (for CPUID 30679).
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/dts/microcode/m0130673322.dtsi | 3284 
> ---
>  arch/x86/dts/microcode/m0130673325.dtsi | 3284 
> +++
>  arch/x86/dts/microcode/m0130679901.dtsi | 3284 
> ---
>  arch/x86/dts/microcode/m0130679907.dtsi | 3284 
> +++
>  4 files changed, 6568 insertions(+), 6568 deletions(-)
>  delete mode 100644 arch/x86/dts/microcode/m0130673322.dtsi
>  create mode 100644 arch/x86/dts/microcode/m0130673325.dtsi
>  delete mode 100644 arch/x86/dts/microcode/m0130679901.dtsi
>  create mode 100644 arch/x86/dts/microcode/m0130679907.dtsi

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Re: [U-Boot] [PATCH 07/15] x86: Don't touch IA32_APIC_BASE MSR on Intel Quark

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Intel Quark processor core provides an integrated Local APIC but
> does not support the IA32_APIC_BASE MSR. As a result, the Local
> APIC is always globally enabled and the Local APIC base address
> is fixed at 0xfee0. Attempting to access the IA32_APIC_BASE
> MSR causes a general protection fault.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/lapic.c | 28 
>  1 file changed, 16 insertions(+), 12 deletions(-)

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Re: [U-Boot] [PATCH 01/15] acpi: Clean IASL generated intermediate files

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> For boards that support ACPI, there are dsdt.aml, dsdt.asl.tmp and
> dsdt.c in the board directory after a successful build. These are
> intermediate files generated by IASL, and should be removed during
> a 'make clean'.
>
> Signed-off-by: Bin Meng 
> ---
>
>  Makefile | 1 +
>  1 file changed, 1 insertion(+)

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Re: [U-Boot] [PATCH 03/15] x86: Add some notes for MRC cache with Intel FSP

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> MRC cache relies on Intel FSP to produce a special GUID that
> contains the MRC cache data. Add such information in the
> CONFIG_ENABLE_MRC_CACHE help entry.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/Kconfig | 7 +++
>  1 file changed, 7 insertions(+)

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Re: [U-Boot] [PATCH 05/15] x86: Use latest microcode for all BayTrail boards

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Update board device tree to include latest microcode.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/dts/bayleybay.dts   | 4 ++--
>  arch/x86/dts/conga-qeval20-qa3-e3845.dts | 4 ++--
>  arch/x86/dts/minnowmax.dts   | 4 ++--
>  3 files changed, 6 insertions(+), 6 deletions(-)

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Re: [U-Boot] [PATCH 09/15] x86: Call lapic_setup() in interrupt_init()

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> Let's configure LAPIC in a common place - interrupt_init().
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/interrupts.c| 8 +---
>  arch/x86/cpu/ivybridge/model_206ax.c | 2 --
>  arch/x86/cpu/mp_init.c   | 2 --
>  3 files changed, 5 insertions(+), 7 deletions(-)

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Re: [U-Boot] [PATCH 02/15] x86: crownbay: Disable boot stage support

[Simon Glass]

On 22 May 2016 at 02:45, Bin Meng  wrote:
> It is observed that when enabling boot stage support, occasionally
> the board reboots during boot over and over again, and eventually
> boots to shell. This was seen on my board, but not on Jian's board.
> Debugging shows that the TSC timer calibration against PIT fails
> as boot stage APIs utilize timer in a very early stage and at that
> time TSC/PIT may not be stable enough for the calibration to pass.
>
> Disable it for now.
>
> Signed-off-by: Bin Meng 
> Cc: Jian Luo 
> ---

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[U-Boot] can the last traces of "bcopy" be removed?

[Robert P. J. Day]

  just noticed that this is all that's left of "bcopy":

$ grep -rw bcopy *
arch/powerpc/lib/ppcstring.S:   .globl  bcopy
arch/powerpc/lib/ppcstring.S:bcopy:
arch/microblaze/include/asm/string.h:extern void bcopy (const char *, char *, 
int);
include/linux/string.h:char *bcopy(const char *src, char *dest, int count);
lib/string.c: * bcopy - Copy one area of memory to another
lib/string.c: * memcpy() is the standard, bcopy() is a legacy BSD function.
lib/string.c:char * bcopy(const char * src, char * dest, int count)
$

so, really, no actual usage, and even the microblaze string.h file
contains:

#if 0
#define __HAVE_ARCH_BCOPY
#define __HAVE_ARCH_MEMCPY
#define __HAVE_ARCH_MEMSET
#define __HAVE_ARCH_MEMMOVE

extern void *memcpy (void *, const void *, __kernel_size_t);
extern void bcopy (const char *, char *, int);
extern void *memset (void *, int, __kernel_size_t);
extern void *memmove (void *, const void *, __kernel_size_t);
#endif

so unless i'm misreading, can't bcopy() be tossed entirely while no
one's using it and before anyone gets a chance to resurrect it? :-)

rday

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[U-Boot] a couple notes on kernel-doc in u-boot

[Robert P. J. Day]

  first, what is the recommended location for kernel-doc -- the header
files or the source files -- because i'm currently perusing
lib/libfdt/*.c, and the kernel-doc seems to be scattered across both
locations. does u-boot have a preference?

  next. some of the kernel-doc is incorrect or invalid. consider the
following snippet in libfdt.h:

/**
 * fdt_first_subnode() - get offset of first direct subnode
 *
 * @fdt:FDT blob
 * @offset: Offset of node to check
 * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
 */

the kernel-doc guide at

http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/kernel-doc-nano-HOWTO.txt

makes it clear:

"Avoid putting a spurious blank line after the function name, or else
the description will be repeated!"

  next, i'm pretty sure the following from fdt_region.c is incorrect:

/**
 * fdt_add_region() - Add a new region to our list
 *
 * The region is added if there is space, but in any case we increment the
 * count. If permitted, and the new region overlaps the last one, we merge
 * them.
 *
 * @info: State information
 * @offset: Start offset of region
 * @size: Size of region
 */

since the parameter lines should *immediately* follow the function
name line, as in:

Example kernel-doc function comment:

/**
 * foobar() - short function description of foobar
 * @arg1:   Describe the first argument to foobar.
 * @arg2:   Describe the second argument to foobar.
 *  One can provide multiple line descriptions
 *  for arguments.
 *
 ... etc etc ...

  finally, trying to list the possible return values this way is
wrong:

/**
 * fdt_check_header - sanity check a device tree or possible device tree
 * @fdt: pointer to data which might be a flattened device tree
 *
 * fdt_check_header() checks that the given buffer contains what
 * appears to be a flattened device tree with sane information in its
 * header.
 *
 * returns:
 * 0, if the buffer appears to contain a valid device tree
 * -FDT_ERR_BADMAGIC,
 * -FDT_ERR_BADVERSION,
 * -FDT_ERR_BADSTATE, standard meanings, as above
 */

for the following reason:

"NOTE 1:  The multi-line descriptive text you provide does *not*
recognize line breaks, so if you try to format some text nicely, as
in:

  Return:
0 - cool
1 - invalid arg
2 - out of memory

this will all run together and produce:

  Return: 0 - cool 1 - invalid arg 2 - out of memory

anyway, just a few observations.

rday

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Re: [U-Boot] how to buy the lwmon5 board ？

[Wolfgang Denk]

Dear 李 亮,

In message 

 you wrote:
>
> I want to test the u-boot for lwmon5 board,but I need this board,do you sell 
> it?

The  lwmon5  Board is integral part of a (big) machine manufactured
and sold by one of our customers.  You cannot buy this board.  If you
are looking for something similar, you might try if you can somewhere
by a "sequoia" board, the eval board for the PPC440EPx processor (once
manufactured and sold by AMCC, now APM).

Best regards,

Wolfgang Denk

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[U-Boot] how to buy the lwmon5 board ？

[李 亮]

Dear:
I want to test the u-boot for lwmon5 board,but I need this board,do you sell it?

发自我的 Windowsphone
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Re: [U-Boot] [PATCH 0/9] sh: Convert generic board

[Tom Rini]

On Sun, May 22, 2016 at 02:26:28PM +0900, Yoshinori Sato wrote:
> On Sat, 21 May 2016 10:28:42 +0900,
> Tom Rini wrote:
> > 
> > [1  ]
> > On Thu, May 19, 2016 at 09:26:46PM +0900, Yoshinori Sato wrote:
> > 
> > > Hello.
> > > This patch series convert generic board for SH.
> > > Tested on r2dplus target.
> > 
> > Since I believe you said before this was QEMU, how did you start it off?
> > Thanks!
> >
> 
> Yes.
> I tested comannd bellow
> $ qemu-system-sh4 -M r2d -kernel u-boot.bin -serial null -serial vc
> 
> You can see banner for serial1 console (crtl - alt - 3).

OK, thanks!

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[U-Boot] [PATCH] kernel-doc: Adjust "/**" comment for non-kernel-doc content.

[Robert P. J. Day]

Don't use /** openings for non-kernel-doc content, as it breaks the
processing of that file.

Signed-off-by: Robert P. J. Day 

---

diff --git a/include/linker_lists.h b/include/linker_lists.h
index 76898ab..731ec29 100644
--- a/include/linker_lists.h
+++ b/include/linker_lists.h
@@ -21,7 +21,7 @@

 #if !defined(__ASSEMBLY__)

-/**
+/*
  * A linker list is constructed by grouping together linker input
  * sections, each containing one entry of the list. Each input section
  * contains a constant initialized variable which holds the entry's
@@ -173,7 +173,7 @@
__attribute__((unused,  \
section(".u_boot_list_2_"#_list"_2_"#_name)))

-/**
+/*
  * We need a 0-byte-size type for iterator symbols, and the compiler
  * does not allow defining objects of C type 'void'. Using an empty
  * struct is allowed by the compiler, but causes gcc versions 4.4 and

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[U-Boot] whoops, never mind that last kernel-doc patch

[Robert P. J. Day]

  was unaware there was an official "Example:" section name.

rday

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[U-Boot] [PATCH] kernel-doc: Fix broken kernel-doc in linker_lists.h

[Robert P. J. Day]

Repair two types of erroneous kernel-doc content in this header file
that prevents it from being processed.

  * Remove "/**" comment style from non-kernel-doc content.
  * Remove colons, which in kernel-doc define a new section.

Signed-off-by: Robert P. J. Day 

---

  i'll have more to say about kernel-doc shortly, but the more subtle
error in that header file is that the use of colons in lines like

  Example:

are a signal to kernel-doc to start a new section, so avoid colons.

diff --git a/include/linker_lists.h b/include/linker_lists.h
index 76898ab..6182804 100644
--- a/include/linker_lists.h
+++ b/include/linker_lists.h
@@ -21,7 +21,7 @@

 #if !defined(__ASSEMBLY__)

-/**
+/*
  * A linker list is constructed by grouping together linker input
  * sections, each containing one entry of the list. Each input section
  * contains a constant initialized variable which holds the entry's
@@ -141,7 +141,7 @@
  *elements, then when traversing the outer section, even the elements of
  *the inner sections are present in the array.
  *
- * Example:
+ * Example
  * ll_entry_declare(struct my_sub_cmd, my_sub_cmd, cmd_sub) = {
  * .x = 3,
  * .y = 4,
@@ -173,7 +173,7 @@
__attribute__((unused,  \
section(".u_boot_list_2_"#_list"_2_"#_name)))

-/**
+/*
  * We need a 0-byte-size type for iterator symbols, and the compiler
  * does not allow defining objects of C type 'void'. Using an empty
  * struct is allowed by the compiler, but causes gcc versions 4.4 and
@@ -194,7 +194,7 @@
  * Since this macro defines an array start symbol, its leftmost index
  * must be 2 and its rightmost index must be 1.
  *
- * Example:
+ * Example
  * struct my_sub_cmd *msc = ll_entry_start(struct my_sub_cmd, cmd_sub);
  */
 #define ll_entry_start(_type, _list)   \
@@ -217,7 +217,7 @@
  * Since this macro defines an array end symbol, its leftmost index
  * must be 2 and its rightmost index must be 3.
  *
- * Example:
+ * Example
  * struct my_sub_cmd *msc = ll_entry_end(struct my_sub_cmd, cmd_sub);
  */
 #define ll_entry_end(_type, _list) \
@@ -235,7 +235,7 @@
  * placed into subsection of .u_boot_list section specified by _list
  * argument. The result is of an unsigned int type.
  *
- * Example:
+ * Example
  * int i;
  * const unsigned int count = ll_entry_count(struct my_sub_cmd, cmd_sub);
  * struct my_sub_cmd *msc = ll_entry_start(struct my_sub_cmd, cmd_sub);
@@ -260,7 +260,7 @@
  * array identified by the subsection of u_boot_list where the entry resides
  * and it's name.
  *
- * Example:
+ * Example
  * ll_entry_declare(struct my_sub_cmd, my_sub_cmd, cmd_sub) = {
  * .x = 3,
  * .y = 4,
@@ -286,7 +286,7 @@
  * Since this macro defines the start of the linker-generated arrays,
  * its leftmost index must be 1.
  *
- * Example:
+ * Example
  * struct my_sub_cmd *msc = ll_start(struct my_sub_cmd);
  */
 #define ll_start(_type)
\
@@ -306,7 +306,7 @@
  * Since this macro defines the end of the linker-generated arrays,
  * its leftmost index must be 3.
  *
- * Example:
+ * Example
  * struct my_sub_cmd *msc = ll_end(struct my_sub_cmd);
  */
 #define ll_end(_type)  \

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Re: [U-Boot] [PATCH 5/7] mips: ath79: Unify DDR initialization entry for ar934x

[Marek Vasut]

On 05/22/2016 01:35 PM, Wills Wang wrote:
> 
> 
> On 05/22/2016 07:13 PM, Marek Vasut wrote:
>> On 05/22/2016 05:59 AM, Wills Wang wrote:
>>> Use function "ddr_init" for ath79 platform DDR initialization,
>>> and put it into mach/ddr.h
>>>
>>> Signed-off-by: Wills Wang 
>>> ---
>>>
>>>   arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
>>>   arch/mips/mach-ath79/ar934x/ddr.c | 2 +-
>>>   arch/mips/mach-ath79/include/mach/ath79.h | 1 -
>>>   arch/mips/mach-ath79/include/mach/ddr.h   | 2 +-
>>>   arch/mips/mach-ath79/qca953x/ddr.c| 2 +-
>>>   board/qca/ap121/ap121.c   | 2 +-
>>>   board/qca/ap143/ap143.c   | 2 +-
>>>   board/tplink/wdr4300/wdr4300.c| 2 +-
>>>   8 files changed, 7 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/arch/mips/mach-ath79/ar933x/ddr.c
>>> b/arch/mips/mach-ath79/ar933x/ddr.c
>>> index 84e1cfa..b5940cb 100644
>>> --- a/arch/mips/mach-ath79/ar933x/ddr.c
>>> +++ b/arch/mips/mach-ath79/ar933x/ddr.c
>>> @@ -103,7 +103,7 @@ DECLARE_GLOBAL_DATA_PTR;
>>>   #define DDR_TAP_VAL00x08
>>>   #define DDR_TAP_VAL10x09
>>>   -void ddr_init(void)
>>> +void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
>> Call it ar933x_ddr_init() here
>>
>>>   {
>>>   void __iomem *regs;
>>>   u32 val;
>>> diff --git a/arch/mips/mach-ath79/ar934x/ddr.c
>>> b/arch/mips/mach-ath79/ar934x/ddr.c
>>> index 2ebb89b..c467fb2 100644
>>> --- a/arch/mips/mach-ath79/ar934x/ddr.c
>>> +++ b/arch/mips/mach-ath79/ar934x/ddr.c
>>> @@ -35,7 +35,7 @@ static const struct ar934x_mem_config
>>> ar934x_mem_config[] = {
>>>   [AR934X_DDR2]  = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
>>>   };
>>>   -void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const
>>> u16 ahb_mhz)
>>> +void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
>> Keep this one. If you want to have ddr_init() as a universal function,
>> that's fine. But consider the situation where you want to have a single
>> u-boot binary for multiple ar9xxx . In that case, you would need all of
>> those different ar9xxx_ddr_init() functions and you'd need some
>> universal function (ath79_ddr_init() ?) which would in turn call the
>> right ar9xxx_ddr_init() .
> You mean like this:
> 
> void ath79_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16
> bus_mhz)
> {
> 
> if (soc_is_ar933x())
> ar933x_ddr_init(cpu_mhz, ddr_mhz, bus_mhz);
> else if (soc_is_ar934x())
> ar934x_ddr_init(cpu_mhz, ddr_mhz, bus_mhz);
> ...

Yes, very much like that.

soc_is_foo() might need tweaking so the compiled would be able to
optimize out unavailable branches (in case support for that family is
not available).


[...]

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Re: [U-Boot] [PATCH 5/7] mips: ath79: Unify DDR initialization entry for ar934x

[Wills Wang]

On 05/22/2016 07:13 PM, Marek Vasut wrote:

On 05/22/2016 05:59 AM, Wills Wang wrote:

Use function "ddr_init" for ath79 platform DDR initialization,
and put it into mach/ddr.h

Signed-off-by: Wills Wang 
---

  arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
  arch/mips/mach-ath79/ar934x/ddr.c | 2 +-
  arch/mips/mach-ath79/include/mach/ath79.h | 1 -
  arch/mips/mach-ath79/include/mach/ddr.h   | 2 +-
  arch/mips/mach-ath79/qca953x/ddr.c| 2 +-
  board/qca/ap121/ap121.c   | 2 +-
  board/qca/ap143/ap143.c   | 2 +-
  board/tplink/wdr4300/wdr4300.c| 2 +-
  8 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/mips/mach-ath79/ar933x/ddr.c 
b/arch/mips/mach-ath79/ar933x/ddr.c
index 84e1cfa..b5940cb 100644
--- a/arch/mips/mach-ath79/ar933x/ddr.c
+++ b/arch/mips/mach-ath79/ar933x/ddr.c
@@ -103,7 +103,7 @@ DECLARE_GLOBAL_DATA_PTR;
  #define DDR_TAP_VAL00x08
  #define DDR_TAP_VAL10x09
  
-void ddr_init(void)

+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)

Call it ar933x_ddr_init() here


  {
void __iomem *regs;
u32 val;
diff --git a/arch/mips/mach-ath79/ar934x/ddr.c 
b/arch/mips/mach-ath79/ar934x/ddr.c
index 2ebb89b..c467fb2 100644
--- a/arch/mips/mach-ath79/ar934x/ddr.c
+++ b/arch/mips/mach-ath79/ar934x/ddr.c
@@ -35,7 +35,7 @@ static const struct ar934x_mem_config ar934x_mem_config[] = {
[AR934X_DDR2]  = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
  };
  
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)

+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)

Keep this one. If you want to have ddr_init() as a universal function,
that's fine. But consider the situation where you want to have a single
u-boot binary for multiple ar9xxx . In that case, you would need all of
those different ar9xxx_ddr_init() functions and you'd need some
universal function (ath79_ddr_init() ?) which would in turn call the
right ar9xxx_ddr_init() .

You mean like this:

void ath79_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
{

if (soc_is_ar933x())
ar933x_ddr_init(cpu_mhz, ddr_mhz, bus_mhz);
else if (soc_is_ar934x())
ar934x_ddr_init(cpu_mhz, ddr_mhz, bus_mhz);
...

}

  {
void __iomem *ddr_regs;
const struct ar934x_mem_config *memcfg;
diff --git a/arch/mips/mach-ath79/include/mach/ath79.h 
b/arch/mips/mach-ath79/include/mach/ath79.h
index 18d1e26..fdc1149 100644
--- a/arch/mips/mach-ath79/include/mach/ath79.h
+++ b/arch/mips/mach-ath79/include/mach/ath79.h
@@ -141,6 +141,5 @@ static inline int soc_is_qca956x(void)
  }
  
  void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);

-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
  
  #endif /* __ASM_MACH_ATH79_H */

diff --git a/arch/mips/mach-ath79/include/mach/ddr.h 
b/arch/mips/mach-ath79/include/mach/ddr.h
index 181179a..b6f46ce 100644
--- a/arch/mips/mach-ath79/include/mach/ddr.h
+++ b/arch/mips/mach-ath79/include/mach/ddr.h
@@ -7,7 +7,7 @@
  #ifndef __ASM_MACH_DDR_H
  #define __ASM_MACH_DDR_H
  
-void ddr_init(void);

+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);
  void ddr_tap_tuning(void);
  
  #endif /* __ASM_MACH_DDR_H */

diff --git a/arch/mips/mach-ath79/qca953x/ddr.c 
b/arch/mips/mach-ath79/qca953x/ddr.c
index 41ad113..180e600 100644
--- a/arch/mips/mach-ath79/qca953x/ddr.c
+++ b/arch/mips/mach-ath79/qca953x/ddr.c
@@ -219,7 +219,7 @@ DECLARE_GLOBAL_DATA_PTR;
  #define DDR_TAP_MAGIC_VAL   0xaa55aa55
  #define DDR_TAP_MAX_VAL 0x40
  
-void ddr_init(void)

+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
  {
void __iomem *regs;
u32 val;
diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
index d6c60fe..b0e1993 100644
--- a/board/qca/ap121/ap121.c
+++ b/board/qca/ap121/ap121.c
@@ -45,6 +45,6 @@ int board_early_init_f(void)
  #ifdef CONFIG_DEBUG_UART
debug_uart_init();
  #endif
-   ddr_init();
+   ddr_init(400, 400, 200);
return 0;
  }
diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
index 1572472..406c988 100644
--- a/board/qca/ap143/ap143.c
+++ b/board/qca/ap143/ap143.c
@@ -61,6 +61,6 @@ int board_early_init_f(void)
  #ifdef CONFIG_DEBUG_UART
debug_uart_init();
  #endif
-   ddr_init();
+   ddr_init(650, 400, 200);
return 0;
  }
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
index 8382ce0..bff3938 100644
--- a/board/tplink/wdr4300/wdr4300.c
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -64,7 +64,7 @@ int board_early_init_f(void)
  
  #ifndef CONFIG_SKIP_LOWLEVEL_INIT

ar934x_pll_init(560, 480, 240);
-   ar934x_ddr_init(560, 480, 240);
+   ddr_init(560, 480, 240);
  #endif
  
  	wdr4300_usb_start();






--
Best Regards
Wills

Re: [U-Boot] [PATCH 3/7] mips: ath79: Use uniform header for reset

[Marek Vasut]

On 05/22/2016 01:29 PM, Wills Wang wrote:
> 
> 
> On 05/22/2016 07:08 PM, Marek Vasut wrote:
>> On 05/22/2016 05:59 AM, Wills Wang wrote:
>>> Collect all reset operation on platform and move them into a uniform
>>> header
>>>
>>> Signed-off-by: Wills Wang 
>>> ---
>>>
>>>   arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
>>>   arch/mips/mach-ath79/include/mach/reset.h | 2 ++
>>>   board/tplink/wdr4300/wdr4300.c| 1 +
>>>   3 files changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/mips/mach-ath79/include/mach/ath79.h
>>> b/arch/mips/mach-ath79/include/mach/ath79.h
>>> index 17af082..18d1e26 100644
>>> --- a/arch/mips/mach-ath79/include/mach/ath79.h
>>> +++ b/arch/mips/mach-ath79/include/mach/ath79.h
>>> @@ -140,9 +140,6 @@ static inline int soc_is_qca956x(void)
>>>   return soc_is_tp9343() || soc_is_qca9561();
>>>   }
>>>   -int ath79_eth_reset(void);
>>> -int ath79_usb_reset(void);
>>> -
>>>   void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const
>>> u16 ahb_mhz);
>>>   void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const
>>> u16 ahb_mhz);
>>>   diff --git a/arch/mips/mach-ath79/include/mach/reset.h
>>> b/arch/mips/mach-ath79/include/mach/reset.h
>>> index c383bfe..7721e1d 100644
>>> --- a/arch/mips/mach-ath79/include/mach/reset.h
>>> +++ b/arch/mips/mach-ath79/include/mach/reset.h
>>> @@ -10,5 +10,7 @@
>>>   #include 
>>> u32 get_bootstrap(void);
>>> +int ath79_eth_reset(void);
>>> +int ath79_usb_reset(void);
>> By moving the prototype into reset.h :
>> - New functions are added to a file which can be almost removed
>> - You need to include two headers now
>>
>> So drop this patch and instead focus on getting rid of reset.h
> You mean we should use a header "ath79.h" for all?

Yes, having one header per function makes no sense and ath79.h already
has multiple function prototypes in it.

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Re: [U-Boot] [PATCH 3/7] mips: ath79: Use uniform header for reset

[Wills Wang]

On 05/22/2016 07:08 PM, Marek Vasut wrote:

On 05/22/2016 05:59 AM, Wills Wang wrote:

Collect all reset operation on platform and move them into a uniform header

Signed-off-by: Wills Wang 
---

  arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
  arch/mips/mach-ath79/include/mach/reset.h | 2 ++
  board/tplink/wdr4300/wdr4300.c| 1 +
  3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/mips/mach-ath79/include/mach/ath79.h 
b/arch/mips/mach-ath79/include/mach/ath79.h
index 17af082..18d1e26 100644
--- a/arch/mips/mach-ath79/include/mach/ath79.h
+++ b/arch/mips/mach-ath79/include/mach/ath79.h
@@ -140,9 +140,6 @@ static inline int soc_is_qca956x(void)
return soc_is_tp9343() || soc_is_qca9561();
  }
  
-int ath79_eth_reset(void);

-int ath79_usb_reset(void);
-
  void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
  void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
  
diff --git a/arch/mips/mach-ath79/include/mach/reset.h b/arch/mips/mach-ath79/include/mach/reset.h

index c383bfe..7721e1d 100644
--- a/arch/mips/mach-ath79/include/mach/reset.h
+++ b/arch/mips/mach-ath79/include/mach/reset.h
@@ -10,5 +10,7 @@
  #include 
  
  u32 get_bootstrap(void);

+int ath79_eth_reset(void);
+int ath79_usb_reset(void);

By moving the prototype into reset.h :
- New functions are added to a file which can be almost removed
- You need to include two headers now

So drop this patch and instead focus on getting rid of reset.h

You mean we should use a header "ath79.h" for all?

  #endif /* __ASM_MACH_RESET_H */
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
index 6e070fd..8382ce0 100644
--- a/board/tplink/wdr4300/wdr4300.c
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -9,6 +9,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 





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Re: [U-Boot] [PATCH V2 1/7] mips: ath79: ar933x: Avoid warning with gcc5

[Wills Wang]

On 05/22/2016 07:15 PM, Marek Vasut wrote:

On 05/22/2016 05:59 AM, Wills Wang wrote:

GCC 5.3 report a warning: 'upper' and 'lower' may be used
uninitialized in this function [-Wmaybe-uninitialized].
Compiler might need explicit initializer.

Signed-off-by: Wills Wang 
---

  arch/mips/mach-ath79/ar933x/ddr.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/arch/mips/mach-ath79/ar933x/ddr.c 
b/arch/mips/mach-ath79/ar933x/ddr.c
index 91452bc..7f20d34 100644
--- a/arch/mips/mach-ath79/ar933x/ddr.c
+++ b/arch/mips/mach-ath79/ar933x/ddr.c
@@ -268,6 +268,8 @@ void ddr_tap_tuning(void)
dir = 1;
tap = readl(regs + AR71XX_DDR_REG_TAP_CTRL0);
val = tap;
+   upper = tap;
+   lower = tap;
while (!done) {
err = 0;
  


So what's new in V2 here ?


Capitalize the first letter in the sentence.

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Re: [U-Boot] [PATCH V2 2/7] mips: ath79: ar933x: Fix ethernet PHY mismatch

[Wills Wang]

On 05/22/2016 07:05 PM, Marek Vasut wrote:

On 05/22/2016 05:59 AM, Wills Wang wrote:

We need reset the Ethernet Switch analog part before operation,
or the build-in Ethernet PHY don't work.

Signed-off-by: Wills Wang 
---

So what changed in V2 here ?

I change commit message according to daniel's email.

  arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
  arch/mips/mach-ath79/reset.c| 3 ++-
  2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h 
b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index a8e51cb..dabcad0 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -660,6 +660,7 @@
  
  #define AR933X_RESET_GE1_MDIOBIT(23)

  #define AR933X_RESET_GE0_MDIO BIT(22)
+#define AR933X_RESET_ETH_SWITCH_ANALOG BIT(14)
  #define AR933X_RESET_GE1_MAC  BIT(13)
  #define AR933X_RESET_WMAC BIT(11)
  #define AR933X_RESET_GE0_MAC  BIT(9)
diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
index 188eccb..a88bcbc 100644
--- a/arch/mips/mach-ath79/reset.c
+++ b/arch/mips/mach-ath79/reset.c
@@ -81,7 +81,8 @@ static int eth_init_ar933x(void)
  MAP_NOCACHE);
const u32 mask = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO |
 AR933X_RESET_GE1_MAC | AR933X_RESET_GE1_MDIO |
-AR933X_RESET_ETH_SWITCH;
+AR933X_RESET_ETH_SWITCH |
+AR933X_RESET_ETH_SWITCH_ANALOG;
  
  	/* Clear MDIO slave EN bit. */

clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17));





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Re: [U-Boot] [PATCH V2 1/7] mips: ath79: ar933x: Avoid warning with gcc5

[Marek Vasut]

On 05/22/2016 05:59 AM, Wills Wang wrote:
> GCC 5.3 report a warning: 'upper' and 'lower' may be used
> uninitialized in this function [-Wmaybe-uninitialized].
> Compiler might need explicit initializer.
> 
> Signed-off-by: Wills Wang 
> ---
> 
>  arch/mips/mach-ath79/ar933x/ddr.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/mips/mach-ath79/ar933x/ddr.c 
> b/arch/mips/mach-ath79/ar933x/ddr.c
> index 91452bc..7f20d34 100644
> --- a/arch/mips/mach-ath79/ar933x/ddr.c
> +++ b/arch/mips/mach-ath79/ar933x/ddr.c
> @@ -268,6 +268,8 @@ void ddr_tap_tuning(void)
>   dir = 1;
>   tap = readl(regs + AR71XX_DDR_REG_TAP_CTRL0);
>   val = tap;
> + upper = tap;
> + lower = tap;
>   while (!done) {
>   err = 0;
>  
> 
So what's new in V2 here ?

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Re: [U-Boot] [PATCH 3/7] mips: ath79: Use uniform header for reset

[Marek Vasut]

On 05/22/2016 05:59 AM, Wills Wang wrote:
> Collect all reset operation on platform and move them into a uniform header
> 
> Signed-off-by: Wills Wang 
> ---
> 
>  arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
>  arch/mips/mach-ath79/include/mach/reset.h | 2 ++
>  board/tplink/wdr4300/wdr4300.c| 1 +
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/mips/mach-ath79/include/mach/ath79.h 
> b/arch/mips/mach-ath79/include/mach/ath79.h
> index 17af082..18d1e26 100644
> --- a/arch/mips/mach-ath79/include/mach/ath79.h
> +++ b/arch/mips/mach-ath79/include/mach/ath79.h
> @@ -140,9 +140,6 @@ static inline int soc_is_qca956x(void)
>   return soc_is_tp9343() || soc_is_qca9561();
>  }
>  
> -int ath79_eth_reset(void);
> -int ath79_usb_reset(void);
> -
>  void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 
> ahb_mhz);
>  void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 
> ahb_mhz);
>  
> diff --git a/arch/mips/mach-ath79/include/mach/reset.h 
> b/arch/mips/mach-ath79/include/mach/reset.h
> index c383bfe..7721e1d 100644
> --- a/arch/mips/mach-ath79/include/mach/reset.h
> +++ b/arch/mips/mach-ath79/include/mach/reset.h
> @@ -10,5 +10,7 @@
>  #include 
>  
>  u32 get_bootstrap(void);
> +int ath79_eth_reset(void);
> +int ath79_usb_reset(void);

By moving the prototype into reset.h :
- New functions are added to a file which can be almost removed
- You need to include two headers now

So drop this patch and instead focus on getting rid of reset.h

>  #endif /* __ASM_MACH_RESET_H */
> diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
> index 6e070fd..8382ce0 100644
> --- a/board/tplink/wdr4300/wdr4300.c
> +++ b/board/tplink/wdr4300/wdr4300.c
> @@ -9,6 +9,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> 


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Re: [U-Boot] [PATCH 6/7] mips: ath79: Unify PLL initialization entry

[Marek Vasut]

On 05/22/2016 05:59 AM, Wills Wang wrote:
> Use function "pll_init" for ath79 platform PLL initialization,
> and put it into mach/clk.h
> 
> Signed-off-by: Wills Wang 
> ---
> 
>  arch/mips/mach-ath79/ar934x/clk.c |  2 +-
>  arch/mips/mach-ath79/include/mach/ath79.h |  2 --
>  arch/mips/mach-ath79/include/mach/clk.h   | 12 
>  board/tplink/wdr4300/wdr4300.c|  6 +++---
>  4 files changed, 16 insertions(+), 6 deletions(-)
>  create mode 100644 arch/mips/mach-ath79/include/mach/clk.h
> 
> diff --git a/arch/mips/mach-ath79/ar934x/clk.c 
> b/arch/mips/mach-ath79/ar934x/clk.c
> index fdbbc80..97d0e09 100644
> --- a/arch/mips/mach-ath79/ar934x/clk.c
> +++ b/arch/mips/mach-ath79/ar934x/clk.c
> @@ -101,7 +101,7 @@ static void ar934x_srif_pll_cfg(void __iomem 
> *pll_reg_base, const u32 srif_val)
>   } while (reg >= 0x4);
>  }
>  
> -void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
> +void pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)

Same comment I had in 5/7 applies here

>  {
>   void __iomem *srif_regs = map_physmem(AR934X_SRIF_BASE,
> AR934X_SRIF_SIZE, MAP_NOCACHE);
> diff --git a/arch/mips/mach-ath79/include/mach/ath79.h 
> b/arch/mips/mach-ath79/include/mach/ath79.h
> index fdc1149..90d80b8 100644
> --- a/arch/mips/mach-ath79/include/mach/ath79.h
> +++ b/arch/mips/mach-ath79/include/mach/ath79.h
> @@ -140,6 +140,4 @@ static inline int soc_is_qca956x(void)
>   return soc_is_tp9343() || soc_is_qca9561();
>  }
>  
> -void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 
> ahb_mhz);
> -
>  #endif /* __ASM_MACH_ATH79_H */
> diff --git a/arch/mips/mach-ath79/include/mach/clk.h 
> b/arch/mips/mach-ath79/include/mach/clk.h
> new file mode 100644
> index 000..58be7ea
> --- /dev/null
> +++ b/arch/mips/mach-ath79/include/mach/clk.h
> @@ -0,0 +1,12 @@
> +/*
> + * Copyright (C) 2015-2016 Wills Wang 
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __ASM_MACH_CLK_H
> +#define __ASM_MACH_CLK_H
> +
> +void pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);

Same comment I had in 3/7 applies here.

> +
> +#endif /* __ASM_MACH_CLK_H */
> diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
> index bff3938..b6c2881 100644
> --- a/board/tplink/wdr4300/wdr4300.c
> +++ b/board/tplink/wdr4300/wdr4300.c
> @@ -8,10 +8,10 @@
>  #include 
>  #include 
>  #include 
> -#include 
> -#include 
>  #include 
>  #include 
> +#include 
> +#include 
>  #include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
> @@ -63,7 +63,7 @@ int board_early_init_f(void)
>  #endif
>  
>  #ifndef CONFIG_SKIP_LOWLEVEL_INIT
> - ar934x_pll_init(560, 480, 240);
> + pll_init(560, 480, 240);
>   ddr_init(560, 480, 240);
>  #endif
>  
> 


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Re: [U-Boot] [PATCH 7/7] mips: ath79: ap121: Enable ethernet

[Marek Vasut]

On 05/22/2016 05:59 AM, Wills Wang wrote:
> This patch enable network function for ap121 board, it's based on
> the coming ethernet driver ag7xxx.
> 
> Signed-off-by: Wills Wang 
> ---

Acked-by: Marek Vasut 

>  arch/mips/dts/ap121.dts   | 5 +
>  arch/mips/dts/ar933x.dtsi | 4 ++--
>  board/qca/ap121/ap121.c   | 2 ++
>  configs/ap121_defconfig   | 9 +++--
>  4 files changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/mips/dts/ap121.dts b/arch/mips/dts/ap121.dts
> index e31f601..a934a58 100644
> --- a/arch/mips/dts/ap121.dts
> +++ b/arch/mips/dts/ap121.dts
> @@ -41,3 +41,8 @@
>   reg = <0>;
>   };
>  };
> +
> + {
> + phy-mode = "rmii";
> + status = "okay";
> +};
> diff --git a/arch/mips/dts/ar933x.dtsi b/arch/mips/dts/ar933x.dtsi
> index 00896b2..971f13e 100644
> --- a/arch/mips/dts/ar933x.dtsi
> +++ b/arch/mips/dts/ar933x.dtsi
> @@ -75,7 +75,7 @@
>   };
>  
>   gmac0: eth@0x1900 {
> - compatible = "qca,ag7240-mac";
> + compatible = "qca,ag933x-mac";
>   reg = <0x1900 0x200>;
>   phy = <>;
>   phy-mode = "rmii";
> @@ -92,7 +92,7 @@
>   };
>  
>   gmac1: eth@0x1a00 {
> - compatible = "qca,ag7240-mac";
> + compatible = "qca,ag933x-mac";
>   reg = <0x1a00 0x200>;
>   phy = <>;
>   phy-mode = "rgmii";
> diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
> index b0e1993..7b5a4ac 100644
> --- a/board/qca/ap121/ap121.c
> +++ b/board/qca/ap121/ap121.c
> @@ -45,6 +45,8 @@ int board_early_init_f(void)
>  #ifdef CONFIG_DEBUG_UART
>   debug_uart_init();
>  #endif
> +
>   ddr_init(400, 400, 200);
> + ath79_eth_reset();
>   return 0;
>  }
> diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
> index 7604e2e..91fa734 100644
> --- a/configs/ap121_defconfig
> +++ b/configs/ap121_defconfig
> @@ -19,8 +19,13 @@ CONFIG_SYS_PROMPT="ap121 # "
>  CONFIG_CMD_SF=y
>  CONFIG_CMD_SPI=y
>  # CONFIG_CMD_FPGA is not set
> -# CONFIG_CMD_NET is not set
> -# CONFIG_CMD_NFS is not set
> +CONFIG_CMD_NET=y
> +CONFIG_CMD_NFS=y
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_PING=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_DM_ETH=y
> +CONFIG_AG7XXX=y
>  CONFIG_SPI_FLASH=y
>  CONFIG_SPI_FLASH_BAR=y
>  CONFIG_SPI_FLASH_ATMEL=y
> 


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Re: [U-Boot] [PATCH 4/7] mips: ath79: Rename get_bootstrap into ath79_get_bootstrap

[Marek Vasut]

On 05/22/2016 05:59 AM, Wills Wang wrote:
> Add a platform prefix for function name in order to make more readable
> 
> Signed-off-by: Wills Wang 
> ---
> 
>  arch/mips/mach-ath79/ar933x/clk.c | 2 +-
>  arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
>  arch/mips/mach-ath79/ar934x/clk.c | 4 ++--
>  arch/mips/mach-ath79/ar934x/ddr.c | 2 +-
>  arch/mips/mach-ath79/include/mach/reset.h | 2 +-
>  arch/mips/mach-ath79/qca953x/clk.c| 2 +-
>  arch/mips/mach-ath79/qca953x/ddr.c| 2 +-
>  arch/mips/mach-ath79/reset.c  | 2 +-
>  8 files changed, 9 insertions(+), 9 deletions(-)

Acked-by: Marek Vasut 

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Re: [U-Boot] [PATCH 5/7] mips: ath79: Unify DDR initialization entry for ar934x

[Marek Vasut]

On 05/22/2016 05:59 AM, Wills Wang wrote:
> Use function "ddr_init" for ath79 platform DDR initialization,
> and put it into mach/ddr.h
> 
> Signed-off-by: Wills Wang 
> ---
> 
>  arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
>  arch/mips/mach-ath79/ar934x/ddr.c | 2 +-
>  arch/mips/mach-ath79/include/mach/ath79.h | 1 -
>  arch/mips/mach-ath79/include/mach/ddr.h   | 2 +-
>  arch/mips/mach-ath79/qca953x/ddr.c| 2 +-
>  board/qca/ap121/ap121.c   | 2 +-
>  board/qca/ap143/ap143.c   | 2 +-
>  board/tplink/wdr4300/wdr4300.c| 2 +-
>  8 files changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/mips/mach-ath79/ar933x/ddr.c 
> b/arch/mips/mach-ath79/ar933x/ddr.c
> index 84e1cfa..b5940cb 100644
> --- a/arch/mips/mach-ath79/ar933x/ddr.c
> +++ b/arch/mips/mach-ath79/ar933x/ddr.c
> @@ -103,7 +103,7 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define DDR_TAP_VAL00x08
>  #define DDR_TAP_VAL10x09
>  
> -void ddr_init(void)
> +void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)

Call it ar933x_ddr_init() here

>  {
>   void __iomem *regs;
>   u32 val;
> diff --git a/arch/mips/mach-ath79/ar934x/ddr.c 
> b/arch/mips/mach-ath79/ar934x/ddr.c
> index 2ebb89b..c467fb2 100644
> --- a/arch/mips/mach-ath79/ar934x/ddr.c
> +++ b/arch/mips/mach-ath79/ar934x/ddr.c
> @@ -35,7 +35,7 @@ static const struct ar934x_mem_config ar934x_mem_config[] = 
> {
>   [AR934X_DDR2]  = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
>  };
>  
> -void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
> +void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)

Keep this one. If you want to have ddr_init() as a universal function,
that's fine. But consider the situation where you want to have a single
u-boot binary for multiple ar9xxx . In that case, you would need all of
those different ar9xxx_ddr_init() functions and you'd need some
universal function (ath79_ddr_init() ?) which would in turn call the
right ar9xxx_ddr_init() .

>  {
>   void __iomem *ddr_regs;
>   const struct ar934x_mem_config *memcfg;
> diff --git a/arch/mips/mach-ath79/include/mach/ath79.h 
> b/arch/mips/mach-ath79/include/mach/ath79.h
> index 18d1e26..fdc1149 100644
> --- a/arch/mips/mach-ath79/include/mach/ath79.h
> +++ b/arch/mips/mach-ath79/include/mach/ath79.h
> @@ -141,6 +141,5 @@ static inline int soc_is_qca956x(void)
>  }
>  
>  void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 
> ahb_mhz);
> -void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 
> ahb_mhz);
>  
>  #endif /* __ASM_MACH_ATH79_H */
> diff --git a/arch/mips/mach-ath79/include/mach/ddr.h 
> b/arch/mips/mach-ath79/include/mach/ddr.h
> index 181179a..b6f46ce 100644
> --- a/arch/mips/mach-ath79/include/mach/ddr.h
> +++ b/arch/mips/mach-ath79/include/mach/ddr.h
> @@ -7,7 +7,7 @@
>  #ifndef __ASM_MACH_DDR_H
>  #define __ASM_MACH_DDR_H
>  
> -void ddr_init(void);
> +void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);
>  void ddr_tap_tuning(void);
>  
>  #endif /* __ASM_MACH_DDR_H */
> diff --git a/arch/mips/mach-ath79/qca953x/ddr.c 
> b/arch/mips/mach-ath79/qca953x/ddr.c
> index 41ad113..180e600 100644
> --- a/arch/mips/mach-ath79/qca953x/ddr.c
> +++ b/arch/mips/mach-ath79/qca953x/ddr.c
> @@ -219,7 +219,7 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define DDR_TAP_MAGIC_VAL   0xaa55aa55
>  #define DDR_TAP_MAX_VAL 0x40
>  
> -void ddr_init(void)
> +void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
>  {
>   void __iomem *regs;
>   u32 val;
> diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
> index d6c60fe..b0e1993 100644
> --- a/board/qca/ap121/ap121.c
> +++ b/board/qca/ap121/ap121.c
> @@ -45,6 +45,6 @@ int board_early_init_f(void)
>  #ifdef CONFIG_DEBUG_UART
>   debug_uart_init();
>  #endif
> - ddr_init();
> + ddr_init(400, 400, 200);
>   return 0;
>  }
> diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
> index 1572472..406c988 100644
> --- a/board/qca/ap143/ap143.c
> +++ b/board/qca/ap143/ap143.c
> @@ -61,6 +61,6 @@ int board_early_init_f(void)
>  #ifdef CONFIG_DEBUG_UART
>   debug_uart_init();
>  #endif
> - ddr_init();
> + ddr_init(650, 400, 200);
>   return 0;
>  }
> diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
> index 8382ce0..bff3938 100644
> --- a/board/tplink/wdr4300/wdr4300.c
> +++ b/board/tplink/wdr4300/wdr4300.c
> @@ -64,7 +64,7 @@ int board_early_init_f(void)
>  
>  #ifndef CONFIG_SKIP_LOWLEVEL_INIT
>   ar934x_pll_init(560, 480, 240);
> - ar934x_ddr_init(560, 480, 240);
> + ddr_init(560, 480, 240);
>  #endif
>  
>   wdr4300_usb_start();
> 


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Re: [U-Boot] [PATCH V2 2/7] mips: ath79: ar933x: Fix ethernet PHY mismatch

[Marek Vasut]

On 05/22/2016 05:59 AM, Wills Wang wrote:
> We need reset the Ethernet Switch analog part before operation,
> or the build-in Ethernet PHY don't work.
> 
> Signed-off-by: Wills Wang 
> ---

So what changed in V2 here ?

>  arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
>  arch/mips/mach-ath79/reset.c| 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h 
> b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> index a8e51cb..dabcad0 100644
> --- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> +++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> @@ -660,6 +660,7 @@
>  
>  #define AR933X_RESET_GE1_MDIOBIT(23)
>  #define AR933X_RESET_GE0_MDIOBIT(22)
> +#define AR933X_RESET_ETH_SWITCH_ANALOG   BIT(14)
>  #define AR933X_RESET_GE1_MAC BIT(13)
>  #define AR933X_RESET_WMACBIT(11)
>  #define AR933X_RESET_GE0_MAC BIT(9)
> diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
> index 188eccb..a88bcbc 100644
> --- a/arch/mips/mach-ath79/reset.c
> +++ b/arch/mips/mach-ath79/reset.c
> @@ -81,7 +81,8 @@ static int eth_init_ar933x(void)
> MAP_NOCACHE);
>   const u32 mask = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO |
>AR933X_RESET_GE1_MAC | AR933X_RESET_GE1_MDIO |
> -  AR933X_RESET_ETH_SWITCH;
> +  AR933X_RESET_ETH_SWITCH |
> +  AR933X_RESET_ETH_SWITCH_ANALOG;
>  
>   /* Clear MDIO slave EN bit. */
>   clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17));
> 


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[U-Boot] [PATCH] tools: Add entry for generated tools/bin2header to tools/.gitignore

[Robert P. J. Day]

Signed-off-by: Robert P. J. Day 

---

diff --git a/tools/.gitignore b/tools/.gitignore
index ff07680..cb1e722 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -1,4 +1,5 @@
 /atmel_pmecc_params
+/bin2header
 /bmp_logo
 /envcrc
 /fdtgrep

-- 


Robert P. J. Day Ottawa, Ontario, CANADA
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[U-Boot] couple questions re: special processing in image_setup_libfdt() for keystone

[Robert P. J. Day]

  i note that, at the bottom of the image_setup_libfdt() routine in
common/image-fdt.c, there is some special processing for a particular
SoC:

  #if defined(CONFIG_SOC_KEYSTONE)
if (IMAGE_OF_BOARD_SETUP)
ft_board_setup_ex(blob, gd->bd);
  #endif

first, it seems kind of ... tacky to have a general support routine
like that contain a snippet of S0C-specific code. i do understand what
it does, as described in fdt-support.h:

  /*
   * The keystone2 SOC requires all 32 bit aliased addresses to be converted
   * to their 36 physical format. This has to happen after all fdt nodes
   * are added or modified by the image_setup_libfdt(). The ft_board_setup_ex()
   * called at the end of the image_setup_libfdt() is to do that convertion.
   */
  void ft_board_setup_ex(void *blob, bd_t *bd);

but why not just support a general-purpose routine like, say,
ft_board_setup_post(), that *anyone* can define if they need it and
get rid of that conditional, just in case someone else might want
something similar down the road?

  (an alternative would be to just fold that fixup into
ft_verify_fdt() in that one case, which is already guaranteed to be
called.)

  and a more specific question about that particular bit of code -- as
you see above, the explanation is that the keystone SoC needs some
special fixup if the fdt is modified in that routine. but is it not
possible that the fdt might be modified by something *other* than
calling ft_board_setup()?

  put another way, would it not be safer to replace this:

  #if defined(CONFIG_SOC_KEYSTONE)
if (IMAGE_OF_BOARD_SETUP)
ft_board_setup_ex(blob, gd->bd);
  #endif

with this:

  #if defined(CONFIG_SOC_KEYSTONE)
ft_board_setup_ex(blob, gd->bd);
  #endif

just to play it safe?

rday

-- 


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[U-Boot] [PATCH 11/15] x86: broadwell: Correct I/O APIC ID

[Bin Meng]

Currently ID 2 is assgined to broadwell I/O APIC, however per
chromebook_samus.dts 2 is the core#2 LAPIC ID. Now we change
I/O APIC ID to 4 to avoid conflict.

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/broadwell/pch.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c
index f0798a7..317f57d 100644
--- a/arch/x86/cpu/broadwell/pch.c
+++ b/arch/x86/cpu/broadwell/pch.c
@@ -109,7 +109,8 @@ static void pch_enable_ioapic(void)
 {
u32 reg32;
 
-   io_apic_set_id(0x02);
+   /* Make sure this is a unique ID within system */
+   io_apic_set_id(0x04);
 
/* affirm full set of redirection table entries ("write once") */
reg32 = io_apic_read(0x01);
-- 
1.8.2.1

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[U-Boot] [PATCH 13/15] x86: kconfig: Add two options for SMBIOS manufacturer and product name

[Bin Meng]

This introduces two Kconfig options to be used by SMBIOS tables:
board manufacturer and product name.

Signed-off-by: Bin Meng 
---

 arch/x86/Kconfig | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index c57b99d..3c015c7 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -469,6 +469,22 @@ config GENERATE_SMBIOS_TABLE
 
  Check http://www.dmtf.org/standards/smbios for details.
 
+config SMBIOS_MANUFACTURER
+   string "SMBIOS Manufacturer"
+   depends on GENERATE_SMBIOS_TABLE
+   default SYS_VENDOR
+   help
+ The board manufacturer to store in SMBIOS structures.
+ Change this to override the default one (CONFIG_SYS_VENDOR).
+
+config SMBIOS_PRODUCT_NAME
+   string "SMBIOS Product Name"
+   depends on GENERATE_SMBIOS_TABLE
+   default SYS_BOARD
+   help
+ The product name to store in SMBIOS structures.
+ Change this to override the default one (CONFIG_SYS_BOARD).
+
 endmenu
 
 config MAX_PIRQ_LINKS
-- 
1.8.2.1

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[U-Boot] [PATCH 08/15] x86: Remove SMP limitation in lapic_setup()

[Bin Meng]

At present LAPIC is enabled and configured as virtual wire mode
in lapic_setup() only when CONFIG_SMP is on. This limitation is
however not necessary as for uniprocessor this is still needed.

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/lapic.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c
index dbb32c4..fbea2d1 100644
--- a/arch/x86/cpu/lapic.c
+++ b/arch/x86/cpu/lapic.c
@@ -124,7 +124,6 @@ int lapic_remote_read(int apicid, int reg, unsigned long 
*pvalue)
 
 void lapic_setup(void)
 {
-#ifdef CONFIG_SMP
/* Only Pentium Pro and later have those MSR stuff */
debug("Setting up local apic: ");
 
@@ -154,11 +153,7 @@ void lapic_setup(void)
LAPIC_DELIVERY_MODE_NMI));
 
debug("apic_id: 0x%02lx, ", lapicid());
-#else /* !CONFIG_SMP */
-   /* Only Pentium Pro and later have those MSR stuff */
-   debug("Disabling local apic: ");
-   disable_lapic();
-#endif /* CONFIG_SMP */
+
debug("done.\n");
post_code(POST_LAPIC);
 }
-- 
1.8.2.1

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[U-Boot] [PATCH 14/15] x86: Switch to use SMBIOS Kconfig options when writing SMBIOS tables

[Bin Meng]

Make use of the newly added Kconfig options of board manufacturer
and product name to write SMBIOS tables.

Signed-off-by: Bin Meng 
---

 arch/x86/lib/smbios.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/x86/lib/smbios.c b/arch/x86/lib/smbios.c
index 441fca9..9f30550 100644
--- a/arch/x86/lib/smbios.c
+++ b/arch/x86/lib/smbios.c
@@ -105,8 +105,8 @@ static int smbios_write_type1(u32 *current, int handle)
 
memset(t, 0, sizeof(struct smbios_type1));
fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle);
-   t->manufacturer = smbios_add_string(t->eos, CONFIG_SYS_VENDOR);
-   t->product_name = smbios_add_string(t->eos, CONFIG_SYS_BOARD);
+   t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER);
+   t->product_name = smbios_add_string(t->eos, CONFIG_SMBIOS_PRODUCT_NAME);
 
len = t->length + smbios_string_table_len(t->eos);
*current += len;
@@ -121,8 +121,8 @@ static int smbios_write_type2(u32 *current, int handle)
 
memset(t, 0, sizeof(struct smbios_type2));
fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle);
-   t->manufacturer = smbios_add_string(t->eos, CONFIG_SYS_VENDOR);
-   t->product_name = smbios_add_string(t->eos, CONFIG_SYS_BOARD);
+   t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER);
+   t->product_name = smbios_add_string(t->eos, CONFIG_SMBIOS_PRODUCT_NAME);
t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING;
t->board_type = SMBIOS_BOARD_MOTHERBOARD;
 
@@ -139,7 +139,7 @@ static int smbios_write_type3(u32 *current, int handle)
 
memset(t, 0, sizeof(struct smbios_type3));
fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle);
-   t->manufacturer = smbios_add_string(t->eos, CONFIG_SYS_VENDOR);
+   t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER);
t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP;
t->bootup_state = SMBIOS_STATE_SAFE;
t->power_supply_state = SMBIOS_STATE_SAFE;
-- 
1.8.2.1

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[U-Boot] [PATCH 15/15] x86: galileo: Override SMBIOS product name

[Bin Meng]

Override the default product name U-Boot reports in the SMBIOS
table, to be compatible with the Intel provided UEFI BIOS, as
Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
it to do different board level configuration.

Signed-off-by: Bin Meng 

---

 board/intel/galileo/Kconfig | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/board/intel/galileo/Kconfig b/board/intel/galileo/Kconfig
index 6515bac..87a0ec4 100644
--- a/board/intel/galileo/Kconfig
+++ b/board/intel/galileo/Kconfig
@@ -21,4 +21,15 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select INTEL_QUARK
select BOARD_ROMSIZE_KB_1024
 
+config SMBIOS_PRODUCT_NAME
+   default "GalileoGen2"
+   help
+ Override the default product name U-Boot reports in the SMBIOS
+ table, to be compatible with the Intel provided UEFI BIOS, as
+ Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
+ drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
+ it to do different board level configuration.
+
+ This can be "Galileo" for GEN1 Galileo board.
+
 endif
-- 
1.8.2.1

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[U-Boot] [PATCH 12/15] x86: galileo: Enable MP table generation

[Bin Meng]

Now that we have added CPU uclass driver and fixed the IOAPIC ID
conflict, enable MP table generation so that IOAPIC can be used
by the Linux kernel.

Signed-off-by: Bin Meng 
---

 configs/galileo_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 21432e6..f8d3c3b 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -4,6 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="galileo"
 CONFIG_TARGET_GALILEO=y
 CONFIG_ENABLE_MRC_CACHE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_MP_TABLE=y
 CONFIG_FIT=y
 CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
-- 
1.8.2.1

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[U-Boot] [PATCH 07/15] x86: Don't touch IA32_APIC_BASE MSR on Intel Quark

[Bin Meng]

Intel Quark processor core provides an integrated Local APIC but
does not support the IA32_APIC_BASE MSR. As a result, the Local
APIC is always globally enabled and the Local APIC base address
is fixed at 0xfee0. Attempting to access the IA32_APIC_BASE
MSR causes a general protection fault.

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/lapic.c | 28 
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c
index 30d2313..dbb32c4 100644
--- a/arch/x86/cpu/lapic.c
+++ b/arch/x86/cpu/lapic.c
@@ -65,23 +65,27 @@ void lapic_write(unsigned long reg, unsigned long v)
 
 void enable_lapic(void)
 {
-   msr_t msr;
-
-   msr = msr_read(MSR_IA32_APICBASE);
-   msr.hi &= 0xff00;
-   msr.lo |= MSR_IA32_APICBASE_ENABLE;
-   msr.lo &= ~MSR_IA32_APICBASE_BASE;
-   msr.lo |= LAPIC_DEFAULT_BASE;
-   msr_write(MSR_IA32_APICBASE, msr);
+   if (!IS_ENABLED(CONFIG_INTEL_QUARK)) {
+   msr_t msr;
+
+   msr = msr_read(MSR_IA32_APICBASE);
+   msr.hi &= 0xff00;
+   msr.lo |= MSR_IA32_APICBASE_ENABLE;
+   msr.lo &= ~MSR_IA32_APICBASE_BASE;
+   msr.lo |= LAPIC_DEFAULT_BASE;
+   msr_write(MSR_IA32_APICBASE, msr);
+   }
 }
 
 void disable_lapic(void)
 {
-   msr_t msr;
+   if (!IS_ENABLED(CONFIG_INTEL_QUARK)) {
+   msr_t msr;
 
-   msr = msr_read(MSR_IA32_APICBASE);
-   msr.lo &= ~MSR_IA32_APICBASE_ENABLE;
-   msr_write(MSR_IA32_APICBASE, msr);
+   msr = msr_read(MSR_IA32_APICBASE);
+   msr.lo &= ~MSR_IA32_APICBASE_ENABLE;
+   msr_write(MSR_IA32_APICBASE, msr);
+   }
 }
 
 unsigned long lapicid(void)
-- 
1.8.2.1

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[U-Boot] [PATCH 10/15] x86: quark: Assign a unique I/O APIC ID

[Bin Meng]

After power-on, both LAPIC and I/O APIC appear with the same APIC ID
zero, which creates an ID conflict. When generating MP table, U-Boot
reports zero as the LAPIC ID in the processor entry, and zero as the
I/O APIC ID in the I/O APIC as well as the I/O interrupt assignment
entries. Such MP table confuses Linux kernel and finally a kernel
panic is seen during boot:

  BUG: unable to handle kernel paging request at 9000
  IP: [] native_io_apic_write+0x22/0x30
  *pdpt = 014fb001 *pde = 014ff067 *pte = 
  Oops: 0002 [#1]
  Modules linked in:
  Pid: 1, comm: swapper Tainted: GW3.8.7 #3 intel galileo/galileo
  EIP: 0060:[] EFLAGS: 00010086 CPU: 0
  EIP is at native_io_apic_write+0x22/0x30
  ...
  Kernel panic - not syncing: Attempted to kill init! exitcode=0x0009

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/quark/quark.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index cf3fe7f..bdd360a 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -338,6 +339,9 @@ int arch_misc_init(void)
mrccache_save();
 #endif
 
+   /* Assign a unique I/O APIC ID */
+   io_apic_set_id(1);
+
return 0;
 }
 
-- 
1.8.2.1

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[U-Boot] [PATCH 09/15] x86: Call lapic_setup() in interrupt_init()

[Bin Meng]

Let's configure LAPIC in a common place - interrupt_init().

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/interrupts.c| 8 +---
 arch/x86/cpu/ivybridge/model_206ax.c | 2 --
 arch/x86/cpu/mp_init.c   | 2 --
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index 10dc4d4..dd2819a 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -15,14 +15,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
-#include 
-#include 
+#include 
 #include 
+#include 
 #include 
 #include 
-#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -266,6 +266,8 @@ int interrupt_init(void)
i8259_init();
 #endif
 
+   lapic_setup();
+
/* Initialize core interrupt and exception functionality of CPU */
cpu_init_interrupts();
 
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c 
b/arch/x86/cpu/ivybridge/model_206ax.c
index e710ac4..38e244b 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -14,7 +14,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -418,7 +417,6 @@ static int model_206ax_init(struct udevice *dev)
 
/* Enable the local cpu apics */
enable_lapic_tpr();
-   lapic_setup();
 
/* Enable virtualization if enabled in CMOS */
enable_vmx();
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 2604a68..bdcc029 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -408,8 +408,6 @@ static int init_bsp(struct udevice **devp)
cpu_get_name(processor_name);
debug("CPU: %s\n", processor_name);
 
-   lapic_setup();
-
apic_id = lapicid();
ret = find_cpu_by_apic_id(apic_id, devp);
if (ret) {
-- 
1.8.2.1

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[U-Boot] [PATCH 06/15] x86: galileo: Enable CPU driver

[Bin Meng]

Add a cpu node in the device tree and enable CPU driver.

Signed-off-by: Bin Meng 
---

 arch/x86/dts/galileo.dts  | 12 
 configs/galileo_defconfig |  2 ++
 2 files changed, 14 insertions(+)

diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index f784c50..da3cbff 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -29,6 +29,18 @@
stdout-path = 
};
 
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   device_type = "cpu";
+   compatible = "cpu-x86";
+   reg = <0>;
+   intel,apic-id = <0>;
+   };
+   };
+
tsc-timer {
clock-frequency = <4>;
};
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 17b1458..21432e6 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT=y
 CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CPU=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
@@ -30,6 +31,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_CPU=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
-- 
1.8.2.1

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[U-Boot] [PATCH 00/15] x86: Various updates and fixes

[Bin Meng]

This series include various updates and fixes to x86 support.

A major update is Intel Quark support, that MP table generation
is enabled and working well with Linux kernel.

This series is available at u-boot-x86/misc-working for testing.


Bin Meng (15):
  acpi: Clean IASL generated intermediate files
  x86: crownbay: Disable boot stage support
  x86: Add some notes for MRC cache with Intel FSP
  x86: baytrail: Update to latest microcode
  x86: Use latest microcode for all BayTrail boards
  x86: galileo: Enable CPU driver
  x86: Don't touch IA32_APIC_BASE MSR on Intel Quark
  x86: Remove SMP limitation in lapic_setup()
  x86: Call lapic_setup() in interrupt_init()
  x86: quark: Assign a unique I/O APIC ID
  x86: broadwell: Correct I/O APIC ID
  x86: galileo: Enable MP table generation
  x86: kconfig: Add two options for SMBIOS manufacturer and product name
  x86: Switch to use SMBIOS Kconfig options when writing SMBIOS tables
  x86: galileo: Override SMBIOS product name

 Makefile |1 +
 arch/x86/Kconfig |   23 +
 arch/x86/cpu/broadwell/pch.c |3 +-
 arch/x86/cpu/interrupts.c|8 +-
 arch/x86/cpu/ivybridge/model_206ax.c |2 -
 arch/x86/cpu/lapic.c |   35 +-
 arch/x86/cpu/mp_init.c   |2 -
 arch/x86/cpu/quark/quark.c   |4 +
 arch/x86/dts/bayleybay.dts   |4 +-
 arch/x86/dts/conga-qeval20-qa3-e3845.dts |4 +-
 arch/x86/dts/galileo.dts |   12 +
 arch/x86/dts/microcode/m0130673322.dtsi  | 3284 --
 arch/x86/dts/microcode/m0130673325.dtsi  | 3284 ++
 arch/x86/dts/microcode/m0130679901.dtsi  | 3284 --
 arch/x86/dts/microcode/m0130679907.dtsi  | 3284 ++
 arch/x86/dts/minnowmax.dts   |4 +-
 arch/x86/lib/smbios.c|   10 +-
 board/intel/galileo/Kconfig  |   11 +
 configs/crownbay_defconfig   |3 -
 configs/galileo_defconfig|3 +
 20 files changed, 6657 insertions(+), 6608 deletions(-)
 delete mode 100644 arch/x86/dts/microcode/m0130673322.dtsi
 create mode 100644 arch/x86/dts/microcode/m0130673325.dtsi
 delete mode 100644 arch/x86/dts/microcode/m0130679901.dtsi
 create mode 100644 arch/x86/dts/microcode/m0130679907.dtsi

-- 
1.8.2.1

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[U-Boot] [PATCH 03/15] x86: Add some notes for MRC cache with Intel FSP

[Bin Meng]

MRC cache relies on Intel FSP to produce a special GUID that
contains the MRC cache data. Add such information in the
CONFIG_ENABLE_MRC_CACHE help entry.

Signed-off-by: Bin Meng 
---

 arch/x86/Kconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index d304e29..c57b99d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -271,6 +271,13 @@ config ENABLE_MRC_CACHE
  to be used for speeding up boot time on future reboots and/or
  power cycles.
 
+ For platforms that use Intel FSP for the memory initialization,
+ please check FSP output HOB via U-Boot command 'fsp hob' to see
+ if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h).
+ If such GUID does not exist, MRC cache is not avaiable on such
+ platform (eg: Intel Queensbay), which means selecting this option
+ here does not make any difference.
+
 config HAVE_MRC
bool "Add a System Agent binary"
depends on !HAVE_FSP
-- 
1.8.2.1

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[U-Boot] [PATCH 01/15] acpi: Clean IASL generated intermediate files

[Bin Meng]

For boards that support ACPI, there are dsdt.aml, dsdt.asl.tmp and
dsdt.c in the board directory after a successful build. These are
intermediate files generated by IASL, and should be removed during
a 'make clean'.

Signed-off-by: Bin Meng 
---

 Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile b/Makefile
index 293fad0..9f5f2f0 100644
--- a/Makefile
+++ b/Makefile
@@ -1452,6 +1452,7 @@ clean: $(clean-dirs)
-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
-o -name '*.symtypes' -o -name 'modules.order' \
-o -name modules.builtin -o -name '.tmp_*.o.*' \
+   -o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-o -name '*.gcno' \) -type f -print | xargs rm -f
 
 # mrproper - Delete all generated files, including .config
-- 
1.8.2.1

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[U-Boot] [PATCH 05/15] x86: Use latest microcode for all BayTrail boards

[Bin Meng]

Update board device tree to include latest microcode.

Signed-off-by: Bin Meng 
---

 arch/x86/dts/bayleybay.dts   | 4 ++--
 arch/x86/dts/conga-qeval20-qa3-e3845.dts | 4 ++--
 arch/x86/dts/minnowmax.dts   | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 444de1b..4a50d86 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -250,10 +250,10 @@
 #include "microcode/m0230671117.dtsi"
};
update@1 {
-#include "microcode/m0130673322.dtsi"
+#include "microcode/m0130673325.dtsi"
};
update@2 {
-#include "microcode/m0130679901.dtsi"
+#include "microcode/m0130679907.dtsi"
};
};
 
diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts 
b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
index 624d66d..1a4ecaa 100644
--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -270,10 +270,10 @@
 
microcode {
update@0 {
-#include "microcode/m0130673322.dtsi"
+#include "microcode/m0130673325.dtsi"
};
update@1 {
-#include "microcode/m0130679901.dtsi"
+#include "microcode/m0130679907.dtsi"
};
};
 };
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index a6c86c9..936455b 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -298,10 +298,10 @@
 
microcode {
update@0 {
-#include "microcode/m0130673322.dtsi"
+#include "microcode/m0130673325.dtsi"
};
update@1 {
-#include "microcode/m0130679901.dtsi"
+#include "microcode/m0130679907.dtsi"
};
};
 
-- 
1.8.2.1

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[U-Boot] [PATCH 02/15] x86: crownbay: Disable boot stage support

[Bin Meng]

It is observed that when enabling boot stage support, occasionally
the board reboots during boot over and over again, and eventually
boots to shell. This was seen on my board, but not on Jian's board.
Debugging shows that the TSC timer calibration against PIT fails
as boot stage APIs utilize timer in a very early stage and at that
time TSC/PIT may not be stable enough for the calibration to pass.

Disable it for now.

Signed-off-by: Bin Meng 
Cc: Jian Luo 
---

 configs/crownbay_defconfig | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index 7c6b692..8e086c5 100644
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -8,8 +8,6 @@ CONFIG_HAVE_VGA_BIOS=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_FIT=y
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_CPU=y
 # CONFIG_CMD_IMLS is not set
@@ -24,7 +22,6 @@ CONFIG_CMD_DHCP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_PING=y
 CONFIG_CMD_TIME=y
-CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
-- 
1.8.2.1

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[U-Boot] [PATCH] tools/genboardscfg.py: remove bogus import subprocess

[Masahiro Yamada]

Since f6c8f38ec601 ("tools/genboardscfg.py: improve performance more
with Kconfiglib"), this tool does not use the subprocess module.

Signed-off-by: Masahiro Yamada 
---

 tools/genboardscfg.py | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py
index 23c956b..c2efad5 100755
--- a/tools/genboardscfg.py
+++ b/tools/genboardscfg.py
@@ -21,7 +21,6 @@ import glob
 import multiprocessing
 import optparse
 import os
-import subprocess
 import sys
 import tempfile
 import time
-- 
1.9.1

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