Re: [U-Boot] [PATCH 02/30] x86: ivybridge: Allow microcode to be collated

[Bin Meng]

On Tue, Jul 26, 2016 at 8:58 AM, Simon Glass  wrote:
> Generally the microcode is combined into a single block only (and removed
> from the device tree) when there are multiple blocks. But this is not a
> requirement.
>
> Adjust the ivybridge code to avoid assuming this.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/cpu/intel_common/microcode.c | 12 +++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 03/30] x86: Add debugging when cpu_common_init() fails

[Bin Meng]

On Tue, Jul 26, 2016 at 8:58 AM, Simon Glass  wrote:
> Add a debug() at this point to help figure out what is wrong.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/cpu/ivybridge/cpu.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>

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Re: [U-Boot] [PATCH 01/30] x86: Add debugging when a microcode update fails

[Bin Meng]

On Tue, Jul 26, 2016 at 8:58 AM, Simon Glass  wrote:
> Add a debug() at this point to help figure out what is wrong.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/cpu/intel_common/cpu.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>

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Re: [U-Boot] [PATCH 4/4] mmc: add workaround for eSDHC erratum A009620

[Yangbo Lu]

Hi Jaehoon,

> -Original Message-
> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> Sent: Thursday, July 28, 2016 1:01 PM
> To: Yangbo Lu; york sun; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH 4/4] mmc: add workaround for eSDHC erratum
> A009620
> 
> Hi Yangbo,
> 
> On 07/28/2016 12:20 PM, Yangbo Lu wrote:
> > Hi Jaehoon,
> >
> >
> >> -Original Message-
> >> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> >> Sent: Wednesday, July 27, 2016 7:21 PM
> >> To: Yangbo Lu; york sun; u-boot@lists.denx.de
> >> Subject: Re: [U-Boot] [PATCH 4/4] mmc: add workaround for eSDHC
> >> erratum
> >> A009620
> >>
> >> On 07/27/2016 04:10 PM, Yangbo Lu wrote:
>  -Original Message-
>  From: york sun
>  Sent: Tuesday, July 26, 2016 1:38 AM
>  To: Yangbo Lu; u-boot@lists.denx.de
>  Subject: Re: [PATCH 4/4] mmc: add workaround for eSDHC erratum
>  A009620
> 
>  On 05/20/2016 03:20 AM, Yangbo Lu wrote:
> > Erratum Title:
> > Data timeout error not getting set in case of command with busy
> > response (R1b) as well as for busy period after last write block
> > transfer.
> >
> > Description:
> > In the event that a busy timeout occurs for a command with a busy
> > response (e.g. R1b response) as well as busy period after the last
> > write block, the eSDHC does not set the IRQSTAT[DTOE] bit or the
> > IRQSTAT[TC]. Therefore, the current command transfer is never
> >> completed.
> >
> > Workaround:
> > Workaround for CMD with busy:
> > Don't set the XFRTYP[RSP]=2'b11 for commands with busy response
> > and poll the busy status of the card from the PRSSTAT[DLSL]
> >
> > Workaround for busy period after last write block:
> > 1. After the command completion interrupt (IRQSTAT[CC]), wait for
> >de-assertion of PRSTAT[WTA].
> > 2. Once PRSTAT[WTA] is de-asserted, start the software timer and
> poll
> >the busy signal (DAT0) using PRSTAT[DLSL[0]].
> > 3. Wait for DAT0 signal to go high (which indicate transfer
> complete)
> >or software timer expiry (which indicate data timeout error).
> > 4. Issue soft reset for data (SYSCTL[RSTD]).
> > 5. In case of data timeout error (detected in step 3) perform the
> >error recovery.
> >
> > The workaround for CMD with busy has already been applied in eSDHC
> > driver. This patch is to add workaround for the 2nd issue, and the
> > fixup platforms include
> > PowerPC(P1010/P2020/P5020/P5040/T1024/T1040/
> > T2080/T4240) and ARM(LS1021A/LS1043A/LS2080A).
> >
> > Signed-off-by: Yangbo Lu 
> > ---
> >  arch/powerpc/include/asm/config_mpc85xx.h |  8 
> >  drivers/mmc/fsl_esdhc.c   | 26
>  ++
> >  include/configs/ls1021aqds.h  |  1 +
> >  include/configs/ls1021atwr.h  |  1 +
> >  include/configs/ls1043a_common.h  |  1 +
> >  include/configs/ls2080a_simu.h|  1 +
> >  include/configs/ls2080aqds.h  |  1 +
> >  include/configs/ls2080ardb.h  |  1 +
> >  include/fsl_esdhc.h   |  1 +
> >  9 files changed, 41 insertions(+)
> 
>  Yangbo,
> 
>  Why do you put the macro CONFIG_SYS_FSL_ERRATUM_ESDHC_A009620 in
>  board header file if the erratum applies to the SoC?
> 
>  York
> 
> >>> [Lu Yangbo-B47093] Thanks a lot, York.
> >>> Could you suggest any better place where I can put this macro?
> >>> I didn't find such a good place :(
> >>
> >> If use your patch by default, is there performance degression?
> >> I don't know fsl_esdhc controller..so i just ask this. :)
> >>
> >
> > [Lu Yangbo-B47093] The original code polls 'Transfer Complete'
> interrupt or 'DMA' interrupt for transfer completion.
> > This patch will change to poll DAT0/BUSY line.
> > There should be no difference, but I think the udelay(100) in polling
> DAT0/BUSY may have a little affect on performance.
> > Anyway the patch will only apply to the silicon which has this erratum.
> 
> Thanks for explanation! :)
> I think you can split to config files and mmc side.

[Lu Yangbo-B47093] Ok, this should be no problem :)

> 
> And
> 
> while (esdhc_read32(®s->prsstat) & PRSSTAT_WTA);
> 
> This code has the potential infinite loop..
> 
> while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTD));
> 
> Ditto. In my experience, it's good that potential infinite loop case is
> removed.
> Because we can't sure that this condition has to hit. :)
> 

[Lu Yangbo-B47093] I think you're right. Although this would be ok from 
hardware perspective, there is still potential risk.
But how to remove them, is there any good idea? Is it proper to add timeout 
checking here ?

Thanks.

> Best Regards,
> Jaehoon Chung
> 
> >
> > Thanks.
> >
> >>>
> >>> Thanks.
> >>>
> >>>
> >>> ___
> >>> U-Boot mailing list
> >>

[U-Boot] [PATCH 2/2] fs/fat: Optimizes memory size with single global variable instead of 3

[Tien Fong Chee]

Single 64KB get_contents_vfatname_block global variable would be used for
all FAT implementation instead of allocating additional two global variables
which are get_denfromdir_block and do_fat_read_at_block. This implementation
can help in saving up 128KB memory space.

Signed-off-by: Tien Fong Chee 
---
Changes for V2:
- Renaming all references to get_dentfromdir_block and removing redundant
Cc: Dinh Nguyen 
Cc: Dinh Nguyen 
Cc: ChinLiang 
Cc: Vagrant Cascadian 
Cc: Simon Glass 
Cc: Stephen Warren 
Cc: Benoît Thébaudeau 
---
 fs/fat/fat.c   | 23 +--
 fs/fat/fat_write.c | 20 ++--
 2 files changed, 15 insertions(+), 28 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 826bd85..7f42af7 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -327,7 +327,7 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, 
unsigned long size)
  * into 'buffer'.
  * Update the number of bytes read in *gotsize or return -1 on fatal errors.
  */
-__u8 get_contents_vfatname_block[MAX_CLUSTSIZE]
+__u8 get_dentfromdir_block[MAX_CLUSTSIZE]
__aligned(ARCH_DMA_MINALIGN);
 
 static int get_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos,
@@ -373,14 +373,14 @@ static int get_contents(fsdata *mydata, dir_entry 
*dentptr, loff_t pos,
/* align to beginning of next cluster if any */
if (pos) {
actsize = min(filesize, (loff_t)bytesperclust);
-   if (get_cluster(mydata, curclust, get_contents_vfatname_block,
+   if (get_cluster(mydata, curclust, get_dentfromdir_block,
(int)actsize) != 0) {
printf("Error reading cluster\n");
return -1;
}
filesize -= actsize;
actsize -= pos;
-   memcpy(buffer, get_contents_vfatname_block + pos, actsize);
+   memcpy(buffer, get_dentfromdir_block + pos, actsize);
*gotsize += actsize;
if (!filesize)
return 0;
@@ -515,13 +515,13 @@ get_vfatname(fsdata *mydata, int curclust, __u8 *cluster,
return -1;
}
 
-   if (get_cluster(mydata, curclust, get_contents_vfatname_block,
+   if (get_cluster(mydata, curclust, get_dentfromdir_block,
mydata->clust_size * mydata->sect_size) != 0) {
debug("Error: reading directory block\n");
return -1;
}
 
-   slotptr2 = (dir_slot *)get_contents_vfatname_block;
+   slotptr2 = (dir_slot *)get_dentfromdir_block;
while (counter > 0) {
if (((slotptr2->id & ~LAST_LONG_ENTRY_MASK)
& 0xff) != counter)
@@ -532,7 +532,7 @@ get_vfatname(fsdata *mydata, int curclust, __u8 *cluster,
 
/* Save the real directory entry */
realdent = (dir_entry *)slotptr2;
-   while ((__u8 *)slotptr2 > get_contents_vfatname_block) {
+   while ((__u8 *)slotptr2 > get_dentfromdir_block) {
slotptr2--;
slot2str(slotptr2, l_name, &idx);
}
@@ -579,8 +579,6 @@ static __u8 mkcksum(const char name[8], const char ext[3])
  * Get the directory entry associated with 'filename' from the directory
  * starting at 'startsect'
  */
-__u8 get_dentfromdir_block[MAX_CLUSTSIZE]
-   __aligned(ARCH_DMA_MINALIGN);
 
 static dir_entry *get_dentfromdir(fsdata *mydata, int startsect,
  char *filename, dir_entry *retdent,
@@ -811,9 +809,6 @@ exit:
return ret;
 }
 
-__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
-   __aligned(ARCH_DMA_MINALIGN);
-
 int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
   loff_t maxsize, int dols, int dogetsize, loff_t *size)
 {
@@ -927,7 +922,7 @@ root_reparse:
int i;
 
if (mydata->fatsize == 32 || firsttime) {
-   dir_ptr = do_fat_read_at_block;
+   dir_ptr = get_dentfromdir_block;
firsttime = 0;
} else {
/**
@@ -947,8 +942,8 @@ root_reparse:
 *   0  |  sector n+1 | sector n+2 | sector n+3 |
 *   1  |  sector n+3 | ...
*/
-   dir_ptr = (do_fat_read_at_block + mydata->sect_size);
-   memcpy(do_fat_read_at_block, dir_ptr, 
mydata->sect_size);
+   dir_ptr = (get_dentfromdir_block + mydata->sect_size);
+   memcpy(get_dentfromdir_block, dir_ptr, 
mydata->sect_size);
}
 
do_read = 1;
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index c1d48c5..62f32bf 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -369,7 +369,6 @@ static __u

[U-Boot] [PATCH 1/2] fs/fat/fatwrite: Local variable as buffer to store dir_slot entries

[Tien Fong Chee]

fill_dir_slot use get_contents_vfatname_block as a temporary buffer for
constructing a list of dir_slot entries. To save the memory and providing
correct type of memory for above usage, a local buffer with accurate size
declaration is introduced.

The local array size 640 is used because for long file name entry,
each entry use 32 bytes, one entry can store up to 13 characters.
The maximum number of entry possible is 20. So, total size is
32*20=640bytes.

Signed-off-by: Genevieve Chan 
Signed-off-by: Tien Fong Chee 
---
Changes for V2
- Removed extra space
Cc: Dinh Nguyen 
Cc: Dinh Nguyen 
Cc: ChinLiang 
Cc: Vagrant Cascadian 
Cc: Simon Glass 
Cc: Stephen Warren 
Cc: Benoît Thébaudeau 
---
 fs/fat/fat_write.c | 3 ++-
 include/fat.h  | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index eb3a916..c1d48c5 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -323,7 +323,8 @@ static void flush_dir_table(fsdata *mydata, dir_entry 
**dentptr);
 static void
 fill_dir_slot(fsdata *mydata, dir_entry **dentptr, const char *l_name)
 {
-   dir_slot *slotptr = (dir_slot *)get_contents_vfatname_block;
+   __u8 temp_dir_slot_buffer[MAX_LFN_SLOT * sizeof(dir_slot)];
+   dir_slot *slotptr = (dir_slot *)temp_dir_slot_buffer;
__u8 counter = 0, checksum;
int idx = 0, ret;
char s_name[16];
diff --git a/include/fat.h b/include/fat.h
index 9d053e6..483ff7c 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -33,6 +33,8 @@
 #define FAT16BUFSIZE   (FATBUFSIZE/2)
 #define FAT32BUFSIZE   (FATBUFSIZE/4)
 
+/* Maximum number of entry for long file name according to spec */
+#define MAX_LFN_SLOT   20
 
 /* Filesystem identifiers */
 #define FAT12_SIGN "FAT12   "
-- 
1.8.2.1

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Re: [U-Boot] [PATCH 4/4] mmc: add workaround for eSDHC erratum A009620

[Yangbo Lu]

Hi Jaehoon,


> -Original Message-
> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> Sent: Wednesday, July 27, 2016 7:21 PM
> To: Yangbo Lu; york sun; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH 4/4] mmc: add workaround for eSDHC erratum
> A009620
> 
> On 07/27/2016 04:10 PM, Yangbo Lu wrote:
> >> -Original Message-
> >> From: york sun
> >> Sent: Tuesday, July 26, 2016 1:38 AM
> >> To: Yangbo Lu; u-boot@lists.denx.de
> >> Subject: Re: [PATCH 4/4] mmc: add workaround for eSDHC erratum
> >> A009620
> >>
> >> On 05/20/2016 03:20 AM, Yangbo Lu wrote:
> >>> Erratum Title:
> >>> Data timeout error not getting set in case of command with busy
> >>> response (R1b) as well as for busy period after last write block
> >>> transfer.
> >>>
> >>> Description:
> >>> In the event that a busy timeout occurs for a command with a busy
> >>> response (e.g. R1b response) as well as busy period after the last
> >>> write block, the eSDHC does not set the IRQSTAT[DTOE] bit or the
> >>> IRQSTAT[TC]. Therefore, the current command transfer is never
> completed.
> >>>
> >>> Workaround:
> >>> Workaround for CMD with busy:
> >>> Don't set the XFRTYP[RSP]=2'b11 for commands with busy response and
> >>> poll the busy status of the card from the PRSSTAT[DLSL]
> >>>
> >>> Workaround for busy period after last write block:
> >>> 1. After the command completion interrupt (IRQSTAT[CC]), wait for
> >>>de-assertion of PRSTAT[WTA].
> >>> 2. Once PRSTAT[WTA] is de-asserted, start the software timer and poll
> >>>the busy signal (DAT0) using PRSTAT[DLSL[0]].
> >>> 3. Wait for DAT0 signal to go high (which indicate transfer complete)
> >>>or software timer expiry (which indicate data timeout error).
> >>> 4. Issue soft reset for data (SYSCTL[RSTD]).
> >>> 5. In case of data timeout error (detected in step 3) perform the
> >>>error recovery.
> >>>
> >>> The workaround for CMD with busy has already been applied in eSDHC
> >>> driver. This patch is to add workaround for the 2nd issue, and the
> >>> fixup platforms include PowerPC(P1010/P2020/P5020/P5040/T1024/T1040/
> >>> T2080/T4240) and ARM(LS1021A/LS1043A/LS2080A).
> >>>
> >>> Signed-off-by: Yangbo Lu 
> >>> ---
> >>>  arch/powerpc/include/asm/config_mpc85xx.h |  8 
> >>>  drivers/mmc/fsl_esdhc.c   | 26
> >> ++
> >>>  include/configs/ls1021aqds.h  |  1 +
> >>>  include/configs/ls1021atwr.h  |  1 +
> >>>  include/configs/ls1043a_common.h  |  1 +
> >>>  include/configs/ls2080a_simu.h|  1 +
> >>>  include/configs/ls2080aqds.h  |  1 +
> >>>  include/configs/ls2080ardb.h  |  1 +
> >>>  include/fsl_esdhc.h   |  1 +
> >>>  9 files changed, 41 insertions(+)
> >>
> >> Yangbo,
> >>
> >> Why do you put the macro CONFIG_SYS_FSL_ERRATUM_ESDHC_A009620 in
> >> board header file if the erratum applies to the SoC?
> >>
> >> York
> >>
> > [Lu Yangbo-B47093] Thanks a lot, York.
> > Could you suggest any better place where I can put this macro?
> > I didn't find such a good place :(
> 
> If use your patch by default, is there performance degression?
> I don't know fsl_esdhc controller..so i just ask this. :)
> 

[Lu Yangbo-B47093] The original code polls 'Transfer Complete' interrupt or 
'DMA' interrupt for transfer completion.
This patch will change to poll DAT0/BUSY line. 
There should be no difference, but I think the udelay(100) in polling DAT0/BUSY 
may have a little affect on performance.
Anyway the patch will only apply to the silicon which has this erratum.

Thanks.

> >
> > Thanks.
> >
> >
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot
> >
> >
> >

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Re: [U-Boot] [PATCH] x86: som-db5800-som-6867: fix SERIRQ on reset

[Bin Meng]

On Thu, Jul 28, 2016 at 6:01 AM, George McCollister
 wrote:
> Pad configuration for SERIRQ is not set to enable the SERIRQ function
> on soft reset though strangely, it is on initial boot.
>

What does "soft reset" mean?

> Signed-off-by: George McCollister 
> ---
>  arch/x86/dts/baytrail_som-db5800-som-6867.dts | 6 ++
>  1 file changed, 6 insertions(+)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH] mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"

[Jaehoon Chung]

Hi All,

On 07/26/2016 07:03 PM, Jaehoon Chung wrote:
> This "commit 429790026021d522d51617217d4b86218cca5750" is wrong.
> SDHCI_QUIRK_NO_HISPD_BIT is for skipping to set CTRL_HISPD bit.
> 
> For example, Exynos didn't have CTRL_HISPD. But Highspeed mode
> is supported.
> (This quirks doesn't mean  that driver didn't support the Highseepd mode.)
> 
> Note: If driver didn't support the Highspeed Mode, use or add the other
> quirks.
> 
> After applied this patch, all Exynos SoCs are just running with 25MHz.

SDHCI_QUIRK_NO_HISPD had added from me.
At that time, it meant the Controller doesn't have the SDHCI_CTRL_HISPD bit[2].
In exynos, this bit is using as OUTEDGINV (Output Egde Inversion).
I added SDHCI_QUIRK_NO_HISPD to prevent wrong bit operation likes this.

And in drivers/mmc/mmc.c 1328 line, 

mmc->card_caps &= mmc->cfg->host_caps;

After reading card's capabilities, if card didn't support those, then it's 
cleared.
I don't know why cleared these capabilities before checking the card's 
capabilities.

After applied commit "42979002602"

Device: SAMSUNG SDHCI
Manufacturer ID: 3
OEM: 5344
Name: SU16G
Tran Speed: 2500
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

After reverted commit "42979002602"

Device: SAMSUNG SDHCI
Manufacturer ID: 3
OEM: 5344
Name: SU16G
Tran Speed: 5000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

There is no purpose, it needs to revert for Other SoCs.

Best Regards,
Jaehoon Chung

> 
> Signed-off-by: Jaehoon Chung 
> ---
>  drivers/mmc/sdhci.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index 9fdbed8..1fa4038 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -553,9 +553,6 @@ int sdhci_setup_cfg(struct mmc_config *cfg, const char 
> *name, int buswidth,
>   cfg->host_caps |= MMC_MODE_8BIT;
>   }
>  
> - if (quirks & SDHCI_QUIRK_NO_HISPD_BIT)
> - cfg->host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz);
> -
>   if (host_caps)
>   cfg->host_caps |= host_caps;
>  
> 

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Re: [U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit

[Ziyuan Xu]

Hi Jaehoon,

On 2016年07月28日 13:26, Jaehoon Chung wrote:

According to DesignWare TRM, FIFO_COUNT is bit[29:17].
If get the correct fifo_count value, it has to  use the FIFO_MASK
as 0x1FFF, not 0x1FF.
Ah, I have no doubt the fifo_count defined. The fifo depth of Rockchip 
SoCs is 256, the former work sane coincidentally.:-)

Thanks for fix.
Reviewed-by: Ziyuan Xu 


Signed-off-by: Jaehoon Chung 
---
  include/dwmmc.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/dwmmc.h b/include/dwmmc.h
index 6aebe96..eb03f7f 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -105,7 +105,7 @@
  
  /* Status Register */

  #define DWMCI_BUSY(1 << 9)
-#define DWMCI_FIFO_MASK0x1ff
+#define DWMCI_FIFO_MASK0x1fff
  #define DWMCI_FIFO_SHIFT  17
  
  /* FIFOTH Register */



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Re: [U-Boot] [RFC PATCH] i2c: i2c-uclass-compat: avoid any BSS usage

[Vignesh R]

On Tuesday 26 July 2016 11:53 AM, Heiko Schocher wrote:
> Hello Vignesh,
> 
> Am 25.07.2016 um 12:56 schrieb Vignesh R:
>> As I2C can be used before DRAM initialization for reading EEPROM,
>> avoid using static variables stored in BSS, since BSS is in DRAM, which
>> may not have been initialised yet. Explicitly mark "static global"
>> variables as belonging to the .data section.
>>
>> Signed-off-by: Vignesh R 
>> ---
>>   drivers/i2c/i2c-uclass-compat.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Acked-by: Heiko Schocher
> 

Thanks! Would you be picking up this patch?

>>
>> diff --git a/drivers/i2c/i2c-uclass-compat.c
>> b/drivers/i2c/i2c-uclass-compat.c
>> index 5606d1f807f6..de78db6a887f 100644
>> --- a/drivers/i2c/i2c-uclass-compat.c
>> +++ b/drivers/i2c/i2c-uclass-compat.c
>> @@ -9,7 +9,7 @@
>>   #include 
>>   #include 
>>
>> -static int cur_busnum;
>> +static int cur_busnum __attribute__((section(".data")));
>>
>>   static int i2c_compat_get_device(uint chip_addr, int alen,
>>struct udevice **devp)
>>
> 

-- 
Regards
Vignesh
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[U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit

[Jaehoon Chung]

According to DesignWare TRM, FIFO_COUNT is bit[29:17].
If get the correct fifo_count value, it has to  use the FIFO_MASK
as 0x1FFF, not 0x1FF.

Signed-off-by: Jaehoon Chung 
---
 include/dwmmc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/dwmmc.h b/include/dwmmc.h
index 6aebe96..eb03f7f 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -105,7 +105,7 @@
 
 /* Status Register */
 #define DWMCI_BUSY (1 << 9)
-#define DWMCI_FIFO_MASK0x1ff
+#define DWMCI_FIFO_MASK0x1fff
 #define DWMCI_FIFO_SHIFT   17
 
 /* FIFOTH Register */
-- 
1.9.1

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Re: [U-Boot] [PATCH] mmc: send CMD0 before CMD1 for some MMC cards

[Yangbo Lu]

Hi Ziyuan and Jaehoon,


> -Original Message-
> From: Ziyuan Xu [mailto:xzy...@rock-chips.com]
> Sent: Wednesday, July 27, 2016 9:37 PM
> To: Jaehoon Chung; Yangbo Lu; u-boot@lists.denx.de; Tom Rini
> Cc: Pantelis Antoniou
> Subject: Re: [U-Boot] [PATCH] mmc: send CMD0 before CMD1 for some MMC
> cards
> 
> 
> 
> On 2016年07月27日 19:15, Jaehoon Chung wrote:
> > On 07/27/2016 04:28 PM, Yangbo Lu wrote:
> >> Hi Tom,
> >>
> >> Could you help to assign this mmc patch reviewing to right person?
> >> It seems no one had reviewed it for almost half year.
> >>
> >> And another my mmc patch also needs to be reviewed.
> >> I submitted in May. Please help.
> >> http://patchwork.ozlabs.org/patch/624448/
> >>
> >>
> >> Thank you very much.
> >>
> >>
> >> Best regards,
> >> Yangbo Lu
> >>
> >>> -Original Message-
> >>> From: Yangbo Lu [mailto:yangbo...@nxp.com]
> >>> Sent: Wednesday, March 09, 2016 11:00 AM
> >>> To: u-boot@lists.denx.de
> >>> Cc: Pantelis Antoniou; Yangbo Lu
> >>> Subject: [PATCH] mmc: send CMD0 before CMD1 for some MMC cards
> >>>
> >>> When the MMC framework was added in u-boot, the mmc_go_idle was
> >>> added before mmc_send_op_cond_iter in function mmc_send_op_cond
> >>> annotating that some cards seemed to need this. Actually, we still
> >>> need to do this in function mmc_complete_op_cond for those cards.
> >>> This has been verified on Micron MTFC4GACAECN eMMC chip.
> > If there is no go_idle(), then what happen?
> > If you share the information more, i can check the more..
> Sounds interesting, I also want want to know what happen?
> It seems like you failed in CMD1? The eMMC device was always in busy
> device within 1 second?

[Lu Yangbo-B47093] This was an issue which our customer reported and required 
us to fix in March.
They used NXP LS1020A platform and Micron MTFC4GACAECN eMMC, and reported they 
had to add CMD0 as below.
Otherwise it couldn’t read OCR.

static int mmc_complete_op_cond(struct mmc *mmc) {
struct mmc_cmd cmd;
int timeout = 1000;
uint start;
int err;

#if defined (XXX_CHANGED)   
// our eMMC chip (Micron MTFC4GACAECN) requires that it be put in idle 
mode before
// negociating the operating voltage levels.
mmc_go_idle(mmc);
#endif  


I hadn’t reproduce this to get more details about this issue since I didn’t 
have one this kind eMMC card that time.
Thanks.

> >
> > Best Regards,
> > Jaehoon Chung
> >
> >>> Signed-off-by: Yangbo Lu 
> >>> ---
> >>>   drivers/mmc/mmc.c | 3 +++
> >>>   1 file changed, 3 insertions(+)
> >>>
> >>> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index
> >>> ede5d6e..82e3268
> >>> 100644
> >>> --- a/drivers/mmc/mmc.c
> >>> +++ b/drivers/mmc/mmc.c
> >>> @@ -418,6 +418,9 @@ static int mmc_complete_op_cond(struct mmc *mmc)
> >>>   uint start;
> >>>   int err;
> >>>
> >>> + /* Some cards seem to need this */
> >>> + mmc_go_idle(mmc);
> >>> +
> >>>   mmc->op_cond_pending = 0;
> >>>   if (!(mmc->ocr & OCR_BUSY)) {
> >>>   start = get_timer(0);
> >>> --
> >>> 2.1.0.27.g96db324
> >> ___
> >> U-Boot mailing list
> >> U-Boot@lists.denx.de
> >> http://lists.denx.de/mailman/listinfo/u-boot
> >>
> >>
> >>
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot
> 

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Re: [U-Boot] [PATCH 4/4] mmc: add workaround for eSDHC erratum A009620

[Jaehoon Chung]

Hi Yangbo,

On 07/28/2016 12:20 PM, Yangbo Lu wrote:
> Hi Jaehoon,
> 
> 
>> -Original Message-
>> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
>> Sent: Wednesday, July 27, 2016 7:21 PM
>> To: Yangbo Lu; york sun; u-boot@lists.denx.de
>> Subject: Re: [U-Boot] [PATCH 4/4] mmc: add workaround for eSDHC erratum
>> A009620
>>
>> On 07/27/2016 04:10 PM, Yangbo Lu wrote:
 -Original Message-
 From: york sun
 Sent: Tuesday, July 26, 2016 1:38 AM
 To: Yangbo Lu; u-boot@lists.denx.de
 Subject: Re: [PATCH 4/4] mmc: add workaround for eSDHC erratum
 A009620

 On 05/20/2016 03:20 AM, Yangbo Lu wrote:
> Erratum Title:
> Data timeout error not getting set in case of command with busy
> response (R1b) as well as for busy period after last write block
> transfer.
>
> Description:
> In the event that a busy timeout occurs for a command with a busy
> response (e.g. R1b response) as well as busy period after the last
> write block, the eSDHC does not set the IRQSTAT[DTOE] bit or the
> IRQSTAT[TC]. Therefore, the current command transfer is never
>> completed.
>
> Workaround:
> Workaround for CMD with busy:
> Don't set the XFRTYP[RSP]=2'b11 for commands with busy response and
> poll the busy status of the card from the PRSSTAT[DLSL]
>
> Workaround for busy period after last write block:
> 1. After the command completion interrupt (IRQSTAT[CC]), wait for
>de-assertion of PRSTAT[WTA].
> 2. Once PRSTAT[WTA] is de-asserted, start the software timer and poll
>the busy signal (DAT0) using PRSTAT[DLSL[0]].
> 3. Wait for DAT0 signal to go high (which indicate transfer complete)
>or software timer expiry (which indicate data timeout error).
> 4. Issue soft reset for data (SYSCTL[RSTD]).
> 5. In case of data timeout error (detected in step 3) perform the
>error recovery.
>
> The workaround for CMD with busy has already been applied in eSDHC
> driver. This patch is to add workaround for the 2nd issue, and the
> fixup platforms include PowerPC(P1010/P2020/P5020/P5040/T1024/T1040/
> T2080/T4240) and ARM(LS1021A/LS1043A/LS2080A).
>
> Signed-off-by: Yangbo Lu 
> ---
>  arch/powerpc/include/asm/config_mpc85xx.h |  8 
>  drivers/mmc/fsl_esdhc.c   | 26
 ++
>  include/configs/ls1021aqds.h  |  1 +
>  include/configs/ls1021atwr.h  |  1 +
>  include/configs/ls1043a_common.h  |  1 +
>  include/configs/ls2080a_simu.h|  1 +
>  include/configs/ls2080aqds.h  |  1 +
>  include/configs/ls2080ardb.h  |  1 +
>  include/fsl_esdhc.h   |  1 +
>  9 files changed, 41 insertions(+)

 Yangbo,

 Why do you put the macro CONFIG_SYS_FSL_ERRATUM_ESDHC_A009620 in
 board header file if the erratum applies to the SoC?

 York

>>> [Lu Yangbo-B47093] Thanks a lot, York.
>>> Could you suggest any better place where I can put this macro?
>>> I didn't find such a good place :(
>>
>> If use your patch by default, is there performance degression?
>> I don't know fsl_esdhc controller..so i just ask this. :)
>>
> 
> [Lu Yangbo-B47093] The original code polls 'Transfer Complete' interrupt or 
> 'DMA' interrupt for transfer completion.
> This patch will change to poll DAT0/BUSY line. 
> There should be no difference, but I think the udelay(100) in polling 
> DAT0/BUSY may have a little affect on performance.
> Anyway the patch will only apply to the silicon which has this erratum.

Thanks for explanation! :)
I think you can split to config files and mmc side. 

And 

while (esdhc_read32(®s->prsstat) & PRSSTAT_WTA);

This code has the potential infinite loop..

while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTD));

Ditto. In my experience, it's good that potential infinite loop case is removed.
Because we can't sure that this condition has to hit. :)

Best Regards,
Jaehoon Chung

> 
> Thanks.
> 
>>>
>>> Thanks.
>>>
>>>
>>> ___
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>>>
>>>
>>>
> 
> 
> 
> 

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Re: [U-Boot] [PATCH v2 0/8] basic rockchip rk3188 support

[Simon Glass]

Hi Heiko,

On 22 July 2016 at 15:51, Heiko Stuebner  wrote:
> Second version. Simon already applied the cleanup patches from my
> first version. I've tried to address Simons comments and hopefully
> haven't overlooked any.
>
> SPL is still missing, so following Simons comment from earlier
> it cannot go in yet, but maybe the first two cleanups can.

Re the first patch, if you can resend it as a 'move' patch then I can
apply it. Please base on u-boot-rockchip/master.

For rk3188, yes I would prefer to wait until we have the proper SPL.
It sounds like you are close? I don't have an rk3188 board - I could
get a TV box with that chip but I'm not sure if it would work for
development.

>
> changes in v2:
> - move clock drivers to subdirectory
> - use already available log2 function in clock drivers
> - SPDX header in clock bindings
> - showcase rk3188 arch code and rock board
>
> Heiko Stuebner (10):
>   rockchip: move clock drivers into a subdirectory
>   rockchip: remove log2 reimplementation from clock drivers
>   rockchip: rk3188: Add header files for PMU and GRF
>   rockchip: rk3188: Add pinctrl driver
>   rockchip: rk3188: Bring in rk3066/rk3188 clock bindings
>   rockchip: rk3188: Add clock driver
>   rockchip: rk3188: add core support
>   rockchip: rk3188: Radxa Rock board
>   add unfinished SPL support
>   hacks to make my rock netboot a fit image
>
>  arch/arm/dts/Makefile   |   1 +
>  arch/arm/dts/rk3188-radxarock.dts   | 406 +++
>  arch/arm/dts/rk3188.dtsi| 631 ++
>  arch/arm/dts/rk3xxx.dtsi| 431 
>  arch/arm/include/asm/arch-rockchip/cru_rk3188.h | 183 +
>  arch/arm/include/asm/arch-rockchip/grf_rk3188.h | 589 
>  arch/arm/include/asm/arch-rockchip/pmu_rk3188.h |  36 +
>  arch/arm/mach-rockchip/Kconfig  |  11 +
>  arch/arm/mach-rockchip/Makefile |   2 +
>  arch/arm/mach-rockchip/rk3188-board-spl.c   | 190 ++
>  arch/arm/mach-rockchip/rk3188/Kconfig   |  20 +
>  arch/arm/mach-rockchip/rk3188/Makefile  |  10 +
>  arch/arm/mach-rockchip/rk3188/clk_rk3188.c  |  17 +
>  arch/arm/mach-rockchip/rk3188/reset_rk3188.c|  47 ++
>  arch/arm/mach-rockchip/rk3188/sdram_rk3188.c| 839 +++
>  arch/arm/mach-rockchip/rk3188/syscon_rk3188.c   |  24 +
>  board/radxa/rock/Kconfig|  15 +
>  board/radxa/rock/MAINTAINERS|   6 +
>  board/radxa/rock/Makefile   |   7 +
>  board/radxa/rock/rock.c |  32 +
>  configs/rock_defconfig  |  80 +++
>  drivers/clk/Makefile|   3 +-
>  drivers/clk/clk_rk3036.c| 386 ---
>  drivers/clk/clk_rk3288.c| 851 
> 
>  drivers/clk/rockchip/Makefile   |   9 +
>  drivers/clk/rockchip/clk_rk3036.c   | 382 +++
>  drivers/clk/rockchip/clk_rk3188.c   | 493 ++
>  drivers/clk/rockchip/clk_rk3288.c   | 847 +++
>  drivers/pinctrl/Kconfig |   9 +
>  drivers/pinctrl/rockchip/Makefile   |   1 +
>  drivers/pinctrl/rockchip/pinctrl_rk3188.c   | 613 +
>  drivers/usb/host/dwc2.c |   4 +-
>  include/configs/rk3188_common.h | 109 +++
>  include/configs/rock.h  |  66 ++
>  include/dt-bindings/clock/rk3066a-cru.h |  32 +
>  include/dt-bindings/clock/rk3188-cru-common.h   | 248 +++
>  include/dt-bindings/clock/rk3188-cru.h  |  48 ++
>  tools/rkcommon.c|   1 +
>  38 files changed, 6438 insertions(+), 1241 deletions(-)
>  create mode 100644 arch/arm/dts/rk3188-radxarock.dts
>  create mode 100644 arch/arm/dts/rk3188.dtsi
>  create mode 100644 arch/arm/dts/rk3xxx.dtsi
>  create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3188.h
>  create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3188.h
>  create mode 100644 arch/arm/include/asm/arch-rockchip/pmu_rk3188.h
>  create mode 100644 arch/arm/mach-rockchip/rk3188-board-spl.c
>  create mode 100644 arch/arm/mach-rockchip/rk3188/Kconfig
>  create mode 100644 arch/arm/mach-rockchip/rk3188/Makefile
>  create mode 100644 arch/arm/mach-rockchip/rk3188/clk_rk3188.c
>  create mode 100644 arch/arm/mach-rockchip/rk3188/reset_rk3188.c
>  create mode 100644 arch/arm/mach-rockchip/rk3188/sdram_rk3188.c
>  create mode 100644 arch/arm/mach-rockchip/rk3188/syscon_rk3188.c
>  create mode 100644 board/radxa/rock/Kconfig
>  create mode 100644 board/radxa/rock/MAINTAINERS
>  create mode 100644 board/radxa/rock/Makefile
>  create mode 100644 board/radxa/rock/rock.c
>  create mode 100644 configs/rock_defconfig
>  delete mode 100644 drivers/clk/clk_rk3036.c
>  delete mode 100644 drivers/

Re: [U-Boot] [PATCH v2 06/11] buildman: Fix a typo in TestSettingsHasPath()

[Tom Rini]

On Wed, Jul 27, 2016 at 08:33:03PM -0600, Simon Glass wrote:

> The function comment should say 'buildman'. Fix it.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Tom Rini 

-- 
Tom


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[U-Boot] [PATCH] rockchip: add fastboot support for rk3036 board

[Ziyuan Xu]

Enable fastboot feature on rk3036, please refer to doc/README.rockchip
for more detailed usage.

Signed-off-by: Ziyuan Xu 
---

 arch/arm/dts/rk3036-sdk.dts|  2 --
 board/rockchip/evb_rk3036/evb_rk3036.c | 46 ++
 board/rockchip/kylin_rk3036/kylin_rk3036.c | 46 ++
 include/configs/rk3036_common.h| 21 +-
 4 files changed, 112 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/rk3036-sdk.dts b/arch/arm/dts/rk3036-sdk.dts
index a83badb..1c9ddf9 100644
--- a/arch/arm/dts/rk3036-sdk.dts
+++ b/arch/arm/dts/rk3036-sdk.dts
@@ -41,6 +41,4 @@
 
 &usb_otg {
status = "okay";
-
-   dr_mode = "host";
 };
diff --git a/board/rockchip/evb_rk3036/evb_rk3036.c 
b/board/rockchip/evb_rk3036/evb_rk3036.c
index f5758b1..e5582b4 100644
--- a/board/rockchip/evb_rk3036/evb_rk3036.c
+++ b/board/rockchip/evb_rk3036/evb_rk3036.c
@@ -47,3 +47,49 @@ void enable_caches(void)
dcache_enable();
 }
 #endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include 
+#include 
+
+static struct dwc2_plat_otg_data rk3036_otg_data = {
+   .rx_fifo_sz = 512,
+   .np_tx_fifo_sz  = 16,
+   .tx_fifo_sz = 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   int node;
+   const char *mode;
+   bool matched = false;
+   const void *blob = gd->fdt_blob;
+
+   /* find the usb_otg node */
+   node = fdt_node_offset_by_compatible(blob, -1,
+   "rockchip,rk3288-usb");
+
+   while (node > 0) {
+   mode = fdt_getprop(blob, node, "dr_mode", NULL);
+   if (mode && strcmp(mode, "otg") == 0) {
+   matched = true;
+   break;
+   }
+
+   node = fdt_node_offset_by_compatible(blob, node,
+   "rockchip,rk3288-usb");
+   }
+   if (!matched) {
+   debug("Not found usb_otg device\n");
+   return -ENODEV;
+   }
+   rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+   return dwc2_udc_probe(&rk3036_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+   return 0;
+}
+#endif
diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c 
b/board/rockchip/kylin_rk3036/kylin_rk3036.c
index 2a25871..5ade695 100644
--- a/board/rockchip/kylin_rk3036/kylin_rk3036.c
+++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c
@@ -79,3 +79,49 @@ void enable_caches(void)
dcache_enable();
 }
 #endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include 
+#include 
+
+static struct dwc2_plat_otg_data rk3036_otg_data = {
+   .rx_fifo_sz = 512,
+   .np_tx_fifo_sz  = 16,
+   .tx_fifo_sz = 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   int node;
+   const char *mode;
+   bool matched = false;
+   const void *blob = gd->fdt_blob;
+
+   /* find the usb_otg node */
+   node = fdt_node_offset_by_compatible(blob, -1,
+   "rockchip,rk3288-usb");
+
+   while (node > 0) {
+   mode = fdt_getprop(blob, node, "dr_mode", NULL);
+   if (mode && strcmp(mode, "otg") == 0) {
+   matched = true;
+   break;
+   }
+
+   node = fdt_node_offset_by_compatible(blob, node,
+   "rockchip,rk3288-usb");
+   }
+   if (!matched) {
+   debug("Not found usb_otg device\n");
+   return -ENODEV;
+   }
+   rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+   return dwc2_udc_probe(&rk3036_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+   return 0;
+}
+#endif
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index ffcaa6f..21d4683 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -6,7 +6,7 @@
 #ifndef __CONFIG_RK3036_COMMON_H
 #define __CONFIG_RK3036_COMMON_H
 
-#define CONFIG_SYS_CACHELINE_SIZE  32
+#define CONFIG_SYS_CACHELINE_SIZE  64
 
 #include 
 
@@ -60,6 +60,25 @@
 #define CONFIG_SF_DEFAULT_SPEED 2000
 
 #ifndef CONFIG_SPL_BUILD
+/* usb otg */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_DWC2_OTG
+#define CONFIG_USB_GADGET_VBUS_DRAW0
+
+/* fastboot  */
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV  0
+#define CONFIG_FASTBOOT_BUF_ADDR   CONFIG_SYS_LOAD_ADDR
+#define CONFIG_FASTBOOT_BUF_SIZE   0x0800
+
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_G_DNL_MANUFACTURER  "Rockchip"
+#define CONFIG_G_DNL_VENDOR_NUM0x2207
+#define CONFIG_G_DNL_PRODUCT_NUM   0x310a
+
 #in

[U-Boot] [PATCH] rockchip: add support for rk3288 miniarm board

[Ziyuan Xu]

Miniarm is a rockchip rk3288 based development board, which has lots of
interface such as HDMI, USB, micro-SD card, Audio etc.

Signed-off-by: Ziyuan Xu 
---

 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/rk3288-miniarm.dts|  61 +++
 arch/arm/dts/rk3288-miniarm.dtsi   | 533 +
 arch/arm/mach-rockchip/rk3288/Kconfig  |  10 +
 board/rockchip/miniarm_rk3288/Kconfig  |  15 +
 board/rockchip/miniarm_rk3288/MAINTAINERS  |   6 +
 board/rockchip/miniarm_rk3288/Makefile |   7 +
 board/rockchip/miniarm_rk3288/miniarm-rk3288.c |  15 +
 configs/miniarm-rk3288_defconfig   |  65 +++
 doc/README.rockchip|   3 +-
 include/configs/miniarm_rk3288.h   |  26 ++
 11 files changed, 741 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/rk3288-miniarm.dts
 create mode 100644 arch/arm/dts/rk3288-miniarm.dtsi
 create mode 100644 board/rockchip/miniarm_rk3288/Kconfig
 create mode 100644 board/rockchip/miniarm_rk3288/MAINTAINERS
 create mode 100644 board/rockchip/miniarm_rk3288/Makefile
 create mode 100644 board/rockchip/miniarm_rk3288/miniarm-rk3288.c
 create mode 100644 configs/miniarm-rk3288_defconfig
 create mode 100644 include/configs/miniarm_rk3288.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 639c06d..50ddb39 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -34,6 +34,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-evb.dtb \
rk3288-fennec.dtb \
rk3288-popmetal.dtb \
+   rk3288-miniarm.dtb \
rk3036-sdk.dtb \
rk3399-evb.dtb
 dtb-$(CONFIG_ARCH_MESON) += \
diff --git a/arch/arm/dts/rk3288-miniarm.dts b/arch/arm/dts/rk3288-miniarm.dts
new file mode 100644
index 000..c741082
--- /dev/null
+++ b/arch/arm/dts/rk3288-miniarm.dts
@@ -0,0 +1,61 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+#include "rk3288-miniarm.dtsi"
+
+/ {
+   model = "Miniarm-RK3288";
+   compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288";
+
+   chosen {
+   stdout-path = &uart2;
+   };
+};
+
+&dmc {
+   rockchip,num-channels = <2>;
+   rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+   0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+   0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+   0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+   0x5 0x0>;
+   rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+   0xa60 0x40 0x10 0x0>;
+   /* Add a dummy value to cause of-platdata think this is bytes */
+   rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf 
0xff>;
+   rockchip,sdram-params = <0x30B25564 0x627 3 66600 3 9 1>;
+};
+
+
+&pinctrl {
+   u-boot,dm-pre-reloc;
+};
+
+&pwm1 {
+   status = "okay";
+};
+
+&uart2 {
+   u-boot,dm-pre-reloc;
+   reg-shift = <2>;
+};
+
+&sdmmc {
+   u-boot,dm-pre-reloc;
+};
+
+&emmc {
+   u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+   u-boot,dm-pre-reloc;
+};
+
+&gpio8 {
+   u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3288-miniarm.dtsi b/arch/arm/dts/rk3288-miniarm.dtsi
new file mode 100644
index 000..b889875
--- /dev/null
+++ b/arch/arm/dts/rk3288-miniarm.dtsi
@@ -0,0 +1,533 @@
+/*
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTA

Re: [U-Boot] [PATCH v2 07/10] rockchip: rk3288: move evb board to rockchip folder

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> The 'evb-rk3288' is not a vendor name, change it to 'rockchip' which is
> the real vendor name.
>
> Signed-off-by: Ziyuan Xu 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  arch/arm/mach-rockchip/rk3288/Kconfig | 2 +-
>  board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Kconfig  | 6 +++---
>  board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/MAINTAINERS  | 4 ++--
>  board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Makefile | 0
>  board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/evb-rk3288.c | 0
>  include/configs/{evb-rk3288.h => evb_rk3288.h}| 0
>  6 files changed, 6 insertions(+), 6 deletions(-)
>  rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Kconfig (67%)
>  rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/MAINTAINERS (58%)
>  rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Makefile (100%)
>  rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/evb-rk3288.c 
> (100%)
>  rename include/configs/{evb-rk3288.h => evb_rk3288.h} (100%)

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Re: [U-Boot] [PATCH v2] rk3399: Reserve space for ARM Trust Firmware

[Simon Glass]

On 27 July 2016 at 21:11, Simon Glass  wrote:
> On 24 July 2016 at 21:45, Kever Yang  wrote:
>> RK3399 needs reserve 0x20 at the beginning of DRAM, for ATF bl31.
>>
>> Signed-off-by: Kever Yang 
>> ---
>>
>> Changes in v2:
>> - correct some typo on commit message and comment
>>
>>  board/rockchip/evb_rk3399/evb-rk3399.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> Acked-by: Simon Glass 

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Re: [U-Boot] [PATCH v2 03/10] Revert "rockchip: Move the MMC setup check earlier"

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> Boot Rom wouldn't initialize sdmmc while booting from eMMC. We need to
> setup sdmmc gpio, otherwise we will hit an error below:
>
> =>mmc info
> blk_get_device: if_type=6, devnum=0: dw...@ff0c.blk, 6, 0
> uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 -1
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 -1
>- -1 0
>- not found
> fdtdec_get_int_array: interrupts
> get_prop_check_min_len: interrupts
> Buswidth = 1, clock: 0
> Buswidth = 1, clock: 40
> Sending CMD0
> dwmci_send_cmd: Timeout on data busy
> dwmci_send_cmd: Timeout on data busy
> dwmci_send_cmd: Timeout on data busy
> dwmci_send_cmd: Timeout on data busy
>
> This reverts commit 6efeeea79c880d3dd262e0dca9da2687f0ab68c9.
>
> Signed-off-by: Ziyuan Xu 
> Acked-by: Simon Glass 
> Tested-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  arch/arm/mach-rockchip/rk3288-board-spl.c | 28 ++--
>  1 file changed, 14 insertions(+), 14 deletions(-)

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Re: [U-Boot] [PATCH v2 08/11] buildman: Avoid overwriting existing toolchain entries

[Tom Rini]

On Wed, Jul 27, 2016 at 08:33:05PM -0600, Simon Glass wrote:

> The current code for setting up the toolchain config always writes the new
> paths to an item called 'toolchain'. This means that it will overwrite any
> existing toolchain item with the same name. In practice, this means that:
> 
>buildman --fetch-arch all
> 
> will fetch all toolchains, but only the path of the final one will be added
> to the config. This normally works out OK, since most toolchains are the
> same version (e.g. gcc 4.9) and will be found on the same path. But it is
> not correct and toolchains for archs which don't use the same version will
> not function as expected.
> 
> Adjust the code to use a complete glob of the toolchain path.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] [PATCH v2 06/10] rockchip: rk3288: revise CONFIG_FASTBOOT_BUF_ADDR

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> CONFIG_SYS_LOAD_ADDR is absolutely safe to store image for
> fastboot.
>
> Signed-off-by: Ziyuan Xu 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  include/configs/rk3288_common.h | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)

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Re: [U-Boot] [PATCH v2 01/10] rockchip: add a dummy byte for the sdram-channel property

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> Add an extra byte so that this data is not byteswapped.
>
> Signed-off-by: Ziyuan Xu 
> Acked-by: Simon Glass 
> Signed-off-by: Ziyuan Xu 
> ---
>
> Changes in v2: None
>
>  arch/arm/dts/rk3288-evb.dts | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

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Re: [U-Boot] [PATCH v2 09/10] rockchip: add basic support for fennec-rk3288 board

[Simon Glass]

On 27 July 2016 at 21:11, Simon Glass  wrote:
> On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
>> Fennec is a RK3288-based development board with 2 USB ports, HDMI,
>> micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes
>> on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access
>> to display pins, I2C, SPI, UART and GPIOs.
>>
>> Signed-off-by: Ziyuan Xu 
>> ---
>>
>> Changes in v2: None
>>
>>  arch/arm/dts/Makefile|   1 +
>>  arch/arm/dts/rk3288-fennec.dts   |  60 
>>  arch/arm/dts/rk3288-fennec.dtsi  | 421 
>> +++
>>  arch/arm/mach-rockchip/rk3288-board-spl.c|   3 +-
>>  arch/arm/mach-rockchip/rk3288/Kconfig|  10 +
>>  board/rockchip/fennec_rk3288/Kconfig |  15 +
>>  board/rockchip/fennec_rk3288/MAINTAINERS |   6 +
>>  board/rockchip/fennec_rk3288/Makefile|   7 +
>>  board/rockchip/fennec_rk3288/fennec-rk3288.c |  15 +
>>  configs/fennec-rk3288_defconfig  |  66 +
>>  doc/README.rockchip  |   3 +-
>>  include/configs/fennec_rk3288.h  |  26 ++
>>  12 files changed, 630 insertions(+), 3 deletions(-)
>>  create mode 100644 arch/arm/dts/rk3288-fennec.dts
>>  create mode 100644 arch/arm/dts/rk3288-fennec.dtsi
>>  create mode 100644 board/rockchip/fennec_rk3288/Kconfig
>>  create mode 100644 board/rockchip/fennec_rk3288/MAINTAINERS
>>  create mode 100644 board/rockchip/fennec_rk3288/Makefile
>>  create mode 100644 board/rockchip/fennec_rk3288/fennec-rk3288.c
>>  create mode 100644 configs/fennec-rk3288_defconfig
>>  create mode 100644 include/configs/fennec_rk3288.h
>
> Acked-by: Simon Glass 

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Re: [U-Boot] [PATCH v2 02/10] cosmetic: rockchip: rk3288: pinctrl: fix config symbol naming

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> Revise config to CONFIG_ROCKCHIP_RK3288_PINCTRL.
>
> Signed-off-by: Ziyuan Xu 
> Acked-by: Simon Glass 
> Signed-off-by: Ziyuan Xu 
> ---
>
> Changes in v2: None
>
>  configs/evb-rk3288_defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH v2] rockchip: rk3288: Fix pinctrl for GPIO bank 0

[Simon Glass]

On 25 July 2016 at 03:16, Kever Yang  wrote:
> Hi John,
>
>
> On 07/25/2016 05:02 PM, John Keeping wrote:
>>
>> Bank 0 is the "PMU GPIO" bank which is controlled by the PMU registers
>> rather than the GRF registers.  In the GRF the top half of the register
>> is used as a mask so that some bits can be updated without affecting the
>> others, but in the PMU this feature is not provided and the top half of
>> the register is reserved.
>>
>> Take the same approach as the Linux driver to update the value via
>> read-modify-write but setting the mask for only the bits that have
>> changed.  The PMU registers ignore the top 16 bits so this works for
>> both GRF and PMU iomux registers.
>>
>> Signed-off-by: John Keeping 
>>
>> ---
>>
>> Changes in v2:
>> - Clear mask before setting muxval
>> - Add comments explaining why rk_clrsetreg() can't be used
>>
>>   drivers/pinctrl/rockchip/pinctrl_rk3288.c | 21 +++--
>>   1 file changed, 19 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
>> b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
>> index 8cb3b82..0cdaac0 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
>> @@ -589,6 +589,7 @@ static int rk3288_pinctrl_set_pins(struct udevice
>> *dev, int banknum, int index,
>> struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
>> uint shift, ind = index;
>> uint mask;
>> +   uint value;
>> u32 *addr;
>> int ret;
>>   @@ -597,7 +598,18 @@ static int rk3288_pinctrl_set_pins(struct udevice
>> *dev, int banknum, int index,
>>   &mask);
>> if (ret)
>> return ret;
>> -   rk_clrsetreg(addr, mask << shift, muxval << shift);
>> +
>> +   /*
>> +* PMU_GPIO0 registers cannot be selectively written so we cannot
>> use
>> +* rk_clrsetreg() here.  However, the upper 16 bits are reserved
>> and
>> +* are ignored when written, so we can use the same code as for
>> the
>> +* other GPIO banks providing that we preserve the value of the
>> other
>> +* bits.
>> +*/
>> +   value = readl(addr);
>> +   value &= ~(mask << shift);
>> +   value |= (mask << (shift + 16)) | (muxval << shift);
>> +   writel(value, addr);
>> /* Handle pullup/pulldown */
>> if (flags) {
>> @@ -615,7 +627,12 @@ static int rk3288_pinctrl_set_pins(struct udevice
>> *dev, int banknum, int index,
>> addr = &priv->grf->gpio1_p[banknum - 1][ind];
>> debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr,
>> val,
>>   shift);
>> -   rk_clrsetreg(addr, 3 << shift, val << shift);
>> +
>> +   /* As above, rk_clrsetreg() cannot be used here. */
>> +   value = readl(addr);
>> +   value &= ~(mask << shift);
>> +   value |= (3 << (shift + 16)) | (val << shift);
>> +   writel(value, addr);
>> }
>> return 0;
>
> Reviewed-by: Kever Yang 
>
> Thanks,
> - Kever

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Re: [U-Boot] [PATCH v2 04/10] rockchip: rk3288: disable fastboot in SPL stage

[Simon Glass]

On 27 July 2016 at 21:11, Simon Glass  wrote:
> On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
>> Reduce compilation time for SPL.
>>
>> Signed-off-by: Ziyuan Xu 
>> ---
>>
>> Changes in v2: None
>>
>>  include/configs/rk3288_common.h | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> Acked-by: Simon Glass 

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Re: [U-Boot] [PATCH v2 05/10] rockchip: remove the duplicated macro config

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> CONFIG_DOS_PARTITION and CONFIG_EFI_PARTITION are already included in
> config_distro_defaults.h, and we don't need them in SPL stage.
>
> Signed-off-by: Ziyuan Xu 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  include/configs/kylin_rk3036.h  | 1 -
>  include/configs/rk3036_common.h | 1 -
>  include/configs/rk3288_common.h | 2 --
>  3 files changed, 4 deletions(-)

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Re: [U-Boot] [PATCH v2 10/10] rockchip: add support for rk3288 PopMetal board

[Simon Glass]

On 27 July 2016 at 21:11, Simon Glass  wrote:
> On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
>> PopMetal is a rockchip rk3288 based board made by ChipSpark, which has
>> many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and
>> Gigabit Ethernet.
>>
>> Signed-off-by: Ziyuan Xu 
>> ---
>>
>> Changes in v2: None
>>
>>  arch/arm/dts/Makefile |   1 +
>>  arch/arm/dts/rk3288-popmetal.dts  |  61 +++
>>  arch/arm/dts/rk3288-popmetal.dtsi | 520 
>> ++
>>  arch/arm/mach-rockchip/rk3288/Kconfig |  11 +
>>  board/chipspark/popmetal_rk3288/Kconfig   |  15 +
>>  board/chipspark/popmetal_rk3288/MAINTAINERS   |   6 +
>>  board/chipspark/popmetal_rk3288/Makefile  |   7 +
>>  board/chipspark/popmetal_rk3288/popmetal-rk3288.c |  15 +
>>  configs/popmetal-rk3288_defconfig |  65 +++
>>  doc/README.rockchip   |   3 +-
>>  include/configs/popmetal_rk3288.h |  26 ++
>>  11 files changed, 729 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/arm/dts/rk3288-popmetal.dts
>>  create mode 100644 arch/arm/dts/rk3288-popmetal.dtsi
>>  create mode 100644 board/chipspark/popmetal_rk3288/Kconfig
>>  create mode 100644 board/chipspark/popmetal_rk3288/MAINTAINERS
>>  create mode 100644 board/chipspark/popmetal_rk3288/Makefile
>>  create mode 100644 board/chipspark/popmetal_rk3288/popmetal-rk3288.c
>>  create mode 100644 configs/popmetal-rk3288_defconfig
>>  create mode 100644 include/configs/popmetal_rk3288.h
>
> Acked-by: Simon Glass 

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Re: [U-Boot] [PATCH v2 00/11] buildman: Make the tool friendlier for first-time users

[Simon Glass]

Hi Tom.

On 27 July 2016 at 21:28, Tom Rini  wrote:
> On Wed, Jul 27, 2016 at 08:32:57PM -0600, Simon Glass wrote:
>
>> This makes a few minor improvements to buildman to make it work more easiler
>> for first-time users:
>>
>> - Improve progress and warning messages when fetching toolchains
>> - Fix a bug where toolchain paths can be overwritten when fetching
>> - Note at the top of the help how to get started
>>
>> Also this series removes MAKEALL. Since buildman has been around for 3 years
>> it may be time to do this. If not, we can leave it for now.
>>
>> Changes in v2:
>> - Add a message about how to install toolchains
>> - Add code to actually suppress the warning
>> - Glob the whole toolchain directly instead of adding separate entries
>> - Update to suggest fetching just the 'arm' tool chain
>
> Looks good to me.  Lets give people a little more time to comment and
> you can send me a PR for this on say next Monday?  Thanks for all your
> work here!

Yes sounds good.

Regards,
Simon
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Re: [U-Boot] [PATCH v2 08/10] rockchip: rk3036: update MAINTAINER file

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> Update MAINTAINER files for kylin_rk3036, evb_rk3036.
>
> Signed-off-by: Ziyuan Xu 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  board/rockchip/evb_rk3036/MAINTAINERS   | 4 ++--
>  board/rockchip/kylin_rk3036/MAINTAINERS | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)

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Re: [U-Boot] [PATCH v4] mmc-uclass: correct the device number

[Simon Glass]

On 24 July 2016 at 23:11, Jaehoon Chung  wrote:
> On 07/23/2016 11:08 AM, Simon Glass wrote:
>> On 22 July 2016 at 03:22, Kever Yang  wrote:
>>> Not like the mmc-legacy which the devnum starts from 1, it starts from 0
>>> in mmc-uclass, so the device number should be (devnum + 1) in get_mmc_num().
>>>
>>> Signed-off-by: Kever Yang 
>>> ---
>>>
>>> Changes in v4:
>>> - call blk_find_max_devnum() in mmc_get_next_devnum for error return.
>>>
>>> Changes in v3:
>>> - apply comments from Jaehoon Chung
>>>
>>> Changes in v2:
>>> - add comment for get_mmc_num() in mmc.h
>>> - update mmc_get_next_devnum()
>>>
>>>  drivers/mmc/mmc-uclass.c | 6 +++---
>>>  include/mmc.h| 6 ++
>>>  2 files changed, 9 insertions(+), 3 deletions(-)
>>
>> Acked-by: Simon Glass 
>>
>
> Reviewed-by: Jaehoon Chung 
>
>>
>>
>

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Re: [U-Boot] [RFC PATCH v2 1/5] spl: dfu: add dfu support in SPL

[B, Ravi]

Tom

> On 27-Jul-2016, at 8:55 PM, Tom Rini  wrote:
> 
>> On Wed, Jul 27, 2016 at 02:04:24PM +, B, Ravi wrote:
>> Hi Tom
>> 
>> Missed this thread to reply.
>> 
 index ef12f9f..ed3e295 100644
 --- a/Kconfig
 +++ b/Kconfig
 @@ -336,6 +336,33 @@ config SPL_FIT_IMAGE_POST_PROCESS
  injected into the FIT creation (i.e. the blobs would have been pre-
  processed before being added to the FIT image).
 
 +config SPL_DFU_SUPPORT
 +bool "Enable SPL with DFU to load binaries to memory device"
 +depends on USB && TARGET_DRA7XX_EVM
>> 
>>> This seems needlessly restrictive.
>> 
>> Yes, I do agree, at present only dra7x platform  support BOOT_DEVICE_DFU.
>> if we make it generic, then other platform should also enable the SPL-DFU
>> support for their respective platform (similar to [RFC PATCH v2 5/5] dra7x: 
>> configs: enable SPL-DFU support).
> 
> That's what I'm saying, this all looks generic today, except for the
> restriction here in Kconfig.  Yes, boards that want to use it will have
> to fill in plumbing, but that's normal.

Ok, then I will remove this restriction. 
> 
 diff --git a/common/command.c b/common/command.c index 
 e5d9b9c..d1c049c 100644
 --- a/common/command.c
 +++ b/common/command.c
 @@ -520,7 +520,7 @@ enum command_ret_t cmd_process(int flag, int argc, 
 char * const argv[],
if (argc > cmdtp->maxargs)
rc = CMD_RET_USAGE;
 
 -#if defined(CONFIG_CMD_BOOTD)
 +#if defined(CONFIG_CMD_BOOTD) && !defined(CONFIG_SPL_BUILD)
/* avoid "bootd" recursion */ Check whether they use DMA or PIO mode.
>> 
else if (cmdtp->cmd == do_bootd) {
if (flag & CMD_FLAG_BOOTD) {
>> 
>>> Why do we need this?
>> 
>> Actually CONFIG_CMD_BOOTD is not required for SPL-DFU. 
>> But cmd/Kconfg has defined CONFIG_CMD_BOOTD by default, which is causing 
>> compilation error for "do_bootd" not defined.
>> Again do_bootd depends on CONFIG_CMD_BOOTM which is not defined for SPL.
>> 
>> What is best way? What do you suggest ?
> 
> First, what is the exact compile error you get?  And second, probably
> disable CMD_BOOTD.

Since CMD_BOOTD is enabled, the function do_bood is undefined due to 
cmd/bootm.c compiled out for SPL.

As you said, better to disable CMD_BOOTD.

Regards
Ravi
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Re: [U-Boot] [PATCH v2 02/11] buildman: Automatically create a config file if needed

[Tom Rini]

On Wed, Jul 27, 2016 at 08:32:59PM -0600, Simon Glass wrote:

> If there is no ~/.buildman file, buildman currently complains and exists. To
> make things a little more friendly, create an empty one automatically. This
> will not allow things to be built, but --fetch-arch can be used to handle
> that.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] [PATCH v2 00/11] buildman: Make the tool friendlier for first-time users

[Tom Rini]

On Wed, Jul 27, 2016 at 08:32:57PM -0600, Simon Glass wrote:

> This makes a few minor improvements to buildman to make it work more easiler
> for first-time users:
> 
> - Improve progress and warning messages when fetching toolchains
> - Fix a bug where toolchain paths can be overwritten when fetching
> - Note at the top of the help how to get started
> 
> Also this series removes MAKEALL. Since buildman has been around for 3 years
> it may be time to do this. If not, we can leave it for now.
> 
> Changes in v2:
> - Add a message about how to install toolchains
> - Add code to actually suppress the warning
> - Glob the whole toolchain directly instead of adding separate entries
> - Update to suggest fetching just the 'arm' tool chain

Looks good to me.  Lets give people a little more time to comment and
you can send me a PR for this on say next Monday?  Thanks for all your
work here!

-- 
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Re: [U-Boot] [PATCH 3/4] sun8i: On H3 Use word 1 instead of word 3 from the SID

[Chen-Yu Tsai]

Hi,

On Thu, Jul 28, 2016 at 3:14 AM, Siarhei Siamashka
 wrote:
> Hello Hans,
>
> On Wed, 27 Jul 2016 18:10:34 +0200
> Hans de Goede  wrote:
>
>> It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the SID
>> are always 0 on H3 making it a poor candidate to use as source for the
>> serialnr / mac-address, switch to word1 which seems to be more random.
>>
>> Cc: Chen-Yu Tsai 
>> Cc: Corentin LABBE 
>> Cc: Amit Singh Tomar 
>> Signed-off-by: Hans de Goede 
>> ---
>>  board/sunxi/board.c | 23 ++-
>>  1 file changed, 14 insertions(+), 9 deletions(-)
>>
>> diff --git a/board/sunxi/board.c b/board/sunxi/board.c
>> index ef3fe26..bbe5340 100644
>> --- a/board/sunxi/board.c
>> +++ b/board/sunxi/board.c
>> @@ -620,12 +620,17 @@ static void setup_environment(const void *fdt)
>>   uint8_t mac_addr[6];
>>   char ethaddr[16];
>>   int i, ret;
>> +#ifdef CONFIG_MACH_SUN8I_H3
>> + const int idx0 = 0, idx1 = 1;
>> +#else
>> + const int idx0 = 0, idx1 = 3;
>> +#endif
>>
>>   ret = sunxi_get_sid(sid);
>> - if (ret == 0 && sid[0] != 0 && sid[3] != 0) {
>> + if (ret == 0 && sid[idx0] != 0 && sid[idx1] != 0) {
>>   /* Ensure the NIC specific bytes of the mac are not all 0 */
>> - if ((sid[3] & 0xff) == 0)
>> - sid[3] |= 0x80;
>> + if ((sid[idx1] & 0xff) == 0)
>> + sid[idx1] |= 0x80;
>>
>>   for (i = 0; i < 4; i++) {
>>   sprintf(ethaddr, "ethernet%d", i);
>> @@ -642,18 +647,18 @@ static void setup_environment(const void *fdt)
>>
>>   /* Non OUI / registered MAC address */
>>   mac_addr[0] = (i << 4) | 0x02;
>> - mac_addr[1] = (sid[0] >>  0) & 0xff;
>> - mac_addr[2] = (sid[3] >> 24) & 0xff;
>> - mac_addr[3] = (sid[3] >> 16) & 0xff;
>> - mac_addr[4] = (sid[3] >>  8) & 0xff;
>> - mac_addr[5] = (sid[3] >>  0) & 0xff;
>> + mac_addr[1] = (sid[idx0] >>  0) & 0xff;
>> + mac_addr[2] = (sid[idx1] >> 24) & 0xff;
>> + mac_addr[3] = (sid[idx1] >> 16) & 0xff;
>> + mac_addr[4] = (sid[idx1] >>  8) & 0xff;
>> + mac_addr[5] = (sid[idx1] >>  0) & 0xff;
>>
>>   eth_setenv_enetaddr(ethaddr, mac_addr);
>>   }
>>
>>   if (!getenv("serial#")) {
>>   snprintf(serial_string, sizeof(serial_string),
>> - "%08x%08x", sid[0], sid[3]);
>> + "%08x%08x", sid[idx0], sid[idx1]);
>>
>>   setenv("serial#", serial_string);
>>   }
>
> Is it really a good idea trying to guess which parts of the SID are
> sufficiently unique, depending on the SoC generation?
>
> We can calculate some kind of hash (CRC32? SHA256?) over the whole
> SID. This will ensure that all the SID bits are accounted for.
>
> Also changing the MAC address generation algorithm is an invasive
> change, which is affecting the end users. So IMHO it's best to have
> it implemented properly right from the start, rather than evolving
> via a trial and error method. What if it turns out that word1
> from the SID is actually not sufficiently random on H3? How large
> was your sample set?

I've added the SID values from whatever H3 boards I have to:

http://linux-sunxi.org/SID_Register_Guide#Currently_known_SID.27s

And it seems word1 is more like a batch number. Note the last 3 boards,
which have identical word1's. These were given to me by Steven at the
same time. word2 seems to follow the pattern 5xxe.

In short there are quite a few bits that are the same.

Regards
ChenYu
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Re: [U-Boot] [PATCH v2 10/10] rockchip: add support for rk3288 PopMetal board

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> PopMetal is a rockchip rk3288 based board made by ChipSpark, which has
> many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and
> Gigabit Ethernet.
>
> Signed-off-by: Ziyuan Xu 
> ---
>
> Changes in v2: None
>
>  arch/arm/dts/Makefile |   1 +
>  arch/arm/dts/rk3288-popmetal.dts  |  61 +++
>  arch/arm/dts/rk3288-popmetal.dtsi | 520 
> ++
>  arch/arm/mach-rockchip/rk3288/Kconfig |  11 +
>  board/chipspark/popmetal_rk3288/Kconfig   |  15 +
>  board/chipspark/popmetal_rk3288/MAINTAINERS   |   6 +
>  board/chipspark/popmetal_rk3288/Makefile  |   7 +
>  board/chipspark/popmetal_rk3288/popmetal-rk3288.c |  15 +
>  configs/popmetal-rk3288_defconfig |  65 +++
>  doc/README.rockchip   |   3 +-
>  include/configs/popmetal_rk3288.h |  26 ++
>  11 files changed, 729 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/rk3288-popmetal.dts
>  create mode 100644 arch/arm/dts/rk3288-popmetal.dtsi
>  create mode 100644 board/chipspark/popmetal_rk3288/Kconfig
>  create mode 100644 board/chipspark/popmetal_rk3288/MAINTAINERS
>  create mode 100644 board/chipspark/popmetal_rk3288/Makefile
>  create mode 100644 board/chipspark/popmetal_rk3288/popmetal-rk3288.c
>  create mode 100644 configs/popmetal-rk3288_defconfig
>  create mode 100644 include/configs/popmetal_rk3288.h

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 04/10] rockchip: rk3288: disable fastboot in SPL stage

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> Reduce compilation time for SPL.
>
> Signed-off-by: Ziyuan Xu 
> ---
>
> Changes in v2: None
>
>  include/configs/rk3288_common.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 09/10] rockchip: add basic support for fennec-rk3288 board

[Simon Glass]

On 26 July 2016 at 04:28, Ziyuan Xu  wrote:
> Fennec is a RK3288-based development board with 2 USB ports, HDMI,
> micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes
> on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access
> to display pins, I2C, SPI, UART and GPIOs.
>
> Signed-off-by: Ziyuan Xu 
> ---
>
> Changes in v2: None
>
>  arch/arm/dts/Makefile|   1 +
>  arch/arm/dts/rk3288-fennec.dts   |  60 
>  arch/arm/dts/rk3288-fennec.dtsi  | 421 
> +++
>  arch/arm/mach-rockchip/rk3288-board-spl.c|   3 +-
>  arch/arm/mach-rockchip/rk3288/Kconfig|  10 +
>  board/rockchip/fennec_rk3288/Kconfig |  15 +
>  board/rockchip/fennec_rk3288/MAINTAINERS |   6 +
>  board/rockchip/fennec_rk3288/Makefile|   7 +
>  board/rockchip/fennec_rk3288/fennec-rk3288.c |  15 +
>  configs/fennec-rk3288_defconfig  |  66 +
>  doc/README.rockchip  |   3 +-
>  include/configs/fennec_rk3288.h  |  26 ++
>  12 files changed, 630 insertions(+), 3 deletions(-)
>  create mode 100644 arch/arm/dts/rk3288-fennec.dts
>  create mode 100644 arch/arm/dts/rk3288-fennec.dtsi
>  create mode 100644 board/rockchip/fennec_rk3288/Kconfig
>  create mode 100644 board/rockchip/fennec_rk3288/MAINTAINERS
>  create mode 100644 board/rockchip/fennec_rk3288/Makefile
>  create mode 100644 board/rockchip/fennec_rk3288/fennec-rk3288.c
>  create mode 100644 configs/fennec-rk3288_defconfig
>  create mode 100644 include/configs/fennec_rk3288.h

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v2] rk3399: Reserve space for ARM Trust Firmware

[Simon Glass]

On 24 July 2016 at 21:45, Kever Yang  wrote:
> RK3399 needs reserve 0x20 at the beginning of DRAM, for ATF bl31.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2:
> - correct some typo on commit message and comment
>
>  board/rockchip/evb_rk3399/evb-rk3399.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 2/2] mmc: rockchip: add clock init

[Simon Glass]

On 24 July 2016 at 22:50, Kever Yang  wrote:
> Signed-off-by: Kever Yang 
> ---
>
>  drivers/mmc/rockchip_sdhci.c| 10 +-
>  include/configs/rk3399_common.h |  2 +-
>  2 files changed, 10 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 1/2] rk3399: add basic soc driver

[Simon Glass]

Hi Kever,

On 24 July 2016 at 22:50, Kever Yang  wrote:
> This patch add driver for:
> - clock driver including set_rate for cpu, mmc, vop, I2C.
> - sysreset driver
> - grf syscon driver
>
> Signed-off-by: Kever Yang 
> ---
>
>  arch/arm/include/asm/arch-rockchip/cru_rk3399.h |  93 +++
>  arch/arm/mach-rockchip/rk3399/Makefile  |   2 +
>  arch/arm/mach-rockchip/rk3399/reset_rk3399.c|  45 ++
>  arch/arm/mach-rockchip/rk3399/syscon_rk3399.c   |  20 +
>  drivers/clk/Makefile|   1 +
>  drivers/clk/clk_rk3399.c| 825 
> 
>  6 files changed, 986 insertions(+)
>  create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3399.h
>  create mode 100644 arch/arm/mach-rockchip/rk3399/reset_rk3399.c
>  create mode 100644 arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
>  create mode 100644 drivers/clk/clk_rk3399.c
>
> diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h 
> b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
> new file mode 100644
> index 000..c919f47
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
> @@ -0,0 +1,93 @@
> +/*
> + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __ASM_ARCH_CRU_RK3399_H_
> +#define __ASM_ARCH_CRU_RK3399_H_
> +
> +#include 
> +
> +struct rk3399_pmucru {
> +   u32 ppll_con[6];
> +   u32 reserved[0x1a];
> +   u32 pmucru_clksel[6];
> +   u32 pmucru_clkfrac_con[2];
> +   u32 reserved2[0x18];
> +   u32 pmucru_clkgate_con[3];
> +   u32 reserved3;
> +   u32 pmucru_softrst_con[2];
> +   u32 reserved4[2];
> +   u32 pmucru_rstnhold_con[2];
> +   u32 reserved5[2];
> +   u32 pmucru_gatedis_con[2];
> +};
> +check_member(rk3399_pmucru, pmucru_gatedis_con[1], 0x134);
> +
> +struct rk3399_cru {
> +   u32 apll_l_con[6];
> +   u32 reserved[2];
> +   u32 apll_b_con[6];
> +   u32 reserved1[2];
> +   u32 dpll_con[6];
> +   u32 reserved2[2];
> +   u32 cpll_con[6];
> +   u32 reserved3[2];
> +   u32 gpll_con[6];
> +   u32 reserved4[2];
> +   u32 npll_con[6];
> +   u32 reserved5[2];
> +   u32 vpll_con[6];
> +   u32 reserved6[0x0a];
> +   u32 clksel_con[108];
> +   u32 reserved7[0x14];
> +   u32 clkgate_con[35];
> +   u32 reserved8[0x1d];
> +   u32 softrst_con[21];
> +   u32 reserved9[0x2b];
> +   u32 glb_srst_fst_value;
> +   u32 glb_srst_snd_value;
> +   u32 glb_cnt_th;
> +   u32 misc_con;
> +   u32 glb_rst_con;
> +   u32 glb_rst_st;
> +   u32 reserved10[0x1a];
> +   u32 sdmmc_con[2];
> +   u32 sdio0_con[2];
> +   u32 sdio1_con[2];
> +};
> +check_member(rk3399_cru, sdio1_con[1], 0x594);
> +#define MHz100
> +#define KHz1000
> +#define OSC_HZ (24*MHz)
> +#define APLL_HZ(600*MHz)
> +#define GPLL_HZ(594*MHz)
> +#define CPLL_HZ(384*MHz)
> +#define PPLL_HZ(594*MHz)
> +
> +#define PMU_PCLK_HZ(99*MHz)
> +
> +#define ACLKM_CORE_HZ  (300*MHz)
> +#define ATCLK_CORE_HZ  (300*MHz)
> +#define PCLK_DBG_HZ(100*MHz)
> +
> +#define PERIHP_ACLK_HZ (148500*KHz)
> +#define PERIHP_HCLK_HZ (148500*KHz)
> +#define PERIHP_PCLK_HZ (37125*KHz)
> +
> +#define PERILP0_ACLK_HZ(99000*KHz)
> +#define PERILP0_HCLK_HZ(99000*KHz)
> +#define PERILP0_PCLK_HZ(49500*KHz)
> +
> +#define PERILP1_HCLK_HZ(99000*KHz)
> +#define PERILP1_PCLK_HZ(49500*KHz)
> +
> +#define PWM_CLOCK_HZPMU_PCLK_HZ
> +
> +enum apll_l_frequencies {
> +   APLL_L_1600_MHZ,
> +   APLL_L_600_MHZ,
> +};
> +
> +#endif /* __ASM_ARCH_CRU_RK3399_H_ */
> diff --git a/arch/arm/mach-rockchip/rk3399/Makefile 
> b/arch/arm/mach-rockchip/rk3399/Makefile
> index 3f219ac..3ca2028 100644
> --- a/arch/arm/mach-rockchip/rk3399/Makefile
> +++ b/arch/arm/mach-rockchip/rk3399/Makefile
> @@ -5,3 +5,5 @@
>  #
>
>  obj-y += rk3399.o
> +obj-y += reset_rk3399.o
> +obj-y += syscon_rk3399.o
> diff --git a/arch/arm/mach-rockchip/rk3399/reset_rk3399.c 
> b/arch/arm/mach-rockchip/rk3399/reset_rk3399.c
> new file mode 100644
> index 000..9a55546
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3399/reset_rk3399.c
> @@ -0,0 +1,45 @@
> +/*
> + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier:GPL-2.0
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +int rk3399_sysreset_request(struct udevice *dev, enum sysreset_t type)
> +{
> +   struct rk3399_cru *cru = rockchip_get_cru();
> +
> +   if (IS_ERR(cru))
> +   return PTR_ERR(cru);
> +   switch (type) {
> +   case SYSRESET_WARM:
> +   writel(0xeca8, &cru->glb_srst_snd_value);
> +   break;
> +   case SYSRESET_COLD:
> +   writel(0xfdb9, &cru->glb_srst_

Re: [U-Boot] [PATCH 1/2] net: fm: fix spi flash probe for using driver model

[Qianyu Gong]

> -Original Message-
> From: york sun
> Sent: Thursday, July 28, 2016 1:35 AM
> To: Qianyu Gong ; u-boot@lists.denx.de; Prabhakar
> Kushwaha ; Mingkai Hu 
> Cc: Shaohui Xie ; Zhiqiang Hou ;
> Wenbin Song 
> Subject: Re: [PATCH 1/2] net: fm: fix spi flash probe for using driver model
> 
> On 07/20/2016 03:51 AM, Gong Qianyu wrote:
> > The current code would always use the speed and mode set by
> > CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE. But if using SPI driver
> > model it should get the values from DT.
> >
> > Signed-off-by: Gong Qianyu 
> > ---
> >  drivers/net/fm/fm.c | 10 ++
> >  1 file changed, 10 insertions(+)
> >
> > diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index
> > 00cdfd4..6308d22 100644
> > --- a/drivers/net/fm/fm.c
> > +++ b/drivers/net/fm/fm.c
> > @@ -371,8 +371,18 @@ int fm_init_common(int index, struct ccsr_fman *reg)
> > void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
> > int ret = 0;
> >
> > +#ifdef CONFIG_DM_SPI_FLASH
> > +   struct udevice *new;
> > +
> > +   /* Will get the speed and mode from Device Tree */
> > +   ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS,
> CONFIG_ENV_SPI_CS,
> > +0, 0, &new);
> > +
> > +   ucode_flash = dev_get_uclass_priv(new); #else
> > ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS,
> CONFIG_ENV_SPI_CS,
> > CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
> > +#endif
> > if (!ucode_flash)
> > printf("SF: probe for ucode failed\n");
> > else {
> >
> 
> Why not just use spi_flash_probe() with speed and mode passed as 0?
> 
> York

As Simon said spi_flash_probe() "is an old-style function and would be removed
when all SPI flash drivers use dm", so I think for dm spi_flash_probe_bus_cs()
should be used.


Regards,
Qianyu


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[U-Boot] [PATCH v2 10/11] Drop the MAKEALL tool

[Simon Glass]

Buildman has been around for 3 years now. It has had a lot of use and
testing. Perhaps it is time to remove MAKEALL.

Signed-off-by: Simon Glass 
Reviewed-by: Tom Rini 
---

Changes in v2: None

 MAKEALL | 850 
 1 file changed, 850 deletions(-)
 delete mode 100755 MAKEALL

diff --git a/MAKEALL b/MAKEALL
deleted file mode 100755
index 7e42f10..000
--- a/MAKEALL
+++ /dev/null
@@ -1,850 +0,0 @@
-#!/bin/bash
-# Tool mainly for U-Boot Quality Assurance: build one or more board
-# configurations with minimal verbosity, showing only warnings and
-# errors.
-#
-# SPDX-License-Identifier: GPL-2.0+
-
-usage()
-{
-   # if exiting with 0, write to stdout, else write to stderr
-   local ret=${1:-0}
-   [ "${ret}" -eq 1 ] && exec 1>&2
-   cat <<-EOF
-   Usage: MAKEALL [options] [--] [boards-to-build]
-
-   Options:
- -a ARCH,   --arch ARCH   Build all boards with arch ARCH
- -c CPU,--cpu CPU Build all boards with cpu CPU
- -v VENDOR, --vendor VENDOR   Build all boards with vendor VENDOR
- -s SOC,--soc SOC Build all boards with soc SOC
- -b BOARD,  --board BOARD Build all boards with board name BOARD
- -l,--listList all targets to be built
- -m,--maintainers List all targets and maintainer email
- -M,--mails   List all targets and all affilated emails
- -C,--check   Enable build checking
- -n,--continueContinue (skip boards already built)
- -r,--rebuild-errors  Rebuild any boards that errored
- -h,--helpThis help output
-
-   Selections by these options are logically ANDed; if the same option
-   is used repeatedly, such selections are ORed.  So "-v FOO -v BAR"
-   will select all configurations where the vendor is either FOO or
-   BAR.  Any additional arguments specified on the command line are
-   always build additionally.  See the boards.cfg file for more info.
-
-   If no boards are specified, then the default is "powerpc".
-
-   Environment variables:
- BUILD_NCPUS  number of parallel make jobs (default: auto)
- CROSS_COMPILEcross-compiler toolchain prefix (default: "")
- CROSS_COMPILE_ cross-compiler toolchain prefix for
-  architecture "ARCH".  Substitute "ARCH" for any
-  supported architecture (default: "")
- MAKEALL_LOGDIR   output all logs to here (default: ./LOG/)
- BUILD_DIRoutput build directory (default: ./)
- BUILD_NBUILDSnumber of parallel targets (default: 1)
-
-   Examples:
- - build all Power Architecture boards:
- MAKEALL -a powerpc
- MAKEALL --arch powerpc
- MAKEALL powerpc
- - build all PowerPC boards manufactured by vendor "esd":
- MAKEALL -a powerpc -v esd
- - build all PowerPC boards manufactured either by "keymile" or 
"siemens":
- MAKEALL -a powerpc -v keymile -v siemens
- - build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
- MAKEALL -c mpc83xx -v freescale 4xx
-   EOF
-   exit ${ret}
-}
-
-deprecation() {
-   echo "** Note: MAKEALL is deprecated - please use buildman instead"
-   echo "** See tools/buildman/README for details"
-   echo
-}
-
-deprecation
-
-SHORT_OPTS="ha:c:v:s:b:lmMCnr"
-LONG_OPTS="help,arch:,cpu:,vendor:,soc:,board:,list,maintainers,mails,check,continue,rebuild-errors"
-
-# Option processing based on util-linux-2.13/getopt-parse.bash
-
-# Note that we use `"$@"' to let each command-line parameter expand to a
-# separate word. The quotes around `$@' are essential!
-# We need TEMP as the `eval set --' would nuke the return value of
-# getopt.
-TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \
- -n 'MAKEALL' -- "$@"`
-
-[ $? != 0 ] && usage 1
-
-# Note the quotes around `$TEMP': they are essential!
-eval set -- "$TEMP"
-
-SELECTED=''
-ONLY_LIST=''
-PRINT_MAINTS=''
-MAINTAINERS_ONLY=''
-CONTINUE=''
-REBUILD_ERRORS=''
-
-while true ; do
-   case "$1" in
-   -a|--arch)
-   # echo "Option ARCH: argument \`$2'"
-   if [ "$opt_a" ] ; then
-   opt_a="${opt_a%)} || \$2 == \"$2\")"
-   else
-   opt_a="(\$2 == \"$2\")"
-   fi
-   SELECTED='y'
-   shift 2 ;;
-   -c|--cpu)
-   # echo "Option CPU: argument \`$2'"
-   if [ "$opt_c" ] ; then
-   opt_c="${opt_c%)} || \$3 == \"$2\" || \$3 ~ /$2:/)"
-   else
-   opt_c="(\$3 == \"$2\" || \$3 ~ /$2:/)"
-   fi
-   SELECTED='y'
-   shift 2 ;;
-   -s|--soc)
-   # echo "Option SoC: argum

[U-Boot] [PATCH v2 07/11] buildman: Drop the toolchain error when downloading toolchains

[Simon Glass]

It doesn't make sense to complain about missing toolchains when the
--fetch-arch option is being used. The user is presumably aware that there
is a toolchain problem and is actively correcting it by running with this
option.

Refactor the code to avoid printing this confusing message.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 tools/buildman/control.py | 17 ++---
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/tools/buildman/control.py b/tools/buildman/control.py
index 46053d8..b86d7b3 100644
--- a/tools/buildman/control.py
+++ b/tools/buildman/control.py
@@ -111,14 +111,9 @@ def DoBuildman(options, args, toolchains=None, 
make_func=None, boards=None,
 
 options.git_dir = os.path.join(options.git, '.git')
 
-if not toolchains:
+no_toolchains = toolchains is None
+if no_toolchains:
 toolchains = toolchain.Toolchains()
-toolchains.GetSettings()
-toolchains.Scan(options.list_tool_chains)
-if options.list_tool_chains:
-toolchains.List()
-print
-return 0
 
 if options.fetch_arch:
 if options.fetch_arch == 'list':
@@ -139,6 +134,14 @@ def DoBuildman(options, args, toolchains=None, 
make_func=None, boards=None,
 return ret
 return 0
 
+if no_toolchains:
+toolchains.GetSettings()
+toolchains.Scan(options.list_tool_chains)
+if options.list_tool_chains:
+toolchains.List()
+print
+return 0
+
 # Work out how many commits to build. We want to build everything on the
 # branch. We also build the upstream commit as a control so we can see
 # problems introduced by the first commit on the branch.
-- 
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[U-Boot] [PATCH v2 09/11] buildman: Add a quick-start note

[Simon Glass]

For those who just want to build a board, it is useful to see a quick hint
right at the start of the documentation. Add a few commands showing how to
download toolchains and build a board.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Update to suggest fetching just the 'arm' tool chain

 tools/buildman/README | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/tools/buildman/README b/tools/buildman/README
index cd672cf..8c5f861 100644
--- a/tools/buildman/README
+++ b/tools/buildman/README
@@ -5,6 +5,20 @@
 
 (Please read 'How to change from MAKEALL' if you are used to that tool)
 
+Quick-start
+===
+
+If you just want to quickly set up buildman so you can build something (for
+example Raspberry Pi 2):
+
+   cd /path/to/u-boot
+   PATH=$PATH:`pwd`/tools/buildman
+   buildman --fetch-arch arm
+   buildman -k rpi_2
+   ls ../current/rpi_2
+   # u-boot.bin is the output image
+
+
 What is this?
 =
 
-- 
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[U-Boot] [PATCH v2 04/11] buildman: Allow the toolchain error to be suppressed

[Simon Glass]

When there are no toolchains a warning is printed. But in some cases this is
confusing, such as when the user is fetching new toolchains.

Adjust the function to supress the warning in this case.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Add code to actually suppress the warning

 tools/buildman/toolchain.py | 20 ++--
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py
index 3993db3..1e1ce42 100644
--- a/tools/buildman/toolchain.py
+++ b/tools/buildman/toolchain.py
@@ -167,15 +167,18 @@ class Toolchains:
 self.paths = []
 self._make_flags = dict(bsettings.GetItems('make-flags'))
 
-def GetPathList(self):
+def GetPathList(self, show_warning=True):
 """Get a list of available toolchain paths
 
+Args:
+show_warning: True to show a warning if there are no tool chains.
+
 Returns:
 List of strings, each a path to a toolchain mentioned in the
 [toolchain] section of the settings file.
 """
 toolchains = bsettings.GetItems('toolchain')
-if not toolchains:
+if show_warning and not toolchains:
 print ('Warning: No tool chains - please add a [toolchain] section'
  ' to your buildman config file %s. See README for details' %
  bsettings.config_fname)
@@ -188,9 +191,14 @@ class Toolchains:
 paths.append(value)
 return paths
 
-def GetSettings(self):
-  self.prefixes = bsettings.GetItems('toolchain-prefix')
-  self.paths += self.GetPathList()
+def GetSettings(self, show_warning=True):
+"""Get toolchain settings from the settings file.
+
+Args:
+show_warning: True to show a warning if there are no tool chains.
+"""
+self.prefixes = bsettings.GetItems('toolchain-prefix')
+self.paths += self.GetPathList(show_warning)
 
 def Add(self, fname, test=True, verbose=False, priority=PRIORITY_CALC,
 arch=None):
@@ -479,7 +487,7 @@ class Toolchains:
 Returns:
 True if the path is in settings, False if not
 """
-paths = self.GetPathList()
+paths = self.GetPathList(False)
 return path in paths
 
 def ListArchs(self):
-- 
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[U-Boot] [PATCH v2 05/11] buildman: Improve the toolchain progress/error output

[Simon Glass]

Use colour to make it easier to see what is going on. Also print a message
before downloading a new toolchain. Mention --fetch-arch in the message that
is shown when there are no available toolchains, since this is the quickest
way to resolve the problem.

Signed-off-by: Simon Glass 
Reviewed-by: Tom Rini 
---

Changes in v2: None

 tools/buildman/control.py   |  9 ++---
 tools/buildman/toolchain.py | 24 +++-
 2 files changed, 21 insertions(+), 12 deletions(-)

diff --git a/tools/buildman/control.py b/tools/buildman/control.py
index aeb128a..46053d8 100644
--- a/tools/buildman/control.py
+++ b/tools/buildman/control.py
@@ -107,6 +107,7 @@ def DoBuildman(options, args, toolchains=None, 
make_func=None, boards=None,
 return 0
 
 gitutil.Setup()
+col = terminal.Color()
 
 options.git_dir = os.path.join(options.git, '.git')
 
@@ -122,14 +123,17 @@ def DoBuildman(options, args, toolchains=None, 
make_func=None, boards=None,
 if options.fetch_arch:
 if options.fetch_arch == 'list':
 sorted_list = toolchains.ListArchs()
-print 'Available architectures: %s\n' % ' '.join(sorted_list)
+print col.Color(col.BLUE, 'Available architectures: %s\n' %
+' '.join(sorted_list))
 return 0
 else:
 fetch_arch = options.fetch_arch
 if fetch_arch == 'all':
 fetch_arch = ','.join(toolchains.ListArchs())
-print 'Downloading toolchains: %s\n' % fetch_arch
+print col.Color(col.CYAN, '\nDownloading toolchains: %s' %
+fetch_arch)
 for arch in fetch_arch.split(','):
+print
 ret = toolchains.FetchAndInstall(arch)
 if ret:
 return ret
@@ -138,7 +142,6 @@ def DoBuildman(options, args, toolchains=None, 
make_func=None, boards=None,
 # Work out how many commits to build. We want to build everything on the
 # branch. We also build the upstream commit as a control so we can see
 # problems introduced by the first commit on the branch.
-col = terminal.Color()
 count = options.count
 has_range = options.branch and '..' in options.branch
 if count == -1:
diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py
index 1e1ce42..38876c2 100644
--- a/tools/buildman/toolchain.py
+++ b/tools/buildman/toolchain.py
@@ -13,6 +13,7 @@ import urllib2
 
 import bsettings
 import command
+import terminal
 
 (PRIORITY_FULL_PREFIX, PRIORITY_PREFIX_GCC, PRIORITY_PREFIX_GCC_PATH,
 PRIORITY_CALC) = range(4)
@@ -179,9 +180,11 @@ class Toolchains:
 """
 toolchains = bsettings.GetItems('toolchain')
 if show_warning and not toolchains:
-print ('Warning: No tool chains - please add a [toolchain] section'
- ' to your buildman config file %s. See README for details' %
- bsettings.config_fname)
+print ("Warning: No tool chains. Please run 'buildman "
+   "--fetch-arch all' to download all available toolchains, or 
"
+   "add a [toolchain] section to your buildman config file "
+   "%s. See README for details" %
+   bsettings.config_fname)
 
 paths = []
 for name, value in toolchains:
@@ -294,7 +297,9 @@ class Toolchains:
 
 def List(self):
 """List out the selected toolchains for each architecture"""
-print 'List of available toolchains (%d):' % len(self.toolchains)
+col = terminal.Color()
+print col.Color(col.BLUE, 'List of available toolchains (%d):' %
+len(self.toolchains))
 if len(self.toolchains):
 for key, value in sorted(self.toolchains.iteritems()):
 print '%-10s: %s' % (key, value.gcc)
@@ -509,6 +514,8 @@ class Toolchains:
 Architecture to fetch, or 'list' to list
 """
 # Fist get the URL for this architecture
+col = terminal.Color()
+print col.Color(col.BLUE, "Downloading toolchain for arch '%s'" % arch)
 url = self.LocateArchUrl(arch)
 if not url:
 print ("Cannot find toolchain for arch '%s' - use 'list' to list" %
@@ -523,7 +530,7 @@ class Toolchains:
 tmpdir, tarfile = self.Download(url)
 if not tarfile:
 return 1
-print 'Unpacking to: %s' % dest,
+print col.Color(col.GREEN, 'Unpacking to: %s' % dest),
 sys.stdout.flush()
 path = self.Unpack(tarfile, dest)
 os.remove(tarfile)
@@ -531,16 +538,15 @@ class Toolchains:
 print
 
 # Check that the toolchain works
-print 'Testing'
+print col.Color(col.GREEN, 'Testing')
 dirpath = os.path.join(dest, path)
 compiler_fname_list = self.ScanPath(dirpath, True)
 if not compiler_fname_list:
 print 'Could no

[U-Boot] [PATCH v2 08/11] buildman: Avoid overwriting existing toolchain entries

[Simon Glass]

The current code for setting up the toolchain config always writes the new
paths to an item called 'toolchain'. This means that it will overwrite any
existing toolchain item with the same name. In practice, this means that:

   buildman --fetch-arch all

will fetch all toolchains, but only the path of the final one will be added
to the config. This normally works out OK, since most toolchains are the
same version (e.g. gcc 4.9) and will be found on the same path. But it is
not correct and toolchains for archs which don't use the same version will
not function as expected.

Adjust the code to use a complete glob of the toolchain path.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Glob the whole toolchain directly instead of adding separate entries

 tools/buildman/toolchain.py | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py
index 02fbeb5..41e4e4c 100644
--- a/tools/buildman/toolchain.py
+++ b/tools/buildman/toolchain.py
@@ -553,6 +553,5 @@ class Toolchains:
 if not self.TestSettingsHasPath(dirpath):
 print ("Adding 'download' to config file '%s'" %
bsettings.config_fname)
-tools_dir = os.path.dirname(dirpath)
-bsettings.SetItem('toolchain', 'download', '%s/*' % tools_dir)
+bsettings.SetItem('toolchain', 'download', '%s/*/*' % dest)
 return 0
-- 
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[U-Boot] [PATCH v2 11/11] Drop references to MAKEALL in the documentation

[Simon Glass]

It is confusing to mention MAKEALL when it is not the normal way of building
U-Boot anymore. Update the documentation to suit.

Signed-off-by: Simon Glass 
Reviewed-by: Tom Rini 
---

Changes in v2: None

 README | 35 ++-
 board/Barix/ipam390/README.ipam390 | 12 ++--
 doc/README.sha1|  5 +++--
 3 files changed, 15 insertions(+), 37 deletions(-)

diff --git a/README b/README
index cadb571..30d7ee3 100644
--- a/README
+++ b/README
@@ -2756,7 +2756,7 @@ CBFS (Coreboot Filesystem) support
with a special header) as build targets. By defining
CONFIG_BUILD_TARGET in the SoC / board header, this
special image will be automatically built upon calling
-   make / MAKEALL.
+   make / buildman.
 
CONFIG_IDENT_STRING
 
@@ -5083,33 +5083,10 @@ official or latest in the git repository) version of 
U-Boot sources.
 But before you submit such a patch, please verify that your modifi-
 cation did not break existing code. At least make sure that *ALL* of
 the supported boards compile WITHOUT ANY compiler warnings. To do so,
-just run the "MAKEALL" script, which will configure and build U-Boot
-for ALL supported system. Be warned, this will take a while. You can
-select which (cross) compiler to use by passing a `CROSS_COMPILE'
-environment variable to the script, i. e. to use the ELDK cross tools
-you can type
-
-   CROSS_COMPILE=ppc_8xx- MAKEALL
-
-or to build on a native PowerPC system you can type
-
-   CROSS_COMPILE=' ' MAKEALL
-
-When using the MAKEALL script, the default behaviour is to build
-U-Boot in the source directory. This location can be changed by
-setting the BUILD_DIR environment variable. Also, for each target
-built, the MAKEALL script saves two log files (.ERR and
-.MAKEALL) in the /LOG directory. This default
-location can be changed by setting the MAKEALL_LOGDIR environment
-variable. For example:
-
-   export BUILD_DIR=/tmp/build
-   export MAKEALL_LOGDIR=/tmp/log
-   CROSS_COMPILE=ppc_8xx- MAKEALL
-
-With the above settings build objects are saved in the /tmp/build,
-log files are saved in the /tmp/log and the source tree remains clean
-during the whole build process.
+just run the buildman script (tools/buildman/buildman), which will
+configure and build U-Boot for ALL supported system. Be warned, this
+will take a while. Please see the buildman README, or run 'buildman -H'
+for documentation.
 
 
 See also "U-Boot Porting Guide" below.
@@ -6565,7 +6542,7 @@ it:
 
 Notes:
 
-* Before sending the patch, run the MAKEALL script on your patched
+* Before sending the patch, run the buildman script on your patched
   source tree and make sure that no errors or warnings are reported
   for any of the boards.
 
diff --git a/board/Barix/ipam390/README.ipam390 
b/board/Barix/ipam390/README.ipam390
index 5c45fca..be09280 100644
--- a/board/Barix/ipam390/README.ipam390
+++ b/board/Barix/ipam390/README.ipam390
@@ -31,9 +31,9 @@ loading the next image from a different media, etc).
 
 Compilation
 ===
-run "./MAKEALL ipam390" in the u-boot source tree.
-Once this build completes you will have a u-boot.ais file that needs to
-be written to the nand flash.
+run "tools/buildman/buildman -k ipam390" in the u-boot source tree.
+Once this build completes you will have a ../current/ipam390/u-boot.ais file
+that needs to be written to the nand flash.
 
 Flashing the images to NAND
 ==
@@ -71,13 +71,13 @@ here[1] to create an uboot-uart-ais.bin file
 - cd to the u-boot source tree
 
 - compile the u-boot for the ipam390 board:
-$ ./MAKEALL ipam390
+$ tools/buildman/buildman -k ipam390
 
   -> Now we shall have u-boot.bin
 
 - Create u-boot-uart-ais.bin
-$ mono HexAIS_OMAP-L138.exe -entrypoint 0xC108 -ini
-ipam390-ais-uart.cfg -o ./uboot-uart-ais.bin ./u-boot.bin@0xC108;
+$ mono HexAIS_OMAP-L138.exe -entrypoint 0xC108 -ini ipam390-ais-uart.cfg \
+   -o ../current/ipam390/uboot-uart-ais.bin ./u-boot.bin@0xC108;
 
 Note: The ipam390-ais-uart.cfg is found in the board directory
 for the ipam390 board, u-boot:/board/Barix/ipam390/ipam390-ais-uart.cfg
diff --git a/doc/README.sha1 b/doc/README.sha1
index f6cca40..f178f37 100644
--- a/doc/README.sha1
+++ b/doc/README.sha1
@@ -51,7 +51,8 @@ c) now calculate the SHA1 sum from the memoryrange and write
 
 Now you have a U-Boot-Image for the pcs440ep board with the correct SHA1 sum.
 
-If you do a "./MAKEALL pcs440ep" or a "make all" to get the U-Boot image,
-the correct SHA1 sum will be automagically included in the U-Boot image.
+If you do a "buildman -k pcs440ep" or a "make all" to get the U-Boot image,
+which will be found in ../current/ipam390/ - the correct SHA1 sum will be
+automagically included in the U-Boot image.
 
 Heiko Schocher, 11 Jul 2007
-- 
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[U-Boot] [PATCH v2 06/11] buildman: Fix a typo in TestSettingsHasPath()

[Simon Glass]

The function comment should say 'buildman'. Fix it.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 tools/buildman/toolchain.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py
index 38876c2..02fbeb5 100644
--- a/tools/buildman/toolchain.py
+++ b/tools/buildman/toolchain.py
@@ -487,7 +487,7 @@ class Toolchains:
 return stdout.splitlines()[0][:-1]
 
 def TestSettingsHasPath(self, path):
-"""Check if builmand will find this toolchain
+"""Check if buildman will find this toolchain
 
 Returns:
 True if the path is in settings, False if not
-- 
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[U-Boot] [PATCH v2 02/11] buildman: Automatically create a config file if needed

[Simon Glass]

If there is no ~/.buildman file, buildman currently complains and exists. To
make things a little more friendly, create an empty one automatically. This
will not allow things to be built, but --fetch-arch can be used to handle
that.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Add a message about how to install toolchains

 tools/buildman/bsettings.py | 44 
 1 file changed, 44 insertions(+)

diff --git a/tools/buildman/bsettings.py b/tools/buildman/bsettings.py
index b361469..892cfa0 100644
--- a/tools/buildman/bsettings.py
+++ b/tools/buildman/bsettings.py
@@ -22,6 +22,10 @@ def Setup(fname=''):
 config_fname = fname
 if config_fname == '':
 config_fname = '%s/.buildman' % os.getenv('HOME')
+if not os.path.exists(config_fname):
+print 'No config file found ~/.buildman\nCreating one...\n'
+CreateBuildmanConfigFile(config_fname)
+print 'To install tool chains, please use the --fetch-arch option'
 if config_fname:
 settings.read(config_fname)
 
@@ -53,3 +57,43 @@ def SetItem(section, tag, value):
 if config_fname is not None:
 with open(config_fname, 'w') as fd:
 settings.write(fd)
+
+def CreateBuildmanConfigFile(config_fname):
+"""Creates a new config file with no tool chain information.
+
+Args:
+config_fname: Config filename to create
+
+Returns:
+None
+"""
+try:
+f = open(config_fname, 'w')
+except IOError:
+print "Couldn't create buildman config file '%s'\n" % config_fname
+raise
+
+print >>f, '''[toolchain]
+# name = path
+# e.g. x86 = /opt/gcc-4.6.3-nolibc/x86_64-linux
+
+[toolchain-prefix]
+# name = path to prefix
+# e.g. x86 = /opt/gcc-4.6.3-nolibc/x86_64-linux/bin/x86_64-linux-
+
+[toolchain-alias]
+# arch = alias
+# Indicates which toolchain should be used to build for that arch
+x86 = i386
+blackfin = bfin
+nds32 = nds32le
+openrisc = or1k
+
+[make-flags]
+# Special flags to pass to 'make' for certain boards, e.g. to pass a test
+# flag and build tag to snapper boards:
+# snapper-boards=ENABLE_AT91_TEST=1
+# snapper9260=${snapper-boards} BUILD_TAG=442
+# snapper9g45=${snapper-boards} BUILD_TAG=443
+'''
+f.close();
-- 
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[U-Boot] [PATCH v2 01/11] buildman: Tidy up the README a little

[Simon Glass]

Tidy up some problems found by a recent review.

Signed-off-by: Simon Glass 
Reviewed-by: Tom Rini 
---

Changes in v2: None

 tools/buildman/README | 53 +--
 1 file changed, 30 insertions(+), 23 deletions(-)

diff --git a/tools/buildman/README b/tools/buildman/README
index 26755c5..cd672cf 100644
--- a/tools/buildman/README
+++ b/tools/buildman/README
@@ -22,16 +22,14 @@ help for anyone working with >10 patches at a time.
 Caveats
 ===
 
-Buildman is still in its infancy. It is already a very useful tool, but
-expect to find problems and send patches.
-
 Buildman can be stopped and restarted, in which case it will continue
 where it left off. This should happen cleanly and without side-effects.
 If not, it is a bug, for which a patch would be welcome.
 
 Buildman gets so tied up in its work that it can ignore the outside world.
 You may need to press Ctrl-C several times to quit it. Also it will print
-out various exceptions when stopped.
+out various exceptions when stopped. You may have to kill it since the
+Ctrl-C handling is somewhat broken.
 
 
 Theory of Operation
@@ -46,6 +44,13 @@ warnings and binaries if you ask for them) is stored in 
output
 directories, which you can look at while the build is progressing, or when
 it is finished.
 
+Buildman is designed to build entire git branches, i.e. muliple commits. It
+can be run repeatedly on the same branch. In this case it will automatically
+rebuild commits which have changed (and remove its old results for that
+commit). It is possible to build a branch for one board, then later build it
+for another board. If you want buildman to re-build a commit it has already
+built (e.g. because of a toolchain update), use the -f flag.
+
 Buildman produces a concise summary of which boards succeeded and failed.
 It shows which commit introduced which board failure using a simple
 red/green colour coding. Full error information can be requested, in which
@@ -420,10 +425,7 @@ Tool chain test:  OK
 
 Or download them all from kernel.org and move them to /toolchains directory,
 
-$ for i in aarch64 arm avr32 i386 m68k microblaze mips or32 powerpc sparc
-  do
-  ./tools/buildman/buildman --fetch-arch $i
-  done
+$ ./tools/buildman/buildman --fetch-arch all
 $ sudo mkdir -p /toolchains
 $ sudo mv ~/.buildman-toolchains/*/* /toolchains/
 
@@ -440,8 +442,8 @@ nios2: 
http://sourcery.mentor.com/public/gnu_toolchain/nios2-linux-gnu/
 sh: http://sourcery.mentor.com/public/gnu_toolchain/sh-linux-gnu/
 renesas-4.4-200-sh-linux-gnu-i686-pc-linux-gnu.tar.bz2
 
-Note openrisc kernel.org toolchain is out of date, download latest one from
-http://opencores.org/or1k/OpenRISC_GNU_tool_chain#Prebuilt_versions, eg:
+Note openrisc kernel.org toolchain is out of date. Download the latest one from
+http://opencores.org/or1k/OpenRISC_GNU_tool_chain#Prebuilt_versions - eg:
 
ftp://ocuser:ocu...@openrisc.opencores.org/toolchain/gcc-or1k-elf-4.8.1-x86.tar.bz2.
 
 Buildman should now be set up to use your new toolchain.
@@ -521,7 +523,7 @@ Building 18 commits for 1059 boards (4 threads, 1 job per 
thread)
 This means that it is building 19062 board/commit combinations. So far it
 has managed to successfully build 528. Another 36 have built with warnings,
 and 124 more didn't build at all. Buildman expects to complete the process
-in an hour and 15 minutes. Use this time to buy a faster computer.
+in around an hour and a quarter. Use this time to buy a faster computer.
 
 
 To find out how the build went, ask for a summary with -s. You can do this
@@ -556,7 +558,8 @@ the build is still in progress so many boards are not built 
yet (use -u to
 see which ones). But still we can see a few failures. The galaxy5200_LOWBOOT
 never builds correctly. This could be a problem with our toolchain, or it
 could be a bug in the upstream. The good news is that we probably don't need
-to blame our commits. The bad news is it isn't tested on that board.
+to blame our commits. The bad news is that our commits are not tested on that
+board.
 
 Commit 12 broke lubbock. That's what the '+ lubbock' means. The failure
 is never fixed by a later commit, or you would see lubbock again, in green,
@@ -585,19 +588,20 @@ So the problem is in lcd.c, due to missing cache 
operations. This information
 should be enough to work out what that commit is doing to break these
 boards. (In this case pxa did not have cache operations defined).
 
-If you see error lines marked with - that means that the errors were fixed
+If you see error lines marked with '-', that means that the errors were fixed
 by that commit. Sometimes commits can be in the wrong order, so that a
 breakage is introduced for a few commits and fixed by later commits. This
 shows up clearly with buildman. You can then reorder the commits and try
 again.
 
-At commit 16, the error moves - you can see that the old error at line 120
+At commit 16, the error moves: you can see that the old error at line 120
 

[U-Boot] [PATCH v2 00/11] buildman: Make the tool friendlier for first-time users

[Simon Glass]

This makes a few minor improvements to buildman to make it work more easiler
for first-time users:

- Improve progress and warning messages when fetching toolchains
- Fix a bug where toolchain paths can be overwritten when fetching
- Note at the top of the help how to get started

Also this series removes MAKEALL. Since buildman has been around for 3 years
it may be time to do this. If not, we can leave it for now.

Changes in v2:
- Add a message about how to install toolchains
- Add code to actually suppress the warning
- Glob the whole toolchain directly instead of adding separate entries
- Update to suggest fetching just the 'arm' tool chain

Simon Glass (11):
  buildman: Tidy up the README a little
  buildman: Automatically create a config file if needed
  buildman: Fix the 'help' test to use the correct path
  buildman: Allow the toolchain error to be suppressed
  buildman: Improve the toolchain progress/error output
  buildman: Fix a typo in TestSettingsHasPath()
  buildman: Drop the toolchain error when downloading toolchains
  buildman: Avoid overwriting existing toolchain entries
  buildman: Add a quick-start note
  Drop the MAKEALL tool
  Drop references to MAKEALL in the documentation

 MAKEALL| 850 -
 README |  35 +-
 board/Barix/ipam390/README.ipam390 |  12 +-
 doc/README.sha1|   5 +-
 tools/buildman/README  |  67 ++-
 tools/buildman/bsettings.py|  44 ++
 tools/buildman/control.py  |  26 +-
 tools/buildman/func_test.py|   2 +-
 tools/buildman/toolchain.py|  49 ++-
 9 files changed, 151 insertions(+), 939 deletions(-)
 delete mode 100755 MAKEALL

-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH v2 03/11] buildman: Fix the 'help' test to use the correct path

[Simon Glass]

When buildman is run via a symlink, this test fails. Fix it to work the same
way as buildman itself.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 tools/buildman/func_test.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py
index a0bd46c..d439e17 100644
--- a/tools/buildman/func_test.py
+++ b/tools/buildman/func_test.py
@@ -180,7 +180,7 @@ class TestFunctional(unittest.TestCase):
 self._base_dir = tempfile.mkdtemp()
 self._git_dir = os.path.join(self._base_dir, 'src')
 self._buildman_pathname = sys.argv[0]
-self._buildman_dir = os.path.dirname(sys.argv[0])
+self._buildman_dir = os.path.dirname(os.path.realpath(sys.argv[0]))
 command.test_result = self._HandleCommand
 self.setupToolchains()
 self._toolchains.Add('arm-gcc', test=False)
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 2/3] omap3, omap4: Enable USE_TINY_PRINTF for all

[Tom Rini]

In the case of omap3 we have a number of platforms that are close to
exceeding SRAM limits, depending on compiler.  Move to USE_TINY_PRINTF
to give them more room.  OMAP4 will soon enough be in a similar place,
so enable that now.

Signed-off-by: Tom Rini 
---
 arch/arm/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a9e1e7a..ad48a2f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -554,11 +554,13 @@ config OMAP34XX
bool "OMAP34XX SoC"
select CPU_V7
select SUPPORT_SPL
+   select USE_TINY_PRINTF
 
 config OMAP44XX
bool "OMAP44XX SoC"
select CPU_V7
select SUPPORT_SPL
+   select USE_TINY_PRINTF
 
 config OMAP54XX
bool "OMAP54XX SoC"
-- 
1.9.1

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[U-Boot] [PATCH 3/3] omap3: Drop omap3_evm_quick_* targets

[Tom Rini]

These config targets were added well before the Kconfig migration began
as a way to demonstrate how to make these platforms work with cut down
features.  At this point in time they no longer serve a good purpose so
remove them.

Signed-off-by: Tom Rini 
---
 arch/arm/cpu/armv7/omap3/Kconfig   |  6 ---
 board/ti/evm/Kconfig   | 26 --
 board/ti/evm/MAINTAINERS   |  4 --
 configs/omap3_evm_quick_mmc_defconfig  | 30 ---
 configs/omap3_evm_quick_nand_defconfig | 28 ---
 include/configs/omap3_evm_quick_mmc.h  | 89 -
 include/configs/omap3_evm_quick_nand.h | 91 --
 7 files changed, 274 deletions(-)
 delete mode 100644 configs/omap3_evm_quick_mmc_defconfig
 delete mode 100644 configs/omap3_evm_quick_nand_defconfig
 delete mode 100644 include/configs/omap3_evm_quick_mmc.h
 delete mode 100644 include/configs/omap3_evm_quick_nand.h

diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig
index daf5411..99a25f9 100644
--- a/arch/arm/cpu/armv7/omap3/Kconfig
+++ b/arch/arm/cpu/armv7/omap3/Kconfig
@@ -31,12 +31,6 @@ config TARGET_DEVKIT8000
 config TARGET_OMAP3_EVM
bool "TI OMAP3 EVM"
 
-config TARGET_OMAP3_EVM_QUICK_MMC
-   bool "TI OMAP3 EVM Quick MMC"
-
-config TARGET_OMAP3_EVM_QUICK_NAND
-   bool "TI OMAP3 EVM Quick NAND"
-
 config TARGET_OMAP3_IGEP00X0
bool "IGEP"
select DM
diff --git a/board/ti/evm/Kconfig b/board/ti/evm/Kconfig
index f02aa31..4f490dd 100644
--- a/board/ti/evm/Kconfig
+++ b/board/ti/evm/Kconfig
@@ -10,29 +10,3 @@ config SYS_CONFIG_NAME
default "omap3_evm"
 
 endif
-
-if TARGET_OMAP3_EVM_QUICK_MMC
-
-config SYS_BOARD
-   default "evm"
-
-config SYS_VENDOR
-   default "ti"
-
-config SYS_CONFIG_NAME
-   default "omap3_evm_quick_mmc"
-
-endif
-
-if TARGET_OMAP3_EVM_QUICK_NAND
-
-config SYS_BOARD
-   default "evm"
-
-config SYS_VENDOR
-   default "ti"
-
-config SYS_CONFIG_NAME
-   default "omap3_evm_quick_nand"
-
-endif
diff --git a/board/ti/evm/MAINTAINERS b/board/ti/evm/MAINTAINERS
index 90c3f6b..612a08a 100644
--- a/board/ti/evm/MAINTAINERS
+++ b/board/ti/evm/MAINTAINERS
@@ -3,8 +3,4 @@ M:  Tom Rini 
 S: Maintained
 F: board/ti/evm/
 F: include/configs/omap3_evm.h
-F: include/configs/omap3_evm_quick_mmc.h
-F: include/configs/omap3_evm_quick_nand.h
 F: configs/omap3_evm_defconfig
-F: configs/omap3_evm_quick_mmc_defconfig
-F: configs/omap3_evm_quick_nand_defconfig
diff --git a/configs/omap3_evm_quick_mmc_defconfig 
b/configs/omap3_evm_quick_mmc_defconfig
deleted file mode 100644
index ebdc105..000
--- a/configs/omap3_evm_quick_mmc_defconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-CONFIG_ARM=y
-CONFIG_OMAP34XX=y
-CONFIG_TARGET_OMAP3_EVM_QUICK_MMC=y
-CONFIG_SPL=y
-CONFIG_BOOTDELAY=-2
-CONFIG_SYS_PROMPT="OMAP3_EVM # "
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_MEMORY is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-CONFIG_CMD_FAT=y
-CONFIG_SYS_NS16550=y
diff --git a/configs/omap3_evm_quick_nand_defconfig 
b/configs/omap3_evm_quick_nand_defconfig
deleted file mode 100644
index 52b08b8..000
--- a/configs/omap3_evm_quick_nand_defconfig
+++ /dev/null
@@ -1,28 +0,0 @@
-CONFIG_ARM=y
-CONFIG_OMAP34XX=y
-CONFIG_TARGET_OMAP3_EVM_QUICK_NAND=y
-CONFIG_SPL=y
-CONFIG_BOOTDELAY=-2
-CONFIG_SYS_PROMPT="OMAP3_EVM # "
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_MEMORY is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-CONFIG_SYS_NS16550=y
diff --git a/include/configs/omap3_evm_quick_mmc.h 
b/include/configs/omap3_evm_quick_mmc.h
deleted file mode 100644
index b7d8765..000
--- a/include/configs/omap3_evm_quick_mmc.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Configuration settings for quick boot from MMC on OMAP3 EVM.
- *
- * Copyright (C) 2006-2010 Texas Instruments Incorporated 

[U-Boot] [PATCH 1/3] omap3: Move to select SUPPORT_SPL for all

[Tom Rini]

In reality all omap3 platforms support SPL so move the select for this
up a level.

Signed-off-by: Tom Rini 
---
 arch/arm/Kconfig |  1 +
 arch/arm/cpu/armv7/omap3/Kconfig | 19 ---
 2 files changed, 1 insertion(+), 19 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4a62d4b..a9e1e7a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -553,6 +553,7 @@ config TARGET_MX53SMD
 config OMAP34XX
bool "OMAP34XX SoC"
select CPU_V7
+   select SUPPORT_SPL
 
 config OMAP44XX
bool "OMAP44XX SoC"
diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig
index 85d6436..daf5411 100644
--- a/arch/arm/cpu/armv7/omap3/Kconfig
+++ b/arch/arm/cpu/armv7/omap3/Kconfig
@@ -6,55 +6,45 @@ choice
 
 config TARGET_AM3517_EVM
bool "AM3517 EVM"
-   select SUPPORT_SPL
 
 config TARGET_MT_VENTOUX
bool "TeeJet Mt.Ventoux"
-   select SUPPORT_SPL
 
 config TARGET_OMAP3_BEAGLE
bool "TI OMAP3 BeagleBoard"
-   select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
 
 config TARGET_CM_T35
bool "CompuLab CM-T3530 and CM-T3730 boards"
-   select SUPPORT_SPL
 
 config TARGET_CM_T3517
bool "CompuLab CM-T3517 boards"
 
 config TARGET_DEVKIT8000
bool "TimLL OMAP3 Devkit8000"
-   select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
 
 config TARGET_OMAP3_EVM
bool "TI OMAP3 EVM"
-   select SUPPORT_SPL
 
 config TARGET_OMAP3_EVM_QUICK_MMC
bool "TI OMAP3 EVM Quick MMC"
-   select SUPPORT_SPL
 
 config TARGET_OMAP3_EVM_QUICK_NAND
bool "TI OMAP3 EVM Quick NAND"
-   select SUPPORT_SPL
 
 config TARGET_OMAP3_IGEP00X0
bool "IGEP"
-   select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
 
 config TARGET_OMAP3_OVERO
bool "OMAP35xx Gumstix Overo"
-   select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
@@ -67,51 +57,42 @@ config TARGET_OMAP3_ZOOM1
 
 config TARGET_AM3517_CRANE
bool "am3517_crane"
-   select SUPPORT_SPL
 
 config TARGET_OMAP3_PANDORA
bool "OMAP3 Pandora"
 
 config TARGET_ECO5PK
bool "ECO5PK"
-   select SUPPORT_SPL
 
 config TARGET_TRICORDER
bool "Tricorder"
-   select SUPPORT_SPL
 
 config TARGET_MCX
bool "MCX"
-   select SUPPORT_SPL
 
 config TARGET_OMAP3_LOGIC
bool "OMAP3 Logic"
select DM
select DM_SERIAL
select DM_GPIO
-   select SUPPORT_SPL
 
 config TARGET_NOKIA_RX51
bool "Nokia RX51"
 
 config TARGET_TAO3530
bool "TAO3530"
-   select SUPPORT_SPL
 
 config TARGET_TWISTER
bool "Twister"
-   select SUPPORT_SPL
 
 config TARGET_OMAP3_CAIRO
bool "QUIPOS CAIRO"
-   select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
 
 config TARGET_SNIPER
bool "LG Optimus Black"
-   select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
-- 
1.9.1

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[U-Boot] [PATCH 2/2] mmc: dw_mmc: fix data starvation by host timeout under FIFO mode

[Ziyuan Xu]

This patch fixes data starvation by host timeout(HTO) error interrupt
which occurred under FIFO mode transfer on rk3036 board.

The former implement, the actual bytes were transmitted may be less than
should be. The size will still subtract value of len in case of there is
no receive/transmit FIFO data request interrupt.

Signed-off-by: Ziyuan Xu 
---

 drivers/mmc/dw_mmc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 38d4a64..41b7035 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -120,6 +120,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, 
struct mmc_data *data)
}
 
if (host->fifo_mode && size) {
+   len = 0;
if (data->flags == MMC_DATA_READ) {
if ((dwmci_readl(host, DWMCI_RINTSTS) &
 DWMCI_INTMSK_RXDR)) {
-- 
1.9.1


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[U-Boot] [PATCH 1/2] mmc: dw_mmc: transfer proper bytes to FIFO

[Ziyuan Xu]

The former implement, dw_mmc will push and pop the redundant data to
FIFO, we should transfer it according to the real size.

Signed-off-by: Ziyuan Xu 
---

 drivers/mmc/dw_mmc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 2cf7bae..38d4a64 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -126,6 +126,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, 
struct mmc_data *data)
len = dwmci_readl(host, DWMCI_STATUS);
len = (len >> DWMCI_FIFO_SHIFT) &
DWMCI_FIFO_MASK;
+   len = min(size, len);
for (i = 0; i < len; i++)
*buf++ =
dwmci_readl(host, DWMCI_DATA);
@@ -139,6 +140,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, 
struct mmc_data *data)
len = fifo_depth - ((len >>
   DWMCI_FIFO_SHIFT) &
   DWMCI_FIFO_MASK);
+   len = min(size, len);
for (i = 0; i < len; i++)
dwmci_writel(host, DWMCI_DATA,
 *buf++);
-- 
1.9.1


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Re: [U-Boot] [PATCH v2] libfdt: Introduce new ARCH_FIXUP_FDT option

[Simon Glass]

Hi Michal,

On 24 July 2016 at 20:07, Simon Glass  wrote:
> On 15 July 2016 at 01:35, Michal Simek  wrote:
>> Add new Kconfig option to disable arch_fixup_fdt() calls for cases where
>> U-Boot shouldn't update memory setup in DTB file.
>> One example of usage of this option is to boot OS with different memory
>> setup than U-Boot use.
>>
>> Signed-off-by: Michal Simek 
>> ---
>>
>> Changes in v2:
>> - Change logic to be possitive - sjg
>>
>>  Kconfig  | 9 +
>>  arch/arm/lib/bootm-fdt.c | 2 ++
>>  arch/arm/lib/bootm.c | 2 ++
>>  arch/mips/lib/bootm.c| 2 ++
>>  common/image-fdt.c   | 7 ++-
>>  5 files changed, 17 insertions(+), 5 deletions(-)
>
> Applied to u-boot-dm, thanks!

Unfortunately this breaks pic32mzdask, a MIPS board. I did not notice
this earlier for some reason...perhaps it snuck in after my rebase.
Can you please take a look?

Regards,
Simon
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[U-Boot] Please pull u-boot-dm

[Simon Glass]

Hi Tom,

Here is a new power domain uclass, the rest of the MMC conversion
(moving over zynq and socfpga) and a few other dm improvements.

The following changes since commit 0b6699ad8ea95803d7ce40d1dc1caea902a6d22c:

  Merge branch 'master' of http://git.denx.de/u-boot-sunxi (2016-07-26
18:33:04 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-dm.git

for you to fetch changes up to 02ebd42cf19e523593d8e4e8f3d02083299fcdbb:

  mmc: dw_mmc: reduce timeout detection cycle (2016-07-27 20:15:48 -0600)


Jaehoon Chung (2):
  dm: mmc: dwmmc: fix the wrong explanation for clock values
  dm: mmc: dwmmc: use the callback functions as static

Simon Glass (11):
  dm: core: Add a function to bind child devices
  dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()
  dm: Use dm_scan_fdt_dev() directly where possible
  arm: Show early-malloc() usage in bdinfo
  net: phy: marvell: Add a missing errno.h header
  zynq: Increase the early malloc() size
  dm: zynq: usb: Convert to CONFIG_DM_USB
  dm: mmc: zynq: Convert zynq to use driver model for MMC
  dm: socfpga: mmc: Support CONFIG_BLK
  dm: usb: Use blk_dread/write() instead of direct calls
  dm: spl: mmc: Support raw partitions with CONFIG_BLK

Stephen Warren (1):
  Add a power domain framework/uclass

Xu Ziyuan (1):
  mmc: dw_mmc: reduce timeout detection cycle

 Makefile |   1 +
 arch/arm/Kconfig |   7 
 arch/arm/cpu/armv8/zynqmp/Kconfig|   4 ++
 arch/arm/mach-zynq/Kconfig   |   3 ++
 arch/sandbox/dts/test.dts|  10 +
 arch/sandbox/include/asm/power-domain.h  |  21 ++
 arch/x86/lib/lpc-uclass.c|  15 +--
 cmd/bdinfo.c |   5 +++
 cmd/usb_mass_storage.c   |   4 +-
 common/spl/spl_mmc.c |   2 +-
 common/usb_hub.c |   9 +
 configs/sandbox_defconfig|   2 +
 drivers/core/root.c  |   9 +
 drivers/core/simple-bus.c|   3 +-
 drivers/i2c/i2c-uclass.c |  15 ++-
 drivers/i2c/sandbox_i2c.c|   4 +-
 drivers/misc/cros_ec.c   |   9 +
 drivers/mmc/dw_mmc.c |   6 +--
 drivers/mmc/socfpga_dw_mmc.c |  32 ++-
 drivers/mmc/zynq_sdhci.c |  39 +++---
 drivers/net/phy/marvell.c|   1 +
 drivers/pch/pch-uclass.c |  15 +--
 drivers/pci/pci-uclass.c |  24 +--
 drivers/pci/pci_sandbox.c|  11 ++---
 drivers/pinctrl/pinctrl_pic32.c  |   9 +
 drivers/pinctrl/rockchip/pinctrl_rk3036.c|   9 +
 drivers/pinctrl/rockchip/pinctrl_rk3288.c|  15 ++-
 drivers/power/Kconfig|   2 +
 drivers/power/domain/Kconfig |  20 ++
 drivers/power/domain/Makefile|   7 
 drivers/power/domain/power-domain-uclass.c   | 112
+++
 drivers/power/domain/sandbox-power-domain-test.c |  55
+
 drivers/power/domain/sandbox-power-domain.c  | 104
+++
 drivers/power/pmic/pm8916.c  |   9 +
 drivers/power/regulator/Kconfig  |   2 +-
 drivers/spi/spi-uclass.c |   9 +
 drivers/spmi/spmi-uclass.c   |   8 +---
 drivers/usb/emul/usb-emul-uclass.c   |   9 +
 drivers/usb/host/ehci-zynq.c | 103
+++
 drivers/usb/host/usb-uclass.c|   9 +
 include/dm/device.h  |  16 
 include/dm/uclass-id.h   |   1 +
 include/dwmmc.h  |  11 ++---
 include/power-domain-uclass.h|  82
+
 include/power-domain.h   | 120
+++
 include/power/regulator.h|   2 +-
 test/dm/Makefile |   1 +
 test/dm/bus.c|   3 +-
 test/dm/i2c.c|   4 +-
 test/dm/power-domain.c   |  46 +
 test/dm/spi.c|   4 +-
 51 files changed, 785 insertions(+), 238 deletions(-)
 create mode 100644 arch/sandbox/include/asm/power-domain.h
 crea

Re: [U-Boot] [PATCH 8/9] mmc: tegra: port to standard clock/reset APIs

[Jaehoon Chung]

Hi Stephen,

On 07/28/2016 06:24 AM, Stephen Warren wrote:
> From: Stephen Warren 
> 
> Tegra186 supports the new standard clock and reset APIs. Older Tegra SoCs
> still use custom APIs. Enhance the Tegra MMC driver so that it can operate
> with either set of APIs.
> 
> Signed-off-by: Stephen Warren 
> Cc: Pantelis Antoniou 
> ---
>  arch/arm/include/asm/arch-tegra/tegra_mmc.h |  8 -
>  drivers/mmc/tegra_mmc.c | 55 
> -
>  2 files changed, 53 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h 
> b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> index 75e56c4ea786..07ef4c04c858 100644
> --- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> +++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> @@ -9,6 +9,9 @@
>  #ifndef __TEGRA_MMC_H_
>  #define __TEGRA_MMC_H_
>  
> +#include 
> +#include 
> +#include 
>  #include 
>  #include 
>  
> @@ -134,7 +137,10 @@ struct mmc_host {
>   int id; /* device id/number, 0-3 */
>   int enabled;/* 1 to enable, 0 to disable */
>   int width;  /* Bus Width, 1, 4 or 8 */
> -#ifndef CONFIG_TEGRA186
> +#ifdef CONFIG_TEGRA186
> + struct reset_ctl reset_ctl;
> + struct clk clk;
> +#else
>   enum periph_id mmc_id;  /* Peripheral ID: PERIPH_ID_... */
>  #endif
>   struct gpio_desc cd_gpio;   /* Change Detect GPIO */
> diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
> index c9d9432e5e87..b27ca635ac50 100644
> --- a/drivers/mmc/tegra_mmc.c
> +++ b/drivers/mmc/tegra_mmc.c
> @@ -9,6 +9,7 @@
>  
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #ifndef CONFIG_TEGRA186
> @@ -359,11 +360,14 @@ static void mmc_change_clock(struct mmc_host *host, 
> uint clock)
>*/
>   if (clock == 0)
>   goto out;
> -#ifndef CONFIG_TEGRA186
> +#ifdef CONFIG_TEGRA186
> + {
> + ulong rate = clk_set_rate(&host->clk, clock);
> + div = (rate + clock - 1) / clock;
> + }

It seems that doesn't need to add the bracket.

> +#else
>   clock_adjust_periph_pll_div(host->mmc_id, CLOCK_ID_PERIPH, clock,
>   &div);
> -#else
> - div = (2000 + clock - 1) / clock;
>  #endif
>   debug("div = %d\n", div);
>  
> @@ -538,6 +542,9 @@ static int do_mmc_init(int dev_index, bool removable)
>  {
>   struct mmc_host *host;
>   struct mmc *mmc;
> +#ifdef CONFIG_TEGRA186
> + int ret;
> +#endif
>  
>   /* DT should have been read & host config filled in */
>   host = &mmc_host[dev_index];
> @@ -549,7 +556,21 @@ static int do_mmc_init(int dev_index, bool removable)
> gpio_get_number(&host->cd_gpio));
>  
>   host->clock = 0;
> -#ifndef CONFIG_TEGRA186
> +
> +#ifdef CONFIG_TEGRA186
> + ret = reset_assert(&host->reset_ctl);
> + if (ret)
> + return ret;
> + ret = clk_enable(&host->clk);
> + if (ret)
> + return ret;
> + ret = clk_set_rate(&host->clk, 2000);
> + if (IS_ERR_VALUE(ret))
> + return ret;
> + ret = reset_deassert(&host->reset_ctl);
> + if (ret)
> + return ret;
> +#else
>   clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 2000);
>  #endif
>  
> @@ -576,11 +597,7 @@ static int do_mmc_init(int dev_index, bool removable)
>*  (actually 52MHz)
>*/
>   host->cfg.f_min = 375000;
> -#ifndef CONFIG_TEGRA186
>   host->cfg.f_max = 4800;
> -#else
> - host->cfg.f_max = 375000;
> -#endif
>  
>   host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
>  
> @@ -612,7 +629,27 @@ static int mmc_get_config(const void *blob, int node, 
> struct mmc_host *host,
>   return -FDT_ERR_NOTFOUND;
>   }
>  
> -#ifndef CONFIG_TEGRA186
> +#ifdef CONFIG_TEGRA186
> + {
> + /*
> +  * FIXME: This variable should go away when the MMC device
> +  * actually is a udevice.
> +  */
> + struct udevice dev;
> + int ret;
> + dev.of_offset = node;
> + ret = reset_get_by_name(&dev, "sdmmc", &host->reset_ctl);
> + if (ret) {
> + debug("reset_get_by_index() failed: %d\n", ret);
> + return ret;
> + }
> + ret = clk_get_by_name(&dev, "sdmmc", &host->clk);
> + if (ret) {
> + debug("clk_get_by_index() failed: %d\n", ret);
> + return ret;
> + }
> + }

Ditto.

Best Regards,
Jaehoon Chung

> +#else
>   host->mmc_id = clock_decode_periph_id(blob, node);
>   if (host->mmc_id == PERIPH_ID_NONE) {
>   debug("%s: could not decode periph id\n", __func__);
> 

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[U-Boot] [PATCH v2 3/7] cmd/bdinfo: extract print_bi_dram

[Max Filippov]

print_bi_dram outputs start address and size for each DRAM bank.

Signed-off-by: Max Filippov 
---
Changes v1->v2:
- fix build for architectures w/o CONFIG_NR_DRAM_BANKS and bi_dram in
  bd_t.

 cmd/bdinfo.c | 60 +++-
 1 file changed, 19 insertions(+), 41 deletions(-)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index df68b58..c8a0511 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -92,6 +92,19 @@ static inline void print_bi_mem(const bd_t *bd)
 #endif
 }
 
+static inline void print_bi_dram(const bd_t *bd)
+{
+#ifdef CONFIG_NR_DRAM_BANKS
+   int i;
+
+   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
+   print_num("DRAM bank",  i);
+   print_num("-> start",   bd->bi_dram[i].start);
+   print_num("-> size",bd->bi_dram[i].size);
+   }
+#endif
+}
+
 #if defined(CONFIG_PPC)
 void __weak board_detail(void)
 {
@@ -179,15 +192,9 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   int i;
bd_t *bd = gd->bd;
 
-   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
-   print_num("DRAM bank",  i);
-   print_num("-> start",   bd->bi_dram[i].start);
-   print_num("-> size",bd->bi_dram[i].size);
-   }
-
+   print_bi_dram(bd);
print_num("flash start",(ulong)bd->bi_flashstart);
print_num("flash size", (ulong)bd->bi_flashsize);
print_num("flash offset",   (ulong)bd->bi_flashoffset);
@@ -212,14 +219,8 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
bd_t *bd = gd->bd;
-   int i;
-
-   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
-   print_num("DRAM bank",  i);
-   print_num("-> start",   bd->bi_dram[i].start);
-   print_num("-> size",bd->bi_dram[i].size);
-   }
 
+   print_bi_dram(bd);
print_num("flash start",(ulong)bd->bi_flashstart);
print_num("flash size ",(ulong)bd->bi_flashsize);
print_num("flash offset   ",(ulong)bd->bi_flashoffset);
@@ -390,17 +391,11 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
 {
-   int i;
bd_t *bd = gd->bd;
 
print_num("arch_number",bd->bi_arch_number);
print_bi_boot_params(bd);
-
-   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
-   print_num("DRAM bank",  i);
-   print_num("-> start",   bd->bi_dram[i].start);
-   print_num("-> size",bd->bi_dram[i].size);
-   }
+   print_bi_dram(bd);
 
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
@@ -460,7 +455,6 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   int i;
bd_t *bd = gd->bd;
 
print_bi_boot_params(bd);
@@ -475,11 +469,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_mhz("cpufreq",bd->bi_intfreq);
print_mhz("busfreq",bd->bi_busfreq);
 
-   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
-   print_num("DRAM bank",  i);
-   print_num("-> start",   bd->bi_dram[i].start);
-   print_num("-> size",bd->bi_dram[i].size);
-   }
+   print_bi_dram(bd);
 
 #if defined(CONFIG_CMD_NET)
print_eth(0);
@@ -495,16 +485,10 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   int i;
bd_t *bd = gd->bd;
 
print_bi_boot_params(bd);
-
-   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
-   print_num("DRAM bank", i);
-   print_num("-> start", bd->bi_dram[i].start);
-   print_num("-> size", bd->bi_dram[i].size);
-   }
+   print_bi_dram(bd);
 
 #if defined(CONFIG_CMD_NET)
print_eth(0);
@@ -520,17 +504,11 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   int i;
bd_t *bd = gd->bd;
 
print_num("arch_number",bd->bi_arch_number);
print_bi_boot_params(bd);
-
-   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
-   print_num("DRAM bank",  i);
-   print_num("-> start",   bd->bi_dram[i].start);
-   print_num("-> size",bd->bi_dram[i].size);
-   }
+   print_bi_dram(bd);
 
 #if defined(CONFIG_CMD_NET)
print_eth(0);
-- 
2.1.4

[U-Boot] [PATCH v2 7/7] cmd/bdinfo: extract print_std_bdinfo

[Max Filippov]

print_std_bdinfo outputs typical set of board information entries:
boot params location, memory and flash addresses and sizes, network
interfaces information and configured serial baud rate.

Signed-off-by: Max Filippov 
---
 cmd/bdinfo.c | 32 
 1 file changed, 12 insertions(+), 20 deletions(-)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 403ed3e..e1128cb 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -157,6 +157,15 @@ static inline void print_baudrate(void)
 #endif
 }
 
+static inline void print_std_bdinfo(const bd_t *bd)
+{
+   print_bi_boot_params(bd);
+   print_bi_mem(bd);
+   print_bi_flash(bd);
+   print_eth_ip_addr();
+   print_baudrate();
+}
+
 #if defined(CONFIG_PPC)
 void __weak board_detail(void)
 {
@@ -340,11 +349,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_mhz("CCLK",   bd->bi_cclk);
print_mhz("SCLK",   bd->bi_sclk);
 
-   print_bi_boot_params(bd);
-   print_bi_mem(bd);
-   print_bi_flash(bd);
-   print_eth_ip_addr();
-   print_baudrate();
+   print_std_bdinfo(bd);
 
return 0;
 }
@@ -353,13 +358,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   bd_t *bd = gd->bd;
-
-   print_bi_boot_params(bd);
-   print_bi_mem(bd);
-   print_bi_flash(bd);
-   print_eth_ip_addr();
-   print_baudrate();
+   print_std_bdinfo(gd->bd);
print_num("relocaddr", gd->relocaddr);
print_num("reloc off", gd->reloc_off);
 
@@ -370,14 +369,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   bd_t *bd = gd->bd;
-
-   print_bi_boot_params(bd);
-   print_bi_mem(bd);
-   print_bi_flash(bd);
-   print_eth_ip_addr();
-   print_baudrate();
-
+   print_std_bdinfo(gd->bd);
return 0;
 }
 
-- 
2.1.4

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[U-Boot] [PATCH v2 1/7] cmd/bdinfo: extract print_bi_boot_params

[Max Filippov]

print_bi_boot_params outputs boot parameters structure location.

Signed-off-by: Max Filippov 
---
 cmd/bdinfo.c | 20 +---
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index f2435ab..60aaafb 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -69,6 +69,12 @@ static void print_mhz(const char *name, unsigned long hz)
printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
 }
 
+
+static inline void print_bi_boot_params(const bd_t *bd)
+{
+   print_num("boot_params",(ulong)bd->bi_boot_params);
+}
+
 #if defined(CONFIG_PPC)
 void __weak board_detail(void)
 {
@@ -311,7 +317,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_mhz("CCLK",   bd->bi_cclk);
print_mhz("SCLK",   bd->bi_sclk);
 
-   print_num("boot_params",(ulong)bd->bi_boot_params);
+   print_bi_boot_params(bd);
print_num("memstart",   (ulong)bd->bi_memstart);
print_lnum("memsize",   (u64)bd->bi_memsize);
print_num("flashstart", (ulong)bd->bi_flashstart);
@@ -331,7 +337,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 {
bd_t *bd = gd->bd;
 
-   print_num("boot_params",(ulong)bd->bi_boot_params);
+   print_bi_boot_params(bd);
print_num("memstart",   (ulong)bd->bi_memstart);
print_lnum("memsize",   (u64)bd->bi_memsize);
print_num("flashstart", (ulong)bd->bi_flashstart);
@@ -353,7 +359,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 {
bd_t *bd = gd->bd;
 
-   print_num("boot_params",(ulong)bd->bi_boot_params);
+   print_bi_boot_params(bd);
print_num("memstart",   (ulong)bd->bi_dram[0].start);
print_lnum("memsize",   (u64)bd->bi_dram[0].size);
print_num("flashstart", (ulong)bd->bi_flashstart);
@@ -376,7 +382,7 @@ static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
bd_t *bd = gd->bd;
 
print_num("arch_number",bd->bi_arch_number);
-   print_num("boot_params",(ulong)bd->bi_boot_params);
+   print_bi_boot_params(bd);
 
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
print_num("DRAM bank",  i);
@@ -445,7 +451,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
int i;
bd_t *bd = gd->bd;
 
-   print_num("boot_params",(ulong)bd->bi_boot_params);
+   print_bi_boot_params(bd);
print_num("bi_memstart",bd->bi_memstart);
print_num("bi_memsize", bd->bi_memsize);
print_num("bi_flashstart",  bd->bi_flashstart);
@@ -480,7 +486,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
int i;
bd_t *bd = gd->bd;
 
-   print_num("boot_params", (ulong)bd->bi_boot_params);
+   print_bi_boot_params(bd);
 
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
print_num("DRAM bank", i);
@@ -506,7 +512,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
bd_t *bd = gd->bd;
 
print_num("arch_number",bd->bi_arch_number);
-   print_num("boot_params",(ulong)bd->bi_boot_params);
+   print_bi_boot_params(bd);
 
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
print_num("DRAM bank",  i);
-- 
2.1.4

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[U-Boot] [PATCH v2 4/7] cmd/bdinfo: extract print_bi_flash

[Max Filippov]

print_bi_flash outputs flashstart, flashsize and flashoffset lines.

Signed-off-by: Max Filippov 
---
 cmd/bdinfo.c | 54 +++---
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index c8a0511..0bef930 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -105,6 +105,24 @@ static inline void print_bi_dram(const bd_t *bd)
 #endif
 }
 
+static inline void print_bi_flash(const bd_t *bd)
+{
+#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_SH)
+   print_num("flash start",(ulong)bd->bi_flashstart);
+   print_num("flash size ",(ulong)bd->bi_flashsize);
+   print_num("flash offset   ",(ulong)bd->bi_flashoffset);
+
+#elif defined(CONFIG_NIOS2) || defined(CONFIG_OPENRISC)
+   print_num("flash start",(ulong)bd->bi_flashstart);
+   print_num("flash size", (ulong)bd->bi_flashsize);
+   print_num("flash offset",   (ulong)bd->bi_flashoffset);
+#else
+   print_num("flashstart", (ulong)bd->bi_flashstart);
+   print_num("flashsize",  (ulong)bd->bi_flashsize);
+   print_num("flashoffset",(ulong)bd->bi_flashoffset);
+#endif
+}
+
 #if defined(CONFIG_PPC)
 void __weak board_detail(void)
 {
@@ -119,9 +137,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_num("bd address", (ulong)bd);
 #endif
print_bi_mem(bd);
-   print_num("flashstart", bd->bi_flashstart);
-   print_num("flashsize",  bd->bi_flashsize);
-   print_num("flashoffset",bd->bi_flashoffset);
+   print_bi_flash(bd);
print_num("sramstart",  bd->bi_sramstart);
print_num("sramsize",   bd->bi_sramsize);
 #ifdefined(CONFIG_5xx)  || defined(CONFIG_8xx) || \
@@ -195,9 +211,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
bd_t *bd = gd->bd;
 
print_bi_dram(bd);
-   print_num("flash start",(ulong)bd->bi_flashstart);
-   print_num("flash size", (ulong)bd->bi_flashsize);
-   print_num("flash offset",   (ulong)bd->bi_flashoffset);
+   print_bi_flash(bd);
 
 #if defined(CONFIG_SYS_SRAM_BASE)
print_num ("sram start",(ulong)bd->bi_sramstart);
@@ -221,9 +235,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
bd_t *bd = gd->bd;
 
print_bi_dram(bd);
-   print_num("flash start",(ulong)bd->bi_flashstart);
-   print_num("flash size ",(ulong)bd->bi_flashsize);
-   print_num("flash offset   ",(ulong)bd->bi_flashoffset);
+   print_bi_flash(bd);
 #if defined(CONFIG_SYS_SRAM_BASE)
print_num("sram start ",(ulong)bd->bi_sramstart);
print_num("sram size  ",(ulong)bd->bi_sramsize);
@@ -281,9 +293,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
bd_t *bd = gd->bd;
 
print_bi_mem(bd);
-   print_num("flashstart", (ulong)bd->bi_flashstart);
-   print_num("flashsize",  (ulong)bd->bi_flashsize);
-   print_num("flashoffset",(ulong)bd->bi_flashoffset);
+   print_bi_flash(bd);
 #if defined(CONFIG_SYS_INIT_RAM_ADDR)
print_num("sramstart",  (ulong)bd->bi_sramstart);
print_num("sramsize",   (ulong)bd->bi_sramsize);
@@ -335,9 +345,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
print_bi_boot_params(bd);
print_bi_mem(bd);
-   print_num("flashstart", (ulong)bd->bi_flashstart);
-   print_num("flashsize",  (ulong)bd->bi_flashsize);
-   print_num("flashoffset",(ulong)bd->bi_flashoffset);
+   print_bi_flash(bd);
 
print_eth(0);
printf("ip_addr = %s\n", getenv("ipaddr"));
@@ -354,9 +362,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
print_bi_boot_params(bd);
print_bi_mem(bd);
-   print_num("flashstart", (ulong)bd->bi_flashstart);
-   print_num("flashsize",  (ulong)bd->bi_flashsize);
-   print_num("flashoffset",(ulong)bd->bi_flashoffset);
+   print_bi_flash(bd);
 
print_eth(0);
printf("ip_addr = %s\n", getenv("ipaddr"));
@@ -375,9 +381,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
print_bi_boot_params(bd);
print_bi_mem(bd);
-   print_num("flashstart", (ulong)bd->bi_flashstart);
-   print_num("flashsize",  (ulong)bd->bi_flashsize);
-   print_num("flashoffset",(ulong)bd->bi_flashoffset);
+   print_bi_flash(bd);
 
print_eth(0);
printf("ip_addr = %s\n", getenv("ipaddr"));
@@ -439,9 +443,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
bd_t *bd = gd->bd;
 
print_bi_mem(bd);
-   print_num("flash start",(ulong)b

[U-Boot] [PATCH v2 6/7] cmd/bdinfo: extract print_baudrate

[Max Filippov]

print_baudrate outputs serial baud rate.

Signed-off-by: Max Filippov 
---
 cmd/bdinfo.c | 39 +--
 1 file changed, 25 insertions(+), 14 deletions(-)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 4ffb757..403ed3e 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -146,6 +146,17 @@ static inline void print_eth_ip_addr(void)
 #endif
 }
 
+static inline void print_baudrate(void)
+{
+#if defined(CONFIG_PPC)
+   printf("baudrate= %6u bps\n", gd->baudrate);
+#elif defined(CONFIG_SPARC)
+   printf("baudrate   = %6u bps\n", gd->baudrate);
+#else
+   printf("baudrate= %u bps\n", gd->baudrate);
+#endif
+}
+
 #if defined(CONFIG_PPC)
 void __weak board_detail(void)
 {
@@ -204,7 +215,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 #endif
 
print_eth_ip_addr();
-   printf("baudrate= %6u bps\n", gd->baudrate);
+   print_baudrate();
print_num("relocaddr", gd->relocaddr);
board_detail();
return 0;
@@ -225,7 +236,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 #endif
 
print_eth_ip_addr();
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
 
return 0;
 }
@@ -245,7 +256,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
print_eths();
 #endif
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
print_num("relocaddr", gd->relocaddr);
print_num("reloc off", gd->reloc_off);
print_num("fdt_blob", (ulong)gd->fdt_blob);
@@ -281,7 +292,7 @@ int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * 
const argv[])
   GENERATED_GBL_DATA_SIZE);
 
print_eth_ip_addr();
-   printf("baudrate   = %6u bps\n", gd->baudrate);
+   print_baudrate();
return 0;
 }
 
@@ -311,7 +322,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_mhz("vcofreq",bd->bi_vcofreq);
 #endif
print_eth_ip_addr();
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
 
return 0;
 }
@@ -333,7 +344,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_mem(bd);
print_bi_flash(bd);
print_eth_ip_addr();
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
 
return 0;
 }
@@ -348,7 +359,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_mem(bd);
print_bi_flash(bd);
print_eth_ip_addr();
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
print_num("relocaddr", gd->relocaddr);
print_num("reloc off", gd->reloc_off);
 
@@ -365,7 +376,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_mem(bd);
print_bi_flash(bd);
print_eth_ip_addr();
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
 
return 0;
 }
@@ -390,7 +401,7 @@ static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
 #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
print_eths();
 #endif
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
print_num("TLB addr", gd->arch.tlb_addr);
 #endif
@@ -425,7 +436,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_mem(bd);
print_bi_flash(bd);
print_eth_ip_addr();
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
return 0;
 }
 
@@ -453,7 +464,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_eth_ip_addr();
print_mhz("ethspeed",   bd->bi_ethspeed);
 #endif
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
 
return 0;
 }
@@ -484,7 +495,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_boot_params(bd);
print_bi_dram(bd);
print_eth_ip_addr();
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
 
return 0;
 }
@@ -498,7 +509,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_mem(bd);
print_bi_flash(bd);
print_eth_ip_addr();
-   printf("baudrate= %u bps\n", gd->baudrate);
+   print_baudrate();
 
return 0;
 }
@@ -511,7 +522,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
print_bi_mem(bd);
print_eth_ip_addr();
-   printf("baudrate= %d bps\n", gd->baudrate);
+   print_baudrate();
 
return 0;
 }
-- 
2.1.4

_

[U-Boot] [PATCH v2 5/7] cmd/bdinfo: extract print_eth_ip_addr

[Max Filippov]

print_eth_ip_addr outputs eth configurations for up to 6 interfaces and
configured IP address.

Signed-off-by: Max Filippov 
---
 cmd/bdinfo.c | 113 +++
 1 file changed, 36 insertions(+), 77 deletions(-)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 0bef930..4ffb757 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -123,6 +123,29 @@ static inline void print_bi_flash(const bd_t *bd)
 #endif
 }
 
+static inline void print_eth_ip_addr(void)
+{
+#if defined(CONFIG_CMD_NET)
+   print_eth(0);
+#if defined(CONFIG_HAS_ETH1)
+   print_eth(1);
+#endif
+#if defined(CONFIG_HAS_ETH2)
+   print_eth(2);
+#endif
+#if defined(CONFIG_HAS_ETH3)
+   print_eth(3);
+#endif
+#if defined(CONFIG_HAS_ETH4)
+   print_eth(4);
+#endif
+#if defined(CONFIG_HAS_ETH5)
+   print_eth(5);
+#endif
+   printf("IP addr = %s\n", getenv("ipaddr"));
+#endif
+}
+
 #if defined(CONFIG_PPC)
 void __weak board_detail(void)
 {
@@ -180,24 +203,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 #endif
 #endif
 
-   print_eth(0);
-#if defined(CONFIG_HAS_ETH1)
-   print_eth(1);
-#endif
-#if defined(CONFIG_HAS_ETH2)
-   print_eth(2);
-#endif
-#if defined(CONFIG_HAS_ETH3)
-   print_eth(3);
-#endif
-#if defined(CONFIG_HAS_ETH4)
-   print_eth(4);
-#endif
-#if defined(CONFIG_HAS_ETH5)
-   print_eth(5);
-#endif
-
-   printf("IP addr = %s\n", getenv("ipaddr"));
+   print_eth_ip_addr();
printf("baudrate= %6u bps\n", gd->baudrate);
print_num("relocaddr", gd->relocaddr);
board_detail();
@@ -218,11 +224,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_num ("sram size", (ulong)bd->bi_sramsize);
 #endif
 
-#if defined(CONFIG_CMD_NET)
-   print_eth(0);
-   printf("ip_addr = %s\n", getenv("ipaddr"));
-#endif
-
+   print_eth_ip_addr();
printf("baudrate= %u bps\n", gd->baudrate);
 
return 0;
@@ -278,10 +280,7 @@ int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char 
* const argv[])
printf("CONFIG_SYS_GBL_DATA_OFFSET= 0x%x (%d)\n", 
CONFIG_SYS_GBL_DATA_OFFSET,
   GENERATED_GBL_DATA_SIZE);
 
-#if defined(CONFIG_CMD_NET)
-   print_eth(0);
-   printf("ip_addr = %s\n", getenv("ipaddr"));
-#endif
+   print_eth_ip_addr();
printf("baudrate   = %6u bps\n", gd->baudrate);
return 0;
 }
@@ -311,20 +310,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_mhz("inpfreq",bd->bi_inpfreq);
print_mhz("vcofreq",bd->bi_vcofreq);
 #endif
-#if defined(CONFIG_CMD_NET)
-   print_eth(0);
-#if defined(CONFIG_HAS_ETH1)
-   print_eth(1);
-#endif
-#if defined(CONFIG_HAS_ETH2)
-   print_eth(2);
-#endif
-#if defined(CONFIG_HAS_ETH3)
-   print_eth(3);
-#endif
-
-   printf("ip_addr = %s\n", getenv("ipaddr"));
-#endif
+   print_eth_ip_addr();
printf("baudrate= %u bps\n", gd->baudrate);
 
return 0;
@@ -346,9 +332,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_boot_params(bd);
print_bi_mem(bd);
print_bi_flash(bd);
-
-   print_eth(0);
-   printf("ip_addr = %s\n", getenv("ipaddr"));
+   print_eth_ip_addr();
printf("baudrate= %u bps\n", gd->baudrate);
 
return 0;
@@ -363,9 +347,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_boot_params(bd);
print_bi_mem(bd);
print_bi_flash(bd);
-
-   print_eth(0);
-   printf("ip_addr = %s\n", getenv("ipaddr"));
+   print_eth_ip_addr();
printf("baudrate= %u bps\n", gd->baudrate);
print_num("relocaddr", gd->relocaddr);
print_num("reloc off", gd->reloc_off);
@@ -382,9 +364,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_boot_params(bd);
print_bi_mem(bd);
print_bi_flash(bd);
-
-   print_eth(0);
-   printf("ip_addr = %s\n", getenv("ipaddr"));
+   print_eth_ip_addr();
printf("baudrate= %u bps\n", gd->baudrate);
 
return 0;
@@ -444,11 +424,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
print_bi_mem(bd);
print_bi_flash(bd);
-
-#if defined(CONFIG_CMD_NET)
-   print_eth(0);
-   printf("ip_addr = %s\n", getenv("ipaddr"));
-#endif
+   print_eth_ip_addr();
printf("baudrate= %u bps\n", gd->baudrate);
return 0;
 }
@@ -474,8 +450,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_bi_dram(bd);
 
 #if defined(CONFIG_CMD_NET)
-   print_eth(0);
-   printf("ip_addr = %s\n", getenv("ipaddr"));
+   print_eth_ip_addr();
print_mhz("ethspeed",   bd->bi_ethspeed);
 #endif
printf("baudrate

[U-Boot] [PATCH v2 2/7] cmd/bdinfo: extract print_bi_mem

[Max Filippov]

print_bi_mem outputs memstart and memsize lines.

Signed-off-by: Max Filippov 
---
 cmd/bdinfo.c | 42 ++
 1 file changed, 26 insertions(+), 16 deletions(-)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 60aaafb..df68b58 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -75,6 +75,23 @@ static inline void print_bi_boot_params(const bd_t *bd)
print_num("boot_params",(ulong)bd->bi_boot_params);
 }
 
+static inline void print_bi_mem(const bd_t *bd)
+{
+#if defined(CONFIG_SH)
+   print_num("mem start  ",(ulong)bd->bi_memstart);
+   print_lnum("mem size   ",   (u64)bd->bi_memsize);
+#elif defined(CONFIG_ARC)
+   print_num("mem start",  (ulong)bd->bi_memstart);
+   print_lnum("mem size",  (u64)bd->bi_memsize);
+#elif defined(CONFIG_AVR32)
+   print_num("memstart",   (ulong)bd->bi_dram[0].start);
+   print_lnum("memsize",   (u64)bd->bi_dram[0].size);
+#else
+   print_num("memstart",   (ulong)bd->bi_memstart);
+   print_lnum("memsize",   (u64)bd->bi_memsize);
+#endif
+}
+
 #if defined(CONFIG_PPC)
 void __weak board_detail(void)
 {
@@ -88,8 +105,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 #ifdef DEBUG
print_num("bd address", (ulong)bd);
 #endif
-   print_num("memstart",   bd->bi_memstart);
-   print_lnum("memsize",   bd->bi_memsize);
+   print_bi_mem(bd);
print_num("flashstart", bd->bi_flashstart);
print_num("flashsize",  bd->bi_flashsize);
print_num("flashoffset",bd->bi_flashoffset);
@@ -263,8 +279,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 {
bd_t *bd = gd->bd;
 
-   print_num("memstart",   (ulong)bd->bi_memstart);
-   print_lnum("memsize",   (u64)bd->bi_memsize);
+   print_bi_mem(bd);
print_num("flashstart", (ulong)bd->bi_flashstart);
print_num("flashsize",  (ulong)bd->bi_flashsize);
print_num("flashoffset",(ulong)bd->bi_flashoffset);
@@ -318,8 +333,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_mhz("SCLK",   bd->bi_sclk);
 
print_bi_boot_params(bd);
-   print_num("memstart",   (ulong)bd->bi_memstart);
-   print_lnum("memsize",   (u64)bd->bi_memsize);
+   print_bi_mem(bd);
print_num("flashstart", (ulong)bd->bi_flashstart);
print_num("flashsize",  (ulong)bd->bi_flashsize);
print_num("flashoffset",(ulong)bd->bi_flashoffset);
@@ -338,8 +352,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
bd_t *bd = gd->bd;
 
print_bi_boot_params(bd);
-   print_num("memstart",   (ulong)bd->bi_memstart);
-   print_lnum("memsize",   (u64)bd->bi_memsize);
+   print_bi_mem(bd);
print_num("flashstart", (ulong)bd->bi_flashstart);
print_num("flashsize",  (ulong)bd->bi_flashsize);
print_num("flashoffset",(ulong)bd->bi_flashoffset);
@@ -360,8 +373,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
bd_t *bd = gd->bd;
 
print_bi_boot_params(bd);
-   print_num("memstart",   (ulong)bd->bi_dram[0].start);
-   print_lnum("memsize",   (u64)bd->bi_dram[0].size);
+   print_bi_mem(bd);
print_num("flashstart", (ulong)bd->bi_flashstart);
print_num("flashsize",  (ulong)bd->bi_flashsize);
print_num("flashoffset",(ulong)bd->bi_flashoffset);
@@ -430,8 +442,8 @@ static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
bd_t *bd = gd->bd;
-   print_num("mem start  ",(ulong)bd->bi_memstart);
-   print_lnum("mem size   ",   (u64)bd->bi_memsize);
+
+   print_bi_mem(bd);
print_num("flash start",(ulong)bd->bi_flashstart);
print_num("flash size ",(ulong)bd->bi_flashsize);
print_num("flash offset   ",(ulong)bd->bi_flashoffset);
@@ -535,8 +547,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 {
bd_t *bd = gd->bd;
 
-   print_num("mem start",  (ulong)bd->bi_memstart);
-   print_lnum("mem size",  (u64)bd->bi_memsize);
+   print_bi_mem(bd);
print_num("flash start",(ulong)bd->bi_flashstart);
print_num("flash size", (ulong)bd->bi_flashsize);
print_num("flash offset",   (ulong)bd->bi_flashoffset);
@@ -557,8 +568,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 {
bd_t *bd = gd->bd;
 
-   print_num("mem start",  bd->bi_memstart);
-   print_lnum("mem size",  bd->bi_memsize);
+   print_bi_mem(bd);

[U-Boot] [PATCH v2 0/7] cmd/bdinfo: extract common parts and reuse them

[Max Filippov]

Hi,

this series extracts common parts of cmd/bdinfo.c used by various
architectures into reusable functions.

Changes v1->v2:
- fix build for architectures w/o CONFIG_NR_DRAM_BANKS and bi_dram in
  bd_t.

Please review.

Max Filippov (7):
  cmd/bdinfo: extract print_bi_boot_params
  cmd/bdinfo: extract print_bi_mem
  cmd/bdinfo: extract print_bi_dram
  cmd/bdinfo: extract print_bi_flash
  cmd/bdinfo: extract print_eth_ip_addr
  cmd/bdinfo: extract print_baudrate
  cmd/bdinfo: extract print_std_bdinfo

 cmd/bdinfo.c | 328 ++-
 1 file changed, 142 insertions(+), 186 deletions(-)

-- 
2.1.4

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Re: [U-Boot] Please pull: u-boot-video/master

[Tom Rini]

On Wed, Jul 27, 2016 at 09:17:28PM +0200, Anatolij Gustschin wrote:

> Hi Tom,
> 
> On Mon, 25 Jul 2016 17:46:31 -0400
> Tom Rini tr...@konsulko.com wrote:
> ...
> > Hey, good catch.  Anatolij, please fix and re-submit, thanks!
> 
> sandbox build fixed now, here is updated pull request:
> 
> The following changes since commit 19ce924ff914f315dc2fdf79f357825c513aed6e:
> 
>   Prepare v2016.07 (2016-07-11 15:01:01 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-video.git master
> 
> for you to fetch changes up to b6de2cd7ee5af536ae67ab5522b69e5c4925f5f2:
> 
>   splash: Introduce default_splash_locations (2016-07-26 08:47:37 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PATCH] x86: som-db5800-som-6867: fix SERIRQ on reset

[George McCollister]

Pad configuration for SERIRQ is not set to enable the SERIRQ function
on soft reset though strangely, it is on initial boot.

Signed-off-by: George McCollister 
---
 arch/x86/dts/baytrail_som-db5800-som-6867.dts | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts 
b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
index 64e2e52..e1d81a7 100644
--- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts
+++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
@@ -63,6 +63,12 @@
pad-offset = <0x270>;
mode-func = <2>;
};
+
+   /* SERIRQ */
+   soc_gpio_s0_50@0 {
+   pad-offset = <0x560>;
+   mode-func = <1>;
+   };
};
 
chosen {
-- 
2.8.0

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[U-Boot] [PATCH 4/5] ARM: tegra: add I2C controllers to Tegra186 DT

[Stephen Warren]

From: Bryan Wu 

Tegra186 has 8 I2C controllers including BPMP I2C. This patch adds the
other 7 generic controllers to Tegra186's DT.

Signed-off-by: Bryan Wu 
(swarren, fixed DT node sort order, tweak patch description)
Signed-off-by: Stephen Warren 
---
 arch/arm/dts/tegra186.dtsi | 104 +
 1 file changed, 104 insertions(+)

diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index 7f22d644129a..0778d2117658 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -38,6 +38,84 @@
status = "disabled";
};
 
+   gen1_i2c: i2c@316 {
+   compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+   reg = <0x0 0x316 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&bpmp TEGRA186_CLK_I2C1>;
+   clock-names = "i2c";
+   resets = <&bpmp TEGRA186_RESET_I2C1>;
+   reset-names = "i2c";
+   status = "disabled";
+   };
+
+   cam_i2c: i2c@318 {
+   compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+   reg = <0x0 0x318 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&bpmp TEGRA186_CLK_I2C3>;
+   clock-names = "i2c";
+   resets = <&bpmp TEGRA186_RESET_I2C3>;
+   reset-names = "i2c";
+   status = "disabled";
+   };
+
+   dp_aux_ch1_i2c: i2c@319 {
+   compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+   reg = <0x0 0x319 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&bpmp TEGRA186_CLK_I2C4>;
+   clock-names = "i2c";
+   resets = <&bpmp TEGRA186_RESET_I2C4>;
+   reset-names = "i2c";
+   status = "disabled";
+   };
+
+   dp_aux_ch0_i2c: i2c@31b {
+   compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+   reg = <0x0 0x31b 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&bpmp TEGRA186_CLK_I2C6>;
+   clock-names = "i2c";
+   resets = <&bpmp TEGRA186_RESET_I2C6>;
+   reset-names = "i2c";
+   status = "disabled";
+   };
+
+   gen7_i2c: i2c@31c {
+   compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+   reg = <0x0 0x31c 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&bpmp TEGRA186_CLK_I2C7>;
+   clock-names = "i2c";
+   resets = <&bpmp TEGRA186_RESET_I2C7>;
+   reset-names = "i2c";
+   status = "disabled";
+   };
+
+   gen9_i2c: i2c@31e {
+   compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+   reg = <0x0 0x31e 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&bpmp TEGRA186_CLK_I2C9>;
+   clock-names = "i2c";
+   resets = <&bpmp TEGRA186_RESET_I2C9>;
+   reset-names = "i2c";
+   status = "disabled";
+   };
+
sdhci@340 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x0340 0x0 0x200>;
@@ -81,6 +159,32 @@
#mbox-cells = <2>;
};
 
+   gen2_i2c: i2c@c24 {
+   compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+   reg = <0x0 0xc24 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&bpmp TEGRA186_CLK_I2C2>;
+   clock-names = "i2c";
+   resets = <&bpmp TEGRA186_RESET_I2C2>;
+   reset-names = "i2c";
+   status = "disabled";
+   };
+
+   gen8_i2c: i2c@c25 {
+   compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+   reg = <0x0 0xc25 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&bpmp TEGRA186_CLK_I2C8>;
+   clock-names = "i2c";
+   resets = <&bpmp TEGRA186_RESET_I2C8>;
+   reset-names = "i2c";
+   status = "disabled";
+   };
+
gpio_aon: gpio@c2f {
compatible = "nvidia,tegra186-gpio-aon";
reg-names = "security", "gpio";
-- 
2.9.2

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[U-Boot] [PATCH 3/5] i2c: tegra: add standardized clk/reset API support

[Stephen Warren]

From: Bryan Wu 

clk/reset API was tested on T186 platform and previous chip like
T210/T124 will still use the old APIs.

Signed-off-by: Bryan Wu 
(swarren, simplified some ifdefs, removed indent level inside an ifdef)
Signed-off-by: Stephen Warren 
Cc: Heiko Schocher 
---
 drivers/i2c/tegra_i2c.c | 80 ++---
 1 file changed, 76 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 2fa07f9c57c4..b8cb24ec87d5 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -12,11 +12,16 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_TEGRA186
+#include 
+#include 
+#else
 #include 
 #include 
-#include 
 #include 
 #include 
+#endif
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -30,7 +35,12 @@ enum i2c_type {
 /* Information about i2c controller */
 struct i2c_bus {
int id;
+#ifdef CONFIG_TEGRA186
+   struct reset_ctlreset_ctl;
+   struct clk  clk;
+#else
enum periph_id  periph_id;
+#endif
int speed;
int pinmux_config;
struct i2c_control  *control;
@@ -62,12 +72,41 @@ static void set_packet_mode(struct i2c_bus *i2c_bus)
 static void i2c_reset_controller(struct i2c_bus *i2c_bus)
 {
/* Reset I2C controller. */
+#ifdef CONFIG_TEGRA186
+   reset_assert(&i2c_bus->reset_ctl);
+   udelay(1);
+   reset_deassert(&i2c_bus->reset_ctl);
+   udelay(1);
+#else
reset_periph(i2c_bus->periph_id, 1);
+#endif
 
/* re-program config register to packet mode */
set_packet_mode(i2c_bus);
 }
 
+#ifdef CONFIG_TEGRA186
+static int i2c_init_clock(struct i2c_bus *i2c_bus, unsigned rate)
+{
+   int ret;
+
+   ret = reset_assert(&i2c_bus->reset_ctl);
+   if (ret)
+   return ret;
+   ret = clk_enable(&i2c_bus->clk);
+   if (ret)
+   return ret;
+   ret = clk_set_rate(&i2c_bus->clk, rate);
+   if (IS_ERR_VALUE(ret))
+   return ret;
+   ret = reset_deassert(&i2c_bus->reset_ctl);
+   if (ret)
+   return ret;
+
+   return 0;
+}
+#endif
+
 static void i2c_init_controller(struct i2c_bus *i2c_bus)
 {
if (!i2c_bus->speed)
@@ -78,8 +117,12 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus)
 * here, in section 23.3.1, but in fact we seem to need a factor of
 * 16 to get the right frequency.
 */
+#ifdef CONFIG_TEGRA186
+   i2c_init_clock(i2c_bus, i2c_bus->speed * 2 * 8);
+#else
clock_start_periph_pll(i2c_bus->periph_id, CLOCK_ID_PERIPH,
i2c_bus->speed * 2 * 8);
+#endif
 
if (i2c_bus->type == TYPE_114) {
/*
@@ -94,12 +137,17 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus)
 * is running, we hang, and we need it for the new calc.
 */
int clk_div_stdfst_mode = readl(&i2c_bus->regs->clk_div) >> 16;
+   unsigned rate = CLK_MULT_STD_FAST_MODE *
+   (clk_div_stdfst_mode + 1) * i2c_bus->speed * 2;
debug("%s: CLK_DIV_STD_FAST_MODE setting = %d\n", __func__,
clk_div_stdfst_mode);
 
+#ifdef CONFIG_TEGRA186
+   i2c_init_clock(i2c_bus, rate);
+#else
clock_start_periph_pll(i2c_bus->periph_id, CLOCK_ID_PERIPH,
-   CLK_MULT_STD_FAST_MODE * (clk_div_stdfst_mode + 1) *
-   i2c_bus->speed * 2);
+  rate);
+#endif
}
 
/* Reset I2C controller. */
@@ -112,7 +160,9 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus)
setbits_le32(&dvc->ctrl3, DVC_CTRL_REG3_I2C_HW_SW_PROG_MASK);
}
 
+#ifndef CONFIG_TEGRA186
funcmux_select(i2c_bus->periph_id, i2c_bus->pinmux_config);
+#endif
 }
 
 static void send_packet_headers(
@@ -333,8 +383,12 @@ static int tegra_i2c_set_bus_speed(struct udevice *dev, 
unsigned int speed)
 static int tegra_i2c_probe(struct udevice *dev)
 {
struct i2c_bus *i2c_bus = dev_get_priv(dev);
+#ifdef CONFIG_TEGRA186
+   int ret;
+#else
const void *blob = gd->fdt_blob;
int node = dev->of_offset;
+#endif
bool is_dvc;
 
i2c_bus->id = dev->seq;
@@ -345,6 +399,18 @@ static int tegra_i2c_probe(struct udevice *dev)
 * We don't have a binding for pinmux yet. Leave it out for now. So
 * far no one needs anything other than the default.
 */
+#ifdef CONFIG_TEGRA186
+   ret = reset_get_by_name(dev, "i2c", &i2c_bus->reset_ctl);
+   if (ret) {
+   error("reset_get_by_name() failed: %d\n", ret);
+   return ret;
+   }
+   ret = clk_get_by_name(dev, "i2c", &i2c_bus->clk);
+   if (ret) {
+   error("clk_get_by_name() failed: %d\n", ret);
+   return ret;
+   }
+#else
i2c_bus->pinm

[U-Boot] [PATCH 5/5] ARM: tegra: enable I2C buses for P2771-0000

[Stephen Warren]

From: Bryan Wu 

Enable I2C devices in DT and enable building tegra_i2c.c driver.

Signed-off-by: Bryan Wu 
(swarren, commit msg rework, fixed DT node sort order)
Signed-off-by: Stephen Warren 
---
 arch/arm/dts/tegra186-p2771-.dtsi | 35 +++
 include/configs/p2771-.h  |  3 +++
 2 files changed, 38 insertions(+)

diff --git a/arch/arm/dts/tegra186-p2771-.dtsi 
b/arch/arm/dts/tegra186-p2771-.dtsi
index 87f0427e80c1..4e2b6fbf97f8 100644
--- a/arch/arm/dts/tegra186-p2771-.dtsi
+++ b/arch/arm/dts/tegra186-p2771-.dtsi
@@ -10,14 +10,49 @@
 
aliases {
sdhci0 = "/sdhci@346";
+   i2c1 = "/i2c@316";
+   i2c2 = "/i2c@c24";
+   i2c3 = "/i2c@318";
+   i2c4 = "/i2c@319";
+   i2c5 = "/i2c@31c";
+   i2c6 = "/i2c@c25";
+   i2c7 = "/i2c@31e";
};
 
memory {
reg = <0x0 0x8000 0x0 0x6000>;
};
 
+   i2c@316 {
+   status = "okay";
+   };
+
+   i2c@318 {
+   status = "okay";
+   };
+
+   i2c@319 {
+   status = "okay";
+   };
+
+   i2c@31c {
+   status = "okay";
+   };
+
sdhci@346 {
status = "okay";
bus-width = <8>;
};
+
+   i2c@c24 {
+   status = "okay";
+   };
+
+   i2c@c25 {
+   status = "okay";
+   };
+
+   i2c@31e {
+   status = "okay";
+   };
 };
diff --git a/include/configs/p2771-.h b/include/configs/p2771-.h
index 257283f3b937..3ce72086ce9c 100644
--- a/include/configs/p2771-.h
+++ b/include/configs/p2771-.h
@@ -14,6 +14,9 @@
 /* High-level configuration options */
 #define CONFIG_TEGRA_BOARD_STRING  "NVIDIA P2771-"
 
+/* I2C */
+#define CONFIG_SYS_I2C_TEGRA
+
 /* SD/MMC */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
-- 
2.9.2

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[U-Boot] [PATCH 2/5] ARM: tegra: add PCIe controller to Tegra186 SoC DT

[Stephen Warren]

From: Stephen Warren 

The Tegra186 PCIe DT content is almost identical to previous chips, except
that the:

- There are 3 ports instead of 2.
- Some physical addresses have moved.
- PHY programming is handled by firmware, so CCPLEX DTs don't need to
  reference any PHY.
- The power domain is explicitly represented in DT. This change is
  mandatory for Tegra186 since standard power domain APIs are used, and
  should be made to the DT for older SoCs, although we get away without
  doing so since U-Boot currently uses custom APIs that hard-code power
  domain IDs.

Signed-off-by: Stephen Warren 
---
 arch/arm/dts/tegra186.dtsi | 92 ++
 1 file changed, 92 insertions(+)

diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index 25e1e8dfc035..7f22d644129a 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -3,10 +3,12 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 / {
compatible = "nvidia,tegra186";
+   interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
 
@@ -58,6 +60,19 @@
status = "disabled";
};
 
+   gic: interrupt-controller@3881000 {
+   compatible = "arm,gic-400";
+   #interrupt-cells = <3>;
+   interrupt-controller;
+   reg = <0x0 0x3881000 0x0 0x1000>,
+ <0x0 0x3882000 0x0 0x2000>,
+ <0x0 0x3884000 0x0 0x2000>,
+ <0x0 0x3886000 0x0 0x2000>;
+   interrupts = ;
+   interrupt-parent = <&gic>;
+   };
+
hsp: hsp@3c0 {
compatible = "nvidia,tegra186-hsp";
reg = <0x0 0x03c0 0x0 0xa>;
@@ -80,6 +95,83 @@
#interrupt-cells = <2>;
};
 
+   pcie-controller@10003000 {
+   compatible = "nvidia,tegra186-pcie";
+   device_type = "pci";
+   reg = <0x0 0x10003000 0x0 0x0800   /* PADS registers */
+  0x0 0x10003800 0x0 0x0800   /* AFI registers */
+  0x0 0x4000 0x0 0x1000>; /* configuration space */
+   reg-names = "pads", "afi", "cs";
+   interrupts = , /* controller 
interrupt */
+, /* MSI interrupt 
*/
+; /* Wake 
interrupt */
+   interrupt-names = "intr", "msi", "wake";
+
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0 &gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+
+   bus-range = <0x00 0xff>;
+   #address-cells = <3>;
+   #size-cells = <2>;
+
+   ranges = <0x8200 0 0x1000 0x0 0x1000 0 0x1000   
/* port 0 configuration space */
+ 0x8200 0 0x10001000 0x0 0x10001000 0 0x1000   
/* port 1 configuration space */
+ 0x8200 0 0x10004000 0x0 0x10004000 0 0x1000   
/* port 2 configuration space */
+ 0x8100 0 0x00x0 0x5000 0 0x0001   
/* downstream I/O (64 KiB) */
+ 0x8200 0 0x5010 0x0 0x5010 0 0x07f0   
/* non-prefetchable memory (127 MiB) */
+ 0xc200 0 0x5800 0x0 0x5800 0 0x2800>; 
/* prefetchable memory (640 MiB) */
+
+   clocks = <&bpmp TEGRA186_CLK_PCIE>,
+<&bpmp TEGRA186_CLK_AFI>;
+   clock-names = "pex", "afi";
+   resets = <&bpmp TEGRA186_RESET_PCIE>,
+<&bpmp TEGRA186_RESET_AFI>,
+<&bpmp TEGRA186_RESET_PCIEXCLK>;
+   reset-names = "pex", "afi", "pcie_x";
+   power-domains = <&bpmp TEGRA186_POWER_DOMAIN_PCX>;
+   status = "disabled";
+
+   pci@1,0 {
+   device_type = "pci";
+   assigned-addresses = <0x82000800 0 0x1000 0 0x1000>;
+   reg = <0x000800 0 0 0 0>;
+   status = "disabled";
+
+   #address-cells = <3>;
+   #size-cells = <2>;
+   ranges;
+
+   nvidia,num-lanes = <2>;
+   };
+
+   pci@2,0 {
+   device_type = "pci";
+   assigned-addresses = <0x82001000 0 0x10001000 0 0x1000>;
+   reg = <0x001000 0 0 0 0>;
+   status = "disabled";
+
+   #address-cells = <3>;
+   #size-cells = <2>;
+   ranges;
+
+   nvidia,num-lanes = <1>;
+   };
+
+   pci@3,0 {
+   device_type = "pci";
+   assigned-addresses = <0x82001800 0 0x10004000 0 0x1000>;
+   reg = <0x001800 0 0 0 0>;
+ 

[U-Boot] [PATCH 1/5] pci: tegra: port to standard clock/reset/pwr domain APIs

[Stephen Warren]

From: Stephen Warren 

Tegra186 supports the new standard clock, reset, and power domain APIs.
Older Tegra SoCs still use custom APIs. Enhance the Tegra PCIe driver so
that it can operate with either set of APIs.

On Tegra186, the BPMP handles all aspects of PCIe PHY (UPHY) programming.
Consequently, this logic is disabled too.

Signed-off-by: Stephen Warren 
---
This whole series builds on the other Tegra186 series that I just sent.

 drivers/pci/Kconfig |   1 +
 drivers/pci/pci_tegra.c | 154 ++--
 2 files changed, 150 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 26aa2b0930a0..669e37bb5dc5 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -31,6 +31,7 @@ config PCI_SANDBOX
 config PCI_TEGRA
bool "Tegra PCI support"
depends on TEGRA
+   depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
help
  Enable support for the PCIe controller found on some generations of
  Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index 352cdef56ab4..a6785ad0bbee 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -13,22 +13,26 @@
 #define pr_fmt(fmt) "tegra-pcie: " fmt
 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
 
+#include 
+
+#ifndef CONFIG_TEGRA186
 #include 
 #include 
 #include 
-
-#include 
-
 #include 
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -103,6 +107,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_222   (0x1 << 20)
 #define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_X4_X1 (0x1 << 20)
 #define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_411   (0x2 << 20)
+#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_401  (0x0 << 20)
+#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_211  (0x1 << 20)
+#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_111  (0x2 << 20)
 
 #define AFI_FUSE   0x104
 #define  AFI_FUSE_PCIE_T0_GEN2_DIS (1 << 2)
@@ -110,6 +117,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define AFI_PEX0_CTRL  0x110
 #define AFI_PEX1_CTRL  0x118
 #define AFI_PEX2_CTRL  0x128
+#define AFI_PEX2_CTRL_T186 0x19c
 #define  AFI_PEX_CTRL_RST  (1 << 0)
 #define  AFI_PEX_CTRL_CLKREQ_EN(1 << 1)
 #define  AFI_PEX_CTRL_REFCLK_EN(1 << 3)
@@ -173,6 +181,7 @@ enum tegra_pci_id {
TEGRA30_PCIE,
TEGRA124_PCIE,
TEGRA210_PCIE,
+   TEGRA186_PCIE,
 };
 
 struct tegra_pcie_port {
@@ -189,6 +198,7 @@ struct tegra_pcie_soc {
unsigned int num_ports;
unsigned long pads_pll_ctl;
unsigned long tx_ref_sel;
+   unsigned long afi_pex2_ctrl;
u32 pads_refclk_cfg0;
u32 pads_refclk_cfg1;
bool has_pex_clkreq_en;
@@ -209,7 +219,17 @@ struct tegra_pcie {
unsigned long xbar;
 
const struct tegra_pcie_soc *soc;
+
+#ifdef CONFIG_TEGRA186
+   struct clk clk_afi;
+   struct clk clk_pex;
+   struct reset_ctl reset_afi;
+   struct reset_ctl reset_pex;
+   struct reset_ctl reset_pcie_x;
+   struct power_domain pwrdom;
+#else
struct tegra_xusb_phy *phy;
+#endif
 };
 
 static void afi_writel(struct tegra_pcie *pcie, unsigned long value,
@@ -229,10 +249,12 @@ static void pads_writel(struct tegra_pcie *pcie, unsigned 
long value,
writel(value, pcie->pads.start + offset);
 }
 
+#ifndef CONFIG_TEGRA186
 static unsigned long pads_readl(struct tegra_pcie *pcie, unsigned long offset)
 {
return readl(pcie->pads.start + offset);
 }
+#endif
 
 static unsigned long rp_readl(struct tegra_pcie_port *port,
  unsigned long offset)
@@ -400,6 +422,24 @@ static int tegra_pcie_get_xbar_config(const void *fdt, int 
node, u32 lanes,
return 0;
}
break;
+   case TEGRA186_PCIE:
+   switch (lanes) {
+   case 0x0010004:
+   debug("x4 x1 configuration\n");
+   *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_401;
+   return 0;
+
+   case 0x0010102:
+   debug("x2 x1 x1 configuration\n");
+   *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_211;
+   return 0;
+
+   case 0x0010101:
+   debug("x1 x1 x1 configuration\n");
+   *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_111;
+   return 0;
+   }
+   break;
default:
break;
}
@@ -471,6 +511,7 @@ static int tegra_pcie_parse_dt(const void *fdt, int node, 
enum tegra_pci_id id,
return err;
}
 
+#ifndef CONFIG_TEGRA186
pcie->phy = tegra_xusb_phy_ge

[U-Boot] [PATCH 9/9] ARM: tegra: call tegra_board_init on Tegra186

[Stephen Warren]

From: Stephen Warren 

Introduce tegra_board_init() and call it from board_init(). Tegra wil use
tegra_board_init() for board-specific initialization, and board_init() for
SoC-specific initialization.

Signed-off-by: Stephen Warren 
---
 arch/arm/mach-tegra/board186.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c
index 876ccba5e599..a7583d443833 100644
--- a/arch/arm/mach-tegra/board186.c
+++ b/arch/arm/mach-tegra/board186.c
@@ -16,11 +16,16 @@ int board_early_init_f(void)
return 0;
 }
 
-int board_init(void)
+__weak int tegra_board_init(void)
 {
return 0;
 }
 
+int board_init(void)
+{
+   return tegra_board_init();
+}
+
 int board_late_init(void)
 {
return 0;
-- 
2.9.2

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[U-Boot] [PATCH 8/9] mmc: tegra: port to standard clock/reset APIs

[Stephen Warren]

From: Stephen Warren 

Tegra186 supports the new standard clock and reset APIs. Older Tegra SoCs
still use custom APIs. Enhance the Tegra MMC driver so that it can operate
with either set of APIs.

Signed-off-by: Stephen Warren 
Cc: Pantelis Antoniou 
---
 arch/arm/include/asm/arch-tegra/tegra_mmc.h |  8 -
 drivers/mmc/tegra_mmc.c | 55 -
 2 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h 
b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
index 75e56c4ea786..07ef4c04c858 100644
--- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
+++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
@@ -9,6 +9,9 @@
 #ifndef __TEGRA_MMC_H_
 #define __TEGRA_MMC_H_
 
+#include 
+#include 
+#include 
 #include 
 #include 
 
@@ -134,7 +137,10 @@ struct mmc_host {
int id; /* device id/number, 0-3 */
int enabled;/* 1 to enable, 0 to disable */
int width;  /* Bus Width, 1, 4 or 8 */
-#ifndef CONFIG_TEGRA186
+#ifdef CONFIG_TEGRA186
+   struct reset_ctl reset_ctl;
+   struct clk clk;
+#else
enum periph_id mmc_id;  /* Peripheral ID: PERIPH_ID_... */
 #endif
struct gpio_desc cd_gpio;   /* Change Detect GPIO */
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index c9d9432e5e87..b27ca635ac50 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #ifndef CONFIG_TEGRA186
@@ -359,11 +360,14 @@ static void mmc_change_clock(struct mmc_host *host, uint 
clock)
 */
if (clock == 0)
goto out;
-#ifndef CONFIG_TEGRA186
+#ifdef CONFIG_TEGRA186
+   {
+   ulong rate = clk_set_rate(&host->clk, clock);
+   div = (rate + clock - 1) / clock;
+   }
+#else
clock_adjust_periph_pll_div(host->mmc_id, CLOCK_ID_PERIPH, clock,
&div);
-#else
-   div = (2000 + clock - 1) / clock;
 #endif
debug("div = %d\n", div);
 
@@ -538,6 +542,9 @@ static int do_mmc_init(int dev_index, bool removable)
 {
struct mmc_host *host;
struct mmc *mmc;
+#ifdef CONFIG_TEGRA186
+   int ret;
+#endif
 
/* DT should have been read & host config filled in */
host = &mmc_host[dev_index];
@@ -549,7 +556,21 @@ static int do_mmc_init(int dev_index, bool removable)
  gpio_get_number(&host->cd_gpio));
 
host->clock = 0;
-#ifndef CONFIG_TEGRA186
+
+#ifdef CONFIG_TEGRA186
+   ret = reset_assert(&host->reset_ctl);
+   if (ret)
+   return ret;
+   ret = clk_enable(&host->clk);
+   if (ret)
+   return ret;
+   ret = clk_set_rate(&host->clk, 2000);
+   if (IS_ERR_VALUE(ret))
+   return ret;
+   ret = reset_deassert(&host->reset_ctl);
+   if (ret)
+   return ret;
+#else
clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 2000);
 #endif
 
@@ -576,11 +597,7 @@ static int do_mmc_init(int dev_index, bool removable)
 *  (actually 52MHz)
 */
host->cfg.f_min = 375000;
-#ifndef CONFIG_TEGRA186
host->cfg.f_max = 4800;
-#else
-   host->cfg.f_max = 375000;
-#endif
 
host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 
@@ -612,7 +629,27 @@ static int mmc_get_config(const void *blob, int node, 
struct mmc_host *host,
return -FDT_ERR_NOTFOUND;
}
 
-#ifndef CONFIG_TEGRA186
+#ifdef CONFIG_TEGRA186
+   {
+   /*
+* FIXME: This variable should go away when the MMC device
+* actually is a udevice.
+*/
+   struct udevice dev;
+   int ret;
+   dev.of_offset = node;
+   ret = reset_get_by_name(&dev, "sdmmc", &host->reset_ctl);
+   if (ret) {
+   debug("reset_get_by_index() failed: %d\n", ret);
+   return ret;
+   }
+   ret = clk_get_by_name(&dev, "sdmmc", &host->clk);
+   if (ret) {
+   debug("clk_get_by_index() failed: %d\n", ret);
+   return ret;
+   }
+   }
+#else
host->mmc_id = clock_decode_periph_id(blob, node);
if (host->mmc_id == PERIPH_ID_NONE) {
debug("%s: could not decode periph id\n", __func__);
-- 
2.9.2

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[U-Boot] [PATCH 6/9] reset: add Tegra186 reset driver

[Stephen Warren]

From: Stephen Warren 

In Tegra186, on-SoC reset signals are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that. It is unconditionally selected by CONFIG_TEGRA186
since virtually any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren 
---
 arch/arm/mach-tegra/Kconfig|  2 ++
 drivers/reset/Kconfig  |  7 
 drivers/reset/Makefile |  1 +
 drivers/reset/tegra186-reset.c | 76 ++
 4 files changed, 86 insertions(+)
 create mode 100644 drivers/reset/tegra186-reset.c

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index e8186d515856..1eaf40627254 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -66,10 +66,12 @@ config TEGRA186
bool "Tegra186 family"
select CLK
select DM_MAILBOX
+   select DM_RESET
select MISC
select TEGRA186_BPMP
select TEGRA186_CLOCK
select TEGRA186_GPIO
+   select TEGRA186_RESET
select TEGRA_ARMV8_COMMON
select TEGRA_HSP
select TEGRA_IVC
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 0fe8cc3827f1..5b84f2178b71 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -20,4 +20,11 @@ config SANDBOX_RESET
  simply accepts requests to reset various HW modules without actually
  doing anything beyond a little error checking.
 
+config TEGRA186_RESET
+   bool "Enable Tegra186 BPMP-based reset driver"
+   depends on TEGRA186_BPMP
+   help
+ Enable support for manipulating Tegra's on-SoC reset signals via IPC
+ requests to the BPMP (Boot and Power Management Processor).
+
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 71f3b219613e..ff0e0907758b 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -5,3 +5,4 @@
 obj-$(CONFIG_DM_RESET) += reset-uclass.o
 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
+obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
diff --git a/drivers/reset/tegra186-reset.c b/drivers/reset/tegra186-reset.c
new file mode 100644
index ..47bc6b843fea
--- /dev/null
+++ b/drivers/reset/tegra186-reset.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int tegra186_reset_request(struct reset_ctl *reset_ctl)
+{
+   debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+   return 0;
+}
+
+static int tegra186_reset_free(struct reset_ctl *reset_ctl)
+{
+   debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+   return 0;
+}
+
+static int tegra186_reset_common(struct reset_ctl *reset_ctl,
+enum mrq_reset_commands cmd)
+{
+   struct mrq_reset_request req;
+
+   req.cmd = cmd;
+   req.reset_id = reset_ctl->id;
+
+   return tegra186_bpmp_call(reset_ctl->dev->parent, MRQ_RESET,
+ &req, sizeof(req), NULL, 0);
+}
+
+static int tegra186_reset_assert(struct reset_ctl *reset_ctl)
+{
+   debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+   return tegra186_reset_common(reset_ctl, CMD_RESET_ASSERT);
+}
+
+static int tegra186_reset_deassert(struct reset_ctl *reset_ctl)
+{
+   debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+   return tegra186_reset_common(reset_ctl, CMD_RESET_DEASSERT);
+}
+
+struct reset_ops tegra186_reset_ops = {
+   .request = tegra186_reset_request,
+   .free = tegra186_reset_free,
+   .rst_assert = tegra186_reset_assert,
+   .rst_deassert = tegra186_reset_deassert,
+};
+
+static int tegra186_reset_probe(struct udevice *dev)
+{
+   debug("%s(dev=%p)\n", __func__, dev);
+
+   return 0;
+}
+
+U_BOOT_DRIVER(tegra186_reset) = {
+   .name   = "tegra186_reset",
+   .id = UCLASS_RESET,
+   .probe  = tegra186_reset_probe,
+   .ops = &tegra186_reset_ops,
+};
-- 
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[U-Boot] [PATCH 7/9] power domain: add Tegra186 driver

[Stephen Warren]

From: Stephen Warren 

In Tegra186, SoC power domains are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that.

Signed-off-by: Stephen Warren 
---
 drivers/power/domain/Kconfig |  7 +++
 drivers/power/domain/Makefile|  1 +
 drivers/power/domain/tegra186-power-domain.c | 88 
 3 files changed, 96 insertions(+)
 create mode 100644 drivers/power/domain/tegra186-power-domain.c

diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
index b90409743398..132e33250e8c 100644
--- a/drivers/power/domain/Kconfig
+++ b/drivers/power/domain/Kconfig
@@ -17,4 +17,11 @@ config SANDBOX_POWER_DOMAIN
  simply accepts requests to power on/off various HW modules without
  actually doing anything beyond a little error checking.
 
+config TEGRA186_POWER_DOMAIN
+   bool "Enable Tegra186 BPMP-based power domain driver"
+   depends on TEGRA186_BPMP
+   help
+ Enable support for manipulating Tegra's on-SoC power domains via IPC
+ requests to the BPMP (Boot and Power Management Processor).
+
 endmenu
diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
index c18292f0ec88..2c3d92638fbe 100644
--- a/drivers/power/domain/Makefile
+++ b/drivers/power/domain/Makefile
@@ -5,3 +5,4 @@
 obj-$(CONFIG_POWER_DOMAIN) += power-domain-uclass.o
 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o
 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o
+obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o
diff --git a/drivers/power/domain/tegra186-power-domain.c 
b/drivers/power/domain/tegra186-power-domain.c
new file mode 100644
index ..4ae4baabe57e
--- /dev/null
+++ b/drivers/power/domain/tegra186-power-domain.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define UPDATE BIT(0)
+#define ON BIT(1)
+
+static int tegra186_power_domain_request(struct power_domain *power_domain)
+{
+   debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
+ power_domain, power_domain->dev, power_domain->id);
+
+   return 0;
+}
+
+static int tegra186_power_domain_free(struct power_domain *power_domain)
+{
+   debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
+ power_domain, power_domain->dev, power_domain->id);
+
+   return 0;
+}
+
+static int tegra186_power_domain_common(struct power_domain *power_domain,
+   bool on)
+{
+   struct mrq_pg_update_state_request req;
+   int on_state = on ? ON : 0;
+
+   req.partition_id = power_domain->id;
+   req.logic_state = UPDATE | on_state;
+   req.sram_state = UPDATE | on_state;
+   /*
+* Drivers manage their own clocks so they don't get out of sync, and
+* since some power domains have many clocks, only a subset of which
+* are actually needed depending on use-case.
+*/
+   req.clock_state = UPDATE;
+
+   return tegra186_bpmp_call(power_domain->dev->parent,
+ MRQ_PG_UPDATE_STATE, &req, sizeof(req), NULL,
+ 0);
+}
+
+static int tegra186_power_domain_on(struct power_domain *power_domain)
+{
+   debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
+ power_domain, power_domain->dev, power_domain->id);
+
+   return tegra186_power_domain_common(power_domain, true);
+}
+
+static int tegra186_power_domain_off(struct power_domain *power_domain)
+{
+   debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
+ power_domain, power_domain->dev, power_domain->id);
+
+   return tegra186_power_domain_common(power_domain, false);
+}
+
+struct power_domain_ops tegra186_power_domain_ops = {
+   .request = tegra186_power_domain_request,
+   .free = tegra186_power_domain_free,
+   .on = tegra186_power_domain_on,
+   .off = tegra186_power_domain_off,
+};
+
+static int tegra186_power_domain_probe(struct udevice *dev)
+{
+   debug("%s(dev=%p)\n", __func__, dev);
+
+   return 0;
+}
+
+U_BOOT_DRIVER(tegra186_power_domain) = {
+   .name = "tegra186_power_domain",
+   .id = UCLASS_POWER_DOMAIN,
+   .probe = tegra186_power_domain_probe,
+   .ops = &tegra186_power_domain_ops,
+};
-- 
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[U-Boot] [PATCH 4/9] misc: add Tegra BPMP driver

[Stephen Warren]

From: Stephen Warren 

The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren 
---
 arch/arm/include/asm/arch-tegra/bpmp_abi.h  | 1601 +++
 arch/arm/include/asm/arch-tegra/tegra186_bpmp.h |   14 +
 arch/arm/mach-tegra/Kconfig |2 +
 drivers/misc/Kconfig|   12 +
 drivers/misc/Makefile   |1 +
 drivers/misc/tegra186_bpmp.c|  250 
 6 files changed, 1880 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-tegra/bpmp_abi.h
 create mode 100644 arch/arm/include/asm/arch-tegra/tegra186_bpmp.h
 create mode 100644 drivers/misc/tegra186_bpmp.c

diff --git a/arch/arm/include/asm/arch-tegra/bpmp_abi.h 
b/arch/arm/include/asm/arch-tegra/bpmp_abi.h
new file mode 100644
index ..0aaef5960e29
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra/bpmp_abi.h
@@ -0,0 +1,1601 @@
+/*
+ * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#ifndef _ABI_BPMP_ABI_H_
+#define _ABI_BPMP_ABI_H_
+
+#ifdef LK
+#include 
+#endif
+
+#ifndef __ABI_PACKED
+#define __ABI_PACKED __attribute__((packed))
+#endif
+
+#ifdef NO_GCC_EXTENSIONS
+#define EMPTY char empty;
+#define EMPTY_ARRAY 1
+#else
+#define EMPTY
+#define EMPTY_ARRAY 0
+#endif
+
+#ifndef __UNION_ANON
+#define __UNION_ANON
+#endif
+/**
+ * @file
+ */
+
+
+/**
+ * @defgroup MRQ MRQ Messages
+ * @brief Messages sent to/from BPMP via IPC
+ * @{
+ *   @defgroup MRQ_Format Message Format
+ *   @defgroup MRQ_Codes Message Request (MRQ) Codes
+ *   @defgroup MRQ_Payloads Message Payloads
+ *   @defgroup Error_Codes Error Codes
+ * @}
+ */
+
+/**
+ * @addtogroup MRQ_Format Message Format
+ * @{
+ * The CPU requests the BPMP to perform a particular service by
+ * sending it an IVC frame containing a single MRQ message. An MRQ
+ * message consists of a @ref mrq_request followed by a payload whose
+ * format depends on mrq_request::mrq.
+ *
+ * The BPMP processes the data and replies with an IVC frame (on the
+ * same IVC channel) containing and MRQ response. An MRQ response
+ * consists of a @ref mrq_response followed by a payload whose format
+ * depends on the associated mrq_request::mrq.
+ *
+ * A well-defined subset of the MRQ messages that the CPU sends to the
+ * BPMP can lead to BPMP eventually sending an MRQ message to the
+ * CPU. For example, when the CPU uses an #MRQ_THERMAL message to set
+ * a thermal trip point, the BPMP may eventually send a single
+ * #MRQ_THERMAL message of its own to the CPU indicating that the trip
+ * point has been crossed.
+ * @}
+ */
+
+/**
+ * @ingroup MRQ_Format
+ * @brief header for an MRQ message
+ *
+ * Provides the MRQ number for the MRQ message: #mrq. The remainder of
+ * the MRQ message is a payload (immediately following the
+ * mrq_request) whose format depends on mrq.
+ *
+ * @todo document the flags
+ */
+struct mrq_request {
+   /** @brief MRQ number of the request */
+   uint32_t mrq;
+   /** @brief flags for the request */
+   uint32_t flags;
+} __ABI_PACKED;
+
+/**
+ * @ingroup MRQ_Format
+ * @brief header for an MRQ response
+ *
+ *  Provides an error code for the associated MRQ message. The
+ *  remainder of the MRQ response is a payload (immediately following
+ *  the mrq_response) whose format depends on the associated
+ *  mrq_request::mrq
+ *
+ * @todo document the flags
+ */
+struct mrq_response {
+   /** @brief error code for the MRQ request itself */
+   int32_t err;
+   /** @brief flags for the response */
+   uint32_t flags;
+} __ABI_PACKED;
+
+/**
+ * @ingroup MRQ_Format
+ * Minimum needed size for an IPC message buffer
+ */
+#define MSG_MIN_SZ 128
+/**
+ * @ingroup MRQ_Format
+ *  Minimum size guaranteed for data in an IPC message buffer
+ */
+#define MSG_DATA_MIN_SZ120
+
+/**
+ * @ingroup MRQ_Codes
+ * @name Leg

[U-Boot] [PATCH 1/9] ARM: tegra: adapt to latest HSP DT binding

[Stephen Warren]

From: Stephen Warren 

The DT binding for the Tegra186 HSP module apparently wasn't quite final
when I posted initial U-Boot support for it. Add the final DT binding doc
and adapt all code and DT files to match it.

Signed-off-by: Stephen Warren 
---
 arch/arm/dts/tegra186.dtsi | 10 ++---
 .../mailbox/nvidia,tegra186-hsp.txt| 52 ++
 drivers/mailbox/tegra-hsp.c| 47 +++
 include/dt-bindings/mailbox/tegra-hsp.h| 14 --
 include/dt-bindings/mailbox/tegra186-hsp.h | 19 
 5 files changed, 113 insertions(+), 29 deletions(-)
 create mode 100644 doc/device-tree-bindings/mailbox/nvidia,tegra186-hsp.txt
 delete mode 100644 include/dt-bindings/mailbox/tegra-hsp.h
 create mode 100644 include/dt-bindings/mailbox/tegra186-hsp.h

diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index 99d49254b36b..650feb60b1ab 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -1,7 +1,7 @@
 #include "skeleton.dtsi"
 #include 
 #include 
-#include 
+#include 
 
 / {
compatible = "nvidia,tegra186";
@@ -45,12 +45,8 @@
compatible = "nvidia,tegra186-hsp";
reg = <0x0 0x03c0 0x0 0xa>;
interrupts = ;
-   nvidia,num-SM = <0x8>;
-   nvidia,num-AS = <0x2>;
-   nvidia,num-SS = <0x2>;
-   nvidia,num-DB = <0x7>;
-   nvidia,num-SI = <0x8>;
-   #mbox-cells = <1>;
+   interrupt-names = "doorbell";
+   #mbox-cells = <2>;
};
 
gpio@c2f {
diff --git a/doc/device-tree-bindings/mailbox/nvidia,tegra186-hsp.txt 
b/doc/device-tree-bindings/mailbox/nvidia,tegra186-hsp.txt
new file mode 100644
index ..a9152380642d
--- /dev/null
+++ b/doc/device-tree-bindings/mailbox/nvidia,tegra186-hsp.txt
@@ -0,0 +1,52 @@
+NVIDIA Tegra Hardware Synchronization Primitives (HSP)
+
+The HSP modules are used for the processors to share resources and communicate
+together. It provides a set of hardware synchronization primitives for
+interprocessor communication. So the interprocessor communication (IPC)
+protocols can use hardware synchronization primitives, when operating between
+two processors not in an SMP relationship.
+
+The features that HSP supported are shared mailboxes, shared semaphores,
+arbitrated semaphores and doorbells.
+
+Required properties:
+- name : Should be hsp
+- compatible
+Array of strings.
+one of:
+- "nvidia,tegra186-hsp"
+- reg : Offset and length of the register set for the device.
+- interrupt-names
+Array of strings.
+Contains a list of names for the interrupts described by the interrupt
+property. May contain the following entries, in any order:
+- "doorbell"
+Users of this binding MUST look up entries in the interrupt property
+by name, using this interrupt-names property to do so.
+- interrupts
+Array of interrupt specifiers.
+Must contain one entry per entry in the interrupt-names property,
+in a matching order.
+- #mbox-cells : Should be 2.
+
+The mbox specifier of the "mboxes" property in the client node should
+contain two data. The first one should be the HSP type and the second
+one should be the ID that the client is going to use. Those information
+can be found in the following file.
+
+- .
+
+Example:
+
+hsp_top0: hsp@3c0 {
+   compatible = "nvidia,tegra186-hsp";
+   reg = <0x0 0x03c0 0x0 0xa>;
+   interrupts = ;
+   interrupt-names = "doorbell";
+   #mbox-cells = <2>;
+};
+
+client {
+   ...
+   mboxes = <&hsp_top0 HSP_MBOX_TYPE_DB HSP_DB_MASTER_XXX>;
+};
diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 5c781a50b6ac..3d0362d58740 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -8,7 +8,19 @@
 #include 
 #include 
 #include 
-#include 
+#include 
+
+#define TEGRA_HSP_INT_DIMENSIONING 0x380
+#define TEGRA_HSP_INT_DIMENSIONING_NSI_SHIFT   16
+#define TEGRA_HSP_INT_DIMENSIONING_NSI_MASK0xf
+#define TEGRA_HSP_INT_DIMENSIONING_NDB_SHIFT   12
+#define TEGRA_HSP_INT_DIMENSIONING_NDB_MASK0xf
+#define TEGRA_HSP_INT_DIMENSIONING_NAS_SHIFT   8
+#define TEGRA_HSP_INT_DIMENSIONING_NAS_MASK0xf
+#define TEGRA_HSP_INT_DIMENSIONING_NSS_SHIFT   4
+#define TEGRA_HSP_INT_DIMENSIONING_NSS_MASK0xf
+#define TEGRA_HSP_INT_DIMENSIONING_NSM_SHIFT   0
+#define TEGRA_HSP_INT_DIMENSIONING_NSM_MASK0xf
 
 #define TEGRA_HSP_DB_REG_TRIGGER   0x0
 #define TEGRA_HSP_DB_REG_ENABLE0x4
@@ -51,7 +63,7 @@ static void tegra_hsp_writel(struct tegra_hsp *thsp, uint32_t 
val,
 static int tegra_hsp_db_id(ulong chan_id)
 {
switch (chan_id) {
-   case TEGRA_HSP_MASTER_BPMP:
+   case (HSP_MBOX_TYPE_DB << 16) | HSP_DB_MASTER_BPMP:
return TEGRA_HSP_DB_ID_BPMP;
default:
debug("Invali

[U-Boot] [PATCH 3/9] ARM: tegra: add BPMP and dependencies to Tegra186 DT

[Stephen Warren]

From: Stephen Warren 

This adds the DT content that's needed to allow board DTs to enable use
of BPMP, clocks, resets, GPIOs, eMMC, and SD cards.

Signed-off-by: Stephen Warren 
---
 arch/arm/dts/tegra186.dtsi | 55 --
 1 file changed, 53 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index 650feb60b1ab..25e1e8dfc035 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -1,14 +1,16 @@
 #include "skeleton.dtsi"
+#include 
 #include 
 #include 
 #include 
+#include 
 
 / {
compatible = "nvidia,tegra186";
#address-cells = <2>;
#size-cells = <2>;
 
-   gpio@220 {
+   gpio_main: gpio@220 {
compatible = "nvidia,tegra186-gpio";
reg-names = "security", "gpio";
reg =
@@ -34,9 +36,24 @@
status = "disabled";
};
 
+   sdhci@340 {
+   compatible = "nvidia,tegra186-sdhci";
+   reg = <0x0 0x0340 0x0 0x200>;
+   resets = <&bpmp TEGRA186_RESET_SDMMC1>;
+   reset-names = "sdmmc";
+   clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
+   clock-names = "sdmmc";
+   interrupts = ;
+   status = "disabled";
+   };
+
sdhci@346 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x0346 0x0 0x200>;
+   resets = <&bpmp TEGRA186_RESET_SDMMC4>;
+   reset-names = "sdmmc";
+   clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
+   clock-names = "sdmmc";
interrupts = ;
status = "disabled";
};
@@ -49,7 +66,7 @@
#mbox-cells = <2>;
};
 
-   gpio@c2f {
+   gpio_aon: gpio@c2f {
compatible = "nvidia,tegra186-gpio-aon";
reg-names = "security", "gpio";
reg =
@@ -62,4 +79,38 @@
interrupt-controller;
#interrupt-cells = <2>;
};
+
+   sysram@3000 {
+   compatible = "nvidia,tegra186-sysram", "mmio-sram";
+   reg = <0x0 0x3000 0x0 0x5>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges = <0 0x0 0x0 0x3000 0x0 0x5>;
+
+   sysram_cpu_bpmp_tx: shmem@4e000 {
+   compatible = "nvidia,tegra186-bpmp-shmem";
+   reg = <0x0 0x4e000 0x0 0x1000>;
+   };
+
+   sysram_cpu_bpmp_rx: shmem@4f000 {
+   compatible = "nvidia,tegra186-bpmp-shmem";
+   reg = <0x0 0x4f000 0x0 0x1000>;
+   };
+   };
+
+   bpmp: bpmp {
+   compatible = "nvidia,tegra186-bpmp";
+   mboxes = <&hsp HSP_MBOX_TYPE_DB HSP_DB_MASTER_BPMP>;
+   /*
+* In theory, these references, and the configuration in the
+* node these reference point at, are board-specific, since
+* they depend on the BCT's memory carve-out setup, the
+* firmware that's actually loaded onto the BPMP, etc. However,
+* in practice, all boards are likely to use identical values.
+*/
+   shmem = <&sysram_cpu_bpmp_tx &sysram_cpu_bpmp_rx>;
+   #clock-cells = <1>;
+   #power-domain-cells = <1>;
+   #reset-cells = <1>;
+   };
 };
-- 
2.9.2

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[U-Boot] [PATCH 2/9] ARM: tegra: add BPMP DT bindings

[Stephen Warren]

From: Stephen Warren 

The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. These bindings dictate how to represent the BPMP in device tree.

Signed-off-by: Stephen Warren 
---
 .../firmware/nvidia,tegra186-bpmp.txt  |  81 ++
 include/dt-bindings/clock/tegra186-clock.h | 940 +
 include/dt-bindings/power/tegra186-powergate.h |  29 +
 include/dt-bindings/reset/tegra186-reset.h | 206 +
 4 files changed, 1256 insertions(+)
 create mode 100644 doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt
 create mode 100644 include/dt-bindings/clock/tegra186-clock.h
 create mode 100644 include/dt-bindings/power/tegra186-powergate.h
 create mode 100644 include/dt-bindings/reset/tegra186-reset.h

diff --git a/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt 
b/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt
new file mode 100644
index ..9a3864f56955
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt
@@ -0,0 +1,81 @@
+NVIDIA Tegra Boot and Power Management Processor (BPMP)
+
+The BPMP is a specific processor in Tegra chip, which is designed for
+booting process handling and offloading the power management, clock
+management, and reset control tasks from the CPU. The binding document
+defines the resources that would be used by the BPMP firmware driver,
+which can create the interprocessor communication (IPC) between the CPU
+and BPMP.
+
+Required properties:
+- name : Should be bpmp
+- compatible
+Array of strings
+One of:
+- "nvidia,tegra186-bpmp"
+- mboxes : The phandle of mailbox controller and the mailbox specifier.
+- shmem : List of the phandle of the TX and RX shared memory area that
+ the IPC between CPU and BPMP is based on.
+- #clock-cells : Should be 1.
+- #power-domain-cells : Should be 1.
+- #reset-cells : Should be 1.
+
+This node is a mailbox consumer. See the following files for details of
+the mailbox subsystem, and the specifiers implemented by the relevant
+provider(s):
+
+- .../mailbox/mailbox.txt
+- .../mailbox/nvidia,tegra186-hsp.txt
+
+This node is a clock, power domain, and reset provider. See the following
+files for general documentation of those features, and the specifiers
+implemented by this node:
+
+- .../clock/clock-bindings.txt
+- 
+- ../power/power_domain.txt
+- 
+- .../reset/reset.txt
+- 
+
+The shared memory bindings for BPMP
+---
+
+The shared memory area for the IPC TX and RX between CPU and BPMP are
+predefined and work on top of sysram, which is an SRAM inside the chip.
+
+See ".../sram/sram.txt" for the bindings.
+
+Example:
+
+hsp_top0: hsp@03c0 {
+   ...
+   #mbox-cells = <2>;
+};
+
+sysram@3000 {
+   compatible = "nvidia,tegra186-sysram", "mmio-sram";
+   reg = <0x0 0x3000 0x0 0x5>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges = <0 0x0 0x0 0x3000 0x0 0x5>;
+
+   cpu_bpmp_tx: bpmp_shmem@4e000 {
+   compatible = "nvidia,tegra186-bpmp-shmem";
+   reg = <0x0 0x4e000 0x0 0x1000>;
+   };
+
+   cpu_bpmp_rx: bpmp_shmem@4f000 {
+   compatible = "nvidia,tegra186-bpmp-shmem";
+   reg = <0x0 0x4f000 0x0 0x1000>;
+   };
+};
+
+bpmp {
+   compatible = "nvidia,tegra186-bpmp";
+   mboxes = <&hsp_top0 HSP_MBOX_TYPE_DB HSP_DB_MASTER_BPMP>;
+   shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;
+   #clock-cells = <1>;
+   #power-domain-cells = <1>;
+   #reset-cells = <1>;
+};
diff --git a/include/dt-bindings/clock/tegra186-clock.h 
b/include/dt-bindings/clock/tegra186-clock.h
new file mode 100644
index ..f73d32098f99
--- /dev/null
+++ b/include/dt-bindings/clock/tegra186-clock.h
@@ -0,0 +1,940 @@
+/** @file */
+
+#ifndef _MACH_T186_CLK_T186_H
+#define _MACH_T186_CLK_T186_H
+
+/**
+ * @defgroup clock_ids Clock Identifiers
+ * @{
+ *   @defgroup extern_input external input clocks
+ *   @{
+ * @def TEGRA186_CLK_OSC
+ * @def TEGRA186_CLK_CLK_32K
+ * @def TEGRA186_CLK_DTV_INPUT
+ * @def TEGRA186_CLK_SOR0_PAD_CLKOUT
+ * @def TEGRA186_CLK_SOR1_PAD_CLKOUT
+ * @def TEGRA186_CLK_I2S1_SYNC_INPUT
+ * @def TEGRA186_CLK_I2S2_SYNC_INPUT
+ * @def TEGRA186_CLK_I2S3_SYNC_INPUT
+ * @def TEGRA186_CLK_I2S4_SYNC_INPUT
+ * @def TEGRA186_CLK_I2S5_SYNC_INPUT
+ * @def TEGRA186_CLK_I2S6_SYNC_INPUT
+ * @def TEGRA186_CLK_SPDIFIN_SYNC_INPUT
+ *   @}
+ *
+ *   @defgroup extern_output external output clocks
+ *   @{
+ * @def TEGRA186_CLK_EXTPERIPH1
+ * @def TEGRA186_CLK_EXTPERIPH2
+ * @def TEGRA186_CLK_EXTPERIPH3
+ * @def TEGRA186_CLK_EXTPERIPH4
+ *   @}
+ *
+ *   @defgroup display_clks display related clocks
+ *   @{
+ * @def TEGRA186_CLK_CEC
+ * @def TEGRA186_CLK_DSIC
+

[U-Boot] [PATCH 5/9] clock: add Tegra186 clock driver

[Stephen Warren]

From: Stephen Warren 

In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually
any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren 
---
 arch/arm/mach-tegra/Kconfig  |  2 +
 drivers/clk/Kconfig  |  1 +
 drivers/clk/Makefile |  2 +
 drivers/clk/tegra/Kconfig|  6 +++
 drivers/clk/tegra/Makefile   |  5 ++
 drivers/clk/tegra/tegra186-clk.c | 99 
 6 files changed, 115 insertions(+)
 create mode 100644 drivers/clk/tegra/Kconfig
 create mode 100644 drivers/clk/tegra/Makefile
 create mode 100644 drivers/clk/tegra/tegra186-clk.c

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index ec2d8ac6a1a3..e8186d515856 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -64,9 +64,11 @@ config TEGRA210
 
 config TEGRA186
bool "Tegra186 family"
+   select CLK
select DM_MAILBOX
select MISC
select TEGRA186_BPMP
+   select TEGRA186_CLOCK
select TEGRA186_GPIO
select TEGRA_ARMV8_COMMON
select TEGRA_HSP
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 6eee8eb369bf..7dd56738b06a 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -20,6 +20,7 @@ config SPL_CLK
  setting up clocks within SPL, and allows the same drivers to be
  used as U-Boot proper.
 
+source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
 source "drivers/clk/exynos/Kconfig"
 
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index f7a88912e06a..37b946cb6bdc 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -11,5 +11,7 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
+
+obj-y += tegra/
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
diff --git a/drivers/clk/tegra/Kconfig b/drivers/clk/tegra/Kconfig
new file mode 100644
index ..659fe022c2af
--- /dev/null
+++ b/drivers/clk/tegra/Kconfig
@@ -0,0 +1,6 @@
+config TEGRA186_CLOCK
+   bool "Enable Tegra186 BPMP-based clock driver"
+   depends on TEGRA186_BPMP
+   help
+ Enable support for manipulating Tegra's on-SoC clocks via IPC
+ requests to the BPMP (Boot and Power Management Processor).
diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile
new file mode 100644
index ..f32998ccc27d
--- /dev/null
+++ b/drivers/clk/tegra/Makefile
@@ -0,0 +1,5 @@
+# Copyright (c) 2016, NVIDIA CORPORATION.
+#
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_TEGRA186_CLOCK) += tegra186-clk.o
diff --git a/drivers/clk/tegra/tegra186-clk.c b/drivers/clk/tegra/tegra186-clk.c
new file mode 100644
index ..fcfe3b47714a
--- /dev/null
+++ b/drivers/clk/tegra/tegra186-clk.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static ulong tegra186_clk_get_rate(struct clk *clk)
+{
+   struct mrq_clk_request req;
+   struct mrq_clk_response resp;
+   int ret;
+
+   debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
+ clk->id);
+
+   req.cmd_and_id = (CMD_CLK_GET_RATE << 24) | clk->id;
+
+   ret = tegra186_bpmp_call(clk->dev->parent, MRQ_CLK,
+&req, sizeof(req), &resp, sizeof(resp));
+   if (ret)
+   return ret;
+
+   return resp.clk_get_rate.rate;
+}
+
+static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate)
+{
+   struct mrq_clk_request req;
+   struct mrq_clk_response resp;
+   int ret;
+
+   debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate,
+ clk->dev, clk->id);
+
+   req.cmd_and_id = (CMD_CLK_SET_RATE << 24) | clk->id;
+   req.clk_set_rate.rate = rate;
+
+   ret = tegra186_bpmp_call(clk->dev->parent, MRQ_CLK,
+&req, sizeof(req), &resp, sizeof(resp));
+   if (ret)
+   return ret;
+
+   return resp.clk_set_rate.rate;
+}
+
+static int tegra186_clk_en_dis(struct clk *clk,
+  enum mrq_reset_commands cmd)
+{
+   struct mrq_clk_request req;
+   struct mrq_clk_response resp;
+
+   req.cmd_and_id = (cmd << 24) | clk->id;
+
+   return tegra186_bpmp_call(clk->dev->parent, MRQ_CLK,
+ &req, sizeof(req), &resp, sizeof(resp));
+}
+
+static int tegra186_clk_enable(struct clk *clk)
+{
+   debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
+ clk->id);
+
+   return te

Re: [U-Boot] [PATCH 0/5] usb: fsl: Add code to use CONFIG_DM_USB

[york sun]

On 07/21/2016 04:45 AM, Marek Vasut wrote:
> On 07/21/2016 10:02 AM, Rajesh Bhagat wrote:
>> Hi All,
>>
>> Any Comments?
>
> York, please check this.

Passed compiling tests on powerpc and arm platforms.

York

>
>>> -Original Message-
>>> From: Rajesh Bhagat [mailto:rajesh.bha...@nxp.com]
>>> Sent: Friday, July 01, 2016 6:52 PM
>>> To: u-boot@lists.denx.de
>>> Cc: ma...@denx.de; york sun ; Sriram Dash
>>> ; Rajesh Bhagat 
>>> Subject: [PATCH 0/5] usb: fsl: Add code to use CONFIG_DM_USB
>>>
>>> Adds code to use driver model for USB EHCI and XHCI FSL driver
>>>
>>> Rajesh Bhagat (5):
>>>   drivers: usb: fsl: Make function for initialization to use in
>>> CONFIG_DM_USB
>>>   usb: ehci: fsl: Add code to use CONFIG_DM_USB
>>>   usb: xhci: fsl: Add code to use CONFIG_DM_USB
>>>   dm: ls1021a: dts: Update USB 3.0 node to support DM USB
>>>   arm: ls1021a: Enable CONFIG_DM_USB in defconfigs
>>>
>>>  arch/arm/dts/ls1021a.dtsi|2 +-
>>>  configs/ls1021aqds_ddr4_nor_defconfig|1 +
>>>  configs/ls1021aqds_ddr4_nor_lpuart_defconfig |1 +
>>>  configs/ls1021aqds_nor_defconfig |1 +
>>>  configs/ls1021aqds_nor_lpuart_defconfig  |1 +
>>>  drivers/usb/host/ehci-fsl.c  |  194 
>>> +
>>>  drivers/usb/host/xhci-fsl.c  |   83 +++-
>>>  7 files changed, 250 insertions(+), 33 deletions(-)
>>>
>>> --
>>> 1.7.7.4
>>
>> Best Regards,
>> Rajesh Bhagat
>>
>
>

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Re: [U-Boot] [PATCH v2 10/10] boston: Introduce support for the MIPS Boston development board

[Daniel Schwierzeck]

Am 27.07.2016 um 16:26 schrieb Paul Burton:
> This patch introduces support for building U-Boot to run on the MIPS
> Boston development board. This is a board built around an FPGA & an
> Intel EG20T Platform Controller Hub, used largely as part of the
> development of new CPUs and their software support. It is essentially
> the successor to the older MIPS Malta board.
> 
> Signed-off-by: Paul Burton 
> 
> ---
> 
> Changes in v2:
> - Use AT instead of $1
> - Use a clock driver instead of patching the DT
> 
>  arch/mips/Kconfig   |  16 +++
>  arch/mips/dts/Makefile  |   1 +
>  arch/mips/dts/img,boston.dts| 216 
> 
>  board/imgtec/boston/Kconfig |  16 +++
>  board/imgtec/boston/MAINTAINERS |   6 +
>  board/imgtec/boston/Makefile|   9 ++
>  board/imgtec/boston/boston-lcd.h|  21 
>  board/imgtec/boston/boston-regs.h   |  47 
>  board/imgtec/boston/checkboard.c|  29 +
>  board/imgtec/boston/ddr.c   |  30 +
>  board/imgtec/boston/lowlevel_init.S |  56 ++
>  configs/boston_defconfig|  41 +++
>  include/configs/boston.h|  68 
>  13 files changed, 556 insertions(+)
>  create mode 100644 arch/mips/dts/img,boston.dts
>  create mode 100644 board/imgtec/boston/Kconfig
>  create mode 100644 board/imgtec/boston/MAINTAINERS
>  create mode 100644 board/imgtec/boston/Makefile
>  create mode 100644 board/imgtec/boston/boston-lcd.h
>  create mode 100644 board/imgtec/boston/boston-regs.h
>  create mode 100644 board/imgtec/boston/checkboard.c
>  create mode 100644 board/imgtec/boston/ddr.c
>  create mode 100644 board/imgtec/boston/lowlevel_init.S
>  create mode 100644 configs/boston_defconfig
>  create mode 100644 include/configs/boston.h
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 21066f0..7ba0ef2 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -73,9 +73,25 @@ config MACH_PIC32
>   select OF_CONTROL
>   select DM
>  
> +config TARGET_BOSTON
> + bool "Support Boston"
> + select DM
> + select DM_SERIAL
> + select OF_CONTROL
> + select MIPS_L1_CACHE_SHIFT_6
> + select SUPPORTS_BIG_ENDIAN
> + select SUPPORTS_LITTLE_ENDIAN
> + select SUPPORTS_CPU_MIPS32_R1
> + select SUPPORTS_CPU_MIPS32_R2
> + select SUPPORTS_CPU_MIPS32_R6
> + select SUPPORTS_CPU_MIPS64_R1
> + select SUPPORTS_CPU_MIPS64_R2
> + select SUPPORTS_CPU_MIPS64_R6
> +
>  endchoice
>  
>  source "board/dbau1x00/Kconfig"
> +source "board/imgtec/boston/Kconfig"
>  source "board/imgtec/malta/Kconfig"
>  source "board/micronas/vct/Kconfig"
>  source "board/pb1x00/Kconfig"
> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
> index 2f04d73..6a5e43e 100644
> --- a/arch/mips/dts/Makefile
> +++ b/arch/mips/dts/Makefile
> @@ -4,6 +4,7 @@
>  
>  dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
>  dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
> +dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
>  dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
>  dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
>  dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
> diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts
> new file mode 100644
> index 000..2fbcb93
> --- /dev/null
> +++ b/arch/mips/dts/img,boston.dts
> @@ -0,0 +1,216 @@
> +/dts-v1/;
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "img,boston";
> +
> + chosen {
> + stdout-path = &uart0;
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "img,mips";
> + reg = <0>;
> + clocks = <&clk_boston BOSTON_CLK_CPU>;
> + };
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x 0x1000>;
> + };
> +
> + gic: interrupt-controller {
> + compatible = "mti,gic";
> +
> + interrupt-controller;
> + #interrupt-cells = <3>;
> +
> + timer {
> + compatible = "mti,gic-timer";
> + interrupts = ;
> + clocks = <&clk_boston BOSTON_CLK_CPU>;
> + };
> + };
> +
> + pci0: pci@1000 {
> + status = "disabled";
> + compatible = "xlnx,axi-pcie-host-1.00.a";
> + device_type = "pci";
> + reg = <0x1000 0x200>;
> +
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> +
> + interrupt-parent = <&gic>;
> + interrupts = ;
> +
> + ranges = <0x0200 0 0x4000
> +   0x4000 0 0x4000>;
> +
> + 

Re: [U-Boot] Stepping down as sunxi u-boot custodian

[Tom Rini]

On Wed, Jul 27, 2016 at 08:10:08PM +0200, Maxime Ripard wrote:
> On Wed, Jul 27, 2016 at 09:31:25PM +0530, Jagan Teki wrote:
> > >> >> FWIW, if anyone is interested in taking over, I'm can help with the
> > >> >> load if needed.
> > >> >
> > >> > I would also be quite happy to see a joint custodian setup similar to
> > >> > how some of the Linux Kernel trees are handled, if that would make
> > >> > things easier as well.
> > >>
> > >> Does this mean same person(s) to handle both the trees?
> > >
> > > The people that agree to work together on it would yes, share access to
> > > the tree and coordinate amongst themselves on how to divide the work up.
> > 
> > Sounds good to me, and also the person who maintain Linux and
> > co-maintain in u-boot and vice-versa so-that both the
> > maintainers/trees should be in-sync, IMHO.
> 
> I'm not sure Tom was saying he wanted the Linux maintainers to become
> U-Boot maintainers and vice-versa. I think he meant he wanted several
> persons to maintain the platform like we're doing in Linux.

Yes, I'd be happy to see something like in Linux.  If the same folks
want to as well, hey, more domain expertise is always better :)

-- 
Tom


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[U-Boot] Please pull: u-boot-video/master

[Anatolij Gustschin]

Hi Tom,

On Mon, 25 Jul 2016 17:46:31 -0400
Tom Rini tr...@konsulko.com wrote:
...
> Hey, good catch.  Anatolij, please fix and re-submit, thanks!

sandbox build fixed now, here is updated pull request:

The following changes since commit 19ce924ff914f315dc2fdf79f357825c513aed6e:

  Prepare v2016.07 (2016-07-11 15:01:01 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-video.git master

for you to fetch changes up to b6de2cd7ee5af536ae67ab5522b69e5c4925f5f2:

  splash: Introduce default_splash_locations (2016-07-26 08:47:37 +0200)


Alexey Brodkin (2):
  splash: Accommodate DM_USB in splash_init_usb()
  splash: Introduce default_splash_locations

Tim Harvey (1):
  video: allow version string to be optional when using LOGO

 README  |3 +++
 common/splash.c |   30 +-
 common/splash_source.c  |6 +-
 drivers/video/cfb_console.c |4 +++-
 include/splash.h|9 +
 5 files changed, 49 insertions(+), 3 deletions(-)

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Re: [U-Boot] [PATCH 1/2] net: fm: fix spi flash probe for using driver model

[york sun]

On 07/20/2016 03:51 AM, Gong Qianyu wrote:
> The current code would always use the speed and mode set by
> CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE. But if using
> SPI driver model it should get the values from DT.
>
> Signed-off-by: Gong Qianyu 
> ---
>  drivers/net/fm/fm.c | 10 ++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
> index 00cdfd4..6308d22 100644
> --- a/drivers/net/fm/fm.c
> +++ b/drivers/net/fm/fm.c
> @@ -371,8 +371,18 @@ int fm_init_common(int index, struct ccsr_fman *reg)
>   void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
>   int ret = 0;
>
> +#ifdef CONFIG_DM_SPI_FLASH
> + struct udevice *new;
> +
> + /* Will get the speed and mode from Device Tree */
> + ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
> +  0, 0, &new);
> +
> + ucode_flash = dev_get_uclass_priv(new);
> +#else
>   ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
>   CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
> +#endif
>   if (!ucode_flash)
>   printf("SF: probe for ucode failed\n");
>   else {
>

Why not just use spi_flash_probe() with speed and mode passed as 0?

York
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Re: [U-Boot] [PATCH 3/4] sun8i: On H3 Use word 1 instead of word 3 from the SID

[Siarhei Siamashka]

Hello Hans,

On Wed, 27 Jul 2016 18:10:34 +0200
Hans de Goede  wrote:

> It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the SID
> are always 0 on H3 making it a poor candidate to use as source for the
> serialnr / mac-address, switch to word1 which seems to be more random.
> 
> Cc: Chen-Yu Tsai 
> Cc: Corentin LABBE 
> Cc: Amit Singh Tomar 
> Signed-off-by: Hans de Goede 
> ---
>  board/sunxi/board.c | 23 ++-
>  1 file changed, 14 insertions(+), 9 deletions(-)
> 
> diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> index ef3fe26..bbe5340 100644
> --- a/board/sunxi/board.c
> +++ b/board/sunxi/board.c
> @@ -620,12 +620,17 @@ static void setup_environment(const void *fdt)
>   uint8_t mac_addr[6];
>   char ethaddr[16];
>   int i, ret;
> +#ifdef CONFIG_MACH_SUN8I_H3
> + const int idx0 = 0, idx1 = 1;
> +#else
> + const int idx0 = 0, idx1 = 3;
> +#endif
>  
>   ret = sunxi_get_sid(sid);
> - if (ret == 0 && sid[0] != 0 && sid[3] != 0) {
> + if (ret == 0 && sid[idx0] != 0 && sid[idx1] != 0) {
>   /* Ensure the NIC specific bytes of the mac are not all 0 */
> - if ((sid[3] & 0xff) == 0)
> - sid[3] |= 0x80;
> + if ((sid[idx1] & 0xff) == 0)
> + sid[idx1] |= 0x80;
>  
>   for (i = 0; i < 4; i++) {
>   sprintf(ethaddr, "ethernet%d", i);
> @@ -642,18 +647,18 @@ static void setup_environment(const void *fdt)
>  
>   /* Non OUI / registered MAC address */
>   mac_addr[0] = (i << 4) | 0x02;
> - mac_addr[1] = (sid[0] >>  0) & 0xff;
> - mac_addr[2] = (sid[3] >> 24) & 0xff;
> - mac_addr[3] = (sid[3] >> 16) & 0xff;
> - mac_addr[4] = (sid[3] >>  8) & 0xff;
> - mac_addr[5] = (sid[3] >>  0) & 0xff;
> + mac_addr[1] = (sid[idx0] >>  0) & 0xff;
> + mac_addr[2] = (sid[idx1] >> 24) & 0xff;
> + mac_addr[3] = (sid[idx1] >> 16) & 0xff;
> + mac_addr[4] = (sid[idx1] >>  8) & 0xff;
> + mac_addr[5] = (sid[idx1] >>  0) & 0xff;
>  
>   eth_setenv_enetaddr(ethaddr, mac_addr);
>   }
>  
>   if (!getenv("serial#")) {
>   snprintf(serial_string, sizeof(serial_string),
> - "%08x%08x", sid[0], sid[3]);
> + "%08x%08x", sid[idx0], sid[idx1]);
>  
>   setenv("serial#", serial_string);
>   }

Is it really a good idea trying to guess which parts of the SID are
sufficiently unique, depending on the SoC generation?

We can calculate some kind of hash (CRC32? SHA256?) over the whole
SID. This will ensure that all the SID bits are accounted for.

Also changing the MAC address generation algorithm is an invasive
change, which is affecting the end users. So IMHO it's best to have
it implemented properly right from the start, rather than evolving
via a trial and error method. What if it turns out that word1
from the SID is actually not sufficiently random on H3? How large
was your sample set?

-- 
Best regards,
Siarhei Siamashka
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Re: [U-Boot] [PATCH 3/4] sun8i: On H3 Use word 1 instead of word 3 from the SID

[Ian Campbell]

On Wed, 2016-07-27 at 18:10 +0200, Hans de Goede wrote:
> It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the
> SID
> are always 0 on H3 making it a poor candidate to use as source for
> the
> serialnr / mac-address, switch to word1 which seems to be more
> random.
> 
> Cc: Chen-Yu Tsai 
> Cc: Corentin LABBE 
> Cc: Amit Singh Tomar 
> Signed-off-by: Hans de Goede 

Acked-by: Ian Campbell 

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Re: [U-Boot] [PATCH 4/4] sunxi: Re-enable h3 emac support

[Ian Campbell]

On Wed, 2016-07-27 at 18:10 +0200, Hans de Goede wrote:
> With the recent bug fixes for the sun8i_emac driver all known issues
> are resolved, so we can re-enable the driver.
> 
> While at it, also enable the emac on the Orange Pi One.
> 
> Cc: Chen-Yu Tsai 
> Cc: Corentin LABBE 
> Cc: Amit Singh Tomar 
> Signed-off-by: Hans de Goede 

Acked-by: Ian Campbell 

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Re: [U-Boot] [PATCH 2/4] sunxi: Ensure that the NIC specific bytes of the mac are not all 0

[Ian Campbell]

On Wed, 2016-07-27 at 18:10 +0200, Hans de Goede wrote:
> On 2 of my H3 boards bytes 13-15 of the SID are all 0 leading to
> the NIC specific bytes of the mac all being 0, which leads to the
> boards not getting an ipv6 address from the dhcp server.
> 
> This commits adds a check to ensure this does not happen.
> 
> Cc: Chen-Yu Tsai 
> Cc: Corentin LABBE 
> Cc: Amit Singh Tomar 
> Signed-off-by: Hans de Goede 

Acked-by: Ian Campbell 

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Re: [U-Boot] [PATCH 1/4] net: sun8i_emac: Fix DMA alignment issues with the rx / tx buffers

[Ian Campbell]

On Wed, 2016-07-27 at 18:10 +0200, Hans de Goede wrote:
> This fixes the following CACHE warnings when using sun8i_emac:
> 
> => dhcp
> BOOTP broadcast 1
> BOOTP broadcast 2
> CACHE: Misaligned operation at range [7bf594a8, 7bf59628]
> BOOTP broadcast 3
> CACHE: Misaligned operation at range [7bf59c90, 7bf59e10]
> CACHE: Misaligned operation at range [7bf5a478, 7bf5a5f8]
> DHCP client bound to address 10.42.43.80 (1009 ms)
> 
> Cc: Chen-Yu Tsai 
> Cc: Corentin LABBE 
> Cc: Amit Singh Tomar 
> Signed-off-by: Hans de Goede 
> ---
>  drivers/net/sun8i_emac.c | 7 ---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
> index 7c088c3..877859c 100644
> --- a/drivers/net/sun8i_emac.c
> +++ b/drivers/net/sun8i_emac.c
> @@ -32,7 +32,8 @@
>  
>  #define CONFIG_TX_DESCR_NUM  32
>  #define CONFIG_RX_DESCR_NUM  32
> -#define CONFIG_ETH_BUFSIZE   2024
> +#define CONFIG_ETH_BUFSIZE   2048
> +#define CONFIG_ETH_RXSIZE2024 /* Note most fit in ETH_BUFSIZE */

s/most/must/?

A comment (perhaps in the commit message rather than the code) as to
how/why RXSIZE and BUFSIZE interact to affect the alignment in the
desired fasion would be useful, since it is non-obvious to me at
least. 

I was about to speculate on the difference of 14 bytes relating to the
Ethernet frame header, but then I realised it's 24 not 14 and deleted
those paragraphs, which I think underscores the need for a comment ;-)

Ian.
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Re: [U-Boot] Stepping down as sunxi u-boot custodian

[Maxime Ripard]

On Wed, Jul 27, 2016 at 09:31:25PM +0530, Jagan Teki wrote:
> >> >> FWIW, if anyone is interested in taking over, I'm can help with the
> >> >> load if needed.
> >> >
> >> > I would also be quite happy to see a joint custodian setup similar to
> >> > how some of the Linux Kernel trees are handled, if that would make
> >> > things easier as well.
> >>
> >> Does this mean same person(s) to handle both the trees?
> >
> > The people that agree to work together on it would yes, share access to
> > the tree and coordinate amongst themselves on how to divide the work up.
> 
> Sounds good to me, and also the person who maintain Linux and
> co-maintain in u-boot and vice-versa so-that both the
> maintainers/trees should be in-sync, IMHO.

I'm not sure Tom was saying he wanted the Linux maintainers to become
U-Boot maintainers and vice-versa. I think he meant he wanted several
persons to maintain the platform like we're doing in Linux.

Maxime

-- 
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Embedded Linux and Kernel engineering
http://free-electrons.com


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Re: [U-Boot] [PATCH v2] splash: Introduce default_splash_locations

[Anatolij Gustschin]

On Tue, 26 Jul 2016 08:52:52 +0200
Anatolij Gustschin ag...@denx.de wrote:

> From: Alexey Brodkin 
> 
> This change introduces default_splash_locations which
> simplifies splash recovery from the first partition of
> USB/MMC/SATA drive.
> 
> Given usual mapping of the first partition of external media for
> basic boot stuff like uImage/zImage, .dtb etc it looks quite
> obvious option to put there splash.bmp as well.
> 
> Signed-off-by: Alexey Brodkin 
> Cc: Nikita Kiryanov 
> Cc: Simon Glass 
> Cc: Jeroen Hofstee 
> Signed-off-by: Anatolij Gustschin 
> ---
> 
> Changes in v2:
>  - add empty splash_source_load() if CONFIG_SPLASH_SOURCE
>is not defined (fixes building sandbox configuration)
> 
>  common/splash.c  |   30 +-
>  include/splash.h |9 +
>  2 files changed, 38 insertions(+), 1 deletion(-)

applied to u-boot-video/master.

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