Re: [U-Boot] [PATCH 05/11] arm: socfpga: fpgamgr: Segregate the FPGA Manager for Stratix 10

[Chin Liang See]

On Mon, 2016-09-05 at 18:00 +0200, Marek Vasut wrote:
> On 08/22/2016 05:02 PM, Chin Liang See wrote:
> > Segregate the FPGA Manager to support both GEN5 SoC and
> > Stratix 10 SoC.
> > 
> > Signed-off-by: Chin Liang See 
> > Cc: Marek Vasut 
> > Cc: Dinh Nguyen 
> > Cc: Ley Foon Tan 
> > ---
> >  arch/arm/mach-socfpga/fpga_manager.c | 4 
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach
> > -socfpga/fpga_manager.c
> > index 43fd2fe..a01e062 100644
> > --- a/arch/arm/mach-socfpga/fpga_manager.c
> > +++ b/arch/arm/mach-socfpga/fpga_manager.c
> > @@ -20,6 +20,8 @@ DECLARE_GLOBAL_DATA_PTR;
> >  /* Timeout count */
> >  #define FPGA_TIMEOUT_CNT   0x100
> >  
> > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > +
> >  static struct socfpga_fpga_manager *fpgamgr_regs =
> > (struct socfpga_fpga_manager
> > *)SOCFPGA_FPGAMGRREGS_ADDRESS;
> >  
> > @@ -76,3 +78,5 @@ int fpgamgr_poll_fpga_ready(void)
> >  
> > return 0;
> >  }
> > +
> > +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
> > 
> Did you just disable the whole file ? If so, then just don't compile
> it
> at all, just add conditional into the Makefile.
> 

Yes, I just realize that :) I shall fix the Makefile instead of this
patch.

Thanks
Chin Liang
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Re: [U-Boot] [PATCH] net: write enetaddr down to hardware on env_callback

[Hannes Schmelzer]

"U-Boot"  schrieb am 06.09.2016 03:54:52:

> Von: Bin Meng 
> An: Joe Hershberger , 
> Kopie: u-boot , Hannes Schmelzer 
, Joe 
> Hershberger 
> Datum: 06.09.2016 03:57
> Betreff: Re: [U-Boot] [PATCH] net: write enetaddr down to hardware on 
env_callback
> Gesendet von: "U-Boot" 
> 
> Hi,
Hi Bin,

> 
> On Fri, Sep 2, 2016 at 9:00 PM, Joe Hershberger
>  wrote:
> > On Fri, Sep 2, 2016 at 7:48 AM, Hannes Schmelzer  
wrote:
> >> If mac-address is changed using "setenv ethaddr " command the new
> >> mac-adress also must be written into the responsible ethernet driver.
> >>
> >> Signed-off-by: Hannes Schmelzer 
> >
> > Acked-by: Joe Hershberger 
> 
> Why is this needed? The MAC address is supposed to be programmed in
> the driver's probe routine.

For example on my custom ZYNQ board.
The Ethernetcontroller within the ZYNQ has no ROM to store his own 
MAC-Address, further no MAC is stored within environment.
So Ethernet gets probed with a "random MAC-Address" if configured.

Later somebody (like me) oder something (my bootscript) runs "setenv 
ethaddr " on the console.
Result is (was before this patch), that all networking infrastructre is 
running this new mac, but hardware is running the old (random) one and 
networking is simple not functional.

ok?

> 
> Regards,
> Bin
cheers,
Hannes


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Re: [U-Boot] [PATCH 04/11] arm: socfpga: clkmgr: Segregate the Clock Manager for Stratix 10

[Chin Liang See]

On Mon, 2016-09-05 at 17:58 +0200, Marek Vasut wrote:
> On 08/22/2016 05:02 PM, Chin Liang See wrote:
> > Segregate the Clock Manager to support both GEN5 SoC and
> > Stratix 10 SoC.
> > 
> > Signed-off-by: Chin Liang See 
> > Cc: Marek Vasut 
> > Cc: Dinh Nguyen 
> > Cc: Ley Foon Tan 
> > ---
> >  arch/arm/mach-socfpga/clock_manager.c | 8 
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach
> > -socfpga/clock_manager.c
> > index aa71636..0d67b3c 100644
> > --- a/arch/arm/mach-socfpga/clock_manager.c
> > +++ b/arch/arm/mach-socfpga/clock_manager.c
> > @@ -10,6 +10,7 @@
> >  
> >  DECLARE_GLOBAL_DATA_PTR;
> >  
> > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> >  static const struct socfpga_clock_manager *clock_manager_base =
> > (struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS;
> >  
> > @@ -446,9 +447,11 @@ unsigned int cm_get_l4_sp_clk_hz(void)
> >  
> > return clock;
> >  }
> > +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
> >  
> >  unsigned int cm_get_mmc_controller_clk_hz(void)
> >  {
> > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > uint32_t reg, clock = 0;
> >  
> > /* identify the source of MMC clock */
> > @@ -475,8 +478,12 @@ unsigned int
> > cm_get_mmc_controller_clk_hz(void)
> > /* further divide by 4 as we have fixed divider at wrapper
> > */
> > clock /= 4;
> > return clock;
> > +#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
> > +   return 2500;
> > +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
> >  }
> >  
> > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> >  unsigned int cm_get_qspi_controller_clk_hz(void)
> 
> Are you sure this won't cause build breakage ? I believe this is
> still
> used by the cadence qspi driver.

That is a good question. As for SOC Virtual Platform, we are not
enabling the QSPI controller.

Thanks
Chin Liang

> 
> >  {
> > uint32_t reg, clock = 0;
> > @@ -556,3 +563,4 @@ U_BOOT_CMD(
> > "display clocks",
> > ""
> >  );
> > +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
> > 
> 
> 
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Re: [U-Boot] [PATCH 1/2] spi: ti_qspi: use 128 bit transfer mode when writing to flash

[Vignesh R]

Hi,

On Sunday 04 September 2016 07:51 PM, Jagan Teki wrote:
> On Thu, Sep 1, 2016 at 1:24 PM, Vignesh R  wrote:
[...]
>> @@ -23,6 +23,8 @@ DECLARE_GLOBAL_DATA_PTR;
>>  #define QSPI_TIMEOUT200
>>  #define QSPI_FCLK  19200
>>  #define QSPI_DRA7XX_FCLK7680
>> +#define QSPI_WLEN_MAX_BITS 128
>> +#define QSPI_WLEN_MAX_BYTES(QSPI_WLEN_MAX_BITS >> 3)
>>  /* clock control */
>>  #define QSPI_CLK_EN BIT(31)
>>  #define QSPI_CLK_DIV_MAX0x
>> @@ -230,13 +232,33 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, 
>> unsigned int bitlen,
>>  #ifdef CONFIG_AM43XX
>> udelay(100);
>>  #endif
>> -   while (words--) {
>> +   while (words) {
>> +   u8 xfer_len = 0;
>> +
>> if (txp) {
>> -   debug("tx cmd %08x dc %08x data %02x\n",
>> - priv->cmd | QSPI_WR_SNGL, priv->dc, *txp);
>> -   writel(*txp++, >base->data);
>> -   writel(priv->cmd | QSPI_WR_SNGL,
>> -  >base->cmd);
>> +   u32 cmd = priv->cmd;
> 
> Don't we require cmd mask for WLEN_MAX_BITS?
> 

Its not quite necessary. priv->cmd always has WLEN field set to 0x7
(8bit) where as for 128bit write WLEN is to be set to 0x7F. Therefore
the logic

+   cmd |= QSPI_WLEN(QSPI_WLEN_MAX_BITS);

will still work w/o needing to clear WLEN field using a mask. But
anyways, to avoid confusion, I will add a mask for WLEN_MAX_BITS.

-- 
Regards
Vignesh
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[U-Boot] [PATCH] net: asix: Fix AX88772B when used with DriverModel

[Joshua Scott]

A previous patch (net: asix: fix operation without eeprom) added a
two-byte shift to the packet buffer when receiving a packet on the
AX88772B.

This shift was not included when the driver was updated to work with
DriverModel. Testing on a Marvell DB-88F6820-ACM showed that the adapter
was not functioning correctly (EHCI timeouts).

This patch brings the two-byte shift to the DriverModel implementation
of ops->recv (asix_eth_recv).

Testing on the same board, we were able to TFTP a file over and confirm
that the crc32 was correct.

Signed-off-by: Joshua Scott 
---
 drivers/usb/eth/asix.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c
index ad083cf..a610ae4 100644
--- a/drivers/usb/eth/asix.c
+++ b/drivers/usb/eth/asix.c
@@ -819,6 +819,11 @@ int asix_eth_recv(struct udevice *dev, int flags, uchar 
**packetp)
}
 
*packetp = ptr + sizeof(packet_len);
+
+   if ((ueth->pusb_dev->descriptor.idVendor == ASIX_USB_VENDOR_ID) &&
+   (ueth->pusb_dev->descriptor.idProduct == AX88772B_USB_PRODUCT_ID))
+   *packetp += 2;
+
return packet_len;
 
 err:
-- 
2.9.0

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[U-Boot] [PATCH] board: ks2: README: Update to add K2G support

[Lokesh Vutla]

Update the README to add support for K2G EVM. Also
- Add steps on how to use MMC boot
- Fix load address when using CCS
- Update build target to u-boot.bin from u-boot-dtb.bin as all ks2
  platforms uses DT.

Signed-off-by: Lokesh Vutla 
---
 board/ti/ks2_evm/README | 40 ++--
 1 file changed, 30 insertions(+), 10 deletions(-)

diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README
index 05baff6..5430c7d 100644
--- a/board/ti/ks2_evm/README
+++ b/board/ti/ks2_evm/README
@@ -20,6 +20,9 @@ The K2E SoC details are available at
 The K2L SoC details are available at
  http://www.ti.com/lit/ds/symlink/tci6630k2l.pdf
 
+The K2G SoC details are available at
+ http://www.ti.com/lit/ds/symlink/66ak2g02.pdf
+
 Board configuration:
 
 
@@ -30,6 +33,7 @@ Some of the peripherals that are configured by U-Boot
 |K2HK  |2  |512MB  |6MB   |4(2)   |2  |3  |3   |
 |K2E   |4  |512MB  |2MB   |8(2)   |2  |3  |3   |
 |K2L   |2  |512MB  |2MB   |4(2)   |4  |3  |3   |
+|K2G   |2  |256MB  |1MB   |1  |1  |1  |1   |
 +--+---+---+---+---+---+---++
 
 There are only 2 eth port installed on the boards.
@@ -47,44 +51,48 @@ Board configuration files:
 include/configs/k2hk_evm.h
 include/configs/k2e_evm.h
 include/configs/k2l_evm.h
+include/configs/k2g_evm.h
 
 As U-Boot is migrating to Kconfig there is also board defconfig files
 configs/k2e_evm_defconfig
 configs/k2hk_evm_defconfig
 configs/k2l_evm_defconfig
+configs/k2g_evm_defconfig
 
 Supported boot modes:
  - SPI NOR boot
  - AEMIF NAND boot
  - UART boot
+ - MMC boot (Only on K2G)
 
 Supported image formats:
- - u-boot-dtb.bin: for loading and running u-boot-dtb.bin through
+ - u-boot.bin: for loading and running u-boot.bin through
Texas Instruments code composure studio (CCS) and for UART boot.
  - u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
- - MLO: gpimage for programming AEMIF NAND flash for NAND boot
+ - MLO: gpimage for programming AEMIF NAND flash for NAND boot, MMC boot.
 
 Build instructions:
 ===
-Examples for k2hk, for k2e and k2l just replace k2hk prefix accordingly.
+Examples for k2hk, for k2e, k2l and k2g just replace k2hk prefix accordingly.
 Don't forget to add ARCH=arm and CROSS_COMPILE.
 
-To build u-boot-dtb.bin, u-boot-spi.gph, MLO:
+To build u-boot.bin, u-boot-spi.gph, MLO:
   >make k2hk_evm_defconfig
   >make
 
 Load and Run U-Boot on keystone EVMs using CCS
 =
 
-Need Code Composer Studio (CCS) installed on a PC to load and run 
u-boot-dtb.bin
+Need Code Composer Studio (CCS) installed on a PC to load and run u-boot.bin
 on EVM. See instructions at below link for installing CCS on a Windows PC.
 http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started#
 Installing_Code_Composer_Studio
-Use u-boot-dtb.bin from the build folder for loading and running U-Boot binary
+Use u-boot.bin from the build folder for loading and running U-Boot binary
 on EVM. Follow instructions at
 K2HK http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup
 K2E  http://processors.wiki.ti.com/index.php/EVMK2E_Hardware_Setup
 K2L  http://processors.wiki.ti.com/index.php/TCIEVMK2L_Hardware_Setup
+K2G  http://processors.wiki.ti.com/index.php/66AK2G02_GP_EVM_Hardware_Setup
 
 to configure SW1 dip switch to use "No Boot/JTAG DSP Little Endian Boot Mode"
 and Power ON the EVM.  Follow instructions to connect serial port of EVM to
@@ -100,13 +108,13 @@ loading the U-Boot binary on the target EVM. Instead do 
the following:-
is connected: Unknown)" at the debug window (This is created once Target
configuration is launched) and select "Connect Target".
 2. Once target connect is successful, choose Tools->Load Memory option from the
-   top level menu. At the Load Memory window, choose the file u-boot-dtb.bin
+   top level menu. At the Load Memory window, choose the file u-boot.bin
through "Browse" button and click "next >" button. In the next window, enter
-   Start address as 0xc001000, choose Type-size "32 bits" and click "Finish"
+   Start address as 0xc00, choose Type-size "32 bits" and click "Finish"
button.
 3. Click View -> Registers from the top level menu to view registers window.
 4. From Registers, window expand "Core Registers" to view PC. Edit PC value
-   to be 0xc001000. From the "Run" top level menu, select "Free Run"
+   to be 0xc00. From the "Run" top level menu, select "Free Run"
 5. The U-Boot prompt is shown at the Tera Term/ Hyper terminal console as
below and type any key to stop autoboot as instructed :=
 
@@ -167,8 +175,20 @@ Load and Run U-Boot on keystone EVMs using UART download
 
 Open BMC and regular UART terminals.
 
-1. On the regular UART port start xmodem transfer of the u-boot-dtb.bin
+1. On the regular UART port 

[U-Boot] [PATCH v5 07/16] ext4: Only update number of of unused inodes if GDT_CSUM feature is set

[Stefan Brüns]

e2fsck warns about "Group descriptor 0 marked uninitialized without
feature set."
The bg_itable_unused field is only defined if FEATURE_RO_COMPAT_GDT_CSUM
is set, and should be set (kept) zero otherwise.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index e8e6c00..e58ba36 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -988,12 +988,13 @@ int ext4fs_get_new_inode_no(void)
if (!journal_buffer || !zero_buffer)
goto fail;
struct ext2_block_group *bgd = (struct ext2_block_group *)fs->gdtable;
+   int has_gdt_chksum = le32_to_cpu(fs->sb->feature_ro_compat) &
+   EXT4_FEATURE_RO_COMPAT_GDT_CSUM ? 1 : 0;
 
if (fs->first_pass_ibmap == 0) {
for (i = 0; i < fs->no_blkgrp; i++) {
if (bgd[i].free_inodes) {
-   if (bgd[i].bg_itable_unused !=
-   bgd[i].free_inodes)
+   if (has_gdt_chksum)
bgd[i].bg_itable_unused =
bgd[i].free_inodes;
if (le16_to_cpu(bgd[i].bg_flags) & 
EXT4_BG_INODE_UNINIT) {
@@ -1014,7 +1015,8 @@ int ext4fs_get_new_inode_no(void)
(i * inodes_per_grp);
fs->first_pass_ibmap++;
ext4fs_bg_free_inodes_dec([i]);
-   ext4fs_bg_itable_unused_dec([i]);
+   if (has_gdt_chksum)
+   ext4fs_bg_itable_unused_dec([i]);
ext4fs_sb_free_inodes_dec(fs->sb);
status = ext4fs_devread(

(lbaint_t)le32_to_cpu(bgd[i].inode_id) *
@@ -1069,12 +1071,10 @@ restart:
goto fail;
prev_inode_bitmap_index = ibmap_idx;
}
-   if (bgd[ibmap_idx].bg_itable_unused !=
-   bgd[ibmap_idx].free_inodes)
+   ext4fs_bg_free_inodes_dec([ibmap_idx]);
+   if (has_gdt_chksum)
bgd[ibmap_idx].bg_itable_unused =
bgd[ibmap_idx].free_inodes;
-   ext4fs_bg_free_inodes_dec([ibmap_idx]);
-   ext4fs_bg_itable_unused_dec([ibmap_idx]);
ext4fs_sb_free_inodes_dec(fs->sb);
goto success;
}
-- 
2.9.3

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[U-Boot] [PATCH v5 10/16] ext4: Avoid out-of-bounds access of block bitmap

[Stefan Brüns]

If the blocksize is 1024, count is initialized with 1. Incrementing count
by 8 will never match (count == fs->blksz * 8), and ptr may be
incremented beyond the buffer end if the bitmap is filled. Add the
startblock offset after the loop.

Remove the second loop, as only the first iteration will be done.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 34 --
 1 file changed, 12 insertions(+), 22 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 8fc7559..72fc4af 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -163,18 +163,12 @@ static int _get_new_inode_no(unsigned char *buffer)
 
 static int _get_new_blk_no(unsigned char *buffer)
 {
-   unsigned char input;
-   int operand, status;
+   int operand;
int count = 0;
-   int j = 0;
+   int i;
unsigned char *ptr = buffer;
struct ext_filesystem *fs = get_fs();
 
-   if (fs->blksz != 1024)
-   count = 0;
-   else
-   count = 1;
-
while (*ptr == 255) {
ptr++;
count += 8;
@@ -182,21 +176,17 @@ static int _get_new_blk_no(unsigned char *buffer)
return -1;
}
 
-   for (j = 0; j < fs->blksz; j++) {
-   input = *ptr;
-   int i = 0;
-   while (i <= 7) {
-   operand = 1 << i;
-   status = input & operand;
-   if (status) {
-   i++;
-   count++;
-   } else {
-   *ptr |= operand;
-   return count;
-   }
+   if (fs->blksz == 1024)
+   count += 1;
+
+   for (i = 0; i <= 7; i++) {
+   operand = 1 << i;
+   if (*ptr & operand) {
+   count++;
+   } else {
+   *ptr |= operand;
+   return count;
}
-   ptr = ptr + 1;
}
 
return -1;
-- 
2.9.3

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[U-Boot] [PATCH v5 15/16] ext4: Correct block number handling, empty block vs. error code

[Stefan Brüns]

read_allocated block may return block number 0, which is just an indicator
a chunk of the file is not backed by a block, i.e. it is sparse.

During file deletions, just continue with the next logical block, for other
operations treat blocknumber <= 0 as an error.

For writes, blocknumber 0 should never happen, as U-Boot always allocates
blocks for the whole file.  Reading already handles this correctly, i.e. the
read buffer is 0-fillled.

Not treating block 0 as sparse block leads to FS corruption, e.g.
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /2.5GB.file 1 '
The 2.5GB.file from the fs test is actually a sparse file.

Signed-off-by: Stefan Brüns 
---
 fs/ext4/ext4_common.c |  6 +++---
 fs/ext4/ext4_write.c  | 11 ++-
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 72fc4af..a78b0b8 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -534,7 +534,7 @@ static int search_dir(struct ext2_inode *parent_inode, char 
*dirname)
/* get the block no allocated to a file */
for (blk_idx = 0; blk_idx < directory_blocks; blk_idx++) {
blknr = read_allocated_block(parent_inode, blk_idx);
-   if (blknr == 0)
+   if (blknr <= 0)
goto fail;
 
/* read the directory block */
@@ -828,7 +828,7 @@ int ext4fs_filename_unlink(char *filename)
/* read the block no allocated to a file */
for (blk_idx = 0; blk_idx < directory_blocks; blk_idx++) {
blknr = read_allocated_block(g_parent_inode, blk_idx);
-   if (blknr == 0)
+   if (blknr <= 0)
break;
inodeno = unlink_filename(filename, blknr);
if (inodeno != -1)
@@ -1590,7 +1590,7 @@ long int read_allocated_block(struct ext2_inode *inode, 
int fileblock)
if (status == 0) {
printf("** SI ext2fs read block (indir 1)"
"failed. **\n");
-   return 0;
+   return -1;
}
ext4fs_indir1_blkno =
le32_to_cpu(inode->b.blocks.
diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index 20005f5..b3ea07b 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -461,6 +461,10 @@ static int ext4fs_delete_file(int inodeno)
/* release data blocks */
for (i = 0; i < no_blocks; i++) {
blknr = read_allocated_block(, i);
+   if (blknr == 0)
+   continue;
+   if (blknr < 0)
+   goto fail;
bg_idx = blknr / blk_per_grp;
if (fs->blksz == 1024) {
remainder = blknr % blk_per_grp;
@@ -718,6 +722,10 @@ void ext4fs_deinit(void)
fs->curr_blkno = 0;
 }
 
+/*
+ * Write data to filesystem blocks. Uses same optimization for
+ * contigous sectors as ext4fs_read_file
+ */
 static int ext4fs_write_file(struct ext2_inode *file_inode,
 int pos, unsigned int len, char *buf)
 {
@@ -744,7 +752,7 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
int blockend = fs->blksz;
int skipfirst = 0;
blknr = read_allocated_block(file_inode, i);
-   if (blknr < 0)
+   if (blknr <= 0)
return -1;
 
blknr = blknr << log2_fs_blocksize;
@@ -910,6 +918,7 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
/* copy the file content into data blocks */
if (ext4fs_write_file(file_inode, 0, sizebytes, (char *)buffer) == -1) {
printf("Error in copying content\n");
+   /* FIXME: Deallocate data blocks */
goto fail;
}
ibmap_idx = parent_inodeno / 
le32_to_cpu(ext4fs_root->sblock.inodes_per_group);
-- 
2.9.3

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[U-Boot] [PATCH v5 14/16] ext4: remove duplicated block release code for extents

[Stefan Brüns]

The data blocks are identical for files using traditional direct/indirect
block allocation scheme and extent trees, thus this code part can be
common. Only the code to deallocate the indirect blocks to record the
used blocks has to be seperate, respectively the code to release extent
tree index blocks.

Actually the code to release the extent tree index blocks is still missing,
but at least add a FIXME at the appropriate place.

Signed-off-by: Stefan Brüns 
---
 fs/ext4/ext4_write.c | 110 ---
 1 file changed, 33 insertions(+), 77 deletions(-)

diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index 5b518ed..20005f5 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -447,92 +447,48 @@ static int ext4fs_delete_file(int inodeno)
no_blocks++;
 
if (le32_to_cpu(inode.flags) & EXT4_EXTENTS_FL) {
-   struct ext2fs_node *node_inode =
-   zalloc(sizeof(struct ext2fs_node));
-   if (!node_inode)
-   goto fail;
-   node_inode->data = ext4fs_root;
-   node_inode->ino = inodeno;
-   node_inode->inode_read = 0;
-   memcpy(&(node_inode->inode), , sizeof(struct ext2_inode));
-
-   for (i = 0; i < no_blocks; i++) {
-   blknr = read_allocated_block(&(node_inode->inode), i);
-   bg_idx = blknr / blk_per_grp;
-   if (fs->blksz == 1024) {
-   remainder = blknr % blk_per_grp;
-   if (!remainder)
-   bg_idx--;
-   }
-   ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx],
-   bg_idx);
-   debug("EXT4_EXTENTS Block releasing %ld: %d\n",
- blknr, bg_idx);
-
-   ext4fs_bg_free_blocks_inc([bg_idx]);
-   ext4fs_sb_free_blocks_inc(fs->sb);
-
-   /* journal backup */
-   if (prev_bg_bmap_idx != bg_idx) {
-   status =
-   ext4fs_devread(
-  
(lbaint_t)le32_to_cpu(bgd[bg_idx].block_id) *
-  fs->sect_perblk, 0,
-  fs->blksz, journal_buffer);
-   if (status == 0)
-   goto fail;
-   if (ext4fs_log_journal(journal_buffer,
-   
le32_to_cpu(bgd[bg_idx].block_id)))
-   goto fail;
-   prev_bg_bmap_idx = bg_idx;
-   }
-   }
-   if (node_inode) {
-   free(node_inode);
-   node_inode = NULL;
-   }
+   /* FIXME delete extent index blocks, i.e. eh_depth >= 1 */
+   struct ext4_extent_header *eh =
+   (struct ext4_extent_header *)
+   inode.b.blocks.dir_blocks;
+   debug("del: dep=%d entries=%d\n", eh->eh_depth, eh->eh_entries);
} else {
-
delete_single_indirect_block();
delete_double_indirect_block();
delete_triple_indirect_block();
+   }
 
-   /* read the block no allocated to a file */
-   no_blocks = le32_to_cpu(inode.size) / fs->blksz;
-   if (le32_to_cpu(inode.size) % fs->blksz)
-   no_blocks++;
-   for (i = 0; i < no_blocks; i++) {
-   blknr = read_allocated_block(, i);
-   bg_idx = blknr / blk_per_grp;
-   if (fs->blksz == 1024) {
-   remainder = blknr % blk_per_grp;
-   if (!remainder)
-   bg_idx--;
-   }
-   ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx],
-   bg_idx);
-   debug("ActualB releasing %ld: %d\n", blknr, bg_idx);
+   /* release data blocks */
+   for (i = 0; i < no_blocks; i++) {
+   blknr = read_allocated_block(, i);
+   bg_idx = blknr / blk_per_grp;
+   if (fs->blksz == 1024) {
+   remainder = blknr % blk_per_grp;
+   if (!remainder)
+   bg_idx--;
+   }
+   ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx],
+   bg_idx);
+   debug("EXT4 Block releasing %ld: %d\n", blknr, bg_idx);
 
- 

[U-Boot] [PATCH v5 03/16] ext4: Do not crash when trying to grow a directory using extents

[Stefan Brüns]

The following command crashes u-boot:
./sandbox/u-boot -c 'i=0; host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
  while test $i -lt 200 ; do echo $i; setexpr i $i + 1;
  ext4write host 0 0 /foobar${i} 0; done'

Previously, the code updated the direct_block even for extents, and
fortunately crashed before pushing garbage to the disk.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 5799bee..dff03fe 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -453,8 +453,13 @@ restart:
sizeof(struct ext2_dirent) + padding_factor;
if ((fs->blksz - totalbytes - last_entry_dirlen) <
new_entry_byte_reqd) {
-   printf("1st Block Full:Allocate new block\n");
+   printf("Last Block Full:Allocate new block\n");
 
+   if (le32_to_cpu(g_parent_inode->flags) &
+   EXT4_EXTENTS_FL) {
+   printf("Directory uses extents\n");
+   goto fail;
+   }
if (direct_blk_idx == INDIRECT_BLOCKS - 1) {
printf("Directory exceeds limit\n");
goto fail;
-- 
2.9.3

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[U-Boot] [PATCH v5 05/16] ext4: Avoid corruption of directories with hash tree indexes

[Stefan Brüns]

While directories can be read using the old linear scan method, adding a
new file would require updating the index tree (alternatively, the whole
tree could be removed).

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_write.c | 5 +
 include/ext4fs.h | 1 +
 2 files changed, 6 insertions(+)

diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index 42abd8d..50c8415 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -881,6 +881,11 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
goto fail;
if (ext4fs_iget(parent_inodeno, g_parent_inode))
goto fail;
+   /* do not mess up a directory using hash trees */
+   if (le32_to_cpu(g_parent_inode->flags) & EXT4_INDEX_FL) {
+   printf("hash tree directory\n");
+   goto fail;
+   }
/* check if the filename is already present in root */
existing_file_inodeno = ext4fs_filename_unlink(filename);
if (existing_file_inodeno != -1) {
diff --git a/include/ext4fs.h b/include/ext4fs.h
index e3f6216..6e31c73 100644
--- a/include/ext4fs.h
+++ b/include/ext4fs.h
@@ -28,6 +28,7 @@
 #define __EXT4__
 #include 
 
+#define EXT4_INDEX_FL  0x1000 /* Inode uses hash tree index */
 #define EXT4_EXTENTS_FL0x0008 /* Inode uses extents */
 #define EXT4_EXT_MAGIC 0xf30a
 #define EXT4_FEATURE_RO_COMPAT_GDT_CSUM0x0010
-- 
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[U-Boot] [PATCH v5 13/16] ext4: initialize full inode for inodes bigger than 128 bytes

[Stefan Brüns]

Make sure the the extra_isize field (offset 128) is initialized to 0, to
mark any extra data as invalid.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_write.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index 81a750b..5b518ed 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -560,7 +560,7 @@ static int ext4fs_delete_file(int inodeno)
 
read_buffer = read_buffer + blkoff;
inode_buffer = (struct ext2_inode *)read_buffer;
-   memset(inode_buffer, '\0', sizeof(struct ext2_inode));
+   memset(inode_buffer, '\0', fs->inodesz);
 
/* write the inode to original position in inode table */
if (ext4fs_put_metadata(start_block_address, blkno))
@@ -866,7 +866,7 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
ALLOC_CACHE_ALIGN_BUFFER(char, filename, 256);
memset(filename, 0x00, 256);
 
-   g_parent_inode = zalloc(sizeof(struct ext2_inode));
+   g_parent_inode = zalloc(fs->inodesz);
if (!g_parent_inode)
goto fail;
 
@@ -969,8 +969,7 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
if (ext4fs_log_journal(temp_ptr, parent_itable_blkno))
goto fail;
 
-   memcpy(temp_ptr + blkoff, g_parent_inode,
-   sizeof(struct ext2_inode));
+   memcpy(temp_ptr + blkoff, g_parent_inode, fs->inodesz);
if (ext4fs_put_metadata(temp_ptr, parent_itable_blkno))
goto fail;
} else {
@@ -978,8 +977,7 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
 * If parent and child fall in same inode table block
 * both should be kept in 1 buffer
 */
-   memcpy(temp_ptr + blkoff, g_parent_inode,
-  sizeof(struct ext2_inode));
+   memcpy(temp_ptr + blkoff, g_parent_inode, fs->inodesz);
gd_index--;
if (ext4fs_put_metadata(temp_ptr, itable_blkno))
goto fail;
-- 
2.9.3

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[U-Boot] [PATCH v5 04/16] ext4: Scan all directory blocks for space when inserting a new entry

[Stefan Brüns]

Previously, only the last directory block was scanned for available space.
Instead, scan all blocks back to front, and if no sufficient space is
found, eventually append a new block.
Blocks are only appended if the directory does not use extents or the new
block would require insertion of indirect blocks, as the old code does.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 74 +--
 1 file changed, 30 insertions(+), 44 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index dff03fe..062ea93 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -370,14 +370,10 @@ int ext4fs_update_parent_dentry(char *filename, int 
file_type)
 {
unsigned int *zero_buffer = NULL;
char *root_first_block_buffer = NULL;
-   int direct_blk_idx;
-   long int root_blknr;
+   int blk_idx;
long int first_block_no_of_root = 0;
-   long int previous_blknr = -1;
int totalbytes = 0;
-   short int padding_factor = 0;
unsigned int new_entry_byte_reqd;
-   unsigned int last_entry_dirlen;
int sizeof_void_space = 0;
int templength = 0;
int inodeno = -1;
@@ -389,6 +385,7 @@ int ext4fs_update_parent_dentry(char *filename, int 
file_type)
uint32_t new_blk_no;
uint32_t new_size;
uint32_t new_blockcnt;
+   uint32_t directory_blocks;
 
zero_buffer = zalloc(fs->blksz);
if (!zero_buffer) {
@@ -401,19 +398,18 @@ int ext4fs_update_parent_dentry(char *filename, int 
file_type)
printf("No Memory\n");
return -1;
}
+   new_entry_byte_reqd = ROUND(strlen(filename) +
+   sizeof(struct ext2_dirent), 4);
 restart:
+   directory_blocks = le32_to_cpu(g_parent_inode->size) >>
+   LOG2_BLOCK_SIZE(ext4fs_root);
+   blk_idx = directory_blocks - 1;
 
+restart_read:
/* read the block no allocated to a file */
-   for (direct_blk_idx = 0; direct_blk_idx < INDIRECT_BLOCKS;
-direct_blk_idx++) {
-   root_blknr = read_allocated_block(g_parent_inode,
- direct_blk_idx);
-   if (root_blknr == 0) {
-   first_block_no_of_root = previous_blknr;
-   break;
-   }
-   previous_blknr = root_blknr;
-   }
+   first_block_no_of_root = read_allocated_block(g_parent_inode, blk_idx);
+   if (first_block_no_of_root <= 0)
+   goto fail;
 
status = ext4fs_devread((lbaint_t)first_block_no_of_root
* fs->sect_perblk,
@@ -425,42 +421,33 @@ restart:
goto fail;
dir = (struct ext2_dirent *)root_first_block_buffer;
totalbytes = 0;
+
while (le16_to_cpu(dir->direntlen) > 0) {
-   /*
-* blocksize-totalbytes because last directory length
-* i.e. dir->direntlen is free availble space in the
-* block that means  it is a last entry of directory
-* entry
-*/
+   unsigned short used_len = ROUND(dir->namelen +
+   sizeof(struct ext2_dirent), 4);
 
-   /* traversing the each directory entry */
+   /* last entry of block */
if (fs->blksz - totalbytes == le16_to_cpu(dir->direntlen)) {
-   if (strlen(filename) % 4 != 0)
-   padding_factor = 4 - (strlen(filename) % 4);
-
-   new_entry_byte_reqd = strlen(filename) +
-   sizeof(struct ext2_dirent) + padding_factor;
-   padding_factor = 0;
-   /*
-* update last directory entry length to its
-* length because we are creating new directory
-* entry
-*/
-   if (dir->namelen % 4 != 0)
-   padding_factor = 4 - (dir->namelen % 4);
 
-   last_entry_dirlen = dir->namelen +
-   sizeof(struct ext2_dirent) + padding_factor;
-   if ((fs->blksz - totalbytes - last_entry_dirlen) <
-   new_entry_byte_reqd) {
-   printf("Last Block Full:Allocate new block\n");
+   /* check if new entry fits */
+   if ((used_len + new_entry_byte_reqd) <=
+   le16_to_cpu(dir->direntlen)) {
+   dir->direntlen = cpu_to_le16(used_len);
+   break;
+   } else {
+   if (blk_idx > 0) {
+   printf("Block 

[U-Boot] [PATCH v5 16/16] ext4: Fix memory leak of journal buffer if block is updated multiple times

[Stefan Brüns]

If the same block is updated multiple times in a row during a single
file system operation, gd_index is decremented to use the same journal
entry again. Avoid loosing the already allocated buffer.

Signed-off-by: Stefan Brüns 
---
 fs/ext4/ext4_journal.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c
index cf14049..5a25be4 100644
--- a/fs/ext4/ext4_journal.c
+++ b/fs/ext4/ext4_journal.c
@@ -190,7 +190,11 @@ int ext4fs_put_metadata(char *metadata_buffer, uint32_t 
blknr)
printf("Invalid input arguments %s\n", __func__);
return -EINVAL;
}
-   dirty_block_ptr[gd_index]->buf = zalloc(fs->blksz);
+   if (dirty_block_ptr[gd_index]->buf)
+   assert(dirty_block_ptr[gd_index]->blknr == blknr);
+   else
+   dirty_block_ptr[gd_index]->buf = zalloc(fs->blksz);
+
if (!dirty_block_ptr[gd_index]->buf)
return -ENOMEM;
memcpy(dirty_block_ptr[gd_index]->buf, metadata_buffer, fs->blksz);
-- 
2.9.3

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[U-Boot] [PATCH v5 00/16] Fix several possible crashes/corruptions in ext4

[Stefan Brüns]

The U-Boot ext4 support has some bugs which either cause U-Boot crashes
or lead to filesystem corruption.

This series goes on top of the endian patch series by Michael Walle.
It has been rebased against v4 of the series.

The first 13 patches have already been reviewed, last 3 patches are
new. Revieved-by has been added as appropriate.


Stefan Brüns (16):
  ext4: fix possible crash on directory traversal, ignore deleted entries
  ext4: propagate error if creation of directory entry fails
  ext4: Do not crash when trying to grow a directory using extents
  ext4: Scan all directory blocks for space when inserting a new entry
  ext4: Avoid corruption of directories with hash tree indexes
  ext4: Scan all directory blocks when looking up an entry
  ext4: Only update number of of unused inodes if GDT_CSUM feature is set
  ext4: Do not clear zalloc'ed buffers a second time
  ext4: After completely filled group, scan next group from the beginning
  ext4: Avoid out-of-bounds access of block bitmap
  ext4: Fix memory leak in case of failure
  ext4: Use correct value for inode size even on revision 0 filesystems
  ext4: initialize full inode for inodes bigger than 128 bytes
  ext4: remove duplicated block release code for extents
  ext4: Correct block number handling, empty block vs. error code
  ext4: Fix memory leak of journal buffer if block is updated multiple times

 fs/ext4/ext4_common.c  | 288 +
 fs/ext4/ext4_common.h  |   2 +-
 fs/ext4/ext4_journal.c |   6 +-
 fs/ext4/ext4_write.c   | 147 ++---
 include/ext4fs.h   |   3 +-
 include/ext_common.h   |   2 -
 6 files changed, 190 insertions(+), 258 deletions(-)

v2:
  Updated:
  ext4: fix possible crash on directory traversal, ignore deleted entries
- Fix bad filename compare on delete, used substring only

v3:
  Added:
  ext4: Scan all directory blocks for space when inserting a new entry
  ext4: Only update number of of unused inodes if GDT_CSUM feature is set
  ext4: Do not clear zalloc'ed buffers a second time
  ext4: After completely filled group, scan next group from the beginning
  ext4: Avoid out-of-bounds access of block bitmap
  ext4: Fix memory leak in case of failure
  ext4: Use correct value for inode size even on revision 0 filesystems
  ext4: initialize full inode for inodes bigger than 128 bytes
  ext4: remove duplicated block release code for extents

  Updated:
  ext4: Scan all directory blocks when looking up an entry
- use parent_inode instead of g_parent_inode when determining directory size

v4:
  Updated:
  ext4: Scan all directory blocks when looking up an entry
- fix directory scan, direntname was advanced by offset instead of direntlen
  Problem reported by Thomas Schaefer 

v5:
  Added:
  ext4: remove duplicated block release code for extents
  ext4: Correct block number handling, empty block vs. error code
  ext4: Fix memory leak of journal buffer if block is updated multiple times

  Updated:
  ext4: initialize full inode for inodes bigger than 128 bytes
- fix memory corruption if sizeof(struct ext2_inode) != fs->inodesz
  Problem reported by Thomas Schaefer 

-- 
2.9.3

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[U-Boot] [PATCH v5 09/16] ext4: After completely filled group, scan next group from the beginning

[Stefan Brüns]

The last free block of a block group may be in its middle. After it has
been allocated, the next block group should be scanned from its beginning.

The following command triggers the bad behaviour (on a blocksize 1024 fs):

./sandbox/u-boot -c 'i=0; host bind 0 ./disk.raw ;
while test $i -lt 260 ; do echo $i; setexpr i $i + 1;
ext4write host 0:2 0 /X${i} 0x1450; done ;
ext4write host 0:2 0 /X240 0x2000 ; '

When 'X240' is extended from 5200 byte to 8192 byte, the new blocks should
start from the first free block (8811), but it uses the blocks 8098-8103
and 16296-16297 -- 8103 + 1 + 8192 = 16296. This can be shown with
debugfs, commands 'ffb' and 'stat X240'.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 539d622..8fc7559 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -903,8 +903,8 @@ uint32_t ext4fs_get_new_blk_no(void)
 
goto fail;
} else {
-restart:
fs->curr_blkno++;
+restart:
/* get the blockbitmap index respective to blockno */
bg_idx = fs->curr_blkno / blk_per_grp;
if (fs->blksz == 1024) {
@@ -922,8 +922,9 @@ restart:
 
if (bgd[bg_idx].free_blocks == 0) {
debug("block group %u is full. Skipping\n", bg_idx);
-   fs->curr_blkno = fs->curr_blkno + blk_per_grp;
-   fs->curr_blkno--;
+   fs->curr_blkno = (bg_idx + 1) * blk_per_grp;
+   if (fs->blksz == 1024)
+   fs->curr_blkno += 1;
goto restart;
}
 
@@ -940,6 +941,7 @@ restart:
   bg_idx) != 0) {
debug("going for restart for the block no %ld %u\n",
  fs->curr_blkno, bg_idx);
+   fs->curr_blkno++;
goto restart;
}
 
-- 
2.9.3

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[U-Boot] [PATCH v5 11/16] ext4: Fix memory leak in case of failure

[Stefan Brüns]

temp_ptr should always be freed, even if the function is left via
goto fail.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_write.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index 50c8415..5e208ef 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -974,7 +974,6 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
sizeof(struct ext2_inode));
if (ext4fs_put_metadata(temp_ptr, parent_itable_blkno))
goto fail;
-   free(temp_ptr);
} else {
/*
 * If parent and child fall in same inode table block
@@ -985,7 +984,6 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
gd_index--;
if (ext4fs_put_metadata(temp_ptr, itable_blkno))
goto fail;
-   free(temp_ptr);
}
ext4fs_update();
ext4fs_deinit();
@@ -996,6 +994,7 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
fs->curr_inode_no = 0;
free(inode_buffer);
free(g_parent_inode);
+   free(temp_ptr);
g_parent_inode = NULL;
 
return 0;
@@ -1003,6 +1002,7 @@ fail:
ext4fs_deinit();
free(inode_buffer);
free(g_parent_inode);
+   free(temp_ptr);
g_parent_inode = NULL;
 
return -1;
-- 
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[U-Boot] [PATCH v5 08/16] ext4: Do not clear zalloc'ed buffers a second time

[Stefan Brüns]

zero_buffer is never written, thus clearing it is pointless.
journal_buffer is completely initialized by ext4fs_devread (or in case
of failure, not used).

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index e58ba36..539d622 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -929,7 +929,6 @@ restart:
 
if (le16_to_cpu(bgd[bg_idx].bg_flags) & EXT4_BG_BLOCK_UNINIT) {
uint16_t new_flags;
-   memset(zero_buffer, '\0', fs->blksz);
put_ext4((uint64_t)le32_to_cpu(bgd[bg_idx].block_id) * 
fs->blksz,
 zero_buffer, fs->blksz);
memcpy(fs->blk_bmaps[bg_idx], zero_buffer, fs->blksz);
@@ -946,7 +945,6 @@ restart:
 
/* journal backup */
if (prev_bg_bitmap_index != bg_idx) {
-   memset(journal_buffer, '\0', fs->blksz);
status = ext4fs_devread(

(lbaint_t)le32_to_cpu(bgd[bg_idx].block_id)
* fs->sect_perblk,
@@ -1040,7 +1038,6 @@ restart:
ibmap_idx = fs->curr_inode_no / inodes_per_grp;
if (le16_to_cpu(bgd[ibmap_idx].bg_flags) & 
EXT4_BG_INODE_UNINIT) {
int new_flags;
-   memset(zero_buffer, '\0', fs->blksz);
put_ext4((uint64_t)le32_to_cpu(bgd[ibmap_idx].inode_id) 
* fs->blksz,
 zero_buffer, fs->blksz);
new_flags = le16_to_cpu(bgd[ibmap_idx].bg_flags) & 
~EXT4_BG_INODE_UNINIT;
-- 
2.9.3

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[U-Boot] [PATCH v5 06/16] ext4: Scan all directory blocks when looking up an entry

[Stefan Brüns]

Scanning only the direct blocks of the directory file may falsely report
an existing file as nonexisting, and worse can also lead to creation
of a duplicate entry on file creation.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 84 ---
 1 file changed, 40 insertions(+), 44 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 062ea93..e8e6c00 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -525,64 +525,57 @@ static int search_dir(struct ext2_inode *parent_inode, 
char *dirname)
 {
int status;
int inodeno = 0;
-   int totalbytes;
-   int templength;
-   int direct_blk_idx;
+   int offset;
+   int blk_idx;
long int blknr;
-   char *ptr = NULL;
-   unsigned char *block_buffer = NULL;
+   char *block_buffer = NULL;
struct ext2_dirent *dir = NULL;
struct ext_filesystem *fs = get_fs();
+   uint32_t directory_blocks;
+   char *direntname;
 
-   /* read the block no allocated to a file */
-   for (direct_blk_idx = 0; direct_blk_idx < INDIRECT_BLOCKS;
-   direct_blk_idx++) {
-   blknr = read_allocated_block(parent_inode, direct_blk_idx);
-   if (blknr == 0)
-   goto fail;
+   directory_blocks = le32_to_cpu(parent_inode->size) >>
+   LOG2_BLOCK_SIZE(ext4fs_root);
 
-   /* read the blocks of parent inode */
-   block_buffer = zalloc(fs->blksz);
-   if (!block_buffer)
+   block_buffer = zalloc(fs->blksz);
+   if (!block_buffer)
+   goto fail;
+
+   /* get the block no allocated to a file */
+   for (blk_idx = 0; blk_idx < directory_blocks; blk_idx++) {
+   blknr = read_allocated_block(parent_inode, blk_idx);
+   if (blknr == 0)
goto fail;
 
+   /* read the directory block */
status = ext4fs_devread((lbaint_t)blknr * fs->sect_perblk,
0, fs->blksz, (char *)block_buffer);
if (status == 0)
goto fail;
 
-   dir = (struct ext2_dirent *)block_buffer;
-   ptr = (char *)dir;
-   totalbytes = 0;
-   while (le16_to_cpu(dir->direntlen) >= 0) {
-   /*
-* blocksize-totalbytes because last directory
-* length i.e.,*dir->direntlen is free availble
-* space in the block that means
-* it is a last entry of directory entry
-*/
-   if (dir->inode && (strlen(dirname) == dir->namelen)) {
-   if (strncmp(dirname, ptr + sizeof(struct 
ext2_dirent), dir->namelen) == 0) {
-   inodeno = le32_to_cpu(dir->inode);
-   break;
-   }
-   }
+   offset = 0;
+   do {
+   dir = (struct ext2_dirent *)(block_buffer + offset);
+   direntname = (char*)(dir) + sizeof(struct ext2_dirent);
 
-   if (fs->blksz - totalbytes == 
le16_to_cpu(dir->direntlen))
+   int direntlen = le16_to_cpu(dir->direntlen);
+   if (direntlen < sizeof(struct ext2_dirent))
break;
 
-   /* traversing the each directory entry */
-   templength = le16_to_cpu(dir->direntlen);
-   totalbytes = totalbytes + templength;
-   dir = (struct ext2_dirent *)((char *)dir + templength);
-   ptr = (char *)dir;
-   }
+   if (dir->inode && (strlen(dirname) == dir->namelen) &&
+   (strncmp(dirname, direntname, dir->namelen) == 0)) {
+   inodeno = le32_to_cpu(dir->inode);
+   break;
+   }
+
+   offset += direntlen;
 
-   free(block_buffer);
-   block_buffer = NULL;
+   } while (offset < fs->blksz);
 
-   if (inodeno > 0)
+   if (inodeno > 0) {
+   free(block_buffer);
return inodeno;
+   }
}
 
 fail:
@@ -834,14 +827,17 @@ fail:
 
 int ext4fs_filename_unlink(char *filename)
 {
-   short direct_blk_idx = 0;
+   int blk_idx;
long int blknr = -1;
int inodeno = -1;
+   uint32_t directory_blocks;
+
+   directory_blocks = le32_to_cpu(g_parent_inode->size) >>
+   LOG2_BLOCK_SIZE(ext4fs_root);
 
/* read the block no allocated to a file 

[U-Boot] [PATCH v5 01/16] ext4: fix possible crash on directory traversal, ignore deleted entries

[Stefan Brüns]

The following command triggers a segfault in search_dir:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /./foo 0x10'

The following command triggers a segfault in check_filename:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /. 0x10'

"." is the first entry in the directory, thus previous_dir is NULL. The
whole previous_dir block in search_dir seems to be a bad copy from
check_filename(...). As the changed data is not written to disk, the
statement is mostly harmless, save the possible NULL-ptr reference.

Typically a file is unlinked by extending the direntlen of the previous
entry. If the entry is the first entry in the directory block, it is
invalidated by setting inode=0.

The inode==0 case is hard to trigger without crafted filesystems. It only
hits if the first entry in a directory block is deleted and later a lookup
for the entry (by name) is done.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 58 +++
 fs/ext4/ext4_write.c  |  2 +-
 include/ext4fs.h  |  2 +-
 3 files changed, 23 insertions(+), 39 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index f3235eb..40203cf 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -533,16 +533,14 @@ fail:
 static int search_dir(struct ext2_inode *parent_inode, char *dirname)
 {
int status;
-   int inodeno;
+   int inodeno = 0;
int totalbytes;
int templength;
int direct_blk_idx;
long int blknr;
-   int found = 0;
char *ptr = NULL;
unsigned char *block_buffer = NULL;
struct ext2_dirent *dir = NULL;
-   struct ext2_dirent *previous_dir = NULL;
struct ext_filesystem *fs = get_fs();
 
/* read the block no allocated to a file */
@@ -552,7 +550,7 @@ static int search_dir(struct ext2_inode *parent_inode, char 
*dirname)
if (blknr == 0)
goto fail;
 
-   /* read the blocks of parenet inode */
+   /* read the blocks of parent inode */
block_buffer = zalloc(fs->blksz);
if (!block_buffer)
goto fail;
@@ -572,15 +570,9 @@ static int search_dir(struct ext2_inode *parent_inode, 
char *dirname)
 * space in the block that means
 * it is a last entry of directory entry
 */
-   if (strlen(dirname) == dir->namelen) {
+   if (dir->inode && (strlen(dirname) == dir->namelen)) {
if (strncmp(dirname, ptr + sizeof(struct 
ext2_dirent), dir->namelen) == 0) {
-   uint16_t new_len;
-   new_len = 
le16_to_cpu(previous_dir->direntlen);
-   new_len += le16_to_cpu(dir->direntlen);
-   previous_dir->direntlen = 
cpu_to_le16(new_len);
inodeno = le32_to_cpu(dir->inode);
-   dir->inode = 0;
-   found = 1;
break;
}
}
@@ -591,19 +583,15 @@ static int search_dir(struct ext2_inode *parent_inode, 
char *dirname)
/* traversing the each directory entry */
templength = le16_to_cpu(dir->direntlen);
totalbytes = totalbytes + templength;
-   previous_dir = dir;
dir = (struct ext2_dirent *)((char *)dir + templength);
ptr = (char *)dir;
}
 
-   if (found == 1) {
-   free(block_buffer);
-   block_buffer = NULL;
-   return inodeno;
-   }
-
free(block_buffer);
block_buffer = NULL;
+
+   if (inodeno > 0)
+   return inodeno;
}
 
 fail:
@@ -779,15 +767,13 @@ fail:
return result_inode_no;
 }
 
-static int check_filename(char *filename, unsigned int blknr)
+static int unlink_filename(char *filename, unsigned int blknr)
 {
-   unsigned int first_block_no_of_root;
int totalbytes = 0;
int templength = 0;
int status, inodeno;
int found = 0;
char *root_first_block_buffer = NULL;
-   char *root_first_block_addr = NULL;
struct ext2_dirent *dir = NULL;
struct ext2_dirent *previous_dir = NULL;
char *ptr = NULL;
@@ -795,18 +781,15 @@ static int check_filename(char *filename, unsigned int 
blknr)
int ret = -1;
 
/* get the first block of root */
-   

[U-Boot] [PATCH v5 12/16] ext4: Use correct value for inode size even on revision 0 filesystems

[Stefan Brüns]

fs->inodesz is already correctly (i.e. dependent on fs revision)
initialized in ext4fs_mount.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_write.c | 1 -
 include/ext_common.h | 2 --
 2 files changed, 3 deletions(-)

diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index 5e208ef..81a750b 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -609,7 +609,6 @@ int ext4fs_init(void)
 
/* populate fs */
fs->blksz = EXT2_BLOCK_SIZE(ext4fs_root);
-   fs->inodesz = INODE_SIZE_FILESYSTEM(ext4fs_root);
fs->sect_perblk = fs->blksz >> fs->dev_desc->log2blksz;
 
/* get the superblock */
diff --git a/include/ext_common.h b/include/ext_common.h
index 4cd2aa7..25216ca 100644
--- a/include/ext_common.h
+++ b/include/ext_common.h
@@ -52,8 +52,6 @@
 #define LOG2_BLOCK_SIZE(data) (le32_to_cpu\
(data->sblock.log2_block_size) \
+ EXT2_MIN_BLOCK_LOG_SIZE)
-#define INODE_SIZE_FILESYSTEM(data)(le16_to_cpu \
-   (data->sblock.inode_size))
 
 #define EXT2_FT_DIR2
 #define SUCCESS1
-- 
2.9.3

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[U-Boot] [PATCH v5 02/16] ext4: propagate error if creation of directory entry fails

[Stefan Brüns]

In case the dir entry creation failed, ext4fs_write would later overwrite
a random inode, as inodeno was never initialized.

Signed-off-by: Stefan Brüns 
Reviewed-by: Lukasz Majewski 
---
 fs/ext4/ext4_common.c | 12 ++--
 fs/ext4/ext4_common.h |  2 +-
 fs/ext4/ext4_write.c  |  4 +++-
 3 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 40203cf..5799bee 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -366,7 +366,7 @@ static int check_void_in_dentry(struct ext2_dirent *dir, 
char *filename)
return 0;
 }
 
-void ext4fs_update_parent_dentry(char *filename, int *p_ino, int file_type)
+int ext4fs_update_parent_dentry(char *filename, int file_type)
 {
unsigned int *zero_buffer = NULL;
char *root_first_block_buffer = NULL;
@@ -380,7 +380,7 @@ void ext4fs_update_parent_dentry(char *filename, int 
*p_ino, int file_type)
unsigned int last_entry_dirlen;
int sizeof_void_space = 0;
int templength = 0;
-   int inodeno;
+   int inodeno = -1;
int status;
struct ext_filesystem *fs = get_fs();
/* directory entry */
@@ -393,13 +393,13 @@ void ext4fs_update_parent_dentry(char *filename, int 
*p_ino, int file_type)
zero_buffer = zalloc(fs->blksz);
if (!zero_buffer) {
printf("No Memory\n");
-   return;
+   return -1;
}
root_first_block_buffer = zalloc(fs->blksz);
if (!root_first_block_buffer) {
free(zero_buffer);
printf("No Memory\n");
-   return;
+   return -1;
}
 restart:
 
@@ -518,8 +518,6 @@ restart:
temp_dir = temp_dir + sizeof(struct ext2_dirent);
memcpy(temp_dir, filename, strlen(filename));
 
-   *p_ino = inodeno;
-
/* update or write  the 1st block of root inode */
if (ext4fs_put_metadata(root_first_block_buffer,
first_block_no_of_root))
@@ -528,6 +526,8 @@ restart:
 fail:
free(zero_buffer);
free(root_first_block_buffer);
+
+   return inodeno;
 }
 
 static int search_dir(struct ext2_inode *parent_inode, char *dirname)
diff --git a/fs/ext4/ext4_common.h b/fs/ext4/ext4_common.h
index 370a717..cc9d0c5 100644
--- a/fs/ext4/ext4_common.h
+++ b/fs/ext4/ext4_common.h
@@ -61,7 +61,7 @@ int ext4fs_iterate_dir(struct ext2fs_node *dir, char *name,
 uint32_t ext4fs_div_roundup(uint32_t size, uint32_t n);
 uint16_t ext4fs_checksum_update(unsigned int i);
 int ext4fs_get_parent_inode_num(const char *dirname, char *dname, int flags);
-void ext4fs_update_parent_dentry(char *filename, int *p_ino, int file_type);
+int ext4fs_update_parent_dentry(char *filename, int file_type);
 uint32_t ext4fs_get_new_blk_no(void);
 int ext4fs_get_new_inode_no(void);
 void ext4fs_reset_block_bmap(long int blockno, unsigned char *buffer,
diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index 70a3b5b..42abd8d 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -907,7 +907,9 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
goto fail;
}
 
-   ext4fs_update_parent_dentry(filename, , FILETYPE_REG);
+   inodeno = ext4fs_update_parent_dentry(filename, FILETYPE_REG);
+   if (inodeno == -1)
+   goto fail;
/* prepare file inode */
inode_buffer = zalloc(fs->inodesz);
if (!inode_buffer)
-- 
2.9.3

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Re: [U-Boot] [PATCH v2 4/7] x86: squash lines for immediate return

[Simon Glass]

On 5 September 2016 at 07:38, Masahiro Yamada
 wrote:
> arch_cpu_init() can be simpler by this refactoring.
>
> Signed-off-by: Masahiro Yamada 
> ---
>
>  arch/x86/cpu/baytrail/valleyview.c | 8 +---
>  arch/x86/cpu/ivybridge/ivybridge.c | 8 +---
>  arch/x86/cpu/qemu/qemu.c   | 8 +---
>  arch/x86/cpu/queensbay/tnc.c   | 8 +---
>  4 files changed, 4 insertions(+), 28 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] x86: conga-qeval20-qa3: Add README to explain the console UART options

[Bin Meng]

Hi Stefan,

On Mon, Sep 5, 2016 at 5:03 PM, Stefan Roese  wrote:
> This patch adds a small README to explain the 2 defconfig files and its
> usage for the different console UART options.
>
> Signed-off-by: Stefan Roese 
> Cc: Bin Meng 
> Cc: Simon Glass 
> ---
>  board/congatec/conga-qeval20-qa3-e3845/README | 23 +++
>  1 file changed, 23 insertions(+)
>  create mode 100644 board/congatec/conga-qeval20-qa3-e3845/README
>

Reviewed-by: Bin Meng 

One nits below:

> diff --git a/board/congatec/conga-qeval20-qa3-e3845/README 
> b/board/congatec/conga-qeval20-qa3-e3845/README
> new file mode 100644
> index 000..a784f3c
> --- /dev/null
> +++ b/board/congatec/conga-qeval20-qa3-e3845/README
> @@ -0,0 +1,23 @@
> +--
> +U-Boot console UART selection:
> +--
> +
> +The U-Boot port for this congatec board currently supports two different
> +configurations (defconfig files). The only difference is the UART that
> +is used as the U-Boot console UART. The default defconfig file:
> +
> +conga-qeval20-qa3-e3845_defconfig
> +
> +provides this console on the UART0 which is provided via a Winbond
> +Super-IO chip connected on the congatec Qseven 2.0 evaluation carrier
> +board (conga-QEVAL). This UART is the one provided with a SubD9
> +connector on the mainboard (the low one). The 2nd defconfig file:
> +
> +conga-qeval20-qa3-e3845-internal-uart_defconfig
> +
> +provides the U-Boot console on the BayTrail internal legacy UART.

nits: the ending period should be ,

> +Which is routed from the QSeven SoM to the X300 connector on the

nits: Which -> which

> +baseboard. Here is called COM2. The baseboard already provides the
> +RS232 level shifters. So a TTL-USB UART adapter does not work in
> +this case. The signals need to get connected directly to the
> +RS232 level signals of the PC UART via some adapter cable.
> --

Regards,
Bin
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Re: [U-Boot] [PATCH] net: write enetaddr down to hardware on env_callback

[Bin Meng]

Hi,

On Fri, Sep 2, 2016 at 9:00 PM, Joe Hershberger
 wrote:
> On Fri, Sep 2, 2016 at 7:48 AM, Hannes Schmelzer  wrote:
>> If mac-address is changed using "setenv ethaddr " command the new
>> mac-adress also must be written into the responsible ethernet driver.
>>
>> Signed-off-by: Hannes Schmelzer 
>
> Acked-by: Joe Hershberger 

Why is this needed? The MAC address is supposed to be programmed in
the driver's probe routine.

Regards,
Bin
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Re: [U-Boot] [PATCH v2 4/7] x86: squash lines for immediate return

[Bin Meng]

On Mon, Sep 5, 2016 at 9:38 PM, Masahiro Yamada
 wrote:
> arch_cpu_init() can be simpler by this refactoring.
>
> Signed-off-by: Masahiro Yamada 
> ---
>
>  arch/x86/cpu/baytrail/valleyview.c | 8 +---
>  arch/x86/cpu/ivybridge/ivybridge.c | 8 +---
>  arch/x86/cpu/qemu/qemu.c   | 8 +---
>  arch/x86/cpu/queensbay/tnc.c   | 8 +---
>  4 files changed, 4 insertions(+), 28 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH] rockchip: rk3288-firefly: enable boot from eMMC

[Simon Glass]

Hi,

On 29 August 2016 at 21:02, 陈豪  wrote:
> Hi,
>
> You probably did not short the clock of eMMC.
> If we don't press maskrom buttons(short the clock of eMMC), SPL will
> detect eMMC and try to load image from eMMC. if the eMMC is blank, it
> hangs.
> So if we specifies board_boot_order and want to boot from SD in
> FireFly, we have to short the clock of eMMC.
>
> The current code(spl_boot_device)  will force to boot from SD rather
> than boot from whatever media it started
> with,.So we have to specifies board_boot_order if we want to boot from eMMC.
>
> Of course, It might be inconvenie to short the clock of eMMC in
> FireFly. Do you have any better idea?
>

(Please don't top post)

I think that if it boots from SD then it should continue to boot from
SD: SPL -> U-Boot -> Linux

If it boots from eMMC then it should continue to boot from eMMC.

How can we do this? Presumably there is a way to find out how we booted?

- Simon


> 2016-08-30 0:17 GMT+08:00 陈豪 :
>> Hi,
>>
>> I just copied thos code from the other boards.
>>
>> On the other boards, I didn't meet this situation.It will load u-boot
>> from sd if it didn't detect u-boot in eMMC.
>>
>> I'll check why it's different in firefly.
>>
>> 2016-08-28 0:06 GMT+08:00, Simon Glass :
>>> Hi,
>>>
>>> On 12 August 2016 at 11:20, Simon Glass  wrote:
 On 9 August 2016 at 19:56, Jacob Chen  wrote:
> Add eMMC dt node and define fallback boot devices.
>
> Signed-off-by: Jacob Chen 
> ---
>
>  arch/arm/dts/rk3288-firefly.dts   | 5 +
>  board/firefly/firefly-rk3288/firefly-rk3288.c | 8 
>  2 files changed, 13 insertions(+)

 Acked-by: Simon Glass 
>>>
>>> Unfortunately I cannot apply this. It appears to actually force
>>> booting from eMMC. So if the eMMC is blank, it hangs at 'Trying to
>>> boot from MMC2'.
>>>
>>> I think it should continue to boot from whatever media it started
>>> with. So if it booted SPL from SD then it should load U-Boot from SD.
>>>
>>> Regards,
>>> Simon
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Re: [U-Boot] [PATCH v2 2/7] video: squash lines for immediate return

[Masahiro Yamada]

2016-09-06 2:12 GMT+09:00 Anatolij Gustschin :
> On Mon,  5 Sep 2016 22:38:38 +0900
> Masahiro Yamada yamada.masah...@socionext.com wrote:
>
>> ptn3460_attach() and display_update_config_from_edid() will become
>> a simple wrapper function.
>>
>> For vidconsole_post_probe(), it is common coding style to let a
>> probe method return the value of a resister function.
>
> s/resister/register/
>
> otherwise
>
> Acked-by: Anatolij Gustschin 


I will send v3.  Thanks!

-- 
Best Regards
Masahiro Yamada
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Re: [U-Boot] ZynqMP breakage

[Simon Glass]

Hi Alex,

On 5 September 2016 at 04:51, Alexander Graf  wrote:
> On 08/19/2016 08:45 AM, Michal Simek wrote:
>>
>> On 16.8.2016 20:39, Alexander Graf wrote:
>>>
>>> Hi Michal,
>>>
>>> I just tried to run the latest u-boot master + a few patches to implement
>>> generic PSCI RTS support on zynqmp and got this:
>>>
>>> e
>>> U-Boot 2016.09-rc1-00453-ga0592f1 (Aug 16 2016 - 20:27:40 +0200) Xilinx
>>> ZynqMP ZCU102
>>>
>>> I2C:   ready
>>> DRAM:  4 GiB
>>> EL Level:   EL2
>>> MMC:   sdhci@ff17: 0
>>> Using default environment
>>>
>>> In:serial@ff00
>>> Out:   serial@ff00
>>> Err:   serial@ff00
>>> Bootmode: SD_MODE1
>>> SCSI:  SATA link 0 timeout.
>>> Target spinup took 0 ms.
>>> AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x3 impl SATA mode
>>> flags: 64bit ncq pm clo only pmp fbss pio slum part ccc apst
>>> scanning bus for devices...
>>> "Synchronous Abort" handler, esr 0x9604
>>> ELR: 7ff42d20
>>> LR:  7ff3ff10
>>> x0 :  x1 : 
>>> x2 : 0001 x3 : 7df1aa80
>>> x4 :  x5 : 0001
>>> x6 : 0200 x7 : 0004
>>> x8 : 7ff9f800 x9 : 0008
>>> x10: 7ff9f8f0 x11: 
>>> x12:  x13: 
>>> x14: 7ff8242f x15: 7ff82435
>>> x16: 7ff84388 x17: 7ff84388
>>> x18: 7df1ade8 x19: 7df1aa80
>>> x20: 7ff92cb8 x21: 7ff9f800
>>> x22: 7ff9f000 x23: 0078
>>> x24: 7ff9f8f0 x25: 
>>> x26: 7ff9f800 x27: 7ff9f000
>>> x28: 7ff9fb00 x29: 7df1aca0
>>>
>>> Resetting CPU ...
>>>
>>> resetting …
>>>
>>> Is this a known problem?
>>
>> Is this issue with usb?
>> I have usb off on zcu102 that's why if this usb issue
>> I am not aware about it.
>
>
> After a bit of digging, turns out it's CONFIG_BLK. If I disable that things
> work again (albeit without mmc access, since that one requires CONFIG_BLK
> now).

I don't have a zynqmp device, so cannot test with that unfortunately.

Regards,
Simon
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Re: [U-Boot] [PATCH 1/5] clk: rk3399: add pmucru controller support

[Simon Glass]

On 12 August 2016 at 11:21, Simon Glass  wrote:
> On 12 August 2016 at 03:47, Kever Yang  wrote:
>> pmucru is a module like cru which is a clock controller manage some PLL
>> and module clocks.
>>
>> Signed-off-by: Kever Yang 
>> ---
>>
>>  drivers/clk/rockchip/clk_rk3399.c | 177 
>> +-
>>  1 file changed, 173 insertions(+), 4 deletions(-)
>
> Acked-by: Simon Glass 

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH 2/5] clk: rk3288: add PWM clock get rate

[Simon Glass]

On 12 August 2016 at 11:21, Simon Glass  wrote:
> On 12 August 2016 at 03:57, Kever Yang  wrote:
>> This patch add clk_get_rate for PWM device.
>>
>> Signed-off-by: Kever Yang 
>> ---
>>
>>  drivers/clk/rockchip/clk_rk3288.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>
> Acked-by: Simon Glass 

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH v2 21/44] Convert CONFIG_SPL_GPIO_SUPPORT to Kconfig

[Simon Glass]

Hi Masahiro,

On 4 September 2016 at 20:40, Masahiro Yamada
 wrote:
> 2016-09-02 23:35 GMT+09:00 Tom Rini :
>
>>> >> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
>>> >> index c25fcf3..d4a5bc9 100644
>>> >> --- a/arch/arm/mach-exynos/Kconfig
>>> >> +++ b/arch/arm/mach-exynos/Kconfig
>>> >> @@ -61,6 +61,9 @@ endif
>>> >>
>>> >>  if ARCH_EXYNOS5
>>> >>
>>> >> +config SPL_GPIO_SUPPORT
>>> >> +   default y
>>> >> +
>>> >
>>> >
>>> > As we discussed before,
>>> > we decided to not do this.
>>>
>>> Tom was keen to avoid changing every defconfig file. It is there
>>> another way to express common defaults?
>>
>> I was thinking in the Kconfig with the entry for SPL_GPIO_SUPPORT, for
>> optional stuff and select in the board, etc, Kconfig for non-optional
>> stuff.  Now, I realize that optional vs non-optional is more the domain
>> of the individual SoC custodians, so we'll have some clean up afterwards
>> that isn't on you (well, aside from the SoCs you know like rockchip ;)).
>
> config SPL_GPIO_SUPPORT
>default y
>
> is incorrect because it could violate
> the dependency in the proper Kconfig entry in spl/Kconfig.

But only if options depended on by this are not set, right?

>
>
>
>
> Basically, we are supposed to use "select FOO" when it is mandatory,
> or add CONFIG_FOO=y in a defconfig when the board wants it, but
> can still make it optional.

Yes, but this is not mandatory. It is a default, and some boards will
unset it. I did this in response to Tom's comment about trying to cut
down the defconfig patch size.

>
>
> I know our pain comes from that "include" is not supported by Kconfig.

How would that help? Why don't we implement it?

>
> What I can suggest now is:
>
>
>
> [1]  Add ARCH_WANT_* to specify a SoC-common default.
>
>
>config SPL_GPIO_SUPPORT
> bool "GPIO support for SPL"
> default  ARCH_WANT_SPL_GPIO_SUPPORT
>
>
>config ARCH_WANT_SPL_GPIO_SUPPORT
> bool
>
>
>config ARCH_EXYNOS5
>select ARCH_WANT_SPL_GPIO_SUPPORT
>
>
> Linux used to have ARCH_WANT_OPTIONAL_GPIOLIB to do similar things.
> (they stopped this way, though)
>
>
>
> [2] Support multi boards with one defconfig
> (barebox supports multi-platform like Linux does.)
>
>
> [3] use pre-processor to support #include <...>
>
>
>
>
>
> BTW, SPL_GPIO_SUPPORT is optional in this case?
>
> U-Boot proper supports a command line interface,
> while SPL is usually run in a non-interactive mode.
>
> So, what SPL needs is generally mandatory,
> so we can "select" it,  I guess.

I found a lot of cases where 90% of the boards with the same SoC  had
the same setting for this (and a few other) options, but some boards
did not. So I did not want to use select, since then it is impossible
to unselect.

This series is actually really tricky. I'm looking forward to putting
it to bed. We need to make these conversions easier.

Regards,
Simon
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Re: [U-Boot] [PATCH] eth: asix88179: Reset device during probe with DM_ETH enabled

[Simon Glass]

Hi,

On 30 August 2016 at 08:01, Nikolaus Schulz
 wrote:
> With the ethernet driver model enabled, reset the device before reading
> the MAC address, just like it's done for the non-device-model code path.
> This avoids a timeout when the interface is first used.
>
> Signed-off-by: Nikolaus Schulz 
> ---
>  drivers/usb/eth/asix88179.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c
> index 7548269..0725940 100644
> --- a/drivers/usb/eth/asix88179.c
> +++ b/drivers/usb/eth/asix88179.c
> @@ -878,6 +878,10 @@ static int ax88179_eth_probe(struct udevice *dev)
> usb_dev = priv->ueth.pusb_dev;
> priv->maxpacketsize = usb_dev->epmaxpacketout[AX_ENDPOINT_OUT];
>
> +   ret = asix_basic_reset(>ueth, priv);
> +   if (ret)
> +   return ret;
> +
> /* Get the MAC address */
> ret = asix_read_mac(>ueth, pdata->enetaddr);
> if (ret)

How come this doesn't happen in ax88179_eth_start()?

> --
> 2.1.4
>

Regards,
Simon
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Re: [U-Boot] [PATCH v2] watchdog: Fix Watchdog Reset while in U-Boot Prompt

[Simon Glass]

+Tom, in case this should go into the release.

On 1 August 2016 at 05:49, Andreas J. Reichel
 wrote:
> This patch fixes unwanted watchdog resets while the user enters
> a command at the U-Boot prompt.
>
> As found on the CM-FX6 board from Compulab, when having enabled the
> watchdog, a missing WATCHDOG_RESET call in _serial_tstc() in
> (/drivers/serial/serial-uclass.c) causes this and alike boards to
> reset when the watchdog's timeout has elapsed while waiting at the
> U-Boot prompt.
>
> Despite the user could press several keys within the watchdog
> timeout limit, the while loop in cli_readline.c, line 261, does only
> call WATCHDOG_RESET if first == 1, which gets set to 0 in the 1st
> loop iteration. This leads to a watchdog timeout no matter if the
> user presses keys or not.
>
> The problem is solved with a call to WATCHDOG_RESET in _serial_tstc,
> defined in drivers/serial/serial-uclass.c.
>
> Since the macro WATCHDOG_RESET expands to {} if watchdog support
> isn't configured, there's no need to surround it by #ifdef in this
> case.
>
>  * Symptom:
>U-Boot resets after watchdog times out when in commandline prompt
>and watchdog is enabled.
>
>  * Reasoning:
>When U-Boot shows the commandline prompt, the following function
>call stack is executed while waiting for a keypress:
>
>common/main.c:
> main_loop  => common/cli.c: cli_loop() =>
>common/cli_hush.c:
> parse_file_outer   => parse_stream_outer   =>
> parse_stream   => b_getch(i)   =>
> i->get(i)  => file_get =>
> get_user_input => cmdedit_read_input   =>
> uboot_cli_readline =>
>common/cli_readline.c:
> cli_readline   => cli_readline_into_buffer =>
> cread_line => getcmd_getch (== getc)   =>
>commonn/console.c:
> fgetc  => console_tstc
>
>- in console_tstc line 181:
>If dev->tstc(dev) returns 0, the global tstcdev variable doesn't
>get set. This is the case if no character is in the serial buffer.
>
>- in fgetc(int file), line 297:
>Program flow keeps looping because tstcdev does not get set.
>Therefore WATCHDOG_RESET is not called, as mx_serial_tstc from
>drivers/serial/serial_mxc.c does not call it.
>
>- Initialization calls drv_system_init in stdio.c, which sets
>dev.tstc = stdio_serial_tstc. Thus, dev->tstc(dev) calls serial_tstc()
>which in turn calls _serial_tstc().
>
>Hence, _serial_tstc() needs to call WATCHDOG_RESET() to periodically
>reset the watchdog while cli_readline waits for user input.
>
> Signed-off-by: Christian Storm 
> Signed-off-by: Jan Kiszka 
> Signed-off-by: Andreas J. Reichel 
> ---
>
> Changes in v2:
>  - Move WATCHDOG_RESET() call from common/console.c to
>drivers/serial/serial-uclass.c.
>
>  drivers/serial/serial-uclass.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
> index 0ce5c44..72cf808 100644
> --- a/drivers/serial/serial-uclass.c
> +++ b/drivers/serial/serial-uclass.c
> @@ -155,6 +155,7 @@ static int _serial_tstc(struct udevice *dev)
>  {
> struct dm_serial_ops *ops = serial_get_ops(dev);
>
> +   WATCHDOG_RESET();
> if (ops->pending)
> return ops->pending(dev, true);

Great explanation, thank you.

Acked-by: Simon Glass 

>
> --
> 2.8.2
>
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Re: [U-Boot] [PATCH] Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL

[Simon Glass]

On 30 August 2016 at 03:56, Stefan Roese  wrote:
> On 30.08.2016 11:50, Masahiro Yamada wrote:
>>
>> If both SPL_DM and SPL_OF_CONTROL are enabled, SPL needs to bind
>> several devices, but CONFIG_SYS_MALLOC_F_LEN=0x400 is apparently
>> not enough.  Increase the default to 0x2000 for the case.  This
>> will be helpful for shorter defconfigs.
>>
>> Signed-off-by: Masahiro Yamada 
>
>
> Reviewed-by: Stefan Roese 

Reviewed-by: Simon Glass 

It would be worth checking why. I fixed a bug where simple-bus would
bring in all devices regardless of the u-boot,dm-pre-reloc flag.
Perhaps that was it?

- Simon
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Re: [U-Boot] [PATCH v1 1/2] clk: at91: Fix at91-pmc and at91-sckc's class ID

[Simon Glass]

On 30 August 2016 at 02:11, Wenyou Yang  wrote:
> The at91-pmc and at91-sckc aren't the clock providers, change their
> class ID from UCLASS_CLK to UCLASS_SIMPLE_BUS, they also don't
> need to bind the child nodes explicitly, the .post_bind callback
> of simple_bus uclass will do it for them.
>
> Signed-off-by: Wenyou Yang 
> ---
>
>  drivers/clk/at91/pmc.c  | 10 ++
>  drivers/clk/at91/sckc.c | 17 +
>  2 files changed, 7 insertions(+), 20 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 00/44] Kconfig: Move CONFIG_SPL_..._SUPPORT to Kconfig

[Simon Glass]

Hi Heiko,

On 29 August 2016 at 23:28, Heiko Schocher  wrote:
> Hello Simon,
>
>
> Am 30.08.2016 um 02:21 schrieb Simon Glass:
>>
>> This series moves all the CONFIG_SPL_..._SUPPORT options to Kconfig and
>> fixes up existing boards to continue to build.
>>
>> It also adds a few small but useful features to moveconfig.
>>
>> There is existing work going on in this area, so some of these patches may
>> be superseded. It has taken me a while to get this building cleanly. But I
>> have run out of time so want to get this out.
>>
>> As mentioned on a recent thread [1] there is some confusion about whether
>> an
>> option means enabling driver support or media support. Andrew's recent
>> series seems like a good vehicle to tidy that up. But I hope this series
>> will make it easier.
>>
>> NOTE: in the v2 series I have tried to use common things in Kconfig to
>> reduce the diffs in the defconfig files. This has helped a fair bit. But
>> it
>> is very error-prone and time consuming. Also I have had to add some
>> exceptions (disabling an option in specific board configs). Overall it was
>> not a pleasant experience :-(
>>
>> There are a few strange features of this conversion. The main difficulty
>> is
>> that some PowerPC boards do things like this in their board config file:
>>
>>   #ifdef CONFIG_TPL_BUILD
>>   #define CONFIG_SPL_SERIAL_SUPPORT
>>   #define CONFIG_SPL_ENV_SUPPORT
>>   #else
>>   #define CONFIG_SPL_SERIAL_SUPPORT
>>   #endif
>>
>> This means that TPL reuses the SPL options. We can't support this in
>> Kconfig
>> so I have added a small number of CONFIG_TPL_xxx_SUPPORT options to cope
>> with this. This made the conversion more painful than it should have been.
>>
>> A related issue is boards using a common header file and setting options
>> only
>> for SPL:
>>
>>   #ifdef CONFIG_SPL_BUILD
>>   #define CONFIG_SPL_SERIAL_SUPPORT
>>   #endif
>>
>> This is not noticed by moveconfig so we have to clean it up manually. Also
>> there are a few incorrect things where Kconfig options are set with
>> #define:
>>
>>   #ifdef CONFIG_SPL_BUILD
>>   #define CONFIG_SPL_DM
>>   #endif
>>
>> Finally, many defconfig files are not ordered correctly, resulting in
>> larger
>> patches than we might like. It would be great to have a solution for this,
>> perhaps with buildman providing a warning. But it might slow down
>> development.
>>
>> The series is fully build-tested (for bisectability) and causes no
>> failures
>> for the boards that already pass. The following boards fail for me at
>> present on mainline (which I have not yet looked at):
>>
>>openrisc:  +   openrisc-generic
>>   sparc:  +   grsim grsim_leon2 gr_cpci_ax2000 gr_xc3s_1500 gr_ep2s60
>>blackfin:  +   bf609-ezkit
>>
>> This build is also config tested (with buildman -K). The changes are with
>> spear (to rename options) and am335x_evm_usbspl (which I think is
>> correct).
>>
>> boards.cfg is up to date. Nothing to do.
>> Summary of 49 commits for 1185 boards (32 threads, 1 job per thread)
>> 01: cfg
>>openrisc:  +   openrisc-generic
>>   sparc:  +   grsim grsim_leon2 gr_cpci_ax2000 gr_xc3s_1500 gr_ep2s60
>>blackfin:  +   bf609-ezkit
>> 02: move
>> 03: buildman
>> 04: Correct defconfigs using savedefconfig
>> 05: moveconfig: Add an option to skip prompts
>> 06: moveconfig: Add an option to commit changes
>> 07: Kconfig: Move SPL settings into their own file
>> 08: arm: fsl: Adjust ordering of #ifndef CONFIG_SPL_BUILD
>> 09: Drop CONFIG_SPL_RAM_SUPPORT
>> 10: Use separate options for TPL support
>> 11: Kconfig: spl: Add SPL support options to Kconfig
>> 12: Kconfig: tpl: Add some TPL support options to Kconfig
>> 13: Move existing use of CONFIG_SPL_DM to Kconfig
>> 14: Move existing use of CONFIG_SPL_RSA to Kconfig
>> 15: spear: Use upper case for CONFIG options
>> arm:
>> + u-boot.cfg: CONFIG_ENV_ADDR=(CONFIG_SYS_FLASH_BASE +
>> CONFIG_SYS_MONITOR_LEN) CONFIG_ENV_IS_IN_FLASH=1
>> CONFIG_ENV_SECT_SIZE=0x0001 CONFIG_NAND=1 CONFIG_STV0991=1
>> CONFIG_SYS_MONITOR_LEN=0x0004 CONFIG_USBTTY=1
>> - u-boot.cfg: CONFIG_DW_UDC=1 CONFIG_ENV_IS_IN_NAND=1
>> CONFIG_ENV_OFFSET=0x6 CONFIG_ENV_RANGE=0x1 CONFIG_SPEAR_USBTTY=1
>> CONFIG_USBD_HS=1 CONFIG_USBD_MANUFACTURER="ST Microelectronics"
>> CONFIG_USBD_PRODUCT_NAME="SPEAr SoC" CONFIG_USB_DEVICE=1 CONFIG_USB_TTY=1
>> CONFIG_nand=1 CONFIG_spear300=1 CONFIG_spear310=1 CONFIG_spear320=1
>> CONFIG_spear600=1 CONFIG_stv0991=1 CONFIG_usbtty=1
>> + all: CONFIG_ENV_ADDR=(CONFIG_SYS_FLASH_BASE +
>> CONFIG_SYS_MONITOR_LEN) CONFIG_ENV_IS_IN_FLASH=1
>> CONFIG_ENV_SECT_SIZE=0x0001 CONFIG_NAND=1 CONFIG_STV0991=1
>> CONFIG_SYS_MONITOR_LEN=0x0004 CONFIG_USBTTY=1
>> - all: CONFIG_DW_UDC=1 CONFIG_ENV_IS_IN_NAND=1
>> CONFIG_ENV_OFFSET=0x6 CONFIG_ENV_RANGE=0x1 CONFIG_SPEAR_USBTTY=1
>> CONFIG_USBD_HS=1 CONFIG_USBD_MANUFACTURER="ST Microelectronics"
>> CONFIG_USBD_PRODUCT_NAME="SPEAr SoC" CONFIG_USB_DEVICE=1 CONFIG_USB_TTY=1
>> CONFIG_nand=1 

Re: [U-Boot] [PATCH 3/7] power: regulator: add pwm regulator

[Simon Glass]

Hi Kever,

On 29 August 2016 at 21:02, Kever Yang  wrote:
> This driver add support for pwm regulator.
>
> Signed-off-by: Elaine Zhang 
> Signed-off-by: Kever Yang 
> ---
>
>  drivers/power/regulator/Kconfig |   9 ++
>  drivers/power/regulator/Makefile|   1 +
>  drivers/power/regulator/pwm_regulator.c | 157 
> 
>  3 files changed, 167 insertions(+)
>  create mode 100644 drivers/power/regulator/pwm_regulator.c
>
> diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
> index 17f22dd..c2eaa84 100644
> --- a/drivers/power/regulator/Kconfig
> +++ b/drivers/power/regulator/Kconfig
> @@ -42,6 +42,15 @@ config DM_REGULATOR_PFUZE100
> features for REGULATOR PFUZE100. The driver implements get/set api 
> for:
> value, enable and mode.
>
> +config REGULATOR_PWM
> +   bool "Enable driver for PWM regulators"
> +   depends on DM_REGULATOR
> +   ---help---
> +   Enable support for the regulator functions of the PWM. The

Does a PWM have regulator functions? Do you mean a board that uses a
PWM to control a regulator?

> +   driver implements get/set api for the various BUCKS.
> +   This driver is controlled by a device tree node
> +   which includes voltage limits.
> +
>  config DM_REGULATOR_MAX77686
> bool "Enable Driver Model for REGULATOR MAX77686"
> depends on DM_REGULATOR && DM_PMIC_MAX77686
> diff --git a/drivers/power/regulator/Makefile 
> b/drivers/power/regulator/Makefile
> index 1590d85..ab461ec 100644
> --- a/drivers/power/regulator/Makefile
> +++ b/drivers/power/regulator/Makefile
> @@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o
>  obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o
>  obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
>  obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o
> +obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o
>  obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
>  obj-$(CONFIG_REGULATOR_RK808) += rk808.o
>  obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
> diff --git a/drivers/power/regulator/pwm_regulator.c 
> b/drivers/power/regulator/pwm_regulator.c
> new file mode 100644
> index 000..f75731b
> --- /dev/null
> +++ b/drivers/power/regulator/pwm_regulator.c
> @@ -0,0 +1,157 @@
> +/*
> + * Copyright (C) 2016 Rockchip Electronics Co., Ltd
> + *
> + * Based on kernel drivers/regulator/pwm-regulator.c
> + * Copyright (C) 2014 - STMicroelectronics Inc.
> + * Author: Lee Jones 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct pwm_regulator_info {
> +   int pwm_id;

Please add a comment for members

> +   int period;

period_ms is better, if this is milliseconds. Or period_us?

> +   struct udevice *pwm;
> +   unsigned int init_voltage;
> +   unsigned int max_voltage;
> +   unsigned int min_voltage;
> +   unsigned int boot_on;

bool?

> +   unsigned int volt_uV;
> +};
> +
> +static int pwm_regulator_enable(struct udevice *dev, bool enable)
> +{
> +   struct pwm_regulator_info *priv = dev_get_priv(dev);
> +
> +   return pwm_set_enable(priv->pwm, priv->pwm_id, enable);
> +}
> +
> +static int pwm_voltage_to_duty_cycle_percentage(struct udevice *dev, int 
> req_uV)
> +{
> +   struct pwm_regulator_info *priv = dev_get_priv(dev);
> +   int min_uV = priv->min_voltage;
> +   int max_uV = priv->max_voltage;
> +   int diff = max_uV - min_uV;
> +
> +   return 100 - (((req_uV * 100) - (min_uV * 100)) / diff);
> +}
> +
> +static int pwm_regulator_get_voltage(struct udevice *dev)
> +{
> +   struct pwm_regulator_info *priv = dev_get_priv(dev);
> +
> +   return priv->volt_uV;
> +}
> +
> +static int pwm_regulator_set_voltage(struct udevice *dev, int uvolt)
> +{
> +   struct pwm_regulator_info *priv = dev_get_priv(dev);
> +   int duty_cycle;
> +   int ret = 0;
> +
> +   duty_cycle = pwm_voltage_to_duty_cycle_percentage(dev, uvolt);
> +
> +   ret = pwm_set_config(priv->pwm, priv->pwm_id,
> +   (priv->period / 100) * duty_cycle, priv->period);
> +   if (ret) {
> +   dev_err(dev, "Failed to configure PWM\n");
> +   return ret;
> +   }
> +
> +   ret = pwm_set_enable(priv->pwm, priv->pwm_id, true);
> +   if (ret) {
> +   dev_err(dev, "Failed to enable PWM\n");
> +   return ret;
> +   }
> +   priv->volt_uV = uvolt;
> +   return ret;
> +}
> +
> +static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
> +{
> +   struct pwm_regulator_info *priv = dev_get_priv(dev);
> +   struct fdtdec_phandle_args args;
> +   const void *blob = gd->fdt_blob;
> +   int node = dev->of_offset;
> +   int ret;
> +
> +  

Re: [U-Boot] [PATCH 5/5] mmc: uniphier-sd: migrate to CONFIG_BLK

[Simon Glass]

On 24 August 2016 at 23:52, Masahiro Yamada
 wrote:
> This is the state-of-the-art MMC driver implementation.
>
> Signed-off-by: Masahiro Yamada 
> ---
>
>  arch/arm/Kconfig  |  1 +
>  drivers/mmc/Kconfig   |  1 +
>  drivers/mmc/uniphier-sd.c | 50 
> +++
>  3 files changed, 26 insertions(+), 26 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 1/7] rockchip: rk3399: update PPLL and pmu_pclk frequency

[Simon Glass]

Hi Kever,

On 29 August 2016 at 21:02, Kever Yang  wrote:
> This patch update PPLL to 676MHz and PMU_PCLK to 48MHz.

Why?

>
> Signed-off-by: Kever Yang 
> ---
>
>  arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h 
> b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
> index c919f47..6776e48 100644
> --- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
> +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
> @@ -64,9 +64,9 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
>  #define APLL_HZ(600*MHz)
>  #define GPLL_HZ(594*MHz)
>  #define CPLL_HZ(384*MHz)
> -#define PPLL_HZ(594*MHz)
> +#define PPLL_HZ(676*MHz)
>
> -#define PMU_PCLK_HZ(99*MHz)
> +#define PMU_PCLK_HZ(48*MHz)
>
>  #define ACLKM_CORE_HZ  (300*MHz)
>  #define ATCLK_CORE_HZ  (300*MHz)
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH 3/3] rockchip: use rockchip linux partitions map

[Simon Glass]

Hi,

On 29 August 2016 at 11:26, Jacob Chen  wrote:
> From: "jacob2.chen" 
>
> Below link contains documents about rockchip linux partitions.
> http://rockchip.wikidot.com/partitions
>

Please add to the commit message some info about why this change is needed.

Please can you update README.rockchip with this info and the link.

Regards,
Simon

> Signed-off-by: jacob2.chen 
> ---
>
>  include/configs/kylin_rk3036.h  | 25 +
>  include/configs/rk3288_common.h |  7 ++-
>  2 files changed, 15 insertions(+), 17 deletions(-)
>
> diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
> index e8ca76d..e08654b 100644
> --- a/include/configs/kylin_rk3036.h
> +++ b/include/configs/kylin_rk3036.h
> @@ -18,7 +18,6 @@
>  #undef CONFIG_ENV_IS_NOWHERE
>  #define CONFIG_ENV_IS_IN_MMC
>  #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
> -#define CONFIG_SYS_MMC_ENV_PART0 /* user area */
>  #define CONFIG_ENV_OFFSET  (SZ_4M - SZ_64K) /* reserved area */
>  #define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
>  #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
> @@ -28,25 +27,19 @@
>  #define CONFIG_RANDOM_UUID
>  #define PARTS_DEFAULT \
> "uuid_disk=${uuid_gpt_disk};" \
> -   "name=loader,start=32K,size=4000K,uuid=${uuid_gpt_loader};" \
> -   "name=reserved,size=64K,uuid=${uuid_gpt_reserved};" \
> -   "name=misc,size=4M,uuid=${uuid_gpt_misc};" \
> -   "name=recovery,size=32M,uuid=${uuid_gpt_recovery};" \
> -   "name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
> -   "name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \
> -   "name=system_a,size=818M,uuid=${uuid_gpt_system_a};" \
> -   "name=system_b,size=818M,uuid=${uuid_gpt_system_b};" \
> -   "name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
> -   "name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
> -   "name=cache,size=100M,uuid=${uuid_gpt_cache};" \
> -   "name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
> -   "name=persist,size=4M,uuid=${uuid_gpt_persist};" \
> -   "name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
> +   "name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
> +   "name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
> +   "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
> +   "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
> +   "name=atf,size=4M,uuid=${uuid_gpt_atf};" \
> +   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
> +   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
>
>  #undef CONFIG_EXTRA_ENV_SETTINGS
>  #define CONFIG_EXTRA_ENV_SETTINGS \
> "partitions=" PARTS_DEFAULT \
> -
> +   ENV_MEM_LAYOUT_SETTINGS \
> +   BOOTENV
>  #endif
>
>  #define CONFIG_BOARD_LATE_INIT
> diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
> index d3d4c68..cf5ab59 100644
> --- a/include/configs/rk3288_common.h
> +++ b/include/configs/rk3288_common.h
> @@ -120,7 +120,12 @@
>  #define CONFIG_RANDOM_UUID
>  #define PARTS_DEFAULT \
> "uuid_disk=${uuid_gpt_disk};" \
> -   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
> +   "name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
> +   "name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
> +   "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
> +   "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
> +   "name=atf,size=4M,uuid=${uuid_gpt_atf};" \
> +   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
> "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
>
>  /* First try to boot from SD (index 0), then eMMC (index 1 */
> --
> 2.7.4
>
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Re: [U-Boot] [PATCH 1/5] mmc: uniphier-sd: migrate to CONFIG_DM_MMC_OPS

[Simon Glass]

On 24 August 2016 at 23:52, Masahiro Yamada
 wrote:
> Catch up with the DM migration.
>
> As struct dm_mmc_ops does not have .init callback, call the init
> function directly from the probe function.
>
> Signed-off-by: Masahiro Yamada 
> ---
>
>  drivers/mmc/Kconfig   |  1 +
>  drivers/mmc/uniphier-sd.c | 97 
> ---
>  2 files changed, 51 insertions(+), 47 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 3/3] rockchip: i2c: fix >32 byte writes

[Simon Glass]

Hi John,

On 18 August 2016 at 13:08, John Keeping  wrote:
> The special handling of the chip address and register address must only
> happen before we send the data buffer, otherwise we will end up
> inserting both of these every 32 bytes.
>
> Signed-off-by: John Keeping 
>
> ---
> I'm not entirely sure about this; it's the smallest change that fixes
> the issue and I can't see another way to fix it without completely
> rewriting the function.  I guess we could drop r_len completely since
> the only caller always passes zero and that would make it all a bit
> simpler, but I don't want to conflict with any plan to use this function
> elsewhere.
>
>  drivers/i2c/rk_i2c.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
> index a4c0032..7c701cb 100644
> --- a/drivers/i2c/rk_i2c.c
> +++ b/drivers/i2c/rk_i2c.c
> @@ -269,9 +269,9 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, 
> uint reg, uint r_len,
> if ((i * 4 + j) == bytes_xferred)
> break;
>
> -   if (i == 0 && j == 0) {
> +   if (i == 0 && j == 0 && pbuf == buf) {
> txdata |= (chip << 1);
> -   } else if (i == 0 && j <= r_len) {
> +   } else if (i == 0 && j <= r_len && pbuf == 
> buf) {
> txdata |= (reg &
> (0xff << ((j - 1) * 8))) << 8;
> } else {
> --
> 2.9.3.728.g30b24b4.dirty
>

The original code is not great. I would rather that it puts the chip
and address info into txdata outside the loops.

But anyway your change looks right. I did think about using an
explicit boolean like 'addr_sent', set to false at the strart of the
function and true once sent. But given the existing code, we might as
well go with what you have.

Acked-by: Simon Glass 

Regards,
Simon
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Re: [U-Boot] [PATCH v1 4/4] board: sama5d2_xplained: Enable an early debug UART

[Simon Glass]

On 30 August 2016 at 03:18, Wenyou Yang  wrote:
> Enable an early debug UART to debug problems when an ICE or other
> debug mechanism is not available.
>
> Signed-off-by: Wenyou Yang 
> ---
>
>  board/atmel/sama5d2_xplained/sama5d2_xplained.c | 14 ++
>  configs/sama5d2_xplained_mmc_defconfig  |  6 ++
>  configs/sama5d2_xplained_spiflash_defconfig |  6 ++
>  include/configs/sama5d2_xplained.h  |  2 ++
>  4 files changed, 28 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v1 2/2] serial: atmel_usart: Support enable an early debug UART

[Simon Glass]

On 30 August 2016 at 02:43, Wenyou Yang  wrote:
> Add support to enable an early debug UART for debugging.
>
> Signed-off-by: Wenyou Yang 
> ---
>
>  drivers/serial/Kconfig   |  7 +++
>  drivers/serial/atmel_usart.c | 22 ++
>  2 files changed, 29 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v1 2/4] board: sama5d2_xplained: Clean up code

[Simon Glass]

On 30 August 2016 at 03:18, Wenyou Yang  wrote:
> Since the introduction of pinctrl and clk driver, and the dts file,
> remove unneeded the pin configurations and the clock enabling code.
>
> Signed-off-by: Wenyou Yang 
> ---
>
>  board/atmel/sama5d2_xplained/sama5d2_xplained.c | 104 
> 
>  1 file changed, 104 deletions(-)

Reviewed-by: Simon Glass 

Nice!
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Re: [U-Boot] [PATCH v1] i2c: at91_i2c: Fix the wrong include file

[Simon Glass]

+Stephen

On 30 August 2016 at 02:03, Wenyou Yang  wrote:
> Since the 'clk_client.h' doesn't exist, it should be 'clk.h'.
>
> Signed-off-by: Wenyou Yang 
> ---
>
>  drivers/i2c/at91_i2c.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 7/7] config: evb-rk3399: enable pwm regulator

[Simon Glass]

On 29 August 2016 at 21:02, Kever Yang  wrote:
> This patch enable the pwm regulator for evb-rk3399.
>

Please remove 'This patch'

> Signed-off-by: Kever Yang 
> ---
>
>  configs/evb-rk3399_defconfig | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 5/7] Kconfig: rockchip: enable DM_PWM and DM_REGULATOR

[Simon Glass]

On 29 August 2016 at 21:02, Kever Yang  wrote:
> This patch enable DM_PWM and DM_REGULATOR on rockchip SoCs.
>
> Signed-off-by: Kever Yang 
> ---
>
>  arch/arm/Kconfig | 2 ++
>  1 file changed, 2 insertions(+)

I think this is safe.

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 6/7] dts: evb-rk3399: add init voltage node for vdd-center

[Simon Glass]

Hi Kever,

On 29 August 2016 at 21:02, Kever Yang  wrote:
> This patch add regulator-init-microvolt for pwm regulator
> to get a init value when driver do probe init.

How about:

Add a regulator-init-microvolt value for the vd_center regulator so that  

(please complete the sentence - commits should explain why they are
needed if it isn't obvious)

>
> Signed-off-by: Kever Yang 
> ---
>
>  arch/arm/dts/rk3399-evb.dts | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
> index bd7801b..fa60e19 100644
> --- a/arch/arm/dts/rk3399-evb.dts
> +++ b/arch/arm/dts/rk3399-evb.dts
> @@ -23,6 +23,7 @@
> regulator-name = "vdd_center";
> regulator-min-microvolt = <80>;
> regulator-max-microvolt = <140>;
> +   regulator-init-microvolt = <95>;
> regulator-always-on;
> regulator-boot-on;
> status = "okay";
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH 4/7] rockchip: evb_rk3399: init vdd_center regulator

[Simon Glass]

On 29 August 2016 at 21:02, Kever Yang  wrote:
> This patch add vdd_center pwm regulator get_device to

You don't need to say 'This patch', just:

"Add vdd...

> enable this regulator.
>
> Signed-off-by: Kever Yang 
> ---
>
>  board/rockchip/evb_rk3399/evb-rk3399.c | 6 ++
>  1 file changed, 6 insertions(+)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 2/7] rockchip: rkpwm: fix the register sequence

[Simon Glass]

On 29 August 2016 at 21:02, Kever Yang  wrote:
> Reference to kernel source code, rockchip pwm has three
> type, we are using v2 for rk3288 and rk3399, so let's
> update the register to sync with pwm_data_v2 in kernel.
>
> Signed-off-by: Kever Yang 
> ---
>
>  arch/arm/include/asm/arch-rockchip/pwm.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 2/3] rockchip: add usb mass storage feature support for rk3036

[Simon Glass]

On 29 August 2016 at 11:26, Jacob Chen  wrote:
> From: "jacob2.chen" 
>
> Enable ums feature for rk3036 boards, so that we can mount the mmc
> device to PC.
>
> Signed-off-by: jacob2.chen 
> ---
>
>  include/configs/rk3036_common.h | 4 
>  1 file changed, 4 insertions(+)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH] sf: fix sf probe

[Simon Glass]

On 26 August 2016 at 09:10, Hannes Schmelzer  wrote:
>
> mfG
> Schmelzer Hannes
>
> On 08/17/2016 09:19 AM, Wenyou Yang wrote:
>>
>> From: Cyrille Pitchen 
>>
>> This patch fixes the "sf probe" command. The very first SPI flash probe
>> passes, for instance when u-boot tries to read its environment settings
>> from a (Q)SPI memory but next "sf probe" commands fail because the flash
>> memory node is unbound from the SPI controller children nodes.
>>
>> Signed-off-by: Cyrille Pitchen 
>> Signed-off-by: Wenyou Yang 
>> ---
>>
>>   cmd/sf.c | 1 -
>>   1 file changed, 1 deletion(-)
>>
>> diff --git a/cmd/sf.c b/cmd/sf.c
>> index 286906c..65b117f 100644
>> --- a/cmd/sf.c
>> +++ b/cmd/sf.c
>> @@ -125,7 +125,6 @@ static int do_spi_flash_probe(int argc, char * const
>> argv[])
>> ret = spi_find_bus_and_cs(bus, cs, _dev, );
>> if (!ret) {
>> device_remove(new);
>> -   device_unbind(new);
>> }
>> flash = NULL;
>> ret = spi_flash_probe_bus_cs(bus, cs, speed, mode, );
>
> Tested-by: Hannes Schmelzer 
>

Reviewed-by: Simon Glass 

The original code was to handle 'sf probe' where it actually creates a
new ad-hoc device (not from the device tree). But I'm happy to drop
this.

- Simon
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Re: [U-Boot] [PATCH 2/3] rockchip: i2c: move register write out of inner loop

[Simon Glass]

On 18 August 2016 at 13:08, John Keeping  wrote:
> There is no point in writing intermediate values to the txdata
> registers.
>
> Also add padding to the debug logging to make it easier to read when
> there are leading zeroes.
>
> Signed-off-by: John Keeping 
> ---
>
>  drivers/i2c/rk_i2c.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 1/2] Disable SPL_MMC_SUPPORT if ROCKCHIP_SPL_BACK_TO_BROM is enabled.

[Simon Glass]

On 29 August 2016 at 05:31, Sandy Patterson  wrote:
> Default SPL_MMC_SUPPORT to false when ROCKCHIP_SPL_BACK_TO_BROM is enabled.
>
> Acked-by: Ziyuan Xu 
> Signed-off-by: Sandy Patterson 
> ---
>
> Changes in v3:
>  - Move activate in rock2_defconfig to proper commit.
>
> Changes in v2:
>  - Rebase after "Kconfig: Move CONFIG_SPL_..._SUPPORT to Kconfig."
>  - Remove all the refactoring in the configs.
>  - Split enabling featuring in rock2 into separate commit.
>
>  arch/arm/mach-rockchip/Kconfig | 3 +++
>  1 file changed, 3 insertions(+)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 2/2] Enable ROCKCHIP_SPL_BACK_TO_BROM for rock2 board

[Simon Glass]

On 29 August 2016 at 05:31, Sandy Patterson  wrote:
> Rock2 has been tested with back to brom feature. The tricky part is that
> with this feature the default environment is inside u-boot, and it's
> defined for every rk3288 board independetly. So I just changed it for
> rock2 here if ROCKCHIP_SPL_BACK_TO_BROM.
>
> Solve by moving environment after u-boot before 1M boundary
>
> Signed-off-by: Sandy Patterson 
> ---
>
> Changes in v3:
>  - Move activate in rock2_defconfig to proper commit.
>  - Make environment changes dependent on ROCKCHIP_SPL_BACK_TO_BROM.
>
> Changes in v2: None
>
>  configs/rock2_defconfig | 2 +-
>  include/configs/rock2.h | 9 +
>  2 files changed, 10 insertions(+), 1 deletion(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 1/3] rockchip: i2c: use named constant when appropriate

[Simon Glass]

On 18 August 2016 at 13:08, John Keeping  wrote:
> Make it clear that we are using the same value in two adjacent lines.
>
> Signed-off-by: John Keeping 
> ---
>
>  drivers/i2c/rk_i2c.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 13/13] ext4: initialize full inode for inodes bigger than 128 bytes

[Stefan Bruens]

On Sonntag, 28. August 2016 22:42:38 CEST you wrote:
> Make sure the the extra_isize field (offset 128) is initialized to 0 to
> mark any extra data as invalid.
> 
> Signed-off-by: Stefan Brüns 
> ---
>  fs/ext4/ext4_write.c | 12 +---
>  1 file changed, 5 insertions(+), 7 deletions(-)
> 
> v3: Patch added to series
> 
> diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
> index 81a750b..38fbf68 100644
> --- a/fs/ext4/ext4_write.c
> +++ b/fs/ext4/ext4_write.c
> @@ -454,7 +454,7 @@ static int ext4fs_delete_file(int inodeno)
>   node_inode->data = ext4fs_root;
>   node_inode->ino = inodeno;
>   node_inode->inode_read = 0;
> - memcpy(&(node_inode->inode), , sizeof(struct ext2_inode));
> + memcpy(&(node_inode->inode), , fs->inodesz);
This line is actually broken, node_inode->inode is sizeof(struct ext2_inode), 
i.e 128 bytes. It is responsible for the crash Thomas reported.

Kind regards,

Stefan 
-- 
Stefan Brüns  /  Bergstraße 21  /  52062 Aachen
home: +49 241 53809034 mobile: +49 151 50412019
work: +49 2405 49936-424
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Re: [U-Boot] [PATCH v3 7/7] config: evb-rk3399: enable fixed regulator

[Simon Glass]

On 23 August 2016 at 22:02, Kever Yang  wrote:
> This patch enable fixed regulator driver for rk3399 evb.
>
> Signed-off-by: Kever Yang 
> Acked-by: Simon Glass 
> ---
>
> Changes in v3: None
> Changes in v2:
> - add Acked-by Tag from Simon
>
>  configs/evb-rk3399_defconfig | 2 ++
>  1 file changed, 2 insertions(+)

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH v4 1/4] rk3399: add a empty "sys_proto.h" header file

[Simon Glass]

On 31 August 2016 at 20:14, Kever Yang  wrote:
> driver/usb/dwc3/gadget.c need a "sys_proto.h" header file, add a
> empty one to make compile success.
>
> Signed-off-by: Kever Yang 
> Acked-by: Simon Glass 
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
>  arch/arm/include/asm/arch-rockchip/sys_proto.h | 10 ++
>  1 file changed, 10 insertions(+)
>  create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [RFC PATCH] rockchip: rk3288: skip lowlevel_init process

[Simon Glass]

On 27 August 2016 at 10:06, Simon Glass  wrote:
> On 27 August 2016 at 07:53, Ziyuan Xu  wrote:
>> lowlevel_init() is never needed for rk3288, so drop it.
>>
>> Signed-off-by: Ziyuan Xu 
>>
>> ---
>>
>>  arch/arm/mach-rockchip/board.c| 4 
>>  arch/arm/mach-rockchip/rk3288-board-spl.c | 4 
>>  include/configs/rk3288_common.h   | 1 +
>>  3 files changed, 1 insertion(+), 8 deletions(-)
>
> Acked-by: Simon Glass 
>
> Tested on firefly-rk3288:
> Tested-by: Simon Glass 

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH v3 0/7] rk3399: enable host controllers

[Simon Glass]

Hi,

On 23 August 2016 at 22:02, Kever Yang  wrote:
>
> rk3399 evb has two typec port(dwc3 controller) which support dual role
> device with separate GPIO for vbus control and two USB 2.0 host port
> (generic EHCI controller) with one GPIO for vbus control.
>
> This patch set enable all these host controllers and have test with usb
> disk and usb ethernet devices on rk3399 evb.
>
> Note: type-C port only support usb 2.0 currently because the PD driver
> and USB 3.0 phy driver not enabled.
>
>
> Changes in v3:
> - using fdtdec_get_bool and fdtdec_get_int instead of fdt_get_property
> - other update by follow comments from Marek and Simon
> - add Acked-by tag from Simon
>
> Changes in v2:
> - update for comments from Marek
> - use regulator_get_by_platname instead of uclass_get_device_by_name
> - add Acked-by Tag from Simon
>
> Kever Yang (3):
>   dts: rk3399-evb: add regulator-fixed for usb host vbus
>   board: evb-rk3399: enable usb 2.0 host vbus power on board_init
>   config: evb-rk3399: enable fixed regulator
>
> MengDongyang (4):
>   usb: xhci-rockchip: add rockchip dwc3 controller driver
>   rockchip: select DM_USB for rockchip SoC
>   config: rk3399: add usb related configs
>   dts: rk3399: add dwc3_typec node for rk3399
>
>  arch/arm/Kconfig   |   1 +
>  arch/arm/dts/rk3399-evb.dts|  14 +++
>  arch/arm/dts/rk3399.dtsi   |  45 +++
>  board/rockchip/evb_rk3399/evb-rk3399.c |  15 ++-
>  configs/evb-rk3399_defconfig   |   9 ++
>  drivers/usb/host/Makefile  |   1 +
>  drivers/usb/host/xhci-rockchip.c   | 211 
> +
>  include/configs/rk3399_common.h|  13 ++
>  include/linux/usb/dwc3.h   |  14 +++
>  9 files changed, 322 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/usb/host/xhci-rockchip.c
>
> --
> 1.9.1
>

No more comments and it has been almost two weeks, so I'm going to merge this.

Regards,
Simon
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Re: [U-Boot] [PATCH v3 6/7] board: evb-rk3399: enable usb 2.0 host vbus power on board_init

[Simon Glass]

On 23 August 2016 at 22:02, Kever Yang  wrote:
> rk3399 using one gpio control signal for two usb 2.0 host port,
> it's better to enable the power in board file instead of in usb driver.
>
> Signed-off-by: Kever Yang 
> Acked-by: Simon Glass 
> ---
>
> Changes in v3:
> - add Acked-by tag from Simon
>
> Changes in v2:
> - use regulator_get_by_platname instead of uclass_get_device_by_name
>
>  board/rockchip/evb_rk3399/evb-rk3399.c | 15 ++-
>  1 file changed, 14 insertions(+), 1 deletion(-)

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH v3 1/7] usb: xhci-rockchip: add rockchip dwc3 controller driver

[Simon Glass]

On 25 August 2016 at 06:04, Simon Glass  wrote:
> On 23 August 2016 at 22:02, Kever Yang  wrote:
>> From: MengDongyang 
>>
>> This patch add support for rockchip dwc3 controller, which corresponding
>> to the two type-C port on rk3399 evb.
>> Only support usb2.0 currently for we have not enable the usb3.0 phy
>> driver and PD(fusb302) driver.
>>
>> Signed-off-by: MengDongyang 
>> Signed-off-by: Kever Yang 
>> ---
>>
>> Changes in v3:
>> - using fdtdec_get_bool and fdtdec_get_int instead of fdt_get_property
>> - other update by follow comments from Marek and Simon
>>
>> Changes in v2:
>> - update for comments from Marek
>>
>>  drivers/usb/host/Makefile|   1 +
>>  drivers/usb/host/xhci-rockchip.c | 211 
>> +++
>>  include/linux/usb/dwc3.h |  14 +++
>>  3 files changed, 226 insertions(+)
>>  create mode 100644 drivers/usb/host/xhci-rockchip.c
>
> Reviewed-by: Simon Glass 

This series is in my queue so I will apply it.

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH v3 2/7] rockchip: select DM_USB for rockchip SoC

[Simon Glass]

On 23 August 2016 at 22:02, Kever Yang  wrote:
> From: MengDongyang 
>
> Select DM_USB to compatible with USB DM driver model.
>
> Signed-off-by: MengDongyang 
> Signed-off-by: Kever Yang 
> Acked-by: Simon Glass 
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>  arch/arm/Kconfig | 1 +
>  1 file changed, 1 insertion(+)

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH v3 3/7] config: rk3399: add usb related configs

[Simon Glass]

On 23 August 2016 at 22:02, Kever Yang  wrote:
> From: MengDongyang 
>
> This patch to enable configs for usb module
> - xhci
> - ehci
> - usb storage
> - usb net
>
> Signed-off-by: MengDongyang 
> Signed-off-by: Kever Yang 
> Acked-by: Simon Glass 
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>  configs/evb-rk3399_defconfig|  7 +++
>  include/configs/rk3399_common.h | 13 +
>  2 files changed, 20 insertions(+)

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH v3 4/7] dts: rk3399: add dwc3_typec node for rk3399

[Simon Glass]

On 23 August 2016 at 22:02, Kever Yang  wrote:
> From: MengDongyang 
>
> rk3399 has two dwc3 controller for type-C port, add the dts node
> and enable them.
>
> Signed-off-by: MengDongyang 
> Signed-off-by: Kever Yang 
> Acked-by: Simon Glass 
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>  arch/arm/dts/rk3399-evb.dts |  8 
>  arch/arm/dts/rk3399.dtsi| 45 
> +
>  2 files changed, 53 insertions(+)

Applied to u-boot-rockchip/next, thanks!
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Re: [U-Boot] [PATCH v3 5/7] dts: rk3399-evb: add regulator-fixed for usb host vbus

[Simon Glass]

On 23 August 2016 at 22:02, Kever Yang  wrote:
> rk3399 evb using one gpio to enable 5V output for both USB 2.0
> host port, let's use fixed regulator for them.
>
> Signed-off-by: Kever Yang 
> Acked-by: Simon Glass 
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>  arch/arm/dts/rk3399-evb.dts | 6 ++
>  1 file changed, 6 insertions(+)

Applied to u-boot-rockchip/next, thanks!
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[U-Boot] [PATCH v2 0/7] Clean-up: squash lines for immediate return

[Masahiro Yamada]

ret = [expression];
if (ret)
return ret;

return 0;

...  is equivalent to:

return [expression];

First, I sent a tree-wide patch:
http://patchwork.ozlabs.org/patch/665199/

In the review of v1, Stephen suggested that
twee-wide conversion with something like Coccinelle
can break code uniformity.
I took a closer look once again, I found many hunks
we should not change.

So, here is v2.

I limited this refactoring to cases, I think, really
beneficial.
(Mostly, they well be simple wrappers with this series.)

I also split patches per-subsystem
so that custodians can easily review and issue Acked-by
(or NACK if they found no good reason to change).



Masahiro Yamada (7):
  mmc: squash lines for immediate return
  video: squash lines for immediate return
  usb: squash lines for immediate return
  x86: squash lines for immediate return
  samsung: squash lines for immediate return
  power: squash lines for immediate return
  libfdt: simplify fdt_del_mem_rsv()

 arch/x86/cpu/baytrail/valleyview.c |  8 +---
 arch/x86/cpu/ivybridge/ivybridge.c |  8 +---
 arch/x86/cpu/qemu/qemu.c   |  8 +---
 arch/x86/cpu/queensbay/tnc.c   |  8 +---
 board/samsung/goni/goni.c  |  8 +---
 drivers/mmc/atmel_sdhci.c  |  7 +--
 drivers/mmc/exynos_dw_mmc.c|  7 +--
 drivers/mmc/mmc_boot.c | 28 
 drivers/mmc/msm_sdhci.c|  7 +--
 drivers/mmc/rockchip_dw_mmc.c  |  7 +--
 drivers/mmc/rockchip_sdhci.c   |  7 +--
 drivers/mmc/sandbox_mmc.c  |  7 +--
 drivers/mmc/zynq_sdhci.c   |  7 +--
 drivers/power/axp809.c |  8 +---
 drivers/usb/host/ehci-atmel.c  |  8 +---
 drivers/usb/host/ehci-fsl.c|  8 +---
 drivers/usb/host/ehci-marvell.c|  8 +---
 drivers/usb/host/ehci-mx6.c|  8 +---
 drivers/usb/host/ehci-pci.c|  8 +---
 drivers/usb/host/ehci-zynq.c   |  8 +---
 drivers/usb/host/xhci-fsl.c|  7 +--
 drivers/video/bridge/ptn3460.c |  7 +--
 drivers/video/tegra124/display.c   |  8 +---
 drivers/video/vidconsole-uclass.c  |  6 +-
 lib/libfdt/fdt_rw.c|  6 +-
 25 files changed, 32 insertions(+), 175 deletions(-)

-- 
1.9.1

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Re: [U-Boot] [PATCH v2 2/7] video: squash lines for immediate return

[Anatolij Gustschin]

On Mon,  5 Sep 2016 22:38:38 +0900
Masahiro Yamada yamada.masah...@socionext.com wrote:

> ptn3460_attach() and display_update_config_from_edid() will become
> a simple wrapper function.
> 
> For vidconsole_post_probe(), it is common coding style to let a
> probe method return the value of a resister function.

s/resister/register/

otherwise

Acked-by: Anatolij Gustschin 
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Re: [U-Boot] [PATCH 06/11] arm: socfpga: misc: Segregate the misc.c for Stratix 10

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Segregate the misc.c to support both GEN5 SoC and Stratix 10 SoC.
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 
> ---
>  arch/arm/mach-socfpga/misc.c | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
> index 5cbd8a4..295121f 100644
> --- a/arch/arm/mach-socfpga/misc.c
> +++ b/arch/arm/mach-socfpga/misc.c
> @@ -24,6 +24,8 @@
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> +#ifdef CONFIG_TARGET_SOCFPGA_GEN5
> +
>  static struct pl310_regs *const pl310 =
>   (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
>  static struct socfpga_system_manager *sysmgr_regs =
> @@ -34,6 +36,7 @@ static struct nic301_registers *nic301_regs =
>   (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS;
>  static struct scu_registers *scu_regs =
>   (struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS;
> +#endif
>  
>  int dram_init(void)
>  {
> @@ -41,6 +44,7 @@ int dram_init(void)
>   return 0;
>  }
>  
> +#ifdef CONFIG_TARGET_SOCFPGA_GEN5
>  void enable_caches(void)
>  {
>  #ifndef CONFIG_SYS_ICACHE_OFF
> @@ -246,6 +250,7 @@ static int socfpga_fpga_id(const bool print_id)
>  socfpga_fpga_model[i].name, version);
>   return i;
>  }
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
>  
>  /*
>   * Print CPU information
> @@ -253,14 +258,20 @@ static int socfpga_fpga_id(const bool print_id)
>  #if defined(CONFIG_DISPLAY_CPUINFO)
>  int print_cpuinfo(void)
>  {
> +#ifdef CONFIG_TARGET_SOCFPGA_GEN5
>   const u32 bsel = readl(_regs->bootinfo) & 0x7;
>   puts("CPU:   Altera SoCFPGA Platform\n");
>   socfpga_fpga_id(1);
>   printf("BOOT:  %s\n", bsel_str[bsel].name);
> +#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
> + puts("CPU:   Altera SoCFPGA Platform\n");
> + puts("FPGA:  Altera Stratix 10\n");
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */

Can't you decode the boot mode and FPGA type instead ?

>   return 0;
>  }
>  #endif
>  
> +#ifdef CONFIG_TARGET_SOCFPGA_GEN5
>  #ifdef CONFIG_ARCH_MISC_INIT
>  int arch_misc_init(void)
>  {
> @@ -469,3 +480,4 @@ U_BOOT_CMD(
>   "bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA 
> bridges\n"
>   ""
>  );
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
> 


-- 
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Re: [U-Boot] [PATCH 11/11] arm: socfpga: Add support for Stratix 10 SoC dev kit

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Add support for Stratix 10 SoC development kit
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 
> ---
>  arch/arm/Kconfig  |   7 +-
>  arch/arm/mach-socfpga/Kconfig |  10 +++
>  configs/socfpga_stratix10_defconfig   |  14 
>  include/configs/socfpga_stratix10_socdk.h | 135 
> ++
>  4 files changed, 163 insertions(+), 3 deletions(-)
>  create mode 100755 configs/socfpga_stratix10_defconfig
>  create mode 100644 include/configs/socfpga_stratix10_socdk.h
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index aef901c..c8e8767 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -600,10 +600,11 @@ config ARCH_SNAPDRAGON
>  
>  config ARCH_SOCFPGA
>   bool "Altera SOCFPGA family"
> - select CPU_V7
> - select SUPPORT_SPL
> + select CPU_V7 if !TARGET_SOCFPGA_STRATIX10
> + select ARM64 if TARGET_SOCFPGA_STRATIX10
> + select SUPPORT_SPL if !TARGET_SOCFPGA_STRATIX10
>   select OF_CONTROL
> - select SPL_OF_CONTROL
> + select SPL_OF_CONTROL if !TARGET_SOCFPGA_STRATIX10

Why is the SPL disabled ?

>   select DM
>   select DM_SPI_FLASH
>   select DM_SPI
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> index 1a43c7b..4e3b238 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -11,6 +11,9 @@ config TARGET_SOCFPGA_CYCLONE5
>  config TARGET_SOCFPGA_GEN5
>   bool
>  
> +config TARGET_SOCFPGA_STRATIX10
> + bool
> +
>  choice
>   prompt "Altera SOCFPGA board select"
>   optional
> @@ -51,6 +54,10 @@ config TARGET_SOCFPGA_TERASIC_SOCKIT
>   bool "Terasic SoCkit (Cyclone V)"
>   select TARGET_SOCFPGA_CYCLONE5
>  
> +config TARGET_SOCFPGA_STRATIX10_SOCDK
> + bool "Altera SOCFPGA SoCDK (Stratix 10)"
> + select TARGET_SOCFPGA_STRATIX10
> +
>  endchoice
>  
>  config SYS_BOARD
> @@ -63,6 +70,7 @@ config SYS_BOARD
>   default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
>   default "sr1500" if TARGET_SOCFPGA_SR1500
>   default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
> + default "stratix10-socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK

Keep all the lists sorted .

>  config SYS_VENDOR
>   default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
> @@ -72,6 +80,7 @@ config SYS_VENDOR
>   default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
>   default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
>   default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
> + default "altera" if TARGET_SOCFPGA_STRATIX10_SOCDK
>  
>  config SYS_SOC
>   default "socfpga"
> @@ -86,5 +95,6 @@ config SYS_CONFIG_NAME
>   default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
>   default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
>   default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
> + default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK
>  
>  endif

[...]

btw. what about Arria 10 ? Will it ever land ?
And will I ever get a kit ? :)

-- 
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Re: [U-Boot] [PATCH 09/11] arm: socfpga: stratix10: Add board folder for Stratix 10 socdk

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Add board folder for Stratix 10 SoC development kit

Directory, this is not Windows :-(

Oh, btw also use "separate", not "segregate", in the previous patches.

> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 
> ---
>  board/altera/stratix10-socdk/MAINTAINERS | 8 
>  board/altera/stratix10-socdk/Makefile| 7 +++
>  board/altera/stratix10-socdk/socfpga.c   | 7 +++
>  3 files changed, 22 insertions(+)
>  create mode 100755 board/altera/stratix10-socdk/MAINTAINERS
>  create mode 100755 board/altera/stratix10-socdk/Makefile
>  create mode 100755 board/altera/stratix10-socdk/socfpga.c
> 
> diff --git a/board/altera/stratix10-socdk/MAINTAINERS 
> b/board/altera/stratix10-socdk/MAINTAINERS
> new file mode 100755
> index 000..06f8989
> --- /dev/null
> +++ b/board/altera/stratix10-socdk/MAINTAINERS
> @@ -0,0 +1,8 @@
> +SOCFPGA BOARD
> +M:   Chin-Liang See 
> +M:   Dinh Nguyen 
> +S:   Maintained
> +F:   board/altera/stratix10-socdk/
> +F:   include/configs/socfpga_stratix10_socdk.h
> +F:   configs/socfpga_stratix10_defconfig
> +
> diff --git a/board/altera/stratix10-socdk/Makefile 
> b/board/altera/stratix10-socdk/Makefile
> new file mode 100755
> index 000..a0c8024
> --- /dev/null
> +++ b/board/altera/stratix10-socdk/Makefile
> @@ -0,0 +1,7 @@
> +#
> +# Copyright (C) 2016, Intel Corporation
> +#
> +# SPDX-License-Identifier:   GPL-2.0
> +#
> +
> +obj-y:= socfpga.o
> diff --git a/board/altera/stratix10-socdk/socfpga.c 
> b/board/altera/stratix10-socdk/socfpga.c
> new file mode 100755
> index 000..6778c04
> --- /dev/null
> +++ b/board/altera/stratix10-socdk/socfpga.c
> @@ -0,0 +1,7 @@
> +/*
> + * Copyright (C) 2016, Intel Corporation
> + *
> + * SPDX-License-Identifier:  GPL-2.0
> + */
> +
> +#include 
> 


-- 
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Re: [U-Boot] [PATCH 02/11] arm: socfpga: rstmgr: Add Reset Manager for Stratix 10

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Add Reset Manager registers structure for Stratix 10 SoC
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 

Acked-by: Marek Vasut 

> ---
>  arch/arm/mach-socfpga/include/mach/reset_manager.h | 32 
> ++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h 
> b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> index 2f070f2..1f868da 100644
> --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> @@ -15,6 +15,7 @@ void socfpga_bridges_reset(int enable);
>  void socfpga_per_reset(u32 reset, int set);
>  void socfpga_per_reset_all(void);
>  
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  struct socfpga_reset_manager {
>   u32 status;
>   u32 ctrl;
> @@ -28,11 +29,42 @@ struct socfpga_reset_manager {
>   u32 padding2[12];
>   u32 tstscratch;
>  };
> +#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
> +struct socfpga_reset_manager {
> + u32 status;
> + u32 mpu_rst_stat;
> + u32 misc_stat;
> + u32 padding1;
> + u32 hdsk_en;
> + u32 hdsk_req;
> + u32 hdsk_ack;
> + u32 hdsk_stall;
> + u32 mpu_mod_reset;
> + u32 per_mod_reset;  /* stated as per0_mod_reset in S10 datasheet */
> + u32 per2_mod_reset; /* stated as per1_mod_reset in S10 datasheet */
> + u32 brg_mod_reset;
> + u32 padding2;
> + u32 cold_mod_reset;
> + u32 padding3;
> + u32 dbg_mod_reset;
> + u32 tap_mod_reset;
> + u32 padding4;
> + u32 padding5;
> + u32 brg_warm_mask;
> + u32 padding6[3];
> + u32 tst_stat;
> + u32 padding7;
> + u32 hdsk_timeout;
> + u32 mpul2flushtimeout;
> + u32 dbghdsktimeout;
> +};
> +#endif
>  
>  #if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
>  #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
>  #else
>  #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
> +#define RSTMGR_MPUMODRST_CORE0 1
>  #endif
>  
>  /*
> 


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Re: [U-Boot] [PATCH 04/11] arm: socfpga: clkmgr: Segregate the Clock Manager for Stratix 10

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Segregate the Clock Manager to support both GEN5 SoC and
> Stratix 10 SoC.
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 
> ---
>  arch/arm/mach-socfpga/clock_manager.c | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/clock_manager.c 
> b/arch/arm/mach-socfpga/clock_manager.c
> index aa71636..0d67b3c 100644
> --- a/arch/arm/mach-socfpga/clock_manager.c
> +++ b/arch/arm/mach-socfpga/clock_manager.c
> @@ -10,6 +10,7 @@
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  static const struct socfpga_clock_manager *clock_manager_base =
>   (struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS;
>  
> @@ -446,9 +447,11 @@ unsigned int cm_get_l4_sp_clk_hz(void)
>  
>   return clock;
>  }
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
>  
>  unsigned int cm_get_mmc_controller_clk_hz(void)
>  {
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>   uint32_t reg, clock = 0;
>  
>   /* identify the source of MMC clock */
> @@ -475,8 +478,12 @@ unsigned int cm_get_mmc_controller_clk_hz(void)
>   /* further divide by 4 as we have fixed divider at wrapper */
>   clock /= 4;
>   return clock;
> +#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
> + return 2500;
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
>  }
>  
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  unsigned int cm_get_qspi_controller_clk_hz(void)

Are you sure this won't cause build breakage ? I believe this is still
used by the cadence qspi driver.

>  {
>   uint32_t reg, clock = 0;
> @@ -556,3 +563,4 @@ U_BOOT_CMD(
>   "display clocks",
>   ""
>  );
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
> 


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Re: [U-Boot] [PATCH 05/11] arm: socfpga: fpgamgr: Segregate the FPGA Manager for Stratix 10

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Segregate the FPGA Manager to support both GEN5 SoC and
> Stratix 10 SoC.
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 
> ---
>  arch/arm/mach-socfpga/fpga_manager.c | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/fpga_manager.c 
> b/arch/arm/mach-socfpga/fpga_manager.c
> index 43fd2fe..a01e062 100644
> --- a/arch/arm/mach-socfpga/fpga_manager.c
> +++ b/arch/arm/mach-socfpga/fpga_manager.c
> @@ -20,6 +20,8 @@ DECLARE_GLOBAL_DATA_PTR;
>  /* Timeout count */
>  #define FPGA_TIMEOUT_CNT 0x100
>  
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> +
>  static struct socfpga_fpga_manager *fpgamgr_regs =
>   (struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
>  
> @@ -76,3 +78,5 @@ int fpgamgr_poll_fpga_ready(void)
>  
>   return 0;
>  }
> +
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
> 
Did you just disable the whole file ? If so, then just don't compile it
at all, just add conditional into the Makefile.

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Re: [U-Boot] [PATCH 07/11] arm: socfpga: sysmgr: Fix casting warning when enabling ARM64

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Fix casting warning to pointer from integer of different size
> when enabling ARM64 support

What sort of error did you observe ?

> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 
> ---
>  arch/arm/mach-socfpga/system_manager.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-socfpga/system_manager.c 
> b/arch/arm/mach-socfpga/system_manager.c
> index 75a65f3..89161bd 100644
> --- a/arch/arm/mach-socfpga/system_manager.c
> +++ b/arch/arm/mach-socfpga/system_manager.c
> @@ -56,7 +56,7 @@ static void populate_sysmgr_fpgaintf_module(void)
>   */
>  void sysmgr_pinmux_init(void)
>  {
> - uint32_t regs = (uint32_t)_regs->emacio[0];
> + uint32_t *regs = (uint32_t *)_regs->emacio[0];
>   const u8 *sys_mgr_init_table;
>   unsigned int len;
>   int i;
> 


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Re: [U-Boot] [PATCH 01/11] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Add base address header file for Stratix10 SoC
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 

Acked-by: Marek Vasut 

> ---
>  arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 48 
> ++
>  1 file changed, 48 insertions(+)
>  create mode 100755 arch/arm/mach-socfpga/include/mach/base_addr_s10.h
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h 
> b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
> new file mode 100755
> index 000..cd29a59
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
> @@ -0,0 +1,48 @@
> +/*
> + * Copyright (C) 2016, Intel Corporation
> + *
> + * SPDX-License-Identifier:  GPL-2.0
> + */
> +
> +#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_
> +#define _SOCFPGA_S10_BASE_HARDWARE_H_
> +
> +#define SOCFPGA_SMMU_ADDRESS 0xfa00
> +#define SOCFPGA_EMAC0_ADDRESS0xff80
> +#define SOCFPGA_EMAC1_ADDRESS0xff802000
> +#define SOCFPGA_EMAC2_ADDRESS0xff804000
> +#define SOCFPGA_SDMMC_ADDRESS0xff808000
> +#define SOCFPGA_USB0_ADDRESS 0xffb0
> +#define SOCFPGA_USB1_ADDRESS 0xffb4
> +#define SOCFPGA_NANDREGS_ADDRESS 0xffb8
> +#define SOCFPGA_NANDDATA_ADDRESS 0xffb9
> +#define SOCFPGA_UART0_ADDRESS0xffc02000
> +#define SOCFPGA_UART1_ADDRESS0xffc02100
> +#define SOCFPGA_I2C0_ADDRESS 0xffc02800
> +#define SOCFPGA_I2C1_ADDRESS 0xffc02900
> +#define SOCFPGA_I2C2_ADDRESS 0xffc02a00
> +#define SOCFPGA_I2C3_ADDRESS 0xffc02b00
> +#define SOCFPGA_I2C4_ADDRESS 0xffc02c00
> +#define SOCFPGA_SPTIMER0_ADDRESS 0xffc03000
> +#define SOCFPGA_SPTIMER1_ADDRESS 0xffc03100
> +#define SOCFPGA_GPIO0_ADDRESS0xffc03200
> +#define SOCFPGA_GPIO1_ADDRESS0xffc03300
> +#define SOCFPGA_SYSTIMER0_ADDRESS0xffd0
> +#define SOCFPGA_SYSTIMER1_ADDRESS0xffd00100
> +#define SOCFPGA_L4WD0_ADDRESS0xffd00200
> +#define SOCFPGA_L4WD1_ADDRESS0xffd00300
> +#define SOCFPGA_L4WD2_ADDRESS0xffd00400
> +#define SOCFPGA_L4WD3_ADDRESS0xffd00500
> +#define SOCFPGA_CLKMGR_ADDRESS   0xffd1
> +#define SOCFPGA_RSTMGR_ADDRESS   0xffd11000
> +#define SOCFPGA_SYSMGR_ADDRESS   0xffd12000
> +#define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS  0xffd13000
> +#define SOCFPGA_DMANONSECURE_ADDRESS 0xffda
> +#define SOCFPGA_DMASECURE_ADDRESS0xffda1000
> +#define SOCFPGA_SPIS0_ADDRESS0xffda2000
> +#define SOCFPGA_SPIS1_ADDRESS0xffda3000
> +#define SOCFPGA_SPIM0_ADDRESS0xffda4000
> +#define SOCFPGA_SPIM1_ADDRESS0xffda5000
> +#define SOCFPGA_OCRAM_ADDRESS0xffe0
> +
> +#endif /* _SOCFPGA_S10_BASE_HARDWARE_H_ */
> 


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Re: [U-Boot] [PATCH 10/11] arm: dts: socfpga: Add dts for Stratix 10 socdk

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Add device tree for Stratix 10 SoC development kit
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 

Acked-by: Marek Vasut 

> ---
>  arch/arm/dts/Makefile|  3 +-
>  arch/arm/dts/socfpga_stratix10_socdk.dts | 64 
> 
>  2 files changed, 66 insertions(+), 1 deletion(-)
>  create mode 100755 arch/arm/dts/socfpga_stratix10_socdk.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 223124e..c5e2d3c 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -127,7 +127,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += 
> \
>   socfpga_cyclone5_sockit.dtb \
>   socfpga_cyclone5_socrates.dtb   \
>   socfpga_cyclone5_sr1500.dtb \
> - socfpga_cyclone5_vining_fpga.dtb
> + socfpga_cyclone5_vining_fpga.dtb\
> + socfpga_stratix10_socdk.dtb
>  
>  dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb
>  dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
> diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts 
> b/arch/arm/dts/socfpga_stratix10_socdk.dts
> new file mode 100755
> index 000..7a662ee
> --- /dev/null
> +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
> @@ -0,0 +1,64 @@
> +/*
> + *  Copyright (C) 2016 Intel Corporation
> + *
> + * SPDX-License-Identifier:  GPL-2.0
> + */
> +
> +/dts-v1/;
> +/* First 4KB has trampoline code for secondary cores. */
> +/memreserve/ 0x 0x0001000;
> +#include "skeleton.dtsi"
> +
> +/ {
> + model = "Altera SOCFPGA Stratix 10 SoC Development Kit";
> + compatible = "altr,socfpga-stratix10", "altr,socfpga";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen {
> + bootargs = "console=ttyS0,115200";
> + };
> +
> + memory {
> + name = "memory";
> + device_type = "memory";
> + reg = <0x0 0x4000>; /* 1GB */
> + };
> +
> + regulator_3_3v: 3-3-v-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "3.3V";
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + };
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "simple-bus";
> + device_type = "soc";
> + ranges;
> +
> + mmc0: dwmmc0@0xff808000 {
> + compatible = "altr,socfpga-dw-mshc";
> + reg = <0xff808000 0x1000>;
> + interrupts = <0 139 4>;
> + num-slots = <1>;
> + broken-cd;
> + bus-width = <4>;
> + fifo-depth = <0x400>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cap-mmc-highspeed;
> + cap-sd-highspeed;
> + drvsel = <3>;
> + smplsel = <0>;
> + status = "okay";
> + u-boot,dm-pre-reloc;
> + vmmc-supply = <_3_3v>;
> + vqmmc-supply = <_3_3v>;
> + };
> + };
> +};
> +
> 


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Re: [U-Boot] [PATCH 03/11] arm: socfpga: rstmgr: Segregate the Reset Manager for Stratix 10

[Marek Vasut]

On 08/22/2016 05:02 PM, Chin Liang See wrote:
> Segregate the Reset Manager to support both GEN5 SoC and
> Stratix 10 SoC.
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ley Foon Tan 

Acked-by: Marek Vasut 

> ---
>  arch/arm/mach-socfpga/reset_manager.c | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/reset_manager.c 
> b/arch/arm/mach-socfpga/reset_manager.c
> index b6beaa2..0fa5f1a 100644
> --- a/arch/arm/mach-socfpga/reset_manager.c
> +++ b/arch/arm/mach-socfpga/reset_manager.c
> @@ -15,8 +15,10 @@ DECLARE_GLOBAL_DATA_PTR;
>  
>  static const struct socfpga_reset_manager *reset_manager_base =
>   (void *)SOCFPGA_RSTMGR_ADDRESS;
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  static struct socfpga_system_manager *sysmgr_regs =
>   (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5) */
>  
>  /* Assert or de-assert SoCFPGA reset manager reset. */
>  void socfpga_per_reset(u32 reset, int set)
> @@ -31,8 +33,10 @@ void socfpga_per_reset(u32 reset, int set)
>   reg = _manager_base->per2_mod_reset;
>   else if (RSTMGR_BANK(reset) == 3)
>   reg = _manager_base->brg_mod_reset;
> +#ifdef CONFIG_TARGET_SOCFPGA_GEN5
>   else if (RSTMGR_BANK(reset) == 4)
>   reg = _manager_base->misc_mod_reset;
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5) */
>   else/* Invalid reset register, do nothing */
>   return;
>  
> @@ -60,9 +64,15 @@ void socfpga_per_reset_all(void)
>   */
>  void reset_cpu(ulong addr)
>  {
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>   /* request a warm reset */
>   writel((1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB),
>   _manager_base->ctrl);
> +#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
> + writel((1 << RSTMGR_MPUMODRST_CORE0),
> + _manager_base->mpu_mod_reset);
> +#endif
> +
>   /*
>* infinite loop here as watchdog will trigger and reset
>* the processor
> @@ -92,6 +102,7 @@ void socfpga_bridges_reset(int enable)
>  
>  void socfpga_bridges_reset(int enable)
>  {
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>   const uint32_t l3mask = L3REGS_REMAP_LWHPS2FPGA_MASK |
>   L3REGS_REMAP_HPS2FPGA_MASK |
>   L3REGS_REMAP_OCRAM_MASK;
> @@ -116,5 +127,6 @@ void socfpga_bridges_reset(int enable)
>   /* Remap the bridges into memory map */
>   writel(l3mask, SOCFPGA_L3REGS_ADDRESS);
>   }
> +#endif /* CONFIG_TARGET_SOCFPGA_GEN5) */
>  }
>  #endif
> 


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[U-Boot] [PATCH 08/11] arm: socfpga: mmu: Add memory map layout for Stratix 10 SoC

[Chin Liang See]

Add memory map layout for Stratix 10 SoC

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/mach-socfpga/Makefile|  2 ++
 arch/arm/mach-socfpga/mmu-arm64.c | 71 +++
 2 files changed, 73 insertions(+)
 create mode 100755 arch/arm/mach-socfpga/mmu-arm64.c

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 809cd47..af1cc01 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -12,6 +12,8 @@ obj-y += misc.o timer.o reset_manager.o system_manager.o 
clock_manager.o \
 
 obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
 
+obj-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += mmu-arm64.o
+
 # QTS-generated config file wrappers
 obj-$(CONFIG_TARGET_SOCFPGA_GEN5)  += scan_manager.o wrap_pll_config.o
 obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o wrap_pinmux_config.o\
diff --git a/arch/arm/mach-socfpga/mmu-arm64.c 
b/arch/arm/mach-socfpga/mmu-arm64.c
new file mode 100755
index 000..3b73143
--- /dev/null
+++ b/arch/arm/mach-socfpga/mmu-arm64.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2016, Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct mm_region socfpga_stratix10_mem_map[] = {
+   {
+   /* MEM 2GB*/
+   .virt   = 0x0UL,
+   .phys   = 0x0UL,
+   .size   = 0x8000UL,
+   .attrs  = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+   PTE_BLOCK_INNER_SHARE,
+   }, {
+   /* FPGA 1.5GB */
+   .virt   = 0x8000UL,
+   .phys   = 0x8000UL,
+   .size   = 0x6000UL,
+   .attrs  = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+   PTE_BLOCK_NON_SHARE |
+   PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+   }, {
+   /* DEVICE 142MB */
+   .virt   = 0xF700UL,
+   .phys   = 0xF700UL,
+   .size   = 0x08E0UL,
+   .attrs  = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+   PTE_BLOCK_NON_SHARE |
+   PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+   }, {
+   /* OCRAM 1MB but available 256KB */
+   .virt   = 0xFFE0UL,
+   .phys   = 0xFFE0UL,
+   .size   = 0x0010UL,
+   .attrs  = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+   PTE_BLOCK_INNER_SHARE,
+   }, {
+   /* DEVICE 32KB */
+   .virt   = 0xFFFCUL,
+   .phys   = 0xFFFCUL,
+   .size   = 0x8000UL,
+   .attrs  = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+   PTE_BLOCK_NON_SHARE |
+   PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+   }, {
+   /* MEM 124GB */
+   .virt   = 0x01UL,
+   .phys   = 0x01UL,
+   .size   = 0x1FUL,
+   .attrs  = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+   PTE_BLOCK_INNER_SHARE,
+   }, {
+   /* DEVICE 4GB */
+   .virt   = 0x20UL,
+   .phys   = 0x20UL,
+   .size   = 0x01UL,
+   .attrs  = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+   PTE_BLOCK_NON_SHARE |
+   PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+   }, {
+   /* List terminator */
+   },
+};
+
+struct mm_region *mem_map = socfpga_stratix10_mem_map;
-- 
2.2.2

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[U-Boot] [PATCH 11/11] arm: socfpga: Add support for Stratix 10 SoC dev kit

[Chin Liang See]

Add support for Stratix 10 SoC development kit

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/Kconfig  |   7 +-
 arch/arm/mach-socfpga/Kconfig |  10 +++
 configs/socfpga_stratix10_defconfig   |  14 
 include/configs/socfpga_stratix10_socdk.h | 135 ++
 4 files changed, 163 insertions(+), 3 deletions(-)
 create mode 100755 configs/socfpga_stratix10_defconfig
 create mode 100644 include/configs/socfpga_stratix10_socdk.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index aef901c..c8e8767 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -600,10 +600,11 @@ config ARCH_SNAPDRAGON
 
 config ARCH_SOCFPGA
bool "Altera SOCFPGA family"
-   select CPU_V7
-   select SUPPORT_SPL
+   select CPU_V7 if !TARGET_SOCFPGA_STRATIX10
+   select ARM64 if TARGET_SOCFPGA_STRATIX10
+   select SUPPORT_SPL if !TARGET_SOCFPGA_STRATIX10
select OF_CONTROL
-   select SPL_OF_CONTROL
+   select SPL_OF_CONTROL if !TARGET_SOCFPGA_STRATIX10
select DM
select DM_SPI_FLASH
select DM_SPI
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 1a43c7b..4e3b238 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -11,6 +11,9 @@ config TARGET_SOCFPGA_CYCLONE5
 config TARGET_SOCFPGA_GEN5
bool
 
+config TARGET_SOCFPGA_STRATIX10
+   bool
+
 choice
prompt "Altera SOCFPGA board select"
optional
@@ -51,6 +54,10 @@ config TARGET_SOCFPGA_TERASIC_SOCKIT
bool "Terasic SoCkit (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
 
+config TARGET_SOCFPGA_STRATIX10_SOCDK
+   bool "Altera SOCFPGA SoCDK (Stratix 10)"
+   select TARGET_SOCFPGA_STRATIX10
+
 endchoice
 
 config SYS_BOARD
@@ -63,6 +70,7 @@ config SYS_BOARD
default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
default "sr1500" if TARGET_SOCFPGA_SR1500
default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
+   default "stratix10-socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK
 
 config SYS_VENDOR
default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
@@ -72,6 +80,7 @@ config SYS_VENDOR
default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
+   default "altera" if TARGET_SOCFPGA_STRATIX10_SOCDK
 
 config SYS_SOC
default "socfpga"
@@ -86,5 +95,6 @@ config SYS_CONFIG_NAME
default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
+   default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK
 
 endif
diff --git a/configs/socfpga_stratix10_defconfig 
b/configs/socfpga_stratix10_defconfig
new file mode 100755
index 000..b17eb92
--- /dev/null
+++ b/configs/socfpga_stratix10_defconfig
@@ -0,0 +1,14 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_TARGET_SOCFPGA_STRATIX10=y
+CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
+CONFIG_SYS_NS16550=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_CMD_MMC=y
+CONFIG_DM_MMC=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_USE_TINY_PRINTF=y
diff --git a/include/configs/socfpga_stratix10_socdk.h 
b/include/configs/socfpga_stratix10_socdk.h
new file mode 100644
index 000..758c995
--- /dev/null
+++ b/include/configs/socfpga_stratix10_socdk.h
@@ -0,0 +1,135 @@
+/*
+ * Copyright (C) 2016, Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#ifndef __CONFIG_SOCFGPA_STRATIX10_H__
+#define __CONFIG_SOCFGPA_STRATIX10_H__
+
+#include 
+
+/*
+ * U-Boot general configurations
+ */
+#define CONFIG_SYS_TEXT_BASE   0x100
+#define CONFIG_SYS_MONITOR_BASECONFIG_SYS_TEXT_BASE
+#define CONFIG_LOADADDR0x8
+#define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
+#define CONFIG_REMAKE_ELF
+# define COUNTER_FREQUENCY 0x0180
+
+
+/*
+ * U-Boot console configurations
+ */
+#define CONFIG_IDENT_STRING"socfpga_stratix10"
+#define CONFIG_SYS_MAXARGS 64
+#define CONFIG_SYS_CBSIZE  2048
+#define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + \
+   sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_FAT_WRITE
+#define CONFIG_DOS_PARTITION
+
+
+/*
+ * U-Boot run time memory configurations
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR   0xFFE0
+#define CONFIG_SYS_INIT_RAM_SIZE   0x4
+#define CONFIG_SYS_INIT_SP_OFFSET  \
+   

[U-Boot] [PATCH 10/11] arm: dts: socfpga: Add dts for Stratix 10 socdk

[Chin Liang See]

Add device tree for Stratix 10 SoC development kit

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/dts/Makefile|  3 +-
 arch/arm/dts/socfpga_stratix10_socdk.dts | 64 
 2 files changed, 66 insertions(+), 1 deletion(-)
 create mode 100755 arch/arm/dts/socfpga_stratix10_socdk.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 223124e..c5e2d3c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -127,7 +127,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=   
\
socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb   \
socfpga_cyclone5_sr1500.dtb \
-   socfpga_cyclone5_vining_fpga.dtb
+   socfpga_cyclone5_vining_fpga.dtb\
+   socfpga_stratix10_socdk.dtb
 
 dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb
 dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts 
b/arch/arm/dts/socfpga_stratix10_socdk.dts
new file mode 100755
index 000..7a662ee
--- /dev/null
+++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
@@ -0,0 +1,64 @@
+/*
+ *  Copyright (C) 2016 Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+/dts-v1/;
+/* First 4KB has trampoline code for secondary cores. */
+/memreserve/ 0x 0x0001000;
+#include "skeleton.dtsi"
+
+/ {
+   model = "Altera SOCFPGA Stratix 10 SoC Development Kit";
+   compatible = "altr,socfpga-stratix10", "altr,socfpga";
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   chosen {
+   bootargs = "console=ttyS0,115200";
+   };
+
+   memory {
+   name = "memory";
+   device_type = "memory";
+   reg = <0x0 0x4000>; /* 1GB */
+   };
+
+   regulator_3_3v: 3-3-v-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   soc {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "simple-bus";
+   device_type = "soc";
+   ranges;
+
+   mmc0: dwmmc0@0xff808000 {
+   compatible = "altr,socfpga-dw-mshc";
+   reg = <0xff808000 0x1000>;
+   interrupts = <0 139 4>;
+   num-slots = <1>;
+   broken-cd;
+   bus-width = <4>;
+   fifo-depth = <0x400>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cap-mmc-highspeed;
+   cap-sd-highspeed;
+   drvsel = <3>;
+   smplsel = <0>;
+   status = "okay";
+   u-boot,dm-pre-reloc;
+   vmmc-supply = <_3_3v>;
+   vqmmc-supply = <_3_3v>;
+   };
+   };
+};
+
-- 
2.2.2

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[U-Boot] [PATCH 09/11] arm: socfpga: stratix10: Add board folder for Stratix 10 socdk

[Chin Liang See]

Add board folder for Stratix 10 SoC development kit

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 board/altera/stratix10-socdk/MAINTAINERS | 8 
 board/altera/stratix10-socdk/Makefile| 7 +++
 board/altera/stratix10-socdk/socfpga.c   | 7 +++
 3 files changed, 22 insertions(+)
 create mode 100755 board/altera/stratix10-socdk/MAINTAINERS
 create mode 100755 board/altera/stratix10-socdk/Makefile
 create mode 100755 board/altera/stratix10-socdk/socfpga.c

diff --git a/board/altera/stratix10-socdk/MAINTAINERS 
b/board/altera/stratix10-socdk/MAINTAINERS
new file mode 100755
index 000..06f8989
--- /dev/null
+++ b/board/altera/stratix10-socdk/MAINTAINERS
@@ -0,0 +1,8 @@
+SOCFPGA BOARD
+M: Chin-Liang See 
+M: Dinh Nguyen 
+S: Maintained
+F: board/altera/stratix10-socdk/
+F: include/configs/socfpga_stratix10_socdk.h
+F: configs/socfpga_stratix10_defconfig
+
diff --git a/board/altera/stratix10-socdk/Makefile 
b/board/altera/stratix10-socdk/Makefile
new file mode 100755
index 000..a0c8024
--- /dev/null
+++ b/board/altera/stratix10-socdk/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2016, Intel Corporation
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-y  := socfpga.o
diff --git a/board/altera/stratix10-socdk/socfpga.c 
b/board/altera/stratix10-socdk/socfpga.c
new file mode 100755
index 000..6778c04
--- /dev/null
+++ b/board/altera/stratix10-socdk/socfpga.c
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2016, Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
-- 
2.2.2

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[U-Boot] [PATCH 06/11] arm: socfpga: misc: Segregate the misc.c for Stratix 10

[Chin Liang See]

Segregate the misc.c to support both GEN5 SoC and Stratix 10 SoC.

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/mach-socfpga/misc.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 5cbd8a4..295121f 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -24,6 +24,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
+
 static struct pl310_regs *const pl310 =
(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
 static struct socfpga_system_manager *sysmgr_regs =
@@ -34,6 +36,7 @@ static struct nic301_registers *nic301_regs =
(struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS;
 static struct scu_registers *scu_regs =
(struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS;
+#endif
 
 int dram_init(void)
 {
@@ -41,6 +44,7 @@ int dram_init(void)
return 0;
 }
 
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
 void enable_caches(void)
 {
 #ifndef CONFIG_SYS_ICACHE_OFF
@@ -246,6 +250,7 @@ static int socfpga_fpga_id(const bool print_id)
   socfpga_fpga_model[i].name, version);
return i;
 }
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
 
 /*
  * Print CPU information
@@ -253,14 +258,20 @@ static int socfpga_fpga_id(const bool print_id)
 #if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo(void)
 {
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
const u32 bsel = readl(_regs->bootinfo) & 0x7;
puts("CPU:   Altera SoCFPGA Platform\n");
socfpga_fpga_id(1);
printf("BOOT:  %s\n", bsel_str[bsel].name);
+#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+   puts("CPU:   Altera SoCFPGA Platform\n");
+   puts("FPGA:  Altera Stratix 10\n");
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
return 0;
 }
 #endif
 
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
 #ifdef CONFIG_ARCH_MISC_INIT
 int arch_misc_init(void)
 {
@@ -469,3 +480,4 @@ U_BOOT_CMD(
"bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA 
bridges\n"
""
 );
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
-- 
2.2.2

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[U-Boot] [PATCH 07/11] arm: socfpga: sysmgr: Fix casting warning when enabling ARM64

[Chin Liang See]

Fix casting warning to pointer from integer of different size
when enabling ARM64 support

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/mach-socfpga/system_manager.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/system_manager.c 
b/arch/arm/mach-socfpga/system_manager.c
index 75a65f3..89161bd 100644
--- a/arch/arm/mach-socfpga/system_manager.c
+++ b/arch/arm/mach-socfpga/system_manager.c
@@ -56,7 +56,7 @@ static void populate_sysmgr_fpgaintf_module(void)
  */
 void sysmgr_pinmux_init(void)
 {
-   uint32_t regs = (uint32_t)_regs->emacio[0];
+   uint32_t *regs = (uint32_t *)_regs->emacio[0];
const u8 *sys_mgr_init_table;
unsigned int len;
int i;
-- 
2.2.2

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[U-Boot] [PATCH 05/11] arm: socfpga: fpgamgr: Segregate the FPGA Manager for Stratix 10

[Chin Liang See]

Segregate the FPGA Manager to support both GEN5 SoC and
Stratix 10 SoC.

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/mach-socfpga/fpga_manager.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-socfpga/fpga_manager.c 
b/arch/arm/mach-socfpga/fpga_manager.c
index 43fd2fe..a01e062 100644
--- a/arch/arm/mach-socfpga/fpga_manager.c
+++ b/arch/arm/mach-socfpga/fpga_manager.c
@@ -20,6 +20,8 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Timeout count */
 #define FPGA_TIMEOUT_CNT   0x100
 
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
+
 static struct socfpga_fpga_manager *fpgamgr_regs =
(struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
 
@@ -76,3 +78,5 @@ int fpgamgr_poll_fpga_ready(void)
 
return 0;
 }
+
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
-- 
2.2.2

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[U-Boot] [PATCH 04/11] arm: socfpga: clkmgr: Segregate the Clock Manager for Stratix 10

[Chin Liang See]

Segregate the Clock Manager to support both GEN5 SoC and
Stratix 10 SoC.

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/mach-socfpga/clock_manager.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/mach-socfpga/clock_manager.c 
b/arch/arm/mach-socfpga/clock_manager.c
index aa71636..0d67b3c 100644
--- a/arch/arm/mach-socfpga/clock_manager.c
+++ b/arch/arm/mach-socfpga/clock_manager.c
@@ -10,6 +10,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 static const struct socfpga_clock_manager *clock_manager_base =
(struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS;
 
@@ -446,9 +447,11 @@ unsigned int cm_get_l4_sp_clk_hz(void)
 
return clock;
 }
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
 
 unsigned int cm_get_mmc_controller_clk_hz(void)
 {
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
uint32_t reg, clock = 0;
 
/* identify the source of MMC clock */
@@ -475,8 +478,12 @@ unsigned int cm_get_mmc_controller_clk_hz(void)
/* further divide by 4 as we have fixed divider at wrapper */
clock /= 4;
return clock;
+#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+   return 2500;
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
 }
 
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 unsigned int cm_get_qspi_controller_clk_hz(void)
 {
uint32_t reg, clock = 0;
@@ -556,3 +563,4 @@ U_BOOT_CMD(
"display clocks",
""
 );
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
-- 
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[U-Boot] [PATCH 03/11] arm: socfpga: rstmgr: Segregate the Reset Manager for Stratix 10

[Chin Liang See]

Segregate the Reset Manager to support both GEN5 SoC and
Stratix 10 SoC.

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/mach-socfpga/reset_manager.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mach-socfpga/reset_manager.c 
b/arch/arm/mach-socfpga/reset_manager.c
index b6beaa2..0fa5f1a 100644
--- a/arch/arm/mach-socfpga/reset_manager.c
+++ b/arch/arm/mach-socfpga/reset_manager.c
@@ -15,8 +15,10 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static const struct socfpga_reset_manager *reset_manager_base =
(void *)SOCFPGA_RSTMGR_ADDRESS;
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 static struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5) */
 
 /* Assert or de-assert SoCFPGA reset manager reset. */
 void socfpga_per_reset(u32 reset, int set)
@@ -31,8 +33,10 @@ void socfpga_per_reset(u32 reset, int set)
reg = _manager_base->per2_mod_reset;
else if (RSTMGR_BANK(reset) == 3)
reg = _manager_base->brg_mod_reset;
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
else if (RSTMGR_BANK(reset) == 4)
reg = _manager_base->misc_mod_reset;
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5) */
else/* Invalid reset register, do nothing */
return;
 
@@ -60,9 +64,15 @@ void socfpga_per_reset_all(void)
  */
 void reset_cpu(ulong addr)
 {
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
/* request a warm reset */
writel((1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB),
_manager_base->ctrl);
+#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+   writel((1 << RSTMGR_MPUMODRST_CORE0),
+   _manager_base->mpu_mod_reset);
+#endif
+
/*
 * infinite loop here as watchdog will trigger and reset
 * the processor
@@ -92,6 +102,7 @@ void socfpga_bridges_reset(int enable)
 
 void socfpga_bridges_reset(int enable)
 {
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
const uint32_t l3mask = L3REGS_REMAP_LWHPS2FPGA_MASK |
L3REGS_REMAP_HPS2FPGA_MASK |
L3REGS_REMAP_OCRAM_MASK;
@@ -116,5 +127,6 @@ void socfpga_bridges_reset(int enable)
/* Remap the bridges into memory map */
writel(l3mask, SOCFPGA_L3REGS_ADDRESS);
}
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5) */
 }
 #endif
-- 
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[U-Boot] [PATCH 02/11] arm: socfpga: rstmgr: Add Reset Manager for Stratix 10

[Chin Liang See]

Add Reset Manager registers structure for Stratix 10 SoC

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/mach-socfpga/include/mach/reset_manager.h | 32 ++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 2f070f2..1f868da 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -15,6 +15,7 @@ void socfpga_bridges_reset(int enable);
 void socfpga_per_reset(u32 reset, int set);
 void socfpga_per_reset_all(void);
 
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 struct socfpga_reset_manager {
u32 status;
u32 ctrl;
@@ -28,11 +29,42 @@ struct socfpga_reset_manager {
u32 padding2[12];
u32 tstscratch;
 };
+#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+struct socfpga_reset_manager {
+   u32 status;
+   u32 mpu_rst_stat;
+   u32 misc_stat;
+   u32 padding1;
+   u32 hdsk_en;
+   u32 hdsk_req;
+   u32 hdsk_ack;
+   u32 hdsk_stall;
+   u32 mpu_mod_reset;
+   u32 per_mod_reset;  /* stated as per0_mod_reset in S10 datasheet */
+   u32 per2_mod_reset; /* stated as per1_mod_reset in S10 datasheet */
+   u32 brg_mod_reset;
+   u32 padding2;
+   u32 cold_mod_reset;
+   u32 padding3;
+   u32 dbg_mod_reset;
+   u32 tap_mod_reset;
+   u32 padding4;
+   u32 padding5;
+   u32 brg_warm_mask;
+   u32 padding6[3];
+   u32 tst_stat;
+   u32 padding7;
+   u32 hdsk_timeout;
+   u32 mpul2flushtimeout;
+   u32 dbghdsktimeout;
+};
+#endif
 
 #if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
 #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
 #else
 #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
+#define RSTMGR_MPUMODRST_CORE0 1
 #endif
 
 /*
-- 
2.2.2

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[U-Boot] [PATCH 01/11] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address

[Chin Liang See]

Add base address header file for Stratix10 SoC

Signed-off-by: Chin Liang See 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ley Foon Tan 
---
 arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 48 ++
 1 file changed, 48 insertions(+)
 create mode 100755 arch/arm/mach-socfpga/include/mach/base_addr_s10.h

diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h 
b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
new file mode 100755
index 000..cd29a59
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2016, Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_
+#define _SOCFPGA_S10_BASE_HARDWARE_H_
+
+#define SOCFPGA_SMMU_ADDRESS   0xfa00
+#define SOCFPGA_EMAC0_ADDRESS  0xff80
+#define SOCFPGA_EMAC1_ADDRESS  0xff802000
+#define SOCFPGA_EMAC2_ADDRESS  0xff804000
+#define SOCFPGA_SDMMC_ADDRESS  0xff808000
+#define SOCFPGA_USB0_ADDRESS   0xffb0
+#define SOCFPGA_USB1_ADDRESS   0xffb4
+#define SOCFPGA_NANDREGS_ADDRESS   0xffb8
+#define SOCFPGA_NANDDATA_ADDRESS   0xffb9
+#define SOCFPGA_UART0_ADDRESS  0xffc02000
+#define SOCFPGA_UART1_ADDRESS  0xffc02100
+#define SOCFPGA_I2C0_ADDRESS   0xffc02800
+#define SOCFPGA_I2C1_ADDRESS   0xffc02900
+#define SOCFPGA_I2C2_ADDRESS   0xffc02a00
+#define SOCFPGA_I2C3_ADDRESS   0xffc02b00
+#define SOCFPGA_I2C4_ADDRESS   0xffc02c00
+#define SOCFPGA_SPTIMER0_ADDRESS   0xffc03000
+#define SOCFPGA_SPTIMER1_ADDRESS   0xffc03100
+#define SOCFPGA_GPIO0_ADDRESS  0xffc03200
+#define SOCFPGA_GPIO1_ADDRESS  0xffc03300
+#define SOCFPGA_SYSTIMER0_ADDRESS  0xffd0
+#define SOCFPGA_SYSTIMER1_ADDRESS  0xffd00100
+#define SOCFPGA_L4WD0_ADDRESS  0xffd00200
+#define SOCFPGA_L4WD1_ADDRESS  0xffd00300
+#define SOCFPGA_L4WD2_ADDRESS  0xffd00400
+#define SOCFPGA_L4WD3_ADDRESS  0xffd00500
+#define SOCFPGA_CLKMGR_ADDRESS 0xffd1
+#define SOCFPGA_RSTMGR_ADDRESS 0xffd11000
+#define SOCFPGA_SYSMGR_ADDRESS 0xffd12000
+#define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS0xffd13000
+#define SOCFPGA_DMANONSECURE_ADDRESS   0xffda
+#define SOCFPGA_DMASECURE_ADDRESS  0xffda1000
+#define SOCFPGA_SPIS0_ADDRESS  0xffda2000
+#define SOCFPGA_SPIS1_ADDRESS  0xffda3000
+#define SOCFPGA_SPIM0_ADDRESS  0xffda4000
+#define SOCFPGA_SPIM1_ADDRESS  0xffda5000
+#define SOCFPGA_OCRAM_ADDRESS  0xffe0
+
+#endif /* _SOCFPGA_S10_BASE_HARDWARE_H_ */
-- 
2.2.2

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[U-Boot] [PATCH 00/11] Add support for Stratix 10 SoC

[Chin Liang See]

Add support for Stratix 10 SoC which is ARM64 based. This series
of patches are tested with Stratix 10 SOC Virtual Platform that
is available today.

Chin Liang See (11):
  arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address
  arm: socfpga: rstmgr: Add Reset Manager for Stratix 10
  arm: socfpga: rstmgr: Segregate the Reset Manager for Stratix 10
  arm: socfpga: clkmgr: Segregate the Clock Manager for Stratix 10
  arm: socfpga: fpgamgr: Segregate the FPGA Manager for Stratix 10
  arm: socfpga: misc: Segregate the misc.c for Stratix 10
  arm: socfpga: sysmgr: Fix casting warning when enabling ARM64
  arm: socfpga: mmu: Add memory map layout for Stratix 10 SoC
  arm: socfpga: stratix10: Add board folder for Stratix 10 socdk
  arm: dts: socfpga: Add dts for Stratix 10 socdk
  arm: socfpga: Add support for Stratix 10 SoC dev kit

 arch/arm/Kconfig   |   7 +-
 arch/arm/dts/Makefile  |   3 +-
 arch/arm/dts/socfpga_stratix10_socdk.dts   |  64 ++
 arch/arm/mach-socfpga/Kconfig  |  10 ++
 arch/arm/mach-socfpga/Makefile |   2 +
 arch/arm/mach-socfpga/clock_manager.c  |   8 ++
 arch/arm/mach-socfpga/fpga_manager.c   |   4 +
 arch/arm/mach-socfpga/include/mach/base_addr_s10.h |  48 
 arch/arm/mach-socfpga/include/mach/reset_manager.h |  32 +
 arch/arm/mach-socfpga/misc.c   |  12 ++
 arch/arm/mach-socfpga/mmu-arm64.c  |  71 +++
 arch/arm/mach-socfpga/reset_manager.c  |  12 ++
 arch/arm/mach-socfpga/system_manager.c |   2 +-
 board/altera/stratix10-socdk/MAINTAINERS   |   8 ++
 board/altera/stratix10-socdk/Makefile  |   7 ++
 board/altera/stratix10-socdk/socfpga.c |   7 ++
 configs/socfpga_stratix10_defconfig|  14 +++
 include/configs/socfpga_stratix10_socdk.h  | 135 +
 18 files changed, 441 insertions(+), 5 deletions(-)
 create mode 100755 arch/arm/dts/socfpga_stratix10_socdk.dts
 create mode 100755 arch/arm/mach-socfpga/include/mach/base_addr_s10.h
 create mode 100755 arch/arm/mach-socfpga/mmu-arm64.c
 create mode 100755 board/altera/stratix10-socdk/MAINTAINERS
 create mode 100755 board/altera/stratix10-socdk/Makefile
 create mode 100755 board/altera/stratix10-socdk/socfpga.c
 create mode 100755 configs/socfpga_stratix10_defconfig
 create mode 100644 include/configs/socfpga_stratix10_socdk.h

--
2.2.2

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Re: [U-Boot] ext4 delete file fails when ext4 extents enabled in filesystem

[Brüns , Stefan]

On Freitag, 2. September 2016 14:51:59 CEST Thomas Schaefer wrote:
> > -Ursprüngliche Nachricht-
> > Von: Brüns, Stefan [mailto:stefan.bru...@rwth-aachen.de]
> > Gesendet: Freitag, 2. September 2016 13:43
> > An: Thomas Schaefer
> > Cc: u-boot@lists.denx.de; Michael Walle
> > Betreff: Re: ext4 delete file fails when ext4 extents enabled in
> > filesystem
> > 
> > On Donnerstag, 1. September 2016 19:25:30 CEST you wrote:
> > > On Donnerstag, 1. September 2016 16:08:51 CEST you wrote:
> > > > Hi Stefan,
> > > > 
> > > > applying patch [U-Boot,v4,06/13]ext4 and Michael Walles patch
> > > > [U-Boot,v4,3/4]ext4, I'm now able to write into directories on ext4
> > > > fs from u-boot. However, when deleting a given file (i.e. when
> > > > writing to an existing filename), u-boot crashes when ext4 extents
> > > > are enabled.
> > > > 
> > > > Some debugging showd that blknr from 'read_allocated_block' function
> > > > returns negative value. I can only guess, maybe its due to 64 bit
> > > > values calculated from ee_start_hi and ee_start_lo entries in the
> > > > ext4_extent structure.
> > > > 
> > > > When disabling extents in the ext4 fs, deleting a given file is
> > > > working.
[...]
> > Hi Thomas,
> > 
> > short followup:
> > 
> > read_allocated_blocks returns either 0 or -1 in case of an error.
> > Unfortunately, the return value is only checked for 0 equality in
> > most/all?
> > cases, and seemingly my patch series introduced some more occasions.
> > 
> > 
> > Now, what *should* read_allocated_blocks return in case of an error?
> > Either:
> > 
> > - 0: a file block can never be allocated as block 0, as that is always in
> > use by the superblock and/or the bootsector block.
> > 
> > - <0: Extents allow 48 bit block numbers. "Limiting" the return value to
> > the positive half of int64_t for valid block numbers and and reserving
> > negative values for error codes is fine.
> > 
> > I would go for negative error codes, as these are more expressive.
> > Comments/ opinions welcome!

Following up on this, the correct behaviour is <0 on "real" errors, like -
ENOMEM, and 0 on blocks not backed on device (e.g. sparse files).

Followup patch in progress.


[...]
> Hi Stefan,
> 
> the attachment contains an image file that causes u-boot to crash when
> trying to overwrite existing files in ext4 fs.

Could reproduce this. The problem seems to be an out-of-bound access of an in-
memory struct ext2_inode, and mixing up its size with fs->inodesz. I have 
found at least one place, will investigate further.

Kind regards,

Stefan


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[U-Boot] [PATCH v2 6/7] power: squash lines for immediate return

[Masahiro Yamada]

Currently, this function is just a wrapper of pmic_bus_init().

Signed-off-by: Masahiro Yamada 
---

 drivers/power/axp809.c | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c
index c8b76cf..c5b608d 100644
--- a/drivers/power/axp809.c
+++ b/drivers/power/axp809.c
@@ -217,13 +217,7 @@ int axp_set_sw(bool on)
 
 int axp_init(void)
 {
-   int ret;
-
-   ret = pmic_bus_init();
-   if (ret)
-   return ret;
-
-   return 0;
+   return pmic_bus_init();
 }
 
 int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-- 
1.9.1

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[U-Boot] [PATCH v2 1/7] mmc: squash lines for immediate return

[Masahiro Yamada]

These functions can be much simpler by squashing lines for immediate
return.

For *_bind() callbacks, they will be a simple wrapper function of an
upper-level bind API.

For mmc_set_{boot_bus_width,part_conf}, they will be a wrapper of
mmc_switch().

Signed-off-by: Masahiro Yamada 
---

 drivers/mmc/atmel_sdhci.c |  7 +--
 drivers/mmc/exynos_dw_mmc.c   |  7 +--
 drivers/mmc/mmc_boot.c| 28 
 drivers/mmc/msm_sdhci.c   |  7 +--
 drivers/mmc/rockchip_dw_mmc.c |  7 +--
 drivers/mmc/rockchip_sdhci.c  |  7 +--
 drivers/mmc/sandbox_mmc.c |  7 +--
 drivers/mmc/zynq_sdhci.c  |  7 +--
 8 files changed, 15 insertions(+), 62 deletions(-)

diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
index dd6bd33..d8f8087 100644
--- a/drivers/mmc/atmel_sdhci.c
+++ b/drivers/mmc/atmel_sdhci.c
@@ -136,13 +136,8 @@ static int atmel_sdhci_probe(struct udevice *dev)
 static int atmel_sdhci_bind(struct udevice *dev)
 {
struct atmel_sdhci_plat *plat = dev_get_platdata(dev);
-   int ret;
 
-   ret = sdhci_bind(dev, >mmc, >cfg);
-   if (ret)
-   return ret;
-
-   return 0;
+   return sdhci_bind(dev, >mmc, >cfg);
 }
 
 static const struct udevice_id atmel_sdhci_ids[] = {
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 57271f1..568fed7 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -284,13 +284,8 @@ static int exynos_dwmmc_probe(struct udevice *dev)
 static int exynos_dwmmc_bind(struct udevice *dev)
 {
struct exynos_mmc_plat *plat = dev_get_platdata(dev);
-   int ret;
 
-   ret = dwmci_bind(dev, >mmc, >cfg);
-   if (ret)
-   return ret;
-
-   return 0;
+   return dwmci_bind(dev, >mmc, >cfg);
 }
 
 static const struct udevice_id exynos_dwmmc_ids[] = {
diff --git a/drivers/mmc/mmc_boot.c b/drivers/mmc/mmc_boot.c
index 756a982..ac6f56f 100644
--- a/drivers/mmc/mmc_boot.c
+++ b/drivers/mmc/mmc_boot.c
@@ -85,16 +85,10 @@ int mmc_boot_partition_size_change(struct mmc *mmc, 
unsigned long bootsize,
  */
 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
 {
-   int err;
-
-   err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
-EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
-EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
-EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
-
-   if (err)
-   return err;
-   return 0;
+   return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
+ EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
+ EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
+ EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
 }
 
 /*
@@ -106,16 +100,10 @@ int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 
reset, u8 mode)
  */
 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
 {
-   int err;
-
-   err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
-EXT_CSD_BOOT_ACK(ack) |
-EXT_CSD_BOOT_PART_NUM(part_num) |
-EXT_CSD_PARTITION_ACCESS(access));
-
-   if (err)
-   return err;
-   return 0;
+   return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
+ EXT_CSD_BOOT_ACK(ack) |
+ EXT_CSD_BOOT_PART_NUM(part_num) |
+ EXT_CSD_PARTITION_ACCESS(access));
 }
 
 /*
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index 8d4399e..1b82991 100644
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -190,13 +190,8 @@ static int msm_ofdata_to_platdata(struct udevice *dev)
 static int msm_sdc_bind(struct udevice *dev)
 {
struct msm_sdhc_plat *plat = dev_get_platdata(dev);
-   int ret;
 
-   ret = sdhci_bind(dev, >mmc, >cfg);
-   if (ret)
-   return ret;
-
-   return 0;
+   return sdhci_bind(dev, >mmc, >cfg);
 }
 
 static const struct udevice_id msm_mmc_ids[] = {
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 020a59b..859760b 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -142,13 +142,8 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 static int rockchip_dwmmc_bind(struct udevice *dev)
 {
struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
-   int ret;
 
-   ret = dwmci_bind(dev, >mmc, >cfg);
-   if (ret)
-   return ret;
-
-   return 0;
+   return dwmci_bind(dev, >mmc, >cfg);
 }
 
 static const struct udevice_id rockchip_dwmmc_ids[] = {
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 624029b..c56e1a3 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -62,13 +62,8 @@ static int 

[U-Boot] [PATCH v2 7/7] libfdt: simplify fdt_del_mem_rsv()

[Masahiro Yamada]

The variable "err" is unneeded.

[ Backport from Device Tree Compiler
  commit: 36fd7331fb11276c09a6affc0d8cd4977f2fe100 ]

Signed-off-by: Masahiro Yamada 
Signed-off-by: David Gibson 
---

 lib/libfdt/fdt_rw.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index e7321cc..47447b2 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -148,17 +148,13 @@ int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t 
size)
 int fdt_del_mem_rsv(void *fdt, int n)
 {
struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
-   int err;
 
FDT_RW_CHECK_HEADER(fdt);
 
if (n >= fdt_num_mem_rsv(fdt))
return -FDT_ERR_NOTFOUND;
 
-   err = _fdt_splice_mem_rsv(fdt, re, 1, 0);
-   if (err)
-   return err;
-   return 0;
+   return _fdt_splice_mem_rsv(fdt, re, 1, 0);
 }
 
 static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
-- 
1.9.1

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[U-Boot] [PATCH v2 5/7] samsung: squash lines for immediate return

[Masahiro Yamada]

Currently, this function is just a wrapper of pmic_init().

Signed-off-by: Masahiro Yamada 
---

 board/samsung/goni/goni.c | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 1600568..e8329bb 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -45,17 +45,11 @@ void i2c_init_board(void)
 
 int power_init_board(void)
 {
-   int ret;
-
/*
 * For PMIC the I2C bus is named as I2C5, but it is connected
 * to logical I2C adapter 0
 */
-   ret = pmic_init(I2C_0);
-   if (ret)
-   return ret;
-
-   return 0;
+   return pmic_init(I2C_0);
 }
 
 int dram_init(void)
-- 
1.9.1

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[U-Boot] [PATCHv5 4/4] Add support the Avionic Design Meerkat COM and Kein Baseboard

[Julian Scheel]

Add support for platforms based on the Meerkat COM module. Includes support
for the minimal reference platform called Kein Baseboard, which in fact is
sufficient to run most existing Meerkat carriers.

Change-Id: I00e74a42c33afa782bb6109aab34d91e6f16fbb0
Signed-off-by: Julian Scheel 
Reviewed-by: Alban Bedel 
---
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/tegra124-kein-baseboard.dts   |  66 
 arch/arm/dts/tegra124-meerkat.dtsi | 409 +
 arch/arm/mach-tegra/tegra124/Kconfig   |   9 +
 board/avionic-design/common/meerkat.c  |  57 +++
 .../avionic-design/common/pinmux-config-meerkat.h  | 233 
 board/avionic-design/kein-baseboard/Kconfig|  15 +
 board/avionic-design/kein-baseboard/MAINTAINERS|   7 +
 board/avionic-design/kein-baseboard/Makefile   |   9 +
 configs/kein-baseboard_defconfig   |  42 +++
 include/configs/kein-baseboard.h   |  65 
 11 files changed, 913 insertions(+)
 create mode 100644 arch/arm/dts/tegra124-kein-baseboard.dts
 create mode 100644 arch/arm/dts/tegra124-meerkat.dtsi
 create mode 100644 board/avionic-design/common/meerkat.c
 create mode 100644 board/avionic-design/common/pinmux-config-meerkat.h
 create mode 100644 board/avionic-design/kein-baseboard/Kconfig
 create mode 100644 board/avionic-design/kein-baseboard/MAINTAINERS
 create mode 100644 board/avionic-design/kein-baseboard/Makefile
 create mode 100644 configs/kein-baseboard_defconfig
 create mode 100644 include/configs/kein-baseboard.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 223124e..379367b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -56,6 +56,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra30-tec-ng.dtb \
tegra114-dalmore.dtb \
tegra124-jetson-tk1.dtb \
+   tegra124-kein-baseboard.dtb \
tegra124-nyan-big.dtb \
tegra124-venice2.dtb \
tegra186-p2771--a02.dtb \
diff --git a/arch/arm/dts/tegra124-kein-baseboard.dts 
b/arch/arm/dts/tegra124-kein-baseboard.dts
new file mode 100644
index 000..75a0b99
--- /dev/null
+++ b/arch/arm/dts/tegra124-kein-baseboard.dts
@@ -0,0 +1,66 @@
+/dts-v1/;
+
+#include "tegra124-meerkat.dtsi"
+
+/ {
+   model = "Avionic Design Kein Baseboard";
+   compatible = "ad,kein-baseboard", "ad,meerkat", "nvidia,tegra124";
+
+   chosen {
+   stdout-path = 
+   };
+
+   serial@70006300 {
+   status = "okay";
+   };
+
+   sdhci@700b0400 {
+   status = "okay";
+   };
+
+   usb@7d00 {
+   status = "okay";
+   };
+
+   usb@7d004000 {
+   status = "okay";
+   };
+
+   usb@7d008000 {
+   status = "okay";
+   };
+
+   pcie-controller@01003000 {
+   status = "okay";
+
+   pci@1,0 {
+   status = "okay";
+   };
+
+   pci@2,0 {
+   status = "okay";
+   };
+   };
+
+   regulators {
+   vdd_5v0: regulator@100 {
+   compatible = "regulator-fixed";
+   reg = <100>;
+   regulator-name = "+VDD_5V";
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vdd_3v3: regulator@101 {
+   compatible = "regulator-fixed";
+   reg = <101>;
+   regulator-name = "+VDD_3V3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+   };
+};
diff --git a/arch/arm/dts/tegra124-meerkat.dtsi 
b/arch/arm/dts/tegra124-meerkat.dtsi
new file mode 100644
index 000..76af83d
--- /dev/null
+++ b/arch/arm/dts/tegra124-meerkat.dtsi
@@ -0,0 +1,409 @@
+
+#include "tegra124.dtsi"
+
+/ {
+   model = "Avionic-Design Meerkat";
+   compatible = "ad,meerkat", "nvidia,tegra124";
+
+   aliases {
+   i2c0 = "/i2c@7000c000";
+   i2c1 = "/i2c@7000c400";
+   i2c2 = "/i2c@7000c500";
+   i2c3 = "/i2c@7000c700";
+   i2c4 = "/i2c@7000d000";
+   i2c5 = "/i2c@7000d100";
+
+   sdhci0 = "/sdhci@700b0600";
+   sdhci1 = "/sdhci@700b0400";
+
+   usb0 = "/usb@7d00";
+   usb1 = "/usb@7d004000";
+   usb2 = "/usb@7d008000";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x8000>;
+   };
+
+   pcie-controller@01003000