[U-Boot] [GIT PULL] Xilinx changes v2

[Michal Simek]

Hi,

I have rebased my tree on the top of current master branch
with IDENT_STRING in Kconfig.
Also that PL driver for ZynqMP was fixed.
Buildman output look good too.
That's why please apply.

Thanks,
Michal


The following changes since commit a2ed3f452dd1cf4982fe46d5111d200909786686:

  Merge git://git.denx.de/u-boot-dm (2016-09-20 09:34:53 -0400)

are available in the git repository at:


  git://www.denx.de/git/u-boot-microblaze.git master

for you to fetch changes up to e0027f089bb64f6b84742c580f966bf9c97c900e:

  zynqmp: Remove unnnecessary board config file for dc4 (2016-09-22
07:33:21 +0200)


Michal Simek (14):
  fpga: Add Kconfig to fpga subsystem
  ARM64: zynqmp: Wire up both USBs available on ZynqMP
  ARM64: zynqmp: Force certain bootmode for SPL
  ARM64: zynqmp: Fix usb_gadget_handle_interrupt routine
  spi: zynq: Use variable to remove u32 to u64 conversions
  ARM64: zynqmp: Move BSS location to the beginning of ram
  ARM64: zynqmp: Add USB boot mode
  ARM: Add new BOOT_DEVICE_DFU boot mode
  ARM64: zynqmp: Add support for DFU from SPL
  ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
  ARM64: zynqmp: Fix USB ulpi phy sequence
  ARM64: zynqmp: Add support for chip ID detection
  ARM64: zynqmp: Enable CONFIG_AHCI via Kconfig
  ARM64: zynqmp: Use the same name for atf image everywhere

Siva Durga Prasad Paladugu (2):
  fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
  zynqmp: Remove unnnecessary board config file for dc4

 arch/arm/cpu/armv8/zynqmp/Kconfig|  48

 arch/arm/cpu/armv8/zynqmp/spl.c  |  30 
 arch/arm/include/asm/arch-zynqmp/hardware.h  |  14 +-
 arch/arm/include/asm/spl.h   |   1 +
 board/xilinx/zynqmp/zynqmp.c | 128
+---
 configs/xilinx_zynqmp_ep_defconfig   |   3 ++
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig |   2 ++
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig |   2 ++
 configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig |   3 +-
 configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig |   2 ++
 configs/xilinx_zynqmp_zcu102_defconfig   |   3 ++
 configs/xilinx_zynqmp_zcu102_revB_defconfig  |   3 ++
 drivers/Kconfig  |   2 ++
 drivers/fpga/Kconfig |  20 ++
 drivers/fpga/Makefile|   1 +
 drivers/fpga/xilinx.c|   6 
 drivers/fpga/zynqmppl.c  | 238

 drivers/spi/zynq_spi.c   |   7 +++--
 include/configs/xilinx_zynqmp.h  |  39
+-
 include/configs/xilinx_zynqmp_ep.h   |   1 -
 include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h |  15 --
 include/xilinx.h |   2 ++
 include/zynqmppl.h   |  24 
 23 files changed, 563 insertions(+), 31 deletions(-)
 create mode 100644 drivers/fpga/Kconfig
 create mode 100644 drivers/fpga/zynqmppl.c
 delete mode 100644 include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h
 create mode 100644 include/zynqmppl.h

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs




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Re: [U-Boot] [RESEND PATCH 04/10] Remove arch/${ARCH}/include/asm/errno.h

[Alexey Brodkin]

Hello Masahiro-san,

On Thu, 2016-09-22 at 07:25 +0900, Masahiro Yamada wrote:
> 2016-09-21 11:28 GMT+09:00 Masahiro Yamada :
> > 
> > Unlike Linux, nothing about errno.h is arch-specific in U-Boot.
> > As you see, all of arch/${ARCH}/include/asm/errno.h is just a
> > wrapper of .  Actually, U-Boot does not
> > export headers to user-space, so we just have to care about the
> > consistency in the U-Boot tree.
> > 
> > Now all of include directives for  are gone.
> > Deprecate .
> > 
> > Signed-off-by: Masahiro Yamada 
> 
> 
> Alexey gave Acked-by to the superseded version
> (http://patchwork.ozlabs.org/patch/672513/),
> so I am repeating it here just in case.
> 
> Acked-by: Alexey Brodkin 

Thanks for doing that.

I noticed patch that I acked was not changed later so that
should be fine :)

-Alexey
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Re: [U-Boot] [PATCH 2/2] configs: fsl: Move SPI/SPI-FLASH configs to defconfig

[Peng Fan]

On Thu, Sep 22, 2016 at 01:32:12AM +0530, Jagan Teki wrote:
>From: Jagan Teki 
>
>Moved FSL_QSPI/SPI/SPI-FLASH configs from include/configs
>into respective used defconfigs.
>- CONFIG_FSL_QSPI
>- CONFIG_SPI_FLASH
>- CONFIG_SPI_FLASH_BAR
>- CONFIG_SPI_FLASH_STMICRO
>
>Cc: Stefano Babic 
>Cc: Peng Fan 
>Signed-off-by: Jagan Teki 

Reviewed-by: Peng Fan 

Thanks,
Peng.

>---
> configs/mx6sxsabreauto_defconfig  | 1 +
> configs/mx6ul_14x14_evk_defconfig | 4 
> configs/mx6ul_9x9_evk_defconfig   | 4 
> include/configs/mx6sxsabreauto.h  | 1 -
> include/configs/mx6ul_14x14_evk.h | 4 
> 5 files changed, 9 insertions(+), 5 deletions(-)
>
>diff --git a/configs/mx6sxsabreauto_defconfig 
>b/configs/mx6sxsabreauto_defconfig
>index 41d46f6..e80bb4e 100644
>--- a/configs/mx6sxsabreauto_defconfig
>+++ b/configs/mx6sxsabreauto_defconfig
>@@ -23,6 +23,7 @@ CONFIG_CMD_EXT4=y
> CONFIG_CMD_EXT4_WRITE=y
> CONFIG_CMD_FAT=y
> CONFIG_CMD_FS_GENERIC=y
>+CONFIG_FSL_QSPI=y
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_BAR=y
> CONFIG_SPI_FLASH_STMICRO=y
>diff --git a/configs/mx6ul_14x14_evk_defconfig 
>b/configs/mx6ul_14x14_evk_defconfig
>index 9b4c4a4..a829a18 100644
>--- a/configs/mx6ul_14x14_evk_defconfig
>+++ b/configs/mx6ul_14x14_evk_defconfig
>@@ -32,4 +32,8 @@ CONFIG_CMD_FAT=y
> CONFIG_CMD_FS_GENERIC=y
> CONFIG_USB=y
> CONFIG_USB_STORAGE=y
>+CONFIG_FSL_QSPI=y
>+CONFIG_SPI_FLASH=y
>+CONFIG_SPI_FLASH_BAR=y
>+CONFIG_SPI_FLASH_STMICRO=y
> CONFIG_OF_LIBFDT=y
>diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
>index e88a1dc..eaf3cfd 100644
>--- a/configs/mx6ul_9x9_evk_defconfig
>+++ b/configs/mx6ul_9x9_evk_defconfig
>@@ -32,4 +32,8 @@ CONFIG_CMD_FAT=y
> CONFIG_CMD_FS_GENERIC=y
> CONFIG_USB=y
> CONFIG_USB_STORAGE=y
>+CONFIG_FSL_QSPI=y
>+CONFIG_SPI_FLASH=y
>+CONFIG_SPI_FLASH_BAR=y
>+CONFIG_SPI_FLASH_STMICRO=y
> CONFIG_OF_LIBFDT=y
>diff --git a/include/configs/mx6sxsabreauto.h 
>b/include/configs/mx6sxsabreauto.h
>index 274cb36..c30e3dd 100644
>--- a/include/configs/mx6sxsabreauto.h
>+++ b/include/configs/mx6sxsabreauto.h
>@@ -173,7 +173,6 @@
> 
> #define CONFIG_IMX_THERMAL
> 
>-#define CONFIG_FSL_QSPI
> #ifdef CONFIG_FSL_QSPI
> #define CONFIG_SYS_FSL_QSPI_AHB
> #define CONFIG_SF_DEFAULT_BUS 0
>diff --git a/include/configs/mx6ul_14x14_evk.h 
>b/include/configs/mx6ul_14x14_evk.h
>index 823405f..925a418 100644
>--- a/include/configs/mx6ul_14x14_evk.h
>+++ b/include/configs/mx6ul_14x14_evk.h
>@@ -186,15 +186,11 @@
> #ifndef CONFIG_SYS_DCACHE_OFF
> #endif
> 
>-#define CONFIG_FSL_QSPI
> #ifdef CONFIG_FSL_QSPI
>-#define CONFIG_SPI_FLASH
>-#define CONFIG_SPI_FLASH_BAR
> #define CONFIG_SF_DEFAULT_BUS 0
> #define CONFIG_SF_DEFAULT_CS  0
> #define CONFIG_SF_DEFAULT_SPEED   4000
> #define CONFIG_SF_DEFAULT_MODESPI_MODE_0
>-#define CONFIG_SPI_FLASH_STMICRO
> #define FSL_QSPI_FLASH_NUM1
> #define FSL_QSPI_FLASH_SIZE   SZ_32M
> #endif
>-- 
>2.7.4
>
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Re: [U-Boot] [PATCH 1/2] spi: Kconfig: Move FSL_QSPI entry to non-dm place

[Peng Fan]

On Thu, Sep 22, 2016 at 01:32:11AM +0530, Jagan Teki wrote:
>From: Jagan Teki 
>
>Since FSL_QSPI driver still supporting non-dm code
>better to move the Kconfig from DM undefined place.
>
>Cc: Stefano Babic 
>Cc: Peng Fan 
>Signed-off-by: Jagan Teki 

Reviewed-by: Peng Fan 

Thanks,
Peng.
>---
> drivers/spi/Kconfig | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
>index aca385d..5da66a6 100644
>--- a/drivers/spi/Kconfig
>+++ b/drivers/spi/Kconfig
>@@ -61,13 +61,6 @@ config FSL_DSPI
> this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
> use this driver.
> 
>-config FSL_QSPI
>-  bool "Freescale QSPI driver"
>-  help
>-Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
>-used to access the SPI NOR flash on platforms embedding this
>-Freescale IP core.
>-
> config ICH_SPI
>   bool "Intel ICH SPI driver"
>   help
>@@ -188,6 +181,13 @@ config FSL_ESPI
> access the SPI interface and SPI NOR flash on platforms embedding
> this Freescale eSPI IP core.
> 
>+config FSL_QSPI
>+  bool "Freescale QSPI driver"
>+  help
>+Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
>+used to access the SPI NOR flash on platforms embedding this
>+Freescale IP core.
>+
> config TI_QSPI
>   bool "TI QSPI driver"
>   help
>-- 
>2.7.4
>
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Re: [U-Boot] [PATCH 2/2] configs: fsl: Move SPI/SPI-FLASH configs to defconfig

[Jagan Teki]

On Thu, Sep 22, 2016 at 1:49 PM, Peng Fan  wrote:
> On Thu, Sep 22, 2016 at 01:32:12AM +0530, Jagan Teki wrote:
>>From: Jagan Teki 
>>
>>Moved FSL_QSPI/SPI/SPI-FLASH configs from include/configs
>>into respective used defconfigs.
>>- CONFIG_FSL_QSPI
>>- CONFIG_SPI_FLASH
>>- CONFIG_SPI_FLASH_BAR
>>- CONFIG_SPI_FLASH_STMICRO
>>
>>Cc: Stefano Babic 
>>Cc: Peng Fan 
>>Signed-off-by: Jagan Teki 
>
> Reviewed-by: Peng Fan 

Applied to u-boot-spi/master

thanks!
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Hyderabad, India.
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Re: [U-Boot] [PATCH 1/2] spi: Kconfig: Move FSL_QSPI entry to non-dm place

[Jagan Teki]

On Thu, Sep 22, 2016 at 1:48 PM, Peng Fan  wrote:
> On Thu, Sep 22, 2016 at 01:32:11AM +0530, Jagan Teki wrote:
>>From: Jagan Teki 
>>
>>Since FSL_QSPI driver still supporting non-dm code
>>better to move the Kconfig from DM undefined place.
>>
>>Cc: Stefano Babic 
>>Cc: Peng Fan 
>>Signed-off-by: Jagan Teki 
>
> Reviewed-by: Peng Fan 

Applied to u-boot-spi/master

thanks!
-- 
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Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] [PATCH] arch: ifc: update the IFC IP input clock

[Prabhakar Kushwaha]

Hi Scott,

Sorry for late reply on this thread


> -Original Message-
> From: Scott Wood
> Sent: Friday, September 09, 2016 7:30 AM
> To: Prabhakar Kushwaha ; york sun
> ; u-boot@lists.denx.de
> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock
> 
> On 09/08/2016 08:46 PM, Prabhakar Kushwaha wrote:
> >
> >> -Original Message-
> >> From: Scott Wood
> >> Sent: Friday, September 09, 2016 6:05 AM
> >> To: Prabhakar Kushwaha ; york sun
> >> ; u-boot@lists.denx.de
> >> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock
> >>
> >> On 09/08/2016 07:05 PM, Prabhakar Kushwaha wrote:
> >>>
>  -Original Message-
>  From: york sun
>  Sent: Thursday, September 08, 2016 9:22 PM
>  To: Prabhakar Kushwaha ; u-
>  b...@lists.denx.de; Scott Wood 
>  Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock
> 
>  On 09/08/2016 02:33 AM, Prabhakar Kushwaha wrote:
> 
>  
> 
> >>> So better to print IP clock to avoid any confusion.
> >>> IFC output clock will be printed when it is actually being used during
> >> synchronous NOR, syn NAND.
> >>
> >> I am not against changing it to internal clock. But what are you going
> >> to print on the console? I think it is confusing to say IFC or local 
> >> bus
> >> internal clock speed. Please also check how this clock is used and make
> >> sure arch.lbc_clk is still correct, after passing to Linux.
> >>
> > arch.lbc_clk is only being used for eLBC for device tree fixup.
> > And I checked the Linux eLBC driver. Looks like it is not using used.
> >
> 
>  If this clock is not used, can we drop it completely?
> 
> >>>
> >>> From my point of view Yes.
> >>>
> >>> Scott, Please advice
> >>
> >> Well, there is that patch from Matt Weber that is trying to guess the
> >> IFC frequency in order to use NWAIT...  Not sure if we'll end up
> >> actually using NWAIT
> > (Prabhakar, can you answer my question of whether
> >> there is a better opcode to use with RNDOUT?) or ever sending a real
> >> RNDOUT, or if we'll ever care about these newer NAND chips on eLBC, but
> >> if U-Boot is currently writing the clock frequency into the device tree
> >> I don't see why we'd rip it out.
> >>
> >
> > IFC frequency means IP clock or IP output clock?
> 
> External bus clock.  Which is currently being written to the device tree?
> 
> > If IP clock then other patch for eLBC still valid.
> 
> What other patch?
> 
> >
> > For IFC: Code needs to be added for device tree fixup for PowerPC, ARM SoC.
> > It is missing for now :(
> 
> No, we don't want to introduce new clock-frequency fixups.  If we need
> this on IFC we should add a clocks property.  But if we already have
> clock-frequency on eLBC then no reason not to use that if needed.
> 
I am not against keeping " bus-frequency" on eLBC.   (U-boot fixup 
bus-frequency not clock-frequncy)

But the  value which is getting assigned to " bus-frequency" is not right.
Currently, it is setting SYSCLK/LCRR i.e. output clock where eLBC run at CCB or 
CCB/2.
So, if we want to have  " bus-frequency " on eLBC then it needs to be corrected.

--prabhakar


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[U-Boot] [PATCH] tools: mkimage: Add support for initialization table for Zynq and ZynqMP

[Michal Simek]

From: Mike Looijmans 

The Zynq/ZynqMP boot.bin file contains a region for register initialization
data. Filling in proper values in this table can reduce boot time
(e.g. about 50ms faster on QSPI boot) and also reduce the size of
the SPL binary.

The table is a simple text file with register+data on each line. Other
lines are simply skipped. The file can be passed to mkimage using the
"-R" parameter.

It is recommended to add reg init file to board folder.
For example:
CONFIG_BOOT_INIT_FILE="board/xilinx/zynqmp/xilinx_zynqmp_zcu102/reg.int

Signed-off-by: Mike Looijmans 
Signed-off-by: Michal Simek 
---

 arch/arm/cpu/armv8/zynqmp/Kconfig |  7 +++
 arch/arm/mach-zynq/Kconfig|  7 +++
 scripts/Makefile.spl  |  4 ++--
 tools/zynqimage.c | 28 
 tools/zynqmpimage.c   | 28 
 5 files changed, 72 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig 
b/arch/arm/cpu/armv8/zynqmp/Kconfig
index 1eedb39aa5a8..a3baae4f740c 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -41,6 +41,13 @@ config SYS_CONFIG_NAME
  Based on this option include/configs/.h header
  will be used for board configuration.
 
+config BOOT_INIT_FILE
+   string "boot.bin init register filename"
+   default ""
+   help
+ Add register writes to boot.bin format (max 256 pairs).
+ Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
+
 config ZYNQMP_USB
bool "Configure ZynqMP USB"
 
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index a1175eea6ebb..44e16af863d7 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -44,4 +44,11 @@ config SYS_CONFIG_NAME
 config SYS_MALLOC_F_LEN
default 0x600
 
+config BOOT_INIT_FILE
+   string "boot.bin init register filename"
+   default ""
+   help
+ Add register writes to boot.bin format (max 256 pairs).
+ Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
+
 endif
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 4994fa887ba3..b12b0c27dfe9 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -142,10 +142,10 @@ boot.bin: $(obj)/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
 else
 ifdef CONFIG_ARCH_ZYNQ
-MKIMAGEFLAGS_boot.bin = -T zynqimage
+MKIMAGEFLAGS_boot.bin = -T zynqimage -R $(CONFIG_BOOT_INIT_FILE)
 endif
 ifdef CONFIG_ARCH_ZYNQMP
-MKIMAGEFLAGS_boot.bin = -T zynqmpimage
+MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(CONFIG_BOOT_INIT_FILE)
 endif
 
 spl/boot.bin: $(obj)/u-boot-spl.bin FORCE
diff --git a/tools/zynqimage.c b/tools/zynqimage.c
index c43bd5d48820..43876e7a3024 100644
--- a/tools/zynqimage.c
+++ b/tools/zynqimage.c
@@ -222,6 +222,30 @@ static int zynqimage_check_image_types(uint8_t type)
return EXIT_FAILURE;
 }
 
+static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
+   const char *filename)
+{
+   /* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
+   FILE *fp = fopen(filename, "r");
+   struct zynq_reginit reginit;
+   unsigned int reg_count = 0;
+   int r;
+
+   if (!fp) {
+   fprintf(stderr, "Cannot open initparams file: %s\n", filename);
+   exit(1);
+   }
+   do {
+   r = fscanf(fp, "%x %x", ®init.address, ®init.data);
+   if (r == 2) {
+   zynqhdr->register_init[reg_count] = reginit;
+   ++reg_count;
+   }
+   r = fscanf(fp, "%*[^\n]\n"); /* Skip to next line */
+   } while ((r != EOF) && (reg_count < HEADER_REGINITS));
+   fclose(fp);
+}
+
 static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct image_tool_params *params)
 {
@@ -237,6 +261,10 @@ static void zynqimage_set_header(void *ptr, struct stat 
*sbuf, int ifd,
if (params->eflag)
zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
 
+   /* User can pass in text file with init list */
+   if (strlen(params->imagename2))
+   zynqimage_parse_initparams(zynqhdr, params->imagename2);
+
zynqhdr->checksum = zynqimage_checksum(zynqhdr);
 }
 
diff --git a/tools/zynqmpimage.c b/tools/zynqmpimage.c
index 3f28eb401d9b..d08144c2bdfd 100644
--- a/tools/zynqmpimage.c
+++ b/tools/zynqmpimage.c
@@ -234,6 +234,30 @@ static int zynqmpimage_check_image_types(uint8_t type)
return EXIT_FAILURE;
 }
 
+static void zynqmpimage_parse_initparams(struct zynqmp_header *zynqhdr,
+   const char *filename)
+{
+   /* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
+   FILE *fp = fopen(filename, "r");
+   struct zynqmp_reginit reginit;
+   unsigned int reg_count = 0;
+   int r;
+
+   if (!fp) {
+   fprintf(stderr, "Cannot open initparams file: %s\n", fi

Re: [U-Boot] [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters through data structure

[Tom Rini]

On Thu, Sep 22, 2016 at 03:04:31AM +, Prabhakar Kushwaha wrote:
> 
> > -Original Message-
> > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of York Sun
> > Sent: Thursday, September 22, 2016 4:21 AM
> > To: tr...@konsulko.com
> > Cc: u-boot@lists.denx.de
> > Subject: [U-Boot] [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board 
> > parameters
> > through data structure
> > 
> > Instead of using multiple macros, a data structure is used to pass
> > board-specific parameters to MMDC DDR driver.
> > 
> > Signed-off-by: York Sun 
> > CC: Shengzhou Liu 
> 
> 
> I doubt if it is one of the reason for root-cause.
> May not be part of this patch set
> 
> 
> > ---
> >  board/freescale/ls1012afrdm/ls1012afrdm.c | 18 ++-
> >  board/freescale/ls1012aqds/ls1012aqds.c   | 18 ++-
> >  board/freescale/ls1012ardb/ls1012ardb.c   | 18 ++-
> >  drivers/ddr/fsl/fsl_mmdc.c| 38 
> > +++
> >  include/configs/ls1012afrdm.h | 16 -
> >  include/configs/ls1012aqds.h  | 16 -
> >  include/configs/ls1012ardb.h  | 15 
> >  include/fsl_mmdc.h| 21 +
> >  8 files changed, 87 insertions(+), 73 deletions(-)
> > 
> > diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c
> > b/board/freescale/ls1012afrdm/ls1012afrdm.c
> > index d644e94..b03bdb8 100644
> > --- a/board/freescale/ls1012afrdm/ls1012afrdm.c
> > +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
> > @@ -26,7 +26,23 @@ int checkboard(void)
> > 
> >  int dram_init(void)
> >  {
> > -   mmdc_init();
> > +   static const struct fsl_mmdc_info mparam = {
> > +   0x0418, /* mdctl */
> > +   0x00030035, /* mdpdc */
> > +   0x12554000, /* mdotc */
> > +   0xbabf7954, /* mdcfg0 */
> > +   0xdb328f64, /* mdcfg1 */
> > +   0x01ff00db, /* mdcfg2 */
> > +   0x1680, /* mdmisc */
> > +   0x0f3c8000, /* mdref */
> > +   0x2000, /* mdrwd */
> > +   0x00bf1023, /* mdor */
> > +   0x003f, /* mdasp */
> > +   0x022a, /* mpodtctrl */
> > +   0xa1390003, /* mpzqhwctrl */
> > +   };
> > +
> > +   mmdc_init(&mparam);
> > 
> 
> Why cannot #define directly be used in fsl_mmdc.c.
> 
> If objective is to remove #define from board file, they even be required to 
> avoid magic numbers. 

Please see the previous thread about this between York and I.  The end
goal is not to have no magic numbers, the end goal is to make it clear
what the magic numbers are doing.  I still wish there was also a link to
a tech note / manual / whatever to decode each of these values and a
comment about what DDR part is being used on the board, but this is a
step in the right direction.

And as a side bonus, this moves things one step closer to being able to
have more than one board supported by a given binary.

-- 
Tom


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Re: [U-Boot] [RFC Patch 0/5] Resolve conflict for merging

[Prabhakar Kushwaha]

> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of York Sun
> Sent: Thursday, September 22, 2016 4:21 AM
> To: tr...@konsulko.com
> Cc: u-boot@lists.denx.de
> Subject: [U-Boot] [RFC Patch 0/5] Resolve conflict for merging
> 
> Tom,
> 
> I made these patches on top of my fsl-qoriq master. Once merged,
> the ad-hoc config error should not appear. In this set, I start to convert
> some options to Kconfig. Please let me know if this is the right solution. I
> also convert the MMDC driver to use data structure as you suggested. Do not
> apply to your tree. I will request a pull after we agree on them.
> 
> [RFC Patch 1/5] armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig
> [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters through
> [RFC Patch 3/5] armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig
> [RFC Patch 4/5] Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig
> [RFC Patch 5/5] armv8: ls1046ardb_emmc: Fix a typo in defconfig
> 

Are we expecting similar fixes for LS1043, LS2085, LS1021?
Or platform maintainers will be fixing taking this patch set as reference. 

--prabhakar
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Re: [U-Boot] [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters through data structure

[Prabhakar Kushwaha]

> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of York Sun
> Sent: Thursday, September 22, 2016 4:21 AM
> To: tr...@konsulko.com
> Cc: u-boot@lists.denx.de
> Subject: [U-Boot] [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters
> through data structure
> 
> Instead of using multiple macros, a data structure is used to pass
> board-specific parameters to MMDC DDR driver.
> 
> Signed-off-by: York Sun 
> CC: Shengzhou Liu 


I doubt if it is one of the reason for root-cause.
May not be part of this patch set


> ---
>  board/freescale/ls1012afrdm/ls1012afrdm.c | 18 ++-
>  board/freescale/ls1012aqds/ls1012aqds.c   | 18 ++-
>  board/freescale/ls1012ardb/ls1012ardb.c   | 18 ++-
>  drivers/ddr/fsl/fsl_mmdc.c| 38 
> +++
>  include/configs/ls1012afrdm.h | 16 -
>  include/configs/ls1012aqds.h  | 16 -
>  include/configs/ls1012ardb.h  | 15 
>  include/fsl_mmdc.h| 21 +
>  8 files changed, 87 insertions(+), 73 deletions(-)
> 
> diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c
> b/board/freescale/ls1012afrdm/ls1012afrdm.c
> index d644e94..b03bdb8 100644
> --- a/board/freescale/ls1012afrdm/ls1012afrdm.c
> +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
> @@ -26,7 +26,23 @@ int checkboard(void)
> 
>  int dram_init(void)
>  {
> - mmdc_init();
> + static const struct fsl_mmdc_info mparam = {
> + 0x0418, /* mdctl */
> + 0x00030035, /* mdpdc */
> + 0x12554000, /* mdotc */
> + 0xbabf7954, /* mdcfg0 */
> + 0xdb328f64, /* mdcfg1 */
> + 0x01ff00db, /* mdcfg2 */
> + 0x1680, /* mdmisc */
> + 0x0f3c8000, /* mdref */
> + 0x2000, /* mdrwd */
> + 0x00bf1023, /* mdor */
> + 0x003f, /* mdasp */
> + 0x022a, /* mpodtctrl */
> + 0xa1390003, /* mpzqhwctrl */
> + };
> +
> + mmdc_init(&mparam);
> 

Why cannot #define directly be used in fsl_mmdc.c.

If objective is to remove #define from board file, they even be required to 
avoid magic numbers. 

-prabhakar
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Re: [U-Boot] [PATCH v2] cmd/fdt: add possibilty to have 'extrasize' on fdt resize

[Simon Glass]

On 20 September 2016 at 10:10, Hannes Schmelzer  wrote:
>
> From: Hannes Schmelzer 
>
> Sometimes devicetree nodes and or properties are added out of the u-boot
> console, maybe through some script or manual interaction.
>
> The devicetree as loaded or embedded is quite small, so the devicetree
> has to be resized to take up those new nodes/properties.
>
> In original the devicetree was only extended by effective
> 4 * add_mem_rsv.
>
> With this commit we can add an argument to the "fdt resize" command,
> which takes the extrasize to be added.
>
> Signed-off-by: Hannes Schmelzer 
>
> Signed-off-by: Hannes Schmelzer 
> ---
>
> Changes in v2:
> - add function comment in fdt_support.h
>
>  board/compulab/cm_fx6/cm_fx6.c |  2 +-
>  cmd/fdt.c  |  9 +++--
>  common/fdt_support.c   |  3 ++-
>  common/image-fdt.c |  2 +-
>  include/fdt_support.h  | 10 +-
>  5 files changed, 20 insertions(+), 6 deletions(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 2/2] rk3399: move the USB_XHCI_ROCKCHIP into Kconfig

[Simon Glass]

Hi Kever,

On 20 September 2016 at 21:35, Kever Yang  wrote:
> Move USB_XHCI_ROCKCHIP define from soc header file into board defconfig.
>
> Signed-off-by: Kever Yang 
> ---
>
>  configs/evb-rk3399_defconfig| 2 ++
>  include/configs/rk3399_common.h | 4 
>  2 files changed, 2 insertions(+), 4 deletions(-)

I've squashed part of this into the offending patch, thanks.

We cannot put CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS into the defconfig as
it is not in Kconfig yet.

>
> diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
> index 6468620..4ec2e7b 100644
> --- a/configs/evb-rk3399_defconfig
> +++ b/configs/evb-rk3399_defconfig
> @@ -58,6 +58,8 @@ CONFIG_FASTBOOT_BUF_SIZE=0x0800
>  CONFIG_USB_STORAGE=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
> +CONFIG_USB_XHCI_ROCKCHIP=y
> +CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS=2
>  CONFIG_USB_EHCI_HCD=y
>  CONFIG_USB_EHCI_GENERIC=y
>  CONFIG_DM_REGULATOR=y
> diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
> index bcc54b7..f5815e5 100644
> --- a/include/configs/rk3399_common.h
> +++ b/include/configs/rk3399_common.h
> @@ -94,8 +94,4 @@
>  #define CONFIG_USB_ETHER_SMSC95XX
>  #define CONFIG_USB_ETHER_RTL8152
>
> -/* rockchip xhci host driver */
> -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
> -#define CONFIG_USB_XHCI_ROCKCHIP
> -
>  #endif
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH 1/2] usb: host: add Kconfig for USB_XHCI_ROCKCHIP

[Simon Glass]

On 21 September 2016 at 03:55, Marek Vasut  wrote:
>
> On 09/21/2016 05:35 AM, Kever Yang wrote:
> > Add a Kconfig for Rockchip xhci controller.
> >
> > Signed-off-by: Kever Yang 
>
> Acked-by: Marek Vasut 
>
> Feel free to pick it through rockchip tree .
>

Applied to u-boot-rockchip, thanks!
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Re: [U-Boot] Please pull u-boot-rockchip

[Simon Glass]

Hi Tom,

On 20 September 2016 at 13:25, Tom Rini  wrote:
> On Sun, Sep 18, 2016 at 09:09:46PM -0600, Simon Glass wrote:
>
>> Hi Tom,
>>
>> Here is some more RK3399 support and a few other changes.
>>
>>
>> The following changes since commit 9a6535e05f17acf03e891266a650cb6029124743:
>>
>>   Merge branch 'master' of git://git.denx.de/u-boot-uniphier
>> (2016-09-18 14:05:30 -0400)
>>
>> are available in the git repository at:
>>
>>   git://git.denx.de/u-boot-rockchip.git
>>
>> for you to fetch changes up to 257aec27f4e694a68c9d7569db9e0ebd05b88aa6:
>>
>>   clk: rk3288: add PWM clock get rate (2016-09-18 21:05:02 -0600)
>>
>
> NAK:
>aarch64:  +   evb-rk3399
> +(evb-rk3399) Error: You must add new CONFIG options using Kconfig
>+(evb-rk3399) The following new ad-hoc CONFIG options were 
> detected:
> +(evb-rk3399) CONFIG_USB_XHCI_ROCKCHIP
>+(evb-rk3399)
> +(evb-rk3399) Please add these via Kconfig instead. Find a suitable Kconfig   
>+(evb-rk3399) file and add a 'config' or 'menuconfig' option.
> +(evb-rk3399) make[1]: *** [no_new_adhoc_configs_check] Error 1
>

Ha, hoist by my own petard! I should not have rebased before sending
it, although it would have failed in any case. I'm pleased to see this
working.

Kever has sent an updated patch so I will resend this later today.

Regards,
Simon
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[U-Boot] [PATCH 0/2] config whitelist: tool update and sync

[Masahiro Yamada]

The current build-whitelist.sh allows to add new options
into the whitelist.  For example, it is possible that somebody
adds #ifdef CONFIG_NEW_OPTITON to his C file.
So, the build-whitelist.sh will pick it up when we run it next time.
We never want to increase the ad-hoc options.
1/2 bans such a case.

2/2 is optional.  It is very easy to reproduce it.



Masahiro Yamada (2):
  build-whitelist: do not add new options to whitelist when update
  Sync config_whitelist.txt

 scripts/build-whitelist.sh   | 10 --
 scripts/config_whitelist.txt |  2 --
 2 files changed, 8 insertions(+), 4 deletions(-)

-- 
1.9.1

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[U-Boot] [PATCH 2/2] Sync config_whitelist.txt

[Masahiro Yamada]

It is a good practice to drop a option from the whitelist when we
convert it to Kconfig, but we may sometimes forget to do that.

So, it might be a good idea to sync the whitelist from time to time.

This commit was generated by:
  scripts/build-whitelist.sh

Looks like we had a bit progress...

Signed-off-by: Masahiro Yamada 
---

You do not need to apply this, but this is a reminder
for periodical sync, like we sync defconfigs from time to time.

Tom can directly run scripts/build-whitelist.sh in the u-boot/master
while drinking coffee.


 scripts/config_whitelist.txt | 2 --
 1 file changed, 2 deletions(-)

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index cb4516f..783fb5a 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -891,7 +891,6 @@ CONFIG_DMC_DDRTR2
 CONFIG_DNET_AUTONEG_TIMEOUT
 CONFIG_DNP5370_EXT_WD_DISABLE
 CONFIG_DOS_PARTITION
-CONFIG_DPLL_SSC_RATE_1PER
 CONFIG_DP_DDR_CTRL
 CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
 CONFIG_DP_DDR_NUM_CTRLS
@@ -1656,7 +1655,6 @@ CONFIG_ICACHE
 CONFIG_ICACHE_OFF
 CONFIG_ICON
 CONFIG_ICS307_REFCLK_HZ
-CONFIG_IDENT_STRING
 CONFIG_IDE_8xx_DIRECT
 CONFIG_IDE_8xx_PCCARD
 CONFIG_IDE_INIT_POSTRESET
-- 
1.9.1

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[U-Boot] [PATCH 1/2] build-whitelist: do not add new options to whitelist when update

[Masahiro Yamada]

If somebody adds a reference to a new CONFIG option in .c files,
it will be added in the whitelist when we sync it.
(For example, if we run scripts/build-whitelist.sh against commit
a2ed3f452dd1, a new option CONFIG_USB_XHCI_UNIPHIER will appear
in the list.)

In order to make steady progress of Kconfig migration, we want to
only decrease options in the whitelist, never increase.

So, when we update the whitelist, we should create a temporary list,
then take the intersection of the temporary list and the current
whitelist.

Signed-off-by: Masahiro Yamada 
---

 scripts/build-whitelist.sh | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/scripts/build-whitelist.sh b/scripts/build-whitelist.sh
index 7cf7a66..b681ed4 100755
--- a/scripts/build-whitelist.sh
+++ b/scripts/build-whitelist.sh
@@ -45,7 +45,13 @@ cat `find . -name "Kconfig*"` |sed -n \
 
 # Use only the options that are present in the first file but not the second.
 comm -23 scripts/config_whitelist.txt.tmp1 scripts/config_whitelist.txt.tmp2 \
-   |sort |uniq >scripts/config_whitelist.txt
-rm scripts/config_whitelist.txt.tmp1 scripts/config_whitelist.txt.tmp2
+   |sort |uniq >scripts/config_whitelist.txt.tmp3
+
+comm -12 scripts/config_whitelist.txt.tmp3 scripts/config_whitelist.txt \
+   > scripts/config_whitelist.txt.tmp4
+
+mv scripts/config_whitelist.txt.tmp4 scripts/config_whitelist.txt
+
+rm scripts/config_whitelist.txt.tmp*
 
 unset LC_ALL LC_COLLATE
-- 
1.9.1

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Re: [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update

[Jagan Teki]

On Wed, Sep 21, 2016 at 2:36 AM, Jagan Teki  wrote:
> This series is the spilt one of v3 "spi/sf: Update on flash detection" [1]
> and deals with Code remove and update.
>
> Changes for v3:
> - New patches
> - Fix checkpatch.pl
> - Fix BIT positions in spi.h
> - Fix ti_qspi.c mode
> - Fix commit Nit: s/becuase/because
>
> Changes for v2:
> - New patches.
>
> [1] 
> http://u-boot.10912.n7.nabble.com/PATCH-v3-00-27-spi-sf-Updates-on-flash-detection-td264084.html
>
> Jagan Teki (7):
>   sf: Simplify fastest read cmd code
>   sf: Remove e_rd_cmd from param table
>   spi: Use mode for rx mode flags
>   spi: Remove SPI_RX_FAST
>   sf: Remove SECT_32K
>   sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
>   sf: Move flags macro's to spi_flash_params{} members

Applied to u-boot-spi/master

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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[U-Boot] Pull request: u-boot-spi/master

[Jagan Teki]

Hi Tom,

Please take this PR.

thanks!
Jagan.

The following changes since commit 9b1b6d42256a4c2e59c803afdbf90d39371e61ba:

  Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL" 
(2016-09-19 15:20:09 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-spi.git master

for you to fetch changes up to fe4753cbc6c51f712024121aad0d21293d6a85fc:

  configs: fsl: Move SPI/SPI-FLASH configs to defconfig (2016-09-22 14:17:02 
+0530)


Jagan Teki (9):
  sf: Simplify fastest read cmd code
  sf: Remove e_rd_cmd from param table
  spi: Use mode for rx mode flags
  spi: Remove SPI_RX_FAST
  sf: Remove SECT_32K
  sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
  sf: Move flags macro's to spi_flash_params{} members
  spi: Kconfig: Move FSL_QSPI entry to non-dm place
  configs: fsl: Move SPI/SPI-FLASH configs to defconfig

Lad, Prabhakar (1):
  spi: zynq_spi: Fix infinite looping while xfer

Vignesh R (2):
  spi: ti_qspi: use 128 bit transfer mode when writing to flash
  spi: ti_qspi: Remove unnecessary udelay for AM437x

 configs/mx6sxsabreauto_defconfig  |   1 +
 configs/mx6ul_14x14_evk_defconfig |   4 +
 configs/mx6ul_9x9_evk_defconfig   |   4 +
 drivers/mtd/spi/sandbox.c |   5 +-
 drivers/mtd/spi/sf_internal.h |  41 ++--
 drivers/mtd/spi/sf_params.c   | 200 +++---
 drivers/mtd/spi/spi_flash.c   |  36 +++
 drivers/spi/Kconfig   |  14 +--
 drivers/spi/cadence_qspi.c|   2 +-
 drivers/spi/ich.c |   6 +-
 drivers/spi/spi-uclass.c  |  11 +--
 drivers/spi/ti_qspi.c |  52 +++---
 drivers/spi/zynq_spi.c|   2 +-
 include/configs/mx6sxsabreauto.h  |   1 -
 include/configs/mx6ul_14x14_evk.h |   4 -
 include/spi.h |  13 +--
 16 files changed, 188 insertions(+), 208 deletions(-)
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[U-Boot] [PATCH v3 00/16] imx6: Add Engicam i.CoreM6 QDL support

[Jagan Teki]

This series supports Engicam i.CoreM6 QDL modules on top of u-boot-imx.git/next
and test on the respective starter kits as well.

Changes for v3:
- Remove "v2 01/17 imx: iomux-v3: Fix build error with snvs base" patch
- Remove 'default n' on Kconfig DEFAULT_FDT_FILE patch
- Add minimal devicetree support for Engicam i.CoreM6 QDL
- Add is_mx6dl()
- Add is_mx6solo()
- Use is_mx6dq()
- Add last commit sha1 and header in pull devicetree files from Linux

Changes for v2:
- Make static to local iomux structure in board file
- Corrected rowaddr in mx6_ddr3_cfg
- Used imx_ddr_size
- Add FEC support and tested the same
- Add DM_GPIO, DM_MMC support
- Add pinctrl support
- Add devicetree support

Jagan Teki (16):
  serial: Kconfig: Add MXC_UART entry
  thermal: Kconfig: Add IMX_THERMAL entry
  Kconfig: Add DEFAULT_FDT_FILE entry
  arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support
  imx6: icorem6: Add ENET support
  imx: s/docs\/README.imximage/doc\/README.imximage/g
  arm: dts: Add devicetree for i.MX6DL
  arm: dts: Add devicetree for i.MX6DQL
  arm: dts: imx6dl: Add pinctrl defines
  dt-bindings: clock: imx6qdl: Add clock defines
  arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo
  imx6q: icorem6: Enable pinctrl driver
  engicam: icorem6: Add DM_GPIO, DM_MMC support
  arm: dts: Add devicetree for i.MX6Q
  arm: dts: imx6q: Add pinctrl defines
  arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual

 arch/arm/cpu/armv7/mx6/Kconfig  |   11 +
 arch/arm/dts/Makefile   |4 +-
 arch/arm/dts/imx6dl-icore.dts   |   59 ++
 arch/arm/dts/imx6dl-pinfunc.h   | 1091 +++
 arch/arm/dts/imx6dl.dtsi|  133 +++
 arch/arm/dts/imx6q-icore.dts|   59 ++
 arch/arm/dts/imx6q-pinfunc.h| 1047 ++
 arch/arm/dts/imx6q.dtsi |  300 +++
 arch/arm/dts/imx6qdl-icore.dtsi |  196 
 arch/arm/dts/imx6qdl.dtsi   | 1281 +++
 arch/arm/include/asm/imx-common/sys_proto.h |2 +
 board/barco/titanium/imximage.cfg   |2 +-
 board/ccv/xpress/imximage.cfg   |2 +-
 board/denx/m53evk/imximage.cfg  |2 +-
 board/engicam/icorem6/Kconfig   |   12 +
 board/engicam/icorem6/MAINTAINERS   |6 +
 board/engicam/icorem6/Makefile  |6 +
 board/engicam/icorem6/README|   38 +
 board/engicam/icorem6/icorem6.c |  474 ++
 board/freescale/mx6sabresd/mx6dlsabresd.cfg |2 +-
 board/freescale/mx6slevk/imximage.cfg   |2 +-
 board/freescale/mx6ullevk/imximage.cfg  |2 +-
 board/freescale/mx7dsabresd/imximage.cfg|2 +-
 board/freescale/s32v234evb/s32v234evb.cfg   |2 +-
 board/freescale/vf610twr/imximage.cfg   |2 +-
 board/phytec/pcm052/imximage.cfg|2 +-
 board/technexion/pico-imx6ul/imximage.cfg   |2 +-
 board/toradex/colibri_imx7/imximage.cfg |2 +-
 board/toradex/colibri_vf/imximage.cfg   |2 +-
 board/warp/imximage.cfg |2 +-
 board/warp7/imximage.cfg|2 +-
 common/Kconfig  |5 +
 configs/imx6qdl_icore_defconfig |   32 +
 drivers/serial/Kconfig  |7 +
 drivers/thermal/Kconfig |   13 +
 include/configs/imx6qdl_icore.h |  131 +++
 include/dt-bindings/clock/imx6qdl-clock.h   |  274 ++
 37 files changed, 5195 insertions(+), 16 deletions(-)
 create mode 100644 arch/arm/dts/imx6dl-icore.dts
 create mode 100644 arch/arm/dts/imx6dl-pinfunc.h
 create mode 100644 arch/arm/dts/imx6dl.dtsi
 create mode 100644 arch/arm/dts/imx6q-icore.dts
 create mode 100644 arch/arm/dts/imx6q-pinfunc.h
 create mode 100644 arch/arm/dts/imx6q.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-icore.dtsi
 create mode 100644 arch/arm/dts/imx6qdl.dtsi
 create mode 100644 board/engicam/icorem6/Kconfig
 create mode 100644 board/engicam/icorem6/MAINTAINERS
 create mode 100644 board/engicam/icorem6/Makefile
 create mode 100644 board/engicam/icorem6/README
 create mode 100644 board/engicam/icorem6/icorem6.c
 create mode 100644 configs/imx6qdl_icore_defconfig
 create mode 100644 include/configs/imx6qdl_icore.h
 create mode 100644 include/dt-bindings/clock/imx6qdl-clock.h

-- 
2.7.4

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[U-Boot] [PATCH] omap4_panda: Disable ext2/3/4 support in SPL

[Tom Rini]

Pandaboard is growing again, disable EXT2/3/4 support in SPL save more
space.

Signed-off-by: Tom Rini 
---
 configs/omap4_panda_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index af6dc31a1d5f..e496afe9f879 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_OMAP44XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
 # CONFIG_SPL_I2C_SUPPORT is not set
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_TARGET_OMAP4_PANDA=y
-- 
1.9.1

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[U-Boot] [PATCH v3 01/16] serial: Kconfig: Add MXC_UART entry

[Jagan Teki]

Added kconfig for MXC_UART driver.

Cc: Simon Glass 
Cc: Fabio Estevam 
Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 drivers/serial/Kconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ab5df70..9abf158 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -295,6 +295,13 @@ config FSL_LPUART
  Select this to enable a Low Power UART for Freescale VF610 and
  QorIQ Layerscape devices.
 
+config MXC_UART
+   bool "IMX serial port support"
+   depends on MX6
+   help
+ If you have a machine based on a Motorola IMX CPU you
+ can enable its onboard serial port by enabling this option.
+
 config PIC32_SERIAL
bool "Support for Microchip PIC32 on-chip UART"
depends on DM_SERIAL && MACH_PIC32
-- 
2.7.4

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[U-Boot] [PATCH v3 02/16] thermal: Kconfig: Add IMX_THERMAL entry

[Jagan Teki]

Added kconfig for IMX_THERMAL driver.

Cc: Simon Glass 
Cc: Fabio Estevam 
Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 drivers/thermal/Kconfig | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 8e22ea7..f0ffbb3 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -5,3 +5,16 @@ config DM_THERMAL
  temperature sensors to permit warnings, speed throttling or even
  automatic power-off when the temperature gets too high or low. Other
  devices may be discrete but connected on a suitable bus.
+
+if DM_THERMAL
+
+config IMX_THERMAL
+   bool "Temperature sensor driver for Freescale i.MX SoCs"
+   depends on MX6
+   help
+ Support for Temperature Monitor (TEMPMON) found on Freescale i.MX 
SoCs.
+  It supports one critical trip point and one passive trip point.  The
+  cpufreq is used as the cooling device to throttle CPUs when the
+  passive trip is crossed.
+
+endif # if DM_THERMAL
-- 
2.7.4

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[U-Boot] [PATCH v3 04/16] arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support

[Jagan Teki]

Boot Log for i.CoreM6 DualLite/Solo Starter Kit:
---

U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6SOLO rev1.3 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 31C
Reset cause: POR
DRAM:  256 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0 is current device
switch to partitions #0, OK
mmc0 is current device
reading boot.scr
** Unable to read file boot.scr **
reading zImage
6741808 bytes read in 341 ms (18.9 MiB/s)
Booting from mmc ...
reading imx6dl-icore.dtb
30600 bytes read in 19 ms (1.5 MiB/s)
   Booting using the fdt blob at 0x1800
   Using Device Tree in place at 1800, end 1800a787

Starting kernel ...

[0.00] Booting Linux on physical CPU 0x0

Boot Log for i.CoreM6 Quad/Dual Starter Kit:


U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6Q rev1.2 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 28C
Reset cause: POR
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl>

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig  |   8 +
 arch/arm/include/asm/imx-common/sys_proto.h |   2 +
 board/engicam/icorem6/Kconfig   |  12 +
 board/engicam/icorem6/MAINTAINERS   |   6 +
 board/engicam/icorem6/Makefile  |   6 +
 board/engicam/icorem6/README|  31 +++
 board/engicam/icorem6/icorem6.c | 400 
 configs/imx6qdl_icore_defconfig |  27 ++
 include/configs/imx6qdl_icore.h | 115 
 9 files changed, 607 insertions(+)
 create mode 100644 board/engicam/icorem6/Kconfig
 create mode 100644 board/engicam/icorem6/MAINTAINERS
 create mode 100644 board/engicam/icorem6/Makefile
 create mode 100644 board/engicam/icorem6/README
 create mode 100644 board/engicam/icorem6/icorem6.c
 create mode 100644 configs/imx6qdl_icore_defconfig
 create mode 100644 include/configs/imx6qdl_icore.h

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index d851b26..5d549bd 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -95,6 +95,13 @@ config TARGET_MX6CUBOXI
 config TARGET_MX6QARM2
bool "mx6qarm2"
 
+config TARGET_MX6Q_ICORE
+   bool "Support Engicam i.Core"
+   select MX6QDL
+   select DM
+   select DM_THERMAL
+   select SUPPORT_SPL
+
 config TARGET_MX6QSABREAUTO
bool "mx6qsabreauto"
select DM
@@ -225,6 +232,7 @@ source "board/compulab/cm_fx6/Kconfig"
 source "board/congatec/cgtqmx6eval/Kconfig"
 source "board/el/el6x/Kconfig"
 source "board/embest/mx6boards/Kconfig"
+source "board/engicam/icorem6/Kconfig"
 source "board/freescale/mx6qarm2/Kconfig"
 source "board/freescale/mx6qsabreauto/Kconfig"
 source "board/freescale/mx6sabresd/Kconfig"
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h 
b/arch/arm/include/asm/imx-common/sys_proto.h
index 6ace8bb..005435a 100644
--- a/arch/arm/include/asm/imx-common/sys_proto.h
+++ b/arch/arm/include/asm/imx-common/sys_proto.h
@@ -30,8 +30,10 @@
 #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
 #define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
 #define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || 
is_cpu_type(MXC_CPU_MX6DL))
+#define is_mx6dl() (is_cpu_type(MXC_CPU_MX6DL))
 #define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX))
 #define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
+#define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO))
 #define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
 #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
 
diff --git a/board/engicam/icorem6/Kconfig b/board/engicam/icorem6/Kconfig
new file mode 100644
index 000..6d62f0e
--- /dev/null
+++ b/board/engicam/icorem6/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_MX6Q_ICORE
+
+config SYS_BOARD
+   default "icorem6"
+
+config SYS_VENDOR
+   default "engicam"
+
+config SYS_CONFIG_NAME
+   default "imx6qdl_icore"
+
+endif
diff --git a/board/engicam/icorem6/MAINTAINERS 
b/board/engicam/icorem6/MAINTAINERS
new file mode 100644
index 000..3e06c6b
--- /dev/null
+++ b/board/engicam/icorem6/MAINTAINERS
@@ -0,0 +1,6 @@
+ICOREM6QDL BOARD
+M: Jagan Teki 
+S: Maintained
+F: board/engicam/icorem6
+F: inc

[U-Boot] [PATCH v3 03/16] Kconfig: Add DEFAULT_FDT_FILE entry

[Jagan Teki]

Add kconfig entry for CONFIG_DEFAULT_FDT_FILE

Cc: Tom Rini 
Cc: Simon Glass 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 common/Kconfig | 5 +
 1 file changed, 5 insertions(+)

diff --git a/common/Kconfig b/common/Kconfig
index 46e7173..f4e1ab6 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -198,6 +198,11 @@ config CONSOLE_RECORD_IN_SIZE
  The buffer is allocated immediately after the malloc() region is
  ready.
 
+config DEFAULT_FDT_FILE
+   string "Default fdt file"
+   help
+ This option is used to set the default fdt file to boot OS.
+
 config SYS_NO_FLASH
bool "Disable support for parallel NOR flash"
default n
-- 
2.7.4

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[U-Boot] [PATCH v3 05/16] imx6: icorem6: Add ENET support

[Jagan Teki]

Add enet support for engicam icorem6 qdl starter kit.
- Add pinmux settings
- Add board_eth_init

TFTP log:

Net:   FEC [PRIME]
Hit any key to stop autoboot:  0
icorem6qdl> tftpboot {fdt_addr} imx6dl-icore.dtb
Using FEC device
TFTP from server 192.168.2.96; our IP address is 192.168.2.75
Filename 'imx6dl-icore.dtb'.
Load address: 0x0
Loading: ##
 1.3 MiB/s
done
Bytes transferred = 28976 (7130 hex)
CACHE: Misaligned operation at range [, 7130]
icorem6qdl>

Cc: Joe Hershberger 
Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 board/engicam/icorem6/icorem6.c | 72 +
 configs/imx6qdl_icore_defconfig |  2 ++
 include/configs/imx6qdl_icore.h | 12 +++
 3 files changed, 86 insertions(+)

diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index 1856972..a23cb7e 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -9,12 +9,15 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -30,11 +33,28 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |   \
PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
+#define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
+   PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   | \
+   PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
+
 static iomux_v3_cfg_t const uart4_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
 };
 
+static iomux_v3_cfg_t const enet_pads[] = {
+   IOMUX_PADS(PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL | 
PAD_CTL_SRE_FAST)),
+   IOMUX_PADS(PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
 static iomux_v3_cfg_t const usdhc1_pads[] = {
IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -99,6 +119,58 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
+#ifdef CONFIG_FEC_MXC
+#define ENET_PHY_RST   IMX_GPIO_NR(7, 12)
+static int setup_fec(void)
+{
+   struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+   struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+   s32 timeout = 10;
+   u32 reg = 0;
+   int ret;
+
+   /* Enable fec clock */
+   setbits_le32(&ccm->CCGR1, MXC_CCM_CCGR1_ENET_MASK);
+
+   /* use 50MHz */
+   ret = enable_fec_anatop_clock(0, ENET_50MHZ);
+   if (ret)
+   return ret;
+
+   /* Enable PLLs */
+   reg = readl(&anatop->pll_enet);
+   reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN;
+   writel(reg, &anatop->pll_enet);
+   reg = readl(&anatop->pll_enet);
+   reg |= BM_ANADIG_PLL_SYS_ENABLE;
+   while (timeout--) {
+   if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_SYS_LOCK)
+   break;
+   }
+   if (timeout <= 0)
+   return -EIO;
+   reg &= ~BM_ANADIG_PLL_SYS_BYPASS;
+   writel(reg, &anatop->pll_enet);
+
+   /* reset the phy */
+   gpio_direction_output(ENET_PHY_RST, 0);
+   udelay(1);
+   gpio_set_value(ENET_PHY_RST, 1);
+
+   return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+   int ret;
+
+   SETUP_IOMUX_PADS(enet_pads);
+   setup_fec();
+
+   return ret = cpu_eth_init(bis);
+}
+#endif
+
 int board_early_init_f(void)
 {
SETUP_IOMUX_PADS(uart4_pads);
diff --git a/configs/imx6qdl_icore_defconfig b/configs/imx6qdl_icore_defconfig
index a658f4b..bdaf6dc 100644
--- a/configs/imx6qdl_icore_defconfig
+++ b/configs/imx6qdl_icore_defconfig
@@ -14,6 +14,8 @@ CONFIG_SYS_MAXARGS=32
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h
index e12e772..b5ad865 100644
--- a/include/configs/imx6qdl_icore.h
+++ b/include/configs/imx6qdl_icore.h
@@ -101,6 +101,18 @@
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
  

[U-Boot] [PATCH v3 06/16] imx: s/docs\/README.imximage/doc\/README.imximage/g

[Jagan Teki]

Fixed typo for doc/README.imximage on respective imximage.cfg files.

Cc: Tom Rini 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Acked-by: Peng Fan 
Signed-off-by: Jagan Teki 
---
 board/barco/titanium/imximage.cfg   | 2 +-
 board/ccv/xpress/imximage.cfg   | 2 +-
 board/denx/m53evk/imximage.cfg  | 2 +-
 board/freescale/mx6sabresd/mx6dlsabresd.cfg | 2 +-
 board/freescale/mx6slevk/imximage.cfg   | 2 +-
 board/freescale/mx6ullevk/imximage.cfg  | 2 +-
 board/freescale/mx7dsabresd/imximage.cfg| 2 +-
 board/freescale/s32v234evb/s32v234evb.cfg   | 2 +-
 board/freescale/vf610twr/imximage.cfg   | 2 +-
 board/phytec/pcm052/imximage.cfg| 2 +-
 board/technexion/pico-imx6ul/imximage.cfg   | 2 +-
 board/toradex/colibri_imx7/imximage.cfg | 2 +-
 board/toradex/colibri_vf/imximage.cfg   | 2 +-
 board/warp/imximage.cfg | 2 +-
 board/warp7/imximage.cfg| 2 +-
 15 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/board/barco/titanium/imximage.cfg 
b/board/barco/titanium/imximage.cfg
index 7219256..4fb6982 100644
--- a/board/barco/titanium/imximage.cfg
+++ b/board/barco/titanium/imximage.cfg
@@ -7,7 +7,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/ccv/xpress/imximage.cfg b/board/ccv/xpress/imximage.cfg
index 92167c9..d98bc36 100644
--- a/board/ccv/xpress/imximage.cfg
+++ b/board/ccv/xpress/imximage.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/denx/m53evk/imximage.cfg b/board/denx/m53evk/imximage.cfg
index 4cd002c..c0e2602 100644
--- a/board/denx/m53evk/imximage.cfg
+++ b/board/denx/m53evk/imximage.cfg
@@ -4,7 +4,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx6sabresd/mx6dlsabresd.cfg 
b/board/freescale/mx6sabresd/mx6dlsabresd.cfg
index f35f22e..be9f87f 100644
--- a/board/freescale/mx6sabresd/mx6dlsabresd.cfg
+++ b/board/freescale/mx6sabresd/mx6dlsabresd.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx6slevk/imximage.cfg 
b/board/freescale/mx6slevk/imximage.cfg
index c77bbde..024de9c 100644
--- a/board/freescale/mx6slevk/imximage.cfg
+++ b/board/freescale/mx6slevk/imximage.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx6ullevk/imximage.cfg 
b/board/freescale/mx6ullevk/imximage.cfg
index 4604b62..3ae4912 100644
--- a/board/freescale/mx6ullevk/imximage.cfg
+++ b/board/freescale/mx6ullevk/imximage.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx7dsabresd/imximage.cfg 
b/board/freescale/mx7dsabresd/imximage.cfg
index 76574ff..c2b3a8c 100644
--- a/board/freescale/mx7dsabresd/imximage.cfg
+++ b/board/freescale/mx7dsabresd/imximage.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/s32v234evb/s32v234evb.cfg 
b/board/freescale/s32v234evb/s32v234evb.cfg
index 6017a40..6449ef2 100644
--- a/board/freescale/s32v234evb/s32v234evb.cfg
+++ b/board/freescale/s32v234evb/s32v234evb.cfg
@@ -5,7 +5,7 @@
  */
 
 /*
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imx

[U-Boot] [PATCH v3 07/16] arm: dts: Add devicetree for i.MX6DL

[Jagan Teki]

Add i.MX6DL dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6dl.dtsi | 133 +++
 1 file changed, 133 insertions(+)
 create mode 100644 arch/arm/dts/imx6dl.dtsi

diff --git a/arch/arm/dts/imx6dl.dtsi b/arch/arm/dts/imx6dl.dtsi
new file mode 100644
index 000..9a4c22c
--- /dev/null
+++ b/arch/arm/dts/imx6dl.dtsi
@@ -0,0 +1,133 @@
+
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include 
+#include "imx6dl-pinfunc.h"
+#include "imx6qdl.dtsi"
+
+/ {
+   aliases {
+   i2c3 = &i2c4;
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <0>;
+   next-level-cache = <&L2>;
+   operating-points = <
+   /* kHzuV */
+   996000  125
+   792000  1175000
+   396000  115
+   >;
+   fsl,soc-operating-points = <
+   /* ARM kHz  SOC-PU uV */
+   996000  1175000
+   792000  1175000
+   396000  1175000
+   >;
+   clock-latency = <61036>; /* two CLK32 periods */
+   clocks = <&clks IMX6QDL_CLK_ARM>,
+<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
+<&clks IMX6QDL_CLK_STEP>,
+<&clks IMX6QDL_CLK_PLL1_SW>,
+<&clks IMX6QDL_CLK_PLL1_SYS>;
+   clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+   arm-supply = <®_arm>;
+   pu-supply = <®_pu>;
+   soc-supply = <®_soc>;
+   };
+
+   cpu@1 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <1>;
+   next-level-cache = <&L2>;
+   };
+   };
+
+   soc {
+   ocram: sram@0090 {
+   compatible = "mmio-sram";
+   reg = <0x0090 0x2>;
+   clocks = <&clks IMX6QDL_CLK_OCRAM>;
+   };
+
+   aips1: aips-bus@0200 {
+   iomuxc: iomuxc@020e {
+   compatible = "fsl,imx6dl-iomuxc";
+   };
+
+   pxp: pxp@020f {
+   reg = <0x020f 0x4000>;
+   interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
+   };
+
+   epdc: epdc@020f4000 {
+   reg = <0x020f4000 0x4000>;
+   interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
+   };
+
+   lcdif: lcdif@020f8000 {
+   reg = <0x020f8000 0x4000>;
+   interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+   };
+   };
+
+   aips2: aips-bus@0210 {
+   i2c4: i2c@021f8000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
+   reg = <0x021f8000 0x4000>;
+   interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = <&clks IMX6DL_CLK_I2C4>;
+   status = "disabled";
+   };
+   };
+   };
+
+   display-subsystem {
+   compatible = "fsl,imx-display-subsystem";
+   ports = <&ipu1_di0>, <&ipu1_di1>;
+   };
+
+   gpu-subsystem {
+   compatible = "fsl,imx-gpu-subsystem";
+   cores = <&gpu_2d>, <&gpu_3d>;
+   };
+};
+
+&gpt {
+   compatible = "fsl,imx6dl-gpt";
+};
+
+&hdmi {
+   compatible = "fsl,imx6dl-hdmi";
+};
+
+&ldb {
+   clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks 
IMX6QDL_CLK_LDB_DI1_SEL>,
+<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks 
IMX6QDL_CLK_IPU1_DI1_SEL>

[U-Boot] [PATCH v3 08/16] arm: dts: Add devicetree for i.MX6DQL

[Jagan Teki]

Add i.MX6DQL dtsi support from Linux.

Here is the last commit:
"ARM: dts: imx6qdl: Fix SPDIF regression"
(sha1: f065e9e4addd75c21bb976bb2558648bf4f61de6)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6qdl.dtsi | 1281 +
 1 file changed, 1281 insertions(+)
 create mode 100644 arch/arm/dts/imx6qdl.dtsi

diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi
new file mode 100644
index 000..b13b0b2
--- /dev/null
+++ b/arch/arm/dts/imx6qdl.dtsi
@@ -0,0 +1,1281 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include 
+#include 
+
+#include "skeleton.dtsi"
+
+/ {
+   aliases {
+   ethernet0 = &fec;
+   can0 = &can1;
+   can1 = &can2;
+   gpio0 = &gpio1;
+   gpio1 = &gpio2;
+   gpio2 = &gpio3;
+   gpio3 = &gpio4;
+   gpio4 = &gpio5;
+   gpio5 = &gpio6;
+   gpio6 = &gpio7;
+   i2c0 = &i2c1;
+   i2c1 = &i2c2;
+   i2c2 = &i2c3;
+   ipu0 = &ipu1;
+   mmc0 = &usdhc1;
+   mmc1 = &usdhc2;
+   mmc2 = &usdhc3;
+   mmc3 = &usdhc4;
+   serial0 = &uart1;
+   serial1 = &uart2;
+   serial2 = &uart3;
+   serial3 = &uart4;
+   serial4 = &uart5;
+   spi0 = &ecspi1;
+   spi1 = &ecspi2;
+   spi2 = &ecspi3;
+   spi3 = &ecspi4;
+   usbphy0 = &usbphy1;
+   usbphy1 = &usbphy2;
+   };
+
+   clocks {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   ckil {
+   compatible = "fsl,imx-ckil", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <32768>;
+   };
+
+   ckih1 {
+   compatible = "fsl,imx-ckih1", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <0>;
+   };
+
+   osc {
+   compatible = "fsl,imx-osc", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   };
+   };
+
+   soc {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "simple-bus";
+   interrupt-parent = <&gpc>;
+   ranges;
+
+   dma_apbh: dma-apbh@0011 {
+   compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
+   reg = <0x0011 0x2000>;
+   interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>;
+   interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
+   #dma-cells = <1>;
+   dma-channels = <4>;
+   clocks = <&clks IMX6QDL_CLK_APBH_DMA>;
+   };
+
+   gpmi: gpmi-nand@00112000 {
+   compatible = "fsl,imx6q-gpmi-nand";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
+   reg-names = "gpmi-nand", "bch";
+   interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
+   interrupt-names = "bch";
+   clocks = <&clks IMX6QDL_CLK_GPMI_IO>,
+<&clks IMX6QDL_CLK_GPMI_APB>,
+<&clks IMX6QDL_CLK_GPMI_BCH>,
+<&clks IMX6QDL_CLK_GPMI_BCH_APB>,
+<&clks IMX6QDL_CLK_PER1_BCH>;
+   clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
+ "gpmi_bch_apb", "per1_bch";
+   dmas = <&dma_apbh 0>;
+   dma-names = "rx-tx";
+   status = "disabled";
+   };
+
+   hdmi: hdmi@012 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0012 0x9000>;
+   interrupts = <0 115 0x04>;
+   gpr = <&gpr>;
+   clocks = <&clks IMX6QDL_

[U-Boot] [PATCH v3 09/16] arm: dts: imx6dl: Add pinctrl defines

[Jagan Teki]

Add imx6dl pinctrl defines support from Linux.

Here is the last commit:
"ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ"
(sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6dl-pinfunc.h | 1091 +
 1 file changed, 1091 insertions(+)
 create mode 100644 arch/arm/dts/imx6dl-pinfunc.h

diff --git a/arch/arm/dts/imx6dl-pinfunc.h b/arch/arm/dts/imx6dl-pinfunc.h
new file mode 100644
index 000..0ead323
--- /dev/null
+++ b/arch/arm/dts/imx6dl-pinfunc.h
@@ -0,0 +1,1091 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DTS_IMX6DL_PINFUNC_H
+#define __DTS_IMX6DL_PINFUNC_H
+
+/*
+ * The pin function ID is a tuple of
+ * 
+ */
+#define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO  0x04c 0x360 0x7f8 0x2 0x0
+#define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA0x04c 0x360 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA0x04c 0x360 0x8fc 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28   0x04c 0x360 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07  0x04c 0x360 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS0x050 0x364 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0   0x050 0x364 0x800 0x2 0x0
+#define MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA0x050 0x364 0x8fc 0x3 0x1
+#define MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA0x050 0x364 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29   0x050 0x364 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08  0x050 0x364 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x054 0x368 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT12__EIM_DATA08   0x054 0x368 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA0x054 0x368 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA0x054 0x368 0x914 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30   0x054 0x368 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09  0x054 0x368 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x058 0x36c 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT13__EIM_DATA09   0x058 0x36c 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA0x058 0x36c 0x914 0x3 0x1
+#define MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA0x058 0x36c 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31   0x058 0x36c 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10  0x058 0x36c 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x05c 0x370 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT14__EIM_DATA10   0x05c 0x370 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA0x05c 0x370 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA0x05c 0x370 0x91c 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00   0x05c 0x370 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11  0x05c 0x370 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x060 0x374 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT15__EIM_DATA11   0x060 0x374 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA0x060 0x374 0x91c 0x3 0x1
+#define MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA0x060 0x374 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01   0x060 0x374 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12  0x060 0x374 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x064 0x378 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT16__EIM_DATA12   0x064 0x378 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B  0x064 0x378 0x910 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B  0x064 0x378 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02   0x064 0x378 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13  0x064 0x378 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x068 0x37c 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT17__EIM_DATA13   0x068 0x37c 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B  0x068 0x37c 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B  0x068 0x37c 0x910 0x3 0x1
+#define MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03   0x068 0x37c 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14  0x068 0x37c 0x000 0x7 0x0
+#define MX6QD

[U-Boot] [PATCH v3 12/16] imx6q: icorem6: Enable pinctrl driver

[Jagan Teki]

Enable imx6 pinctrl driver support for i.CoreM6.

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 configs/imx6qdl_icore_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/imx6qdl_icore_defconfig b/configs/imx6qdl_icore_defconfig
index 9fbe974..20a8289 100644
--- a/configs/imx6qdl_icore_defconfig
+++ b/configs/imx6qdl_icore_defconfig
@@ -28,3 +28,5 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_LIBFDT=y
 CONFIG_MXC_UART=y
 CONFIG_IMX_THERMAL=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
-- 
2.7.4

___
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[U-Boot] [PATCH v3 14/16] arm: dts: Add devicetree for i.MX6Q

[Jagan Teki]

Add i.MX6Q dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6q.dtsi | 300 
 1 file changed, 300 insertions(+)
 create mode 100644 arch/arm/dts/imx6q.dtsi

diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi
new file mode 100644
index 000..c30c836
--- /dev/null
+++ b/arch/arm/dts/imx6q.dtsi
@@ -0,0 +1,300 @@
+
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include 
+#include "imx6q-pinfunc.h"
+#include "imx6qdl.dtsi"
+
+/ {
+   aliases {
+   ipu1 = &ipu2;
+   spi4 = &ecspi5;
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <0>;
+   next-level-cache = <&L2>;
+   operating-points = <
+   /* kHzuV */
+   120 1275000
+   996000  125
+   852000  125
+   792000  1175000
+   396000  975000
+   >;
+   fsl,soc-operating-points = <
+   /* ARM kHz  SOC-PU uV */
+   120 1275000
+   996000  125
+   852000  125
+   792000  1175000
+   396000  1175000
+   >;
+   clock-latency = <61036>; /* two CLK32 periods */
+   clocks = <&clks IMX6QDL_CLK_ARM>,
+<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
+<&clks IMX6QDL_CLK_STEP>,
+<&clks IMX6QDL_CLK_PLL1_SW>,
+<&clks IMX6QDL_CLK_PLL1_SYS>;
+   clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+   arm-supply = <®_arm>;
+   pu-supply = <®_pu>;
+   soc-supply = <®_soc>;
+   };
+
+   cpu@1 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <1>;
+   next-level-cache = <&L2>;
+   };
+
+   cpu@2 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <2>;
+   next-level-cache = <&L2>;
+   };
+
+   cpu@3 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <3>;
+   next-level-cache = <&L2>;
+   };
+   };
+
+   soc {
+   ocram: sram@0090 {
+   compatible = "mmio-sram";
+   reg = <0x0090 0x4>;
+   clocks = <&clks IMX6QDL_CLK_OCRAM>;
+   };
+
+   aips-bus@0200 { /* AIPS1 */
+   spba-bus@0200 {
+   ecspi5: ecspi@02018000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "fsl,imx6q-ecspi", 
"fsl,imx51-ecspi";
+   reg = <0x02018000 0x4000>;
+   interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = <&clks IMX6Q_CLK_ECSPI5>,
+<&clks IMX6Q_CLK_ECSPI5>;
+   clock-names = "ipg", "per";
+   dmas = <&sdma 11 7 1>, <&sdma 12 7 2>;
+   dma-names = "rx", "tx";
+   status = "disabled";
+   };
+   };
+
+   iomuxc: iomuxc@020e {
+   compatible = "fsl,imx6q-iomuxc";
+   };
+   };
+
+   sata: sata@0220 {
+   compatible = "fsl,imx6q-ahci";
+   reg = <0x0220 0x4000>;

[U-Boot] [PATCH v3 13/16] engicam: icorem6: Add DM_GPIO, DM_MMC support

[Jagan Teki]

Add DM_GPIO, DM_MMC support for u-boot and disable for SPL.

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig  |   2 +
 board/engicam/icorem6/icorem6.c | 142 
 include/configs/imx6qdl_icore.h |   4 ++
 3 files changed, 78 insertions(+), 70 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index e2431a8..762a581 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -100,6 +100,8 @@ config TARGET_MX6Q_ICORE
select MX6QDL
select OF_CONTROL
select DM
+   select DM_GPIO
+   select DM_MMC
select DM_THERMAL
select SUPPORT_SPL
 
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index a23cb7e..a370c8b 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -7,8 +7,6 @@
  */
 
 #include 
-#include 
-#include 
 #include 
 #include 
 
@@ -29,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |   \
PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
-   PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |   \
-   PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
 #define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   | \
PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
@@ -55,70 +49,6 @@ static iomux_v3_cfg_t const enet_pads[] = {
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
 };
 
-static iomux_v3_cfg_t const usdhc1_pads[] = {
-   IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
-};
-
-#ifdef CONFIG_FSL_ESDHC
-#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1)
-
-struct fsl_esdhc_cfg usdhc_cfg[1] = {
-   {USDHC1_BASE_ADDR, 0, 4},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-   struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-   int ret = 0;
-
-   switch (cfg->esdhc_base) {
-   case USDHC1_BASE_ADDR:
-   ret = !gpio_get_value(USDHC1_CD_GPIO);
-   break;
-   }
-
-   return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-   int i, ret;
-
-   /*
-   * According to the board_mmc_init() the following map is done:
-   * (U-boot device node)(Physical Port)
-   * mmc0  USDHC1
-   */
-   for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
-   switch (i) {
-   case 0:
-   SETUP_IOMUX_PADS(usdhc1_pads);
-   gpio_direction_input(USDHC1_CD_GPIO);
-   usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-   break;
-   default:
-   printf("Warning - USDHC%d controller not supporting\n",
-  i + 1);
-   return 0;
-   }
-
-   ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
-   if (ret) {
-   printf("Warning: failed to initialize mmc dev %d\n", i);
-   return ret;
-   }
-   }
-
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FEC_MXC
 #define ENET_PHY_RST   IMX_GPIO_NR(7, 12)
 static int setup_fec(void)
@@ -200,6 +130,78 @@ int dram_init(void)
 #include 
 #include 
 
+/* MMC board initialization is needed till adding DM support in SPL */
+#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
+#include 
+#include 
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
+   PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |   \
+   PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+   IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
+};
+
+#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1)
+
+struct fs

[U-Boot] [PATCH v3 16/16] arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual

[Jagan Teki]

i.CoreM6 Quad/Dual modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU   NXP i.MX6 DQ, 800MHz
RAM   1GB, 32, 64 bit, DDR3-800/1066
NAND  SLC,512MB
Power supply  Single 5V
MAX LCD RES   FULLHD

and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/Makefile|  3 ++-
 arch/arm/dts/imx6q-icore.dts | 59 
 board/engicam/icorem6/README |  9 ++-
 3 files changed, 69 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/imx6q-icore.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 39c1d2c..376fc58 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -274,7 +274,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb
 
 dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
-   imx6dl-icore.dtb
+   imx6dl-icore.dtb \
+   imx6q-icore.dtb
 
 dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
diff --git a/arch/arm/dts/imx6q-icore.dts b/arch/arm/dts/imx6q-icore.dts
new file mode 100644
index 000..025f543
--- /dev/null
+++ b/arch/arm/dts/imx6q-icore.dts
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore.dtsi"
+
+/ {
+   model = "Engicam i.CoreM6 Quad/Dual Starter Kit";
+   compatible = "engicam,imx6-icore", "fsl,imx6q";
+};
+
+&can1 {
+   status = "okay";
+};
+
+&can2 {
+   status = "okay";
+};
diff --git a/board/engicam/icorem6/README b/board/engicam/icorem6/README
index 6fe7a3c..9ee01ca 100644
--- a/board/engicam/icorem6/README
+++ b/board/engicam/icorem6/README
@@ -1,12 +1,19 @@
 How to use U-Boot on Engicam i.CoreM6 DualLite/Solo and Quad/Dual Starter Kit:
 -
 
-- Build U-Boot for Engicam i.CoreM6 QDL:
+- Configure U-Boot for Engicam i.CoreM6 QDL:
 
 $ make mrproper
 $ make icorem6qdl_defconfig
+
+- Build for i.CoreM6 DualLite/Solo
+
 $ make
 
+- Build for i.CoreM6 Quad/Dual
+
+$ make DEVICE_TREE=imx6q-icore
+
 This will generate the SPL image called SPL and the u-boot-dtb.img.
 
 - Flash the SPL image into the micro SD card:
-- 
2.7.4

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH v3 11/16] arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo

[Jagan Teki]

i.CoreM6 DualLite/Solo modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU   NXP i.MX6 DL, 800MHz
RAM   1GB, 32, 64 bit, DDR3-800/1066
NAND  SLC,512MB
Power supply  Single 5V
MAX LCD RES   FULLHD

and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig  |   1 +
 arch/arm/dts/Makefile   |   3 +-
 arch/arm/dts/imx6dl-icore.dts   |  59 
 arch/arm/dts/imx6qdl-icore.dtsi | 196 
 board/engicam/icorem6/README|   6 +-
 configs/imx6qdl_icore_defconfig |   1 +
 6 files changed, 262 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/imx6dl-icore.dts
 create mode 100644 arch/arm/dts/imx6qdl-icore.dtsi

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 5d549bd..e2431a8 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -98,6 +98,7 @@ config TARGET_MX6QARM2
 config TARGET_MX6Q_ICORE
bool "Support Engicam i.Core"
select MX6QDL
+   select OF_CONTROL
select DM
select DM_THERMAL
select SUPPORT_SPL
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 74d6ed2..39c1d2c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -273,7 +273,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
 
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb
 
-dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb
+dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
+   imx6dl-icore.dtb
 
 dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
diff --git a/arch/arm/dts/imx6dl-icore.dts b/arch/arm/dts/imx6dl-icore.dts
new file mode 100644
index 000..aec332c
--- /dev/null
+++ b/arch/arm/dts/imx6dl-icore.dts
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-icore.dtsi"
+
+/ {
+   model = "Engicam i.CoreM6 DualLite/Solo Starter Kit";
+   compatible = "engicam,imx6-icore", "fsl,imx6dl";
+};
+
+&can1 {
+   status = "okay";
+};
+
+&can2 {
+   status = "okay";
+};
diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi
new file mode 100644
index 000..f424cd5
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-icore.dtsi
@@ -0,0 +1,196 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful

[U-Boot] [PATCH v3 10/16] dt-bindings: clock: imx6qdl: Add clock defines

[Jagan Teki]

Add imx6qdl clock header defines support from Linux.

"clk: imx: Add clock support for imx6qp"
(sha1: ee36027427c769b0b9e5e205fe43aced93d6aa66)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 include/dt-bindings/clock/imx6qdl-clock.h | 274 ++
 1 file changed, 274 insertions(+)
 create mode 100644 include/dt-bindings/clock/imx6qdl-clock.h

diff --git a/include/dt-bindings/clock/imx6qdl-clock.h 
b/include/dt-bindings/clock/imx6qdl-clock.h
new file mode 100644
index 000..2905033
--- /dev/null
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -0,0 +1,274 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_IMX6QDL_H
+#define __DT_BINDINGS_CLOCK_IMX6QDL_H
+
+#define IMX6QDL_CLK_DUMMY  0
+#define IMX6QDL_CLK_CKIL   1
+#define IMX6QDL_CLK_CKIH   2
+#define IMX6QDL_CLK_OSC3
+#define IMX6QDL_CLK_PLL2_PFD0_352M 4
+#define IMX6QDL_CLK_PLL2_PFD1_594M 5
+#define IMX6QDL_CLK_PLL2_PFD2_396M 6
+#define IMX6QDL_CLK_PLL3_PFD0_720M 7
+#define IMX6QDL_CLK_PLL3_PFD1_540M 8
+#define IMX6QDL_CLK_PLL3_PFD2_508M 9
+#define IMX6QDL_CLK_PLL3_PFD3_454M 10
+#define IMX6QDL_CLK_PLL2_198M  11
+#define IMX6QDL_CLK_PLL3_120M  12
+#define IMX6QDL_CLK_PLL3_80M   13
+#define IMX6QDL_CLK_PLL3_60M   14
+#define IMX6QDL_CLK_TWD15
+#define IMX6QDL_CLK_STEP   16
+#define IMX6QDL_CLK_PLL1_SW17
+#define IMX6QDL_CLK_PERIPH_PRE 18
+#define IMX6QDL_CLK_PERIPH2_PRE19
+#define IMX6QDL_CLK_PERIPH_CLK2_SEL20
+#define IMX6QDL_CLK_PERIPH2_CLK2_SEL   21
+#define IMX6QDL_CLK_AXI_SEL22
+#define IMX6QDL_CLK_ESAI_SEL   23
+#define IMX6QDL_CLK_ASRC_SEL   24
+#define IMX6QDL_CLK_SPDIF_SEL  25
+#define IMX6QDL_CLK_GPU2D_AXI  26
+#define IMX6QDL_CLK_GPU3D_AXI  27
+#define IMX6QDL_CLK_GPU2D_CORE_SEL 28
+#define IMX6QDL_CLK_GPU3D_CORE_SEL 29
+#define IMX6QDL_CLK_GPU3D_SHADER_SEL   30
+#define IMX6QDL_CLK_IPU1_SEL   31
+#define IMX6QDL_CLK_IPU2_SEL   32
+#define IMX6QDL_CLK_LDB_DI0_SEL33
+#define IMX6QDL_CLK_LDB_DI1_SEL34
+#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL   35
+#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL   36
+#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL   37
+#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL   38
+#define IMX6QDL_CLK_IPU1_DI0_SEL   39
+#define IMX6QDL_CLK_IPU1_DI1_SEL   40
+#define IMX6QDL_CLK_IPU2_DI0_SEL   41
+#define IMX6QDL_CLK_IPU2_DI1_SEL   42
+#define IMX6QDL_CLK_HSI_TX_SEL 43
+#define IMX6QDL_CLK_PCIE_AXI_SEL   44
+#define IMX6QDL_CLK_SSI1_SEL   45
+#define IMX6QDL_CLK_SSI2_SEL   46
+#define IMX6QDL_CLK_SSI3_SEL   47
+#define IMX6QDL_CLK_USDHC1_SEL 48
+#define IMX6QDL_CLK_USDHC2_SEL 49
+#define IMX6QDL_CLK_USDHC3_SEL 50
+#define IMX6QDL_CLK_USDHC4_SEL 51
+#define IMX6QDL_CLK_ENFC_SEL   52
+#define IMX6QDL_CLK_EIM_SEL53
+#define IMX6QDL_CLK_EIM_SLOW_SEL   54
+#define IMX6QDL_CLK_VDO_AXI_SEL55
+#define IMX6QDL_CLK_VPU_AXI_SEL56
+#define IMX6QDL_CLK_CKO1_SEL   57
+#define IMX6QDL_CLK_PERIPH 58
+#define IMX6QDL_CLK_PERIPH259
+#define IMX6QDL_CLK_PERIPH_CLK260
+#define IMX6QDL_CLK_PERIPH2_CLK2   61
+#define IMX6QDL_CLK_IPG62
+#define IMX6QDL_CLK_IPG_PER63
+#define IMX6QDL_CLK_ESAI_PRED  64
+#define IMX6QDL_CLK_ESAI_PODF  65
+#define IMX6QDL_CLK_ASRC_PRED  66
+#define IMX6QDL_CLK_ASRC_PODF  67
+#define IMX6QDL_CLK_SPDIF_PRED 68
+#define IMX6QDL_CLK_SPDIF_PODF 69
+#define IMX6QDL_CLK_CAN_ROOT   70
+#define IMX6QDL_CLK_ECSPI_ROOT 71
+#define IMX6QDL_CLK_GPU2D_CORE_PODF72
+#define IMX6QDL_CLK_GPU3D_CORE_PODF73
+#define IMX6QDL_CLK_GPU3D_SHADER   74
+#define IMX6QDL_CLK_IPU1_PODF  75
+#define IMX6QDL_CLK_IPU2_PODF  76
+#defi

Re: [U-Boot] [GIT PULL] u-boot-mips/master

[Tom Rini]

On Wed, Sep 21, 2016 at 05:49:14PM +0200, Daniel Schwierzeck wrote:

> Hi Tom,
> 
> this pull-request introduces:
> - new board: MIPSfpga
> - new board: Boston with variants for MIPS32r2/MIPS64r2 and BE/LE
> - updates to DM core code needed for Boston board
> - support for L2 cache and MIPS coherency manager
> - various fixes on cache initialization
> 
> 
> The following changes since commit 9b1b6d42256a4c2e59c803afdbf90d39371e61ba:
> 
>   Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL" 
> (2016-09-19 15:20:09 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-mips.git master
> 
> for you to fetch changes up to 31d36f748c52b22833aa946f6c406cc8fb2f1908:
> 
>   MIPS: Hang if run on a secondary CPU (2016-09-21 17:04:53 +0200)
> 

Applied to u-boot/master, thanks!




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Re: [U-Boot] Please pull u-boot-mmc

[Tom Rini]

On Wed, Sep 21, 2016 at 04:29:37PM +0900, Jaehoon Chung wrote:

> Dear Tom,
> 
> Could pull these patches on u-boot/master?
> 
> The following changes since commit 9b1b6d42256a4c2e59c803afdbf90d39371e61ba:
> 
>   Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL" 
> (2016-09-19 15:20:09 -0400)
> 
> are available in the git repository at:
> 
>   http://git.denx.de/u-boot-mmc.git master
> 
> for you to fetch changes up to 2b42903397b4d6b68fe2af95565a8953b08ab96e:
> 
>   mmc: dw_mmc: push/pop all FIFO data if any data request (2016-09-21 
> 16:00:14 +0900)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] clk.h: Add

[Tom Rini]

On Wed, Sep 21, 2016 at 05:57:24PM -0400, Tom Rini wrote:

> Since we return -ENOSYS in some cases we must have 
> available.
> 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH v3 15/16] arm: dts: imx6q: Add pinctrl defines

[Jagan Teki]

Add imx6q pinctrl defines support from Linux.

Here is the last commit:
"ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ"
(sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6q-pinfunc.h | 1047 ++
 1 file changed, 1047 insertions(+)
 create mode 100644 arch/arm/dts/imx6q-pinfunc.h

diff --git a/arch/arm/dts/imx6q-pinfunc.h b/arch/arm/dts/imx6q-pinfunc.h
new file mode 100644
index 000..9fc6120
--- /dev/null
+++ b/arch/arm/dts/imx6q-pinfunc.h
@@ -0,0 +1,1047 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DTS_IMX6Q_PINFUNC_H
+#define __DTS_IMX6Q_PINFUNC_H
+
+/*
+ * The pin function ID is a tuple of
+ * 
+ */
+#define MX6QDL_PAD_SD2_DAT1__SD2_DATA1  0x04c 0x360 0x000 0x0 0x0
+#define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0
+#define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B  0x04c 0x360 0x000 0x2 0x0
+#define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS  0x04c 0x360 0x7c8 0x3 0x0
+#define MX6QDL_PAD_SD2_DAT1__KEY_COL7   0x04c 0x360 0x8f0 0x4 0x0
+#define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0
+#define MX6QDL_PAD_SD2_DAT2__SD2_DATA2  0x050 0x364 0x000 0x0 0x0
+#define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0
+#define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B  0x050 0x364 0x000 0x2 0x0
+#define MX6QDL_PAD_SD2_DAT2__AUD4_TXD   0x050 0x364 0x7b8 0x3 0x0
+#define MX6QDL_PAD_SD2_DAT2__KEY_ROW6   0x050 0x364 0x8f8 0x4 0x0
+#define MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x050 0x364 0x000 0x5 0x0
+#define MX6QDL_PAD_SD2_DAT0__SD2_DATA0  0x054 0x368 0x000 0x0 0x0
+#define MX6QDL_PAD_SD2_DAT0__ECSPI5_MISO0x054 0x368 0x82c 0x1 0x0
+#define MX6QDL_PAD_SD2_DAT0__AUD4_RXD   0x054 0x368 0x7b4 0x3 0x0
+#define MX6QDL_PAD_SD2_DAT0__KEY_ROW7   0x054 0x368 0x8fc 0x4 0x0
+#define MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x054 0x368 0x000 0x5 0x0
+#define MX6QDL_PAD_SD2_DAT0__DCIC2_OUT  0x054 0x368 0x000 0x6 0x0
+#define MX6QDL_PAD_RGMII_TXC__USB_H2_DATA   0x058 0x36c 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x058 0x36c 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK 0x058 0x36c 0x918 0x2 0x0
+#define MX6QDL_PAD_RGMII_TXC__GPIO6_IO190x058 0x36c 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M   0x058 0x36c 0x000 0x7 0x0
+#define MX6QDL_PAD_RGMII_TD0__HSI_TX_READY  0x05c 0x370 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x05c 0x370 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TD0__GPIO6_IO200x05c 0x370 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG   0x060 0x374 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x060 0x374 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TD1__GPIO6_IO210x060 0x374 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA   0x064 0x378 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x064 0x378 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TD2__GPIO6_IO220x064 0x378 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE   0x068 0x37c 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x068 0x37c 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TD3__GPIO6_IO230x068 0x37c 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA0x06c 0x380 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x06c 0x380 0x858 0x1 0x0
+#define MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24 0x06c 0x380 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_RD0__HSI_RX_READY  0x070 0x384 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x070 0x384 0x848 0x1 0x0
+#define MX6QDL_PAD_RGMII_RD0__GPIO6_IO250x070 0x384 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE  0x074 0x388 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x074 0x388 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x074 0x388 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK   0x074 0x388 0x83c 0x7 0x0
+#define MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG   0x078 0x38c 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x078 0x38c 0x84c 0x1 0x0
+#define MX6QDL_PAD_RGMII_RD1__GPIO6_IO270x078 0x38c 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_RD2__HSI_TX_DATA   0x07c 0x390 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x07c 0x390 0x850 0x1 0x0
+#define MX6QDL_PAD_R

Re: [U-Boot] [PATCH] omap4_panda: Disable ext2/3/4 support in SPL

[Tom Rini]

On Thu, Sep 22, 2016 at 11:23:38AM -0400, Tom Rini wrote:

> Pandaboard is growing again, disable EXT2/3/4 support in SPL save more
> space.
> 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 4/5] imx: mx6ullevk: support plugin

[Tom Rini]

On Mon, Sep 19, 2016 at 11:55:43AM +0800, van.free...@gmail.com wrote:

> From: Peng Fan 
> 
> Add plugin code for mx6ullevk.
> Define CONFIG_USE_PLUGIN in include/configs/mx6ullevk.h to use plugin code.
> 
> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 

So we need an option in arch/arm/cpu/armv7/mx6/Kconfig to offer plugin
support, and 'USE_PLUGIN' is too generic of a name.  Perhaps
USE_IMXIMG_PLUGIN ?

> ---
>  board/freescale/mx6ullevk/Makefile |   4 ++
>  board/freescale/mx6ullevk/plugin.S | 139 
> +
>  2 files changed, 143 insertions(+)
>  create mode 100644 board/freescale/mx6ullevk/plugin.S
> 
> diff --git a/board/freescale/mx6ullevk/Makefile 
> b/board/freescale/mx6ullevk/Makefile
> index c64fba4..0ee905b 100644
> --- a/board/freescale/mx6ullevk/Makefile
> +++ b/board/freescale/mx6ullevk/Makefile
> @@ -4,3 +4,7 @@
>  #
>  
>  obj-y  := mx6ullevk.o
> +
> +extra-$(CONFIG_USE_PLUGIN) :=  plugin.bin
> +$(obj)/plugin.bin: $(obj)/plugin.o
> + $(OBJCOPY) -O binary --gap-fill 0xff $< $@

And then we can move this logic up a bit higher and say that
$(BOARDDIR)/plugin.S will make $(BOARDDIR)/plugin.bin or so

Thanks!

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Re: [U-Boot] [PATCH 1/5] tools: imximage: add plugin support

[Tom Rini]

On Mon, Sep 19, 2016 at 11:55:40AM +0800, van.free...@gmail.com wrote:

> From: Peng Fan 
> 
> Add plugin support for imximage.
> Define CONFIG_USE_PLUGIN to enable using plugin.
> 
> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 
> Cc: Eric Nelson 
> Cc: Ye Li 

We should always have plugin support available, host tools should be as
configuration independent as possible.

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Re: [U-Boot] [PATCH v2] ARM: uniphier: move CONFIG_SPL_* to defconfig or select

[Masahiro Yamada]

2016-09-20 14:27 GMT+09:00 Masahiro Yamada :
> As I repeated in the ML, I am unhappy with config entries with bare
> defaults.  Kick them out of arch/arm/mach-uniphier/Kconfig.
>
> Currently, CONFIG_SPL_SERIAL_SUPPORT is not user-configurable
> (build fails without it), but it should be fixed later anyway,
> so I am moving CONFIG_SPL_SERIAL_SUPPORT to defconfigs.
>
> Signed-off-by: Masahiro Yamada 
> Reviewed-by: Tom Rini 
> ---
>
> Changes in v2:
>   - Rebase onto commit 9b1b6d422

Applied to u-boot-uniphier/master.




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Re: [U-Boot] [PATCH 0/5] ARM: uniphier: UniPhier updates (round 3) for v2016.11-rc1

[Masahiro Yamada]

2016-09-22 7:42 GMT+09:00 Masahiro Yamada :
>   - Add PLL init code for LD11 SoC
>   - Cleanup clk driver
>   - Sync Device Trees
>
>
>
> Masahiro Yamada (5):
>   ARM: uniphier: add PLL init code for LD11 SoC
>   clk: uniphier: constify clock data arrays/structures
>   clk: uniphier: move U_BOOT_DRIVER entry to core code
>   clk: uniphier: allow to have clock node under syscon node
>   ARM: dts: uniphier: sync clock/reset controller nodes with Linux
>


Series, applied to u-boot-uniphier/master.

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[U-Boot] pull request: u-boot-uniphier/master

[Masahiro Yamada]

Hi Tom,

Please pull some more updates for UniPhier SoCs:

  - Move config options
  - Add PLL init code for LD11 SoC
  - Improve/cleanup clk driver
  - Sync Device Trees with Linux

The following changes since commit bbdae1651e96a4fca82b16765e641649170656e5:

  omap4_panda: Disable ext2/3/4 support in SPL (2016-09-21 21:06:55 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-uniphier.git master

for you to fetch changes up to 35343a2648ab42b178e94524404af9b3f4133343:

  ARM: dts: uniphier: sync clock/reset controller nodes with Linux
(2016-09-23 01:00:39 +0900)


Masahiro Yamada (6):
  ARM: uniphier: move CONFIG_SPL_* to defconfig or select
  ARM: uniphier: add PLL init code for LD11 SoC
  clk: uniphier: constify clock data arrays/structures
  clk: uniphier: move U_BOOT_DRIVER entry to core code
  clk: uniphier: allow to have clock node under syscon node
  ARM: dts: uniphier: sync clock/reset controller nodes with Linux

 arch/arm/Kconfig |  2 +
 arch/arm/dts/uniphier-common32.dtsi  | 56 +---
 arch/arm/dts/uniphier-ph1-ld11.dtsi  | 80
+-
 arch/arm/dts/uniphier-ph1-ld20.dtsi  | 75

 arch/arm/dts/uniphier-ph1-ld4.dtsi   | 44 ++-
 arch/arm/dts/uniphier-ph1-pro4-sanji.dts |  2 +-
 arch/arm/dts/uniphier-ph1-pro4.dtsi  | 38 +---
 arch/arm/dts/uniphier-ph1-pro5.dtsi  | 38 
 arch/arm/dts/uniphier-ph1-sld3-ref.dts   |  4 --
 arch/arm/dts/uniphier-ph1-sld3.dtsi  | 59 ++---
 arch/arm/dts/uniphier-ph1-sld8.dtsi  | 44 ++-
 arch/arm/dts/uniphier-proxstream2-gentil.dts |  2 +-
 arch/arm/dts/uniphier-proxstream2-vodka.dts  |  2 +-
 arch/arm/dts/uniphier-proxstream2.dtsi   | 38 
 arch/arm/mach-uniphier/Kconfig   | 15 ---
 arch/arm/mach-uniphier/board_init.c  |  1 +
 arch/arm/mach-uniphier/clk/Makefile  |  5 ++-
 arch/arm/mach-uniphier/clk/dpll-ld11.c   | 16 +++
 arch/arm/mach-uniphier/clk/pll-ld11.c| 32 ++
 arch/arm/mach-uniphier/init.h|  2 +
 arch/arm/mach-uniphier/init/init-ld11.c  |  6 ++-
 arch/arm/mach-uniphier/sc64-regs.h   | 16 +--
 configs/uniphier_ld11_defconfig  |  1 +
 configs/uniphier_ld20_defconfig  |  1 +
 configs/uniphier_ld4_sld8_defconfig  |  3 ++
 configs/uniphier_pro4_defconfig  |  3 ++
 configs/uniphier_pxs2_ld6b_defconfig |  3 ++
 configs/uniphier_sld3_defconfig  |  3 ++
 drivers/clk/uniphier/clk-uniphier-core.c | 94

 drivers/clk/uniphier/clk-uniphier-mio.c  | 51 ++
 drivers/clk/uniphier/clk-uniphier.h  | 18 ++--
 31 files changed, 469 insertions(+), 285 deletions(-)
 create mode 100644 arch/arm/mach-uniphier/clk/dpll-ld11.c
 create mode 100644 arch/arm/mach-uniphier/clk/pll-ld11.c


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Re: [U-Boot] [RFC Patch 0/5] Resolve conflict for merging

[york sun]

On 09/21/2016 08:06 PM, Prabhakar Kushwaha wrote:
>> -Original Message-
>> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of York Sun
>> Sent: Thursday, September 22, 2016 4:21 AM
>> To: tr...@konsulko.com
>> Cc: u-boot@lists.denx.de
>> Subject: [U-Boot] [RFC Patch 0/5] Resolve conflict for merging
>>
>> Tom,
>>
>> I made these patches on top of my fsl-qoriq master. Once merged,
>> the ad-hoc config error should not appear. In this set, I start to convert
>> some options to Kconfig. Please let me know if this is the right solution. I
>> also convert the MMDC driver to use data structure as you suggested. Do not
>> apply to your tree. I will request a pull after we agree on them.
>>
>> [RFC Patch 1/5] armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig
>> [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters through
>> [RFC Patch 3/5] armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig
>> [RFC Patch 4/5] Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig
>> [RFC Patch 5/5] armv8: ls1046ardb_emmc: Fix a typo in defconfig
>>
>
> Are we expecting similar fixes for LS1043, LS2085, LS1021?
> Or platform maintainers will be fixing taking this patch set as reference.
>

I will do some converting and see how it goes.

York

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[U-Boot] [PATCH] board: tbs2910: Add CMD_PART

[Soeren Moch]

There is no stable mmcblk device numbering over different linux versions.
Enable CMD_PART to be able to query the UUID of the root filesystem partition.
So we can pass root=PARTUUID=XXX instead of root=/dev/mmcblkXpY in bootargs.
Leave the default environment as is for now to stay compatible with original
TBS settings.

Signed-off-by: Soeren Moch 
---
Cc: Stefano Babic 
Cc: u-boot@lists.denx.de
---
 include/configs/tbs2910.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index facd9cf..d877336 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -56,9 +56,11 @@
 
 /* *** Command definition *** */
 #define CONFIG_CMD_BMODE
+#define CONFIG_CMD_PART
 
 /* Filesystems / image support */
 #define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
 
 /* MMC */
 #define CONFIG_SYS_FSL_USDHC_NUM   3
-- 
1.9.1

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[U-Boot] [PATCH] arm: dra7xx: Move fastboot options to defconfig

[Sam Protsenko]

Now that fastboot options are available in Kconfig, we can migrate them
from DRA7 header to corresponding DRA7 defconfigs.

Signed-off-by: Sam Protsenko 
---
 configs/dra7xx_evm_defconfig|  8 
 configs/dra7xx_hs_evm_defconfig |  8 
 include/configs/dra7xx_evm.h| 18 +-
 3 files changed, 25 insertions(+), 9 deletions(-)

diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 64df490..321ac45 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -14,6 +14,14 @@ CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_DMA_SUPPORT=y
 CONFIG_HUSH_PARSER=y
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8200
+CONFIG_FASTBOOT_BUF_SIZE=0x2f00
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 5fdc2b7..c0485e0 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -18,6 +18,14 @@ CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_DMA_SUPPORT=y
 CONFIG_HUSH_PARSER=y
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8200
+CONFIG_FASTBOOT_BUF_SIZE=0x2f00
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 194804c..273374a 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -121,15 +121,15 @@
DFU_ALT_INFO_EMMC \
DFU_ALT_INFO_RAM \
DFU_ALT_INFO_QSPI
-
-/* Fastboot */
-#define CONFIG_USB_FUNCTION_FASTBOOT
-#define CONFIG_CMD_FASTBOOT
-#define CONFIG_ANDROID_BOOT_IMAGE
-#define CONFIG_FASTBOOT_BUF_ADDRCONFIG_SYS_LOAD_ADDR
-#define CONFIG_FASTBOOT_BUF_SIZE0x2F00
-#define CONFIG_FASTBOOT_FLASH
-#define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
+#else
+/* Discard fastboot in SPL build, to spare some space */
+#undef CONFIG_FASTBOOT
+#undef CONFIG_USB_FUNCTION_FASTBOOT
+#undef CONFIG_CMD_FASTBOOT
+#undef CONFIG_ANDROID_BOOT_IMAGE
+#undef CONFIG_FASTBOOT_BUF_ADDR
+#undef CONFIG_FASTBOOT_BUF_SIZE
+#undef CONFIG_FASTBOOT_FLASH
 #endif
 
 #include 
-- 
2.9.3

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[U-Boot] [PATCH] board: ge: bx50v3: Pass video bootargs for b850v3

[Akshay Bhat]

From: Ken Lin 

Due to clock source restrictions on i.MX6, certain pixel clock rates can
not be supported. Hence default the resolution/frame rate during boot to a
supported value by passing video bootargs 1024x768@60 for
HDMI (Display Port1) and LVDS (Display Port2) on B850v3.

Signed-off-by: Ken Lin 
Signed-off-by: Akshay Bhat 
---
 include/configs/ge_bx50v3.h | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 52f096e..b905104 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -15,6 +15,7 @@
 #include 
 #include 
 
+#define CONFIG_BOOTARGS_EXTRA
 #if defined(CONFIG_TARGET_GE_B450V3)
 #define CONFIG_BOARD_NAME  "General Electric B450v3"
 #define CONFIG_DEFAULT_FDT_FILE"/boot/imx6q-b450v3.dtb"
@@ -24,6 +25,9 @@
 #elif defined(CONFIG_TARGET_GE_B850V3)
 #define CONFIG_BOARD_NAME  "General Electric B850v3"
 #define CONFIG_DEFAULT_FDT_FILE"/boot/imx6q-b850v3.dtb"
+#undef CONFIG_BOOTARGS_EXTRA
+#define CONFIG_BOOTARGS_EXTRA  "video=DP-1:1024x768@60 " \
+   "video=HDMI-A-1:1024x768@60 "
 #else
 #define CONFIG_BOARD_NAME  "General Electric BA16 Generic"
 #define CONFIG_DEFAULT_FDT_FILE"/boot/imx6q-ba16.dtb"
@@ -166,7 +170,8 @@
"echo 'U-Boot upgraded. Please reset'; " \
"fi\0" \
"setargs=setenv bootargs console=${console},${baudrate} " \
-   "root=/dev/${rootdev} rw rootwait cma=128M\0" \
+   "root=/dev/${rootdev} rw rootwait cma=128M " \
+   CONFIG_BOOTARGS_EXTRA "\0" \
"loadbootscript=" \
"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" 
\
"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
-- 
2.8.1

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[U-Boot] long-term plans to get rid of include/configs/ directory?

[Robert P. J. Day]

  correct me if i'm wrong, but i vaguely recall that the long-term
goal is to remove the include/configs/ directory, and move all
target-specific content to defconfig files, is that right? in
combination with adding all that content to the Kbuild structure, of
course.

  am i understanding that correctly? because that would imply that i
really shouldn't add any more content for my particular target boards
to include/configs/ if i can help it, yes?

  just trying to avoid doing anything i'll have to totally refactor
later.

rday

-- 


Robert P. J. Day Ottawa, Ontario, CANADA
http://crashcourse.ca

Twitter:   http://twitter.com/rpjday
LinkedIn:   http://ca.linkedin.com/in/rpjday


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[U-Boot] Please pull u-boot-rockchip (take 2)

[Simon Glass]

Hi Tom,

I've moved the offending CONFIG to Kconfig. Sorry I missed this.


The following changes since commit a2ed3f452dd1cf4982fe46d5111d200909786686:

  Merge git://git.denx.de/u-boot-dm (2016-09-20 09:34:53 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-rockchip.git

for you to fetch changes up to 4f0b8efa50a543efd407fb8b2e9ad0de49467a15:

  clk: rk3288: add PWM clock get rate (2016-09-22 07:57:02 -0600)


Kever Yang (15):
  rk3399: syscon: add support for pmugrf
  pinctrl: add driver for rk3399
  config: evb-rk3399: enable pinctrl driver
  rk3399: enable the pwm2/3 pinctrl in board init
  dts: rk3399: add pinctrl for sdmmc
  rk_pwm: use clock framework API to get module clock
  rk_pwm: remove grf setting code from driver
  rk3288: add arch_cpu_init for rk3288
  usb: host: add Kconfig for USB_XHCI_ROCKCHIP
  dts: rk3399-evb: add regulator-fixed for usb host vbus
  config: evb-rk3399: enable fixed regulator
  board: evb-rk3399: enable usb 2.0 host vbus power on board_init
  rk3399: add a empty "sys_proto.h" header file
  clk: rk3399: add pmucru controller support
  clk: rk3288: add PWM clock get rate

MengDongyang (4):
  usb: xhci-rockchip: add rockchip dwc3 controller driver
  rockchip: select DM_USB for rockchip SoC
  config: rk3399: add usb related configs
  dts: rk3399: add dwc3_typec node for rk3399

Xu Ziyuan (2):
  rockchip: use dummy byte only enable OF_PLATDATA
  rockchip: rk3288: skip lowlevel_init process

 arch/arm/Kconfig|   1 +
 arch/arm/dts/rk3399-evb.dts |  14 ++
 arch/arm/dts/rk3399.dtsi|  82 +
 arch/arm/include/asm/arch-rockchip/clock.h  |   1 +
 arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 321
+
 arch/arm/include/asm/arch-rockchip/sdram.h  |   4 +
 arch/arm/include/asm/arch-rockchip/sys_proto.h  |  10 ++
 arch/arm/mach-rockchip/board.c  |   4 -
 arch/arm/mach-rockchip/rk3288-board-spl.c   |   4 -
 arch/arm/mach-rockchip/rk3288/Makefile  |   1 +
 arch/arm/mach-rockchip/rk3288/rk3288.c  |  19 ++
 arch/arm/mach-rockchip/rk3399/syscon_rk3399.c   |   1 +
 board/rockchip/evb_rk3399/evb-rk3399.c  |  44 -
 configs/evb-rk3399_defconfig|  11 ++
 drivers/clk/rockchip/clk_rk3288.c   |   2 +
 drivers/clk/rockchip/clk_rk3399.c   | 177 ++-
 drivers/pinctrl/Kconfig |   9 +
 drivers/pinctrl/rockchip/Makefile   |   1 +
 drivers/pinctrl/rockchip/pinctrl_rk3399.c   | 439
++
 drivers/pwm/rk_pwm.c|  26 +--
 drivers/usb/host/Kconfig|   7 +
 drivers/usb/host/Makefile   |   1 +
 drivers/usb/host/xhci-rockchip.c| 211 ++
 include/configs/rk3288_common.h |   1 +
 include/configs/rk3399_common.h |  12 ++
 include/linux/usb/dwc3.h|  14 ++
 26 files changed, 1391 insertions(+), 26 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3399.h
 create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h
 create mode 100644 arch/arm/mach-rockchip/rk3288/rk3288.c
 create mode 100644 drivers/pinctrl/rockchip/pinctrl_rk3399.c
 create mode 100644 drivers/usb/host/xhci-rockchip.c

Regards,
Simon
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Re: [U-Boot] [PATCH v3 9/9] arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1

[Dinh Nguyen]

On 09/20/2016 09:26 PM, Chin Liang See wrote:
> Adding new handoff for SDRAM ctrcfg.extratime1 which is
> required for stable LPDDR2 operation. Since the board is
> using DDR3, the handoff is set to default value 0.
> 
> Signed-off-by: Chin Liang See 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> ---
> Changes for v3
> - Add macro for all boards to avoid ifdef
> ---


Wouldn't it be simpler if all of these patches for each board was just
combined into 1 patch? It's doing the same thing.

Dinh
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Re: [U-Boot] [PATCH v3 9/9] arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1

[Marek Vasut]

On 09/22/2016 10:39 PM, Dinh Nguyen wrote:
> 
> 
> On 09/20/2016 09:26 PM, Chin Liang See wrote:
>> Adding new handoff for SDRAM ctrcfg.extratime1 which is
>> required for stable LPDDR2 operation. Since the board is
>> using DDR3, the handoff is set to default value 0.
>>
>> Signed-off-by: Chin Liang See 
>> Cc: Marek Vasut 
>> Cc: Dinh Nguyen 
>> ---
>> Changes for v3
>> - Add macro for all boards to avoid ifdef
>> ---
> 
> 
> Wouldn't it be simpler if all of these patches for each board was just
> combined into 1 patch? It's doing the same thing.

Yeah, I don't really care either way though.

-- 
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Marek Vasut
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Re: [U-Boot] [PATCH] arch: ifc: update the IFC IP input clock

[Scott Wood]

On 09/22/2016 03:55 AM, Prabhakar Kushwaha wrote:
> Hi Scott,
> 
> Sorry for late reply on this thread
> 
> 
>> -Original Message-
>> From: Scott Wood
>> Sent: Friday, September 09, 2016 7:30 AM
>> To: Prabhakar Kushwaha ; york sun
>> ; u-boot@lists.denx.de
>> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock
>>
>> On 09/08/2016 08:46 PM, Prabhakar Kushwaha wrote:
>>>
 -Original Message-
 From: Scott Wood
 Sent: Friday, September 09, 2016 6:05 AM
 To: Prabhakar Kushwaha ; york sun
 ; u-boot@lists.denx.de
 Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock

 On 09/08/2016 07:05 PM, Prabhakar Kushwaha wrote:
>
>> -Original Message-
>> From: york sun
>> Sent: Thursday, September 08, 2016 9:22 PM
>> To: Prabhakar Kushwaha ; u-
>> b...@lists.denx.de; Scott Wood 
>> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock
>>
>> On 09/08/2016 02:33 AM, Prabhakar Kushwaha wrote:
>>
>> 
>>
> So better to print IP clock to avoid any confusion.
> IFC output clock will be printed when it is actually being used during
 synchronous NOR, syn NAND.

 I am not against changing it to internal clock. But what are you going
 to print on the console? I think it is confusing to say IFC or local 
 bus
 internal clock speed. Please also check how this clock is used and make
 sure arch.lbc_clk is still correct, after passing to Linux.

>>> arch.lbc_clk is only being used for eLBC for device tree fixup.
>>> And I checked the Linux eLBC driver. Looks like it is not using used.
>>>
>>
>> If this clock is not used, can we drop it completely?
>>
>
> From my point of view Yes.
>
> Scott, Please advice

 Well, there is that patch from Matt Weber that is trying to guess the
 IFC frequency in order to use NWAIT...  Not sure if we'll end up
 actually using NWAIT
>>> (Prabhakar, can you answer my question of whether
 there is a better opcode to use with RNDOUT?) or ever sending a real
 RNDOUT, or if we'll ever care about these newer NAND chips on eLBC, but
 if U-Boot is currently writing the clock frequency into the device tree
 I don't see why we'd rip it out.

>>>
>>> IFC frequency means IP clock or IP output clock?
>>
>> External bus clock.  Which is currently being written to the device tree?
>>
>>> If IP clock then other patch for eLBC still valid.
>>
>> What other patch?
>>
>>>
>>> For IFC: Code needs to be added for device tree fixup for PowerPC, ARM SoC.
>>> It is missing for now :(
>>
>> No, we don't want to introduce new clock-frequency fixups.  If we need
>> this on IFC we should add a clocks property.  But if we already have
>> clock-frequency on eLBC then no reason not to use that if needed.
>>
> I am not against keeping " bus-frequency" on eLBC.   (U-boot fixup 
> bus-frequency not clock-frequncy)
> 
> But the  value which is getting assigned to " bus-frequency" is not right.
> Currently, it is setting SYSCLK/LCRR i.e. output clock where eLBC run at CCB 
> or CCB/2.
> So, if we want to have  " bus-frequency " on eLBC then it needs to be 
> corrected.

If the fixup is not correct then just remove it.

-Scott

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Re: [U-Boot] [PATCH] doc: socfpga: Update README.socfpga for Preloader development flow

[Chin Liang See]

On Wed, 2016-09-21 at 11:59 +0200, Marek Vasut wrote:
> On 09/21/2016 04:35 AM, Chin Liang See wrote:
> > Update documentation to include the Cyclone V SoC Preloader
> > development flow. This include the update of Preloader handoff
> > through qts-filter.sh script. At same time, removed the SDMMC
> > documentation as its using DM now.
> 
> Good stuff . s/folder/directory/ , this is not windows.

haha sound like a habit using windows term :)

> 
> > Signed-off-by: Chin Liang See 
> > Cc: Marek Vasut 
> > Cc: Dinh Nguyen 
> > ---
> >  doc/README.socfpga | 69 +++---
> > 
> >  1 file changed, 29 insertions(+), 40 deletions(-)
> > 
> > diff --git a/doc/README.socfpga b/doc/README.socfpga
> > index cfcbbfe..04c5c0e 100644
> > --- a/doc/README.socfpga
> > +++ b/doc/README.socfpga
> > @@ -9,45 +9,34 @@ www.altera.com.
> 
> [...]
> 
> > +1. Please refer to SOCEDS documentation on generating handoff for
> > Preloader
> > +   Upon successful generation, there will be a folder
> > "software/preloader" at
>   ^^
> > +   the directory of your Qsys project.
> > +
> > +2. Then, you need to invoke qts-filter.sh at arch/arm/mach-socfpga
> > folder to
> > +   process the generated handoff files into Preloader source code.
> > +   $ sh arch/arm/mach-socfpga/qts-filter.sh   > directory> \
> > + /software/preloader>  > handoff files>
> > +
> > +   Example:
> > +
> > +   $ cd 
> > +   $ sh arch/arm/mach-socfpga/qts-filter.sh cyclone5 \
> > + /hardware/cv_soc_devkit_ghrd/ \
> > + /hardware/cv_soc_devkit_ghrd/software/preloader/ \
> > + board/altera/cyclone5-socdk/qts/
> 
> You should be explicit that these are two separate examples , one for
> CV
> and the other one for AV .

Sure, always to good to explain in detailed

> 
> > +   $ cd 
> > +   $ sh arch/arm/mach-socfpga/qts-filter.sh arria5 \
> > + /hardware/av_soc_devkit_ghrd/ \
> > + /hardware/av_soc_devkit_ghrd/software/preloader/
> > + board/altera/arria5-socdk/qts/
> > +
> > +3. Build the Preloader + U-Boot
> 
> It's called U-Boot SPL , not preloader .

Will fix

> 
> > +   $ export CROSS_COMPILE=arm-altera-eabi-
> > +   $ make mrproper
> > +   $ make socfpga_cyclone5_defconfig
> > +   $ make
> 
> It's worth mentioning the generated u-boot-with-spl.sfp and how to
> install it onto a card (mention partitioning layout) and into QSPI
> NOR (just write the binary at the beginning). Regarding QSPI NOR, it
> might be worth mentioning quartus_hps, see :
> https://rocketboards.org/foswiki/view/Documentation/GSRD131QspiProgra
> m
> 

Sure, I will add more as I just received email to explain these steps
:)

Thanks
Chin Liang

> 
> 
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[U-Boot] [PATCH] ns16650: Make sure we have CONFIG_CLK set before using infrastructure

[Tom Rini]

We cannot call on the CONFIG_CLK based clk_get_rate function unless
CONFIG_CLK is set.

Signed-off-by: Tom Rini 
---
 drivers/serial/ns16550.c |  7 +--
 include/clk.h| 25 -
 2 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 3f6ea4d27591..765499dab646 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -353,8 +354,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 {
struct ns16550_platdata *plat = dev->platdata;
fdt_addr_t addr;
-   struct clk clk;
-   int err;
+   __maybe_unused struct clk clk;
+   __maybe_unused int err;
 
/* try Processor Local Bus device first */
addr = dev_get_addr(dev);
@@ -401,6 +402,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
 "reg-shift", 0);
 
+#ifdef CONFIG_CLK
err = clk_get_by_index(dev, 0, &clk);
if (!err) {
err = clk_get_rate(&clk);
@@ -410,6 +412,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
debug("ns16550 failed to get clock\n");
return err;
}
+#endif
 
if (!plat->clock)
plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
diff --git a/include/clk.h b/include/clk.h
index 94c003714700..7273127bb4fb 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -98,19 +98,6 @@ int clk_get_by_index(struct udevice *dev, int index, struct 
clk *clk);
  * @return 0 if OK, or a negative error code.
  */
 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
-#else
-static inline int clk_get_by_index(struct udevice *dev, int index,
-  struct clk *clk)
-{
-   return -ENOSYS;
-}
-
-static inline int clk_get_by_name(struct udevice *dev, const char *name,
-  struct clk *clk)
-{
-   return -ENOSYS;
-}
-#endif
 
 /**
  * clk_request - Request a clock by provider-specific ID.
@@ -175,5 +162,17 @@ int clk_enable(struct clk *clk);
 int clk_disable(struct clk *clk);
 
 int soc_clk_dump(void);
+#else
+static inline int clk_get_by_index(struct udevice *dev, int index,
+  struct clk *clk)
+{
+   return -ENOSYS;
+}
 
+static inline int clk_get_by_name(struct udevice *dev, const char *name,
+  struct clk *clk)
+{
+   return -ENOSYS;
+}
+#endif
 #endif
-- 
1.9.1

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Re: [U-Boot] Pull request: u-boot-spi/master

[Tom Rini]

On Thu, Sep 22, 2016 at 08:32:48PM +0530, Jagan Teki wrote:

> Hi Tom,
> 
> Please take this PR.
> 
> thanks!
> Jagan.
> 
> The following changes since commit 9b1b6d42256a4c2e59c803afdbf90d39371e61ba:
> 
>   Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL" 
> (2016-09-19 15:20:09 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-spi.git master
> 
> for you to fetch changes up to fe4753cbc6c51f712024121aad0d21293d6a85fc:
> 
>   configs: fsl: Move SPI/SPI-FLASH configs to defconfig (2016-09-22 14:17:02 
> +0530)
> 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [PATCH] ns16650: Make sure we have CONFIG_CLK set before using infrastructure

[Tom Rini]

On Thu, Sep 22, 2016 at 09:11:22PM -0400, Tom Rini wrote:

> We cannot call on the CONFIG_CLK based clk_get_rate function unless
> CONFIG_CLK is set.
> 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [GIT PULL] Xilinx changes v2

[Tom Rini]

On Thu, Sep 22, 2016 at 09:52:26AM +0200, Michal Simek wrote:

> Hi,
> 
> I have rebased my tree on the top of current master branch
> with IDENT_STRING in Kconfig.
> Also that PL driver for ZynqMP was fixed.
> Buildman output look good too.
> That's why please apply.
> 
> Thanks,
> Michal
> 
> 
> The following changes since commit a2ed3f452dd1cf4982fe46d5111d200909786686:
> 
>   Merge git://git.denx.de/u-boot-dm (2016-09-20 09:34:53 -0400)
> 
> are available in the git repository at:
> 
> 
>   git://www.denx.de/git/u-boot-microblaze.git master
> 
> for you to fetch changes up to e0027f089bb64f6b84742c580f966bf9c97c900e:
> 
>   zynqmp: Remove unnnecessary board config file for dc4 (2016-09-22
> 07:33:21 +0200)
> 

Applied to u-boot/master, thanks!




-- 
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Re: [U-Boot] pull request: u-boot-uniphier/master

[Tom Rini]

On Fri, Sep 23, 2016 at 01:03:40AM +0900, Masahiro Yamada wrote:

> Hi Tom,
> 
> Please pull some more updates for UniPhier SoCs:
> 
>   - Move config options
>   - Add PLL init code for LD11 SoC
>   - Improve/cleanup clk driver
>   - Sync Device Trees with Linux
> 
> The following changes since commit bbdae1651e96a4fca82b16765e641649170656e5:
> 
>   omap4_panda: Disable ext2/3/4 support in SPL (2016-09-21 21:06:55 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-uniphier.git master
> 
> for you to fetch changes up to 35343a2648ab42b178e94524404af9b3f4133343:
> 
>   ARM: dts: uniphier: sync clock/reset controller nodes with Linux
> (2016-09-23 01:00:39 +0900)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Please pull u-boot-rockchip (take 2)

[Tom Rini]

On Thu, Sep 22, 2016 at 02:08:30PM -0600, Simon Glass wrote:

> Hi Tom,
> 
> I've moved the offending CONFIG to Kconfig. Sorry I missed this.
> 
> 
> The following changes since commit a2ed3f452dd1cf4982fe46d5111d200909786686:
> 
>   Merge git://git.denx.de/u-boot-dm (2016-09-20 09:34:53 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-rockchip.git
> 
> for you to fetch changes up to 4f0b8efa50a543efd407fb8b2e9ad0de49467a15:
> 
>   clk: rk3288: add PWM clock get rate (2016-09-22 07:57:02 -0600)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] ns16650: Make sure we have CONFIG_CLK set before using infrastructure

[Masahiro Yamada]

Hi Tom,


2016-09-23 10:11 GMT+09:00 Tom Rini :
> We cannot call on the CONFIG_CLK based clk_get_rate function unless
> CONFIG_CLK is set.
>
> Signed-off-by: Tom Rini 
> ---
>  drivers/serial/ns16550.c |  7 +--
>  include/clk.h| 25 -
>  2 files changed, 17 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> index 3f6ea4d27591..765499dab646 100644
> --- a/drivers/serial/ns16550.c
> +++ b/drivers/serial/ns16550.c
> @@ -13,6 +13,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>
>  DECLARE_GLOBAL_DATA_PTR;
> @@ -353,8 +354,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
>  {
> struct ns16550_platdata *plat = dev->platdata;
> fdt_addr_t addr;
> -   struct clk clk;
> -   int err;
> +   __maybe_unused struct clk clk;
> +   __maybe_unused int err;
>
> /* try Processor Local Bus device first */
> addr = dev_get_addr(dev);
> @@ -401,6 +402,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
> plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
>  "reg-shift", 0);
>
> +#ifdef CONFIG_CLK
> err = clk_get_by_index(dev, 0, &clk);
> if (!err) {
> err = clk_get_rate(&clk);
> @@ -410,6 +412,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
> debug("ns16550 failed to get clock\n");
> return err;
> }
> +#endif
>
> if (!plat->clock)
> plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,



Why did you need this patch?


If CONFIG_CLK is not set, clk_get_by_index() just returns -ENOSYS.

So, the compiler optimization will drop
the whole of if () ... else if ().


 err = clk_get_by_index(dev, 0, &clk);
 if (!err) {
 err = clk_get_rate(&clk);
 if (!IS_ERR_VALUE(err))
 plat->clock = err;
 } else if (err != -ENODEV && err != -ENOSYS) {
 debug("ns16550 failed to get clock\n");
 return err;
 }


Why are you belt-and-braces guarding it with #ifdef CONFIG_CLK?




> diff --git a/include/clk.h b/include/clk.h
> index 94c003714700..7273127bb4fb 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -98,19 +98,6 @@ int clk_get_by_index(struct udevice *dev, int index, 
> struct clk *clk);
>   * @return 0 if OK, or a negative error code.
>   */
>  int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
> -#else
> -static inline int clk_get_by_index(struct udevice *dev, int index,
> -  struct clk *clk)
> -{
> -   return -ENOSYS;
> -}
> -
> -static inline int clk_get_by_name(struct udevice *dev, const char *name,
> -  struct clk *clk)
> -{
> -   return -ENOSYS;
> -}
> -#endif
>
>  /**
>   * clk_request - Request a clock by provider-specific ID.
> @@ -175,5 +162,17 @@ int clk_enable(struct clk *clk);
>  int clk_disable(struct clk *clk);
>
>  int soc_clk_dump(void);
> +#else
> +static inline int clk_get_by_index(struct udevice *dev, int index,
> +  struct clk *clk)
> +{
> +   return -ENOSYS;
> +}
>
> +static inline int clk_get_by_name(struct udevice *dev, const char *name,
> +  struct clk *clk)
> +{
> +   return -ENOSYS;
> +}
> +#endif
>  #endif


This just made the situation worse; it will cause
implicit declaration of clk_enable(), clk_set_rate(), etc
unless we patch clk consumers around with #ifdef CONFIG_CLK.





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Re: [U-Boot] [PATCH] rockchip: Fix SPL console output when ROCKCHIP_SPL_BACK_TO_BROM is enabled

[Simon Glass]

Acked-by: Simon Glass 

On 13 August 2016 at 05:08, Ziyuan Xu  wrote:
> Acked-by: Ziyuan Xu 
>
>
> On 2016年08月11日 19:08, Sandy Patterson wrote:
>>
>>
>> On Wed, Aug 10, 2016 at 11:01 PM, Ziyuan Xu > > wrote:
>>
>>
>>
>> On 2016年08月10日 22:21, Sandy Patterson wrote:
>>
>> Move back_to_bootrom() call later in SPL init so that the
>> console is
>> initialized and printouts happen.
>>
>> Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is
>> no console
>> output from the SPL init stages.
>>
>> I wasn't sure exactly where this should happen, so if we are
>> set to do
>> run spl_board_init, then go back to bootrom there after
>> preloader_console_init(). Otherwise fall back to old behavior
>> of doing
>> it in board_init_f.
>>
>> In fact, ROCKCHIP_SPL_BACK_TO_BROM's aim is to reduce SPL's size,
>> and we can undef CONFIG_SPL_MMC_SUPPORT and other thing.
>> The SPL only in charge of DDR initialization, so that boot rom
>> could load u-boot to RAM.
>> If you really need something output, you can enable EARYLY_UART in
>> rk3288-board-spl.c:board_init_f().
>> But the above is my own understanding.
>>
>> EARLY_UART is a good tool, but this patch just fixes printouts. It's not
>> enabling or disabling any code compilation. The console init and version
>> information code is there. I just move the back_to_bootrom call later in the
>> SPL if that later point exits. You can still disable CONFIG_SPL_BOARD_INIT
>> and it will fall back to calling the bootrom earlier.
>>
>> We don't actually need that much space. We chose to use BOOT_TO_BROM
>> instead of disabling the console in SPL.
>>
>> We disable CONFIG_SPL_MMC_SUPPORT in our production system within the
>> rock2.h file if CONFIG_SPL_MMC_SUPPORT. I'll submit another patch for that.
>> I think if boootrom is used then the mmc should be removed from spl. I'm not
>> really sure how the config system is supposed to work in this case.
>>
>>
>> Signed-off-by: Sandy Patterson > >
>> ---
>>
>>   arch/arm/mach-rockchip/rk3288-board-spl.c | 5 -
>>   1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c
>> b/arch/arm/mach-rockchip/rk3288-board-spl.c
>> index e0d92a6..0c2d525 100644
>> --- a/arch/arm/mach-rockchip/rk3288-board-spl.c
>> +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
>> @@ -206,7 +206,7 @@ void board_init_f(ulong dummy)
>> debug("DRAM init failed: %d\n", ret);
>> return;
>> }
>> -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
>> +#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) &&
>> !defined(CONFIG_SPL_BOARD_INIT)
>> back_to_bootrom();
>>   #endif
>>   }
>> @@ -273,6 +273,9 @@ void spl_board_init(void)
>> }
>> preloader_console_init();
>> +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
>> +   back_to_bootrom();
>> +#endif
>> return;
>>   err:
>> printf("spl_board_init: Error %d\n", ret);
>>
>>
>>
>>
>
>
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Re: [U-Boot] [PATCH v2 1/7] rockchip: rk3399: update PPLL and pmu_pclk frequency

[Simon Glass]

On 8 September 2016 at 19:19, Kever Yang  wrote:
> Update PPLL to 676MHz and PMU_PCLK to 48MHz, because:
> 1. 48MHz can make sure the pwm can get exact 50% duty ratio, but 99MHz
> can not,
> 2. We think 48MHz is fast enough for pmu pclk and it is lower power cost
> than 99MHz,
> 3. PPLL 676 MHz and PMU_PCLK 48MHz are the clock rate we are using
> internally for kernel,it suppose not to change the bus clock like pmu_pclk
> in kernel, so we want to change it in uboot.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2: None
>
>  arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH] rockchip: rk3288: sdram: fix DDR address range

[Simon Glass]

Hi,

On 4 September 2016 at 19:39, Ziyuan Xu  wrote:
> The all current Rockchip SoCs supporting 4GB of ram have problems
> accessing the memory region 0xfe00~0xff00. Actually, some IP
> controller can't address to, so let's limit the available range.
>
> This patch fixes a bug which found in miniarm-rk3288-4GB board. The
> U-Boot was relocated to 0xfef72000, and .bss variants was also
> relocated, such as do_fat_read_at_block. Once eMMC controller transfer
> data to do_fat_read_at_block via DMA, DMAC can't access more than
> 0xfe00. So that DMAC didn't work sane.
>
> Signed-off-by: Ziyuan Xu 
> ---
>
>  arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 7 ---
>  1 file changed, 4 insertions(+), 3 deletions(-)

No comments on this one?

Acked-by: Simon Glass 
Tested on firefly-rk3288:
Tested-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 3/7] power: regulator: add pwm regulator

[Simon Glass]

On 8 September 2016 at 19:19, Kever Yang  wrote:
> add driver support for pwm regulator.
>
> Signed-off-by: Elaine Zhang 
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2:
> - add comments for pwm_regulator_info struct member
> - do not init pwm_id if there is none
> - other fix for comments from Simon
>
>  drivers/power/regulator/Kconfig |  10 ++
>  drivers/power/regulator/Makefile|   1 +
>  drivers/power/regulator/pwm_regulator.c | 160 
> 
>  3 files changed, 171 insertions(+)
>  create mode 100644 drivers/power/regulator/pwm_regulator.c

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Re: [U-Boot] [PATCH v2 6/7] dts: evb-rk3399: add init voltage node for vdd-center

[Simon Glass]

On 8 September 2016 at 19:19, Kever Yang  wrote:
> Add a regulator-init-microvolt for vdd_center regulator
> so that we can get a init value for driver probe.
> Not like pmic regulator, the PWM regulator do not have a
> known default output value, so we would like to init the
> regulator when driver probe.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2:
> - update the commit message
>
>  arch/arm/dts/rk3399-evb.dts | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 1/3] mmc: dw_mmc: change the read/write order under fifo mode

[Simon Glass]

Hi,

On 7 September 2016 at 21:54, Jaehoon Chung  wrote:
> On 09/08/2016 12:43 PM, Ziyuan Xu wrote:
>>
>>
>> On 2016年09月07日 14:50, Jaehoon Chung wrote:
>>> On 09/07/2016 03:14 PM, Ziyuan Xu wrote:
 hi Jaehoon,


 On 2016年08月30日 17:54, Jaehoon Chung wrote:
> Hi Jacob,
>
> On 08/30/2016 02:26 AM, Jacob Chen wrote:
>> From: "jacob2.chen" 
>>
>> The former implement have a bug.
>> It will cause wrong data reading sometimes.
> Could you explain what bug is there?
>> Signed-off-by: jacob2.chen 
> Could you change from jacob2.chen to your name?
>
>> ---
>>
>>drivers/mmc/dw_mmc.c | 32 +---
>>1 file changed, 17 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
>> index afc674d..f072739 100644
>> --- a/drivers/mmc/dw_mmc.c
>> +++ b/drivers/mmc/dw_mmc.c
>> @@ -120,35 +120,37 @@ static int dwmci_data_transfer(struct dwmci_host 
>> *host, struct mmc_data *data)
>>  if (host->fifo_mode && size) {
>>len = 0;
>> -if (data->flags == MMC_DATA_READ) {
>> -if ((dwmci_readl(host, DWMCI_RINTSTS) &
>> - DWMCI_INTMSK_RXDR)) {
>> +if (data->flags == MMC_DATA_READ &&
>> +(mask & DWMCI_INTMSK_RXDR)) {
>> +while (size) {
>>len = dwmci_readl(host, DWMCI_STATUS);
>>len = (len >> DWMCI_FIFO_SHIFT) &
>> -DWMCI_FIFO_MASK;
>> +DWMCI_FIFO_MASK;

What is the status of this patch please?

[...]

Regards,
Simon
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Re: [U-Boot] [PATCH 1/3] mmc: dw_mmc: change the read/write order under fifo mode

[Ziyuan Xu]

hi Simon,


On 2016年09月23日 10:39, Simon Glass wrote:

Hi,

On 7 September 2016 at 21:54, Jaehoon Chung  wrote:

On 09/08/2016 12:43 PM, Ziyuan Xu wrote:


On 2016年09月07日 14:50, Jaehoon Chung wrote:

On 09/07/2016 03:14 PM, Ziyuan Xu wrote:

hi Jaehoon,


On 2016年08月30日 17:54, Jaehoon Chung wrote:

Hi Jacob,

On 08/30/2016 02:26 AM, Jacob Chen wrote:

From: "jacob2.chen" 

The former implement have a bug.
It will cause wrong data reading sometimes.

Could you explain what bug is there?

Signed-off-by: jacob2.chen 

Could you change from jacob2.chen to your name?


---

drivers/mmc/dw_mmc.c | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index afc674d..f072739 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -120,35 +120,37 @@ static int dwmci_data_transfer(struct dwmci_host *host, 
struct mmc_data *data)
  if (host->fifo_mode && size) {
len = 0;
-if (data->flags == MMC_DATA_READ) {
-if ((dwmci_readl(host, DWMCI_RINTSTS) &
- DWMCI_INTMSK_RXDR)) {
+if (data->flags == MMC_DATA_READ &&
+(mask & DWMCI_INTMSK_RXDR)) {
+while (size) {
len = dwmci_readl(host, DWMCI_STATUS);
len = (len >> DWMCI_FIFO_SHIFT) &
-DWMCI_FIFO_MASK;
+DWMCI_FIFO_MASK;

What is the status of this patch please?


I have sent patch v2, and Jaehoon applied it. Pls see 
http://patchwork.ozlabs.org/patch/671533/.

Thanks for your attention.



[...]

Regards,
Simon






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Re: [U-Boot] [PATCH v2 2/3] rk3288: sdram: auto-detect the capacity

[Simon Glass]

Hi Kever,

On 19 September 2016 at 21:28, Kever Yang  wrote:
> Add support for rk3288 dram capacity auto detect, support DDR3 and
> LPDDR3, DDR2 is not supported.
> The program will automatically detect:
> - channel number
> - rank number
> - column address number
> - row address number
>
> The dts file do not need to describe those info after apply this patch.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2:
> - update code for OF_PLATDATA enabled
> - bug fix for ddrconfig
>
>  arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 244 
> ++-
>  1 file changed, 202 insertions(+), 42 deletions(-)

Tested on firefly-rk3288:
Tested-by: Simon Glass 

>
> diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c 
> b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
> index cf9ef2e..b3dc251 100644
> --- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
> +++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
> @@ -57,6 +57,10 @@ struct rk3288_sdram_params {
> struct regmap *map;
>  };
>
> +#define TEST_PATTEN0x5aa5f00f
> +#define DQS_GATE_TRAINING_ERROR_RANK0  (1 << 4)
> +#define DQS_GATE_TRAINING_ERROR_RANK1  (2 << 4)
> +
>  #ifdef CONFIG_SPL_BUILD
>  static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
>  {
> @@ -214,7 +218,7 @@ static void ddr_set_en_bst_odt(struct rk3288_grf *grf, 
> uint channel,
>  }
>
>  static void pctl_cfg(u32 channel, struct rk3288_ddr_pctl *pctl,
> -const struct rk3288_sdram_params *sdram_params,
> +struct rk3288_sdram_params *sdram_params,
>  struct rk3288_grf *grf)
>  {
> unsigned int burstlen;
> @@ -264,7 +268,7 @@ static void pctl_cfg(u32 channel, struct rk3288_ddr_pctl 
> *pctl,
>  }
>
>  static void phy_cfg(const struct chan_info *chan, u32 channel,
> -   const struct rk3288_sdram_params *sdram_params)
> +   struct rk3288_sdram_params *sdram_params)
>  {
> struct rk3288_ddr_publ *publ = chan->publ;
> struct rk3288_msch *msch = chan->msch;
> @@ -446,7 +450,7 @@ static void set_bandwidth_ratio(const struct chan_info 
> *chan, u32 channel,
>  }
>
>  static int data_training(const struct chan_info *chan, u32 channel,
> -const struct rk3288_sdram_params *sdram_params)
> +struct rk3288_sdram_params *sdram_params)
>  {
> unsigned int j;
> int ret = 0;
> @@ -549,7 +553,7 @@ static void move_to_access_state(const struct chan_info 
> *chan)
>  }
>
>  static void dram_cfg_rbc(const struct chan_info *chan, u32 chnum,
> -const struct rk3288_sdram_params *sdram_params)
> +struct rk3288_sdram_params *sdram_params)
>  {
> struct rk3288_ddr_publ *publ = chan->publ;
>
> @@ -563,7 +567,7 @@ static void dram_cfg_rbc(const struct chan_info *chan, 
> u32 chnum,
>  }
>
>  static void dram_all_config(const struct dram_info *dram,
> -   const struct rk3288_sdram_params *sdram_params)
> +   struct rk3288_sdram_params *sdram_params)
>  {
> unsigned int chan;
> u32 sys_reg = 0;
> @@ -589,9 +593,173 @@ static void dram_all_config(const struct dram_info 
> *dram,
> writel(sys_reg, &dram->pmu->sys_reg[2]);
> rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, sdram_params->base.stride);
>  }
> +const int ddrconf_table[] = {
> +   /* row  col,bw */
> +   0,
> +   ((1 << 4) | 1),
> +   ((2 << 4) | 1),
> +   ((3 << 4) | 1),
> +   ((4 << 4) | 1),
> +   ((1 << 4) | 2),
> +   ((2 << 4) | 2),
> +   ((3 << 4) | 2),
> +   ((1 << 4) | 0),
> +   ((2 << 4) | 0),
> +   ((3 << 4) | 0),
> +   0,
> +   0,
> +   0,
> +   0,
> +   ((4 << 4) | 2),
> +};
> +
> +static int sdram_rank_bw_detect(struct dram_info *dram, int channel,
> +   struct rk3288_sdram_params *sdram_params)
> +{
> +   int reg;
> +   int need_trainig = 0;
> +   const struct chan_info *chan = &dram->chan[channel];
> +   struct rk3288_ddr_publ *publ = chan->publ;
> +
> +   if (-1 == data_training(chan, channel, sdram_params)) {
> +   reg = readl(&publ->datx8[0].dxgsr[0]);
> +   /* Check the result for rank 0 */
> +   if ((channel == 0) && (reg & DQS_GATE_TRAINING_ERROR_RANK0)) {
> +   debug("data training fail!\n");
> +   return -EIO;
> +   } else if ((channel == 1) &&
> +  (reg & DQS_GATE_TRAINING_ERROR_RANK0)) {
> +   sdram_params->num_channels = 1;
> +   }
> +
> +   /* Check the result for rank 1 */
> +   if (reg & DQS_GATE_TRAINING_ERROR_RANK1) {
> +   sdram_params->ch[channel].rank = 1;
> +   clrsetbits_le32(&publ->pgcr, 0xF << 18,
> +   sdram_params->ch[channel].rank << 18);
> +

Re: [U-Boot] [PATCH] rockchip: rk3288: sdram: fix DDR address range

[Ziyuan Xu]

Hi Simon,


On 2016年09月23日 10:39, Simon Glass wrote:

Hi,

On 4 September 2016 at 19:39, Ziyuan Xu  wrote:

The all current Rockchip SoCs supporting 4GB of ram have problems
accessing the memory region 0xfe00~0xff00. Actually, some IP
controller can't address to, so let's limit the available range.

This patch fixes a bug which found in miniarm-rk3288-4GB board. The
U-Boot was relocated to 0xfef72000, and .bss variants was also
relocated, such as do_fat_read_at_block. Once eMMC controller transfer
data to do_fat_read_at_block via DMA, DMAC can't access more than
0xfe00. So that DMAC didn't work sane.

Signed-off-by: Ziyuan Xu 
---

  arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 7 ---
  1 file changed, 4 insertions(+), 3 deletions(-)

No comments on this one?


This patch could fix a bug while booting to kernel, which could be 
reproduce on 4 GB board. I hope someone who has 4 GB board could test it .




Acked-by: Simon Glass 
Tested on firefly-rk3288:
Tested-by: Simon Glass 






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Re: [U-Boot] disabling mmc in spl when booting using bootrom

[Simon Glass]

Hi Sandy,

On 12 August 2016 at 11:35, Sandy Patterson  wrote:
>
>
> On Fri, Aug 12, 2016 at 1:20 PM, Simon Glass  wrote:
>>
>> Hi Ziyuan,
>>
>> On 11 August 2016 at 05:35, Ziyuan Xu  wrote:
>> >
>> >
>> > On 2016年08月11日 19:31, Sandy Patterson wrote:
>> >>
>> >> Simon,
>> >>
>> >> I am trying to format a patch to disable MMC in the SPL if booting main
>> >> u-boot using BOOTROM, therefore the SPL MMC isn't needed.
>> >>
>> >> Is the best solution to wrap every header file (rock2.h
>> >> firefly-rk3288.h,
>> >> etc) with ifdefs on the BACK_TO_BROM define? Or would it be better to
>> >> move
>> >> the SPL MMC define into rk3288-common.h and just have chromebook_jerry
>> >> undef
>> >> it like it does the SPL GPIO code.
>> >>
>> >> With that change, enabling BOOT_TO_BROM shrinks the spl from 32K to
>> >> 23K.
>> >
>> > Note that, firefly-rk3288 use OF_PLATDATA, we will use
>> > u-boot-spl-no-dtb.bin
>> > instead of u-boot-spl-dtb.bin, and the size of u-boot-spl-no-dtb.bin is
>> > almost 23K.
>> >
>> > @Simon, I think we will update doc/README.rockchip if you insist on
>> > OF_PLATDATA for firefly-rk3288. we no longer use u-boot-spl-dtb.bin.:-)
>>
>> I don't insist :-)
>>
>> I really don't like OF_PLATDATA. But it cuts the size down a lot
>> (~6KB) and we are otherwise always running out of space on rk3288.
>>
>> If there is a better idea, let's have it. Otherwise, yes we can update the
>> docs.
>
>
> @Ziyuan, I did my testing on rock2 which doesn't use OF_PLATDATA, the
> firefly
> board should see the same final size which is roughly equivalent to the
> current
> firefly SPL size.
>
> We ran out of space in SPL. I too was afraid of using OF_PLATDATA mostly
> from
> Simon's commit message.
>
> I would propose moving to using the BOOTROM to load U-Boot proper. You
> shouldn't
> need any of the media drivers since the BOOTROM was already able to load the
> SPL
> it should be fine loading the full U-Boot.
>
> I get 9K from removing MMC from rock2. I'm happy to write a patch that
> applies this logic
> to the remainder of the rk3288 boards if that's the way you'd like to go.
> You could test it by
> enabling the BOOT_TO_BROM config.

My concern with the Rockchip back-to-brom feature is that then U-Boot
cannot load U-Boot normally as SPL likes to do. I think it is fine
when we are short on space, but OF_PLATDATA fixes that.

So I think the back-to-rom feature need to be optional on boards which
don't have to use it, since it uses a non-standard boot approach,

Regards,
Simon
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Re: [U-Boot] [PATCH 1/4] rockchip: move partitons define from 3036-kylin to 3036-common

[Simon Glass]

On 19 September 2016 at 04:46, Jacob Chen  wrote:
> To keep it same with 3288.
>
> Signed-off-by: Jacob Chen 
> ---
>
>  include/configs/kylin_rk3036.h  | 24 
>  include/configs/rk3036_common.h | 10 ++
>  2 files changed, 10 insertions(+), 24 deletions(-)

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Re: [U-Boot] [PATCH 2/4] rockchip: rename board.c to rk3288-board.c

[Simon Glass]

On 19 September 2016 at 04:46, Jacob Chen  wrote:
> Signed-off-by: Jacob Chen 
> ---
>
>  arch/arm/mach-rockchip/Makefile| 2 +-
>  arch/arm/mach-rockchip/{board.c => rk3288-board.c} | 0
>  2 files changed, 1 insertion(+), 1 deletion(-)
>  rename arch/arm/mach-rockchip/{board.c => rk3288-board.c} (100%)

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Re: [U-Boot] [PATCH 4/4] rockchip: add boot-mode support for rk3288, rk3036

[Simon Glass]

On 19 September 2016 at 04:46, Jacob Chen  wrote:
> rockchip platform have a protocol to pass the the kernel reboot mode to 
> bootloader
> by some special registers when system reboot. In bootloader we should read it 
> and take action.
>
> We can only setup boot_mode in board_late_init becasue "setenv" need env 
> setuped.
> So add CONFIG_BOARD_LATE_INIT to common header and use a entry 
> "rk_board_late_init"
> to replace "board_late_init" in board file.
>
> Signed-off-by: Jacob Chen 
> ---
>
>  arch/arm/include/asm/arch-rockchip/boot_mode.h | 19 ++
>  arch/arm/mach-rockchip/rk3036-board.c  | 39 
>  arch/arm/mach-rockchip/rk3288-board.c  | 50 
> +++---
>  board/rockchip/kylin_rk3036/kylin_rk3036.c | 14 ++--
>  include/configs/kylin_rk3036.h |  3 --
>  include/configs/rk3036_common.h|  3 ++
>  include/configs/rk3288_common.h|  3 ++
>  7 files changed, 111 insertions(+), 20 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-rockchip/boot_mode.h

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Re: [U-Boot] [PATCH 3/4] rockchip: move common function from board-file to rk3036-board.c

[Simon Glass]

On 19 September 2016 at 04:46, Jacob Chen  wrote:
> To keep it same with 3288
>
> Signed-off-by: Jacob Chen 
> ---
>
>  arch/arm/mach-rockchip/Makefile|  1 +
>  arch/arm/mach-rockchip/rk3036-board.c  | 83 
> ++
>  board/rockchip/evb_rk3036/evb_rk3036.c | 66 
>  board/rockchip/kylin_rk3036/kylin_rk3036.c | 66 
>  4 files changed, 84 insertions(+), 132 deletions(-)
>  create mode 100644 arch/arm/mach-rockchip/rk3036-board.c

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Re: [U-Boot] [PATCH v2 3/3] dts: rk3288: remove node in dmc which not need anymore

[Simon Glass]

On 19 September 2016 at 21:28, Kever Yang  wrote:
> Since we implement the dram capacity auto detect, we don't
> need to set the channel number and sdram-channel in dts.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2: None
>
>  arch/arm/dts/rk3288-evb.dts  | 3 ---
>  arch/arm/dts/rk3288-fennec.dts   | 3 ---
>  arch/arm/dts/rk3288-firefly.dts  | 2 --
>  arch/arm/dts/rk3288-miniarm.dts  | 3 ---
>  arch/arm/dts/rk3288-popmetal.dts | 3 ---
>  arch/arm/dts/rk3288-rock2-square.dts | 2 --
>  arch/arm/dts/rk3288-veyron.dtsi  | 2 --
>  7 files changed, 18 deletions(-)

Acked-by: Simon Glass 
Tested on firefly-rk3288:
Tested-by: Simon Glass 
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[U-Boot] Rockchip patches for testing

[Simon Glass]

Hi,

I have pushed a branch to u-boot-rockchip/testing. Please take a look
and let me know if any of these patches need rework.

Are there more patches coming for this merge window?

Re rk3399, one of the patches causes a build error on rk3399. Can
someone please take a look?

buildman -b rk-push rockchip -se
boards.cfg is up to date. Nothing to do.
Summary of 14 commits for 10 boards (8 threads, 1 job per thread)
01: Merge git://git.denx.de/u-boot-rockchip
02: rockchip: rk3288: sdram: fix DDR address range
03: rockchip: Fix SPL console output when ROCKCHIP_SPL_BACK_TO_BROM is enabled
04: Disable SPL_MMC_SUPPORT if ROCKCHIP_SPL_BACK_TO_BROM is enabled.
05: Enable ROCKCHIP_SPL_BACK_TO_BROM for rock2 board
06: rockchip: add usb mass storage feature support for rk3036
07: rockchip: rk3399: update PPLL and pmu_pclk frequency
08: rockchip: rkpwm: fix the register sequence
09: power: regulator: add pwm regulator
10: rockchip: evb_rk3399: init vdd_center regulator
11: Kconfig: rockchip: enable DM_PWM and DM_REGULATOR
12: dts: evb-rk3399: add init voltage node for vdd-center
13: config: evb-rk3399: enable pwm regulator
   aarch64:  +   evb-rk3399
+../drivers/power/regulator/pwm_regulator.c: In function 'pwm_regulator_probe':
+../drivers/power/regulator/pwm_regulator.c:135:10: error: 'struct
pwm_regulator_info' has no member named 'boot_on'
+  if (priv->boot_on)
+  ^
+make[2]: *** [drivers/power/regulator/pwm_regulator.o] Error 1
+make[1]: *** [drivers/power/regulator] Error 2
+make: *** [sub-make] Error 2

Regards,
Simon
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Re: [U-Boot] Fw: FDT pointer value, passed by the PI firmware, is not set in u-boot

[Simon Glass]

Hi,

On 19 September 2016 at 21:50,   wrote:
>
> I modified the current u-boot code to store r2 in rpi.c board_init, but only 
> get a zero value from the register.
>
> It could be one of three issues:
> 1. My use of the c asm statement  to store r2 is wrong (I've never done this 
> before), assembler yes, c assembler no.
> 2. The compiler has consumed the value of r2 before getting to board_init
> 3. The pi firmware does not put the fdt value in r2.
>
> asm statement to store r2 is asm("mov %%r2, %0" : "=r" 
> (gd->bd->bpi_boot_parms) );
>
> In order to use up Marco's ATAG and FDT code.
>
> What the earliest place where I can store the input r2 value?

You could try save_boot_params(). Some boards use that. But gd is not
available then - perhaps you could put it in a variable in the data
segment?

> Hopefully, I'm putting the r2 value into gd->bd->bpi_boot_parms in 
> board_init, but it appear it is zero at that point.
>
> Should I restrict the compiler's use of r2? (I'm reluctant to limit the 
> compiler in that manner)?
>
> Suggestion would be welcome.
>
> Thanks Duncan Hare
>
> 714 931 7952

Regards,
Simon

>
>
>
>
>
>
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[U-Boot] [RFC PATCH v1] common/console.c: ensure GD_FLG_SILENT is set or cleared

[Chris Packham]

When CONFIG_SILENT_CONSOLE is defined and the default environment has
silent=1 it is not possible for a user to make the console un-silent if
the environment is not available when console_init_f() is called (for
example because the environment is in SPI).

Add a new helper function console_update_silent() and call it from both
console_init_f() and console_init_r().

Signed-off-by: Chris Packham 
---

 common/console.c | 17 +
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/common/console.c b/common/console.c
index 12293f383624..c7f32434310e 100644
--- a/common/console.c
+++ b/common/console.c
@@ -687,15 +687,22 @@ int console_assign(int file, const char *devname)
return -1;
 }
 
-/* Called before relocation - use serial functions */
-int console_init_f(void)
+static void console_update_silent(void)
 {
-   gd->have_console = 1;
-
 #ifdef CONFIG_SILENT_CONSOLE
if (getenv("silent") != NULL)
gd->flags |= GD_FLG_SILENT;
+   else
+   gd->flags &= ~GD_FLG_SILENT;
 #endif
+}
+
+/* Called before relocation - use serial functions */
+int console_init_f(void)
+{
+   gd->have_console = 1;
+
+   console_update_silent();
 
print_pre_console_buffer(PRE_CONSOLE_FLUSHPOINT1_SERIAL);
 
@@ -831,6 +838,8 @@ int console_init_r(void)
struct list_head *pos;
struct stdio_dev *dev;
 
+   console_update_silent();
+
 #ifdef CONFIG_SPLASH_SCREEN
/*
 * suppress all output if splash screen is enabled and we have
-- 
2.9.2.518.ged577c6.dirty

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Re: [U-Boot] [PATCH 06/13] buildman: Tidy up the 'cloning' message

[Simon Glass]

Hi Tom,

On 19 September 2016 at 13:14, Tom Rini  wrote:
> On Sun, Sep 18, 2016 at 04:48:31PM -0600, Simon Glass wrote:
>
>> On a machine with a lot of CPUs this prints a lot of useless lines of the
>> form:
>>
>>Cloning repo for thread 
>>
>> Adjust the output so that these all appear on one line, and disappear when
>> the cloning is complete.
>>
>> Note: This cloning is actually unnecessary and very wasteful on disk space
>> (about 3.5GB each time). It would be better to create symlinks.
>
> When do we actually need to clone?  Or why, even?

Each thread can check out a different commit. I think it might be
possible to put the checkout in a separate thread so it can avoid
contention. I'm not quite sure...

Regards,
Simon
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Re: [U-Boot] [PATCH] cmd: usb: run 'usb start' when USB is stopped

[Simon Glass]

+Marek

On 9 September 2016 at 04:20, Jaehoon Chung  wrote:
> If USB is stopped, just run 'usb start' instead of printing message.
> Then user didn't consider whether usb is started or stopped.
>
> Signed-off-by: Jaehoon Chung 
> ---
>  cmd/usb.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/cmd/usb.c b/cmd/usb.c
> index 455127c..4970851 100644
> --- a/cmd/usb.c
> +++ b/cmd/usb.c
> @@ -651,8 +651,8 @@ static int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, 
> char * const argv[])
> return 0;
> }
> if (!usb_started) {
> -   printf("USB is stopped. Please issue 'usb start' first.\n");
> -   return 1;
> +   printf("USB is stopped. Running 'usb start' first.\n");
> +   do_usb_start();
> }
> if (strncmp(argv[1], "tree", 4) == 0) {
> puts("USB device tree:\n");
> --
> 1.9.1
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2] cros_ec: Fix issue with cros_ec_flash_write command

[Simon Glass]

On 12 September 2016 at 13:57, Moritz Fischer  wrote:
> This commit fixes an issue where data is written to an
> invalid memory location.
> The issue has been introduced in commit
> (88364387 cros: add cros_ec_driver)
>
> Cc: Simon Glass 
> Cc: u-boot@lists.denx.de
> Signed-off-by: Moritz Fischer 
> ---
> Changes from v1:
>  - Fixed accidential change of command version
>  - Removed added whitespace
> ---
>  drivers/misc/cros_ec.c | 23 ---
>  1 file changed, 16 insertions(+), 7 deletions(-)

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Re: [U-Boot] [PATCH v3 2/6] power: regulator: Add ctrl_reg and volt_reg fields for pmic

[Simon Glass]

On 19 September 2016 at 00:17, Keerthy  wrote:
> The ctrl reg contains bit fields to enable and disable regulators,
> and volt_reg has the bit fields to configure the voltage values.
> The registers are frequently accessed hence make them part
> of dm_regulator_uclass_platdata structure.
>
> Signed-off-by: Keerthy 
> ---
>  include/power/regulator.h | 4 
>  1 file changed, 4 insertions(+)

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Re: [U-Boot] [RESEND PATCH 01/10] treewide: use #include <...> to include public headers

[Simon Glass]

On 20 September 2016 at 20:28, Masahiro Yamada
 wrote:
> We are supposed to use #include <...> to include headers in the
> public include paths.  We should use #include "..." only for headers
> in local directories.
>
> Signed-off-by: Masahiro Yamada 
> ---
>
>  arch/powerpc/cpu/mpc83xx/qe_io.c |  8 
>  arch/powerpc/cpu/mpc85xx/qe_io.c |  8 
>  board/esd/common/lcd.c   |  2 +-
>  board/htkw/mcx/mcx.c |  2 +-
>  drivers/qe/qe.c  |  8 
>  drivers/qe/uccf.c| 10 +-
>  drivers/qe/uec.c | 12 ++--
>  drivers/qe/uec_phy.c | 12 ++--
>  fs/yaffs2/yaffs_mtdif.c  |  8 
>  fs/yaffs2/yaffs_mtdif2.c |  8 
>  fs/yaffs2/ydirectenv.h   |  2 +-
>  include/linux/mtd/nand.h | 10 +-
>  12 files changed, 45 insertions(+), 45 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v7 09/12] dm: core: Match compatible strings in order of priority

[Simon Glass]

Hi,

On 8 September 2016 at 00:47, Paul Burton  wrote:
> Device model drivers have previously been matched to FDT nodes by virtue
> of being the first driver in the driver list to be compatible with the
> node. This ignores the fact that compatible strings in the device tree
> are listed in order of priority - that is, if we have a node with 2
> compatible strings & a driver that matches each then we should always
> probe the driver that matches the first compatible string.
>
> Fix this by looping through the compatible strings for a node when
> attempting to bind it in lists_bind_fdt and checking each driver for
> a match of the first string, then each driver for a match of the second
> string etc. Effectively this inverts the loops over compatible strings &
> drivers.
>
> Signed-off-by: Paul Burton 
>
> ---
>
> Changes in v7:
> - Pass the correct match data to device_bind_with_driver_data
>
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
>  drivers/core/lists.c | 78 
> +++-
>  1 file changed, 41 insertions(+), 37 deletions(-)
>

It looks like this has been applied, right?

Regards,
Simon
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Re: [U-Boot] [PATCH v3 3/6] power: pmic: Palmas: Add the base pmic support

[Simon Glass]

Hi,

On 19 September 2016 at 00:17, Keerthy  wrote:
> Add support to bind the regulators/child nodes with the pmic.
>
> Signed-off-by: Keerthy 
> Reviewed-by: Simon Glass 
> ---
>  drivers/power/pmic/Kconfig  |  7 +
>  drivers/power/pmic/Makefile |  1 +
>  drivers/power/pmic/palmas.c | 77 
> +
>  include/power/palmas.h  | 25 +++
>  4 files changed, 110 insertions(+)
>  create mode 100644 drivers/power/pmic/palmas.c
>  create mode 100644 include/power/palmas.h

I missed it before, but you should use debug() in drivers, not printf().

Regards,
Simon
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Re: [U-Boot] [PATCH v7 10/12] dm: syscon: Provide a generic syscon driver

[Simon Glass]

Hi,

On 8 September 2016 at 00:47, Paul Burton  wrote:
> Provide a trivial syscon driver matching the generic "syscon" compatible
> string, allowing for simple system controllers to be used without a
> custom driver just as in Linux.
>
> Signed-off-by: Paul Burton 
>
> ---
>
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - New patch
>
>  drivers/core/syscon-uclass.c | 11 +++
>  1 file changed, 11 insertions(+)

It looks like this has been applied, right?

Regards,
Simon
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Re: [U-Boot] [RESEND PATCH 02/10] Add as a wrapper of

[Simon Glass]

On 20 September 2016 at 20:28, Masahiro Yamada
 wrote:
> This will be used to consolidate errno.h variants.
>
> Signed-off-by: Masahiro Yamada 
> ---
>
>  include/linux/errno.h | 6 ++
>  1 file changed, 6 insertions(+)
>  create mode 100644 include/linux/errno.h

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Re: [U-Boot] [PATCH] fpga: Add Kconfig to fpga subsystem

[Simon Glass]

On 19 September 2016 at 02:47, Michal Simek  wrote:
> Add missing Kconfig to fpga subsystem to be able
> to add new options.
>
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/Kconfig  | 2 ++
>  drivers/fpga/Kconfig | 3 +++
>  2 files changed, 5 insertions(+)
>  create mode 100644 drivers/fpga/Kconfig

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Re: [U-Boot] [PATCH 2/2] input: specify the default of I8042_KEYB in more correct manner

[Simon Glass]

On 19 September 2016 at 06:46, Masahiro Yamada
 wrote:
> 2016-09-19 9:57 GMT+09:00 Simon Glass :
>> Hi Masahiro,
>>
>> On 8 September 2016 at 03:47, Masahiro Yamada
>>  wrote:
>>> Creating multiple entries of "config FOO" often gives us bad
>>> experiences.  In this case, we should specify "default X86"
>>> as platforms that want this keyboard by default.
>>>
>>> Signed-off-by: Masahiro Yamada 
>>> ---
>>>
>>>  arch/x86/Kconfig  | 3 ---
>>>  drivers/input/Kconfig | 1 +
>>>  2 files changed, 1 insertion(+), 3 deletions(-)
>>>
>>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>>> index 9207549..ac2d598 100644
>>> --- a/arch/x86/Kconfig
>>> +++ b/arch/x86/Kconfig
>>> @@ -546,9 +546,6 @@ config I8254_TIMER
>>>   Intel 8254 timer contains three counters which have fixed uses.
>>>   Include this to have U-Boot set up the timer correctly.
>>>
>>> -config I8042_KEYB
>>> -   default y
>>> -
>>>  config SEABIOS
>>> bool "Support booting SeaBIOS"
>>> help
>>> diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
>>> index d560328..b3873c1 100644
>>> --- a/drivers/input/Kconfig
>>> +++ b/drivers/input/Kconfig
>>> @@ -17,6 +17,7 @@ config CROS_EC_KEYB
>>>  config I8042_KEYB
>>> bool "Enable Intel i8042 keyboard support"
>>> depends on DM_KEYBOARD
>>> +   default X86
>>
>> What does this mean?
>
>
> The default value of I8042_KEYB is the
> value of X86.
>
>
> In another expression,
>
>default y if X86

Ah OK, thanks.

Reviewed-by: Simon Glass 

Regards,
Simon
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Re: [U-Boot] [PATCH v2 1/2] serial: Kconfig: Add ATMEL_USART option

[Simon Glass]

On 12 September 2016 at 20:37, Wenyou Yang  wrote:
> Add ATMEL_USART option to support to enable the Atmel usart driver
> from Kconfig.
>
> Signed-off-by: Wenyou Yang 
> ---
>
> Changes in v2: None
>
>  drivers/serial/Kconfig | 7 +++
>  1 file changed, 7 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v1] ARM: dts: Makefile: Use board to decide to compile dts

[Simon Glass]

Hi,

On 18 September 2016 at 01:40, Wenyou Yang  wrote:
> To avoid to compile all AT91 SoCs' board dts files, use the board
> to decide to build its corresponding dts, instead of
> CONFIG_AT91FAMILY.
>
> Signed-off-by: Wenyou Yang 
> ---
>
>  arch/arm/dts/Makefile | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)

What is the purpose of this? It seems unnecessary to me. Compiling a
few more .dts files will be quick.

>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 223124e..2ac1f20 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -2,10 +2,10 @@
>  # SPDX-License-Identifier: GPL-2.0+
>  #
>
> -dtb-$(CONFIG_AT91FAMILY) += at91sam9260-smartweb.dtb \
> -   at91sam9g20-taurus.dtb \
> -   at91sam9g45-corvus.dtb \
> -   at91sam9g45-gurnard.dtb
> +dtb-$(CONFIG_TARGET_SMARTWEB) += at91sam9260-smartweb.dtb
> +dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb
> +dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb
> +dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb
>
>  dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
>  dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
> --
> 2.7.4
>

Regards,
Simon
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Re: [U-Boot] [PATCH 1/2] Makefile: use if_change_dep for u-boot.cfg

[Simon Glass]

On 19 September 2016 at 12:20, Stephen Warren  wrote:
> From: Stephen Warren 
>
> cmd_cpp_cfg generates a dependency output, but because it's invoked using
> if_changed rather than if_changed_dep, that dependency file is ignored.
> This results in Kbuild not knowing about which files u-boot.cfg depends
> on, so it may not be rebuilt when required.
>
> A practical result of this is that u-boot.cfg may continue to reference
> CONFIG_ options that no longer exist in the source tree, and this can
> cause the adhoc config options check to fail.
>
> This change modifies Makefile to use if_changed_dep, which in turn causes
> all dependencies to be known to the next make invocation.
>
> Signed-off-by: Stephen Warren 
> ---
>  Makefile | 2 +-
>  scripts/Makefile.spl | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 2/2] Makefile: rm u-boot.cfg dependencies are missing

[Simon Glass]

On 19 September 2016 at 12:20, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Prior to the previous patch, a freshly created .u-boot.cfg.cmd may not
> correctly represent all dependencies for u-boot.cfg. The previous change
> only solved this issue for fresh builds; when performing an incremental
> build, the deficient .u-boot.cfg.cmd is already present, so u-boot.cfg
> is not rebuilt, and hence .u-boot.cfg.cmd is not rebuilt with the correct
> content.
>
> Solve this by explicitly detecting when the dependency file .u-boot.cfg.d
> has not been integrated into .u-boot.cfg.cmd, and force u-boot.cfg to be
> rebuilt in this case by deleting it first. This is possible since
> if_changed_dep will always delete .u-boot.cfg.d when it executes
> successfully, so its presence means either that the previous build was
> made by a source tree that contained a Makefile that didn't include the
> previous patch, or that the build failed part way through executing
> if_changed_dep for u-boot.cfg. Forcing a rebuild of u-boot.cfg is required
> in the former case, and will cause no additional work in the latter case,
> since the file would be rebuilt anyway for the same reason it was being
> rebuilt by the previous build.
>
> Signed-off-by: Stephen Warren 
> ---
>  Makefile | 11 +++
>  scripts/Makefile.spl | 11 +++
>  2 files changed, 22 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2] mmc: mmc-uclass: Add mmc_init() in mmc preinit phrase

[Simon Glass]

Hi,

On 12 September 2016 at 20:31, Wenyou Yang  wrote:
> Add mmc_init() in the mmc preinit phrase to get the device's
> information. Otherwise, if the environment variables are from
> the mmc device, it will fail with "** Bad device size - mmc 1 **".
>
> Signed-off-by: Wenyou Yang 
> ---
>
> Changes in v2:
>  - Add the bracket for #if defined.
>
>  drivers/mmc/mmc-uclass.c | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
> index 425abb1..61dd3be 100644
> --- a/drivers/mmc/mmc-uclass.c
> +++ b/drivers/mmc/mmc-uclass.c
> @@ -152,11 +152,15 @@ void mmc_do_preinit(void)
>
> if (!m)
> continue;
> -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
> +#if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT) || defined(CONFIG_ATMEL_SDHCI)
> mmc_set_preinit(m, 1);
>  #endif
> -   if (m->preinit)
> +   if (m->preinit) {
> mmc_start_init(m);
> +
> +   mmc_init(m);
> +   }
> +

This makes it out of sync with mmc_do_preinit() in mmc_legacy.c. How come?

> }
>  }
>
> --
> 2.7.4
>

Regards,
Simon
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Re: [U-Boot] [PATCH v3 1/6] dm: i2c: Add u8 read/write i2c functions

[Simon Glass]

Hi,

On 20 September 2016 at 06:42, Keerthy  wrote:
>
>
> On Tuesday 20 September 2016 05:23 PM, Simon Glass wrote:
>>
>> Hi,
>>
>> On 19 September 2016 at 00:17, Keerthy  wrote:
>>>
>>> Add u8 i2c read/write hooks.
>>>
>>> Signed-off-by: Keerthy 
>>> ---
>>>  drivers/i2c/i2c-uclass.c | 10 ++
>>>  include/i2c.h| 24 
>>>  2 files changed, 34 insertions(+)
>>>
>>> diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
>>> index dbd3789..6ce5d9a 100644
>>> --- a/drivers/i2c/i2c-uclass.c
>>> +++ b/drivers/i2c/i2c-uclass.c
>>> @@ -231,6 +231,16 @@ int dm_i2c_reg_write(struct udevice *dev, uint
>>> offset, uint value)
>>> return dm_i2c_write(dev, offset, &val, 1);
>>>  }
>>>
>>> +int dm_i2c_u8_read(struct udevice *dev, uint offset, u8 *val)
>>> +{
>>> +   return dm_i2c_read(dev, offset, val, 1);
>>> +}
>>> +
>>> +int dm_i2c_u8_write(struct udevice *dev, uint offset, u8 *val)
>>> +{
>>> +   return dm_i2c_write(dev, offset, val, 1);
>>> +}
>>
>>
>> These look almost the same as dm_i2c_reg_read/write(), but IMO those
>> are easier to use since they don't require a pointer to be passed. How
>> do you intend to use these two new functions?
>
>
> Simon,
>
> I see a kind of issue in the current implementation of
> int dm_i2c_reg_read(struct udevice *dev, uint offset)
> int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
>
> In the current set up my need is to read and then write a 1 byte I2C
> register. It is best to have consistency with read and write.
> In the current case(dm_i2c_reg_read/write) i read an integer and now when i
> want to write i need to convert it to an unsigned integer.
>
> Instead of all this i made a patch which keeps u8 across read and write:
>
> int dm_i2c_reg_read(struct udevice *dev, uint offset, u8 *val)
> returns error/success with the return value and value is passed by reference
> in val variable.
>
> int dm_i2c_reg_write(struct udevice *dev, uint offset, u8 *val)
> returns error/success using the return value and the value to be written is
> sent in val.

Well I really don't see why you can use the other functions. But if
you prefer these, then OK.

>
> Regards,
> Keerthy
>
>
[...]

Regards,
Simon
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Re: [U-Boot] [PATCH v1] ARM: dts: Makefile: Use board to decide to compile dts

[Wenyou.Yang]

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年9月23日 12:17
> To: Wenyou Yang - A41535 
> Cc: U-Boot Mailing List ; Stephen Warren
> ; Andreas Bießmann ; Wenyou
> Yang - A41535 
> Subject: Re: [PATCH v1] ARM: dts: Makefile: Use board to decide to compile dts
> 
> Hi,
> 
> On 18 September 2016 at 01:40, Wenyou Yang  wrote:
> > To avoid to compile all AT91 SoCs' board dts files, use the board to
> > decide to build its corresponding dts, instead of CONFIG_AT91FAMILY.
> >
> > Signed-off-by: Wenyou Yang 
> > ---
> >
> >  arch/arm/dts/Makefile | 8 
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> What is the purpose of this? It seems unnecessary to me. Compiling a few
> more .dts files will be quick.

Why we need to compile all AT91FAMILY dts files, not be used for a specific 
AT91 board?

It is enough to compile the dts file used for the target board. Others is 
unnecessary.

> 
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index
> > 223124e..2ac1f20 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -2,10 +2,10 @@
> >  # SPDX-License-Identifier: GPL-2.0+
> >  #
> >
> > -dtb-$(CONFIG_AT91FAMILY) += at91sam9260-smartweb.dtb \
> > -   at91sam9g20-taurus.dtb \
> > -   at91sam9g45-corvus.dtb \
> > -   at91sam9g45-gurnard.dtb
> > +dtb-$(CONFIG_TARGET_SMARTWEB) += at91sam9260-smartweb.dtb
> > +dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb
> > +dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb
> > +dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb
> >
> >  dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
> >  dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
> > --
> > 2.7.4
> >
> 
> Regards,
> Simon


Best Regards,
Wenyou Yang
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