Re: [U-Boot] [PATCH] armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539

[york sun]

On 09/28/2016 09:55 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> Pin mux logic has 2 options in priority order, one is through RCW_SRC
> and then through RCW_Fields. In case of QSPI booting, RCW_SRC logic takes
> the priority for SPI pads and do not allow RCW_BASE and SPI_EXT to control
> the SPI muxing. But actually those are DSPI controller's pads instead of
> QSPI controller's, so this workaround allows RCW fields SPI_BASE and SPI_EXT
> to control relevant pads muxing.
>
> Signed-off-by: Hou Zhiqiang 
> ---


Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH] armv8: fsl-layerscape: Fix "cpu status" command

[york sun]

On 09/13/2016 12:40 PM, york sun wrote:
> The core position is not continuous for some SoCs. For example,
> valid cores may present at position 0, 1, 4, 5, 8, 9, etc. Some
> registers (including boot release register) only count existing
> cores. Current implementation of cpu_mask() complies with the
> continuous numbering. However, command "cpu status" queries the
> spin table with actual core position. Add functions to calculate
> core position from core number, to correctly calculate offsets.
>
> Tested on LS2080ARDB and LS1043ARDB.
>
> Signed-off-by: York Sun 
> ---
>


Applied to fsl-qoriq master, awaiting upstream.

York

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Re: [U-Boot] [PATCH V3 4/8] imx-common: inctroude USE_IMXIMG_PLUGIN Kconfig

[Eric Nelson]

Hi Peng,

Note the typo in the subject header.

On 10/08/2016 08:58 AM, Peng Fan wrote:
> Introduce USE_IMXIMG_PLUGIN Kconfig
> 
> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 
> Reviewed-by: Tom Rini 
> ---
> 
> V3:
>  None
> 
> V2:
>  New
> 
>  arch/arm/imx-common/Kconfig | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/imx-common/Kconfig b/arch/arm/imx-common/Kconfig
> index 1b7da5a..85eac57 100644
> --- a/arch/arm/imx-common/Kconfig
> +++ b/arch/arm/imx-common/Kconfig
> @@ -17,3 +17,10 @@ config IMX_BOOTAUX
>   depends on ARCH_MX7 || ARCH_MX6
>   help
> bootaux [addr] to boot auxiliary core.
> +
> +config USE_IMXIMG_PLUGIN
> + bool "Using imximage plugin code"

s/Using/Use/

> + depends on ARCH_MX7 || ARCH_MX6
> + help
> +   i.MX6/7 supports DCD and Plugin. Enable this configuration
> +   to use Plugin, otherwise DCD will be used.
> 

MX5x also supports plugins, right?

Also, the alternative isn't really DCD is it? Most (all) of the boards
using SPL now are using the essentially empty config file
in arch/arm/imx-common/spl_sd.cfg.


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Re: [U-Boot] [PATCH V3 1/8] tools: imximage: add plugin support

[Eric Nelson]

Hi Peng,

On 10/09/2016 04:20 AM, Peng Fan wrote:
> On Sat, Oct 08, 2016 at 05:26:18PM +0200, Eric Nelson wrote:
>> On 10/08/2016 08:58 AM, Peng Fan wrote:



>>
>>From what I can tell, there's no reason that you can't have multiple
>> plugins, and the use of these variables isn't really needed.
> 
> I try to follow, are you talking about chained plugin images?
> Now we only support two IVT headers when using plugin.
> The first IVT header is for the plugin image, the second ivt header is for
> uboot image.
> 

I understand, though the API seems to allow it (chained plugins)
and I have a suspicion that the code would be cleaner without
the union.

That said, I don't have a use case in mind.

>>
>>> +static uint32_t imximage_iram_free_start;
>>> +static uint32_t imximage_plugin_size;
>>> +static uint32_t plugin_image;
>>>  
>>>  static set_dcd_val_t set_dcd_val;
>>>  static set_dcd_param_t set_dcd_param;
>>> @@ -118,7 +122,11 @@ static uint32_t detect_imximage_version(struct 
>>> imx_header *imx_hdr)
>>>  
>>> /* Try to detect V2 */
>>> if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
>>> -   (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
>>> +   (hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
>>> +   return IMXIMAGE_V2;
>>> +
>>> +   if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
>>> +   hdr_v2->boot_data.plugin)
>>> return IMXIMAGE_V2;
>>>  
>>> return IMXIMAGE_VER_INVALID;
>>> @@ -165,7 +173,7 @@ static struct dcd_v2_cmd *gd_last_cmd;
>>>  static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
>>> int32_t cmd)
>>>  {
>>
>> I also don't understand why the choice to make the union
>> with either a DCD table or a plugin.
> 
> Confirmed with ROM team. DCD and plugin are exclusive,
> 
> You can not have both at the same time.
>

That's too bad, since porting from DCD-style to SPL can be
useful (as Fabio has seen trying to keep some boards up-to-date).

If we get SPL-as-plugin working, then this would form a
dividing line where you need to get rid of the DCD altogether.

What about the CSF test? Your patches say that CSF and plugins
are also not supported.

>>
>> We should be able to have both, and this doesn't make
>> the code any easier.
>>
>>> -   dcd_v2_t *dcd_v2 = >header.hdr_v2.dcd_table;
>>> +   dcd_v2_t *dcd_v2 = >header.hdr_v2.data.dcd_table;
>>> struct dcd_v2_cmd *d = gd_last_cmd;
>>> struct dcd_v2_cmd *d2;
>>> int len;
>>> @@ -261,21 +269,23 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr, 
>>> uint32_t dcd_len,
>>>  static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
>>> char *name, int lineno)
>>>  {
>>> -   dcd_v2_t *dcd_v2 = >header.hdr_v2.dcd_table;
>>> -   struct dcd_v2_cmd *d = gd_last_cmd;
>>> -   int len;
>>> -
>>> -   if (!d)
>>> -   d = _v2->dcd_cmd;
>>> -   len = be16_to_cpu(d->write_dcd_command.length);
>>> -   if (len > 4)
>>> -   d = (struct dcd_v2_cmd *)(((char *)d) + len);
>>> -
>>> -   len = (char *)d - (char *)_v2->header;
>>> -
>>> -   dcd_v2->header.tag = DCD_HEADER_TAG;
>>> -   dcd_v2->header.length = cpu_to_be16(len);
>>> -   dcd_v2->header.version = DCD_VERSION;
>>> +   if (!imxhdr->header.hdr_v2.boot_data.plugin) {
>>> +   dcd_v2_t *dcd_v2 = >header.hdr_v2.data.dcd_table;
>>> +   struct dcd_v2_cmd *d = gd_last_cmd;
>>> +   int len;
>>> +
>>> +   if (!d)
>>> +   d = _v2->dcd_cmd;
>>> +   len = be16_to_cpu(d->write_dcd_command.length);
>>> +   if (len > 4)
>>> +   d = (struct dcd_v2_cmd *)(((char *)d) + len);
>>> +
>>> +   len = (char *)d - (char *)_v2->header;
>>> +
>>> +   dcd_v2->header.tag = DCD_HEADER_TAG;
>>> +   dcd_v2->header.length = cpu_to_be16(len);
>>> +   dcd_v2->header.version = DCD_VERSION;
>>> +   }
>>>  }
>>>  
>>>  static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
>>> @@ -317,24 +327,93 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, 
>>> uint32_t dcd_len,
>>> fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
>>> fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
>>>  
>>
>> It seems that the reason for a lot of this special-purpose code is to add
>> support for the entry address.
>>
>> If mkimage is invoked with an entrypoint from the command-line:
>>
>> ~/$ ./tools/mkimage -n my.cfg -T imximage -e 0xentrypoint u-boot.img
>> u-boot.imx
>>
>> This entry point is normally placed into the header, but if we have a
>> plugin in the .cfg file like this:
>>
>> ~/$ grep PLUGIN my.cfg
>> PLUGIN path/to/board/plugin.bin 0x00907000
>>
>> Then we need to use the plugin's address instead of the command
>> line address, and use the command-line address for the file which
>> follows.
> 
> There are two IVT headers when using plugin, the 0x907000 is for the first IVT
> header, 0x8780 in command line is for the second 

Re: [U-Boot] [U-Boot, RFC, v1] common/console.c: ensure GD_FLG_SILENT is set or cleared

[Tom Rini]

On Fri, Sep 23, 2016 at 03:59:43PM +1200, Chris Packham wrote:

> When CONFIG_SILENT_CONSOLE is defined and the default environment has
> silent=1 it is not possible for a user to make the console un-silent if
> the environment is not available when console_init_f() is called (for
> example because the environment is in SPI).
> 
> Add a new helper function console_update_silent() and call it from both
> console_init_f() and console_init_r().
> 
> Signed-off-by: Chris Packham 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [U-Boot, v2] vexpress: disable cci ace slave ports when booting in non-sec/hyp mode

[Tom Rini]

On Fri, Sep 23, 2016 at 05:38:39PM +0100, Sudeep Holla wrote:

> Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting
> to nonsec booting") added support to check if the firmware on TC2  is
> configured appropriately before booting in nonsec/hyp mode.
> 
> However when booting in non-secure/hyp mode, CCI control must be done in
> secure firmware and can't  be done in non-secure/hyp mode. In order to
> ensure that, this patch disables the cci slave port inteface so that it
> is not accessed at all.
> 
> Cc: Jon Medhurst 
> Acked-by: Marc Zyngier 
> Signed-off-by: Sudeep Holla 
> Acked-by: Jon Medhurst 
> Tested-by: Jon Medhurst 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH V3 1/8] tools: imximage: add plugin support

[Peng Fan]

On Sat, Oct 08, 2016 at 05:26:18PM +0200, Eric Nelson wrote:
>Hi Peng,
>
>I'm sorry for taking so long to go though this.
>
>On 10/08/2016 08:58 AM, Peng Fan wrote:
>> Add plugin support for imximage.
>> 
>
>This CONFIG setting doesn't actually affect mkimage or imximage:

Yeah. The host tool always support plugin code now. But need to define
CONFIG_USE_IMXIMG_PLUGIN to compile plugin.S.

>
>> Define CONFIG_USE_IMXIMG_PLUGIN in defconfig to enable using plugin.
>> 
>> Signed-off-by: Peng Fan 
>> Cc: Stefano Babic 
>> Cc: Eric Nelson 
>> Cc: Ye Li 
>> Reviewed-by: Tom Rini 
>> ---
>> 
>> V3:
>>  Fix compile error.
>> 
>> V2:
>>  Drop the CONFIG_USE_PLUGIN, make plugin always support in imximage.
>> 
>>  tools/imximage.c | 282 
>> +++
>>  tools/imximage.h |   7 +-
>>  2 files changed, 229 insertions(+), 60 deletions(-)
>> 
>> diff --git a/tools/imximage.c b/tools/imximage.c
>> index 092d550..7fa601e 100644
>> --- a/tools/imximage.c
>> +++ b/tools/imximage.c
>> @@ -27,6 +27,7 @@ static table_entry_t imximage_cmds[] = {
>>  {CMD_CHECK_BITS_CLR,"CHECK_BITS_CLR",   "Reg Check bits clr", },
>>  {CMD_CSF,   "CSF",   "Command Sequence File", },
>>  {CMD_IMAGE_VERSION, "IMAGE_VERSION","image version",  },
>> +{CMD_PLUGIN,"PLUGIN",   "file plugin_addr",  },
>>  {-1,"", "",   },
>>  };
>>  
>> @@ -80,6 +81,9 @@ static uint32_t imximage_ivt_offset = UNDEFINED;
>>  static uint32_t imximage_csf_size = UNDEFINED;
>>  /* Initial Load Region Size */
>>  static uint32_t imximage_init_loadsize;
>
>These seem very limiting.
>
>From what I can tell, there's no reason that you can't have multiple
>plugins, and the use of these variables isn't really needed.

I try to follow, are you talking about chained plugin images?
Now we only support two IVT headers when using plugin.
The first IVT header is for the plugin image, the second ivt header is for
uboot image.

>
>> +static uint32_t imximage_iram_free_start;
>> +static uint32_t imximage_plugin_size;
>> +static uint32_t plugin_image;
>>  
>>  static set_dcd_val_t set_dcd_val;
>>  static set_dcd_param_t set_dcd_param;
>> @@ -118,7 +122,11 @@ static uint32_t detect_imximage_version(struct 
>> imx_header *imx_hdr)
>>  
>>  /* Try to detect V2 */
>>  if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
>> -(hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
>> +(hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
>> +return IMXIMAGE_V2;
>> +
>> +if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
>> +hdr_v2->boot_data.plugin)
>>  return IMXIMAGE_V2;
>>  
>>  return IMXIMAGE_VER_INVALID;
>> @@ -165,7 +173,7 @@ static struct dcd_v2_cmd *gd_last_cmd;
>>  static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
>>  int32_t cmd)
>>  {
>
>I also don't understand why the choice to make the union
>with either a DCD table or a plugin.

Confirmed with ROM team. DCD and plugin are exclusive,

You can not have both at the same time.

>
>We should be able to have both, and this doesn't make
>the code any easier.
>
>> -dcd_v2_t *dcd_v2 = >header.hdr_v2.dcd_table;
>> +dcd_v2_t *dcd_v2 = >header.hdr_v2.data.dcd_table;
>>  struct dcd_v2_cmd *d = gd_last_cmd;
>>  struct dcd_v2_cmd *d2;
>>  int len;
>> @@ -261,21 +269,23 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr, 
>> uint32_t dcd_len,
>>  static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
>>  char *name, int lineno)
>>  {
>> -dcd_v2_t *dcd_v2 = >header.hdr_v2.dcd_table;
>> -struct dcd_v2_cmd *d = gd_last_cmd;
>> -int len;
>> -
>> -if (!d)
>> -d = _v2->dcd_cmd;
>> -len = be16_to_cpu(d->write_dcd_command.length);
>> -if (len > 4)
>> -d = (struct dcd_v2_cmd *)(((char *)d) + len);
>> -
>> -len = (char *)d - (char *)_v2->header;
>> -
>> -dcd_v2->header.tag = DCD_HEADER_TAG;
>> -dcd_v2->header.length = cpu_to_be16(len);
>> -dcd_v2->header.version = DCD_VERSION;
>> +if (!imxhdr->header.hdr_v2.boot_data.plugin) {
>> +dcd_v2_t *dcd_v2 = >header.hdr_v2.data.dcd_table;
>> +struct dcd_v2_cmd *d = gd_last_cmd;
>> +int len;
>> +
>> +if (!d)
>> +d = _v2->dcd_cmd;
>> +len = be16_to_cpu(d->write_dcd_command.length);
>> +if (len > 4)
>> +d = (struct dcd_v2_cmd *)(((char *)d) + len);
>> +
>> +len = (char *)d - (char *)_v2->header;
>> +
>> +dcd_v2->header.tag = DCD_HEADER_TAG;
>> +dcd_v2->header.length = cpu_to_be16(len);
>> +dcd_v2->header.version = DCD_VERSION;
>> +}
>>  }
>>  
>>  static 

Re: [U-Boot] [PATCH 1/1]: environment in eMMC boot partition

[Sergey Kubushyn]

On Sat, 8 Oct 2016, Tom Rini wrote:


On Wed, Oct 05, 2016 at 01:28:07PM -0700, Sergey Kubushyn wrote:


This allows to place U-Boot environment into eMMC boot partition thus
saving space on user partition for the OS (or whatever.) When booting
off of eMMC many (all?) MCUs can use dedicated boot0/boot1 partitions
to boot so U-Boot (or SPL) is written to one (or both) such partitions.
When such boot configuration is used it makes sense to place environment
in the same partition where the U-Boot itself is so the entire user
partition is available for the OS.

It might be not well polished yet but it is a simple patch that can be
reworked later.

It uses 4 Kconfig variables right now which probably belong to the board
Kconfig. Those are:

CONFIG_ENV_IN_EMMC_BOOT -- tells that environment is in eMMC boot
 partition if defined

CONFIG_EMMC_ENV_PART -- tells which boot partition environment should be
 stored in (either 1 or 2)

CONFIG_EMMC_BOOT_PART -- which boot partition will be used by eMMC to
 read U-Boot/SPL binary for boot protocol (either 1 or 2.) That can be
 different from the environment partition

CONFIG_EMMC_BOOT_ACK -- tells that eMMC should provide boot ACKs if
 defined

Here is an excerpt from actual board Kconfig:


I think what's missing is that in the other cases where we do
environment in the eMMC boot partitions we don't need the boot ack part.
Can you see if the existing hooks work, when you add in something for
boot ack?


Eh, I _DO_ use existing hook. And one of the parameters passed to that
hook is boot ack (drivers/mmc/mmc_boot.c, line 101):

=== Cut ===
int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
=== Cut ===

I could've just set it to 0 unconditionally but there might be some board
configs that might require it to be enabled so I made it configurable.

And I don't think we have any boards with environment in boot partition
because there is simply no support for this in common/enc_mmc.c. Remember,
eMMC boot partition and a partition on eMMC you boot off of are totally
orthogonal :) Boot partitions (there are 2 of those and one user partition
on eMMC) are special. You have to explicitely switch to a boot partition
to access it. When U-Boot is started eMMC boot partition it had been read
off (if the system boots off of boot partition using special boot protocol)
is long gone and what U-Boot sees is _USER_ partition. One can create
up to 4 GP partitions on eMMC but those are _DIFFERENT_ partitions and
they all reside in _USER_ partition i.e. GP partitions just subdivide the
single _USER_ partition into up to 4 parts.

When you boot off of an eMMC boot partition U-Boot binary is written into
boot partition so no part of visible _USER_ partition is taken, not a
single byte. That means that only one 512-byte block of the user partition
is reserved (MBR/partition table) so one can start a primary DOS partition
on eMMC at block 1 and use the entire space up to the last block for that
partition. However there is still U-Boot environment that one has to put
somewhere. Although it is possible to put it into user partition starting
first DOS (or GP) partition at e.g. block 160 or so and using that gap
between MBR and start of the first partition for environment it is not a
right thing to do. This way we are wasting some otherwise useable eMMC
storage space while still have plenty of unused space in 2 boot partitions.

If we put U-Boot in a boot partition it is logical to put its environment
in the same partition, isn't it? This is even more logical knowing the
fact it would save us some storage space for the OS filesystem...

But anyway, please hold off -- that patch won't apply because the alpine
email client "beautifies" text-only emails for some moronic reasons by
adding trailing whitespace to _SOME_ lines on mail _SEND_ thus screwing up
the patch. I will re-send that patch using git send-email that seems to
work correctly in a couple of hours. I will format it to follow official
rules and add proper CCs before re-sending.

Did you get that nand-bootupdate patch I re-sent yesterday with git
send-email? Did it work if you got it? It's been done against u-boot-imx.

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Re: [U-Boot] [PATCH 1/1]: environment in eMMC boot partition

[Sergey Kubushyn]

On Sat, 8 Oct 2016, Tom Rini wrote:


On Sat, Oct 08, 2016 at 03:41:50PM -0700, Sergey Kubushyn wrote:

On Sat, 8 Oct 2016, Tom Rini wrote:


On Wed, Oct 05, 2016 at 01:28:07PM -0700, Sergey Kubushyn wrote:


This allows to place U-Boot environment into eMMC boot partition thus
saving space on user partition for the OS (or whatever.) When booting
off of eMMC many (all?) MCUs can use dedicated boot0/boot1 partitions
to boot so U-Boot (or SPL) is written to one (or both) such partitions.
When such boot configuration is used it makes sense to place environment
in the same partition where the U-Boot itself is so the entire user
partition is available for the OS.

It might be not well polished yet but it is a simple patch that can be
reworked later.

It uses 4 Kconfig variables right now which probably belong to the board
Kconfig. Those are:

CONFIG_ENV_IN_EMMC_BOOT -- tells that environment is in eMMC boot
partition if defined

CONFIG_EMMC_ENV_PART -- tells which boot partition environment should be
stored in (either 1 or 2)

CONFIG_EMMC_BOOT_PART -- which boot partition will be used by eMMC to
read U-Boot/SPL binary for boot protocol (either 1 or 2.) That can be
different from the environment partition

CONFIG_EMMC_BOOT_ACK -- tells that eMMC should provide boot ACKs if
defined

Here is an excerpt from actual board Kconfig:


I think what's missing is that in the other cases where we do
environment in the eMMC boot partitions we don't need the boot ack part.
Can you see if the existing hooks work, when you add in something for
boot ack?


Eh, I _DO_ use existing hook. And one of the parameters passed to that
hook is boot ack (drivers/mmc/mmc_boot.c, line 101):

=== Cut ===
int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
=== Cut ===

I could've just set it to 0 unconditionally but there might be some board
configs that might require it to be enabled so I made it configurable.

And I don't think we have any boards with environment in boot partition
because there is simply no support for this in common/enc_mmc.c. Remember,


I've put environment on the boot partitions on the eMMC on Beaglebone
black for a number of years.  See include/configs/am335x_evm.h:
#elif defined(CONFIG_EMMC_BOOT)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV  1
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET   0x0
#define CONFIG_ENV_OFFSET_REDUND(CONFIG_ENV_OFFSET +
CONFIG_ENV_SIZE)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

Now, I fully accept that it's not working in your case and there must be
something further needed.


That's all nice but it is not like it boots off of eMMC special boot
partition and environment is actually NOT in eMMC boot partition...

eMMC is special -- it has 2 additional boot partitions that are HIDDEN
on normal use and only used for special boot protocol that is only
implemented in SOME SoCs. Regular MMC card has only one hardware part
that is same as eMMC user partition. Actually there is yet another one
in eMMC called RPMB but that one is totally special and not a storage
partition at all. Linux shows up at least 3 partitions on eMMC that are
usually named /dev/block/mmcblkXboot[0,1] and /dev/block/mmcblkXpY so
boot partitions can be accessed as regular block devices. They are made
read-only by default so one has to set a partition R/W before it can be
written to.

Older SoCs can not take advantage of those boot partitions -- they treat
eMMC as a regular MMC device with only one partition and it works just
fine, just advanced eMMC features are wasted. i.MX6 boots off of eMMC
boot partition if available and there are special boot configuration
switches for this -- you can select the boot proto bus width, boot ACK,
and some other parameters. It is OK to waste those resources if SoC does
not support those -- there is no other choice anyway -- but if they ARE
supported why wouldn't we use those?

eMMC boot partitions are _NOT_ in eMMC address space by default -- all
address space corresponds to USER partition. In order to access a boot
(or RPMB) partition one has to issue a special mmc command writing to
extended command register, EXT_CSD[179] that allows to switch to a boot
partition. When you switched to a boot partition user partition becomes
unavailable i.e. the entire address space corresponds to that boot
partition you switched to and is looks like the only one available on
that eMMC device.

There are special compile-time config variables in U-Boot for including
boot and RPMB partition access (CONFIG_SUPPORT_EMMC_BOOT and
CONFIG_SUPPORT_EMMC_RPMB respectively) that add corresponding commands
and access methods to regular "mmc" command (cmd/mmc.c line 742 and
other places.) It is eMMC-specific, regular MMC devices do _NOT_ have
those features.

BTW, U-Boot list server ran out of space so it won't show up in regular
list posts until the space issue is fixed...

---

Re: [U-Boot] [PATCH 1/1]: filesystems : add "file exists" cmd

[Sergey Kubushyn]

On Sat, 8 Oct 2016, Tom Rini wrote:


On Wed, Oct 05, 2016 at 12:38:01PM -0700, Sergey Kubushyn wrote:


This adds "file exists" commands to generic FS as well as to FAT, EXT4,
and UBIFS. Also adds "file size" command to UBIFS.

The return value for "file exists" commands is REVERSED i.e. they
return 1 if file exists and 0 otherwise. This is a deliberate decision
because those commands are supposed to be used almost exclusively in
scripts and TRUE value is _not_ zero while FALSE is zero.

As of now the only way to check for a file existence is to attempt a
read on that file (aka load.) That works but it makes an unnecessary
read, overwrites memory at destination address if file not a zero
length one, and outputs unnecessary messages to the console in any
case.

Checking file existence in scripts is a valuable feature that allows
the higher level software (e.g. Linux) to interact with U-Boot by
creating some semaphore files and rebooting. We do use it quite
extensively for system setup at manufacturing time and for other
purposes (e.g. our Android "recovery" is implemented this way.)

Signed-off-by: Sergey Kubushyn 


Can you please do this in at least two patches?  file size to ubi should
be its own patch.  Also:


Sure, will do later today.


+int do_ext4_file_exists(cmd_tbl_t *cmdtp, int flag, int argc,
+   char *const argv[])
+{
+   int ret;
+
+   ret = do_file_exists(cmdtp, flag, argc, argv, FS_TYPE_EXT);
+ + if (ret == 0) return 1;
+   if (ret == 1) return 0;
+   return ret;
+}


I can only assume this hasn't been compile tested in a while, and you
should simplify the code into a single if/else and a comment on what we
want/mean.  Thanks!


The problem is do_file_exists() can return not just 0 if file exists or
1 if it doesn't but also a negative value for "I don't know" i.e. when
e.g. FS mount failed.

I don't know if those return codes are somehow processed further up (too
much time to dig everything to the bare metal) so I decided to return
that value as-is if it happened. Sure it could be done like e.g.

return (ret == 0);

even without any if-elses and it is probably the proper way to do it but
I fell victim of perfectionism :))

Will re-do it with the above construction and split in 2 parts. Will also
send it with git send-email so it won't end up garbled.

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[U-Boot] [PATCH V3 8/8] imx: mx6ull_14x14_evk: add plugin defconfig

[Peng Fan]

Add defconfig file to use plugin code.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---

V3:
 None

V2:
 New

 configs/mx6ull_14x14_evk_plugin_defconfig | 31 +++
 1 file changed, 31 insertions(+)
 create mode 100644 configs/mx6ull_14x14_evk_plugin_defconfig

diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig 
b/configs/mx6ull_14x14_evk_plugin_defconfig
new file mode 100644
index 000..ff15c8e
--- /dev/null
+++ b/configs/mx6ull_14x14_evk_plugin_defconfig
@@ -0,0 +1,31 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6ULL_14X14_EVK=y
+CONFIG_USE_IMXIMG_PLUGIN=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
+CONFIG_BOOTDELAY=3
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_74X164=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_SPI=y
-- 
2.6.2

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[U-Boot] [PATCH V3 4/8] imx-common: inctroude USE_IMXIMG_PLUGIN Kconfig

[Peng Fan]

Introduce USE_IMXIMG_PLUGIN Kconfig

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Reviewed-by: Tom Rini 
---

V3:
 None

V2:
 New

 arch/arm/imx-common/Kconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/imx-common/Kconfig b/arch/arm/imx-common/Kconfig
index 1b7da5a..85eac57 100644
--- a/arch/arm/imx-common/Kconfig
+++ b/arch/arm/imx-common/Kconfig
@@ -17,3 +17,10 @@ config IMX_BOOTAUX
depends on ARCH_MX7 || ARCH_MX6
help
  bootaux [addr] to boot auxiliary core.
+
+config USE_IMXIMG_PLUGIN
+   bool "Using imximage plugin code"
+   depends on ARCH_MX7 || ARCH_MX6
+   help
+ i.MX6/7 supports DCD and Plugin. Enable this configuration
+ to use Plugin, otherwise DCD will be used.
-- 
2.6.2

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Re: [U-Boot] [PATCH 1/1]: environment in eMMC boot partition

[Tom Rini]

On Sat, Oct 08, 2016 at 03:41:50PM -0700, Sergey Kubushyn wrote:

> Did you get that nand-bootupdate patch I re-sent yesterday with git
> send-email? Did it work if you got it? It's been done against u-boot-imx.

Yes, but I've not had a chance to look at it (and none of my imx boards
have NAND, just SD/MMC and SATA).

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Re: [U-Boot] [PATCH 1/1]: filesystems : add "file exists" cmd

[Tom Rini]

On Wed, Oct 05, 2016 at 12:38:01PM -0700, Sergey Kubushyn wrote:

> This adds "file exists" commands to generic FS as well as to FAT, EXT4,
> and UBIFS. Also adds "file size" command to UBIFS.
> 
> The return value for "file exists" commands is REVERSED i.e. they
> return 1 if file exists and 0 otherwise. This is a deliberate decision
> because those commands are supposed to be used almost exclusively in
> scripts and TRUE value is _not_ zero while FALSE is zero.
> 
> As of now the only way to check for a file existence is to attempt a
> read on that file (aka load.) That works but it makes an unnecessary
> read, overwrites memory at destination address if file not a zero
> length one, and outputs unnecessary messages to the console in any
> case.
> 
> Checking file existence in scripts is a valuable feature that allows
> the higher level software (e.g. Linux) to interact with U-Boot by
> creating some semaphore files and rebooting. We do use it quite
> extensively for system setup at manufacturing time and for other
> purposes (e.g. our Android "recovery" is implemented this way.)
> 
> Signed-off-by: Sergey Kubushyn 

Can you please do this in at least two patches?  file size to ubi should
be its own patch.  Also:

> +int do_ext4_file_exists(cmd_tbl_t *cmdtp, int flag, int argc,
> + char *const argv[])
> +{
> + int ret;
> +
> + ret = do_file_exists(cmdtp, flag, argc, argv, FS_TYPE_EXT);
> + +   if (ret == 0) return 1;
> + if (ret == 1) return 0;
> + return ret;
> +}

I can only assume this hasn't been compile tested in a while, and you
should simplify the code into a single if/else and a comment on what we
want/mean.  Thanks!

-- 
Tom


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Re: [U-Boot] [PATCH 1/1]: environment in eMMC boot partition

[Tom Rini]

On Sat, Oct 08, 2016 at 03:41:50PM -0700, Sergey Kubushyn wrote:
> On Sat, 8 Oct 2016, Tom Rini wrote:
> 
> >On Wed, Oct 05, 2016 at 01:28:07PM -0700, Sergey Kubushyn wrote:
> >
> >>This allows to place U-Boot environment into eMMC boot partition thus
> >>saving space on user partition for the OS (or whatever.) When booting
> >>off of eMMC many (all?) MCUs can use dedicated boot0/boot1 partitions
> >>to boot so U-Boot (or SPL) is written to one (or both) such partitions.
> >>When such boot configuration is used it makes sense to place environment
> >>in the same partition where the U-Boot itself is so the entire user
> >>partition is available for the OS.
> >>
> >>It might be not well polished yet but it is a simple patch that can be
> >>reworked later.
> >>
> >>It uses 4 Kconfig variables right now which probably belong to the board
> >>Kconfig. Those are:
> >>
> >>CONFIG_ENV_IN_EMMC_BOOT -- tells that environment is in eMMC boot
> >> partition if defined
> >>
> >>CONFIG_EMMC_ENV_PART -- tells which boot partition environment should be
> >> stored in (either 1 or 2)
> >>
> >>CONFIG_EMMC_BOOT_PART -- which boot partition will be used by eMMC to
> >> read U-Boot/SPL binary for boot protocol (either 1 or 2.) That can be
> >> different from the environment partition
> >>
> >>CONFIG_EMMC_BOOT_ACK -- tells that eMMC should provide boot ACKs if
> >> defined
> >>
> >>Here is an excerpt from actual board Kconfig:
> >
> >I think what's missing is that in the other cases where we do
> >environment in the eMMC boot partitions we don't need the boot ack part.
> >Can you see if the existing hooks work, when you add in something for
> >boot ack?
> 
> Eh, I _DO_ use existing hook. And one of the parameters passed to that
> hook is boot ack (drivers/mmc/mmc_boot.c, line 101):
> 
> === Cut ===
> int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
> === Cut ===
> 
> I could've just set it to 0 unconditionally but there might be some board
> configs that might require it to be enabled so I made it configurable.
> 
> And I don't think we have any boards with environment in boot partition
> because there is simply no support for this in common/enc_mmc.c. Remember,

I've put environment on the boot partitions on the eMMC on Beaglebone
black for a number of years.  See include/configs/am335x_evm.h:
#elif defined(CONFIG_EMMC_BOOT)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV  1
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET   0x0
#define CONFIG_ENV_OFFSET_REDUND(CONFIG_ENV_OFFSET +
CONFIG_ENV_SIZE)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

Now, I fully accept that it's not working in your case and there must be
something further needed.

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Re: [U-Boot] [PATCH][v4] board: ls1012afrdm: overwrite CONFIG_EXTRA_ENV_SETTINGS

[york sun]

On 10/07/2016 05:00 AM, Pratiyush Srivastava wrote:
> LS1012AFRDM has 512MB of DDR.
> So update Kernel load address as 0x9600 instead of default
> 0xa000.
>
> Signed-off-by: Prabhakar Kushwaha 
> Signed-off-by: Pratiyush Mohan Srivastava 
> ---
> Changes for v4: Incorporated York's Comments
>   - Removed hwconfig variable
>
> Changes for v3:
>   - Rebased v2 patch to master
>   - Removed "initrd_high=0x\0"
>   - Removed console variable "console=ttyAMA0,115200n8\0"
>
> Changes for v2: Incorporated York's comments
>   - Removed ramdisk_addr, ramdisk_size
>   - Updated UART baud-rate.
>


Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH][v3] armv8: ls1012a: Updating CONFIG_EXTRA_ENV_SETTINGS

[york sun]

On 10/07/2016 04:59 AM, Pratiyush Srivastava wrote:
> Remove ramdisk_addr, ramdisk_size and update UART baud-rate.
>
> Signed-off-by: Prabhakar Kushwaha 
> Signed-off-by: Pratiyush Mohan Srivastava 
> ---
> Changes for v3 :Incorporated York's comments
>   - Removed hwconfig variable
>
> Changes for v2 :
>   - Removed "initrd_high=0x\0"
>   - Removed console variable
>

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2] spi: fsl_qspi: Preserve endianness of QSPI MCR

[york sun]

On 10/06/2016 02:38 PM, York Sun wrote:
> The endianness can be changed by RCW + PBI sequence. It may have
> other than power on reset value.
>
> Signed-off-by: York Sun 
> CC: Yuan Yao 
> CC: Peng Fan 
> CC: Alison Wang 
> ---
> Change log
>  v2: Fix variable name in spi_setup_slave
>


Applied to fsl-qoriq master, awaiting upstream.

York

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[U-Boot] [PATCH v2] Add support for eMMC environment in boot partition

[Sergey Kubushyn]

This allows to place U-Boot environment into eMMC boot partition thus
saving space on user partition for the OS (or whatever.) When booting
off of eMMC many (all?) MCUs can use dedicated boot0/boot1 partitions
to boot so U-Boot (or SPL) is written to one (or both) such partitions.
When such boot configuration is used it makes sense to place environment
in the same partition where the U-Boot itself is so the entire user
partition is available for the OS.

It might be not well polished yet but it is a simple patch that can be
reworked later.

It uses 4 Kconfig variables right now which probably belong to the board
Kconfig. Those are:

CONFIG_ENV_IN_EMMC_BOOT -- tells that environment is in eMMC boot
 partition if defined

CONFIG_EMMC_ENV_PART -- tells which boot partition environment should be
 stored in (either 1 or 2)

CONFIG_EMMC_BOOT_PART -- which boot partition will be used by eMMC to
 read U-Boot/SPL binary for boot protocol (either 1 or 2.) That can be
 different from the environment partition

CONFIG_EMMC_BOOT_ACK -- tells that eMMC should provide boot ACKs if
 defined

Here is an excerpt from actual board Kconfig:

=== Cut ===
config ENV_IN_EMMC_BOOT
bool "Environment is in eMMC boot partition"
default y

config EMMC_ENV_PART
hex "eMMC boot partition used for environment (1 or 2)"
default 1

config EMMC_BOOT_PART
hex "eMMC boot partition the board boots off of (1 or 2)"
default 1

config EMMC_BOOT_ACK
bool "Enable ACKs from eMMC when booting off of boot partition"
default n
=== Cut ===

Signed-off-by: Sergey Kubushyn 
Cc: Tom Rini 
Cc: Pantelis Antoniou 
---
 common/env_mmc.c | 50 ++
 1 file changed, 50 insertions(+)

diff --git a/common/env_mmc.c b/common/env_mmc.c
index 16f6a17..3b2477c 100644
--- a/common/env_mmc.c
+++ b/common/env_mmc.c
@@ -68,6 +68,45 @@ int env_init(void)
return 0;
 }
 
+#ifdef CONFIG_ENV_IN_EMMC_BOOT
+__weak u8 mmc_get_env_part(struct mmc *mmc)
+{
+   return CONFIG_EMMC_ENV_PART;
+}
+
+__weak u8 mmc_get_boot_part(struct mmc *mmc)
+{
+   return CONFIG_EMMC_BOOT_PART;
+}
+
+__weak u8 mmc_get_boot_ack(struct mmc *mmc)
+{
+#ifdef CONFIG_EMMC_BOOT_ACK
+   return 1;
+#else
+   return 0;
+#endif
+}
+
+static int mmc_set_env_part(struct mmc *mmc)
+{
+   int ret = 0;
+   u8 boot_part = 0;
+   u8 boot_ack = 0;
+   u8 env_part = 0;
+
+   boot_part = mmc_get_boot_part(mmc);
+   boot_ack = mmc_get_boot_ack(mmc);
+   env_part = mmc_get_env_part(mmc);
+
+   ret = mmc_set_part_conf(mmc, boot_ack, boot_part, env_part);
+
+   if (ret)
+   puts("MMC switch to boot partition failed\n");
+
+   return ret;
+}
+#else
 #ifdef CONFIG_SYS_MMC_ENV_PART
 __weak uint mmc_get_env_part(struct mmc *mmc)
 {
@@ -96,6 +135,7 @@ static int mmc_set_env_part(struct mmc *mmc)
 #else
 static inline int mmc_set_env_part(struct mmc *mmc) {return 0; };
 #endif
+#endif
 
 static const char *init_mmc_for_env(struct mmc *mmc)
 {
@@ -113,6 +153,15 @@ static const char *init_mmc_for_env(struct mmc *mmc)
 
 static void fini_mmc_for_env(struct mmc *mmc)
 {
+#ifdef CONFIG_ENV_IN_EMMC_BOOT
+   u8 boot_part = 0;
+   u8 boot_ack = 0;
+
+   boot_part = mmc_get_boot_part(mmc);
+   boot_ack = mmc_get_boot_ack(mmc);
+
+   mmc_set_part_conf(mmc, boot_ack, boot_part, 0);
+#else
 #ifdef CONFIG_SYS_MMC_ENV_PART
int dev = mmc_get_env_dev();
 
@@ -121,6 +170,7 @@ static void fini_mmc_for_env(struct mmc *mmc)
 #endif
blk_select_hwpart_devnum(IF_TYPE_MMC, dev, env_mmc_orig_hwpart);
 #endif
+#endif
 }
 
 #ifdef CONFIG_CMD_SAVEENV
-- 
2.5.5

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Re: [U-Boot] [PATCH] armv7: LS1021a: enable i-cache in start.S

[york sun]

On 09/13/2016 08:48 PM, Xiaoliang Yang wrote:
> Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and
> ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First
> stage of u-boot can run faster after that. There is a description
> about skip lowlevel init in board/freescale/ls1021atwr/README.
>
> Signed-off-by: Xiaoliang Yang 
> ---

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] arm: dra7xx: Move fastboot options to defconfig

[Tom Rini]

On Thu, Sep 22, 2016 at 09:52:07PM +0300, Semen Protsenko wrote:

> Now that fastboot options are available in Kconfig, we can migrate them
> from DRA7 header to corresponding DRA7 defconfigs.
> 
> Signed-off-by: Sam Protsenko 
> Reviewed-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v3,1/3] ARM: AM437X: Add Silicon ID support

[Tom Rini]

On Tue, Oct 04, 2016 at 09:34:50AM +0530, Lokesh Vutla wrote:

> Add silicon ID code for AM437x silicon. This can be used to print
> the cpu info using CONFIG_DISPLAY_CPUINFO.
> Also printing "CPU :" along with cpu name in order to be consistent
> with other OMAP platforms.
> 
> Reviewed-by: Tom Rini 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 1/1]: environment in eMMC boot partition

[Tom Rini]

On Wed, Oct 05, 2016 at 01:28:07PM -0700, Sergey Kubushyn wrote:

> This allows to place U-Boot environment into eMMC boot partition thus
> saving space on user partition for the OS (or whatever.) When booting
> off of eMMC many (all?) MCUs can use dedicated boot0/boot1 partitions
> to boot so U-Boot (or SPL) is written to one (or both) such partitions.
> When such boot configuration is used it makes sense to place environment
> in the same partition where the U-Boot itself is so the entire user
> partition is available for the OS.
> 
> It might be not well polished yet but it is a simple patch that can be
> reworked later.
> 
> It uses 4 Kconfig variables right now which probably belong to the board
> Kconfig. Those are:
> 
> CONFIG_ENV_IN_EMMC_BOOT -- tells that environment is in eMMC boot
>  partition if defined
> 
> CONFIG_EMMC_ENV_PART -- tells which boot partition environment should be
>  stored in (either 1 or 2)
> 
> CONFIG_EMMC_BOOT_PART -- which boot partition will be used by eMMC to
>  read U-Boot/SPL binary for boot protocol (either 1 or 2.) That can be
>  different from the environment partition
> 
> CONFIG_EMMC_BOOT_ACK -- tells that eMMC should provide boot ACKs if
>  defined
> 
> Here is an excerpt from actual board Kconfig:

I think what's missing is that in the other cases where we do
environment in the eMMC boot partitions we don't need the boot ack part.
Can you see if the existing hooks work, when you add in something for
boot ack?

-- 
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Re: [U-Boot] [U-Boot, 3/5] kbuild: make dependencies in scripts/Makefile.autoconf more readable

[Tom Rini]

On Mon, Sep 26, 2016 at 01:05:00PM +0900, Masahiro Yamada wrote:

> I do not remember why I wrote the code like this, but let's make it
> a bit more readable.
> 
> Signed-off-by: Masahiro Yamada 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,1/2] ARM: dts: dra72: add rev C evm support

[Tom Rini]

On Tue, Sep 27, 2016 at 01:01:41PM +0530, Mugunthan V N wrote:

> Add DTS support for dra72 evm Rev C which has the following
> changes
> * Two ethernet ports now instead of the single one in rev B.
> * DP83867 ethernet phy instead of DP838865.
> 
> Cc: Vignesh R 
> Signed-off-by: Mugunthan V N 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 4/5] kbuild: generate u-boot.cfg as a byproduct of include/autoconf.mk

[Tom Rini]

On Mon, Sep 26, 2016 at 01:05:01PM +0900, Masahiro Yamada wrote:

> Our build system still parses ad-hoc CONFIG options in header files
> and generates include/autoconf.mk so that Makefiles can reference
> them.  This gimmick was introduced in the pre-Kconfig days and will
> be kept until Kconfig migration is completed.
> 
> The include/autoconf.mk is generated like follows:
> 
>   [1] Preprocess include/common.h with -DDO_DEPS_ONLY and
>   retrieve macros into include/autoconf.mk.tmp
>   [2] Reformat include/autoconf.mk.dep into include/autoconf.mk
>   with tools/scripts/define2mk.sed script
>   [3] Remove include/autoconf.mk.tmp
> 
> Here, include/autoconf.mk.tmp is similar to u-boot.cfg, which is
> also generated by preprocessing include/config.h with -DDO_DEPS_ONLY.
> In other words, there is much overlap among include/autoconf.mk and
> u-boot.cfg build rules.
> 
> So, the idea is to split the build rule of include/autoconf.mk
> into two stages.  The first preprocesses headers into u-boot.cfg.
> The second parses the u-boot.cfg into include/autoconf.mk.  The
> build rules of u-boot.cfg in Makefile and spl/Makefile will be gone.
> 
> Signed-off-by: Masahiro Yamada 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PULL] Please pull u-boot-imx

[Tom Rini]

On Fri, Oct 07, 2016 at 05:38:01PM +0200, Stefano Babic wrote:

> Hi Tom,
> 
> please pull from u-boot-imx, thanks !
> 
> The following changes since commit 53fec162061811a73c7dab3207f8fdb2343ae289:
> 
>   Prepare v2016.11-rc1 (2016-10-03 09:28:13 -0400)
> 
> are available in the git repository at:
> 
>   git://www.denx.de/git/u-boot-imx.git master
> 
> for you to fetch changes up to 3dddc793e0114eb7dfc68b98a4316644d4031fcb:
> 
>   board: ge: bx50v3: Pass video bootargs for b850v3 (2016-10-07 16:32:28
> +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] arm: ls102xa: Remove reduplicate definition for Generic Timer frequency

[york sun]

On 10/07/2016 07:21 PM, Alison Wang wrote:
> Hi, York,
>
>> On 09/23/2016 01:15 AM, Alison Wang wrote:
>>> GENERIC_TIMER_CLK and CONFIG_TIMER_CLK_FREQ are both used to define
>>> Generic Timer frequency. It is reduplicate. This patch will remove
>>> GENERIC_TIMER_CLK macro.
>>>
>>> Signed-off-by: Alison Wang 
>>> ---
>>>  arch/arm/cpu/armv7/ls102xa/psci.S  | 2 +-
>>> arch/arm/cpu/armv7/ls102xa/timer.c | 2 +-
>>>  include/configs/ls1021aqds.h   | 5 -
>>>  include/configs/ls1021atwr.h   | 5 -
>>>  4 files changed, 2 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S
>>> b/arch/arm/cpu/armv7/ls102xa/psci.S
>>> index 8f38680..9efb6d8 100644
>>> --- a/arch/arm/cpu/armv7/ls102xa/psci.S
>>> +++ b/arch/arm/cpu/armv7/ls102xa/psci.S
>>> @@ -36,7 +36,7 @@
>>>
>>> .align  5
>>>
>>> -#defineONE_MS  (GENERIC_TIMER_CLK / 1000)
>>> +#defineONE_MS  (CONFIG_TIMER_CLK_FREQ / 1000)
>>>  #defineRESET_WAIT  (30 * ONE_MS)
>>>
>>
>> Alison,
>>
>> Can you use GENERIC_TIMER_CLK? Recent change in U-Boot doesn't favor
>> using CONFIG_* macros.
> [Alison Wang] If GENERIC_TIMER_CLK is used and CONFIG_TIMER_CLK_FREQ is 
> removed,
> I need to modify the generic codes which use CONFIG_TIMER_CLK_FREQ in
> arch/arm/cpu/armv7/nonsec_virt.S. Some other platforms may be affected. So I
> remove GENERIC_TIMER_CLK in v1.
>
> What's your idea?
>

If it is too much change, then keep your current patch. We will come 
back to these CONFIG_* macros later anyway.

York

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Re: [U-Boot] cmd: Make CMD_USB_MASS_STORAGE visible only with USB_GADGET and default y

[Tom Rini]

On Mon, Sep 19, 2016 at 12:40:12PM -0400, Tom Rini wrote:

> In order for CMD_USB_MASS_STORAGE to be useful we must have USB_GADGET
> enabled, so only show this option when USB_GADGET is set.  In addition,
> expand the help text so it's clearer what this does and given the
> overall utility of this command, make it enabled by default.
> 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, PATCHv2] scripts: Add script to extract default environment

[Tom Rini]

On Sat, Sep 17, 2016 at 06:57:39AM +0200, Lukasz Majewski wrote:

> This script looks for env_common.o object file and extracts from it default
> u-boot environment, which is afterwards printed on standard output.
> 
> Usage example:
> get_default_envs.sh > u-boot-env-default.txt
> 
> The generated text file can be used as input for mkenvimage.
> 
> Signed-off-by: Lukasz Majewski 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] ARM: Add register defines for am33xx ePWM registers

[Tom Rini]

On Fri, Sep 16, 2016 at 10:21:39AM +, tomas.me...@vaisala.com wrote:

> Register definitions needed for configuring the
> ePWM module.
> 
> Signed-off-by: Tomas Melin 

Applied to u-boot/master, thanks!

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Re: [U-Boot] doc: typo fix addess -> address

[Tom Rini]

On Wed, Sep 14, 2016 at 09:54:53PM +0200, Jelle van der Waa wrote:

> Signed-off-by: Jelle van der Waa 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 5/6] ARM: Introduce function to switch to hypervisor mode

[Tom Rini]

On Wed, Sep 14, 2016 at 10:43:32AM +0530, Keerthy wrote:

> On some of the SoCs one cannot enable hypervisor mode directly from the
> u-boot because the ROM code puts the chip to supervisor mode after it
> jumps to boot loader. Hence introduce a weak function which can be
> overridden based on the SoC type and switch to hypervisor mode in a
> custom way.
> 
> Cc: beagleboard-...@googlegroups.com
> Signed-off-by: Keerthy 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 4/6] configs: dra7xx_evm_defconfig: Enable LPAE mode

[Tom Rini]

On Wed, Sep 14, 2016 at 10:43:31AM +0530, Keerthy wrote:

> Enable Linear Physical Address Extension mode which is a
> prerequisite for hypervisor mode.
> 
> Signed-off-by: Keerthy 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 6/6] ARM: OMAP5+: Override switch_to_hypervisor function

[Tom Rini]

On Wed, Sep 14, 2016 at 10:43:33AM +0530, Keerthy wrote:

> Override the switch_to_hypervisor function to switch cpu to hypervisor
> mode using the available ROM code hook early in the boot phase before
> the boot loader checks for HYP mode.
> 
> Based on the work done by Jonathan Bergsagel jbergsa...@ti.com.
> 
> Cc: beagleboard-...@googlegroups.com
> Signed-off-by: Keerthy 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 3/6] configs: am57xx_evm_defconfig: Enable LPAE mode

[Tom Rini]

On Wed, Sep 14, 2016 at 10:43:30AM +0530, Keerthy wrote:

> Enable Linear Physical Address Extension mode which is a
> prerequisite for hypervisor mode.
> 
> Signed-off-by: Keerthy 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/6] omap: Remove hardcoding of mmu section shift to 20

[Tom Rini]

On Wed, Sep 14, 2016 at 10:43:28AM +0530, Keerthy wrote:

> As of now the mmu section shift is hardcoded to 20 but with LPAE
> coming into picture this can be different. Hence replacing 20 with
> MMU_SECTION_SHIFT macro.
> 
> Signed-off-by: Keerthy 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 2/6] omap: Set appropriate cache configuration for LPAE and non-LAPE cases

[Tom Rini]

On Wed, Sep 14, 2016 at 10:43:29AM +0530, Keerthy wrote:

> Cache configuration methods is different for LPAE and non-LPAE cases.
> Hence the bits and the interpretaion is different for two cases.
> In case of non-LPAE mode short descriptor format is used and we need
> to set Cache and Buffer bits.
> 
> In the case of LPAE the cache configuration happens via MAIR0 lookup.
> 
> Signed-off-by: Keerthy 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] cmd/onenand.c: block align warning

[Tom Rini]

On Tue, Sep 13, 2016 at 07:40:00AM +0200, Ladislav Michl wrote:

> An attempt to write non block aligned data fails silently, add warning and
> set result.
> 
> Signed-off-by: Ladislav Michl 

Applied to u-boot/master, thanks!

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Re: [U-Boot] PWM: Correct misspellings of "module" in context of PWM

[Tom Rini]

On Tue, Sep 13, 2016 at 08:35:18AM -0400, Robert P. J. Day wrote:

> Signed-off-by: Robert P. J. Day 
> Acked-by: Heiko Schocher 
> 
> diff --git a/README b/README
> index f41a6af..30076bc 100644

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2] ARM64: Add support for some of atomic64 operations

[Tom Rini]

On Tue, Sep 13, 2016 at 08:40:58AM +0200, Adam Oleksy wrote:

> These functions are needed in UBI/UBIFS on ZynqMP platform (ARM64).
> 
> Signed-off-by: Adam Oleksy 
> Cc: Albert Aribaud 

Applied to u-boot/master, thanks!

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Re: [U-Boot] search.h: Numerous grammatical fixes, comment updates

[Tom Rini]

On Fri, Sep 09, 2016 at 06:22:10AM -0400, Robert P. J. Day wrote:

> Tweaks (no functional changes) to include/search.h, including:
> 
>  * use standard multiple inclusion check
>  * fix spelling mistakes
>  * have comments match actual names in function prototypes
>  * remove obsolete reference to "do_apply"
>  * replace "hashing table" with "hash table"
> 
> Signed-off-by: Robert P. J. Day 

Applied to u-boot/master, thanks!

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Re: [U-Boot] ARM: Respect CONFIG_SPL_STACK define in lowlevel_init.S

[Tom Rini]

On Mon, Sep 05, 2016 at 06:36:10AM +0300, Siarhei Siamashka wrote:

> The SPL and U-Boot proper may use different initial stack
> locations, which are configured via CONFIG_SPL_STACK and
> CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S
> code needs to handle this in the same way as crt0.S
> 
> Without this fix, setting the U-Boot stack location to some
> place, which is not safely accessible by the SPL (such as
> the DRAM), causes a very early SPL deadlock.
> 
> Signed-off-by: Siarhei Siamashka 
> Reviewed-by: Tom Rini 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] ARMv8/sec-firmware: fix a compile error

[Tom Rini]

On Tue, Sep 06, 2016 at 02:23:07PM +0800, Zhiqiang Hou wrote:

> From: Hou Zhiqiang 
> 
> When enabled sec firmware framework, but lack of definition of
> the marco SEC_FIRMWARE_FIT_IMAGE, SEC_FIRMEWARE_FIT_CNF_NAME
> and SEC_FIRMWARE_TARGET_EL, there will be some build errors,
> so give a default definition.
> 
> Signed-off-by: Hou Zhiqiang 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Various, accumulated typos collected from around the tree.

[Tom Rini]

On Wed, Sep 07, 2016 at 02:27:59PM -0400, Robert P. J. Day wrote:

> Fix various misspellings of:
> 
>  * deprecated
>  * partition
>  * preceding,preceded
>  * preparation
>  * its versus it's
>  * export
>  * existing
>  * scenario
>  * redundant
>  * remaining
>  * value
>  * architecture
> 
> Signed-off-by: Robert P. J. Day 
> Reviewed-by: Jagan Teki 
> Reviewed-by: Stefan Roese 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Suspected Spam: Do not open attachements![PATCH 4/6] tools/env: flash_write_buf: enforce offset to be start of environment

[Tom Rini]

On Mon, Aug 29, 2016 at 11:17:00PM +0200, Andreas Fenkart wrote:

> This allows to take advantage of the environment being block aligned.
> This is not a new constraint. Writes always start at the begin of the
> environment, since the header with CRC/length as there.
> Every environment modification requires updating the header
> 
> Signed-off-by: Andreas Fenkart 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/6] tools/env: factor out environment_end function

[Tom Rini]

On Mon, Aug 29, 2016 at 11:16:57PM +0200, Andreas Fenkart wrote:

> instead of adhoc computation of the environment end,
> use a function with a proper name
> 
> Signed-off-by: Andreas Fenkart 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 3/6] tools/env: lookup dev_type directly from flash_read_buf/flash_write_buf

[Tom Rini]

On Mon, Aug 29, 2016 at 11:16:59PM +0200, Andreas Fenkart wrote:

> flash_write_buf already looks up size/offset/#sector from struct
> envdev_s. It can look up mtd_type as well. Same applies to
> flash_read_buf. Makes the interface simpler
> 
> Signed-off-by: Andreas Fenkart 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 2/6] tools/env: pass bad block offset by value

[Tom Rini]

On Mon, Aug 29, 2016 at 11:16:58PM +0200, Andreas Fenkart wrote:

> the offset is not modified by linux ioctl call
> see mtd_ioctl{drivers/mtd/mtdchar.c}
> Makes the interface less ambiguous, since the caller can
> now exclude a modification of blockstart
> 
> Signed-off-by: Andreas Fenkart 

Applied to u-boot/master, thanks!

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Re: [U-Boot] gunzip: cache-align write buffer memory

[Tom Rini]

On Mon, Aug 29, 2016 at 05:10:36PM +0200, Clemens Gruber wrote:

> When using gzwrite to eMMC on an i.MX6Q board, the following warning
> occurs repeatedly:
> CACHE: Misaligned operation at range [4fd63318, 4fe63318]
> 
> This patch cache-aligns the memory allocation for the gzwrite writebuf,
> therefore avoiding the misaligned dcache flush and the warning from
> check_cache_range.
> 
> Signed-off-by: Clemens Gruber 
> Reviewed-by: Eric Nelson 
> Reviewed-by: Stefan Agner 

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH V3 2/8] imx: mx6: Add plugin support

[Peng Fan]

Add mx6_plugin.S which calls boot rom setup function, generate the second ivt,
and jump back to boot rom.

Signed-off-by: Peng Fan 
Signed-off-by: Ye Li 
Signed-off-by: Utkarsh Gupta 
Reviewed-by: Tom Rini 
Acked-by: Utkarsh Gupta 
---

V3:
 None

V2:
 None

 arch/arm/include/asm/arch-mx6/mx6_plugin.S | 159 +
 1 file changed, 159 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mx6/mx6_plugin.S

diff --git a/arch/arm/include/asm/arch-mx6/mx6_plugin.S 
b/arch/arm/include/asm/arch-mx6/mx6_plugin.S
new file mode 100644
index 000..b7d1b20
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx6/mx6_plugin.S
@@ -0,0 +1,159 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+#ifdef CONFIG_ROM_UNIFIED_SECTIONS
+#define ROM_API_TABLE_BASE_ADDR_LEGACY 0x180
+#define ROM_VERSION_OFFSET 0x80
+#else
+#define ROM_API_TABLE_BASE_ADDR_LEGACY 0xC0
+#define ROM_VERSION_OFFSET 0x48
+#endif
+#define ROM_API_TABLE_BASE_ADDR_MX6DQ_TO15 0xC4
+#define ROM_API_TABLE_BASE_ADDR_MX6DL_TO12 0xC4
+#define ROM_API_HWCNFG_SETUP_OFFSET0x08
+#define ROM_VERSION_TO10   0x10
+#define ROM_VERSION_TO12   0x12
+#define ROM_VERSION_TO15   0x15
+
+plugin_start:
+
+   push{r0-r4, lr}
+
+   imx6_ddr_setting
+   imx6_clock_gating
+   imx6_qos_setting
+
+/*
+ * The following is to fill in those arguments for this ROM function
+ * pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data)
+ * This function is used to copy data from the storage media into DDR.
+ * start - Initial (possibly partial) image load address on entry.
+ * Final image load address on exit.
+ * bytes - Initial (possibly partial) image size on entry.
+ * Final image size on exit.
+ * boot_data - Initial @ref ivt Boot Data load address.
+ */
+   adr r0, boot_data2
+   adr r1, image_len2
+   adr r2, boot_data2
+
+#ifdef CONFIG_NOR_BOOT
+#ifdef CONFIG_MX6SX
+   ldr r3, =ROM_VERSION_OFFSET
+   ldr r4, [r3]
+   cmp r4, #ROM_VERSION_TO10
+   bgt before_calling_rom___pu_irom_hwcnfg_setup
+   ldr r3, =0x00900b00
+   ldr r4, =0x5000
+   str r4, [r3, #0x5c]
+#else
+   ldr r3, =0x00900800
+   ldr r4, =0x0800
+   str r4, [r3, #0xc0]
+#endif
+#endif
+
+/*
+ * check the _pu_irom_api_table for the address
+ */
+before_calling_rom___pu_irom_hwcnfg_setup:
+   ldr r3, =ROM_VERSION_OFFSET
+   ldr r4, [r3]
+#if defined(CONFIG_MX6SOLO) || defined(CONFIG_MX6DL)
+   ldr r3, =ROM_VERSION_TO12
+   cmp r4, r3
+   ldrge r3, =ROM_API_TABLE_BASE_ADDR_MX6DL_TO12
+   ldrlt r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
+#elif defined(CONFIG_MX6Q)
+   ldr r3, =ROM_VERSION_TO15
+   cmp r4, r3
+   ldrge r3, =ROM_API_TABLE_BASE_ADDR_MX6DQ_TO15
+   ldrlt r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
+#else
+   ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
+#endif
+   ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET]
+   blx r4
+after_calling_rom___pu_irom_hwcnfg_setup:
+
+/*
+ * ROM_API_HWCNFG_SETUP function enables MMU & Caches.
+ * Thus disable MMU & Caches.
+ */
+
+   mrc p15, 0, r0, c1, c0, 0   /* read CP15 register 1 into r0*/
+   andsr0, r0, #0x1/* check if MMU is enabled */
+   beq mmu_disable_notreq  /* exit if MMU is already disabled */
+
+   /* Disable caches, MMU */
+   mrc p15, 0, r0, c1, c0, 0   /* read CP15 register 1 into r0 */
+   bic r0, r0, #(1 << 2)   /* disable D Cache */
+   bic r0, r0, #0x1/* clear bit 0 ; MMU off */
+
+   bic r0, r0, #(0x1 << 11)/* disable Z, branch prediction */
+   bic r0, r0, #(0x1 << 1) /* disable A, Strict alignment */
+   /* check enabled. */
+   mcr p15, 0, r0, c1, c0, 0   /* write CP15 register 1 */
+   mov r0, r0
+   mov r0, r0
+   mov r0, r0
+   mov r0, r0
+
+mmu_disable_notreq:
+NOP
+
+/* To return to ROM from plugin, we need to fill in these argument.
+ * Here is what need to do:
+ * Need to construct the paramters for this function before return to ROM:
+ * plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset)
+ */
+   pop {r0-r4, lr}
+   push {r5}
+   ldr r5, boot_data2
+   str r5, [r0]
+   ldr r5, image_len2
+   str r5, [r1]
+   ldr r5, second_ivt_offset
+   str r5, [r2]
+   mov r0, #1
+   pop {r5}
+
+   /* return back to ROM code */
+   bx lr
+
+/* make the following data right in the end of the output*/
+.ltorg
+
+#if (defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT))
+#define FLASH_OFFSET 0x1000
+#else
+#define FLASH_OFFSET 0x400
+#endif
+
+/*
+ 

Re: [U-Boot] [PATCH V3 1/8] tools: imximage: add plugin support

[Eric Nelson]

Hi Peng,

I'm sorry for taking so long to go though this.

On 10/08/2016 08:58 AM, Peng Fan wrote:
> Add plugin support for imximage.
> 

This CONFIG setting doesn't actually affect mkimage or imximage:

> Define CONFIG_USE_IMXIMG_PLUGIN in defconfig to enable using plugin.
> 
> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 
> Cc: Eric Nelson 
> Cc: Ye Li 
> Reviewed-by: Tom Rini 
> ---
> 
> V3:
>  Fix compile error.
> 
> V2:
>  Drop the CONFIG_USE_PLUGIN, make plugin always support in imximage.
> 
>  tools/imximage.c | 282 
> +++
>  tools/imximage.h |   7 +-
>  2 files changed, 229 insertions(+), 60 deletions(-)
> 
> diff --git a/tools/imximage.c b/tools/imximage.c
> index 092d550..7fa601e 100644
> --- a/tools/imximage.c
> +++ b/tools/imximage.c
> @@ -27,6 +27,7 @@ static table_entry_t imximage_cmds[] = {
>   {CMD_CHECK_BITS_CLR,"CHECK_BITS_CLR",   "Reg Check bits clr", },
>   {CMD_CSF,   "CSF",   "Command Sequence File", },
>   {CMD_IMAGE_VERSION, "IMAGE_VERSION","image version",  },
> + {CMD_PLUGIN,"PLUGIN",   "file plugin_addr",  },
>   {-1,"", "",   },
>  };
>  
> @@ -80,6 +81,9 @@ static uint32_t imximage_ivt_offset = UNDEFINED;
>  static uint32_t imximage_csf_size = UNDEFINED;
>  /* Initial Load Region Size */
>  static uint32_t imximage_init_loadsize;

These seem very limiting.

>From what I can tell, there's no reason that you can't have multiple
plugins, and the use of these variables isn't really needed.

> +static uint32_t imximage_iram_free_start;
> +static uint32_t imximage_plugin_size;
> +static uint32_t plugin_image;
>  
>  static set_dcd_val_t set_dcd_val;
>  static set_dcd_param_t set_dcd_param;
> @@ -118,7 +122,11 @@ static uint32_t detect_imximage_version(struct 
> imx_header *imx_hdr)
>  
>   /* Try to detect V2 */
>   if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
> - (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
> + (hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
> + return IMXIMAGE_V2;
> +
> + if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
> + hdr_v2->boot_data.plugin)
>   return IMXIMAGE_V2;
>  
>   return IMXIMAGE_VER_INVALID;
> @@ -165,7 +173,7 @@ static struct dcd_v2_cmd *gd_last_cmd;
>  static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
>   int32_t cmd)
>  {

I also don't understand why the choice to make the union
with either a DCD table or a plugin.

We should be able to have both, and this doesn't make
the code any easier.

> - dcd_v2_t *dcd_v2 = >header.hdr_v2.dcd_table;
> + dcd_v2_t *dcd_v2 = >header.hdr_v2.data.dcd_table;
>   struct dcd_v2_cmd *d = gd_last_cmd;
>   struct dcd_v2_cmd *d2;
>   int len;
> @@ -261,21 +269,23 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr, 
> uint32_t dcd_len,
>  static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
>   char *name, int lineno)
>  {
> - dcd_v2_t *dcd_v2 = >header.hdr_v2.dcd_table;
> - struct dcd_v2_cmd *d = gd_last_cmd;
> - int len;
> -
> - if (!d)
> - d = _v2->dcd_cmd;
> - len = be16_to_cpu(d->write_dcd_command.length);
> - if (len > 4)
> - d = (struct dcd_v2_cmd *)(((char *)d) + len);
> -
> - len = (char *)d - (char *)_v2->header;
> -
> - dcd_v2->header.tag = DCD_HEADER_TAG;
> - dcd_v2->header.length = cpu_to_be16(len);
> - dcd_v2->header.version = DCD_VERSION;
> + if (!imxhdr->header.hdr_v2.boot_data.plugin) {
> + dcd_v2_t *dcd_v2 = >header.hdr_v2.data.dcd_table;
> + struct dcd_v2_cmd *d = gd_last_cmd;
> + int len;
> +
> + if (!d)
> + d = _v2->dcd_cmd;
> + len = be16_to_cpu(d->write_dcd_command.length);
> + if (len > 4)
> + d = (struct dcd_v2_cmd *)(((char *)d) + len);
> +
> + len = (char *)d - (char *)_v2->header;
> +
> + dcd_v2->header.tag = DCD_HEADER_TAG;
> + dcd_v2->header.length = cpu_to_be16(len);
> + dcd_v2->header.version = DCD_VERSION;
> + }
>  }
>  
>  static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
> @@ -317,24 +327,93 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, 
> uint32_t dcd_len,
>   fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
>   fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
>  

It seems that the reason for a lot of this special-purpose code is to add
support for the entry address.

If mkimage is invoked with an entrypoint from the command-line:

~/$ ./tools/mkimage -n my.cfg -T imximage -e 0xentrypoint u-boot.img
u-boot.imx

This entry point 

Re: [U-Boot] [RFC PATCH] bootm: fix ramdisk relocation

[Tom Rini]

On Thu, Oct 06, 2016 at 11:08:55PM +0200, Cédric Le Goater wrote:

> We are working on bringing to mainline a set of changes adding support
> for the Aspeed SoC and we have a couple of work around we are trying
> to elimitate first. This is one of them. The ramdisk is not relocated
> and Linux fails to boot. The current port does not use a device tree
> (yet) so that might be the most obvious culprit.
> 
> Thanks
> 
> Signed-off-by: Cédric Le Goater 

I suspect that you want to have bootm_size set in your environment so
that all relocations happen within that value and will remain visible to
the kernel.

-- 
Tom


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[U-Boot] [PATCH V3 5/8] imx-common: compile plugin code

[Peng Fan]

If CONFIG_USE_IMXIMG_PLUGIN is selected, plugin.bin will be
generated under board/$(BOARDDIR)/.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Reviewed-by: Tom Rini 
---

V3:
 None

V2:
  New. Make this common to all i.MX6/7, but not duplicated in board makefile.

 arch/arm/imx-common/Makefile | 29 +++--
 1 file changed, 23 insertions(+), 6 deletions(-)

diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index d34a784..1873185 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -38,6 +38,23 @@ obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
 obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
 obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o
 
+PLUGIN = board/$(BOARDDIR)/plugin
+
+ifeq ($(CONFIG_USE_IMXIMG_PLUGIN),y)
+
+$(PLUGIN).o: $(PLUGIN).S FORCE
+   $(Q)mkdir -p $(dir $@)
+   $(call if_changed_dep,as_o_S)
+
+$(PLUGIN).bin: $(PLUGIN).o FORCE
+   $(Q)mkdir -p $(dir $@)
+   $(OBJCOPY) -O binary --gap-fill 0xff $< $@
+else
+
+$(PLUGIN).bin:
+
+endif
+
 quiet_cmd_cpp_cfg = CFGS$@
   cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $<
 
@@ -47,24 +64,24 @@ $(IMX_CONFIG): %.cfgtmp: % FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cpp_cfg)
 
-MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $< $(PHONY),$^) -T imximage \
+MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T 
imximage \
-e $(CONFIG_SYS_TEXT_BASE)
 
-u-boot.imx: u-boot.bin $(IMX_CONFIG) FORCE
+u-boot.imx: u-boot.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE
$(call if_changed,mkimage)
 
 ifeq ($(CONFIG_OF_SEPARATE),y)
-MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $< $(PHONY),$^) -T imximage \
+MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T 
imximage \
-e $(CONFIG_SYS_TEXT_BASE)
 
-u-boot-dtb.imx: u-boot-dtb.bin $(IMX_CONFIG) FORCE
+u-boot-dtb.imx: u-boot-dtb.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE
$(call if_changed,mkimage)
 endif
 
-MKIMAGEFLAGS_SPL = -n $(filter-out $< $(PHONY),$^) -T imximage \
+MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T imximage \
-e $(CONFIG_SPL_TEXT_BASE)
 
-SPL: spl/u-boot-spl.bin $(IMX_CONFIG) FORCE
+SPL: spl/u-boot-spl.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE
$(call if_changed,mkimage)
 
 MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \
-- 
2.6.2

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[U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12

[Chenhui Zhao]

Save and restore core registers from r4 to r12 so that PSCI code won't
break their value.

Signed-off-by: Chenhui Zhao 
Signed-off-by: Alison Wang 
Signed-off-by: Abhimanyu Saini 
---
 arch/arm/cpu/armv7/psci.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 6a36208..746297c 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -152,7 +152,7 @@ _psci_table:
.word   0
 
 _smc_psci:
-   push{r4-r7,lr}
+   push{r4-r12,lr}
 
@ Switch to secure
mrc p15, 0, r7, c1, c1, 0
@@ -175,7 +175,7 @@ _smc_psci:
@ Switch back to non-secure
 2: mcr p15, 0, r7, c1, c1, 0
 
-   pop {r4-r7, lr}
+   pop {r4-r12, lr}
movspc, lr  @ Return to the kernel
 
 @ Requires dense and single-cluster CPU ID space
-- 
1.9.1

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[U-Boot] [PATCH v7 21/21] imx6: icorem6: Add default mtd nand partition table

[Jagan Teki]

From: Jagan Teki 

icorem6qdl> mtdparts

device nand0 , # parts = 6
0: spl 0x0020  0x  0
1: uboot   0x0020  0x0020  0
2: env 0x0010  0x0040  0
3: kernel  0x0040  0x0050  0
4: dtb 0x0010  0x0090  0
5: rootfs  0x1f60  0x00a0  0

Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 include/configs/imx6qdl_icore.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h
index 6e33ec3..f8a1263 100644
--- a/include/configs/imx6qdl_icore.h
+++ b/include/configs/imx6qdl_icore.h
@@ -129,6 +129,8 @@
 # define CONFIG_CMD_MTDPARTS
 # define CONFIG_MTD_PARTITIONS
 # define MTDIDS_DEFAULT"nand0=nand"
+# define MTDPARTS_DEFAULT  "mtdparts=nand:2m(spl),2m(uboot)," \
+   "1m(env),4m(kernel),1m(dtb),-(rootfs)"
 
 # define CONFIG_APBH_DMA
 # define CONFIG_APBH_DMA_BURST
-- 
2.7.4

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[U-Boot] [PATCH v7 17/21] arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual

[Jagan Teki]

From: Jagan Teki 

i.CoreM6 Quad/Dual modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU   NXP i.MX6 DQ, 800MHz
RAM   1GB, 32, 64 bit, DDR3-800/1066
NAND  SLC,512MB
Power supply  Single 5V
MAX LCD RES   FULLHD

and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/Makefile|  3 ++-
 arch/arm/dts/imx6q-icore.dts | 59 
 board/engicam/icorem6/README |  9 ++-
 3 files changed, 69 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/imx6q-icore.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1994fc8..ad69a2c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -282,7 +282,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
bk4r1.dtb
 
 dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
-   imx6dl-icore.dtb
+   imx6dl-icore.dtb \
+   imx6q-icore.dtb
 
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb
 
diff --git a/arch/arm/dts/imx6q-icore.dts b/arch/arm/dts/imx6q-icore.dts
new file mode 100644
index 000..025f543
--- /dev/null
+++ b/arch/arm/dts/imx6q-icore.dts
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore.dtsi"
+
+/ {
+   model = "Engicam i.CoreM6 Quad/Dual Starter Kit";
+   compatible = "engicam,imx6-icore", "fsl,imx6q";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
diff --git a/board/engicam/icorem6/README b/board/engicam/icorem6/README
index c264a94..12d1e21 100644
--- a/board/engicam/icorem6/README
+++ b/board/engicam/icorem6/README
@@ -1,12 +1,19 @@
 How to use U-Boot on Engicam i.CoreM6 DualLite/Solo and Quad/Dual Starter Kit:
 -
 
-- Build U-Boot for Engicam i.CoreM6 QDL:
+- Configure U-Boot for Engicam i.CoreM6 QDL:
 
 $ make mrproper
 $ make icorem6qdl_mmc_defconfig
+
+- Build for i.CoreM6 DualLite/Solo
+
 $ make
 
+- Build for i.CoreM6 Quad/Dual
+
+$ make DEVICE_TREE=imx6q-icore
+
 This will generate the SPL image called SPL and the u-boot-dtb.img.
 
 - Flash the SPL image into the micro SD card:
-- 
2.7.4

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[U-Boot] [PATCH v7 18/21] mtd: nand: Kconfig: Add NAND_MXS entry

[Jagan Teki]

From: Jagan Teki 

Added kconfig for NAND_MXS driver.

Cc: Scott Wood 
Cc: Simon Glass 
Cc: Fabio Estevam 
Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/nand/Kconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 5ce7d6d..df154bf 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -80,6 +80,13 @@ config NAND_ARASAN
  controller. This uses the hardware ECC for read and
  write operations.
 
+config NAND_MXS
+   bool "MXS NAND support"
+   depends on MX6
+   help
+ This enables NAND driver for the NAND flash controller on the
+ MXS processors.
+
 comment "Generic NAND options"
 
 # Enhance depends when converting drivers to Kconfig which use this config
-- 
2.7.4

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[U-Boot] [PATCH v7 20/21] imx6: icorem6: Enable MTD device support

[Jagan Teki]

From: Jagan Teki 

Enable MTD device, partition and command support.

Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 include/configs/imx6qdl_icore.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h
index cd3aa43..6e33ec3 100644
--- a/include/configs/imx6qdl_icore.h
+++ b/include/configs/imx6qdl_icore.h
@@ -124,6 +124,12 @@
 # define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
 # define CONFIG_SYS_NAND_U_BOOT_OFFS   0x20
 
+/* MTD device */
+# define CONFIG_MTD_DEVICE
+# define CONFIG_CMD_MTDPARTS
+# define CONFIG_MTD_PARTITIONS
+# define MTDIDS_DEFAULT"nand0=nand"
+
 # define CONFIG_APBH_DMA
 # define CONFIG_APBH_DMA_BURST
 # define CONFIG_APBH_DMA_BURST8
-- 
2.7.4

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[U-Boot] [PATCH v7 19/21] imx6: icorem6: Add NAND support

[Jagan Teki]

From: Jagan Teki 

Add NAND support for Engicam i.CoreM6 qdl board.

Boot Log:


U-Boot SPL 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43)
Trying to boot from NAND
NAND : 512 MiB

U-Boot 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43 +0530)

CPU:   Freescale i.MX6SOLO rev1.3 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 55C
Reset cause: WDOG
Model: Engicam i.CoreM6 DualLite/Solo Starter Kit
DRAM:  256 MiB
NAND:  512 MiB
MMC:   FSL_SDHC: 0
In:serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Hit any key to stop autoboot:  0
icorem6qdl>

Cc: Scott Wood 
Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 board/engicam/icorem6/icorem6.c  | 63 
 configs/imx6qdl_icore_nand_defconfig | 37 +
 include/configs/imx6qdl_icore.h  | 25 +-
 3 files changed, 124 insertions(+), 1 deletion(-)
 create mode 100644 configs/imx6qdl_icore_nand_defconfig

diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index a370c8b..c152007 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -101,6 +101,66 @@ int board_eth_init(bd_t *bis)
 }
 #endif
 
+#ifdef CONFIG_NAND_MXS
+
+#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
+#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \
+   PAD_CTL_SRE_FAST)
+#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1)
+
+iomux_v3_cfg_t gpmi_pads[] = {
+   IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE  | MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE  | MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_WP_B__NAND_WP_B| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B  | MUX_PAD_CTRL(GPMI_PAD_CTRL0)),
+   IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B   | MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B   | MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+   IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+};
+
+static void setup_gpmi_nand(void)
+{
+   struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+   /* config gpmi nand iomux */
+   SETUP_IOMUX_PADS(gpmi_pads);
+
+   /* gate ENFC_CLK_ROOT clock first,before clk source switch */
+   clrbits_le32(_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
+
+   /* config gpmi and bch clock to 100 MHz */
+   clrsetbits_le32(_ccm->cs2cdr,
+   MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK |
+   MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK |
+   MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK,
+   MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
+   MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
+   MXC_CCM_CS2CDR_ENFC_CLK_SEL(3));
+
+   /* enable ENFC_CLK_ROOT clock */
+   setbits_le32(_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
+
+   /* enable gpmi and bch clock gating */
+   setbits_le32(_ccm->CCGR4,
+MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK |
+MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK |
+MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK |
+MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
+MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET);
+
+   /* enable apbh clock gating */
+   setbits_le32(_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
+}
+#endif
+
 int board_early_init_f(void)
 {
SETUP_IOMUX_PADS(uart4_pads);
@@ -113,6 +173,9 @@ int board_init(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
+#ifdef CONFIG_NAND_MXS
+   setup_gpmi_nand();
+#endif
return 0;
 }
 
diff --git a/configs/imx6qdl_icore_nand_defconfig 
b/configs/imx6qdl_icore_nand_defconfig
new file mode 100644
index 000..8ac3099
--- /dev/null
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -0,0 +1,37 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6Q_ICORE=y

[U-Boot] [PATCH v7 13/21] imx6q: icorem6: Enable pinctrl driver

[Jagan Teki]

From: Jagan Teki 

Enable imx6 pinctrl driver support for i.CoreM6.

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 configs/imx6qdl_icore_mmc_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/imx6qdl_icore_mmc_defconfig 
b/configs/imx6qdl_icore_mmc_defconfig
index 6786daf..221ea7e 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -30,6 +30,8 @@ CONFIG_FEC_MXC=y
 CONFIG_MXC_UART=y
 CONFIG_NETDEVICES=y
 CONFIG_IMX_THERMAL=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-- 
2.7.4

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[U-Boot] [PATCH v7 15/21] arm: dts: Add devicetree for i.MX6Q

[Jagan Teki]

From: Jagan Teki 

Add i.MX6Q dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6q.dtsi | 300 
 1 file changed, 300 insertions(+)
 create mode 100644 arch/arm/dts/imx6q.dtsi

diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi
new file mode 100644
index 000..c30c836
--- /dev/null
+++ b/arch/arm/dts/imx6q.dtsi
@@ -0,0 +1,300 @@
+
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include 
+#include "imx6q-pinfunc.h"
+#include "imx6qdl.dtsi"
+
+/ {
+   aliases {
+   ipu1 = 
+   spi4 = 
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <0>;
+   next-level-cache = <>;
+   operating-points = <
+   /* kHzuV */
+   120 1275000
+   996000  125
+   852000  125
+   792000  1175000
+   396000  975000
+   >;
+   fsl,soc-operating-points = <
+   /* ARM kHz  SOC-PU uV */
+   120 1275000
+   996000  125
+   852000  125
+   792000  1175000
+   396000  1175000
+   >;
+   clock-latency = <61036>; /* two CLK32 periods */
+   clocks = < IMX6QDL_CLK_ARM>,
+< IMX6QDL_CLK_PLL2_PFD2_396M>,
+< IMX6QDL_CLK_STEP>,
+< IMX6QDL_CLK_PLL1_SW>,
+< IMX6QDL_CLK_PLL1_SYS>;
+   clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+   arm-supply = <_arm>;
+   pu-supply = <_pu>;
+   soc-supply = <_soc>;
+   };
+
+   cpu@1 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <1>;
+   next-level-cache = <>;
+   };
+
+   cpu@2 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <2>;
+   next-level-cache = <>;
+   };
+
+   cpu@3 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <3>;
+   next-level-cache = <>;
+   };
+   };
+
+   soc {
+   ocram: sram@0090 {
+   compatible = "mmio-sram";
+   reg = <0x0090 0x4>;
+   clocks = < IMX6QDL_CLK_OCRAM>;
+   };
+
+   aips-bus@0200 { /* AIPS1 */
+   spba-bus@0200 {
+   ecspi5: ecspi@02018000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "fsl,imx6q-ecspi", 
"fsl,imx51-ecspi";
+   reg = <0x02018000 0x4000>;
+   interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = < IMX6Q_CLK_ECSPI5>,
+< IMX6Q_CLK_ECSPI5>;
+   clock-names = "ipg", "per";
+   dmas = < 11 7 1>, < 12 7 2>;
+   dma-names = "rx", "tx";
+   status = "disabled";
+   };
+   };
+
+   iomuxc: iomuxc@020e {
+   compatible = "fsl,imx6q-iomuxc";
+   };
+   };
+
+   sata: sata@0220 

[U-Boot] [PATCH v7 16/21] arm: dts: imx6q: Add pinctrl defines

[Jagan Teki]

From: Jagan Teki 

Add imx6q pinctrl defines support from Linux.

Here is the last commit:
"ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ"
(sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6q-pinfunc.h | 1047 ++
 1 file changed, 1047 insertions(+)
 create mode 100644 arch/arm/dts/imx6q-pinfunc.h

diff --git a/arch/arm/dts/imx6q-pinfunc.h b/arch/arm/dts/imx6q-pinfunc.h
new file mode 100644
index 000..9fc6120
--- /dev/null
+++ b/arch/arm/dts/imx6q-pinfunc.h
@@ -0,0 +1,1047 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DTS_IMX6Q_PINFUNC_H
+#define __DTS_IMX6Q_PINFUNC_H
+
+/*
+ * The pin function ID is a tuple of
+ * 
+ */
+#define MX6QDL_PAD_SD2_DAT1__SD2_DATA1  0x04c 0x360 0x000 0x0 0x0
+#define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0
+#define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B  0x04c 0x360 0x000 0x2 0x0
+#define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS  0x04c 0x360 0x7c8 0x3 0x0
+#define MX6QDL_PAD_SD2_DAT1__KEY_COL7   0x04c 0x360 0x8f0 0x4 0x0
+#define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0
+#define MX6QDL_PAD_SD2_DAT2__SD2_DATA2  0x050 0x364 0x000 0x0 0x0
+#define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0
+#define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B  0x050 0x364 0x000 0x2 0x0
+#define MX6QDL_PAD_SD2_DAT2__AUD4_TXD   0x050 0x364 0x7b8 0x3 0x0
+#define MX6QDL_PAD_SD2_DAT2__KEY_ROW6   0x050 0x364 0x8f8 0x4 0x0
+#define MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x050 0x364 0x000 0x5 0x0
+#define MX6QDL_PAD_SD2_DAT0__SD2_DATA0  0x054 0x368 0x000 0x0 0x0
+#define MX6QDL_PAD_SD2_DAT0__ECSPI5_MISO0x054 0x368 0x82c 0x1 0x0
+#define MX6QDL_PAD_SD2_DAT0__AUD4_RXD   0x054 0x368 0x7b4 0x3 0x0
+#define MX6QDL_PAD_SD2_DAT0__KEY_ROW7   0x054 0x368 0x8fc 0x4 0x0
+#define MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x054 0x368 0x000 0x5 0x0
+#define MX6QDL_PAD_SD2_DAT0__DCIC2_OUT  0x054 0x368 0x000 0x6 0x0
+#define MX6QDL_PAD_RGMII_TXC__USB_H2_DATA   0x058 0x36c 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x058 0x36c 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK 0x058 0x36c 0x918 0x2 0x0
+#define MX6QDL_PAD_RGMII_TXC__GPIO6_IO190x058 0x36c 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M   0x058 0x36c 0x000 0x7 0x0
+#define MX6QDL_PAD_RGMII_TD0__HSI_TX_READY  0x05c 0x370 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x05c 0x370 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TD0__GPIO6_IO200x05c 0x370 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG   0x060 0x374 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x060 0x374 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TD1__GPIO6_IO210x060 0x374 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA   0x064 0x378 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x064 0x378 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TD2__GPIO6_IO220x064 0x378 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE   0x068 0x37c 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x068 0x37c 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TD3__GPIO6_IO230x068 0x37c 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA0x06c 0x380 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x06c 0x380 0x858 0x1 0x0
+#define MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24 0x06c 0x380 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_RD0__HSI_RX_READY  0x070 0x384 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x070 0x384 0x848 0x1 0x0
+#define MX6QDL_PAD_RGMII_RD0__GPIO6_IO250x070 0x384 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE  0x074 0x388 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x074 0x388 0x000 0x1 0x0
+#define MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x074 0x388 0x000 0x5 0x0
+#define MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK   0x074 0x388 0x83c 0x7 0x0
+#define MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG   0x078 0x38c 0x000 0x0 0x0
+#define MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x078 0x38c 0x84c 0x1 0x0
+#define MX6QDL_PAD_RGMII_RD1__GPIO6_IO270x078 0x38c 0x000 

[U-Boot] [PATCH v7 14/21] engicam: icorem6: Add DM_GPIO, DM_MMC support

[Jagan Teki]

From: Jagan Teki 

Add DM_GPIO, DM_MMC support for u-boot and disable for SPL.

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig  |   2 +
 board/engicam/icorem6/icorem6.c | 142 
 include/configs/imx6qdl_icore.h |   4 ++
 3 files changed, 78 insertions(+), 70 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index e2431a8..762a581 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -100,6 +100,8 @@ config TARGET_MX6Q_ICORE
select MX6QDL
select OF_CONTROL
select DM
+   select DM_GPIO
+   select DM_MMC
select DM_THERMAL
select SUPPORT_SPL
 
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index a23cb7e..a370c8b 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -7,8 +7,6 @@
  */
 
 #include 
-#include 
-#include 
 #include 
 #include 
 
@@ -29,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |   \
PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
-   PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |   \
-   PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
 #define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   | \
PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
@@ -55,70 +49,6 @@ static iomux_v3_cfg_t const enet_pads[] = {
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
 };
 
-static iomux_v3_cfg_t const usdhc1_pads[] = {
-   IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
-};
-
-#ifdef CONFIG_FSL_ESDHC
-#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1)
-
-struct fsl_esdhc_cfg usdhc_cfg[1] = {
-   {USDHC1_BASE_ADDR, 0, 4},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-   struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-   int ret = 0;
-
-   switch (cfg->esdhc_base) {
-   case USDHC1_BASE_ADDR:
-   ret = !gpio_get_value(USDHC1_CD_GPIO);
-   break;
-   }
-
-   return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-   int i, ret;
-
-   /*
-   * According to the board_mmc_init() the following map is done:
-   * (U-boot device node)(Physical Port)
-   * mmc0  USDHC1
-   */
-   for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
-   switch (i) {
-   case 0:
-   SETUP_IOMUX_PADS(usdhc1_pads);
-   gpio_direction_input(USDHC1_CD_GPIO);
-   usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-   break;
-   default:
-   printf("Warning - USDHC%d controller not supporting\n",
-  i + 1);
-   return 0;
-   }
-
-   ret = fsl_esdhc_initialize(bis, _cfg[i]);
-   if (ret) {
-   printf("Warning: failed to initialize mmc dev %d\n", i);
-   return ret;
-   }
-   }
-
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FEC_MXC
 #define ENET_PHY_RST   IMX_GPIO_NR(7, 12)
 static int setup_fec(void)
@@ -200,6 +130,78 @@ int dram_init(void)
 #include 
 #include 
 
+/* MMC board initialization is needed till adding DM support in SPL */
+#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
+#include 
+#include 
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
+   PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |   \
+   PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+   IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   

[U-Boot] [PATCH V3 3/8] imx: mx7: Add plugin support

[Peng Fan]

Add mx7_plugin.S which calls boot rom setup function, generate the second ivt,
and jump back to boot rom.

Signed-off-by: Peng Fan 
Signed-off-by: Ye Li 
Cc: Stefano Babic 
Reviewed-by: Tom Rini 
---

V3:
 None

V2:
 None

 arch/arm/include/asm/arch-mx7/mx7_plugin.S | 111 +
 1 file changed, 111 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mx7/mx7_plugin.S

diff --git a/arch/arm/include/asm/arch-mx7/mx7_plugin.S 
b/arch/arm/include/asm/arch-mx7/mx7_plugin.S
new file mode 100644
index 000..41336b4
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx7/mx7_plugin.S
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+#define ROM_API_TABLE_BASE_ADDR_LEGACY 0x180
+#define ROM_VERSION_OFFSET 0x80
+#define ROM_API_HWCNFG_SETUP_OFFSET0x08
+
+plugin_start:
+
+   push{r0-r4, lr}
+
+   imx7_ddr_setting
+   imx7_clock_gating
+   imx7_qos_setting
+
+/*
+ * Check if we are in USB serial download mode and immediately return to ROM
+ * Need to check USB CTRL clock firstly, then check the USBx_nASYNCLISTADDR
+ */
+   ldr r0, =0x30384680
+   ldr r1, [r0]
+   cmp r1, #0
+   beq normal_boot
+
+   ldr r0, =0x30B10158
+   ldr r1, [r0]
+   cmp r1, #0
+   beq normal_boot
+
+   pop {r0-r4, lr}
+   bx lr
+
+normal_boot:
+
+/*
+ * The following is to fill in those arguments for this ROM function
+ * pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data)
+ * This function is used to copy data from the storage media into DDR.
+ * start - Initial (possibly partial) image load address on entry.
+ * Final image load address on exit.
+ * bytes - Initial (possibly partial) image size on entry.
+ * Final image size on exit.
+ * boot_data - Initial @ref ivt Boot Data load address.
+ */
+   adr r0, boot_data2
+   adr r1, image_len2
+   adr r2, boot_data2
+
+/*
+ * check the _pu_irom_api_table for the address
+ */
+before_calling_rom___pu_irom_hwcnfg_setup:
+   ldr r3, =ROM_VERSION_OFFSET
+   ldr r4, [r3]
+   ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
+   ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET]
+   blx r4
+after_calling_rom___pu_irom_hwcnfg_setup:
+
+
+/* To return to ROM from plugin, we need to fill in these argument.
+ * Here is what need to do:
+ * Need to construct the paramters for this function before return to ROM:
+ * plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset)
+ */
+   pop {r0-r4, lr}
+   push {r5}
+   ldr r5, boot_data2
+   str r5, [r0]
+   ldr r5, image_len2
+   str r5, [r1]
+   ldr r5, second_ivt_offset
+   str r5, [r2]
+   mov r0, #1
+   pop {r5}
+
+   /* return back to ROM code */
+   bx lr
+
+/* make the following data right in the end of the output*/
+.ltorg
+
+#define FLASH_OFFSET 0x400
+
+/*
+ * second_ivt_offset is the offset from the "second_ivt_header" to
+ * "image_copy_start", which involves FLASH_OFFSET, plus the first
+ * ivt_header, the plugin code size itself recorded by "ivt2_header"
+ */
+
+second_ivt_offset:  .long (ivt2_header + 0x2C + FLASH_OFFSET)
+
+/*
+ * The following is the second IVT header plus the second boot data
+ */
+ivt2_header:.long 0x0
+app2_code_jump_v:   .long 0x0
+reserv3:.long 0x0
+dcd2_ptr:   .long 0x0
+boot_data2_ptr: .long 0x0
+self_ptr2:  .long 0x0
+app_code_csf2:  .long 0x0
+reserv4:.long 0x0
+boot_data2: .long 0x0
+image_len2: .long 0x0
+plugin2:.long 0x0
-- 
2.6.2

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[U-Boot] [PATCH v7 12/21] arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo

[Jagan Teki]

From: Jagan Teki 

i.CoreM6 DualLite/Solo modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU   NXP i.MX6 DL, 800MHz
RAM   1GB, 32, 64 bit, DDR3-800/1066
NAND  SLC,512MB
Power supply  Single 5V
MAX LCD RES   FULLHD

and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig  |   1 +
 arch/arm/dts/Makefile   |   3 +-
 arch/arm/dts/imx6dl-icore.dts   |  59 +++
 arch/arm/dts/imx6qdl-icore.dtsi | 196 
 board/engicam/icorem6/README|   6 +-
 configs/imx6qdl_icore_mmc_defconfig |   1 +
 6 files changed, 262 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/imx6dl-icore.dts
 create mode 100644 arch/arm/dts/imx6qdl-icore.dtsi

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 5d549bd..e2431a8 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -98,6 +98,7 @@ config TARGET_MX6QARM2
 config TARGET_MX6Q_ICORE
bool "Support Engicam i.Core"
select MX6QDL
+   select OF_CONTROL
select DM
select DM_THERMAL
select SUPPORT_SPL
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 532527d..1994fc8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -281,7 +281,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
pcm052.dtb \
bk4r1.dtb
 
-dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb
+dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
+   imx6dl-icore.dtb
 
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb
 
diff --git a/arch/arm/dts/imx6dl-icore.dts b/arch/arm/dts/imx6dl-icore.dts
new file mode 100644
index 000..aec332c
--- /dev/null
+++ b/arch/arm/dts/imx6dl-icore.dts
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-icore.dtsi"
+
+/ {
+   model = "Engicam i.CoreM6 DualLite/Solo Starter Kit";
+   compatible = "engicam,imx6-icore", "fsl,imx6dl";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi
new file mode 100644
index 000..f424cd5
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-icore.dtsi
@@ -0,0 +1,196 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of 

[U-Boot] [PATCH v7 11/21] dt-bindings: clock: imx6qdl: Add clock defines

[Jagan Teki]

From: Jagan Teki 

Add imx6qdl clock header defines support from Linux.

"clk: imx: Add clock support for imx6qp"
(sha1: ee36027427c769b0b9e5e205fe43aced93d6aa66)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 include/dt-bindings/clock/imx6qdl-clock.h | 274 ++
 1 file changed, 274 insertions(+)
 create mode 100644 include/dt-bindings/clock/imx6qdl-clock.h

diff --git a/include/dt-bindings/clock/imx6qdl-clock.h 
b/include/dt-bindings/clock/imx6qdl-clock.h
new file mode 100644
index 000..2905033
--- /dev/null
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -0,0 +1,274 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_IMX6QDL_H
+#define __DT_BINDINGS_CLOCK_IMX6QDL_H
+
+#define IMX6QDL_CLK_DUMMY  0
+#define IMX6QDL_CLK_CKIL   1
+#define IMX6QDL_CLK_CKIH   2
+#define IMX6QDL_CLK_OSC3
+#define IMX6QDL_CLK_PLL2_PFD0_352M 4
+#define IMX6QDL_CLK_PLL2_PFD1_594M 5
+#define IMX6QDL_CLK_PLL2_PFD2_396M 6
+#define IMX6QDL_CLK_PLL3_PFD0_720M 7
+#define IMX6QDL_CLK_PLL3_PFD1_540M 8
+#define IMX6QDL_CLK_PLL3_PFD2_508M 9
+#define IMX6QDL_CLK_PLL3_PFD3_454M 10
+#define IMX6QDL_CLK_PLL2_198M  11
+#define IMX6QDL_CLK_PLL3_120M  12
+#define IMX6QDL_CLK_PLL3_80M   13
+#define IMX6QDL_CLK_PLL3_60M   14
+#define IMX6QDL_CLK_TWD15
+#define IMX6QDL_CLK_STEP   16
+#define IMX6QDL_CLK_PLL1_SW17
+#define IMX6QDL_CLK_PERIPH_PRE 18
+#define IMX6QDL_CLK_PERIPH2_PRE19
+#define IMX6QDL_CLK_PERIPH_CLK2_SEL20
+#define IMX6QDL_CLK_PERIPH2_CLK2_SEL   21
+#define IMX6QDL_CLK_AXI_SEL22
+#define IMX6QDL_CLK_ESAI_SEL   23
+#define IMX6QDL_CLK_ASRC_SEL   24
+#define IMX6QDL_CLK_SPDIF_SEL  25
+#define IMX6QDL_CLK_GPU2D_AXI  26
+#define IMX6QDL_CLK_GPU3D_AXI  27
+#define IMX6QDL_CLK_GPU2D_CORE_SEL 28
+#define IMX6QDL_CLK_GPU3D_CORE_SEL 29
+#define IMX6QDL_CLK_GPU3D_SHADER_SEL   30
+#define IMX6QDL_CLK_IPU1_SEL   31
+#define IMX6QDL_CLK_IPU2_SEL   32
+#define IMX6QDL_CLK_LDB_DI0_SEL33
+#define IMX6QDL_CLK_LDB_DI1_SEL34
+#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL   35
+#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL   36
+#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL   37
+#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL   38
+#define IMX6QDL_CLK_IPU1_DI0_SEL   39
+#define IMX6QDL_CLK_IPU1_DI1_SEL   40
+#define IMX6QDL_CLK_IPU2_DI0_SEL   41
+#define IMX6QDL_CLK_IPU2_DI1_SEL   42
+#define IMX6QDL_CLK_HSI_TX_SEL 43
+#define IMX6QDL_CLK_PCIE_AXI_SEL   44
+#define IMX6QDL_CLK_SSI1_SEL   45
+#define IMX6QDL_CLK_SSI2_SEL   46
+#define IMX6QDL_CLK_SSI3_SEL   47
+#define IMX6QDL_CLK_USDHC1_SEL 48
+#define IMX6QDL_CLK_USDHC2_SEL 49
+#define IMX6QDL_CLK_USDHC3_SEL 50
+#define IMX6QDL_CLK_USDHC4_SEL 51
+#define IMX6QDL_CLK_ENFC_SEL   52
+#define IMX6QDL_CLK_EIM_SEL53
+#define IMX6QDL_CLK_EIM_SLOW_SEL   54
+#define IMX6QDL_CLK_VDO_AXI_SEL55
+#define IMX6QDL_CLK_VPU_AXI_SEL56
+#define IMX6QDL_CLK_CKO1_SEL   57
+#define IMX6QDL_CLK_PERIPH 58
+#define IMX6QDL_CLK_PERIPH259
+#define IMX6QDL_CLK_PERIPH_CLK260
+#define IMX6QDL_CLK_PERIPH2_CLK2   61
+#define IMX6QDL_CLK_IPG62
+#define IMX6QDL_CLK_IPG_PER63
+#define IMX6QDL_CLK_ESAI_PRED  64
+#define IMX6QDL_CLK_ESAI_PODF  65
+#define IMX6QDL_CLK_ASRC_PRED  66
+#define IMX6QDL_CLK_ASRC_PODF  67
+#define IMX6QDL_CLK_SPDIF_PRED 68
+#define IMX6QDL_CLK_SPDIF_PODF 69
+#define IMX6QDL_CLK_CAN_ROOT   70
+#define IMX6QDL_CLK_ECSPI_ROOT 71
+#define IMX6QDL_CLK_GPU2D_CORE_PODF72
+#define 

[U-Boot] [PATCH v7 10/21] arm: dts: imx6dl: Add pinctrl defines

[Jagan Teki]

From: Jagan Teki 

Add imx6dl pinctrl defines support from Linux.

Here is the last commit:
"ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ"
(sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6dl-pinfunc.h | 1091 +
 1 file changed, 1091 insertions(+)
 create mode 100644 arch/arm/dts/imx6dl-pinfunc.h

diff --git a/arch/arm/dts/imx6dl-pinfunc.h b/arch/arm/dts/imx6dl-pinfunc.h
new file mode 100644
index 000..0ead323
--- /dev/null
+++ b/arch/arm/dts/imx6dl-pinfunc.h
@@ -0,0 +1,1091 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DTS_IMX6DL_PINFUNC_H
+#define __DTS_IMX6DL_PINFUNC_H
+
+/*
+ * The pin function ID is a tuple of
+ * 
+ */
+#define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO  0x04c 0x360 0x7f8 0x2 0x0
+#define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA0x04c 0x360 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA0x04c 0x360 0x8fc 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28   0x04c 0x360 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07  0x04c 0x360 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS0x050 0x364 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0   0x050 0x364 0x800 0x2 0x0
+#define MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA0x050 0x364 0x8fc 0x3 0x1
+#define MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA0x050 0x364 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29   0x050 0x364 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08  0x050 0x364 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x054 0x368 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT12__EIM_DATA08   0x054 0x368 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA0x054 0x368 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA0x054 0x368 0x914 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30   0x054 0x368 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09  0x054 0x368 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x058 0x36c 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT13__EIM_DATA09   0x058 0x36c 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA0x058 0x36c 0x914 0x3 0x1
+#define MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA0x058 0x36c 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31   0x058 0x36c 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10  0x058 0x36c 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x05c 0x370 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT14__EIM_DATA10   0x05c 0x370 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA0x05c 0x370 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA0x05c 0x370 0x91c 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00   0x05c 0x370 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11  0x05c 0x370 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x060 0x374 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT15__EIM_DATA11   0x060 0x374 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA0x060 0x374 0x91c 0x3 0x1
+#define MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA0x060 0x374 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01   0x060 0x374 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12  0x060 0x374 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x064 0x378 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT16__EIM_DATA12   0x064 0x378 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B  0x064 0x378 0x910 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B  0x064 0x378 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02   0x064 0x378 0x000 0x5 0x0
+#define MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13  0x064 0x378 0x000 0x7 0x0
+#define MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x068 0x37c 0x000 0x0 0x0
+#define MX6QDL_PAD_CSI0_DAT17__EIM_DATA13   0x068 0x37c 0x000 0x1 0x0
+#define MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B  0x068 0x37c 0x000 0x3 0x0
+#define MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B  0x068 

[U-Boot] [PATCH v7 08/21] arm: dts: Add devicetree for i.MX6DL

[Jagan Teki]

From: Jagan Teki 

Add i.MX6DL dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6dl.dtsi | 133 +++
 1 file changed, 133 insertions(+)
 create mode 100644 arch/arm/dts/imx6dl.dtsi

diff --git a/arch/arm/dts/imx6dl.dtsi b/arch/arm/dts/imx6dl.dtsi
new file mode 100644
index 000..9a4c22c
--- /dev/null
+++ b/arch/arm/dts/imx6dl.dtsi
@@ -0,0 +1,133 @@
+
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include 
+#include "imx6dl-pinfunc.h"
+#include "imx6qdl.dtsi"
+
+/ {
+   aliases {
+   i2c3 = 
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <0>;
+   next-level-cache = <>;
+   operating-points = <
+   /* kHzuV */
+   996000  125
+   792000  1175000
+   396000  115
+   >;
+   fsl,soc-operating-points = <
+   /* ARM kHz  SOC-PU uV */
+   996000  1175000
+   792000  1175000
+   396000  1175000
+   >;
+   clock-latency = <61036>; /* two CLK32 periods */
+   clocks = < IMX6QDL_CLK_ARM>,
+< IMX6QDL_CLK_PLL2_PFD2_396M>,
+< IMX6QDL_CLK_STEP>,
+< IMX6QDL_CLK_PLL1_SW>,
+< IMX6QDL_CLK_PLL1_SYS>;
+   clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+   arm-supply = <_arm>;
+   pu-supply = <_pu>;
+   soc-supply = <_soc>;
+   };
+
+   cpu@1 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <1>;
+   next-level-cache = <>;
+   };
+   };
+
+   soc {
+   ocram: sram@0090 {
+   compatible = "mmio-sram";
+   reg = <0x0090 0x2>;
+   clocks = < IMX6QDL_CLK_OCRAM>;
+   };
+
+   aips1: aips-bus@0200 {
+   iomuxc: iomuxc@020e {
+   compatible = "fsl,imx6dl-iomuxc";
+   };
+
+   pxp: pxp@020f {
+   reg = <0x020f 0x4000>;
+   interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
+   };
+
+   epdc: epdc@020f4000 {
+   reg = <0x020f4000 0x4000>;
+   interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
+   };
+
+   lcdif: lcdif@020f8000 {
+   reg = <0x020f8000 0x4000>;
+   interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+   };
+   };
+
+   aips2: aips-bus@0210 {
+   i2c4: i2c@021f8000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
+   reg = <0x021f8000 0x4000>;
+   interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = < IMX6DL_CLK_I2C4>;
+   status = "disabled";
+   };
+   };
+   };
+
+   display-subsystem {
+   compatible = "fsl,imx-display-subsystem";
+   ports = <_di0>, <_di1>;
+   };
+
+   gpu-subsystem {
+   compatible = "fsl,imx-gpu-subsystem";
+   cores = <_2d>, <_3d>;
+   };
+};
+
+ {
+   compatible = "fsl,imx6dl-gpt";
+};
+
+ {
+   compatible = "fsl,imx6dl-hdmi";
+};
+
+ {
+   clocks = < IMX6QDL_CLK_LDB_DI0_SEL>, < 

[U-Boot] [PATCH v7 09/21] arm: dts: Add devicetree for i.MX6DQL

[Jagan Teki]

From: Jagan Teki 

Add i.MX6DQL dtsi support from Linux.

Here is the last commit:
"ARM: dts: imx6qdl: Fix SPDIF regression"
(sha1: f065e9e4addd75c21bb976bb2558648bf4f61de6)

Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6qdl.dtsi | 1281 +
 1 file changed, 1281 insertions(+)
 create mode 100644 arch/arm/dts/imx6qdl.dtsi

diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi
new file mode 100644
index 000..b13b0b2
--- /dev/null
+++ b/arch/arm/dts/imx6qdl.dtsi
@@ -0,0 +1,1281 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include 
+#include 
+
+#include "skeleton.dtsi"
+
+/ {
+   aliases {
+   ethernet0 = 
+   can0 = 
+   can1 = 
+   gpio0 = 
+   gpio1 = 
+   gpio2 = 
+   gpio3 = 
+   gpio4 = 
+   gpio5 = 
+   gpio6 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   ipu0 = 
+   mmc0 = 
+   mmc1 = 
+   mmc2 = 
+   mmc3 = 
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   serial4 = 
+   spi0 = 
+   spi1 = 
+   spi2 = 
+   spi3 = 
+   usbphy0 = 
+   usbphy1 = 
+   };
+
+   clocks {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   ckil {
+   compatible = "fsl,imx-ckil", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <32768>;
+   };
+
+   ckih1 {
+   compatible = "fsl,imx-ckih1", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <0>;
+   };
+
+   osc {
+   compatible = "fsl,imx-osc", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   };
+   };
+
+   soc {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "simple-bus";
+   interrupt-parent = <>;
+   ranges;
+
+   dma_apbh: dma-apbh@0011 {
+   compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
+   reg = <0x0011 0x2000>;
+   interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>;
+   interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
+   #dma-cells = <1>;
+   dma-channels = <4>;
+   clocks = < IMX6QDL_CLK_APBH_DMA>;
+   };
+
+   gpmi: gpmi-nand@00112000 {
+   compatible = "fsl,imx6q-gpmi-nand";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
+   reg-names = "gpmi-nand", "bch";
+   interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
+   interrupt-names = "bch";
+   clocks = < IMX6QDL_CLK_GPMI_IO>,
+< IMX6QDL_CLK_GPMI_APB>,
+< IMX6QDL_CLK_GPMI_BCH>,
+< IMX6QDL_CLK_GPMI_BCH_APB>,
+< IMX6QDL_CLK_PER1_BCH>;
+   clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
+ "gpmi_bch_apb", "per1_bch";
+   dmas = <_apbh 0>;
+   dma-names = "rx-tx";
+   status = "disabled";
+   };
+
+   hdmi: hdmi@012 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0012 0x9000>;
+   interrupts = <0 115 0x04>;
+   gpr = <>;
+   clocks = < IMX6QDL_CLK_HDMI_IAHB>,
+< 

[U-Boot] [PATCH v7 04/21] arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support

[Jagan Teki]

From: Jagan Teki 

Boot Log for i.CoreM6 DualLite/Solo Starter Kit:
---

U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6SOLO rev1.3 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 31C
Reset cause: POR
DRAM:  256 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0 is current device
switch to partitions #0, OK
mmc0 is current device
reading boot.scr
** Unable to read file boot.scr **
reading zImage
6741808 bytes read in 341 ms (18.9 MiB/s)
Booting from mmc ...
reading imx6dl-icore.dtb
30600 bytes read in 19 ms (1.5 MiB/s)
   Booting using the fdt blob at 0x1800
   Using Device Tree in place at 1800, end 1800a787

Starting kernel ...

[0.00] Booting Linux on physical CPU 0x0

Boot Log for i.CoreM6 Quad/Dual Starter Kit:


U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6Q rev1.2 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 28C
Reset cause: POR
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl>

Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Acked-by: Peng Fan 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig  |   8 +
 arch/arm/include/asm/imx-common/sys_proto.h |   2 +
 board/engicam/icorem6/Kconfig   |  12 +
 board/engicam/icorem6/MAINTAINERS   |   6 +
 board/engicam/icorem6/Makefile  |   6 +
 board/engicam/icorem6/README|  31 +++
 board/engicam/icorem6/icorem6.c | 400 
 configs/imx6qdl_icore_mmc_defconfig |  35 +++
 include/configs/imx6qdl_icore.h | 120 +
 9 files changed, 620 insertions(+)
 create mode 100644 board/engicam/icorem6/Kconfig
 create mode 100644 board/engicam/icorem6/MAINTAINERS
 create mode 100644 board/engicam/icorem6/Makefile
 create mode 100644 board/engicam/icorem6/README
 create mode 100644 board/engicam/icorem6/icorem6.c
 create mode 100644 configs/imx6qdl_icore_mmc_defconfig
 create mode 100644 include/configs/imx6qdl_icore.h

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index d851b26..5d549bd 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -95,6 +95,13 @@ config TARGET_MX6CUBOXI
 config TARGET_MX6QARM2
bool "mx6qarm2"
 
+config TARGET_MX6Q_ICORE
+   bool "Support Engicam i.Core"
+   select MX6QDL
+   select DM
+   select DM_THERMAL
+   select SUPPORT_SPL
+
 config TARGET_MX6QSABREAUTO
bool "mx6qsabreauto"
select DM
@@ -225,6 +232,7 @@ source "board/compulab/cm_fx6/Kconfig"
 source "board/congatec/cgtqmx6eval/Kconfig"
 source "board/el/el6x/Kconfig"
 source "board/embest/mx6boards/Kconfig"
+source "board/engicam/icorem6/Kconfig"
 source "board/freescale/mx6qarm2/Kconfig"
 source "board/freescale/mx6qsabreauto/Kconfig"
 source "board/freescale/mx6sabresd/Kconfig"
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h 
b/arch/arm/include/asm/imx-common/sys_proto.h
index 6ace8bb..005435a 100644
--- a/arch/arm/include/asm/imx-common/sys_proto.h
+++ b/arch/arm/include/asm/imx-common/sys_proto.h
@@ -30,8 +30,10 @@
 #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
 #define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
 #define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || 
is_cpu_type(MXC_CPU_MX6DL))
+#define is_mx6dl() (is_cpu_type(MXC_CPU_MX6DL))
 #define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX))
 #define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
+#define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO))
 #define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
 #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
 
diff --git a/board/engicam/icorem6/Kconfig b/board/engicam/icorem6/Kconfig
new file mode 100644
index 000..6d62f0e
--- /dev/null
+++ b/board/engicam/icorem6/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_MX6Q_ICORE
+
+config SYS_BOARD
+   default "icorem6"
+
+config SYS_VENDOR
+   default "engicam"
+
+config SYS_CONFIG_NAME
+   default "imx6qdl_icore"
+
+endif
diff --git a/board/engicam/icorem6/MAINTAINERS 
b/board/engicam/icorem6/MAINTAINERS
new file 

[U-Boot] [PATCH v7 07/21] imx: s/docs\/README.imximage/doc\/README.imximage/g

[Jagan Teki]

From: Jagan Teki 

Fixed typo for doc/README.imximage on respective imximage.cfg files.

Cc: Tom Rini 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Acked-by: Peng Fan 
Signed-off-by: Jagan Teki 
---
 board/barco/titanium/imximage.cfg   | 2 +-
 board/ccv/xpress/imximage.cfg   | 2 +-
 board/denx/m53evk/imximage.cfg  | 2 +-
 board/freescale/mx6sabresd/mx6dlsabresd.cfg | 2 +-
 board/freescale/mx6slevk/imximage.cfg   | 2 +-
 board/freescale/mx6ullevk/imximage.cfg  | 2 +-
 board/freescale/mx7dsabresd/imximage.cfg| 2 +-
 board/freescale/s32v234evb/s32v234evb.cfg   | 2 +-
 board/freescale/vf610twr/imximage.cfg   | 2 +-
 board/phytec/pcm052/imximage.cfg| 2 +-
 board/technexion/pico-imx6ul/imximage.cfg   | 2 +-
 board/toradex/colibri_imx7/imximage.cfg | 2 +-
 board/toradex/colibri_vf/imximage.cfg   | 2 +-
 board/warp/imximage.cfg | 2 +-
 board/warp7/imximage.cfg| 2 +-
 15 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/board/barco/titanium/imximage.cfg 
b/board/barco/titanium/imximage.cfg
index 7219256..4fb6982 100644
--- a/board/barco/titanium/imximage.cfg
+++ b/board/barco/titanium/imximage.cfg
@@ -7,7 +7,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/ccv/xpress/imximage.cfg b/board/ccv/xpress/imximage.cfg
index 92167c9..d98bc36 100644
--- a/board/ccv/xpress/imximage.cfg
+++ b/board/ccv/xpress/imximage.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/denx/m53evk/imximage.cfg b/board/denx/m53evk/imximage.cfg
index 4cd002c..c0e2602 100644
--- a/board/denx/m53evk/imximage.cfg
+++ b/board/denx/m53evk/imximage.cfg
@@ -4,7 +4,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx6sabresd/mx6dlsabresd.cfg 
b/board/freescale/mx6sabresd/mx6dlsabresd.cfg
index f35f22e..be9f87f 100644
--- a/board/freescale/mx6sabresd/mx6dlsabresd.cfg
+++ b/board/freescale/mx6sabresd/mx6dlsabresd.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx6slevk/imximage.cfg 
b/board/freescale/mx6slevk/imximage.cfg
index c77bbde..024de9c 100644
--- a/board/freescale/mx6slevk/imximage.cfg
+++ b/board/freescale/mx6slevk/imximage.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx6ullevk/imximage.cfg 
b/board/freescale/mx6ullevk/imximage.cfg
index 4604b62..3ae4912 100644
--- a/board/freescale/mx6ullevk/imximage.cfg
+++ b/board/freescale/mx6ullevk/imximage.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx7dsabresd/imximage.cfg 
b/board/freescale/mx7dsabresd/imximage.cfg
index 76574ff..c2b3a8c 100644
--- a/board/freescale/mx7dsabresd/imximage.cfg
+++ b/board/freescale/mx7dsabresd/imximage.cfg
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/s32v234evb/s32v234evb.cfg 
b/board/freescale/s32v234evb/s32v234evb.cfg
index 6017a40..6449ef2 100644
--- a/board/freescale/s32v234evb/s32v234evb.cfg
+++ b/board/freescale/s32v234evb/s32v234evb.cfg
@@ -5,7 +5,7 @@
  */
 
 /*
- * 

[U-Boot] [PATCH v7 06/21] imx6: icorem6: Add ENET support

[Jagan Teki]

From: Jagan Teki 

Add enet support for engicam icorem6 qdl starter kit.
- Add pinmux settings
- Add board_eth_init

TFTP log:

Net:   FEC [PRIME]
Hit any key to stop autoboot:  0
icorem6qdl> tftpboot {fdt_addr} imx6dl-icore.dtb
Using FEC device
TFTP from server 192.168.2.96; our IP address is 192.168.2.75
Filename 'imx6dl-icore.dtb'.
Load address: 0x0
Loading: ##
 1.3 MiB/s
done
Bytes transferred = 28976 (7130 hex)
CACHE: Misaligned operation at range [, 7130]
icorem6qdl>

Cc: Joe Hershberger 
Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
Acked-by: Joe Hershberger 
---
 board/engicam/icorem6/icorem6.c | 72 +
 configs/imx6qdl_icore_mmc_defconfig |  4 +++
 include/configs/imx6qdl_icore.h | 12 +++
 3 files changed, 88 insertions(+)

diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index 1856972..a23cb7e 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -9,12 +9,15 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -30,11 +33,28 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |   \
PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
+#define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
+   PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   | \
+   PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
+
 static iomux_v3_cfg_t const uart4_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
 };
 
+static iomux_v3_cfg_t const enet_pads[] = {
+   IOMUX_PADS(PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL | 
PAD_CTL_SRE_FAST)),
+   IOMUX_PADS(PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+   IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
 static iomux_v3_cfg_t const usdhc1_pads[] = {
IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -99,6 +119,58 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
+#ifdef CONFIG_FEC_MXC
+#define ENET_PHY_RST   IMX_GPIO_NR(7, 12)
+static int setup_fec(void)
+{
+   struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+   struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+   s32 timeout = 10;
+   u32 reg = 0;
+   int ret;
+
+   /* Enable fec clock */
+   setbits_le32(>CCGR1, MXC_CCM_CCGR1_ENET_MASK);
+
+   /* use 50MHz */
+   ret = enable_fec_anatop_clock(0, ENET_50MHZ);
+   if (ret)
+   return ret;
+
+   /* Enable PLLs */
+   reg = readl(>pll_enet);
+   reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN;
+   writel(reg, >pll_enet);
+   reg = readl(>pll_enet);
+   reg |= BM_ANADIG_PLL_SYS_ENABLE;
+   while (timeout--) {
+   if (readl(>pll_enet) & BM_ANADIG_PLL_SYS_LOCK)
+   break;
+   }
+   if (timeout <= 0)
+   return -EIO;
+   reg &= ~BM_ANADIG_PLL_SYS_BYPASS;
+   writel(reg, >pll_enet);
+
+   /* reset the phy */
+   gpio_direction_output(ENET_PHY_RST, 0);
+   udelay(1);
+   gpio_set_value(ENET_PHY_RST, 1);
+
+   return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+   int ret;
+
+   SETUP_IOMUX_PADS(enet_pads);
+   setup_fec();
+
+   return ret = cpu_eth_init(bis);
+}
+#endif
+
 int board_early_init_f(void)
 {
SETUP_IOMUX_PADS(uart4_pads);
diff --git a/configs/imx6qdl_icore_mmc_defconfig 
b/configs/imx6qdl_icore_mmc_defconfig
index ced6b10..c2c2fe8 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -14,6 +14,8 @@ CONFIG_SYS_MAXARGS=32
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
@@ -23,7 +25,9 @@ CONFIG_CMD_EXT4_WRITE=y
 

[U-Boot] [PATCH v7 03/21] config: Move CONFIG_DEFAULT_FDT_FILE to defconfigs

[Jagan Teki]

From: Jagan Teki 

- Add DEFAULT_FDT_FILE kconfig entry
- Move CONFIG_DEFAULT_FDT_FILE from include/configs to defconfigs

Cc: Tom Rini 
Cc: Simon Glass 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 common/Kconfig   | 5 +
 configs/dms-ba16-1g_defconfig| 1 +
 configs/dms-ba16_defconfig   | 1 +
 configs/ge_b450v3_defconfig  | 1 +
 configs/ge_b650v3_defconfig  | 1 +
 configs/ge_b850v3_defconfig  | 1 +
 configs/mx25pdk_defconfig| 1 +
 configs/mx53ard_defconfig| 1 +
 configs/pico-imx6ul_defconfig| 1 +
 configs/tqma6q_mba6_mmc_defconfig| 1 +
 configs/tqma6q_mba6_spi_defconfig| 1 +
 configs/tqma6s_mba6_mmc_defconfig| 1 +
 configs/tqma6s_mba6_spi_defconfig| 1 +
 configs/tqma6s_wru4_mmc_defconfig| 1 +
 configs/zc5202_defconfig | 1 +
 configs/zc5601_defconfig | 1 +
 include/configs/advantech_dms-ba16.h | 1 -
 include/configs/ge_bx50v3.h  | 4 
 include/configs/mx25pdk.h| 2 --
 include/configs/mx53ard.h| 2 --
 include/configs/pico-imx6ul.h| 2 --
 include/configs/tqma6_mba6.h | 6 --
 include/configs/tqma6_wru4.h | 2 --
 include/configs/zc5202.h | 2 --
 include/configs/zc5601.h | 2 --
 25 files changed, 20 insertions(+), 23 deletions(-)

diff --git a/common/Kconfig b/common/Kconfig
index c69c141..9cbcbd4 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -203,6 +203,11 @@ config IDENT_STRING
help
  This options adds the board specific name to u-boot version.
 
+config DEFAULT_FDT_FILE
+   string "Default fdt file"
+   help
+ This option is used to set the default fdt file to boot OS.
+
 config SYS_NO_FLASH
bool "Disable support for parallel NOR flash"
default n
diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig
index db5adcf..8e26837 100644
--- a/configs/dms-ba16-1g_defconfig
+++ b/configs/dms-ba16-1g_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_ADVANTECH_DMS_BA16=y
+CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb"
 CONFIG_SYS_DDR_1G=y
 CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig
index e36f3dc..fec0a1c 100644
--- a/configs/dms-ba16_defconfig
+++ b/configs/dms-ba16_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_ADVANTECH_DMS_BA16=y
+CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb"
 CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig
index 8577167..4a5322d 100644
--- a/configs/ge_b450v3_defconfig
+++ b/configs/ge_b450v3_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_GE_B450V3=y
+CONFIG_DEFAULT_FDT_FILE="/boot/imx6q-b450v3.dtb"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig
index c5f391e..ecf4449 100644
--- a/configs/ge_b650v3_defconfig
+++ b/configs/ge_b650v3_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_GE_B650V3=y
+CONFIG_DEFAULT_FDT_FILE="/boot/imx6q-b650v3.dtb"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig
index 2c5aa05..004c9d0 100644
--- a/configs/ge_b850v3_defconfig
+++ b/configs/ge_b850v3_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_GE_B850V3=y
+CONFIG_DEFAULT_FDT_FILE="/boot/imx6q-b850v3.dtb"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig
index b4afb05..c3ab7c2 100644
--- a/configs/mx25pdk_defconfig
+++ b/configs/mx25pdk_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX25PDK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg"
+CONFIG_DEFAULT_FDT_FILE="imx25-pdk.dtb"
 CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig
index 7a62c2b..fe0f106 100644
--- a/configs/mx53ard_defconfig
+++ b/configs/mx53ard_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX53ARD=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg"
+CONFIG_DEFAULT_FDT_FILE="imx53-ard.dtb"
 CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index 1aaf868..dba67bb 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx6ul/imximage.cfg"

[U-Boot] [PATCH v7 05/21] net: Kconfig: Add FEC_MXC entry

[Jagan Teki]

From: Jagan Teki 

Added kconfig for FEC_MXC driver.

Cc: Joe Hershberger 
Cc: Simon Glass 
Cc: Fabio Estevam 
Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 drivers/net/Kconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 302c005..7b9961d 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -129,6 +129,13 @@ config ETHOC
help
  This MAC is present in OpenRISC and Xtensa XTFPGA boards.
 
+config FEC_MXC
+   bool "FEC Ethernet controller"
+   depends on MX6
+   help
+ This driver supports the 10/100 Fast Ethernet controller for
+ NXP i.MX processors.
+
 config MVPP2
bool "Marvell Armada 375 network interface support"
depends on ARMADA_375
-- 
2.7.4

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[U-Boot] [PATCH v7 00/21] imx6: Add Engicam i.CoreM6 QDL support

[Jagan Teki]

From: Jagan Teki 

This series supports Engicam i.CoreM6 QDL modules on top of u-boot-imx/master
and test on the respective starter kits as well.

Tested both MMC and NAND boot.

Changes for v7:
- Add patch to CONFIG_DEFAULT_FDT_FILE to defconfigs
- Rebase on u-boot-imx/master

Changes for v6:
- Rebase to u-boot-imx/master
- Move few SPL configs to defconfigs

Changes for v5:
- Add NAND support

Changes for v4:
- Add 'net: Kconfig: Add FEC_MXC entry' patch
- Updated ENV configs along with comments
- Restructured configs for more readability
- Add CONFIG_ENV_OVERWRITE
- Rename icorem6qdl_defconfig with icorem6qdl_mmc_defconfig

Changes for v3:
- Remove "v2 01/17 imx: iomux-v3: Fix build error with snvs base" patch
- Remove 'default n' on Kconfig DEFAULT_FDT_FILE patch
- Add minimal devicetree support for Engicam i.CoreM6 QDL
- Add is_mx6dl()
- Add is_mx6solo()
- Use is_mx6dq()
- Add last commit sha1 and header in pull devicetree files from Linux

Changes for v2:
- Make static to local iomux structure in board file
- Corrected rowaddr in mx6_ddr3_cfg
- Used imx_ddr_size
- Add FEC support and tested the same
- Add DM_GPIO, DM_MMC support
- Add pinctrl support
- Add devicetree support

Jagan Teki (21):
  serial: Kconfig: Add MXC_UART entry
  thermal: Kconfig: Add IMX_THERMAL entry
  config: Move CONFIG_DEFAULT_FDT_FILE to defconfigs
  arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support
  net: Kconfig: Add FEC_MXC entry
  imx6: icorem6: Add ENET support
  imx: s/docs\/README.imximage/doc\/README.imximage/g
  arm: dts: Add devicetree for i.MX6DL
  arm: dts: Add devicetree for i.MX6DQL
  arm: dts: imx6dl: Add pinctrl defines
  dt-bindings: clock: imx6qdl: Add clock defines
  arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo
  imx6q: icorem6: Enable pinctrl driver
  engicam: icorem6: Add DM_GPIO, DM_MMC support
  arm: dts: Add devicetree for i.MX6Q
  arm: dts: imx6q: Add pinctrl defines
  arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual
  mtd: nand: Kconfig: Add NAND_MXS entry
  imx6: icorem6: Add NAND support
  imx6: icorem6: Enable MTD device support
  imx6: icorem6: Add default mtd nand partition table

 arch/arm/cpu/armv7/mx6/Kconfig  |   11 +
 arch/arm/dts/Makefile   |4 +-
 arch/arm/dts/imx6dl-icore.dts   |   59 ++
 arch/arm/dts/imx6dl-pinfunc.h   | 1091 +++
 arch/arm/dts/imx6dl.dtsi|  133 +++
 arch/arm/dts/imx6q-icore.dts|   59 ++
 arch/arm/dts/imx6q-pinfunc.h| 1047 ++
 arch/arm/dts/imx6q.dtsi |  300 +++
 arch/arm/dts/imx6qdl-icore.dtsi |  196 
 arch/arm/dts/imx6qdl.dtsi   | 1281 +++
 arch/arm/include/asm/imx-common/sys_proto.h |2 +
 board/barco/titanium/imximage.cfg   |2 +-
 board/ccv/xpress/imximage.cfg   |2 +-
 board/denx/m53evk/imximage.cfg  |2 +-
 board/engicam/icorem6/Kconfig   |   12 +
 board/engicam/icorem6/MAINTAINERS   |6 +
 board/engicam/icorem6/Makefile  |6 +
 board/engicam/icorem6/README|   38 +
 board/engicam/icorem6/icorem6.c |  537 +++
 board/freescale/mx6sabresd/mx6dlsabresd.cfg |2 +-
 board/freescale/mx6slevk/imximage.cfg   |2 +-
 board/freescale/mx6ullevk/imximage.cfg  |2 +-
 board/freescale/mx7dsabresd/imximage.cfg|2 +-
 board/freescale/s32v234evb/s32v234evb.cfg   |2 +-
 board/freescale/vf610twr/imximage.cfg   |2 +-
 board/phytec/pcm052/imximage.cfg|2 +-
 board/technexion/pico-imx6ul/imximage.cfg   |2 +-
 board/toradex/colibri_imx7/imximage.cfg |2 +-
 board/toradex/colibri_vf/imximage.cfg   |2 +-
 board/warp/imximage.cfg |2 +-
 board/warp7/imximage.cfg|2 +-
 common/Kconfig  |5 +
 configs/dms-ba16-1g_defconfig   |1 +
 configs/dms-ba16_defconfig  |1 +
 configs/ge_b450v3_defconfig |1 +
 configs/ge_b650v3_defconfig |1 +
 configs/ge_b850v3_defconfig |1 +
 configs/imx6qdl_icore_mmc_defconfig |   42 +
 configs/imx6qdl_icore_nand_defconfig|   37 +
 configs/mx25pdk_defconfig   |1 +
 configs/mx53ard_defconfig   |1 +
 configs/pico-imx6ul_defconfig   |1 +
 configs/tqma6q_mba6_mmc_defconfig   |1 +
 configs/tqma6q_mba6_spi_defconfig   |1 +
 configs/tqma6s_mba6_mmc_defconfig   |1 +
 configs/tqma6s_mba6_spi_defconfig   |1 +
 

[U-Boot] [PATCH v7 02/21] thermal: Kconfig: Add IMX_THERMAL entry

[Jagan Teki]

From: Jagan Teki 

Added kconfig for IMX_THERMAL driver.

Cc: Simon Glass 
Cc: Fabio Estevam 
Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 drivers/thermal/Kconfig | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 8e22ea7..f0ffbb3 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -5,3 +5,16 @@ config DM_THERMAL
  temperature sensors to permit warnings, speed throttling or even
  automatic power-off when the temperature gets too high or low. Other
  devices may be discrete but connected on a suitable bus.
+
+if DM_THERMAL
+
+config IMX_THERMAL
+   bool "Temperature sensor driver for Freescale i.MX SoCs"
+   depends on MX6
+   help
+ Support for Temperature Monitor (TEMPMON) found on Freescale i.MX 
SoCs.
+  It supports one critical trip point and one passive trip point.  The
+  cpufreq is used as the cooling device to throttle CPUs when the
+  passive trip is crossed.
+
+endif # if DM_THERMAL
-- 
2.7.4

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[U-Boot] [PATCH v7 01/21] serial: Kconfig: Add MXC_UART entry

[Jagan Teki]

From: Jagan Teki 

Added kconfig for MXC_UART driver.

Cc: Simon Glass 
Cc: Fabio Estevam 
Cc: Stefano Babic 
Cc: Peng Fan 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 drivers/serial/Kconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 541cf2e..317d158 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -309,6 +309,13 @@ config MVEBU_A3700_UART
  Choose this option to add support for UART driver on the Marvell
  Armada 3700 SoC. The base address is configured via DT.
 
+config MXC_UART
+   bool "IMX serial port support"
+   depends on MX6
+   help
+ If you have a machine based on a Motorola IMX CPU you
+ can enable its onboard serial port by enabling this option.
+
 config PIC32_SERIAL
bool "Support for Microchip PIC32 on-chip UART"
depends on DM_SERIAL && MACH_PIC32
-- 
2.7.4

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Re: [U-Boot] Unable to boot from QSPI (u-boot 2016.11-rc1)

[Jagan Teki]

On Fri, Oct 7, 2016 at 6:42 AM, Teoh Choon Zone
 wrote:
> Hi,
>
> Can you elaborate more on which file or function to look at? I am quite new
> to u-boot.

Try to boot with other boot sources(mmc or other) and 'sf probe' the
flash on u-boot. this make sure no issue on with SPI controller or
flash. otherwise need to check with cadence_spi_xfer.

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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[U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12

[Chenhui Zhao]

Save and restore core registers from r4 to r12 so that PSCI code won't
break their value.

Signed-off-by: Chenhui Zhao 
Signed-off-by: Alison Wang 
Signed-off-by: Abhimanyu Saini 
---
 arch/arm/cpu/armv7/psci.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 6a36208..746297c 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -152,7 +152,7 @@ _psci_table:
.word   0
 
 _smc_psci:
-   push{r4-r7,lr}
+   push{r4-r12,lr}
 
@ Switch to secure
mrc p15, 0, r7, c1, c1, 0
@@ -175,7 +175,7 @@ _smc_psci:
@ Switch back to non-secure
 2: mcr p15, 0, r7, c1, c1, 0
 
-   pop {r4-r7, lr}
+   pop {r4-r12, lr}
movspc, lr  @ Return to the kernel
 
 @ Requires dense and single-cluster CPU ID space
-- 
1.9.1

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[U-Boot] [PATCH] cosmetic: Fix indentation in README

[Alexander von Gernler]

Signed-off-by: Alexander von Gernler 
---

 README | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README b/README
index 3682e8c..3d90e3d 100644
--- a/README
+++ b/README
@@ -1659,7 +1659,7 @@ The following options need to be configured:
This will also enable the command "fatwrite" enabling the
user to write files to FAT.
 
-CBFS (Coreboot Filesystem) support
+- CBFS (Coreboot Filesystem) support:
CONFIG_CMD_CBFS
 
Define this to enable support for reading from a Coreboot
-- 
2.9.0

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Re: [U-Boot] [PATCH v3 00/10] mx7: add dt support for Colibri iMX7S/iMX7D

[Stefano Babic]

On 06/10/2016 00:27, Stefan Agner wrote:
> From: Stefan Agner 
> 
> This patchset adds device tree support for Colibri iMX7S/iMX7D.
> It is the first device tree enabled board for any i.MX 7 SoC
> hence the patchset adds some common infrastructure:
> - Add device tree support for serial_mxc.
> - imx7.dtsi - I descided to leave the s/d suffix since the SoCs
>   are very similar and boards will likely use runtime detection
>   to distinguish the two available SoCs.
> - The pinmux file imx7d-pinfunc.h is taken from the Kernel and
>   stored in the same place
> 
> Otherwise the conversion is quite straightforward and simplified
> the board code somewhat. Two patches enhance the board support
> with PMIC support, which has been the driver for this conversion.
> 
> Changes since v2:
> - Drop CONFIG_CUSTOM_BOARDINFO again
> - Add ifdef OF_CONTROL in serial-mxc driver to allow building the
>   driver without OF support
> 

Thanks - I merge the whole series and push to -master.

Regards,
Stefano

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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[U-Boot] [PATCH v2] arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC

[linux-kernel-dev]

From: Patrick Bruenn 

Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.

The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc

Signed-off-by: Patrick Bruenn 

---

Changes in v2:
- remove #include  from mx53cx9020.c
- remove obsolete CONFIG_CMD_CCAT from mx53cx9020.h

 arch/arm/Kconfig |   7 +
 arch/arm/dts/Makefile|   2 +
 arch/arm/dts/imx53-cx9020.dts|  26 ++
 arch/arm/dts/imx53.dtsi  |  41 ++
 board/beckhoff/mx53cx9020/Kconfig|  15 +
 board/beckhoff/mx53cx9020/MAINTAINERS|   6 +
 board/beckhoff/mx53cx9020/Makefile   |   9 +
 board/beckhoff/mx53cx9020/imximage.cfg   |  82 
 board/beckhoff/mx53cx9020/mx53cx9020.c   | 563 +++
 board/beckhoff/mx53cx9020/mx53cx9020_video.c |  83 
 configs/mx53cx9020_defconfig |  19 +
 include/configs/mx53cx9020.h | 208 ++
 12 files changed, 1061 insertions(+)
 create mode 100644 arch/arm/dts/imx53-cx9020.dts
 create mode 100644 arch/arm/dts/imx53.dtsi
 create mode 100644 board/beckhoff/mx53cx9020/Kconfig
 create mode 100644 board/beckhoff/mx53cx9020/MAINTAINERS
 create mode 100644 board/beckhoff/mx53cx9020/Makefile
 create mode 100644 board/beckhoff/mx53cx9020/imximage.cfg
 create mode 100644 board/beckhoff/mx53cx9020/mx53cx9020.c
 create mode 100644 board/beckhoff/mx53cx9020/mx53cx9020_video.c
 create mode 100644 configs/mx53cx9020_defconfig
 create mode 100644 include/configs/mx53cx9020.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f55d5b2..ece610a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -480,6 +480,12 @@ config TARGET_MX53LOCO
bool "Support mx53loco"
select CPU_V7
 
+config TARGET_MX53CX9020
+   bool "Support mx53cx9020"
+   select CPU_V7
+   select DM
+   select DM_SERIAL
+
 config TARGET_MX53SMD
bool "Support mx53smd"
select CPU_V7
@@ -965,6 +971,7 @@ source "board/freescale/mx51evk/Kconfig"
 source "board/freescale/mx53ard/Kconfig"
 source "board/freescale/mx53evk/Kconfig"
 source "board/freescale/mx53loco/Kconfig"
+source "board/beckhoff/mx53cx9020/Kconfig"
 source "board/freescale/mx53smd/Kconfig"
 source "board/freescale/s32v234evb/Kconfig"
 source "board/freescale/vf610twr/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 04d47e7..3f753ba 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -286,6 +286,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6dl-icore.dtb \
imx6q-icore.dtb
 
+dtb-$(CONFIG_TARGET_MX53CX9020) += imx53-cx9020.dtb
+
 dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
k2e-evm.dtb \
diff --git a/arch/arm/dts/imx53-cx9020.dts b/arch/arm/dts/imx53-cx9020.dts
new file mode 100644
index 000..4fc6214
--- /dev/null
+++ b/arch/arm/dts/imx53-cx9020.dts
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2016 Beckhoff Automation
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0+ or X11
+ */
+
+/dts-v1/;
+#include "imx53.dtsi"
+
+/ {
+   model = "Beckhoff CX9020-0100 i.MX53";
+   compatible = "fsl,imx53-qsb", "fsl,imx53";
+
+   chosen {
+   stdout-path = 
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   uart-has-rtscts;
+   fsl,dte-mode;
+   status = "okay";
+};
diff --git a/arch/arm/dts/imx53.dtsi b/arch/arm/dts/imx53.dtsi
new file mode 100644
index 000..3da0765
--- /dev/null
+++ b/arch/arm/dts/imx53.dtsi
@@ -0,0 +1,41 @@
+/*
+ * Copyright 2016 Beckhoff Automation
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+   aliases {
+   serial1 = 
+   };
+
+   soc {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "simple-bus";
+   ranges;
+
+   aips@5000 { /* AIPS1 */
+   compatible = "fsl,aips-bus", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   reg = <0x5000 0x1000>;
+   ranges;
+
+   uart2: serial@53fc {
+   compatible = "fsl,imx7d-uart", 

[U-Boot] Bug: Support for EON NOR SPI is broken

[Champ, Andy]

... or at least I'm pretty sure it is. I'm raising a bug, not fixing it, 
because I don't have an Eon device; I was only looking into this trying to 
understand how the code works.

JEDEC publication #106 contains the manufacturer IDs for JEDEC registered 
devices. They are coded a bit like UTF-8 - there's an extension field, which 
takes you to the next table. If the first ID byte is 0x7f then you look up the 
next byte in the second page. If the second byte too is 0x7f then you look in 
the 3rd table- and so on.

Way back in 2013 (which is why you shouldn't get too excited about this!) 
commit 4d5e29a680fc68f02b069a0780d7c71063219b18 divided the spi_flash into 
multiple parts. Before that change there was this block of code in 
drivers/mtd/spi/spi_flash.c:

-   /* count the number of continuation bytes */
-   for (shift = 0, idp = idcode;
-shift < IDCODE_CONT_LEN && *idp == 0x7f;
-++shift, ++idp)
-   continue;

That searches for the right page. I haven't been able to work out exactly where 
the code got lost - but these days there are a several references to 
CMD_READ_ID in the code base, and none that I can see that search beyond the 
first page.

Given that the second entry in spi_flash_params in sf_params.c is for Eon, that 
could be a problem for someone... not me though. Sorry, I don't have time to 
fix it.

Andy
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Re: [U-Boot] [PATCH 0/6] Add support for the BK4R1 variant of PCM052

[Stefano Babic]

Hi Albert,

On 06/10/2016 15:43, Albert ARIBAUD wrote:

> 
> Hmm... What U-Boot commit do you apply above?

It was on top of v2016.11-rc1, and then I have already applied several
patches for i.MX.

I am very sorry for that: generally, I check the patches in a separate
local branch, but it seemed I made a mistake and I have applied it on my
-master, and after my last push they are already on the server. It was
not my intention. Of course, I will revert them back if you do not like
/ disagree.

> 
>> Is it ok for you if I add directly this by applying ?
> 
> I'll check this and let you know later today.
> 

Thanks !

Stefano



-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] Unable to boot from QSPI (u-boot 2016.11-rc1)

[Teoh Choon Zone]

On Fri, Oct 7, 2016 at 2:11 PM, Anatolij Gustschin  wrote:

> Hi,
>
> On Tue, 4 Oct 2016 15:40:08 +0800
> Teoh Choon Zone choon-zone.t...@vie.com.my wrote:
> ..
> > u-boot from Altera working fine, but I plan to use the mainline u-boot.
> > Any idea why it does not work?
>
> Can you please revert commit dac3bf20 and try again? Does it solve
> the problem?
>
> --
> Anatolij
>

Bingo! By reverting this commit, I could get pass the boot loop. And one
more thing for those who use n25q00 QSPI, if you encounter "### ERROR ###
Please RESET the board ###", remember to add "spi-flash" in your DTS
compatible string.
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[U-Boot] [RFC PATCH] bootm: fix ramdisk relocation

[Cédric Le Goater]

We are working on bringing to mainline a set of changes adding support
for the Aspeed SoC and we have a couple of work around we are trying
to elimitate first. This is one of them. The ramdisk is not relocated
and Linux fails to boot. The current port does not use a device tree
(yet) so that might be the most obvious culprit.

Thanks

Signed-off-by: Cédric Le Goater 
---
 cmd/bootm.c |3 +++
 1 file changed, 3 insertions(+)

Index: u-boot-v2016.09-aspeed-openbmc.git/cmd/bootm.c
===
--- u-boot-v2016.09-aspeed-openbmc.git.orig/cmd/bootm.c
+++ u-boot-v2016.09-aspeed-openbmc.git/cmd/bootm.c
@@ -126,6 +126,9 @@ int do_bootm(cmd_tbl_t *cmdtp, int flag,
return do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START |
BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER |
BOOTM_STATE_LOADOS |
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
+   BOOTM_STATE_RAMDISK |
+#endif
 #if defined(CONFIG_PPC) || defined(CONFIG_MIPS)
BOOTM_STATE_OS_CMDLINE |
 #endif
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Re: [U-Boot] [PATCH v1 0/2] spl: move SPL_OS_BOOT and SYS_OS_BASE to Kconfig

[Heiko Schocher]

Hello Andrew,

Am 06.10.2016 um 18:29 schrieb Andrew F. Davis:

On 10/06/2016 12:55 AM, Heiko Schocher wrote:

This 2 patches move SPL_OS_BOOT and SYS_OS_BASE
to Kconfig. Checked with tbot testcase:
https://github.com/hsdenx/tbot/blob/master/src/tc/uboot/tc_uboot_check_kconfig.py

result:

Boards  : 1213
compile err : 13
not checked : 1
U-Boot good : 1185 bad 14
SPL good: 1199 bad 0

Boards not checked, as they had compile errors:
['adp-ag101p', 'bf533-stamp', 'cm-bf527', 'colibri_pxa270', 'omap4_sdp4430', 
'openrisc-generic', 'qemu-x86_efi_payload64', 'sandbox', 'sandbox_noblk', 
'sandbox_spl', 'smdk5250', 'snow', 'spring']

Boards not checked, as no toolchain:
['xtfpga']

Boards which have differences in the resulting U-Boot bin:
['am335x_baltos', 'am335x_evm_spiboot', 'am335x_igep0033', 'cm_t335', 'cm_t43', 
'cm_t54', 'duovero', 'k2e_evm', 'k2g_evm', 'k2hk_evm', 'k2l_evm', 
'omap3_pandora', 'omap3_zoom1', 'pepper']

I looked into the Boards with differences in the resulting U-Boot bin,
but could not find the reason, why they are different :-(

for example am335x_baltos:

$ make am335x_baltos_defconfig
$ cp .config config_org
$ make mrproper
- applied the 2 patches
$ make am335x_baltos_defconfig
$ diff -pruN config_org .config > gnlmpf
$ cat gnlmpf

--- config_org  2016-10-06 06:58:01.636514195 +0200
+++ .config 2016-10-06 06:58:36.459726538 +0200
@@ -270,6 +270,7 @@ CONFIG_SPL_MTD_SUPPORT=y
  # CONFIG_SPL_NO_CPU_SUPPORT is not set
  # CONFIG_SPL_NOR_SUPPORT is not set
  # CONFIG_SPL_ONENAND_SUPPORT is not set
+# CONFIG_SPL_OS_BOOT is not set
  # CONFIG_SPL_POST_MEM_SUPPORT is not set
  # CONFIG_SPL_SATA_SUPPORT is not set
  # CONFIG_SPL_USBETH_SUPPORT is not set

change in this patchserie for this board:
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index 58df571..e69c1b6 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -54,7 +54,6 @@
  #undef CONFIG_SYS_OMAP24_I2C_SPEED
  #define CONFIG_SYS_OMAP24_I2C_SPEED 1000

-#undef CONFIG_SPL_OS_BOOT
  #ifdef CONFIG_NAND
  #define CONFIG_SYS_NAND_U_BOOT_OFFS0x0008
  #ifdef CONFIG_SPL_OS_BOOT

Seems Ok to me, but I get a different md5sum for the U-Boot bin ...

Or for example the omap3_pandora board:
$ make omap3_pandora_defconfig
$ cp .config config_org
$ make mrproper
- applied the 2 patches
$ make omap3_pandora_defconfig
$ diff -pruN config_org .config > gnlmpf
$ cat gnlmpf
$

No difference in the .config before and after this patch,
but a difference in the resulting binary ... ?

Seems to me SPL_OS_BOOT, which is a SPL config option
has somewhere an influence to the U-Boot binary ...

Any ideas whats going on here?



No idea, all I know is that some config headers with long histories are
full of hacky ifdef tricks and bugs. IMHO the best thing we can do is to
quickly move everything to Kconfig and sort it out then, instead of
battling the config logic in the header files with every change as we go.


Yes, full ack. I do not understand how a SPL config symbol can change the
U-Boot binary! ... all SPL bins have no problem with this move, so I
tend to say, the patch is Ok ...


I will try to help test these changes with the boards I have, but  I
haven't been able to get any of my omap3 boards to boot correctly in a
while :(. I'll see if anyone else here has one working they can test this.


Thanks!


I vote for setting up more "virtual labs" with boards in it, which
we can use for automated testing with tbot [1] and present the results
on a webpage [2] ;-)


bye,
Heiko
[1] https://github.com/hsdenx/tbot
[2] http://xeidos.ddns.net/tests/test_db_auslesen.php


Thanks,
Andrew


Hmm... looking into ".config" after an "make omap3_pandora_defconfig"
There are a lot of CONFIG_SPL symbols defined, but:
  #
  # SPL / TPL
  #
  CONFIG_SUPPORT_SPL=y
  # CONFIG_SPL is not set

This seems bogus to me! SPL support is deactivated, but
a lot of CONFIG_SPL_* symbols are activated! For example
I find in .config:
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y

Does currently the omap3_pandora board boot with
"Prepare v2016.11-rc1" ?



Heiko Schocher (2):
   spl: move SPL_OS_BOOT to Kconfig
   spl: move SYS_OS_BASE to Kconfig

  common/spl/Kconfig   | 18 ++
  configs/a3m071_defconfig |  2 ++
  configs/a4m2k_defconfig  |  1 +
  configs/am335x_boneblack_defconfig   |  3 ++-
  configs/am335x_boneblack_vboot_defconfig |  3 ++-
  configs/am335x_evm_defconfig |  1 +
  configs/am335x_evm_nor_defconfig |  1 +
  configs/am335x_evm_usbspl_defconfig  |  1 +
  configs/am335x_shc_defconfig |  3 ++-
  configs/am335x_shc_ict_defconfig |  3 ++-
  configs/am335x_shc_netboot_defconfig |  3 ++-
  configs/am335x_shc_prompt_defconfig  |  3 ++-
  configs/am335x_shc_sdboot_defconfig  

Re: [U-Boot] [PATCHv2 2/2] armv8/fsl-lsch3: consolidate the clock system initialization

[Z.Q. Hou]

Hi Prabhakar,

> -Original Message-
> From: Prabhakar Kushwaha
> Sent: 2016年10月8日 11:18
> To: Z.Q. Hou ; york sun ;
> u-boot@lists.denx.de; albert.u.b...@aribaud.net; Mingkai Hu
> ; Calvin Johnson 
> Subject: RE: [PATCHv2 2/2] armv8/fsl-lsch3: consolidate the clock system
> initialization
> 
> 
> > -Original Message-
> > From: Z.Q. Hou
> > Sent: Saturday, October 08, 2016 8:23 AM
> > To: york sun ; u-boot@lists.denx.de;
> > albert.u.b...@aribaud.net; Mingkai Hu ; Prabhakar
> > Kushwaha ; Calvin Johnson
> > 
> > Subject: RE: [PATCHv2 2/2] armv8/fsl-lsch3: consolidate the clock
> > system initialization
> >
> > Hi York,
> >
> > Sorry for my delay response since the National Day holidays.
> >
> >
> > > -Original Message-
> > > From: york sun
> > > Sent: 2016年10月6日 0:20
> > > To: Z.Q. Hou ; u-boot@lists.denx.de;
> > > albert.u.b...@aribaud.net; Mingkai Hu ;
> > > Prabhakar Kushwaha ; Calvin Johnson
> > > 
> > > Subject: Re: [PATCHv2 2/2] armv8/fsl-lsch3: consolidate the clock
> > > system initialization
> > >
> > > On 09/26/2016 01:13 AM, Zhiqiang Hou wrote:
> > > > From: Hou Zhiqiang 
> > > >
> > > > This patch map the sys_info->freq_systembus to Platform PLL, and
> > > > implement the IPs' clock function individually.
> > > >
> > > > Signed-off-by: Hou Zhiqiang 
> > > > ---
> > > > V2:
> > > >  - Generate the patch set base on the latest
> > > git://git.denx.de/u-boot-fsl-qoriq.git.
> > > >  - Add Platform clock and IPs' input clock divisors.
> > > >
> > > >  .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 31
> > > > --
> > > > arch/arm/include/asm/arch-fsl-layerscape/config.h  |  8
> > > ++  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  1 +
> > > >  include/configs/ls2080a_common.h   |  2 +-
> > > >  4 files changed, 33 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
> > > > b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
> > > > index a9b12a4..afc8a31 100644
> > > > --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
> > > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
> > > > @@ -88,11 +88,10 @@ void get_sys_info(struct sys_info *sys_info)
> > > > #endif  #endif
> > > >
> > > > +   /* The freq_systembus is used to record frequency of platform
> > > > +PLL */
> > > > sys_info->freq_systembus *= (gur_in32(>rcwsr[0]) >>
> > > > FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_SHIFT) &
> > > > FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_MASK;
> > > > -   /* Platform clock is half of platform PLL */
> > > > -   sys_info->freq_systembus /= 2;
> > > > sys_info->freq_ddrbus *= (gur_in32(>rcwsr[0]) >>
> > > > FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_SHIFT) &
> > > > FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_MASK;
> > > > @@ -132,7 +131,8 @@ void get_sys_info(struct sys_info *sys_info)
> > > > ccr = ifc_in32(_regs.gregs->ifc_ccr);
> > > > ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT)
> +
> > > > 1;
> > > >
> > > > -   sys_info->freq_localbus = sys_info->freq_systembus / ccr;
> > > > +   sys_info->freq_localbus = sys_info->freq_systembus /
> > > > +   CONFIG_SYS_FSL_PCLK_DIV / ccr;
> > > >  #endif
> > > >  }
> > > >
> > >
> > > Zhiqiang and Prabhakar,
> > >
> > > Your patches collide with each other. Can you two work together to
> > > sort it out?
> > >
> > > http://patchwork.ozlabs.org/patch/666849/
> > >
> 
> Following are the patches
> 
> http://patchwork.ozlabs.org/patch/666844/
> http://patchwork.ozlabs.org/patch/666849/
> http://patchwork.ozlabs.org/patch/666848/
> http://patchwork.ozlabs.org/patch/677041/
> 
Nowadays, the CONFIG_* must be added to Kconfig files, when you will upgrade 
your patches to fix it, so I can rebase my patches against yours?

Thanks,
Zhiqiang
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[U-Boot] [PATCH] mmc: introduce mmc_power_init

[Peng Fan]

In device tree, there is vmmc-supply property for SD/MMC.
Introduce mmc_power_init function to handle vmmc-supply.

mmc_power_init will first invoke board_mmc_power_init to
avoid break boards which already implement board_mmc_power_init.

If DM_MMC and DM_REGULATOR is defined, the regulator
will be enabled to power up the device.

Signed-off-by: Peng Fan 
Cc: Jaehoon Chung 
---

The RFC patset thread: 
http://lists.denx.de/pipermail/u-boot/2016-April/251019.html
V1: Use a generic way to handle vmmc supply, but not let vendor driver
to handle it.

 drivers/mmc/mmc.c | 30 +-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 0312da9..c361098 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1582,6 +1583,31 @@ __weak void board_mmc_power_init(void)
 {
 }
 
+int mmc_power_init(struct mmc *mmc)
+{
+   board_mmc_power_init();
+
+#if defined(CONFIG_DM_MMC) && defined(CONFIG_DM_REGULATOR) && \
+   !defined(CONFIG_SPL_BUILD)
+   struct udevice *vmmc_supply;
+   int ret;
+
+   ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
+ _supply);
+   if (ret) {
+   debug("No vmmc supply\n");
+   return 0;
+   }
+
+   ret = regulator_set_enable(vmmc_supply, true);
+   if (ret) {
+   puts("Error enabling VMMC supply\n");
+   return ret;
+   }
+#endif
+   return 0;
+}
+
 int mmc_start_init(struct mmc *mmc)
 {
bool no_card;
@@ -1606,7 +1632,9 @@ int mmc_start_init(struct mmc *mmc)
 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
mmc_adapter_card_type_ident();
 #endif
-   board_mmc_power_init();
+   err = mmc_power_init(mmc);
+   if (err)
+   return err;
 
 #ifdef CONFIG_DM_MMC_OPS
/* The device has already been probed ready for use */
-- 
2.6.2

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[U-Boot] [PATCH] imx: mx6sx: Disable ENET clock before switching clock parent

[Peng Fan]

From: "Ye.Li" 

Need to gate ENET clock when switching to a new clock parent, because
the mux is not glitchless.

Signed-off-by: Peng Fan 
Signed-off-by: Ye.Li 
Cc: Stefano Babic 
---
 arch/arm/cpu/armv7/mx6/clock.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index ae3143c..96fbd81 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -881,6 +881,11 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq 
freq)
writel(reg, >pll_enet);
 
 #ifdef CONFIG_MX6SX
+   /* Disable enet system clcok before switching clock parent */
+   reg = readl(_ccm->CCGR3);
+   reg &= ~MXC_CCM_CCGR3_ENET_MASK;
+   writel(reg, _ccm->CCGR3);
+
/*
 * Set enet ahb clock to 200MHz
 * pll2_pfd2_396m-> ENET_PODF-> ENET_AHB
-- 
2.6.2

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[U-Boot] [PATCH V3 6/8] imx: mx6ullevk: support plugin

[Peng Fan]

Add plugin code for mx6ullevk.
Define CONFIG_USE_IMXIMG_PLUGIN in defconfig file to use plugin code.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---

V3:
 Update commit log

V2:
 None

 board/freescale/mx6ullevk/imximage.cfg |   2 +-
 board/freescale/mx6ullevk/plugin.S | 139 +
 2 files changed, 140 insertions(+), 1 deletion(-)
 create mode 100644 board/freescale/mx6ullevk/plugin.S

diff --git a/board/freescale/mx6ullevk/imximage.cfg 
b/board/freescale/mx6ullevk/imximage.cfg
index 4604b62..1a21b49 100644
--- a/board/freescale/mx6ullevk/imximage.cfg
+++ b/board/freescale/mx6ullevk/imximage.cfg
@@ -29,7 +29,7 @@ BOOT_FROM nor
 BOOT_FROM  sd
 #endif
 
-#ifdef CONFIG_USE_PLUGIN
+#ifdef CONFIG_USE_IMXIMG_PLUGIN
 /*PLUGINplugin-binary-fileIRAM_FREE_START_ADDR*/
 PLUGIN board/freescale/mx6ullevk/plugin.bin 0x00907000
 #else
diff --git a/board/freescale/mx6ullevk/plugin.S 
b/board/freescale/mx6ullevk/plugin.S
new file mode 100644
index 000..65a3c45
--- /dev/null
+++ b/board/freescale/mx6ullevk/plugin.S
@@ -0,0 +1,139 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+/* DDR script */
+.macro imx6ull_ddr3_evk_setting
+   ldr r0, =IOMUXC_BASE_ADDR
+   ldr r1, =0x000C
+   str r1, [r0, #0x4B4]
+   ldr r1, =0x
+   str r1, [r0, #0x4AC]
+   ldr r1, =0x0030
+   str r1, [r0, #0x27C]
+   ldr r1, =0x0030
+   str r1, [r0, #0x250]
+   str r1, [r0, #0x24C]
+   str r1, [r0, #0x490]
+   ldr r1, =0x000C0030
+   str r1, [r0, #0x288]
+
+   ldr r1, =0x
+   str r1, [r0, #0x270]
+
+   ldr r1, =0x0030
+   str r1, [r0, #0x260]
+   str r1, [r0, #0x264]
+   str r1, [r0, #0x4A0]
+
+   ldr r1, =0x0002
+   str r1, [r0, #0x494]
+
+   ldr r1, =0x0030
+   str r1, [r0, #0x280]
+   ldr r1, =0x0030
+   str r1, [r0, #0x284]
+
+   ldr r1, =0x0002
+   str r1, [r0, #0x4B0]
+
+   ldr r1, =0x0030
+   str r1, [r0, #0x498]
+   str r1, [r0, #0x4A4]
+   str r1, [r0, #0x244]
+   str r1, [r0, #0x248]
+
+   ldr r0, =MMDC_P0_BASE_ADDR
+   ldr r1, =0x8000
+   str r1, [r0, #0x1C]
+   ldr r1, =0xA1390003
+   str r1, [r0, #0x800]
+   ldr r1, =0x0004
+   str r1, [r0, #0x80C]
+   ldr r1, =0x41640158
+   str r1, [r0, #0x83C]
+   ldr r1, =0x40403237
+   str r1, [r0, #0x848]
+   ldr r1, =0x40403C33
+   str r1, [r0, #0x850]
+   ldr r1, =0x
+   str r1, [r0, #0x81C]
+   str r1, [r0, #0x820]
+   ldr r1, =0xF333
+   str r1, [r0, #0x82C]
+   str r1, [r0, #0x830]
+   ldr r1, =0x00944009
+   str r1, [r0, #0x8C0]
+   ldr r1, =0x0800
+   str r1, [r0, #0x8B8]
+   ldr r1, =0x0002002D
+   str r1, [r0, #0x004]
+   ldr r1, =0x1B333030
+   str r1, [r0, #0x008]
+   ldr r1, =0x676B52F3
+   str r1, [r0, #0x00C]
+   ldr r1, =0xB66D0B63
+   str r1, [r0, #0x010]
+   ldr r1, =0x01FF00DB
+   str r1, [r0, #0x014]
+   ldr r1, =0x00201740
+   str r1, [r0, #0x018]
+   ldr r1, =0x8000
+   str r1, [r0, #0x01C]
+   ldr r1, =0x26D2
+   str r1, [r0, #0x02C]
+   ldr r1, =0x006B1023
+   str r1, [r0, #0x030]
+   ldr r1, =0x004F
+   str r1, [r0, #0x040]
+   ldr r1, =0x8418
+   str r1, [r0, #0x000]
+   ldr r1, =0x0040
+   str r1, [r0, #0x890]
+   ldr r1, =0x02008032
+   str r1, [r0, #0x01C]
+   ldr r1, =0x8033
+   str r1, [r0, #0x01C]
+   ldr r1, =0x00048031
+   str r1, [r0, #0x01C]
+   ldr r1, =0x15208030
+   str r1, [r0, #0x01C]
+   ldr r1, =0x04008040
+   str r1, [r0, #0x01C]
+   ldr r1, =0x0800
+   str r1, [r0, #0x020]
+   ldr r1, =0x0227
+   str r1, [r0, #0x818]
+   ldr r1, =0x0002552D
+   str r1, [r0, #0x004]
+   ldr r1, =0x00011006
+   str r1, [r0, #0x404]
+   ldr r1, =0x
+   str r1, [r0, #0x01C]
+.endm
+
+.macro imx6_clock_gating
+   ldr r0, =CCM_BASE_ADDR
+   ldr r1, =0x
+   str r1, [r0, #0x68]
+   str r1, [r0, #0x6C]
+   str r1, [r0, #0x70]
+   str r1, [r0, #0x74]
+   str r1, [r0, #0x78]
+   str r1, [r0, #0x7C]
+   str r1, [r0, #0x80]
+.endm
+
+.macro imx6_qos_setting
+.endm
+
+.macro imx6_ddr_setting
+   imx6ull_ddr3_evk_setting
+.endm
+
+/* include the common plugin code here */
+#include 
-- 
2.6.2

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[U-Boot] [PATCH] imx: mx6ull: update the REFTOP_VBGADJ setting

[Peng Fan]

According to design team, we need to set REFTOP_VBGADJ
in PMU MISC0 according to the REFTOP_TRIM[2:0] fuse. the
actually table is as below:

  '000" - set REFTOP_VBGADJ[2:0] to 3'b000
  '001" - set REFTOP_VBGADJ[2:0] to 3'b001
  '010" - set REFTOP_VBGADJ[2:0] to 3'b010
  '011" - set REFTOP_VBGADJ[2:0] to 3'b011
  '100" - set REFTOP_VBGADJ[2:0] to 3'b100
  '101" - set REFTOP_VBGADJ[2:0] to 3'b101
  '110" - set REFTOP_VBGADJ[2:0] to 3'b110
  '111" - set REFTOP_VBGADJ[2:0] to 3'b111

Signed-off-by: Peng Fan 
Signed-off-by: Bai Ping 
---
 arch/arm/cpu/armv7/mx6/soc.c | 31 ++-
 arch/arm/include/asm/arch-mx6/crm_regs.h |  1 +
 2 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 7b53bfd..dd94797 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -300,9 +300,17 @@ static void clear_mmdc_ch_mask(void)
writel(reg, _ccm->ccdr);
 }
 
+#define OCOTP_MEM0_REFTOP_TRIM_SHIFT  8
+
 static void init_bandgap(void)
 {
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+   struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+   struct fuse_bank *bank = >bank[1];
+   struct fuse_bank1_regs *fuse =
+   (struct fuse_bank1_regs *)bank->fuse_regs;
+   uint32_t val;
+
/*
 * Ensure the bandgap has stabilized.
 */
@@ -315,13 +323,26 @@ static void init_bandgap(void)
 */
writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, >ana_misc0_set);
/*
-* On i.MX6ULL, the LDO 1.2V bandgap voltage is 30mV higher. so set
-* VBGADJ bits to 2b'110 to adjust it.
+* On i.MX6ULL,we need to set VBGADJ bits according to the
+* REFTOP_TRIM[3:0] in fuse table
+*  000 - set REFTOP_VBGADJ[2:0] to 3b'110,
+*  110 - set REFTOP_VBGADJ[2:0] to 3b'000,
+*  001 - set REFTOP_VBGADJ[2:0] to 3b'001,
+*  010 - set REFTOP_VBGADJ[2:0] to 3b'010,
+*  011 - set REFTOP_VBGADJ[2:0] to 3b'011,
+*  100 - set REFTOP_VBGADJ[2:0] to 3b'100,
+*  101 - set REFTOP_VBGADJ[2:0] to 3b'101,
+*  111 - set REFTOP_VBGADJ[2:0] to 3b'111,
 */
-   if (is_mx6ull())
-   writel(BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ, 
>ana_misc0_set);
-}
+   if (is_mx6ull()) {
+   val = readl(>mem0);
+   val >>= OCOTP_MEM0_REFTOP_TRIM_SHIFT;
+   val &= 0x7;
 
+   writel(val << BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ_SHIFT,
+  >ana_misc0_set);
+   }
+}
 
 #ifdef CONFIG_MX6SL
 static void set_preclk_from_osc(void)
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h 
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index f74737a..29674ce 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -1272,6 +1272,7 @@ struct mxc_ccm_reg {
 
 #define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x0008
 #define BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ 0x60
+#define BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ_SHIFT 4
 
 #define BM_PMU_MISC2_AUDIO_DIV_MSB (1 << 23)
 #define BP_PMU_MISC2_AUDIO_DIV_MSB 23
-- 
2.6.2

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[U-Boot] [PATCH v7 2/2] armv8: fsl-layerscape: SMP support for loading 32-bit OS

[Alison Wang]

Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.

Signed-off-by: Alison Wang 
Signed-off-by: Chenhui Zhao 
---
Changes in v7:
- Move the call for armv8_switch_to_el2_m into the first patch.

Changes in v6:
- Make secondary_switch_to_el1() always jump to ep when switching to AArch64 or 
AArch32 modes.

Changes in v5:
- Make secondary_switch_to_el2() always jump to ep when switching to AArch64 or 
AArch32 modes.

Changes in v4:
- Omit arch and ftaddr arguments.

Changes in v3:
- Adjust the arguments for armv8_switch_to_el2_m and armv8_switch_to_el1_m. 

Changes in v2:
- Support to call armv8_switch_to_el2_m and armv8_switch_to_el1_m.

 arch/arm/cpu/armv8/fsl-layerscape/mp.c| 10 ++
 arch/arm/include/asm/arch-fsl-layerscape/mp.h |  2 ++
 arch/arm/lib/bootm.c  |  6 ++
 3 files changed, 18 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c 
b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
index df7ffb8..dd91550 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
@@ -22,6 +22,16 @@ phys_addr_t determine_mp_bootpg(void)
return (phys_addr_t)_boot_code;
 }
 
+void update_os_arch_secondary_cores(uint8_t os_arch)
+{
+   u64 *table = get_spin_tbl_addr();
+   int i;
+
+   for (i = 1; i < CONFIG_MAX_CPUS; i++)
+   table[i * WORDS_PER_SPIN_TABLE_ENTRY +
+   SPIN_TABLE_ELEM_OS_ARCH_IDX] = os_arch;
+}
+
 int fsl_layerscape_wake_seconday_cores(void)
 {
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h 
b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
index 14d9fcf..55f0e0c 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
@@ -13,6 +13,7 @@
 *  uint64_t entry_addr;
 *  uint64_t status;
 *  uint64_t lpid;
+*  uint64_t os_arch;
 * };
 * we pad this struct to 64 bytes so each entry is in its own cacheline
 * the actual spin table is an array of these structures
@@ -20,6 +21,7 @@
 #define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX 0
 #define SPIN_TABLE_ELEM_STATUS_IDX 1
 #define SPIN_TABLE_ELEM_LPID_IDX   2
+#define SPIN_TABLE_ELEM_OS_ARCH_IDX3
 #define WORDS_PER_SPIN_TABLE_ENTRY 8   /* pad to 64 bytes */
 #define SPIN_TABLE_ELEM_SIZE   64
 
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 7015573..17758d3 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -270,6 +270,10 @@ bool armv7_boot_nonsec(void)
 #endif
 
 #ifdef CONFIG_ARM64
+__weak void update_os_arch_secondary_cores(uint8_t os_arch)
+{
+}
+
 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
 static void switch_to_el1(void)
 {
@@ -307,6 +311,8 @@ static void boot_jump_linux(bootm_headers_t *images, int 
flag)
if (!fake) {
do_nonsec_virt_switch();
 
+   update_os_arch_secondary_cores(images->os.arch);
+
 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
armv8_switch_to_el2((u64)images->ft_addr, 0, 0,
(u64)switch_to_el1, ES_TO_AARCH64);
-- 
2.1.0.27.g96db324

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Re: [U-Boot] [PATCH] rockchip: enable SPL_OF_PLATDATA for rk3288 board

[陈豪]

In patch "rk3288: config change for enable dram capacity auto-detect",
Kever have use CONFIG_ROCKCHIP_SPL_BACK_TO_BROM to reduce spl size, so
this patch is no longer needed.

2016-09-28 23:46 GMT+08:00 Simon Glass :
> On 28 September 2016 at 00:35, Jacob Chen  wrote:
>> It seems ddr auto detect make SPL image to large.
>> So we have to use SPL_OF_PLATDATA to reduce size.
>>
>> Signed-off-by: Jacob Chen 
>> ---
>>
>>  configs/evb-rk3288_defconfig | 4 
>>  configs/fennec-rk3288_defconfig  | 3 +++
>>  configs/miniarm-rk3288_defconfig | 3 +++
>>  3 files changed, 10 insertions(+)
>
> Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 1/2] rockchip: use rockchip linux partitions layout

[Kever Yang]

Hi Jacob,

On 10/08/2016 01:47 PM, Jacob Chen wrote:

Unify the partitions of each chip then it will be more easy for us to
write scripts, tools or guides for rockchip chips.

Those extra partitions mostly are used to be compatible with our
internal loaders (such as miniloader which was same as spl,  or
android loader then we can support dual boot)

Signed-off-by: Jacob Chen 
---

Changes in v3:
- correct the copyright

Changes in v2:
- put macro in a rockchip_common.h

  include/configs/rk3036_common.h   | 17 +
  include/configs/rk3288_common.h   | 17 +
  include/configs/rk3399_common.h   | 16 ++--
  include/configs/rockchip-common.h | 35 +++
  4 files changed, 39 insertions(+), 46 deletions(-)
  create mode 100644 include/configs/rockchip-common.h

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 73830e4..29d56ff 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -7,6 +7,7 @@
  #define __CONFIG_RK3036_COMMON_H
  
  #include 

+#include "rockchip-common.h"
  
  #define CONFIG_SYS_NO_FLASH

  #define CONFIG_NR_DRAM_BANKS  1
@@ -79,11 +80,6 @@
  #define CONFIG_G_DNL_VENDOR_NUM   0x2207
  #define CONFIG_G_DNL_PRODUCT_NUM  0x310a
  
-/* Enable gpt partition table */

-#define CONFIG_CMD_GPT
-
-#include 
-
  #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x6000\0" \
"pxefile_addr_r=0x6010\0" \
@@ -91,17 +87,6 @@
"kernel_addr_r=0x6200\0" \
"ramdisk_addr_r=0x6400\0"
  
-#define CONFIG_RANDOM_UUID

-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1 */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
  #include 
  
  /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 9ddfe1d..630f218 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -8,6 +8,7 @@
  #define __CONFIG_RK3288_COMMON_H
  
  #include 

+#include "rockchip-common.h"
  
  #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY

  #define CONFIG_SYS_NO_FLASH
@@ -96,11 +97,6 @@
  #define CONFIG_G_DNL_VENDOR_NUM   0x2207
  #define CONFIG_G_DNL_PRODUCT_NUM  0x320a
  
-/* Enable gpt partition table */

-#define CONFIG_CMD_GPT
-
-#include 
-
  #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x\0" \
"pxefile_addr_r=0x0010\0" \
@@ -108,17 +104,6 @@
"kernel_addr_r=0x0200\0" \
"ramdisk_addr_r=0x0400\0"
  
-#define CONFIG_RANDOM_UUID

-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1 */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
  #include 
  
  /* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index b026122..68b9391 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -7,6 +7,8 @@
  #ifndef __CONFIG_RK3399_COMMON_H
  #define __CONFIG_RK3399_COMMON_H
  
+#include "rockchip-common.h"

+
  #define CONFIG_SYS_NO_FLASH
  #define CONFIG_NR_DRAM_BANKS  1
  #define CONFIG_ENV_SIZE   0x2000
@@ -53,7 +55,6 @@
  #define CONFIG_SF_DEFAULT_SPEED 2000
  
  #ifndef CONFIG_SPL_BUILD

-#include 
  
  #define ENV_MEM_LAYOUT_SETTINGS \

"scriptaddr=0x\0" \
@@ -62,19 +63,6 @@
"kernel_addr_r=0x0200\0" \
"ramdisk_addr_r=0x0400\0"
  
-#define CONFIG_CMD_GPT

-#define CONFIG_RANDOM_UUID
-#define CONFIG_PARTITION_UUIDS
-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=16M,size=32M,bootable;" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1) */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
  #include 
  #define CONFIG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \
diff --git a/include/configs/rockchip-common.h 
b/include/configs/rockchip-common.h
new file mode 100644
index 000..7ca1696
--- /dev/null
+++ b/include/configs/rockchip-common.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_COMMON_H_
+#define _ROCKCHIP_COMMON_H_
+#include 
+
+#ifndef CONFIG_SPL_BUILD
+#include 
+
+/* 

[U-Boot] [PATCH] rk3288: kconfig: remove duplicate definition of SPL_MMC_SUPPORT

[Kever Yang]

SPL_MMC_SUPPORT defined in rockchip top level Kconfig instead of
inside rk3288 and default to disable if ROCKCHIP_SPL_BACK_TO_BROM
defined.


Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk3288/Kconfig | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig 
b/arch/arm/mach-rockchip/rk3288/Kconfig
index e30b007..ed8a5a5 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -81,9 +81,6 @@ config SPL_LIBCOMMON_SUPPORT
 config SPL_LIBGENERIC_SUPPORT
default y
 
-config SPL_MMC_SUPPORT
-   default y
-
 config SPL_SERIAL_SUPPORT
default y
 
-- 
1.9.1

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[U-Boot] [PATCH v7 0/2] armv8: Support loading 32-bit OS in AArch32 execution state

[Alison Wang]

This series is to support loading a 32-bit OS, the execution state
will change from AArch64 to AArch32 when jumping to kernel. The
architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.

Spin-table method is used for secondary cores to load 32-bit OS.
The architecture information will be got through checking FIT image
and saved in the os_arch element of spin-table, then the secondary
cores will check os_arch and jump to 32-bit OS or 64-bit OS
automatically.

---
Changes in v7:
- Move the call for armv8_switch_to_el2_m into the first patch.

Changes in v6:
- Modified armv8_switch_to_el1(). It will always jump to ep when switching to 
AArch64 or AArch32 modes.
- Make other platforms compatible with the new armv8_switch_to_el2() and 
armv8_switch_to_el1().
- Make secondary_switch_to_el1() always jump to ep when switching to AArch64 or 
AArch32 modes.

Changes in v5:
- Modified armv8_switch_to_el2(). It will always jump to ep when switching to 
AArch64 or AArch32 modes.
- Make secondary_switch_to_el2() always jump to ep when switching to AArch64 or 
AArch32 modes.

Changes in v4:
- Correct config ARM64_SUPPORT_AARCH32.
- Omit arch and ftaddr arguments.
- Rename "xreg5" to "tmp".
- Use xxx_RES1 to combine all RES1 fields in xxx register.
- Use an immediate cmp directly.
- Use #ifdef for CONFIG_ARM64_SUPPORT_AARCH32.

Changes in v3:
- Comments the functions and the arguments.
- Rename the real parameters.
- Use the macros instead of the magic values.
- Remove the redundant codes.
- Clean up all of the mess in boot_jump_linux().
- Add CONFIG_ARM64_SUPPORT_AARCH32 to detect for some ARM64 system doesn't 
support AArch32 state.
- Adjust the arguments for armv8_switch_to_el2_m and armv8_switch_to_el1_m.

Changes in v2:
- armv8_switch_to_el2_aarch32() is removed. armv8_switch_to_el2_m is used
  to switch to AArch64 EL2 or AArch32 Hyp.
- armv8_switch_to_el1_aarch32() is removed. armv8_switch_to_el1_m is used
  to switch to AArch64 EL1 or AArch32 SVC.
- Support to call armv8_switch_to_el2_m and armv8_switch_to_el1_m.


Alison Wang (2):
  armv8: Support loading 32-bit OS in AArch32 execution state
  armv8: fsl-layerscape: SMP support for loading 32-bit OS

 arch/arm/Kconfig  |   6 +++
 arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S  |  61 +-
 arch/arm/cpu/armv8/fsl-layerscape/mp.c|  10 +
 arch/arm/cpu/armv8/start.S|   8 
 arch/arm/cpu/armv8/transition.S   |   8 ++--
 arch/arm/include/asm/arch-fsl-layerscape/mp.h |   6 +++
 arch/arm/include/asm/macro.h  | 176 
---
 arch/arm/include/asm/system.h | 119 
++-
 arch/arm/lib/bootm.c  |  45 ---
 arch/arm/mach-rmobile/lowlevel_init_gen3.S|   9 +++-
 common/image-fit.c|  19 +++-
 11 files changed, 401 insertions(+), 66 deletions(-)


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Re: [U-Boot] [PATCH v6 0/2] armv8: Support loading 32-bit OS in AArch32 execution state

[Alison Wang]

> -邮件原件-
> 发件人: york sun [mailto:york@nxp.com]
> 发送时间: Thursday, October 06, 2016 3:00 AM
> 收件人: Alison Wang ; ag...@suse.de; Scott Wood
> ; Stuart Yoder ; Leo Li
> ; feng...@phytium.com.cn; linus.wall...@linaro.org;
> ryan.har...@linaro.org; mon...@monstr.eu; thomas...@samsung.com;
> mk7.k...@samsung.com; u-boot@lists.denx.de
> 抄送: Jason Jin 
> 主题: Re: [PATCH v6 0/2] armv8: Support loading 32-bit OS in AArch32
> execution state
> 
> On 09/09/2016 01:56 AM, Alison Wang wrote:
> > This series is to support loading a 32-bit OS, the execution state
> > will change from
> > AArch64 to AArch32 when jumping to kernel. The architecture
> > information will be got through checking FIT image, then U-Boot will
> load 32-bit OS or 64-bit OS automatically.
> >
> > Spin-table method is used for secondary cores to load 32-bit OS. The
> > architecture information will be got through checking FIT image and
> > saved in the os_arch element of spin-table, then the secondary cores
> > will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
> >
> > ---
> > Changes in v6:
> > - Modified armv8_switch_to_el1(). It will always jump to ep when
> switching to AArch64 or AArch32 modes.
> > - Make other platforms compatible with the new armv8_switch_to_el2()
> and armv8_switch_to_el1().
> >
> > Changes in v5:
> > - Modified armv8_switch_to_el2(). It will always jump to ep when
> switching to AArch64 or AArch32 modes.
> > - Make secondary_switch_to_el2() always jump to ep when switching to
> AArch64 or AArch32 modes.
> >
> > Changes in v4:
> > - Correct config ARM64_SUPPORT_AARCH32.
> > - Omit arch and ftaddr arguments.
> > - Rename "xreg5" to "tmp".
> > - Use xxx_RES1 to combine all RES1 fields in xxx register.
> > - Use an immediate cmp directly.
> > - Use #ifdef for CONFIG_ARM64_SUPPORT_AARCH32.
> >
> > Changes in v3:
> > - Comments the functions and the arguments.
> > - Rename the real parameters.
> > - Use the macros instead of the magic values.
> > - Remove the redundant codes.
> > - Clean up all of the mess in boot_jump_linux().
> > - Add CONFIG_ARM64_SUPPORT_AARCH32 to detect for some ARM64 system
> doesn't support AArch32 state.
> > - Adjust the arguments for armv8_switch_to_el2_m and
> armv8_switch_to_el1_m.
> >
> > Changes in v2:
> > - armv8_switch_to_el2_aarch32() is removed. armv8_switch_to_el2_m is
> used
> >   to switch to AArch64 EL2 or AArch32 Hyp.
> > - armv8_switch_to_el1_aarch32() is removed. armv8_switch_to_el1_m is
> used
> >   to switch to AArch64 EL1 or AArch32 SVC.
> > - Support to call armv8_switch_to_el2_m and armv8_switch_to_el1_m.
> >
> > 
> > Alison Wang (2):
> >   armv8: Support loading 32-bit OS in AArch32 execution state
> >   armv8: fsl-layerscape: SMP support for loading 32-bit OS
> 
> Alison,
> 
> The change overall is OK, but the way you split the patches is not. If
> you apply the first patch and then compile, you will see all our armv8
> platforms are broken. You changed the definition of macro
> armv8_switch_to_el2_m in the first patch, but you change the call in
> the second patch.
[Alison Wang] Sorry for the mistake. I will split the patches correctly
in v7.

Thanks.

Best Regards,
Alison Wang
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[U-Boot] [PATCH V3 7/8] imx: mx6ullevk: correct boot device macro

[Peng Fan]

Correct boot device macro according to kconfig entry
in common/Kconfig

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---

V3:
 None

V2:
 None

 board/freescale/mx6ullevk/imximage.cfg | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/freescale/mx6ullevk/imximage.cfg 
b/board/freescale/mx6ullevk/imximage.cfg
index 1a21b49..3c219fa 100644
--- a/board/freescale/mx6ullevk/imximage.cfg
+++ b/board/freescale/mx6ullevk/imximage.cfg
@@ -21,9 +21,9 @@ IMAGE_VERSION 2
  * spi/sd/nand/onenand, qspi/nor
  */
 
-#ifdef CONFIG_SYS_BOOT_QSPI
+#ifdef CONFIG_QSPI_BOOT
 BOOT_FROM  qspi
-#elif defined(CONFIG_SYS_BOOT_EIMNOR)
+#elif defined(CONFIG_NOR_BOOT)
 BOOT_FROM  nor
 #else
 BOOT_FROM  sd
-- 
2.6.2

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