[U-Boot] [PATCH v3] SPL: add support to boot from a partition type
From: Dalon Westergreen
the socfpga bootrom supports mmc booting from either a raw image
starting at 0x0, or from a partition of type 0xa2. This patch
adds support for locating the boot image in the first type 0xa2
partition found.
Assigned a partition number of -1 will cause a search for a
partition of type CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
and use it to find the u-boot image
Signed-off-by: Dalon Westergreen
---
common/spl/Kconfig | 17 +
common/spl/spl_mmc.c | 13 +
disk/part_dos.c | 1 +
include/part.h | 3 +++
4 files changed, 34 insertions(+)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index b2ba492..37e002f 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -96,6 +96,23 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
Address on the MMC to load U-Boot from, when the MMC is being used
in raw mode. Units: MMC sectors (1 sector = 512 bytes).
+config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
+ bool "MMC raw mode: by partition type"
+ depends on SPL && DOS_PARTITION
+ default y if ARCH_SOCFPGA
+ help
+ Use partition type for specifying U-Boot partition on MMC/SD in
+ raw mode. U-Boot will be loaded from the first partition of this
+ type to be found.
+
+config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
+ hex "Partition Type on the MMC to load U-Boot from"
+ depends on SPL && SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
+ default 0xa2
+ help
+ Partition Type on the MMC to load U-Boot from, when the MMC is being
+ used in raw mode.
+
config TPL
bool
depends on SPL && SUPPORT_TPL
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 0cd355c..cce9584 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -157,6 +157,19 @@ static int mmc_load_image_raw_partition(struct
spl_image_info *spl_image,
disk_partition_t info;
int err;
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
+ if ( partition == -1 ) {
+ /* Only support MBR so DOS_ENTRY_NUMBERS */
+ for (partition = 1; partition <= DOS_ENTRY_NUMBERS;
partition++) {
+ err = part_get_info(mmc_get_blk_desc(mmc), partition,
&info);
+ if(err)
+ continue;
+ if(info.sys_ind ==
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE)
+ break;
+ }
+ }
+#endif
+
err = part_get_info(mmc_get_blk_desc(mmc), partition, &info);
if (err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
diff --git a/disk/part_dos.c b/disk/part_dos.c
index c77d881..7ede15e 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -217,6 +217,7 @@ static int part_get_info_extended(struct blk_desc *dev_desc,
#if CONFIG_IS_ENABLED(PARTITION_UUIDS)
sprintf(info->uuid, "%08x-%02x", disksig, part_num);
#endif
+ info->sys_ind = pt->sys_ind;
return 0;
}
diff --git a/include/part.h b/include/part.h
index 9d0e20d..b6d1b33 100644
--- a/include/part.h
+++ b/include/part.h
@@ -59,6 +59,9 @@ typedef struct disk_partition {
#ifdef CONFIG_PARTITION_TYPE_GUID
chartype_guid[37]; /* type GUID as string, if exists */
#endif
+#ifdef CONFIG_DOS_PARTITION
+ uchar sys_ind;/* partition type */
+#endif
} disk_partition_t;
/* Misc _get_dev functions */
--
2.7.4
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[U-Boot] [PATCH v3] SPL: add support to boot from a partition type
From: Dalon Westergreen Changes in V3: - Add depends on DOS_PARTITION - Ensure that PARTTION_TYPE defaults to non-zero - Add ifdef around sys_ind in disk_partition structure Changes in V2: - Merge partition search into single partition function Dalon Westergreen (1): SPL: add support to boot from a partition type common/spl/Kconfig | 17 + common/spl/spl_mmc.c | 13 + disk/part_dos.c | 1 + include/part.h | 3 +++ 4 files changed, 34 insertions(+) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] SPL: add support to boot from a partition type
On 31/01/2017 09:41, Dalon Westergreen wrote: From: Dalon Westergreen Changes in V3: - Add depends on DOS_PARTITION - Ensure that PARTTION_TYPE defaults to non-zero - Add ifdef around sys_ind in disk_partition structure Changes in V2: - Merge partition search into single partition function Dalon Westergreen (1): SPL: add support to boot from a partition type If your patch set only consists of a single patch, please just drop the cover letter. Instead, send that patch stand-alone. Alex ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/5][v7] arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
Enable IFC from Kconfig. Signed-off-by: Prabhakar Kushwaha --- Changes for v5: Added first time Changes for v6: Sending as it is Changes for v7: Sending as it is arch/powerpc/cpu/mpc85xx/Kconfig | 17 + include/configs/B4860QDS.h | 1 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/T102xQDS.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/t4qds.h | 1 - 14 files changed, 17 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 38ea4c1..a3db014 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -374,6 +374,7 @@ config ARCH_B4420 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_B4860 bool @@ -398,6 +399,7 @@ config ARCH_B4860 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_BSC9131 bool @@ -410,6 +412,7 @@ config ARCH_BSC9131 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_IFC config ARCH_BSC9132 bool @@ -426,6 +429,7 @@ config ARCH_BSC9132 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_C29X bool @@ -438,6 +442,7 @@ config ARCH_C29X select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_6 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_MPC8536 bool @@ -553,6 +558,7 @@ config ARCH_P1010 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_P1011 bool @@ -795,6 +801,7 @@ config ARCH_T1023 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1024 bool @@ -811,6 +818,7 @@ config ARCH_T1024 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1040 bool @@ -828,6 +836,7 @@ config ARCH_T1040 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1042 bool @@ -845,6 +854,7 @@ config ARCH_T1042 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T2080 bool @@ -866,6 +876,7 @@ config ARCH_T2080 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T2081 bool @@ -885,6 +896,7 @@ config ARCH_T2081 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T4160 bool @@ -905,6 +917,7 @@ config ARCH_T4160 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T4240 bool @@ -928,6 +941,7 @@ config ARCH_T4240 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config BOOKE bool @@ -1260,6 +1274,9 @@ config SYS_PPC64 config SYS_PPC_E500_USE_DEBUG_TLB bool +config FSL_IFC + bool + config SYS_PPC_E500_DEBUG_TLB int "Temporary TLB entry for external debugger" depends on SYS_PPC_E500_USE_DEBUG_TLB diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index fc99b96..2fdb869 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -63,7 +63,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM/* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT/* Use common FSL init code */ diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 77f0927..4116234 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -46,7 +46,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM/* Enable SEC/CAAM */ #define CONFIG_TSEC_ENET diff --git a/include/configs/BSC9132QDS
[U-Boot] [PATCH 4/5][v7] arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
Enable ELBC from Kconfig. Signed-off-by: Prabhakar Kushwaha --- Changes for v5: Added first time in the patch set Changes for v6: Sending as it is Changes for v7: Fix compiliation error arch/powerpc/cpu/mpc85xx/Kconfig| 20 include/configs/MPC8536DS.h | 1 - include/configs/MPC8569MDS.h| 2 -- include/configs/MPC8572DS.h | 1 - include/configs/P1022DS.h | 1 - include/configs/P1023RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/UCP1020.h | 1 - include/configs/controlcenterd.h| 1 - include/configs/corenet_ds.h| 1 - include/configs/cyrus.h | 1 - include/configs/ids8313.h | 2 -- include/configs/km/kmp204x-common.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p1_twr.h| 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - 17 files changed, 20 insertions(+), 18 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 83df733..c06a4db 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -455,6 +455,7 @@ config ARCH_MPC8536 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8540 bool @@ -478,6 +479,7 @@ config ARCH_MPC8544 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8548 bool @@ -524,6 +526,7 @@ config ARCH_MPC8569 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 + select FSL_ELBC config ARCH_MPC8572 bool @@ -538,6 +541,7 @@ config ARCH_MPC8572 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1010 bool @@ -572,6 +576,7 @@ config ARCH_P1011 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1020 bool @@ -585,6 +590,7 @@ config ARCH_P1020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1021 bool @@ -598,6 +604,7 @@ config ARCH_P1021 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1022 bool @@ -613,6 +620,7 @@ config ARCH_P1022 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1023 bool @@ -624,6 +632,7 @@ config ARCH_P1023 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P1024 bool @@ -637,6 +646,7 @@ config ARCH_P1024 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1025 bool @@ -650,6 +660,7 @@ config ARCH_P1025 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P2020 bool @@ -664,6 +675,7 @@ config ARCH_P2020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P2041 bool @@ -685,6 +697,7 @@ config ARCH_P2041 select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P3041 bool @@ -708,6 +721,7 @@ config ARCH_P3041 select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P4080 bool @@ -742,6 +756,7 @@ config ARCH_P4080 select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P5020 bool @@ -762,6 +777,7 @@ config ARCH_P5020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_ELBC config ARCH_P5040 bool @@ -782,6 +798,7 @@ config ARCH_P5040 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_ELBC config ARCH_QEMU_E500 bool @@ -1277,6 +1294,9 @@ config SYS_PPC_E500_USE_DEBUG_TLB config FSL_IFC bool +config FSL_ELBC + bool + config SYS_PPC_E500_DEBUG_TLB int "Temporary TLB entry for external debugger" depends on SYS_PPC_E500_USE_DEBUG_TLB diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index bc703ce..2267771 100644 --- a/include/configs/MPC85
[U-Boot] [PATCH 5/5][v7] arch: powerpc: update the eLBC IP input clock
eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output cloc.
Update sys_info->freq_localbus to represent eLBC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v5: Added first time in patch
Changes for v6: Updated subject description
Changes for v7: Fix compilation warning and updated Kconfig eLBC comparision
README | 3 +++
arch/powerpc/cpu/mpc85xx/Kconfig | 18 ++
arch/powerpc/cpu/mpc85xx/speed.c | 28 ++--
arch/powerpc/cpu/mpc86xx/speed.c | 15 +--
4 files changed, 24 insertions(+), 40 deletions(-)
diff --git a/README b/README
index 9fda381..b27e757 100644
--- a/README
+++ b/README
@@ -507,6 +507,9 @@ The following options need to be configured:
CONFIG_SYS_FSL_IFC_CLK_DIV
Defines divider of platform clock(clock input to IFC
controller).
+ CONFIG_SYS_FSL_LBC_CLK_DIV
+ Defines divider of platform clock(clock input to eLBC
controller).
+
CONFIG_SYS_FSL_PBL_PBI
It enables addition of RCW (Power on reset configuration) in
built image.
Please refer doc/README.pblimage for more details
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index c06a4db..592b581 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -1337,6 +1337,24 @@ config SYS_FSL_IFC_CLK_DIV
Defines divider of platform clock(clock input to
IFC controller).
+config SYS_FSL_LBC_CLK_DIV
+ int "Divider of platform clock"
+ depends on FSL_ELBC || ARCH_MPC8540 || \
+ ARCH_MPC8548 || ARCH_MPC8541 || \
+ ARCH_MPC8555 || ARCH_MPC8560 || \
+ ARCH_MPC8568
+
+ default 2 ifARCH_P2041 || \
+ ARCH_P3041 || \
+ ARCH_P4080 || \
+ ARCH_P5020 || \
+ ARCH_P5040
+ default 1
+
+ help
+ Defines divider of platform clock(clock input to
+ eLBC controller).
+
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index adba092..cb8281e 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -607,32 +607,8 @@ void get_sys_info(sys_info_t *sys_info)
#endif /* CONFIG_FSL_CORENET */
#if defined(CONFIG_FSL_LBC)
- uint lcrr_div;
-#if defined(CONFIG_SYS_LBC_LCRR)
- /* We will program LCRR to this value later */
- lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV;
-#else
- lcrr_div = in_be32(&(LBC_BASE_ADDR)->lcrr) & LCRR_CLKDIV;
-#endif
- if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
-#if defined(CONFIG_FSL_CORENET)
- /* If this is corenet based SoC, bit-representation
-* for four times the clock divider values.
-*/
- lcrr_div *= 4;
-#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \
- !defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_ARCH_MPC8560)
- /*
-* Yes, the entire PQ38 family use the same
-* bit-representation for twice the clock divider values.
-*/
- lcrr_div *= 2;
-#endif
- sys_info->freq_localbus = sys_info->freq_systembus / lcrr_div;
- } else {
- /* In case anyone cares what the unknown value is */
- sys_info->freq_localbus = lcrr_div;
- }
+ sys_info->freq_localbus = sys_info->freq_systembus /
+ CONFIG_SYS_FSL_LBC_CLK_DIV;
#endif
#if defined(CONFIG_FSL_IFC)
diff --git a/arch/powerpc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c
index 05f23db..51b47b8 100644
--- a/arch/powerpc/cpu/mpc86xx/speed.c
+++ b/arch/powerpc/cpu/mpc86xx/speed.c
@@ -24,7 +24,6 @@ void get_sys_info(sys_info_t *sys_info)
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
uint plat_ratio, e600_ratio;
- uint lcrr_div;
plat_ratio = (gur->porpllsr) & 0x003e;
plat_ratio >>= 1;
@@ -78,19 +77,7 @@ void get_sys_info(sys_info_t *sys_info)
break;
}
-#if defined(CONFIG_SYS_LBC_LCRR)
- /* We will program LCRR to this value later */
- lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV;
-#else
- lcrr_div = in_be32(&immap->im_lbc.lcrr) & LCRR_CLKDIV;
-#endif
- if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
- sys_info->freq_localbus = sys_info->freq_systembus
-
[U-Boot] [PATCH 3/5][v7] arch: arm: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Split the patch in 2 patch set
Changes for v3: Rebased on top of u-boot commit
Changes for v4: Sending as it is
Changes for v5: Sending as it is
Changes for v6: Subject updated
Changes for v7: Sending as it is
arch/arm/cpu/armv7/ls102xa/clock.c | 9 +
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 10 ++
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 10 ++
3 files changed, 5 insertions(+), 24 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c
b/arch/arm/cpu/armv7/ls102xa/clock.c
index 7a337e1..b7d61ad 100644
--- a/arch/arm/cpu/armv7/ls102xa/clock.c
+++ b/arch/arm/cpu/armv7/ls102xa/clock.c
@@ -19,10 +19,6 @@ DECLARE_GLOBAL_DATA_PTR;
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
-#ifdef CONFIG_FSL_IFC
- struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
- u32 ccr;
-#endif
struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_LS1_CLK_ADDR);
unsigned int cpu;
const u8 core_cplx_pll[6] = {
@@ -74,10 +70,7 @@ void get_sys_info(struct sys_info *sys_info)
}
#if defined(CONFIG_FSL_IFC)
- ccr = in_be32(&ifc_regs.gregs->ifc_ccr);
- ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
-
- sys_info->freq_localbus = sys_info->freq_systembus / ccr;
+ sys_info->freq_localbus = sys_info->freq_systembus;
#endif
}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 3da7037..2d7775e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -22,10 +22,6 @@ DECLARE_GLOBAL_DATA_PTR;
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
-#ifdef CONFIG_FSL_IFC
- struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
- u32 ccr;
-#endif
#if (defined(CONFIG_FSL_ESDHC) &&\
defined(CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK)) ||\
defined(CONFIG_SYS_DPAA_FMAN)
@@ -156,10 +152,8 @@ void get_sys_info(struct sys_info *sys_info)
#endif
#if defined(CONFIG_FSL_IFC)
- ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
- ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
-
- sys_info->freq_localbus = sys_info->freq_systembus / ccr;
+ sys_info->freq_localbus = sys_info->freq_systembus /
+ CONFIG_SYS_FSL_IFC_CLK_DIV;
#endif
}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index f8fefc7..ab46431 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -26,10 +26,6 @@ DECLARE_GLOBAL_DATA_PTR;
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
-#ifdef CONFIG_FSL_IFC
- struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
- u32 ccr;
-#endif
struct ccsr_clk_cluster_group __iomem *clk_grp[2] = {
(void *)(CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR),
(void *)(CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR)
@@ -128,10 +124,8 @@ void get_sys_info(struct sys_info *sys_info)
}
#if defined(CONFIG_FSL_IFC)
- ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
- ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
-
- sys_info->freq_localbus = sys_info->freq_systembus / ccr;
+ sys_info->freq_localbus = sys_info->freq_systembus /
+ CONFIG_SYS_FSL_IFC_CLK_DIV;
#endif
}
--
2.7.4
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[U-Boot] [PATCH 2/5][v7] arch: powerpc: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Split the patch in 2 patch set
Changes for v3: Rebased on top of u-boot commit
Changes for v4: fix compilation error
Changes for v5: Adding FSL_IFC as dependency
Changes for v6: Updated subject description
Changes for v7: Sending as it is
README | 3 +++
arch/powerpc/cpu/mpc85xx/Kconfig | 16
arch/powerpc/cpu/mpc85xx/speed.c | 10 ++
3 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/README b/README
index a95348a..9fda381 100644
--- a/README
+++ b/README
@@ -504,6 +504,9 @@ The following options need to be configured:
CONFIG_SYS_FSL_IFC_LE
Defines the IFC controller register space as Little Endian
+ CONFIG_SYS_FSL_IFC_CLK_DIV
+ Defines divider of platform clock(clock input to IFC
controller).
+
CONFIG_SYS_FSL_PBL_PBI
It enables addition of RCW (Power on reset configuration) in
built image.
Please refer doc/README.pblimage for more details
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index a3db014..83df733 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -1301,6 +1301,22 @@ config SYS_PPC_E500_DEBUG_TLB
symbol should be set to the TLB1 entry to be used for this
purpose. If unsure, do not change.
+config SYS_FSL_IFC_CLK_DIV
+ int "Divider of platform clock"
+ depends on FSL_IFC
+ default 2 ifARCH_B4420 || \
+ ARCH_B4860 || \
+ ARCH_T1024 || \
+ ARCH_T1023 || \
+ ARCH_T1040 || \
+ ARCH_T1042 || \
+ ARCH_T4160 || \
+ ARCH_T4240
+ default 1
+ help
+ Defines divider of platform clock(clock input to
+ IFC controller).
+
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index fcf5d92..adba092 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -27,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
void get_sys_info(sys_info_t *sys_info)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-#ifdef CONFIG_FSL_IFC
- struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
- u32 ccr;
-#endif
#ifdef CONFIG_FSL_CORENET
volatile ccsr_clk_t *clk = (void *)(CONFIG_SYS_FSL_CORENET_CLK_ADDR);
unsigned int cpu;
@@ -640,10 +636,8 @@ void get_sys_info(sys_info_t *sys_info)
#endif
#if defined(CONFIG_FSL_IFC)
- ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
- ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
-
- sys_info->freq_localbus = sys_info->freq_systembus / ccr;
+ sys_info->freq_localbus = sys_info->freq_systembus /
+ CONFIG_SYS_FSL_IFC_CLK_DIV;
#endif
}
--
2.7.4
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Re: [U-Boot] [PATCH v3] SPL: add support to boot from a partition type
On 31/01/2017 09:41, Dalon Westergreen wrote:
From: Dalon Westergreen
the socfpga bootrom supports mmc booting from either a raw image
starting at 0x0, or from a partition of type 0xa2. This patch
adds support for locating the boot image in the first type 0xa2
partition found.
Assigned a partition number of -1 will cause a search for a
partition of type CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
and use it to find the u-boot image
Signed-off-by: Dalon Westergreen
For reviewing, it makes life much easier if the change log is also
present in the individual patches of a patch set. In this case - since
it's only one patch - only in the patch set.
The best way to do that in git is to just write a
--
line after your Signed-Off-By line and put the change log there. When
the patch then gets applied with git am later, git will drop everything
below the -- line. However, during git rebase and git commit --amend,
the -- line does not have any effect, so you can easily keep the change
log inside the patch itself.
---
common/spl/Kconfig | 17 +
common/spl/spl_mmc.c | 13 +
disk/part_dos.c | 1 +
include/part.h | 3 +++
4 files changed, 34 insertions(+)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index b2ba492..37e002f 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -96,6 +96,23 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
Address on the MMC to load U-Boot from, when the MMC is being used
in raw mode. Units: MMC sectors (1 sector = 512 bytes).
+config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
+ bool "MMC raw mode: by partition type"
+ depends on SPL && DOS_PARTITION
+ default y if ARCH_SOCFPGA
+ help
+ Use partition type for specifying U-Boot partition on MMC/SD in
+ raw mode. U-Boot will be loaded from the first partition of this
+ type to be found.
+
+config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
+ hex "Partition Type on the MMC to load U-Boot from"
+ depends on SPL && SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
+ default 0xa2
+ help
+ Partition Type on the MMC to load U-Boot from, when the MMC is being
+ used in raw mode.
+
config TPL
bool
depends on SPL && SUPPORT_TPL
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 0cd355c..cce9584 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -157,6 +157,19 @@ static int mmc_load_image_raw_partition(struct
spl_image_info *spl_image,
disk_partition_t info;
int err;
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
+ if ( partition == -1 ) {
This means you need to explicitly define
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to -1 for every board that
wants to use this feature, right? The only caller of this function I
could find is:
err = mmc_load_image_raw_partition(spl_image, mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
which means you're now making those two features mutually exclusive. Why
not drop the whole partition == -1 check? In that case you would first
search for a partition type, if that's not available fall back to a
static partition number.
+ /* Only support MBR so DOS_ENTRY_NUMBERS */
+ for (partition = 1; partition <= DOS_ENTRY_NUMBERS;
partition++) {
+ err = part_get_info(mmc_get_blk_desc(mmc), partition,
&info);
+ if(err)
+ continue;
+ if(info.sys_ind ==
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE)
+ break;
+ }
+ }
+#endif
+
err = part_get_info(mmc_get_blk_desc(mmc), partition, &info);
if (err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
below here is the fallback case when
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION is not set. Since that is not
a Kconfig option you can not depend on it inside Kconfig.
Ideally, you would convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to
Kconfig as well so you can depend on it :). Sorry for making you dig so
deeply.
The rest looks very good to me :). Thanks a lot!
Alex
diff --git a/disk/part_dos.c b/disk/part_dos.c
index c77d881..7ede15e 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -217,6 +217,7 @@ static int part_get_info_extended(struct blk_desc *dev_desc,
#if CONFIG_IS_ENABLED(PARTITION_UUIDS)
sprintf(info->uuid, "%08x-%02x", disksig, part_num);
#endif
+ info->sys_ind = pt->sys_ind;
return 0;
}
diff --git a/include/part.h b/include/part.h
index 9d0e20d..b6d1b33 100644
--- a/include/part.h
+++ b/include/part.h
@@ -59,6 +59,9 @@ typedef struct disk_partition {
#ifdef CONFIG_PARTITION_TYPE_GUID
chartype_guid[37]; /* type GUID as string, if exists */
#endif
+#ifdef CO
[U-Boot] [PATCH] kbuild: beautify the log of config whitelist check
Use the kbuild style log.
Prior to this commit:
./scripts/check-config.sh u-boot.cfg \
./scripts/config_whitelist.txt . 1>&2
With this commit:
CFGCHK u-boot.cfg
Signed-off-by: Masahiro Yamada
---
Makefile| 7 +--
scripts/check-config.sh | 12 ++--
2 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/Makefile b/Makefile
index 4e7f7cf..c4fc6d2 100644
--- a/Makefile
+++ b/Makefile
@@ -836,6 +836,10 @@ cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
cfg: u-boot.cfg
+quiet_cmd_cfgcheck = CFGCHK $2
+cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \
+ $(srctree)/scripts/config_whitelist.txt $(srctree)
+
all: $(ALL-y)
ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y)
@echo "= WARNING =="
@@ -847,8 +851,7 @@ endif
@# Check that this build does not use CONFIG options that we do not
@# know about unless they are in Kconfig. All the existing CONFIG
@# options are whitelisted, so new ones should not be added.
- $(srctree)/scripts/check-config.sh u-boot.cfg \
- $(srctree)/scripts/config_whitelist.txt ${srctree} 1>&2
+ $(call cmd,cfgcheck,u-boot.cfg)
PHONY += dtbs
dtbs: dts/dt.dtb
diff --git a/scripts/check-config.sh b/scripts/check-config.sh
index 6618dfb..97e52dc 100755
--- a/scripts/check-config.sh
+++ b/scripts/check-config.sh
@@ -37,12 +37,12 @@ cat `find ${srctree} -name "Kconfig*"` |sed -n \
-e 's/^menuconfig \([A-Za-z0-9_]*\).*$/CONFIG_\1/p' |sort |uniq > ${ok}
comm -23 ${suspects} ${ok} >${new_adhoc}
if [ -s ${new_adhoc} ]; then
- echo "Error: You must add new CONFIG options using Kconfig"
- echo "The following new ad-hoc CONFIG options were detected:"
- cat ${new_adhoc}
- echo
- echo "Please add these via Kconfig instead. Find a suitable Kconfig"
- echo "file and add a 'config' or 'menuconfig' option."
+ echo >&2 "Error: You must add new CONFIG options using Kconfig"
+ echo >&2 "The following new ad-hoc CONFIG options were detected:"
+ cat >&2 ${new_adhoc}
+ echo >&2
+ echo >&2 "Please add these via Kconfig instead. Find a suitable Kconfig"
+ echo >&2 "file and add a 'config' or 'menuconfig' option."
# Don't delete the temporary files in case they are useful
exit 1
else
--
2.7.4
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[U-Boot] [PATCH v4 0/5] Add FreeBSD kconfig options
This series of patches add the needed bits for booting the FreeBSD loader and kernel. FreeBSD loader and kernel needs the U-Boot API and dcache/icache flushed for it to run so add this operation in go/bootelf command and when closing the API. Also add some some boot command that locate and run the FreeBSD loader if found. Changes in v4: Convert boards to CONFIG_API Change commit log for patch 3 to be not FreeBSD specific and add Reviewed-By Change patch order. Changes in v3: Always flush icache/dcache if enabled for bootelf/go commands Correct some typos Point to api/README in the help of Kconfig API Changes in v2: Remove SYS_DCACHE_OFF option Flush dcache/icache in go/boot command Flush dcache/icache in API closedev Emmanuel Vadot (4): kconfig: Add API kconfig file api: Convert to Kconfig distro_bootcmd: Add command to run FreeBSD kconfig: Add a DISTRO_FREEBSD option Warner Losh (1): api: bootelf: go: flush cache before starting Kconfig | 2 ++ api/Kconfig | 9 + api/api.c | 5 + cmd/boot.c | 4 cmd/elf.c | 5 + common/Kconfig | 11 +++ configs/PMC440_defconfig| 1 + configs/lsxhl_defconfig | 1 + include/config_distro_bootcmd.h | 32 include/configs/PMC440.h| 2 -- include/configs/lsxl.h | 5 - scripts/config_whitelist.txt| 1 - 12 files changed, 70 insertions(+), 8 deletions(-) create mode 100644 api/Kconfig -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 2/5] api: Convert to Kconfig
Now that we have a Kconfig for the API, convert the two boards that are using this to Kconfig and remove CONFIG_API from the whitelist. Signed-off-by: Emmanuel Vadot --- configs/PMC440_defconfig | 1 + configs/lsxhl_defconfig | 1 + include/configs/PMC440.h | 2 -- include/configs/lsxl.h | 5 - scripts/config_whitelist.txt | 1 - 5 files changed, 2 insertions(+), 8 deletions(-) diff --git a/configs/PMC440_defconfig b/configs/PMC440_defconfig index 0bcc5866af..7380ba7b21 100644 --- a/configs/PMC440_defconfig +++ b/configs/PMC440_defconfig @@ -24,3 +24,4 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y +CONFIG_API=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 75bd46da2f..4d974f1e16 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -23,3 +23,4 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y +CONFIG_API=y diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 5ea82f8e4d..59ba79e43b 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -385,6 +385,4 @@ #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #endif -#define CONFIG_API 1 - #endif /* __CONFIG_H */ diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 7ec82cd4bb..ad1adcec8c 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -38,11 +38,6 @@ #define CONFIG_SYS_NO_FLASH /* - * Enable u-boot API for standalone programs. - */ -#define CONFIG_API - -/* * Commands configuration */ #define CONFIG_CMD_ENV diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 37ce51a77f..0019ac72aa 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -102,7 +102,6 @@ CONFIG_APBH_DMA_BURST8 CONFIG_APER_0_BASE CONFIG_APER_1_BASE CONFIG_APER_SIZE -CONFIG_API CONFIG_APUS_FAST_EXCEPT CONFIG_AP_SH4A_4A CONFIG_ARCH_ADPAG101P -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 4/5] distro_bootcmd: Add command to run FreeBSD
Add commands that scans for the FreeBSD loader and run it if found.
FreeBSD has two loader: ubldr which is an ELF binary and ubldr.bin which
is a PIE binary.
Signed-off-by: Emmanuel Vadot
---
include/config_distro_bootcmd.h | 32
1 file changed, 32 insertions(+)
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 0e01e8240d..2d8e99d24e 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -149,6 +149,36 @@
#define SCAN_DEV_FOR_EFI
#endif
+#ifdef CONFIG_DISTRO_FREEBSD
+#define BOOTENV_SHARED_FREEBSD\
+ "boot_freebsd_binary="\
+ "load ${devtype} ${devnum}:${distro_bootpart} " \
+ "${kernel_addr_r} ubldr.bin; "\
+ "go ${kernel_addr_r}\0" \
+ \
+ "boot_freebsd_elf=" \
+ "load ${devtype} ${devnum}:${distro_bootpart} " \
+ "${kernel_addr_r} ubldr; "\
+ "bootelf ${kernel_addr_r}\0" \
+ \
+ "scan_dev_for_freebsd=" \
+ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \
+ "ubldr.bin; then "\
+ "echo Found FreeBSD U-Boot Loader (bin);" \
+ "run boot_freebsd_binary; " \
+ "echo FREEBSD FAILED: continuing...; "\
+ "elif test -e ${devtype} ${devnum}:${distro_bootpart} " \
+ "ubldr; then "\
+ "echo Found FreeBSD U-Boot Loader (elf);" \
+ "run boot_freebsd_elf; " \
+ "echo FREEBSD FAILED: continuing...; "\
+ "fi;\0"
+#define SCAN_DEV_FOR_FREEBSD "run scan_dev_for_freebsd;"
+#else
+#define BOOTENV_SHARED_FREEBSD
+#define SCAN_DEV_FOR_FREEBSD
+#endif
+
#ifdef CONFIG_CMD_SATA
#define BOOTENV_SHARED_SATABOOTENV_SHARED_BLKDEV(sata)
#define BOOTENV_DEV_SATA BOOTENV_DEV_BLKDEV
@@ -322,6 +352,7 @@
BOOTENV_SHARED_IDE \
BOOTENV_SHARED_UBIFS \
BOOTENV_SHARED_EFI \
+ BOOTENV_SHARED_FREEBSD \
"boot_prefixes=/ /boot/\0" \
"boot_scripts=boot.scr.uimg boot.scr\0" \
"boot_script_dhcp=boot.scr.uimg\0" \
@@ -365,6 +396,7 @@
"run scan_dev_for_scripts; " \
"done;" \
SCAN_DEV_FOR_EFI \
+ SCAN_DEV_FOR_FREEBSD \
"\0" \
\
"scan_dev_for_boot_part=" \
--
2.11.0
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[U-Boot] [PATCH v4 3/5] api: bootelf: go: flush cache before starting
From: Warner Losh
Some application might load some code at location that contain stale
cache entries. Before running a elf or raw binary, flush the caches
if they are enabled.
Reviewed-by: Tom Rini
Signed-off-by: Emmanuel Vadot
---
api/api.c | 5 +
cmd/boot.c | 4
cmd/elf.c | 5 +
3 files changed, 14 insertions(+)
diff --git a/api/api.c b/api/api.c
index c368511704..88b5df77c0 100644
--- a/api/api.c
+++ b/api/api.c
@@ -290,6 +290,11 @@ static int API_dev_close(va_list ap)
if (!err)
di->state = DEV_STA_CLOSED;
+ if (dcache_status())
+ flush_dcache_all();
+ if (icache_status())
+ invalidate_icache_all();
+
return err;
}
diff --git a/cmd/boot.c b/cmd/boot.c
index 72f2cf362d..b66ae67fcb 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -19,6 +19,10 @@ __attribute__((weak))
unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
char * const argv[])
{
+ if (dcache_status())
+ flush_dcache_all();
+ if (icache_status())
+ invalidate_icache_all();
return entry (argc, argv);
}
diff --git a/cmd/elf.c b/cmd/elf.c
index e4c6535111..e98a798203 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -109,6 +109,11 @@ static unsigned long do_bootelf_exec(ulong (*entry)(int,
char * const[]),
{
unsigned long ret;
+ if (dcache_status())
+ flush_dcache_all();
+ if (icache_status())
+ invalidate_icache_all();
+
/*
* pass address parameter as argv[0] (aka command name),
* and all remaining args
--
2.11.0
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[U-Boot] [PATCH v4 5/5] kconfig: Add a DISTRO_FREEBSD option
Add a FreeBSD option that enables the API and the data cache command as both are needed to boot the FreeBSD loader. Signed-off-by: Emmanuel Vadot --- common/Kconfig | 11 +++ 1 file changed, 11 insertions(+) diff --git a/common/Kconfig b/common/Kconfig index 9067d1e277..a24cfa996a 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -430,4 +430,15 @@ config BOARD_EARLY_INIT_F endmenu +config DISTRO_FREEBSD + bool "Enable FreeBSD boot" + select API + select CMD_CACHE + default n + help + This options adds boot configuration that can run the FreeBSD + loader. When enabled the distro_bootcmd will be expanded to + include scan_dev_for_freebsd which search for the FreeBSD loader + and if found run it. + source "common/spl/Kconfig" -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/5] kconfig: Add API kconfig file
Add kconfig file to enable API support Signed-off-by: Emmanuel Vadot --- Kconfig | 2 ++ api/Kconfig | 9 + 2 files changed, 11 insertions(+) create mode 100644 api/Kconfig diff --git a/Kconfig b/Kconfig index 8f9ea97f3d..2a65f07044 100644 --- a/Kconfig +++ b/Kconfig @@ -308,6 +308,8 @@ config ARCH_FIXUP_FDT_MEMORY endmenu# Boot images +source "api/Kconfig" + source "common/Kconfig" source "cmd/Kconfig" diff --git a/api/Kconfig b/api/Kconfig new file mode 100644 index 00..16731d3b4b --- /dev/null +++ b/api/Kconfig @@ -0,0 +1,9 @@ +menu "API" + +config API + bool "Enable U-Boot API" + default n + help + This option enables the U-Boot API. See api/README for more information. + +endmenu -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/5] Add FreeBSD kconfig options
On 31/01/2017 12:17, Emmanuel Vadot wrote: This series of patches add the needed bits for booting the FreeBSD loader and kernel. FreeBSD loader and kernel needs the U-Boot API and dcache/icache flushed for it to run so add this operation in go/bootelf command and when closing the API. Also add some some boot command that locate and run the FreeBSD loader if found. LGTM :) Reviewed-by: Alexander Graf Alex ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/7] mmc: zynq: rename CONFIG_ZYNQ_SDHCI to CONFIG_MMC_SDHCI_ZYNQ
On 01/30/2017 07:46 PM, Masahiro Yamada wrote: > Make the naming scheme consistent; all SDHCI-base drivers prefixed > with CONFIG_MMC_SDHCI_. > > While we are here, add "depends on ARCH_ZYNQ || ARCH_ZYNQMP". > > Signed-off-by: Masahiro Yamada Applied on u-boot-mmc. Thanks! Best Regards, Jaehoon Chung > --- > > Changes in v2: None > > arch/arm/mach-zynq/Kconfig | 2 +- > configs/topic_miami_defconfig| 2 +- > configs/topic_miamiplus_defconfig| 2 +- > configs/xilinx_zynqmp_ep_defconfig | 2 +- > configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 +- > configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 +- > configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 2 +- > configs/xilinx_zynqmp_zcu102_defconfig | 2 +- > configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 +- > configs/zynq_microzed_defconfig | 2 +- > configs/zynq_picozed_defconfig | 2 +- > configs/zynq_zc702_defconfig | 2 +- > configs/zynq_zc706_defconfig | 2 +- > configs/zynq_zc770_xm010_defconfig | 2 +- > configs/zynq_zed_defconfig | 2 +- > configs/zynq_zybo_defconfig | 2 +- > drivers/mmc/Kconfig | 15 --- > drivers/mmc/Makefile | 2 +- > include/configs/xilinx_zynqmp.h | 10 +- > include/configs/zynq-common.h| 8 > 20 files changed, 34 insertions(+), 33 deletions(-) > > diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig > index c465918..2529c9f 100644 > --- a/arch/arm/mach-zynq/Kconfig > +++ b/arch/arm/mach-zynq/Kconfig > @@ -13,7 +13,7 @@ config SPL_LIBGENERIC_SUPPORT > default y > > config SPL_MMC_SUPPORT > - default y if ZYNQ_SDHCI > + default y if MMC_SDHCI_ZYNQ > > config SPL_SERIAL_SUPPORT > default y > diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig > index 3239d99..a822ee1 100644 > --- a/configs/topic_miami_defconfig > +++ b/configs/topic_miami_defconfig > @@ -26,7 +26,7 @@ CONFIG_CMD_FAT=y > CONFIG_CMD_FS_GENERIC=y > CONFIG_OF_EMBED=y > CONFIG_SPL_DM_SEQ_ALIAS=y > -CONFIG_ZYNQ_SDHCI=y > +CONFIG_MMC_SDHCI_ZYNQ=y > CONFIG_MMC_SDHCI=y > CONFIG_SPI_FLASH=y > CONFIG_SPI_FLASH_BAR=y > diff --git a/configs/topic_miamiplus_defconfig > b/configs/topic_miamiplus_defconfig > index 906220c..9b4e82d 100644 > --- a/configs/topic_miamiplus_defconfig > +++ b/configs/topic_miamiplus_defconfig > @@ -26,7 +26,7 @@ CONFIG_CMD_FAT=y > CONFIG_CMD_FS_GENERIC=y > CONFIG_OF_EMBED=y > CONFIG_SPL_DM_SEQ_ALIAS=y > -CONFIG_ZYNQ_SDHCI=y > +CONFIG_MMC_SDHCI_ZYNQ=y > CONFIG_MMC_SDHCI=y > CONFIG_SPI_FLASH=y > CONFIG_SPI_FLASH_BAR=y > diff --git a/configs/xilinx_zynqmp_ep_defconfig > b/configs/xilinx_zynqmp_ep_defconfig > index 1d12440..49c0786 100644 > --- a/configs/xilinx_zynqmp_ep_defconfig > +++ b/configs/xilinx_zynqmp_ep_defconfig > @@ -53,7 +53,7 @@ CONFIG_DM_GPIO=y > CONFIG_DM_I2C=y > CONFIG_SYS_I2C_CADENCE=y > CONFIG_DM_MMC=y > -CONFIG_ZYNQ_SDHCI=y > +CONFIG_MMC_SDHCI_ZYNQ=y > CONFIG_MMC_SDHCI=y > CONFIG_NAND_ARASAN=y > CONFIG_SPI_FLASH=y > diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > index 4d90fc3..a3585d0 100644 > --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > @@ -43,7 +43,7 @@ CONFIG_DM_GPIO=y > CONFIG_DM_I2C=y > CONFIG_SYS_I2C_CADENCE=y > CONFIG_DM_MMC=y > -CONFIG_ZYNQ_SDHCI=y > +CONFIG_MMC_SDHCI_ZYNQ=y > CONFIG_MMC_SDHCI=y > CONFIG_SPI_FLASH=y > CONFIG_SPI_FLASH_BAR=y > diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig > b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig > index 817d066..a4c73f8 100644 > --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig > +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig > @@ -35,7 +35,7 @@ CONFIG_DM_GPIO=y > CONFIG_DM_I2C=y > CONFIG_SYS_I2C_CADENCE=y > CONFIG_DM_MMC=y > -CONFIG_ZYNQ_SDHCI=y > +CONFIG_MMC_SDHCI_ZYNQ=y > CONFIG_MMC_SDHCI=y > CONFIG_DM_ETH=y > CONFIG_ZYNQ_GEM=y > diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig > b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig > index 9d15846..f981b21 100644 > --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig > +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig > @@ -35,7 +35,7 @@ CONFIG_DM_GPIO=y > CONFIG_DM_I2C=y > CONFIG_SYS_I2C_CADENCE=y > CONFIG_DM_MMC=y > -CONFIG_ZYNQ_SDHCI=y > +CONFIG_MMC_SDHCI_ZYNQ=y > CONFIG_MMC_SDHCI=y > CONFIG_DM_ETH=y > CONFIG_EFI_LOADER_BOUNCE_BUFFER=y > diff --git a/configs/xilinx_zynqmp_zcu102_defconfig > b/configs/xilinx_zynqmp_zcu102_defconfig > index f6bbf83..7b65fe0 100644 > --- a/configs/xilinx_zynqmp_zcu102_defconfig > +++ b/configs/xilinx_zynqmp_zcu102_defconfig > @@ -43,7
Re: [U-Boot] [PATCH 5/7] mmc: msm: rename CONFIG_MSM_SDHCI to CONFIG_MMC_SDHCI_MSM
On 01/30/2017 07:46 PM, Masahiro Yamada wrote: > Make the naming scheme consistent; all SDHCI-base drivers prefixed > with CONFIG_MMC_SDHCI_. > > Signed-off-by: Masahiro Yamada Applied on u-boot-mmc. Thanks! Best Regards, Jaehoon Chung > --- > > Changes in v2: None > > configs/dragonboard410c_defconfig | 2 +- > drivers/mmc/Kconfig | 20 ++-- > drivers/mmc/Makefile | 2 +- > 3 files changed, 12 insertions(+), 12 deletions(-) > > diff --git a/configs/dragonboard410c_defconfig > b/configs/dragonboard410c_defconfig > index bf1a755..8f206e2 100644 > --- a/configs/dragonboard410c_defconfig > +++ b/configs/dragonboard410c_defconfig > @@ -21,7 +21,7 @@ CONFIG_PM8916_GPIO=y > CONFIG_LED=y > CONFIG_LED_GPIO=y > CONFIG_DM_MMC=y > -CONFIG_MSM_SDHCI=y > +CONFIG_MMC_SDHCI_MSM=y > CONFIG_MMC_SDHCI=y > CONFIG_DM_PMIC=y > CONFIG_PMIC_PM8916=y > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig > index 6f51354..c9a4ca9 100644 > --- a/drivers/mmc/Kconfig > +++ b/drivers/mmc/Kconfig > @@ -51,16 +51,6 @@ config SPL_MMC_TINY > operations too, which can remove the need for malloc support in SPL > and thus further reduce footprint. > > -config MSM_SDHCI > - bool "Qualcomm SDHCI controller" > - depends on DM_MMC && BLK && DM_MMC_OPS > - depends on MMC_SDHCI > - help > - Enables support for SDHCI 2.0 controller present on some Qualcomm > - Snapdragon devices. This device is compatible with eMMC v4.5 and > - SD 3.0 specifications. Both SD and eMMC devices are supported. > - Card-detect gpios are not supported. > - > config ATMEL_SDHCI > bool "Atmel SDHCI controller support" > depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91 > @@ -243,6 +233,16 @@ config MMC_SDHCI_KONA > > If you have a controller with this interface, say Y here. > > +config MMC_SDHCI_MSM > + bool "Qualcomm SDHCI controller" > + depends on BLK && DM_MMC_OPS > + depends on MMC_SDHCI > + help > + Enables support for SDHCI 2.0 controller present on some Qualcomm > + Snapdragon devices. This device is compatible with eMMC v4.5 and > + SD 3.0 specifications. Both SD and eMMC devices are supported. > + Card-detect gpios are not supported. > + > config MMC_SDHCI_MV > bool "SDHCI support on Marvell platform" > depends on ARCH_MVEBU > diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile > index 379b08c..7693644 100644 > --- a/drivers/mmc/Makefile > +++ b/drivers/mmc/Makefile > @@ -51,13 +51,13 @@ else > obj-$(CONFIG_GENERIC_MMC) += mmc_write.o > endif > obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o > -obj-$(CONFIG_MSM_SDHCI) += msm_sdhci.o > > # SDHCI > obj-$(CONFIG_MMC_SDHCI) += sdhci.o > obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o > obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o > obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o > +obj-$(CONFIG_MMC_SDHCI_MSM) += msm_sdhci.o > obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o > obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o > obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/7] mmc: rockchip: rename CONFIG_ROCKCHIP_SDHCI to CONFIG_MMC_SDHCI_ROCKCHIP
On 01/30/2017 07:46 PM, Masahiro Yamada wrote: > Make the naming scheme consistent; all SDHCI-base drivers prefixed > with CONFIG_MMC_SDHCI_. > > While we are here, add "depends on ARCH_ROCKCHIP". > > Signed-off-by: Masahiro Yamada Applied on u-boot-mmc. Thanks! Best Regards, Jaehoon Chung > --- > > Changes in v2: None > > configs/evb-rk3399_defconfig | 2 +- > drivers/mmc/Kconfig | 15 --- > drivers/mmc/Makefile | 2 +- > 3 files changed, 10 insertions(+), 9 deletions(-) > > diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig > index ca292cf..47064f9 100644 > --- a/configs/evb-rk3399_defconfig > +++ b/configs/evb-rk3399_defconfig > @@ -18,7 +18,7 @@ CONFIG_CLK=y > CONFIG_ROCKCHIP_GPIO=y > CONFIG_MMC_DW=y > CONFIG_MMC_DW_ROCKCHIP=y > -CONFIG_ROCKCHIP_SDHCI=y > +CONFIG_MMC_SDHCI_ROCKCHIP=y > CONFIG_MMC_SDHCI=y > CONFIG_PINCTRL=y > CONFIG_ROCKCHIP_RK3399_PINCTRL=y > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig > index 1d15cdd..6f51354 100644 > --- a/drivers/mmc/Kconfig > +++ b/drivers/mmc/Kconfig > @@ -165,13 +165,6 @@ config PIC32_SDHCI > help > Support for Microchip PIC32 SDHCI controller. > > -config ROCKCHIP_SDHCI > - bool "Arasan SDHCI controller for Rockchip support" > - depends on DM_MMC && BLK && DM_MMC_OPS > - depends on MMC_SDHCI > - help > - Support for Arasan SDHCI host controller on Rockchip ARM SoCs platform > - > config MMC_UNIPHIER > bool "UniPhier SD/MMC Host Controller support" > depends on ARCH_UNIPHIER > @@ -262,6 +255,14 @@ config MMC_SDHCI_MV > > If unsure, say N. > > +config MMC_SDHCI_ROCKCHIP > + bool "Arasan SDHCI controller for Rockchip support" > + depends on ARCH_ROCKCHIP > + depends on DM_MMC && BLK && DM_MMC_OPS > + depends on MMC_SDHCI > + help > + Support for Arasan SDHCI host controller on Rockchip ARM SoCs platform > + > config MMC_SDHCI_S5P > bool "SDHCI support on Samsung S5P SoC" > depends on MMC_SDHCI > diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile > index 5a497f5..379b08c 100644 > --- a/drivers/mmc/Makefile > +++ b/drivers/mmc/Makefile > @@ -43,7 +43,6 @@ obj-$(CONFIG_S3C_SDI) += s3c_sdi.o > obj-$(CONFIG_MMC_SANDBOX)+= sandbox_mmc.o > obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o > obj-$(CONFIG_SH_SDHI) += sh_sdhi.o > -obj-$(CONFIG_ROCKCHIP_SDHCI) += rockchip_sdhci.o > > ifdef CONFIG_SPL_BUILD > obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o > @@ -60,6 +59,7 @@ obj-$(CONFIG_MMC_SDHCI_BCM2835) += > bcm2835_sdhci.o > obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o > obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o > obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o > +obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o > obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o > obj-$(CONFIG_MMC_SDHCI_SPEAR)+= spear_sdhci.o > obj-$(CONFIG_MMC_SDHCI_TEGRA)+= tegra_mmc.o > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/7] mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32
On 01/30/2017 07:46 PM, Masahiro Yamada wrote: > Make the naming scheme consistent; all SDHCI-base drivers prefixed > with CONFIG_MMC_SDHCI_. > > Signed-off-by: Masahiro Yamada Applied on u-boot-mmc. Thanks! Best Regards, Jaehoon Chung > --- > > Changes in v2: None > > configs/pic32mzdask_defconfig | 2 +- > drivers/mmc/Kconfig | 14 +++--- > drivers/mmc/Makefile | 2 +- > 3 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig > index 90a0d32..85c0d2a 100644 > --- a/configs/pic32mzdask_defconfig > +++ b/configs/pic32mzdask_defconfig > @@ -29,7 +29,7 @@ CONFIG_NET_RANDOM_ETHADDR=y > CONFIG_CLK=y > CONFIG_DM_GPIO=y > CONFIG_DM_MMC=y > -CONFIG_PIC32_SDHCI=y > +CONFIG_MMC_SDHCI_PIC32=y > CONFIG_MMC_SDHCI=y > CONFIG_DM_ETH=y > CONFIG_PIC32_ETH=y > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig > index c9a4ca9..520e7ea 100644 > --- a/drivers/mmc/Kconfig > +++ b/drivers/mmc/Kconfig > @@ -148,13 +148,6 @@ config SH_SDHI > help > Support for the on-chip SDHI host controller on SuperH/Renesas ARM > SoCs platform > > -config PIC32_SDHCI > - bool "Microchip PIC32 on-chip SDHCI support" > - depends on DM_MMC && MACH_PIC32 > - depends on MMC_SDHCI > - help > - Support for Microchip PIC32 SDHCI controller. > - > config MMC_UNIPHIER > bool "UniPhier SD/MMC Host Controller support" > depends on ARCH_UNIPHIER > @@ -255,6 +248,13 @@ config MMC_SDHCI_MV > > If unsure, say N. > > +config MMC_SDHCI_PIC32 > + bool "Microchip PIC32 on-chip SDHCI support" > + depends on DM_MMC && MACH_PIC32 > + depends on MMC_SDHCI > + help > + Support for Microchip PIC32 SDHCI controller. > + > config MMC_SDHCI_ROCKCHIP > bool "Arasan SDHCI controller for Rockchip support" > depends on ARCH_ROCKCHIP > diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile > index 7693644..e63f439 100644 > --- a/drivers/mmc/Makefile > +++ b/drivers/mmc/Makefile > @@ -50,7 +50,6 @@ obj-$(CONFIG_SPL_SAVEENV) += mmc_write.o > else > obj-$(CONFIG_GENERIC_MMC) += mmc_write.o > endif > -obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o > > # SDHCI > obj-$(CONFIG_MMC_SDHCI) += sdhci.o > @@ -59,6 +58,7 @@ obj-$(CONFIG_MMC_SDHCI_CADENCE) += > sdhci-cadence.o > obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o > obj-$(CONFIG_MMC_SDHCI_MSM) += msm_sdhci.o > obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o > +obj-$(CONFIG_MMC_SDHCI_PIC32)+= pic32_sdhci.o > obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o > obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o > obj-$(CONFIG_MMC_SDHCI_SPEAR)+= spear_sdhci.o > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/7] mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL
On 01/30/2017 07:46 PM, Masahiro Yamada wrote: > Make the naming scheme consistent; all SDHCI-base drivers prefixed > with CONFIG_MMC_SDHCI_. > > While we are here, add "depends on ARCH_AT91". > > Signed-off-by: Masahiro Yamada Applied on u-boot-mmc. Thanks! Best Regards, Jaehoon Chung > --- > > Changes in v2: None > > configs/sama5d2_xplained_mmc_defconfig | 2 +- > configs/sama5d2_xplained_spiflash_defconfig | 2 +- > drivers/mmc/Kconfig | 23 --- > drivers/mmc/Makefile| 2 +- > 4 files changed, 15 insertions(+), 14 deletions(-) > > diff --git a/configs/sama5d2_xplained_mmc_defconfig > b/configs/sama5d2_xplained_mmc_defconfig > index a6daef4..000acee 100644 > --- a/configs/sama5d2_xplained_mmc_defconfig > +++ b/configs/sama5d2_xplained_mmc_defconfig > @@ -43,7 +43,7 @@ CONFIG_ATMEL_PIO4=y > CONFIG_DM_I2C=y > CONFIG_SYS_I2C_AT91=y > CONFIG_DM_MMC=y > -CONFIG_ATMEL_SDHCI=y > +CONFIG_MMC_SDHCI_ATMEL=y > CONFIG_MMC_SDHCI=y > CONFIG_DM_SPI_FLASH=y > CONFIG_SPI_FLASH=y > diff --git a/configs/sama5d2_xplained_spiflash_defconfig > b/configs/sama5d2_xplained_spiflash_defconfig > index 41ab772..0838e41 100644 > --- a/configs/sama5d2_xplained_spiflash_defconfig > +++ b/configs/sama5d2_xplained_spiflash_defconfig > @@ -42,7 +42,7 @@ CONFIG_ATMEL_PIO4=y > CONFIG_DM_I2C=y > CONFIG_SYS_I2C_AT91=y > CONFIG_DM_MMC=y > -CONFIG_ATMEL_SDHCI=y > +CONFIG_MMC_SDHCI_ATMEL=y > CONFIG_MMC_SDHCI=y > CONFIG_DM_SPI_FLASH=y > CONFIG_SPI_FLASH=y > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig > index 520e7ea..0c07781 100644 > --- a/drivers/mmc/Kconfig > +++ b/drivers/mmc/Kconfig > @@ -51,17 +51,6 @@ config SPL_MMC_TINY > operations too, which can remove the need for malloc support in SPL > and thus further reduce footprint. > > -config ATMEL_SDHCI > - bool "Atmel SDHCI controller support" > - depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91 > - depends on MMC_SDHCI > - help > - This enables support for the Atmel SDHCI controller, which supports > - the embedded MultiMedia Card (e.MMC) Specification V4.51, the SD > - Memory Card Specification V3.0, and the SDIO V3.0 specification. > - It is compliant with the SD Host Controller Standard V3.0 > - specification. > - > config MMC_DAVINCI > bool "TI DAVINCI Multimedia Card Interface support" > depends on ARCH_DAVINCI > @@ -191,6 +180,18 @@ config MMC_SDHCI_SDMA > This enables support for the SDMA (Single Operation DMA) defined > in the SD Host Controller Standard Specification Version 1.00 . > > +config MMC_SDHCI_ATMEL > + bool "Atmel SDHCI controller support" > + depends on ARCH_AT91 > + depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91 > + depends on MMC_SDHCI > + help > + This enables support for the Atmel SDHCI controller, which supports > + the embedded MultiMedia Card (e.MMC) Specification V4.51, the SD > + Memory Card Specification V3.0, and the SDIO V3.0 specification. > + It is compliant with the SD Host Controller Standard V3.0 > + specification. > + > config MMC_SDHCI_BCM2835 > tristate "SDHCI support for the BCM2835 SD/MMC Controller" > depends on ARCH_BCM283X > diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile > index e63f439..e78bd0d 100644 > --- a/drivers/mmc/Makefile > +++ b/drivers/mmc/Makefile > @@ -14,7 +14,6 @@ obj-$(CONFIG_GENERIC_MMC) += mmc_legacy.o > endif > > obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o > -obj-$(CONFIG_ATMEL_SDHCI) += atmel_sdhci.o > obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o > obj-$(CONFIG_MMC_DAVINCI)+= davinci_mmc.o > > @@ -53,6 +52,7 @@ endif > > # SDHCI > obj-$(CONFIG_MMC_SDHCI) += sdhci.o > +obj-$(CONFIG_MMC_SDHCI_ATMEL)+= atmel_sdhci.o > obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o > obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o > obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: init mmc block devices on probe
Hi Fiach,
On 01/25/2017 06:00 PM, Fiach Antaw wrote:
> MMC devices accessed exclusively via the driver model were not
> being initialized before being exposed as block devices, causing
> issues in scenarios where the MMC device is first accessed via the
> uclass block interface.
>
> Signed-off-by: Fiach Antaw
I will check this patch with my boards. After that, i will apply this.
Thanks!
Best Regards,
Jaehoon Chung
>
> ---
>
> drivers/mmc/mmc-uclass.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
> index 2fe5d61..a1c31a5 100644
> --- a/drivers/mmc/mmc-uclass.c
> +++ b/drivers/mmc/mmc-uclass.c
> @@ -247,6 +247,17 @@ static int mmc_select_hwpart(struct udevice *bdev, int
> hwpart)
> return mmc_switch_part(mmc, hwpart);
> }
>
> +static int mmc_blk_probe(struct udevice *dev)
> +{
> + struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
> + int dev_num = block_dev->devnum;
> + struct mmc *mmc = find_mmc_device(dev_num);
> +
> + if (!mmc)
> + return -ENODEV;
> + return mmc_init(mmc);
> +}
> +
> static const struct blk_ops mmc_blk_ops = {
> .read = mmc_bread,
> #ifndef CONFIG_SPL_BUILD
> @@ -260,6 +271,7 @@ U_BOOT_DRIVER(mmc_blk) = {
> .name = "mmc_blk",
> .id = UCLASS_BLK,
> .ops= &mmc_blk_ops,
> + .probe = mmc_blk_probe,
> };
> #endif /* CONFIG_BLK */
>
>
___
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Re: [U-Boot] [PATCH 1/7] mmc: move CONFIG_GENERIC_MMC to Kconfig
Hi Masahiro, On 01/30/2017 07:46 PM, Masahiro Yamada wrote: > Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC. > > Let's create an entry for "config GENERIC_MMC" with "default MMC", > then convert all macro defines in headers to Kconfig. Almost all > of the defines will go away. > > I see only two exceptions: > configs/blanche_defconfig > configs/sandbox_noblk_defconfig > > They define CONFIG_GENERIC_MMC, but not CONFIG_MMC. Something > might be wrong with these two boards, so should be checked later. > > Anyway, this is the output of the moveconfig tool. > > This commit was created as follows: > > [1] create a config entry in drivers/mmc/Kconfig > > [2] tools/moveconfig.py -r HEAD GENERIC_MMC > > [3] manual clean-up of garbage comments in doc/README.* and > include/configs/*.h > > Signed-off-by: Masahiro Yamada > Reviewed-by: Tom Rini Applied on u-boot-mmc. Thanks! Best Regards, Jaehoon Chung > --- > > Changes in v2: > - Rebase on aac477e > > README| 3 --- > configs/blanche_defconfig | 3 ++- > configs/sandbox_noblk_defconfig | 1 + > doc/README.atmel_mci | 2 -- > doc/README.socfpga| 3 --- > drivers/mmc/Kconfig | 4 > include/configs/BSC9132QDS.h | 1 - > include/configs/MPC8308RDB.h | 2 -- > include/configs/MPC837XEMDS.h | 1 - > include/configs/MPC837XERDB.h | 1 - > include/configs/MPC8536DS.h | 1 - > include/configs/MPC8569MDS.h | 1 - > include/configs/P1010RDB.h| 1 - > include/configs/P1022DS.h | 1 - > include/configs/P2041RDB.h| 1 - > include/configs/T102xQDS.h| 1 - > include/configs/T102xRDB.h| 1 - > include/configs/T1040QDS.h| 1 - > include/configs/T104xRDB.h| 1 - > include/configs/T208xQDS.h| 1 - > include/configs/T208xRDB.h| 1 - > include/configs/T4240QDS.h| 1 - > include/configs/T4240RDB.h| 1 - > include/configs/UCP1020.h | 1 - > include/configs/adp-ag101p.h | 1 - > include/configs/advantech_dms-ba16.h | 1 - > include/configs/alt.h | 2 -- > include/configs/am3517_crane.h| 1 - > include/configs/am3517_evm.h | 3 --- > include/configs/apalis_imx6.h | 1 - > include/configs/apalis_t30.h | 3 --- > include/configs/apf27.h | 1 - > include/configs/at91sam9260ek.h | 1 - > include/configs/at91sam9263ek.h | 1 - > include/configs/at91sam9m10g45ek.h| 1 - > include/configs/at91sam9n12ek.h | 1 - > include/configs/at91sam9rlek.h| 1 - > include/configs/at91sam9x5ek.h| 1 - > include/configs/atngw100.h| 1 - > include/configs/atngw100mkii.h| 1 - > include/configs/atstk1002.h | 1 - > include/configs/axs10x.h | 5 - > include/configs/bayleybay.h | 2 -- > include/configs/bcm23550_w1d.h| 2 -- > include/configs/bcm28155_ap.h | 2 -- > include/configs/beaver.h | 3 --- > include/configs/bf518f-ezbrd.h| 1 - > include/configs/bf527-ad7160-eval.h | 1 - > include/configs/bf537-stamp.h | 3 --- > include/configs/bf548-ezkit.h | 1 - > include/configs/bf609-ezkit.h | 1 - > include/configs/blanche.h | 2 -- > include/configs/brppt1.h | 1 - > include/configs/brxre1.h | 1 - > include/configs/cardhu.h | 3 --- > include/configs/cei-tk1-som.h | 3 --- > include/configs/clearfog.h| 1 - > include/configs/cm-bf537e.h | 1 - > include/configs/cm-bf537u.h | 1 - > include/configs/cm_t35.h | 2 -- > include/configs/cm_t3517.h| 2 -- > include/configs/colibri_imx6.h| 1 - > include/configs/colibri_t20.h | 3 --- > include/configs/colibri_t30.h | 3 --- > include/configs/colibri_vf.h | 2 -- > include/configs/conga-qeval20-qa3-e3845.h | 2 -- > include/configs/controlcenterd.h | 2 -- > include/configs/corenet_ds.h | 1 - > include/configs/crownbay.h| 2 -- > include/configs/cyrus.h | 1 - > include/configs/da850evm.h| 5 - > include/configs/dalmore.h | 3 --- > include/configs/db-88f6820-gp.h | 1 - > include/configs/dfi-bt700.h | 2 -- > include/configs/dragonboard410c.h | 3 --- > include/configs/e2220-1170.h | 3 --- > include/configs/ethernut5.h | 1 - > include/configs/exynos-c
Re: [U-Boot] [PATCH 2/7] mmc: sandbox: rename CONFIG, fix dependency, and use it in Makefile
On 01/30/2017 07:46 PM, Masahiro Yamada wrote: > [1] Rename CONFIG_SANDBOX_MMC to CONFIG_MMC_SANDBOX for consistency > I want all MMC driver options prefixed with CONFIG_MMC_. > > [2] Fix dependency > Add necessary depends on to avoid compile error. > Instead "depends on MMC" is unneeded because this config entry > resides inside of "if MMC". > > [3] Currently, this config symbol is not referenced at all. > Use it to enable/disable the driver in Makefile. > > Signed-off-by: Masahiro Yamada Applied on u-boot-mmc. Thanks! Best Regards, Jaehoon Chung > --- > > Changes in v2: None > > configs/sandbox_defconfig | 2 +- > configs/sandbox_spl_defconfig | 2 +- > drivers/mmc/Kconfig | 5 +++-- > drivers/mmc/Makefile | 6 +- > 4 files changed, 6 insertions(+), 9 deletions(-) > > diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig > index 877aa94..01f6f5d 100644 > --- a/configs/sandbox_defconfig > +++ b/configs/sandbox_defconfig > @@ -94,7 +94,7 @@ CONFIG_CROS_EC_SPI=y > CONFIG_PWRSEQ=y > CONFIG_SPL_PWRSEQ=y > CONFIG_I2C_EEPROM=y > -CONFIG_SANDBOX_MMC=y > +CONFIG_MMC_SANDBOX=y > CONFIG_SPI_FLASH_SANDBOX=y > CONFIG_SPI_FLASH=y > CONFIG_SPI_FLASH_ATMEL=y > diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig > index 0569647..896b15d 100644 > --- a/configs/sandbox_spl_defconfig > +++ b/configs/sandbox_spl_defconfig > @@ -104,7 +104,7 @@ CONFIG_CROS_EC_SANDBOX=y > CONFIG_CROS_EC_SPI=y > CONFIG_PWRSEQ=y > CONFIG_SPL_PWRSEQ=y > -CONFIG_SANDBOX_MMC=y > +CONFIG_MMC_SANDBOX=y > CONFIG_SPI_FLASH_SANDBOX=y > CONFIG_SPI_FLASH=y > CONFIG_SPI_FLASH_ATMEL=y > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig > index df4913b..97d245e 100644 > --- a/drivers/mmc/Kconfig > +++ b/drivers/mmc/Kconfig > @@ -187,9 +187,10 @@ config MMC_UNIPHIER > help > This selects support for the SD/MMC Host Controller on UniPhier SoCs. > > -config SANDBOX_MMC > +config MMC_SANDBOX > bool "Sandbox MMC support" > - depends on MMC && SANDBOX > + depends on SANDBOX > + depends on BLK && DM_MMC_OPS && OF_CONTROL > help > This select a dummy sandbox MMC driver. At present this does nothing > other than allow sandbox to be build with MMC support. This > diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile > index 6af7f79..2747deb 100644 > --- a/drivers/mmc/Makefile > +++ b/drivers/mmc/Makefile > @@ -40,11 +40,7 @@ obj-$(CONFIG_X86) += pci_mmc.o > obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o > obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o > obj-$(CONFIG_S3C_SDI) += s3c_sdi.o > -ifdef CONFIG_BLK > -ifdef CONFIG_GENERIC_MMC > -obj-$(CONFIG_SANDBOX) += sandbox_mmc.o > -endif > -endif > +obj-$(CONFIG_MMC_SANDBOX)+= sandbox_mmc.o > obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o > obj-$(CONFIG_SH_SDHI) += sh_sdhi.o > obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] dm/mmc: gen_atmel_mci: Add driver model support for mci
Hi Wenyou,
On 01/25/2017 03:15 PM, Wenyou Yang wrote:
> Add the driver model support for Atmel mci while retaining the
> existing legacy code. This allows the driver to support boards
> that have converted to driver model as well as those that have not.
Sorry for late. I had holidays.
Conflict this patch..
>
> Signed-off-by: Wenyou Yang
> ---
>
> Changes in v3:
> - Use unified #ifdef CONFIG_DM_MMC #else...#endif, instead of #ifndef
> CONFIG_DM_MMC
>#else...#endif.
>
> Changes in v2:
> - Change the return type of atmel_mci_setup_cfg() from int to void.
> - Add comments on the features depends on the IP version.
> - Add the error handle path of clock.
> - Fix the missing use priv->bus_clk_rate.
> - Return from mmc_bind() directly, instead of checking its return.
>
> drivers/mmc/Kconfig | 9 +++
> drivers/mmc/gen_atmel_mci.c | 164
> +++-
> 2 files changed, 172 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index c3462ab724..198aab8a26 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -68,6 +68,15 @@ config ATMEL_SDHCI
> It is compliant with the SD Host Controller Standard V3.0
> specification.
>
> +config GENERIC_ATMEL_MCI
> + bool "Atmel Multimedia Card Interface support"
> + depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91
> + help
> + This enables support for Atmel High Speed Multimedia Card Interface
> + (HSMCI), which supports the MultiMedia Card (MMC) Specification V4.3,
> + the SD Memory Card Specification V2.0, the SDIO V2.0 specification
> + and CE-ATA V1.1.
> +
> config ROCKCHIP_DWMMC
> bool "Rockchip SD/MMC controller support"
> depends on DM_MMC && OF_CONTROL
> diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
> index cca0b04a60..2a83b5db2a 100644
> --- a/drivers/mmc/gen_atmel_mci.c
> +++ b/drivers/mmc/gen_atmel_mci.c
> @@ -10,6 +10,7 @@
> */
>
> #include
> +#include
> #include
> #include
> #include
> @@ -18,8 +19,11 @@
> #include
> #include
> #include
> +#include
> #include "atmel_mci.h"
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> #ifndef CONFIG_SYS_MMC_CLK_OD
> # define CONFIG_SYS_MMC_CLK_OD 15
> #endif
> @@ -37,6 +41,10 @@ struct atmel_mci_priv {
> struct atmel_mci*mci;
> unsigned intinitialized:1;
> unsigned intcurr_clk;
> +#ifdef CONFIG_DM_MMC
> + struct mmc mmc;
> + ulong bus_clk_rate;
> +#endif
> };
>
> /* Read Atmel MCI IP version */
> @@ -58,11 +66,19 @@ static void dump_cmd(u32 cmdr, u32 arg, u32 status, const
> char* msg)
> }
>
> /* Setup for MCI Clock and Block Size */
> +#ifdef CONFIG_DM_MMC
> +static void mci_set_mode(struct atmel_mci_priv *priv, u32 hz, u32 blklen)
> +{
> + struct mmc *mmc = &priv->mmc;
> + u32 bus_hz = priv->bus_clk_rate;
> +#else
> static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
> {
> struct atmel_mci_priv *priv = mmc->priv;
> - atmel_mci_t *mci = priv->mci;
> u32 bus_hz = get_mci_clk_rate();
> +#endif
> +
> + atmel_mci_t *mci = priv->mci;
> u32 clkdiv = 255;
> unsigned int version = atmel_mci_get_version(mci);
> u32 clkodd = 0;
> @@ -202,10 +218,18 @@ io_fail:
> * Sends a command out on the bus and deals with the block data.
> * Takes the mmc pointer, a command pointer, and an optional data pointer.
> */
> +#ifdef CONFIG_DM_MMC
> +static int atmel_mci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
> + struct mmc_data *data)
> +{
> + struct atmel_mci_priv *priv = dev_get_priv(dev);
> + struct mmc *mmc = mmc_get_mmc_dev(dev);
> +#else
> static int
> mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
> {
> struct atmel_mci_priv *priv = mmc->priv;
> +#endif
> atmel_mci_t *mci = priv->mci;
> u32 cmdr;
> u32 error_flags = 0;
> @@ -335,17 +359,29 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
> struct mmc_data *data)
> return 0;
> }
>
> +#ifdef CONFIG_DM_MMC
> +static int atmel_mci_set_ios(struct udevice *dev)
> +{
> + struct atmel_mci_priv *priv = dev_get_priv(dev);
> + struct mmc *mmc = mmc_get_mmc_dev(dev);
> +#else
> /* Entered into mmc structure during driver init */
> static void mci_set_ios(struct mmc *mmc)
> {
> struct atmel_mci_priv *priv = mmc->priv;
> +#endif
> +
> atmel_mci_t *mci = priv->mci;
> int bus_width = mmc->bus_width;
> unsigned int version = atmel_mci_get_version(mci);
> int busw;
>
> /* Set the clock speed */
> +#ifdef CONFIG_DM_MMC
> + mci_set_mode(priv, mmc->clock, MMC_DEFAULT_BLKLEN);
> +#else
> mci_set_mode(mmc, mmc->clock, MMC_DEFAULT_BLKLEN);
> +#endif
>
> /*
>* set the bus width and select slot for this interface
> @@ -370,12 +406,22 @@ static void mci_set_ios(struct m
Re: [U-Boot] [PATCH v2 3/4] mmc: meson: add MMC driver for Meson GX (S905)
On 01/27/2017 08:04 AM, Andreas Färber wrote: > Am 25.01.2017 um 20:54 schrieb Heiner Kallweit: >> This driver implements MMC support on Meson GX (S905) based systems. >> It's based on Carlo Caione's work, changes: >> - BLK support added >> - general refactoring >> >> Original author: Carlo Caione >> Signed-off-by: Heiner Kallweit > > There is no such thing as "Original author:". You must keep Carlo's > Signed-off-by line, and if you based this on my incomplete update > attempt at https://github.com/afaerber/u-boot/commits/odroidc2 then also > my Signed-off-by (sorted in chronological order with yours last). I > would've also expected to see Carlo as actual author (--author="...") > instead of such a textual remark. > > Jaehoon, please hold off applying this until it has seen some more review. Sure, I will wait. Best Regards, Jaehoon Chung > > Regards, > Andreas > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/3] mmc: meson: add MMC driver for Meson GX (S905)
On 01/28/2017 05:55 AM, Heiner Kallweit wrote:
> This driver implements MMC support on Meson GX (S905) based systems.
> It's based on Carlo Caione's work, changes:
> - BLK support added
> - general refactoring
>
> Signed-off-by: Carlo Caione
> Signed-off-by: Andreas Färber
> Signed-off-by: Heiner Kallweit
Andreas's comment is what this patch's author is Carlo..Not just add Signed-off
tag for Carlo.
When you send the email, needs to add "From: Carlo Caione ",
not yours.
> ---
> v2:
V3 should be here..not V2.
> - addressed review comments
> - general refactoring
> v3:
> - remove config symbol MMC_MESON_GX_SD_PORT
> ---
> arch/arm/include/asm/arch-meson/sd_emmc.h | 89 +
> drivers/mmc/Kconfig | 6 +
> drivers/mmc/Makefile | 1 +
> drivers/mmc/meson_gx_mmc.c| 291
> ++
> include/configs/meson-gxbb-common.h | 4 +
> 5 files changed, 391 insertions(+)
> create mode 100644 arch/arm/include/asm/arch-meson/sd_emmc.h
> create mode 100644 drivers/mmc/meson_gx_mmc.c
>
> diff --git a/arch/arm/include/asm/arch-meson/sd_emmc.h
> b/arch/arm/include/asm/arch-meson/sd_emmc.h
> new file mode 100644
> index 000..25dbf60
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-meson/sd_emmc.h
> @@ -0,0 +1,89 @@
> +/*
> + * (C) Copyright 2017 Carlo Caione
I don't know Carlo already shared at github..So 2016 might be right, not 2017.
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#ifndef __SD_EMMC_H__
> +#define __SD_EMMC_H__
> +
> +#include
> +
> +#define SDIO_PORT_A 0
> +#define SDIO_PORT_B 1
> +#define SDIO_PORT_C 2
> +
> +#define SD_EMMC_CLKSRC_24M 2400/* 24 MHz */
> +#define SD_EMMC_CLKSRC_DIV2 10 /* 1 GHz */
> +
> +#define MESON_SD_EMMC_CLOCK 0x00
> +#define CLK_MAX_DIV63
> +#define CLK_SRC_24M(0 << 6)
> +#define CLK_SRC_DIV2 (1 << 6)
> +#define CLK_CO_PHASE_000 (0 << 8)
> +#define CLK_CO_PHASE_090 (1 << 8)
> +#define CLK_CO_PHASE_180 (2 << 8)
> +#define CLK_CO_PHASE_270 (3 << 8)
> +#define CLK_TX_PHASE_000 (0 << 10)
> +#define CLK_TX_PHASE_090 (1 << 10)
> +#define CLK_TX_PHASE_180 (2 << 10)
> +#define CLK_TX_PHASE_270 (3 << 10)
> +#define CLK_ALWAYS_ON BIT(24)
> +
> +#define MESON_SD_EMMC_CFG0x44
> +#define CFG_BUS_WIDTH_MASK GENMASK(1, 0)
> +#define CFG_BUS_WIDTH_10
> +#define CFG_BUS_WIDTH_41
> +#define CFG_BUS_WIDTH_82
> +#define CFG_BL_LEN_MASKGENMASK(7, 4)
> +#define CFG_BL_LEN_SHIFT 4
> +#define CFG_BL_LEN_512 (9 << 4)
> +#define CFG_RESP_TIMEOUT_MASK GENMASK(11, 8)
> +#define CFG_RESP_TIMEOUT_256 (8 << 8)
> +#define CFG_RC_CC_MASK GENMASK(15, 12)
> +#define CFG_RC_CC_16 (4 << 12)
> +#define CFG_SDCLK_ALWAYS_ONBIT(18)
> +#define CFG_AUTO_CLK BIT(23)
> +
> +#define MESON_SD_EMMC_STATUS 0x48
> +#define STATUS_MASKGENMASK(15, 0)
> +#define STATUS_ERR_MASKGENMASK(12, 0)
> +#define STATUS_RXD_ERR_MASKGENMASK(7, 0)
> +#define STATUS_TXD_ERR BIT(8)
> +#define STATUS_DESC_ERRBIT(9)
> +#define STATUS_RESP_ERRBIT(10)
> +#define STATUS_RESP_TIMEOUTBIT(11)
> +#define STATUS_DESC_TIMEOUTBIT(12)
> +#define STATUS_END_OF_CHAINBIT(13)
> +
> +#define MESON_SD_EMMC_IRQ_EN 0x4c
> +
> +#define MESON_SD_EMMC_CMD_CFG0x50
> +#define CMD_CFG_LENGTH_MASKGENMASK(8, 0)
> +#define CMD_CFG_BLOCK_MODE BIT(9)
> +#define CMD_CFG_R1BBIT(10)
> +#define CMD_CFG_END_OF_CHAIN BIT(11)
> +#define CMD_CFG_TIMEOUT_4S (12 << 12)
> +#define CMD_CFG_NO_RESPBIT(16)
> +#define CMD_CFG_DATA_IOBIT(18)
> +#define CMD_CFG_DATA_WRBIT(19)
> +#define CMD_CFG_RESP_NOCRC BIT(20)
> +#define CMD_CFG_RESP_128 BIT(21)
> +#define CMD_CFG_CMD_INDEX_SHIFT24
> +#define CMD_CFG_OWNER BIT(31)
> +
> +#define MESON_SD_EMMC_CMD_ARG0x54
> +#define MESON_SD_EMMC_CMD_DAT0x58
> +#define MESON_SD_EMMC_CMD_RSP0x5c
> +#define MESON_SD_EMMC_CMD_RSP1 0x60
> +#define MESON_SD_EMMC_CMD_RSP2 0x64
> +#define MESON_SD_EMMC_CMD_RSP3 0x68
> +
> +struct meson_mmc_platdata {
> + struct mmc_config cfg;
> + struct mmc mmc;
> + void *regbase;
> + void *w_buf;
> +};
> +
> +#endif
> diff --git a/drivers/m
Re: [U-Boot] [PATCH v3 1/3] mmc: meson: update Meson GXBB / Odroid-C2 DT with latest Linux version
On 01/28/2017 05:55 AM, Heiner Kallweit wrote:
> As a prerequisite for adding a Meson GX MMC driver update the
> Meson GXBB / Odroid-C2 device tree in Uboot with the latest
> version from Linux.
>
> Signed-off-by: Heiner Kallweit
Hmm..There are Neil, Carlo and Andreas as Authors in each files.
Why don't you add their signed-off tags?
> ---
> arch/arm/dts/meson-gx.dtsi | 447
> arch/arm/dts/meson-gxbb-odroidc2.dts| 147 ++-
> arch/arm/dts/meson-gxbb.dtsi| 718
>
> include/dt-bindings/clock/gxbb-aoclkc.h | 66 +++
> include/dt-bindings/clock/gxbb-clkc.h | 34 ++
> include/dt-bindings/reset/gxbb-aoclkc.h | 66 +++
> 6 files changed, 1203 insertions(+), 275 deletions(-)
> create mode 100644 arch/arm/dts/meson-gx.dtsi
> create mode 100644 include/dt-bindings/clock/gxbb-aoclkc.h
> create mode 100644 include/dt-bindings/clock/gxbb-clkc.h
> create mode 100644 include/dt-bindings/reset/gxbb-aoclkc.h
>
> diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
> new file mode 100644
> index 000..c129100
> --- /dev/null
> +++ b/arch/arm/dts/meson-gx.dtsi
> @@ -0,0 +1,447 @@
> +/*
> + * Copyright (c) 2016 Andreas Färber
> + *
> + * Copyright (c) 2016 BayLibre, SAS.
> + * Author: Neil Armstrong
> + *
> + * Copyright (c) 2016 Endless Computers, Inc.
> + * Author: Carlo Caione
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
Refer to License/README
> +
> +#include
> +#include
> +#include
> +
> +/ {
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + /* 16 MiB reserved for Hardware ROM Firmware */
> + hwrom_reserved: hwrom@0 {
> + reg = <0x0 0x0 0x0 0x100>;
> + no-map;
> + };
> +
> + /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
> + secmon_reserved: secmon@1000 {
> + reg = <0x0 0x1000 0x0 0x20>;
> + no-map;
> + };
> + };
> +
> + cpus {
> + #address-cells = <0x2>;
> + #size-cells = <0x0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53", "arm,armv8";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + next-level-cache = <&l2>;
> + clocks = <&scpi_dvfs 0>;
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53", "arm,armv8";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + next-level-cache = <&l2>;
> + clocks = <&scpi_d
Re: [U-Boot] [PATCH 1/3] drivers: timer: Introduce ARC timer driver
Hi Simon,
On Fri, 2017-01-20 at 20:51 -0700, Simon Glass wrote:
> > +Â Â switch (priv->timer_id) {
> > +Â Â case 0:
> > +Â Â /* Disable timer if CPU is halted */
> > +Â Â write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
> > +Â Â /* Set max value for counter/timer */
> > +Â Â write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0x);
> > +Â Â /* Set initial count value and restart counter/timer */
> > +Â Â write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
> > +Â Â break;
> > +Â Â case 1:
> > +Â Â /* Disable timer if CPU is halted */
> > +Â Â write_aux_reg(ARC_AUX_TIMER1_CTRL, NH_MODE);
> > +Â Â /* Set max value for counter/timer */
> > +Â Â write_aux_reg(ARC_AUX_TIMER1_LIMIT, 0x);
> > +Â Â /* Set initial count value and restart counter/timer */
> > +Â Â write_aux_reg(ARC_AUX_TIMER1_CNT, 0);
>
> You are writing the same values in each case. Can you set a value to
> either ARC_AUX_TIMER0 or ARC_AUX_TIMER1Â and then just have the code
> once?
Yes, here we have some code duplication. But in fact we have a reason for this.
ARC timers are controlled by auxiliary
registers that are not mapped anywhere. They have their fixed numbers and are
being accessed using special ARC asm
commands. Of course I can write something like this:
-->8
timer_base = priv->timer_id ? ARC_AUX_TIMER1_BASE : ARC_AUX_TIMER0_BASE;
write_aux_reg(timer_base + ARC_TIMER_CTRL, NH_MODE);
write_aux_reg(timer_base + ARC_TIMER_LIMIT, 0x);
write_aux_reg(timer_base + ARC_TIMER_CNT, 0);
-->8
But unfortunately it will not reflect the real life. We don't have any ARC
timer base addresses, only fixed register
numbers.
If you insist I will use the latter code snippet. But from our point of view
the code is being duplicated in this patch
is very small but helps to understand what is really happening with ARC timers
much better.
Thanks.
--
Best regards,
Vlad Zakharov
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Re: [U-Boot] [PATCH 1/3] drivers: timer: Introduce ARC timer driver
Hi Simon,
On Tue, 2017-01-31 at 14:44 +, Vlad Zakharov wrote:
> Hi Simon,
>
> On Fri, 2017-01-20 at 20:51 -0700, Simon Glass wrote:
> >
> > >
> > > +Â Â switch (priv->timer_id) {
> > > +Â Â case 0:
> > > +Â Â /* Disable timer if CPU is halted */
> > > +Â Â write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
> > > +Â Â /* Set max value for counter/timer */
> > > +Â Â write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0x);
> > > +Â Â /* Set initial count value and restart counter/timer */
> > > +Â Â write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
> > > +Â Â break;
> > > +Â Â case 1:
> > > +Â Â /* Disable timer if CPU is halted */
> > > +Â Â write_aux_reg(ARC_AUX_TIMER1_CTRL, NH_MODE);
> > > +Â Â /* Set max value for counter/timer */
> > > +Â Â write_aux_reg(ARC_AUX_TIMER1_LIMIT, 0x);
> > > +Â Â /* Set initial count value and restart counter/timer */
> > > +Â Â write_aux_reg(ARC_AUX_TIMER1_CNT, 0);
> >
> > You are writing the same values in each case. Can you set a value to
> > either ARC_AUX_TIMER0 or ARC_AUX_TIMER1Â and then just have the code
> > once?
>
> Yes, here we have some code duplication. But in fact we have a reason for
> this. ARC timers are controlled by auxiliary
> registers that are not mapped anywhere. They have their fixed numbers and are
> being accessed using special ARC asm
> commands. Of course I can write something like this:
> -->8
> timer_base = priv->timer_id ? ARC_AUX_TIMER1_BASE : ARC_AUX_TIMER0_BASE;
>
> write_aux_reg(timer_base + ARC_TIMER_CTRL, NH_MODE);
> write_aux_reg(timer_base + ARC_TIMER_LIMIT, 0x);
> write_aux_reg(timer_base + ARC_TIMER_CNT, 0);
> -->8
> But unfortunately it will not reflect the real life. We don't have any ARC
> timer base addresses, only fixed register
> numbers.
Just a subtle clarification.
In ARC world we have addition address space for controlling built-in features
of the core.
These are so-called AUX[iliary] registers. We access them via special commands
like LR/SR
(load/store AUX reg) and each AUX reg has its own pre-defined index.
In other words ARC_AUX_TIMER0_CTRL and ARC_AUX_TIMER1_CTRL are 2 very special
values/indexes (in terms they are always
the same within all ARC cores with the same ISA). Compared to common MMIO
peripherals which might be mapped to different
memory location these are constant. And IMHO for ARC user it is much more
natural to see a particular AUX reg number and
then just get all the info about it from ARC core documentation. Otherwise if
we start using fake bases it may just
mislead a reader.
-Alexey
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Re: [U-Boot] [PATCH 1/5][v7] arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
On 01/31/2017 01:27 AM, Prabhakar Kushwaha wrote: > Enable IFC from Kconfig. > > Signed-off-by: Prabhakar Kushwaha > --- > Changes for v5: Added first time > Changes for v6: Sending as it is > Changes for v7: Sending as it is > > arch/powerpc/cpu/mpc85xx/Kconfig | 17 + > include/configs/B4860QDS.h | 1 - > include/configs/BSC9131RDB.h | 1 - > include/configs/BSC9132QDS.h | 1 - > include/configs/C29XPCIE.h | 1 - > include/configs/P1010RDB.h | 1 - > include/configs/T102xQDS.h | 1 - > include/configs/T102xRDB.h | 1 - > include/configs/T1040QDS.h | 1 - > include/configs/T104xRDB.h | 1 - > include/configs/T208xQDS.h | 1 - > include/configs/T208xRDB.h | 1 - > include/configs/T4240RDB.h | 1 - > include/configs/t4qds.h | 1 - > 14 files changed, 17 insertions(+), 13 deletions(-) > Prabhakar, Do you plan to make the same move for ARM-based platforms? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: socfpga: set the mpuclk divider in the Altera group register
The mpuclk register in the Altera group of the clock manager
divides the mpu_clk that is generated from the C0 output of the main
pll.
Without this patch, the default value of the register is 1, so the mpuclk
will always get divided by 2 if the correct value is not set. For example,
on the Arria5 socdk board, the MPU clock is only 525 MHz, and it should be
1.05 GHz.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/clock_manager.c | 3 +++
arch/arm/mach-socfpga/include/mach/clock_manager.h | 3 +++
arch/arm/mach-socfpga/wrap_pll_config.c| 3 +++
3 files changed, 9 insertions(+)
diff --git a/arch/arm/mach-socfpga/clock_manager.c
b/arch/arm/mach-socfpga/clock_manager.c
index aa71636..29e18f8 100644
--- a/arch/arm/mach-socfpga/clock_manager.c
+++ b/arch/arm/mach-socfpga/clock_manager.c
@@ -167,6 +167,9 @@ void cm_basic_init(const struct cm_config * const cfg)
/* main mpu */
writel(cfg->mpuclk, &clock_manager_base->main_pll.mpuclk);
+ /* altera group mpuclk */
+ writel(cfg->altera_grp_mpuclk, &clock_manager_base->altera.mpuclk);
+
/* main main clock */
writel(cfg->mainclk, &clock_manager_base->main_pll.mainclk);
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h
b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index 2675951..803c926 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -55,6 +55,9 @@ struct cm_config {
uint32_t ddr2xdqsclk;
uint32_t ddrdqclk;
uint32_t s2fuser2clk;
+
+ /* altera group */
+ uint32_t altera_grp_mpuclk;
};
void cm_basic_init(const struct cm_config * const cfg);
diff --git a/arch/arm/mach-socfpga/wrap_pll_config.c
b/arch/arm/mach-socfpga/wrap_pll_config.c
index 8a0a0e6..72b5f92 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config.c
@@ -116,6 +116,9 @@ static const struct cm_config cm_default_cfg = {
CLKMGR_SDRPLLGRP_S2FUSER2CLK_PHASE_OFFSET) |
(CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT <<
CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_OFFSET),
+
+ /* altera group */
+ CONFIG_HPS_ALTERAGRP_MPUCLK,
};
const struct cm_config * const cm_get_default_config(void)
--
2.7.4
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[U-Boot] [PATCH 1/1] checkpatch: Port spelling to checkpatch
Pick commit 66b47b4a9dad0 checkpatch: look for common misspellings
from the Linux kernel for spelling check from Kees Cook
In addition pulled in additional changes
commit ebfd7d6237531 checkpatch: add optional --codespell dictionary to find
more typos
from the Linux kernel for codespell from Joe Perches
commit f1a63678554f8 checkpatch: remove local from codespell path
from the Linux kernel for dictionary path from Maxim Uvarov
Signed-off-by: Dan Murphy
---
scripts/checkpatch.pl | 81 +++
1 file changed, 81 insertions(+)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 84f57566fd..3afc870f0f 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -7,9 +7,12 @@
use strict;
use POSIX;
+use File::Basename;
+use Cwd 'abs_path';
my $P = $0;
$P =~ s@.*/@@g;
+my $D = dirname(abs_path($P));
my $V = '0.32';
@@ -42,6 +45,9 @@ my $configuration_file = ".checkpatch.conf";
my $max_line_length = 80;
my $ignore_perl_version = 0;
my $minimum_perl_version = 5.10.0;
+my $spelling_file = "$D/spelling.txt";
+my $codespell = 0;
+my $codespellfile = "/usr/share/codespell/dictionary.txt";
sub help {
my ($exitcode) = @_;
@@ -82,6 +88,9 @@ Options:
file. It's your fault if there's no backup or git
--ignore-perl-version override checking of perl version. expect
runtime errors.
+ --codespellUse the codespell dictionary for spelling/typos
+
(default:/usr/local/share/codespell/dictionary.txt)
+ --codespellfileUse this codespell dictionary
-h, --help, --version display this help and exit
When FILE is - read standard input.
@@ -139,6 +148,8 @@ GetOptions(
'ignore-perl-version!' => \$ignore_perl_version,
'debug=s' => \%debug,
'test-only=s' => \$tst_only,
+ 'codespell!'=> \$codespell,
+ 'codespellfile=s' => \$codespellfile,
'h|help'=> \$help,
'version' => \$help
) or help(1);
@@ -387,6 +398,56 @@ our $allowed_asm_includes = qr{(?x:
)};
# memory.h: ARM has a custom one
+# Load common spelling mistakes and build regular expression list.
+my $misspellings;
+my %spelling_fix;
+
+if (open(my $spelling, '<', $spelling_file)) {
+ while (<$spelling>) {
+ my $line = $_;
+
+ $line =~ s/\s*\n?$//g;
+ $line =~ s/^\s*//g;
+
+ next if ($line =~ m/^\s*#/);
+ next if ($line =~ m/^\s*$/);
+
+ my ($suspect, $fix) = split(/\|\|/, $line);
+
+ $spelling_fix{$suspect} = $fix;
+ }
+ close($spelling);
+} else {
+ warn "No typos will be found - file '$spelling_file': $!\n";
+}
+
+if ($codespell) {
+ if (open(my $spelling, '<', $codespellfile)) {
+ while (<$spelling>) {
+ my $line = $_;
+
+ $line =~ s/\s*\n?$//g;
+ $line =~ s/^\s*//g;
+
+ next if ($line =~ m/^\s*#/);
+ next if ($line =~ m/^\s*$/);
+ next if ($line =~ m/, disabled/i);
+
+ $line =~ s/,.*$//;
+
+ my ($suspect, $fix) = split(/->/, $line);
+
+ $spelling_fix{$suspect} = $fix;
+ }
+ close($spelling);
+ } else {
+ warn "No codespell typos will be found - file '$codespellfile':
$!\n";
+ }
+}
+
+$misspellings = join("|", sort keys %spelling_fix) if keys %spelling_fix;
+
+
sub build_types {
my $mods = "(?x: \n" . join("|\n ", @modifierList) . "\n)";
my $all = "(?x: \n" . join("|\n ", @typeList) . "\n)";
@@ -528,6 +589,8 @@ my @rawlines = ();
my @lines = ();
my @fixed = ();
my $vname;
+my $fixlinenr = -1;
+
for my $filename (@ARGV) {
my $FILE;
if ($file) {
@@ -1950,6 +2013,24 @@ sub process {
"8-bit UTF-8 used in possible commit log\n" .
$herecurr);
}
+# Check for various typo / spelling mistakes
+ if (defined($misspellings) &&
+ ($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) {
+ while ($rawline =~
/(?:^|[^a-z@])($misspellings)(?:\b|$|[^a-z@])/gi) {
+ my $typo = $1;
+ my $typo_fix = $spelling_fix{lc($typo)};
+ $typo_fix = ucfirst($typo_fix) if ($typo =~
/^[A-Z]/);
+ $typo_fix = uc($typo_fix) if ($typo =~
/^[A-Z]+$/);
+ my $msg_type = \&WARN;
+ $msg_type = \&CHK if ($file);
+ if (&{$msg_type}("TYPO_SPELLING",
+"'$typo' may be misspelled -
perhaps '$typo_fix'?\n" . $herecurr) &&
+
[U-Boot] [PATCH 0/1] Introducing Spell check for checkpatch from LK
All This is the codespell and codespellfile code from the Linux kernel. I am not sure if I have formatted the commit message properly enough to give the original authors of the code the credit they deserve. I sited the patches I could find and had to add some additional variables that were part of other patches in which the codespell took advantage of. Dan Dan Murphy (1): checkpatch: Port spelling to checkpatch scripts/checkpatch.pl | 81 +++ 1 file changed, 81 insertions(+) -- 2.11.0.rc0.7.gbe5a750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 11/15] drivers: nand: omap_gpmc: convert driver to adopt driver model
From: Mugunthan V N
adopt omap_gpmc driver to driver model.
Signed-off-by: Mugunthan V N
Signed-off-by: Grygorii Strashko
---
drivers/mtd/nand/omap_gpmc.c | 205 +++
1 file changed, 205 insertions(+)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index b540bc3..a2d1634 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -16,6 +16,10 @@
#include
#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
#define BADBLOCK_MARKER_LENGTH 2
#define SECTOR_BYTES 512
#define ECCCLEAR (0x1 << 8)
@@ -46,11 +50,22 @@ struct omap_nand_info {
enum omap_ecc ecc_scheme;
uint8_t cs;
uint8_t ws; /* wait status pin (0,1) */
+ uint8_t bus_width; /* Bus width of NAND device */
};
+#ifndef CONFIG_DM_NAND
/* We are wasting a bit of memory but al least we are safe */
static struct omap_nand_info omap_nand_info[GPMC_MAX_CS];
+#else
+
+struct omap_gpmc_platdata {
+ struct omap_nand_info *omap_nand_info;
+ struct gpmc *gpmc_cfg;
+ int max_cs;
+};
+#endif
+
/*
* omap_nand_hwcontrol - Set the address pointers corretly for the
* following address/data/command operation
@@ -945,6 +960,8 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware,
uint32_t eccstrength)
}
#endif /* CONFIG_SPL_BUILD */
+#ifndef CONFIG_DM_NAND
+
/*
* Board-specific NAND initialization. The following members of the
* argument are board-specific:
@@ -1036,3 +1053,191 @@ int board_nand_init(struct nand_chip *nand)
return 0;
}
+
+#else /* CONFIG_DM_NAND */
+
+static int omap_gpmc_probe(struct udevice *dev)
+{
+ struct nand_chip *nand = dev_get_priv(dev);
+ struct omap_gpmc_platdata *pdata = dev_get_platdata(dev);
+ struct gpmc *gpmc_cfg = pdata->gpmc_cfg;
+ int32_t gpmc_config = 0;
+ int ecc_opt;
+ int cs = cs_next++;
+ int err = 0;
+
+ while (cs < pdata->max_cs) {
+ /* Check if NAND type is set */
+ if ((readl(&gpmc_cfg->cs[cs].config1) & 0xC00) == 0x800) {
+ /* Found it!! */
+ break;
+ }
+ cs++;
+ }
+
+ if (cs >= pdata->max_cs) {
+ printf("nand: error: Unable to find NAND settings in GPMC
Configuration - quitting\n");
+ return -ENODEV;
+ }
+
+ gpmc_config = readl(&gpmc_cfg->config);
+ /* Disable Write protect */
+ gpmc_config |= 0x10;
+ writel(gpmc_config, &gpmc_cfg->config);
+
+ nand->IO_ADDR_R = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat;
+ nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd;
+ nand->priv = &pdata->omap_nand_info[cs];
+ nand->cmd_ctrl = omap_nand_hwcontrol;
+ nand->options |= NAND_NO_PADDING | NAND_CACHEPRG;
+ nand->chip_delay = 100;
+ nand->ecc.layout = &omap_ecclayout;
+
+ /* configure driver and controller based on NAND device bus-width */
+ gpmc_config = readl(&gpmc_cfg->cs[cs].config1);
+ if (pdata->omap_nand_info[cs].bus_width == 16) {
+ nand->options |= NAND_BUSWIDTH_16;
+ writel(gpmc_config | (0x1 << 12), &gpmc_cfg->cs[cs].config1);
+ } else {
+ nand->options &= ~NAND_BUSWIDTH_16;
+ writel(gpmc_config & ~(0x1 << 12), &gpmc_cfg->cs[cs].config1);
+ }
+
+ ecc_opt = pdata->omap_nand_info[cs].ecc_scheme;
+ /* select ECC scheme */
+ if (ecc_opt != OMAP_ECC_HAM1_CODE_SW) {
+ err = omap_select_ecc_scheme(nand, ecc_opt,
+CONFIG_SYS_NAND_PAGE_SIZE,
+CONFIG_SYS_NAND_OOBSIZE);
+ } else {
+ /*
+* pagesize and oobsize are not required to
+* configure sw ecc-scheme
+*/
+ err = omap_select_ecc_scheme(nand, ecc_opt, 0, 0);
+ }
+ if (err)
+ return err;
+
+#ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH
+ nand->read_buf = omap_nand_read_prefetch;
+#else
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = nand_read_buf16;
+ else
+ nand->read_buf = nand_read_buf;
+#endif
+
+ nand->dev_ready = omap_dev_ready;
+
+ return 0;
+}
+
+static int omap_gpmc_get_ecc_opt(int node, int elm_node)
+{
+ const void *fdt = gd->fdt_blob;
+ const char *ecc_str;
+ int ecc_opt = -ENOENT;
+
+ ecc_str = fdt_getprop(fdt, node, "ti,nand-ecc-opt", NULL);
+ if (!ecc_str) {
+ error("DT entry for ti,nand-ecc-opt not found\n");
+ return -ENOENT;
+ }
+
+ if (!strcmp(ecc_str, "sw")) {
+ ecc_opt = OMAP_ECC_HAM1_CODE_SW;
+ } else if (!strcmp(ecc_str, "ham1") ||
+ !strcmp(ecc_str, "hw") ||
+
[U-Boot] [PATCH v2 03/15] common: env_nand: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko
---
common/env_nand.c | 33 +
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/common/env_nand.c b/common/env_nand.c
index 2e28171..133ecfb 100644
--- a/common/env_nand.c
+++ b/common/env_nand.c
@@ -130,17 +130,22 @@ static int writeenv(size_t offset, u_char *buf)
size_t end = offset + CONFIG_ENV_RANGE;
size_t amount_saved = 0;
size_t blocksize, len;
+ struct mtd_info *mtd;
u_char *char_ptr;
- blocksize = nand_info[0]->erasesize;
+ mtd = get_nand_dev_by_index(0);
+ if (!mtd)
+ return 1;
+
+ blocksize = mtd->erasesize;
len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
while (amount_saved < CONFIG_ENV_SIZE && offset < end) {
- if (nand_block_isbad(nand_info[0], offset)) {
+ if (nand_block_isbad(mtd, offset)) {
offset += blocksize;
} else {
char_ptr = &buf[amount_saved];
- if (nand_write(nand_info[0], offset, &len, char_ptr))
+ if (nand_write(mtd, offset, &len, char_ptr))
return 1;
offset += blocksize;
@@ -161,13 +166,15 @@ struct env_location {
static int erase_and_write_env(const struct env_location *location,
u_char *env_new)
{
+ struct mtd_info *mtd;
int ret = 0;
- if (!nand_info[0])
+ mtd = get_nand_dev_by_index(0);
+ if (!mtd)
return 1;
printf("Erasing %s...\n", location->name);
- if (nand_erase_opts(nand_info[0], &location->erase_opts))
+ if (nand_erase_opts(mtd, &location->erase_opts))
return 1;
printf("Writing to %s... ", location->name);
@@ -248,22 +255,24 @@ static int readenv(size_t offset, u_char *buf)
size_t end = offset + CONFIG_ENV_RANGE;
size_t amount_loaded = 0;
size_t blocksize, len;
+ struct mtd_info *mtd;
u_char *char_ptr;
- if (!nand_info[0])
+ mtd = get_nand_dev_by_index(0);
+ if (!mtd)
return 1;
- blocksize = nand_info[0]->erasesize;
+ blocksize = mtd->erasesize;
len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
while (amount_loaded < CONFIG_ENV_SIZE && offset < end) {
- if (nand_block_isbad(nand_info[0], offset)) {
+ if (nand_block_isbad(mtd, offset)) {
offset += blocksize;
} else {
char_ptr = &buf[amount_loaded];
- if (nand_read_skip_bad(nand_info[0], offset,
+ if (nand_read_skip_bad(mtd, offset,
&len, NULL,
- nand_info[0]->size, char_ptr))
+ mtd->size, char_ptr))
return 1;
offset += blocksize;
@@ -390,12 +399,12 @@ void env_relocate_spec(void)
ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
#if defined(CONFIG_ENV_OFFSET_OOB)
+ struct mtd_info *mtd = get_nand_dev_by_index(0);
/*
* If unable to read environment offset from NAND OOB then fall through
* to the normal environment reading code below
*/
- if (nand_info[0] && !get_nand_env_oob(nand_info[0],
- &nand_env_oob_offset)) {
+ if (mtd && !get_nand_env_oob(mtd, &nand_env_oob_offset)) {
printf("Found Environment offset in OOB..\n");
} else {
set_default_env("!no env offset in OOB");
--
2.10.1.dirty
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[U-Boot] [PATCH v2 06/15] cmd: jffs2: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko
---
cmd/jffs2.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/cmd/jffs2.c b/cmd/jffs2.c
index f00d53a..162c8fe 100644
--- a/cmd/jffs2.c
+++ b/cmd/jffs2.c
@@ -166,8 +166,9 @@ static int mtd_device_validate(u8 type, u8 num, u32 *size)
#endif
} else if (type == MTD_DEV_TYPE_NAND) {
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
- if (num < CONFIG_SYS_MAX_NAND_DEVICE) {
- *size = nand_info[num]->size;
+ struct mtd_info *mtd = get_nand_dev_by_index(num);
+ if (mtd) {
+ *size = mtd->size;
return 0;
}
@@ -244,7 +245,7 @@ static inline u32 get_part_sector_size_nand(struct mtdids
*id)
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
struct mtd_info *mtd;
- mtd = nand_info[id->num];
+ mtd = get_nand_dev_by_index(id->num);
return mtd->erasesize;
#else
--
2.10.1.dirty
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[U-Boot] [PATCH v2 05/15] cmd: bootm: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko
---
cmd/bootm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/bootm.c b/cmd/bootm.c
index 953a57d..daf15d9 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -465,7 +465,7 @@ static int do_imls_nand(void)
printf("\n");
for (nand_dev = 0; nand_dev < CONFIG_SYS_MAX_NAND_DEVICE; nand_dev++) {
- mtd = nand_info[nand_dev];
+ mtd = get_nand_dev_by_index(nand_dev);
if (!mtd->name || !mtd->size)
continue;
--
2.10.1.dirty
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[U-Boot] [PATCH v2 07/15] common: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko
---
common/fb_nand.c | 2 +-
common/splash_source.c | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/common/fb_nand.c b/common/fb_nand.c
index c8c79e9..3d027d4 100644
--- a/common/fb_nand.c
+++ b/common/fb_nand.c
@@ -59,7 +59,7 @@ static int fb_nand_lookup(const char *partname,
return -EINVAL;
}
- *mtd = nand_info[dev->id->num];
+ *mtd = get_nand_dev_by_index(dev->id->num);
return 0;
}
diff --git a/common/splash_source.c b/common/splash_source.c
index a5eeb3f..7c9b7b5 100644
--- a/common/splash_source.c
+++ b/common/splash_source.c
@@ -47,9 +47,10 @@ static int splash_sf_read_raw(u32 bmp_load_addr, int offset,
size_t read_size)
#ifdef CONFIG_CMD_NAND
static int splash_nand_read_raw(u32 bmp_load_addr, int offset, size_t
read_size)
{
- return nand_read_skip_bad(nand_info[nand_curr_device], offset,
+ struct mtd_info *mtd = get_nand_dev_by_index(nand_curr_device);
+ return nand_read_skip_bad(mtd, offset,
&read_size, NULL,
- nand_info[nand_curr_device]->size,
+ mtd->size,
(u_char *)bmp_load_addr);
}
#else
--
2.10.1.dirty
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[U-Boot] [PATCH v2 00/15] nand: device model bringup on am335x evm and am437x gpevm
This patch seires adds nand uclass driver and enables omap_gpmc to
adopt driver model. This has been tested on AM335x GP EVM and
AM437x GP EVM.
As preparation for introducing nand uclass driver the new API
get_nand_dev_by_index() was added to avoid direct acces to nand_info array and
u-boot core files were updated to use it.
Patches can be found at:
g...@git.ti.com:~gragst/ti-u-boot/gragsts-ti-u-boot.git dm-nand-v2
Test case1:
mmc rescan
fatload mmc 0 ${loadaddr} MLO1
nand erase.part
nand write ${loadaddr}
nand read 0x8400 0 ${filesize}
cmp ${loadaddr} 0x8400 ${filesize}
Test case2:
nand read $loadaddr NAND.kernel
nand read $fdtaddr NAND.u-boot-spl-os
run args_mmc
bootz ${loadaddr} - ${fdtaddr}
Changes in v2:
- series rebased on top of u-boot master
- added more patches to convert u-boot core files to use
get_nand_dev_by_index()
- nand uclass driver was simplified thanks to commits
17cb4b8 mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_data
b616d9b nand: Embed mtd_info in struct nand_chip
link on v1:
http://lists.denx.de/pipermail/u-boot/2016-April/250197.html
Grygorii Strashko (8):
cmd: bootm: fix build when CONFIG_CMD_IMLS_NAND
common: env_nand: use get_nand_dev_by_index()
dfu: dfu_nand: use get_nand_dev_by_index()
cmd: bootm: use get_nand_dev_by_index()
cmd: jffs2: use get_nand_dev_by_index()
common: use get_nand_dev_by_index()
fs: use get_nand_dev_by_index()
cmd: nand: remove direct access to struct mtd_info->priv
Mugunthan V N (7):
cmd: nand: abstract global variable usage for dm conversion
drivers: nand: implement a NAND uclass
drivers: nand: omap_gpmc: convert driver to adopt driver model
am43xx_evm: nand: do not define DM_NAND for spl
defconfig: am43xx_evm: enable NAND driver model
am335x_evm: nand: do not define DM_NAND for spl
defconfig: am335x_evm: enable NAND driver model
cmd/bootm.c| 6 +-
cmd/jffs2.c| 7 +-
cmd/nand.c | 69 --
common/env_nand.c | 33 ---
common/fb_nand.c | 2 +-
common/splash_source.c | 5 +-
configs/am335x_evm_defconfig | 1 +
configs/am43xx_evm_defconfig | 1 +
drivers/dfu/dfu_nand.c | 12 +--
drivers/mtd/nand/Kconfig | 10 ++
drivers/mtd/nand/Makefile | 2 +
drivers/mtd/nand/nand-uclass.c | 38
drivers/mtd/nand/nand.c| 40 ++--
drivers/mtd/nand/omap_gpmc.c | 212 -
fs/jffs2/jffs2_1pass.c | 9 +-
fs/jffs2/jffs2_nand_1pass.c| 6 +-
fs/yaffs2/yaffs_uboot_glue.c | 8 +-
include/configs/am335x_evm.h | 1 +
include/configs/am43xx_evm.h | 1 +
include/dm/uclass-id.h | 1 +
include/nand.h | 9 ++
21 files changed, 397 insertions(+), 76 deletions(-)
create mode 100644 drivers/mtd/nand/nand-uclass.c
--
2.10.1.dirty
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[U-Boot] [PATCH v2 15/15] defconfig: am335x_evm: enable NAND driver model
From: Mugunthan V N Enable NAND driver model for am335x_evm as omap_gpmc supports driver model. Signed-off-by: Mugunthan V N Signed-off-by: Grygorii Strashko --- configs/am335x_evm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index ab7b9aa..6f624e9 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -58,3 +58,4 @@ CONFIG_G_DNL_VENDOR_NUM=0x0451 CONFIG_G_DNL_PRODUCT_NUM=0xd022 CONFIG_RSA=y CONFIG_SPL_OF_LIBFDT=y +CONFIG_DM_NAND=y -- 2.10.1.dirty ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 02/15] cmd: nand: abstract global variable usage for dm conversion
From: Mugunthan V N
nand_info is used all over the file so abstract it with
get_nand_dev_by_index() which will help for DM conversion.
Signed-off-by: Mugunthan V N
Signed-off-by: Grygorii Strashko
---
cmd/nand.c | 69 +---
drivers/mtd/nand/nand.c | 23 +++
drivers/mtd/nand/omap_gpmc.c | 7 ++---
include/nand.h | 9 ++
4 files changed, 67 insertions(+), 41 deletions(-)
diff --git a/cmd/nand.c b/cmd/nand.c
index c16ec77..f2b440e 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c
@@ -115,20 +115,20 @@ free_dat:
static int set_dev(int dev)
{
- if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE || !nand_info[dev]) {
- puts("No such device\n");
- return -1;
- }
+ struct mtd_info *mtd = get_nand_dev_by_index(dev);
+
+ if (!mtd)
+ return -ENODEV;
if (nand_curr_device == dev)
return 0;
- printf("Device %d: %s", dev, nand_info[dev]->name);
+ printf("Device %d: %s", dev, mtd->name);
puts("... is now current device\n");
nand_curr_device = dev;
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
- board_nand_select_device(nand_info[dev]->priv, dev);
+ board_nand_select_device(mtd->priv, dev);
#endif
return 0;
@@ -188,7 +188,7 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const
argv[])
{
int ret;
uint32_t oob_buf[ENV_OFFSET_SIZE/sizeof(uint32_t)];
- struct mtd_info *mtd = nand_info[0];
+ struct mtd_info *mtd = get_nand_dev_by_index(0);
char *cmd = argv[1];
if (CONFIG_SYS_MAX_NAND_DEVICE == 0 || !mtd) {
@@ -213,9 +213,10 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char
*const argv[])
if (argc < 3)
goto usage;
+ mtd = get_nand_dev_by_index(idx);
/* We don't care about size, or maxsize. */
if (mtd_arg_off(argv[2], &idx, &addr, &maxsize, &maxsize,
- MTD_DEV_TYPE_NAND, nand_info[idx]->size)) {
+ MTD_DEV_TYPE_NAND, mtd->size)) {
puts("Offset or partition name expected\n");
return 1;
}
@@ -283,9 +284,14 @@ usage:
static void nand_print_and_set_info(int idx)
{
- struct mtd_info *mtd = nand_info[idx];
- struct nand_chip *chip = mtd_to_nand(mtd);
+ struct mtd_info *mtd;
+ struct nand_chip *chip;
+
+ mtd = get_nand_dev_by_index(idx);
+ if (!mtd)
+ return;
+ chip = mtd_to_nand(mtd);
printf("Device %d: ", idx);
if (chip->numchips > 1)
printf("%dx ", chip->numchips);
@@ -348,7 +354,7 @@ static void adjust_size_for_badblocks(loff_t *size, loff_t
offset, int dev)
/* We grab the nand info object here fresh because this is usually
* called after arg_off_size() which can change the value of dev.
*/
- struct mtd_info *mtd = nand_info[dev];
+ struct mtd_info *mtd = get_nand_dev_by_index(dev);
loff_t maxoffset = offset + *size;
int badblocks = 0;
@@ -397,10 +403,8 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
if (strcmp(cmd, "info") == 0) {
putc('\n');
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) {
- if (nand_info[i])
- nand_print_and_set_info(i);
- }
+ for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
+ nand_print_and_set_info(i);
return 0;
}
@@ -432,12 +436,11 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
* one before these commands can run, even if a partition specifier
* for another device is to be used.
*/
- if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE ||
- !nand_info[dev]) {
+ mtd = get_nand_dev_by_index(dev);
+ if (!mtd) {
puts("\nno devices available\n");
return 1;
}
- mtd = nand_info[dev];
if (strcmp(cmd, "bad") == 0) {
printf("\nDevice %d bad blocks:\n", dev);
@@ -496,13 +499,13 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
/* skip first two or three arguments, look for offset and size
*/
if (mtd_arg_off_size(argc - o, argv + o, &dev, &off, &size,
&maxsize, MTD_DEV_TYPE_NAND,
-nand_info[dev]->size) != 0)
+mtd->size) != 0)
return 1;
if (set_dev(dev))
return 1;
- mtd = nand_info[dev];
+ mtd = get_nand_dev_by_index(dev);
memset(&opts,
[U-Boot] [PATCH v2 14/15] am335x_evm: nand: do not define DM_NAND for spl
From: Mugunthan V N Since OMAP's spl doesn't support DM currently, do not define DM_NAND for spl build. Signed-off-by: Mugunthan V N Signed-off-by: Grygorii Strashko --- include/configs/am335x_evm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index d8e6ba3..7390015 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -287,6 +287,7 @@ #undef CONFIG_DM_MMC #undef CONFIG_TIMER #undef CONFIG_DM_USB +#undef CONFIG_DM_NAND #endif #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) -- 2.10.1.dirty ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 13/15] defconfig: am43xx_evm: enable NAND driver model
From: Mugunthan V N Enable NAND driver model for am43xx_evm as omap_gpmc supports driver model. Signed-off-by: Mugunthan V N Signed-off-by: Grygorii Strashko --- configs/am43xx_evm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 6fb2053..dcddb7d 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -74,3 +74,4 @@ CONFIG_G_DNL_MANUFACTURER="Texas Instruments" CONFIG_G_DNL_VENDOR_NUM=0x0403 CONFIG_G_DNL_PRODUCT_NUM=0xbd00 CONFIG_SPL_OF_LIBFDT=y +CONFIG_DM_NAND=y -- 2.10.1.dirty ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 12/15] am43xx_evm: nand: do not define DM_NAND for spl
From: Mugunthan V N Since OMAP's spl doesn't support DM currently, do not define DM_NAND for spl build. Signed-off-by: Mugunthan V N Signed-off-by: Grygorii Strashko --- include/configs/am43xx_evm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 1d622ef..2f026c6 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -115,6 +115,7 @@ #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_TIMER +#undef CONFIG_DM_NAND #endif #ifndef CONFIG_SPL_BUILD -- 2.10.1.dirty ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 09/15] cmd: nand: remove direct access to struct mtd_info->priv
Replace direct access to struct mtd_info->priv with proper accessor mtd_to_nand(). Signed-off-by: Grygorii Strashko --- cmd/nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/nand.c b/cmd/nand.c index f2b440e..d9de978 100644 --- a/cmd/nand.c +++ b/cmd/nand.c @@ -128,7 +128,7 @@ static int set_dev(int dev) nand_curr_device = dev; #ifdef CONFIG_SYS_NAND_SELECT_DEVICE - board_nand_select_device(mtd->priv, dev); + board_nand_select_device(mtd_to_nand(mtd), dev); #endif return 0; -- 2.10.1.dirty ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 10/15] drivers: nand: implement a NAND uclass
From: Mugunthan V N
Implement a NAND uclass so that the NAND devices can be
accessed via the DM framework.
Signed-off-by: Mugunthan V N
Signed-off-by: Grygorii Strashko
---
drivers/mtd/nand/Kconfig | 10 ++
drivers/mtd/nand/Makefile | 2 ++
drivers/mtd/nand/nand-uclass.c | 38 ++
drivers/mtd/nand/nand.c| 17 +++--
include/dm/uclass-id.h | 1 +
5 files changed, 66 insertions(+), 2 deletions(-)
create mode 100644 drivers/mtd/nand/nand-uclass.c
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 65bb040..a96b646 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -1,5 +1,15 @@
menu "NAND Device Support"
+config DM_NAND
+ bool "Enable driver model for NAND"
+ depends on DM
+ help
+ Enable driver model for NAND. The NAND interface is then
+ implemented by the NAND uclass. Multiple NAND devices can
+ be attached and used. The 'nand' command works as normal.
+
+ If the NAND drivers doesn't support DM, say N.
+
config SYS_NAND_SELF_INIT
bool
help
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index fd4bb66..83a986a 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -38,6 +38,8 @@ endif # not spl
ifdef NORMAL_DRIVERS
+obj-$(CONFIG_DM_NAND) += nand-uclass.o
+
obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
diff --git a/drivers/mtd/nand/nand-uclass.c b/drivers/mtd/nand/nand-uclass.c
new file mode 100644
index 000..403c363
--- /dev/null
+++ b/drivers/mtd/nand/nand-uclass.c
@@ -0,0 +1,38 @@
+/*
+ * NAND uclass driver for NAND bus.
+ *
+ * (C) Copyright 2017
+ * Texas Instruments Incorporated,
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct mtd_info *get_nand_dev_by_index(int idx)
+{
+ struct nand_chip *chip;
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device(UCLASS_NAND, idx, &dev);
+ if (ret) {
+ debug("NAND device (%d) not found\n", idx);
+ return NULL;
+ }
+
+ chip = (struct nand_chip *)dev_get_priv(dev);
+
+ return nand_to_mtd(chip);
+}
+
+UCLASS_DRIVER(nand) = {
+ .id = UCLASS_NAND,
+ .name = "nand",
+ .flags = DM_UC_FLAG_SEQ_ALIAS,
+};
diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c
index 18c346a..408b7ef 100644
--- a/drivers/mtd/nand/nand.c
+++ b/drivers/mtd/nand/nand.c
@@ -21,7 +21,7 @@ int nand_curr_device = -1;
struct mtd_info *nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
-#ifndef CONFIG_SYS_NAND_SELF_INIT
+#if !defined(CONFIG_SYS_NAND_SELF_INIT) && !defined(CONFIG_DM_NAND)
static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] =
CONFIG_SYS_NAND_BASE_LIST;
#endif
@@ -30,6 +30,7 @@ static char dev_name[CONFIG_SYS_MAX_NAND_DEVICE][8];
static unsigned long total_nand_size; /* in kiB */
+#ifndef CONFIG_DM_NAND
struct mtd_info *get_nand_dev_by_index(int dev)
{
if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE ||
@@ -40,6 +41,7 @@ struct mtd_info *get_nand_dev_by_index(int dev)
return nand_info[dev];
}
+#endif
int nand_mtd_to_devnum(struct mtd_info *mtd)
{
@@ -59,8 +61,9 @@ int nand_register(int devnum, struct mtd_info *mtd)
if (devnum >= CONFIG_SYS_MAX_NAND_DEVICE)
return -EINVAL;
+#if !defined(CONFIG_SYS_NAND_SELF_INIT) && !defined(CONFIG_DM_NAND)
nand_info[devnum] = mtd;
-
+#endif
sprintf(dev_name[devnum], "nand%d", devnum);
mtd->name = dev_name[devnum];
@@ -83,18 +86,28 @@ int nand_register(int devnum, struct mtd_info *mtd)
#ifndef CONFIG_SYS_NAND_SELF_INIT
static void nand_init_chip(int i)
{
+#ifndef CONFIG_DM_NAND
struct nand_chip *nand = &nand_chip[i];
struct mtd_info *mtd = nand_to_mtd(nand);
ulong base_addr = base_address[i];
+#else
+ struct mtd_info *mtd;
+#endif
int maxchips = CONFIG_SYS_NAND_MAX_CHIPS;
if (maxchips < 1)
maxchips = 1;
+#ifdef CONFIG_DM_NAND
+ mtd = get_nand_dev_by_index(i);
+ if (!mtd)
+ return;
+#else
nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr;
if (board_nand_init(nand))
return;
+#endif
if (nand_scan(mtd, maxchips))
return;
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 8c92d0b..6556dc8 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -49,6 +49,7 @@ enum uclass_id {
UCLASS_MMC, /* SD / MMC card or chip */
UCLASS_MOD_EXP, /* RSA Mod Exp device */
UCLASS_MTD, /* Memory Technology Device (MTD) device */
+
Re: [U-Boot] [PATCH] ARM: dts: k2*: Rename the k2* files to keystone-k2* files
On Tue, Jan 31, 2017 at 09:32:57AM +0530, Lokesh Vutla wrote:
> As reported in [1], rename the k2* dts files to keystone-* files
> this will force consistency throughout.
>
> Script for the same (and hand modified for Makefile and config
> files):
> for i in arch/arm/dts/k2*
> do
> b=`basename $i`;
> git mv $i arch/arm/dts/keystone-$b;
> sed -i -e "s/$b/keystone-$b/g" arch/arm/dts/*[si]
> done
>
> This is similar to linux kernel commit 5edafc29829bc ("ARM: dts: k2*: Rename
> the k2* files to keystone-k2* files")
>
> [1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2
>
> Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
--
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Re: [U-Boot] [u-boot PATCH v2 8/8] ti: common: board_detect: Rename EEPROM scratch start macro
On Mon, Jan 30, 2017 at 05:15:16PM +0200, Roger Quadros wrote: > From: Lokesh Vutla > > Non OMAP platforms i.e. Keystone will also need to use the board > EEPROM helpers so let's make the macro platform independent. > > Signed-off-by: Roger Quadros > Signed-off-by: Lokesh Vutla Reviewed-by: Tom Rini -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 01/15] cmd: bootm: fix build when CONFIG_CMD_IMLS_NAND
Now when CONFIG_CMD_IMLS_NAND is enabled the u-boot build will fail,
because nand_read_skip_bad() function has been changed to accept more
parameters, hence fix it.
CC cmd/bootm.o
cmd/bootm.c: In function 'nand_imls_legacyimage':
cmd/bootm.c:390:8: error: too few arguments to function 'nand_read_skip_bad'
ret = nand_read_skip_bad(mtd, off, &len, imgdata);
^
In file included from cmd/bootm.c:18:0:
include/nand.h:101:5: note: declared here
int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length,
^
LD drivers/block/built-in.o
Signed-off-by: Grygorii Strashko
---
cmd/bootm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/cmd/bootm.c b/cmd/bootm.c
index a7e181d..953a57d 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -390,7 +390,7 @@ static int nand_imls_legacyimage(struct mtd_info *mtd, int
nand_dev,
return -ENOMEM;
}
- ret = nand_read_skip_bad(mtd, off, &len, imgdata);
+ ret = nand_read_skip_bad(mtd, off, &len, NULL, mtd->size, imgdata);
if (ret < 0 && ret != -EUCLEAN) {
free(imgdata);
return ret;
@@ -430,7 +430,7 @@ static int nand_imls_fitimage(struct mtd_info *mtd, int
nand_dev, loff_t off,
return -ENOMEM;
}
- ret = nand_read_skip_bad(mtd, off, &len, imgdata);
+ ret = nand_read_skip_bad(mtd, off, &len, NULL, mtd->size, imgdata);
if (ret < 0 && ret != -EUCLEAN) {
free(imgdata);
return ret;
--
2.10.1.dirty
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[U-Boot] [PATCH v2 04/15] dfu: dfu_nand: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko
---
drivers/dfu/dfu_nand.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 23f1571..97cd608 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -37,15 +37,15 @@ static int nand_block_op(enum dfu_op op, struct dfu_entity
*dfu,
lim = dfu->data.nand.start + dfu->data.nand.size - start;
count = *len;
+ mtd = get_nand_dev_by_index(nand_curr_device);
+
if (nand_curr_device < 0 ||
nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
- !nand_info[nand_curr_device]) {
+ !mtd) {
printf("%s: invalid nand device\n", __func__);
return -1;
}
- mtd = nand_info[nand_curr_device];
-
if (op == DFU_OP_READ) {
ret = nand_read_skip_bad(mtd, start, &count, &actual,
lim, buf);
@@ -143,18 +143,16 @@ static int dfu_flush_medium_nand(struct dfu_entity *dfu)
/* in case of ubi partition, erase rest of the partition */
if (dfu->data.nand.ubi) {
- struct mtd_info *mtd;
+ struct mtd_info *mtd = get_nand_dev_by_index(nand_curr_device);
nand_erase_options_t opts;
if (nand_curr_device < 0 ||
nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
- !nand_info[nand_curr_device]) {
+ !mtd) {
printf("%s: invalid nand device\n", __func__);
return -1;
}
- mtd = nand_info[nand_curr_device];
-
memset(&opts, 0, sizeof(opts));
off = dfu->offset;
if ((off & (mtd->erasesize - 1)) != 0) {
--
2.10.1.dirty
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Re: [U-Boot] [u-boot PATCH v2 2/8] ti: common: board_detect: commodify ethaddr environment setting code
On Mon, Jan 30, 2017 at 05:15:10PM +0200, Roger Quadros wrote: > Keystone and OMAP platforms will need this to set ethernet > MAC addresses from board EEPROM. > > Signed-off-by: Roger Quadros Reviewed-by: Tom Rini -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 08/15] fs: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko
---
fs/jffs2/jffs2_1pass.c | 9 +++--
fs/jffs2/jffs2_nand_1pass.c | 6 +-
fs/yaffs2/yaffs_uboot_glue.c | 8 ++--
3 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index ed60c5b..4c6dfbf 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -175,10 +175,15 @@ static u32 nand_cache_off = (u32)-1;
static int read_nand_cached(u32 off, u32 size, u_char *buf)
{
struct mtdids *id = current_part->dev->id;
+ struct mtd_info *mtd;
u32 bytes_read = 0;
size_t retlen;
int cpy_bytes;
+ mtd = get_nand_dev_by_index(id->num);
+ if (!mtd)
+ return -1;
+
while (bytes_read < size) {
if ((off + bytes_read < nand_cache_off) ||
(off + bytes_read >= nand_cache_off+NAND_CACHE_SIZE)) {
@@ -195,8 +200,8 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
}
retlen = NAND_CACHE_SIZE;
- if (nand_read(nand_info[id->num], nand_cache_off,
- &retlen, nand_cache) != 0 ||
+ if (nand_read(mtd, nand_cache_off,
+ &retlen, nand_cache) != 0 ||
retlen != NAND_CACHE_SIZE) {
printf("read_nand_cached: error reading nand
off %#x size %d bytes\n",
nand_cache_off,
NAND_CACHE_SIZE);
diff --git a/fs/jffs2/jffs2_nand_1pass.c b/fs/jffs2/jffs2_nand_1pass.c
index d94c48f..1d63fc9 100644
--- a/fs/jffs2/jffs2_nand_1pass.c
+++ b/fs/jffs2/jffs2_nand_1pass.c
@@ -796,7 +796,11 @@ jffs2_1pass_build_lists(struct part_info * part)
u32 counterN = 0;
struct mtdids *id = part->dev->id;
- mtd = nand_info[id->num];
+ mtd = get_nand_dev_by_index(id->num);
+ if (!mtd) {
+ error("\nno NAND devices available\n");
+ return 0;
+ }
/* if we are building a list we need to refresh the cache. */
jffs_init_1pass_list(part);
diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c
index 25aa6d1..347424e 100644
--- a/fs/yaffs2/yaffs_uboot_glue.c
+++ b/fs/yaffs2/yaffs_uboot_glue.c
@@ -166,11 +166,15 @@ void cmd_yaffs_devconfig(char *_mp, int flash_dev,
char *mp = NULL;
struct nand_chip *chip;
+ mtd = get_nand_dev_by_index(flash_dev);
+ if (!mtd) {
+ error("\nno NAND devices available\n");
+ return;
+ }
+
dev = calloc(1, sizeof(*dev));
mp = strdup(_mp);
- mtd = nand_info[flash_dev];
-
if (!dev || !mp) {
/* Alloc error */
printf("Failed to allocate memory\n");
--
2.10.1.dirty
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Re: [U-Boot] [PATCH 4/5][v7] arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
On 01/31/2017 01:27 AM, Prabhakar Kushwaha wrote: > Enable ELBC from Kconfig. > > Signed-off-by: Prabhakar Kushwaha > --- > Changes for v5: Added first time in the patch set > Changes for v6: Sending as it is > Changes for v7: Fix compiliation error > > arch/powerpc/cpu/mpc85xx/Kconfig| 20 > include/configs/MPC8536DS.h | 1 - > include/configs/MPC8569MDS.h| 2 -- > include/configs/MPC8572DS.h | 1 - > include/configs/P1022DS.h | 1 - > include/configs/P1023RDB.h | 1 - > include/configs/P2041RDB.h | 1 - > include/configs/UCP1020.h | 1 - > include/configs/controlcenterd.h| 1 - > include/configs/corenet_ds.h| 1 - > include/configs/cyrus.h | 1 - > include/configs/ids8313.h | 2 -- > include/configs/km/kmp204x-common.h | 1 - > include/configs/p1_p2_rdb_pc.h | 1 - > include/configs/p1_twr.h| 1 - > include/configs/xpedite537x.h | 1 - > include/configs/xpedite550x.h | 1 - > 17 files changed, 20 insertions(+), 18 deletions(-) > Prabhakar, You moved CONFIG_FSL_ELBC to Kconfig for mpc85xx, but you didn't move it for 83xx, and you removed it from ids8313. This causes error for ids8313. Please check. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] fsl-lsch3: rename ls2080a_stream_id.h to stream_id_lsch3.h
> From: U-Boot on behalf of Bharat Bhushan > > Sent: Monday, January 30, 2017 12:43 PM > To: york sun; Z.Q. Hou; M.H. Lian; u-boot@lists.denx.de > Cc: albert.u.b...@aribaud.net > Subject: [U-Boot] [PATCH 1/3] fsl-lsch3: rename ls2080a_stream_id.h to > stream_id_lsch3.h > > The stream ID allocation for Chasis3.0 devices, s/Chasis/Chassis > LS1088, LS2088 and LS2080, can be shared. > > This patch renames this accordingly. > > Signed-off-by: Bharat Bhushan > --- > .../asm/arch-fsl-layerscape/ls2080a_stream_id.h| 77 > -- > .../asm/arch-fsl-layerscape/stream_id_lsch3.h | 77 > ++ > include/configs/ls2080a_common.h | 2 +- > 3 files changed, 78 insertions(+), 78 deletions(-) > delete mode 100644 > arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h > create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h > > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h > b/arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h > deleted file mode 100644 > index ee28323..000 > --- a/arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h > +++ /dev/null > @@ -1,77 +0,0 @@ > -/* > - * Copyright 2014 Freescale Semiconductor, Inc. > - * > - * SPDX-License-Identifier:GPL-2.0+ > - * > - */ > -#ifndef __FSL_STREAM_ID_H > -#define __FSL_STREAM_ID_H > - > -/* > - * Stream IDs on ls2080a devices are not hardwired and are > - * programmed by sw. There are a limited number of stream IDs > - * available, and the partitioning of them is scenario dependent. > - * This header defines the partitioning between legacy, PCI, > - * and DPAA2 devices. > - * > - * This partitioning can be customized in this file depending > - * on the specific hardware config: > - * > - * -non-PCI legacy, platform devices (USB, SD/MMC, SATA, DMA) > - * -all legacy devices get a unique stream ID assigned and programmed in > - * their AMQR registers by u-boot > - * > - * -PCIe > - * -there is a range of stream IDs set aside for PCI in this > - * file. U-boot will scan the PCI bus and for each device discovered: > - * -allocate a streamID > - * -set a PEXn LUT table entry mapping 'requester ID' to 'stream ID' > - * -set a msi-map entry in the PEXn controller node in the > - * device tree (see > Documentation/devicetree/bindings/pci/pci-msi.txt > - * for more info on the msi-map definition) > - * > - * -DPAA2 > - * -u-boot will allocate a range of stream IDs to be used by the > Management > - * Complex for containers and will set these values in the MC DPC image. > - * -the MC is responsible for allocating and setting up 'isolation > context > - * IDs (ICIDs) based on the allocated stream IDs for all DPAA2 devices. > - * > - * On ls2080a SoCs stream IDs are programmed in AMQ registers (32-bits) for > - * each of the different bus masters. The relationship between > - * the AMQ registers and stream IDs is defined in the table below: > - * AMQ bitstreamID bit > - * --- > - * PL[18] 9// privilege bit > - * BMT[17] 8// bypass translation > - * VA[16] 7// reserved > - * [15] -// unused > - * ICID[14:7] -// unused > - * ICID[6:0]6-0 // isolation context id > - * > - * > - */ > - > -#define AMQ_PL_MASK(0x1 << 18) /* priviledge bit */ > -#define AMQ_BMT_MASK (0x1 << 17) /* bypass bit */ > - > -#define FSL_INVALID_STREAM_ID 0 > - > -#define FSL_BYPASS_AMQ (AMQ_PL_MASK | AMQ_BMT_MASK) > - > -/* legacy devices */ > -#define FSL_USB1_STREAM_ID 1 > -#define FSL_USB2_STREAM_ID 2 > -#define FSL_SDMMC_STREAM_ID3 > -#define FSL_SATA1_STREAM_ID4 > -#define FSL_SATA2_STREAM_ID5 > -#define FSL_DMA_STREAM_ID 6 > - > -/* PCI - programmed in PEXn_LUT */ > -#define FSL_PEX_STREAM_ID_START7 > -#define FSL_PEX_STREAM_ID_END 22 > - > -/* DPAA2 - set in MC DPC and alloced by MC */ > -#define FSL_DPAA2_STREAM_ID_START 23 > -#define FSL_DPAA2_STREAM_ID_END63 > - > -#endif > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h > b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h > new file mode 100644 > index 000..ee28323 > --- /dev/null > +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h > @@ -0,0 +1,77 @@ > +/* > + * Copyright 2014 Freescale Semiconductor, Inc. > + * > + * SPDX-License-Identifier:GPL-2.0+ > + * > + */ > +#ifndef __FSL_STREAM_ID_H > +#define __FSL_STREAM_ID_H > + > +/* > + * Stream IDs on ls2080a devices are not hardwired and are Why do we keep the references to ls2080a device if this
Re: [U-Boot] [PATCH 2/3] pcie-layerscape: Define stream-ids for Layerscape Chasis-2
> From: U-Boot on behalf of Bharat Bhushan > > Sent: Monday, January 30, 2017 12:43 PM > To: york sun; Z.Q. Hou; M.H. Lian; u-boot@lists.denx.de > Cc: albert.u.b...@aribaud.net > Subject: [U-Boot] [PATCH 2/3] pcie-layerscape: Define stream-ids for > Layerscape Chasis-2 > > Layerscape Chasis-2 have PCIe device, some platform devices and > DPAA1 devices which will use stream-ids for iommu level isolation > as they lies behind SMMU. > > This patch defines the stream-ids for Chasis-2 devices. > stream-ids for DPAA1 are reserved for future use. > > Signed-off-by: Bharat Bhushan > --- > .../asm/arch-fsl-layerscape/stream_id_lsch2.h | 60 > ++ > include/configs/ls1043a_common.h | 1 + > 2 files changed, 61 insertions(+) > create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h > > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h > b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h > new file mode 100644 > index 000..bdfed83 > --- /dev/null > +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h > @@ -0,0 +1,60 @@ > +/* > + * Copyright 2017 NXP Semiconductor, Inc. > + * > + * SPDX-License-Identifier:GPL-2.0+ > + * > + */ > +#ifndef __FSL_STREAM_ID_H > +#define __FSL_STREAM_ID_H > + > +/* > + * Stream IDs on ls1043a devices are not hardwired and are > + * programmed by sw. There are a limited number of stream IDs > + * available, and the partitioning of them is scenario dependent. > + * This header defines the partitioning between legacy, PCI, > + * and DPAA1 devices. > + * > + * This partitioning can be customized in this file depending > + * on the specific hardware config: > + * > + * -non-PCI legacy, platform devices (USB, SDHC, SATA, DMA, QE etc) > + * -all legacy devices get a unique stream ID assigned and programmed in > + * their AMQR registers by u-boot > + * > + * -PCIe > + * -there is a range of stream IDs set aside for PCI in this > + * file. U-boot will scan the PCI bus and for each device discovered: > + * -allocate a streamID > + * -set a PEXn LUT table entry mapping 'requester ID' to 'stream ID' > + * -set a msi-map entry in the PEXn controller node in the > + * device tree (see > Documentation/devicetree/bindings/pci/pci-msi.txt > + * for more info on the msi-map definition) > + * > + * -DPAA1 > + * - Stream ids for DPAA1 use are reserved for future usecase. > + * > + */ > + > + > +#define FSL_INVALID_STREAM_ID 0 > + > +/* legacy devices */ > +#define FSL_USB1_STREAM_ID 1 > +#define FSL_USB2_STREAM_ID 2 > +#define FSL_USB3_STREAM_ID 3 > +#define FSL_SDHC_STREAM_ID 4 > +#define FSL_SATA_STREAM_ID 5 > +#define FSL_QE_STREAM_ID 6 > +#define FSL_QDMA_STREAM_ID 7 > +#define FSL_EDMA_STREAM_ID 8 > +#define FSL_ETR_STREAM_ID 9 > + > +/* PCI - programmed in PEXn_LUT */ > +#define FSL_PEX_STREAM_ID_START11 > +#define FSL_PEX_STREAM_ID_END 26 > + > +/* DPAA1 - Stream-ID that can be programmed in DPAA1 h/w */ > +#define FSL_DPAA1_STREAM_ID_START 27 > +#define FSL_DPAA1_STREAM_ID_END63 > + > +#endif > diff --git a/include/configs/ls1043a_common.h > b/include/configs/ls1043a_common.h > index aa2b6f1..eee6fad 100644 > --- a/include/configs/ls1043a_common.h > +++ b/include/configs/ls1043a_common.h > @@ -13,6 +13,7 @@ > #define CONFIG_MP > #define CONFIG_GICV2 > > +#include Since the following patch 3/3 enables LUT for all Chassis 2.0 devices, this definition should be included and validated for the other devices too: LS1046A, LS1012A, LS1021A. > #include > > /* Link Definitions */ > -- > 1.9.3 > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists.denx.de%2Fmailman%2Flistinfo%2Fu-boot&data=01%7C01%7Cmike.caraman%40nxp.com%7C5b4875265c7348d80f7a08d449aea415%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0&sdata=Pqm0QAUf%2Bizcqz%2FzzZjHMELGZjrWLuK0xbPI%2FcNNwiA%3D&reserved=0 -Mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot] AR8033 SerDes Test and System Mode Control setting issue
> -Original Message-
> From: Sekhar Nori [mailto:nsek...@ti.com]
> Sent: Tuesday, January 17, 2017 3:23 AM
> To: Ken.Lin; joe.hershber...@ni.com
> Cc: Peter.Stretz; mugunthan...@ti.com; Peter.Chiang; Chiming.Lee; u-
> b...@lists.denx.de; albert.u.ub...@aribaud.net; w...@denx.de
> Subject: Re: [u-boot] AR8033 SerDes Test and System Mode Control setting issue
>
> Hi Ken Lin,
>
> On Tuesday 17 January 2017 03:44 AM, Ken.Lin wrote:
> > Hi Joe and Mugunthan,
> >
> > We encountered the voltage peak issue while doing the IEEE PHY conformance
> test, which has to do with the AR8033 register (SetDes Test and System Mode
> Control) setting in u-boot.
> > In your commit change info, you tried to enable tx clock delay by setting
> > bit 8
> to 1 (filling in 0x100, setting the reserved bits to 0) for solving the auto
> negotiation failure issue.
> > https://patchwork.ozlabs.org/patch/681801/
> >
> > After we checked with Qualcomm (Atheros) and they responded that on their
> platform, the register should be set to 0x2C47 (for the reserved bits) and
> this
> would solve the voltage peak issue we experienced.
> > Could you please help check if it's appropriate to set the reserved bits
> according to Qualcomm's setting since your commit breaks the original setting
> (see https://community.nxp.com/message/868898 for more details info)?
> > Please let me know if you have any suggestions/comments on this.
>
> I guess the right thing to do would be to readback this registers, modify
> only bit
> 8 and write the value back.
>
> Is that something you can try? You can check that the value you read back for
> the reserved bits is indeed what Qualcomm recommends you to set.
>
I added some code statements following your source to read back the register
setting then to apply the reserved bit settings used in the NXP u-boot codebase.
If you have no objections on this fix (the register turned out to set be 0x3D47
and it passed the PHY conformance test), I'll submit it as a RFC patch.
@@ -28,6 +28,8 @@ static int ar8021_config(struct phy_device *phydev)
static int ar8031_config(struct phy_device *phydev)
{
+ int regval;
+
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
@@ -44,6 +46,10 @@ static int ar8031_config(struct phy_device *phydev)
AR803x_RGMII_RX_CLK_DLY);
}
+phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
AR803x_DEBUG_REG_5);
+regval = phy_read(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG);
+phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG, regval |
0x3C47);
+
phydev->supported = phydev->drv->features;
genphy_config_aneg(phydev);
Thanks,
Ken Lin
> Thanks,
> Sekhar
>
> --
> This message has been scanned for viruses and dangerous content by
> MailScanner, and is believed to be clean.
--
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dangerous content by MailScanner, and is
believed to be clean.
0001-drivers-net-phy-atheros-apply-the-previous-register-.patch
Description: 0001-drivers-net-phy-atheros-apply-the-previous-register-.patch
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Re: [U-Boot] [RFC] cmd: fdt: memory fixup
On Tue, Jan 31, 2017 at 03:35:51AM +0100, Ladislav Michl wrote: > To get Falcon mode working with zImage is currently non trivial as zImages > do not fit into U-Boot's image concept too well. Fortunately at least for > ARM boards it seems getting memory node right is quite sufficient. > What about changing 'fdt memory' command to update memory node according to > detected memory layout when called without parameters? Looked at other (!arm) platforms implementation... Does not seem like good idea anymore. What about adding posibility to call ft_arch_fixup? Other ideas? Thank you, ladis ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Please pull u-boot-mmc master
Dear Tom, Could you pull these patches on your master branch? I have tested a buildman with all case. The following changes since commit 794c6e2c96c20f8fc62890a5e13cc71ab99a2e57: Prepare v2017.03-rc1 (2017-01-30 19:05:43 -0500) are available in the git repository at: http://git.denx.de/u-boot-mmc.git master for you to fetch changes up to dd3b64eb56dae10016bd314e59a650da511c1a4e: mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL (2017-01-31 21:50:47 +0900) Masahiro Yamada (7): mmc: move CONFIG_GENERIC_MMC to Kconfig mmc: sandbox: rename CONFIG, fix dependency, and use it in Makefile mmc: zynq: rename CONFIG_ZYNQ_SDHCI to CONFIG_MMC_SDHCI_ZYNQ mmc: rockchip: rename CONFIG_ROCKCHIP_SDHCI to CONFIG_MMC_SDHCI_ROCKCHIP mmc: msm: rename CONFIG_MSM_SDHCI to CONFIG_MMC_SDHCI_MSM mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32 mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL README | 3 - arch/arm/mach-zynq/Kconfig | 2 +- configs/blanche_defconfig| 3 +- configs/dragonboard410c_defconfig| 2 +- configs/evb-rk3399_defconfig | 2 +- configs/pic32mzdask_defconfig| 2 +- configs/sama5d2_xplained_mmc_defconfig | 2 +- configs/sama5d2_xplained_spiflash_defconfig | 2 +- configs/sandbox_defconfig| 2 +- configs/sandbox_noblk_defconfig | 1 + configs/sandbox_spl_defconfig| 2 +- configs/topic_miami_defconfig| 2 +- configs/topic_miamiplus_defconfig| 2 +- configs/xilinx_zynqmp_ep_defconfig | 2 +- configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 +- configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 +- configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 2 +- configs/xilinx_zynqmp_zcu102_defconfig | 2 +- configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 +- configs/zynq_microzed_defconfig | 2 +- configs/zynq_picozed_defconfig | 2 +- configs/zynq_zc702_defconfig | 2 +- configs/zynq_zc706_defconfig | 2 +- configs/zynq_zc770_xm010_defconfig | 2 +- configs/zynq_zed_defconfig | 2 +- configs/zynq_zybo_defconfig | 2 +- doc/README.atmel_mci | 2 - doc/README.socfpga | 3 - drivers/mmc/Kconfig | 96 +--- drivers/mmc/Makefile | 16 ++-- include/configs/BSC9132QDS.h | 1 - include/configs/MPC8308RDB.h | 2 - include/configs/MPC837XEMDS.h| 1 - include/configs/MPC837XERDB.h| 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8569MDS.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P1022DS.h| 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xQDS.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240QDS.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/UCP1020.h| 1 - include/configs/adp-ag101p.h | 1 - include/configs/advantech_dms-ba16.h | 1 - include/configs/alt.h| 2 - include/configs/am3517_crane.h | 1 - include/configs/am3517_evm.h | 3 - include/configs/apalis_imx6.h| 1 - include/configs/apalis_t30.h | 3 - include/configs/apf27.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9m10g45ek.h | 1 - include/configs/at91sam9n12ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/at91sam9x5ek.h | 1 - include/configs/atngw100.h | 1 - include/configs/atngw100mkii.h | 1 - include/configs/atstk1002.h | 1 - include/configs/axs10x.h | 5 -- include/configs/bayleybay.h | 2 - include/configs/bcm23550_w1d.h | 2 - include/configs/bcm28155_
[U-Boot] [PATCH v3 00/13] sunxi: Allwinner H5 and OrangePi PC2 support
Hi, some small changes as requested by reviewers (many thanks for that!) Maxime, Jagan, given I get some ACKs or RBs on the remaining patches, is this good to go for 2017.03 still? Cheers, Andre. -- This series introduces support for the Allwinner H5 SoC with four Cortex-A53 cores. The SoC's peripherals are very similar to the H3, although the cores and the BROM/SRAM layout resembles the A64. The first 8 patches contain some fixes and refactoring, to make code sharing between the three mentioned SoCs easier. Patch 09/13 adds support for the H5 DRAM controller, by extending the already existing combined H3/A64 DRAM code. Patch 10/13 renames the existing CONFIG_MACH_SUN8I_H3 config symbol to let it be used by all peripheral code that can be shared between the H3 and H5. Patch 11/13 introduces the H5 SoC config option into Kconfig, which defines this shared symbol as well. Patch 12/13 adds an easy device tree, which actually uses the H3 .dtsi and overwrites nodes which are different. This is good enough for U-Boot, the DT will be changed anyway once we get the DT merged into the Linux kernel. The final patch then adds the defconfig for the OrangePi PC2 board. Since this board comes with soldered SPI flash, we enable support for it in the SPL. This has been tested by writing the SPI flash with some special sunxi-fel version. The BROM loaded and executed the SPL, which in turn loaded and executed U-Boot proper. Both parts are 64-bit only for now. Ethernet support is enabled, but fails at the moment since the EMAC driver does not support setting a GPIO to enable the external Gigabit PHY. At the moment this build suffers from the same problem as the A64: the ATF is missing, so Linux won't boot easily. With the RFC version of the SPL FIT extension series on the list, applied on top of this one this should now be solved. This series is on top of origin/master. Please have a look and let me know your opinion! Cheers, Andre. Changelog v2..v3: - Adding ACKs and RBs - remove not needed CONFIG_MACH_SUN50I_H5_64 - move ARM_CORTEX_CPU_IS_UP to arch/arm/Kconfig Changelog v1..v2: - Adding Maxime's ACKs - new patch 2 and 3 to rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY - renaming CONFIG symbol name for single core SoCs - fixing one checkpatch issue (some are left, though) - mentioning methodology and reason for missing data in DRAM driver - renaming shared config symbol to CONFIG_MACH_SUNXI_H3_H5 - updated to lastest origin/master Andre Przywara (13): sunxi: fix ACTLR.SMP assembly routine ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY fsl: ls102x: remove redundant GENERIC_TIMER_CLK sunxi: simplify ACTLR.SMP bit set #ifdef sunxi: configs: merge sun9i and sun50i SPL memory definitions sunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM sunxi: provide ARMv8 mem_map for every ARM64 board SPI: SPL: sunxi: fix 64-bit build sunxi: DRAM: add Allwinner H5 support sunxi: prepare for sharing MACH_SUN8I_H3 config symbol sunxi: introduce Allwinner H5 config option sunxi: dts: add basic OrangePi PC 2 device tree file sunxi: configs: add basic OrangePi PC 2 defconfig arch/arm/Kconfig | 4 + arch/arm/cpu/armv7/ls102xa/psci.S | 2 +- arch/arm/cpu/armv7/ls102xa/timer.c| 2 +- arch/arm/cpu/armv7/nonsec_virt.S | 4 +- arch/arm/cpu/armv7/sunxi/psci.c | 2 +- arch/arm/dts/Makefile | 2 + arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 147 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 4 +- arch/arm/include/asm/arch-sunxi/cpu.h | 1 + arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 +- arch/arm/include/asm/arch-sunxi/dram.h| 2 +- arch/arm/include/asm/arch-sunxi/spl.h | 2 +- arch/arm/mach-sunxi/Makefile | 2 +- arch/arm/mach-sunxi/board.c | 12 +-- arch/arm/mach-sunxi/clock_sun6i.c | 6 +- arch/arm/mach-sunxi/cpu_info.c| 2 + arch/arm/mach-sunxi/dram_sun8i_h3.c | 97 ++--- arch/arm/mach-sunxi/usb_phy.c | 4 +- board/sunxi/Kconfig | 28 - board/sunxi/MAINTAINERS | 5 + board/sunxi/board.c | 6 +- configs/orangepi_pc2_defconfig| 16 +++ drivers/mtd/spi/Kconfig | 2 +- drivers/mtd/spi/sunxi_spi_spl.c | 16 +-- drivers/net/sun8i_emac.c | 2 +- drivers/power/Kconfig | 4 +- drivers/usb/host/ehci-sunxi.c | 2 +- include/configs/exynos-common.h | 2 +- include/configs/ls1021aiot.h | 7 +- include/configs/ls1021aqds.h | 7 +- include/configs/ls1021atwr.h | 7 +- include/configs/mx7_common.h | 2 +- inc
[U-Boot] [PATCH v3 02/13] ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY
Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the
frequency of the ARM Generic Timer (aka. arch timer).
ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same
purpose. It seems useful to unify them.
Since there are less occurences of the latter version, lets convert all
users over to COUNTER_FREQUENCY.
Signed-off-by: Andre Przywara
Reviewed-by: York Sun
---
arch/arm/cpu/armv7/nonsec_virt.S | 4 ++--
arch/arm/cpu/armv7/sunxi/psci.c | 2 +-
board/sunxi/board.c | 6 +++---
include/configs/exynos-common.h | 2 +-
include/configs/ls1021aiot.h | 2 +-
include/configs/ls1021aqds.h | 2 +-
include/configs/ls1021atwr.h | 2 +-
include/configs/mx7_common.h | 2 +-
include/configs/sun50i.h | 1 -
include/configs/sunxi-common.h | 2 +-
scripts/config_whitelist.txt | 1 -
11 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
index 95ce938..e39aba7 100644
--- a/arch/arm/cpu/armv7/nonsec_virt.S
+++ b/arch/arm/cpu/armv7/nonsec_virt.S
@@ -188,11 +188,11 @@ ENTRY(_nonsec_init)
* we do this here instead.
* But first check if we have the generic timer.
*/
-#ifdef CONFIG_TIMER_CLK_FREQ
+#ifdef COUNTER_FREQUENCY
mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
and r0, r0, #CPUID_ARM_GENTIMER_MASK@ mask arch timer bits
cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
- ldreq r1, =CONFIG_TIMER_CLK_FREQ
+ ldreq r1, =COUNTER_FREQUENCY
mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
#endif
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 766b8c7..104dc90 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -46,7 +46,7 @@ static u32 __secure cp15_read_cntp_ctl(void)
return val;
}
-#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000)
+#define ONE_MS (COUNTER_FREQUENCY / 1000)
static void __secure __mdelay(u32 ms)
{
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 5365638..b966012 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -100,14 +100,14 @@ int board_init(void)
* we avoid the risk of writing to it.
*/
asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq));
- if (freq != CONFIG_TIMER_CLK_FREQ) {
+ if (freq != COUNTER_FREQUENCY) {
debug("arch timer frequency is %d Hz, should be %d,
fixing ...\n",
- freq, CONFIG_TIMER_CLK_FREQ);
+ freq, COUNTER_FREQUENCY);
#ifdef CONFIG_NON_SECURE
printf("arch timer frequency is wrong, but cannot
adjust it\n");
#else
asm volatile("mcr p15, 0, %0, c14, c0, 0"
-: : "r"(CONFIG_TIMER_CLK_FREQ));
+: : "r"(COUNTER_FREQUENCY));
#endif
}
}
diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h
index 7868c86..ccb335e 100644
--- a/include/configs/exynos-common.h
+++ b/include/configs/exynos-common.h
@@ -23,7 +23,7 @@
/* input clock of PLL: 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ2400
-#define CONFIG_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index b422863..31f71f1 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -252,7 +252,7 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ 1250
+#define COUNTER_FREQUENCY 1250
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 3c255aa..fbef0be 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -509,7 +509,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ 1250
+#define COUNTER_FREQUENCY 1250
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 7100d96..43a993b 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -379,7 +379,7 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ 1250
+#define COUNTER_FREQUENCY 1250
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE
[U-Boot] [PATCH v3 01/13] sunxi: fix ACTLR.SMP assembly routine
If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara Acked-by: Maxime Ripard --- arch/arm/mach-sunxi/board.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 52be5b0..58fbacb 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -188,7 +188,8 @@ void s_init(void) asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" "orr r0, r0, #1 << 6\n" - "mcr p15, 0, r0, c1, c0, 1\n"); + "mcr p15, 0, r0, c1, c0, 1\n" + ::: "r0"); #endif #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 /* Enable non-secure access to some peripherals */ -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 03/13] fsl: ls102x: remove redundant GENERIC_TIMER_CLK
Some Freescale boards used an extra version of the constant to hold the
Generic Timer frequency. This can easily be covered by the now unified
COUNTER_FREQUENCY constant, so remove this extra variable from those
boards.
Signed-off-by: Andre Przywara
Reviewed-by: York Sun
---
arch/arm/cpu/armv7/ls102xa/psci.S | 2 +-
arch/arm/cpu/armv7/ls102xa/timer.c | 2 +-
include/configs/ls1021aiot.h | 5 -
include/configs/ls1021aqds.h | 5 -
include/configs/ls1021atwr.h | 5 -
5 files changed, 2 insertions(+), 17 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S
b/arch/arm/cpu/armv7/ls102xa/psci.S
index 3d41d37..e1dc5f3 100644
--- a/arch/arm/cpu/armv7/ls102xa/psci.S
+++ b/arch/arm/cpu/armv7/ls102xa/psci.S
@@ -37,7 +37,7 @@
.align 5
-#defineONE_MS (GENERIC_TIMER_CLK / 1000)
+#defineONE_MS (COUNTER_FREQUENCY / 1000)
#defineRESET_WAIT (30 * ONE_MS)
.globl psci_version
diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c
b/arch/arm/cpu/armv7/ls102xa/timer.c
index e6a32ca..d5237d2 100644
--- a/arch/arm/cpu/armv7/ls102xa/timer.c
+++ b/arch/arm/cpu/armv7/ls102xa/timer.c
@@ -62,7 +62,7 @@ int timer_init(void)
/* Enable System Counter */
writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
- freq = GENERIC_TIMER_CLK;
+ freq = COUNTER_FREQUENCY;
asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
/* Set PL1 Physical Timer Ctrl */
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 31f71f1..d4ba080 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -36,11 +36,6 @@
#define CONFIG_CMD_EXT2
#endif
-/*
- * Generic Timer Definitions
- */
-#define GENERIC_TIMER_CLK 1250
-
#define CONFIG_SYS_CLK_FREQ1
#define CONFIG_DDR_CLK_FREQ1
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index fbef0be..cb9f1ea 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -27,11 +27,6 @@
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
-/*
- * Generic Timer Definitions
- */
-#define GENERIC_TIMER_CLK 1250
-
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 43a993b..2647ef5 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -56,11 +56,6 @@
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
-/*
- * Generic Timer Definitions
- */
-#define GENERIC_TIMER_CLK 1250
-
#define CONFIG_SYS_CLK_FREQ1
#define CONFIG_DDR_CLK_FREQ1
--
2.8.2
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[U-Boot] [PATCH v3 05/13] sunxi: configs: merge sun9i and sun50i SPL memory definitions
For some reason we were pretty conservative when defining the maximum SPL size for the Allwinner A80(sun9i) SoC. According to the manual the SRAM A1 is even 40KB, but the BROM probably still has the 32 KiB load limit. For the sake of simplicity, merge the SPL memory definitions for the A64 and A80 SoCs, since both SoC share the BROM/SRAM A1 memory layout. This helps to further simplify this is in the next patch. Signed-off-by: Andre Przywara --- include/configs/sunxi-common.h | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 0f40c7f..2b67827 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -186,12 +186,9 @@ #define CONFIG_SPL_BOARD_LOAD_IMAGE #endif -#if defined(CONFIG_MACH_SUN9I) -#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ -#define CONFIG_SPL_MAX_SIZE0x5fc0 /* ? KiB on sun9i */ -#elif defined(CONFIG_MACH_SUN50I) +#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ -#define CONFIG_SPL_MAX_SIZE0x7fc0 /* 32 KiB on sun50i */ +#define CONFIG_SPL_MAX_SIZE0x7fc0 /* 32 KiB on sun9/50i */ #else #define CONFIG_SPL_TEXT_BASE 0x40/* sram start+header */ #define CONFIG_SPL_MAX_SIZE0x5fc0 /* 24KB on sun4i/sun7i */ -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 04/13] sunxi: simplify ACTLR.SMP bit set #ifdef
Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara Acked-by: Maxime Ripard --- arch/arm/Kconfig| 4 arch/arm/mach-sunxi/board.c | 5 + board/sunxi/Kconfig | 2 ++ 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fc36723..98791c0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -126,6 +126,10 @@ config ENABLE_ARM_SOC_BOOT0_HOOK ARM_SOC_BOOT0_HOOK which contains the required assembler preprocessor code. +config ARM_CORTEX_CPU_IS_UP + bool + default n + config USE_ARCH_MEMCPY bool "Use an assembly optimized implementation of memcpy" default y diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 58fbacb..fdcf68e 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -180,10 +180,7 @@ void s_init(void) /* No H3 BSP, boot0 seems to not modify SUNXI_SRAMC_BASE + 0x44 */ #endif -#if defined CONFIG_MACH_SUN6I || \ -defined CONFIG_MACH_SUN7I || \ -defined CONFIG_MACH_SUN8I || \ -defined CONFIG_MACH_SUN9I +#if !defined(CONFIG_ARM_CORTEX_CPU_IS_UP) && !defined(CONFIG_ARM64) /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 37b4252..ea0d658 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -50,12 +50,14 @@ choice config MACH_SUN4I bool "sun4i (Allwinner A10)" select CPU_V7 + select ARM_CORTEX_CPU_IS_UP select SUNXI_GEN_SUN4I select SUPPORT_SPL config MACH_SUN5I bool "sun5i (Allwinner A13)" select CPU_V7 + select ARM_CORTEX_CPU_IS_UP select SUNXI_GEN_SUN4I select SUPPORT_SPL -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 06/13] sunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM
Traditionally Allwinner SoCs have their boot ROM mapped just below 4GB, while the first SRAM region is mapped at address 0. With the extended physical memory support of the A80 this was changed, so the BROM is now at address 0 and the SRAM region starts right behind this at 64KB. This configuration seems to be called "high SRAM". Instead of enumerating the SoCs which have copied this configuration, let's call a spade a spade and introduce a Kconfig option for this setup. SoCs implementing this (A80, A64 and H5, so far), can then select this configuration. Simplify the config header definition on the way. Signed-off-by: Andre Przywara Acked-by: Maxime Ripard --- arch/arm/include/asm/arch-sunxi/spl.h | 2 +- board/sunxi/Kconfig | 6 ++ include/configs/sunxi-common.h| 19 +++ 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/spl.h b/arch/arm/include/asm/arch-sunxi/spl.h index 5d7ab55..831d0c0 100644 --- a/arch/arm/include/asm/arch-sunxi/spl.h +++ b/arch/arm/include/asm/arch-sunxi/spl.h @@ -12,7 +12,7 @@ #define SPL_SIGNATURE "SPL" /* marks "sunxi" SPL header */ #define SPL_HEADER_VERSION 1 -#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) +#ifdef CONFIG_SUNXI_HIGH_SRAM #define SPL_ADDR 0x1 #else #define SPL_ADDR 0x0 diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index ea0d658..688cb12 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -27,6 +27,10 @@ config SPL_POWER_SUPPORT config SPL_SERIAL_SUPPORT default y +config SUNXI_HIGH_SRAM + bool + default n + # Note only one of these may be selected at a time! But hidden choices are # not supported by Kconfig config SUNXI_GEN_SUN4I @@ -120,6 +124,7 @@ config MACH_SUN8I_H3 config MACH_SUN9I bool "sun9i (Allwinner A80)" select CPU_V7 + select SUNXI_HIGH_SRAM select SUNXI_GEN_SUN6I select SUPPORT_SPL @@ -127,6 +132,7 @@ config MACH_SUN50I bool "sun50i (Allwinner A64)" select ARM64 select SUNXI_GEN_SUN6I + select SUNXI_HIGH_SRAM select SUPPORT_SPL endchoice diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 2b67827..0997dfa 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -86,7 +86,7 @@ #define CONFIG_SPL_BSS_MAX_SIZE0x0008 /* 512 KiB */ -#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) +#ifdef CONFIG_SUNXI_HIGH_SRAM /* * The A80's A1 sram starts at 0x0001 rather then at 0x and is * slightly bigger. Note that it is possible to map the first 32 KiB of the @@ -186,29 +186,24 @@ #define CONFIG_SPL_BOARD_LOAD_IMAGE #endif -#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) +#ifdef CONFIG_SUNXI_HIGH_SRAM #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ -#define CONFIG_SPL_MAX_SIZE0x7fc0 /* 32 KiB on sun9/50i */ +#define CONFIG_SPL_MAX_SIZE0x7fc0 /* 32 KiB */ +#define LOW_LEVEL_SRAM_STACK 0x00018000 #else #define CONFIG_SPL_TEXT_BASE 0x40/* sram start+header */ #define CONFIG_SPL_MAX_SIZE0x5fc0 /* 24KB on sun4i/sun7i */ +#define LOW_LEVEL_SRAM_STACK 0x8000 /* End of sram */ #endif +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + #ifndef CONFIG_ARM64 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" #endif #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ -#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) -/* FIXME: 40 KiB instead of 32 KiB ? */ -#define LOW_LEVEL_SRAM_STACK 0x00018000 -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#else -/* end of 32 KiB in sram */ -#define LOW_LEVEL_SRAM_STACK 0x8000 /* End of sram */ -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#endif /* I2C */ #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 09/13] sunxi: DRAM: add Allwinner H5 support
The DRAM controller in the Allwinner H5 SoC is again very similar to
the one in the H3 and A64.
Based on the existing socid parameter, add support for this controller
by reusing the bulk of the code and only deviating where needed.
These new bits set or cleared here and there have been mostly found by
looking at DRAM register dumps after using the H5 boot0 and comparing
them to what we set in the code. So for now it's mostly unclear what
those bits actually mean - hence the missing names and comments.
Also add the delay line parameters taken from the boot0 and libdram
disassembly.
Register setup differences between H5 and H3 are courtesy of Jens Kuske.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/include/asm/arch-sunxi/cpu.h | 1 +
arch/arm/mach-sunxi/dram_sun8i_h3.c | 97 +--
2 files changed, 82 insertions(+), 16 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h
b/arch/arm/include/asm/arch-sunxi/cpu.h
index 6f96a97..e8e670e 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
@@ -15,5 +15,6 @@
#define SOCID_A64 0x1689
#define SOCID_H3 0x1680
+#define SOCID_H5 0x1718
#endif /* _SUNXI_CPU_H */
diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c
b/arch/arm/mach-sunxi/dram_sun8i_h3.c
index 9f7cc7f..d681a9d 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_h3.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c
@@ -177,6 +177,34 @@ static void mctl_set_master_priority_a64(void)
writel(0x8104, &mctl_com->mdfs_bwlr[2]);
}
+static void mctl_set_master_priority_h5(void)
+{
+ struct sunxi_mctl_com_reg * const mctl_com =
+ (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE;
+
+ /* enable bandwidth limit windows and set windows size 1us */
+ writel(399, &mctl_com->tmr);
+ writel((1 << 16), &mctl_com->bwcr);
+
+ /* set cpu high priority */
+ writel(0x0001, &mctl_com->mapr);
+
+ /* Port 2 is reserved per Allwinner's linux-3.10 source, yet
+* they initialise it */
+ MBUS_CONF( CPU, true, HIGHEST, 0, 300, 260, 150);
+ MBUS_CONF( GPU, true, HIGHEST, 0, 600, 400, 200);
+ MBUS_CONF(UNUSED, true, HIGHEST, 0, 512, 256, 96);
+ MBUS_CONF( DMA, true, HIGHEST, 0, 256, 128, 32);
+ MBUS_CONF(VE, true, HIGHEST, 0, 1900, 1500, 1000);
+ MBUS_CONF( CSI, true, HIGHEST, 0, 150, 120, 100);
+ MBUS_CONF( NAND, true,HIGH, 0, 256, 128, 64);
+ MBUS_CONF(SS, true, HIGHEST, 0, 256, 128, 64);
+ MBUS_CONF(TS, true, HIGHEST, 0, 256, 128, 64);
+ MBUS_CONF(DI, true,HIGH, 0, 1024, 256, 64);
+ MBUS_CONF(DE, true, HIGHEST, 3, 3400, 2400, 1024);
+ MBUS_CONF(DE_CFD, true, HIGHEST, 0, 600, 400, 200);
+}
+
static void mctl_set_master_priority(uint16_t socid)
{
switch (socid) {
@@ -186,6 +214,9 @@ static void mctl_set_master_priority(uint16_t socid)
case SOCID_A64:
mctl_set_master_priority_a64();
return;
+ case SOCID_H5:
+ mctl_set_master_priority_h5();
+ return;
}
}
@@ -256,7 +287,7 @@ static void mctl_set_timing_params(uint16_t socid, struct
dram_para *para)
/* set two rank timing */
clrsetbits_le32(&mctl_ctl->dramtmg[8], (0xff << 8) | (0xff << 0),
- (0x66 << 8) | (0x10 << 0));
+ ((socid == SOCID_H5 ? 0x33 : 0x66) << 8) | (0x10 << 0));
/* set PHY interface timing, write latency and read latency configure */
writel((0x2 << 24) | (t_rdata_en << 16) | (0x1 << 8) |
@@ -391,7 +422,7 @@ static void mctl_sys_init(uint16_t socid, struct dram_para
*para)
CCM_DRAMCLK_CFG_DIV(1) |
CCM_DRAMCLK_CFG_SRC_PLL11 |
CCM_DRAMCLK_CFG_UPD);
- } else if (socid == SOCID_H3) {
+ } else if (socid == SOCID_H3 || socid == SOCID_H5) {
clock_set_pll5(CONFIG_DRAM_CLK * 2 * 100, false);
clrsetbits_le32(&ccm->dram_clk_cfg,
CCM_DRAMCLK_CFG_DIV_MASK |
@@ -410,7 +441,7 @@ static void mctl_sys_init(uint16_t socid, struct dram_para
*para)
setbits_le32(&ccm->dram_clk_cfg, CCM_DRAMCLK_CFG_RST);
udelay(10);
- writel(0xc00e, &mctl_ctl->clken);
+ writel(socid == SOCID_H5 ? 0x8000 : 0xc00e, &mctl_ctl->clken);
udelay(500);
}
@@ -434,7 +465,10 @@ static int mctl_channel_init(uint16_t socid, struct
dram_para *para)
/* setting VTC, default disable all VT */
clrbits_le32(&mctl_ctl->pgcr[0], (1 << 30) | 0x3f);
- clrsetbits_le32(&mctl_ctl->pgcr[1], 1 << 24, 1 << 26);
+ if (socid == SOCID_H5)
+ setbits_le32(&mctl_ctl->pgcr[1], (1 << 24) | (1 << 26));
+ else
+ clrsetbits_le32(&mctl_ctl->pgcr[1], 1 << 24,
[U-Boot] [PATCH v3 11/13] sunxi: introduce Allwinner H5 config option
The Allwinner H5 Soc is bascially an H3 with high SRAM and ARMv8 cores.
As the peripherals and the pinmuxing are almost identical, we piggy
back on the shared MACH_SUN8I_H3_H5 config symbol.
Signed-off-by: Andre Przywara
---
arch/arm/mach-sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig| 6 ++
2 files changed, 8 insertions(+)
diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
index f1f6fd5..85633cc 100644
--- a/arch/arm/mach-sunxi/cpu_info.c
+++ b/arch/arm/mach-sunxi/cpu_info.c
@@ -91,6 +91,8 @@ int print_cpuinfo(void)
puts("CPU: Allwinner A80 (SUN9I)\n");
#elif defined CONFIG_MACH_SUN50I
puts("CPU: Allwinner A64 (SUN50I)\n");
+#elif defined CONFIG_MACH_SUN50I_H5
+ puts("CPU: Allwinner H5 (SUN50I)\n");
#else
#warning Please update cpu_info.c with correct CPU information
puts("CPU: SUNXI Family\n");
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index bbd6a3c..d8243c9 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -139,6 +139,12 @@ config MACH_SUN50I
select SUNXI_HIGH_SRAM
select SUPPORT_SPL
+config MACH_SUN50I_H5
+ bool "sun50i (Allwinner H5)"
+ select ARM64
+ select MACH_SUNXI_H3_H5
+ select SUNXI_HIGH_SRAM
+
endchoice
# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
--
2.8.2
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[U-Boot] [PATCH v3 08/13] SPI: SPL: sunxi: fix 64-bit build
Addresses passed on to readl and writel are expected to be of the same
size as a pointer. Change the parameter types of sunxi_spi0_read_data()
to make the compiler happy and allow a warning-free aarch64 compile.
Signed-off-by: Andre Przywara
Reviewed-by: Simon Glass
Reviewed-by: Maxime Ripard
---
drivers/mtd/spi/sunxi_spi_spl.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/drivers/mtd/spi/sunxi_spi_spl.c
index a24c115..852abd4 100644
--- a/drivers/mtd/spi/sunxi_spi_spl.c
+++ b/drivers/mtd/spi/sunxi_spi_spl.c
@@ -185,14 +185,14 @@ static void spi0_deinit(void)
#define SPI_READ_MAX_SIZE 60 /* FIFO size, minus 4 bytes of the header */
static void sunxi_spi0_read_data(u8 *buf, u32 addr, u32 bufsize,
-u32 spi_ctl_reg,
-u32 spi_ctl_xch_bitmask,
-u32 spi_fifo_reg,
-u32 spi_tx_reg,
-u32 spi_rx_reg,
-u32 spi_bc_reg,
-u32 spi_tc_reg,
-u32 spi_bcc_reg)
+ulong spi_ctl_reg,
+ulong spi_ctl_xch_bitmask,
+ulong spi_fifo_reg,
+ulong spi_tx_reg,
+ulong spi_rx_reg,
+ulong spi_bc_reg,
+ulong spi_tc_reg,
+ulong spi_bcc_reg)
{
writel(4 + bufsize, spi_bc_reg); /* Burst counter (total bytes) */
writel(4, spi_tc_reg); /* Transfer counter (bytes to send) */
--
2.8.2
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[U-Boot] [PATCH v3 10/13] sunxi: prepare for sharing MACH_SUN8I_H3 config symbol
The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores.
To allow sharing the clocks, GPIO and driver code easily, create an
architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol.
Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and
let it be selected by a new shared Kconfig option.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 4 ++--
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++--
arch/arm/include/asm/arch-sunxi/dram.h| 2 +-
arch/arm/mach-sunxi/Makefile | 2 +-
arch/arm/mach-sunxi/board.c | 2 +-
arch/arm/mach-sunxi/clock_sun6i.c | 6 +++---
arch/arm/mach-sunxi/usb_phy.c | 4 ++--
board/sunxi/Kconfig | 14 +-
drivers/mtd/spi/Kconfig | 2 +-
drivers/net/sun8i_emac.c | 2 +-
drivers/power/Kconfig | 4 ++--
drivers/usb/host/ehci-sunxi.c | 2 +-
12 files changed, 26 insertions(+), 22 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 3f87672..1bfb48b 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -242,7 +242,7 @@ struct sunxi_ccm_reg {
/* ahb_gate0 offsets */
#define AHB_GATE_OFFSET_USB_OHCI1 30
#define AHB_GATE_OFFSET_USB_OHCI0 29
-#ifdef CONFIG_MACH_SUN8I_H3
+#ifdef CONFIG_MACH_SUNXI_H3_H5
/*
* These are EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) we call
* them 0 - 2 like they were called on older SoCs.
@@ -293,7 +293,7 @@ struct sunxi_ccm_reg {
#define CCM_USB_CTRL_PHY1_CLK (0x1 << 9)
#define CCM_USB_CTRL_PHY2_CLK (0x1 << 10)
#define CCM_USB_CTRL_PHY3_CLK (0x1 << 11)
-#ifdef CONFIG_MACH_SUN8I_H3
+#ifdef CONFIG_MACH_SUNXI_H3_H5
/*
* These are OHCI1 - OHCI3 in the datasheet (OHCI0 is for the OTG) we call
* them 0 - 2 like they were called on older SoCs.
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 3c85222..ea672fe 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -56,7 +56,7 @@
#define SUNXI_USB2_BASE0x01c1c000
#endif
#ifdef CONFIG_SUNXI_GEN_SUN6I
-#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
+#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
#define SUNXI_USBPHY_BASE 0x01c19000
#define SUNXI_USB0_BASE0x01c1a000
#define SUNXI_USB1_BASE0x01c1b000
@@ -94,7 +94,7 @@
#define SUNXI_KEYPAD_BASE 0x01c23000
#define SUNXI_TZPC_BASE0x01c23400
-#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUN8I_H3) || \
+#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUNXI_H3_H5) || \
defined(CONFIG_MACH_SUN50I)
/* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */
#define SUNXI_SIDC_BASE0x01c14000
diff --git a/arch/arm/include/asm/arch-sunxi/dram.h
b/arch/arm/include/asm/arch-sunxi/dram.h
index 53e6d47..1dc8220 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -24,7 +24,7 @@
#include
#elif defined(CONFIG_MACH_SUN8I_A83T)
#include
-#elif defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
+#elif defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
#include
#elif defined(CONFIG_MACH_SUN9I)
#include
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index 7daba11..efab481 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -48,7 +48,7 @@ obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o
obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o
obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o
obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o
-obj-$(CONFIG_MACH_SUN8I_H3)+= dram_sun8i_h3.o
+obj-$(CONFIG_MACH_SUNXI_H3_H5) += dram_sun8i_h3.o
obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o
obj-$(CONFIG_MACH_SUN50I) += dram_sun8i_h3.o
endif
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 96764d1..5e03d03 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -98,7 +98,7 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_A33_GPB_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_A33_GPB_UART0);
sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
-#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_H3)
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUNXI_H3_H5)
sunxi_gpio_set_cfgpin(SUNXI_GPA(4), SUN8I_H3_GPA_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPA(5), SUN8I_H3_GPA_UART0);
sunxi_gpio_set_pull(SUNXI_GPA(5), SUNXI_GPIO_PULL_UP);
diff --git a
[U-Boot] [PATCH v3 07/13] sunxi: provide ARMv8 mem_map for every ARM64 board
Every armv8 board needs the memory map, so change the #ifdef to
ARM64 to avoid enumerating every single board or SoC.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/mach-sunxi/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index fdcf68e..96764d1 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -40,7 +40,7 @@ struct fel_stash {
struct fel_stash fel_stash __attribute__((section(".data")));
-#ifdef CONFIG_MACH_SUN50I
+#ifdef CONFIG_ARM64
#include
static struct mm_region sunxi_mem_map[] = {
--
2.8.2
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[U-Boot] [PATCH v3 13/13] sunxi: configs: add basic OrangePi PC 2 defconfig
The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC. Add a (64-bit only) defconfig defining the required options to build the U-Boot proper. Signed-off-by: Andre Przywara --- board/sunxi/MAINTAINERS| 5 + configs/orangepi_pc2_defconfig | 16 2 files changed, 21 insertions(+) create mode 100644 configs/orangepi_pc2_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 2321b8b..3f21129 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -242,6 +242,11 @@ M: Icenowy Zheng S: Maintained F: configs/orangepi_zero_defconfig +ORANGEPI PC 2 BOARD +M: Andre Przywara +S: Maintained +F: configs/orangepi_pc2_defconfig + R16 EVB PARROT BOARD M: Quentin Schulz S: Maintained diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig new file mode 100644 index 000..353c6a0 --- /dev/null +++ b/configs/orangepi_pc2_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_H5=y +CONFIG_SPL=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CONSOLE_MUX=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SPL_SPI_SUNXI=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 12/13] sunxi: dts: add basic OrangePi PC 2 device tree file
The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
and changing the differing components accordingly.
This is a preliminary device tree mostly for U-Boot's own sake, it
is expected to be updated once the official DT gets accepted upstream.
Signed-off-by: Andre Przywara
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 147
2 files changed, 149 insertions(+)
create mode 100644 arch/arm/dts/sun50i-h5-orangepi-pc2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 796b24d..aa90526 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -294,6 +294,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-orangepi-plus.dtb \
sun8i-h3-orangepi-plus2e.dtb \
sun8i-h3-nanopi-neo.dtb
+dtb-$(CONFIG_MACH_SUN50I_H5) += \
+ sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
new file mode 100644
index 000..de60f78
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun8i-h3.dtsi"
+
+/ {
+ model = "OrangePi PC 2";
+ compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
+
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu@1 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu@2 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu@3 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0x4000 0x4000>;
+ };
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &emac;
+ };
+
+ soc {
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+ };
+};
+
+&gic {
+ compatible = "arm,gic-400";
+};
+
+&mmc0 {
+ compatible = "allwinner,sun50i-h5-mmc",
+"all
[U-Boot] [PATCH] serial: 16550: properly initialize fcr field of ns16550_platdata
Default fcr value is initialized in ns16550_serial_ofdata_to_platdata but this function is only called if OF_CONTROL option is enabled while the field is used whenever DM_SERIAL is set. So for configs that do not have OF_CONTROL default fcr value is set to zero which leads to loosing characters when serial port input is faster than reading routine i.e. when copy-pasting long line to U-Boot prompt. As a fix initialize fcr field in probe method Signed-off-by: Oleksandr Tymoshenko Cc: Marek Vasut Cc: Tom Rini Cc: Simon Glass --- drivers/serial/ns16550.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 2df4a1f..2b30a4f 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -352,6 +352,7 @@ int ns16550_serial_probe(struct udevice *dev) struct NS16550 *const com_port = dev_get_priv(dev); com_port->plat = dev_get_platdata(dev); + com_port->plat->fcr = UART_FCR_DEFVAL; NS16550_init(com_port, -1); return 0; @@ -437,7 +438,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) return -EINVAL; } - plat->fcr = UART_FCR_DEFVAL; if (port_type == PORT_JZ4780) plat->fcr |= UART_FCR_UME; -- 2.9.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] drivers: net: cpsw: Fix reading of mac address for am43 SoCs
cpsw driver tries to get macid for am43xx SoCs using the compatible
ti,am4372. But not all variants of am43x uses this complatible like
epos evm uses ti,am438x. So use a generic compatible ti,am43 to get
macid for all am43 based platforms.
Tested-by: Aparna Balasubramanian
Signed-off-by: Lokesh Vutla
---
drivers/net/cpsw-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/cpsw-common.c b/drivers/net/cpsw-common.c
index e828e85d8b..607eb4563c 100644
--- a/drivers/net/cpsw-common.c
+++ b/drivers/net/cpsw-common.c
@@ -110,7 +110,7 @@ int ti_cm_get_macid(struct udevice *dev, int slave, u8
*mac_addr)
if (of_device_is_compatible(dev, "ti,dm816-emac"))
return cpsw_am33xx_cm_get_macid(dev, 0x30, slave, mac_addr);
- if (of_machine_is_compatible("ti,am4372"))
+ if (of_machine_is_compatible("ti,am43"))
return cpsw_am33xx_cm_get_macid(dev, 0x630, slave, mac_addr);
if (of_machine_is_compatible("ti,dra7"))
--
2.11.0
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Re: [U-Boot] [PATCH] drivers: net: cpsw: Fix reading of mac address for am43 SoCs
+ Joe
On Wednesday 01 February 2017 09:20 AM, Lokesh Vutla wrote:
> cpsw driver tries to get macid for am43xx SoCs using the compatible
> ti,am4372. But not all variants of am43x uses this complatible like
> epos evm uses ti,am438x. So use a generic compatible ti,am43 to get
> macid for all am43 based platforms.
>
> Tested-by: Aparna Balasubramanian
> Signed-off-by: Lokesh Vutla
> ---
> drivers/net/cpsw-common.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/cpsw-common.c b/drivers/net/cpsw-common.c
> index e828e85d8b..607eb4563c 100644
> --- a/drivers/net/cpsw-common.c
> +++ b/drivers/net/cpsw-common.c
> @@ -110,7 +110,7 @@ int ti_cm_get_macid(struct udevice *dev, int slave, u8
> *mac_addr)
> if (of_device_is_compatible(dev, "ti,dm816-emac"))
> return cpsw_am33xx_cm_get_macid(dev, 0x30, slave, mac_addr);
>
> - if (of_machine_is_compatible("ti,am4372"))
> + if (of_machine_is_compatible("ti,am43"))
> return cpsw_am33xx_cm_get_macid(dev, 0x630, slave, mac_addr);
>
> if (of_machine_is_compatible("ti,dra7"))
>
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Re: [U-Boot] Build failure with u-boot master branch
Hello, Any suggestions on the issue? Thanks & Regards, Sanchayan. On 17-01-27 12:11:03, maitysancha...@gmail.com wrote: > Hello, > > I have been working on adding DCU support for Vybrid and during the process > of rebasing to latest master for sending out patches, the build for u-boot > master branch fails with the following error > > HOSTCC tools/gpimage-common.o > HOSTCC tools/gpimage.o > HOSTCC tools/dumpimage.o > HOSTCC tools/mkimage.o > LDFLAGS="" python ./lib/libfdt/setup.py \ > "-Wall -Wstrict-prototypes -O2 -fomit-frame-pointer-include > ./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include > -I./lib/libfdt > -I./tools -DCONFIG_SYS_TEXT_BASE=0x3f408000 -DUSE_HOSTCC > -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE " lib/libfdt/fdt.c lib/libfdt/fdt_ro.c > lib/libfdt/fdt_rw.c > lib/libfdt/fdt_strerror.c lib/libfdt/fdt_wip.c lib/libfdt/fdt_region.c > lib/libfdt/fdt_sw.c tools/libfdt_wrap.c > HOSTCC tools/proftool > mv _libfdt.so tools/_libfdt.so > mv: cannot stat '_libfdt.so': No such file or directory > make[1]: *** [tools/Makefile:121: tools/_libfdt.so] Error 1 > make[1]: *** Waiting for unfinished jobs > make: *** [Makefile:1217: tools] Error 2 > > config file is colibri_vf_defconfig. > > The earlier commit which worked for me was > > commit 035ebf85b09cf11c820ae9eec414097420741abd > Merge: cc422dae21 68e7999ba9 > Author: Tom Rini > Date: Sun Jan 15 13:33:30 2017 -0500 > > Merge branch 'master' of git://git.denx.de/u-boot-spi > > Is this is a known issue with a fix? > > Thanks & Regards, > Sanchayan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Build failure with u-boot master branch
Hi, On 02/01/2017 01:44 PM, maitysancha...@gmail.com wrote: > Hello, > > Any suggestions on the issue? I'm not sure..but it seems that already fixed. Refer to below commit. commit 80d2ae5e1f14c6caf96c9eb6cb68e8f68b2e5788 Refs: v2017.01-270-g80d2ae5 Author: Emmanuel Vadot AuthorDate: Mon Jan 16 08:14:46 2017 +0100 Commit: Tom Rini CommitDate: Fri Jan 20 15:38:03 2017 -0500 binman: add tools directory to the python path The built _libfdt.so is placed in the /tools dir and need to say here as it contains relative paths. Add the directory to the python path so binman can use this module. Best Regards, Jaehoon Chung > > Thanks & Regards, > Sanchayan. > > On 17-01-27 12:11:03, maitysancha...@gmail.com wrote: >> Hello, >> >> I have been working on adding DCU support for Vybrid and during the process >> of rebasing to latest master for sending out patches, the build for u-boot >> master branch fails with the following error >> >> HOSTCC tools/gpimage-common.o >> HOSTCC tools/gpimage.o >> HOSTCC tools/dumpimage.o >> HOSTCC tools/mkimage.o >> LDFLAGS="" python ./lib/libfdt/setup.py \ >> "-Wall -Wstrict-prototypes -O2 -fomit-frame-pointer-include >> ./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include >> -I./lib/libfdt >> -I./tools -DCONFIG_SYS_TEXT_BASE=0x3f408000 -DUSE_HOSTCC >> -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE " lib/libfdt/fdt.c lib/libfdt/fdt_ro.c >> lib/libfdt/fdt_rw.c >> lib/libfdt/fdt_strerror.c lib/libfdt/fdt_wip.c lib/libfdt/fdt_region.c >> lib/libfdt/fdt_sw.c tools/libfdt_wrap.c >> HOSTCC tools/proftool >> mv _libfdt.so tools/_libfdt.so >> mv: cannot stat '_libfdt.so': No such file or directory >> make[1]: *** [tools/Makefile:121: tools/_libfdt.so] Error 1 >> make[1]: *** Waiting for unfinished jobs >> make: *** [Makefile:1217: tools] Error 2 >> >> config file is colibri_vf_defconfig. >> >> The earlier commit which worked for me was >> >> commit 035ebf85b09cf11c820ae9eec414097420741abd >> Merge: cc422dae21 68e7999ba9 >> Author: Tom Rini >> Date: Sun Jan 15 13:33:30 2017 -0500 >> >> Merge branch 'master' of git://git.denx.de/u-boot-spi >> >> Is this is a known issue with a fix? >> >> Thanks & Regards, >> Sanchayan. > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/7] Add STMicroelectronics STiH410-B2260 board support
Hi Tom It's a gentle reminder for reviewing this series. Thanks Patrice On 01/20/2017 05:05 PM, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This boards is a 96boards based on STiH410 SoC. > This series adds basic support with serial, mmc and pinctrl support. > > Patrice Chotard (7): > arm: Add support for STMicroelectronics STiH410 soc > board: Add STMicroelectronics STiH410-B2260 support > STiH410: Add STi serial driver > STiH410: Add STi SDHCI driver > STiH410: add STi pinctrl driver > STiH410-B2260: add device tree > STIH410-B2260: Add STiH410-B2260 defconfig > > arch/arm/Kconfig | 13 + > arch/arm/Makefile |1 + > arch/arm/dts/Makefile |3 + > arch/arm/dts/st-pincfg.h | 71 ++ > arch/arm/dts/stih407-clock.dtsi | 326 ++ > arch/arm/dts/stih407-family.dtsi | 977 +++ > arch/arm/dts/stih407-pinctrl.dtsi | 1303 > + > arch/arm/dts/stih410-b2260.dts| 225 > arch/arm/dts/stih410-clock.dtsi | 347 ++ > arch/arm/dts/stih410-pinctrl.dtsi | 34 + > arch/arm/dts/stih410.dtsi | 454 +++ > arch/arm/include/asm/arch-stih410/gpio.h | 20 + > arch/arm/include/asm/arch-stih410/sdhci.h | 69 ++ > arch/arm/include/asm/arch-stih410/sti.h | 25 + > arch/arm/include/asm/arch-stih410/syscfg.h| 87 ++ > arch/arm/mach-sti/Kconfig | 31 + > arch/arm/mach-sti/Makefile|8 + > arch/arm/mach-sti/cpu.c | 16 + > arch/arm/mach-sti/timer.c | 47 + > board/st/stih410-b2260/Kconfig| 19 + > board/st/stih410-b2260/MAINTAINERS|6 + > board/st/stih410-b2260/Makefile |8 + > board/st/stih410-b2260/board.c| 44 + > configs/stih410-b2260_defconfig | 22 + > drivers/mmc/Kconfig |7 + > drivers/mmc/Makefile |1 + > drivers/mmc/sti_sdhci.c | 137 +++ > drivers/pinctrl/Kconfig | 10 + > drivers/pinctrl/Makefile |1 + > drivers/pinctrl/pinctrl-sti.c | 311 + > drivers/serial/Kconfig|7 + > drivers/serial/Makefile |1 + > drivers/serial/serial_sti_asc.c | 219 > include/configs/stih410-b2260.h | 61 + > include/dm/platform_data/serial_sti_asc.h | 17 + > include/dm/platform_data/sti_sdhci.h | 17 + > include/dt-bindings/clock/stih407-clks.h | 90 ++ > include/dt-bindings/clock/stih410-clks.h | 25 + > include/dt-bindings/interrupt-controller/irq-st.h | 30 + > include/dt-bindings/mfd/st-lpc.h | 16 + > include/dt-bindings/reset/stih407-resets.h| 65 + > 41 files changed, 5171 insertions(+) > create mode 100644 arch/arm/dts/st-pincfg.h > create mode 100644 arch/arm/dts/stih407-clock.dtsi > create mode 100644 arch/arm/dts/stih407-family.dtsi > create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi > create mode 100644 arch/arm/dts/stih410-b2260.dts > create mode 100644 arch/arm/dts/stih410-clock.dtsi > create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi > create mode 100644 arch/arm/dts/stih410.dtsi > create mode 100644 arch/arm/include/asm/arch-stih410/gpio.h > create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h > create mode 100644 arch/arm/include/asm/arch-stih410/sti.h > create mode 100644 arch/arm/include/asm/arch-stih410/syscfg.h > create mode 100644 arch/arm/mach-sti/Kconfig > create mode 100644 arch/arm/mach-sti/Makefile > create mode 100644 arch/arm/mach-sti/cpu.c > create mode 100644 arch/arm/mach-sti/timer.c > create mode 100644 board/st/stih410-b2260/Kconfig > create mode 100644 board/st/stih410-b2260/MAINTAINERS > create mode 100644 board/st/stih410-b2260/Makefile > create mode 100644 board/st/stih410-b2260/board.c > create mode 100644 configs/stih410-b2260_defconfig > create mode 100644 drivers/mmc/sti_sdhci.c > create mode 100644 drivers/pinctrl/pinctrl-sti.c > create mode 100644 drivers/serial/serial_sti_asc.c > create mode 100644 include/configs/stih410-b2260.h > create mode 100644 include/dm/platform_data/serial_sti_asc.h > create mode 100644 include/dm/platform_data/sti_sdhci.h > create mode 100644 include/dt-bindings/clock/stih407-clks.h > create mode 100644 include/dt-bindings/clock/stih410-clks.h > create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h > create mode 100644 include/dt-bindings/mfd/st-lpc.h > create mode 100644 i
