Re: [U-Boot] [PATCH] sf: ensure flash device is in 3-byte address mode

[Jagan Teki]

On Thu, Nov 30, 2017 at 2:11 PM, Goldschmidt Simon
 wrote:
> Hi Jagan,
>
> On Fri, Nov 10, 2017 08:04, Jagan Teki wrote:
 I've similar change on my patchwork, since no-one tested Will CC you by re-
>> basing it please have test?
>>>
>>> Yes, of course I'd like to test this. Where do I find your patch?
>>
>> Will rebase and send to ML soon.

This is the patch[1] for 4-byte addressing, but I would wonder how can
proceed operations with 4-byte if we disable during probe.

[1] 
http://git.denx.de/?p=u-boot-spi.git;a=commitdiff;h=fd0c22a90772379c4c11ba09347d36cc8ee17dca

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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[U-Boot] [PATCH v2 2/3] efi_loader: correctly setup device paths for block devices

[Heinrich Schuchardt]

According to the UEFI spec the numbering of partitions has to
start with 1.

Partion number 0 is reserved for the optional device path for
the complete block device.

Signed-off-by: Heinrich Schuchardt 
---
v2
Do not generate optional device path with partion number 0.
---
 lib/efi_loader/efi_device_path.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index 42fe6e1185..6461ea9abc 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -420,7 +420,7 @@ static void *dp_part_fill(void *buf, struct blk_desc *desc, 
int part)
if (desc->part_type == PART_TYPE_ISO) {
struct efi_device_path_cdrom_path *cddp = buf;
 
-   cddp->boot_entry = part - 1;
+   cddp->boot_entry = part;
cddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
cddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_CDROM_PATH;
cddp->dp.length = sizeof(*cddp);
@@ -434,7 +434,7 @@ static void *dp_part_fill(void *buf, struct blk_desc *desc, 
int part)
hddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
hddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH;
hddp->dp.length = sizeof(*hddp);
-   hddp->partition_number = part - 1;
+   hddp->partition_number = part;
hddp->partition_start = info.start;
hddp->partition_end = info.size;
if (desc->part_type == PART_TYPE_EFI)
-- 
2.11.0

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[U-Boot] [PATCH v2 3/3] efi_loader: correct DeviceNodeToText for media types

[Heinrich Schuchardt]

When converting device nodes and paths to text we should
stick to the UEFI spec.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/efi_device_path_to_text.c | 30 +++---
 1 file changed, 19 insertions(+), 11 deletions(-)

diff --git a/lib/efi_loader/efi_device_path_to_text.c 
b/lib/efi_loader/efi_device_path_to_text.c
index 7159c974d4..21c5678d20 100644
--- a/lib/efi_loader/efi_device_path_to_text.c
+++ b/lib/efi_loader/efi_device_path_to_text.c
@@ -90,7 +90,7 @@ static char *dp_msging(char *s, struct efi_device_path *dp)
case DEVICE_PATH_SUB_TYPE_MSG_USB: {
struct efi_device_path_usb *udp =
(struct efi_device_path_usb *)dp;
-   s += sprintf(s, "Usb(0x%x,0x%x)", udp->parent_port_number,
+   s += sprintf(s, "USB(0x%x,0x%x)", udp->parent_port_number,
 udp->usb_interface);
break;
}
@@ -124,10 +124,10 @@ static char *dp_msging(char *s, struct efi_device_path 
*dp)
case DEVICE_PATH_SUB_TYPE_MSG_MMC: {
const char *typename =
(dp->sub_type == DEVICE_PATH_SUB_TYPE_MSG_SD) ?
-   "SDCard" : "MMC";
+   "SD" : "eMMC";
struct efi_device_path_sd_mmc_path *sddp =
(struct efi_device_path_sd_mmc_path *)dp;
-   s += sprintf(s, "%s(Slot%u)", typename, sddp->slot_number);
+   s += sprintf(s, "%s(%u)", typename, sddp->slot_number);
break;
}
default:
@@ -147,18 +147,26 @@ static char *dp_media(char *s, struct efi_device_path *dp)
 
switch (hddp->signature_type) {
case SIG_TYPE_MBR:
-   s += sprintf(s, "HD(Part%d,Sig%08x)",
-hddp->partition_number,
-*(uint32_t *)sig);
+   s += sprintf(
+   s, "HD(%d,MBR,0x%08x,0x%llx,0x%llx)",
+   hddp->partition_number,
+   *(uint32_t *)sig,
+   (unsigned long long int)hddp->partition_start,
+   (unsigned long long int)hddp->partition_end);
break;
case SIG_TYPE_GUID:
-   s += sprintf(s, "HD(Part%d,Sig%pUl)",
-hddp->partition_number, sig);
+   s += sprintf(
+   s, "HD(%d,GPT,%pUl,0x%llx,0x%llx)",
+   hddp->partition_number, sig,
+   (unsigned long long int)hddp->partition_start,
+   (unsigned long long int)hddp->partition_end);
break;
default:
-   s += sprintf(s, "HD(Part%d,MBRType=%02x,SigType=%02x)",
-hddp->partition_number, hddp->partmap_type,
-hddp->signature_type);
+   s += sprintf(
+   s, "HD(%d,0x%02x,0,0x%llx,0x%llx)",
+   hddp->partition_number, hddp->partmap_type,
+   (unsigned long long int)hddp->partition_start,
+   (unsigned long long int)hddp->partition_end);
break;
}
 
-- 
2.11.0

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[U-Boot] [PATCH v2 0/3] efi_loader: correct media device paths

[Heinrich Schuchardt]

For each disk we need partition device path with partion number 0.
The device node texts should match the UEFI spec.

v2:
Do not generate optional device path with partion number
0 for the whole block device.

Heinrich Schuchardt (3):
  efi_loader: correctly determine if an MMC device is an SD-card
  efi_loader: correctly setup device paths for block devices
  efi_loader: correct DeviceNodeToText for media types

 lib/efi_loader/efi_device_path.c | 35 +---
 lib/efi_loader/efi_device_path_to_text.c | 30 +--
 lib/efi_loader/efi_disk.c|  7 +--
 3 files changed, 52 insertions(+), 20 deletions(-)

-- 
2.11.0

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[U-Boot] [PATCH v2 1/3] efi_loader: correctly determine if an MMC device is an SD-card

[Heinrich Schuchardt]

The SD cards and eMMC devices have different device nodes.
The current coding interpretes all MMC devices as eMMC.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/efi_device_path.c | 24 +---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index b4e2f933cb..42fe6e1185 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -36,6 +36,24 @@ static const struct efi_device_path_vendor ROOT = {
.guid = U_BOOT_GUID,
 };
 
+#if defined(CONFIG_DM_MMC) && defined(CONFIG_MMC)
+/*
+ * Determine if an MMC device is an SD card.
+ *
+ * @desc   block device descriptor
+ * @return true if the device is an SD card
+ */
+static bool is_sd(struct blk_desc *desc)
+{
+   struct mmc *mmc = find_mmc_device(desc->devnum);
+
+   if (!mmc)
+   return false;
+
+   return IS_SD(mmc) != 0U;
+}
+#endif
+
 static void *dp_alloc(size_t sz)
 {
void *buf;
@@ -298,9 +316,9 @@ static void *dp_fill(void *buf, struct udevice *dev)
struct blk_desc *desc = mmc_get_blk_desc(mmc);
 
sddp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
-   sddp->dp.sub_type = (desc->if_type == IF_TYPE_MMC) ?
-   DEVICE_PATH_SUB_TYPE_MSG_MMC :
-   DEVICE_PATH_SUB_TYPE_MSG_SD;
+   sddp->dp.sub_type = is_sd(desc) ?
+   DEVICE_PATH_SUB_TYPE_MSG_SD :
+   DEVICE_PATH_SUB_TYPE_MSG_MMC;
sddp->dp.length   = sizeof(*sddp);
sddp->slot_number = dev->seq;
 
-- 
2.11.0

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Re: [U-Boot] [PATCH 1/3] efi_loader: correctly determine if an MMC device is an SD-card

[Heinrich Schuchardt]

On 12/04/2017 12:16 AM, Alexander Graf wrote:



On 02.12.17 13:42, Heinrich Schuchardt wrote:

The SD cards and eMMC devices have different device nodes.
The current coding interpretes all MMC devices as eMMC.

Signed-off-by: Heinrich Schuchardt 
---
  lib/efi_loader/efi_device_path.c | 24 +---
  1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index b4e2f933cb..42fe6e1185 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -36,6 +36,24 @@ static const struct efi_device_path_vendor ROOT = {
.guid = U_BOOT_GUID,
  };
  
+#if defined(CONFIG_DM_MMC) && defined(CONFIG_MMC)

+/*
+ * Determine if an MMC device is an SD card.
+ *
+ * @desc   block device descriptor
+ * @return true if the device is an SD card
+ */
+static bool is_sd(struct blk_desc *desc)
+{
+   struct mmc *mmc = find_mmc_device(desc->devnum);
+
+   if (!mmc)
+   return false;
+
+   return IS_SD(mmc) != 0U;
+}
+#endif
+
  static void *dp_alloc(size_t sz)
  {
void *buf;
@@ -298,9 +316,9 @@ static void *dp_fill(void *buf, struct udevice *dev)
struct blk_desc *desc = mmc_get_blk_desc(mmc);
  
  		sddp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;

-   sddp->dp.sub_type = (desc->if_type == IF_TYPE_MMC) ?
-   DEVICE_PATH_SUB_TYPE_MSG_MMC :
-   DEVICE_PATH_SUB_TYPE_MSG_SD;
+   sddp->dp.sub_type = is_sd(desc) ?
+   DEVICE_PATH_SUB_TYPE_MSG_SD :
+   DEVICE_PATH_SUB_TYPE_MSG_MMC;


So in general, MMC != SD != eMMC. Or rather eMMC "is like" SD "is like"
MMC maybe?

I really don't know how edk2 distinguishes between them. In general,
eMMC is an SD card on steroids. Can you double-check in the edk2 code
and then we just do whatever they do?


Alex



EDK2 defines the following conversion functions:
  {L"SD",  DevPathFromTextSd  },
  {L"eMMC",DevPathFromTextEmmc},
in MdePkg/Library/UefiDevicePathLib/DevicePathFromText.c:3465
and
  {MESSAGING_DEVICE_PATH, MSG_SD_DP, DevPathToTextSd },
  {MESSAGING_DEVICE_PATH, MSG_EMMC_DP, DevPathToTextEmmc },
in MdePkg/Library/UefiDevicePathLib/DevicePathToText.c:2256

Regards

Heinrich
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[U-Boot] Please pull u-boot-cfi-flash/master

[Stefan Roese]

Hi Tom,

please pull this one CFI driver fix from York.

Thanks,
Stefan

The following changes since commit b06c46de632c55f4c39d404c6f0f65e414b31050:

  Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze 
(2017-11-29 08:26:07 -0500)

are available in the Git repository at:

  git://www.denx.de/git/u-boot-cfi-flash.git 

for you to fetch changes up to 2544f47078635958bacb106684a2f81f57a4ed80:

  mtd: cfi: Fix checking status register feature (2017-12-04 07:41:32 +0100)


York Sun (1):
  mtd: cfi: Fix checking status register feature

 drivers/mtd/cfi_flash.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)
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Re: [U-Boot] [PATCH] mtd: cfi: Fix checking status register feature

[Stefan Roese]

On 02.12.2017 10:15, Marek Vasut wrote:

On 11/18/2017 08:09 PM, York Sun wrote:

Commit 72443c7f7d21 ("mtd: cfi: Add support for status register
polling") added a feature check to determine if status register
is available for certain flash chips. The "lower software bits"
register used to determine this feature is not backward compati-
ble. Older flash chips without this feature has reserved value
0xff. Instead of checking "lower software bits" register, use
CFI primary vendor-specific extended query. Since CFI version
1.4, software features can be read from offset 0x53 according to
document AN201168 from Cypress.

Signed-off-by: York Sun 
CC: Marek Vasut 


On R8A7796 M3 ULCB
Tested-by: Marek Vasut 


Applied to u-boot-cfi-flash/master.

Thanks,
Stefan
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Re: [U-Boot] [PATCH v3 5/6] binman: add ROM image signing for Bay Trail SoC

[Bin Meng]

Hi Anatolij,

On Fri, Nov 17, 2017 at 9:16 AM, Anatolij Gustschin  wrote:
> Generate u-boot-verified.rom image containing Secure Boot Manifest
> when secure boot option is enabled.
>
> Signed-off-by: Anatolij Gustschin 
> ---
> NOTE: This patch applies on top of binman changes in binman-working
> branch in git://git.denx.de/u-boot-dm.git
>
> Changes in v3:
>  - New patch. Moved signing script functionality (secure_boot_helper.py
>in first series) to binman. The signing is enabled automatically
>via u-boot.dtsi when secure boot option is enabled
>  - Clean up all temporary files generated by signing script
>
>  arch/x86/dts/u-boot.dtsi |   7 +
>  tools/binman/signing/baytrail.py | 313 
> +++
>  tools/binman/signing/signer.py   |   3 +
>  3 files changed, 323 insertions(+)
>  create mode 100644 tools/binman/signing/baytrail.py
>
> diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
> index 7e37d4f394..98e2309108 100644
> --- a/arch/x86/dts/u-boot.dtsi
> +++ b/arch/x86/dts/u-boot.dtsi
> @@ -15,6 +15,13 @@
> sort-by-pos;
> pad-byte = <0xff>;
> size = ;
> +#ifdef CONFIG_BAYTRAIL_SECURE_BOOT

This needs to be a generic macro like CONFIG_SECURE_BOOT as this
affects all x86 rom images.

> +   sign;
> +#ifdef CONFIG_SYS_SOC

I believe CONFIG_SYS_SOC is defined by every board, so no need to do
#ifdef here.

> +   socname = CONFIG_SYS_SOC;
> +#endif
> +#endif
> +
>  #ifdef CONFIG_HAVE_INTEL_ME
> intel-descriptor {
> filename = CONFIG_FLASH_DESCRIPTOR_FILE;
> diff --git a/tools/binman/signing/baytrail.py 
> b/tools/binman/signing/baytrail.py
> new file mode 100644
> index 00..3bfbbedb5d
> --- /dev/null
> +++ b/tools/binman/signing/baytrail.py
> @@ -0,0 +1,313 @@
> +# Copyright (c) 2017 DENX Software Engineering
> +# Written by Markus Valentin 
> +# Adapted for binman integration: Anatolij Gustschin 
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Functions for signing the binman output image for Bay Trail SoC
> +#
> +
> +import binascii
> +import logging, sys
> +import os
> +
> +from hashlib import sha256
> +from os.path import basename, isfile, splitext
> +from os.path import join as pjoin
> +from struct import pack
> +
> +import OpenSSL
> +from OpenSSL import crypto
> +from cryptography import x509
> +from cryptography.hazmat.backends import default_backend
> +
> +FSP_FILE_NAME = "fsp-sb.bin"
> +FSP_STAGE2_FILE_NAME = "fsp_stage2.bin"
> +U_BOOT_ROM_FILE_NAME = 'u-boot.rom'
> +OUTPUT_FILE_NAME = 'u-boot-verified.rom'
> +U_BOOT_TO_SIGN_FILE_NAME = 'u-boot-to-sign.bin'
> +IBB_FILE_NAME = 'ibb.bin'
> +FPF_CONFIG_FILE_NAME = 'fpf_config.txt'
> +SIGNED_MANIFEST_FILE_NAME = 'signed_manifest.bin'
> +UNSIGNED_MANIFEST_FILE_NAME = 'un'+SIGNED_MANIFEST_FILE_NAME
> +OEM_FILE_NAME = 'oemdata.bin'
> +
> +OEM_PRIV_KEY_FILE_NAME = 'oemkey.pem'
> +OEM_PUB_KEY_FILE_NAME = 'pub_oemkey.pem'
> +OEM_PUBKEY_BIN_FILE_NAME = 'pub_oemkey.bin'
> +OEM_PUBKEY_AND_SIG_FILE_NAME = 'oem_pub_sig.bin'

This deserves a comment block on how there files are generated on the host.

> +
> +FIT_PUB_KEY_FILE_NAME = "dev.crt"
> +
> +# FSP Stage2 size is 0x1f400. For debug FSP it is 0x2f400,
> +# you must change it here wenn building with debug FSP image!

typo: wenn -> when

> +FSP_STAGE_2_SIZE = 0x1f400
> +FSP_UPD_SIZE = 0xc00
> +IBB_SIZE = 0x1fc00
> +MANIFEST_SIZE = 0x400
> +OEM_BLOCK_MAX_SIZE = 0x190
> +U_BOOT_ROM_SIZE = 0x80

Can this file size be determined from the CONFIG_ROM_SIZE?

> +ROMFILE_SYS_TEXT_BASE = 0x0070

and calculate this by ourselves?

> +
> +MANIFEST_IDENTIFIER = b'$VBM'
> +VERSION = 1
> +SECURE_VERSION_NUMBER = 2
> +OEM_DATA_PREAMBLE = '01000200'
> +
> +oem_data_hash_files = []
> +
> +
> +def append_binary_files(first_file, second_file, new_file):
> +with open(new_file, 'wb') as f:
> +f.write(bytearray(open(first_file, 'rb').read()))
> +f.write(bytearray(open(second_file, 'rb').read()))
> +
> +
> +# This function creates the OEM-Data block which must be inserted
> +# into the Bay Trail Secure Boot Manifest.
> +def assemble_oem_data(file_path):
> +file_size = 0
> +with open(file_path, 'wb') as f:
> +f.write(binascii.unhexlify(OEM_DATA_PREAMBLE))
> +file_size += 4
> +for hash_file in oem_data_hash_files:
> +f.write(open(hash_file, 'rb').read())
> +file_size += 32
> +pad_file_with_zeros(f, OEM_BLOCK_MAX_SIZE-file_size)
> +
> +
> +# This function creates the final U-Boot ROM image from
> +# the original u-boot.rom and the signed Initial Boot Block
> +# which contains the Secure Boot Manifest
> +def assemble_secure_boot_image(u_boot_rom, signed_ibb):
> +data = bytearray(open(u_boot_rom, 'rb').read())
> +ibb = bytearray(open(signed_ibb, 'rb').read())
> +data[-(MANIFEST_SIZE+IBB_SIZE):] = ibb
> +open(OUTPUT_FILE_NAME, 'wb').write(data)
> +
> +

[U-Boot] [v3 2/2] armv8: ls1043a: Discard the needless cpu nodes

[Wenbin song]

Using "cpu_pos_mask()" function to detect the real online cpus,
and discard the needless cpu nodes on kernel dts.

Signed-off-by: Wenbin Song 
---
Changes for v2:
None.
---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index d1a7d0de9c..39ffe1ab4d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -42,6 +42,33 @@ void ft_fixup_cpu(void *blob)
int addr_cells;
u64 val, core_id;
size_t *boot_code_size = &(__secondary_boot_code_size);
+   u32 mask = cpu_pos_mask();
+   int off_prev = -1;
+
+   off = fdt_path_offset(blob, "/cpus");
+   if (off < 0) {
+   puts("couldn't find /cpus node\n");
+   return;
+   }
+
+   fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
+
+   off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
+   "cpu", 4);
+   while (off != -FDT_ERR_NOTFOUND) {
+   reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
+   if (reg) {
+   core_id = fdt_read_number(reg, addr_cells);
+   if (!test_bit(id_to_core(core_id), &mask)) {
+   fdt_del_node(blob, off);
+   off = off_prev;
+   }
+   }
+   off_prev = off;
+   off = fdt_node_offset_by_prop_value(blob, off_prev,
+   "device_type", "cpu", 4);
+   }
+
 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
int node;
-- 
2.14.1

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[U-Boot] [v4 2/2] armv8: layerscape: Discard the needless cpu nodes

[Wenbin song]

Using "cpu_pos_mask()" function to detect the real online cpus,
and discard the needless cpu nodes on kernel dts.

Signed-off-by: Wenbin Song 
---
Changes for v1:
Remove the config option.
Use id_to_core() funcation to find the position of core.
Changes for v2:
None.
Changes for v3:
Replace "ls1043a" with "layerscape" on the subject.
---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index d1a7d0de9c..39ffe1ab4d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -42,6 +42,33 @@ void ft_fixup_cpu(void *blob)
int addr_cells;
u64 val, core_id;
size_t *boot_code_size = &(__secondary_boot_code_size);
+   u32 mask = cpu_pos_mask();
+   int off_prev = -1;
+
+   off = fdt_path_offset(blob, "/cpus");
+   if (off < 0) {
+   puts("couldn't find /cpus node\n");
+   return;
+   }
+
+   fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
+
+   off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
+   "cpu", 4);
+   while (off != -FDT_ERR_NOTFOUND) {
+   reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
+   if (reg) {
+   core_id = fdt_read_number(reg, addr_cells);
+   if (!test_bit(id_to_core(core_id), &mask)) {
+   fdt_del_node(blob, off);
+   off = off_prev;
+   }
+   }
+   off_prev = off;
+   off = fdt_node_offset_by_prop_value(blob, off_prev,
+   "device_type", "cpu", 4);
+   }
+
 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
int node;
-- 
2.14.1

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[U-Boot] [v4 1/2] armv8: ls1043a/ls2080a: check SoC by device ID

[Wenbin song]

Check LS1043A/LS2080a by device ID without using personality ID to
determine revision number. This check applies to all various
personalities of the same SoC family.

Signed-off-by: Wenbin Song 
---
Changes for V1:
None.
Changes for v2:
Modify the commit message and subject.
Add SVR_DEV and IS_SVR_DEV mocros. 
Changes for V3:
None.
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 8 
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c| 4 ++--
 arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S   | 9 -
 arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 ++--
 drivers/net/fsl-mc/dpio/qbman_private.h| 4 ++--
 drivers/usb/common/fsl-errata.c| 7 +--
 6 files changed, 19 insertions(+), 17 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index ab5d76ea3b..021eb377a2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -502,8 +502,8 @@ int arch_early_init_r(void)
 * erratum A009635 is valid only for LS2080A SoC and
 * its personalitiesi
 */
-   svr_dev_id = get_svr() >> 16;
-   if (svr_dev_id == SVR_DEV_LS2080A)
+   svr_dev_id = get_svr();
+   if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A)))
erratum_a009635();
 #endif
 #if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
@@ -566,8 +566,8 @@ int timer_init(void)
 * For LS2080A SoC and its personalities, timer controller
 * offset is different
 */
-   svr_dev_id = get_svr() >> 16;
-   if (svr_dev_id == SVR_DEV_LS2080A)
+   svr_dev_id = get_svr();
+   if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A)))
cntcr = (u32 *)SYS_FSL_LS2080A_LS2085A_TIMER_ADDR;
 
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index cae59da803..d1a7d0de9c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -145,7 +145,7 @@ static void fdt_fixup_gic(void *blob)
 
val = gur_in32(&gur->svr);
 
-   if (SVR_SOC_VER(val) != SVR_LS1043A) {
+   if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
align_64k = 1;
} else if (SVR_REV(val) != REV1_0) {
val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
@@ -327,7 +327,7 @@ static void fdt_fixup_msi(void *blob)
 
rev = gur_in32(&gur->svr);
 
-   if (SVR_SOC_VER(rev) != SVR_LS1043A)
+   if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
return;
 
rev = SVR_REV(rev);
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S 
b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index fa93096c68..c089ceef32 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -37,9 +37,8 @@ ENTRY(get_gic_offset)
ldr x2, =DCFG_CCSR_SVR
ldr w2, [x2]
rev w2, w2
-   mov w3, w2
-   andsw3, w3, #SVR_WO_E << 8
-   mov w4, #SVR_LS1043A << 8
+   lsr w3, w2, #16
+   ldr w4, =SVR_DEV(SVR_LS1043A)
cmp w3, w4
b.ne1f
andsw2, w2, #0xff
@@ -92,7 +91,7 @@ ENTRY(lowlevel_init)
 */
bl  get_svr
lsr w0, w0, #16
-   ldr w1, =SVR_DEV_LS2080A
+   ldr w1, =SVR_DEV(SVR_LS2080A)
cmp w0, w1
b.eq1f
 
@@ -224,7 +223,7 @@ ENTRY(lowlevel_init)
 */
bl  get_svr
lsr w0, w0, #16
-   ldr w1, =SVR_DEV_LS2080A
+   ldr w1, =SVR_DEV(SVR_LS2080A)
cmp w0, w1
b.eq1f
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h 
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 247f09e0f5..09f64e7bd7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -76,8 +76,6 @@ struct cpu_type {
 #define SVR_LS2081A0x870918
 #define SVR_LS2041A0x870914
 
-#define SVR_DEV_LS2080A0x8701
-
 #define SVR_MAJ(svr)   (((svr) >> 4) & 0xf)
 #define SVR_MIN(svr)   (((svr) >> 0) & 0xf)
 #define SVR_REV(svr)   (((svr) >> 0) & 0xff)
@@ -85,6 +83,8 @@ struct cpu_type {
 #define IS_E_PROCESSOR(svr)(!((svr >> 8) & 0x1))
 #define IS_SVR_REV(svr, maj, min) \
((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
+#define SVR_DEV(svr)   ((svr) >> 8)
+#define IS_SVR_DEV(svr, dev)   (((svr) >> 16) == (dev))
 
 /* ahci port register default value */
 #define AHCI_PORT_PHY_1_CFG0xa003fffe
diff --git a/drivers/net/fsl-mc/dpio/qbman_private.h 
b/drivers/net/fsl-mc/dpio/qbman_private.h
index 73bbae373e..873323be0f 100644
--- a/drivers/net/fsl-mc/dpio/qbman_private.h
+++ b/drivers/net/fsl-mc/dpio/qbman_private.h
@@ -175,8 +175,8 @@ void qbman_version(u32 *major, u3

[U-Boot] [PATCH V2 21/23] imx: imx8mq: add dtsi file

[Peng Fan]

Add dtsi file for i.MX8MQ.

Signed-off-by: Peng Fan 
---
 arch/arm/dts/fsl-imx8-ca53.dtsi   |  92 +
 arch/arm/dts/fsl-imx8mq.dtsi  | 425 
 include/dt-bindings/clock/imx8mq-clock.h  | 612 +
 include/dt-bindings/pinctrl/pins-imx8mq.h | 632 ++
 4 files changed, 1761 insertions(+)
 create mode 100644 arch/arm/dts/fsl-imx8-ca53.dtsi
 create mode 100644 arch/arm/dts/fsl-imx8mq.dtsi
 create mode 100644 include/dt-bindings/clock/imx8mq-clock.h
 create mode 100644 include/dt-bindings/pinctrl/pins-imx8mq.h

diff --git a/arch/arm/dts/fsl-imx8-ca53.dtsi b/arch/arm/dts/fsl-imx8-ca53.dtsi
new file mode 100644
index 00..6a2292a51e
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8-ca53.dtsi
@@ -0,0 +1,92 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/{
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   idle-states {
+   entry-method = "psci";
+
+   CPU_SLEEP: cpu-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x000>;
+   entry-latency-us = <700>;
+   exit-latency-us = <250>;
+   min-residency-us = <1000>;
+   };
+
+   CLUSTER_SLEEP: cluster-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x100>;
+   entry-latency-us = <1000>;
+   exit-latency-us = <700>;
+   min-residency-us = <2700>;
+   wakeup-latency-us = <1500>;
+   };
+   };
+
+   /* We have 1 clusters having 4 Cortex-A53 cores */
+   A53_0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   next-level-cache = <&A53_L2>;
+   cpu-idle-states = <&CPU_SLEEP>;
+   };
+
+   A53_1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <&A53_L2>;
+   cpu-idle-states = <&CPU_SLEEP>;
+   };
+
+   A53_2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <&A53_L2>;
+   cpu-idle-states = <&CPU_SLEEP>;
+   };
+
+   A53_3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <&A53_L2>;
+   cpu-idle-states = <&CPU_SLEEP>;
+   };
+
+   A53_L2: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible = "arm,psci-1.0";
+   method = "smc";
+   cpu_suspend   = <0xc401>;
+   cpu_off   = <0xc402>;
+   cpu_on= <0xc403>;
+   };
+};
diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi
new file mode 100644
index 00..049c92fd5c
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8mq.dtsi
@@ -0,0 +1,425 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or F

[U-Boot] [PATCH V2 18/23] net: fec: do not access reserved register for i.MX8M

[Peng Fan]

The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.

Signed-off-by: Peng Fan 
Cc: Joe Hershberger 
---
 drivers/net/fec_mxc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 433e19f0f8..4cbc8cbbfd 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -562,8 +562,8 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
writel(0x, &fec->eth->gaddr1);
writel(0x, &fec->eth->gaddr2);
 
-   /* Do not access reserved register for i.MX6UL */
-   if (!is_mx6ul() && !is_mx6ull()) {
+   /* Do not access reserved register */
+   if (!is_mx6ul() && !is_mx6ull() && !is_mx8m()) {
/* clear MIB RAM */
for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
writel(0, i);
-- 
2.14.1

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[U-Boot] [PATCH V2 19/23] net: fec: fix build warnings for 64bits support

[Peng Fan]

When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
Cc: Joe Hershberger 
---
 drivers/net/fec_mxc.c | 74 ++-
 1 file changed, 43 insertions(+), 31 deletions(-)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 4cbc8cbbfd..ff7ad91116 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -284,7 +284,7 @@ static int fec_tx_task_disable(struct fec_priv *fec)
 static void fec_rbd_init(struct fec_priv *fec, int count, int dsize)
 {
uint32_t size;
-   uint8_t *data;
+   ulong data;
int i;
 
/*
@@ -293,9 +293,9 @@ static void fec_rbd_init(struct fec_priv *fec, int count, 
int dsize)
 */
size = roundup(dsize, ARCH_DMA_MINALIGN);
for (i = 0; i < count; i++) {
-   data = (uint8_t *)fec->rbd_base[i].data_pointer;
-   memset(data, 0, dsize);
-   flush_dcache_range((uint32_t)data, (uint32_t)data + size);
+   data = fec->rbd_base[i].data_pointer;
+   memset((void *)data, 0, dsize);
+   flush_dcache_range(data, data + size);
 
fec->rbd_base[i].status = FEC_RBD_EMPTY;
fec->rbd_base[i].data_length = 0;
@@ -305,8 +305,8 @@ static void fec_rbd_init(struct fec_priv *fec, int count, 
int dsize)
fec->rbd_base[i - 1].status = FEC_RBD_WRAP | FEC_RBD_EMPTY;
fec->rbd_index = 0;
 
-   flush_dcache_range((unsigned)fec->rbd_base,
-  (unsigned)fec->rbd_base + size);
+   flush_dcache_range((ulong)fec->rbd_base,
+  (ulong)fec->rbd_base + size);
 }
 
 /**
@@ -323,7 +323,7 @@ static void fec_rbd_init(struct fec_priv *fec, int count, 
int dsize)
  */
 static void fec_tbd_init(struct fec_priv *fec)
 {
-   unsigned addr = (unsigned)fec->tbd_base;
+   ulong addr = (ulong)fec->tbd_base;
unsigned size = roundup(2 * sizeof(struct fec_bd),
ARCH_DMA_MINALIGN);
 
@@ -423,7 +423,7 @@ static int fec_open(struct eth_device *edev)
struct fec_priv *fec = (struct fec_priv *)edev->priv;
 #endif
int speed;
-   uint32_t addr, size;
+   ulong addr, size;
int i;
 
debug("fec_open: fec_open(dev)\n");
@@ -439,7 +439,7 @@ static int fec_open(struct eth_device *edev)
/* Flush the descriptors into RAM */
size = roundup(FEC_RBD_NUM * sizeof(struct fec_bd),
ARCH_DMA_MINALIGN);
-   addr = (uint32_t)fec->rbd_base;
+   addr = (ulong)fec->rbd_base;
flush_dcache_range(addr, addr + size);
 
 #ifdef FEC_QUIRK_ENET_MAC
@@ -533,8 +533,9 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
 #else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
 #endif
-   uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop;
-   int i;
+   u8 *mib_ptr = (uint8_t *)&fec->eth->rmon_t_drop;
+   u8 *i;
+   ulong addr;
 
/* Initialize MAC address */
 #ifdef CONFIG_DM_ETH
@@ -574,8 +575,12 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
 
/* size and address of each buffer */
writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr);
-   writel((uint32_t)fec->tbd_base, &fec->eth->etdsr);
-   writel((uint32_t)fec->rbd_base, &fec->eth->erdsr);
+
+   addr = (ulong)fec->tbd_base;
+   writel((uint32_t)addr, &fec->eth->etdsr);
+
+   addr = (ulong)fec->rbd_base;
+   writel((uint32_t)addr, &fec->eth->erdsr);
 
 #ifndef CONFIG_PHYLIB
if (fec->xcv_type != SEVENWIRE)
@@ -640,8 +645,8 @@ static int fec_send(struct eth_device *dev, void *packet, 
int length)
 #endif
 {
unsigned int status;
-   uint32_t size, end;
-   uint32_t addr;
+   u32 size;
+   ulong addr, end;
int timeout = FEC_XFER_TIMEOUT;
int ret = 0;
 
@@ -672,13 +677,13 @@ static int fec_send(struct eth_device *dev, void *packet, 
int length)
swap_packet((uint32_t *)packet, length);
 #endif
 
-   addr = (uint32_t)packet;
+   addr = (ulong)packet;
end = roundup(addr + length, ARCH_DMA_MINALIGN);
addr &= ~(ARCH_DMA_MINALIGN - 1);
flush_dcache_range(addr, end);
 
writew(length, &fec->tbd_base[fec->tbd_index].data_length);
-   writel(addr, &fec->tbd_base[fec->tbd_index].data_pointer);
+   writel((uint32_t)addr, &fec->tbd_base[fec->tbd_index].data_pointer);
 
/*
 * update BD's status now
@@ -698,7 +703,7 @@ static int fec_send(struct eth_device *dev, void *packet, 
int length)
 * can start DMA.
 */
size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
-   addr = (uint32_t)fec->tbd_base;
+   addr = (ulong)fec->tbd_base;
flush_dcache_range(addr, addr + size);
 
 

[U-Boot] [PATCH V2 16/23] imx: lcdif: include i.MX8M

[Peng Fan]

Include i.MX8M in lcdif register layout map.
Also included i.MX7ULP in this patch, since share same with i.MX8M.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/mach-imx/regs-lcdif.h | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/mach-imx/regs-lcdif.h 
b/arch/arm/include/asm/mach-imx/regs-lcdif.h
index 4de401bd22..57e6357608 100644
--- a/arch/arm/include/asm/mach-imx/regs-lcdif.h
+++ b/arch/arm/include/asm/mach-imx/regs-lcdif.h
@@ -20,7 +20,9 @@ struct mxs_lcdif_regs {
mxs_reg_32(hw_lcdif_ctrl)   /* 0x00 */
mxs_reg_32(hw_lcdif_ctrl1)  /* 0x10 */
 #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
-   defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
+   defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || \
+   defined(CONFIG_MX6SLL) || defined(CONFIG_MX7ULP) || \
+   defined(CONFIG_MX8M)
mxs_reg_32(hw_lcdif_ctrl2)  /* 0x20 */
 #endif
mxs_reg_32(hw_lcdif_transfer_count) /* 0x20/0x30 */
@@ -56,7 +58,9 @@ struct mxs_lcdif_regs {
mxs_reg_32(hw_lcdif_data)   /* 0x1b0/0x180 */
mxs_reg_32(hw_lcdif_bm_error_stat)  /* 0x1c0/0x190 */
 #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
-   defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
+   defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || \
+   defined(CONFIG_MX6SLL) || defined(CONFIG_MX7ULP) || \
+   defined(CONFIG_MX8M)
mxs_reg_32(hw_lcdif_crc_stat)   /* 0x1a0 */
 #endif
mxs_reg_32(hw_lcdif_lcdif_stat) /* 0x1d0/0x1b0 */
@@ -65,7 +69,8 @@ struct mxs_lcdif_regs {
mxs_reg_32(hw_lcdif_debug1) /* 0x200/0x1e0 */
mxs_reg_32(hw_lcdif_debug2) /* 0x1f0 */
 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX7) || \
-   defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
+   defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
+   defined(CONFIG_MX7ULP) || defined(CONFIG_MX8M)
mxs_reg_32(hw_lcdif_thres)
mxs_reg_32(hw_lcdif_as_ctrl)
mxs_reg_32(hw_lcdif_as_buf)
-- 
2.14.1

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[U-Boot] [PATCH V2 17/23] gpio: mxc: add i.MX8M support

[Peng Fan]

Add i.MX8M GPIO support.
There are 4 GPIO banks on i.MX8M.

Signed-off-by: Peng Fan 
---
 drivers/gpio/mxc_gpio.c | 22 +++---
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index c480eba940..1e9188af63 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -41,13 +41,13 @@ static unsigned long gpio_ports[] = {
[2] = GPIO3_BASE_ADDR,
 #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
-   defined(CONFIG_MX7)
+   defined(CONFIG_MX7) || defined(CONFIG_MX8M)
[3] = GPIO4_BASE_ADDR,
 #endif
 #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
-   defined(CONFIG_MX7)
+   defined(CONFIG_MX7) || defined(CONFIG_MX8M)
[4] = GPIO5_BASE_ADDR,
-#ifndef CONFIG_MX6UL
+#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX8M))
[5] = GPIO6_BASE_ADDR,
 #endif
 #endif
@@ -349,13 +349,17 @@ static const struct mxc_gpio_plat mxc_plat[] = {
{ 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
{ 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
 #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
-   defined(CONFIG_MX53) || defined(CONFIG_MX6)
+   defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
+   defined(CONFIG_MX8M)
{ 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
 #endif
-#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
+#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
+   defined(CONFIG_MX8M)
{ 4, (struct gpio_regs *)GPIO5_BASE_ADDR },
+#ifndef CONFIG_MX8M
{ 5, (struct gpio_regs *)GPIO6_BASE_ADDR },
 #endif
+#endif
 #if defined(CONFIG_MX53) || defined(CONFIG_MX6)
{ 6, (struct gpio_regs *)GPIO7_BASE_ADDR },
 #endif
@@ -366,13 +370,17 @@ U_BOOT_DEVICES(mxc_gpios) = {
{ "gpio_mxc", &mxc_plat[1] },
{ "gpio_mxc", &mxc_plat[2] },
 #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
-   defined(CONFIG_MX53) || defined(CONFIG_MX6)
+   defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
+   defined(CONFIG_MX8M)
{ "gpio_mxc", &mxc_plat[3] },
 #endif
-#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
+#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
+   defined(CONFIG_MX8M)
{ "gpio_mxc", &mxc_plat[4] },
+#ifndef CONFIG_MX8M
{ "gpio_mxc", &mxc_plat[5] },
 #endif
+#endif
 #if defined(CONFIG_MX53) || defined(CONFIG_MX6)
{ "gpio_mxc", &mxc_plat[6] },
 #endif
-- 
2.14.1

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[U-Boot] [PATCH V2 20/23] power: pmic/regulator allow dm be omitted by SPL

[Peng Fan]

Allow the dm driver be omitted by SPL.

Signed-off-by: Peng Fan 
Reviewed-by: Simon Glass 
Cc: Jaehoon Chung 
Cc: Stefano Babic 
---
 drivers/power/pmic/Makefile  | 4 ++--
 drivers/power/regulator/Makefile | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index f7bdfa5609..4abdaf6668 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -5,10 +5,10 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
+obj-$(CONFIG_$(SPL_)DM_PMIC) += pmic-uclass.o
 obj-$(CONFIG_DM_PMIC_MAX77686) += max77686.o
 obj-$(CONFIG_DM_PMIC_MAX8998) += max8998.o
-obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
+obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
 obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
 obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
 obj-$(CONFIG_PMIC_ACT8846) += act8846.o
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 6c149a9263..9809f7c845 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -9,7 +9,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o
 obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o
 obj-$(CONFIG_REGULATOR_AS3722) += as3722_regulator.o
 obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
-obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o
+obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
 obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
-- 
2.14.1

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[U-Boot] [PATCH V2 15/23] mmc: fsl_esdhc: support i.MX8M

[Peng Fan]

Support i.MX8M in fsl esdhc driver.

Signed-off-by: Peng Fan 
---
 drivers/mmc/fsl_esdhc.c | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 499d622c6d..3a56f7c2bc 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -228,7 +228,8 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, 
struct mmc *mmc,
 {
int timeout;
struct fsl_esdhc *regs = priv->esdhc_regs;
-#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
+#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
+   defined(CONFIG_MX8M)
dma_addr_t addr;
 #endif
uint wml_value;
@@ -241,7 +242,8 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, 
struct mmc *mmc,
 
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value);
 #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
-#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
+#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
+   defined(CONFIG_MX8M)
addr = virt_to_phys((void *)(data->dest));
if (upper_32_bits(addr))
printf("Error found for upper 32 bits\n");
@@ -270,7 +272,8 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, 
struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK,
wml_value << 16);
 #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
-#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
+#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
+   defined(CONFIG_MX8M)
addr = virt_to_phys((void *)(data->src));
if (upper_32_bits(addr))
printf("Error found for upper 32 bits\n");
@@ -335,7 +338,8 @@ static void check_and_invalidate_dcache_range
unsigned end = 0;
unsigned size = roundup(ARCH_DMA_MINALIGN,
data->blocks*data->blocksize);
-#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
+#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
+   defined(CONFIG_MX8M)
dma_addr_t addr;
 
addr = virt_to_phys((void *)(data->dest));
-- 
2.14.1

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[U-Boot] [PATCH V2 22/23] imx: add i.MX8MQ EVK support

[Peng Fan]

Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy
firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to
DRAM.

The boot log:
"
U-Boot SPL 2017.11-00062-gd4c7c3ebb3-dirty (Dec 01 2017 - 14:49:31)
PMIC:  PFUZE100 ID=0x10
check ddr4_pmu_train_imem code
check ddr4_pmu_train_imem code pass
check ddr4_pmu_train_dmem code
check ddr4_pmu_train_dmem code pass
PLL bypass to 100MTS setting done
Training PASS
PLL bypass to 400MTS setting done
Training PASS
Training PASS
check ddr4_pmu_train_imem code
check ddr4_pmu_train_imem code pass
check ddr4_pmu_train_dmem code
check ddr4_pmu_train_dmem code pass
Training PASS
Normal Boot
Trying to boot from MMC2

U-Boot 2017.11-00062-gd4c7c3ebb3-dirty (Dec 01 2017 - 14:49:31 +0800)

CPU:   Freescale i.MX8MQ rev2.0 at 1000 MHz
Reset cause: POR
Model: Freescale i.MX8MQ EVK
DRAM:  3 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Using default environment

In:serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
"

Signed-off-by: Peng Fan 
---
 arch/arm/dts/Makefile |   2 +
 arch/arm/dts/fsl-imx8mq-evk.dts   | 424 ++
 arch/arm/mach-imx/mx8m/Kconfig|  12 +
 board/freescale/mx8mq_evk/Kconfig |  12 +
 board/freescale/mx8mq_evk/Makefile|  11 +
 board/freescale/mx8mq_evk/README  |  38 +++
 board/freescale/mx8mq_evk/mx8mq_evk.c | 156 +
 board/freescale/mx8mq_evk/spl.c   | 233 +++
 configs/mx8mq_evk_defconfig   |  28 +++
 include/configs/mx8mq_evk.h   | 265 +
 10 files changed, 1181 insertions(+)
 create mode 100644 arch/arm/dts/fsl-imx8mq-evk.dts
 create mode 100644 board/freescale/mx8mq_evk/Kconfig
 create mode 100644 board/freescale/mx8mq_evk/Makefile
 create mode 100644 board/freescale/mx8mq_evk/README
 create mode 100644 board/freescale/mx8mq_evk/mx8mq_evk.c
 create mode 100644 board/freescale/mx8mq_evk/spl.c
 create mode 100644 configs/mx8mq_evk_defconfig
 create mode 100644 include/configs/mx8mq_evk.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cd540e99ea..d459755904 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -381,6 +381,8 @@ dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
 
 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
 
+dtb-$(CONFIG_ARCH_MX8M) += fsl-imx8mq-evk.dtb
+
 dtb-$(CONFIG_RCAR_GEN3) += \
r8a7795-h3ulcb.dtb \
r8a7795-salvator-x.dtb \
diff --git a/arch/arm/dts/fsl-imx8mq-evk.dts b/arch/arm/dts/fsl-imx8mq-evk.dts
new file mode 100644
index 00..f0aa3485e6
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8mq-evk.dts
@@ -0,0 +1,424 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+/* First 128KB is for PSCI ATF. */
+/memreserve/ 0x4000 0x0002;
+
+#include "fsl-imx8mq.dtsi"
+
+/ {
+   model = "Freescale i.MX8MQ EVK";
+   compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
+
+   chosen {
+   bootargs = "console=ttymxc0,115200 
earlycon=ec_imx6q,0x3086,115200";
+   };
+
+   regulators {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg_usdhc2_vmmc: usdhc2_vmmc {
+   compatible = "regulator-fixed";
+   regulator-name = "VSD_3V3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
+   };
+
+   pwmleds {
+   compatible = "pwm-leds";
+
+   ledpwm2 {
+   label = "PWM2";
+   pwms = <&pwm2 0 5>;
+   max-brightness = <255>;
+   };
+   };
+};
+
+&iomuxc {
+   pinctrl-names = "default";
+
+   imx8mq-evk {
+   pinctrl_fec1: fec1grp {
+   fsl,pins = <
+   MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
+   MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO   0x23
+   MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3   0x1f
+   MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2   0x1f
+   MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1   0x1f
+   MX8MQ_IOMUXC_ENET_TD0_ENE

[U-Boot] [PATCH V2 09/23] imx: spl: implement spl_boot_device for i.MX8M

[Peng Fan]

Implement spl_boot_device for i.MX8M.

Signed-off-by: Peng Fan 
---
 arch/arm/mach-imx/spl.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index d0d1b73aa6..58ec202d4f 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -97,8 +97,8 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_NONE;
 }
 
-#elif defined(CONFIG_MX7)
-/* Translate iMX7 boot device to the SPL boot device enumeration */
+#elif defined(CONFIG_MX7) || defined(CONFIG_MX8M)
+/* Translate iMX7/MX8M boot device to the SPL boot device enumeration */
 u32 spl_boot_device(void)
 {
enum boot_device boot_device_spl = get_boot_device();
@@ -112,11 +112,15 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_MMC2;
case SPI_NOR_BOOT:
return BOOT_DEVICE_SPI;
+   case NAND_BOOT:
+   return BOOT_DEVICE_NAND;
+   case USB_BOOT:
+   return BOOT_DEVICE_USB;
default:
return BOOT_DEVICE_NONE;
}
 }
-#endif /* CONFIG_MX6 || CONFIG_MX7 */
+#endif /* CONFIG_MX6 || CONFIG_MX7 || CONFIG_MX8M */
 
 #ifdef CONFIG_SPL_USB_GADGET_SUPPORT
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
-- 
2.14.1

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[U-Boot] [PATCH V2 10/23] imx: add i.MX8MQ SoC Revision and is_mx8m helper

[Peng Fan]

Add i.MX8MQ SoC Revision
Add is_mx8m helper
The 7ULP is a dummy number, so use 0xEx.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx/cpu.h   | 6 --
 arch/arm/include/asm/mach-imx/sys_proto.h | 1 +
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-imx/cpu.h 
b/arch/arm/include/asm/arch-imx/cpu.h
index ec5b419e47..470961c6f7 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -25,12 +25,14 @@
 #define MXC_CPU_MX6QP  0x69
 #define MXC_CPU_MX7S   0x71 /* dummy ID */
 #define MXC_CPU_MX7D   0x72
-#define MXC_CPU_MX7ULP 0x81 /* Temporally hard code */
+#define MXC_CPU_MX8MQ  0x82
+#define MXC_CPU_MX7ULP 0xE1 /* Temporally hard code */
 #define MXC_CPU_VF610  0xF6 /* dummy ID */
 
 #define MXC_SOC_MX60x60
 #define MXC_SOC_MX70x70
-#define MXC_SOC_MX7ULP 0x80 /* dummy */
+#define MXC_SOC_MX8M   0x80
+#define MXC_SOC_MX7ULP 0xE0 /* dummy */
 
 #define CHIP_REV_1_00x10
 #define CHIP_REV_1_10x11
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h 
b/arch/arm/include/asm/mach-imx/sys_proto.h
index 2d8afed406..5e9218ffc7 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -27,6 +27,7 @@
 
 #define is_mx6() (is_soc_type(MXC_SOC_MX6))
 #define is_mx7() (is_soc_type(MXC_SOC_MX7))
+#define is_mx8m() (is_soc_type(MXC_SOC_MX8M))
 
 #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
 #define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
-- 
2.14.1

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[U-Boot] [PATCH V2 07/23] power: pmic.h: include dm/ofnode.h

[Peng Fan]

Include dm/ofnode.h.

Signed-off-by: Peng Fan 
Reviewed-by: Simon Glass 
Cc: Stefano Babic 
---
 include/power/pmic.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/power/pmic.h b/include/power/pmic.h
index 4b34316427..f2fe537fb7 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -11,6 +11,7 @@
 #ifndef __CORE_PMIC_H_
 #define __CORE_PMIC_H_
 
+#include 
 #include 
 #include 
 #include 
-- 
2.14.1

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[U-Boot] [PATCH V2 14/23] misc: ocotp: add i.MX8M support

[Peng Fan]

i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks
and each bank 4 words.

Signed-off-by: Peng Fan 
---
 drivers/misc/mxc_ocotp.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 8986bb4ad0..0cf24a4c88 100644
--- a/drivers/misc/mxc_ocotp.c
+++ b/drivers/misc/mxc_ocotp.c
@@ -35,6 +35,8 @@
 #define BM_OUT_STATUS_DED  0x0400
 #define BM_OUT_STATUS_LOCKED   0x0800
 #define BM_OUT_STATUS_PROGFAIL 0x1000
+#elif defined(CONFIG_MX8M)
+#define BM_CTRL_ADDR   0x00ff
 #else
 #define BM_CTRL_ADDR   0x007f
 #endif
@@ -79,6 +81,9 @@
 #elif defined(CONFIG_MX7ULP)
 #define FUSE_BANK_SIZE 0x80
 #define FUSE_BANKS 31
+#elif defined(CONFIG_MX8M)
+#define FUSE_BANK_SIZE 0x40
+#define FUSE_BANKS 64
 #else
 #error "Unsupported architecture\n"
 #endif
@@ -294,6 +299,8 @@ static void setup_direct_access(struct ocotp_regs *regs, 
u32 bank, u32 word,
u32 wr_unlock = write ? BV_CTRL_WR_UNLOCK_KEY : 0;
 #ifdef CONFIG_MX7
u32 addr = bank;
+#elif defined CONFIG_MX8M
+   u32 addr = bank << 2 | word;
 #else
u32 addr;
/* Bank 7 and Bank 8 only supports 4 words each for i.MX6ULL */
-- 
2.14.1

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[U-Boot] [PATCH V2 08/23] imx: cpu: update cpu file to support i.MX8M

[Peng Fan]

Update get_reset_cause to reflect i.MX8M
Compile out get_ahb_clk and set_chipselect_size for i.MX8M

Signed-off-by: Peng Fan 
---
 arch/arm/mach-imx/cpu.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 18205dc984..c811252733 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -62,6 +62,11 @@ static char *get_reset_cause(void)
return "WDOG4";
case 0x00200:
return "TEMPSENSE";
+#elif defined(CONFIG_MX8M)
+   case 0x00100:
+   return "WDOG2";
+   case 0x00200:
+   return "TEMPSENSE";
 #else
case 0x00100:
return "TEMPSENSE";
@@ -137,6 +142,8 @@ unsigned imx_ddr_size(void)
 const char *get_imx_type(u32 imxtype)
 {
switch (imxtype) {
+   case MXC_CPU_MX8MQ:
+   return "8MQ";   /* Quad-core version of the mx8m */
case MXC_CPU_MX7S:
return "7S";/* Single-core version of the mx7 */
case MXC_CPU_MX7D:
@@ -259,7 +266,7 @@ int cpu_mmc_init(bd_t *bis)
 }
 #endif
 
-#ifndef CONFIG_MX7
+#if !(defined(CONFIG_MX7) || defined(CONFIG_MX8M))
 u32 get_ahb_clk(void)
 {
struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -293,6 +300,7 @@ void arch_preboot_os(void)
 #endif
 }
 
+#ifndef CONFIG_MX8M
 void set_chipselect_size(int const cs_size)
 {
unsigned int reg;
@@ -323,3 +331,4 @@ void set_chipselect_size(int const cs_size)
 
writel(reg, &iomuxc_regs->gpr[1]);
 }
+#endif
-- 
2.14.1

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[U-Boot] [PATCH V2 12/23] imx: mx8m: add soc related settings and files

[Peng Fan]

Add SoC level initialization code
 - arch_cpu_init
 - mmu table
 - detect cpu revision
 - reset cpu and wdog settings
 - M4 boot
 - timer init
 - wdog settings
 - lowlevel init to save/restore registers
 - a few dummy header file to avoid build failure
 - ft_system_setup and ft_add_optee_node
 - mmc env related

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-mx8m/crm_regs.h  |  10 +
 arch/arm/include/asm/arch-mx8m/gpio.h  |  12 +
 arch/arm/include/asm/arch-mx8m/sys_proto.h |  18 +
 arch/arm/mach-imx/Makefile |   1 +
 arch/arm/mach-imx/mx8m/Makefile|   3 +-
 arch/arm/mach-imx/mx8m/lowlevel_init.S |  63 
 arch/arm/mach-imx/mx8m/soc.c   | 539 +
 7 files changed, 645 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-mx8m/crm_regs.h
 create mode 100644 arch/arm/include/asm/arch-mx8m/gpio.h
 create mode 100644 arch/arm/include/asm/arch-mx8m/sys_proto.h
 create mode 100644 arch/arm/mach-imx/mx8m/lowlevel_init.S
 create mode 100644 arch/arm/mach-imx/mx8m/soc.c

diff --git a/arch/arm/include/asm/arch-mx8m/crm_regs.h 
b/arch/arm/include/asm/arch-mx8m/crm_regs.h
new file mode 100644
index 00..6582318983
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx8m/crm_regs.h
@@ -0,0 +1,10 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_MX8M_CRM_REGS_H
+#define _ASM_ARCH_MX8M_CRM_REGS_H
+/* Dummy header, some imx-common code needs this file */
+#endif
diff --git a/arch/arm/include/asm/arch-mx8m/gpio.h 
b/arch/arm/include/asm/arch-mx8m/gpio.h
new file mode 100644
index 00..b666d37700
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx8m/gpio.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_MX8M_GPIO_H
+#define __ASM_ARCH_MX8M_GPIO_H
+
+#include 
+
+#endif
diff --git a/arch/arm/include/asm/arch-mx8m/sys_proto.h 
b/arch/arm/include/asm/arch-mx8m/sys_proto.h
new file mode 100644
index 00..8bf9ac6697
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx8m/sys_proto.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __ARCH_MX8M_SYS_PROTO_H
+#define __ARCH_MX8M_SYS_PROTO_H
+
+#include 
+
+void set_wdog_reset(struct wdog_regs *wdog);
+void enable_tzc380(void);
+void restore_boot_params(void);
+extern unsigned long rom_pointer[];
+enum boot_device get_boot_device(void);
+bool is_usb_boot(void);
+#endif
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index c807174363..27c154b8b3 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -127,4 +127,5 @@ obj-$(CONFIG_MX5) += mx5/
 obj-$(CONFIG_MX6) += mx6/
 obj-$(CONFIG_MX7) += mx7/
 obj-$(CONFIG_ARCH_MX7ULP) += mx7ulp/
+obj-$(CONFIG_MX8M) += mx8m/
 
diff --git a/arch/arm/mach-imx/mx8m/Makefile b/arch/arm/mach-imx/mx8m/Makefile
index 05f38842f0..b1c5d74aab 100644
--- a/arch/arm/mach-imx/mx8m/Makefile
+++ b/arch/arm/mach-imx/mx8m/Makefile
@@ -4,4 +4,5 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += clock.o clock_slice.o
+obj-y += lowlevel_init.o
+obj-y += clock.o clock_slice.o soc.o
diff --git a/arch/arm/mach-imx/mx8m/lowlevel_init.S 
b/arch/arm/mach-imx/mx8m/lowlevel_init.S
new file mode 100644
index 00..d388f3ba95
--- /dev/null
+++ b/arch/arm/mach-imx/mx8m/lowlevel_init.S
@@ -0,0 +1,63 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+.align 8
+.global rom_pointer
+rom_pointer:
+   .space 256
+
+/*
+ * Routine: save_boot_params (called after reset from start.S)
+ */
+
+.global save_boot_params
+save_boot_params:
+   /* The firmware provided ATAG/FDT address can be found in r2/x0 */
+   adr x0, rom_pointer
+   stp x1, x2, [x0], #16
+   stp x3, x4, [x0], #16
+   stp x5, x6, [x0], #16
+   stp x7, x8, [x0], #16
+   stp x9, x10, [x0], #16
+   stp x11, x12, [x0], #16
+   stp x13, x14, [x0], #16
+   stp x15, x16, [x0], #16
+   stp x17, x18, [x0], #16
+   stp x19, x20, [x0], #16
+   stp x21, x22, [x0], #16
+   stp x23, x24, [x0], #16
+   stp x25, x26, [x0], #16
+   stp x27, x28, [x0], #16
+   stp x29, x30, [x0], #16
+   mov x30, sp
+   str x30, [x0], #8
+
+   /* Returns */
+   b   save_boot_params_ret
+
+.global restore_boot_params
+restore_boot_params:
+   adr x0, rom_pointer
+   ldp x1, x2, [x0], #16
+   ldp x3, x4, [x0], #16
+   ldp x5, x6, [x0], #16
+   ldp x7, x8, [x0], #16
+   ldp x9, x10, [x0], #16
+   ldp x11, x12, [x0], #16
+   ldp x13, x14, [x0], #16
+   ldp x15, x16, [x0], #16
+   ldp x17, x18, [x0], #16
+   ldp x19, x20, [x0], #16
+   ldp x21, x22, [x0], #16
+   ldp x23, x24, [x0], #16
+   ldp x25, x26, [x0

[U-Boot] [PATCH V2 11/23] imx: add pad settings bit definition for i.MX8M

[Peng Fan]

Add pad settings bit definition for i.MX8M.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/mach-imx/iomux-v3.h | 22 +-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h 
b/arch/arm/include/asm/mach-imx/iomux-v3.h
index ad35e0109e..ade2105cca 100644
--- a/arch/arm/include/asm/mach-imx/iomux-v3.h
+++ b/arch/arm/include/asm/mach-imx/iomux-v3.h
@@ -87,7 +87,27 @@ typedef u64 iomux_v3_cfg_t;
 #define IOMUX_CONFIG_LPSR   0x20
 #define MUX_MODE_LPSR   ((iomux_v3_cfg_t)IOMUX_CONFIG_LPSR << \
MUX_MODE_SHIFT)
-#ifdef CONFIG_MX7
+#ifdef CONFIG_MX8M
+#define PAD_CTL_DSE0   (0x0 << 0)
+#define PAD_CTL_DSE1   (0x1 << 0)
+#define PAD_CTL_DSE2   (0x2 << 0)
+#define PAD_CTL_DSE3   (0x3 << 0)
+#define PAD_CTL_DSE4   (0x4 << 0)
+#define PAD_CTL_DSE5   (0x5 << 0)
+#define PAD_CTL_DSE6   (0x6 << 0)
+#define PAD_CTL_DSE7   (0x7 << 0)
+
+#define PAD_CTL_FSEL0  (0x0 << 3)
+#define PAD_CTL_FSEL1  (0x1 << 3)
+#define PAD_CTL_FSEL2  (0x2 << 3)
+#define PAD_CTL_FSEL3  (0x3 << 3)
+
+#define PAD_CTL_ODE(0x1 << 5)
+#define PAD_CTL_PUE(0x1 << 6)
+#define PAD_CTL_HYS(0x1 << 7)
+#define PAD_CTL_LVTTL  (0x1 << 8)
+
+#elif defined CONFIG_MX7
 
 #define IOMUX_LPSR_SEL_INPUT_OFS 0x7
 
-- 
2.14.1

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[U-Boot] [PATCH V2 13/23] imx: makefile: compile files for i.MX8M

[Peng Fan]

Compile files for i.MX8M

Signed-off-by: Peng Fan 
---
 arch/arm/mach-imx/Makefile | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 27c154b8b3..de91c137a9 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -7,14 +7,21 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-ifeq ($(SOC),$(filter $(SOC),mx25 mx35 mx5 mx6 mx7 vf610))
+ifeq ($(SOC),$(filter $(SOC),mx25 mx35 mx5 mx6 mx7 mx8m vf610))
 obj-y  = iomux-v3.o
 endif
+
+ifeq ($(SOC),$(filter $(SOC),mx8m))
+obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o
+obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
+obj-y += cpu.o
+endif
+
 ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
 obj-y  += timer.o cpu.o speed.o
 obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
 endif
-ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs))
+ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs mx8m))
 obj-y  += misc.o
 obj-$(CONFIG_SPL_BUILD)+= spl.o
 endif
-- 
2.14.1

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[U-Boot] [PATCH V2 03/23] imx: mx8m: add pin header file

[Peng Fan]

Add pin header file for i.MX8M

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-mx8m/mx8mq_pins.h | 623 
 1 file changed, 623 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mx8m/mx8mq_pins.h

diff --git a/arch/arm/include/asm/arch-mx8m/mx8mq_pins.h 
b/arch/arm/include/asm/arch-mx8m/mx8mq_pins.h
new file mode 100644
index 00..062bea7299
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx8m/mx8mq_pins.h
@@ -0,0 +1,623 @@
+/*
+ * Copyright (C) 2017 NXP
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_MX8MQ_PINS_H__
+#define __ASM_ARCH_MX8MQ_PINS_H__
+
+#include 
+
+enum {
+   IMX8MQ_PAD_GPIO1_IO00__GPIO1_IO0= 
IOMUX_PAD(0x0290, 0x0028, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO00__CCM_ENET_PHY_REF_CLK_ROOT= 
IOMUX_PAD(0x0290, 0x0028, 1, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO00__XTALOSC_REF_CLK_32K  = 
IOMUX_PAD(0x0290, 0x0028, 5, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO00__CCM_EXT_CLK1 = 
IOMUX_PAD(0x0290, 0x0028, 6, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO00__JTAG_FAIL= 
IOMUX_PAD(0x0290, 0x0028, 7, 0x, 0, 0),
+
+   IMX8MQ_PAD_GPIO1_IO01__GPIO1_IO1= 
IOMUX_PAD(0x0294, 0x002C, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO01__PWM1_OUT = 
IOMUX_PAD(0x0294, 0x002C, 1, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO01__XTALOSC_REF_CLK_24M  = 
IOMUX_PAD(0x0294, 0x002C, 5, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO01__CCM_EXT_CLK2 = 
IOMUX_PAD(0x0294, 0x002C, 6, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO01__JTAG_ACTIVE  = 
IOMUX_PAD(0x0294, 0x002C, 7, 0x, 0, 0),
+
+   IMX8MQ_PAD_GPIO1_IO02__GPIO1_IO2= 
IOMUX_PAD(0x0298, 0x0030, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO02__WDOG1_WDOG_B = 
IOMUX_PAD(0x0298, 0x0030, 1, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO02__WDOG1_WDOG_ANY   = 
IOMUX_PAD(0x0298, 0x0030, 5, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO02__JTAG_DE_B= 
IOMUX_PAD(0x0298, 0x0030, 7, 0x, 0, 0),
+
+   IMX8MQ_PAD_GPIO1_IO03__GPIO1_IO3= 
IOMUX_PAD(0x029C, 0x0034, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO03__USDHC1_VSELECT   = 
IOMUX_PAD(0x029C, 0x0034, 1, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO03__SDMA1_EXT_EVENT0 = 
IOMUX_PAD(0x029C, 0x0034, 5, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO03__XTALOSC_XTAL_OK  = 
IOMUX_PAD(0x029C, 0x0034, 6, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO03__JTAG_DONE= 
IOMUX_PAD(0x029C, 0x0034, 7, 0x, 0, 0),
+
+   IMX8MQ_PAD_GPIO1_IO04__GPIO1_IO4= 
IOMUX_PAD(0x02A0, 0x0038, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO04__USDHC2_VSELECT   = 
IOMUX_PAD(0x02A0, 0x0038, 1, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO04__SDMA1_EXT_EVENT1 = 
IOMUX_PAD(0x02A0, 0x0038, 5, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO04__XTALOSC_XTAL_OK_1V   = 
IOMUX_PAD(0x02A0, 0x0038, 6, 0x, 0, 0),
+
+   IMX8MQ_PAD_GPIO1_IO05__GPIO1_IO5= 
IOMUX_PAD(0x02A4, 0x003C, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO05__ARM_PLATFORM_CM4_NMI = 
IOMUX_PAD(0x02A4, 0x003C, 1, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO05__CCM_PMIC_READY   = 
IOMUX_PAD(0x02A4, 0x003C, 5, 0x04BC, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO05__SRC_INT_BOOT = 
IOMUX_PAD(0x02A4, 0x003C, 6, 0x, 0, 0),
+
+   IMX8MQ_PAD_GPIO1_IO06__GPIO1_IO6= 
IOMUX_PAD(0x02A8, 0x0040, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO06__ENET_MDC = 
IOMUX_PAD(0x02A8, 0x0040, 1, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO06__USDHC1_CD_B  = 
IOMUX_PAD(0x02A8, 0x0040, 5, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO06__CCM_EXT_CLK3 = 
IOMUX_PAD(0x02A8, 0x0040, 6, 0x, 0, 0),
+
+   IMX8MQ_PAD_GPIO1_IO07__GPIO1_IO7= 
IOMUX_PAD(0x02AC, 0x0044, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO07__ENET_MDIO= 
IOMUX_PAD(0x02AC, 0x0044, 1, 0x04C0, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO07__USDHC1_WP= 
IOMUX_PAD(0x02AC, 0x0044, 5, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO07__CCM_EXT_CLK4 = 
IOMUX_PAD(0x02AC, 0x0044, 6, 0x, 0, 0),
+
+   IMX8MQ_PAD_GPIO1_IO08__GPIO1_IO8= 
IOMUX_PAD(0x02B0, 0x0048, 0, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO08__ENET_1588_EVENT0_IN  = 
IOMUX_PAD(0x02B0, 0x0048, 1, 0x, 0, 0),
+   IMX8MQ_PAD_GPIO1_IO08__USDHC2_RESET_B   = 
IOM

[U-Boot] [PATCH V2 05/23] imx: add sip function

[Peng Fan]

Add SiP (Silicon Provider) services function to issue
SMC call to Arm Trusted Firmware.

More SiP information could be found in
  https://github.com/ARM-software/arm-trusted-firmware/blob/master/
  docs/arm-sip-service.rst

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/mach-imx/sys_proto.h |  3 +++
 arch/arm/mach-imx/Makefile|  2 ++
 arch/arm/mach-imx/sip.c   | 23 +++
 include/imx_sip.h | 14 ++
 4 files changed, 42 insertions(+)
 create mode 100644 arch/arm/mach-imx/sip.c
 create mode 100644 include/imx_sip.h

diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h 
b/arch/arm/include/asm/mach-imx/sys_proto.h
index a80a392a73..2d8afed406 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -122,4 +122,7 @@ void lcdif_power_down(void);
 int mxs_reset_block(struct mxs_register_32 *reg);
 int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout);
 int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout);
+
+unsigned long call_imx_sip(unsigned long id, unsigned long reg0,
+  unsigned long reg1, unsigned long reg2);
 #endif
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index d77c10e176..c807174363 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -121,6 +121,8 @@ spl/u-boot-nand-spl.imx: SPL FORCE
 
 targets += $(addprefix ../../../,$(IMX_CONFIG) SPL u-boot.uim 
spl/u-boot-nand-spl.imx)
 
+obj-$(CONFIG_ARM64) += sip.o
+
 obj-$(CONFIG_MX5) += mx5/
 obj-$(CONFIG_MX6) += mx6/
 obj-$(CONFIG_MX7) += mx7/
diff --git a/arch/arm/mach-imx/sip.c b/arch/arm/mach-imx/sip.c
new file mode 100644
index 00..b724330d35
--- /dev/null
+++ b/arch/arm/mach-imx/sip.c
@@ -0,0 +1,23 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+unsigned long call_imx_sip(unsigned long id, unsigned long reg0,
+  unsigned long reg1, unsigned long reg2)
+{
+   struct pt_regs regs;
+
+   regs.regs[0] = id;
+   regs.regs[1] = reg0;
+   regs.regs[2] = reg1;
+   regs.regs[3] = reg2;
+
+   smc_call(®s);
+
+   return regs.regs[0];
+}
diff --git a/include/imx_sip.h b/include/imx_sip.h
new file mode 100644
index 00..48ab878749
--- /dev/null
+++ b/include/imx_sip.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _IMX_SIP_H__
+#define _IMX_SIP_H_
+
+#define IMX_SIP_SRC0xC205
+#define IMX_SIP_SRC_M4_START   0x00
+#define IMX_SIP_SRC_M4_STARTED 0x01
+
+#endif
-- 
2.14.1

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[U-Boot] [PATCH V2 04/23] imx: mx8m: add clock driver

[Peng Fan]

Add clock driver to support i.MX8M.

There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-mx8m/clock.h | 657 +++
 arch/arm/mach-imx/mx8m/Makefile|   7 +
 arch/arm/mach-imx/mx8m/clock.c | 788 +
 arch/arm/mach-imx/mx8m/clock_slice.c   | 742 +++
 4 files changed, 2194 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mx8m/clock.h
 create mode 100644 arch/arm/mach-imx/mx8m/Makefile
 create mode 100644 arch/arm/mach-imx/mx8m/clock.c
 create mode 100644 arch/arm/mach-imx/mx8m/clock_slice.c

diff --git a/arch/arm/include/asm/arch-mx8m/clock.h 
b/arch/arm/include/asm/arch-mx8m/clock.h
new file mode 100644
index 00..12b453
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx8m/clock.h
@@ -0,0 +1,657 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * Peng Fan 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_IMX8M_CLOCK_H
+#define _ASM_ARCH_IMX8M_CLOCK_H
+
+#include 
+
+enum pll_clocks {
+   ANATOP_ARM_PLL,
+   ANATOP_GPU_PLL,
+   ANATOP_SYSTEM_PLL1,
+   ANATOP_SYSTEM_PLL2,
+   ANATOP_SYSTEM_PLL3,
+   ANATOP_AUDIO_PLL1,
+   ANATOP_AUDIO_PLL2,
+   ANATOP_VIDEO_PLL1,
+   ANATOP_VIDEO_PLL2,
+   ANATOP_DRAM_PLL,
+};
+
+enum clk_slice_type {
+   CORE_CLOCK_SLICE,
+   BUS_CLOCK_SLICE,
+   IP_CLOCK_SLICE,
+   AHB_CLOCK_SLICE,
+   IPG_CLOCK_SLICE,
+   CORE_SEL_CLOCK_SLICE,
+   DRAM_SEL_CLOCK_SLICE,
+};
+
+enum clk_root_index {
+   MXC_ARM_CLK = 0,
+   ARM_A53_CLK_ROOT= 0,
+   ARM_M4_CLK_ROOT = 1,
+   VPU_A53_CLK_ROOT= 2,
+   GPU_CORE_CLK_ROOT   = 3,
+   GPU_SHADER_CLK_ROOT = 4,
+   MAIN_AXI_CLK_ROOT   = 16,
+   ENET_AXI_CLK_ROOT   = 17,
+   NAND_USDHC_BUS_CLK_ROOT = 18,
+   VPU_BUS_CLK_ROOT= 19,
+   DISPLAY_AXI_CLK_ROOT= 20,
+   DISPLAY_APB_CLK_ROOT= 21,
+   DISPLAY_RTRM_CLK_ROOT   = 22,
+   USB_BUS_CLK_ROOT= 23,
+   GPU_AXI_CLK_ROOT= 24,
+   GPU_AHB_CLK_ROOT= 25,
+   NOC_CLK_ROOT= 26,
+   NOC_APB_CLK_ROOT= 27,
+   AHB_CLK_ROOT= 32,
+   IPG_CLK_ROOT= 33,
+   MXC_IPG_CLK = 33,
+   AUDIO_AHB_CLK_ROOT  = 34,
+   MIPI_DSI_ESC_RX_CLK_ROOT= 36,
+   DRAM_SEL_CFG= 48,
+   CORE_SEL_CFG= 49,
+   DRAM_ALT_CLK_ROOT   = 64,
+   DRAM_APB_CLK_ROOT   = 65,
+   VPU_G1_CLK_ROOT = 66,
+   VPU_G2_CLK_ROOT = 67,
+   DISPLAY_DTRC_CLK_ROOT   = 68,
+   DISPLAY_DC8000_CLK_ROOT = 69,
+   PCIE1_CTRL_CLK_ROOT = 70,
+   PCIE1_PHY_CLK_ROOT  = 71,
+   PCIE1_AUX_CLK_ROOT  = 72,
+   DC_PIXEL_CLK_ROOT   = 73,
+   LCDIF_PIXEL_CLK_ROOT= 74,
+   SAI1_CLK_ROOT   = 75,
+   SAI2_CLK_ROOT   = 76,
+   SAI3_CLK_ROOT   = 77,
+   SAI4_CLK_ROOT   = 78,
+   SAI5_CLK_ROOT   = 79,
+   SAI6_CLK_ROOT   = 80,
+   SPDIF1_CLK_ROOT = 81,
+   SPDIF2_CLK_ROOT = 82,
+   ENET_REF_CLK_ROOT   = 83,
+   ENET_TIMER_CLK_ROOT = 84,
+   ENET_PHY_REF_CLK_ROOT   = 85,
+   NAND_CLK_ROOT   = 86,
+   QSPI_CLK_ROOT   = 87,
+   MXC_ESDHC_CLK   = 88,
+   USDHC1_CLK_ROOT = 88,
+   MXC_ESDHC2_CLK  = 89,
+   USDHC2_CLK_ROOT = 89,
+   I2C1_CLK_ROOT   = 90,
+   MXC_I2C_CLK = 90,
+   I2C2_CLK_ROOT   = 91,
+   I2C3_CLK_ROOT   = 92,
+   I2C4_CLK_ROOT   = 93,
+   UART1_CLK_ROOT  = 94,
+   UART2_CLK_ROOT  = 95,
+   UART3_CLK_ROOT  = 96,
+   UART4_CLK_ROOT  = 97,
+   USB_CORE_REF_CLK_ROOT   = 98,
+   USB_PHY_REF_CLK_ROOT= 99,
+   GIC_CLK_ROOT= 100,
+   ECSPI1_CLK_ROOT = 101,
+   ECSPI2_CLK_ROOT = 102,
+   PWM1_CLK_ROOT   = 103,
+   PWM2_CLK_ROOT   = 104,
+   PWM3_CLK_ROOT   = 105,
+   PWM4_CLK_ROOT 

[U-Boot] [PATCH V2 06/23] imx: boot_mode: add USB_BOOT entry

[Peng Fan]

Add USB_BOOT entry.

Signed-off-by: Peng Fan 
Reviewed-by: Stefano Babic 
---
 arch/arm/include/asm/mach-imx/boot_mode.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/include/asm/mach-imx/boot_mode.h 
b/arch/arm/include/asm/mach-imx/boot_mode.h
index a8239f2f7a..e3ed046b25 100644
--- a/arch/arm/include/asm/mach-imx/boot_mode.h
+++ b/arch/arm/include/asm/mach-imx/boot_mode.h
@@ -26,6 +26,7 @@ enum boot_device {
MMC4_BOOT,
NAND_BOOT,
QSPI_BOOT,
+   USB_BOOT,
UNKNOWN_BOOT,
BOOT_DEV_NUM = UNKNOWN_BOOT,
 };
-- 
2.14.1

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[U-Boot] [PATCH V2 01/23] imx: add i.MX8M into Kconfig

[Peng Fan]

Add i.MX8M into Kconfig, create a new folder mx8m
dedicated for i.MX8M.

Signed-off-by: Peng Fan 
---
 arch/arm/Kconfig   |  8 
 arch/arm/Makefile  |  4 ++--
 arch/arm/mach-imx/mx8m/Kconfig | 10 ++
 3 files changed, 20 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-imx/mx8m/Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ca386decfe..3b2adbc1f2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -604,6 +604,12 @@ config ARCH_MESON
  targeted at media players and tablet computers. We currently
  support the S905 (GXBaby) 64-bit SoC.
 
+config ARCH_MX8M
+   bool "NXP i.MX8M platform"
+   select ARM64
+   select DM
+   select SUPPORT_SPL
+
 config ARCH_MX25
bool "NXP MX25"
select CPU_ARM926EJS
@@ -1177,6 +1183,8 @@ source "arch/arm/cpu/armv7/ls102xa/Kconfig"
 
 source "arch/arm/mach-imx/mx2/Kconfig"
 
+source "arch/arm/mach-imx/mx8m/Kconfig"
+
 source "arch/arm/mach-imx/mx7ulp/Kconfig"
 
 source "arch/arm/mach-imx/mx7/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 5f1caf8f86..4db0398dde 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -95,11 +95,11 @@ libs-y += arch/arm/cpu/
 libs-y += arch/arm/lib/
 
 ifeq ($(CONFIG_SPL_BUILD),y)
-ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 
mx6 mx7 mx35))
+ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 
mx6 mx7 mx35 mx8m))
 libs-y += arch/arm/mach-imx/
 endif
 else
-ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs vf610))
+ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs mx8m 
vf610))
 libs-y += arch/arm/mach-imx/
 endif
 endif
diff --git a/arch/arm/mach-imx/mx8m/Kconfig b/arch/arm/mach-imx/mx8m/Kconfig
new file mode 100644
index 00..3a84c2f2b0
--- /dev/null
+++ b/arch/arm/mach-imx/mx8m/Kconfig
@@ -0,0 +1,10 @@
+if ARCH_MX8M
+
+config MX8M
+   bool
+   select ROM_UNIFIED_SECTIONS
+
+config SYS_SOC
+   default "mx8m"
+
+endif
-- 
2.14.1

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[U-Boot] [PATCH V2 02/23] imx: mx8m: add register definition header file

[Peng Fan]

Add register definition header file for i.MX8M

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-mx8m/imx-regs.h | 318 ++
 1 file changed, 318 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mx8m/imx-regs.h

diff --git a/arch/arm/include/asm/arch-mx8m/imx-regs.h 
b/arch/arm/include/asm/arch-mx8m/imx-regs.h
new file mode 100644
index 00..2fb392d08e
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx8m/imx-regs.h
@@ -0,0 +1,318 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_MX8M_REGS_H__
+#define __ASM_ARCH_MX8M_REGS_H__
+
+#include 
+
+#define M4_BOOTROM_BASE_ADDR   0x007E
+
+#define SAI1_BASE_ADDR 0x3001
+#define SAI6_BASE_ADDR 0x3003
+#define SAI5_BASE_ADDR 0x3004
+#define SAI4_BASE_ADDR 0x3005
+#define SPBA2_BASE_ADDR0x300F
+#define AIPS1_BASE_ADDR0x301F
+#define GPIO1_BASE_ADDR0X3020
+#define GPIO2_BASE_ADDR0x3021
+#define GPIO3_BASE_ADDR0x3022
+#define GPIO4_BASE_ADDR0x3023
+#define GPIO5_BASE_ADDR0x3024
+#define ANA_TSENSOR_BASE_ADDR  0x3026
+#define ANA_OSC_BASE_ADDR  0x3027
+#define WDOG1_BASE_ADDR0x3028
+#define WDOG2_BASE_ADDR0x3029
+#define WDOG3_BASE_ADDR0x302A
+#define SDMA2_BASE_ADDR0x302C
+#define GPT1_BASE_ADDR 0x302D
+#define GPT2_BASE_ADDR 0x302E
+#define GPT3_BASE_ADDR 0x302F
+#define ROMCP_BASE_ADDR0x3031
+#define LCDIF_BASE_ADDR0x3032
+#define IOMUXC_BASE_ADDR   0x3033
+#define IOMUXC_GPR_BASE_ADDR   0x3034
+#define OCOTP_BASE_ADDR0x3035
+#define ANA_PLL_BASE_ADDR  0x3036
+#define SNVS_HP_BASE_ADDR  0x3037
+#define CCM_BASE_ADDR  0x3038
+#define SRC_BASE_ADDR  0x3039
+#define GPC_BASE_ADDR  0x303A
+#define SEMAPHORE1_BASE_ADDR   0x303B
+#define SEMAPHORE2_BASE_ADDR   0x303C
+#define RDC_BASE_ADDR  0x303D
+#define CSU_BASE_ADDR  0x303E
+
+#define AIPS2_BASE_ADDR0x305F
+#define PWM1_BASE_ADDR 0x3066
+#define PWM2_BASE_ADDR 0x3067
+#define PWM3_BASE_ADDR 0x3068
+#define PWM4_BASE_ADDR 0x3069
+#define SYSCNT_RD_BASE_ADDR0x306A
+#define SYSCNT_CMP_BASE_ADDR   0x306B
+#define SYSCNT_CTRL_BASE_ADDR  0x306C
+#define GPT6_BASE_ADDR 0x306E
+#define GPT5_BASE_ADDR 0x306F
+#define GPT4_BASE_ADDR 0x3070
+#define PERFMON1_BASE_ADDR 0x307C
+#define PERFMON2_BASE_ADDR 0x307D
+#define QOSC_BASE_ADDR 0x307F
+
+#define SPDIF1_BASE_ADDR   0x3081
+#define ECSPI1_BASE_ADDR   0x3082
+#define ECSPI2_BASE_ADDR   0x3083
+#define ECSPI3_BASE_ADDR   0x3084
+#define UART1_BASE_ADDR0x3086
+#define UART3_BASE_ADDR0x3088
+#define UART2_BASE_ADDR0x3089
+#define SPDIF2_BASE_ADDR   0x308A
+#define SAI2_BASE_ADDR 0x308B
+#define SAI3_BASE_ADDR 0x308C
+#define SPBA1_BASE_ADDR0x308F
+#define CAAM_BASE_ADDR 0x3090
+#define AIPS3_BASE_ADDR0x309F
+#define MIPI_PHY_BASE_ADDR 0x30A0
+#define MIPI_DSI_BASE_ADDR 0x30A1
+#define I2C1_BASE_ADDR 0x30A2
+#define I2C2_BASE_ADDR 0x30A3
+#define I2C3_BASE_ADDR 0x30A4
+#define I2C4_BASE_ADDR 0x30A5
+#define UART4_BASE_ADDR0x30A6
+#define MIPI_CSI_BASE_ADDR 0x30A7
+#define MIPI_CSI_PHY1_BASE_ADDR0x30A8
+#define CSI1_BASE_ADDR 0x30A9
+#define MU_A_BASE_ADDR 0x30AA
+#define MU_B_BASE_ADDR 0x30AB
+#define SEMAPHOR_HS_BASE_ADDR  0x30AC
+#define USDHC1_BASE_ADDR   0x30B4
+#define USDHC2_BASE_ADDR   0x30B5
+#define MIPI_CS2_BASE_ADDR 0x30B6
+#define MIPI_CSI_PHY2_BASE_ADDR0x30B7
+#define CSI2_BASE_ADDR 0x30B8
+#define QSPI0_BASE_ADDR0x30BB
+#define QSPI0_AMBA_BASE0x0800
+#define SDMA1_BASE_ADDR0x30BD
+#define ENET1_BASE_ADDR0x30BE
+
+#define HDMI_CTRL_BASE_ADDR0x32C0
+#define AIPS4_BASE_ADDR0x32DF
+#define DC1_BASE_ADDR  0x32E0
+#define DC2_BASE_ADDR  0x32E1
+#define DC3_BASE_ADDR  0x32E2
+#define HDMI_SEC_BASE_ADDR 0x32E4
+#define TZASC_BASE_ADDR0x32F8
+#define MTR_BASE_ADDR  0x32FB
+#define PLATFORM_CTRL_BASE_ADDR0x32FE
+
+#define MXS_APBH_BASE  0x3300
+#define MXS_GPMI_BASE  0x33002000
+#define MXS_BCH_

[U-Boot] [PATCH V2 00/23] imx: add i.MX8M support and i.MX8MQ EVK

[Peng Fan]

This patchset is to add i.MX8M and i.MX8MQ-EVK support

V2:
 The two patches: "power: pmic.h: include dm/ofnode.h" and
  "power: pmic/regulator allow dm be omited by SPL"
 are still included in the patchset.

 patch 02/23: convert to structure, drop is_boot_from_usb and
  disconnect_from_usb
 patch 04/23: conver to use structure for the clock driver, removed the
  CCM_xxx macros. Add static for local functons.
  Add init_usdhc_clk, init_uart_clk and etc to not enable
  them all at default.
 patch 05/23: Add more commit msg for the sip part.
 patch 08/23: Merge the spl boot device with i.MX7
 patch 12/23: Typo fix and return error fix from Heiko for the SoC related part
 patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be
  accepted at current stage, to make others still be could be
  compiled.

The patchset depends on
https://patchwork.ozlabs.org/patch/841934/
https://patchwork.ozlabs.org/patch/841958/
to be tested on real hardware.

V1:


patch: "power: pmic.h: include dm/ofnode.h" and
"power: pmic/regulator allow dm be omited by SPL" is previously reviewed
in mailist to not merged. If no issue, you may pick it up.

The board support is a large patch because of the ddr related code.
If it is not good, please first review/pick-up other patches if they
are ok.

Peng Fan (23):
  imx: add i.MX8M into Kconfig
  imx: mx8m: add register definition header file
  imx: mx8m: add pin header file
  imx: mx8m: add clock driver
  imx: add sip function
  imx: boot_mode: add USB_BOOT entry
  power: pmic.h: include dm/ofnode.h
  imx: cpu: update cpu file to support i.MX8M
  imx: spl: implement spl_boot_device for i.MX8M
  imx: add i.MX8MQ SoC Revision and is_mx8m helper
  imx: add pad settings bit definition for i.MX8M
  imx: mx8m: add soc related settings and files
  imx: makefile: compile files for i.MX8M
  misc: ocotp: add i.MX8M support
  mmc: fsl_esdhc: support i.MX8M
  imx: lcdif: include i.MX8M
  gpio: mxc: add i.MX8M support
  net: fec: do not access reserved register for i.MX8M
  net: fec: fix build warnings for 64bits support
  power: pmic/regulator allow dm be omitted by SPL
  imx: imx8mq: add dtsi file
  imx: add i.MX8MQ EVK support
  Add DDR settings

 arch/arm/Kconfig   |8 +
 arch/arm/Makefile  |4 +-
 arch/arm/dts/Makefile  |2 +
 arch/arm/dts/fsl-imx8-ca53.dtsi|   92 ++
 arch/arm/dts/fsl-imx8mq-evk.dts|  424 
 arch/arm/dts/fsl-imx8mq.dtsi   |  425 
 arch/arm/include/asm/arch-imx/cpu.h|6 +-
 arch/arm/include/asm/arch-mx8m/clock.h |  657 +++
 arch/arm/include/asm/arch-mx8m/crm_regs.h  |   10 +
 arch/arm/include/asm/arch-mx8m/ddr_memory_map.h|  495 +
 arch/arm/include/asm/arch-mx8m/gpio.h  |   12 +
 arch/arm/include/asm/arch-mx8m/imx-regs.h  |  318 ++
 arch/arm/include/asm/arch-mx8m/mx8mq_pins.h|  623 +++
 arch/arm/include/asm/arch-mx8m/sys_proto.h |   18 +
 arch/arm/include/asm/mach-imx/boot_mode.h  |1 +
 arch/arm/include/asm/mach-imx/iomux-v3.h   |   22 +-
 arch/arm/include/asm/mach-imx/regs-lcdif.h |   11 +-
 arch/arm/include/asm/mach-imx/sys_proto.h  |4 +
 arch/arm/mach-imx/Makefile |   14 +-
 arch/arm/mach-imx/cpu.c|   11 +-
 arch/arm/mach-imx/mx8m/Kconfig |   22 +
 arch/arm/mach-imx/mx8m/Makefile|8 +
 arch/arm/mach-imx/mx8m/clock.c |  788 ++
 arch/arm/mach-imx/mx8m/clock_slice.c   |  742 +
 arch/arm/mach-imx/mx8m/lowlevel_init.S |   63 ++
 arch/arm/mach-imx/mx8m/soc.c   |  539 +
 arch/arm/mach-imx/sip.c|   23 +
 arch/arm/mach-imx/spl.c|   10 +-
 board/freescale/mx8mq_evk/Kconfig  |   12 +
 board/freescale/mx8mq_evk/Makefile |   12 +
 board/freescale/mx8mq_evk/README   |   38 +
 board/freescale/mx8mq_evk/ddr/ddr.h|   38 +
 board/freescale/mx8mq_evk/ddr/ddr_init.c   |  256 +
 board/freescale/mx8mq_evk/ddr/ddrphy_train.c   | 1147 
 board/freescale/mx8mq_evk/ddr/helper.c |  101 ++
 .../mx8mq_evk/ddr/wait_ddrphy_training_complete.c  |   97 ++
 board/freescale/mx8mq_evk/mx8mq_evk.c  |  156 +++
 board/freescale/mx8mq_evk/spl.c|  233 
 configs/mx8mq_evk_defconfig|   28 +
 drivers/gpio/mxc_gpio.c|   22 +-
 drivers/misc/mxc_ocotp.c   |7 +
 drivers/mmc/fsl_esdhc.c|   12 +-
 drivers/net/fec_mxc.c

[U-Boot] [v3 2/2] armv8: ls1043a: Discard the needless cpu nodes

[Wenbin song]

Using "cpu_pos_mask()" function to detect the real online cpus,
and discard the needless cpu nodes on kernel dts.

Signed-off-by: Wenbin Song 
---
Changes for v2:
None.
---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index d1a7d0de9c..39ffe1ab4d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -42,6 +42,33 @@ void ft_fixup_cpu(void *blob)
int addr_cells;
u64 val, core_id;
size_t *boot_code_size = &(__secondary_boot_code_size);
+   u32 mask = cpu_pos_mask();
+   int off_prev = -1;
+
+   off = fdt_path_offset(blob, "/cpus");
+   if (off < 0) {
+   puts("couldn't find /cpus node\n");
+   return;
+   }
+
+   fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
+
+   off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
+   "cpu", 4);
+   while (off != -FDT_ERR_NOTFOUND) {
+   reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
+   if (reg) {
+   core_id = fdt_read_number(reg, addr_cells);
+   if (!test_bit(id_to_core(core_id), &mask)) {
+   fdt_del_node(blob, off);
+   off = off_prev;
+   }
+   }
+   off_prev = off;
+   off = fdt_node_offset_by_prop_value(blob, off_prev,
+   "device_type", "cpu", 4);
+   }
+
 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
int node;
-- 
2.14.1

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[U-Boot] [v3 1/2] armv8: ls1043a/ls2080a: check SoC by device ID

[Wenbin song]

Check LS1043A/LS2080a by device ID without using personality ID to
determine revision number. This check applies to all various
personalities of the same SoC family.

Signed-off-by: Wenbin Song 
---
Changes for v2:
Modify the commit message and subject.
Add SVR_DEV and IS_SVR_DEV mocros. 
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 8 
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c| 4 ++--
 arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S   | 9 -
 arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 ++--
 drivers/net/fsl-mc/dpio/qbman_private.h| 4 ++--
 drivers/usb/common/fsl-errata.c| 7 +--
 6 files changed, 19 insertions(+), 17 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index ab5d76ea3b..021eb377a2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -502,8 +502,8 @@ int arch_early_init_r(void)
 * erratum A009635 is valid only for LS2080A SoC and
 * its personalitiesi
 */
-   svr_dev_id = get_svr() >> 16;
-   if (svr_dev_id == SVR_DEV_LS2080A)
+   svr_dev_id = get_svr();
+   if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A)))
erratum_a009635();
 #endif
 #if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
@@ -566,8 +566,8 @@ int timer_init(void)
 * For LS2080A SoC and its personalities, timer controller
 * offset is different
 */
-   svr_dev_id = get_svr() >> 16;
-   if (svr_dev_id == SVR_DEV_LS2080A)
+   svr_dev_id = get_svr();
+   if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A)))
cntcr = (u32 *)SYS_FSL_LS2080A_LS2085A_TIMER_ADDR;
 
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index cae59da803..d1a7d0de9c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -145,7 +145,7 @@ static void fdt_fixup_gic(void *blob)
 
val = gur_in32(&gur->svr);
 
-   if (SVR_SOC_VER(val) != SVR_LS1043A) {
+   if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
align_64k = 1;
} else if (SVR_REV(val) != REV1_0) {
val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
@@ -327,7 +327,7 @@ static void fdt_fixup_msi(void *blob)
 
rev = gur_in32(&gur->svr);
 
-   if (SVR_SOC_VER(rev) != SVR_LS1043A)
+   if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
return;
 
rev = SVR_REV(rev);
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S 
b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index fa93096c68..c089ceef32 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -37,9 +37,8 @@ ENTRY(get_gic_offset)
ldr x2, =DCFG_CCSR_SVR
ldr w2, [x2]
rev w2, w2
-   mov w3, w2
-   andsw3, w3, #SVR_WO_E << 8
-   mov w4, #SVR_LS1043A << 8
+   lsr w3, w2, #16
+   ldr w4, =SVR_DEV(SVR_LS1043A)
cmp w3, w4
b.ne1f
andsw2, w2, #0xff
@@ -92,7 +91,7 @@ ENTRY(lowlevel_init)
 */
bl  get_svr
lsr w0, w0, #16
-   ldr w1, =SVR_DEV_LS2080A
+   ldr w1, =SVR_DEV(SVR_LS2080A)
cmp w0, w1
b.eq1f
 
@@ -224,7 +223,7 @@ ENTRY(lowlevel_init)
 */
bl  get_svr
lsr w0, w0, #16
-   ldr w1, =SVR_DEV_LS2080A
+   ldr w1, =SVR_DEV(SVR_LS2080A)
cmp w0, w1
b.eq1f
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h 
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 247f09e0f5..09f64e7bd7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -76,8 +76,6 @@ struct cpu_type {
 #define SVR_LS2081A0x870918
 #define SVR_LS2041A0x870914
 
-#define SVR_DEV_LS2080A0x8701
-
 #define SVR_MAJ(svr)   (((svr) >> 4) & 0xf)
 #define SVR_MIN(svr)   (((svr) >> 0) & 0xf)
 #define SVR_REV(svr)   (((svr) >> 0) & 0xff)
@@ -85,6 +83,8 @@ struct cpu_type {
 #define IS_E_PROCESSOR(svr)(!((svr >> 8) & 0x1))
 #define IS_SVR_REV(svr, maj, min) \
((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
+#define SVR_DEV(svr)   ((svr) >> 8)
+#define IS_SVR_DEV(svr, dev)   (((svr) >> 16) == (dev))
 
 /* ahci port register default value */
 #define AHCI_PORT_PHY_1_CFG0xa003fffe
diff --git a/drivers/net/fsl-mc/dpio/qbman_private.h 
b/drivers/net/fsl-mc/dpio/qbman_private.h
index 73bbae373e..873323be0f 100644
--- a/drivers/net/fsl-mc/dpio/qbman_private.h
+++ b/drivers/net/fsl-mc/dpio/qbman_private.h
@@ -175,8 +175,8 @@ void qbman_version(u32 *major, u32 *minor)
 * LS2080A SoC and its personalities has qbman cotroller v

Re: [U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

[Vignesh R]

On Sunday 03 December 2017 09:29 PM, Frank Mori Hess wrote:
> This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.
> 
> My u-boot spl crashes in a loop when I boot off a
> cadence qspi flash.  I narrowed it down to the changes from commit
> dac3bf20fb2c9b03476be0d73db620f62ab3cee1 which removes
> CQSPI_INDIRECTTRIGGER_ADDR_MASK.  Restoring the mask allows the spl to
> successfully load the main u-boot.  My board is an Altera HPS cyclone
> V socfpga.  It has an ahb base address of 0xffa0 and for some
> reason, without the CQSPI_INDIRECTTRIGGER_ADDR_MASK the board reboots
> when cadence_qspi_apb_indirect_read_execute tries to read from the ahb
> base address.  I'm was using version 2016.11 of u-boot.

This breaks TI platforms where INDIRECTTRIGGER_ADDR is 32bit wide.
Instead please try this patch series which adds cdns,trigger-address DT
property: http://patchwork.ozlabs.org/patch/838589/

Regards
Vignesh

> 
> Signed-off-by: Frank Mori Hess 
> ---
>  drivers/spi/cadence_qspi_apb.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
> index e02f2217f4..b300f36607 100644
> --- a/drivers/spi/cadence_qspi_apb.c
> +++ b/drivers/spi/cadence_qspi_apb.c
> @@ -47,6 +47,7 @@
>  #define CQSPI_INST_TYPE_QUAD 2
>  
>  #define CQSPI_STIG_DATA_LEN_MAX  8
> +#define CQSPI_INDIRECTTRIGGER_ADDR_MASK  0xF
>  
>  #define CQSPI_DUMMY_CLKS_PER_BYTE8
>  #define CQSPI_DUMMY_BYTES_MAX4
> @@ -560,7 +561,7 @@ int cadence_qspi_apb_indirect_read_setup(struct 
> cadence_spi_platdata *plat,
>   addr_bytes = cmdlen - 1;
>  
>   /* Setup the indirect trigger address */
> - writel((u32)plat->ahbbase,
> + writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
>  plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
>  
>   /* Configure the opcode */
> @@ -710,7 +711,7 @@ int cadence_qspi_apb_indirect_write_setup(struct 
> cadence_spi_platdata *plat,
>   return -EINVAL;
>   }
>   /* Setup the indirect trigger address */
> - writel((u32)plat->ahbbase,
> + writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
>  plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
>  
>   /* Configure the opcode */
> 

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[U-Boot] [PATCH v2 1/5] Move CONFIG_PANIC_HANG to Kconfig

[Masahiro Yamada]

Freescale (NXP) boards have lots of defconfig files per board.
I used "imply PANIC_HANG" for them.

Signed-off-by: Masahiro Yamada 
---

Changes in v2:
  - Re-run tools/moveconfig.py based on commit 02907004294d9

 README| 10 -
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  3 +++
 arch/powerpc/cpu/mpc85xx/Kconfig  | 37 +++
 configs/TWR-P1025_defconfig   |  1 +
 configs/UCP1020_SPIFLASH_defconfig|  1 +
 configs/UCP1020_defconfig |  1 +
 configs/adp-ae3xx_defconfig   |  1 +
 configs/qemu-ppce500_defconfig|  1 +
 configs/tricorder_defconfig   |  1 +
 configs/tricorder_flash_defconfig |  1 +
 configs/uniphier_ld4_sld8_defconfig   |  1 +
 configs/uniphier_v7_defconfig |  1 +
 configs/uniphier_v8_defconfig |  1 +
 configs/xpedite517x_defconfig |  1 +
 configs/xpedite520x_defconfig |  1 +
 configs/xpedite537x_defconfig |  1 +
 configs/xpedite550x_defconfig |  1 +
 include/configs/B4860QDS.h|  1 -
 include/configs/C29XPCIE.h|  1 -
 include/configs/MPC8536DS.h   |  1 -
 include/configs/MPC8544DS.h   |  1 -
 include/configs/MPC8572DS.h   |  1 -
 include/configs/P1010RDB.h|  1 -
 include/configs/P1023RDB.h|  2 --
 include/configs/P2041RDB.h|  1 -
 include/configs/T102xQDS.h|  1 -
 include/configs/T102xRDB.h|  1 -
 include/configs/T1040QDS.h|  1 -
 include/configs/T104xRDB.h|  1 -
 include/configs/T4240RDB.h|  1 -
 include/configs/UCP1020.h |  1 -
 include/configs/adp-ae3xx.h   |  1 -
 include/configs/corenet_ds.h  |  1 -
 include/configs/cyrus.h   |  1 -
 include/configs/ls1012a_common.h  |  1 -
 include/configs/ls1088a_common.h  |  2 --
 include/configs/ls2080a_common.h  |  2 --
 include/configs/p1_p2_rdb_pc.h|  1 -
 include/configs/p1_twr.h  |  1 -
 include/configs/qemu-ppce500.h|  1 -
 include/configs/t4qds.h   |  1 -
 include/configs/tricorder.h   |  1 -
 include/configs/uniphier.h|  2 --
 include/configs/xpedite517x.h |  1 -
 include/configs/xpedite520x.h |  1 -
 include/configs/xpedite537x.h |  1 -
 include/configs/xpedite550x.h |  1 -
 include/configs/xtfpga.h  |  4 
 lib/Kconfig   | 10 +
 49 files changed, 64 insertions(+), 48 deletions(-)

diff --git a/README b/README
index 2df0e1f..a7d2bef 100644
--- a/README
+++ b/README
@@ -2168,16 +2168,6 @@ The following options need to be configured:
currently only supports clearing the memory.
 
 - Error Recovery:
-   CONFIG_PANIC_HANG
-
-   Define this variable to stop the system in case of a
-   fatal error, so that you have to reset it manually.
-   This is probably NOT a good idea for an embedded
-   system where you want the system to reboot
-   automatically as fast as possible, but it may be
-   useful during development since you can try to debug
-   the conditions that lead to the situation.
-
CONFIG_NET_RETRY_COUNT
 
This variable defines the number of retries for
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 5daf79e..e866193 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -7,6 +7,7 @@ config ARCH_LS1012A
select SYS_FSL_ERRATUM_A010315
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
+   imply PANIC_HANG
 
 config ARCH_LS1043A
bool
@@ -85,6 +86,7 @@ config ARCH_LS1088A
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
imply SCSI
+   imply PANIC_HANG
 
 config ARCH_LS2080A
bool
@@ -123,6 +125,7 @@ config ARCH_LS2080A
select SYS_FSL_ERRATUM_A009203
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
+   imply PANIC_HANG
 
 config FSL_LSCH2
bool
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 92187d3..91fcc43 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -29,6 +29,7 @@ config TARGET_B4420QDS
select ARCH_B4420
select SUPPORT_SPL
select PHYS_64BIT
+   imply PANIC_HANG
 
 config TARGET_B4860QDS
bool "Support B4860QDS"
@@ -36,6 +37,7 @@ config TARGET_B4860QDS
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+   imply PANIC_HANG
 
 config TARGET

[U-Boot] [PATCH v2 5/5] Remove assert()

[Masahiro Yamada]

No more users of assert() except host tools.  Remove.

Signed-off-by: Masahiro Yamada 
---

Changes in v2: None

 include/common.h  | 15 ---
 lib/tiny-printf.c |  9 -
 lib/vsprintf.c|  9 -
 3 files changed, 33 deletions(-)

diff --git a/include/common.h b/include/common.h
index 6e24545..f035f76 100644
--- a/include/common.h
+++ b/include/common.h
@@ -76,21 +76,6 @@ typedef volatile unsigned char   vu_char;
 #define warn_non_spl(fmt, args...) \
debug_cond(!_SPL_BUILD, fmt, ##args)
 
-/*
- * An assertion is run-time check done in debug mode only. If DEBUG is not
- * defined then it is skipped. If DEBUG is defined and the assertion fails,
- * then it calls panic*( which may or may not reset/halt U-Boot (see
- * CONFIG_PANIC_HANG), It is hoped that all failing assertions are found
- * before release, and after release it is hoped that they don't matter. But
- * in any case these failing assertions cannot be fixed with a reset (which
- * may just do the same assertion again).
- */
-void __assert_fail(const char *assertion, const char *file, unsigned line,
-  const char *function);
-#define assert(x) \
-   ({ if (!(x) && _DEBUG) \
-   __assert_fail(#x, __FILE__, __LINE__, __func__); })
-
 typedef void (interrupt_handler_t)(void *);
 
 #include  /* boot information for Linux kernel */
diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c
index 0b04813..d5b6d69 100644
--- a/lib/tiny-printf.c
+++ b/lib/tiny-printf.c
@@ -381,12 +381,3 @@ int snprintf(char *buf, size_t size, const char *fmt, ...)
 
return ret;
 }
-
-void __assert_fail(const char *assertion, const char *file, unsigned line,
-  const char *function)
-{
-   /* This will not return */
-   printf("%s:%u: %s: Assertion `%s' failed.", file, line, function,
-  assertion);
-   hang();
-}
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index dd572d2..4208239 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -789,15 +789,6 @@ int vprintf(const char *fmt, va_list args)
return i;
 }
 
-
-void __assert_fail(const char *assertion, const char *file, unsigned line,
-  const char *function)
-{
-   /* This will not return */
-   panic("%s:%u: %s: Assertion `%s' failed.", file, line, function,
- assertion);
-}
-
 char *simple_itoa(ulong i)
 {
/* 21 digits plus null terminator, good for 64-bit or smaller ints */
-- 
2.7.4

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[U-Boot] [PATCH v2 2/5] Enable CONFIG_PANIC_HANG for boards without do_reset()

[Masahiro Yamada]

Calling panic() for these boards causes build error:
  undefined reference to `do_reset'

They must compile do_reset(), or define CONFIG_PANIC_HANG.

Signed-off-by: Masahiro Yamada 
---

Changes in v2: None

 configs/cl-som-imx7_defconfig | 1 +
 configs/evb-rk3229_defconfig  | 1 +
 configs/mccmon6_sd_defconfig  | 1 +
 configs/opos6uldev_defconfig  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index d37c82c..150396f 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -51,3 +51,4 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_OF_LIBFDT=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index b226f66..21c1bfd 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -48,3 +48,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_ERRNO_STR=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index 97f7f9a..3f00ead 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -44,3 +44,4 @@ CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index 0149ae3..51ebc73 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -84,3 +84,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_VIDEO=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_PANIC_HANG=y
-- 
2.7.4

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[U-Boot] [PATCH v2 3/5] Introduce CONFIG_ENABLE_BUG_CHECKS to disable BUG{_ON} by default

[Masahiro Yamada]

BUG() and BUG_ON() are generally used to test a condition that should
never happen.  If it does, it is a bug.

Linux always enables them, but doing so in U-Boot causes image size
problems on some platforms.  Introduce CONFIG_ENABLE_BUG_CHECKS to
make them no-op by default.  Platforms without image size constraint
are free to enable this option to catch bugs easily.

Likewise, silence WARN_ON() unless this option is enabled.

Suggested-by: Tom Rini 
Signed-off-by: Masahiro Yamada 
---

Changes in v2:
  - Newly added

 include/linux/bug.h | 9 -
 lib/Kconfig | 7 +++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/include/linux/bug.h b/include/linux/bug.h
index f07bb71..ac1c7de 100644
--- a/include/linux/bug.h
+++ b/include/linux/bug.h
@@ -6,17 +6,24 @@
 #include 
 #include 
 
+#ifdef CONFIG_ENABLE_BUG_CHECKS
 #define BUG() do { \
printk("BUG at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
panic("BUG!"); \
 } while (0)
+#define __WARN()   \
+   printk("WARNING at %s:%d/%s()!\n", __FILE__, __LINE__, __func__)
+#else
+#define BUG()
+#define __WARN()
+#endif
 
 #define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while (0)
 
 #define WARN_ON(condition) ({  \
int __ret_warn_on = !!(condition);  \
if (unlikely(__ret_warn_on))\
-   printk("WARNING at %s:%d/%s()!\n", __FILE__, __LINE__, 
__func__); \
+   __WARN();   \
unlikely(__ret_warn_on);\
 })
 
diff --git a/lib/Kconfig b/lib/Kconfig
index 00ac650..36b1b3b 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -45,6 +45,13 @@ config USE_TINY_PRINTF
 
  The supported format specifiers are %c, %s, %u/%d and %x.
 
+config ENABLE_BUG_CHECKS
+   bool "Enable BUG/BUG_ON() checks and WARN_ON() logs"
+   help
+ BUG() and BUG_ON() are no-op by default.  This option enables
+ them to print noisy messages, then reboot or halt the system.
+ It also enables WARN_ON() messages.
+
 config PANIC_HANG
bool "Do not reset the system on fatal error"
help
-- 
2.7.4

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Re: [U-Boot] [PATCH] binman: do not add binary files to git

[Masahiro Yamada]

Hi Simon,


2017-12-02 8:24 GMT+09:00 Simon Glass :
> Hi Masahiro,
>
> On 29 November 2017 at 07:14, Masahiro Yamada
>  wrote:
>>
>> Hi Simon,
>>
>> 2017-11-29 22:08 GMT+09:00 Simon Glass :
>> > Hi Masahiro,
>> >
>> > On 26 November 2017 at 18:11, Masahiro Yamada
>> >  wrote:
>> >>
>> >> Signed-off-by: Masahiro Yamada 
>> >
>> > Commit message?
>> >
>> > This breaks the binman tests.
>> >
>> > With the Makefile that is now present in tools/binman/test we could
>> > perhaps generate these files on the fly?
>>
>>
>> I saw the Makefile.
>> I thought it was invoked somewhere.
>
> Unfortunately not yet, but it is a start. Originally I was worried
> that we might not be able to generate a suitable ELF file reliably on
> all platforms, but perhaps I am being too paranoid.
>


Can you fix this?

I am not familiar with Binman.




-- 
Best Regards
Masahiro Yamada
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[U-Boot] [PATCH 7/7] armv8: secure firmware: fix incorrect unit address in node name

[Andre Przywara]

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Remove the unit address from the config node name when U-Boot deals with
secure firmware FIT images.

Signed-off-by: Andre Przywara 
---
 arch/arm/cpu/armv8/sec_firmware.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/sec_firmware.c 
b/arch/arm/cpu/armv8/sec_firmware.c
index 927eae4f74..b56ea785c5 100644
--- a/arch/arm/cpu/armv8/sec_firmware.c
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -30,7 +30,7 @@ phys_addr_t sec_firmware_addr;
 #define SEC_FIRMWARE_FIT_IMAGE "firmware"
 #endif
 #ifndef SEC_FIRMEWARE_FIT_CNF_NAME
-#define SEC_FIRMEWARE_FIT_CNF_NAME "config@1"
+#define SEC_FIRMEWARE_FIT_CNF_NAME "config-1"
 #endif
 #ifndef SEC_FIRMWARE_TARGET_EL
 #define SEC_FIRMWARE_TARGET_EL 2
-- 
2.14.1

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[U-Boot] [PATCH 6/7] tools: fix incorrect usage of DT node unit address

[Andre Przywara]

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Correct the generated unit names when U-Boot's mkimage creates a FIT
image.

Signed-off-by: Andre Przywara 
---
 tools/fit_image.c | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 6dcc88bae0..1db44f47a1 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -185,7 +185,7 @@ static void get_basename(char *str, int size, const char 
*fname)
  * fit_write_images() - Write out a list of images to the FIT
  *
  * We always include the main image (params->datafile). If there are device
- * tree files, we include an fdt@ node for each of those too.
+ * tree files, we include an fdt- node for each of those too.
  */
 static int fit_write_images(struct image_tool_params *params, char *fdt)
 {
@@ -199,7 +199,7 @@ static int fit_write_images(struct image_tool_params 
*params, char *fdt)
 
/* First the main image */
typename = genimg_get_type_short_name(params->fit_image_type);
-   snprintf(str, sizeof(str), "%s@1", typename);
+   snprintf(str, sizeof(str), "%s-1", typename);
fdt_begin_node(fdt, str);
fdt_property_string(fdt, "description", params->imagename);
fdt_property_string(fdt, "type", typename);
@@ -225,7 +225,7 @@ static int fit_write_images(struct image_tool_params 
*params, char *fdt)
for (cont = params->content_head; cont; cont = cont->next) {
if (cont->type != IH_TYPE_FLATDT)
continue;
-   snprintf(str, sizeof(str), "%s@%d", FIT_FDT_PROP, ++upto);
+   snprintf(str, sizeof(str), "%s-%d", FIT_FDT_PROP, ++upto);
fdt_begin_node(fdt, str);
 
get_basename(str, sizeof(str), cont->fname);
@@ -243,7 +243,7 @@ static int fit_write_images(struct image_tool_params 
*params, char *fdt)
 
/* And a ramdisk file if available */
if (params->fit_ramdisk) {
-   fdt_begin_node(fdt, FIT_RAMDISK_PROP "@1");
+   fdt_begin_node(fdt, FIT_RAMDISK_PROP "-1");
 
fdt_property_string(fdt, "type", FIT_RAMDISK_PROP);
fdt_property_string(fdt, "os", 
genimg_get_os_short_name(params->os));
@@ -277,41 +277,41 @@ static void fit_write_configs(struct image_tool_params 
*params, char *fdt)
int upto;
 
fdt_begin_node(fdt, "configurations");
-   fdt_property_string(fdt, "default", "conf@1");
+   fdt_property_string(fdt, "default", "conf-1");
 
upto = 0;
for (cont = params->content_head; cont; cont = cont->next) {
if (cont->type != IH_TYPE_FLATDT)
continue;
typename = genimg_get_type_short_name(cont->type);
-   snprintf(str, sizeof(str), "conf@%d", ++upto);
+   snprintf(str, sizeof(str), "conf-%d", ++upto);
fdt_begin_node(fdt, str);
 
get_basename(str, sizeof(str), cont->fname);
fdt_property_string(fdt, "description", str);
 
typename = genimg_get_type_short_name(params->fit_image_type);
-   snprintf(str, sizeof(str), "%s@1", typename);
+   snprintf(str, sizeof(str), "%s-1", typename);
fdt_property_string(fdt, typename, str);
 
if (params->fit_ramdisk)
fdt_property_string(fdt, FIT_RAMDISK_PROP,
-   FIT_RAMDISK_PROP "@1");
+   FIT_RAMDISK_PROP "-1");
 
-   snprintf(str, sizeof(str), FIT_FDT_PROP "@%d", upto);
+   snprintf(str, sizeof(str), FIT_FDT_PROP "-%d", upto);
fdt_property_string(fdt, FIT_FDT_PROP, str);
fdt_end_node(fdt);
}
 
if (!upto) {
-   fdt_begin_node(fdt, "conf@1");
+   fdt_begin_node(fdt, "conf-1");
typename = genimg_get_type_short_name(params->fit_image_type);
-   snprintf(str, sizeof(str), "%s@1", typename);
+   snprintf(str, sizeof(str), "%s-1", typename);
fdt_property_string(fdt, typename, str);
 
if (params->fit_ramdisk)
fdt_property_string(fdt, FIT_RAMDISK_PROP,
-   FIT_RAMDISK_PROP "@1");
+   FIT_RAMDISK_PROP "-1");
 
fdt_end_node(fdt);
}
-- 
2.14.1

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[U-Boot] [PATCH 4/7] fix incorrect usage of DT node unit address in comments

[Andre Przywara]

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the tree where node names were mentioned in
comments, to not give bad examples to the reader.

Signed-off-by: Andre Przywara 
---
 common/image-fit.c | 16 
 common/image-sig.c |  2 +-
 include/image.h| 26 +-
 tools/image-host.c | 10 +-
 4 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/common/image-fit.c b/common/image-fit.c
index 7f17fd1410..990c6038d7 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -330,7 +330,7 @@ static void fit_image_print_verification_data(const void 
*fit, int noffset,
/*
 * Check subnode name, must be equal to "hash" or "signature".
 * Multiple hash/signature nodes require unique unit node
-* names, e.g. hash@1, hash@2, signature@1, signature@2, etc.
+* names, e.g. hash-1, hash-2, signature-1, signature-2, etc.
 */
name = fit_get_name(fit, noffset, NULL);
if (!strncmp(name, FIT_HASH_NODENAME, strlen(FIT_HASH_NODENAME))) {
@@ -1086,7 +1086,7 @@ int fit_image_verify(const void *fit, int image_noffset)
/*
 * Check subnode name, must be equal to "hash".
 * Multiple hash nodes require unique unit node
-* names, e.g. hash@1, hash@2, etc.
+* names, e.g. hash-1, hash-2, etc.
 */
if (!strncmp(name, FIT_HASH_NODENAME,
 strlen(FIT_HASH_NODENAME))) {
@@ -1323,15 +1323,15 @@ int fit_check_format(const void *fit)
  *
  * / o image-tree
  *   |-o images
- *   | |-o fdt@1
- *   | |-o fdt@2
+ *   | |-o fdt-1
+ *   | |-o fdt-2
  *   |
  *   |-o configurations
- * |-o config@1
- * | |-fdt = fdt@1
+ * |-o config-1
+ * | |-fdt = fdt-1
  * |
- * |-o config@2
- *   |-fdt = fdt@2
+ * |-o config-2
+ *   |-fdt = fdt-2
  *
  * / o U-Boot fdt
  *   |-compatible = "foo,bar", "bim,bam"
diff --git a/common/image-sig.c b/common/image-sig.c
index bf824fef3c..d9f712fc1e 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -347,7 +347,7 @@ int fit_config_check_sig(const void *fit, int noffset, int 
required_keynode,
 
/*
 * Each node can generate one region for each sub-node. Allow for
-* 7 sub-nodes (hash@1, signature@1, etc.) and some extra.
+* 7 sub-nodes (hash-1, signature-1, etc.) and some extra.
 */
max_regions = 20 + count * 7;
struct fdt_region fdt_regions[max_regions];
diff --git a/include/image.h b/include/image.h
index e9c18ce403..e28415bd9a 100644
--- a/include/image.h
+++ b/include/image.h
@@ -577,7 +577,7 @@ int boot_get_ramdisk(int argc, char * const argv[], 
bootm_headers_t *images,
  * boot_get_loadable() will take the given FIT configuration, and look
  * for a field named "loadables".  Loadables, is a list of elements in
  * the FIT given as strings.  exe:
- *   loadables = "linux_kernel@1", "fdt@2";
+ *   loadables = "linux_kernel", "fdt-2";
  * this function will attempt to parse each string, and load the
  * corresponding element from the FIT into memory.  Once placed,
  * no aditional actions are taken.
@@ -603,10 +603,10 @@ int boot_get_setup_fit(bootm_headers_t *images, uint8_t 
arch,
  * @param images   Boot images structure
  * @param addr Address of FIT in memory
  * @param fit_unamep   On entry this is the requested image name
- * (e.g. "kernel@1") or NULL to use the default. On exit
+ * (e.g. "kernel") or NULL to use the default. On exit
  * points to the selected image name
  * @param fit_uname_configpOn entry this is the requested configuration
- * name (e.g. "conf@1") or NULL to use the default. On
+ * name (e.g. "conf-1") or NULL to use the default. On
  * exit points to the selected configuration name.
  * @param arch Expected architecture (IH_ARCH_...)
  * @param datapReturns address of loaded image
@@ -631,10 +631,10 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr,
  * @param images   Boot images structure
  * @param addr Address of FIT in memory
  * @param fit_unamep   On entry this is the requested image name
- * (e.g. "kernel@1") or NULL to use the default. On exit
+ * (e.g. "kernel") or NULL to use the default. On exit
  * points to the selected image name
  * @param fit_uname_configpOn entry this is the requested configuration
- * name (e.g. "conf@1") or NULL to use the default. On
+ * name (e.g. "conf-1") or NULL to use the default. On
  * exit points to the selected configuration name.
  * @param arch Expected arc

[U-Boot] [PATCH 3/7] doc: fix incorrect usage of DT node unit address

[Andre Przywara]

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in various documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara 
---
 .../arm/cpu/armv8/fsl-layerscape/doc/README.falcon | 16 +-
 doc/README.uniphier| 36 +++---
 doc/chromium/chromebook_jerry.its  | 16 +-
 doc/chromium/nyan-big.its  | 16 +-
 4 files changed, 42 insertions(+), 42 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon 
b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon
index 2505f408ab..a00b5bc9c3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon
+++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon
@@ -86,7 +86,7 @@ Example:
#address-cells = <1>;
 
images {
-   kernel@1 {
+   kernel {
description = "ARM64 Linux kernel";
data = /incbin/("./arch/arm64/boot/Image.gz");
type = "kernel";
@@ -96,7 +96,7 @@ Example:
load = <0x8008>;
entry = <0x8008>;
};
-   fdt@1 {
+   fdt-1 {
description = "Flattened Device Tree blob";
data = /incbin/("./fsl-ls1043ardb-static.dtb");
type = "flat_dt";
@@ -104,7 +104,7 @@ Example:
compression = "none";
load = <0x9000>;
};
-   ramdisk@1 {
+   ramdisk {
description = "LS1043 Ramdisk";
 data = /incbin/("./rootfs.cpio.gz");
type = "ramdisk";
@@ -116,12 +116,12 @@ Example:
};
 
configurations {
-   default = "config@1";
-   config@1 {
+   default = "config-1";
+   config-1 {
description = "Boot Linux kernel";
-   kernel = "kernel@1";
-   fdt = "fdt@1";
-   ramdisk = "ramdisk@1";
+   kernel = "kernel";
+   fdt = "fdt-1";
+   ramdisk = "ramdisk";
loadables = "fdt", "ramdisk";
};
};
diff --git a/doc/README.uniphier b/doc/README.uniphier
index 0fa3248fae..990806ab79 100644
--- a/doc/README.uniphier
+++ b/doc/README.uniphier
@@ -142,7 +142,7 @@ The following is an example for a simple usecase:
#address-cells = <1>;
 
images {
-   kernel@0 {
+   kernel {
description = "linux";
data = 
/incbin/("PATH/TO/YOUR/LINUX/DIR/arch/arm64/boot/Image.gz");
type = "kernel";
@@ -151,44 +151,44 @@ The following is an example for a simple usecase:
compression = "gzip";
load = <0x8208>;
entry = <0x8208>;
-   hash@0 {
+   hash-1 {
algo = "sha256";
};
};
 
-   fdt@0 {
+   fdt-1 {
description = "fdt";
data = 
/incbin/("PATH/TO/YOUR/LINUX/DIR/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dtb");
type = "flat_dt";
arch = "arm64";
compression = "none";
-   hash@0 {
+   hash-1 {
algo = "sha256";
};
};
 
-   ramdisk@0 {
+   ramdisk {
description = "ramdisk";
data = /incbin/("PATH/TO/YOUR/ROOTFS/DIR/rootfs.cpio");
type = "ramdisk";
arch = "arm64";
os = "linux";
compression = "none";
-   hash@0 {
+   hash-1 {
algo = "sha256";
};
};
};
 
configurations {
-   default = "config@0";
+   default = "config-1";
 
-   config@0 {
+   config-1 {
description = "Configuration0";
-   kernel = "kernel@0";
-   fdt = "fdt@0";
-   ramdisk = "ramdisk@0";
-   signature@0 {
+   kernel = "kernel";
+   fdt = "fdt-1";
+   ramdisk = "ramdisk";
+   signature-1 {
  

[U-Boot] [PATCH 5/7] sunxi: arm64: correct usage of DT node address in FIT generation

[Andre Przywara]

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Adjust the FIT build script for 64-bit Allwinner boards to remove the
bogus addresses from the node names and avoid the warnings.
This avoids a warning with recent versions of the dtc tool.

Signed-off-by: Andre Przywara 
---
 board/sunxi/mksunxi_fit_atf.sh | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/board/sunxi/mksunxi_fit_atf.sh b/board/sunxi/mksunxi_fit_atf.sh
index b1d6e0e16a..36abe9efed 100755
--- a/board/sunxi/mksunxi_fit_atf.sh
+++ b/board/sunxi/mksunxi_fit_atf.sh
@@ -21,7 +21,7 @@ cat << __HEADER_EOF
#address-cells = <1>;
 
images {
-   uboot@1 {
+   uboot {
description = "U-Boot (64-bit)";
data = /incbin/("u-boot-nodtb.bin");
type = "standalone";
@@ -29,7 +29,7 @@ cat << __HEADER_EOF
compression = "none";
load = <0x4a00>;
};
-   atf@1 {
+   atf {
description = "ARM Trusted Firmware";
data = /incbin/("$BL31");
type = "firmware";
@@ -44,7 +44,7 @@ cnt=1
 for dtname in $*
 do
cat << __FDT_IMAGE_EOF
-   fdt@$cnt {
+   fdt_$cnt {
description = "$(basename $dtname .dtb)";
data = /incbin/("$dtname");
type = "flat_dt";
@@ -57,7 +57,7 @@ done
 cat << __CONF_HEADER_EOF
};
configurations {
-   default = "config@1";
+   default = "config_1";
 
 __CONF_HEADER_EOF
 
@@ -65,11 +65,11 @@ cnt=1
 for dtname in $*
 do
cat << __CONF_SECTION_EOF
-   config@$cnt {
+   config_$cnt {
description = "$(basename $dtname .dtb)";
-   firmware = "uboot@1";
-   loadables = "atf@1";
-   fdt = "fdt@$cnt";
+   firmware = "uboot";
+   loadables = "atf";
+   fdt = "fdt_$cnt";
};
 __CONF_SECTION_EOF
cnt=$((cnt+1))
-- 
2.14.1

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[U-Boot] [PATCH 2/7] doc: FIT image: fix incorrect examples of DT node unit address

[Andre Przywara]

The DT spec demands a unit-address of a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image example files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara 
---
 doc/uImage.FIT/kernel.its   | 28 -
 doc/uImage.FIT/kernel_fdt.its   | 20 ++--
 doc/uImage.FIT/multi-with-fpga.its  | 28 -
 doc/uImage.FIT/multi-with-loadables.its | 40 
 doc/uImage.FIT/multi.its| 54 -
 doc/uImage.FIT/multi_spl.its| 14 -
 doc/uImage.FIT/sign-configs.its | 18 +--
 doc/uImage.FIT/sign-images.its  | 16 +-
 doc/uImage.FIT/update3.its  | 12 
 doc/uImage.FIT/update_uboot.its |  4 +--
 10 files changed, 117 insertions(+), 117 deletions(-)

diff --git a/doc/uImage.FIT/kernel.its b/doc/uImage.FIT/kernel.its
index 0aaf47e6c6..77ddf622de 100644
--- a/doc/uImage.FIT/kernel.its
+++ b/doc/uImage.FIT/kernel.its
@@ -9,7 +9,7 @@
#address-cells = <1>;
 
images {
-   kernel@1 {
+   kernel {
description = "Vanilla Linux kernel";
data = /incbin/("./vmlinux.bin.gz");
type = "kernel";
@@ -18,20 +18,20 @@
compression = "gzip";
load = <>;
entry = <>;
-   hash@1 {
+   hash-1 {
algo = "crc32";
};
-   hash@2 {
+   hash-2 {
algo = "sha1";
};
};
};
 
configurations {
-   default = "config@1";
-   config@1 {
+   default = "config-1";
+   config-1 {
description = "Boot Linux kernel";
-   kernel = "kernel@1";
+   kernel = "kernel";
};
};
 };
@@ -47,7 +47,7 @@ For x86 a setup node is also required: see x86-fit-boot.txt.
#address-cells = <1>;
 
images {
-   kernel@1 {
+   kernel {
description = "Vanilla Linux kernel";
data = /incbin/("./image.bin.lzo");
type = "kernel";
@@ -56,12 +56,12 @@ For x86 a setup node is also required: see x86-fit-boot.txt.
compression = "lzo";
load = <0x0100>;
entry = <0x>;
-   hash@2 {
+   hash-2 {
algo = "sha1";
};
};
 
-   setup@1 {
+   setup {
description = "Linux setup.bin";
data = /incbin/("./setup.bin");
type = "x86_setup";
@@ -70,18 +70,18 @@ For x86 a setup node is also required: see x86-fit-boot.txt.
compression = "none";
load = <0x0009>;
entry = <0x0009>;
-   hash@2 {
+   hash-2 {
algo = "sha1";
};
};
};
 
configurations {
-   default = "config@1";
-   config@1 {
+   default = "config-1";
+   config-1 {
description = "Boot Linux kernel";
-   kernel = "kernel@1";
-   setup = "setup@1";
+   kernel = "kernel";
+   setup = "setup";
};
};
 };
diff --git a/doc/uImage.FIT/kernel_fdt.its b/doc/uImage.FIT/kernel_fdt.its
index 7c521486ef..000d85b8e0 100644
--- a/doc/uImage.FIT/kernel_fdt.its
+++ b/doc/uImage.FIT/kernel_fdt.its
@@ -9,7 +9,7 @@
#address-cells = <1>;
 
images {
-   kernel@1 {
+   kernel {
description = "Vanilla Linux kernel";
data = /incbin/("./vmlinux.bin.gz");
type = "kernel";
@@ -18,34 +18,34 @@
compression = "gzip";
load = <>;
entry = <>;
-   hash@1 {
+   hash-1 {
algo = "crc32";
};
-   hash@2 {
+   hash-2 {
algo = "sha1";
};
};
-   fdt@1 {
+   fdt-1 {
description = "Flattened Device Tree blob

[U-Boot] [PATCH 1/7] doc: FIT image: fix incorrect description of DT node unit address

[Andre Przywara]

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara 
---
 doc/uImage.FIT/beaglebone_vboot.txt  |  84 +++---
 doc/uImage.FIT/command_syntax_extensions.txt |  42 +--
 doc/uImage.FIT/howto.txt |  52 +++---
 doc/uImage.FIT/overlay-fdt-boot.txt  |  78 ++---
 doc/uImage.FIT/signature.txt | 100 +--
 doc/uImage.FIT/source_file_format.txt|  26 +++
 doc/uImage.FIT/x86-fit-boot.txt  |  10 +--
 7 files changed, 196 insertions(+), 196 deletions(-)

diff --git a/doc/uImage.FIT/beaglebone_vboot.txt 
b/doc/uImage.FIT/beaglebone_vboot.txt
index b4ab28542e..f1862c2753 100644
--- a/doc/uImage.FIT/beaglebone_vboot.txt
+++ b/doc/uImage.FIT/beaglebone_vboot.txt
@@ -130,7 +130,7 @@ Put this into a file in that directory called sign.its:
#address-cells = <1>;
 
images {
-   kernel@1 {
+   kernel {
data = /incbin/("Image.lzo");
type = "kernel";
arch = "arm";
@@ -138,27 +138,27 @@ Put this into a file in that directory called sign.its:
compression = "lzo";
load = <0x80008000>;
entry = <0x80008000>;
-   hash@1 {
+   hash-1 {
algo = "sha1";
};
};
-   fdt@1 {
+   fdt-1 {
description = "beaglebone-black";
data = /incbin/("am335x-boneblack.dtb");
type = "flat_dt";
arch = "arm";
compression = "none";
-   hash@1 {
+   hash-1 {
algo = "sha1";
};
};
};
configurations {
-   default = "conf@1";
-   conf@1 {
-   kernel = "kernel@1";
-   fdt = "fdt@1";
-   signature@1 {
+   default = "conf-1";
+   conf-1 {
+   kernel = "kernel";
+   fdt = "fdt-1";
+   signature-1 {
algo = "sha1,rsa2048";
key-name-hint = "dev";
sign-images = "fdt", "kernel";
@@ -211,7 +211,7 @@ You should see something like this:
 
 FIT description: Beaglebone black
 Created: Sun Jun  1 12:50:30 2014
- Image 0 (kernel@1)
+ Image 0 (kernel)
   Description:  unavailable
   Created:  Sun Jun  1 12:50:30 2014
   Type: Kernel Image
@@ -223,7 +223,7 @@ Created: Sun Jun  1 12:50:30 2014
   Entry Point:  0x80008000
   Hash algo:sha1
   Hash value:   c94364646427e10f423837e559898ef02c97b988
- Image 1 (fdt@1)
+ Image 1 (fdt-1)
   Description:  beaglebone-black
   Created:  Sun Jun  1 12:50:30 2014
   Type: Flat Device Tree
@@ -232,11 +232,11 @@ Created: Sun Jun  1 12:50:30 2014
   Architecture: ARM
   Hash algo:sha1
   Hash value:   cb09202f889d824f23b8e4404b781be5ad38a68d
- Default Configuration: 'conf@1'
- Configuration 0 (conf@1)
+ Default Configuration: 'conf-1'
+ Configuration 0 (conf-1)
   Description:  unavailable
-  Kernel:   kernel@1
-  FDT:  fdt@1
+  Kernel:   kernel
+  FDT:  fdt-1
 
 
 Now am335x-boneblack-pubkey.dtb contains the public key and image.fit contains
@@ -251,12 +251,12 @@ which results in:
 
 Verifying Hash Integrity ... sha1,rsa2048:dev+
 ## Loading kernel from FIT Image at 7fc6ee469000 ...
-   Using 'conf@1' configuration
+   Using 'conf-1' configuration
Verifying Hash Integrity ...
 sha1,rsa2048:dev+
 OK
 
-   Trying 'kernel@1' kernel subimage
+   Trying 'kernel' kernel subimage
  Description:  unavailable
  Created:  Sun Jun  1 12:50:30 2014
  Type: Kernel Image
@@ -274,8 +274,8 @@ OK
 
 Unimplemented compression type 4
 ## Loading fdt from FIT Image at 7fc6ee469000 ...
-   Using 'conf@1' configuration
-   Trying 'fdt@1' fdt subimage
+   Using 'conf-1' configuration
+   Trying 'fdt-1' fdt subimage
  Description:  beaglebone-black
  Created:  Sun Jun  1 12:50:30 2014
  Type: Flat Device Tree
@@ -291,7 +291,7 @@ OK
Loading Flat Device Tree ... OK
 
 ## Loading ramdisk from FIT Image at 7fc6ee469000 ...
-   Using 'conf@1' configuration
+   Using 'conf-1' configuration
 Could not find subimage node
 
 Signature check OK
@@ -313,8 +313,8 @@ the above flow works.
 But it is fun to do this by hand, so you can load imag

[U-Boot] [PATCH 0/7] Fix incorrect usage of the (FIT) DT node unit address

[Andre Przywara]

The DT spec[1] demands a unit-address in a node name (name@address) to
match the "reg" property inside that node:
uart0: serial@1c28000 {
reg = <0x01c28000 0x400>;

If there is no reg property in a node, there must not be a unit address
in the node name as well (so no '@' sign at all).

Newer version of the device tree compiler (dtc) will warn about violations
of this rule:

: Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name,
but no reg property


To avoid those warnings, but still keep enumerable node names, we replace
the "@" sign with a dash ("-"), which does not have a specical meaning,
but is a valid node name character. So the first fdt file (as referenced
above in the warning message) would be called "fdt-1" instead.

This affects mostly documenation files and some examples of FIT image
files, but also some code which actually generates FIT images:
- The first four patches fix documentation, example files and comments,
they should not affect actual generated code or files.
In places where having multiple instances of a node is normal (fdt,
hash, signature), I simply replaced the '@' sign with the dash.
Where one would expect only one instance (kernel, initrd), I removed the
bogus '@1' completely, so a "kernel" just goes by just this very name.
- Patch 5/7 fixes the usage in the Allwinner SPL FIT image files, this has
been on the list before.
- Patch 6/7 fixes the usage when the mkimage tool (auto-)generates FIT images.
- The final patch 7/7 fixes the usage for the ARMv8 secure firmware image
handling. I am a bit unsure about this one, as this seems to *look* for
a specific node name, which sounds a bit dodgy to me. I think DT parsers
should never rely on a certain node name, but either use references or look
inside nodes to find a matching one. Also I am not sure who actually
generates those FIT image files this code gets to read. Any input would
be welcome here.

Please let me know if this makes some sense or not.

Cheers,
Andre.

[1] 
https://www.devicetree.org/downloads/devicetree-specification-v0.1-20160524.pdf;
 chapter 2.2.1 "Node names", page 6

Andre Przywara (7):
  doc: FIT image: fix incorrect description of DT node unit address
  doc: FIT image: fix incorrect examples of DT node unit address
  doc: fix incorrect usage of DT node unit address
  fix incorrect usage of DT node unit address in comments
  sunxi: arm64: correct usage of DT node address in FIT generation
  tools: fix incorrect usage of DT node unit address
  armv8: secure firmware: fix incorrect unit address in node name

 .../arm/cpu/armv8/fsl-layerscape/doc/README.falcon |  16 ++--
 arch/arm/cpu/armv8/sec_firmware.c  |   2 +-
 board/sunxi/mksunxi_fit_atf.sh |  16 ++--
 common/image-fit.c |  16 ++--
 common/image-sig.c |   2 +-
 doc/README.uniphier|  36 
 doc/chromium/chromebook_jerry.its  |  16 ++--
 doc/chromium/nyan-big.its  |  16 ++--
 doc/uImage.FIT/beaglebone_vboot.txt|  84 -
 doc/uImage.FIT/command_syntax_extensions.txt   |  42 -
 doc/uImage.FIT/howto.txt   |  52 +--
 doc/uImage.FIT/kernel.its  |  28 +++---
 doc/uImage.FIT/kernel_fdt.its  |  20 ++---
 doc/uImage.FIT/multi-with-fpga.its |  28 +++---
 doc/uImage.FIT/multi-with-loadables.its|  40 -
 doc/uImage.FIT/multi.its   |  54 +--
 doc/uImage.FIT/multi_spl.its   |  14 +--
 doc/uImage.FIT/overlay-fdt-boot.txt|  78 
 doc/uImage.FIT/sign-configs.its|  18 ++--
 doc/uImage.FIT/sign-images.its |  16 ++--
 doc/uImage.FIT/signature.txt   | 100 ++---
 doc/uImage.FIT/source_file_format.txt  |  26 +++---
 doc/uImage.FIT/update3.its |  12 +--
 doc/uImage.FIT/update_uboot.its|   4 +-
 doc/uImage.FIT/x86-fit-boot.txt|  10 +--
 include/image.h|  26 +++---
 tools/fit_image.c  |  24 ++---
 tools/image-host.c |  10 +--
 28 files changed, 403 insertions(+), 403 deletions(-)

-- 
2.14.1

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Re: [U-Boot] [U-Boot, v2, 1/2] drivers/reset: support rockchip reset drivers

[Kever Yang]

Philipp,


On 11/29/2017 03:49 AM, Dr. Philipp Tomsich wrote:

Kever,

This series causes build-breakage (even outside of the rockchip 
targets)...

See https://travis-ci.org/ptomsich/u-boot-rockchip/builds/308522589

I'm not understand this error, sometimes I also met this, which depends 
on the build system.
The asm/arch is a link to asm/arch-rockchip which is dynamic generated 
by build system,
is there a option to make sure the build system generate the link before 
build the c source?
+drivers/reset/reset-rockchip.c:11:31: fatal error: asm/arch/hardware.h: 
No such file or directory

Please fix and resubmit.
Also: did you test this using buildman or travis?


I use buildman, but no expperience with travis.

Thanks,
- Kever


Thanks,
Philipp.


On 28 Nov 2017, at 11:06, Philipp Tomsich 
> wrote:


From: Elaine Zhang >


Create driver to support all Rockchip SoCs soft reset.
Example of usage:
i2c driver:
ret = reset_get_by_name(dev, "i2c", &reset_ctl);
if (ret) {
error("reset_get_by_name() failed: %d\n", ret);
}

reset_assert(&reset_ctl);
udelay(50);
reset_deassert(&reset_ctl);

i2c dts node:
resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
reset-names = "p_i2c", "i2c";

Signed-off-by: Elaine Zhang >
Signed-off-by: Kever Yang >
Acked-by: Philipp Tomsich >

---

Changes in v2:
- fix Kconfig more than 80 length
- use MACRO for reset bits in one reg
- use rkclr/set_reg for reg access
- add rockchip_reset_bind()
- use dev_read_addr_size() instead of fdtdec_

drivers/reset/Kconfig  |   9 +++
drivers/reset/Makefile |   1 +
drivers/reset/reset-rockchip.c | 133 
+

3 files changed, 143 insertions(+)
create mode 100644 drivers/reset/reset-rockchip.c



Reviewed-by: Philipp Tomsich >

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Re: [U-Boot] [PATCH 1/3] efi_loader: correctly determine if an MMC device is an SD-card

[Alexander Graf]

On 02.12.17 13:42, Heinrich Schuchardt wrote:
> The SD cards and eMMC devices have different device nodes.
> The current coding interpretes all MMC devices as eMMC.
> 
> Signed-off-by: Heinrich Schuchardt 
> ---
>  lib/efi_loader/efi_device_path.c | 24 +---
>  1 file changed, 21 insertions(+), 3 deletions(-)
> 
> diff --git a/lib/efi_loader/efi_device_path.c 
> b/lib/efi_loader/efi_device_path.c
> index b4e2f933cb..42fe6e1185 100644
> --- a/lib/efi_loader/efi_device_path.c
> +++ b/lib/efi_loader/efi_device_path.c
> @@ -36,6 +36,24 @@ static const struct efi_device_path_vendor ROOT = {
>   .guid = U_BOOT_GUID,
>  };
>  
> +#if defined(CONFIG_DM_MMC) && defined(CONFIG_MMC)
> +/*
> + * Determine if an MMC device is an SD card.
> + *
> + * @desc block device descriptor
> + * @return   true if the device is an SD card
> + */
> +static bool is_sd(struct blk_desc *desc)
> +{
> + struct mmc *mmc = find_mmc_device(desc->devnum);
> +
> + if (!mmc)
> + return false;
> +
> + return IS_SD(mmc) != 0U;
> +}
> +#endif
> +
>  static void *dp_alloc(size_t sz)
>  {
>   void *buf;
> @@ -298,9 +316,9 @@ static void *dp_fill(void *buf, struct udevice *dev)
>   struct blk_desc *desc = mmc_get_blk_desc(mmc);
>  
>   sddp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
> - sddp->dp.sub_type = (desc->if_type == IF_TYPE_MMC) ?
> - DEVICE_PATH_SUB_TYPE_MSG_MMC :
> - DEVICE_PATH_SUB_TYPE_MSG_SD;
> + sddp->dp.sub_type = is_sd(desc) ?
> + DEVICE_PATH_SUB_TYPE_MSG_SD :
> + DEVICE_PATH_SUB_TYPE_MSG_MMC;

So in general, MMC != SD != eMMC. Or rather eMMC "is like" SD "is like"
MMC maybe?

I really don't know how edk2 distinguishes between them. In general,
eMMC is an SD card on steroids. Can you double-check in the edk2 code
and then we just do whatever they do?


Alex
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[U-Boot] [PULL] efi patch queue 2017-12-04

[Alexander Graf]

Hi Tom,

This is my current patch queue for efi.  Please pull.

Alex


The following changes since commit 9804d88630cdb22f5f0ace05ac05942928410fd9:

  Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh (2017-11-30 10:39:04 
-0500)

are available in the git repository at:

  git://github.com/agraf/u-boot.git tags/signed-efi-next

for you to fetch changes up to 3bb74f9800cdc4cf10a87f2725242c2565256654:

  efi_loader helloworld.efi: Fix building with -Os (2017-12-01 22:31:00 +0100)


Patch queue for efi - 2017-12-04

Highlights for this release:

  - Dynamic EFI object creation (lists instead of static arrays)
  - EFI selftest improvements
  - Minor fixes


Alexander Graf (2):
  efi_loader: Fix partition offsets
  efi_loader helloworld.efi: Fix building with -Os

Heinrich Schuchardt (64):
  efi_loader: move efi_search_obj up in code
  efi_loader: implement SetWatchdogTimer
  efi_selftest: provide test for watchdog timer
  efi_loader: new function utf8_to_utf16
  efi_loader: guard against double inclusion of efi_loader.h
  efi_loader: consistently use efi_status_t in bootefi
  efi_selftest: provide a dummy device path
  efi_selftest: reformat code
  efi_selftest: efi_st_memcmp should return 0
  efi_selftest: deduplicate code
  efi_selftest: allow to select a single test for execution
  efi_selftest: correctly cleanup after selftest
  efi_loader: use bootargs as load options
  efi_selftest: test reboot by watchdog
  test/py: test reboot by EFI watchdog
  test/py: fix typo in test_efi_loader.py
  efi_selftest: provide test for EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL
  efi_loader: set parent handle in efi_load_image
  efi_loader: capitalize EFI_LOCATE_SEARCH_TYPE values
  efi_selftest: test protocol management
  efi_loader: eliminate efi_install_protocol_interface_ext
  efi_loader: eliminate efi_uninstall_protocol_interface_ext
  efi_loader: remove unused typedef for INTN
  efi_loader: replace UINTN by efi_uintn_t
  efi_loader: consistently use efi_uintn_t in boot services
  efi_loader: rework efi_locate_handle
  efi_loader: rework efi_search_obj
  efi_loader: fix typo efi_install_multiple_protocol_interfaces
  efi_loader: debug output efi_install_protocol_interface
  efi_loader implement UninstallMultipleProtocolInterfaces
  efi_loader: efi_gop: check calloc return value
  efi_loader: efi_disk: check return value of calloc
  efi_loader: efi_net: check return value of calloc
  efi_loader: efi_dp_match should have const arguments
  efi_loader: make efi_create_handle non-static
  efi_loader: argument of efi_search_obj should be const
  efi_loader: efi_gop: use correct types for parameters
  efi_selftest: test for graphics output protocol
  efi_loader: helper functions for protocol management
  efi_loader: simplify efi_install_protocol_interface
  efi_loader: simplify efi_search
  efi_loader: simplify efi_uninstall_protocol_interface
  efi_loader: simplify efi_locate_protocol
  efi_loader: refactor efi_setup_loaded_image
  efi_loader: efi_console: use helper functions
  efi_loader: helloworld.c: remove superfluous include
  efi_loader: size of media device path node represenation
  efi_loader: efi_dp_str should print path not node
  efi_loader: fix efi_convert_device_node_to_text
  efi_loader: reimplement LocateDevicePath
  efi_selftest: test EFI_DEVICE_PATH_TO_TEXT_PROTOCOL
  efi_loader: efi_disk: use efi_add_protocol
  efi_loader: efi_net: use efi_add_protocol
  efi_loader: efi_gop: use efi_add_protocol
  efi_loader: simplify efi_open_protocol
  efi_loader: simplify find_obj
  efi_loader: manage protocols in a linked list
  efi_selftest: compile without special compiler flags
  efi_selftest: add missing line feed
  efi_loader: output load options in helloworld
  test/py: check return code of helloworld
  efi_loader: pass handle of loaded image
  efi_loader: helper function to add EFI object to list
  efi_loader: comments for EFI_DEVICE_PATH_TO_TEXT_PROTOCOL

Jonathan Gray (1):
  efi_loader: initialise partition_signature memory

Rob Clark (1):
  efi_loader: add missing breaks

Stefan Roese (1):
  efi_loader: Exit in efi_set_bootdev() upon invalid "desc"

 cmd/bootefi.c   |  73 ++-
 include/charset.h   |  15 +
 include/efi.h   |   6 +-
 include/efi_api.h   |  48 +-
 include/efi_loader.h|  66 +-
 include/efi_selftest.h  |  21 +
 lib/charset.c   |  57 +-
 lib/efi_loader/Makefile |   6 +-
 lib/efi_lo

Re: [U-Boot] [PATCH 2/3] efi_loader: correctly setup device paths for block devices

[Alexander Graf]

On 03.12.17 22:20, xypron.g...@gmx.de wrote:
> On Sunday, December 3, 2017 8:24:39 PM CET Mark Kettenis wrote:
>> Heinrich Schuchardt schreef op 2017-12-02 13:42:
>>> For each block device we have to setup:
>>> - a device path for the block device
>>> - a partition device path for the block device with
>>>
>>>   partition number 0
>>
>> Do x86 UEFI implementations actually generate these partition number 0
>> paths?
> 
> Thanks for reviewing.
> 
> I do not have access the an x86 computer with UEFI firmware.
> Maybe somebody else on the list has.
> 
> Another reference point is EDK2.
> 
> Part of the relevant coding is in function PartitionInstallMbrChildHandles(),
> MdeModulePkg/Universal/Disk/PartitionDxe/Mbr.c:47.
> 
> Another part is in PartitionInstallChildHandle(),
> MdeModulePkg/Universal/Disk/PartitionDxe/Partition.c.
> 
> I could not identify any line referring to partition 0.
> 
>> The standard says that 0 can be used in tis fashion but doesn't seem to
>> prescribe their use.
> 
> A partition number of  zero can be used to represent the raw hard drive 
> or a raw extended partition.
> 
> Do you think we should not generate this entry?

Given that basically all major UEFI implementations are based on edk2, I
think we should just do it exactly the same way :)

  https://wiki.linaro.org/LEG/UEFIforQEMU

To give you example grub lsefi output for a simple disk with 2 MBR
partitions:

== U-Boot w/o this patch set (SD) ==

  /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0:
]/USB(6,0)/EndEntire
  block
  device path
Handle 0x9fef8f78
  /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0:
]/USB(6,0)/HD(0,800,32000,2de808cb,1,1)/EndEntire
  block
  device path
  simple FS
Handle 0x9fef90a0
  /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0:
]/USB(6,0)/HD(1,32800,1cd800,2de808cb,1,1)/EndEntire
  block
  device path
  simple FS

== U-Boot w/ this patch set (SD) ==

Handle 0x9fef7598
  /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0:
]/USB(6,0)/EndEntire
  block
  device path
  simple FS
Handle 0x9fef76c0
  /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0:
]/USB(6,0)/HD(0,0,20,2de808cb,1,1)/EndEntire
  block
  device path
Handle 0x9fef7020
  /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0:
]/USB(6,0)/HD(1,800,32000,2de808cb,1,1)/EndEntire
  block
  device path
  simple FS
Handle 0x9fef7228
  /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0:
]/USB(6,0)/HD(2,32800,1cd800,2de808cb,1,1)/EndEntire
  block
  device path
  simple FS

== edk2 (virtio) ==

Handle 0x43250d10
  /ACPI(a0341d0,0)/PCI(0,1)/EndEntire
  disk
  block
  fa920010-6785-4941-b6ec-498c579f160a
  PCI
  device path
Handle 0x4223af90
  /ACPI(a0341d0,0)/PCI(0,1)/HD(1,800,32000,2de808cb,1,1)/EndEntire
  simple FS
  disk
  c12a7328-f81f-11d2-ba4b-00a0c93ec93b
  8cf2f62c-bc9b-4821-808d-ec9ec421a1a0
  block
  device path
Handle 0x4223ac90

/ACPI(a0341d0,0)/PCI(0,1)/HD(2,32800,1cd800,2de808cb,1,1)/EndEntire
  simple FS
  disk
  8cf2f62c-bc9b-4821-808d-ec9ec421a1a0
  block
  device path


=

So I think the only patch we really need is something like this:

diff --git a/lib/efi_loader/efi_device_path.c
b/lib/efi_loader/efi_device_path.c
index b4e2f933cb..9ba6b04e5e 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -416,7 +416,7 @@ static void *dp_part_fill(void *buf, struct blk_desc
*desc, int part)
hddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
hddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH;
hddp->dp.length = sizeof(*hddp);
-   hddp->partition_number = part - 1;
+   hddp->partition_number = part;
hddp->partition_start = info.start;
hddp->partition_end = info.size;
if (desc->part_type == PART_TYPE_EFI)

But this can wait until after rc1, so I'll send the pull request as is
out now :).


Alex
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Re: [U-Boot] [PATCH 2/3] efi_loader: correctly setup device paths for block devices

[xypron . glpk]

On Sunday, December 3, 2017 8:24:39 PM CET Mark Kettenis wrote:
> Heinrich Schuchardt schreef op 2017-12-02 13:42:
> > For each block device we have to setup:
> > - a device path for the block device
> > - a partition device path for the block device with
> > 
> >   partition number 0
> 
> Do x86 UEFI implementations actually generate these partition number 0
> paths?

Thanks for reviewing.

I do not have access the an x86 computer with UEFI firmware.
Maybe somebody else on the list has.

Another reference point is EDK2.

Part of the relevant coding is in function PartitionInstallMbrChildHandles(),
MdeModulePkg/Universal/Disk/PartitionDxe/Mbr.c:47.

Another part is in PartitionInstallChildHandle(),
MdeModulePkg/Universal/Disk/PartitionDxe/Partition.c.

I could not identify any line referring to partition 0.

> The standard says that 0 can be used in tis fashion but doesn't seem to
> prescribe their use.

A partition number of  zero can be used to represent the raw hard drive 
or a raw extended partition.

Do you think we should not generate this entry?

Regards

Heinrich

> 
> > - a partition device path for each partition
> > 
> > Signed-off-by: Heinrich Schuchardt 
> > ---
> > 
> >  lib/efi_loader/efi_device_path.c | 11 +++
> >  lib/efi_loader/efi_disk.c|  7 +--
> >  2 files changed, 12 insertions(+), 6 deletions(-)
> > 
> > diff --git a/lib/efi_loader/efi_device_path.c
> > b/lib/efi_loader/efi_device_path.c
> > index 42fe6e1185..d0d62ff428 100644
> > --- a/lib/efi_loader/efi_device_path.c
> > +++ b/lib/efi_loader/efi_device_path.c
> > @@ -412,15 +412,18 @@ static void *dp_part_fill(void *buf, struct
> > blk_desc *desc, int part)
> > 
> > buf = &udp[1];
> >  
> >  #endif
> > 
> > -   if (part == 0) /* the actual disk, not a partition */
> > +   if (part == -1) /* the actual disk, not a partition */
> > 
> > return buf;
> > 
> > -   part_get_info(desc, part, &info);
> > +   if (part == 0)
> > +   part_get_info_whole_disk(desc, &info);
> > +   else
> > +   part_get_info(desc, part, &info);
> > 
> > if (desc->part_type == PART_TYPE_ISO) {
> > 
> > struct efi_device_path_cdrom_path *cddp = buf;
> > 
> > -   cddp->boot_entry = part - 1;
> > +   cddp->boot_entry = part;
> > 
> > cddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
> > cddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_CDROM_PATH;
> > cddp->dp.length = sizeof(*cddp);
> > 
> > @@ -434,7 +437,7 @@ static void *dp_part_fill(void *buf, struct
> > blk_desc *desc, int part)
> > 
> > hddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
> > hddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH;
> > hddp->dp.length = sizeof(*hddp);
> > 
> > -   hddp->partition_number = part - 1;
> > +   hddp->partition_number = part;
> > 
> > hddp->partition_start = info.start;
> > hddp->partition_end = info.size;
> > if (desc->part_type == PART_TYPE_EFI)
> > 
> > diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> > index 4e457a841b..19f75aa919 100644
> > --- a/lib/efi_loader/efi_disk.c
> > +++ b/lib/efi_loader/efi_disk.c
> > @@ -274,6 +274,9 @@ static int efi_disk_create_partitions(struct
> > blk_desc *desc,
> > 
> > disk_partition_t info;
> > int part;
> > 
> > +   /* Add devices for disk */
> > +   snprintf(devname, sizeof(devname), "%s", pdevname);
> > +   efi_disk_add_dev(devname, if_typename, desc, diskid, info.start, 0);
> > 
> > /* Add devices for each partition */
> > for (part = 1; part <= MAX_SEARCH_PARTITIONS; part++) {
> > 
> > if (part_get_info(desc, part, &info))
> > 
> > @@ -315,7 +318,7 @@ int efi_disk_register(void)
> > 
> > /* Add block device for the full device */
> > efi_disk_add_dev(dev->name, if_typename, desc,
> > 
> > -desc->devnum, 0, 0);
> > +desc->devnum, 0, -1);
> > 
> > disks++;
> > 
> > @@ -351,7 +354,7 @@ int efi_disk_register(void)
> > 
> >  if_typename, i);
> > 
> > /* Add block device for the full device */
> > 
> > -   efi_disk_add_dev(devname, if_typename, desc, i, 0, 0);
> > +   efi_disk_add_dev(devname, if_typename, desc, i, 0, -1);
> > 
> > disks++;
> > 
> > /* Partitions show up as block devices in EFI */


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Re: [U-Boot] [PATCH 2/3] efi_loader: correctly setup device paths for block devices

[Mark Kettenis]

Heinrich Schuchardt schreef op 2017-12-02 13:42:

For each block device we have to setup:
- a device path for the block device
- a partition device path for the block device with
  partition number 0


Do x86 UEFI implementations actually generate these partition number 0 
paths?

The standard says that 0 can be used in tis fashion but doesn't seem to
prescribe their use.


- a partition device path for each partition

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_device_path.c | 11 +++
 lib/efi_loader/efi_disk.c|  7 +--
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/lib/efi_loader/efi_device_path.c 
b/lib/efi_loader/efi_device_path.c

index 42fe6e1185..d0d62ff428 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -412,15 +412,18 @@ static void *dp_part_fill(void *buf, struct
blk_desc *desc, int part)
buf = &udp[1];
 #endif

-   if (part == 0) /* the actual disk, not a partition */
+   if (part == -1) /* the actual disk, not a partition */
return buf;

-   part_get_info(desc, part, &info);
+   if (part == 0)
+   part_get_info_whole_disk(desc, &info);
+   else
+   part_get_info(desc, part, &info);

if (desc->part_type == PART_TYPE_ISO) {
struct efi_device_path_cdrom_path *cddp = buf;

-   cddp->boot_entry = part - 1;
+   cddp->boot_entry = part;
cddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
cddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_CDROM_PATH;
cddp->dp.length = sizeof(*cddp);
@@ -434,7 +437,7 @@ static void *dp_part_fill(void *buf, struct
blk_desc *desc, int part)
hddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
hddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH;
hddp->dp.length = sizeof(*hddp);
-   hddp->partition_number = part - 1;
+   hddp->partition_number = part;
hddp->partition_start = info.start;
hddp->partition_end = info.size;
if (desc->part_type == PART_TYPE_EFI)
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 4e457a841b..19f75aa919 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -274,6 +274,9 @@ static int efi_disk_create_partitions(struct 
blk_desc *desc,

disk_partition_t info;
int part;

+   /* Add devices for disk */
+   snprintf(devname, sizeof(devname), "%s", pdevname);
+   efi_disk_add_dev(devname, if_typename, desc, diskid, info.start, 0);
/* Add devices for each partition */
for (part = 1; part <= MAX_SEARCH_PARTITIONS; part++) {
if (part_get_info(desc, part, &info))
@@ -315,7 +318,7 @@ int efi_disk_register(void)

/* Add block device for the full device */
efi_disk_add_dev(dev->name, if_typename, desc,
-desc->devnum, 0, 0);
+desc->devnum, 0, -1);

disks++;

@@ -351,7 +354,7 @@ int efi_disk_register(void)
 if_typename, i);

/* Add block device for the full device */
-   efi_disk_add_dev(devname, if_typename, desc, i, 0, 0);
+   efi_disk_add_dev(devname, if_typename, desc, i, 0, -1);
disks++;

/* Partitions show up as block devices in EFI */

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[U-Boot] EspressoBin: enetaddr

[Matwey V. Kornilov]

Hello,

I am running EspressoBin with u-boot 2017.03-armada-17.10.1-g440395a
(image was provided by Debian community).

I use EFI binary located at microSD card to boot the operation system.

I found that MAC-addr (enetaddr) is not being set by the bootloader from
environment variable $ethaddr. Ethernet interface hardware address is
set to arbitrary random value at every reboot.

But in case if network-related commands (for instance tftp) are executed
during u-boot script, then hardware address is set to the proper value
(taken from $ethaddr).

I don't really think that it is supposed to act in such a way. I believe
that MAC address is to be initialized from environment (stored in SPI
EEPROM) at every reboot.

How could I try to debug why enetaddr is not set unconditionally?

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Re: [U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

[Frank Mori Hess]

It looks like the change I'm trying to revert got rejected a couple
years ago in another form:

https://lists.denx.de/pipermail/u-boot/2015-August/224556.html

In particular at the end Marek says:

>>  /* Indirect mode configurations */
>>  writel((plat->sram_size/2), plat->regbase + CQSPI_REG_SRAMPARTITION);
>> - writel((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK,
>> + writel((u32)plat->trigger_base,
>>  plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
>
>Here you actually changed to logic of the code, which breaks it for SoCFPGA.
>plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK = 0x0 for SoCFPGA, but now
>you changed it such that 0xffa0 is written into the register. Same does
>apply for all your changes below.


On Sun, Dec 3, 2017 at 10:54 AM, Fabio Estevam  wrote:
> On Sun, Dec 3, 2017 at 1:51 PM, Frank Mori Hess  wrote:
>> On Sun, Dec 3, 2017 at 10:49 AM, Fabio Estevam  wrote:
>>> On Sun, Dec 3, 2017 at 1:36 PM, Frank Mori Hess  wrote:
 This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.
>>>
>>> Please explain the reasoning for the revert.
>>
>> It looks like my original post got stuck in moderation:
>
> You should explain inside the commit log why you think it is a good
> idea to do the revert.



-- 
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[U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

[Frank Mori Hess]

This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.

My u-boot spl crashes in a loop when I boot off a
cadence qspi flash.  I narrowed it down to the changes from commit
dac3bf20fb2c9b03476be0d73db620f62ab3cee1 which removes
CQSPI_INDIRECTTRIGGER_ADDR_MASK.  Restoring the mask allows the spl to
successfully load the main u-boot.  My board is an Altera HPS cyclone
V socfpga.  It has an ahb base address of 0xffa0 and for some
reason, without the CQSPI_INDIRECTTRIGGER_ADDR_MASK the board reboots
when cadence_qspi_apb_indirect_read_execute tries to read from the ahb
base address.  I'm was using version 2016.11 of u-boot.

Signed-off-by: Frank Mori Hess 
---
 drivers/spi/cadence_qspi_apb.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index e02f2217f4..b300f36607 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -47,6 +47,7 @@
 #define CQSPI_INST_TYPE_QUAD   2
 
 #define CQSPI_STIG_DATA_LEN_MAX8
+#define CQSPI_INDIRECTTRIGGER_ADDR_MASK0xF
 
 #define CQSPI_DUMMY_CLKS_PER_BYTE  8
 #define CQSPI_DUMMY_BYTES_MAX  4
@@ -560,7 +561,7 @@ int cadence_qspi_apb_indirect_read_setup(struct 
cadence_spi_platdata *plat,
addr_bytes = cmdlen - 1;
 
/* Setup the indirect trigger address */
-   writel((u32)plat->ahbbase,
+   writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
   plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
 
/* Configure the opcode */
@@ -710,7 +711,7 @@ int cadence_qspi_apb_indirect_write_setup(struct 
cadence_spi_platdata *plat,
return -EINVAL;
}
/* Setup the indirect trigger address */
-   writel((u32)plat->ahbbase,
+   writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
   plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
 
/* Configure the opcode */
-- 
2.11.0


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Re: [U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

[Fabio Estevam]

On Sun, Dec 3, 2017 at 1:51 PM, Frank Mori Hess  wrote:
> On Sun, Dec 3, 2017 at 10:49 AM, Fabio Estevam  wrote:
>> On Sun, Dec 3, 2017 at 1:36 PM, Frank Mori Hess  wrote:
>>> This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.
>>
>> Please explain the reasoning for the revert.
>
> It looks like my original post got stuck in moderation:

You should explain inside the commit log why you think it is a good
idea to do the revert.
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Re: [U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

[Frank Mori Hess]

On Sun, Dec 3, 2017 at 10:49 AM, Fabio Estevam  wrote:
> On Sun, Dec 3, 2017 at 1:36 PM, Frank Mori Hess  wrote:
>> This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.
>
> Please explain the reasoning for the revert.

It looks like my original post got stuck in moderation:

-- Forwarded message --
From: Frank Mori Hess 
Date: Sat, Dec 2, 2017 at 7:50 PM
Subject: commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1 breaks cadence driver
To: u-boot@lists.denx.de


Hi,

I've been debugging why u-boot spl crashes in a loop when I boot off a
cadence qspi flash.  I narrowed it down to the changes from commit
dac3bf20fb2c9b03476be0d73db620f62ab3cee1 which removes
CQSPI_INDIRECTTRIGGER_ADDR_MASK.  Restoring the mask allows the spl to
successfully load the main u-boot.  My board is an Altera HPS cyclone
V socfpga.  It has an ahb base address of 0xffa0 and for some
reason, without the CQSPI_INDIRECTTRIGGER_ADDR_MASK the board reboots
when cadence_qspi_apb_indirect_read_execute tries to read from the ahb
base address.  I'm using version 2016.11 of u-boot.

--
Frank


-- 
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-- 
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Re: [U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

[Fabio Estevam]

On Sun, Dec 3, 2017 at 1:36 PM, Frank Mori Hess  wrote:
> This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.

Please explain the reasoning for the revert.
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Re: [U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

[Frank Mori Hess]

Oops, ignore that patch I didn't merge it correctly

On Sun, Dec 3, 2017 at 10:36 AM, Frank Mori Hess  wrote:
> This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.
>
> Signed-off-by: Frank Mori Hess 
> ---
>  drivers/spi/cadence_qspi_apb.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
> index e02f2217f4..b300f36607 100644
> --- a/drivers/spi/cadence_qspi_apb.c
> +++ b/drivers/spi/cadence_qspi_apb.c
> @@ -47,6 +47,7 @@
>  #define CQSPI_INST_TYPE_QUAD   2
>
>  #define CQSPI_STIG_DATA_LEN_MAX8
> +#define CQSPI_INDIRECTTRIGGER_ADDR_MASK0xF
>
>  #define CQSPI_DUMMY_CLKS_PER_BYTE  8
>  #define CQSPI_DUMMY_BYTES_MAX  4
> @@ -560,7 +561,7 @@ int cadence_qspi_apb_indirect_read_setup(struct 
> cadence_spi_platdata *plat,
> addr_bytes = cmdlen - 1;
>
> /* Setup the indirect trigger address */
> -   writel((u32)plat->ahbbase,
> +   writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
>plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
>
> /* Configure the opcode */
> @@ -710,7 +711,7 @@ int cadence_qspi_apb_indirect_write_setup(struct 
> cadence_spi_platdata *plat,
> return -EINVAL;
> }
> /* Setup the indirect trigger address */
> -   writel((u32)plat->ahbbase,
> +   writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
>plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
>
> /* Configure the opcode */
> --
> 2.11.0
>
>



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[U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

[Frank Mori Hess]

This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.

Signed-off-by: Frank Mori Hess 
---
 drivers/spi/cadence_qspi_apb.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index e02f2217f4..b300f36607 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -47,6 +47,7 @@
 #define CQSPI_INST_TYPE_QUAD   2
 
 #define CQSPI_STIG_DATA_LEN_MAX8
+#define CQSPI_INDIRECTTRIGGER_ADDR_MASK0xF
 
 #define CQSPI_DUMMY_CLKS_PER_BYTE  8
 #define CQSPI_DUMMY_BYTES_MAX  4
@@ -560,7 +561,7 @@ int cadence_qspi_apb_indirect_read_setup(struct 
cadence_spi_platdata *plat,
addr_bytes = cmdlen - 1;
 
/* Setup the indirect trigger address */
-   writel((u32)plat->ahbbase,
+   writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
   plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
 
/* Configure the opcode */
@@ -710,7 +711,7 @@ int cadence_qspi_apb_indirect_write_setup(struct 
cadence_spi_platdata *plat,
return -EINVAL;
}
/* Setup the indirect trigger address */
-   writel((u32)plat->ahbbase,
+   writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
   plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
 
/* Configure the opcode */
-- 
2.11.0


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[U-Boot] [PATCH] ARM: omap3_logic: Unlock NAND automatically in U-Boot

[Adam Ford]

The Micron Flash is locked by default.  This will automaticlly
unlock so manually unlocking is unnecessary in U-Boot.

Signed-off-by: Adam Ford 

diff --git a/board/logicpd/omap3som/omap3logic.c 
b/board/logicpd/omap3som/omap3logic.c
index 1da9e38..4935a49 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -207,6 +207,16 @@ int board_init(void)
 }
 
 #ifdef CONFIG_BOARD_LATE_INIT
+
+static void unlock_nand(void)
+{
+   int dev = nand_curr_device;
+   struct mtd_info *mtd;
+
+   mtd = get_nand_dev_by_index(dev);
+   nand_unlock(mtd, 0, mtd->size, 0);
+}
+
 int board_late_init(void)
 {
struct board_id *board;
@@ -256,6 +266,10 @@ int board_late_init(void)
 
/* restore hsusb0_data5 pin as hsusb0_data5 */
MUX_VAL(CP(HSUSB0_DATA5),   (IEN  | PTD | DIS | M0));
+
+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
+   unlock_nand();
+#endif
return 0;
 }
 #endif
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 3ecfb58..b095814 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -93,7 +93,6 @@
 
 #define CONFIG_PREBOOT \
"setenv preboot;"   \
-   "nand unlock;"  \
"saveenv;"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -192,7 +191,6 @@
"tftpboot $loadaddr zImage;" \
"bootz $loadaddr\0" \
"nandbootcommon=echo 'Booting kernel from NAND...';" \
-   "nand unlock;" \
"run nandargs;" \
"run common_bootargs;" \
"run dump_bootargs;" \
-- 
2.7.4

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[U-Boot] commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1 breaks cadence driver

[Frank Mori Hess]

Hi,

I've been debugging why u-boot spl crashes in a loop when I boot off a
cadence qspi flash.  I narrowed it down to the changes from commit
dac3bf20fb2c9b03476be0d73db620f62ab3cee1 which removes
CQSPI_INDIRECTTRIGGER_ADDR_MASK.  Restoring the mask allows the spl to
successfully load the main u-boot.  My board is an Altera HPS cyclone
V socfpga.  It has an ahb base address of 0xffa0 and for some
reason, without the CQSPI_INDIRECTTRIGGER_ADDR_MASK the board reboots
when cadence_qspi_apb_indirect_read_execute tries to read from the ahb
base address.  I'm using version 2016.11 of u-boot.

-- 
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Re: [U-Boot] [PATCH 00/23] imx: add i.MX8M support and i.MX8MQ EVK

[Fabio Estevam]

Hi Peng,

On Sun, Dec 3, 2017 at 8:55 AM, Peng Fan  wrote:

> Ok. I'll add a README file, but arm trusted firmware code and imx-mkimage
> code are not public available now.

If you can provide him the firmware and imx-mkimage offline, that
would at least allows us to test the series.

In the long term we would like to understand this 'imx-mkimage' and
hopefully this can be integrated into the official mkimage tool.

> Another thing is the ddr script is not using structure based style code.
> It is hard for me to convert it from register offset to structure based.
> So In V2, I prefer to leave that piece code as TODO. I'll still include the
> ddr part in the V2 patchset, but I am not sure it will be accepted or not.

I think it is OK to access it via base + offset style.

Regards,

Fabio Estevam
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Re: [U-Boot] [PATCH 00/23] imx: add i.MX8M support and i.MX8MQ EVK

[Peng Fan]

> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Saturday, December 02, 2017 4:53 AM
> To: Peng Fan 
> Cc: Peter Robinson ; Fabio Estevam
> ; u-boot@lists.denx.de; Diego Dorta
> 
> Subject: Re: [U-Boot] [PATCH 00/23] imx: add i.MX8M support and i.MX8MQ
> EVK
> 
> Hi Peng,
> 
> On Thu, Nov 30, 2017 at 12:53 AM, Peng Fan  wrote:
> 
> >> I don't see a README in here, I'm wondering what the
> >> details/requirements are around ARM Trusted Firmware and the build
> >> process, for this platform does it use the open ARM ATF, or is it
> >> similar to other platforms that early boot is proprietary and u-boot
> >> is just chain loaded? Something like the sunxi 64 bit readme [1] would be
> useful.
> >
> > We are using ATF and use a dedicated package tool to generate the final
> image.
> >
> > Then the boot flow is SPL->ATF/TEE->U-Boot->Kernel. I do not have much
> > time to write that down now. You may get a very good user guide from
> > NXP sw release, if you want to boot your board or else.
> 
> I agree with Peter that a README file is really important for this series.
> 
> Without it we can't really test it on the real hardware.
> 
> My colleague Diego tried to test it and was not able to boot it, so please 
> add a
> README file on your v2.

Ok. I'll add a README file, but arm trusted firmware code and imx-mkimage
code are not public available now.

Another thing is the ddr script is not using structure based style code.
It is hard for me to convert it from register offset to structure based.
So In V2, I prefer to leave that piece code as TODO. I'll still include the
ddr part in the V2 patchset, but I am not sure it will be accepted or not.

Regards,
Peng.

> 
> Thanks
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Re: [U-Boot] arm: arm64: only use general regs

[Peng Fan]

> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Sunday, December 03, 2017 12:02 PM
> To: Peng Fan 
> Cc: albert.u.b...@aribaud.net; s...@chromium.org; York Sun
> ; u-boot@lists.denx.de
> Subject: Re: [U-Boot] arm: arm64: only use general regs
> 
> On Tue, Nov 28, 2017 at 10:09:37AM +0800, Peng Fan wrote:
> 
> > When compiling with android toolchain, there is an instruction
> > "str q0, [x8],#16", but x8 is not 16bytes aligned,
> > this instruction will trigger sync abort.
> >
> > So, following Linux kernel, only use general regs for arm64.
> > If not, compiler may use simd registers Q[x]. We need to avoid using
> > simd registers in U-Boot, because load/store Q[x] has restriction that
> > 128bits aligned when str/ldr.
> >
> > Signed-off-by: Peng Fan 
> > Reviewed-by: Simon Glass 
> 
> This breaks s32v234evb building, please look into that, thanks!

I have no idea why use float here.

board/freescale/s32v234evb/clock.c: In function 'program_pll.constprop':
board/freescale/s32v234evb/clock.c:91:7: error: '-mgeneral-regs-only' is 
incompatible with floating-point code
  fvco =
  ~^
  (refclk_freq / plldv_prediv) * (plldv_mfd +
  ~~~
  pllfd_mfn / (float)20480);
  ~

Eddy,
 Could you help explain why use float to cast 20480? Could this cast be removed?

Thanks,
Peng.

> 
> --
> Tom
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[U-Boot] [PATCH 2/4] ARM: meson: add clock measurement function

[Beniamino Galvani]

Add add a function to measure the current clock rate.

Signed-off-by: Beniamino Galvani 
---
 arch/arm/include/asm/arch-meson/clock.h | 34 +
 arch/arm/mach-meson/Makefile|  2 +-
 arch/arm/mach-meson/clock.c | 45 +
 3 files changed, 80 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-meson/clock.h
 create mode 100644 arch/arm/mach-meson/clock.c

diff --git a/arch/arm/include/asm/arch-meson/clock.h 
b/arch/arm/include/asm/arch-meson/clock.h
new file mode 100644
index 00..b43b23386c
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/clock.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2017 - Beniamino Galvani 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#ifndef _MESON_CLOCK_H_
+#define _MESON_CLOCK_H_
+
+/* CBUS clock measure registers */
+#define MSR_CLK_DUTY   0xc1108758
+#define MSR_CLK_REG0   0xc110875c
+#define MSR_CLK_REG1   0xc1108760
+#define MSR_CLK_REG2   0xc1108764
+
+#define CLK_GP0_PLL4
+#define CLK_GP1_PLL5
+#define CLK_81 7
+#define CLK_MMC23
+#define CLK_MOD_ETH_TX 40
+#define CLK_MOD_ETH_RX_RMII41
+#define CLK_FCLK_DIV5  43
+#define CLK_SD_EMMC_CLK_C  51
+#define CLK_SD_EMMC_CLK_B  52
+
+/* Clock gates */
+#define HHI_GCLK_MPEG0 0x140
+#define HHI_GCLK_MPEG1 0x144
+#define HHI_GCLK_MPEG2 0x148
+#define HHI_GCLK_OTHER 0x150
+#define HHI_GCLK_AO0x154
+
+ulong meson_measure_clk_rate(unsigned int clk);
+
+#endif
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index bf49b8b1e5..e7ea4fc5b0 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += board.o sm.o
+obj-y += board.o clock.o sm.o
diff --git a/arch/arm/mach-meson/clock.c b/arch/arm/mach-meson/clock.c
new file mode 100644
index 00..73be11e90d
--- /dev/null
+++ b/arch/arm/mach-meson/clock.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Clock rate measuring.
+ */
+
+#include 
+#include 
+#include 
+
+ulong meson_measure_clk_rate(unsigned int clk)
+{
+   ulong start;
+   ulong mhz;
+
+   writel(0, MSR_CLK_REG0);
+
+   /* Set the measurement gate to 64uS */
+   clrsetbits_le32(MSR_CLK_REG0, 0x, 64 - 1);
+   clrbits_le32(MSR_CLK_REG0,
+BIT(17) |  /* disable continuous measurement */
+BIT(18));  /* disable interrupts */
+   clrsetbits_le32(MSR_CLK_REG0,
+   GENMASK(20, 26),
+   clk << 20); /* select the clock */
+   setbits_le32(MSR_CLK_REG0,
+BIT(19) |  /* enable the clock */
+BIT(16));  /* enable measuring */
+
+   start = get_timer(0);
+   while (readl(MSR_CLK_REG0) & BIT(31)) {
+   if (get_timer(start) > 100) {
+   debug("could not measure clk %u rate\n", clk);
+   return -ETIMEDOUT;
+   }
+   }
+
+   /* Disable measuring */
+   clrbits_le32(MSR_CLK_REG0, BIT(16));
+
+   mhz = ((readl(MSR_CLK_REG2) + 31) & 0xf) >> 6;
+   return mhz * 100;
+}
-- 
2.14.3

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[U-Boot] [PATCH 4/4] meson: use the clock driver

[Beniamino Galvani]

Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.

Signed-off-by: Beniamino Galvani 
---
 arch/arm/include/asm/arch-meson/gxbb.h | 10 --
 arch/arm/include/asm/arch-meson/i2c.h  | 11 ---
 board/amlogic/odroid-c2/odroid-c2.c|  4 +---
 board/amlogic/p212/p212.c  |  3 +--
 drivers/i2c/meson_i2c.c| 20 +---
 5 files changed, 19 insertions(+), 29 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-meson/i2c.h

diff --git a/arch/arm/include/asm/arch-meson/gxbb.h 
b/arch/arm/include/asm/arch-meson/gxbb.h
index 95a6fe6998..48a2ab7425 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -40,14 +40,4 @@
 /* Ethernet memory power domain */
 #define GXBB_MEM_PD_REG_0_ETH_MASK (BIT(2) | BIT(3))
 
-/* Clock gates */
-#define GXBB_GCLK_MPEG_0   GXBB_HIU_ADDR(0x50)
-#define GXBB_GCLK_MPEG_1   GXBB_HIU_ADDR(0x51)
-#define GXBB_GCLK_MPEG_2   GXBB_HIU_ADDR(0x52)
-#define GXBB_GCLK_MPEG_OTHER   GXBB_HIU_ADDR(0x53)
-#define GXBB_GCLK_MPEG_AO  GXBB_HIU_ADDR(0x54)
-
-#define GXBB_GCLK_MPEG_0_I2C   BIT(9)
-#define GXBB_GCLK_MPEG_1_ETH   BIT(3)
-
 #endif /* __GXBB_H__ */
diff --git a/arch/arm/include/asm/arch-meson/i2c.h 
b/arch/arm/include/asm/arch-meson/i2c.h
deleted file mode 100644
index 783bc3786f..00
--- a/arch/arm/include/asm/arch-meson/i2c.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * Copyright 2017 - Beniamino Galvani 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-#ifndef _MESON_I2C_H_
-#define _MESON_I2C_H_
-
-#define MESON_I2C_CLK_RATE 16700
-
-#endif
diff --git a/board/amlogic/odroid-c2/odroid-c2.c 
b/board/amlogic/odroid-c2/odroid-c2.c
index a5ea8dc5af..833f01b4cf 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -34,9 +34,7 @@ int misc_init_r(void)
 GXBB_ETH_REG_0_PHY_CLK_EN |
 GXBB_ETH_REG_0_CLK_EN);
 
-   /* Enable power and clock gate */
-   setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
-   setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+   /* Enable power */
clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
 
/* Reset PHY on GPIOZ_14 */
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index ece8096c5c..907bbb286e 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -36,8 +36,7 @@ int misc_init_r(void)
out_le32(GXBB_ETH_REG_2, 0x10110181);
out_le32(GXBB_ETH_REG_3, 0xe40908ff);
 
-   /* Enable power and clock gate */
-   setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+   /* Enable power */
clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
 
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c
index 2434d9ed53..1d92b09c32 100644
--- a/drivers/i2c/meson_i2c.c
+++ b/drivers/i2c/meson_i2c.c
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 #include 
-#include 
 #include 
+#include 
 #include 
 #include 
 
@@ -43,6 +43,7 @@ struct i2c_regs {
 };
 
 struct meson_i2c {
+   struct clk clk;
struct i2c_regs *regs;
struct i2c_msg *msg;
bool last;
@@ -209,9 +210,13 @@ static int meson_i2c_xfer(struct udevice *bus, struct 
i2c_msg *msg,
 static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
 {
struct meson_i2c *i2c = dev_get_priv(bus);
-   unsigned int clk_rate = MESON_I2C_CLK_RATE;
+   ulong clk_rate;
unsigned int div;
 
+   clk_rate = clk_get_rate(&i2c->clk);
+   if (IS_ERR_VALUE(clk_rate))
+   return -EINVAL;
+
div = DIV_ROUND_UP(clk_rate, speed * 4);
 
/* clock divider has 12 bits */
@@ -226,7 +231,7 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, 
unsigned int speed)
clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK,
(div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
 
-   debug("meson i2c: set clk %u, src %u, div %u\n", speed, clk_rate, div);
+   debug("meson i2c: set clk %u, src %lu, div %u\n", speed, clk_rate, div);
 
return 0;
 }
@@ -234,6 +239,15 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, 
unsigned int speed)
 static int meson_i2c_probe(struct udevice *bus)
 {
struct meson_i2c *i2c = dev_get_priv(bus);
+   int ret;
+
+   ret = clk_get_by_index(bus, 0, &i2c->clk);
+   if (ret < 0)
+   return ret;
+
+   ret = clk_enable(&i2c->clk);
+   if (ret)
+   return ret;
 
i2c->regs = dev_read_addr_ptr(bus);
clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
-- 
2.14.3

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[U-Boot] [PATCH 3/4] clk: add Amlogic meson clock driver

[Beniamino Galvani]

Introduce a basic clock driver for Amlogic Meson SoCs which supports
enabling/disabling clock gates and getting their frequency.

Signed-off-by: Beniamino Galvani 
---
 arch/arm/mach-meson/Kconfig |   2 +
 drivers/clk/Makefile|   1 +
 drivers/clk/clk_meson.c | 196 
 3 files changed, 199 insertions(+)
 create mode 100644 drivers/clk/clk_meson.c

diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index d4bd230be3..7acee3bc5c 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -3,6 +3,7 @@ if ARCH_MESON
 config MESON_GXBB
bool "Support Meson GXBaby"
select ARM64
+   select CLK
select DM
select DM_SERIAL
help
@@ -12,6 +13,7 @@ config MESON_GXBB
 config MESON_GXL
bool "Support Meson GXL"
select ARM64
+   select CLK
select DM
select DM_SERIAL
help
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index bcc8f82fb6..67da27873d 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+obj-$(CONFIG_ARCH_MESON) += clk_meson.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
diff --git a/drivers/clk/clk_meson.c b/drivers/clk/clk_meson.c
new file mode 100644
index 00..3cf9372e05
--- /dev/null
+++ b/drivers/clk/clk_meson.c
@@ -0,0 +1,196 @@
+/*
+ * (C) Copyright 2017 - Beniamino Galvani 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct meson_clk {
+   void __iomem *addr;
+   ulong rate;
+};
+
+struct meson_gate {
+   unsigned int reg;
+   unsigned int bit;
+};
+
+#define MESON_GATE(id, _reg, _bit) \
+   [id] = {\
+   .reg = (_reg),  \
+   .bit = (_bit),  \
+   }
+
+struct meson_gate gates[] = {
+   /* Everything Else (EE) domain gates */
+   MESON_GATE(CLKID_DDR, HHI_GCLK_MPEG0, 0),
+   MESON_GATE(CLKID_DOS, HHI_GCLK_MPEG0, 1),
+   MESON_GATE(CLKID_ISA, HHI_GCLK_MPEG0, 5),
+   MESON_GATE(CLKID_PL301, HHI_GCLK_MPEG0, 6),
+   MESON_GATE(CLKID_PERIPHS, HHI_GCLK_MPEG0, 7),
+   MESON_GATE(CLKID_SPICC, HHI_GCLK_MPEG0, 8),
+   MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9),
+   MESON_GATE(CLKID_SAR_ADC, HHI_GCLK_MPEG0, 10),
+   MESON_GATE(CLKID_SMART_CARD, HHI_GCLK_MPEG0, 11),
+   MESON_GATE(CLKID_RNG0, HHI_GCLK_MPEG0, 12),
+   MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13),
+   MESON_GATE(CLKID_SDHC, HHI_GCLK_MPEG0, 14),
+   MESON_GATE(CLKID_STREAM, HHI_GCLK_MPEG0, 15),
+   MESON_GATE(CLKID_ASYNC_FIFO, HHI_GCLK_MPEG0, 16),
+   MESON_GATE(CLKID_SDIO, HHI_GCLK_MPEG0, 17),
+   MESON_GATE(CLKID_ABUF, HHI_GCLK_MPEG0, 18),
+   MESON_GATE(CLKID_HIU_IFACE, HHI_GCLK_MPEG0, 19),
+   MESON_GATE(CLKID_ASSIST_MISC, HHI_GCLK_MPEG0, 23),
+   MESON_GATE(CLKID_SD_EMMC_A, HHI_GCLK_MPEG0, 24),
+   MESON_GATE(CLKID_SD_EMMC_B, HHI_GCLK_MPEG0, 25),
+   MESON_GATE(CLKID_SD_EMMC_C, HHI_GCLK_MPEG0, 26),
+   MESON_GATE(CLKID_SPI, HHI_GCLK_MPEG0, 30),
+
+   MESON_GATE(CLKID_I2S_SPDIF, HHI_GCLK_MPEG1, 2),
+   MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3),
+   MESON_GATE(CLKID_DEMUX, HHI_GCLK_MPEG1, 4),
+   MESON_GATE(CLKID_AIU_GLUE, HHI_GCLK_MPEG1, 6),
+   MESON_GATE(CLKID_IEC958, HHI_GCLK_MPEG1, 7),
+   MESON_GATE(CLKID_I2S_OUT, HHI_GCLK_MPEG1, 8),
+   MESON_GATE(CLKID_AMCLK, HHI_GCLK_MPEG1, 9),
+   MESON_GATE(CLKID_AIFIFO2, HHI_GCLK_MPEG1, 10),
+   MESON_GATE(CLKID_MIXER, HHI_GCLK_MPEG1, 11),
+   MESON_GATE(CLKID_MIXER_IFACE, HHI_GCLK_MPEG1, 12),
+   MESON_GATE(CLKID_ADC, HHI_GCLK_MPEG1, 13),
+   MESON_GATE(CLKID_BLKMV, HHI_GCLK_MPEG1, 14),
+   MESON_GATE(CLKID_AIU, HHI_GCLK_MPEG1, 15),
+   MESON_GATE(CLKID_UART1, HHI_GCLK_MPEG1, 16),
+   MESON_GATE(CLKID_G2D, HHI_GCLK_MPEG1, 20),
+   MESON_GATE(CLKID_USB0, HHI_GCLK_MPEG1, 21),
+   MESON_GATE(CLKID_USB1, HHI_GCLK_MPEG1, 22),
+   MESON_GATE(CLKID_RESET, HHI_GCLK_MPEG1, 23),
+   MESON_GATE(CLKID_NAND, HHI_GCLK_MPEG1, 24),
+   MESON_GATE(CLKID_DOS_PARSER, HHI_GCLK_MPEG1, 25),
+   MESON_GATE(CLKID_USB, HHI_GCLK_MPEG1, 26),
+   MESON_GATE(CLKID_VDIN1, HHI_GCLK_MPEG1, 28),
+   MESON_GATE(CLKID_AHB_ARB0, HHI_GCLK_MPEG1, 29),
+   MESON_GATE(CLKID_EFUSE, HHI_GCLK_MPEG1, 30),
+   MESON_GATE(CLKID_BOOT_ROM, HHI_GCLK_MPEG1, 31),
+
+   MESON_GATE(CLKID_AHB_DATA_BUS, HHI_GCLK_MPEG2, 1),
+   MESON_GATE(CLKID_AHB_CTRL_BUS, HHI_GCLK_MPEG2, 2),
+   MESON_GATE(CLKID_HDMI_INTR_SYNC, HHI_GCLK_MPEG2, 3),
+   MESON_GATE(CLKID_HDMI_PCLK, HHI_GCLK_MPEG2, 4),
+   MESON_GATE(CLKID_USB1_DDR_BRIDGE, HHI_GCLK_MPEG2, 8),
+   MESON_GA

[U-Boot] [PATCH 1/4] ARM: dts: update gxbb-clkc.h from Linux 4.14

[Beniamino Galvani]

Update gxbb-clkc.h from Linux 4.14 as it contains new clock ids.

Signed-off-by: Beniamino Galvani 
---
 include/dt-bindings/clock/gxbb-clkc.h | 75 +++
 1 file changed, 75 insertions(+)

diff --git a/include/dt-bindings/clock/gxbb-clkc.h 
b/include/dt-bindings/clock/gxbb-clkc.h
index e3e9f7919c..8ba99a5e3f 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
  * GXBB clock tree IDs
  */
@@ -5,37 +6,96 @@
 #ifndef __GXBB_CLKC_H
 #define __GXBB_CLKC_H
 
+#define CLKID_SYS_PLL  0
 #define CLKID_HDMI_PLL 2
+#define CLKID_FIXED_PLL3
 #define CLKID_FCLK_DIV24
 #define CLKID_FCLK_DIV35
 #define CLKID_FCLK_DIV46
+#define CLKID_FCLK_DIV57
+#define CLKID_FCLK_DIV78
 #define CLKID_GP0_PLL  9
 #define CLKID_CLK8112
+#define CLKID_MPLL013
+#define CLKID_MPLL114
 #define CLKID_MPLL215
+#define CLKID_DDR  16
+#define CLKID_DOS  17
+#define CLKID_ISA  18
+#define CLKID_PL30119
+#define CLKID_PERIPHS  20
 #define CLKID_SPICC21
 #define CLKID_I2C  22
 #define CLKID_SAR_ADC  23
+#define CLKID_SMART_CARD   24
 #define CLKID_RNG0 25
 #define CLKID_UART026
+#define CLKID_SDHC 27
+#define CLKID_STREAM   28
+#define CLKID_ASYNC_FIFO   29
+#define CLKID_SDIO 30
+#define CLKID_ABUF 31
+#define CLKID_HIU_IFACE32
+#define CLKID_ASSIST_MISC  33
 #define CLKID_SPI  34
 #define CLKID_ETH  36
+#define CLKID_I2S_SPDIF35
+#define CLKID_DEMUX37
 #define CLKID_AIU_GLUE 38
 #define CLKID_IEC958   39
 #define CLKID_I2S_OUT  40
+#define CLKID_AMCLK41
+#define CLKID_AIFIFO2  42
+#define CLKID_MIXER43
 #define CLKID_MIXER_IFACE  44
+#define CLKID_ADC  45
+#define CLKID_BLKMV46
 #define CLKID_AIU  47
 #define CLKID_UART148
+#define CLKID_G2D  49
 #define CLKID_USB0 50
 #define CLKID_USB1 51
+#define CLKID_RESET52
+#define CLKID_NAND 53
+#define CLKID_DOS_PARSER   54
 #define CLKID_USB  55
+#define CLKID_VDIN156
+#define CLKID_AHB_ARB0 57
+#define CLKID_EFUSE58
+#define CLKID_BOOT_ROM 59
+#define CLKID_AHB_DATA_BUS 60
+#define CLKID_AHB_CTRL_BUS 61
+#define CLKID_HDMI_INTR_SYNC   62
 #define CLKID_HDMI_PCLK63
 #define CLKID_USB1_DDR_BRIDGE  64
 #define CLKID_USB0_DDR_BRIDGE  65
+#define CLKID_MMC_PCLK 66
+#define CLKID_DVIN 67
 #define CLKID_UART268
 #define CLKID_SANA 69
+#define CLKID_VPU_INTR 70
+#define CLKID_SEC_AHB_AHB3_BRIDGE 71
+#define CLKID_CLK81_A5372
+#define CLKID_VCLK2_VENCI0 73
+#define CLKID_VCLK2_VENCI1 74
+#define CLKID_VCLK2_VENCP0 75
+#define CLKID_VCLK2_VENCP1 76
 #define CLKID_GCLK_VENCI_INT0  77
+#define CLKID_GCLK_VENCI_INT   78
+#define CLKID_DAC_CLK  79
 #define CLKID_AOCLK_GATE   80
 #define CLKID_IEC958_GATE  81
+#define CLKID_ENC480P  82
+#define CLKID_RNG1 83
+#define CLKID_GCLK_VENCI_INT1  84
+#define CLKID_VCLK2_VENCLMCC   85
+#define CLKID_VCLK2_VENCL  86
+#define CLKID_VCLK_OTHER   87
+#define CLKID_EDP  88
+#define CLKID_AO_MEDIA_CPU 89
+#define CLKID_AO_AHB_SRAM  90
+#define CLKID_AO_AHB_BUS   91
+#define CLKID_AO_IFACE 92
 #define CLKID_AO_I2C   93
 #define CLKID_SD_EMMC_A94
 #define CLKID_SD_EMMC_B95
@@ -50,5 +110,20 @@
 #define CLKID_CTS_AMCLK107
 #define CLKID_CTS_MCLK_I958110
 #define CLKID_CTS_I958 113
+#define CLKID_32K_CLK  114
+#define CLKID_SD_EMMC_A_CLK0   119
+#define CLKID_SD_EMMC_B_CLK0   122
+#define CLKID_SD_EMMC_C_CLK0   125
+#define CLKID_VPU_0_SEL126
+#define CLKID_VPU_0128
+#define CLKID_VPU_1_SEL129
+#define CLKID_VPU_1131
+#define CLKID_VPU  132
+#define CLKID_VAPB_0_SEL   133
+#define CLKID_VAPB_0   135
+#define CLKID_VAPB_1_SEL   136
+#define CLKID_VAPB_1   138
+#define CLKID_VAPB_SEL 139
+#define CLKID_VAPB 140
 
 #endif /* __GXBB_CLKC_H */
-- 
2.14.3

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[U-Boot] [PATCH 0/4] Meson clock driver

[Beniamino Galvani]

Hi,

this is a basic clock driver for u-boot that supports
enabling/disabling clock gates and getting their frequency. With this,
some hardcoded initializations can be removed from the board code, and
drivers can use the information from device tree to initialize clocks.

Beniamino Galvani (4):
  ARM: dts: update gxbb-clkc.h from Linux 4.14
  ARM: meson: add clock measurement function
  clk: add Amlogic meson clock driver
  meson: use the clock driver

 arch/arm/include/asm/arch-meson/clock.h |  34 ++
 arch/arm/include/asm/arch-meson/gxbb.h  |  10 --
 arch/arm/include/asm/arch-meson/i2c.h   |  11 --
 arch/arm/mach-meson/Kconfig |   2 +
 arch/arm/mach-meson/Makefile|   2 +-
 arch/arm/mach-meson/clock.c |  45 
 board/amlogic/odroid-c2/odroid-c2.c |   4 +-
 board/amlogic/p212/p212.c   |   3 +-
 drivers/clk/Makefile|   1 +
 drivers/clk/clk_meson.c | 196 
 drivers/i2c/meson_i2c.c |  20 +++-
 include/dt-bindings/clock/gxbb-clkc.h   |  75 
 12 files changed, 373 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-meson/clock.h
 delete mode 100644 arch/arm/include/asm/arch-meson/i2c.h
 create mode 100644 arch/arm/mach-meson/clock.c
 create mode 100644 drivers/clk/clk_meson.c

-- 
2.14.3

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