Re: [U-Boot] [PATCH 0/3] power: s2mps11: Support the DM regulator

[Jaehoon Chung]

On 01/17/2018 12:54 PM, Jaehoon Chung wrote:
> Hi Anand,
> 
> On 01/17/2018 02:18 AM, Anand Moon wrote:
>> Hi Jaehoon
>>
>> On 16 January 2018 at 12:03, Jaehoon Chung  wrote:
>>> S2MPS11 has the 10-bucks and 38-ldos regulators.
>>> To control the each power, add the s2mps11 regulator driver.
>>> Tested with Odroid-xu3 board (Exynos5422)
>>>
> 
> [..snip..]
> 
>> Thanks for you patches it seem to initialize the s2mps11 pmic and regulator.
>>
>> After applying you patches on latest u-boot
>> It fails to boot up on my Odroid-XU3 and Odroid-XU4.
>> I have verified twice with two different sdcard.
>>
>> It looks like mmc failed to initialize
> 
> This patch-set is based on u-boot-samsung. so I didn't found your issue.
> Yep, When i applied the patches on latest u-boot-mmc, SD-card is failed.
> 
> I will fix it. Thanks for reporting it!

First, i found that this patch didn't initialize the values from device-tree.
It is called power_board_init -> exynos_power_init()
In exnyos_power_init(), there is no code relevant to "s2mps11_pmic".

pmic_get("s2mps11_pmic", &dev);

and need to implement the others..

Second, it seems that there is a bug on mmc side about "mmc_init: -110, time 
80".

Will send the patch about all things.

Best Regards,
Jaehoon Chung

> 
> Best Regards,
> Jaehoon Chung
> 
>>

[..snip..]

>>
>>
> 
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Re: [U-Boot] [PATCH 1/7] serial: Use next serial device if probing fails

[Alexander Graf]

On 16.01.18 22:32, Heinrich Schuchardt wrote:
> On 01/16/2018 02:47 PM, Alexander Graf wrote:
>> Currently our serial device search chokes on the fact that the serial
>> probe function could fail. If it does, instead of searching for the next
>> usable serial device, it just quits.
>>
>> This patch changes the fallback logic so that even when a serial device
>> was not probed correctly, we just try the next ones until we find one that
>> works.
>>
>> Signed-off-by: Alexander Graf 
>> ---
>>  drivers/serial/serial-uclass.c | 23 +++
>>  1 file changed, 19 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
>> index 2e5116f7ce..637544d1a7 100644
>> --- a/drivers/serial/serial-uclass.c
>> +++ b/drivers/serial/serial-uclass.c
>> @@ -74,6 +74,7 @@ static void serial_find_console_or_panic(void)
>>  {
>>  const void *blob = gd->fdt_blob;
>>  struct udevice *dev;
>> +int ret;
>>  
>>  if (CONFIG_IS_ENABLED(OF_PLATDATA)) {
>>  uclass_first_device(UCLASS_SERIAL, &dev);
>> @@ -104,8 +105,8 @@ static void serial_find_console_or_panic(void)
>>   * from 1!).
>>   *
>>   * Failing that, get the device with sequence number 0, or in
>> - * extremis just the first serial device we can find. But we
>> - * insist on having a console (even if it is silent).
>> + * extremis just the first working serial device we can find.
>> + * But we insist on having a console (even if it is silent).
>>   */
>>  #ifdef CONFIG_CONS_INDEX
>>  #define INDEX (CONFIG_CONS_INDEX - 1)
>> @@ -113,8 +114,22 @@ static void serial_find_console_or_panic(void)
>>  #define INDEX 0
>>  #endif
> 
> Why would you try probing by INDEX if CONFIG_CONS_INDEX is not defined?
> You could place the else before /* Search for any working device */.

I don't know, but I didn't want to touch that legacy code, in case
something breaks :). Also that explicit search succeeds even if probing
failed, so in a way it's different from the search for a working device.

> 
>>  if (!uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &dev) ||
>> -!uclass_get_device(UCLASS_SERIAL, INDEX, &dev) ||
>> -(!uclass_first_device(UCLASS_SERIAL, &dev) && dev)) {
>> +!uclass_get_device(UCLASS_SERIAL, INDEX, &dev)) {
>> +if (dev->flags & DM_FLAG_ACTIVATED) {
>> +gd->cur_serial_dev = dev;
>> +return;
>> +}
>> +}
>> +
>> +/* Search for any working device */
>> +for (ret = uclass_first_device_check(UCLASS_SERIAL, &dev);
>> + dev;
>> + ret = uclass_next_device_check(&dev)) {
>> +if (ret) {
>> +/* Device did succeed probing */
> 
> Above you wrote that you want the first and not the last device.
> 
> If this line is reached upon success, wouldn't you set
> gd->cur_serial_dev here and return?

It's just a typo in the comment. It should read "Device did not succeed
probing" or maybe rather "Device failed probing".

I agree that it's slightly confusing though, so maybe I'll just swap the
logic around.


Alex
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Re: [U-Boot] [PATCH v2] mmc: sdhci-cadence: add HS200 support

[Jaehoon Chung]

Hi Masahiro,

On 01/12/2018 06:10 PM, Masahiro Yamada wrote:
> Add HS200 timing setting and the MMC tuning callback.
> 
> Signed-off-by: Masahiro Yamada 
> ---
> 
> Changes in v2:
>   - Surround .execute_tuning hook with #ifdef MMC_SUPPORTS_TUNING
> 
>  drivers/mmc/sdhci-cadence.c | 90 
> -
>  1 file changed, 81 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c
> index 921095b..8960f6f 100644
> --- a/drivers/mmc/sdhci-cadence.c
> +++ b/drivers/mmc/sdhci-cadence.c
> @@ -52,6 +52,13 @@
>  #define SDHCI_CDNS_PHY_DLY_HSMMC 0x0c
>  #define SDHCI_CDNS_PHY_DLY_STROBE0x0d
>  
> +/*
> + * The tuned val register is 6 bit-wide, but not the whole of the range is
> + * available.  The range 0-42 seems to be available (then 43 wraps around to 
> 0)
> + * but I am not quite sure if it is official.  Use only 0 to 39 for safety.
> + */
> +#define SDHCI_CDNS_MAX_TUNING_LOOP   40
> +
>  struct sdhci_cdns_plat {
>   struct mmc_config cfg;
>   struct mmc mmc;
> @@ -135,20 +142,18 @@ static void sdhci_cdns_set_control_reg(struct 
> sdhci_host *host)
>* The mode should be decided by MMC_TIMING_* like Linux, but
>* U-Boot does not support timing.  Use the clock frequency instead.
>*/
> - if (clock <= 2600)
> + if (clock <= 2600) {
>   mode = SDHCI_CDNS_HRS06_MODE_SD; /* use this for Legacy */
> - else if (clock <= 5200) {
> + } else if (clock <= 5200) {
>   if (mmc->ddr_mode)
>   mode = SDHCI_CDNS_HRS06_MODE_MMC_DDR;
>   else
>   mode = SDHCI_CDNS_HRS06_MODE_MMC_SDR;
>   } else {
> - /*
> -  * REVISIT:
> -  * The IP supports HS200/HS400, revisit once U-Boot support it
> -  */
> - printf("unsupported frequency %d\n", clock);
> - return;
> + if (mmc->ddr_mode)
> + mode = SDHCI_CDNS_HRS06_MODE_MMC_HS400;
> + else
> + mode = SDHCI_CDNS_HRS06_MODE_MMC_HS200;
>   }
>  
>   tmp = readl(plat->hrs_addr + SDHCI_CDNS_HRS06);
> @@ -161,6 +166,69 @@ static const struct sdhci_ops sdhci_cdns_ops = {
>   .set_control_reg = sdhci_cdns_set_control_reg,
>  };
>  
> +static int sdhci_cdns_set_tune_val(struct sdhci_cdns_plat *plat,
> +unsigned int val)
> +{
> + void __iomem *reg = plat->hrs_addr + SDHCI_CDNS_HRS06;
> + u32 tmp;
> +
> + if (WARN_ON(!FIELD_FIT(SDHCI_CDNS_HRS06_TUNE, val)))
> + return -EINVAL;
> +
> + tmp = readl(reg);
> + tmp &= ~SDHCI_CDNS_HRS06_TUNE;
> + tmp |= FIELD_PREP(SDHCI_CDNS_HRS06_TUNE, val);
> + tmp |= SDHCI_CDNS_HRS06_TUNE_UP;
> + writel(tmp, reg);
> +
> + return readl_poll_timeout(reg, tmp, !(tmp & SDHCI_CDNS_HRS06_TUNE_UP),
> +   1);
> +}
> +
> +static int __maybe_unused sdhci_cdns_execute_tuning(struct udevice *dev,
> + unsigned int opcode)
> +{
> + struct sdhci_cdns_plat *plat = dev_get_platdata(dev);
> + struct mmc *mmc = &plat->mmc;
> + int cur_streak = 0;
> + int max_streak = 0;
> + int end_of_streak = 0;
> + int i;
> +
> + /*
> +  * This handler only implements the eMMC tuning that is specific to
> +  * this controller.  The tuning for SD timing should be handled by the
> +  * SDHCI core.
> +  */
> + if (!IS_MMC(mmc))
> + return -ENOSYS;

If you're ok, i want to change the return value to ENOTSUPP or other from 
ENOSYS. How about?

Best Regards,
Jaehoon Chung

> +
> + if (WARN_ON(opcode != MMC_CMD_SEND_TUNING_BLOCK_HS200))
> + return -EINVAL;
> +
> + for (i = 0; i < SDHCI_CDNS_MAX_TUNING_LOOP; i++) {
> + if (sdhci_cdns_set_tune_val(plat, i) ||
> + mmc_send_tuning(mmc, opcode, NULL)) { /* bad */
> + cur_streak = 0;
> + } else { /* good */
> + cur_streak++;
> + if (cur_streak > max_streak) {
> + max_streak = cur_streak;
> + end_of_streak = i;
> + }
> + }
> + }
> +
> + if (!max_streak) {
> + dev_err(dev, "no tuning point found\n");
> + return -EIO;
> + }
> +
> + return sdhci_cdns_set_tune_val(plat, end_of_streak - max_streak / 2);
> +}
> +
> +static struct dm_mmc_ops sdhci_cdns_mmc_ops;
> +
>  static int sdhci_cdns_bind(struct udevice *dev)
>  {
>   struct sdhci_cdns_plat *plat = dev_get_platdata(dev);
> @@ -189,6 +257,10 @@ static int sdhci_cdns_probe(struct udevice *dev)
>   host->ioaddr = plat->hrs_addr + SDHCI_CDNS_SRS_BASE;
>   host->ops = &sdhci_cdns_ops;
>   host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD;
> + sdhci_cdns_mmc_ops = sdhci_ops;
> +#ifdef

Re: [U-Boot] [PATCH v2] mmc: sdhci-cadence: add HS200 support

[Masahiro Yamada]

Hi Jaehoon,

2018-01-17 17:34 GMT+09:00 Jaehoon Chung :

>> + /*
>> +  * This handler only implements the eMMC tuning that is specific to
>> +  * this controller.  The tuning for SD timing should be handled by the
>> +  * SDHCI core.
>> +  */
>> + if (!IS_MMC(mmc))
>> + return -ENOSYS;
>
> If you're ok, i want to change the return value to ENOTSUPP or other from 
> ENOSYS. How about?
>

OK, please do so.


Thanks!



-- 
Best Regards
Masahiro Yamada
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[U-Boot] [PATCH 1/3] ARM: dts: stm32: Add STMMAC clocks for stm32f746

[patrice.chotard]

From: Patrice Chotard 

Add ETHMAC, ETHMACRX and ETHMACTX clocks for STMMAC.

Signed-off-by: Patrice Chotard 
---
 arch/arm/dts/stm32f746.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 929bf82..46d148e 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -65,6 +65,9 @@
compatible = "st,stm32-dwmac";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
+   clocks = <&rcc 0 STM32F7_AHB1_CLOCK(ETHMAC)>,
+<&rcc 0 STM32F7_AHB1_CLOCK(ETHMACTX)>,
+<&rcc 0 STM32F7_AHB1_CLOCK(ETHMACRX)>;
interrupts = <61>, <62>;
interrupt-names = "macirq", "eth_wake_irq";
snps,pbl = <8>;
-- 
1.9.1

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[U-Boot] [PATCH 0/3] STM32: Remove STMMAC clock setup from board

[patrice.chotard]

From: Patrice Chotard 

As STMMAC designware driver is now able to get and enable STMMAC clocks,
we can remove code related to STMMAC clock setup in board and in
clk_stm32f driver.
 
Set SYSCFG clock directly in configure_clocks()

Add missing STMMAC clocks in stm32f746 dts file.

Patrice Chotard (3):
  ARM: dts: stm32: Add STMMAC clocks for stm32f746
  clk: clk_stm32f: Remove STMMAC clock setup
  clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()

 arch/arm/dts/stm32f746.dtsi  |  3 +++
 arch/arm/include/asm/arch-stm32f7/stm32_periph.h |  2 --
 board/st/stm32f746-disco/stm32f746-disco.c   | 20 ++--
 drivers/clk/clk_stm32f.c | 16 
 4 files changed, 13 insertions(+), 28 deletions(-)

-- 
1.9.1

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[U-Boot] [PATCH 2/3] clk: clk_stm32f: Remove STMMAC clock setup

[patrice.chotard]

From: Patrice Chotard 

Thanks to 'commit ba1f96672522 ("net: designware: add clock support")'
we don't need anymore to setup the STMMAC clock in board.

Signed-off-by: Patrice Chotard 
---
 arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 1 -
 board/st/stm32f746-disco/stm32f746-disco.c   | 1 -
 drivers/clk/clk_stm32f.c | 6 --
 3 files changed, 8 deletions(-)

diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h 
b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
index ae0faef..13f9c9b 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
@@ -23,7 +23,6 @@ enum periph_id {
 enum periph_clock {
SYSCFG_CLOCK_CFG,
TIMER2_CLOCK_CFG,
-   STMMAC_CLOCK_CFG,
 };
 
 #endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index 2e8aa86..58a5ef0 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -75,7 +75,6 @@ static int stmmac_setup(void)
clock_setup(SYSCFG_CLOCK_CFG);
/* Set >RMII mode */
STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
-   clock_setup(STMMAC_CLOCK_CFG);
 
return 0;
 }
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index 63116e0..d0c7a90 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -90,7 +90,6 @@
 enum periph_clock {
SYSCFG_CLOCK_CFG,
TIMER2_CLOCK_CFG,
-   STMMAC_CLOCK_CFG,
 };
 
 struct stm32_clk_info stm32f4_clk_info = {
@@ -359,11 +358,6 @@ void clock_setup(int peripheral)
case TIMER2_CLOCK_CFG:
setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
break;
-   case STMMAC_CLOCK_CFG:
-   setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_EN);
-   setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_RX_EN);
-   setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_TX_EN);
-   break;
default:
break;
}
-- 
1.9.1

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[U-Boot] [PATCH 3/3] clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()

[patrice.chotard]

From: Patrice Chotard 

Move SYSCFG clock setup into configure_clocks() instead of calling
clock_setup() from drivers.
Move the RMII setup from board_early_init_f() to board_init()
to insure that RMII bit is set only when clock driver is initialized.

Signed-off-by: Patrice Chotard 
---
 arch/arm/include/asm/arch-stm32f7/stm32_periph.h |  1 -
 board/st/stm32f746-disco/stm32f746-disco.c   | 19 ++-
 drivers/clk/clk_stm32f.c | 10 --
 3 files changed, 10 insertions(+), 20 deletions(-)

diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h 
b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
index 13f9c9b..7b8f66a 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
@@ -21,7 +21,6 @@ enum periph_id {
 };
 
 enum periph_clock {
-   SYSCFG_CLOCK_CFG,
TIMER2_CLOCK_CFG,
 };
 
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index 58a5ef0..8da7028 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -69,23 +69,10 @@ int dram_init_banksize(void)
return 0;
 }
 
-#ifdef CONFIG_ETH_DESIGNWARE
-static int stmmac_setup(void)
-{
-   clock_setup(SYSCFG_CLOCK_CFG);
-   /* Set >RMII mode */
-   STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
-
-   return 0;
-}
-
 int board_early_init_f(void)
 {
-   stmmac_setup();
-
return 0;
 }
-#endif
 
 #ifdef CONFIG_SPL_BUILD
 #ifdef CONFIG_SPL_OS_BOOT
@@ -162,5 +149,11 @@ int board_late_init(void)
 int board_init(void)
 {
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
+
+#ifdef CONFIG_ETH_DESIGNWARE
+   /* Set >RMII mode */
+   STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
+#endif
+
return 0;
 }
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index d0c7a90..1ae5b70 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -67,8 +67,6 @@
 #define RCC_DCKCFGRX_SDMMC1SEL BIT(28)
 #define RCC_DCKCFGR2_SDMMC2SEL BIT(29)
 
-#define RCC_APB2ENR_SAI1EN BIT(22)
-
 /*
  * RCC AHB1ENR specific definitions
  */
@@ -86,9 +84,9 @@
  * RCC APB2ENR specific definitions
  */
 #define RCC_APB2ENR_SYSCFGEN   BIT(14)
+#define RCC_APB2ENR_SAI1EN BIT(22)
 
 enum periph_clock {
-   SYSCFG_CLOCK_CFG,
TIMER2_CLOCK_CFG,
 };
 
@@ -227,6 +225,9 @@ static int configure_clocks(struct udevice *dev)
/* gate the SAI clock, needed for MMC 1&2 clocks */
setbits_le32(®s->apb2enr, RCC_APB2ENR_SAI1EN);
 
+   /* gate the SYSCFG clock, needed to set RMII ethernet interface */
+   setbits_le32(®s->apb2enr, RCC_APB2ENR_SYSCFGEN);
+
return 0;
 }
 
@@ -352,9 +353,6 @@ static int stm32_clk_enable(struct clk *clk)
 void clock_setup(int peripheral)
 {
switch (peripheral) {
-   case SYSCFG_CLOCK_CFG:
-   setbits_le32(&STM32_RCC->apb2enr, RCC_APB2ENR_SYSCFGEN);
-   break;
case TIMER2_CLOCK_CFG:
setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
break;
-- 
1.9.1

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[U-Boot] [PATCH v2 4/7] serial: bcm283x_mu: Remove support for post-init disabling

[Alexander Graf]

We are switching to a model where a serial device doesn't even get probed when
it's not muxed properly, so we don't need device specific disabling
functionality anymore.

Signed-off-by: Alexander Graf 
---
 drivers/serial/serial_bcm283x_mu.c   | 18 +-
 include/dm/platform_data/serial_bcm283x_mu.h |  1 -
 2 files changed, 1 insertion(+), 18 deletions(-)

diff --git a/drivers/serial/serial_bcm283x_mu.c 
b/drivers/serial/serial_bcm283x_mu.c
index 41c26b3d93..7ce990b9b8 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -59,7 +59,7 @@ static int bcm283x_mu_serial_setbrg(struct udevice *dev, int 
baudrate)
struct bcm283x_mu_regs *regs = priv->regs;
u32 divider;
 
-   if (plat->disabled || plat->skip_init)
+   if (plat->skip_init)
return 0;
 
divider = plat->clock / (baudrate * 8);
@@ -75,9 +75,6 @@ static int bcm283x_mu_serial_probe(struct udevice *dev)
struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
 
-   if (plat->disabled)
-   return -ENODEV;
-
priv->regs = (struct bcm283x_mu_regs *)plat->base;
 
return 0;
@@ -85,14 +82,10 @@ static int bcm283x_mu_serial_probe(struct udevice *dev)
 
 static int bcm283x_mu_serial_getc(struct udevice *dev)
 {
-   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
struct bcm283x_mu_regs *regs = priv->regs;
u32 data;
 
-   if (plat->disabled)
-   return -EAGAIN;
-
/* Wait until there is data in the FIFO */
if (!(readl(®s->lsr) & BCM283X_MU_LSR_RX_READY))
return -EAGAIN;
@@ -104,13 +97,9 @@ static int bcm283x_mu_serial_getc(struct udevice *dev)
 
 static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
 {
-   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
struct bcm283x_mu_regs *regs = priv->regs;
 
-   if (plat->disabled)
-   return 0;
-
/* Wait until there is space in the FIFO */
if (!(readl(®s->lsr) & BCM283X_MU_LSR_TX_EMPTY))
return -EAGAIN;
@@ -123,14 +112,10 @@ static int bcm283x_mu_serial_putc(struct udevice *dev, 
const char data)
 
 static int bcm283x_mu_serial_pending(struct udevice *dev, bool input)
 {
-   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
struct bcm283x_mu_regs *regs = priv->regs;
unsigned int lsr;
 
-   if (plat->disabled)
-   return 0;
-
lsr = readl(®s->lsr);
 
if (input) {
@@ -168,7 +153,6 @@ static int bcm283x_mu_serial_ofdata_to_platdata(struct 
udevice *dev)
 1);
plat->skip_init = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
  "skip-init");
-   plat->disabled = false;
return 0;
 }
 #endif
diff --git a/include/dm/platform_data/serial_bcm283x_mu.h 
b/include/dm/platform_data/serial_bcm283x_mu.h
index c47d3c0e60..57ae6adc05 100644
--- a/include/dm/platform_data/serial_bcm283x_mu.h
+++ b/include/dm/platform_data/serial_bcm283x_mu.h
@@ -19,7 +19,6 @@ struct bcm283x_mu_serial_platdata {
unsigned long base;
unsigned int clock;
bool skip_init;
-   bool disabled;
 };
 
 #endif
-- 
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[U-Boot] [PATCH v2 6/7] rpi: Determine PL011/Mini-UART availability at runtime

[Alexander Graf]

Firmware on the Raspberry Pi family of devices can dynamically configure either
the PL011, Mini-UART or no device at all to be routed to the user accessible
UART pins.

That means we need to always include both drivers, because we can never be sure
which of the two serial devices firmware actually chooses to use.

Signed-off-by: Alexander Graf 
---
 include/configs/rpi.h | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index cab8661779..2c84cf9a49 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -75,12 +75,9 @@
 #define CONFIG_MISC_INIT_R
 #endif
 
-/* Console UART */
-#if defined (CONFIG_BCM2837) || defined(CONFIG_TARGET_RPI_0_W)
+/* Console UART, can be configured dynamically in config.txt */
 #define CONFIG_BCM283X_MU_SERIAL
-#else
 #define CONFIG_PL01X_SERIAL
-#endif
 
 /* Console configuration */
 #define CONFIG_SYS_CBSIZE  1024
-- 
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[U-Boot] [PATCH v2 2/7] serial: Allow boards to determine whether a serial device is usable

[Alexander Graf]

On some boards, serial devices may or may not be muxed properly to actual
pins, depending on firmware configuration. To determine whether we should
use a serial device for U-Boot in-/output, we need to check whether it
is muxed properly.

This is something only the board file can do, so let's expose a weak
function that a board can override to explicitly allow or disallow
usage of certain serial devices.

Signed-off-by: Alexander Graf 
---
 drivers/serial/serial-uclass.c | 11 +++
 include/serial.h   | 11 +++
 2 files changed, 22 insertions(+)

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 68ca2d09d1..ecd64f8e86 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -366,6 +366,16 @@ static int on_baudrate(const char *name, const char 
*value, enum env_op op,
 U_BOOT_ENV_CALLBACK(baudrate, on_baudrate);
 
 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
+__weak int board_check_serial(struct udevice *dev)
+{
+   return 0;
+}
+
+static int serial_pre_probe(struct udevice *dev)
+{
+   return board_check_serial(dev);
+}
+
 static int serial_post_probe(struct udevice *dev)
 {
struct dm_serial_ops *ops = serial_get_ops(dev);
@@ -438,6 +448,7 @@ UCLASS_DRIVER(serial) = {
.name   = "serial",
.flags  = DM_UC_FLAG_SEQ_ALIAS,
.post_probe = serial_post_probe,
+   .pre_probe  = serial_pre_probe,
.pre_remove = serial_pre_remove,
.per_device_auto_alloc_size = sizeof(struct serial_dev_priv),
 };
diff --git a/include/serial.h b/include/serial.h
index d87f01082a..221b3e1402 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -207,4 +207,15 @@ void sh_serial_initialize(void);
 void uartlite_serial_initialize(void);
 void zynq_serial_initialize(void);
 
+/**
+ * board_check_serial() - Determine whether a serial device works
+ *
+ * This is a board callback that allows boards to override whether a serial
+ * device is usable. By default, all devices are declared usable.
+ *
+ * @dev: Device pointer
+ * @return 0 if the device is usable, !0 otherwise
+ */
+int board_check_serial(struct udevice *dev);
+
 #endif
-- 
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[U-Boot] [PATCH v2 5/7] rpi: Properly detect which serial device is active

[Alexander Graf]

Now that we have all infrastructure in place to dynamically determine whether
a serial device is actually usable (read: routed to user accessible pins), we
can wire it up to the board.

This patch adds support to determine whether the pl011 or mini-uart or no serial
is routed to the UART RX/TX pins on the Raspberry Pi family of boards.

Signed-off-by: Alexander Graf 
---
 board/raspberrypi/rpi/rpi.c | 69 +
 1 file changed, 69 insertions(+)

diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index a96d5d8952..b0cdad70f7 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -24,9 +24,16 @@
 #include 
 #endif
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * This is the GPIO pin that the user facing UART RX line is attached to.
+ * We use this pin to determine which serial device is available.
+ */
+#define BCM2835_GPIO_RX15
+
 /* From lowlevel_init.S */
 extern unsigned long fw_dtb_pointer;
 
@@ -419,6 +426,68 @@ static void get_board_rev(void)
printf("RPI %s (0x%x)\n", model->name, revision);
 }
 
+/*
+ * We may get called before the device model is initialized, so we can not
+ * rely on the GPIO driver.
+ */
+int get_func_id(unsigned gpio)
+{
+   u32 val;
+   u32 node;
+   u32 *gpfsel;
+   fdt_addr_t addr;
+   fdt_size_t size;
+
+   node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, 
"brcm,bcm2835-gpio");
+   if (node < 0)
+   return -EINVAL;
+
+   addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, node, "reg",
+ 0, &size, true);
+   gpfsel = (void*)addr;
+
+   val = readl(&gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+
+   return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK);
+}
+
+
+/*
+ * The RPi has 2 serial ports: A PL011 based one and the mini-uart.
+ * Depending on firmware configuration, either can be configured to either
+ * nothing, the wifi adapter or serial output.
+ *
+ * We only want to use the serial port that is user facing to not
+ * end up with a potentially unresponsive serial port. Due to this
+ * we need to check whether the serial device is actually connected
+ * to the UART RX/TX pins on the RPi GPIO pin bar.
+ *
+ * We only allow U-Boot to instantiate the serial driver for the serial
+ * device that is muxed correctly.
+ */
+int board_check_serial(struct udevice *dev)
+{
+   int func;
+
+   printf("Checking serial %s\n", dev->name);
+
+   if (device_is_compatible(dev, "arm,pl011")) {
+   func = BCM2835_GPIO_ALT0;
+   } else if (device_is_compatible(dev, "brcm,bcm2835-aux-uart")) {
+   func = BCM2835_GPIO_ALT5;
+   } else {
+   return 0;
+   }
+
+   if (get_func_id(BCM2835_GPIO_RX) != func) {
+   printf("Disabling serial %s\n", dev->name);
+   return -ENODEV;
+   }
+
+   printf("Enabling serial %s\n", dev->name);
+   return 0;
+}
+
 int board_init(void)
 {
 #ifdef CONFIG_HW_WATCHDOG
-- 
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[U-Boot] [PATCH v2 3/7] rpi: Remove runtime disabling support for serial

[Alexander Graf]

We are switching to a model where our board file can directly fail probing
of serial devices when they're not usable, so remove the current runtime
hack we have.

Signed-off-by: Alexander Graf 
---
 arch/arm/mach-bcm283x/include/mach/gpio.h |  1 -
 board/raspberrypi/rpi/rpi.c   | 43 ---
 drivers/gpio/bcm2835_gpio.c   |  2 +-
 3 files changed, 1 insertion(+), 45 deletions(-)

diff --git a/arch/arm/mach-bcm283x/include/mach/gpio.h 
b/arch/arm/mach-bcm283x/include/mach/gpio.h
index 751594d09f..1bcb5846ca 100644
--- a/arch/arm/mach-bcm283x/include/mach/gpio.h
+++ b/arch/arm/mach-bcm283x/include/mach/gpio.h
@@ -61,7 +61,6 @@ struct bcm2835_gpio_platdata {
unsigned long base;
 };
 
-int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio);
 void bcm2835_gpio_set_pinmux(struct udevice *dev, int handle);
 
 #endif /* _BCM2835_GPIO_H_ */
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 3b7a54f519..a96d5d8952 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -419,54 +419,11 @@ static void get_board_rev(void)
printf("RPI %s (0x%x)\n", model->name, revision);
 }
 
-#ifndef CONFIG_PL01X_SERIAL
-static bool rpi_is_serial_active(void)
-{
-   int serial_gpio = 15;
-   struct udevice *dev;
-
-   /*
-* The RPi3 disables the mini uart by default. The easiest way to find
-* out whether it is available is to check if the RX pin is muxed.
-*/
-
-   if (uclass_first_device(UCLASS_GPIO, &dev) || !dev)
-   return true;
-
-   if (bcm2835_gpio_get_func_id(dev, serial_gpio) != BCM2835_GPIO_ALT5)
-   return false;
-
-   return true;
-}
-
-/* Disable mini-UART I/O if it's not pinmuxed to our pins.
- * The firmware only enables it if explicitly done in config.txt: enable_uart=1
- */
-static void rpi_disable_inactive_uart(void)
-{
-   struct udevice *dev;
-   struct bcm283x_mu_serial_platdata *plat;
-
-   if (uclass_get_device_by_driver(UCLASS_SERIAL,
-   DM_GET_DRIVER(serial_bcm283x_mu),
-   &dev) || !dev)
-   return;
-
-   if (!rpi_is_serial_active()) {
-   plat = dev_get_platdata(dev);
-   plat->disabled = true;
-   }
-}
-#endif
-
 int board_init(void)
 {
 #ifdef CONFIG_HW_WATCHDOG
hw_watchdog_init();
 #endif
-#ifndef CONFIG_PL01X_SERIAL
-   rpi_disable_inactive_uart();
-#endif
 
get_board_rev();
 
diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
index 209cbed9e6..3edd90ea97 100644
--- a/drivers/gpio/bcm2835_gpio.c
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -73,7 +73,7 @@ static int bcm2835_gpio_set_value(struct udevice *dev, 
unsigned gpio,
return 0;
 }
 
-int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio)
+static int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio)
 {
struct bcm2835_gpios *gpios = dev_get_priv(dev);
u32 val;
-- 
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[U-Boot] [PATCH v2 7/7] rpi: Force skip_init on serial devices

[Alexander Graf]

The serial devices on the raspberry pi are based on clocks we can't easily
read and influence in U-Boot. However, the serial devices are always already
properly set up when coming up, so all we need to do is leave them alone.

The way to do that is to specify "skip-init" in device tree usually, but
if we set CONFIG_OF_BOARD to get the device tree from the RPi firmware,
that does not have skip-init properly set.

So instead we just force it in board specific code. That way serial devices
also work fine when skip-init is not passed explicitly in DT.

Signed-off-by: Alexander Graf 
---
 board/raspberrypi/rpi/rpi.c| 7 +++
 drivers/serial/serial_bcm283x_mu.c | 2 +-
 drivers/serial/serial_pl01x.c  | 2 +-
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index b0cdad70f7..ce1286a53a 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #ifdef CONFIG_ARM64
 #include 
 #endif
@@ -472,9 +473,15 @@ int board_check_serial(struct udevice *dev)
printf("Checking serial %s\n", dev->name);
 
if (device_is_compatible(dev, "arm,pl011")) {
+   struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+
func = BCM2835_GPIO_ALT0;
+   plat->skip_init = true;
} else if (device_is_compatible(dev, "brcm,bcm2835-aux-uart")) {
+   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
+
func = BCM2835_GPIO_ALT5;
+   plat->skip_init = true;
} else {
return 0;
}
diff --git a/drivers/serial/serial_bcm283x_mu.c 
b/drivers/serial/serial_bcm283x_mu.c
index 7ce990b9b8..8a7ca75d4a 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -151,7 +151,7 @@ static int bcm283x_mu_serial_ofdata_to_platdata(struct 
udevice *dev)
plat->base = addr;
plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "clock",
 1);
-   plat->skip_init = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
+   plat->skip_init |= fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
  "skip-init");
return 0;
 }
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 4ec0f29c42..f957eddc07 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -357,7 +357,7 @@ static int pl01x_serial_ofdata_to_platdata(struct udevice 
*dev)
plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "clock",
 1);
plat->type = dev_get_driver_data(dev);
-   plat->skip_init = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
+   plat->skip_init |= fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
  "skip-init");
return 0;
 }
-- 
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[U-Boot] [PATCH v2 0/7] RPi: Properly handle dynamic serial configuration

[Alexander Graf]

The RPi has proprietary firmware that can be configured (using config.txt)
to expose either the PL11, Mini-UART or no serial device to the UART pins
on the GPIO pin bar of the RPi.

So far we've only half-heartedly dealt with that, with lost of heuristics
that ended up falling apart at times. For example the RPi3 CM uses PL011
when serial is enabled in config.txt, but we disabled PL11 support for BCM2837
because the RPi3 uses the Mini-UART with enable_uart=1 is set in config.txt.

This patch set always enables both serial outputs and determines at probe
time whether a serial device is actually muxed to the UART pins on the board.
Only in that case, it will be probed and thus used for in- and output in
U-Boot.

With this patch set applied, I have successfully used the same U-Boot binary
with CONFIG_OF_BOARD=y and a RPi firmware provided device tree with both
enable_uart=1 and without on both a RPi3 and RPi3 CM.

This patch set depends on the patch set "Rpi: Add support for second sd host
controller".

v1 -> v2:

  - Make search logic easier to follow

Alexander Graf (7):
  serial: Use next serial device if probing fails
  serial: Allow boards to determine whether a serial device is usable
  rpi: Remove runtime disabling support for serial
  serial: bcm283x_mu: Remove support for post-init disabling
  rpi: Properly detect which serial device is active
  rpi: Determine PL011/Mini-UART availability at runtime
  rpi: Force skip_init on serial devices

 arch/arm/mach-bcm283x/include/mach/gpio.h|  1 -
 board/raspberrypi/rpi/rpi.c  | 91 +++-
 drivers/gpio/bcm2835_gpio.c  |  2 +-
 drivers/serial/serial-uclass.c   | 36 +--
 drivers/serial/serial_bcm283x_mu.c   | 20 +-
 drivers/serial/serial_pl01x.c|  2 +-
 include/configs/rpi.h|  5 +-
 include/dm/platform_data/serial_bcm283x_mu.h |  1 -
 include/serial.h | 11 
 9 files changed, 108 insertions(+), 61 deletions(-)

-- 
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[U-Boot] [PATCH v2 1/7] serial: Use next serial device if probing fails

[Alexander Graf]

Currently our serial device search chokes on the fact that the serial
probe function could fail. If it does, instead of searching for the next
usable serial device, it just quits.

This patch changes the fallback logic so that even when a serial device
was not probed correctly, we just try the next ones until we find one that
works.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Make search logic easier to follow
---
 drivers/serial/serial-uclass.c | 25 +++--
 1 file changed, 19 insertions(+), 6 deletions(-)

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 2e5116f7ce..68ca2d09d1 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -74,6 +74,7 @@ static void serial_find_console_or_panic(void)
 {
const void *blob = gd->fdt_blob;
struct udevice *dev;
+   int ret;
 
if (CONFIG_IS_ENABLED(OF_PLATDATA)) {
uclass_first_device(UCLASS_SERIAL, &dev);
@@ -104,8 +105,8 @@ static void serial_find_console_or_panic(void)
 * from 1!).
 *
 * Failing that, get the device with sequence number 0, or in
-* extremis just the first serial device we can find. But we
-* insist on having a console (even if it is silent).
+* extremis just the first working serial device we can find.
+* But we insist on having a console (even if it is silent).
 */
 #ifdef CONFIG_CONS_INDEX
 #define INDEX (CONFIG_CONS_INDEX - 1)
@@ -113,10 +114,22 @@ static void serial_find_console_or_panic(void)
 #define INDEX 0
 #endif
if (!uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &dev) ||
-   !uclass_get_device(UCLASS_SERIAL, INDEX, &dev) ||
-   (!uclass_first_device(UCLASS_SERIAL, &dev) && dev)) {
-   gd->cur_serial_dev = dev;
-   return;
+   !uclass_get_device(UCLASS_SERIAL, INDEX, &dev)) {
+   if (dev->flags & DM_FLAG_ACTIVATED) {
+   gd->cur_serial_dev = dev;
+   return;
+   }
+   }
+
+   /* Search for any working device */
+   for (ret = uclass_first_device_check(UCLASS_SERIAL, &dev);
+dev;
+ret = uclass_next_device_check(&dev)) {
+   if (!ret) {
+   /* Device did succeed probing */
+   gd->cur_serial_dev = dev;
+   return;
+   }
}
 #undef INDEX
}
-- 
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Re: [U-Boot] [PATCH v2 00/15] env: Multiple env support and env transition for sunxi

[Maxime Ripard]

Hi,

On Tue, Jan 16, 2018 at 04:56:49PM -0500, Tom Rini wrote:
> On Tue, Jan 16, 2018 at 10:16:36AM +0100, Maxime Ripard wrote:
> > Hi,
> > 
> > Here is a second attempt at transitioning away from the MMC raw environment
> > to a FAT-based one for Allwinner SoCs. Since the RFC was quite well
> > received, I actually tested it and fixed a few rough edges.
> > 
> > You'll find the first RFC here for reference:
> > https://lists.denx.de/pipermail/u-boot/2017-October/310111.html
> > 
> > And the second that originated in this series:
> > https://lists.denx.de/pipermail/u-boot/2017-November/311608.html
> > 
> > I gave it a travis run, and one test seems to fail in one test:
> > https://travis-ci.org/mripard/u-boot/jobs/329229382
> > 
> > I really cannot really make any sense of why a change in the way the
> > environment loads could affect the operation of a DHCP client. Is there a
> > way to reproduce locally?
> 
> In this case, roughly, clone https://github.com/swarren/uboot-test-hooks
> and then:
> $ export PATH=${PATH}:/path/to/uboot-test-hooks/bin
> $ export PYTHONPATH=/path/to/uboot-test-hooks/py/travis-ci:${PYTHONPATH}
> $ export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/$1
> $ ./test/py/test.py --bd vexpress_ca15_tc2 --build-dir 
> "$UBOOT_TRAVIS_BUILD_DIR" -k 'net'

Thanks, I had to tweak it a bit to add --id qemu, and copy the
conf.vexpress_ca15_tc2_qemu file in a directory with my hostname in
the uboot-test-hooks repo.

And this is really getting weird, since the tests passes on my
machine:
http://code.bulix.org/rp6z29-258577

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com


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[U-Boot] [PATCH] arm: zynq: Mark cc108 uart to be initialized before relocation

[Michal Simek]

The same change is done for others zynq boards to get uart as early as
possible.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynq-cc108.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts
index a55e82b2102c..4804da5235dd 100644
--- a/arch/arm/dts/zynq-cc108.dts
+++ b/arch/arm/dts/zynq-cc108.dts
@@ -100,6 +100,7 @@
 };
 
 &uart0 {
+   u-boot,dm-pre-reloc;
status = "okay";
 };
 
-- 
1.9.1

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Re: [U-Boot] [PATCH 1/3] bcm2835_gpio: Add support for pinmux

[Amit Tomer]

Hi,

> +   val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> +   val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
> +   val |= (func << BCM2835_GPIO_FSEL_SHIFT(gpio));
> +   writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);

Can clrsetbits_le32 be used here ?

Thanks
-Amit
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Re: [U-Boot] mmc1 not working on Samsung snow chromebook

[Jaehoon Chung]

Hi Guillaume,

On 01/09/2018 11:37 PM, Guillaume Gardet wrote:
> Hi,
> 
> 
> Le 17/11/2017 à 10:48, Jaehoon Chung a écrit :
>> Hi,
>>
>> On 2017년 11월 16일 21:29, Guillaume Gardet wrote:
>>> I found a workaround. If I disable MMC_MODE_HS_52MHz, then it is working 
>>> fine.
>>>
>>> I guess there is a better way to implement the following patch ?
>>>
>>> **
>>> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
>>> index 23f642980b..a6a0934eef 100644
>>> --- a/drivers/mmc/dw_mmc.c
>>> +++ b/drivers/mmc/dw_mmc.c
>>> @@ -508,7 +508,8 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct 
>>> dwmci_host *host,
>>>  cfg->host_caps |= MMC_MODE_4BIT;
>>>  cfg->host_caps &= ~MMC_MODE_8BIT;
>>>  }
>>> -   cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
>>> +   /* MMC_MODE_HS_52MHz is broken (at least) on Samsung Snow, so 
>>> disbale it for now */
>>> +   cfg->host_caps |= MMC_MODE_HS;
>> It means that card is running the lower clock frequency..it's not solution.
>> Timing issue and some problems should be fixed with lowest frequency.
>>
>> Now, i can't test and check more detail. After back to my office or home, i 
>> will check what main cause.
> 
> Any progress on this topic ?

Sorry for late. It seems that is related with mmc_power_cycle().

commit 2e7410d76ad11856d09284c18d262d0bb2a3da0c
Author: Kishon Vijay Abraham I 
Date:   Thu Sep 21 16:30:04 2017 +0200

mmc: disable the mmc clock during power off

There is no point in having the mmc clock enabled during
power off. Disable the mmc clock. This is similar to how it's
programmed in Linux Kernel.

Signed-off-by: Kishon Vijay Abraham I 
Signed-off-by: Vignesh R 
Signed-off-by: Jean-Jacques Hiblot 
Reviewed-by: Simon Glass 

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 664b71affd..be68d8d930 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1971,6 +1971,7 @@ static int mmc_power_on(struct mmc *mmc)
 
 static int mmc_power_off(struct mmc *mmc)
 {
+   mmc_set_clock(mmc, 1, true);
 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
if (mmc->vmmc_supply) {
int ret = regulator_set_enable(mmc->vmmc_supply, false);

Current, I'm looking for fixing it.

Could you test with removing its code?

Best Regards,
Jaehoon Chung

> 
> Guillaume
> 
>>
>> Best Regards,
>> Jaehoon Chung
>>
>>>  cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
>>>   }
>>> **
>>>
>>>
>>> Guillaume
>>>
>>>
>>>
>>> Le 15/11/2017 à 11:27, Guillaume Gardet a écrit :

 Le 15/11/2017 à 11:22, Guillaume Gardet a écrit :
> Forgot to Cc ML. Done now.
>
>
> Le 15/11/2017 à 11:14, Guillaume Gardet a écrit :
>> Hello,
>>
>> I tested U-Boot v2017.09 on a Samsung Snow (Chromebook ARM) and while 
>> mmc0 (internal eMMC) is working fine, mmc1 (external SD slot) does not 
>> work.
>> I get the following error for 'mmc dev 1' command:
>>  mmc_init: -110, time 30
 Please also note that on boot (or on 1st 'mmc dev 1' cmd if I stop 
 auto-boot), I firstly get:
  mmc_init: -5, time 39

 Then, all next attempts retruns:
  mmc_init: -110, time 30


 Guillaume


>> Any idea what could be wrong?
>>
>> Guillaume
>>
>>
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> 
> 
> 
> 

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[U-Boot] [PATCH] mmc: fix the wrong dislabing clock

[Jaehoon Chung]

When power is off, clock is not disabling.
Because it's passed to 1, mmc->clock should be set to f_min value.
Some drivers can't initialize the eMMC/SD card with current status.

This patch is to fix the disabling clock value to 0.

Fixes: 2e7410d76ad1 ("mmc: disable the mmc clock during power off")

Signed-off-by: Jaehoon Chung 
---
 drivers/mmc/mmc.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 53c819187e..311f51f237 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1501,11 +1501,13 @@ static int mmc_set_ios(struct mmc *mmc)
 
 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
 {
-   if (clock > mmc->cfg->f_max)
-   clock = mmc->cfg->f_max;
+   if (!disable && clock != 0) {
+   if (clock > mmc->cfg->f_max)
+   clock = mmc->cfg->f_max;
 
-   if (clock < mmc->cfg->f_min)
-   clock = mmc->cfg->f_min;
+   if (clock < mmc->cfg->f_min)
+   clock = mmc->cfg->f_min;
+   }
 
mmc->clock = clock;
mmc->clk_disable = disable;
@@ -2449,7 +2451,7 @@ static int mmc_power_on(struct mmc *mmc)
 
 static int mmc_power_off(struct mmc *mmc)
 {
-   mmc_set_clock(mmc, 1, true);
+   mmc_set_clock(mmc, 0, true);
 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
if (mmc->vmmc_supply) {
int ret = regulator_set_enable(mmc->vmmc_supply, false);
-- 
2.15.1

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[U-Boot] [PATCH v8 00/11] Add VID support for QDS and RDB platforms

[Rajesh Bhagat]

Adds LTC3882 voltage regulator chip support in common VID driver.
And adds VID support for LS1088A QDS and RDB platforms.

Also, Tested LS1088ARDB secure boot with VID support.

Rajesh Bhagat (11):
  armv8: lsch3: Add serdes and DDR voltage setup
  board: common:vid: Add LS1088A VID Supported voltage values
  board: common: vid: Add board specific vdd adjust API
  board: common: vid: Move IR chip specific code in flag
  Kconfig: Add LTC3882 voltage regulator config
  board: common: vid: Add support for LTC3882 voltage regulator chip
  ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs
  ls1088a: ddr: configure DDR for 0.9v for VID support
  common: board_f: vid: Add VID specific API to adjust core voltage
  ls1088a: Add VID support for QDS and RDB platforms
  armv8: ls1088a: vid: Compiling VID specific functions for SPL

 .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 287 +
 arch/arm/cpu/armv8/fsl-layerscape/soc.c|  39 +++
 arch/arm/cpu/armv8/fsl-layerscape/spl.c|   3 +
 .../include/asm/arch-fsl-layerscape/fsl_serdes.h   |   2 +-
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  43 ++-
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |   1 +
 board/freescale/common/Kconfig |  16 ++
 board/freescale/common/Makefile|   2 +-
 board/freescale/common/vid.c   | 147 ++-
 board/freescale/ls1088a/ddr.c  |  21 ++
 board/freescale/ls1088a/ls1088a.c  | 131 ++
 common/board_f.c   |  10 +
 drivers/ddr/fsl/fsl_ddr_gen4.c |   4 +-
 include/common.h   |   3 +
 include/configs/ls1088aqds.h   |  27 ++
 include/configs/ls1088ardb.h   |  27 ++
 16 files changed, 757 insertions(+), 6 deletions(-)

-- 
2.7.4

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[U-Boot] [PATCH v8 01/11] armv8: lsch3: Add serdes and DDR voltage setup

[Rajesh Bhagat]

Adds SERDES voltage and reset SERDES lanes API and makes
enable/disable DDR controller support 0.9V API common.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:
  - Added a NULL entry prctl array
  - Added balank line before return
 
Changes in v7:  
  - Used APIs clr/set/clrsetbits_le32() for code clarity

Changes in v6:  
  - Corrected indentation/alignment issues at various places
  - Changed NULL ENTRY in srds_prctl_info array to id as zero   
  - Corrected the PLL Reset logic, moved code inside for loop   
  - Used error code(-EINVAL) in setup_serdes_volt API

Changes in v5:  
  - Moved local macros to static functions  
  - Used array to handle PRCTL mask and shift operations

Changes in v4:  
  - Added local macros instead of magical numbers   
  - Created macros to remove duplicate code

Changes in v3:
 Restructured LS1088A VID support to use common VID driver
 Cosmetic review comments fixed
 Added __iomem for accessing registers

Changes in v2:
 Checkpatch errors fixed

 .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 287 +
 arch/arm/cpu/armv8/fsl-layerscape/soc.c|  39 +++
 .../include/asm/arch-fsl-layerscape/fsl_serdes.h   |   2 +-
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  34 +++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |   1 +
 5 files changed, 362 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 179cac6..9ee0dd2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -158,6 +158,293 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 
sd_prctl_mask,
serdes_prtcl_map[NONE] = 1;
 }
 
+__weak int get_serdes_volt(void)
+{
+   return -1;
+}
+
+__weak int set_serdes_volt(int svdd)
+{
+   return -1;
+}
+
+#define LNAGCR0_RT_RSTB0x0060
+
+#define RSTCTL_RESET_MASK  0x00E0
+
+#define RSTCTL_RSTREQ  0x8000
+#define RSTCTL_RST_DONE0x4000
+#define RSTCTL_RSTERR  0x2000
+
+#define RSTCTL_SDEN0x0020
+#define RSTCTL_SDRST_B 0x0040
+#define RSTCTL_PLLRST_B0x0080
+
+#define TCALCR_CALRST_B0x0800
+
+struct serdes_prctl_info {
+   u32 id;
+   u32 mask;
+   u32 shift;
+};
+
+struct serdes_prctl_info srds_prctl_info[] = {
+#ifdef CONFIG_SYS_FSL_SRDS_1
+   {.id = 1,
+.mask = FSL_CHASSIS3_SRDS1_PRTCL_MASK,
+.shift = FSL_CHASSIS3_SRDS1_PRTCL_SHIFT
+   },
+
+#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   {.id = 2,
+.mask = FSL_CHASSIS3_SRDS2_PRTCL_MASK,
+.shift = FSL_CHASSIS3_SRDS2_PRTCL_SHIFT
+   },
+#endif
+   {} /* NULL ENTRY */
+};
+
+static int get_serdes_prctl_info_idx(u32 serdes_id)
+{
+   int pos = 0;
+   struct serdes_prctl_info *srds_info;
+
+   /* loop until NULL ENTRY defined by .id=0 */
+   for (srds_info = srds_prctl_info; srds_info->id != 0;
+srds_info++, pos++) {
+   if (srds_info->id == serdes_id)
+   return pos;
+   }
+
+   return -1;
+}
+
+static void do_enabled_lanes_reset(u32 serdes_id, u32 cfg,
+  struct ccsr_serdes __iomem *serdes_base,
+  bool cmplt)
+{
+   int i, pos;
+   u32 cfg_tmp;
+
+   pos = get_serdes_prctl_info_idx(serdes_id);
+   if (pos == -1) {
+   printf("invalid serdes_id %d\n", serdes_id);
+   return;
+   }
+
+   cfg_tmp = cfg & srds_prctl_info[pos].mask;
+   cfg_tmp >>= srds_prctl_info[pos].shift;
+
+   for (i = 0; i < 4 && cfg_tmp & (0xf << (3 - i)); i++) {
+   if (cmplt)
+   setbits_le32(&serdes_base->lane[i].gcr0,
+LNAGCR0_RT_RSTB);
+   else
+   clrbits_le32(&serdes_base->lane[i].gcr0,
+LNAGCR0_RT_RSTB);
+   }
+}
+
+static void do_pll_reset(u32 cfg,
+struct ccsr_serdes __iomem *serdes_base)
+{
+   int i;
+
+   for (i = 0; i < 2 && !(cfg & (0x1 << (1 - i))); i++) {
+   clrbits_le32(&serdes_base->bank[i].rstctl,
+RSTCTL_RESET_MASK);
+   udelay(1);
+
+   setbits_le32(&serdes_base->bank[i].rstctl,
+RSTCTL_RSTREQ);
+   

[U-Boot] [PATCH v8 02/11] board: common:vid: Add LS1088A VID Supported voltage values

[Rajesh Bhagat]

Adds below voltage values supported by LS1088A Soc:

1.025 V(default), 0.9875V, 0.9750 V, 0.9V, 1.0 V, 1.0125 V, 1.0250 V

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:  
 - Created a different vdd array for LS1088A

Changes in v7:  
 None   

Changes in v6:  
 None   

Changes in v5:  
 None   

Changes in v4:  
 None 

 board/freescale/common/vid.c | 38 ++
 1 file changed, 38 insertions(+)

diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index d6d1bfc..bf63ce0 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -295,6 +295,43 @@ int adjust_vdd(ulong vdd_override)
int ret, i2caddress;
unsigned long vdd_string_override;
char *vdd_string;
+#ifdef CONFIG_ARCH_LS1088A
+   static const uint16_t vdd[32] = {
+   10250,
+   9875,
+   9750,
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   9000,
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   1,  /* 1.V */
+   10125,
+   10250,
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   0,  /* reserved */
+   };
+
+#else
static const uint16_t vdd[32] = {
10500,
0,  /* reserved */
@@ -329,6 +366,7 @@ int adjust_vdd(ulong vdd_override)
0,  /* reserved */
0,  /* reserved */
};
+#endif
struct vdd_drive {
u8 vid;
unsigned voltage;
-- 
2.7.4

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[U-Boot] [PATCH v8 06/11] board: common: vid: Add support for LTC3882 voltage regulator chip

[Rajesh Bhagat]

Restructures common driver to support LTC3882 voltage regulator
chip.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:  
 - Added blank line before return

Changes in v7:  
 None

Changes in v6:  
 None

Changes in v5:
 None

Changes in v4:
 None

Changes in v3:
 Restructured LS1088A VID support to use common VID driver
 Added the coding for voltage in comments i.e. 1/4096V
 Removed APIs getLSB/MSB and used bit operations.

Changes in v2:
 Checkpatch errors fixed

 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  9 ++-
 board/freescale/common/vid.c   | 77 ++
 include/configs/ls1088aqds.h   | 16 +
 include/configs/ls1088ardb.h   | 15 +
 4 files changed, 115 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 47e8b5a..642df2f 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -201,10 +201,15 @@ struct ccsr_gur {
u32 gpporcr3;
u32 gpporcr4;
u8  res_030[0x60-0x30];
-#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 2
 #define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK  0x1F
-#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT  7
 #define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK   0x1F
+#if defined(CONFIG_ARCH_LS1088A)
+#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 25
+#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT  20
+#else
+#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 2
+#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT  7
+#endif
u32 dcfg_fusesr;/* Fuse status register */
u8  res_064[0x70-0x64];
u32 devdisr;/* Device disable control 1 */
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index f68068e..a9451c5 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -174,6 +174,36 @@ static int read_voltage_from_IR(int i2caddress)
 }
 #endif
 
+#ifdef CONFIG_VOL_MONITOR_LTC3882_READ
+/* read the current value of the LTC Regulator Voltage */
+static int read_voltage_from_LTC(int i2caddress)
+{
+   int  ret, vcode = 0;
+   u8 chan = PWM_CHANNEL0;
+
+   /* select the PAGE 0 using PMBus commands PAGE for VDD*/
+   ret = i2c_write(I2C_VOL_MONITOR_ADDR,
+   PMBUS_CMD_PAGE, 1, &chan, 1);
+   if (ret) {
+   printf("VID: failed to select VDD Page 0\n");
+   return ret;
+   }
+
+   /*read the output voltage using PMBus command READ_VOUT*/
+   ret = i2c_read(I2C_VOL_MONITOR_ADDR,
+  PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
+   if (ret) {
+   printf("VID: failed to read the volatge\n");
+   return ret;
+   }
+
+   /* Scale down to the real mV as LTC resolution is 1/4096V,rounding up */
+   vcode = DIV_ROUND_UP(vcode * 1000, 4096);
+
+   return vcode;
+}
+#endif
+
 static int read_voltage(int i2caddress)
 {
int voltage_read;
@@ -181,6 +211,8 @@ static int read_voltage(int i2caddress)
voltage_read = read_voltage_from_INA220(i2caddress);
 #elif defined CONFIG_VOL_MONITOR_IR36021_READ
voltage_read = read_voltage_from_IR(i2caddress);
+#elif defined CONFIG_VOL_MONITOR_LTC3882_READ
+   voltage_read = read_voltage_from_LTC(i2caddress);
 #else
return -1;
 #endif
@@ -281,6 +313,43 @@ static int set_voltage_to_IR(int i2caddress, int vdd)
debug("VID: Current voltage is %d mV\n", vdd_last);
return vdd_last;
 }
+
+#endif
+
+#ifdef CONFIG_VOL_MONITOR_LTC3882_SET
+/* this function sets the VDD and returns the value set */
+static int set_voltage_to_LTC(int i2caddress, int vdd)
+{
+   int ret, vdd_last, vdd_target = vdd;
+
+   /* Scale up to the LTC resolution is 1/4096V */
+   vdd = (vdd * 4096) / 1000;
+
+   /* 5-byte buffer which needs to be sent following the
+* PMBus command PAGE_PLUS_WRITE.
+*/
+   u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,
+   vdd & 0xFF, (vdd & 0xFF00) >> 8};
+
+   /* Write the desired voltage code to the regulator */
+   ret = i2c_write(I2C_VOL_MONITOR_ADDR,
+   PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);
+   if (ret) {
+   printf("VID: I2C failed to write to the volatge regulator\n");
+   return -1;
+   }
+
+   /* Wait for the volatge to get to the desired value */
+   do {
+   vdd_last = read_voltage_from_LTC(i2caddress);
+   if (vdd_last < 0) {
+   printf("VID: Couldn't read sensor abort VID adjust\n");
+   

[U-Boot] [PATCH v8 03/11] board: common: vid: Add board specific vdd adjust API

[Rajesh Bhagat]

Adds a board specific API namely board_adjust_vdd which
is required to define the board VDD adjust settings.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:  
 None

Changes in v7:  
 None

Changes in v6:  
 None

Changes in v5:
 None

Changes in v4:  
 None


 board/freescale/common/vid.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index bf63ce0..89904c1 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -34,6 +34,14 @@ int __weak board_vdd_drop_compensation(void)
 }
 
 /*
+ * Board specific settings for specific voltage value
+ */
+int __weak board_adjust_vdd(int vdd)
+{
+   return 0;
+}
+
+/*
  * Get the i2c address configuration for the IR regulator chip
  *
  * There are some variance in the RDB HW regarding the I2C address 
configuration
@@ -470,6 +478,11 @@ int adjust_vdd(ulong vdd_override)
vdd_last = set_voltage(i2caddress, vdd_current);
}
 
+   if (board_adjust_vdd(vdd_target) < 0) {
+   ret = -1;
+   goto exit;
+   }
+
if (vdd_last > 0)
printf("VID: Core voltage after adjustment is at %d mV\n",
   vdd_last);
-- 
2.7.4

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[U-Boot] [PATCH v8 07/11] ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs

[Rajesh Bhagat]

Sets DDR configuration parameter cdr1 before all other settings
to support case 0.9v VDD is enabled for some SoCs

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:  
 None

 drivers/ddr/fsl/fsl_ddr_gen4.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index 058c9b9..b3a27ec 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -95,6 +95,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
if (step == 2)
goto step2;
 
+   /* Set cdr1 first in case 0.9v VDD is enabled for some SoCs*/
+   ddr_out32(&ddr->ddr_cdr1, regs->ddr_cdr1);
+
if (regs->ddr_eor)
ddr_out32(&ddr->eor, regs->ddr_eor);
 
@@ -183,7 +186,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
ddr_out32(&ddr->ddr_sdram_rcw_4, regs->ddr_sdram_rcw_4);
ddr_out32(&ddr->ddr_sdram_rcw_5, regs->ddr_sdram_rcw_5);
ddr_out32(&ddr->ddr_sdram_rcw_6, regs->ddr_sdram_rcw_6);
-   ddr_out32(&ddr->ddr_cdr1, regs->ddr_cdr1);
 #ifdef CONFIG_DEEP_SLEEP
if (is_warm_boot()) {
ddr_out32(&ddr->sdram_cfg_2,
-- 
2.7.4

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[U-Boot] [PATCH v8 09/11] common: board_f: vid: Add VID specific API to adjust core voltage

[Rajesh Bhagat]

Adds a VID specific API in init_sequence_f and spl code flow
namely init_func_vid which is required to adjust core voltage.

VID specific code is required in spl, hence moving flag CONFIG_VID
out of spl flags.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:
 None
 
 arch/arm/cpu/armv8/fsl-layerscape/spl.c |  3 +++
 board/freescale/common/Makefile |  2 +-
 common/board_f.c| 10 ++
 include/common.h|  3 +++
 4 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c 
b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 1c694e7..4093d15 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -85,6 +85,9 @@ void board_init_f(ulong dummy)
 #ifdef CONFIG_SPL_I2C_SUPPORT
i2c_init_all();
 #endif
+#ifdef CONFIG_VID
+   init_func_vid();
+#endif
dram_init();
 #ifdef CONFIG_SPL_FSL_LS_PPA
 #ifndef CONFIG_SYS_MEM_RESERVE_SECURE
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index e13cb20..939e9c6 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -23,8 +23,8 @@ obj-$(CONFIG_FMAN_ENET)   += fman.o
 obj-$(CONFIG_FSL_PIXIS)+= pixis.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_FSL_NGPIXIS)  += ngpixis.o
-obj-$(CONFIG_VID)  += vid.o
 endif
+obj-$(CONFIG_VID)  += vid.o
 obj-$(CONFIG_FSL_QIXIS)+= qixis.o
 obj-$(CONFIG_PQ_MDS_PIB)   += pq-mds-pib.o
 ifndef CONFIG_SPL_BUILD
diff --git a/common/board_f.c b/common/board_f.c
index 0bdce64..7f594d9 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -200,6 +200,13 @@ static int init_func_i2c(void)
 }
 #endif
 
+#if defined(CONFIG_VID)
+__weak int init_func_vid(void)
+{
+   return 0;
+}
+#endif
+
 #if defined(CONFIG_HARD_SPI)
 static int init_func_spi(void)
 {
@@ -801,6 +808,9 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_SYS_I2C)
init_func_i2c,
 #endif
+#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
+   init_func_vid,
+#endif
 #if defined(CONFIG_HARD_SPI)
init_func_spi,
 #endif
diff --git a/include/common.h b/include/common.h
index 4362000..fe9a00c 100644
--- a/include/common.h
+++ b/include/common.h
@@ -364,6 +364,9 @@ int embedded_dtb_select(void);
 
 intmisc_init_f   (void);
 intmisc_init_r   (void);
+#if defined(CONFIG_VID)
+intinit_func_vid(void);
+#endif
 
 /* common/exports.c */
 void   jumptable_init(void);
-- 
2.7.4

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[U-Boot] [PATCH v8 04/11] board: common: vid: Move IR chip specific code in flag

[Rajesh Bhagat]

Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:  
 None

Changes in v7:  
 None

Changes in v6:  
 None

Changes in v5:
 None

Changes in v4:  
 None

 board/freescale/common/vid.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index 89904c1..f68068e 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -41,6 +41,8 @@ int __weak board_adjust_vdd(int vdd)
return 0;
 }
 
+#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
+   defined(CONFIG_VOL_MONITOR_IR36021_READ)
 /*
  * Get the i2c address configuration for the IR regulator chip
  *
@@ -73,6 +75,7 @@ static int find_ir_chip_on_i2c(void)
}
return -1;
 }
+#endif
 
 /* Maximum loop count waiting for new voltage to take effect */
 #define MAX_LOOP_WAIT_NEW_VOL  100
@@ -184,6 +187,7 @@ static int read_voltage(int i2caddress)
return voltage_read;
 }
 
+#ifdef CONFIG_VOL_MONITOR_IR36021_SET
 /*
  * We need to calculate how long before the voltage stops to drop
  * or increase. It returns with the loop count. Each loop takes
@@ -243,7 +247,6 @@ static int wait_for_voltage_stable(int i2caddress)
return vdd_current;
 }
 
-#ifdef CONFIG_VOL_MONITOR_IR36021_SET
 /* Set the voltage to the IR chip */
 static int set_voltage_to_IR(int i2caddress, int vdd)
 {
@@ -298,7 +301,12 @@ int adjust_vdd(ulong vdd_override)
int re_enable = disable_interrupts();
struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
u32 fusesr;
+#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
+   defined(CONFIG_VOL_MONITOR_IR36021_READ)
u8 vid, buf;
+#else
+   u8 vid;
+#endif
int vdd_target, vdd_current, vdd_last;
int ret, i2caddress;
unsigned long vdd_string_override;
@@ -386,6 +394,8 @@ int adjust_vdd(ulong vdd_override)
ret = -1;
goto exit;
}
+#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
+   defined(CONFIG_VOL_MONITOR_IR36021_READ)
ret = find_ir_chip_on_i2c();
if (ret < 0) {
printf("VID: Could not find voltage regulator on I2C.\n");
@@ -410,6 +420,7 @@ int adjust_vdd(ulong vdd_override)
ret = -1;
goto exit;
}
+#endif
 
/* get the voltage ID from fuse status register */
fusesr = in_le32(&gur->dcfg_fusesr);
@@ -549,6 +560,8 @@ int adjust_vdd(ulong vdd_override)
ret = -1;
goto exit;
}
+#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
+   defined(CONFIG_VOL_MONITOR_IR36021_READ)
ret = find_ir_chip_on_i2c();
if (ret < 0) {
printf("VID: Could not find voltage regulator on I2C.\n");
@@ -573,6 +586,7 @@ int adjust_vdd(ulong vdd_override)
ret = -1;
goto exit;
}
+#endif
 
/* get the voltage ID from fuse status register */
fusesr = in_be32(&gur->dcfg_fusesr);
@@ -683,6 +697,8 @@ static int print_vdd(void)
debug("VID : I2c failed to switch channel\n");
return -1;
}
+#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
+   defined(CONFIG_VOL_MONITOR_IR36021_READ)
ret = find_ir_chip_on_i2c();
if (ret < 0) {
printf("VID: Could not find voltage regulator on I2C.\n");
@@ -691,6 +707,7 @@ static int print_vdd(void)
i2caddress = ret;
debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
}
+#endif
 
/*
 * Read voltage monitor to check real voltage.
-- 
2.7.4

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[U-Boot] [PATCH v8 05/11] Kconfig: Add LTC3882 voltage regulator config

[Rajesh Bhagat]

Adds below LTC3882 voltage regulator config:
CONFIG_VOL_MONITOR_LTC3882_READ
CONFIG_VOL_MONITOR_LTC3882_SET

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:  
 None

Changes in v7:  
 None

Changes in v6:  
 None

Changes in v5:
 None

Changes in v4:  
 None

 board/freescale/common/Kconfig | 16 
 1 file changed, 16 insertions(+)

diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig
index 8a5c456..3f44797 100644
--- a/board/freescale/common/Kconfig
+++ b/board/freescale/common/Kconfig
@@ -18,3 +18,19 @@ config CMD_ESBC_VALIDATE
 
esbc_validate - validate signature using RSA verification
esbc_halt - put the core in spin loop (Secure Boot Only)
+
+config VOL_MONITOR_LTC3882_READ
+   depends on VID
+   bool "Enable the LTC3882 voltage monitor read"
+   default n
+   help
+This option enables LTC3882 voltage monitor read
+functionality. It is used by common VID driver.
+
+config VOL_MONITOR_LTC3882_SET
+   depends on VID
+   bool "Enable the LTC3882 voltage monitor set"
+   default n
+   help
+This option enables LTC3882 voltage monitor set
+functionality. It is used by common VID driver.
-- 
2.7.4

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[U-Boot] [PATCH v8 10/11] ls1088a: Add VID support for QDS and RDB platforms

[Rajesh Bhagat]

This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting
the voltage via LTC3882 regulator.

This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by
disabling the SERDES, changing the SVDD and then re-enabling SERDES.

Signed-off-by: Raghav Dogra 
Signed-off-by: Ashish Kumar 
Signed-off-by: Amrita Kumari 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:  
 - Added blank line before return

Changes in v7:  
 - Defined CONFIG_VID in SPL scenario too
 - Defined new API init_func_vid for core voltage adjustment for LS1088A

Changes in v6:  
 None

Changes in v5:
 None

Changes in v4:
 None

Changes in v3:
 Restructured LS1088A VID support to use common VID driver
 Removed APIs getLSB/MSB and used bit operations.

Changes in v2:
 Checkpatch errors fixed

 board/freescale/ls1088a/ls1088a.c | 127 +-
 include/configs/ls1088aqds.h  |  11 
 include/configs/ls1088ardb.h  |  12 
 3 files changed, 150 insertions(+)

diff --git a/board/freescale/ls1088a/ls1088a.c 
b/board/freescale/ls1088a/ls1088a.c
index d12bcae..10865fe 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -19,9 +19,13 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "../common/qixis.h"
 #include "ls1088a_qixis.h"
+#include "../common/vid.h"
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -51,6 +55,16 @@ unsigned long long get_qixis_addr(void)
 }
 #endif
 
+#if defined(CONFIG_VID)
+int init_func_vid(void)
+{
+   if (adjust_vdd(0) < 0)
+   printf("core voltage not adjusted\n");
+
+   return 0;
+}
+#endif
+
 #if !defined(CONFIG_SPL_BUILD)
 int checkboard(void)
 {
@@ -323,6 +337,119 @@ int misc_init_r(void)
 }
 #endif
 
+int i2c_multiplexer_select_vid_channel(u8 channel)
+{
+   return select_i2c_ch_pca9547(channel);
+}
+
+#ifdef CONFIG_TARGET_LS1088AQDS
+/* read the current value(SVDD) of the LTM Regulator Voltage */
+int get_serdes_volt(void)
+{
+   int  ret, vcode = 0;
+   u8 chan = PWM_CHANNEL0;
+
+   /* Select the PAGE 0 using PMBus commands PAGE for VDD */
+   ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
+   PMBUS_CMD_PAGE, 1, &chan, 1);
+   if (ret) {
+   printf("VID: failed to select VDD Page 0\n");
+   return ret;
+   }
+
+   /* Read the output voltage using PMBus command READ_VOUT */
+   ret = i2c_read(I2C_SVDD_MONITOR_ADDR,
+  PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
+   if (ret) {
+   printf("VID: failed to read the volatge\n");
+   return ret;
+   }
+
+   return vcode;
+}
+
+int set_serdes_volt(int svdd)
+{
+   int ret, vdd_last;
+   u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,
+   svdd & 0xFF, (svdd & 0xFF00) >> 8};
+
+   /* Write the desired voltage code to the SVDD regulator */
+   ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
+   PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);
+   if (ret) {
+   printf("VID: I2C failed to write to the volatge regulator\n");
+   return -1;
+   }
+
+   /* Wait for the volatge to get to the desired value */
+   do {
+   vdd_last = get_serdes_volt();
+   if (vdd_last < 0) {
+   printf("VID: Couldn't read sensor abort VID adjust\n");
+   return -1;
+   }
+   } while (vdd_last != svdd);
+
+   return 1;
+}
+#else
+int get_serdes_volt(void)
+{
+   return 0;
+}
+
+int set_serdes_volt(int svdd)
+{
+   int ret;
+   u8 brdcfg4;
+
+   printf("SVDD changing of RDB\n");
+
+   /* Read the BRDCFG54 via CLPD */
+   ret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR,
+  QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
+   if (ret) {
+   printf("VID: I2C failed to read the CPLD BRDCFG4\n");
+   return -1;
+   }
+
+   brdcfg4 = brdcfg4 | 0x08;
+
+   /* Write to the BRDCFG4 */
+   ret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR,
+   QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
+   if (ret) {
+   debug("VID: I2C failed to set the SVDD CPLD BRDCFG4\n");
+   return -1;
+   }
+
+   /* Wait for the volatge to get to the desired value */
+   udelay(1);
+
+   return 1;
+}
+#endif
+
+/* this function disables the SERDES, changes the SVDD Voltage and enables it*/
+int board_adjust_vdd(int vdd)
+{
+   int ret = 0;
+
+   debug("%s: vdd = %d\n", __func__, vdd);
+
+   /* Special settings to be p

Re: [U-Boot] [PATCH v2 1/7] mmc: sdhci: Add support for disabling clock

[Jaehoon Chung]

Hi,

On 01/04/2018 06:40 PM, Siva Durga Prasad Paladugu wrote:
> This patch adds support to disable clock if clk_disable
> was set and then enable or set clock if the clock was changed
> or clock was disabled when clock needs to be enabled.
> 
> Signed-off-by: Siva Durga Prasad Paladugu 
> ---
>  drivers/mmc/sdhci.c | 7 ++-
>  include/sdhci.h | 1 +
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index e2ddf5d..2bd721f 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -437,8 +437,13 @@ static int sdhci_set_ios(struct mmc *mmc)
>   if (host->ops && host->ops->set_control_reg)
>   host->ops->set_control_reg(host);
>  
> - if (mmc->clock != host->clock)
> + if ((mmc->clock != host->clock || host->clk_disabled) &&
> + !mmc->clk_disable)
>   sdhci_set_clock(mmc, mmc->clock);
> + if (mmc->clk_disable) {
> + sdhci_set_clock(mmc, 0);
> + host->clk_disabled = true;
> + }

host->clk_disabled is really needs? Where is clk_disabled set to false?

Best Regards,
Jaehoon Chung

>  
>   /* Set bus width */
>   ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
> diff --git a/include/sdhci.h b/include/sdhci.h
> index 7e84012..4fc4140 100644
> --- a/include/sdhci.h
> +++ b/include/sdhci.h
> @@ -259,6 +259,7 @@ struct sdhci_host {
>   uintvoltages;
>  
>   struct mmc_config cfg;
> + bool clk_disabled;
>  };
>  
>  #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
> 

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[U-Boot] [PATCH v8 11/11] armv8: ls1088a: vid: Compiling VID specific functions for SPL

[Rajesh Bhagat]

Enables and compiles VID specific functions for SPL

Signed-off-by: Pankit Garg 
Signed-off-by: Rajesh Bhagat 
---
 board/freescale/ls1088a/ls1088a.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/board/freescale/ls1088a/ls1088a.c 
b/board/freescale/ls1088a/ls1088a.c
index 10865fe..bf64ff8 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -221,6 +221,7 @@ unsigned long get_board_ddr_clk(void)
 
return ;
 }
+#endif
 
 int select_i2c_ch_pca9547(u8 ch)
 {
@@ -235,6 +236,7 @@ int select_i2c_ch_pca9547(u8 ch)
return 0;
 }
 
+#if !defined(CONFIG_SPL_BUILD)
 void board_retimer_init(void)
 {
u8 reg;
@@ -336,6 +338,7 @@ int misc_init_r(void)
return 0;
 }
 #endif
+#endif
 
 int i2c_multiplexer_select_vid_channel(u8 channel)
 {
@@ -450,6 +453,7 @@ exit:
return ret;
 }
 
+#if !defined(CONFIG_SPL_BUILD)
 int board_init(void)
 {
init_final_memctl_regs();
-- 
2.7.4

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[U-Boot] [PATCH v8 08/11] ls1088a: ddr: configure DDR for 0.9v for VID support

[Rajesh Bhagat]

When VID feature is supported, check the contents of fuse register
and configure DDR operate at 0.9v.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v8:
 - Changed fsl_ddr_setup_0v9_volt function to static
 - Moved printf to debug for DDR voltage adjustment
 None

 board/freescale/ls1088a/ddr.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c
index e24bfd5..2240454 100644
--- a/board/freescale/ls1088a/ddr.c
+++ b/board/freescale/ls1088a/ddr.c
@@ -13,6 +13,23 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if defined(CONFIG_VID) && (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
+static void fsl_ddr_setup_0v9_volt(memctl_options_t *popts)
+{
+   int vdd;
+
+   vdd = get_core_volt_from_fuse();
+   /* Nothing to do for silicons doesn't support VID */
+   if (vdd < 0)
+   return;
+
+   if (vdd == 900) {
+   popts->ddr_cdr1 |= DDR_CDR1_V0PT9_EN;
+   debug("VID: configure DDR to support 900 mV\n");
+   }
+}
+#endif
+
 void fsl_ddr_board_options(memctl_options_t *popts,
   dimm_params_t *pdimm,
   unsigned int ctrl_num)
@@ -87,6 +104,10 @@ found:
popts->addr_hash = 1;
 
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_60ohm);
+#if defined(CONFIG_VID) && (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
+   fsl_ddr_setup_0v9_volt(popts);
+#endif
+
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_60ohm) |
  DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
 }
-- 
2.7.4

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Re: [U-Boot] [PATCH v2 1/7] serial: Use next serial device if probing fails

[Heinrich Schuchardt]

On 01/17/2018 09:54 AM, Alexander Graf wrote:
> Currently our serial device search chokes on the fact that the serial
> probe function could fail. If it does, instead of searching for the next
> usable serial device, it just quits.
> 
> This patch changes the fallback logic so that even when a serial device
> was not probed correctly, we just try the next ones until we find one that
> works.
> 
> Signed-off-by: Alexander Graf 
> 
> ---
> 
> v1 -> v2:
> 
>   - Make search logic easier to follow

Reviewed-by: Heinrich Schuchardt 
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Re: [U-Boot] [PATCH v2 6/7] mmc: zynq_sdhci: Add support for SD3.0

[Jaehoon Chung]

Hi,

On 01/04/2018 06:40 PM, Siva Durga Prasad Paladugu wrote:
> This patch adds support of SD3.0 for ZynqMP.
> 
> Signed-off-by: Siva Durga Prasad Paladugu 
> ---
> Changes for v2:
> - Added zynqmp_tap_delay.h which was missed
>   in v1.
> ---
>  board/xilinx/zynqmp/Makefile |   2 +
>  board/xilinx/zynqmp/tap_delays.c | 230 
> +++
>  drivers/mmc/zynq_sdhci.c | 230 
> ++-
>  include/zynqmp_tap_delay.h   |  20 
>  4 files changed, 476 insertions(+), 6 deletions(-)
>  create mode 100644 board/xilinx/zynqmp/tap_delays.c
>  create mode 100644 include/zynqmp_tap_delay.h
> 
> diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
> index 75aab92..f2e4d26 100644
> --- a/board/xilinx/zynqmp/Makefile
> +++ b/board/xilinx/zynqmp/Makefile
> @@ -26,6 +26,8 @@ ifneq ($(call ifdef_any_of, CONFIG_ZYNQMP_PSU_INIT_ENABLED 
> CONFIG_SPL_BUILD),)
>  obj-y += $(init-objs)
>  endif
>  
> +obj-$(CONFIG_MMC_SDHCI_ZYNQ) += tap_delays.o
> +
>  # Suppress "warning: function declaration isn't a prototype"
>  CFLAGS_REMOVE_psu_init_gpl.o := -Wstrict-prototypes
>  
> diff --git a/board/xilinx/zynqmp/tap_delays.c 
> b/board/xilinx/zynqmp/tap_delays.c
> new file mode 100644
> index 000..9c93291
> --- /dev/null
> +++ b/board/xilinx/zynqmp/tap_delays.c
> @@ -0,0 +1,230 @@
> +/*
> + * Xilinx ZynqMP SoC Tap Delay Programming
> + *
> + * Copyright (C) 2016 Xilinx, Inc.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +
> +#define SD_DLL_CTRL  0xFF180358
> +#define SD_ITAP_DLY  0xFF180314
> +#define SD_OTAP_DLY  0xFF180318
> +#define SD0_DLL_RST_MASK 0x0004
> +#define SD0_DLL_RST  0x0004
> +#define SD1_DLL_RST_MASK 0x0004
> +#define SD1_DLL_RST  0x0004
> +#define SD0_ITAPCHGWIN_MASK  0x0200
> +#define SD0_ITAPCHGWIN   0x0200
> +#define SD1_ITAPCHGWIN_MASK  0x0200
> +#define SD1_ITAPCHGWIN   0x0200
> +#define SD0_ITAPDLYENA_MASK  0x0100
> +#define SD0_ITAPDLYENA   0x0100
> +#define SD1_ITAPDLYENA_MASK  0x0100
> +#define SD1_ITAPDLYENA   0x0100
> +#define SD0_ITAPDLYSEL_MASK  0x00FF
> +#define SD0_ITAPDLYSEL_HSD   0x0015
> +#define SD0_ITAPDLYSEL_SD_DDR50  0x003D
> +#define SD0_ITAPDLYSEL_MMC_DDR50 0x0012
> +
> +#define SD1_ITAPDLYSEL_MASK  0x00FF
> +#define SD1_ITAPDLYSEL_HSD   0x0015
> +#define SD1_ITAPDLYSEL_SD_DDR50  0x003D
> +#define SD1_ITAPDLYSEL_MMC_DDR50 0x0012
> +
> +#define SD0_OTAPDLYSEL_MASK  0x003F
> +#define SD0_OTAPDLYSEL_MMC_HSD   0x0006
> +#define SD0_OTAPDLYSEL_SD_HSD0x0005
> +#define SD0_OTAPDLYSEL_SDR50 0x0003
> +#define SD0_OTAPDLYSEL_SDR104_B0 0x0003
> +#define SD0_OTAPDLYSEL_SDR104_B2 0x0002
> +#define SD0_OTAPDLYSEL_SD_DDR50  0x0004
> +#define SD0_OTAPDLYSEL_MMC_DDR50 0x0006
> +
> +#define SD1_OTAPDLYSEL_MASK  0x003F
> +#define SD1_OTAPDLYSEL_MMC_HSD   0x0006
> +#define SD1_OTAPDLYSEL_SD_HSD0x0005
> +#define SD1_OTAPDLYSEL_SDR50 0x0003
> +#define SD1_OTAPDLYSEL_SDR104_B0 0x0003
> +#define SD1_OTAPDLYSEL_SDR104_B2 0x0002
> +#define SD1_OTAPDLYSEL_SD_DDR50  0x0004
> +#define SD1_OTAPDLYSEL_MMC_DDR50 0x0006
> +
> +#define MMC_BANK20x2
> +
> +#define MMC_TIMING_UHS_SDR25 1
> +#define MMC_TIMING_UHS_SDR50 2
> +#define MMC_TIMING_UHS_SDR1043
> +#define MMC_TIMING_UHS_DDR50 4
> +#define MMC_TIMING_MMC_HS200 5
> +#define MMC_TIMING_SD_HS 6
> +#define MMC_TIMING_MMC_DDR52 7
> +#define MMC_TIMING_MMC_HS8
> +
> +void zynqmp_dll_reset(u8 deviceid)
> +{
> + /* Issue DLL Reset */
> + if (deviceid == 0)
> + zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK,
> +   SD0_DLL_RST);
> + else
> + zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK,
> +   SD1_DLL_RST);
> +
> + mdelay(1);
> +
> + /* Release DLL Reset */
> + if (deviceid == 0)
> + zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0);
> + else
> + zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0);
> +}
> +
> +static void arasan_zynqmp_tap_sdr104(u8 deviceid, u8 timing, u8 bank)
> +{
> + if (deviceid == 0) {
> + /* Program OTAP */
> + if (bank == MMC_BANK2)
> + zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK,
> +   SD0_OTAPDLYSEL_SDR104_B2);
> + else
> +  

Re: [U-Boot] [PATCH] mmc: fix the wrong dislabing clock

[Jaehoon Chung]

Hi, 

On 01/17/2018 07:36 PM, Jaehoon Chung wrote:
> When power is off, clock is not disabling.
> Because it's passed to 1, mmc->clock should be set to f_min value.
> Some drivers can't initialize the eMMC/SD card with current status.
> 
> This patch is to fix the disabling clock value to 0.

Subject is typo..Will resend. but i want to get the opinion about this patch.

Best Regards,
Jaehoon Chung

> 
> Fixes: 2e7410d76ad1 ("mmc: disable the mmc clock during power off")
> 
> Signed-off-by: Jaehoon Chung 
> ---
>  drivers/mmc/mmc.c | 12 +++-
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index 53c819187e..311f51f237 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -1501,11 +1501,13 @@ static int mmc_set_ios(struct mmc *mmc)
>  
>  int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
>  {
> - if (clock > mmc->cfg->f_max)
> - clock = mmc->cfg->f_max;
> + if (!disable && clock != 0) {
> + if (clock > mmc->cfg->f_max)
> + clock = mmc->cfg->f_max;
>  
> - if (clock < mmc->cfg->f_min)
> - clock = mmc->cfg->f_min;
> + if (clock < mmc->cfg->f_min)
> + clock = mmc->cfg->f_min;
> + }
>  
>   mmc->clock = clock;
>   mmc->clk_disable = disable;
> @@ -2449,7 +2451,7 @@ static int mmc_power_on(struct mmc *mmc)
>  
>  static int mmc_power_off(struct mmc *mmc)
>  {
> - mmc_set_clock(mmc, 1, true);
> + mmc_set_clock(mmc, 0, true);
>  #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
>   if (mmc->vmmc_supply) {
>   int ret = regulator_set_enable(mmc->vmmc_supply, false);
> 

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Re: [U-Boot] [PATCH 0/3] Rpi: Add support for second sd host controller

[Jaehoon Chung]

On 01/16/2018 10:46 PM, Alexander Graf wrote:
> The Raspberry Pi (bcm283x SoC) family contains 2 IP blocks to drive SD
> peripherals: A pretty standard SDHCI one called iProc and a home grown
> one called "sdhost".
> 
> When driving U-Boot by the same device tree that we use for Linux, we
> end up in situations where only the "sdhost" device is available for use.
> In those situations, current U-Boot can simply not drive the SD card,
> because the device tree disables the SDHCI device.
> 
> This patch set also adds support for pinmuxing the SD devices properly
> to their respective pins. This is necessary because the RPi firmware
> doesn't mux the SD pins according to the device tree but instead expects
> the payload (usually Linux, U-Boot for us) to do that.
> 
> With this patch set, I can successfully use U-Boot on a RPi3 Compute
> Module with CONFIG_OF_BOARD=y and a device tree generated by the RPi
> firmware (plus a few overlays in config.txt for vc4, serial, etc).

Before reviewing, Cold you fix the checkpatch error and warning?
There are too many error and warning..

Best Regards,
Jaehoon Chung

> 
> Alexander Graf (3):
>   bcm2835_gpio: Add support for pinmux
>   mmc: Add bcm2835 sdhost controller
>   mmc: bcm2835_sdhci: Add pinmux support
> 
>  arch/arm/mach-bcm283x/include/mach/gpio.h |1 +
>  drivers/gpio/bcm2835_gpio.c   |   40 ++
>  drivers/mmc/Kconfig   |   14 +
>  drivers/mmc/Makefile  |1 +
>  drivers/mmc/bcm2835_sdhci.c   |   11 +
>  drivers/mmc/bcm2835_sdhost.c  | 1000 
> +
>  6 files changed, 1067 insertions(+)
>  create mode 100644 drivers/mmc/bcm2835_sdhost.c
> 

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Re: [U-Boot] [PATCH v2 1/7] mmc: sdhci: Add support for disabling clock

[Siva Durga Prasad Paladugu]

Hi,

> -Original Message-
> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> Sent: Wednesday, January 17, 2018 4:16 PM
> To: Siva Durga Prasad Paladugu ; u-
> b...@lists.denx.de
> Cc: Siva Durga Prasad Paladugu 
> Subject: Re: [PATCH v2 1/7] mmc: sdhci: Add support for disabling clock
> 
> Hi,
> 
> On 01/04/2018 06:40 PM, Siva Durga Prasad Paladugu wrote:
> > This patch adds support to disable clock if clk_disable was set and
> > then enable or set clock if the clock was changed or clock was
> > disabled when clock needs to be enabled.
> >
> > Signed-off-by: Siva Durga Prasad Paladugu 
> > ---
> >  drivers/mmc/sdhci.c | 7 ++-
> >  include/sdhci.h | 1 +
> >  2 files changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index
> > e2ddf5d..2bd721f 100644
> > --- a/drivers/mmc/sdhci.c
> > +++ b/drivers/mmc/sdhci.c
> > @@ -437,8 +437,13 @@ static int sdhci_set_ios(struct mmc *mmc)
> > if (host->ops && host->ops->set_control_reg)
> > host->ops->set_control_reg(host);
> >
> > -   if (mmc->clock != host->clock)
> > +   if ((mmc->clock != host->clock || host->clk_disabled) &&
> > +   !mmc->clk_disable)
> > sdhci_set_clock(mmc, mmc->clock);
> > +   if (mmc->clk_disable) {
> > +   sdhci_set_clock(mmc, 0);
> > +   host->clk_disabled = true; 
> > +   }
> 
> host->clk_disabled is really needs? Where is clk_disabled set to false?

Oh yes, may not be needed, will check and remove.

Thanks,
Siva

> 
> Best Regards,
> Jaehoon Chung
> 
> >
> > /* Set bus width */
> > ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); diff --git
> > a/include/sdhci.h b/include/sdhci.h index 7e84012..4fc4140 100644
> > --- a/include/sdhci.h
> > +++ b/include/sdhci.h
> > @@ -259,6 +259,7 @@ struct sdhci_host {
> > uintvoltages;
> >
> > struct mmc_config cfg;
> > +   bool clk_disabled;
> >  };
> >
> >  #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
> >

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Re: [U-Boot] [PATCH] ubi: Fix filesystem corruption on detach when fastmap enabled

[Richard Weinberger]

Heiko, Martin,

Am Dienstag, 16. Januar 2018, 10:11:41 CET schrieb Martin Townsend:
> Ah. Must be the mail client. Sorry about that I'll setup git send-mail
> for v2.  I'll wait to see what Richard has to say in case there is a
> better fix.

Thanks for letting me know!
Indeed, there is a problem. I'm a little astonished that nobody noticed so 
far.
Most likely because while detaching UBI in Linux mostly no Fastmap work is 
scheduled,
and therefore in most cases flush_work(&ubi->fm_work) does nothing.

As you noticed in U-Boot the story is different, you always update the Fastmap 
upon detach.

Martin, can you please explain what corruption you see?
From reading the code I'd assume that you miss volumes but a full scan would 
recover everything.

For Linux I suggest this fix:

From 48287459cf8717cffac5aed423937cd7ba4360ab Mon Sep 17 00:00:00 2001
From: Richard Weinberger 
Date: Tue, 16 Jan 2018 14:12:46 +0100
Subject: [PATCH] ubi: fastmap: Don't flush fastmap work on detach

At this point UBI volumes have already been free()'ed and fastmap can no
longer access these data structures.

Fixes: 74cdaf24004a ("UBI: Fastmap: Fix memory leaks while closing the WL sub-
system")
Signed-off-by: Richard Weinberger 
Cc: sta...@vger.kernel.org
---
 drivers/mtd/ubi/fastmap-wl.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/mtd/ubi/fastmap-wl.c b/drivers/mtd/ubi/fastmap-wl.c
index 4f0bd6b4422a..69dd21679a30 100644
--- a/drivers/mtd/ubi/fastmap-wl.c
+++ b/drivers/mtd/ubi/fastmap-wl.c
@@ -362,7 +362,6 @@ static void ubi_fastmap_close(struct ubi_device *ubi)
 {
int i;
 
-   flush_work(&ubi->fm_work);
return_unused_pool_pebs(ubi, &ubi->fm_pool);
return_unused_pool_pebs(ubi, &ubi->fm_wl_pool);
 
-- 
2.13.6

In U-Boot you can do the same.

Thanks,
//richard

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[U-Boot] [PATCH] crypto/fsl: Fix HW accelerated hash commands

[Breno Lima]

The hash command function were not flushing the dcache before passing data
to CAAM/DMA and not invalidating the dcache when getting data back.

Due the data cache incoherency, HW accelerated hash commands used to fail
with CAAM errors like "Invalid KEY Command".

Check if pbuf and pout buffers are properly aligned to the cache line size
and flush/invalidate the memory regions to address this issue.

This solution is based in a previous work from Clemens Gruber in
commit 598e9dccc75d ("crypto/fsl: fix BLOB encapsulation and
decapsulation")

Reported-by: Anatolij Gustschin 
Signed-off-by: Breno Lima 
---
 common/hash.c |  7 ++-
 drivers/crypto/fsl/fsl_hash.c | 20 +++-
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/common/hash.c b/common/hash.c
index cf4d70f..69d53ed 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -390,7 +390,7 @@ int hash_command(const char *algo_name, int flags, 
cmd_tbl_t *cmdtp, int flag,
 
if (multi_hash()) {
struct hash_algo *algo;
-   uint8_t output[HASH_MAX_DIGEST_SIZE];
+   u8 *output;
uint8_t vsum[HASH_MAX_DIGEST_SIZE];
void *buf;
 
@@ -405,6 +405,9 @@ int hash_command(const char *algo_name, int flags, 
cmd_tbl_t *cmdtp, int flag,
return 1;
}
 
+   output = memalign(ARCH_DMA_MINALIGN,
+ sizeof(uint32_t) * HASH_MAX_DIGEST_SIZE);
+
buf = map_sysmem(addr, len);
algo->hash_func_ws(buf, len, output, algo->chunk_size);
unmap_sysmem(buf);
@@ -440,6 +443,8 @@ int hash_command(const char *algo_name, int flags, 
cmd_tbl_t *cmdtp, int flag,
store_result(algo, output, *argv,
flags & HASH_FLAG_ENV);
}
+   unmap_sysmem(output);
+
}
 
/* Horrible code size hack for boards that just want crc32 */
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index a63eba3..9373a39 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -7,6 +7,7 @@
 
 #include 
 #include 
+#include 
 #include "jobdesc.h"
 #include "desc.h"
 #include "jr.h"
@@ -163,20 +164,37 @@ int caam_hash(const unsigned char *pbuf, unsigned int 
buf_len,
 {
int ret = 0;
uint32_t *desc;
+   unsigned int size;
 
-   desc = malloc(sizeof(int) * MAX_CAAM_DESCSIZE);
+   desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE);
if (!desc) {
debug("Not enough memory for descriptor allocation\n");
return -ENOMEM;
}
 
+   if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) ||
+   !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) {
+   puts("Error: Address arguments are not aligned\n");
+   return -EINVAL;
+   }
+
+   size = ALIGN(buf_len, ARCH_DMA_MINALIGN);
+   flush_dcache_range((unsigned long)pbuf, (unsigned long)pbuf + size);
+
inline_cnstr_jobdesc_hash(desc, pbuf, buf_len, pout,
  driver_hash[algo].alg_type,
  driver_hash[algo].digestsize,
  0);
 
+   size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN);
+   flush_dcache_range((unsigned long)desc, (unsigned long)desc + size);
+
ret = run_descriptor_jr(desc);
 
+   size = ALIGN(driver_hash[algo].digestsize, ARCH_DMA_MINALIGN);
+   invalidate_dcache_range((unsigned long)pout,
+   (unsigned long)pout + size);
+
free(desc);
return ret;
 }
-- 
2.7.4

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Re: [U-Boot] [PATCH V4 30/32] power: pmic/regulator allow dm be omitted by SPL

[Jaehoon Chung]

On 01/10/2018 12:06 PM, Peng Fan wrote:
> Allow the dm driver be omitted by SPL.
> 
> Signed-off-by: Peng Fan 
> Reviewed-by: Simon Glass 
> Cc: Jaehoon Chung 
> Cc: Stefano Babic 

Reviewed-by: Jaehoon Chung 

> ---
>  drivers/power/pmic/Makefile  | 2 +-
>  drivers/power/regulator/Makefile | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
> index 7d6c583d34..fc19fdc701 100644
> --- a/drivers/power/pmic/Makefile
> +++ b/drivers/power/pmic/Makefile
> @@ -8,7 +8,7 @@
>  obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
>  obj-$(CONFIG_DM_PMIC_MAX77686) += max77686.o
>  obj-$(CONFIG_DM_PMIC_MAX8998) += max8998.o
> -obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
> +obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
>  obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
>  obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
>  obj-$(CONFIG_PMIC_ACT8846) += act8846.o
> diff --git a/drivers/power/regulator/Makefile 
> b/drivers/power/regulator/Makefile
> index 7a2e76dc82..353177d5f4 100644
> --- a/drivers/power/regulator/Makefile
> +++ b/drivers/power/regulator/Makefile
> @@ -9,7 +9,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o
>  obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o
>  obj-$(CONFIG_REGULATOR_AS3722)   += as3722_regulator.o
>  obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
> -obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o
> +obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
>  obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o
>  obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
>  obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
> 

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Re: [U-Boot] [PATCH V5 29/31] power: pmic/regulator allow dm be omitted by SPL

[Jaehoon Chung]

On 01/10/2018 02:20 PM, Peng Fan wrote:
> Allow the dm driver be omitted by SPL.
> 
> Signed-off-by: Peng Fan 
> Reviewed-by: Simon Glass 
> Cc: Jaehoon Chung 
> Cc: Stefano Babic 

Sorry, i add the reviewed-by tag at previous version.

Reviewed-by: Jaehoon Chung 

> ---
>  drivers/power/pmic/Makefile  | 2 +-
>  drivers/power/regulator/Makefile | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
> index 7d6c583d34..fc19fdc701 100644
> --- a/drivers/power/pmic/Makefile
> +++ b/drivers/power/pmic/Makefile
> @@ -8,7 +8,7 @@
>  obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
>  obj-$(CONFIG_DM_PMIC_MAX77686) += max77686.o
>  obj-$(CONFIG_DM_PMIC_MAX8998) += max8998.o
> -obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
> +obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
>  obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
>  obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
>  obj-$(CONFIG_PMIC_ACT8846) += act8846.o
> diff --git a/drivers/power/regulator/Makefile 
> b/drivers/power/regulator/Makefile
> index 7a2e76dc82..353177d5f4 100644
> --- a/drivers/power/regulator/Makefile
> +++ b/drivers/power/regulator/Makefile
> @@ -9,7 +9,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o
>  obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o
>  obj-$(CONFIG_REGULATOR_AS3722)   += as3722_regulator.o
>  obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
> -obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o
> +obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
>  obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o
>  obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
>  obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
> 

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Re: [U-Boot] [PATCH] configs: keystone2: env: Fix burn_uboot_spi command

[Tom Rini]

On Wed, Jan 17, 2018 at 01:08:19PM +0530, Faiz Abbas wrote:
> Hi,
> 
> +Vignesh
> 
> On Tuesday 16 January 2018 08:55 PM, Tom Rini wrote:
> > On Tue, Jan 16, 2018 at 01:43:40PM +0530, Faiz Abbas wrote:
> >> Now the u-boot spi image is greater than 0x9, increase the same in
> >> env during spi erase.
> >>
> >> Signed-off-by: Faiz Abbas 
> >> ---
> >>  include/configs/ti_armv7_keystone2.h | 2 +-
> >>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/include/configs/ti_armv7_keystone2.h 
> >> b/include/configs/ti_armv7_keystone2.h
> >> index 562bb65..7fb3aaf 100644
> >> --- a/include/configs/ti_armv7_keystone2.h
> >> +++ b/include/configs/ti_armv7_keystone2.h
> >> @@ -266,7 +266,7 @@
> >>"${bootdir}/${fit_bootfile}\0"  \
> >>"get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0"   \
> >>"get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
> >> -  "burn_uboot_spi=sf probe; sf erase 0 0x9; " \
> >> +  "burn_uboot_spi=sf probe; sf erase 0 0x10; "\
> >>"sf write ${loadaddr} 0 ${filesize}\0"  \
> >>"burn_uboot_nand=nand erase 0 0x10; "   \
> >>"nand write ${loadaddr} 0 ${filesize}\0"\
> > 
> > Can we future proof this?  Where is the next bit of content located in
> > the SPI flash?  We should erase up to that instead I think.  Thanks!
> > 
> 
> Currently it is limited to 1M by the parameter we pass to kernel in
> include/environment/ti/spi.h
> 
> 
> #define KEYSTONE_SPI0_MTD_PARTS "spi0.0:1m(u-boot-spl)ro,-(misc);\0"
> #define KEYSTONE_SPI1_MTD_PARTS "spi1.0:1m(u-boot-spl)ro,-(misc);\0"
> 
> 
> This was added by 3f18ff0 ("ARM: keystone: Pass SPI MTD partition table
> via kernel command line")
> 
> So this is the maximum limit right now.

OK, thanks!

Reviewed-by: Tom Rini 

-- 
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Re: [U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[RB23]

hey, i downloaded the september and november versions and i applied the
patches on both of them, re-compiled the u boot,
and still, it gives me the same error when trying the command "sf probe"
i'm not sure what to do, is it possible that i missed something? like a
define or something in the make menuconfig?
i did some debugging and it seems that the crash happens on this line:
div = DIV_ROUND_UP(ref_clk_hz, sclk-hz * 2) -1;
thanks.

2018-01-08 11:17 GMT+02:00 Goldschmidt Simon <
sgoldschm...@de.pepperl-fuchs.com>:

> On Mon, 08/012018 06:27, Vignesh R wrote:
> > On Monday 08 January 2018 09:10 AM, Jason Rush wrote:
> > [...]
> > >>> 1. The indaddrtrig register was being programmed with an incorrect
> > >>> value for socfpga as the result of assuming it should be programmed
> > >>> with the same address as the ahbbase address.  This issue is
> > >>> resolved by adopting the Linux DT bindings, which has an independent
> > >>> setting for the indaddrtrig register so the register can be set
> correctly on all
> > architectures.  Plus it aligns the DT between u-boot and Linux.
> > >> That should be an easy patch, so this is the patchset 0/5..5/5 that
> > >> you just submitted ?
> > > Yes. I saw you Acked it, thank you.
> > >>> 2. The cadence driver was modified at one point to use the bouncebuf
> > >>> functions to fix an issue on a TI architecture that expected, where
> > >>> if I recall correctly all reads except the last have to be 32-bit
> > >>> reads.  However, since the bouncebuf was designed for DMA transfers,
> > >>> it invalidates the data cache after reading, but since the cadence
> > >>> is using cpu transfers the newly read data is thrown away when the
> > >>> cache is invalidated.  This issue is resolved by reverting the
> commit that
> > introduced using the bounce buffer for read operations, which according
> to
> > Vignesh don't cause any issues to the TI architecture.
> > >> Hm, I wonder why you need bounce buffer at all here. The CQSPI
> > >> literally reads/writes a register space (or some FIFO in register
> > >> space), there is no DMA involved at all. I also wonder why we have to
> > >> manipulate with cache at all here.
> > >
> > > I agree, I don't believe this needs a bounce buffer at all.  This
> > > isn't a DMA, there is no need for cache manipulation.  Vignesh
> > > understands the problem better than I do on the TI platform, but I
> > > believe it was used since it was an easy way to ensure the register
> read/writes
> > were all 32-bits wide up until the last read/write.
> >
> > Yes, that was the intention. Unfortunately, I chose to use common bounce
> buffer
> > implementation which was doing cache manipulations.
> >
> > > I believe the bounce buffer should be removed from the CQSPI driver
> > > and a different solution should be implemented, but Vignesh should
> > > weigh in on that since it effects his architecture.
> > >
> >
> > CQSPI on TI K2G has problems with non 32 bit aligned write operations.
> > But read operations are unaffected. Therefore I have Ack'ed Simon's patch
> > reverting bouncebuf for read. For writes, I have patches to revert common
> > bouncebuf usage and use a local pagesize buffer for overcome alignment
> issue. I
> > am waiting for current patch backlogs to be merged so that its easy for
> testing w/o
> > specifying bunch of dependent patches.
> >
> > Or if Simon agrees, I can add his patch to my series post it to mailing
> list (rebased
> > on top of Jason's series)?
>
> Well, it's not really "my" patch, anyway. It reverts a commit of
> yours, so sure, as long as this does not stand in the way of getting
> qspi running on 2018.03, go ahead and itegrate it in your patchset.
>
> I'd be happy to have this sent now so I can test both patchsets on
> top of 2018.01(-rc).
>
> Thanks,
> Simon
>
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Re: [U-Boot] [PATCH v2 00/15] env: Multiple env support and env transition for sunxi

[Tom Rini]

On Wed, Jan 17, 2018 at 09:58:53AM +0100, Maxime Ripard wrote:
> Hi,
> 
> On Tue, Jan 16, 2018 at 04:56:49PM -0500, Tom Rini wrote:
> > On Tue, Jan 16, 2018 at 10:16:36AM +0100, Maxime Ripard wrote:
> > > Hi,
> > > 
> > > Here is a second attempt at transitioning away from the MMC raw 
> > > environment
> > > to a FAT-based one for Allwinner SoCs. Since the RFC was quite well
> > > received, I actually tested it and fixed a few rough edges.
> > > 
> > > You'll find the first RFC here for reference:
> > > https://lists.denx.de/pipermail/u-boot/2017-October/310111.html
> > > 
> > > And the second that originated in this series:
> > > https://lists.denx.de/pipermail/u-boot/2017-November/311608.html
> > > 
> > > I gave it a travis run, and one test seems to fail in one test:
> > > https://travis-ci.org/mripard/u-boot/jobs/329229382
> > > 
> > > I really cannot really make any sense of why a change in the way the
> > > environment loads could affect the operation of a DHCP client. Is there a
> > > way to reproduce locally?
> > 
> > In this case, roughly, clone https://github.com/swarren/uboot-test-hooks
> > and then:
> > $ export PATH=${PATH}:/path/to/uboot-test-hooks/bin
> > $ export PYTHONPATH=/path/to/uboot-test-hooks/py/travis-ci:${PYTHONPATH}
> > $ export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/$1
> > $ ./test/py/test.py --bd vexpress_ca15_tc2 --build-dir 
> > "$UBOOT_TRAVIS_BUILD_DIR" -k 'net'
> 
> Thanks, I had to tweak it a bit to add --id qemu, and copy the
> conf.vexpress_ca15_tc2_qemu file in a directory with my hostname in
> the uboot-test-hooks repo.

Ah right, yes, oops.  I quickly grabbed bits out of my local wrapper
script around it.

> And this is really getting weird, since the tests passes on my
> machine:
> http://code.bulix.org/rp6z29-258577

Does it repeatedly fail in travis (which, uh, stopped working for me
yesterday, I haven't seen if it's un-wedged today)?  You can restart a
specific sub-job rather than the whole.

-- 
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Re: [U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Simon Goldschmidt]

On 17.01.2018 14:01, RB23 wrote:
hey, i downloaded the september and november versions and i applied 
the patches on both of them, re-compiled the u boot,

and still, it gives me the same error when trying the command "sf probe"
i'm not sure what to do, is it possible that i missed something? like 
a define or something in the make menuconfig?

i did some debugging and it seems that the crash happens on this line:
div = DIV_ROUND_UP(ref_clk_hz, sclk-hz * 2) -1;
thanks.



I don't know exactly which patches you are talking about, but the 
divide-by-zero problem is still present with all patches I applied. To 
fix it, you need to set up your device tree correctly so that the speed 
is initialized.


If I remember correctly, you need need to have a flash chip below the 
qspi in the device tree. Check Jason's changes to the various socfpga 
dts files.


Regards,
Simon

2018-01-08 11:17 GMT+02:00 Goldschmidt Simon 
>:


On Mon, 08/012018 06:27, Vignesh R wrote:
> On Monday 08 January 2018 09:10 AM, Jason Rush wrote:
> [...]
> >>> 1. The indaddrtrig register was being programmed with an
incorrect
> >>> value for socfpga as the result of assuming it should be
programmed
> >>> with the same address as the ahbbase address.  This issue is
> >>> resolved by adopting the Linux DT bindings, which has an
independent
> >>> setting for the indaddrtrig register so the register can be
set correctly on all
> architectures.  Plus it aligns the DT between u-boot and Linux.
> >> That should be an easy patch, so this is the patchset
0/5..5/5 that
> >> you just submitted ?
> > Yes. I saw you Acked it, thank you.
> >>> 2. The cadence driver was modified at one point to use the
bouncebuf
> >>> functions to fix an issue on a TI architecture that
expected, where
> >>> if I recall correctly all reads except the last have to be
32-bit
> >>> reads.  However, since the bouncebuf was designed for DMA
transfers,
> >>> it invalidates the data cache after reading, but since the
cadence
> >>> is using cpu transfers the newly read data is thrown away
when the
> >>> cache is invalidated.  This issue is resolved by reverting
the commit that
> introduced using the bounce buffer for read operations, which
according to
> Vignesh don't cause any issues to the TI architecture.
> >> Hm, I wonder why you need bounce buffer at all here. The
CQSPI
> >> literally reads/writes a register space (or some FIFO in register
> >> space), there is no DMA involved at all. I also wonder why we
have to
> >> manipulate with cache at all here.
> >
> > I agree, I don't believe this needs a bounce buffer at all.  This
> > isn't a DMA, there is no need for cache manipulation.  Vignesh
> > understands the problem better than I do on the TI platform, but I
> > believe it was used since it was an easy way to ensure the
register read/writes
> were all 32-bits wide up until the last read/write.
>
> Yes, that was the intention. Unfortunately, I chose to use
common bounce buffer
> implementation which was doing cache manipulations.
>
> > I believe the bounce buffer should be removed from the CQSPI
driver
> > and a different solution should be implemented, but Vignesh should
> > weigh in on that since it effects his architecture.
> >
>
> CQSPI on TI K2G has problems with non 32 bit aligned write
operations.
> But read operations are unaffected. Therefore I have Ack'ed
Simon's patch
> reverting bouncebuf for read. For writes, I have patches to
revert common
> bouncebuf usage and use a local pagesize buffer for overcome
alignment issue. I
> am waiting for current patch backlogs to be merged so that its
easy for testing w/o
> specifying bunch of dependent patches.
>
> Or if Simon agrees, I can add his patch to my series post it to
mailing list (rebased
> on top of Jason's series)?

Well, it's not really "my" patch, anyway. It reverts a commit of
yours, so sure, as long as this does not stand in the way of getting
qspi running on 2018.03, go ahead and itegrate it in your patchset.

I'd be happy to have this sent now so I can test both patchsets on
top of 2018.01(-rc).

Thanks,
Simon




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Re: [U-Boot] [PATCH v2 00/15] env: Multiple env support and env transition for sunxi

[Maxime Ripard]

On Wed, Jan 17, 2018 at 08:01:34AM -0500, Tom Rini wrote:
> On Wed, Jan 17, 2018 at 09:58:53AM +0100, Maxime Ripard wrote:
> > Hi,
> > 
> > On Tue, Jan 16, 2018 at 04:56:49PM -0500, Tom Rini wrote:
> > > On Tue, Jan 16, 2018 at 10:16:36AM +0100, Maxime Ripard wrote:
> > > > Hi,
> > > > 
> > > > Here is a second attempt at transitioning away from the MMC raw 
> > > > environment
> > > > to a FAT-based one for Allwinner SoCs. Since the RFC was quite well
> > > > received, I actually tested it and fixed a few rough edges.
> > > > 
> > > > You'll find the first RFC here for reference:
> > > > https://lists.denx.de/pipermail/u-boot/2017-October/310111.html
> > > > 
> > > > And the second that originated in this series:
> > > > https://lists.denx.de/pipermail/u-boot/2017-November/311608.html
> > > > 
> > > > I gave it a travis run, and one test seems to fail in one test:
> > > > https://travis-ci.org/mripard/u-boot/jobs/329229382
> > > > 
> > > > I really cannot really make any sense of why a change in the way the
> > > > environment loads could affect the operation of a DHCP client. Is there 
> > > > a
> > > > way to reproduce locally?
> > > 
> > > In this case, roughly, clone https://github.com/swarren/uboot-test-hooks
> > > and then:
> > > $ export PATH=${PATH}:/path/to/uboot-test-hooks/bin
> > > $ export PYTHONPATH=/path/to/uboot-test-hooks/py/travis-ci:${PYTHONPATH}
> > > $ export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/$1
> > > $ ./test/py/test.py --bd vexpress_ca15_tc2 --build-dir 
> > > "$UBOOT_TRAVIS_BUILD_DIR" -k 'net'
> > 
> > Thanks, I had to tweak it a bit to add --id qemu, and copy the
> > conf.vexpress_ca15_tc2_qemu file in a directory with my hostname in
> > the uboot-test-hooks repo.
> 
> Ah right, yes, oops.  I quickly grabbed bits out of my local wrapper
> script around it.

Don't worry, I was on a good enough path :)

> > And this is really getting weird, since the tests passes on my
> > machine:
> > http://code.bulix.org/rp6z29-258577
> 
> Does it repeatedly fail in travis (which, uh, stopped working for me
> yesterday, I haven't seen if it's un-wedged today)?  You can restart a
> specific sub-job rather than the whole.

It was repeatedly failing for that commit, but I reordered a few
commits since (and I tested the new branch on my machine). I triggered
a new build on travis that is currently running, but is taking a long
time to complete. I'll let you know the results.

Thanks!
Maxime

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Re: [U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Marek Vasut]

On 01/17/2018 02:06 PM, Simon Goldschmidt wrote:
> On 17.01.2018 14:01, RB23 wrote:
>> hey, i downloaded the september and november versions and i applied
>> the patches on both of them, re-compiled the u boot,
>> and still, it gives me the same error when trying the command "sf probe"
>> i'm not sure what to do, is it possible that i missed something? like
>> a define or something in the make menuconfig?
>> i did some debugging and it seems that the crash happens on this line:
>> div = DIV_ROUND_UP(ref_clk_hz, sclk-hz * 2) -1;
>> thanks.
>>
> 
> I don't know exactly which patches you are talking about, but the
> divide-by-zero problem is still present with all patches I applied. To
> fix it, you need to set up your device tree correctly so that the speed
> is initialized.
> 
> If I remember correctly, you need need to have a flash chip below the
> qspi in the device tree. Check Jason's changes to the various socfpga
> dts files.
> 

Er, maybe a patch which checks this condition wouldn't hurt ?

-- 
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Re: [U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[RB23]

i checked, and if you mean these patches:
https://patchwork.ozlabs.org/patch/765992/
https://patchwork.ozlabs.org/patch/765996/
https://patchwork.ozlabs.org/patch/765997/
https://patchwork.ozlabs.org/patch/765998/

i already applied them, and they didn't work as well.

i also found these patches which i didn't try yet:
https://lists.denx.de/pipermail/u-boot/2017-May/292230.html

should i try those instead?

2018-01-17 15:09 GMT+02:00 Marek Vasut :

> On 01/17/2018 02:06 PM, Simon Goldschmidt wrote:
> > On 17.01.2018 14:01, RB23 wrote:
> >> hey, i downloaded the september and november versions and i applied
> >> the patches on both of them, re-compiled the u boot,
> >> and still, it gives me the same error when trying the command "sf probe"
> >> i'm not sure what to do, is it possible that i missed something? like
> >> a define or something in the make menuconfig?
> >> i did some debugging and it seems that the crash happens on this line:
> >> div = DIV_ROUND_UP(ref_clk_hz, sclk-hz * 2) -1;
> >> thanks.
> >>
> >
> > I don't know exactly which patches you are talking about, but the
> > divide-by-zero problem is still present with all patches I applied. To
> > fix it, you need to set up your device tree correctly so that the speed
> > is initialized.
> >
> > If I remember correctly, you need need to have a flash chip below the
> > qspi in the device tree. Check Jason's changes to the various socfpga
> > dts files.
> >
>
> Er, maybe a patch which checks this condition wouldn't hurt ?
>
> --
> Best regards,
> Marek Vasut
>
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[U-Boot] [PATCH 0/5] zynq: Fun with board and CPU info display

[Ezequiel Garcia]

This series aims at adding support for CPU information display.
While here, following suggestions from Michal, the FPGA
initialization is cleaned up.

Ezequiel Garcia (5):
  zynq: Define macros for the device names
  zynq: Rework FPGA initialization
  zynq: Support CPU info display
  zynq: board: Remove checkboard
  configs: zynq: Enable DISPLAY_CPUINFO

 arch/arm/mach-zynq/cpu.c| 87 -
 arch/arm/mach-zynq/include/mach/sys_proto.h |  3 +
 board/xilinx/zynq/board.c   | 76 +
 configs/syzygy_hub_defconfig|  1 -
 configs/topic_miami_defconfig   |  1 -
 configs/topic_miamilite_defconfig   |  1 -
 configs/topic_miamiplus_defconfig   |  1 -
 configs/zynq_cc108_defconfig|  1 -
 configs/zynq_cse_qspi_defconfig |  1 -
 configs/zynq_microzed_defconfig |  1 -
 configs/zynq_picozed_defconfig  |  1 -
 configs/zynq_z_turn_defconfig   |  1 -
 configs/zynq_zc702_defconfig|  1 -
 configs/zynq_zc706_defconfig|  1 -
 configs/zynq_zc770_xm010_defconfig  |  1 -
 configs/zynq_zc770_xm011_defconfig  |  1 -
 configs/zynq_zc770_xm012_defconfig  |  1 -
 configs/zynq_zc770_xm013_defconfig  |  1 -
 configs/zynq_zed_defconfig  |  1 -
 configs/zynq_zybo_defconfig |  1 -
 include/zynqpl.h| 32 +++
 21 files changed, 112 insertions(+), 103 deletions(-)

-- 
2.15.1

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[U-Boot] [PATCH 1/5] zynq: Define macros for the device names

[Ezequiel Garcia]

This will allow to reuse the macros when showing
the CPU info.

Signed-off-by: Ezequiel Garcia 
---
 include/zynqpl.h | 32 ++--
 1 file changed, 22 insertions(+), 10 deletions(-)

diff --git a/include/zynqpl.h b/include/zynqpl.h
index 5a34a17daefe..e10a266643bd 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -42,45 +42,57 @@ extern struct xilinx_fpga_op zynq_op;
 #define XILINX_XC7Z045_SIZE106571232/8
 #define XILINX_XC7Z100_SIZE139330784/8
 
+/* Device Names */
+#define XILINX_XC7Z007S_NAME   "7z007s"
+#define XILINX_XC7Z010_NAME"7z010"
+#define XILINX_XC7Z012S_NAME   "7z012s"
+#define XILINX_XC7Z014S_NAME   "7z014s"
+#define XILINX_XC7Z015_NAME"7z015"
+#define XILINX_XC7Z020_NAME"7z020"
+#define XILINX_XC7Z030_NAME"7z030"
+#define XILINX_XC7Z035_NAME"7z035"
+#define XILINX_XC7Z045_NAME"7z045"
+#define XILINX_XC7Z100_NAME"7z100"
+
 /* Descriptor Macros */
 #define XILINX_XC7Z007S_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z007S_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z007s" }
+   XILINX_XC7Z007S_NAME }
 
 #define XILINX_XC7Z010_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z010" }
+   XILINX_XC7Z010_NAME }
 
 #define XILINX_XC7Z012S_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z012S_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z012s" }
+   XILINX_XC7Z012S_NAME }
 
 #define XILINX_XC7Z014S_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z014S_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z014s" }
+   XILINX_XC7Z014S_NAME }
 
 #define XILINX_XC7Z015_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z015" }
+   XILINX_XC7Z015_NAME }
 
 #define XILINX_XC7Z020_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z020" }
+   XILINX_XC7Z020_NAME }
 
 #define XILINX_XC7Z030_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z030" }
+   XILINX_XC7Z030_NAME }
 
 #define XILINX_XC7Z035_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z035_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z035" }
+   XILINX_XC7Z035_NAME }
 
 #define XILINX_XC7Z045_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z045" }
+   XILINX_XC7Z045_NAME }
 
 #define XILINX_XC7Z100_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
-   "7z100" }
+   XILINX_XC7Z100_NAME }
 
 #endif /* _ZYNQPL_H_ */
-- 
2.15.1

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[U-Boot] [PATCH 2/5] zynq: Rework FPGA initialization

[Ezequiel Garcia]

This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.

Also, the implementation is reworked to be cleaner
and a bit smaller.

add/remove: 2/11 grow/shrink: 0/1 up/down: 420/-608 (-188)
function old new   delta
zynq_fpga_descs- 352+352
zynq_fpga_desc -  68 +68
fpga100   28   - -28
fpga045   28   - -28
fpga035   28   - -28
fpga030   28   - -28
fpga020   28   - -28
fpga015   28   - -28
fpga014s  28   - -28
fpga012s  28   - -28
fpga010   28   - -28
fpga007s  28   - -28
fpga  28   - -28
board_init   332  32-300
Total: Before=574182, After=573994, chg -0.03%

Signed-off-by: Ariel D'Alessandro 
Signed-off-by: Ezequiel Garcia 
---
 arch/arm/mach-zynq/cpu.c| 41 +++-
 arch/arm/mach-zynq/include/mach/sys_proto.h |  3 ++
 board/xilinx/zynq/board.c   | 59 +
 3 files changed, 44 insertions(+), 59 deletions(-)

diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index ee1c1a943b66..53a07b0059c2 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -5,14 +5,36 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 #include 
+#include 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #define ZYNQ_SILICON_VER_MASK  0xF000
 #define ZYNQ_SILICON_VER_SHIFT 28
 
+#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
+(defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
+static const struct {
+   u8 idcode;
+   xilinx_desc desc;
+} zynq_fpga_descs[] = {
+   { .idcode = XILINX_ZYNQ_7007S,  .desc = XILINX_XC7Z007S_DESC(0x07) },
+   { .idcode = XILINX_ZYNQ_7010,   .desc = XILINX_XC7Z010_DESC(0x10)  },
+   { .idcode = XILINX_ZYNQ_7012S,  .desc = XILINX_XC7Z012S_DESC(0x12) },
+   { .idcode = XILINX_ZYNQ_7014S,  .desc = XILINX_XC7Z014S_DESC(0x14) },
+   { .idcode = XILINX_ZYNQ_7015,   .desc = XILINX_XC7Z015_DESC(0x15)  },
+   { .idcode = XILINX_ZYNQ_7020,   .desc = XILINX_XC7Z020_DESC(0x20)  },
+   { .idcode = XILINX_ZYNQ_7030,   .desc = XILINX_XC7Z030_DESC(0x30)  },
+   { .idcode = XILINX_ZYNQ_7035,   .desc = XILINX_XC7Z035_DESC(0x35)  },
+   { .idcode = XILINX_ZYNQ_7045,   .desc = XILINX_XC7Z045_DESC(0x45)  },
+   { .idcode = XILINX_ZYNQ_7100,   .desc = XILINX_XC7Z100_DESC(0x100) },
+   { /* Sentinel */ },
+};
+#endif
+
 int arch_cpu_init(void)
 {
zynq_slcr_unlock();
@@ -60,3 +82,20 @@ void enable_caches(void)
dcache_enable();
 }
 #endif
+
+#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
+(defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
+const xilinx_desc *zynq_fpga_desc(void)
+{
+   u32 idcode;
+   u8 i;
+
+   idcode = zynq_slcr_get_idcode();
+   for (i = 0; zynq_fpga_descs[i].idcode; i++) {
+   if (zynq_fpga_descs[i].idcode == idcode) {
+   return &zynq_fpga_descs[i].desc;
+   }
+   }
+   return NULL;
+}
+#endif
diff --git a/arch/arm/mach-zynq/include/mach/sys_proto.h 
b/arch/arm/mach-zynq/include/mach/sys_proto.h
index af61352dd110..fd5744c4e85e 100644
--- a/arch/arm/mach-zynq/include/mach/sys_proto.h
+++ b/arch/arm/mach-zynq/include/mach/sys_proto.h
@@ -7,6 +7,8 @@
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
 
+#include 
+
 extern void zynq_slcr_lock(void);
 extern void zynq_slcr_unlock(void);
 extern void zynq_slcr_cpu_reset(void);
@@ -16,6 +18,7 @@ extern u32 zynq_slcr_get_boot_mode(void);
 extern u32 zynq_slcr_get_idcode(void);
 extern int zynq_slcr_get_mio_pin_status(const char *periph);
 extern void zynq_ddrc_init(void);
+extern const xilinx_desc *zynq_fpga_desc(void);
 extern unsigned int zynq_get_silicon_version(void);
 
 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr);
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index e59038106aa6..f9e7bca4ee40 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -15,69 +15,12 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
-(defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
-static xilinx_desc fpga;
-
-/* It can be done differently */
-static xilinx_desc fpga007s = XILINX_XC7Z007S_DESC(0x7);
-static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
-static xilinx_desc fpga012s = XILIN

[U-Boot] [PATCH 5/5] configs: zynq: Enable DISPLAY_CPUINFO

[Ezequiel Garcia]

Now that silicon version has been moved from checkboard()
to print_cpuinfo(), we need to enable DISPLAY_CPUINFO option.

Signed-off-by: Ezequiel Garcia 
---
 configs/syzygy_hub_defconfig   | 1 -
 configs/topic_miami_defconfig  | 1 -
 configs/topic_miamilite_defconfig  | 1 -
 configs/topic_miamiplus_defconfig  | 1 -
 configs/zynq_cc108_defconfig   | 1 -
 configs/zynq_cse_qspi_defconfig| 1 -
 configs/zynq_microzed_defconfig| 1 -
 configs/zynq_picozed_defconfig | 1 -
 configs/zynq_z_turn_defconfig  | 1 -
 configs/zynq_zc702_defconfig   | 1 -
 configs/zynq_zc706_defconfig   | 1 -
 configs/zynq_zc770_xm010_defconfig | 1 -
 configs/zynq_zc770_xm011_defconfig | 1 -
 configs/zynq_zc770_xm012_defconfig | 1 -
 configs/zynq_zc770_xm013_defconfig | 1 -
 configs/zynq_zed_defconfig | 1 -
 configs/zynq_zybo_defconfig| 1 -
 17 files changed, 17 deletions(-)

diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index 8bdc4be67d70..b4a41b484885 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index aabd705da0fb..866c91276d95 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -8,7 +8,6 @@ 
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
diff --git a/configs/topic_miamilite_defconfig 
b/configs/topic_miamilite_defconfig
index 7228283b3c6b..1cae54c2da5e 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -8,7 +8,6 @@ 
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
diff --git a/configs/topic_miamiplus_defconfig 
b/configs/topic_miamiplus_defconfig
index d511a942838b..13f69eb4b1ca 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -8,7 +8,6 @@ 
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index bdba0d1cc9ba..31d5dda12b06 100644
--- a/configs/zynq_cc108_defconfig
+++ b/configs/zynq_cc108_defconfig
@@ -7,7 +7,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index 9659faefbf33..f5201a72d6be 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
 CONFIG_DEBUG_UART=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_BOOTDELAY=-1
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SYS_PROMPT="Zynq> "
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index fc21eb8f67a3..fbce9631f893 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -6,7 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-microzed"
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index f36e7bd849f4..e58b90b710ca 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x400
 CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig
index c727b2acbf28..d4934c8d1673 100644
--- a/configs/zynq_z_turn_defconfig
+++ b/configs/zynq_z_turn_defconfig
@@ -7,7 +7,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 0d0efc223dd4..df0a1adf793d 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -8,7 +8,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y

[U-Boot] [PATCH 3/5] zynq: Support CPU info display

[Ezequiel Garcia]

This commit adds CPU and silicon version information
consuming the SLCR IDCODE and DEVCFG MCTRL registers,
respectively.

Signed-off-by: Ariel D'Alessandro 
Signed-off-by: Ezequiel Garcia 
---
 arch/arm/mach-zynq/cpu.c | 46 ++
 1 file changed, 46 insertions(+)

diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index 53a07b0059c2..602f483c162b 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -35,6 +35,25 @@ static const struct {
 };
 #endif
 
+#ifdef CONFIG_DISPLAY_CPUINFO
+static const struct {
+   u8 idcode;
+   const char *cpuinfo;
+} zynq_cpu_info[] = {
+   { .idcode = XILINX_ZYNQ_7007S,  .cpuinfo = XILINX_XC7Z007S_NAME },
+   { .idcode = XILINX_ZYNQ_7010,   .cpuinfo = XILINX_XC7Z010_NAME },
+   { .idcode = XILINX_ZYNQ_7012S,  .cpuinfo = XILINX_XC7Z012S_NAME },
+   { .idcode = XILINX_ZYNQ_7014S,  .cpuinfo = XILINX_XC7Z014S_NAME },
+   { .idcode = XILINX_ZYNQ_7015,   .cpuinfo = XILINX_XC7Z015_NAME },
+   { .idcode = XILINX_ZYNQ_7020,   .cpuinfo = XILINX_XC7Z020_NAME },
+   { .idcode = XILINX_ZYNQ_7030,   .cpuinfo = XILINX_XC7Z030_NAME },
+   { .idcode = XILINX_ZYNQ_7035,   .cpuinfo = XILINX_XC7Z035_NAME },
+   { .idcode = XILINX_ZYNQ_7045,   .cpuinfo = XILINX_XC7Z045_NAME },
+   { .idcode = XILINX_ZYNQ_7100,   .cpuinfo = XILINX_XC7Z100_NAME },
+   { /* Sentinel */ },
+};
+#endif
+
 int arch_cpu_init(void)
 {
zynq_slcr_unlock();
@@ -99,3 +118,30 @@ const xilinx_desc *zynq_fpga_desc(void)
return NULL;
 }
 #endif
+
+#ifdef CONFIG_DISPLAY_CPUINFO
+int print_cpuinfo(void)
+{
+   u32 idcode, version;
+   bool found;
+   u8 i;
+
+   idcode = zynq_slcr_get_idcode();
+   found = false;
+   for (i = 0; zynq_cpu_info[i].idcode; i++) {
+   if (zynq_cpu_info[i].idcode == idcode) {
+   found = true;
+   break;
+   }
+   }
+
+   version = zynq_get_silicon_version() << 1;
+   if (version > (PCW_SILICON_VERSION_3 << 1))
+   version += 1;
+   if (found) {
+   printf("CPU:   Zynq %s\n", zynq_cpu_info[i].cpuinfo);
+   printf("Silicon: v%d.%d\n", version >> 1, version & 1);
+   }
+   return 0;
+}
+#endif
-- 
2.15.1

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[U-Boot] [PATCH 4/5] zynq: board: Remove checkboard

[Ezequiel Garcia]

Now that showing silicon version is part of the CPU
info display, let's remove checkboard().

Note that the generic show_board_info() will still
show the DT 'model' property. For instance:

  U-Boot 2018.01-00172-g5e296ab7317a (Jan 17 2018 - 09:57:36 -0300)

  CPU:   Zynq 7z010
  Silicon: v3.1
  Model: Bitmain Antminer S9 Board

Signed-off-by: Ezequiel Garcia 
---
 board/xilinx/zynq/board.c | 17 -
 1 file changed, 17 deletions(-)

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index f9e7bca4ee40..2374da68328f 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -11,7 +11,6 @@
 #include 
 #include 
 #include 
-#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,22 +51,6 @@ int board_late_init(void)
return 0;
 }
 
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
-   u32 version = zynq_get_silicon_version();
-
-   version <<= 1;
-   if (version > (PCW_SILICON_VERSION_3 << 1))
-   version += 1;
-
-   puts("Board: Xilinx Zynq\n");
-   printf("Silicon: v%d.%d\n", version >> 1, version & 1);
-
-   return 0;
-}
-#endif
-
 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 {
 #if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
-- 
2.15.1

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Re: [U-Boot] [PATCH] mmc: fix the wrong dislabing clock

[Jean-Jacques Hiblot]

On 17/01/2018 11:56, Jaehoon Chung wrote:

Hi,

On 01/17/2018 07:36 PM, Jaehoon Chung wrote:

When power is off, clock is not disabling.
Because it's passed to 1, mmc->clock should be set to f_min value.
Some drivers can't initialize the eMMC/SD card with current status.

This patch is to fix the disabling clock value to 0.

Subject is typo..Will resend. but i want to get the opinion about this patch.


It looks good to me.

Reviewed-by: Jean-Jacques Hiblot 




Best Regards,
Jaehoon Chung


Fixes: 2e7410d76ad1 ("mmc: disable the mmc clock during power off")

Signed-off-by: Jaehoon Chung 
---
  drivers/mmc/mmc.c | 12 +++-
  1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 53c819187e..311f51f237 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1501,11 +1501,13 @@ static int mmc_set_ios(struct mmc *mmc)
  
  int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)

  {
-   if (clock > mmc->cfg->f_max)
-   clock = mmc->cfg->f_max;
+   if (!disable && clock != 0) {
+   if (clock > mmc->cfg->f_max)
+   clock = mmc->cfg->f_max;
  
-	if (clock < mmc->cfg->f_min)

-   clock = mmc->cfg->f_min;
+   if (clock < mmc->cfg->f_min)
+   clock = mmc->cfg->f_min;
+   }
  
  	mmc->clock = clock;

mmc->clk_disable = disable;
@@ -2449,7 +2451,7 @@ static int mmc_power_on(struct mmc *mmc)
  
  static int mmc_power_off(struct mmc *mmc)

  {
-   mmc_set_clock(mmc, 1, true);
+   mmc_set_clock(mmc, 0, true);
  #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
if (mmc->vmmc_supply) {
int ret = regulator_set_enable(mmc->vmmc_supply, false);





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Re: [U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and i.MX8MQ EVK

[Diego Dorta]

Hi Peng,

2018-01-16 10:25 GMT-02:00 Peng Fan :
>
>
>> -Original Message-
>> From: Diego Dorta [mailto:diegohdo...@gmail.com]
>> Sent: Tuesday, January 16, 2018 8:15 PM
>> To: Peng Fan 
>> Cc: Peng Fan ; Fabio Estevam
>> ; U-Boot-Denx 
>> Subject: Re: [U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and
>> i.MX8MQ EVK
>>
>> Hi Peng,
>>
>> 2018-01-13 8:55 GMT-02:00 Peng Fan :
>> > Hi Diego,
>> > On Thu, Jan 11, 2018 at 10:36:02AM -0200, Diego Dorta wrote:
>> >>Hi Peng,
>> >>
>> >>2018-01-10 23:16 GMT-02:00 Peng Fan :
>> >>> Hi Diego,
>> >>>
>> >>> On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote:
>> Hi Peng,
>> 
>> 2018-01-10 3:20 GMT-02:00 Peng Fan :
>> > This patchset is to add i.MX8M and i.MX8MQ-EVK support
>> >
>> > V5:
>> >  Drop wait_mask_set/clr_timeout and switch to use
>> > readl_poll_timeout in  the patchset.
>> >
>> > V4:
>> >  Regenerate patchset based on Tom's master tree.
>> >  In this patchset,
>> >
>> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2
>> >
>> Fpatchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan%
>> >
>> 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92
>> >
>> cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=ukU9u%2B99GtYbM
>> Pu
>> > 1F18ZK2FvUpwWJI5ge4Hb607OPMk%3D&reserved=0
>> >  "arm: imx: Rework i.MX specific commands to be excluded from SPL"
>> > from  Tom is included to avoid merge conflicts because the i.mx8m
>> > change  also has some modification to bootaux and arch/arm/mach-
>> imx/Makefile.
>> >  Because CONFIG_GPT_TIMER change, I did a small modification to
>> > apply  Tom's patch, no function change.
>> >
>> >  Include ATF link in README.
>> >
>> > V3:
>> >  This patchset based on
>> >
>> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2
>> >
>> Fpatchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan%
>> >
>> 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92
>> >
>> cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=ukU9u%2B99GtYbM
>> Pu
>> > 1F18ZK2FvUpwWJI5ge4Hb607OPMk%3D&reserved=0
>> >  "arm: imx: Rework i.MX specific commands to be excluded from SPL"
>> > from  Tom to avoid this patchset fail apply after Tom's patch merged.
>> >
>> >  Previously "power: pmic/regulator allow dm be omited by SPL"
>> > broke other  boards, in V3 patchset, only touch pfuze100 related 
>> > options.
>> >
>> >  Sharing code about get mac from fuse between mx7/mx8m  Sharing
>> > code about bootaux between mx6/7/mx8m  Sharing code about cpu
>> > speed grade between mx7/mx8m  Sharing code about get boot device
>> > between mx7/mx8m  Sharding code about mmc env between
>> mx7/mx8m
>> >
>> >  Introduce wait_mask_set/clr_timeout to avoid deadloop in clock
>> > pll configuration
>> >
>> >  Correct authorship of fix building warning on fec arm64, patch 27/31.
>> >
>> >  Switch to use structure for DDR Controller. For DDR PHY
>> > registers,  there are about more than 10 thousands registers, I
>> > could not convert  them with detailed register name, and the
>> > script is generated from IC team,  So I use regs[0x] arrays
>> > here fo easily converting between IC team  released script and uboot
>> ddr phy cod.
>> >
>> >  Improve REAMME file to include where to download firmware and
>> > imx-mkimage  and how to build
>> >
>> >  Add review tags on the V2 patchset.
>> >
>> >  Hope this patchset could catch up next release :)
>> >
>> > V2:
>> >
>> >  patch 02/23: convert to structure, drop is_boot_from_usb and
>> >   disconnect_from_usb
>> >  patch 04/23: conver to use structure for the clock driver, removed the
>> >   CCM_xxx macros. Add static for local functons.
>> >   Add init_usdhc_clk, init_uart_clk and etc to not enable
>> >   them all at default.
>> >  patch 05/23: Add more commit msg for the sip part.
>> >  patch 08/23: Merge the spl boot device with i.MX7  patch 12/23:
>> > Typo fix and return error fix from Heiko for the SoC related part
>> > patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be
>> >   accepted at current stage, to make others still be could 
>> > be
>> >   compiled.
>> >
>> > The patchset depends on
>> >
>> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2
>> >
>> Fpatchwork.ozlabs.org%2Fpatch%2F841934%2F&data=02%7C01%7Cpeng.fan%
>> >
>> 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92
>> >
>> cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=Il%2F%2Bkzq%2B0G
>> S
>> > TtZMKo1tnVYBFx4rLD1ymPgrbx5Pdj3s%3D&reserved=0
>> >
>> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2
>> >
>

Re: [U-Boot] [PATCH v4 0/6] Support for the Turris Omnia router

[Andreas Färber]

Hi Marek and Stefan,

Am 09.06.2017 um 19:28 schrieb Marek Behún:
> This is the fourth version of patches for adding support for the
> Turris Omnia board, a router developed by the CZ.NIC.

I'm still facing trouble testing turris_omnia on latest v2018.01.

First, that made me notice there's no README for how to test and deploy.
I'm aware of temporary:
sendbeacon /dev/ttyUSBx
./tools/kwboot -t -B 115200 /dev/ttyUSBx -b u-boot-spl.kwb -p
# or without -p when s/BOOT_FROM spi/BOOT_FROM uart/
and permanent:
tftpboot 0x100 u-boot-spl.kwb
sf probe
sf update 0x100 0 $filesize

I used to have the original factory CZ.NIC U-Boot in SPI and booted test
versions only via sendbeacon+kwboot.

With mainline that appears to be broken - the CONFIG_ARMADA_38X code in
arch/arm/mach-mvebu/spl.c seems to run into !boot_device and instead of
UART tries to boot from SPI - nothing happens then and kwboot complains.
I can force it to continue booting from UART by commenting out the if.
So Stefan, it looks like your auto-detection is not working here and the
Kconfig option to force it was dropped prematurely.

When forcing UART, as soon as the progress surpasses 99%, it reboots
into SPI SPL without any error message.
Using the old U-Boot fork I've tried flashing u-boot-spl.kwb - similarly
it gets stuck in the SPL trying to boot on from SPI. After a while it
reboots, and so on in a loop.

So it seems that non-SPL U-Boot 2018.01 is broken, on my 2 GB model.

I also ran into a couple DDR3 training failures when booting via UART.
No such training problems observed booting from SPI.

Any hints appreciated.

Regards,
Andreas

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Re: [U-Boot] [PATCH] ubi: Fix filesystem corruption on detach when fastmap enabled

[Richard Weinberger]

Martin,

Am Dienstag, 16. Januar 2018, 15:13:04 CET schrieb Martin Townsend:
> > Martin, can you please explain what corruption you see?
> > From reading the code I'd assume that you miss volumes but a full scan
> > would recover everything.
> 
> I didn't do much analysis of the corruption I'm afraid.  When I tried
> to reattach the the c->empty flag was set to true and indeed all the
> EBA tables were reporting an empty filesystem even after a reboot.

Sounds like what I'd expect.

> Not sure if this was recoverable, how do you trigger a full scan?

Booting a kernel without Fastmap support. B-)

> > For Linux I suggest this fix:
> > 
> > From 48287459cf8717cffac5aed423937cd7ba4360ab Mon Sep 17 00:00:00 2001
> > From: Richard Weinberger 
> > Date: Tue, 16 Jan 2018 14:12:46 +0100
> > Subject: [PATCH] ubi: fastmap: Don't flush fastmap work on detach
> > 
> > At this point UBI volumes have already been free()'ed and fastmap can no
> > longer access these data structures.
> > 
> > Fixes: 74cdaf24004a ("UBI: Fastmap: Fix memory leaks while closing the WL
> > sub- system")
> > Signed-off-by: Richard Weinberger 
> > Cc: sta...@vger.kernel.org
> > ---
> > 
> >  drivers/mtd/ubi/fastmap-wl.c | 1 -
> >  1 file changed, 1 deletion(-)
> > 
> > diff --git a/drivers/mtd/ubi/fastmap-wl.c b/drivers/mtd/ubi/fastmap-wl.c
> > index 4f0bd6b4422a..69dd21679a30 100644
> > --- a/drivers/mtd/ubi/fastmap-wl.c
> > +++ b/drivers/mtd/ubi/fastmap-wl.c
> > @@ -362,7 +362,6 @@ static void ubi_fastmap_close(struct ubi_device *ubi)
> > 
> >  {
> >  
> > int i;
> > 
> > -   flush_work(&ubi->fm_work);
> > 
> > return_unused_pool_pebs(ubi, &ubi->fm_pool);
> > return_unused_pool_pebs(ubi, &ubi->fm_wl_pool);
> > 
> > --
> > 2.13.6
> > 
> > In U-Boot you can do the same.
>
> Richard: This will work but just want to check that ubi_wl_close is
> supposed to never write out to the filesystem or will never do so in
> future, if so maybe a something in the comments above ubi_wl_close to
> ensure this?

Hmm, not sure if I got this question.
The filesystem sits above UBI. If we reach ubi_wl_close() all users ontop of 
UBI are gone. There is no UBIFS mounted anymore.

Thanks,
//richard

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Re: [U-Boot] [U-Boot, v4, 07/11] spl: add support to booting with OP-TEE

[Bryan O'Donoghue]

On 15/01/18 04:48, Peng Fan wrote:

On Mon, Jan 15, 2018 at 11:25:00AM +0800, Kever Yang wrote:

Bryan,


On 01/12/2018 11:10 PM, Bryan O'Donoghue wrote:



On 12/01/18 11:27, Philipp Tomsich wrote:

OP-TEE is an open source trusted OS, in armv7, its loading and
running are like this:
loading:
- SPL load both OP-TEE and U-Boot
running:
- SPL run into OP-TEE in secure mode;
- OP-TEE run into U-Boot in non-secure mode;

More detail:
https://github.com/OP-TEE/optee_os
and search for 'boot arguments' for detail entry parameter in:
core/arch/arm/kernel/generic_entry_a32.S

Signed-off-by: Kever Yang 
---

Changes in v4:
- use NULL instead of '0'
- add fdt_addr as arg2 of entry

Changes in v3: None
Changes in v2:
- Using new image type for op-tee

  common/spl/Kconfig |  7 +++
  common/spl/Makefile|  1 +
  common/spl/spl.c   |  9 +
  common/spl/spl_optee.S | 13 +
  include/spl.h  | 13 +
  5 files changed, 43 insertions(+)
  create mode 100644 common/spl/spl_optee.S



Acked-by: Philipp Tomsich 
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Kever, Philipp

I have patches that define a IH_TYPE_OPTEE as a bootable OPTEE
image (one that never returns to u-boot).


I don't understand how you use OP-TEE in your project.
You are using U-Boot 'bootm' cmd to run into OP-TEE and 'PC' never
get out of the OP-TEE os?
The upstream OP-TEE will always be back to the pointer in 'lr'.

We are using boot flow like ARMv8 for OP-TEE in armv7, could you
introduce your flow?


The flow is ROM->U-Boot->OP-TEE->Linux.


Hi Kever, this got buried in my mailbox...

Which I believe is the preferred flow for armv7

That said - if you look at the TI commits for IH_TYPE_TEE I believe 
*that* is the appropriate type for what you are doing with SPL.


As I read the TI code the TEE is installed into memory - jumped into and 
returned out of, which is the model you are using with SPL here.


Basically that's what 
arch/arm/mach-omap2/sec-common.c::secure_tee_install() does.


So, I think the SPL solution you have can co-exist quite easily with the 
model we have described above for imx7.


My only suggestion here is that you probably don't need to define a new 
image type for SPL - you can reuse IH_TYPE_TEE for SPL as below.


Other than that I think the SPL/bootm or indeed the TI method of 
installing a TEE are entirely able to (and should) live side-by-side.



+#if CONFIG_IS_ENABLED(OPTEE)
+case IH_TYPE_TEE:
+debug("Jumping to U-Boot via OP-TEE\n");
+spl_optee_entry(NULL, NULL, spl_image->fdt_addr,
+(void *)spl_image.entry_point);
+break;
+#endif

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[U-Boot] [BUG] x86: Could not get phandle node for /gpios@0:num-gpios(cell 0)

[Heinrich Schuchardt]

When running the Travis test suite for master I see warnings

arch/sandbox/dts/sandbox.dtb: Warning (gpios_property): Could not get
phandle node for /gpios@0:num-gpios(cell 0)
(https://travis-ci.org/xypron2/u-boot/jobs/329755777)

The warning is created by check_gpios_property() in scripts/dtc/checks.c.

This seems to be cause by the following patch:
999a78d5cf00dfb8cd8342454933ea492e955377
("scripts/dtc: Update to upstream version v1.4.5-3-gb1a60033c110")

I guess that the dts is ok and the test is incorrect. Could you, please,
have look.

Best regards

Heinrich

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[U-Boot] Please pull u-boot-fsl-qoriq master

[York Sun]

Tom,

The following changes since commit 3dde8f20377c3a051dda64497bdf0cdb23e03a2d:

  Merge git://git.denx.de/u-boot-mmc (2018-01-14 22:26:38 -0500)

are available in the git repository at:

  git://git.denx.de/u-boot-fsl-qoriq.git

for you to fetch changes up to 2eb2dbd4577898bf289e911b2286df3f2363af6e:

  armv8: ls1088ardb: Add environment variable address location for
QSPI-NOR (2018-01-17 10:30:54 -0800)


Ashish Kumar (3):
  armv8: ls1088: Add USB and PCI configs in SD-BOOT defconfig
  env: sf: Add support for env init for QSPI-NOR
  armv8: ls1088ardb: Add environment variable address location for
QSPI-NOR

Bhaskar Upadhaya (2):
  armv8/kconfig: Align boards of same family at one place
  board: ls1012a: LS1012A-2G5RDB board support

Priyanka Jain (2):
  board/ls2081ardb: Update board related prints
  board/ls2081ard: Correct code to get QMAP value in checkboard

Sriram Dash (1):
  serial: lpuart: Proper device identification

Sumit Garg (1):
  configs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITE

Tom Rini (3):
  powerpc: P1010RDB: Rework local command to not be included in SPL
  arm: ls1021atwr: Rework local commands to not be included in SPL
  freescale: Ensure common commands are not included in SPL binary

Yuantian Tang (2):
  arm64: ls1046a: Add sata distro boot support
  arm64: ls1012a: Add sata distro boot support

Zhang Ying-22455 (1):
  armv8/ls1088a: configure PMU's PCTBENR to enable WDT

 arch/arm/Kconfig   |  12 +++
 arch/arm/cpu/armv8/Kconfig |   5 +-
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c|   4 +-
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/fsl-ls1012a-2g5rdb.dts|  43 ++
 board/freescale/common/Kconfig |   2 +
 board/freescale/common/cmd_esbc_validate.c |   2 +
 board/freescale/common/qixis.c |  14 ++--
 board/freescale/ls1012ardb/Kconfig |  18 +
 board/freescale/ls1012ardb/MAINTAINERS |   7 ++
 board/freescale/ls1012ardb/README  |  43 ++
 board/freescale/ls1012ardb/ls1012ardb.c|   7 +-
 board/freescale/ls1021atwr/ls1021atwr.c|  91 +++--
 board/freescale/ls2080ardb/ls2080ardb.c|   4 +-
 board/freescale/p1010rdb/p1010rdb.c|   2 +
 configs/ls1012a2g5rdb_qspi_defconfig   |  40 ++
 configs/ls1088aqds_sdcard_qspi_defconfig   |  12 +++
 configs/ls1088ardb_sdcard_qspi_defconfig   |  12 +++
 drivers/serial/serial_lpuart.c |  18 ++---
 env/sf.c   |  21 +
 include/configs/ls1012a2g5rdb.h| 122
+
 include/configs/ls1012a_common.h   |  11 +++
 include/configs/ls1012aqds.h   |  10 ---
 include/configs/ls1012ardb.h   |   9 ---
 include/configs/ls1046a_common.h   |  13 +++
 include/configs/ls1046aqds.h   |  10 ---
 include/configs/ls1046ardb.h   |  12 ---
 include/configs/ls1088a_common.h   |   6 ++
 include/configs/ls1088aqds.h   |   1 -
 include/configs/ls1088ardb.h   |   1 -
 30 files changed, 439 insertions(+), 114 deletions(-)
 create mode 100644 arch/arm/dts/fsl-ls1012a-2g5rdb.dts
 create mode 100644 configs/ls1012a2g5rdb_qspi_defconfig
 create mode 100644 include/configs/ls1012a2g5rdb.h

Thanks.

York
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Re: [U-Boot] Pull request: u-boot-net.git master

[Joe Hershberger]

Hi Tom,

On Mon, Jan 15, 2018 at 8:25 PM, Tom Rini  wrote:
> On Mon, Jan 15, 2018 at 12:06:17PM -0600, Joe Hershberger wrote:
>
>> Hi Tom,
>>
>> The following changes since commit 3dde8f20377c3a051dda64497bdf0cdb23e03a2d:
>>
>>   Merge git://git.denx.de/u-boot-mmc (2018-01-14 22:26:38 -0500)
>>
>> are available in the git repository at:
>>
>>
>>   git://git.denx.de/u-boot-net.git master
>>
>> for you to fetch changes up to 1e2d2597a667e16adfe0a8a9be22e904cee84727:
>>
>>   phy: atheros: set auto-negotiation for AR8021 (2018-01-15 12:05:27 -0600)
>>
>
> Applied to u-boot/master, thanks!
>
> But please note from ceheckpatch.pl (which is actually pretty good):

Sorry, I should have noted this in the PR. These remaining checkpatch
spew are deliberate. I reviewed each of them to be acceptable.

Cheers,
-Joe

>
> WARNING: please write a paragraph that describes the config symbol fully
> #37: FILE: drivers/net/Kconfig:188:
> +config MACB_ZYNQ
>
> total: 0 errors, 1 warnings, 0 checks, 213 lines checked
> ERROR: Unrecognized email address: 'Coverity (CID: 144423)'
> #8:
> Reported-by: Coverity (CID: 144423)
>
> total: 1 errors, 0 warnings, 0 checks, 19 lines checked
> WARNING: please write a paragraph that describes the config symbol fully
> #34: FILE: drivers/net/phy/Kconfig:15:
> +config B53_SWITCH
>
> WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
> #67:
> new file mode 100644
>
> CHECK: Prefer using the BIT macro
> #134: FILE: drivers/net/phy/b53.c:63:
> +#define   PORT_OVERRIDE_SPEED_100M (1 << PORT_OVERRIDE_SPEED_S)
>
> total: 0 errors, 2 warnings, 1 checks, 675 lines checked
> CHECK: Unbalanced braces around else statement
> #38: FILE: net/bootp.c:396:
> +   } else
>
> total: 0 errors, 0 warnings, 1 checks, 24 lines checked
> WARNING: A patch subject line should describe the change not the tool that 
> found it
> #4:
> Subject: [PATCH] net: sh-eth: Fix coding style checked by checkpatch.pl
>
> WARNING: 'alligned' may be misspelled - perhaps 'aligned'?
> #10:
> Change from alligned to aligned.
>
> total: 0 errors, 2 warnings, 0 checks, 92 lines checked
> WARNING: please write a paragraph that describes the config symbol fully
> #277: FILE: drivers/net/Kconfig:279:
> +config SH_ETHER
>
> total: 0 errors, 1 warnings, 0 checks, 273 lines checked
>
> --
> Tom
>
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[U-Boot] [PATCH v2 01/18] efi_loader: return NULL from device path functions

[Heinrich Schuchardt]

For the construction of device paths we need to call the
AllocatePool service. We should not ignore if it fails due to an
out of memory situation.

This patch changes the device path functions to return NULL if
the memory allocation fails.

Additional patches will be needed to fix the callers.

Signed-off-by: Heinrich Schuchardt 
---
v2
No change
---
 include/efi_loader.h |  6 +++---
 lib/efi_loader/efi_device_path.c | 42 ++--
 2 files changed, 39 insertions(+), 9 deletions(-)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 37389c33cc..6b623d8327 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -304,9 +304,9 @@ struct efi_device_path *efi_dp_from_eth(void);
 struct efi_device_path *efi_dp_from_mem(uint32_t mem_type,
uint64_t start_address,
uint64_t end_address);
-void efi_dp_split_file_path(struct efi_device_path *full_path,
-   struct efi_device_path **device_path,
-   struct efi_device_path **file_path);
+efi_status_t efi_dp_split_file_path(struct efi_device_path *full_path,
+   struct efi_device_path **device_path,
+   struct efi_device_path **file_path);
 
 #define EFI_DP_TYPE(_dp, _type, _subtype) \
(((_dp)->type == DEVICE_PATH_TYPE_##_type) && \
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index 2a8efea6e7..c1ba54e6bd 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -58,8 +58,11 @@ static void *dp_alloc(size_t sz)
 {
void *buf;
 
-   if (efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, sz, &buf) != EFI_SUCCESS)
+   if (efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, sz, &buf) !=
+   EFI_SUCCESS) {
+   debug("EFI: ERROR: out of memory in %s\n", __func__);
return NULL;
+   }
 
return buf;
 }
@@ -227,6 +230,8 @@ struct efi_device_path *efi_dp_dup(const struct 
efi_device_path *dp)
return NULL;
 
ndp = dp_alloc(sz);
+   if (!ndp)
+   return NULL;
memcpy(ndp, dp, sz);
 
return ndp;
@@ -246,6 +251,8 @@ struct efi_device_path *efi_dp_append(const struct 
efi_device_path *dp1,
unsigned sz1 = efi_dp_size(dp1);
unsigned sz2 = efi_dp_size(dp2);
void *p = dp_alloc(sz1 + sz2 + sizeof(END));
+   if (!p)
+   return NULL;
memcpy(p, dp1, sz1);
memcpy(p + sz1, dp2, sz2);
memcpy(p + sz1 + sz2, &END, sizeof(END));
@@ -267,6 +274,8 @@ struct efi_device_path *efi_dp_append_node(const struct 
efi_device_path *dp,
} else if (!dp) {
unsigned sz = node->length;
void *p = dp_alloc(sz + sizeof(END));
+   if (!p)
+   return NULL;
memcpy(p, node, sz);
memcpy(p + sz, &END, sizeof(END));
ret = p;
@@ -274,6 +283,8 @@ struct efi_device_path *efi_dp_append_node(const struct 
efi_device_path *dp,
/* both dp and node are non-null */
unsigned sz = efi_dp_size(dp);
void *p = dp_alloc(sz + node->length + sizeof(END));
+   if (!p)
+   return NULL;
memcpy(p, dp, sz);
memcpy(p + sz, node, node->length);
memcpy(p + sz + node->length, &END, sizeof(END));
@@ -435,6 +446,8 @@ struct efi_device_path *efi_dp_from_dev(struct udevice *dev)
void *buf, *start;
 
start = buf = dp_alloc(dp_size(dev) + sizeof(END));
+   if (!buf)
+   return NULL;
buf = dp_fill(buf, dev);
*((struct efi_device_path *)buf) = END;
 
@@ -576,6 +589,8 @@ struct efi_device_path *efi_dp_from_part(struct blk_desc 
*desc, int part)
void *buf, *start;
 
start = buf = dp_alloc(dp_part_size(desc, part) + sizeof(END));
+   if (!buf)
+   return NULL;
 
buf = dp_part_fill(buf, desc, part);
 
@@ -614,6 +629,8 @@ struct efi_device_path *efi_dp_from_file(struct blk_desc 
*desc, int part,
dpsize += fpsize;
 
start = buf = dp_alloc(dpsize + sizeof(END));
+   if (!buf)
+   return NULL;
 
if (desc)
buf = dp_part_fill(buf, desc, part);
@@ -648,6 +665,8 @@ struct efi_device_path *efi_dp_from_eth(void)
dpsize += sizeof(*ndp);
 
start = buf = dp_alloc(dpsize + sizeof(END));
+   if (!buf)
+   return NULL;
 
 #ifdef CONFIG_DM_ETH
buf = dp_fill(buf, eth_get_dev());
@@ -678,6 +697,8 @@ struct efi_device_path *efi_dp_from_mem(uint32_t 
memory_type,
void *buf, *start;
 
start = buf = dp_alloc(sizeof(*mdp) + sizeof(END));
+   if (!buf)
+   return NULL;
 
md

[U-Boot] [PATCH v2 00/18] efi_loader: enable EFI driver provided block device

[Heinrich Schuchardt]

With this patch series an EFI application or driver can supply
a block device which in turn can be used to download an image.

E.g. we can load iPXE, connect iSCSI drives, download grub from the
SAN and afterwards with grub download and run an EFI application.
Booting Linux from an iSCSI drive was successful on arm64.

v2:
Add an additional patch to fix ExitBootServices.
Provide comments for EFI block driver.
Avoid printing when not in debug mode
Add product tools/file2include to .gitignore.
Put the patch with the test for block io after the patch for the
driver.

Heinrich Schuchardt (18):
  efi_loader: return NULL from device path functions
  efi_loader: address of the simple file system protocol
  efi_loader: correct find simple file system protocol
  efi_loader: print device path when entering efi_load_image
  efi_loader: allocate correct memory type for EFI image
  efi_loader: check tables in helloworld.efi
  efi_loader: fix StartImage bootservice
  efi_loader: efi_disk_register: correctly determine if_type_name
  efi_loader: make efi_block_io_guid a global symbol
  efi_loader: provide a function to create a partition node
  efi_loader: make efi_disk_create_partitions a global symbol
  efi_loader: correct EFI_BLOCK_IO_PROTOCOL definitions
  efi_loader: provide function to get last node of a device path
  efi_loader: provide links between devices EFI handles
  tools: provide a tool to convert a binary file to an include
  efi_driver: EFI block driver
  efi_selftest: provide a test for block io
  efi_loader: fix ExitBootServices

 MAINTAINERS  |   1 +
 common/board_r.c |   3 +
 drivers/block/blk-uclass.c   |   4 +-
 include/blk.h|   1 +
 include/config_fallbacks.h   |   1 +
 include/dm/device.h  |   4 +
 include/dm/uclass-id.h   |   1 +
 include/efi_api.h|  16 +-
 include/efi_driver.h |  30 ++
 include/efi_loader.h |  21 +-
 lib/Makefile |   1 +
 lib/efi_driver/Makefile  |  13 +
 lib/efi_driver/efi_block_device.c| 175 
 lib/efi_driver/efi_uclass.c  | 330 ++
 lib/efi_loader/efi_boottime.c|  42 ++-
 lib/efi_loader/efi_device_path.c | 168 +---
 lib/efi_loader/efi_disk.c| 137 +++---
 lib/efi_loader/efi_image_loader.c|  64 +++--
 lib/efi_loader/helloworld.c  |  26 ++
 lib/efi_selftest/Makefile|   4 +
 lib/efi_selftest/efi_selftest_block_device.c | 395 +++
 lib/efi_selftest/efi_selftest_disk_image.h   |  69 +
 tools/.gitignore |   1 +
 tools/Makefile   |   3 +
 tools/file2include.c | 106 +++
 25 files changed, 1493 insertions(+), 123 deletions(-)
 create mode 100644 include/efi_driver.h
 create mode 100644 lib/efi_driver/Makefile
 create mode 100644 lib/efi_driver/efi_block_device.c
 create mode 100644 lib/efi_driver/efi_uclass.c
 create mode 100644 lib/efi_selftest/efi_selftest_block_device.c
 create mode 100644 lib/efi_selftest/efi_selftest_disk_image.h
 create mode 100644 tools/file2include.c

-- 
2.14.2

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[U-Boot] [PATCH v2 02/18] efi_loader: address of the simple file system protocol

[Heinrich Schuchardt]

When installing the the simple file system protocol we have to path
the address of the structure and not the address of a pointer ot the
structure.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/efi_disk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index d299fc8dea..85b4a147e2 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -242,7 +242,7 @@ static void efi_disk_add_dev(const char *name,
 diskobj->dp);
ret = efi_add_protocol(diskobj->parent.handle,
   &efi_simple_file_system_protocol_guid,
-  &diskobj->volume);
+  diskobj->volume);
if (ret != EFI_SUCCESS)
goto out_of_memory;
}
-- 
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[U-Boot] [PATCH v2 13/18] efi_loader: provide function to get last node of a device path

[Heinrich Schuchardt]

On a block device and its partions the same protocols can be
installed. To tell the apart we can use the type of the last
node of the device path which is not the end node.

The patch provides a utility function to find this last node.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 include/efi_loader.h |  3 +++
 lib/efi_loader/efi_device_path.c | 20 
 2 files changed, 23 insertions(+)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 0ba7badb15..4060348695 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -312,6 +312,9 @@ struct efi_device_path *efi_dp_from_eth(void);
 struct efi_device_path *efi_dp_from_mem(uint32_t mem_type,
uint64_t start_address,
uint64_t end_address);
+/* Determine the last device path node that is not the end node. */
+const struct efi_device_path *efi_dp_last_node(
+   const struct efi_device_path *dp);
 efi_status_t efi_dp_split_file_path(struct efi_device_path *full_path,
struct efi_device_path **device_path,
struct efi_device_path **file_path);
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index f00a0ce645..c941ea7717 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -208,6 +208,26 @@ struct efi_object *efi_dp_find_obj(struct efi_device_path 
*dp,
return efiobj;
 }
 
+/*
+ * Determine the last device path node that is not the end node.
+ *
+ * @dp device path
+ * @return last node before the end node if it exists
+ * otherwise NULL
+ */
+const struct efi_device_path *efi_dp_last_node(const struct efi_device_path 
*dp)
+{
+   struct efi_device_path *ret;
+
+   if (!dp || dp->type == DEVICE_PATH_TYPE_END)
+   return NULL;
+   while (dp) {
+   ret = (struct efi_device_path *)dp;
+   dp = efi_dp_next(dp);
+   }
+   return ret;
+}
+
 /* return size not including End node: */
 unsigned efi_dp_size(const struct efi_device_path *dp)
 {
-- 
2.14.2

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[U-Boot] [PATCH v2 05/18] efi_loader: allocate correct memory type for EFI image

[Heinrich Schuchardt]

The category of memory allocated for an EFI image should depend on
its type (application, bootime service driver, runtime service driver).

Our helloworld.efi built on arm64 has an illegal image type. Treat it
like an EFI application.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/efi_image_loader.c | 64 ---
 1 file changed, 40 insertions(+), 24 deletions(-)

diff --git a/lib/efi_loader/efi_image_loader.c 
b/lib/efi_loader/efi_image_loader.c
index 849d7ce377..9d2214b481 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -73,6 +73,40 @@ void __weak invalidate_icache_all(void)
/* If the system doesn't support icache_all flush, cross our fingers */
 }
 
+/*
+ * Determine the memory types to be used for code and data.
+ *
+ * @loaded_image_info  image descriptor
+ * @image_type field Subsystem of the optional header for
+ * Windows specific field
+ */
+static void efi_set_code_and_data_type(
+   struct efi_loaded_image *loaded_image_info,
+   uint16_t image_type)
+{
+   switch (image_type) {
+   case IMAGE_SUBSYSTEM_EFI_APPLICATION:
+   loaded_image_info->image_code_type = EFI_LOADER_CODE;
+   loaded_image_info->image_data_type = EFI_LOADER_DATA;
+   break;
+   case IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER:
+   loaded_image_info->image_code_type = EFI_BOOT_SERVICES_CODE;
+   loaded_image_info->image_data_type = EFI_BOOT_SERVICES_DATA;
+   break;
+   case IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER:
+   case IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER:
+   loaded_image_info->image_code_type = EFI_RUNTIME_SERVICES_CODE;
+   loaded_image_info->image_data_type = EFI_RUNTIME_SERVICES_DATA;
+   break;
+   default:
+   printf("%s: invalid image type: %u\n", __func__, image_type);
+   /* Let's assume it is an application */
+   loaded_image_info->image_code_type = EFI_LOADER_CODE;
+   loaded_image_info->image_data_type = EFI_LOADER_DATA;
+   break;
+   }
+}
+
 /*
  * This function loads all sections from a PE binary into a newly reserved
  * piece of memory. On successful load it then returns the entry point for
@@ -94,7 +128,6 @@ void *efi_load_pe(void *efi, struct efi_loaded_image 
*loaded_image_info)
unsigned long virt_size = 0;
bool can_run_nt64 = true;
bool can_run_nt32 = true;
-   uint16_t image_type;
 
 #if defined(CONFIG_ARM64)
can_run_nt32 = false;
@@ -131,7 +164,9 @@ void *efi_load_pe(void *efi, struct efi_loaded_image 
*loaded_image_info)
IMAGE_NT_HEADERS64 *nt64 = (void *)nt;
IMAGE_OPTIONAL_HEADER64 *opt = &nt64->OptionalHeader;
image_size = opt->SizeOfImage;
-   efi_reloc = efi_alloc(virt_size, EFI_LOADER_DATA);
+   efi_set_code_and_data_type(loaded_image_info, opt->Subsystem);
+   efi_reloc = efi_alloc(virt_size,
+ loaded_image_info->image_code_type);
if (!efi_reloc) {
printf("%s: Could not allocate %lu bytes\n",
   __func__, virt_size);
@@ -140,12 +175,13 @@ void *efi_load_pe(void *efi, struct efi_loaded_image 
*loaded_image_info)
entry = efi_reloc + opt->AddressOfEntryPoint;
rel_size = opt->DataDirectory[rel_idx].Size;
rel = efi_reloc + opt->DataDirectory[rel_idx].VirtualAddress;
-   image_type = opt->Subsystem;
} else if (can_run_nt32 &&
   (nt->OptionalHeader.Magic == IMAGE_NT_OPTIONAL_HDR32_MAGIC)) 
{
IMAGE_OPTIONAL_HEADER32 *opt = &nt->OptionalHeader;
image_size = opt->SizeOfImage;
-   efi_reloc = efi_alloc(virt_size, EFI_LOADER_DATA);
+   efi_set_code_and_data_type(loaded_image_info, opt->Subsystem);
+   efi_reloc = efi_alloc(virt_size,
+ loaded_image_info->image_code_type);
if (!efi_reloc) {
printf("%s: Could not allocate %lu bytes\n",
   __func__, virt_size);
@@ -154,32 +190,12 @@ void *efi_load_pe(void *efi, struct efi_loaded_image 
*loaded_image_info)
entry = efi_reloc + opt->AddressOfEntryPoint;
rel_size = opt->DataDirectory[rel_idx].Size;
rel = efi_reloc + opt->DataDirectory[rel_idx].VirtualAddress;
-   image_type = opt->Subsystem;
} else {
printf("%s: Invalid optional header magic %x\n", __func__,
   nt->OptionalHeader.Magic);
return NULL;
}
 
-   switch (image_type) {
-   case IMAGE_SUBSYSTEM_EFI_APPLICATION:
-   load

[U-Boot] [PATCH v2 03/18] efi_loader: correct find simple file system protocol

[Heinrich Schuchardt]

In contrast to the description the code did not split the device
path into device part and file part.

The code should use the installed protocol and not refer to the
internal structure of the the disk object.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/efi_disk.c | 39 +--
 1 file changed, 29 insertions(+), 10 deletions(-)

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 85b4a147e2..8771e880f6 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -175,25 +175,44 @@ static const struct efi_block_io block_io_disk_template = 
{
 };
 
 /*
- * Find filesystem from a device-path.  The passed in path 'p' probably
- * contains one or more /File(name) nodes, so the comparison stops at
- * the first /File() node, and returns the pointer to that via 'rp'.
- * This is mostly intended to be a helper to map a device-path to an
- * efi_file_handle object.
+ * Get the simple file system protocol for a file device path.
+ *
+ * The full path provided is split into device part and into a file
+ * part. The device part is used to find the handle on which the
+ * simple file system protocol is installed.
+ *
+ * @full_path  device path including device and file
+ * @return simple file system protocol
  */
 struct efi_simple_file_system_protocol *
-efi_fs_from_path(struct efi_device_path *fp)
+efi_fs_from_path(struct efi_device_path *full_path)
 {
struct efi_object *efiobj;
-   struct efi_disk_obj *diskobj;
+   struct efi_handler *handler;
+   struct efi_device_path *device_path;
+   struct efi_device_path *file_path;
+   efi_status_t ret;
 
-   efiobj = efi_dp_find_obj(fp, NULL);
+   /* Split the path into a device part and a file part */
+   ret = efi_dp_split_file_path(full_path, &device_path, &file_path);
+   if (ret != EFI_SUCCESS)
+   return NULL;
+   efi_free_pool(file_path);
+
+   /* Get the EFI object for the partition */
+   efiobj = efi_dp_find_obj(device_path, NULL);
+   efi_free_pool(device_path);
if (!efiobj)
return NULL;
 
-   diskobj = container_of(efiobj, struct efi_disk_obj, parent);
+   /* Find the simple file system protocol */
+   ret = efi_search_protocol(efiobj, &efi_simple_file_system_protocol_guid,
+ &handler);
+   if (ret != EFI_SUCCESS)
+   return NULL;
 
-   return diskobj->volume;
+   /* Return the simple file system protocol for the partition */
+   return handler->protocol_interface;
 }
 
 /*
-- 
2.14.2

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[U-Boot] [PATCH v2 04/18] efi_loader: print device path when entering efi_load_image

[Heinrich Schuchardt]

Use %pD to print the device path instead of its address when
entering efi_load_image.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/efi_boottime.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 42cf197af9..e046a7be9d 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -1474,7 +1474,7 @@ static efi_status_t EFIAPI efi_load_image(bool 
boot_policy,
struct efi_object *obj;
efi_status_t ret;
 
-   EFI_ENTRY("%d, %p, %p, %p, %ld, %p", boot_policy, parent_image,
+   EFI_ENTRY("%d, %p, %pD, %p, %ld, %p", boot_policy, parent_image,
  file_path, source_buffer, source_size, image_handle);
 
info = calloc(1, sizeof(*info));
-- 
2.14.2

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[U-Boot] [PATCH v2 11/18] efi_loader: make efi_disk_create_partitions a global symbol

[Heinrich Schuchardt]

Up to now we have been using efi_disk_create_partitions() to create
partions for block device that existed before starting an EFI
application.

We need to to call it for for block devices created by EFI
applications at run time. The EFI application will define the
handle for the block device and install a device path protocol
on it. We have to use this device path as stem for the partition
device paths.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 include/efi_loader.h  |  4 +++
 lib/efi_loader/efi_disk.c | 84 +--
 2 files changed, 64 insertions(+), 24 deletions(-)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 456763e83a..0ba7badb15 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -174,6 +174,10 @@ extern struct list_head efi_obj_list;
 int efi_console_register(void);
 /* Called by bootefi to make all disk storage accessible as EFI objects */
 int efi_disk_register(void);
+/* Create handles and protocols for the partions of a block device */
+int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc,
+  const char *if_typename, int diskid,
+  const char *pdevname);
 /* Called by bootefi to make GOP (graphical) interface available */
 int efi_gop_register(void);
 /* Called by bootefi to make the network interface available */
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index cccfc6dac5..92c3f45ca5 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -216,27 +216,31 @@ efi_fs_from_path(struct efi_device_path *full_path)
 }
 
 /*
- * Create a device for a disk
+ * Create a handle for a partition or disk
  *
- * @name   not used
+ * @parent parent handle
+ * @dp_parent  parent device path
  * @if_typename interface name for block device
  * @desc   internal block device
  * @dev_index   device index for block device
  * @offset offset into disk for simple partitions
+ * @return disk object
  */
-static void efi_disk_add_dev(const char *name,
-const char *if_typename,
-struct blk_desc *desc,
-int dev_index,
-lbaint_t offset,
-unsigned int part)
+static struct efi_disk_obj *efi_disk_add_dev(
+   efi_handle_t parent,
+   struct efi_device_path *dp_parent,
+   const char *if_typename,
+   struct blk_desc *desc,
+   int dev_index,
+   lbaint_t offset,
+   unsigned int part)
 {
struct efi_disk_obj *diskobj;
efi_status_t ret;
 
/* Don't add empty devices */
if (!desc->lba)
-   return;
+   return NULL;
 
diskobj = calloc(1, sizeof(*diskobj));
if (!diskobj)
@@ -246,7 +250,14 @@ static void efi_disk_add_dev(const char *name,
efi_add_handle(&diskobj->parent);
 
/* Fill in object data */
-   diskobj->dp = efi_dp_from_part(desc, part);
+   if (part) {
+   struct efi_device_path *node = efi_dp_part_node(desc, part);
+
+   diskobj->dp = efi_dp_append_node(dp_parent, node);
+   efi_free_pool(node);
+   } else {
+   diskobj->dp = efi_dp_from_part(desc, part);
+   }
diskobj->part = part;
ret = efi_add_protocol(diskobj->parent.handle, &efi_block_io_guid,
   &diskobj->ops);
@@ -280,20 +291,38 @@ static void efi_disk_add_dev(const char *name,
if (part != 0)
diskobj->media.logical_partition = 1;
diskobj->ops.media = &diskobj->media;
-   return;
+   return diskobj;
 out_of_memory:
printf("ERROR: Out of memory\n");
+   return NULL;
 }
 
-static int efi_disk_create_partitions(struct blk_desc *desc,
- const char *if_typename,
- int diskid,
- const char *pdevname)
+/*
+ * Create handles and protocols for the partions of a block device
+ *
+ * @parent handle of the parent disk
+ * @blk_desc   block device
+ * @if_typenameinterface type
+ * @diskid device number
+ * @pdevname   device name
+ * @return number of partions created
+ */
+int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc,
+  const char *if_typename, int diskid,
+  const char *pdevname)
 {
int disks = 0;
char devname[32] = { 0 }; /* dp->str is u16[32] long */
disk_partition_t info;
int part;
+   struct efi_device_path *dp = NULL;
+   efi_status_t ret;
+   struct efi_handler *ha

[U-Boot] [PATCH v2 07/18] efi_loader: fix StartImage bootservice

[Heinrich Schuchardt]

The calling convention for the entry point of an EFI image
is always 'asmlinkage'.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/efi_boottime.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index e046a7be9d..5a3349ecb2 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -1533,7 +1533,8 @@ static efi_status_t EFIAPI efi_start_image(efi_handle_t 
image_handle,
   unsigned long *exit_data_size,
   s16 **exit_data)
 {
-   ulong (*entry)(efi_handle_t image_handle, struct efi_system_table *st);
+   asmlinkage ulong (*entry)(efi_handle_t image_handle,
+ struct efi_system_table *st);
struct efi_loaded_image *info = image_handle;
 
EFI_ENTRY("%p, %p, %p", image_handle, exit_data_size, exit_data);
-- 
2.14.2

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[U-Boot] [PATCH v2 08/18] efi_loader: efi_disk_register: correctly determine if_type_name

[Heinrich Schuchardt]

The interface type name can be used to look up the interface type.
Don't confound it with the driver name which may be different.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/efi_disk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 8771e880f6..da92729779 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -330,7 +330,7 @@ int efi_disk_register(void)
 dev;
 uclass_next_device_check(&dev)) {
struct blk_desc *desc = dev_get_uclass_platdata(dev);
-   const char *if_typename = dev->driver->name;
+   const char *if_typename = blk_get_if_type_name(desc->if_type);
 
printf("Scanning disk %s...\n", dev->name);
 
-- 
2.14.2

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[U-Boot] [PATCH v2 06/18] efi_loader: check tables in helloworld.efi

[Heinrich Schuchardt]

Check if the device tree and the SMBIOS table are available.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_loader/helloworld.c | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/lib/efi_loader/helloworld.c b/lib/efi_loader/helloworld.c
index b8c147d7f2..1ec0179226 100644
--- a/lib/efi_loader/helloworld.c
+++ b/lib/efi_loader/helloworld.c
@@ -14,6 +14,22 @@
 #include 
 
 static const efi_guid_t loaded_image_guid = LOADED_IMAGE_GUID;
+static const efi_guid_t fdt_guid = EFI_FDT_GUID;
+static const efi_guid_t smbios_guid = SMBIOS_TABLE_GUID;
+
+static int hw_memcmp(const void *buf1, const void *buf2, size_t length)
+{
+   const u8 *pos1 = buf1;
+   const u8 *pos2 = buf2;
+
+   for (; length; --length) {
+   if (*pos1 != *pos2)
+   return *pos1 - *pos2;
+   ++pos1;
+   ++pos2;
+   }
+   return 0;
+}
 
 /*
  * Entry point of the EFI application.
@@ -29,6 +45,7 @@ efi_status_t EFIAPI efi_main(efi_handle_t handle,
struct efi_boot_services *boottime = systable->boottime;
struct efi_loaded_image *loaded_image;
efi_status_t ret;
+   efi_uintn_t i;
 
con_out->output_string(con_out, L"Hello, world!\n");
 
@@ -40,6 +57,15 @@ efi_status_t EFIAPI efi_main(efi_handle_t handle,
   L"Cannot open loaded image protocol\n");
goto out;
}
+   /* Find configuration tables */
+   for (i = 0; i < systable->nr_tables; ++i) {
+   if (!hw_memcmp(&systable->tables[i].guid, &fdt_guid,
+  sizeof(efi_guid_t)))
+   con_out->output_string(con_out, L"Have device tree\n");
+   if (!hw_memcmp(&systable->tables[i].guid, &smbios_guid,
+  sizeof(efi_guid_t)))
+   con_out->output_string(con_out, L"Have SMBIOS table\n");
+   }
/* Output the load options */
con_out->output_string(con_out, L"Load options: ");
if (loaded_image->load_options_size && loaded_image->load_options)
-- 
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[U-Boot] [PATCH v2 17/18] efi_selftest: provide a test for block io

[Heinrich Schuchardt]

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 lib/efi_selftest/Makefile|   4 +
 lib/efi_selftest/efi_selftest_block_device.c | 395 +++
 lib/efi_selftest/efi_selftest_disk_image.h   |  69 +
 3 files changed, 468 insertions(+)
 create mode 100644 lib/efi_selftest/efi_selftest_block_device.c
 create mode 100644 lib/efi_selftest/efi_selftest_disk_image.h

diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index e549553c82..20f614d6ba 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -21,3 +21,7 @@ efi_selftest_textoutput.o \
 efi_selftest_tpl.o \
 efi_selftest_util.o \
 efi_selftest_watchdog.o
+
+ifeq ($(CONFIG_BLK)$(CONFIG_PARTITIONS),yy)
+obj-$(CONFIG_CMD_BOOTEFI_SELFTEST) += efi_selftest_block_device.o
+endif
diff --git a/lib/efi_selftest/efi_selftest_block_device.c 
b/lib/efi_selftest/efi_selftest_block_device.c
new file mode 100644
index 00..9e4b93d9a6
--- /dev/null
+++ b/lib/efi_selftest/efi_selftest_block_device.c
@@ -0,0 +1,395 @@
+/*
+ * efi_selftest_block
+ *
+ * Copyright (c) 2017 Heinrich Schuchardt 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * This test checks the driver for block IO devices.
+ * A disk image is created in memory.
+ * A handle is created for the new block IO device.
+ * The block I/O protocol is installed on the handle.
+ * ConnectController is used to setup partitions and to install the simple
+ * file protocol.
+ * A known file is read from the file system and verified.
+ */
+
+#include 
+#include "efi_selftest_disk_image.h"
+
+/* Block size of compressed disk image */
+#define COMPRESSED_DISK_IMAGE_BLOCK_SIZE 8
+
+/* Binary logarithm of the block size */
+#define LB_BLOCK_SIZE 9
+
+static struct efi_boot_services *boottime;
+
+static const efi_guid_t block_io_protocol_guid = BLOCK_IO_GUID;
+static const efi_guid_t guid_device_path = DEVICE_PATH_GUID;
+static const efi_guid_t guid_simple_file_system_protocol =
+   EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID;
+static efi_guid_t guid_vendor =
+   EFI_GUID(0xdbca4c98, 0x6cb0, 0x694d,
+0x08, 0x72, 0x81, 0x9c, 0x65, 0x0c, 0xb7, 0xb8);
+
+static struct efi_device_path *dp;
+
+/* One 8 byte block of the compressed disk image */
+struct line {
+   size_t addr;
+   char *line;
+};
+
+/* Compressed disk image */
+struct compressed_disk_image {
+   size_t length;
+   struct line lines[];
+};
+
+static const struct compressed_disk_image img = EFI_ST_DISK_IMG;
+
+/* Decompressed disk image */
+static u8 *image;
+
+/*
+ * Reset service of the block IO protocol.
+ *
+ * @this   block IO protocol
+ * @return status code
+ */
+static efi_status_t EFIAPI reset(
+   struct efi_block_io *this,
+   char extended_verification)
+{
+   return EFI_SUCCESS;
+}
+
+/*
+ * Read service of the block IO protocol.
+ *
+ * @this   block IO protocol
+ * @media_id   media id
+ * @lbastart of the read in logical blocks
+ * @buffer_sizenumber of bytes to read
+ * @buffer target buffer
+ * @return status code
+ */
+static efi_status_t EFIAPI read_blocks(
+   struct efi_block_io *this, u32 media_id, u64 lba,
+   efi_uintn_t buffer_size, void *buffer)
+{
+   u8 *start;
+
+   if ((lba << LB_BLOCK_SIZE) + buffer_size > img.length)
+   return EFI_INVALID_PARAMETER;
+   start = image + (lba << LB_BLOCK_SIZE);
+
+   boottime->copy_mem(buffer, start, buffer_size);
+
+   return EFI_SUCCESS;
+}
+
+/*
+ * Write service of the block IO protocol.
+ *
+ * @this   block IO protocol
+ * @media_id   media id
+ * @lbastart of the write in logical blocks
+ * @buffer_sizenumber of bytes to read
+ * @buffer source buffer
+ * @return status code
+ */
+static efi_status_t EFIAPI write_blocks(
+   struct efi_block_io *this, u32 media_id, u64 lba,
+   efi_uintn_t buffer_size, void *buffer)
+{
+   u8 *start;
+
+   if ((lba << LB_BLOCK_SIZE) + buffer_size > img.length)
+   return EFI_INVALID_PARAMETER;
+   start = image + (lba << LB_BLOCK_SIZE);
+
+   boottime->copy_mem(start, buffer, buffer_size);
+
+   return EFI_SUCCESS;
+}
+
+/*
+ * Flush service of the block IO protocol.
+ *
+ * @this   block IO protocol
+ * @return status code
+ */
+static efi_status_t EFIAPI flush_blocks(struct efi_block_io *this)
+{
+   return EFI_SUCCESS;
+}
+
+/*
+ * Decompress the disk image.
+ *
+ * @image  decompressed disk image
+ * @return status code
+ */
+static efi_status_t decompress(u8 **image)
+{
+   u8 *buf;
+   size_t i;
+   size_t addr;
+   size_t len;
+   efi_status_t ret;
+
+   ret = boottime->allocate_pool(EFI_LOADER_DATA, img.length,
+ (void **)&buf);
+   if (ret != 

[U-Boot] [PATCH v2 14/18] efi_loader: provide links between devices EFI handles

[Heinrich Schuchardt]

U-Boot devices and EFI handles can be related, e.g. an
IDE disk relates to a handle with the EFI_BLOCK_IO_PROTOCOL.
Provide pointers to store these links.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 include/dm/device.h   | 4 
 include/efi_loader.h  | 2 ++
 lib/efi_loader/efi_boottime.c | 1 +
 3 files changed, 7 insertions(+)

diff --git a/include/dm/device.h b/include/dm/device.h
index 813e49f330..e5c54fe7b6 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -11,6 +11,7 @@
 #ifndef _DM_DEVICE_H
 #define _DM_DEVICE_H
 
+#include 
 #include 
 #include 
 #include 
@@ -144,6 +145,9 @@ struct udevice {
uint32_t flags;
int req_seq;
int seq;
+#ifdef EFI_LOADER
+   efi_handle_t handle;
+#endif
 #ifdef CONFIG_DEVRES
struct list_head devres_head;
 #endif
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 4060348695..711c901eda 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -139,6 +139,8 @@ struct efi_object {
struct list_head protocols;
/* The object spawner can either use this for data or as identifier */
void *handle;
+   /* Device */
+   struct udevice *dev;
 };
 
 /**
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 5a3349ecb2..4b3b63e39a 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -362,6 +362,7 @@ efi_status_t efi_create_handle(efi_handle_t *handle)
  (void **)&obj);
if (r != EFI_SUCCESS)
return r;
+   obj->dev = NULL;
efi_add_handle(obj);
*handle = obj->handle;
return r;
-- 
2.14.2

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[U-Boot] [PATCH v2 16/18] efi_driver: EFI block driver

[Heinrich Schuchardt]

This patch provides
* a uclass for EFI drivers
* a EFI driver for block devices

For each EFI driver the uclass
* creates a handle
* adds the driver binding protocol

The uclass provides the bind, start, and stop entry points for the driver
binding protocol.

In bind() and stop() it checks if the controller implements the protocol
supported by the EFI driver. In the start() function it calls the bind()
function of the EFI driver. In the stop() function it destroys the child
controllers.

The EFI block driver binds to controllers implementing the block io
protocol.

When the bind function of the EFI block driver is called it creates a
new U-Boot block device. It installs child handles for all partitions and
installs the simple file protocol on these.

The read and write functions of the EFI block driver delegate calls to the
controller that it is bound to.

A usage example is as following:

U-Boot loads the iPXE snp.efi executable. iPXE connects an iSCSI drive and
exposes a handle with the block IO protocol. It calls ConnectController.

Now the EFI block driver installs the partions with the simple file
protocol.

iPXE uses the simple file protocol to load Grub or the Linux Kernel.

Signed-off-by: Heinrich Schuchardt 
---
v2
Print to console only in debug mode.
Provide more comments.
Add commit message.
---
 common/board_r.c  |   3 +
 drivers/block/blk-uclass.c|   4 +-
 include/blk.h |   1 +
 include/config_fallbacks.h|   1 +
 include/dm/uclass-id.h|   1 +
 include/efi_driver.h  |  30 
 include/efi_loader.h  |   2 +
 lib/Makefile  |   1 +
 lib/efi_driver/Makefile   |  13 ++
 lib/efi_driver/efi_block_device.c | 175 
 lib/efi_driver/efi_uclass.c   | 330 ++
 11 files changed, 560 insertions(+), 1 deletion(-)
 create mode 100644 include/efi_driver.h
 create mode 100644 lib/efi_driver/Makefile
 create mode 100644 lib/efi_driver/efi_block_device.c
 create mode 100644 lib/efi_driver/efi_uclass.c

diff --git a/common/board_r.c b/common/board_r.c
index 2baa47f3a0..4ad37ee31a 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -715,7 +715,10 @@ static init_fnc_t init_sequence_r[] = {
set_cpu_clk_info, /* Setup clock information */
 #endif
 #ifdef CONFIG_EFI_LOADER
+   /* Setup EFI memory before any other EFI related code */
efi_memory_init,
+   /* Install EFI drivers */
+   efi_driver_init,
 #endif
stdio_init_tables,
initr_serial,
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 010ed32d3a..bfda2211f0 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -24,6 +24,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
[IF_TYPE_HOST]  = "host",
[IF_TYPE_SYSTEMACE] = "ace",
[IF_TYPE_NVME]  = "nvme",
+   [IF_TYPE_EFI]   = "efi",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -36,8 +37,9 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
[IF_TYPE_SD]= UCLASS_INVALID,
[IF_TYPE_SATA]  = UCLASS_AHCI,
[IF_TYPE_HOST]  = UCLASS_ROOT,
-   [IF_TYPE_NVME]  = UCLASS_NVME,
[IF_TYPE_SYSTEMACE] = UCLASS_INVALID,
+   [IF_TYPE_NVME]  = UCLASS_NVME,
+   [IF_TYPE_EFI]   = UCLASS_EFI,
 };
 
 static enum if_type if_typename_to_iftype(const char *if_typename)
diff --git a/include/blk.h b/include/blk.h
index 41b4d7efa8..69b5a98e56 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -34,6 +34,7 @@ enum if_type {
IF_TYPE_HOST,
IF_TYPE_SYSTEMACE,
IF_TYPE_NVME,
+   IF_TYPE_EFI,
 
IF_TYPE_COUNT,  /* Number of interface types */
 };
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 2c4d43d672..524313d5aa 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -52,6 +52,7 @@
defined(CONFIG_MMC) || \
defined(CONFIG_NVME) || \
defined(CONFIG_SYSTEMACE) || \
+   (defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)) || \
defined(CONFIG_SANDBOX)
 #define HAVE_BLOCK_DEVICE
 #endif
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 3fc20834ae..07fabc3ce6 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -34,6 +34,7 @@ enum uclass_id {
UCLASS_CROS_EC, /* Chrome OS EC */
UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
UCLASS_DMA, /* Direct Memory Access */
+   UCLASS_EFI, /* EFI managed devices */
UCLASS_ETH, /* Ethernet device */
UCLASS_GPIO,/* Bank of general-purpose I/O pins */
UCLASS_FIRMWARE,/* Firmware */
diff --git a/include/efi_driver.h b/include/efi_driver.h
new file mo

[U-Boot] [PATCH v2 18/18] efi_loader: fix ExitBootServices

[Heinrich Schuchardt]

This patch lets the implementation of ExitBootServices conform to
the UEFI standard.

The timer events must be disabled before calling the notification
functions of the exit boot services events.

The boot services must be disabled in the system table.

The handles in the system table should be defined as efi_handle_t.

Signed-off-by: Heinrich Schuchardt 
---
v2
new patch
---
 include/efi_api.h |  6 +++---
 lib/efi_loader/efi_boottime.c | 36 +++-
 2 files changed, 34 insertions(+), 8 deletions(-)

diff --git a/include/efi_api.h b/include/efi_api.h
index 0bc24d..4252d11398 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -247,11 +247,11 @@ struct efi_system_table {
struct efi_table_hdr hdr;
unsigned long fw_vendor;   /* physical addr of wchar_t vendor string */
u32 fw_revision;
-   unsigned long con_in_handle;
+   efi_handle_t con_in_handle;
struct efi_simple_input_interface *con_in;
-   unsigned long con_out_handle;
+   efi_handle_t con_out_handle;
struct efi_simple_text_output_protocol *con_out;
-   unsigned long stderr_handle;
+   efi_handle_t stderr_handle;
struct efi_simple_text_output_protocol *std_err;
struct efi_runtime_services *runtime;
struct efi_boot_services *boottime;
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 4b3b63e39a..2c5499e0c8 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -1645,12 +1645,16 @@ static void efi_exit_caches(void)
 }
 
 /*
- * Stop boot services.
+ * Stop all boot services.
  *
  * This function implements the ExitBootServices service.
  * See the Unified Extensible Firmware Interface (UEFI) specification
  * for details.
  *
+ * All timer events are disabled.
+ * For exit boot services events the notification function is called.
+ * The boot services are disabled in the system table.
+ *
  * @image_handle   handle of the loaded image
  * @map_keykey of the memory map
  * @return status code
@@ -1662,16 +1666,24 @@ static efi_status_t EFIAPI 
efi_exit_boot_services(efi_handle_t image_handle,
 
EFI_ENTRY("%p, %ld", image_handle, map_key);
 
+   /* Make sure that notification functions are not called anymore */
+   efi_tpl = TPL_HIGH_LEVEL;
+
+   /* Check if ExitBootServices has already been called */
+   if (!systab.boottime)
+   return EFI_EXIT(EFI_SUCCESS);
+
/* Notify that ExitBootServices is invoked. */
for (i = 0; i < ARRAY_SIZE(efi_events); ++i) {
if (efi_events[i].type != EVT_SIGNAL_EXIT_BOOT_SERVICES)
continue;
-   efi_signal_event(&efi_events[i]);
+   if (!efi_events[i].notify_function)
+   continue;
+   EFI_CALL_VOID(efi_events[i].notify_function(
+   &efi_events[i], efi_events[i].notify_context));
}
-   /* Make sure that notification functions are not called anymore */
-   efi_tpl = TPL_HIGH_LEVEL;
 
-   /* XXX Should persist EFI variables here */
+   /* TODO Should persist EFI variables here */
 
board_quiesce_devices();
 
@@ -1681,6 +1693,20 @@ static efi_status_t EFIAPI 
efi_exit_boot_services(efi_handle_t image_handle,
/* This stops all lingering devices */
bootm_disable_interrupts();
 
+   /* Disable boottime services */
+   systab.con_in_handle = NULL;
+   systab.con_in = NULL;
+   systab.con_out_handle = NULL;
+   systab.con_out = NULL;
+   systab.stderr_handle = NULL;
+   systab.std_err = NULL;
+   systab.boottime = NULL;
+
+   /* Recalculate CRC32 */
+   systab.hdr.crc32 = 0;
+   systab.hdr.crc32 = crc32(0, (const unsigned char *)&systab,
+sizeof(struct efi_system_table));
+
/* Give the payload some time to boot */
efi_set_watchdog(0);
WATCHDOG_RESET();
-- 
2.14.2

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[U-Boot] [PATCH v2 10/18] efi_loader: provide a function to create a partition node

[Heinrich Schuchardt]

Provide new function efi_dp_part_node() to create a device
node for a partition.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 include/efi_loader.h |   2 +
 lib/efi_loader/efi_device_path.c | 106 ++-
 2 files changed, 72 insertions(+), 36 deletions(-)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 6d04feb0a7..456763e83a 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -300,6 +300,8 @@ struct efi_device_path *efi_dp_append_node(const struct 
efi_device_path *dp,
 
 struct efi_device_path *efi_dp_from_dev(struct udevice *dev);
 struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part);
+/* Create a device node for a block device partition. */
+struct efi_device_path *efi_dp_part_node(struct blk_desc *desc, int part);
 struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part,
 const char *path);
 struct efi_device_path *efi_dp_from_eth(void);
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index c1ba54e6bd..f00a0ce645 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -484,50 +484,16 @@ static unsigned dp_part_size(struct blk_desc *desc, int 
part)
 }
 
 /*
- * Create a device path for a block device or one of its partitions.
+ * Create a device node for a block device partition.
  *
  * @bufbuffer to which the device path is wirtten
  * @desc   block device descriptor
  * @part   partition number, 0 identifies a block device
  */
-static void *dp_part_fill(void *buf, struct blk_desc *desc, int part)
+static void *dp_part_node(void *buf, struct blk_desc *desc, int part)
 {
disk_partition_t info;
 
-#ifdef CONFIG_BLK
-   {
-   struct udevice *dev;
-   int ret = blk_find_device(desc->if_type, desc->devnum, &dev);
-
-   if (ret)
-   dev = desc->bdev->parent;
-   buf = dp_fill(buf, dev);
-   }
-#else
-   /*
-* We *could* make a more accurate path, by looking at if_type
-* and handling all the different cases like we do for non-
-* legacy (ie CONFIG_BLK=y) case.  But most important thing
-* is just to have a unique device-path for if_type+devnum.
-* So map things to a fictitious USB device.
-*/
-   struct efi_device_path_usb *udp;
-
-   memcpy(buf, &ROOT, sizeof(ROOT));
-   buf += sizeof(ROOT);
-
-   udp = buf;
-   udp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
-   udp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_USB;
-   udp->dp.length = sizeof(*udp);
-   udp->parent_port_number = desc->if_type;
-   udp->usb_interface = desc->devnum;
-   buf = &udp[1];
-#endif
-
-   if (part == 0) /* the actual disk, not a partition */
-   return buf;
-
part_get_info(desc, part, &info);
 
if (desc->part_type == PART_TYPE_ISO) {
@@ -582,6 +548,51 @@ static void *dp_part_fill(void *buf, struct blk_desc 
*desc, int part)
return buf;
 }
 
+/*
+ * Create a device path for a block device or one of its partitions.
+ *
+ * @bufbuffer to which the device path is wirtten
+ * @desc   block device descriptor
+ * @part   partition number, 0 identifies a block device
+ */
+static void *dp_part_fill(void *buf, struct blk_desc *desc, int part)
+{
+#ifdef CONFIG_BLK
+   {
+   struct udevice *dev;
+   int ret = blk_find_device(desc->if_type, desc->devnum, &dev);
+
+   if (ret)
+   dev = desc->bdev->parent;
+   buf = dp_fill(buf, dev);
+   }
+#else
+   /*
+* We *could* make a more accurate path, by looking at if_type
+* and handling all the different cases like we do for non-
+* legacy (ie CONFIG_BLK=y) case.  But most important thing
+* is just to have a unique device-path for if_type+devnum.
+* So map things to a fictitious USB device.
+*/
+   struct efi_device_path_usb *udp;
+
+   memcpy(buf, &ROOT, sizeof(ROOT));
+   buf += sizeof(ROOT);
+
+   udp = buf;
+   udp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+   udp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_USB;
+   udp->dp.length = sizeof(*udp);
+   udp->parent_port_number = desc->if_type;
+   udp->usb_interface = desc->devnum;
+   buf = &udp[1];
+#endif
+
+   if (part == 0) /* the actual disk, not a partition */
+   return buf;
+
+   return dp_part_node(buf, desc, part);
+}
 
 /* Construct a device-path from a partition on a blk device: */
 struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part)
@@ -599,6 +610,29 @@ struct efi_device_path *efi_dp_from_part(struct blk_desc 
*desc, int part)
return start;
 }
 
+/*
+ * Create a device node for a block device partition.
+ *
+ * @buf

[U-Boot] [PATCH v2 09/18] efi_loader: make efi_block_io_guid a global symbol

[Heinrich Schuchardt]

The GUID of the EFI_BLOCK_IO_PROTOCOL is needed in different code
parts. To avoid duplication make efi_block_io_guid a global symbol.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 include/efi_loader.h  | 2 ++
 lib/efi_loader/efi_disk.c | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 6b623d8327..6d04feb0a7 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -86,6 +86,8 @@ extern const struct efi_device_path_to_text_protocol 
efi_device_path_to_text;
 
 uint16_t *efi_dp_str(struct efi_device_path *dp);
 
+/* GUID of the EFI_BLOCK_IO_PROTOCOL */
+extern const efi_guid_t efi_block_io_guid;
 extern const efi_guid_t efi_global_variable_guid;
 extern const efi_guid_t efi_guid_console_control;
 extern const efi_guid_t efi_guid_device_path;
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index da92729779..cccfc6dac5 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -14,7 +14,7 @@
 #include 
 #include 
 
-static const efi_guid_t efi_block_io_guid = BLOCK_IO_GUID;
+const efi_guid_t efi_block_io_guid = BLOCK_IO_GUID;
 
 struct efi_disk_obj {
/* Generic EFI object parent class data */
-- 
2.14.2

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[U-Boot] [PATCH v2 12/18] efi_loader: correct EFI_BLOCK_IO_PROTOCOL definitions

[Heinrich Schuchardt]

Add the revision constants.
Depending on the revision additional fields are needed in the
media descriptor.
Use efi_uintn_t for number of bytes to read or write.

Signed-off-by: Heinrich Schuchardt 
---
v2
no change
---
 include/efi_api.h | 10 --
 lib/efi_loader/efi_disk.c |  8 
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/include/efi_api.h b/include/efi_api.h
index 502fffed20..0bc24d 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -424,18 +424,24 @@ struct efi_block_io_media
u32 io_align;
u8 pad2[4];
u64 last_block;
+   u64 lowest_aligned_lba;
+   u32 logical_blocks_per_physical_block;
+   u32 optimal_transfer_length_granualarity;
 };
 
+#define EFI_BLOCK_IO_PROTOCOL_REVISION20x00020001
+#define EFI_BLOCK_IO_PROTOCOL_REVISION30x0002001f
+
 struct efi_block_io {
u64 revision;
struct efi_block_io_media *media;
efi_status_t (EFIAPI *reset)(struct efi_block_io *this,
char extended_verification);
efi_status_t (EFIAPI *read_blocks)(struct efi_block_io *this,
-   u32 media_id, u64 lba, unsigned long buffer_size,
+   u32 media_id, u64 lba, efi_uintn_t buffer_size,
void *buffer);
efi_status_t (EFIAPI *write_blocks)(struct efi_block_io *this,
-   u32 media_id, u64 lba, unsigned long buffer_size,
+   u32 media_id, u64 lba, efi_uintn_t buffer_size,
void *buffer);
efi_status_t (EFIAPI *flush_blocks)(struct efi_block_io *this);
 };
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 92c3f45ca5..8f84e7788e 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -91,7 +91,7 @@ static efi_status_t efi_disk_rw_blocks(struct efi_block_io 
*this,
 }
 
 static efi_status_t EFIAPI efi_disk_read_blocks(struct efi_block_io *this,
-   u32 media_id, u64 lba, unsigned long buffer_size,
+   u32 media_id, u64 lba, efi_uintn_t buffer_size,
void *buffer)
 {
void *real_buffer = buffer;
@@ -112,7 +112,7 @@ static efi_status_t EFIAPI efi_disk_read_blocks(struct 
efi_block_io *this,
real_buffer = efi_bounce_buffer;
 #endif
 
-   EFI_ENTRY("%p, %x, %"PRIx64", %lx, %p", this, media_id, lba,
+   EFI_ENTRY("%p, %x, %" PRIx64 ", %zx, %p", this, media_id, lba,
  buffer_size, buffer);
 
r = efi_disk_rw_blocks(this, media_id, lba, buffer_size, real_buffer,
@@ -126,7 +126,7 @@ static efi_status_t EFIAPI efi_disk_read_blocks(struct 
efi_block_io *this,
 }
 
 static efi_status_t EFIAPI efi_disk_write_blocks(struct efi_block_io *this,
-   u32 media_id, u64 lba, unsigned long buffer_size,
+   u32 media_id, u64 lba, efi_uintn_t buffer_size,
void *buffer)
 {
void *real_buffer = buffer;
@@ -147,7 +147,7 @@ static efi_status_t EFIAPI efi_disk_write_blocks(struct 
efi_block_io *this,
real_buffer = efi_bounce_buffer;
 #endif
 
-   EFI_ENTRY("%p, %x, %"PRIx64", %lx, %p", this, media_id, lba,
+   EFI_ENTRY("%p, %x, %" PRIx64 ", %zx, %p", this, media_id, lba,
  buffer_size, buffer);
 
/* Populate bounce buffer if necessary */
-- 
2.14.2

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[U-Boot] [PATCH v2 15/18] tools: provide a tool to convert a binary file to an include

[Heinrich Schuchardt]

For testing EFI disk management we need an in-memory image of
a disk.

The tool file2include converts a file to a C include. The file
is separated into strings of 8 bytes. Only the non-zero strings
are written to the include. The output format has been designed
to maintain readability.

 #define EFI_ST_DISK_IMG { 0x0001, { \
  {0x01b8, "\x94\x37\x69\xfc\x00\x00\x00\x00"}, /* .7i. */ \
  {0x01c0, "\x02\x00\x83\x02\x02\x00\x01\x00"}, /*  */ \
  {0x01c8, "\x00\x00\x7f\x00\x00\x00\x00\x00"}, /*  */ \
  {0x01f8, "\x00\x00\x00\x00\x00\x00\x55\xaa"}, /* ..U. */ \
 ...
  {0x6000, "\x48\x65\x6c\x6c\x6f\x20\x77\x6f"}, /* Hello wo */ \
  {0x6008, "\x72\x6c\x64\x21\x0a\x00\x00\x00"}, /* rld! */ \
  {0, NULL} } }

As the disk image needed for testing contains mostly zeroes a high
compression ratio can be attained.

Signed-off-by: Heinrich Schuchardt 
---
v2
Add .gitignore entry for tools/file2include
---
 MAINTAINERS  |   1 +
 tools/.gitignore |   1 +
 tools/Makefile   |   3 ++
 tools/file2include.c | 106 +++
 4 files changed, 111 insertions(+)
 create mode 100644 tools/file2include.c

diff --git a/MAINTAINERS b/MAINTAINERS
index e399008e23..d459153503 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -290,6 +290,7 @@ F:  include/efi*
 F: lib/efi*/
 F: test/py/tests/test_efi*
 F: cmd/bootefi.c
+F: tools/file2include.c
 
 FLATTENED DEVICE TREE
 M: Simon Glass 
diff --git a/tools/.gitignore b/tools/.gitignore
index 6a487d2202..c8cdaef90c 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -6,6 +6,7 @@
 /easylogo/easylogo
 /envcrc
 /fdtgrep
+/file2include
 /fit_check_sign
 /fit_info
 /gdb/gdbcont
diff --git a/tools/Makefile b/tools/Makefile
index 571f571ec9..b7d7d418ee 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -57,6 +57,8 @@ mkenvimage-objs := mkenvimage.o os_support.o lib/crc32.o
 hostprogs-y += dumpimage mkimage
 hostprogs-$(CONFIG_FIT_SIGNATURE) += fit_info fit_check_sign
 
+hostprogs-$(CONFIG_CMD_BOOTEFI_SELFTEST) += file2include
+
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
 
 # The following files are synced with upstream DTC.
@@ -118,6 +120,7 @@ dumpimage-objs := $(dumpimage-mkimage-objs) dumpimage.o
 mkimage-objs   := $(dumpimage-mkimage-objs) mkimage.o
 fit_info-objs   := $(dumpimage-mkimage-objs) fit_info.o
 fit_check_sign-objs   := $(dumpimage-mkimage-objs) fit_check_sign.o
+file2include-objs := file2include.o
 
 ifneq ($(CONFIG_MX23)$(CONFIG_MX28),)
 # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register
diff --git a/tools/file2include.c b/tools/file2include.c
new file mode 100644
index 00..9145f0845a
--- /dev/null
+++ b/tools/file2include.c
@@ -0,0 +1,106 @@
+/*
+ * Convert a file image to a C define
+ *
+ * Copyright (c) 2017 Heinrich Schuchardt 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * For testing EFI disk management we need an in memory image of
+ * a disk.
+ *
+ * The tool file2include converts a file to a C include. The file
+ * is separated into strings of 8 bytes. Only the non-zero strings
+ * are written to the include. The output format has been designed
+ * to maintain readability.
+ *
+ * As the disk image needed for testing contains mostly zeroes a high
+ * compression ratio can be attained.
+ */
+#include 
+#include 
+#include 
+#include 
+
+/* Size of the blocks written to the compressed file */
+#define BLOCK_SIZE 8
+
+int main(int argc, char *argv[])
+{
+   FILE *file;
+   int ret;
+   unsigned char *buf;
+   size_t count, i, j;
+
+   /* Provide usage help */
+   if (argc != 2) {
+   printf("Usage:\n%s FILENAME\n", argv[0]);
+   return EXIT_FAILURE;
+   }
+   /* Open file */
+   file = fopen(argv[1], "r");
+   if (!file) {
+   perror("fopen");
+   return EXIT_FAILURE;
+   }
+   /* Get file length */
+   ret = fseek(file, 0, SEEK_END);
+   if (ret < 0) {
+   perror("fseek");
+   return EXIT_FAILURE;
+   }
+   count = ftell(file);
+   if (!count) {
+   fprintf(stderr, "File %s has length 0\n", argv[1]);
+   return EXIT_FAILURE;
+   }
+   rewind(file);
+   /* Read file */
+   buf = malloc(count);
+   if (!buf) {
+   perror("calloc");
+   return EXIT_FAILURE;
+   }
+   count = fread(buf, 1, count, file);
+
+   /* Generate output */
+   printf("/*\n");
+   printf(" *  Non-zero %u byte strings of a disk image\n", BLOCK_SIZE);
+   printf(" *\n");
+   printf(" *  Generated with tools/file2include\n");
+   printf(" *\n");
+   printf(" *  SPDX-License-Identifier:GPL-2.0+\n");
+   printf(" */\n\n");
+   printf("#define EFI_ST_DISK_IMG { 0x%08zx, { \\\n", count);
+
+   for (i = 0; i < count; i += BLOCK_SIZE) {
+   int c = 0;
+

Re: [U-Boot] [PATCH v2 1/7] serial: Use next serial device if probing fails

[Simon Glass]

On 17 January 2018 at 00:54, Alexander Graf  wrote:
> Currently our serial device search chokes on the fact that the serial
> probe function could fail. If it does, instead of searching for the next
> usable serial device, it just quits.
>
> This patch changes the fallback logic so that even when a serial device
> was not probed correctly, we just try the next ones until we find one that
> works.
>
> Signed-off-by: Alexander Graf 
>
> ---
>
> v1 -> v2:
>
>   - Make search logic easier to follow
> ---
>  drivers/serial/serial-uclass.c | 25 +++--
>  1 file changed, 19 insertions(+), 6 deletions(-)

Reviewed-by: Simon Glass 

The fallback logic is getting more complicated. How come the DT does
not specify the correct console?

Regards,
Simon
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Re: [U-Boot] [PATCH v2 2/7] serial: Allow boards to determine whether a serial device is usable

[Simon Glass]

Hi Alex,

On 17 January 2018 at 00:54, Alexander Graf  wrote:
> On some boards, serial devices may or may not be muxed properly to actual
> pins, depending on firmware configuration. To determine whether we should
> use a serial device for U-Boot in-/output, we need to check whether it
> is muxed properly.
>
> This is something only the board file can do, so let's expose a weak
> function that a board can override to explicitly allow or disallow
> usage of certain serial devices.
>
> Signed-off-by: Alexander Graf 
> ---
>  drivers/serial/serial-uclass.c | 11 +++
>  include/serial.h   | 11 +++
>  2 files changed, 22 insertions(+)
>

Can we please figure out how handle this in the serial driver / driver
model itself? I want to avoid weak functions with driver model.

Regards,
Simon
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Re: [U-Boot] [PATCH v2 7/7] rpi: Force skip_init on serial devices

[Simon Glass]

Hi Alex,

On 17 January 2018 at 00:54, Alexander Graf  wrote:
> The serial devices on the raspberry pi are based on clocks we can't easily
> read and influence in U-Boot. However, the serial devices are always already
> properly set up when coming up, so all we need to do is leave them alone.
>
> The way to do that is to specify "skip-init" in device tree usually, but
> if we set CONFIG_OF_BOARD to get the device tree from the RPi firmware,
> that does not have skip-init properly set.
>
> So instead we just force it in board specific code. That way serial devices
> also work fine when skip-init is not passed explicitly in DT.
>
> Signed-off-by: Alexander Graf 
> ---
>  board/raspberrypi/rpi/rpi.c| 7 +++
>  drivers/serial/serial_bcm283x_mu.c | 2 +-
>  drivers/serial/serial_pl01x.c  | 2 +-
>  3 files changed, 9 insertions(+), 2 deletions(-)

Would you mind converting these drivers to livetree before adding these patches?

Regards,
Simon
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Re: [U-Boot] [PATCH v2 5/7] rpi: Properly detect which serial device is active

[Simon Glass]

Hi Alex,

On 17 January 2018 at 00:54, Alexander Graf  wrote:
> Now that we have all infrastructure in place to dynamically determine whether
> a serial device is actually usable (read: routed to user accessible pins), we
> can wire it up to the board.
>
> This patch adds support to determine whether the pl011 or mini-uart or no 
> serial
> is routed to the UART RX/TX pins on the Raspberry Pi family of boards.
>
> Signed-off-by: Alexander Graf 
> ---
>  board/raspberrypi/rpi/rpi.c | 69 
> +
>  1 file changed, 69 insertions(+)
>
> diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
> index a96d5d8952..b0cdad70f7 100644
> --- a/board/raspberrypi/rpi/rpi.c
> +++ b/board/raspberrypi/rpi/rpi.c
> @@ -24,9 +24,16 @@
>  #include 
>  #endif
>  #include 
> +#include 
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> +/*
> + * This is the GPIO pin that the user facing UART RX line is attached to.
> + * We use this pin to determine which serial device is available.
> + */
> +#define BCM2835_GPIO_RX15
> +
>  /* From lowlevel_init.S */
>  extern unsigned long fw_dtb_pointer;
>
> @@ -419,6 +426,68 @@ static void get_board_rev(void)
> printf("RPI %s (0x%x)\n", model->name, revision);
>  }
>
> +/*
> + * We may get called before the device model is initialized, so we can not
> + * rely on the GPIO driver.
> + */
> +int get_func_id(unsigned gpio)
> +{
> +   u32 val;
> +   u32 node;
> +   u32 *gpfsel;
> +   fdt_addr_t addr;
> +   fdt_size_t size;
> +
> +   node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, 
> "brcm,bcm2835-gpio");
> +   if (node < 0)
> +   return -EINVAL;
> +
> +   addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, node, "reg",
> + 0, &size, true);
> +   gpfsel = (void*)addr;
> +
> +   val = readl(&gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> +
> +   return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & 
> BCM2835_GPIO_FSEL_MASK);
> +}

Ick, this should be done in the GPIO driver and use gpio_get_function().

Regards,
Simon
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Re: [U-Boot] [PATCH 1/3] ARM: dts: stm32: Add STMMAC clocks for stm32f746

[Vikas Manocha]

Hi,

On 01/17/2018 12:46 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> Add ETHMAC, ETHMACRX and ETHMACTX clocks for STMMAC.
> 
> Signed-off-by: Patrice Chotard 

Reviewed-by: Vikas Manocha 

Cheers,
Vikas

> ---
>  arch/arm/dts/stm32f746.dtsi | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
> index 929bf82..46d148e 100644
> --- a/arch/arm/dts/stm32f746.dtsi
> +++ b/arch/arm/dts/stm32f746.dtsi
> @@ -65,6 +65,9 @@
>   compatible = "st,stm32-dwmac";
>   reg = <0x40028000 0x8000>;
>   reg-names = "stmmaceth";
> + clocks = <&rcc 0 STM32F7_AHB1_CLOCK(ETHMAC)>,
> +  <&rcc 0 STM32F7_AHB1_CLOCK(ETHMACTX)>,
> +  <&rcc 0 STM32F7_AHB1_CLOCK(ETHMACRX)>;
>   interrupts = <61>, <62>;
>   interrupt-names = "macirq", "eth_wake_irq";
>   snps,pbl = <8>;
> 
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Re: [U-Boot] [PATCH 1/3] power: regulator: s2mps11: add a regulator driver for s2mps11

[Simon Glass]

On 15 January 2018 at 22:33, Jaehoon Chung  wrote:
> exynos5422 has the s2mps11 PMIC.
> s2mps11 pmic has the 10-BUCK and 38-LDO regulators.
> Each IP and devices in exynos5422 can be controlled by each regulators.
> This patch is support for s2mps11 regulator driver.
>
> Signed-off-by: Jaehoon Chung 
> ---
>  drivers/power/regulator/Kconfig |   8 +
>  drivers/power/regulator/Makefile|   1 +
>  drivers/power/regulator/s2mps11_regulator.c | 597 
> 
>  include/power/s2mps11.h |  55 +++
>  4 files changed, 661 insertions(+)
>  create mode 100644 drivers/power/regulator/s2mps11_regulator.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 2/3] power: pmic: s2mps11: probe the regulator driver

[Simon Glass]

On 15 January 2018 at 22:33, Jaehoon Chung  wrote:
> Add the probe function to support the s2mps11 regulator driver.
>
> Signed-off-by: Jaehoon Chung 
> ---
>  drivers/power/pmic/s2mps11.c | 28 
>  1 file changed, 28 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 3/3] configs: odroid-xu3: enable the configs relevant to regulator

[Simon Glass]

On 15 January 2018 at 22:33, Jaehoon Chung  wrote:
> Enable the CONFIG_CMD_REGULATOR and CONFIG_DM_REGULATOR_S2MPS11.
>
> Signed-off-by: Jaehoon Chung 
> ---
>  configs/odroid-xu3_defconfig | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 3/3] mmc: bcm2835_sdhci: Add pinmux support

[Simon Glass]

Hi Alex,

On 16 January 2018 at 05:46, Alexander Graf  wrote:
> The bcm2835 firmware provided device trees expect device tree users
> to support pin muxing for the SD devices to work properly.
>
> This patch adds pin muxing support to the sdhci based SD controller
> on said family of SoCs, so that its pins are getting configured
> correctly on boot.
>
> Signed-off-by: Alexander Graf 
> ---
>  drivers/mmc/bcm2835_sdhci.c | 11 +++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
> index 3157354d2a..62ad109361 100644
> --- a/drivers/mmc/bcm2835_sdhci.c
> +++ b/drivers/mmc/bcm2835_sdhci.c
> @@ -45,6 +45,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  /* 400KHz is max freq for card ID etc. Use that as min */
>  #define MIN_FREQ 40
> @@ -178,6 +179,7 @@ static int bcm2835_sdhci_probe(struct udevice *dev)
> fdt_addr_t base;
> int emmc_freq;
> int ret;
> +   int pinctrl_handle;
>
> base = devfdt_get_addr(dev);
> if (base == FDT_ADDR_T_NONE)
> @@ -190,6 +192,15 @@ static int bcm2835_sdhci_probe(struct udevice *dev)
> }
> emmc_freq = ret;
>
> +   pinctrl_handle = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), 
> "pinctrl-0", -1);

You can't do this sort of thing :-)

This should go in a pinctrl driver. The clue is that you are having to
look up things manually here. You can create a basic driver very
easily.

> +   if (pinctrl_handle != -1) {
> +   struct udevice *dev;
> +
> +   /* Need to set up pinmuxing */
> +   if (!uclass_first_device(UCLASS_GPIO, &dev) && dev)
> +   bcm2835_gpio_set_pinmux(dev, pinctrl_handle);
> +   }
> +
> /*
>  * See the comments in bcm2835_sdhci_raw_writel().
>  *
> --
> 2.12.3
>

Regards,
Simon
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Re: [U-Boot] [PATCH 1/3] bcm2835_gpio: Add support for pinmux

[Simon Glass]

Hi Alex,

On 16 January 2018 at 05:46, Alexander Graf  wrote:
> On the bcm2835 the GPIO IP block is responsible to control pin muxing
> of the configurable pins on the chip.
>
> This adds a simple helper function that allows a device driver to set
> pin muxing according to device tree configuration on those devices.
>
> Signed-off-by: Alexander Graf 
> ---
>  arch/arm/mach-bcm283x/include/mach/gpio.h |  1 +
>  drivers/gpio/bcm2835_gpio.c   | 40 
> +++
>  2 files changed, 41 insertions(+)
>
> diff --git a/arch/arm/mach-bcm283x/include/mach/gpio.h 
> b/arch/arm/mach-bcm283x/include/mach/gpio.h
> index daaee52f81..751594d09f 100644
> --- a/arch/arm/mach-bcm283x/include/mach/gpio.h
> +++ b/arch/arm/mach-bcm283x/include/mach/gpio.h
> @@ -62,5 +62,6 @@ struct bcm2835_gpio_platdata {
>  };
>
>  int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio);
> +void bcm2835_gpio_set_pinmux(struct udevice *dev, int handle);
>
>  #endif /* _BCM2835_GPIO_H_ */
> diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
> index beaa21853a..209cbed9e6 100644
> --- a/drivers/gpio/bcm2835_gpio.c
> +++ b/drivers/gpio/bcm2835_gpio.c
> @@ -83,6 +83,46 @@ int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned 
> gpio)
> return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & 
> BCM2835_GPIO_FSEL_MASK);
>  }
>
> +static void bcm2835_gpio_set_func_id(struct udevice *dev, unsigned gpio, int 
> func)
> +{
> +   struct bcm2835_gpios *gpios = dev_get_priv(dev);
> +   u32 val;
> +
> +   val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> +   val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
> +   val |= (func << BCM2835_GPIO_FSEL_SHIFT(gpio));
> +   writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> +}
> +
> +void bcm2835_gpio_set_pinmux(struct udevice *dev, int handle)
> +{
> +   int node = fdt_node_offset_by_phandle(gd->fdt_blob, handle);
> +   u32 pins[16];
> +   int len;
> +   u32 func;
> +   int i;
> +
> +   if (!node)
> +   goto err;
> +
> +   func = fdtdec_get_int(gd->fdt_blob, node, "brcm,function", -1);
> +   if (func <= 0)
> +   goto err;
> +
> +   len = fdtdec_get_int_array_count(gd->fdt_blob, node, "brcm,pins", 
> pins,
> +ARRAY_SIZE(pins));
> +   if (len <= 0)
> +   goto err;
> +
> +   for (i = 0; i < len; i++)
> +   bcm2835_gpio_set_func_id(dev, pins[i], func);
> +
> +   return;
> +err:
> +   printf("Failed to pinmux phandle 0x%x\n", handle);
> +   return;
> +}

This should use livetree functions and I'm pretty sure it should go in
a pinctrl driver, not GPIO.

> +
>  static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)
>  {
> int funcid = bcm2835_gpio_get_func_id(dev, offset);
> --
> 2.12.3
>

Regards,
Simon
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Re: [U-Boot] [PATCH 3/3] clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()

[Vikas Manocha]

Hi Patrice,

On 01/17/2018 12:46 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> Move SYSCFG clock setup into configure_clocks() instead of calling
> clock_setup() from drivers.

It is in board configuration.

> Move the RMII setup from board_early_init_f() to board_init()
> to insure that RMII bit is set only when clock driver is initialized.
> 
> Signed-off-by: Patrice Chotard 
> ---
>  arch/arm/include/asm/arch-stm32f7/stm32_periph.h |  1 -
>  board/st/stm32f746-disco/stm32f746-disco.c   | 19 ++-
>  drivers/clk/clk_stm32f.c | 10 --
>  3 files changed, 10 insertions(+), 20 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h 
> b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> index 13f9c9b..7b8f66a 100644
> --- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> +++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> @@ -21,7 +21,6 @@ enum periph_id {
>  };
>  
>  enum periph_clock {
> - SYSCFG_CLOCK_CFG,
>   TIMER2_CLOCK_CFG,
>  };
>  
> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
> b/board/st/stm32f746-disco/stm32f746-disco.c
> index 58a5ef0..8da7028 100644
> --- a/board/st/stm32f746-disco/stm32f746-disco.c
> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
> @@ -69,23 +69,10 @@ int dram_init_banksize(void)
>   return 0;
>  }
>  
> -#ifdef CONFIG_ETH_DESIGNWARE
> -static int stmmac_setup(void)
> -{
> - clock_setup(SYSCFG_CLOCK_CFG);
> - /* Set >RMII mode */
> - STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
> -
> - return 0;
> -}
> -
>  int board_early_init_f(void)
>  {
> - stmmac_setup();
> -
>   return 0;
>  }
> -#endif
>  
>  #ifdef CONFIG_SPL_BUILD
>  #ifdef CONFIG_SPL_OS_BOOT
> @@ -162,5 +149,11 @@ int board_late_init(void)
>  int board_init(void)
>  {
>   gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
> +
> +#ifdef CONFIG_ETH_DESIGNWARE
> + /* Set >RMII mode */
> + STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
> +#endif
> +
>   return 0;
>  }
> diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
> index d0c7a90..1ae5b70 100644
> --- a/drivers/clk/clk_stm32f.c
> +++ b/drivers/clk/clk_stm32f.c
> @@ -67,8 +67,6 @@
>  #define RCC_DCKCFGRX_SDMMC1SEL   BIT(28)
>  #define RCC_DCKCFGR2_SDMMC2SEL   BIT(29)
>  
> -#define RCC_APB2ENR_SAI1EN   BIT(22)
> -
>  /*
>   * RCC AHB1ENR specific definitions
>   */
> @@ -86,9 +84,9 @@
>   * RCC APB2ENR specific definitions
>   */
>  #define RCC_APB2ENR_SYSCFGEN BIT(14)
> +#define RCC_APB2ENR_SAI1EN   BIT(22)
>  
>  enum periph_clock {
> - SYSCFG_CLOCK_CFG,
>   TIMER2_CLOCK_CFG,
>  };
>  
> @@ -227,6 +225,9 @@ static int configure_clocks(struct udevice *dev)
>   /* gate the SAI clock, needed for MMC 1&2 clocks */
>   setbits_le32(®s->apb2enr, RCC_APB2ENR_SAI1EN);
>  
> + /* gate the SYSCFG clock, needed to set RMII ethernet interface */

RMII interface only required for f746 disco board.

> + setbits_le32(®s->apb2enr, RCC_APB2ENR_SYSCFGEN);

RMII & Syscfg is board specific requirement, here it will configure it for all 
stm32f devices.

Cheers,
Vikas

> +
>   return 0;
>  }
>  
> @@ -352,9 +353,6 @@ static int stm32_clk_enable(struct clk *clk)
>  void clock_setup(int peripheral)
>  {
>   switch (peripheral) {
> - case SYSCFG_CLOCK_CFG:
> - setbits_le32(&STM32_RCC->apb2enr, RCC_APB2ENR_SYSCFGEN);
> - break;
>   case TIMER2_CLOCK_CFG:
>   setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
>   break;
> 
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Re: [U-Boot] [PATCH 2/3] clk: clk_stm32f: Remove STMMAC clock setup

[Vikas Manocha]

Hi,

On 01/17/2018 12:46 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> Thanks to 'commit ba1f96672522 ("net: designware: add clock support")'
> we don't need anymore to setup the STMMAC clock in board.
> 
> Signed-off-by: Patrice Chotard 

Reviewed-by: Vikas Manocha 

Cheers,
Vikas

> ---
>  arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 1 -
>  board/st/stm32f746-disco/stm32f746-disco.c   | 1 -
>  drivers/clk/clk_stm32f.c | 6 --
>  3 files changed, 8 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h 
> b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> index ae0faef..13f9c9b 100644
> --- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> +++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> @@ -23,7 +23,6 @@ enum periph_id {
>  enum periph_clock {
>   SYSCFG_CLOCK_CFG,
>   TIMER2_CLOCK_CFG,
> - STMMAC_CLOCK_CFG,
>  };
>  
>  #endif /* __ASM_ARM_ARCH_PERIPH_H */
> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
> b/board/st/stm32f746-disco/stm32f746-disco.c
> index 2e8aa86..58a5ef0 100644
> --- a/board/st/stm32f746-disco/stm32f746-disco.c
> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
> @@ -75,7 +75,6 @@ static int stmmac_setup(void)
>   clock_setup(SYSCFG_CLOCK_CFG);
>   /* Set >RMII mode */
>   STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
> - clock_setup(STMMAC_CLOCK_CFG);
>  
>   return 0;
>  }
> diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
> index 63116e0..d0c7a90 100644
> --- a/drivers/clk/clk_stm32f.c
> +++ b/drivers/clk/clk_stm32f.c
> @@ -90,7 +90,6 @@
>  enum periph_clock {
>   SYSCFG_CLOCK_CFG,
>   TIMER2_CLOCK_CFG,
> - STMMAC_CLOCK_CFG,
>  };
>  
>  struct stm32_clk_info stm32f4_clk_info = {
> @@ -359,11 +358,6 @@ void clock_setup(int peripheral)
>   case TIMER2_CLOCK_CFG:
>   setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
>   break;
> - case STMMAC_CLOCK_CFG:
> - setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_EN);
> - setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_RX_EN);
> - setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_TX_EN);
> - break;
>   default:
>   break;
>   }
> 
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Re: [U-Boot] X86 Broadwell-DE override FSP configuration

[vnktux]

Thank you Bin,

I managed to fully boot Broadwell-DE on platform with memory down enabled :)

Now before submitting the patch I have to solve a small problem.
In either case memory down is enable or not the booting process takes 1 hour 
and 20 minutes. On the output there are no error at all. I tried to 
enable/disable fastboot and  MRC but this didn't solve the problem.

Sent with [ProtonMail](https://protonmail.com) Secure Email.

 Original Message 
On 16 January 2018 2:01 PM, Bin Meng  wrote:

> +ML
>
> Hi Vincenzo,
>
> On Tue, Jan 16, 2018 at 8:21 PM, vnktux vnk...@protonmail.com wrote:
>
>> Hi all,
>> I managed to fully boot a bare metal U-Boot on the Intel Camelback Mountain
>> CRB (Broadwell-DE).
>
> This is great!
>
>> However I have a small problem, basically U-Boot does not override the FSP
>> UPD data when the platform boot.
>
> U-Boot can override the FSP UPD data.
>
>> For prototyping I am using a patched FSP binary I got in the company where I
>> work. Now that it boot on the camelback mountain I need it to run on another
>> platform (also broadwell-de) that has memory down installed on the
>> motherboard. That should be easy, all I have to do is to enable memory down
>> in the fsp_config.c file and provide the address of the SPD binary file. I
>> have done that, but for some reason it doesn't work. During the booting
>> process the platform give an error about the Dimm module not being
>> supported. That make sense since the pached FSP binary I am using has memory
>> down disabled. The part I don't understand is why U-Boot doesnt override the
>> UPD settings specified in my fsp_config.c file.
>> Below you will find my implementation, can somebody explain me what am I
>> doing wrong?
>> https://raw.githubusercontent.com/WarOfDevil/u-boot.x86_64-broadwell-de/master/arch/x86/cpu/broadwell-de/fsp_configs.c
>> https://raw.githubusercontent.com/WarOfDevil/u-boot.x86_64-broadwell-de/master/arch/x86/dts/poseidon.dts
>
> It looks you have commented out the FSP node in the device tree, then
> your fsp_configs.c won't do the UPD override.
>
>> Once I manage to make this work, I can create a patch for U-Boot.
>
> Regards,
> Bin
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Re: [U-Boot] [PATCH 3/3] mmc: bcm2835_sdhci: Add pinmux support

[Alexander Graf]

On 17.01.18 21:06, Simon Glass wrote:
> Hi Alex,
> 
> On 16 January 2018 at 05:46, Alexander Graf  wrote:
>> The bcm2835 firmware provided device trees expect device tree users
>> to support pin muxing for the SD devices to work properly.
>>
>> This patch adds pin muxing support to the sdhci based SD controller
>> on said family of SoCs, so that its pins are getting configured
>> correctly on boot.
>>
>> Signed-off-by: Alexander Graf 
>> ---
>>  drivers/mmc/bcm2835_sdhci.c | 11 +++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
>> index 3157354d2a..62ad109361 100644
>> --- a/drivers/mmc/bcm2835_sdhci.c
>> +++ b/drivers/mmc/bcm2835_sdhci.c
>> @@ -45,6 +45,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>
>>  /* 400KHz is max freq for card ID etc. Use that as min */
>>  #define MIN_FREQ 40
>> @@ -178,6 +179,7 @@ static int bcm2835_sdhci_probe(struct udevice *dev)
>> fdt_addr_t base;
>> int emmc_freq;
>> int ret;
>> +   int pinctrl_handle;
>>
>> base = devfdt_get_addr(dev);
>> if (base == FDT_ADDR_T_NONE)
>> @@ -190,6 +192,15 @@ static int bcm2835_sdhci_probe(struct udevice *dev)
>> }
>> emmc_freq = ret;
>>
>> +   pinctrl_handle = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), 
>> "pinctrl-0", -1);
> 
> You can't do this sort of thing :-)
> 
> This should go in a pinctrl driver. The clue is that you are having to
> look up things manually here. You can create a basic driver very
> easily.

Yup, that's basically what I've spent today on :). Unfortunately my RPi
seems to corrupt its U-Boot binary on boot every so often, so some times
I end up with an unbootable system and I've been unable to actually
trace it down for real yet. For example some times I get weird
corruptions in the .dyn.rel section.

Either way, I've switched to network boot now, let's hope that makes
life easier. If things work out I'll send a new version tomorrow with an
actual pinmux driver that then instantiates the existing GPIO one as a
child (so that the pinmux one gets autoloaded).


Alex
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Re: [U-Boot] [PATCH 1/3] bcm2835_gpio: Add support for pinmux

[Alexander Graf]

On 17.01.18 10:26, Amit Tomer wrote:
> Hi,
> 
>> +   val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
>> +   val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
>> +   val |= (func << BCM2835_GPIO_FSEL_SHIFT(gpio));
>> +   writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> 
> Can clrsetbits_le32 be used here ?

Yeah, thanks for the suggestion!

Alex
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Re: [U-Boot] [PATCH] ubi: Fix filesystem corruption on detach when fastmap enabled

[Martin Townsend]

Hi,


On Wed, Jan 17, 2018 at 3:47 PM, Richard Weinberger
 wrote:
> Martin,
>
> Am Dienstag, 16. Januar 2018, 15:13:04 CET schrieb Martin Townsend:
>> > Martin, can you please explain what corruption you see?
>> > From reading the code I'd assume that you miss volumes but a full scan
>> > would recover everything.
>>
>> I didn't do much analysis of the corruption I'm afraid.  When I tried
>> to reattach the the c->empty flag was set to true and indeed all the
>> EBA tables were reporting an empty filesystem even after a reboot.
>
> Sounds like what I'd expect.
>
>> Not sure if this was recoverable, how do you trigger a full scan?
>
> Booting a kernel without Fastmap support. B-)
>
>> > For Linux I suggest this fix:
>> >
>> > From 48287459cf8717cffac5aed423937cd7ba4360ab Mon Sep 17 00:00:00 2001
>> > From: Richard Weinberger 
>> > Date: Tue, 16 Jan 2018 14:12:46 +0100
>> > Subject: [PATCH] ubi: fastmap: Don't flush fastmap work on detach
>> >
>> > At this point UBI volumes have already been free()'ed and fastmap can no
>> > longer access these data structures.
>> >
>> > Fixes: 74cdaf24004a ("UBI: Fastmap: Fix memory leaks while closing the WL
>> > sub- system")
>> > Signed-off-by: Richard Weinberger 
>> > Cc: sta...@vger.kernel.org
>> > ---
>> >
>> >  drivers/mtd/ubi/fastmap-wl.c | 1 -
>> >  1 file changed, 1 deletion(-)
>> >
>> > diff --git a/drivers/mtd/ubi/fastmap-wl.c b/drivers/mtd/ubi/fastmap-wl.c
>> > index 4f0bd6b4422a..69dd21679a30 100644
>> > --- a/drivers/mtd/ubi/fastmap-wl.c
>> > +++ b/drivers/mtd/ubi/fastmap-wl.c
>> > @@ -362,7 +362,6 @@ static void ubi_fastmap_close(struct ubi_device *ubi)
>> >
>> >  {
>> >
>> > int i;
>> >
>> > -   flush_work(&ubi->fm_work);
>> >
>> > return_unused_pool_pebs(ubi, &ubi->fm_pool);
>> > return_unused_pool_pebs(ubi, &ubi->fm_wl_pool);
>> >
>> > --
>> > 2.13.6
>> >
>> > In U-Boot you can do the same.
>>
>> Richard: This will work but just want to check that ubi_wl_close is
>> supposed to never write out to the filesystem or will never do so in
>> future, if so maybe a something in the comments above ubi_wl_close to
>> ensure this?
>
> Hmm, not sure if I got this question.
> The filesystem sits above UBI. If we reach ubi_wl_close() all users ontop of
> UBI are gone. There is no UBIFS mounted anymore.
>

Thanks for clarifying, I'll submit a version 2 patch that replicates
this for U-Boot.

> Thanks,
> //richard
>
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> ATU66964118 - FN 374287y
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Re: [U-Boot] [PATCH v2 1/7] serial: Use next serial device if probing fails

[Alexander Graf]

On 17.01.18 20:34, Simon Glass wrote:
> On 17 January 2018 at 00:54, Alexander Graf  wrote:
>> Currently our serial device search chokes on the fact that the serial
>> probe function could fail. If it does, instead of searching for the next
>> usable serial device, it just quits.
>>
>> This patch changes the fallback logic so that even when a serial device
>> was not probed correctly, we just try the next ones until we find one that
>> works.
>>
>> Signed-off-by: Alexander Graf 
>>
>> ---
>>
>> v1 -> v2:
>>
>>   - Make search logic easier to follow
>> ---
>>  drivers/serial/serial-uclass.c | 25 +++--
>>  1 file changed, 19 insertions(+), 6 deletions(-)
> 
> Reviewed-by: Simon Glass 
> 
> The fallback logic is getting more complicated. How come the DT does
> not specify the correct console?

By default the DT on the RPi does not specify any serial console.
However, users have grown accustomed to the fact that there is indeed
one :).

I guess it all boils down to the fact that Linux is terrible when it
comes to console selection. 99.9% of users that want a serial console
and have a graphical screen want to have *both* available as first class
citizen consoles. But Linux just can't do that, so we have a lot of
crude hacks all over the place.


Alex
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