Re: [U-Boot] [PATCH 1/2] ARM: dts: zynq: Update dts for Z-turn board
On 14.3.2018 23:40, Anton Gerasimov wrote:
> Hi Alexander,
>
>
>>> device_type = "memory";
>>> reg = <0x0 0x4000>;
>>> };
>>> chosen {
>>> - stdout-path = "serial0:115200n8";
>> Nack. By default graphical output is quite unusable on this board, so we
>> want to output to serial.
>>
>> If your Linux submitted device tree doesn't contain this part, please
>> fix it there.
>>
>>> + bootargs = "console=ttyPS0,115200 earlyprintk
>>> root=/dev/mmcblk0p2 rootwait";
>> This is even worse. Please don't prepopulate any bootargs, otherwise
>> people may end up assuming that they're actually getting used.
>
> The older one is much cleaner I agree, thank you. I'll just need to test
> with both u-boot and linux.
>
>>> };
>>> gpio-leds {
>>> compatible = "gpio-leds";
>>> - led_r {
>>> - label = "led_r";
>>> - gpios = <&gpio0 0x72 0x1>;
>>> - default-state = "on";
>>> - linux,default-trigger = "heartbeat";
>>> - };
>>> -
>>> - led_g {
>>> - label = "led_g";
>>> - gpios = <&gpio0 0x73 0x1>;
>>> - default-state = "on";
>>> - linux,default-trigger = "heartbeat";
>>> - };
>>> -
>>> - led_b {
>>> - label = "led_b";
>>> - gpios = <&gpio0 0x74 0x1>;
>>> - default-state = "on";
>>> - linux,default-trigger = "heartbeat";
>>> - };
>> Why remove them? They're hard wired on the board, no?
> No this RGB LED is connected to PL, that's for sure.
>
>>> ps-clk-frequency = <>;
>>> - fclk-enable = <0xf>;
>> Why?
>
>> IIRC on my Z-Turn, I had to take a PL clock back into the PS as AXI
>> reference clock. See "Connect clocks" here:
>>
>>
>>
>> https://wiki.hackerspace.pl/projects:zturn-hackers:helloworld
>>
>>
>>
>> So we need to have the PL clock enabled, no? Or is that only needed for
>> PL AXI peripherals?
>>
>
> As far as I understand M_AXI_GPn connects AXI slaves implemented on PL
> to AXI and S_AXI_HPn provides access for AXI slaves in PS to PL slaves.
> So both involve PL and can be disconnected if PL is not clocked.
As you see that connection is done via PL. I am booting zynq boards
without fclk-enable and without PL and they are booting properly.
I have never had a time to investing what it is broken if you don't load
bitstream. Definitely feel free to test.
And as you see only one clk is used not all 4.
>
>>> };
>>> &qspi {
>>> @@ -152,8 +114,8 @@
>>> reg = <0x49>;
>>> };
>>> - adxl345@53 {
>>> - compatible = "adi,adxl34x", "adxl34x";
>>> + accelerometer@53 {
>>> + compatible = "adi,adxl345", "adxl345";
>> You can't just remove compatibles. Device trees are supposed to be
>> compatible with whatever used them before someone thought they want to
>> prettify them, so in this case you'd have to add the concrete names in
>> the list before the abstract ones:
>>
>> compatible = "adi,adxl345", "adxl345", "adi,adxl34x", "adxl34x";
> Yes sorry, I didn't realize that Linux kernel had both.
Ok. I think it will be good to sync these two dts with the kernel. It
means can you please send new updated version for linux kernel too?
Thanks,
Michal
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Re: [U-Boot] [PATCH v3 7/7] test/py: add spi_flash tests
On 14.3.2018 16:59, Liam Beguin wrote: > Hi Michal, > > On Wed, 14 Mar 2018 at 10:35 Michal Simek wrote: > >> On 14.3.2018 03:03, Liam Beguin wrote: >>> Add basic tests for the spi_flash subsystem. >>> >>> Signed-off-by: Liam Beguin >>> --- >>> test/py/tests/test_sf.py | 217 >> +++ >>> 1 file changed, 217 insertions(+) >>> create mode 100644 test/py/tests/test_sf.py >>> >>> diff --git a/test/py/tests/test_sf.py b/test/py/tests/test_sf.py >>> new file mode 100644 >>> index ..8bd1623ff303 >>> --- /dev/null >>> +++ b/test/py/tests/test_sf.py >>> @@ -0,0 +1,217 @@ >>> +# Copyright (c) 2017, Xiphos Systems Corp. All rights reserved. >> >> here should be probably also xilinx copyright because some things were >> taken from that. >> >> > Right, is this ok with you? (copied from your initial patch) > > Copyright (c) 2016, Xilinx Inc. Michal Simek definitely. I see it in v4 already. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] spi: ti_qspi: Full dm conversion
ti_qspi now support dt along with platform data,
respective boards need to switch into dm for the same.
Signed-off-by: Jagan Teki
---
drivers/spi/ti_qspi.c | 490 -
include/dm/platform_data/spi_ti_qspi.h | 19 ++
2 files changed, 196 insertions(+), 313 deletions(-)
create mode 100644 include/dm/platform_data/spi_ti_qspi.h
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index bea3aff943..2f62016422 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -20,6 +20,8 @@
#include
#include
+#include
+
DECLARE_GLOBAL_DATA_PTR;
/* ti qpsi register bit masks */
@@ -34,17 +36,17 @@ DECLARE_GLOBAL_DATA_PTR;
#define QSPI_CLK_DIV_MAX0x
/* command */
#define QSPI_EN_CS(n) (n << 28)
-#define QSPI_WLEN(n)((n-1) << 19)
+#define QSPI_WLEN(n)((n - 1) << 19)
#define QSPI_3_PIN BIT(18)
#define QSPI_RD_SNGLBIT(16)
#define QSPI_WR_SNGL(2 << 16)
#define QSPI_INVAL (4 << 16)
#define QSPI_RD_QUAD(7 << 16)
/* device control */
-#define QSPI_DD(m, n) (m << (3 + n*8))
-#define QSPI_CKPHA(n) (1 << (2 + n*8))
-#define QSPI_CSPOL(n) (1 << (1 + n*8))
-#define QSPI_CKPOL(n) (1 << (n*8))
+#define QSPI_DD(m, n) (m << (3 + n * 8))
+#define QSPI_CKPHA(n) (1 << (2 + n * 8))
+#define QSPI_CSPOL(n) (1 << (1 + n * 8))
+#define QSPI_CKPOL(n) (1 << (n * 8))
/* status */
#define QSPI_WC BIT(1)
#define QSPI_BUSY BIT(0)
@@ -99,13 +101,9 @@ struct ti_qspi_regs {
/* ti qspi priv */
struct ti_qspi_priv {
-#ifndef CONFIG_DM_SPI
- struct spi_slave slave;
-#else
void *memory_map;
uint max_hz;
u32 num_cs;
-#endif
struct ti_qspi_regs *base;
void *ctrl_mod_mmap;
ulong fclk;
@@ -114,37 +112,113 @@ struct ti_qspi_priv {
u32 dc;
};
-static void ti_spi_set_speed(struct ti_qspi_priv *priv, uint hz)
+/* TODO: control from sf layer to here through dm-spi */
+#if defined(CONFIG_TI_EDMA3) && !defined(CONFIG_DMA)
+void spi_flash_copy_mmap(void *data, void *offset, size_t len)
+{
+ unsigned intaddr = (unsigned int)(data);
+ unsigned intedma_slot_num = 1;
+
+ /* Invalidate the area, so no writeback into the RAM races with DMA */
+ invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN));
+
+ /* enable edma3 clocks */
+ enable_edma3_clocks();
+
+ /* Call edma3 api to do actual DMA transfer */
+ edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len);
+
+ /* disable edma3 clocks */
+ disable_edma3_clocks();
+
+ *((unsigned int *)offset) += len;
+}
+#endif
+
+static void ti_qspi_cs_deactivate(struct ti_qspi_priv *priv)
+{
+ writel(priv->cmd | QSPI_INVAL, &priv->base->cmd);
+ /* dummy readl to ensure bus sync */
+ readl(&priv->base->cmd);
+}
+
+static void ti_qspi_ctrl_mode_mmap(void *ctrl_mod_mmap, int cs, bool enable)
+{
+ u32 val;
+
+ val = readl(ctrl_mod_mmap);
+ if (enable)
+ val |= MEM_CS(cs);
+ else
+ val &= MEM_CS_UNSELECT;
+ writel(val, ctrl_mod_mmap);
+}
+
+static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv,
+ struct spi_slave *slave,
+ bool enable)
+{
+ u32 memval;
+ u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL);
+
+ if (!enable) {
+ writel(0, &priv->base->setup0);
+ return;
+ }
+
+ memval = QSPI_SETUP0_NUM_A_BYTES | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS;
+
+ switch (mode) {
+ case SPI_RX_QUAD:
+ memval |= QSPI_CMD_READ_QUAD;
+ memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS;
+ memval |= QSPI_SETUP0_READ_QUAD;
+ slave->mode |= SPI_RX_QUAD;
+ break;
+ case SPI_RX_DUAL:
+ memval |= QSPI_CMD_READ_DUAL;
+ memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS;
+ memval |= QSPI_SETUP0_READ_DUAL;
+ break;
+ default:
+ memval |= QSPI_CMD_READ;
+ memval |= QSPI_SETUP0_NUM_D_BYTES_NO_BITS;
+ memval |= QSPI_SETUP0_READ_NORMAL;
+ break;
+ }
+
+ writel(memval, &priv->base->setup0);
+}
+
+static int ti_qspi_set_speed(struct udevice *bus, uint max_hz)
{
+ struct ti_qspi_priv *priv = dev_get_priv(bus);
uint clk_div;
- if (!hz)
+ if (!max_hz)
clk_div = 0;
else
- clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1;
+ clk_div = DIV_ROUND_UP(priv
[U-Boot] [PATCH v2 2/3] spi: davinci: Full dm conversion
From: Jagan Teki
davinci_spi now support dt along with platform data,
respective boards need to switch into dm for the same.
Signed-off-by: Jagan Teki
---
drivers/spi/Kconfig| 12 +-
drivers/spi/davinci_spi.c | 275 +
include/dm/platform_data/spi_davinci.h | 15 ++
3 files changed, 90 insertions(+), 212 deletions(-)
create mode 100644 include/dm/platform_data/spi_davinci.h
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 5e73dd4296..9e3c290e42 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -70,6 +70,12 @@ config CADENCE_QSPI
used to access the SPI NOR flash on platforms embedding this
Cadence IP core.
+config DAVINCI_SPI
+ bool "Davinci & Keystone SPI driver"
+ depends on ARCH_DAVINCI || ARCH_KEYSTONE
+ help
+ Enable the Davinci SPI driver
+
config DESIGNWARE_SPI
bool "Designware SPI driver"
help
@@ -246,12 +252,6 @@ config FSL_QSPI
used to access the SPI NOR flash on platforms embedding this
Freescale IP core.
-config DAVINCI_SPI
- bool "Davinci & Keystone SPI driver"
- depends on ARCH_DAVINCI || ARCH_KEYSTONE
- help
- Enable the Davinci SPI driver
-
config SH_SPI
bool "SuperH SPI driver"
help
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index eda252d0b3..8fa5a22c78 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
/* SPIGCR0 */
#define SPIGCR0_SPIENA_MASK0x1
@@ -119,9 +120,6 @@ struct davinci_spi_regs {
/* davinci spi slave */
struct davinci_spi_slave {
-#ifndef CONFIG_DM_SPI
- struct spi_slave slave;
-#endif
struct davinci_spi_regs *regs;
unsigned int freq; /* current SPI bus frequency */
unsigned int mode; /* current SPI mode used */
@@ -241,11 +239,43 @@ static int davinci_spi_read_write(struct
davinci_spi_slave *ds, unsigned
return 0;
}
+static int davinci_spi_set_speed(struct udevice *bus, uint max_hz)
+{
+ struct davinci_spi_slave *ds = dev_get_priv(bus);
+
+ debug("%s speed %u\n", __func__, max_hz);
+ if (max_hz > CONFIG_SYS_SPI_CLK / 2)
+ return -EINVAL;
-static int __davinci_spi_claim_bus(struct davinci_spi_slave *ds, int cs)
+ ds->freq = max_hz;
+
+ return 0;
+}
+
+static int davinci_spi_set_mode(struct udevice *bus, uint mode)
{
+ struct davinci_spi_slave *ds = dev_get_priv(bus);
+
+ debug("%s mode %u\n", __func__, mode);
+ ds->mode = mode;
+
+ return 0;
+}
+
+static int davinci_spi_claim_bus(struct udevice *dev)
+{
+ struct dm_spi_slave_platdata *slave_plat =
+ dev_get_parent_platdata(dev);
+ struct udevice *bus = dev->parent;
+ struct davinci_spi_slave *ds = dev_get_priv(bus);
unsigned int mode = 0, scalar;
+ if (slave_plat->cs >= ds->num_cs) {
+ printf("Invalid SPI chipselect\n");
+ return -EINVAL;
+ }
+ ds->half_duplex = slave_plat->mode & SPI_PREAMBLE;
+
/* Enable the SPI hardware */
writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0);
udelay(1000);
@@ -255,7 +285,7 @@ static int __davinci_spi_claim_bus(struct davinci_spi_slave
*ds, int cs)
writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, &ds->regs->gcr1);
/* CS, CLK, SIMO and SOMI are functional pins */
- writel(((1 << cs) | SPIPC0_CLKFUN_MASK |
+ writel(((1 << slave_plat->cs) | SPIPC0_CLKFUN_MASK |
SPIPC0_DOFUN_MASK | SPIPC0_DIFUN_MASK), &ds->regs->pc0);
/* setup format */
@@ -293,20 +323,32 @@ static int __davinci_spi_claim_bus(struct
davinci_spi_slave *ds, int cs)
return 0;
}
-static int __davinci_spi_release_bus(struct davinci_spi_slave *ds)
+static int davinci_spi_release_bus(struct udevice *dev)
{
+ struct davinci_spi_slave *ds = dev_get_priv(dev->parent);
+
/* Disable the SPI hardware */
writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0);
return 0;
}
-static int __davinci_spi_xfer(struct davinci_spi_slave *ds,
- unsigned int bitlen, const void *dout, void *din,
- unsigned long flags)
+static int davinci_spi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din,
+ unsigned long flags)
{
+ struct dm_spi_slave_platdata *slave =
+ dev_get_parent_platdata(dev);
+ struct udevice *bus = dev->parent;
+ struct davinci_spi_slave *ds = dev_get_priv(bus);
unsigned int len;
+ if (slave->cs >= ds->num_cs) {
+ printf("Invalid SPI chipselect\n");
+ return -EINVAL;
+ }
+ ds->cur_cs = slave->cs;
+
if (bitlen == 0)
/* Finish any previously submitted transfers */
goto
[U-Boot] [PATCH v2 1/3] spi: omap3_spi: Full dm conversion
omap3_spi now support dt along with platform data,
respective boards need to switch into dm for the same.
Signed-off-by: Jagan Teki
Tested-by: Adam Ford #omap3_logic
---
drivers/spi/Kconfig | 14 +-
drivers/spi/omap3_spi.c | 340 +++
include/dm/platform_data/spi_omap3.h | 16 ++
3 files changed, 124 insertions(+), 246 deletions(-)
create mode 100644 include/dm/platform_data/spi_omap3.h
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 12dde8fb95..5e73dd4296 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -106,6 +106,13 @@ config MVEBU_A3700_SPI
used to access the SPI NOR flash on platforms embedding this
Marvell IP core.
+config OMAP3_SPI
+ bool "McSPI driver for OMAP"
+ help
+ SPI master controller for OMAP24XX and later Multichannel SPI
+ (McSPI). This driver be used to access SPI chips on platforms
+ embedding this OMAP3 McSPI IP core.
+
config PIC32_SPI
bool "Microchip PIC32 SPI driver"
depends on MACH_PIC32
@@ -297,11 +304,4 @@ config MXS_SPI
Enable the MXS SPI controller driver. This driver can be used
on the i.MX23 and i.MX28 SoCs.
-config OMAP3_SPI
- bool "McSPI driver for OMAP"
- help
- SPI master controller for OMAP24XX and later Multichannel SPI
- (McSPI). This driver be used to access SPI chips on platforms
- embedding this OMAP3 McSPI IP core.
-
endmenu # menu "SPI Support"
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 053a67bbe0..4760106f89 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -109,9 +110,6 @@ struct mcspi {
};
struct omap3_spi_priv {
-#ifndef CONFIG_DM_SPI
- struct spi_slave slave;
-#endif
struct mcspi *regs;
unsigned int cs;
unsigned int freq;
@@ -312,12 +310,16 @@ static int omap3_spi_txrx(struct omap3_spi_priv *priv,
unsigned int len,
return 0;
}
-static int _spi_xfer(struct omap3_spi_priv *priv, unsigned int bitlen,
-const void *dout, void *din, unsigned long flags)
+static int omap3_spi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
{
- unsigned intlen;
+ struct udevice *bus = dev->parent;
+ struct omap3_spi_priv *priv = dev_get_priv(bus);
+ struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+ unsigned int len;
int ret = -1;
+ priv->cs = slave_plat->cs;
if (priv->wordlen < 4 || priv->wordlen > 32) {
printf("omap3_spi: invalid wordlen %d\n", priv->wordlen);
return -1;
@@ -353,78 +355,6 @@ static int _spi_xfer(struct omap3_spi_priv *priv, unsigned
int bitlen,
return ret;
}
-static void _omap3_spi_set_speed(struct omap3_spi_priv *priv)
-{
- uint32_t confr, div = 0;
-
- confr = readl(&priv->regs->channel[priv->cs].chconf);
-
- /* Calculate clock divisor. Valid range: 0x0 - 0xC ( /1 - /4096 ) */
- if (priv->freq) {
- while (div <= 0xC && (OMAP3_MCSPI_MAX_FREQ / (1 << div))
- > priv->freq)
- div++;
- } else {
-div = 0xC;
- }
-
- /* set clock divisor */
- confr &= ~OMAP3_MCSPI_CHCONF_CLKD_MASK;
- confr |= div << 2;
-
- omap3_spi_write_chconf(priv, confr);
-}
-
-static void _omap3_spi_set_mode(struct omap3_spi_priv *priv)
-{
- uint32_t confr;
-
- confr = readl(&priv->regs->channel[priv->cs].chconf);
-
- /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
-* REVISIT: this controller could support SPI_3WIRE mode.
-*/
- if (priv->pin_dir == MCSPI_PINDIR_D0_IN_D1_OUT) {
- confr &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
- confr |= OMAP3_MCSPI_CHCONF_DPE0;
- } else {
- confr &= ~OMAP3_MCSPI_CHCONF_DPE0;
- confr |= OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1;
- }
-
- /* set SPI mode 0..3 */
- confr &= ~(OMAP3_MCSPI_CHCONF_POL | OMAP3_MCSPI_CHCONF_PHA);
- if (priv->mode & SPI_CPHA)
- confr |= OMAP3_MCSPI_CHCONF_PHA;
- if (priv->mode & SPI_CPOL)
- confr |= OMAP3_MCSPI_CHCONF_POL;
-
- /* set chipselect polarity; manage with FORCE */
- if (!(priv->mode & SPI_CS_HIGH))
- confr |= OMAP3_MCSPI_CHCONF_EPOL; /* active-low; normal */
- else
- confr &= ~OMAP3_MCSPI_CHCONF_EPOL;
-
- /* Transmit & receive mode */
- confr &= ~OMAP3_MCSPI_CHCONF_TRM_MASK;
-
- omap3_spi_write_chconf(priv, confr);
-}
-
-static void _omap3_spi_set_wordlen(struct omap3_spi_priv *priv)
-{
- unsigned int confr;
-
[U-Boot] [PATCH v2 0/3] spi: ompa3/davinci/ti_qspi: Full dm conversion
This series add full dm conversion for omap3_spi, davanci and ti_qspi drivers. Now it call to respective board maintainers to switch DM_SPI and DM_SPI_FLASH before migration deadline. Changes for v2: - New patch for ti_qspi changes Jagan Teki (3): spi: omap3_spi: Full dm conversion spi: davinci: Full dm conversion spi: ti_qspi: Full dm conversion drivers/spi/Kconfig| 26 +- drivers/spi/davinci_spi.c | 275 +- drivers/spi/omap3_spi.c| 340 +++ drivers/spi/ti_qspi.c | 490 - include/dm/platform_data/spi_davinci.h | 15 + include/dm/platform_data/spi_omap3.h | 16 ++ include/dm/platform_data/spi_ti_qspi.h | 19 ++ 7 files changed, 410 insertions(+), 771 deletions(-) create mode 100644 include/dm/platform_data/spi_davinci.h create mode 100644 include/dm/platform_data/spi_omap3.h create mode 100644 include/dm/platform_data/spi_ti_qspi.h -- 2.14.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/3] mmc: ftsdc010: Support High-Speed mode
From: Rick Chen ftsdc010 dm driver has been disable High-Speed mode as default to work around Andes AE3XX platform's problem, because of it does not support High-Speed mode in commit id 73cd56b2df213c629191139e5c6705e069b6214f. But other platforms or SoCs maybe support this function. So High-Speed mode can be enabled from dts with cap-mmc-highspeed or cap-sd-highspeed property. Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- drivers/mmc/nds32_mmc.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/nds32_mmc.c b/drivers/mmc/nds32_mmc.c index 6d3c857..ec43e9d 100644 --- a/drivers/mmc/nds32_mmc.c +++ b/drivers/mmc/nds32_mmc.c @@ -103,6 +103,11 @@ static int nds32_mmc_probe(struct udevice *dev) if (ret < 0) return ret; #endif + + if (dev_read_bool(dev, "cap-mmc-highspeed") || \ + dev_read_bool(dev, "cap-sd-highspeed")) + chip->caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz; + ftsdc_setup_cfg(&plat->cfg, dev->name, chip->buswidth, chip->caps, priv->minmax[1] , priv->minmax[0]); chip->mmc = &plat->mmc; -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/3] nds32: dts: AG101P support sd High-Speed mode
From: Rick Chen Enable High-Speed mode with cap-sd-highspeed in dts Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/nds32/dts/ag101p.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts index 19dc36f..7832efb 100644 --- a/arch/nds32/dts/ag101p.dts +++ b/arch/nds32/dts/ag101p.dts @@ -67,5 +67,6 @@ fifo-depth = <0x10>; reg = <0x98e0 0x1000>; interrupts = <5 4>; + cap-sd-highspeed; }; }; -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/3] riscv: dts: AE250 support sd High-Speed mode
From: Rick Chen
Enable High-Speed mode with cap-sd-highspeed in dts.
Signed-off-by: Rick Chen
Signed-off-by: Rick Chen
---
arch/riscv/dts/ae250.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/dts/ae250.dts b/arch/riscv/dts/ae250.dts
index 5dc4fb0..9a38345 100644
--- a/arch/riscv/dts/ae250.dts
+++ b/arch/riscv/dts/ae250.dts
@@ -74,6 +74,7 @@
fifo-depth = <0x10>;
reg = <0xf0e0 0x1000>;
interrupts = <17 4>;
+ cap-sd-highspeed;
};
spi: spi@f0b0 {
--
2.7.4
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[U-Boot] [PATCH] ARM: uniphier: dts: sync with Linux 4.16-rc5
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ld11.dtsi| 3 +++
arch/arm/dts/uniphier-ld4.dtsi | 21 +
arch/arm/dts/uniphier-pro4-ref.dts | 4
arch/arm/dts/uniphier-pro4.dtsi| 25 +
arch/arm/dts/uniphier-pro5.dtsi| 33 +
arch/arm/dts/uniphier-pxs2.dtsi| 18 ++
arch/arm/dts/uniphier-pxs3-ref.dts | 8
arch/arm/dts/uniphier-pxs3.dtsi| 4 ++--
arch/arm/dts/uniphier-sld8.dtsi| 21 +
9 files changed, 135 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index 40f27bb..8b5b363 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -352,6 +352,7 @@
<&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
+ has-transaction-translator;
};
usb1: usb@5a810100 {
@@ -365,6 +366,7 @@
<&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
+ has-transaction-translator;
};
usb2: usb@5a820100 {
@@ -378,6 +380,7 @@
<&mio_clk 14>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
<&mio_rst 14>;
+ has-transaction-translator;
};
mioctrl@5b3e {
diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index 4f8f386..0393bce 100644
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -276,6 +276,7 @@
<&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
+ has-transaction-translator;
};
usb1: usb@5a810100 {
@@ -289,6 +290,7 @@
<&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
+ has-transaction-translator;
};
usb2: usb@5a820100 {
@@ -302,6 +304,7 @@
<&mio_clk 14>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
<&mio_rst 14>;
+ has-transaction-translator;
};
soc-glue@5f80 {
@@ -314,6 +317,24 @@
};
};
+ soc-glue@5f90 {
+ compatible = "socionext,uniphier-ld4-soc-glue-debug",
+"simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x5f90 0x2000>;
+
+ efuse@100 {
+ compatible = "socionext,uniphier-efuse";
+ reg = <0x100 0x28>;
+ };
+
+ efuse@130 {
+ compatible = "socionext,uniphier-efuse";
+ reg = <0x130 0x8>;
+ };
+ };
+
timer@6200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x6200 0x20>;
diff --git a/arch/arm/dts/uniphier-pro4-ref.dts
b/arch/arm/dts/uniphier-pro4-ref.dts
index 3f9ce6d..c2466cd 100644
--- a/arch/arm/dts/uniphier-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-pro4-ref.dts
@@ -91,3 +91,7 @@
&usb1 {
status = "okay";
};
+
+&nand {
+ status = "okay";
+};
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 9b3ce13..e9d3a3d 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -327,6 +327,7 @@
<&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
+ has-transaction-translator;
};
usb3: usb@5a810100 {
@@ -340,6 +341,7 @@
<&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
+ has-transaction-translator;
};
soc-glue@5f80 {
@@ -352,6 +354,29 @@
};
};
+ soc-glue@5f90 {
+ compatible = "socionext,uniphier-pro4-soc-glue-debug",
+
[U-Boot] [PATCH] davinci: omapl138_lcdk: fix PLL0 frequency
commit 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
changed the PLL0 frequency to 456MHz, which is needed for the LCDC IP
block. However, in doing so, it caused the PLLOUT clock to be outside
of the allowable specifications given in the OMAP-L138 data sheet. (It
says PLLOUT must be 600MHz max). It also uses a PLLM value outside of
the range given in the TRM (it says PLLM must in the range 0 to 0x1f).
So here is what we have currently:
PLLOUT = 24 / (0 + 1) * (37 + 1) = 912MHz (out of spec)
^ ^ ^
CLKIN PREDIVPLLM (out of spec)
input to PLLDIVn = 912 / (1 + 1) = 456MHz (desired result)
^ ^
PLLOUT POSTDIV
This changes the PLLM value to 18 and the POSTDIV value to 0 so that
PLLOUT is now within specification but we still get the desired
result.
PLLOUT = 24 / (0 + 1) * (18 + 1) = 456MHz (within spec)
^ ^ ^
CLKIN PREDIV PLLM
input to PLLDIVn = 456 / (0 + 1) = 456MHz (desired result)
^ ^
PLLOUT POSTDIV
Fixes: 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
Signed-off-by: David Lechner
---
FYI, I haven't been able to test this patch yet. The changes affect the SPL
image, which has to be flashed to SPI. I am having trouble with the flash
utility[1] running on Linux. It gets stuck at:
0% [ ]
Programming application into flash...
So, if anyone has some advice on how to make it work or can test the patch,
that would be helpful.
However, the bootloader on my LCDK is using these values already, so I expect
this to work as advertized.
[1]:
http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138
configs/omapl138_lcdk_defconfig | 1 +
include/configs/omapl138_lcdk.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index ccb308b..0a2af11 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_SYS_TEXT_BASE=0xc108
CONFIG_TARGET_OMAPL138_LCDK=y
+CONFIG_SYS_DA850_PLL0_POSTDIV=0
CONFIG_SYS_DA850_PLL1_PLLDIV3=0x8003
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index ea7bdf1..1e1c66b 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -57,7 +57,8 @@
* PLL configuration
*/
-#define CONFIG_SYS_DA850_PLL0_PLLM 37
+/* Requires CONFIG_SYS_DA850_PLL0_POSTDIV=0, set in Kconfig */
+#define CONFIG_SYS_DA850_PLL0_PLLM 18
#define CONFIG_SYS_DA850_PLL1_PLLM 21
/*
--
2.7.4
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[U-Boot] U-boot Hush Environment
In the past the Hush shell would print a variable when edited, and on could back arrow (move position) or backspace (delete characters). Currently is does not print the command on edit, and if one hits carriage return the variable is deleted. Is this an enhancement, or do I have the configuration incorrect? How can I make it do what was the default behavior? If it is an enhancement, It's not very user friendly. It makes IBM's VM/370 edit command look positively useful. Thanks Duncan Hare (d...@synoia.com) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 7/7] test/py: add spi_flash tests
Hi, On Wed, 14 Mar 2018 at 19:27 Stephen Warren wrote: > On 03/14/2018 05:15 PM, Liam Beguin wrote: > > Add basic tests for the spi_flash subsystem. > > > > Signed-off-by: Liam Beguin > > Reviewed-by: Stephen Warren > > It's useful if you put a brief description of what changed between patch > versions below the --- line so people know whether they care about > re-reviewing the patch. It had to diff the v3/v4 patch content to > remember/realize that v4 doesn't change anything except the (c) statement. > I added it to the cover-letter but I'll also include it here next time. Thanks again, Liam ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 7/7] test/py: add spi_flash tests
On 03/14/2018 05:15 PM, Liam Beguin wrote: Add basic tests for the spi_flash subsystem. Signed-off-by: Liam Beguin Reviewed-by: Stephen Warren It's useful if you put a brief description of what changed between patch versions below the --- line so people know whether they care about re-reviewing the patch. It had to diff the v3/v4 patch content to remember/realize that v4 doesn't change anything except the (c) statement. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 3/7] test/py: README: fix typo
Fix a minor typo causing vim (and possibly other) to get confused with coloring. Signed-off-by: Liam Beguin Reviewed-by: Stephen Warren --- test/py/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/py/README.md b/test/py/README.md index eefac377567a..000afce93c4a 100644 --- a/test/py/README.md +++ b/test/py/README.md @@ -150,7 +150,7 @@ processing. option takes a single argument which is used to filter test names. Simple logical operators are supported. For example: - `'ums'` runs only tests with "ums" in their name. - - ``ut_dm'` runs only tests with "ut_dm" in their name. Note that in this + - `'ut_dm'` runs only tests with "ut_dm" in their name. Note that in this case, "ut_dm" is a parameter to a test rather than the test name. The full test name is e.g. "test_ut[ut_dm_leak]". - `'not reset'` runs everything except tests with "reset" in their name. -- 2.16.1.72.g5be1f00a9a70 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 4/7] test/py: README: add HOSTNAME to PYTHONPATH
As opposed to PATH, HOSTNAME is not appended to PYTHONPATH
automatically. Lets add it to the examples to make it more
obvious to new users.
Signed-off-by: Liam Beguin
Reviewed-by: Stephen Warren
---
test/py/README.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/test/py/README.md b/test/py/README.md
index 000afce93c4a..aed2fd063a81 100644
--- a/test/py/README.md
+++ b/test/py/README.md
@@ -320,7 +320,7 @@ If U-Boot has already been built:
```bash
PATH=$HOME/ubtest/bin:$PATH \
-PYTHONPATH=${HOME}/ubtest/py:${PYTHONPATH} \
+PYTHONPATH=${HOME}/ubtest/py/${HOSTNAME}:${PYTHONPATH} \
./test/py/test.py --bd seaboard
```
@@ -331,7 +331,7 @@ follow:
```bash
CROSS_COMPILE=arm-none-eabi- \
PATH=$HOME/ubtest/bin:$PATH \
-PYTHONPATH=${HOME}/ubtest/py:${PYTHONPATH} \
+PYTHONPATH=${HOME}/ubtest/py/${HOSTNAME}:${PYTHONPATH} \
./test/py/test.py --bd seaboard --build
```
--
2.16.1.72.g5be1f00a9a70
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[U-Boot] [PATCH v4 5/7] test/py: do not import pytest multiple times
Signed-off-by: Liam Beguin Reviewed-by: Stephen Warren --- test/py/u_boot_utils.py | 1 - 1 file changed, 1 deletion(-) diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py index 9acb92ddc448..64584494e463 100644 --- a/test/py/u_boot_utils.py +++ b/test/py/u_boot_utils.py @@ -11,7 +11,6 @@ import os.path import pytest import sys import time -import pytest def md5sum_data(data): """Calculate the MD5 hash of some data. -- 2.16.1.72.g5be1f00a9a70 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 7/7] test/py: add spi_flash tests
Add basic tests for the spi_flash subsystem.
Signed-off-by: Liam Beguin
Reviewed-by: Stephen Warren
---
test/py/tests/test_sf.py | 218 +++
1 file changed, 218 insertions(+)
create mode 100644 test/py/tests/test_sf.py
diff --git a/test/py/tests/test_sf.py b/test/py/tests/test_sf.py
new file mode 100644
index ..efcd753c1abe
--- /dev/null
+++ b/test/py/tests/test_sf.py
@@ -0,0 +1,218 @@
+# Copyright (c) 2016, Xilinx Inc. Michal Simek
+# Copyright (c) 2017, Xiphos Systems Corp. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0
+
+import re
+import pytest
+import random
+import u_boot_utils
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+which SPI Flash areas are available for testing. Without this, this test will
+be automatically skipped.
+For example:
+
+# A list of sections of Flash memory to be tested.
+env__sf_configs = (
+{
+# Where in SPI Flash should the test operate.
+'offset': 0x,
+# This value is optional.
+# If present, specifies the [[bus:]cs] argument used in `sf probe`
+# If missing, defaults to 0.
+'id': '0:1',
+# This value is optional.
+# If set as a number, specifies the speed of the SPI Flash.
+# If set as an array of 2, specifies a range for a random speed.
+# If missing, defaults to 0.
+'speed': 100,
+# This value is optional.
+# If present, specifies the size to use for read/write operations.
+# If missing, the SPI Flash page size is used as a default (based on
+# the `sf probe` output).
+'len': 0x1,
+# This value is optional.
+# If present, specifies if the test can write to Flash offset
+# If missing, defaults to False.
+'writeable': False,
+# This value is optional.
+# If present, specifies the expected CRC32 value of the flash area.
+# If missing, extra check is ignored.
+'crc32': 0xCAFECAFE,
+},
+)
+"""
+
+def sf_prepare(u_boot_console, env__sf_config):
+"""Check global state of the SPI Flash before running any test.
+
+ Args:
+u_boot_console: A U-Boot console connection.
+env__sf_config: The single SPI Flash device configuration on which to
+run the tests.
+
+Returns:
+sf_params: a dictionnary of SPI Flash parameters.
+"""
+
+sf_params = {}
+sf_params['ram_base'] = u_boot_utils.find_ram_base(u_boot_console)
+
+probe_id = env__sf_config.get('id', 0)
+speed = env__sf_config.get('speed', 0)
+if isinstance(speed, int):
+sf_params['speed'] = speed
+else:
+assert len(speed) == 2, "If speed is a list, it must have 2 entries"
+sf_params['speed'] = random.randint(speed[0], speed[1])
+
+cmd = 'sf probe %d %d' % (probe_id, sf_params['speed'])
+
+output = u_boot_console.run_command(cmd)
+assert 'SF: Detected' in output, 'No Flash device available'
+
+m = re.search('page size (.+?) Bytes', output)
+assert m, 'SPI Flash page size not recognized'
+sf_params['page_size'] = int(m.group(1))
+
+m = re.search('erase size (.+?) KiB', output)
+assert m, 'SPI Flash erase size not recognized'
+sf_params['erase_size'] = int(m.group(1))
+sf_params['erase_size'] *= 1024
+
+m = re.search('total (.+?) MiB', output)
+assert m, 'SPI Flash total size not recognized'
+sf_params['total_size'] = int(m.group(1))
+sf_params['total_size'] *= 1024 * 1024
+
+assert 'offset' in env__sf_config, \
+'\'offset\' is required for this test.'
+sf_params['len'] = env__sf_config.get('len', sf_params['erase_size'])
+
+assert not env__sf_config['offset'] % sf_params['erase_size'], \
+'offset not multiple of erase size.'
+assert not sf_params['len'] % sf_params['erase_size'], \
+'erase length not multiple of erase size.'
+
+assert not (env__sf_config.get('writeable', False) and
+'crc32' in env__sf_config), \
+'Cannot check crc32 on writeable sections'
+
+return sf_params
+
+def sf_read(u_boot_console, env__sf_config, sf_params):
+"""Helper function used to read and compute the CRC32 value of a section of
+SPI Flash memory.
+
+Args:
+u_boot_console: A U-Boot console connection.
+env__sf_config: The single SPI Flash device configuration on which to
+run the tests.
+sf_params: SPI Flash parameters.
+
+Returns:
+CRC32 value of SPI Flash section
+"""
+
+addr = sf_params['ram_base']
+offset = env__sf_config['offset']
+count = sf_params['len']
+pattern = random.randint(0, 0xFF)
+crc_expected = env__sf_config.get('crc32', None)
+
+cmd = 'mw.b %08x %02x %x' % (addr, pattern, count)
+u_boot_console.run_command(cmd)
+crc_pattern = u_boot_utils.crc32(u_boot_console, addr, count)
+
[U-Boot] [PATCH v4 6/7] test/py: add generic CRC32 function
Add a generic function which can be used to compute the CRC32 value of
a region of RAM.
Signed-off-by: Liam Beguin
Reviewed-by: Stephen Warren
---
test/py/u_boot_utils.py | 23 +++
1 file changed, 23 insertions(+)
diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py
index 64584494e463..de9ee2643f51 100644
--- a/test/py/u_boot_utils.py
+++ b/test/py/u_boot_utils.py
@@ -11,6 +11,7 @@ import os.path
import pytest
import sys
import time
+import re
def md5sum_data(data):
"""Calculate the MD5 hash of some data.
@@ -310,3 +311,25 @@ def persistent_file_helper(u_boot_log, filename):
"""
return PersistentFileHelperCtxMgr(u_boot_log, filename)
+
+def crc32(u_boot_console, address, count):
+"""Helper function used to compute the CRC32 value of a section of RAM.
+
+Args:
+u_boot_console: A U-Boot console connection.
+address: Address where data starts.
+count: Amount of data to use for calculation.
+
+Returns:
+CRC32 value
+"""
+
+bcfg = u_boot_console.config.buildconfig
+has_cmd_crc32 = bcfg.get('config_cmd_crc32', 'n') == 'y'
+assert has_cmd_crc32, 'Cannot compute crc32 without CONFIG_CMD_CRC32.'
+output = u_boot_console.run_command('crc32 %08x %x' % (address, count))
+
+m = re.search('==> ([0-9a-fA-F]{8})$', output)
+assert m, 'CRC32 operation failed.'
+
+return m.group(1)
--
2.16.1.72.g5be1f00a9a70
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[U-Boot] [PATCH v4 2/7] cmd: sf: fix map_physmem check
Make sure 0x00 is a valid address to read to. If `addr` is 0x00 then
map_physmem() will return 0 which should be a valid address.
Signed-off-by: Liam Beguin
Reviewed-by: Stephen Warren
---
cmd/sf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/sf.c b/cmd/sf.c
index f971eec781cc..e7ff9a646208 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -287,7 +287,7 @@ static int do_spi_flash_read_write(int argc, char * const
argv[])
}
buf = map_physmem(addr, len, MAP_WRBACK);
- if (!buf) {
+ if (!buf && addr) {
puts("Failed to map physical memory\n");
return 1;
}
--
2.16.1.72.g5be1f00a9a70
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[U-Boot] [PATCH v4 0/7] add inital SF tests
Hi all,
This is the inital step to adding tests for the SF subsystem plus very
minor fixes. It is based on work I found on the mailing list[1].
For now, it doesn't do much but I plan on adding code to reset the flash
to its initial state (based on an env flag) and more code to test the
`sf protect` subcommand (which is the main goal of this series).
I'm sending it now to make sure it's headed in the right direction.
Base on Stephen's comment[2], I haven't added the radomized features.
I'll see how this iteration goes and maybe add it later.
Changes since v3:
- add Xilinx copyright notice since it's loosely based on their patch
- add Reviewed-by tags
Changes since v2:
- remove double blank lines
- in sf_prepare, fix the way `speed` is read from env__sf_config
- in sf_prepare, fix assert of env__sf_config['offset']
- in sf_prepare, do not fail if env__sf_config['crc32'] == 0
- in sf_{read,update}, `pattern` is in bytes. Make sure md/mw use the
right sizes.
- in sf_{read,update}, rename `crc_read` to `crc_pattern` when
appropriate
- add missing pytest.mark on test_sf_update
Changes since v1:
- remove unnecessary skip flag from environment
- move crc32() to u_boot_utils.py and add extra checks
- rewrite sf_prepare to return a dict of parameter
- use assert instead of pytest.fail
- remove verbose from sf_prepare()
- update documentation
- improve readability
- use ' consistently instead of "
- use sf_read() in test_sf_read()
- rename crc variables
- add speed parameter with optional random range
- allow `sf read` to write at 0x00
Thanks,
Liam Beguin
[ 1 ] https://patchwork.ozlabs.org/patch/623061/
[ 2 ] https://lists.denx.de/pipermail/u-boot/2018-March/321688.html
Liam Beguin (7):
spi: spi_flash: do not fail silently on bad user input
cmd: sf: fix map_physmem check
test/py: README: fix typo
test/py: README: add HOSTNAME to PYTHONPATH
test/py: do not import pytest multiple times
test/py: add generic CRC32 function
test/py: add spi_flash tests
cmd/sf.c| 2 +-
drivers/mtd/spi/spi_flash.c | 2 +-
test/py/README.md | 6 +-
test/py/tests/test_sf.py| 218
test/py/u_boot_utils.py | 24 -
5 files changed, 246 insertions(+), 6 deletions(-)
create mode 100644 test/py/tests/test_sf.py
base-commit: f95ab1fb6e37f0601f397091bb011edf7a98b890
Published-As: https://github.com/Liambeguin/u-boot/releases/tag/test_sf-v4
--
2.16.1.72.g5be1f00a9a70
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[U-Boot] [PATCH v4 1/7] spi: spi_flash: do not fail silently on bad user input
Make sure the user is notified instead of silently returning an error.
Signed-off-by: Liam Beguin
Reviewed-by: Stephen Warren
---
drivers/mtd/spi/spi_flash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 294d9f9d79c6..2e61685d3ea4 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -320,7 +320,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32
offset, size_t len)
erase_size = flash->erase_size;
if (offset % erase_size || len % erase_size) {
- debug("SF: Erase offset/length not multiple of erase size\n");
+ printf("SF: Erase offset/length not multiple of erase size\n");
return -1;
}
--
2.16.1.72.g5be1f00a9a70
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Re: [U-Boot] [PATCH 1/2] ARM: dts: zynq: Update dts for Z-turn board
Hi Alexander,
device_type = "memory";
reg = <0x0 0x4000>;
};
chosen {
- stdout-path = "serial0:115200n8";
Nack. By default graphical output is quite unusable on this board, so we
want to output to serial.
If your Linux submitted device tree doesn't contain this part, please
fix it there.
+ bootargs = "console=ttyPS0,115200 earlyprintk root=/dev/mmcblk0p2
rootwait";
This is even worse. Please don't prepopulate any bootargs, otherwise
people may end up assuming that they're actually getting used.
The older one is much cleaner I agree, thank you. I'll just need to test
with both u-boot and linux.
};
gpio-leds {
compatible = "gpio-leds";
- led_r {
- label = "led_r";
- gpios = <&gpio0 0x72 0x1>;
- default-state = "on";
- linux,default-trigger = "heartbeat";
- };
-
- led_g {
- label = "led_g";
- gpios = <&gpio0 0x73 0x1>;
- default-state = "on";
- linux,default-trigger = "heartbeat";
- };
-
- led_b {
- label = "led_b";
- gpios = <&gpio0 0x74 0x1>;
- default-state = "on";
- linux,default-trigger = "heartbeat";
- };
Why remove them? They're hard wired on the board, no?
No this RGB LED is connected to PL, that's for sure.
ps-clk-frequency = <>;
- fclk-enable = <0xf>;
Why?
IIRC on my Z-Turn, I had to take a PL clock back into the PS as AXI
reference clock. See "Connect clocks" here:
https://wiki.hackerspace.pl/projects:zturn-hackers:helloworld
So we need to have the PL clock enabled, no? Or is that only needed for
PL AXI peripherals?
As far as I understand M_AXI_GPn connects AXI slaves implemented on PL
to AXI and S_AXI_HPn provides access for AXI slaves in PS to PL slaves.
So both involve PL and can be disconnected if PL is not clocked.
};
&qspi {
@@ -152,8 +114,8 @@
reg = <0x49>;
};
- adxl345@53 {
- compatible = "adi,adxl34x", "adxl34x";
+ accelerometer@53 {
+ compatible = "adi,adxl345", "adxl345";
You can't just remove compatibles. Device trees are supposed to be
compatible with whatever used them before someone thought they want to
prettify them, so in this case you'd have to add the concrete names in
the list before the abstract ones:
compatible = "adi,adxl345", "adxl345", "adi,adxl34x", "adxl34x";
Yes sorry, I didn't realize that Linux kernel had both.
Best,
Anton
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Re: [U-Boot] [PATCH v2 1/1] board: am335x: Set serial# variable
On 28 February 2018 at 00:31, Tom Rini wrote: > On Wed, Feb 28, 2018 at 12:26:15AM +0200, Sam Protsenko wrote: > >> serial# variable is needed to show the device correctly in "fastboot >> devices" output. It's useful when we have several devices (in fastboot >> mode) connected to single host and want to choose which one to flash. >> >> We can't use omap_die_id_serial() for this, because AM335x lacks >> DIE_ID, as can be seen from AM335x TRM. Let's do next: >> - reuse board_serial variable (obtained from EEPROM in >>set_board_info_env() function) to set serial# >> - if board_serial is "unknown", reuse ethaddr variable to set serial# >> >> Signed-off-by: Sam Protsenko > > Reviewed-by: Tom Rini > Bump. Please merge it if it's ok. Thanks. > -- > Tom ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] efi_loader: correctly support parameter delta in Blt
In the Blt service of the EFI_GRAPHICS_OUTPUT_PROTOCOL the parameter delta
is measured in bytes and not in pixels.
The coding only supports delta being a multiple of four. The UEFI
specification does not explicitly require this but as pixels have a size of
four bytes we should be able to assume four byte alignment.
The corresponding unit test is corrected, too. It can be launched with
setenv efi_selftest block image transfer
bootefi selftest
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_gop.c | 32 +++-
lib/efi_selftest/efi_selftest_bitblt.c | 4 ++--
2 files changed, 29 insertions(+), 7 deletions(-)
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 154f306540..ac92109f16 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -77,6 +77,24 @@ static inline u16 efi_blt_col_to_vid16(struct efi_gop_pixel
*blt)
(u16)(blt->blue >> 3);
}
+/*
+ * Copy rectangle.
+ *
+ * This function implements the Blt service of the
EFI_GRAPHICS_OUTPUT_PROTOCOL.
+ * See the Unified Extensible Firmware Interface (UEFI) specification for
+ * details.
+ *
+ * @this: EFI_GRAPHICS_OUTPUT_PROTOCOL
+ * @buffer:pixel buffer
+ * @sx:source x-coordinate
+ * @sy:source y-coordinate
+ * @dx:destination x-coordinate
+ * @dy:destination y-coordinate
+ * @width: width of rectangle
+ * @height:height of rectangle
+ * @delta: length in bytes of a line in the pixel buffer (optional)
+ * @return:status code
+ */
efi_status_t EFIAPI gop_blt(struct efi_gop *this, struct efi_gop_pixel *buffer,
u32 operation, efi_uintn_t sx,
efi_uintn_t sy, efi_uintn_t dx,
@@ -88,14 +106,18 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, struct
efi_gop_pixel *buffer,
u32 *fb32 = gopobj->fb;
u16 *fb16 = gopobj->fb;
- if (delta)
- linelen = delta;
- else
- linelen = width;
-
EFI_ENTRY("%p, %p, %u, %zu, %zu, %zu, %zu, %zu, %zu, %zu", this,
buffer, operation, sx, sy, dx, dy, width, height, delta);
+ if (delta) {
+ /* Check for 4 byte alignment */
+ if (delta & 3)
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
+ linelen = delta >> 2;
+ } else {
+ linelen = width;
+ }
+
/* Check source rectangle */
switch (operation) {
case EFI_BLT_VIDEO_FILL:
diff --git a/lib/efi_selftest/efi_selftest_bitblt.c
b/lib/efi_selftest/efi_selftest_bitblt.c
index 53cc633acc..0fb76cc727 100644
--- a/lib/efi_selftest/efi_selftest_bitblt.c
+++ b/lib/efi_selftest/efi_selftest_bitblt.c
@@ -87,7 +87,7 @@ static void EFIAPI notify(struct efi_event *event, void
*context)
/* Copy image to video */
gop->blt(gop, bitmap, EFI_BLT_BUFFER_TO_VIDEO, sx, 0, dx, DEPTH,
-width, HEIGHT, WIDTH);
+width, HEIGHT, WIDTH * sizeof(struct efi_gop_pixel));
}
/*
@@ -276,7 +276,7 @@ static int execute(void)
/* Copy port holes back to buffer */
ret = gop->blt(gop, bitmap, EFI_BLT_VIDEO_TO_BLT_BUFFER,
94, 57 + DEPTH, 94, 57,
- 90, 26, WIDTH);
+ 90, 26, WIDTH * sizeof(struct efi_gop_pixel));
if (ret != EFI_SUCCESS) {
efi_st_error("EFI_BLT_VIDEO_TO_BLT_BUFFER failed\n");
return EFI_ST_FAILURE;
--
2.14.2
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Re: [U-Boot] Pull request: u-boot-spi/master
On Thu, Mar 15, 2018 at 12:08 AM, Adam Ford wrote: > On Wed, Mar 14, 2018 at 12:39 PM, Jagan Teki > wrote: >> On Wed, Mar 14, 2018 at 10:57 PM, Tom Rini wrote: >>> On Wed, Mar 14, 2018 at 07:32:07PM +0530, Jagan Teki wrote: >>> Hi Tom, Please pull this PR. thanks, Jagan. The following changes since commit f95ab1fb6e37f0601f397091bb011edf7a98b890: Prepare v2018.03 (2018-03-13 08:02:19 -0400) are available in the Git repository at: git://git.denx.de/u-booti-spi.git master for you to fetch changes up to 3e4ef60403c626cf6c9a5f3d1f600bc9a39f3ce5: omap3_logic: Enable DM_SPI (2018-03-13 19:50:10 +0530) >>> >>> NAK, omap3_logic no longer builds with this PR. >> >> Ahh, missed one local patch will resend the PR with updated patch. sorry. > > Can you CC me on the final patch so I can re-verify? I won't > necessarily see the post if it just goes to the mailing list. Here is the fix [1] [1] https://patchwork.ozlabs.org/patch/885976/ ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-spi/master
On Wed, Mar 14, 2018 at 12:39 PM, Jagan Teki wrote: > On Wed, Mar 14, 2018 at 10:57 PM, Tom Rini wrote: >> On Wed, Mar 14, 2018 at 07:32:07PM +0530, Jagan Teki wrote: >> >>> Hi Tom, >>> >>> Please pull this PR. >>> >>> thanks, >>> Jagan. >>> >>> The following changes since commit f95ab1fb6e37f0601f397091bb011edf7a98b890: >>> >>> Prepare v2018.03 (2018-03-13 08:02:19 -0400) >>> >>> are available in the Git repository at: >>> >>> git://git.denx.de/u-booti-spi.git master >>> >>> for you to fetch changes up to 3e4ef60403c626cf6c9a5f3d1f600bc9a39f3ce5: >>> >>> omap3_logic: Enable DM_SPI (2018-03-13 19:50:10 +0530) >>> >> >> NAK, omap3_logic no longer builds with this PR. > > Ahh, missed one local patch will resend the PR with updated patch. sorry. Can you CC me on the final patch so I can re-verify? I won't necessarily see the post if it just goes to the mailing list. adam > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] efi_loader: Allow width smaller than buffer stride in efi_gop Blt()
On Wed, 2018-03-14 at 18:21 +0100, Heinrich Schuchardt wrote:
@@ -87,7 +93,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
> > *buffer,
> > for (i = 0; i < height; i++) {
> > u32 *dest = fb + ((i + dy) * line_len32) +
> > (dx * sizeof(u32));
> > - u32 *src = buffer + ((i + sy) * line_len32) +
> > + u32 *src = buffer + ((i + sy) * buffer_stride) +
> > (sx * sizeof(u32));
> >
> > /* Same color format, just memcpy */
> > @@ -102,7 +108,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
> > *buffer,
> > for (i = 0; i < height; i++) {
> > u16 *dest = fb + ((i + dy) * line_len16) +
> > (dx * sizeof(u16));
> > - u32 *src = buffer + ((i + sy) * line_len32) +
> > + u32 *src = buffer + ((i + sy) * buffer_stride) +
> If delta cannot be divided by 4 a misaligned access error will occur on
> arm64.
This is unlikely because EFI spec allows only 32-bit pixel data in BLT buffer,
regardless of actual video frame buffer pixel format.
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Re: [U-Boot] [PATCH] spi: omap3: Fix redeclared error
On Wed, Mar 14, 2018 at 11:15 PM, Jagan Teki wrote: > omap3_spi_set_speed|mode redeclared bus symbol, fix the same. > > error: > drivers/spi/omap3_spi.c: In function ‘omap3_spi_set_speed’: > drivers/spi/omap3_spi.c:650:18: error: ‘bus’ redeclared as different kind of > symbol > struct udevice *bus = dev->parent; > > Signed-off-by: Jagan Teki > --- Applied to u-boot-spi/master ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [v2] Pull request: u-boot-spi/master
Hi Tom, Please pull this PR. Change for v2: - include missing patch thanks, Jagan. The following changes since commit f95ab1fb6e37f0601f397091bb011edf7a98b890: Prepare v2018.03 (2018-03-13 08:02:19 -0400) are available in the Git repository at: git://git.denx.de/u-boot-spi.git master for you to fetch changes up to 4d1dd69e5f12208ed3d04f99fd9b2a1e926f89cd: omap3_logic: Enable DM_SPI (2018-03-14 23:19:31 +0530) Adam Ford (1): omap3_logic: Enable DM_SPI Jagan Teki (4): spi: atcspi200: Drop non-dm code spi: omap3: Skip set_mode, set_speed from claim arm: sunxi: Move spl spi sunxi code to mach-sunxi spi: omap3: Fix redeclared error arch/arm/mach-sunxi/Kconfig| 8 ++ arch/arm/mach-sunxi/Makefile | 1 + .../arm/mach-sunxi/spl_spi_sunxi.c | 0 configs/omap3_logic_defconfig | 1 + drivers/mtd/spi/Kconfig| 13 drivers/mtd/spi/Makefile | 1 - drivers/spi/Kconfig| 14 ++-- drivers/spi/atcspi200_spi.c| 87 -- drivers/spi/omap3_spi.c| 25 +-- 9 files changed, 35 insertions(+), 115 deletions(-) rename drivers/mtd/spi/sunxi_spi_spl.c => arch/arm/mach-sunxi/spl_spi_sunxi.c (100%) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] .travis.yml: Add lzop
We need lzop now in order to make some FIT images that use LZO compression on the contents. Signed-off-by: Tom Rini --- .travis.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.travis.yml b/.travis.yml index 7b53b3dddc1b..6cad65fd378d 100644 --- a/.travis.yml +++ b/.travis.yml @@ -27,6 +27,7 @@ addons: - rpm2cpio - wget - device-tree-compiler +- lzop install: # Clone uboot-test-hooks -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] spi: omap3: Fix redeclared error
omap3_spi_set_speed|mode redeclared bus symbol, fix the same.
error:
drivers/spi/omap3_spi.c: In function ‘omap3_spi_set_speed’:
drivers/spi/omap3_spi.c:650:18: error: ‘bus’ redeclared as different kind of
symbol
struct udevice *bus = dev->parent;
Signed-off-by: Jagan Teki
---
drivers/spi/omap3_spi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index b8a0bf495a..053a67bbe0 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -645,7 +645,7 @@ static int omap3_spi_xfer(struct udevice *dev, unsigned int
bitlen,
return _spi_xfer(priv, bitlen, dout, din, flags);
}
-static int omap3_spi_set_speed(struct udevice *bus, unsigned int speed)
+static int omap3_spi_set_speed(struct udevice *dev, unsigned int speed)
{
struct udevice *bus = dev->parent;
struct omap3_spi_priv *priv = dev_get_priv(bus);
@@ -658,7 +658,7 @@ static int omap3_spi_set_speed(struct udevice *bus,
unsigned int speed)
return 0;
}
-static int omap3_spi_set_mode(struct udevice *bus, uint mode)
+static int omap3_spi_set_mode(struct udevice *dev, uint mode)
{
struct udevice *bus = dev->parent;
struct omap3_spi_priv *priv = dev_get_priv(bus);
--
2.14.3
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Re: [U-Boot] Pull request: u-boot-spi/master
On Wed, Mar 14, 2018 at 10:57 PM, Tom Rini wrote: > On Wed, Mar 14, 2018 at 07:32:07PM +0530, Jagan Teki wrote: > >> Hi Tom, >> >> Please pull this PR. >> >> thanks, >> Jagan. >> >> The following changes since commit f95ab1fb6e37f0601f397091bb011edf7a98b890: >> >> Prepare v2018.03 (2018-03-13 08:02:19 -0400) >> >> are available in the Git repository at: >> >> git://git.denx.de/u-booti-spi.git master >> >> for you to fetch changes up to 3e4ef60403c626cf6c9a5f3d1f600bc9a39f3ce5: >> >> omap3_logic: Enable DM_SPI (2018-03-13 19:50:10 +0530) >> > > NAK, omap3_logic no longer builds with this PR. Ahh, missed one local patch will resend the PR with updated patch. sorry. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 04/10] phy: Add a new driver for OMAP's USB2 PHYs
On 14/03/2018 18:02, Patrice CHOTARD wrote:
Hi Jean Jacques
On 03/14/2018 05:18 PM, Jean-Jacques Hiblot wrote:
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2:
- omap-usb2-phy: Implement power_on and power_off callbacks
drivers/phy/Kconfig | 8 ++
drivers/phy/Makefile| 1 +
drivers/phy/omap-usb2-phy.c | 198
3 files changed, 207 insertions(+)
create mode 100644 drivers/phy/omap-usb2-phy.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 3b9a09c..dbf4e4d 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -85,4 +85,12 @@ config STI_USB_PHY
used by USB2 and USB3 Host controllers available on
STiH407 SoC families.
+config OMAP_USB2_PHY
+ bool "Support OMAP's USB2 PHY"
+ depends on PHY
+ depends on SYSCON
+ help
+ Support for the OMAP's USB2 PHY.
+ This PHY is found on OMAP devices supporting USB2.
+
endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 668040b..86b77d8 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
+obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o
diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c
new file mode 100644
index 000..9dcf7df
--- /dev/null
+++ b/drivers/phy/omap-usb2-phy.c
@@ -0,0 +1,198 @@
+/*
+ * OMAP USB2 PHY driver
+ *
+ * Copyright (c) 2017
+ * Jean-Jacques Hiblot
+ * based on dwc3-sti-glue
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(0)
+
+#define OMAP_DEV_PHY_PDBIT(0)
+#define OMAP_USB2_PHY_PD BIT(28)
+
+#define USB2PHY_DISCON_BYP_LATCH BIT(31)
+#define USB2PHY_ANA_CONFIG1(0x4c)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct omap_usb2_phy {
+ struct regmap *pwr_regmap;
+ ulong flags;
+ void *phy_base;
+ u32 pwr_reg_offset;
+};
+
+struct usb_phy_data {
+ const char *label;
+ u8 flags;
+ u32 mask;
+ u32 power_on;
+ u32 power_off;
+};
+
+static const struct usb_phy_data omap5_usb2_data = {
+ .label = "omap5_usb2",
+ .flags = 0,
+ .mask = OMAP_DEV_PHY_PD,
+ .power_off = OMAP_DEV_PHY_PD,
+};
+
+static const struct usb_phy_data dra7x_usb2_data = {
+ .label = "dra7x_usb2",
+ .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+ .mask = OMAP_DEV_PHY_PD,
+ .power_off = OMAP_DEV_PHY_PD,
+};
+
+static const struct usb_phy_data dra7x_usb2_phy2_data = {
+ .label = "dra7x_usb2_phy2",
+ .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+ .mask = OMAP_USB2_PHY_PD,
+ .power_off = OMAP_USB2_PHY_PD,
+};
+
+static const struct udevice_id omap_usb2_id_table[] = {
+ {
+ .compatible = "ti,omap5-usb2",
+ .data = (ulong)&omap5_usb2_data,
+ },
+ {
+ .compatible = "ti,dra7x-usb2",
+ .data = (ulong)&dra7x_usb2_data,
+ },
+ {
+ .compatible = "ti,dra7x-usb2-phy2",
+ .data = (ulong)&dra7x_usb2_phy2_data,
+ },
+ {},
+};
+
+static int omap_usb_phy_power(struct phy *usb_phy, bool on)
+{
+ struct udevice *dev = usb_phy->dev;
+ const struct usb_phy_data *data;
+ const struct omap_usb2_phy *phy = dev_get_priv(dev);
+ u32 val;
+ int rc;
+
+ data = (const struct usb_phy_data *)dev_get_driver_data(dev);
+ if (!data)
+ return -EINVAL;
+
+ rc = regmap_read(phy->pwr_regmap, phy->pwr_reg_offset, &val);
+ if (rc)
+ return rc;
+ val &= ~data->mask;
+ if (on)
+ val |= data->power_on;
+ else
+ val |= data->power_off;
+ rc = regmap_write(phy->pwr_regmap, phy->pwr_reg_offset, val);
+ if (rc)
+ return rc;
+
+ return 0;
+}
+
+static int omap_usb2_phy_init(struct phy *usb_phy)
+{
+ struct udevice *dev = usb_phy->dev;
+ struct omap_usb2_phy *priv = dev_get_priv(dev);
+ u32 val;
+
+ if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
+ /*
+*
+* Reduce the sensitivity of internal PHY by enabling the
+* DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This
+* resolves issues with certain devices which can otherwise
+* be prone to false disconnects.
+*
+*/
+ val = readl(priv->phy_base + USB2PHY_ANA_CONFIG1);
+ val |= USB2PHY_DISCON_BYP_LATCH;
+ writel(val, priv->phy_base +
Re: [U-Boot] Pull request: u-boot-spi/master
On Wed, Mar 14, 2018 at 07:32:07PM +0530, Jagan Teki wrote: > Hi Tom, > > Please pull this PR. > > thanks, > Jagan. > > The following changes since commit f95ab1fb6e37f0601f397091bb011edf7a98b890: > > Prepare v2018.03 (2018-03-13 08:02:19 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-booti-spi.git master > > for you to fetch changes up to 3e4ef60403c626cf6c9a5f3d1f600bc9a39f3ce5: > > omap3_logic: Enable DM_SPI (2018-03-13 19:50:10 +0530) > NAK, omap3_logic no longer builds with this PR. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 7/7] bootcount: display5: config: Enable boot count feature in the display5 board
The boot count is enabled in both SPL and proper u-boot. Signed-off-by: Lukasz Majewski --- Changes in v2: - None configs/display5_defconfig | 4 1 file changed, 4 insertions(+) diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 4d67700f4d..893794804c 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL=y +CONFIG_SPL_BOOTCOUNT_LIMIT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y @@ -51,6 +52,9 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 4/7] bootcount: u-boot: Do not increment bootcount if already done in SPL
If the CONFIG_SPL_BOOTCOUNT_LIMIT is defined, the bootcount variable is
already incremented after each boot attempt.
For that reason we shall not increment it again in u-boot.
Signed-off-by: Lukasz Majewski
---
Changes in v2:
- None
common/autoboot.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/common/autoboot.c b/common/autoboot.c
index 2eef7a04cc..87fca2ea92 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -298,7 +298,9 @@ const char *bootdelay_process(void)
#ifdef CONFIG_BOOTCOUNT_LIMIT
bootcount = bootcount_load();
+#ifndef CONFIG_SPL_BOOTCOUNT_LIMIT
bootcount++;
+#endif
bootcount_store(bootcount);
env_set_ulong("bootcount", bootcount);
bootlimit = env_get_ulong("bootlimit", 10, 0);
--
2.11.0
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[U-Boot] [PATCH v2 5/7] bootcount: spl: Extend SPL to support bootcount incrementation
This patch adds support for incrementation of the bootcount in SPL. Such feature is necessary when we do want to use this feature with 'falcon' boot mode (which loads OS directly in SPL). Signed-off-by: Lukasz Majewski --- Changes in v2: - New patch - as suggested by Stefan Roese - bootcount_inc() is called in common SPL code (./common/spl/spl.c), so other boards can also reuse it without modification common/spl/spl.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/common/spl/spl.c b/common/spl/spl.c index b1ce56d0d0..01e7989869 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -20,6 +20,9 @@ #include #include #include +#ifdef CONFIG_SPL_BOOTCOUNT_LIMIT +#include +#endif DECLARE_GLOBAL_DATA_PTR; @@ -411,6 +414,10 @@ void board_init_r(gd_t *dummy1, ulong dummy2) spl_board_init(); #endif +#ifdef CONFIG_SPL_BOOTCOUNT_LIMIT + bootcount_inc(); +#endif + memset(&spl_image, '\0', sizeof(spl_image)); #ifdef CONFIG_SYS_SPL_ARGS_ADDR spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR; -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 0/7] Provide SPL support for bootcount (in the case of using falcon boot mode)
This patch series provides support for controlling bootcount limits in SPL. It also enables this feature on display5 board to present usage patterns. This patch has been applied on top of u-boot/master: SHA1 (tag): v2018.03 Changes in v2: - New patch - None - None - New patch - as suggested by Stefan Roese - bootcount_inc() is called in common SPL code (./common/spl/spl.c), so other boards can also reuse it without modification - Remove bootcount_init() from SPL specific board code - None Lukasz Majewski (7): bootcount: spl: Enable bootcount support in SPL bootcount: Add include guards into bootcount.h file bootcount: Add function wrappers to handle bootcount increment and error checking bootcount: u-boot: Do not increment bootcount if already done in SPL bootcount: spl: Extend SPL to support bootcount incrementation bootcount: display5: spl: Extend DISPLAY5 board SPL to support bootcount checking bootcount: display5: config: Enable boot count feature in the display5 board board/liebherr/display5/spl.c | 3 ++- common/autoboot.c | 2 ++ common/spl/Kconfig| 9 + common/spl/spl.c | 7 +++ configs/display5_defconfig| 4 drivers/Makefile | 1 + include/bootcount.h | 28 7 files changed, 53 insertions(+), 1 deletion(-) -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 6/7] bootcount: display5: spl: Extend DISPLAY5 board SPL to support bootcount checking
This patch is necessary for providing basic bootcount checking in the case
of using "falcon" boot mode in that board.
It forces u-boot proper boot, when we exceed the number of errors.
Signed-off-by: Lukasz Majewski
---
Changes in v2:
- Remove bootcount_init() from SPL specific board code
board/liebherr/display5/spl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c
index 437963e225..7712e5bc3f 100644
--- a/board/liebherr/display5/spl.c
+++ b/board/liebherr/display5/spl.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include "common.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -214,7 +215,7 @@ void board_boot_order(u32 *spl_boot_list)
env_load();
s = env_get("BOOT_FROM");
- if (s && strcmp(s, "ACTIVE") == 0) {
+ if (s && !bootcount_error() && strcmp(s, "ACTIVE") == 0) {
spl_boot_list[0] = BOOT_DEVICE_MMC1;
spl_boot_list[1] = spl_boot_device();
}
--
2.11.0
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[U-Boot] [PATCH v2 3/7] bootcount: Add function wrappers to handle bootcount increment and error checking
Those two functions can be used to provide easy bootcount management.
Signed-off-by: Lukasz Majewski
---
Changes in v2:
- None
include/bootcount.h | 25 +
1 file changed, 25 insertions(+)
diff --git a/include/bootcount.h b/include/bootcount.h
index e3b3f7028e..0ec9af6e2b 100644
--- a/include/bootcount.h
+++ b/include/bootcount.h
@@ -40,4 +40,29 @@ static inline u32 raw_bootcount_load(volatile u32 *addr)
return in_be32(addr);
}
#endif
+
+#ifdef CONFIG_SPL_BOOTCOUNT_LIMIT
+static inline bool bootcount_error(void)
+{
+ unsigned long bootcount = bootcount_load();
+ unsigned long bootlimit = env_get_ulong("bootlimit", 10, 0);
+
+ if (bootlimit && (bootcount > bootlimit)) {
+ printf("Warning: Bootlimit (%lu) exceeded.\n", bootlimit);
+ return true;
+ }
+
+ return false;
+}
+
+static inline void bootcount_inc(void)
+{
+ unsigned long bootcount = bootcount_load();
+
+ bootcount_store(++bootcount);
+}
+#else
+static inline bool bootcount_error(void) { return false; }
+static inline void bootcount_inc(void) {}
+#endif /* CONFIG_SPL_BOOTCOUNT_LIMIT */
#endif /* _BOOTCOUNT_H__ */
--
2.11.0
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[U-Boot] [PATCH v2 1/7] bootcount: spl: Enable bootcount support in SPL
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been added to allow drivers/bootcount code re-usage in SPL. This code is necessary to use and setup bootcount in SPL in the case of falcon boot mode. Signed-off-by: Lukasz Majewski --- Changes in v2: None common/spl/Kconfig | 9 + drivers/Makefile | 1 + 2 files changed, 10 insertions(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 9609fceea5..af6573af8f 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -54,6 +54,15 @@ config SPL_BOOTROM_SUPPORT BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the boot device list, if not implemented for a given board) +config SPL_BOOTCOUNT_LIMIT + bool "Support bootcount in SPL" + depends on SPL_ENV_SUPPORT + help + On some boards, which use 'falcon' mode, it is necessary to check + and increment the number of boot attempts. Such boards do not + use proper U-Boot for normal boot flow and hence needs those + adjustments to be done in the SPL. + config SPL_RAW_IMAGE_SUPPORT bool "Support SPL loading and booting of RAW images" default n if (ARCH_MX6 && (SPL_MMC_SUPPORT || SPL_SATA_SUPPORT)) diff --git a/drivers/Makefile b/drivers/Makefile index 2673428cb6..a194039e91 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/ ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_SPL_BOOTCOUNT_LIMIT) += bootcount/ obj-$(CONFIG_SPL_CPU_SUPPORT) += cpu/ obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/ obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/ -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/7] bootcount: Add include guards into bootcount.h file
Signed-off-by: Lukasz Majewski --- Changes in v2: - New patch include/bootcount.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/bootcount.h b/include/bootcount.h index 06fb4d3578..e3b3f7028e 100644 --- a/include/bootcount.h +++ b/include/bootcount.h @@ -4,6 +4,8 @@ * * SPDX-License-Identifier:GPL-2.0+ */ +#ifndef _BOOTCOUNT_H__ +#define _BOOTCOUNT_H__ #include #include @@ -38,3 +40,4 @@ static inline u32 raw_bootcount_load(volatile u32 *addr) return in_be32(addr); } #endif +#endif /* _BOOTCOUNT_H__ */ -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] efi_loader: Allow width smaller than buffer stride in efi_gop Blt()
On 03/14/2018 04:31 AM, Ivan Gorinov wrote:
> Current implementation of Blt() in EFI_GRAPHICS_OUTPUT_PROTOCOL
> assumes the memory buffer stride (number of bytes in a row)
> always matches the rectangle Width, ignoring non-zero Delta.
>
> Signed-off-by: Ivan Gorinov
> ---
> lib/efi_loader/efi_gop.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
> index 3caddd5..362065b 100644
> --- a/lib/efi_loader/efi_gop.c
> +++ b/lib/efi_loader/efi_gop.c
> @@ -64,6 +64,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
> *buffer,
> {
> struct efi_gop_obj *gopobj = container_of(this, struct efi_gop_obj,
> ops);
> int i, j, line_len16, line_len32;
> + int buffer_stride;
> void *fb;
>
> EFI_ENTRY("%p, %p, %u, %zu, %zu, %zu, %zu, %zu, %zu, %zu", this,
> @@ -72,6 +73,11 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
> *buffer,
> if (operation != EFI_BLT_BUFFER_TO_VIDEO)
> return EFI_EXIT(EFI_INVALID_PARAMETER);
>
> + if (delta == 0)
> + buffer_stride = width * sizeof(u32);
> + else
> + buffer_stride = delta;
> +
> fb = gopobj->fb;
> line_len16 = gopobj->info.width * sizeof(u16);
> line_len32 = gopobj->info.width * sizeof(u32);
> @@ -87,7 +93,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
> *buffer,
> for (i = 0; i < height; i++) {
> u32 *dest = fb + ((i + dy) * line_len32) +
>(dx * sizeof(u32));
> - u32 *src = buffer + ((i + sy) * line_len32) +
> + u32 *src = buffer + ((i + sy) * buffer_stride) +
>(sx * sizeof(u32));
>
> /* Same color format, just memcpy */
> @@ -102,7 +108,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
> *buffer,
> for (i = 0; i < height; i++) {
> u16 *dest = fb + ((i + dy) * line_len16) +
>(dx * sizeof(u16));
> - u32 *src = buffer + ((i + sy) * line_len32) +
> + u32 *src = buffer + ((i + sy) * buffer_stride) +
If delta cannot be divided by 4 a misaligned access error will occur on
arm64.
Best regards
Heinrich
>(sx * sizeof(u32));
>
> /* Convert from rgb888 to rgb565 */
>
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[U-Boot] [RFC 7/7] board: MCR3000: use new DM watchdog
Signed-off-by: Christophe Leroy
---
arch/powerpc/dts/mcr3000.dts | 3 +++
board/cssi/MCR3000/MCR3000.c | 19 +++
configs/MCR3000_defconfig| 2 ++
include/configs/MCR3000.h| 1 +
4 files changed, 25 insertions(+)
diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts
index e4b222857b5..ef423d73c20 100644
--- a/arch/powerpc/dts/mcr3000.dts
+++ b/arch/powerpc/dts/mcr3000.dts
@@ -9,4 +9,7 @@
/dts-v1/;
/ {
+ WDT: watchdog@0 {
+ compatible = "fsl,pq1-wdt";
+ };
};
diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
index 6939a2cf617..f3533baffa2 100644
--- a/board/cssi/MCR3000/MCR3000.c
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -13,6 +13,8 @@
#include
#include
#include
+#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -144,3 +146,20 @@ int board_early_init_f(void)
return 0;
}
+
+int board_early_init_r(void)
+{
+ struct udevice *watchdog_dev = NULL;
+
+ if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
+ puts("Cannot find watchdog!\n");
+ } else {
+ puts("Enabling watchdog.\n");
+ if (IS_ENABLED(CONFIG_HW_WATCHDOG))
+ wdt_start(watchdog_dev, 0x, 0);
+ else
+ wdt_stop(watchdog_dev);
+ }
+
+ return 0;
+}
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index 4608f335748..fe882fffe87 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -76,3 +76,5 @@ CONFIG_BOOTCOMMAND="run flashboot"
CONFIG_DM=y
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="mcr3000"
+CONFIG_WDT=y
+CONFIG_WDT_MPC8xx=y
diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
index 7f31c427791..186759fdecf 100644
--- a/include/configs/MCR3000.h
+++ b/include/configs/MCR3000.h
@@ -10,6 +10,7 @@
/* High Level Configuration Options */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+#define CONFIG_BOARD_EARLY_INIT_R 1
#define CONFIG_EXTRA_ENV_SETTINGS \
"sdram_type=SDRAM\0"\
--
2.13.3
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[U-Boot] [RFC 2/7] powerpc: mpc8xx: redistribute data in CPM dpram
Some malloc memory is needed at startup for DM model. Lets reorganise the use of the CPM dpram. The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as: IMMR + 0x2000..0x2800: BD/Data/Microcode IMMR + 0x2800..0x2e00: BD/Data IMMR + 0x2e00..0x3800: BD/Data/Microcode IMMR + 0x3800..0x3a00: BD/Data IMMR + 0x3a00..0x3c00: BD/Data/Microcode IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers Lets reallocate all BDs in the 3800..3a00 area and give the full 2800..2e00 for dynamic RAM allocation including global data That way, the microcode areas remain available if needed on day Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/cpm_8xx.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/include/asm/cpm_8xx.h b/arch/powerpc/include/asm/cpm_8xx.h index bd8adec6b07..85903d21088 100644 --- a/arch/powerpc/include/asm/cpm_8xx.h +++ b/arch/powerpc/include/asm/cpm_8xx.h @@ -51,14 +51,14 @@ /* * DPRAM defines and allocation functions */ -#define CPM_SERIAL_BASE0x0800 -#define CPM_I2C_BASE 0x0820 -#define CPM_SPI_BASE 0x0840 -#define CPM_FEC_BASE 0x0860 -#define CPM_SERIAL2_BASE 0x08E0 -#define CPM_SCC_BASE 0x0900 -#define CPM_POST_BASE 0x0980 -#define CPM_WLKBD_BASE 0x0a00 +#define CPM_SERIAL_BASE0x1800 +#define CPM_I2C_BASE 0x1820 +#define CPM_SPI_BASE 0x1840 +#define CPM_FEC_BASE 0x1860 +#define CPM_SERIAL2_BASE 0x18e0 +#define CPM_SCC_BASE 0x1900 +#define CPM_POST_BASE 0x1980 +#define CPM_WLKBD_BASE 0x1a00 #define BD_IIC_START ((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */ -- 2.13.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC 4/7] board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL
Signed-off-by: Christophe Leroy
---
arch/powerpc/dts/Makefile | 16
arch/powerpc/dts/mcr3000.dts | 12
board/cssi/MCR3000/u-boot.lds | 6 ++
configs/MCR3000_defconfig | 3 +++
4 files changed, 37 insertions(+)
create mode 100644 arch/powerpc/dts/Makefile
create mode 100644 arch/powerpc/dts/mcr3000.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
new file mode 100644
index 000..c1c5d9c6dd3
--- /dev/null
+++ b/arch/powerpc/dts/Makefile
@@ -0,0 +1,16 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+dtb-$(CONFIG_MCR3000) += mcr3000.dtb
+
+targets += $(dtb-y)
+
+# Add any required device tree compiler flags here
+DTC_FLAGS +=
+
+PHONY += dtbs
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+ @:
+
+clean-files := *.dtb
diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts
new file mode 100644
index 000..e4b222857b5
--- /dev/null
+++ b/arch/powerpc/dts/mcr3000.dts
@@ -0,0 +1,12 @@
+/*
+ * MCR3000 Device Tree Source
+ *
+ * Copyright 2017 CS Systemes d'Information
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+/ {
+};
diff --git a/board/cssi/MCR3000/u-boot.lds b/board/cssi/MCR3000/u-boot.lds
index 990cca4ebb6..46cbbab6c4b 100644
--- a/board/cssi/MCR3000/u-boot.lds
+++ b/board/cssi/MCR3000/u-boot.lds
@@ -70,6 +70,12 @@ SECTIONS
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
+ /*
+* _end - This is end of u-boot.bin image.
+* dtb will be appended here to make u-boot-dtb.bin
+*/
+ _end = .;
+
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index e32273cb2ee..4608f335748 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -73,3 +73,6 @@ CONFIG_LZMA=y
CONFIG_OF_LIBFDT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flashboot"
+CONFIG_DM=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="mcr3000"
--
2.13.3
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[U-Boot] [RFC 5/7] powerpc: mpc8xx: move watchdog into drivers/watchdog
In preparation of DM watchdog, move basic actions into drivers/watchdog
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig| 2 +-
arch/powerpc/cpu/mpc8xx/Kconfig | 4
arch/powerpc/cpu/mpc8xx/cpu.c | 13 -
drivers/watchdog/Makefile | 1 +
drivers/watchdog/mpc8xx_wdt.c | 21 +
5 files changed, 27 insertions(+), 14 deletions(-)
create mode 100644 drivers/watchdog/mpc8xx_wdt.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index af45cfe8498..13a79560b24 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -34,7 +34,7 @@ config MPC8xx
bool "MPC8xx"
select BOARD_EARLY_INIT_F
imply CMD_REGINFO
- imply HW_WATCHDOG
+ imply MPC8xx_WATCHDOG
endchoice
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index f1123173765..b0e90a0f203 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -25,6 +25,10 @@ config MPC885
endchoice
+config MPC8xx_WATCHDOG
+ bool "Watchdog"
+ select HW_WATCHDOG
+
config 8xx_GCLK_FREQ
int "CPU GCLK Frequency"
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index d3d46b097cd..7b1d2921b3e 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -272,19 +272,6 @@ unsigned long get_tbclk(void)
/* - */
-#if defined(CONFIG_HW_WATCHDOG)
-void hw_watchdog_reset(void)
-{
- immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
- int re_enable = disable_interrupts();
-
- out_be16(&immr->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */
- out_be16(&immr->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
- if (re_enable)
- enable_interrupts();
-}
-#endif /* CONFIG_WATCHDOG */
-
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index ab6a6b79e1d..6c605e87e85 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o
obj-$(CONFIG_BCM2835_WDT) += bcm2835_wdt.o
obj-$(CONFIG_WDT_ORION) += orion_wdt.o
+obj-$(CONFIG_MPC8xx_WATCHDOG) += mpc8xx_wdt.o
diff --git a/drivers/watchdog/mpc8xx_wdt.c b/drivers/watchdog/mpc8xx_wdt.c
new file mode 100644
index 000..ded80c4d6a9
--- /dev/null
+++ b/drivers/watchdog/mpc8xx_wdt.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2017 CS Systemes d'Information
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void hw_watchdog_reset(void)
+{
+ immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+
+ out_be16(&immap->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */
+ out_be16(&immap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
+}
+
--
2.13.3
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[U-Boot] [RFC 6/7] drivers: watchdog: add a driver for the MPC8xx watchdog
This patch adds a DM driver for the MPC8xx watchdog.
Basically, the watchdog is enabled by default from the start and
SYPCR register has to be writen once to set the timeout and/or
deactivate the watchdog. Once written, it cannot be written again.
It means that wdt_stop() can be called before wdt_start() to stop the
watchdog, but cannot be called if wdt_start() has been called.
Signed-off-by: Christophe Leroy
---
drivers/watchdog/Kconfig | 6 +
drivers/watchdog/mpc8xx_wdt.c | 51 +++
2 files changed, 57 insertions(+)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index fc46b6774d5..15d79ee5e17 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -78,4 +78,10 @@ config WDT_ORION
Select this to enable Orion watchdog timer, which can be found on
some
Marvell Armada chips.
+config WDT_MPC8xx
+ bool "MPC8xx watchdog timer support"
+ depends on WDT && MPC8xx
+ help
+ Select this to enable mpc8xx watchdog timer
+
endmenu
diff --git a/drivers/watchdog/mpc8xx_wdt.c b/drivers/watchdog/mpc8xx_wdt.c
index ded80c4d6a9..29b185f45b3 100644
--- a/drivers/watchdog/mpc8xx_wdt.c
+++ b/drivers/watchdog/mpc8xx_wdt.c
@@ -5,6 +5,8 @@
*/
#include
+#include
+#include
#include
#include
#include
@@ -19,3 +21,52 @@ void hw_watchdog_reset(void)
out_be16(&immap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
}
+#ifdef CONFIG_WDT_MPC8xx
+static int mpc8xx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+ immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+
+ out_be32(&immap->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR);
+
+ if (!(in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE))
+ return -EBUSY;
+ return 0;
+
+}
+
+static int mpc8xx_wdt_stop(struct udevice *dev)
+{
+ immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+
+ out_be32(&immap->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & ~SYPCR_SWE);
+
+ if (in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE)
+ return -EBUSY;
+ return 0;
+}
+
+static int mpc8xx_wdt_reset(struct udevice *dev)
+{
+ hw_watchdog_reset();
+
+ return 0;
+}
+
+static const struct wdt_ops mpc8xx_wdt_ops = {
+ .start = mpc8xx_wdt_start,
+ .reset = mpc8xx_wdt_reset,
+ .stop = mpc8xx_wdt_stop,
+};
+
+static const struct udevice_id mpc8xx_wdt_ids[] = {
+ { .compatible = "fsl,pq1-wdt" },
+ {}
+};
+
+U_BOOT_DRIVER(wdt_mpc8xx) = {
+ .name = "wdt_mpc8xx",
+ .id = UCLASS_WDT,
+ .of_match = mpc8xx_wdt_ids,
+ .ops = &mpc8xx_wdt_ops,
+};
+#endif /* CONFIG_WDT_MPC8xx */
--
2.13.3
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[U-Boot] [RFC 3/7] board: MCR3000: properly setup initial RAM
In order to use CONFIG_DM, some initial RAM is needed for malloc() Signed-off-by: Christophe Leroy --- arch/powerpc/cpu/mpc8xx/cpu_init.c | 2 +- arch/powerpc/cpu/mpc8xx/start.S| 5 +++-- include/configs/MCR3000.h | 7 --- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c index 3dfea6125ea..f27ad86e393 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c @@ -28,7 +28,7 @@ void cpu_init_f(immap_t __iomem *immr) gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); /* Clear initial global data */ - memset((void *)gd, 0, sizeof(*gd)); + board_init_f_init_reserve((ulong)gd); /* SYPCR - contains watchdog control (11-9) */ diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 202ea81ae49..781bcd887e0 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -130,8 +130,9 @@ in_flash: /* initialize some SPRs that are hard to access from C */ /*--*/ - lis r3, CONFIG_SYS_IMMR@h /* pass IMMR as arg1 to C routine */ - ori r1, r3, CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in internal DPRAM */ + /* set up the stack in internal DPRAM */ + lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@h + ori r1, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@l /* Note: R0 is still 0 here */ stwur0, -4(r1) /* clear final stack frame so that */ stwur0, -4(r1) /* stack backtraces terminate cleanly */ diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 2b49f97e091..7f31c427791 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -70,11 +70,12 @@ #defineCONFIG_SYS_HZ 1000 /* Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#defineCONFIG_SYS_INIT_RAM_SIZE0x2f00 +#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800) +#defineCONFIG_SYS_INIT_RAM_SIZE(0x2e00 - 0x2800) #defineCONFIG_SYS_GBL_DATA_SIZE64 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ -CONFIG_SYS_GBL_DATA_SIZE) +CONFIG_SYS_GBL_DATA_SIZE - \ +CONFIG_SYS_MALLOC_F_LEN) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) */ -- 2.13.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC 1/7] powercp: mpc8xx: move commproc.h
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and move it into arch/powerpc/include/asm Signed-off-by: Christophe Leroy --- arch/powerpc/cpu/mpc8xx/cpu.c| 2 +- arch/powerpc/cpu/mpc8xx/cpu_init.c | 2 +- arch/powerpc/cpu/mpc8xx/immap.c | 2 +- arch/powerpc/cpu/mpc8xx/interrupts.c | 2 +- include/commproc.h => arch/powerpc/include/asm/cpm_8xx.h | 0 drivers/net/mpc8xx_fec.c | 2 +- drivers/serial/serial_mpc8xx.c | 2 +- drivers/spi/mpc8xx_spi.c | 2 +- 8 files changed, 7 insertions(+), 7 deletions(-) rename include/commproc.h => arch/powerpc/include/asm/cpm_8xx.h (100%) diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c index 4ed61e2d977..d3d46b097cd 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu.c +++ b/arch/powerpc/cpu/mpc8xx/cpu.c @@ -21,9 +21,9 @@ #include #include #include -#include #include #include +#include #include #include diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c index 654d559eeb8..3dfea6125ea 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/powerpc/cpu/mpc8xx/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c index 0cbfe900771..8e732555baf 100644 --- a/arch/powerpc/cpu/mpc8xx/immap.c +++ b/arch/powerpc/cpu/mpc8xx/immap.c @@ -13,7 +13,7 @@ #include #include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc8xx/interrupts.c b/arch/powerpc/cpu/mpc8xx/interrupts.c index 846148ab986..20f9664f060 100644 --- a/arch/powerpc/cpu/mpc8xx/interrupts.c +++ b/arch/powerpc/cpu/mpc8xx/interrupts.c @@ -8,9 +8,9 @@ #include #include #include +#include #include #include -#include // diff --git a/include/commproc.h b/arch/powerpc/include/asm/cpm_8xx.h similarity index 100% rename from include/commproc.h rename to arch/powerpc/include/asm/cpm_8xx.h diff --git a/drivers/net/mpc8xx_fec.c b/drivers/net/mpc8xx_fec.c index 71fe984a5dd..1dd41df18be 100644 --- a/drivers/net/mpc8xx_fec.c +++ b/drivers/net/mpc8xx_fec.c @@ -7,10 +7,10 @@ #include #include -#include #include #include #include +#include #include #include diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c index 26a8085a691..7a5908f4645 100644 --- a/drivers/serial/serial_mpc8xx.c +++ b/drivers/serial/serial_mpc8xx.c @@ -6,10 +6,10 @@ */ #include -#include #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c index b5bd558526b..eb035e9510c 100644 --- a/drivers/spi/mpc8xx_spi.c +++ b/drivers/spi/mpc8xx_spi.c @@ -19,7 +19,7 @@ #include #include -#include +#include #include #include #include -- 2.13.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC 0/7] Beginning of migration of MPC8xx to DM model
This serie is the beginning of MPC8xx migration to DM model. Please comment and help me get the good direction. Christophe Leroy (7): powercp: mpc8xx: move commproc.h powerpc: mpc8xx: redistribute data in CPM dpram board: MCR3000: properly setup initial RAM board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL powerpc: mpc8xx: move watchdog into drivers/watchdog drivers: watchdog: add a driver for the MPC8xx watchdog board: MCR3000: use new DM watchdog arch/powerpc/Kconfig | 2 +- arch/powerpc/cpu/mpc8xx/Kconfig| 4 ++ arch/powerpc/cpu/mpc8xx/cpu.c | 15 + arch/powerpc/cpu/mpc8xx/cpu_init.c | 4 +- arch/powerpc/cpu/mpc8xx/immap.c| 2 +- arch/powerpc/cpu/mpc8xx/interrupts.c | 2 +- arch/powerpc/cpu/mpc8xx/start.S| 5 +- arch/powerpc/dts/Makefile | 16 + arch/powerpc/dts/mcr3000.dts | 15 + .../powerpc/include/asm/cpm_8xx.h | 16 ++--- board/cssi/MCR3000/MCR3000.c | 19 ++ board/cssi/MCR3000/u-boot.lds | 6 ++ configs/MCR3000_defconfig | 5 ++ drivers/net/mpc8xx_fec.c | 2 +- drivers/serial/serial_mpc8xx.c | 2 +- drivers/spi/mpc8xx_spi.c | 2 +- drivers/watchdog/Kconfig | 6 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/mpc8xx_wdt.c | 72 ++ include/configs/MCR3000.h | 8 ++- 20 files changed, 169 insertions(+), 35 deletions(-) create mode 100644 arch/powerpc/dts/Makefile create mode 100644 arch/powerpc/dts/mcr3000.dts rename include/commproc.h => arch/powerpc/include/asm/cpm_8xx.h (99%) create mode 100644 drivers/watchdog/mpc8xx_wdt.c -- 2.13.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 04/10] phy: Add a new driver for OMAP's USB2 PHYs
Hi Jean Jacques
On 03/14/2018 05:18 PM, Jean-Jacques Hiblot wrote:
> This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
>
> Signed-off-by: Jean-Jacques Hiblot
>
> ---
>
> Changes in v2:
> - omap-usb2-phy: Implement power_on and power_off callbacks
>
> drivers/phy/Kconfig | 8 ++
> drivers/phy/Makefile| 1 +
> drivers/phy/omap-usb2-phy.c | 198
>
> 3 files changed, 207 insertions(+)
> create mode 100644 drivers/phy/omap-usb2-phy.c
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 3b9a09c..dbf4e4d 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -85,4 +85,12 @@ config STI_USB_PHY
> used by USB2 and USB3 Host controllers available on
> STiH407 SoC families.
>
> +config OMAP_USB2_PHY
> + bool "Support OMAP's USB2 PHY"
> + depends on PHY
> + depends on SYSCON
> + help
> + Support for the OMAP's USB2 PHY.
> + This PHY is found on OMAP devices supporting USB2.
> +
> endmenu
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index 668040b..86b77d8 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -10,3 +10,4 @@ obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
> obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
> obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
> obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
> +obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o
> diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c
> new file mode 100644
> index 000..9dcf7df
> --- /dev/null
> +++ b/drivers/phy/omap-usb2-phy.c
> @@ -0,0 +1,198 @@
> +/*
> + * OMAP USB2 PHY driver
> + *
> + * Copyright (c) 2017
> + * Jean-Jacques Hiblot
> + * based on dwc3-sti-glue
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(0)
> +
> +#define OMAP_DEV_PHY_PD BIT(0)
> +#define OMAP_USB2_PHY_PD BIT(28)
> +
> +#define USB2PHY_DISCON_BYP_LATCH BIT(31)
> +#define USB2PHY_ANA_CONFIG1 (0x4c)
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct omap_usb2_phy {
> + struct regmap *pwr_regmap;
> + ulong flags;
> + void *phy_base;
> + u32 pwr_reg_offset;
> +};
> +
> +struct usb_phy_data {
> + const char *label;
> + u8 flags;
> + u32 mask;
> + u32 power_on;
> + u32 power_off;
> +};
> +
> +static const struct usb_phy_data omap5_usb2_data = {
> + .label = "omap5_usb2",
> + .flags = 0,
> + .mask = OMAP_DEV_PHY_PD,
> + .power_off = OMAP_DEV_PHY_PD,
> +};
> +
> +static const struct usb_phy_data dra7x_usb2_data = {
> + .label = "dra7x_usb2",
> + .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
> + .mask = OMAP_DEV_PHY_PD,
> + .power_off = OMAP_DEV_PHY_PD,
> +};
> +
> +static const struct usb_phy_data dra7x_usb2_phy2_data = {
> + .label = "dra7x_usb2_phy2",
> + .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
> + .mask = OMAP_USB2_PHY_PD,
> + .power_off = OMAP_USB2_PHY_PD,
> +};
> +
> +static const struct udevice_id omap_usb2_id_table[] = {
> + {
> + .compatible = "ti,omap5-usb2",
> + .data = (ulong)&omap5_usb2_data,
> + },
> + {
> + .compatible = "ti,dra7x-usb2",
> + .data = (ulong)&dra7x_usb2_data,
> + },
> + {
> + .compatible = "ti,dra7x-usb2-phy2",
> + .data = (ulong)&dra7x_usb2_phy2_data,
> + },
> + {},
> +};
> +
> +static int omap_usb_phy_power(struct phy *usb_phy, bool on)
> +{
> + struct udevice *dev = usb_phy->dev;
> + const struct usb_phy_data *data;
> + const struct omap_usb2_phy *phy = dev_get_priv(dev);
> + u32 val;
> + int rc;
> +
> + data = (const struct usb_phy_data *)dev_get_driver_data(dev);
> + if (!data)
> + return -EINVAL;
> +
> + rc = regmap_read(phy->pwr_regmap, phy->pwr_reg_offset, &val);
> + if (rc)
> + return rc;
> + val &= ~data->mask;
> + if (on)
> + val |= data->power_on;
> + else
> + val |= data->power_off;
> + rc = regmap_write(phy->pwr_regmap, phy->pwr_reg_offset, val);
> + if (rc)
> + return rc;
> +
> + return 0;
> +}
> +
> +static int omap_usb2_phy_init(struct phy *usb_phy)
> +{
> + struct udevice *dev = usb_phy->dev;
> + struct omap_usb2_phy *priv = dev_get_priv(dev);
> + u32 val;
> +
> + if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
> + /*
> + *
> + * Reduce the sensitivity of internal PHY by enabling the
> + * DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This
> + * resolves issues with certain devices which can otherwise
> + * be prone to false disconnects.
> + *
> + */
> + val = readl(priv->phy_ba
[U-Boot] [PATCH 4/6] usb: ohci-generic: handle phy power on/off
From: Patrice Chotard
Add generic_phy_power_on() and generic_phy_power_off()
calls to switch ON/OFF phy during probe and remove functions.
Signed-off-by: Patrice Chotard
---
drivers/usb/host/ohci-generic.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index bf55a71d66c2..4843b4ac859f 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -98,6 +98,12 @@ static int ohci_usb_probe(struct udevice *dev)
pr_err("failed to init usb phy\n");
goto reset_err;
}
+
+ err = generic_phy_power_on(&priv->phy);
+ if (err) {
+ dev_err(dev, "failed to power on usb phy\n");
+ goto phy_power_err;
+ }
}
err = ohci_register(dev, regs);
@@ -108,6 +114,13 @@ static int ohci_usb_probe(struct udevice *dev)
phy_err:
if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_power_off(&priv->phy);
+ if (ret)
+ dev_err(dev, "failed to power off usb phy\n");
+ }
+
+phy_power_err:
+ if (generic_phy_valid(&priv->phy)) {
ret = generic_phy_exit(&priv->phy);
if (ret)
pr_err("failed to release phy\n");
@@ -135,6 +148,10 @@ static int ohci_usb_remove(struct udevice *dev)
return ret;
if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_power_off(&priv->phy);
+ if (ret)
+ return ret;
+
ret = generic_phy_exit(&priv->phy);
if (ret)
return ret;
--
1.9.1
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[U-Boot] [PATCH 5/6] usb: ohci-generic: factorize PHY operation
From: Patrice Chotard
Factorize PHY get/init/poweron and PHY poweroff/exit operations
into separate function, it simplify the error path.
Signed-off-by: Patrice Chotard
---
drivers/usb/host/ohci-generic.c | 99 -
1 file changed, 59 insertions(+), 40 deletions(-)
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index 4843b4ac859f..590fe4ca740f 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -25,6 +25,56 @@ struct generic_ohci {
int reset_count;/* number of reset in reset list */
};
+static int ohci_setup_phy(struct udevice *dev, int index)
+{
+ struct generic_ohci *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = generic_phy_get_by_index(dev, index, &priv->phy);
+ if (ret) {
+ if (ret != -ENOENT) {
+ dev_err(dev, "failed to get usb phy\n");
+ return ret;
+ }
+ } else {
+ ret = generic_phy_init(&priv->phy);
+ if (ret) {
+ dev_err(dev, "failed to init usb phy\n");
+ return ret;
+ }
+
+ ret = generic_phy_power_on(&priv->phy);
+ if (ret) {
+ dev_err(dev, "failed to power on usb phy\n");
+ return generic_phy_exit(&priv->phy);
+ }
+ }
+
+ return 0;
+}
+
+static int ohci_shutdown_phy(struct udevice *dev)
+{
+ struct generic_ohci *priv = dev_get_priv(dev);
+ int ret = 0;
+
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_power_off(&priv->phy);
+ if (ret) {
+ dev_err(dev, "failed to power off usb phy\n");
+ return ret;
+ }
+
+ ret = generic_phy_exit(&priv->phy);
+ if (ret) {
+ dev_err(dev, "failed to power off usb phy\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
static int ohci_usb_probe(struct udevice *dev)
{
struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
@@ -85,26 +135,10 @@ static int ohci_usb_probe(struct udevice *dev)
goto clk_err;
}
- err = generic_phy_get_by_index(dev, 0, &priv->phy);
- if (err) {
- if (err != -ENOENT) {
- pr_err("failed to get usb phy\n");
- goto reset_err;
- }
- } else {
-
- err = generic_phy_init(&priv->phy);
- if (err) {
- pr_err("failed to init usb phy\n");
- goto reset_err;
- }
+ err = ohci_setup_phy(dev, 0);
+ if (err)
- err = generic_phy_power_on(&priv->phy);
- if (err) {
- dev_err(dev, "failed to power on usb phy\n");
- goto phy_power_err;
- }
- }
+ goto reset_err;
err = ohci_register(dev, regs);
if (err)
@@ -113,18 +147,9 @@ static int ohci_usb_probe(struct udevice *dev)
return 0;
phy_err:
- if (generic_phy_valid(&priv->phy)) {
- ret = generic_phy_power_off(&priv->phy);
- if (ret)
- dev_err(dev, "failed to power off usb phy\n");
- }
-
-phy_power_err:
- if (generic_phy_valid(&priv->phy)) {
- ret = generic_phy_exit(&priv->phy);
- if (ret)
- pr_err("failed to release phy\n");
- }
+ ret = ohci_shutdown_phy(dev);
+ if (ret)
+ dev_err(dev, "failed to shutdown usb phy\n");
reset_err:
ret = reset_release_all(priv->resets, priv->reset_count);
@@ -147,15 +172,9 @@ static int ohci_usb_remove(struct udevice *dev)
if (ret)
return ret;
- if (generic_phy_valid(&priv->phy)) {
- ret = generic_phy_power_off(&priv->phy);
- if (ret)
- return ret;
-
- ret = generic_phy_exit(&priv->phy);
- if (ret)
- return ret;
- }
+ ret = ohci_shutdown_phy(dev);
+ if (ret)
+ return ret;
ret = reset_release_all(priv->resets, priv->reset_count);
if (ret)
--
1.9.1
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[U-Boot] [PATCH 3/6] usb: ehci-generic: replace pr_err() by dev_err()
From: Patrice Chotard
As we get access to struct udevice, use dev_err() instead
of pr_err().
Signed-off-by: Patrice Chotard
---
drivers/usb/host/ehci-generic.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 0926986d2737..b012d8651f12 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -101,7 +101,7 @@ static int ehci_usb_probe(struct udevice *dev)
break;
err = clk_enable(&priv->clocks[i]);
if (err) {
- pr_err("failed to enable clock %d\n", i);
+ dev_err(dev, "failed to enable clock %d\n", i);
clk_free(&priv->clocks[i]);
goto clk_err;
}
@@ -109,7 +109,8 @@ static int ehci_usb_probe(struct udevice *dev)
}
} else {
if (clock_nb != -ENOENT) {
- pr_err("failed to get clock phandle(%d)\n", clock_nb);
+ dev_err(dev, "failed to get clock phandle(%d)\n",
+ clock_nb);
return clock_nb;
}
}
@@ -130,7 +131,8 @@ static int ehci_usb_probe(struct udevice *dev)
break;
if (reset_deassert(&priv->resets[i])) {
- pr_err("failed to deassert reset %d\n", i);
+ dev_err(dev, "failed to deassert reset %d\n",
+ i);
reset_free(&priv->resets[i]);
goto reset_err;
}
@@ -138,14 +140,14 @@ static int ehci_usb_probe(struct udevice *dev)
}
} else {
if (reset_nb != -ENOENT) {
- pr_err("failed to get reset phandle(%d)\n", reset_nb);
+ dev_err(dev, "failed to get reset phandle(%d)\n",
+ reset_nb);
goto clk_err;
}
}
err = ehci_setup_phy(dev, 0);
if (err)
-
goto reset_err;
hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
@@ -166,11 +168,11 @@ phy_err:
reset_err:
ret = reset_release_all(priv->resets, priv->reset_count);
if (ret)
- pr_err("failed to assert all resets\n");
+ dev_err(dev, "failed to assert all resets\n");
clk_err:
ret = clk_release_all(priv->clocks, priv->clock_count);
if (ret)
- pr_err("failed to disable all clocks\n");
+ dev_err(dev, "failed to disable all clocks\n");
return err;
}
--
1.9.1
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[U-Boot] [PATCH 6/6] usb: ohci-generic: replace pr_err() by dev_err()
From: Patrice Chotard
As we get access to struct udevice, use dev_err() instead
of pr_err().
Signed-off-by: Patrice Chotard
---
drivers/usb/host/ohci-generic.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index 590fe4ca740f..5bdd7995b905 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -97,14 +97,14 @@ static int ohci_usb_probe(struct udevice *dev)
err = clk_enable(&priv->clocks[i]);
if (err) {
- pr_err("failed to enable clock %d\n", i);
+ dev_err(dev, "failed to enable clock %d\n", i);
clk_free(&priv->clocks[i]);
goto clk_err;
}
priv->clock_count++;
}
} else if (clock_nb != -ENOENT) {
- pr_err("failed to get clock phandle(%d)\n", clock_nb);
+ dev_err(dev, "failed to get clock phandle(%d)\n", clock_nb);
return clock_nb;
}
@@ -124,20 +124,19 @@ static int ohci_usb_probe(struct udevice *dev)
err = reset_deassert(&priv->resets[i]);
if (err) {
- pr_err("failed to deassert reset %d\n", i);
+ dev_err(dev, "failed to deassert reset %d\n",
i);
reset_free(&priv->resets[i]);
goto reset_err;
}
priv->reset_count++;
}
} else if (reset_nb != -ENOENT) {
- pr_err("failed to get reset phandle(%d)\n", reset_nb);
+ dev_err(dev, "failed to get reset phandle(%d)\n", reset_nb);
goto clk_err;
}
err = ohci_setup_phy(dev, 0);
if (err)
-
goto reset_err;
err = ohci_register(dev, regs);
@@ -154,11 +153,11 @@ phy_err:
reset_err:
ret = reset_release_all(priv->resets, priv->reset_count);
if (ret)
- pr_err("failed to assert all resets\n");
+ dev_err(dev, "failed to assert all resets\n");
clk_err:
ret = clk_release_all(priv->clocks, priv->clock_count);
if (ret)
- pr_err("failed to disable all clocks\n");
+ dev_err(dev, "failed to disable all clocks\n");
return err;
}
--
1.9.1
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[U-Boot] [PATCH 2/6] usb: ehci-generic: factorize PHY operation
From: Patrice Chotard
Factorize PHY get/init/poweron and PHY poweroff/exit operations
into separate function, it simplify the error path.
Signed-off-by: Patrice Chotard
---
drivers/usb/host/ehci-generic.c | 99 -
1 file changed, 59 insertions(+), 40 deletions(-)
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 2edd6d7433e3..0926986d2737 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -27,6 +27,56 @@ struct generic_ehci {
int reset_count;
};
+static int ehci_setup_phy(struct udevice *dev, int index)
+{
+ struct generic_ehci *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = generic_phy_get_by_index(dev, index, &priv->phy);
+ if (ret) {
+ if (ret != -ENOENT) {
+ dev_err(dev, "failed to get usb phy\n");
+ return ret;
+ }
+ } else {
+ ret = generic_phy_init(&priv->phy);
+ if (ret) {
+ dev_err(dev, "failed to init usb phy\n");
+ return ret;
+ }
+
+ ret = generic_phy_power_on(&priv->phy);
+ if (ret) {
+ dev_err(dev, "failed to power on usb phy\n");
+ return generic_phy_exit(&priv->phy);
+ }
+ }
+
+ return 0;
+}
+
+static int ehci_shutdown_phy(struct udevice *dev)
+{
+ struct generic_ehci *priv = dev_get_priv(dev);
+ int ret = 0;
+
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_power_off(&priv->phy);
+ if (ret) {
+ dev_err(dev, "failed to power off usb phy\n");
+ return ret;
+ }
+
+ ret = generic_phy_exit(&priv->phy);
+ if (ret) {
+ dev_err(dev, "failed to power off usb phy\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
static int ehci_usb_probe(struct udevice *dev)
{
struct generic_ehci *priv = dev_get_priv(dev);
@@ -93,26 +143,10 @@ static int ehci_usb_probe(struct udevice *dev)
}
}
- err = generic_phy_get_by_index(dev, 0, &priv->phy);
- if (err) {
- if (err != -ENOENT) {
- pr_err("failed to get usb phy\n");
- goto reset_err;
- }
- } else {
-
- err = generic_phy_init(&priv->phy);
- if (err) {
- pr_err("failed to init usb phy\n");
- goto reset_err;
- }
+ err = ehci_setup_phy(dev, 0);
+ if (err)
- err = generic_phy_power_on(&priv->phy);
- if (err) {
- dev_err(dev, "failed to power on usb phy\n");
- goto phy_power_err;
- }
- }
+ goto reset_err;
hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
@@ -125,18 +159,9 @@ static int ehci_usb_probe(struct udevice *dev)
return 0;
phy_err:
- if (generic_phy_valid(&priv->phy)) {
- ret = generic_phy_power_off(&priv->phy);
- if (ret)
- dev_err(dev, "failed to power off usb phy\n");
- }
-
-phy_power_err:
- if (generic_phy_valid(&priv->phy)) {
- ret = generic_phy_exit(&priv->phy);
- if (ret)
- pr_err("failed to release phy\n");
- }
+ ret = ehci_shutdown_phy(dev);
+ if (ret)
+ dev_err(dev, "failed to shutdown usb phy\n");
reset_err:
ret = reset_release_all(priv->resets, priv->reset_count);
@@ -159,15 +184,9 @@ static int ehci_usb_remove(struct udevice *dev)
if (ret)
return ret;
- if (generic_phy_valid(&priv->phy)) {
- ret = generic_phy_power_off(&priv->phy);
- if (ret)
- return ret;
-
- ret = generic_phy_exit(&priv->phy);
- if (ret)
- return ret;
- }
+ ret = ehci_shutdown_phy(dev);
+ if (ret)
+ return ret;
ret = reset_release_all(priv->resets, priv->reset_count);
if (ret)
--
1.9.1
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[U-Boot] [PATCH 1/6] usb: ehci-generic: handle phy power on/off
From: Patrice Chotard
Add generic_phy_power_on() and generic_phy_power_off()
calls to switch ON/OFF phy during probe and remove functions.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
---
drivers/usb/host/ehci-generic.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 1cb92c033870..2edd6d7433e3 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -106,6 +106,12 @@ static int ehci_usb_probe(struct udevice *dev)
pr_err("failed to init usb phy\n");
goto reset_err;
}
+
+ err = generic_phy_power_on(&priv->phy);
+ if (err) {
+ dev_err(dev, "failed to power on usb phy\n");
+ goto phy_power_err;
+ }
}
hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
@@ -120,6 +126,13 @@ static int ehci_usb_probe(struct udevice *dev)
phy_err:
if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_power_off(&priv->phy);
+ if (ret)
+ dev_err(dev, "failed to power off usb phy\n");
+ }
+
+phy_power_err:
+ if (generic_phy_valid(&priv->phy)) {
ret = generic_phy_exit(&priv->phy);
if (ret)
pr_err("failed to release phy\n");
@@ -147,6 +160,10 @@ static int ehci_usb_remove(struct udevice *dev)
return ret;
if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_power_off(&priv->phy);
+ if (ret)
+ return ret;
+
ret = generic_phy_exit(&priv->phy);
if (ret)
return ret;
--
1.9.1
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[U-Boot] [PATCH 0/6] Update ohci/ehci-generic drivers
From: Patrice Chotard This series updates ohci-generic and ehci-generic drivers by: _ Add generic_phy_power_on() and generic_phy_power_off() needed to work with phy driver which implement these callbacks. _ Factorize PHY operations. _ Replace pr_err() with dev_err(). Patrice Chotard (6): usb: ehci-generic: handle phy power on/off usb: ehci-generic: factorize PHY operation usb: ehci-generic: replace pr_err() by dev_err() usb: ohci-generic: handle phy power on/off usb: ohci-generic: factorize PHY operation usb: ohci-generic: replace pr_err() by dev_err() drivers/usb/host/ehci-generic.c | 98 - drivers/usb/host/ohci-generic.c | 95 ++- 2 files changed, 133 insertions(+), 60 deletions(-) -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 00/10] Add support for DM_USB for TI's DRA7 EVMs and AM57 EVMs platforms
Supporting DM USB is required to support DM_ETH and USB network adapters with the same binary. This series adds support for DM_USB for the DRA7/AM57 families. It leverages the work done for the STi family. This series applies on top of "xhci-dwc3: Couple of fixes for USB3 support" limitation: - only Host mode is supported. The Device mode can be added later. Tested on: - dra7 evm - dra71 evm - dra72 evm - dra72 evm rev C - dra76 evm - AM572 evm Changes in v2: - Add USB3 support to ti-pipe3-phy driver - omap-usb2-phy: Implement power_on and power_off callbacks - am57xx boards: when DM_USB is used, turn on the required USB clocks - split dts changes in 2 commits: one for binding the children of ocp2scp@4a08, and one to disable USB1 on all DRA7 EVMs - Instead of disabling USB1 port in dts files, use *-u-boot.dtsi files - Enable DM_USB in am57xx_evm_defconfig. USB3 (super speed) is supported. Jean-Jacques Hiblot (7): syscon: dm: Add a new method to get a regmap from DTS usb: omap5: Add glue logic to support DM for USB host phy: Add a new driver for OMAP's USB2 PHYs board: ti: dra7xx-evm: turn on USB clocks in late init stage dts: dra7x: make ocp2scp@4a08 compatible with simple-bus dts: dra7x: Disable USB1 on all evms configs: enable DM_USB for all the platforms of the DRA7 family Vignesh R (3): phy: ti-pip3-phy: Add support for USB3 PHY board; ti: am57xx: turn on USB clocks configs: am57xx_evm: Enable DM_USB and dependencies arch/arm/dts/dra7-evm-u-boot.dtsi | 8 ++ arch/arm/dts/dra71-evm-u-boot.dtsi | 8 ++ arch/arm/dts/dra72-evm-revc-u-boot.dtsi | 8 ++ arch/arm/dts/dra72-evm-u-boot.dtsi | 23 arch/arm/dts/dra76-evm-u-boot.dtsi | 8 ++ arch/arm/dts/omap5-u-boot.dtsi | 4 + board/ti/am57xx/board.c | 19 +++ board/ti/dra7xx/evm.c | 19 +++ configs/am57xx_evm_defconfig| 5 + configs/dra7xx_evm_defconfig| 2 + configs/dra7xx_hs_evm_defconfig | 2 + drivers/core/syscon-uclass.c| 23 drivers/phy/Kconfig | 8 ++ drivers/phy/Makefile| 1 + drivers/phy/omap-usb2-phy.c | 198 drivers/phy/ti-pipe3-phy.c | 30 +++-- drivers/usb/host/Kconfig| 10 ++ drivers/usb/host/Makefile | 1 + drivers/usb/host/dwc3-omap-glue.c | 47 include/syscon.h| 13 +++ 20 files changed, 430 insertions(+), 7 deletions(-) create mode 100644 arch/arm/dts/dra72-evm-u-boot.dtsi create mode 100644 drivers/phy/omap-usb2-phy.c create mode 100644 drivers/usb/host/dwc3-omap-glue.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 10/10] configs: am57xx_evm: Enable DM_USB and dependencies
From: Vignesh R Enable DM_USB for AM57xx based boards. Signed-off-by: Vignesh R Signed-off-by: Jean-Jacques Hiblot --- Changes in v2: - Enable DM_USB in am57xx_evm_defconfig. USB3 (super speed) is supported. configs/am57xx_evm_defconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 7ed010f..4c0fb8d 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -76,3 +76,8 @@ CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0451 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_DM_USB=y +CONFIG_OMAP_USB2_PHY=y +CONFIG_PIPE3_PHY=y +CONFIG_MISC=y +CONFIG_PHY=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 07/10] dts: dra7x: make ocp2scp@4a080000 compatible with simple-bus
This is required when DM_USB is used, to bind the USB phys.
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2:
- split dts changes in 2 commits: one for binding the children of
ocp2scp@4a08, and one to disable USB1 on all DRA7 EVMs
arch/arm/dts/omap5-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/omap5-u-boot.dtsi b/arch/arm/dts/omap5-u-boot.dtsi
index bf2684c..a6a7801 100644
--- a/arch/arm/dts/omap5-u-boot.dtsi
+++ b/arch/arm/dts/omap5-u-boot.dtsi
@@ -15,6 +15,10 @@
ocp {
u-boot,dm-spl;
+ ocp2scp@4a08 {
+ compatible = "ti,omap-ocp2scp", "simple-bus";
+ };
+
ocp2scp@4a09 {
compatible = "ti,omap-ocp2scp", "simple-bus";
};
--
2.7.4
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[U-Boot] [PATCH v2 09/10] configs: enable DM_USB for all the platforms of the DRA7 family
Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini --- Changes in v2: None configs/dra7xx_evm_defconfig| 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 1cc614f..6fce711 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -48,6 +48,7 @@ CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_PCF8575_GPIO=y CONFIG_DM_I2C=y +CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y @@ -61,6 +62,7 @@ CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_SPL_PHY=y +CONFIG_OMAP_USB2_PHY=y CONFIG_PMIC_PALMAS=y CONFIG_PMIC_LP873X=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 5a8129c..6647bd4 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -50,6 +50,7 @@ CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_PCF8575_GPIO=y CONFIG_DM_I2C=y +CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y @@ -63,6 +64,7 @@ CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_SPL_PHY=y +CONFIG_OMAP_USB2_PHY=y CONFIG_PMIC_PALMAS=y CONFIG_PMIC_LP873X=y CONFIG_DM_REGULATOR_FIXED=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 08/10] dts: dra7x: Disable USB1 on all evms
On all the EVMs featuring a SOC of the DRA7 family, the USB1 port is used
as a device for DFU. This port is managed by the platform code and must not
be advertised to the DWC3 DM driver.
This will be changed when/if support for the device mode is added to the
dwc3-omap driver.
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2:
- Instead of disabling USB1 port in dts files, use *-u-boot.dtsi files
arch/arm/dts/dra7-evm-u-boot.dtsi | 8
arch/arm/dts/dra71-evm-u-boot.dtsi | 8
arch/arm/dts/dra72-evm-revc-u-boot.dtsi | 8
arch/arm/dts/dra72-evm-u-boot.dtsi | 23 +++
arch/arm/dts/dra76-evm-u-boot.dtsi | 8
5 files changed, 55 insertions(+)
create mode 100644 arch/arm/dts/dra72-evm-u-boot.dtsi
diff --git a/arch/arm/dts/dra7-evm-u-boot.dtsi
b/arch/arm/dts/dra7-evm-u-boot.dtsi
index 62ef830..ce6e365 100644
--- a/arch/arm/dts/dra7-evm-u-boot.dtsi
+++ b/arch/arm/dts/dra7-evm-u-boot.dtsi
@@ -13,3 +13,11 @@
&pcf_hdmi{
u-boot,i2c-offset-len = <0>;
};
+
+&usb1 {
+ status = "disabled";
+};
+
+&omap_dwc3_1 {
+ status = "disabled";
+};
diff --git a/arch/arm/dts/dra71-evm-u-boot.dtsi
b/arch/arm/dts/dra71-evm-u-boot.dtsi
index 8ae64c0..3e28b72 100644
--- a/arch/arm/dts/dra71-evm-u-boot.dtsi
+++ b/arch/arm/dts/dra71-evm-u-boot.dtsi
@@ -21,3 +21,11 @@
&cpsw_emac1 {
phy-handle = <&dp83867_1>;
};
+
+&usb1 {
+ status = "disabled";
+};
+
+&omap_dwc3_1 {
+ status = "disabled";
+};
diff --git a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi
b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi
index 8ae64c0..3e28b72 100644
--- a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi
+++ b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi
@@ -21,3 +21,11 @@
&cpsw_emac1 {
phy-handle = <&dp83867_1>;
};
+
+&usb1 {
+ status = "disabled";
+};
+
+&omap_dwc3_1 {
+ status = "disabled";
+};
diff --git a/arch/arm/dts/dra72-evm-u-boot.dtsi
b/arch/arm/dts/dra72-evm-u-boot.dtsi
new file mode 100644
index 000..ce6e365
--- /dev/null
+++ b/arch/arm/dts/dra72-evm-u-boot.dtsi
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include "omap5-u-boot.dtsi"
+
+&pcf_gpio_21{
+ u-boot,i2c-offset-len = <0>;
+};
+
+&pcf_hdmi{
+ u-boot,i2c-offset-len = <0>;
+};
+
+&usb1 {
+ status = "disabled";
+};
+
+&omap_dwc3_1 {
+ status = "disabled";
+};
diff --git a/arch/arm/dts/dra76-evm-u-boot.dtsi
b/arch/arm/dts/dra76-evm-u-boot.dtsi
index b007f78..81aa423 100644
--- a/arch/arm/dts/dra76-evm-u-boot.dtsi
+++ b/arch/arm/dts/dra76-evm-u-boot.dtsi
@@ -13,3 +13,11 @@
&cpsw_emac1 {
phy-handle = <&dp83867_1>;
};
+
+&usb1 {
+ status = "disabled";
+};
+
+&omap_dwc3_1 {
+ status = "disabled";
+};
--
2.7.4
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[U-Boot] [PATCH v2 06/10] board; ti: am57xx: turn on USB clocks
From: Vignesh R
Enable USB clocks in late init stage to support ports under DM_USB.
Signed-off-by: Vignesh R
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2:
- am57xx boards: when DM_USB is used, turn on the required USB clocks
board/ti/am57xx/board.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 5bd8778..cd53776 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -676,6 +676,19 @@ out:
return;
}
+#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL)
+static int device_okay(const char *path)
+{
+ int node;
+
+ node = fdt_path_offset(gd->fdt_blob, path);
+ if (node < 0)
+ return 0;
+
+ return fdtdec_get_is_enabled(gd->fdt_blob, node);
+}
+#endif
+
int board_late_init(void)
{
setup_board_eeprom_env();
@@ -715,6 +728,12 @@ int board_late_init(void)
board_ti_set_ethaddr(2);
#endif
+#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL)
+ if (device_okay("/ocp/omap_dwc3_1@4888"))
+ enable_usb_clocks(0);
+ if (device_okay("/ocp/omap_dwc3_2@488c"))
+ enable_usb_clocks(1);
+#endif
return 0;
}
--
2.7.4
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[U-Boot] [PATCH v2 04/10] phy: Add a new driver for OMAP's USB2 PHYs
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2:
- omap-usb2-phy: Implement power_on and power_off callbacks
drivers/phy/Kconfig | 8 ++
drivers/phy/Makefile| 1 +
drivers/phy/omap-usb2-phy.c | 198
3 files changed, 207 insertions(+)
create mode 100644 drivers/phy/omap-usb2-phy.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 3b9a09c..dbf4e4d 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -85,4 +85,12 @@ config STI_USB_PHY
used by USB2 and USB3 Host controllers available on
STiH407 SoC families.
+config OMAP_USB2_PHY
+ bool "Support OMAP's USB2 PHY"
+ depends on PHY
+ depends on SYSCON
+ help
+ Support for the OMAP's USB2 PHY.
+ This PHY is found on OMAP devices supporting USB2.
+
endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 668040b..86b77d8 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
+obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o
diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c
new file mode 100644
index 000..9dcf7df
--- /dev/null
+++ b/drivers/phy/omap-usb2-phy.c
@@ -0,0 +1,198 @@
+/*
+ * OMAP USB2 PHY driver
+ *
+ * Copyright (c) 2017
+ * Jean-Jacques Hiblot
+ * based on dwc3-sti-glue
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(0)
+
+#define OMAP_DEV_PHY_PDBIT(0)
+#define OMAP_USB2_PHY_PD BIT(28)
+
+#define USB2PHY_DISCON_BYP_LATCH BIT(31)
+#define USB2PHY_ANA_CONFIG1(0x4c)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct omap_usb2_phy {
+ struct regmap *pwr_regmap;
+ ulong flags;
+ void *phy_base;
+ u32 pwr_reg_offset;
+};
+
+struct usb_phy_data {
+ const char *label;
+ u8 flags;
+ u32 mask;
+ u32 power_on;
+ u32 power_off;
+};
+
+static const struct usb_phy_data omap5_usb2_data = {
+ .label = "omap5_usb2",
+ .flags = 0,
+ .mask = OMAP_DEV_PHY_PD,
+ .power_off = OMAP_DEV_PHY_PD,
+};
+
+static const struct usb_phy_data dra7x_usb2_data = {
+ .label = "dra7x_usb2",
+ .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+ .mask = OMAP_DEV_PHY_PD,
+ .power_off = OMAP_DEV_PHY_PD,
+};
+
+static const struct usb_phy_data dra7x_usb2_phy2_data = {
+ .label = "dra7x_usb2_phy2",
+ .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+ .mask = OMAP_USB2_PHY_PD,
+ .power_off = OMAP_USB2_PHY_PD,
+};
+
+static const struct udevice_id omap_usb2_id_table[] = {
+ {
+ .compatible = "ti,omap5-usb2",
+ .data = (ulong)&omap5_usb2_data,
+ },
+ {
+ .compatible = "ti,dra7x-usb2",
+ .data = (ulong)&dra7x_usb2_data,
+ },
+ {
+ .compatible = "ti,dra7x-usb2-phy2",
+ .data = (ulong)&dra7x_usb2_phy2_data,
+ },
+ {},
+};
+
+static int omap_usb_phy_power(struct phy *usb_phy, bool on)
+{
+ struct udevice *dev = usb_phy->dev;
+ const struct usb_phy_data *data;
+ const struct omap_usb2_phy *phy = dev_get_priv(dev);
+ u32 val;
+ int rc;
+
+ data = (const struct usb_phy_data *)dev_get_driver_data(dev);
+ if (!data)
+ return -EINVAL;
+
+ rc = regmap_read(phy->pwr_regmap, phy->pwr_reg_offset, &val);
+ if (rc)
+ return rc;
+ val &= ~data->mask;
+ if (on)
+ val |= data->power_on;
+ else
+ val |= data->power_off;
+ rc = regmap_write(phy->pwr_regmap, phy->pwr_reg_offset, val);
+ if (rc)
+ return rc;
+
+ return 0;
+}
+
+static int omap_usb2_phy_init(struct phy *usb_phy)
+{
+ struct udevice *dev = usb_phy->dev;
+ struct omap_usb2_phy *priv = dev_get_priv(dev);
+ u32 val;
+
+ if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
+ /*
+*
+* Reduce the sensitivity of internal PHY by enabling the
+* DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This
+* resolves issues with certain devices which can otherwise
+* be prone to false disconnects.
+*
+*/
+ val = readl(priv->phy_base + USB2PHY_ANA_CONFIG1);
+ val |= USB2PHY_DISCON_BYP_LATCH;
+ writel(val, priv->phy_base + USB2PHY_ANA_CONFIG1);
+ }
+
+ return 0;
+}
+
+static int omap_usb2_phy_power_on(struct phy *usb_phy)
+{
+ return omap_us
[U-Boot] [PATCH v2 05/10] board: ti: dra7xx-evm: turn on USB clocks in late init stage
For USB ports that use the Driver Model, turn on the clocks during the
late init stage.
Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini
---
Changes in v2: None
board/ti/dra7xx/evm.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 06f061c..c1e1b8e 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -647,6 +647,19 @@ int dram_init_banksize(void)
return 0;
}
+#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL)
+static int device_okay(const char *path)
+{
+ int node;
+
+ node = fdt_path_offset(gd->fdt_blob, path);
+ if (node < 0)
+ return 0;
+
+ return fdtdec_get_is_enabled(gd->fdt_blob, node);
+}
+#endif
+
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
@@ -686,6 +699,12 @@ int board_late_init(void)
if (board_is_dra71x_evm())
palmas_i2c_write_u8(LP873X_I2C_SLAVE_ADDR, 0x9, 0x7);
#endif
+#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL)
+ if (device_okay("/ocp/omap_dwc3_1@4888"))
+ enable_usb_clocks(0);
+ if (device_okay("/ocp/omap_dwc3_2@488c"))
+ enable_usb_clocks(1);
+#endif
return 0;
}
--
2.7.4
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[U-Boot] [PATCH v2 03/10] phy: ti-pip3-phy: Add support for USB3 PHY
From: Vignesh R
Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.
Signed-off-by: Vignesh R
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2:
- Add USB3 support to ti-pipe3-phy driver
drivers/phy/ti-pipe3-phy.c | 30 +++---
1 file changed, 23 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c
index babf2ff..9fddd01 100644
--- a/drivers/phy/ti-pipe3-phy.c
+++ b/drivers/phy/ti-pipe3-phy.c
@@ -266,10 +266,13 @@ static int pipe3_exit(struct phy *phy)
return -EBUSY;
}
- val = readl(pipe3->pll_reset_reg);
- writel(val | SATA_PLL_SOFT_RESET, pipe3->pll_reset_reg);
- mdelay(1);
- writel(val & ~SATA_PLL_SOFT_RESET, pipe3->pll_reset_reg);
+ if (pipe3->pll_reset_reg) {
+ val = readl(pipe3->pll_reset_reg);
+ writel(val | SATA_PLL_SOFT_RESET, pipe3->pll_reset_reg);
+ mdelay(1);
+ writel(val & ~SATA_PLL_SOFT_RESET, pipe3->pll_reset_reg);
+ }
+
return 0;
}
@@ -332,9 +335,11 @@ static int pipe3_phy_probe(struct udevice *dev)
if (!pipe3->power_reg)
return -EINVAL;
- pipe3->pll_reset_reg = get_reg(dev, "syscon-pllreset");
- if (!pipe3->pll_reset_reg)
- return -EINVAL;
+ if (device_is_compatible(dev, "ti,phy-pipe3-sata")) {
+ pipe3->pll_reset_reg = get_reg(dev, "syscon-pllreset");
+ if (!pipe3->pll_reset_reg)
+ return -EINVAL;
+ }
pipe3->dpll_map = (struct pipe3_dpll_map *)dev_get_driver_data(dev);
@@ -351,8 +356,19 @@ static struct pipe3_dpll_map dpll_map_sata[] = {
{ },/* Terminator */
};
+static struct pipe3_dpll_map dpll_map_usb[] = {
+ {1200, {1250, 5, 4, 20, 0} }, /* 12 MHz */
+ {1680, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */
+ {1920, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */
+ {2000, {1000, 7, 4, 10, 0} }, /* 20 MHz */
+ {2600, {1250, 12, 4, 20, 0} }, /* 26 MHz */
+ {3840, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */
+ { },/* Terminator */
+};
+
static const struct udevice_id pipe3_phy_ids[] = {
{ .compatible = "ti,phy-pipe3-sata", .data = (ulong)&dpll_map_sata },
+ { .compatible = "ti,omap-usb3", .data = (ulong)&dpll_map_usb},
{ }
};
--
2.7.4
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[U-Boot] [PATCH v2 02/10] usb: omap5: Add glue logic to support DM for USB host
The omap5 uses the dwc3. The dwc3 supports the driver model but it requires
some glue logic to load the the driver.
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2: None
drivers/usb/host/Kconfig | 10 +
drivers/usb/host/Makefile | 1 +
drivers/usb/host/dwc3-omap-glue.c | 47 +++
3 files changed, 58 insertions(+)
create mode 100644 drivers/usb/host/dwc3-omap-glue.c
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 90b2f78..405ab5f 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -79,6 +79,16 @@ config USB_XHCI_DRA7XX_INDEX
Select the DRA7XX xHCI USB index.
Current supported values: 0, 1.
+config USB_DM_XHCI_OMAP
+ bool "Support for OMAP family on-chip xHCI USB controller (DM version)"
+ depends on DM_USB
+ depends on ARCH_OMAP2PLUS
+ default y if DRA7XX
+ help
+ Enables support for the on-chip xHCI controller on TI OMAP family SoCs
+ using the Driver Model.
+ This driver provides the glue logic to probe the generic dwc3 driver.
+
config USB_XHCI_FSL
bool "Support for NXP Layerscape on-chip xHCI USB controller"
default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 7f9ba24..416d0eb 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -60,6 +60,7 @@ obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
obj-$(CONFIG_USB_XHCI_RCAR) += xhci-rcar.o
obj-$(CONFIG_USB_XHCI_STI) += dwc3-sti-glue.o
+obj-$(CONFIG_USB_DM_XHCI_OMAP) += dwc3-omap-glue.o
# designware
obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/dwc3-omap-glue.c
b/drivers/usb/host/dwc3-omap-glue.c
new file mode 100644
index 000..1110fb6
--- /dev/null
+++ b/drivers/usb/host/dwc3-omap-glue.c
@@ -0,0 +1,47 @@
+/*
+ * OMAP5 family DWC3 specific Glue layer
+ *
+ * Copyright (c) 2017
+ * Jean-Jacques Hiblot
+ * based on dwc3-sti-glue
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int omap5_dwc3_glue_bind(struct udevice *dev)
+{
+ int dwc3_node;
+
+ /* check if one subnode is present */
+ dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
+ if (dwc3_node <= 0) {
+ printf("Can't find subnode for %s\n", dev->name);
+ return -ENODEV;
+ }
+ /* check if the subnode compatible string is the dwc3 one*/
+ if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node,
+ "snps,dwc3") != 0) {
+ printf("Can't find dwc3 subnode for %s\n", dev->name);
+ return -ENODEV;
+ }
+
+ return dm_scan_fdt_dev(dev);
+}
+
+static const struct udevice_id omap5_dwc3_glue_ids[] = {
+ { .compatible = "ti,dwc3" },
+ { }
+};
+
+U_BOOT_DRIVER(dwc3_omap5_glue) = {
+ .name = "dwc3_omap5_glue",
+ .id = UCLASS_MISC,
+ .of_match = omap5_dwc3_glue_ids,
+ .bind = omap5_dwc3_glue_bind,
+};
--
2.7.4
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[U-Boot] [PATCH v2 01/10] syscon: dm: Add a new method to get a regmap from DTS
syscon_regmap_lookup_by_phandle() can be used to the regmap of a syscon
device from a reference in the DTS. It operates similarly to the linux
version of the namesake function.
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2: None
drivers/core/syscon-uclass.c | 23 +++
include/syscon.h | 13 +
2 files changed, 36 insertions(+)
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index a69937e..0c76bfc 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -45,6 +45,29 @@ static int syscon_pre_probe(struct udevice *dev)
#endif
}
+struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev,
+ const char *name)
+{
+ struct udevice *syscon;
+ struct regmap *r;
+ int err;
+
+ err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+ name, &syscon);
+ if (err) {
+ printf("unable to find syscon device\n");
+ return ERR_PTR(err);
+ }
+
+ r = syscon_get_regmap(syscon);
+ if (!r) {
+ printf("unable to find regmap\n");
+ return ERR_PTR(-ENODEV);
+ }
+
+ return r;
+}
+
int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp)
{
struct udevice *dev;
diff --git a/include/syscon.h b/include/syscon.h
index 5d52b1c..23d257a 100644
--- a/include/syscon.h
+++ b/include/syscon.h
@@ -74,6 +74,19 @@ int syscon_get_by_driver_data(ulong driver_data, struct
udevice **devp);
struct regmap *syscon_get_regmap_by_driver_data(ulong driver_data);
/**
+ * syscon_regmap_lookup_by_phandle() - Look up a controller by a phandle
+ *
+ * This operates by looking up the given name in the device (device
+ * tree property) of the device using the system controller.
+ *
+ * @dev: Device using the system controller
+ * @name: Name of property referring to the system controller
+ * @return A pointer to the regmap if found, ERR_PTR(-ve) on error
+ */
+struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev,
+ const char *name);
+
+/**
* syscon_get_first_range() - get the first memory range from a syscon regmap
*
* @driver_data: Driver data value to look up
--
2.7.4
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Re: [U-Boot] [PATCH v3 7/7] test/py: add spi_flash tests
On 03/13/2018 08:03 PM, Liam Beguin wrote: Add basic tests for the spi_flash subsystem. Reviewed-by: Stephen Warren ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 7/7] test/py: add spi_flash tests
Hi Michal, On Wed, 14 Mar 2018 at 10:35 Michal Simek wrote: > On 14.3.2018 03:03, Liam Beguin wrote: > > Add basic tests for the spi_flash subsystem. > > > > Signed-off-by: Liam Beguin > > --- > > test/py/tests/test_sf.py | 217 > +++ > > 1 file changed, 217 insertions(+) > > create mode 100644 test/py/tests/test_sf.py > > > > diff --git a/test/py/tests/test_sf.py b/test/py/tests/test_sf.py > > new file mode 100644 > > index ..8bd1623ff303 > > --- /dev/null > > +++ b/test/py/tests/test_sf.py > > @@ -0,0 +1,217 @@ > > +# Copyright (c) 2017, Xiphos Systems Corp. All rights reserved. > > here should be probably also xilinx copyright because some things were > taken from that. > > Right, is this ok with you? (copied from your initial patch) Copyright (c) 2016, Xilinx Inc. Michal Simek > Michal > Liam Beguin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] efi_loader: Allow width smaller than buffer stride in efi_gop Blt()
On 03/14/2018 04:31 AM, Ivan Gorinov wrote:
Current implementation of Blt() in EFI_GRAPHICS_OUTPUT_PROTOCOL
assumes the memory buffer stride (number of bytes in a row)
always matches the rectangle Width, ignoring non-zero Delta.
Signed-off-by: Ivan Gorinov
Hello Ivan,
thanks for reporting the problem. Unfortunately your patch is not based
on the custodian's repository. You can find the upcoming EFI related
patches in
https://github.com/agraf/u-boot.git, branch efi-next.
I tried to address your problem in
efi_loader: implement missing bit blit operations in gop
https://lists.denx.de/pipermail/u-boot/2018-February/319846.html
But I think I got it wrong as according to the UEFI specification
'delta' is measured in bytes and not in pixels.
I will create a patch for lib/efi_loader/efi_gop.c and add you on cc. It
would be great if you could review efi_gop.c once again.
lib/efi_selftest/efi_selftest_bitblt.c should be adjusted to test the
use of 'delta'.
Best regards
Heinrich
---
lib/efi_loader/efi_gop.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 3caddd5..362065b 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -64,6 +64,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
*buffer,
{
struct efi_gop_obj *gopobj = container_of(this, struct efi_gop_obj,
ops);
int i, j, line_len16, line_len32;
+ int buffer_stride;
void *fb;
EFI_ENTRY("%p, %p, %u, %zu, %zu, %zu, %zu,the %zu, %zu, %zu", this,
@@ -72,6 +73,11 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
*buffer,
if (operation != EFI_BLT_BUFFER_TO_VIDEO)
return EFI_EXIT(EFI_INVALID_PARAMETER);
+ if (delta == 0)
+ buffer_stride = width * sizeof(u32);
+ else
+ buffer_stride = delta;
+
fb = gopobj->fb;
line_len16 = gopobj->info.width * sizeof(u16);
line_len32 = gopobj->info.width * sizeof(u32);
@@ -87,7 +93,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
*buffer,
for (i = 0; i < height; i++) {
u32 *dest = fb + ((i + dy) * line_len32) +
(dx * sizeof(u32));
- u32 *src = buffer + ((i + sy) * line_len32) +
+ u32 *src = buffer + ((i + sy) * buffer_stride) +
(sx * sizeof(u32));
/* Same color format, just memcpy */
@@ -102,7 +108,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void
*buffer,
for (i = 0; i < height; i++) {
u16 *dest = fb + ((i + dy) * line_len16) +
(dx * sizeof(u16));
- u32 *src = buffer + ((i + sy) * line_len32) +
+ u32 *src = buffer + ((i + sy) * buffer_stride) +
(sx * sizeof(u32));
/* Convert from rgb888 to rgb565 */
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Re: [U-Boot] [PATCH v3 7/7] test/py: add spi_flash tests
On 14.3.2018 03:03, Liam Beguin wrote: > Add basic tests for the spi_flash subsystem. > > Signed-off-by: Liam Beguin > --- > test/py/tests/test_sf.py | 217 > +++ > 1 file changed, 217 insertions(+) > create mode 100644 test/py/tests/test_sf.py > > diff --git a/test/py/tests/test_sf.py b/test/py/tests/test_sf.py > new file mode 100644 > index ..8bd1623ff303 > --- /dev/null > +++ b/test/py/tests/test_sf.py > @@ -0,0 +1,217 @@ > +# Copyright (c) 2017, Xiphos Systems Corp. All rights reserved. here should be probably also xilinx copyright because some things were taken from that. Michal ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/2] omap: Fix AM335x build with enabled fastboot flash
On Tue, Feb 27, 2018 at 11:45:03PM +0200, Sam Protsenko wrote: > When enabling CONFIG_FASTBOOT_FLASH in am335x_boneblack_defconfig, next > build errors and warnings occur: > > arch/arm/mach-omap2/utils.c: In function ‘omap_set_fastboot_cpu’: > arch/arm/mach-omap2/utils.c:26:16: warning: implicit declaration of > function ‘omap_revision’ [-Wimplicit-function-declaration] > u32 cpu_rev = omap_revision(); > ^ > arch/arm/mach-omap2/utils.c:29:7: error: ‘DRA762_ES1_0’ undeclared > (first use in this function) > > Include asm/omap_common.h explicitly to avoid those. > > Signed-off-by: Sam Protsenko > Acked-by: Lukasz Majewski > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] configs: stm32: Enable DOS_PARTITION for STM32F4/F7 boards
On Wed, Feb 28, 2018 at 04:49:55PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Enable DOS_PARTITION for boards STM32F429-eval, STM32F469-disco > and STM32F746-disco. > This allows to read FAT partition on mmc. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] ARM: dts: Add support for stm32f746-evaluation board support
On Fri, Feb 16, 2018 at 01:27:03PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This board offers: > _ STM32F746NGH6 microcontroller with 1 Mbyte Flash and 320+4 Kbytes RAM > _ Six 5 V power supply options: > Power jack > ST-LINK/V2-1 USB connector > User USB HS connector > User USB FS1 connector > User USB FS2 connector > Daughterboard > _ SAI Audio DAC, stereo audio jack which supports headset with microphone > _ Stereo digital microphone, audio jack connector used to connect > external speakers > _ 2 Gbytes (or more) SDMMC interface microSD card > _ RF-EEPROM on I2C compatible serial interface > _ RS-232 communication > _ IrDA transceiver > _ JTAG/SWD and ETM trace debug support, ST-LINK/V2-1 embedded > _ IEEE-802.3-2002 compliant Ethernet connector > _ Camera module > _ 8Mx32 bit SDRAM, 1Mx16 bit SRAM & 8Mx16 bit Nor Flash > _ 512 Mbits QuadSPI Nor Flash > _ 5.7 inch 640x480 pixel TFT color LCD with capacitive touch panel > _ Joystick with 4-direction control and selector > _ Reset, WakeUp/Tamper or key button > _ 4 color user LEDs > _ Extension connectors & memory connectors for daughterboard or > wrapping board > _ USB OTG HS and FS with Micro-AB connectors > _ RTC with backup battery > _ CAN 2.0A/B compliant connection > _ Potentiometer > _ Motor control connector > > More detailed information are available here : > http://www.st.com/en/evaluation-tools/stm32746g-eval.html > > To compile stm32f746-eval board, use same defconfig as > stm32f746-disco, the only difference is to pass > "DEVICE_TREE=stm32746g-eval". > > Signed-off-by: Christophe Priouzeau > Signed-off-by: Patrice Chotard > Acked-by: Vikas Manocha Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v1, 1/4] ARM: dts: dra76x: create a common file with MMC/SD IOdelay data
On Tue, Feb 27, 2018 at 05:05:47PM +0100, Jean-Jacques Hiblot wrote: > Add a common device-tree include file with MMC/SD IOdelay data > for DRA76x SoC based on the linux DTSI file. > > In the most common case, IOdelay data available in datamanual > can directly be used. This file caters to that common case. > > Data is based on DRA76x datamanual, SPRS993A, revised July 2017. > > Signed-off-by: Jean-Jacques Hiblot Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/3] cmd: part: Extract common code to separate function
On Mon, Feb 26, 2018 at 11:18:00PM +0200, Sam Protsenko wrote: > Refactor the code for "part start" and "part size" commands to avoid > code duplication. > > Signed-off-by: Sam Protsenko > Reviewed-by: Lukasz Majewski Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/3] cmd: part: Allow passing partition name to start and size
On Mon, Feb 26, 2018 at 11:17:59PM +0200, Sam Protsenko wrote:
> Allow passing the partition name to "part start" and "part size"
> commands, so we can avoid magic numbers in the environment.
>
> Consider one real use-case: in include/environment/ti/boot.h we have
> commands like these:
>
> setenv boot_part 9
> part start mmc ${mmcdev} ${boot_part} boot_start
> part size mmc ${mmcdev} ${boot_part} boot_size
> mmc read ${loadaddr} ${boot_start} ${boot_size}
>
> Now suppose that we have changed the partition table and boot_part now
> is 10. We will need to fix commands above. And anyone who relies on
> these boot commands, will need to change them accordingly, too (this was
> an actual case in our lab while testing Linux boot on Android
> environment).
>
> By providing the option to pass partition name instead, we fix mentioned
> issue, by eliminating the necessity to use magic numbers.
>
> Signed-off-by: Sam Protsenko
> Reviewed-by: Lukasz Majewski
Applied to u-boot/master, thanks!
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Re: [U-Boot] [U-Boot, v2, 2/2] disk: part: use common api to lookup part driver
On Sat, Feb 10, 2018 at 05:55:38PM +0800, Kever Yang wrote: > Do not need to scan disk every time when we get part info > by name. > > Signed-off-by: Kever Yang Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 2/5] arch-stm32: Move gpio.h for STM32 SoCs in include/asm/
On Fri, Feb 09, 2018 at 01:09:54PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Instead to have 3 identical gpio.h for all STM32 SoCs, > migrate them in one file in include/asm. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 1/2] disk: part: scan the disk if the part_type is unknown
On Sat, Feb 10, 2018 at 05:55:37PM +0800, Kever Yang wrote: > If a DUT do not have partition table, and we write one with 'gpt write' > cmd, we should able to list the partition with 'part list' cmd. > It's reasonable to scan the disk again if the initial part_type is > unknown in case we just write a new one into disk. > > Signed-off-by: Kever Yang Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/2] configs: am335x_boneblack: Enable fastboot flash capability
On Tue, Feb 27, 2018 at 11:45:04PM +0200, Sam Protsenko wrote: > Signed-off-by: Sam Protsenko > Acked-by: Lukasz Majewski > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v1, 2/4] ARM: dts: dra76-evm: shift to using common IOdelay data
On Tue, Feb 27, 2018 at 05:05:48PM +0100, Jean-Jacques Hiblot wrote: > Now that we have a device-tree include file with common > MMC/SD IOdelay data for DRA76x SoC, shift the EVM device-tree > file to using that. > Also fix the name of the IO voltage regulator for mmc1. > > Signed-off-by: Jean-Jacques Hiblot Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v2,1/5] arch-stm32f4: Remove fmc.h file
On Fri, Feb 09, 2018 at 01:09:53PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > fmc.h file is no more used, remove it. > All FMC related defines are declared in drivers/ram/stm32_sdram.c > which is common to all STM32 SoCs. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/2] mmc: stm32: sdmmc2: add hardware flow control support
On Wed, Feb 07, 2018 at 05:19:58PM +0100, patrice.chot...@st.com wrote: > From: Patrick Delaunay > > The hardware flow control functionality is used to avoid > FIFO underrun (TX mode) and overrun (RX mode) errors. > The behavior is to stop SDMMC_CK during data transfer and > freeze the SDMMC state machines. > > Signed-off-by: Patrick Delaunay > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] ARM: dts: stm32: limit sdio frequency to 14Mhz for stm32f429i-eval
On Thu, Feb 08, 2018 at 05:25:19PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This avoids the following errors while reading on mmc: > Read data bytes CRC error: 0x2 > switch to partitions #0, OK > mmc0 is current device > Read data bytes CRC error: 0x82002 > ** Unrecognized filesystem type ** > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/7] clk: clk_stm32f: Fix stm32_clk_get_rate()
On Thu, Feb 08, 2018 at 05:20:45PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Wrong parameter was passed to stm32_clk_pll48clk_rate(). > sysclk (PLL_p output value) was passed instead of VCO value. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 6/7] clk: clk_stm32f: Add set_rate for LTDC clock
On Thu, Feb 08, 2018 at 05:20:50PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Implement set_rate() for LTDC clock only, set_rate for other > clocks will be added if needed. This is needed by future LTDC driver > improvements. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 3/5] arch-stm32: Factorize stm32.h for STM32F4 and F7
On Fri, Feb 09, 2018 at 01:09:55PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > For STM32F4 and F7 SoCx family, a specific stm32.h file exists. > Some common defines are duplicated or even unused in each of > these stm32.h. > > Factorize all common definition in arch/arm/include/asm/stm32f.h and keep > specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 1/3] ARM: omap3: beagle: Set 'mtdids' and 'mtdparts' in board file
On Mon, Feb 26, 2018 at 05:52:57PM -0600, Derald D. Woods wrote: > BeagleBoard 'xM' does not really have NAND. CONFIG_MTDIDS_DEFAULT and > CONFIG_MTDPARTS_DEFAULT can/should be empty for 'xM'. This commit sets > the defined values if they exist. > > Signed-off-by: Derald D. Woods Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 3/3] ARM: omap3: evm: Sync with omap3_beagle configuration
On Mon, Feb 26, 2018 at 05:52:59PM -0600, Derald D. Woods wrote: > This commit does the following for OMAP3 EVM: > > - Track omap3_beagle changes where possible > - Remove CONFIG_SYS_MPUCLK and CONFIG_MTD which are not needed for the > default board configuration to work. > - Remove CONFIG_SPL_SYS_MALLOC_SIMPLE and CONFIG_SYS_MALLOC_F_LEN from > default config. CONFIG_SYS_MALLOC_F_LEN=0x400 is set by configuration > automatically. [allows board to boot with SERIAL_SEARCH_ALL=y] > - Use updated NAND layout: > > device nand0 , # parts = 6 > > #: name sizeoffset > - > 0: spl 0x0008(512k)0x > 1: u-boot 0x001e(1920k) 0x0008 > 2: u-boot-env 0x0002(128k)0x0026 > 3: dtb 0x0002(128k)0x0028 > 4: kernel 0x0060(6m) 0x002a > 5: rootfs 0x0f76(-) 0x008a > - > > Signed-off-by: Derald D. Woods Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v3, 2/3] ARM: omap3: beagle: Enable DM_SERIAL, update distro usage and NAND layout
On Mon, Feb 26, 2018 at 05:52:58PM -0600, Derald D. Woods wrote:
> This commit does the following for BeagleBoard{-xM}:
>
> - Enable DM_SERIAL which also enables SPL_DM_SERIAL
> - Misc. config updates in support of DM_SERIAL
> - Use updated NAND layout (BeagleBoard):
>
> device nand0 , # parts = 6
>
> #: name sizeoffset
> -
> 0: spl 0x0008(512k)0x
> 1: u-boot 0x001e(1920k) 0x0008
> 2: u-boot-env 0x0002(128k)0x0026
> 3: dtb 0x0002(128k)0x0028
> 4: kernel 0x0060(6m) 0x002a
> 5: rootfs 0x0f76(-) 0x008a
> -
>
> - Use MMC and UBIFS support from config_distro_bootcmd.h
> - Use LEGACY_MMC and NAND support defined in omap3_beagle.h
>
> [MMC(0:1)/extlinux/extlinux.conf]
Applied to u-boot/master, thanks!
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Re: [U-Boot] [U-Boot, 2/7] clk: clk_stm32f: Fix RCC_PLLSAICFGR mask defines
On Thu, Feb 08, 2018 at 05:20:46PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Use the correct name for RCC_PLLSAICFGR_PLLSAIx_MASK masks. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v1, 4/4] ARM: dts: dra7x: Make pinctrl and IOdelays for MMC2 available in SPL
On Tue, Feb 27, 2018 at 05:05:50PM +0100, Jean-Jacques Hiblot wrote: > The SPL can't use high speed MMC modes if the associated pinctrl and > IOdelays are described in the DTS. > Make them available in SPL by tagging the nodes with 'u-boot,dm-spl;' > > Signed-off-by: Jean-Jacques Hiblot Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,1/2] test/py: add MMC/SD block read test
On Tue, Feb 20, 2018 at 12:51:54PM -0700, Stephen Warren wrote: > From: Stephen Warren > > Add a standalone MMC block read test. This allows direct testing of MMC > access rather than relying on doing so as a side-effect of e.g. DFU or > UMS testing, which may not be enabled on all platforms. > > Signed-off-by: Stephen Warren Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v1, 3/4] configs: dra7xx_evm: Enable support for the HS200 mmc mode in the SPL
On Tue, Feb 27, 2018 at 05:05:49PM +0100, Jean-Jacques Hiblot wrote: > Beside enabling the support for HS200 in mmc core, enabling the HS200 > support in the SPL requires multi-dtb support in the SPL because pinctrl > and IOdelays vary across SOCs. > > Also we need to make sure that the pinctrl properties arenot removed from > the dts by setting CONFIG_OF_SPL_REMOVE_PROPS to remove only clocks and > interrupts properties. > > Signed-off-by: Jean-Jacques Hiblot Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,7/7] clk: clk_stm32f: Add DSI clock support
On Thu, Feb 08, 2018 at 05:20:51PM +0100, patrice.chot...@st.com wrote: > From: Patrice Chotard > > DSI clock is available on STM32F769-disco and > STM32F469-disco board. > > Signed-off-by: Yannick Fertre > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
