Re: [U-Boot] [PATCH v5 2/2] timer: Add High Precision Event Timers (HPET) support

2018-04-15 Thread Bin Meng
Hi Simon,

On Fri, Apr 13, 2018 at 12:42 AM, Simon Glass  wrote:
> Hi,
>
> On 8 April 2018 at 19:22, Bin Meng  wrote:
>> Hi Ivan,
>>
>> On Sat, Apr 7, 2018 at 3:18 AM, Ivan Gorinov  wrote:
>>> Add HPET driver as an alternative timer for x86 (default is TSC).
>>> HPET counter has constant frequency and does not need calibration.
>>> This change also makes TSC timer driver optional on x86.
>>> New HPET driver can also be selected as the early timer on x86.
>>>
>>> HPET can be selected as the tick timer in the Device Tree "chosen" node:
>>>
>>> /include/ "hpet.dtsi"
>>>
>>> ...
>>>
>>> chosen {
>>> tick-timer = "/hpet";
>>> };
>>>
>>> Signed-off-by: Ivan Gorinov 
>>> ---
>>>  arch/Kconfig   |   2 +-
>>>  arch/x86/Kconfig   |  21 ++
>>>  arch/x86/dts/hpet.dtsi |   7 ++
>>>  drivers/timer/Kconfig  |   9 +++
>>>  drivers/timer/Makefile |   1 +
>>>  drivers/timer/hpet_timer.c | 179 
>>> +
>>>  drivers/timer/tsc_timer.c  |   8 ++
>>>  7 files changed, 226 insertions(+), 1 deletion(-)
>>>  create mode 100644 arch/x86/dts/hpet.dtsi
>>>  create mode 100644 drivers/timer/hpet_timer.c
>>>
>
> [..]
>>> diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
>>> index 9296de6..bd0e75c 100644
>>> --- a/drivers/timer/tsc_timer.c
>>> +++ b/drivers/timer/tsc_timer.c
>>> @@ -277,6 +277,8 @@ success:
>>> return delta / 1000;
>>>  }
>>>
>>> +#ifdef CONFIG_X86_EARLY_TIMER_TSC
>>
>> Why do we surround the following APIs with CONFIG_X86_EARLY_TIMER_TSC?
>> These APIs are generic U-Boot timer APIs. If we select
>> CONFIG_X86_EARLY_TIMER_HPET, these APIs are not available and will
>> cause build error.
>>
>> Simon, do you think we should fix such in the timer uclass driver?
>
> We should not have arch-specific code in the uclass, or in any generic driver.

What I meant is these APIs like get_timer(). Can such APIs be moved to
timer uclass driver? To avoid conflicts with other timer drivers, in
this patch it was solved by using the config option
CONFIG_X86_EARLY_TIMER_TSC to hide this in the TSC driver, which does
not make sense.

Regards,
Bin
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[U-Boot] [PATCH] kbuild: use -fmacro-prefix-map to make __FILE__ a relative path

2018-04-15 Thread Masahiro Yamada
The __FILE__ macro is used everywhere in U-Boot to locate the file
printing the log message, such as WARN_ON(), etc.  If U-Boot is
built out of tree, this can be a long absolute path.

This is because Kbuild runs in the objtree instead of the srctree,
then __FILE__ is expanded to a file path prefixed with $(srctree)/.

A brand-new option from GCC, -fmacro-prefix-map, solves this problem.
If your compiler supports it, __FILE__ is the relative path from the
srctree regardless of O= option.  This provides more readable log,
more reproducible builds, and smaller image size.

[ Linux commit: a73619a845d5625079cc1b3b820f44c899618388 ]

Signed-off-by: Masahiro Yamada 
---

GCC 8 is required to use this new option.


 Makefile | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Makefile b/Makefile
index 5cfe43f..243add1 100644
--- a/Makefile
+++ b/Makefile
@@ -595,6 +595,9 @@ endif
 KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
 KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks)
 
+# change __FILE__ to the relative path from the srctree
+KBUILD_CFLAGS  += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
+
 KBUILD_CFLAGS  += -g
 # $(KBUILD_AFLAGS) sets -g, which causes gcc to pass a suitable -g
 # option to the assembler.
-- 
2.7.4

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[U-Boot] [PATCH] ARM: dts: uniphier: sync DT with Linux 4.17-rc1

2018-04-15 Thread Masahiro Yamada
Signed-off-by: Masahiro Yamada 
---

 arch/arm/dts/uniphier-ld11-global.dts   | 109 ++---
 arch/arm/dts/uniphier-ld11-ref.dts  |  25 --
 arch/arm/dts/uniphier-ld11.dtsi | 127 ++---
 arch/arm/dts/uniphier-ld20-global.dts   | 111 ++---
 arch/arm/dts/uniphier-ld20-ref.dts  |  25 --
 arch/arm/dts/uniphier-ld20.dtsi | 138 +---
 arch/arm/dts/uniphier-ld4-ref.dts   |  14 ++--
 arch/arm/dts/uniphier-ld4.dtsi  |  14 ++--
 arch/arm/dts/uniphier-ld6b-ref.dts  |  25 --
 arch/arm/dts/uniphier-ld6b.dtsi |  14 ++--
 arch/arm/dts/uniphier-pinctrl.dtsi  |  64 +--
 arch/arm/dts/uniphier-pro4-ace.dts  |  25 --
 arch/arm/dts/uniphier-pro4-ref.dts  |  25 --
 arch/arm/dts/uniphier-pro4-sanji.dts|  25 --
 arch/arm/dts/uniphier-pro4.dtsi |  32 ++--
 arch/arm/dts/uniphier-pro5.dtsi |  14 ++--
 arch/arm/dts/uniphier-pxs2-gentil.dts   |  49 ++--
 arch/arm/dts/uniphier-pxs2-vodka.dts|  62 --
 arch/arm/dts/uniphier-pxs2.dtsi |  89 +---
 arch/arm/dts/uniphier-pxs3-ref.dts  |  36 +++--
 arch/arm/dts/uniphier-pxs3.dtsi |  52 +---
 arch/arm/dts/uniphier-ref-daughter.dtsi |  14 ++--
 arch/arm/dts/uniphier-sld8-ref.dts  |  14 ++--
 arch/arm/dts/uniphier-sld8.dtsi |  14 ++--
 arch/arm/dts/uniphier-support-card.dtsi |  14 ++--
 25 files changed, 925 insertions(+), 206 deletions(-)

diff --git a/arch/arm/dts/uniphier-ld11-global.dts 
b/arch/arm/dts/uniphier-ld11-global.dts
index 5ffe7de..11be2aa 100644
--- a/arch/arm/dts/uniphier-ld11-global.dts
+++ b/arch/arm/dts/uniphier-ld11-global.dts
@@ -1,14 +1,13 @@
-/*
- * Device Tree Source for UniPhier LD11 Global Board
- *
- * Copyright (C) 2016-2017 Socionext Inc.
- *   Author: Masahiro Yamada 
- *   Kunihiko Hayashi 
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD11 Global Board
+//
+// Copyright (C) 2016-2017 Socionext Inc.
+//   Author: Masahiro Yamada 
+//   Kunihiko Hayashi 
 
 /dts-v1/;
+#include 
 #include "uniphier-ld11.dtsi"
 
 / {
@@ -37,6 +36,53 @@
device_type = "memory";
reg = <0 0x8000 0 0x4000>;
};
+
+   dvdd_reg: reg-fixed {
+   compatible = "regulator-fixed";
+   regulator-name = "DVDD";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   amp_vcc_reg: reg-fixed {
+   compatible = "regulator-fixed";
+   regulator-name = "AMP_VCC";
+   regulator-min-microvolt = <2400>;
+   regulator-max-microvolt = <2400>;
+   };
+
+   sound {
+   compatible = "audio-graph-card";
+   label = "UniPhier LD11";
+   widgets = "Headphone", "Headphone Jack";
+   dais = <_port2
+   _port3
+   _port4
+   _port0
+   _spdif_port0>;
+   };
+
+   spdif-out {
+   compatible = "linux,spdif-dit";
+   #sound-dai-cells = <0>;
+
+   port@0 {
+   spdif_tx: endpoint {
+   remote-endpoint = <_hiecout1>;
+   };
+   };
+   };
+
+   comp-spdif-out {
+   compatible = "linux,spdif-dit";
+   #sound-dai-cells = <0>;
+
+   port@0 {
+   comp_spdif_tx: endpoint {
+   remote-endpoint = <_spdif_hiecout1>;
+   };
+   };
+   };
 };
 
  {
@@ -47,9 +93,43 @@
status = "okay";
 };
 
+_hpcmout1 {
+   dai-format = "i2s";
+   remote-endpoint = <_speaker>;
+};
+
+_hiecout1 {
+   remote-endpoint = <_tx>;
+};
+
+_spdif_hiecout1 {
+   remote-endpoint = <_spdif_tx>;
+};
+
  {
status = "okay";
 
+   tas5707a@1d {
+   compatible = "ti,tas5711";
+   reg = <0x1d>;
+   reset-gpios = < UNIPHIER_GPIO_PORT(23, 4) GPIO_ACTIVE_LOW>;
+   pdn-gpios = < UNIPHIER_GPIO_PORT(23, 5) GPIO_ACTIVE_LOW>;
+   #sound-dai-cells = <0>;
+   AVDD-supply = <_reg>;
+   DVDD-supply = <_reg>;
+   PVDD_A-supply = <_vcc_reg>;
+   PVDD_B-supply = <_vcc_reg>;
+   PVDD_C-supply = <_vcc_reg>;
+   PVDD_D-supply = <_vcc_reg>;
+
+   port@0 {
+   tas_speaker: endpoint {
+   dai-format = "i2s";
+   

Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to switch QSPI bank

2018-04-15 Thread Calvin Johnson
On Fri, Apr 13, 2018 at 12:18 AM, Jagdish Gediya  wrote:
> Add command "boot_bank X" to switch the boot bank to either
> 1 or 2.

Are these functions required as this can be handled by new env vars to
switch banks?

>
> Signed-off-by: Jagdish Gediya 
> ---
>  board/freescale/ls1012ardb/ls1012ardb.c | 85 
> +
>  1 file changed, 85 insertions(+)
>
> diff --git a/board/freescale/ls1012ardb/ls1012ardb.c 
> b/board/freescale/ls1012ardb/ls1012ardb.c
> index ed5a8e6..4d4f6fb 100644
> --- a/board/freescale/ls1012ardb/ls1012ardb.c
> +++ b/board/freescale/ls1012ardb/ls1012ardb.c
> @@ -26,6 +26,9 @@
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> +#define BOOT_FROM_UPPER_BANK   0x2
> +#define BOOT_FROM_LOWER_BANK   0x1
> +
>  int checkboard(void)
>  {
>  #ifdef CONFIG_TARGET_LS1012ARDB
> @@ -212,3 +215,85 @@ int ft_board_setup(void *blob, bd_t *bd)
>
> return 0;
>  }
> +
> +static int switch_to_bank1(void)
> +{
> +   u8 data;
> +   int ret;
> +
> +   i2c_set_bus_num(0);
> +
> +   data = 0xf4;
> +   ret = i2c_write(0x24, 0x3, 1, , 1);
> +   if (ret) {
> +   printf("i2c write error to chip : %u, addr : %u, data : %u\n",
> +  0x24, 0x3, data);
> +   }
> +
> +   return ret;
> +}
> +
> +static int switch_to_bank2(void)
> +{
> +   u8 data;
> +   int ret;
> +
> +   i2c_set_bus_num(0);
> +
> +   data = 0xfc;
> +   ret = i2c_write(0x24, 0x7, 1, , 1);
> +   if (ret) {
> +   printf("i2c write error to chip : %u, addr : %u, data : %u\n",
> +  0x24, 0x7, data);
> +   goto err;
> +   }
> +
> +   data = 0xf5;
> +   ret = i2c_write(0x24, 0x3, 1, , 1);
> +   if (ret) {
> +   printf("i2c write error to chip : %u, addr : %u, data : %u\n",
> +  0x24, 0x3, data);
> +   }
> +err:
> +   return ret;
> +}
> +
> +static int convert_flash_bank(int bank)
> +{
> +   int ret = 0;
> +
> +   switch (bank) {
> +   case BOOT_FROM_UPPER_BANK:
> +   ret = switch_to_bank2();
> +   break;
> +   case BOOT_FROM_LOWER_BANK:
> +   ret = switch_to_bank1();
> +   break;
> +   default:
> +   ret = CMD_RET_USAGE;
> +   break;
> +   };
> +
> +   return ret;
> +}
> +
> +static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
> + char * const argv[])
> +{
> +   if (argc != 2)
> +   return CMD_RET_USAGE;
> +   if (strcmp(argv[1], "1") == 0)
> +   convert_flash_bank(BOOT_FROM_LOWER_BANK);
> +   else if (strcmp(argv[1], "2") == 0)
> +   convert_flash_bank(BOOT_FROM_UPPER_BANK);
> +   else
> +   return CMD_RET_USAGE;
> +
> +   return 0;
> +}
> +
> +U_BOOT_CMD(
> +   boot_bank, 2, 0, flash_bank_cmd,
> +   "Flash bank Selection Control",
> +   "bank[1-lower bank/2-upper bank] (e.g. boot_bank 1)"
> +);
> --
> 1.9.1
>
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Re: [U-Boot] skylake fsp

2018-04-15 Thread Bin Meng
Hi Christian,

On Fri, Apr 13, 2018 at 4:50 PM, Christian Gmeiner
 wrote:
> Hi all
>
> Currently I am trying to get the skylake fsp working with u-boot but I run
> into some issues:
>
> 1) I see the postcode POST_BIST_FAILURE triggered in car_init
>
> I am not sure how this could happen and I am not sure from where the BIST
> value comes from. I can see the following call chain
>
>  start16(..)
>  _start(..)
>  car_init(..)

The BIST value is in register eax. See below in start.S

/* Save BIST */
65movl%eax, %ebp

Then ebp's value will be tested in fsp_car.S

If you get this error, that means your processor does not power up correctly.

>
> 2) If I remove that check the last post code I see is POST_PRE_MRC
>
> It looks like fsp_init(..) gets called and hags.
>
> I am thankful for every hint I could get. In the meantime I will have
> a deeper look
> at the coreboot sources.
>

Well, there are many possible causes. Please check your FSP UPD
configuration. If you pass something wrong, the FSP won't boot up.

Good luck!

Regards,
Bin
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Re: [U-Boot] [PATCH 03/12] libfdt: Safer access to strings section

2018-04-15 Thread David Gibson
On Sat, Apr 14, 2018 at 08:42:23AM -0600, Warner Losh wrote:
> On Fri, Apr 13, 2018 at 9:43 PM, David Gibson 
> wrote:
> 
> > On Fri, Apr 13, 2018 at 12:53:19PM -0400, Tom Rini wrote:
> > > On Thu, Apr 12, 2018 at 02:39:19PM +1000, David Gibson wrote:
> > > > On Tue, Apr 10, 2018 at 10:42:45AM -0400, Simon Glass wrote:
> > > > > +U-Boot, Tom, Masahiro
> > > > >
> > > > > Hi David,
> > > > >
> > > > > On 10 April 2018 at 01:22, David Gibson 
> > wrote:
> > > > > > On Wed, Apr 04, 2018 at 01:21:10AM +0800, Simon Glass wrote:
> > > > > >> Hi David,
> > > > > >>
> > > > > >> On 3 April 2018 at 23:02, David Gibson <
> > da...@gibson.dropbear.id.au> wrote:
> > > > > >> >
> > > > > >> > On Fri, Mar 30, 2018 at 04:42:21PM +0800, Simon Glass wrote:
> > > > > >> > > Hi David,
> > > > > >> > >
> > > > > >> > > On 26 March 2018 at 07:25, David Gibson <
> > da...@gibson.dropbear.id.au> wrote:
> > > > > >> > > > fdt_string() is used to retrieve strings from a DT blob's
> > strings section.
> > > > > >> > > > It's rarely used directly, but is widely used internally.
> > > > > >> > > >
> > > > > >> > > > However, it doesn't do any bounds checking, which means in
> > the case of a
> > > > > >> > > > corrupted blob it could access bad memory, which libfdt is
> > supposed to
> > > > > >> > > > avoid.
> > > > > >> > > >
> > > > > >> > > > This write a safe alternative to fdt_string,
> > fdt_get_string().  It checks
> > > > > >> > > > both that the given offset is within the string section and
> > that the string
> > > > > >> > > > it points to is properly \0 terminated within the section.
> > It also returns
> > > > > >> > > > the string's length as a convenience (since it needs to
> > determine to do the
> > > > > >> > > > checks anyway).
> > > > > >> > > >
> > > > > >> > > > fdt_string() is rewritten in terms of fdt_get_string() for
> > compatibility.
> > > > > >> > > >
> > > > > >> > > > Most of the diff here is actually testing infrastructure.
> > > > > >> > > >
> > > > > >> > > > Signed-off-by: David Gibson 
> > > > > >> > > > ---
> > > > > >> > > >  libfdt/fdt_ro.c  | 61
> > +++--
> > > > > >> > > >  libfdt/libfdt.h  | 18 ++-
> > > > > >> > > >  libfdt/version.lds   |  2 +-
> > > > > >> > > >  tests/.gitignore |  1 +
> > > > > >> > > >  tests/Makefile.tests |  2 +-
> > > > > >> > > >  tests/run_tests.sh   |  1 +
> > > > > >> > > >  tests/testdata.h |  1 +
> > > > > >> > > >  tests/testutils.c| 11 +--
> > > > > >> > > >  tests/trees.S| 26 
> > > > > >> > > >  tests/truncated_string.c | 79
> > 
> > > > > >> > > >  10 files changed, 193 insertions(+), 9 deletions(-)
> > > > > >> > > >  create mode 100644 tests/truncated_string.c
> > > > > >> > >
> > > > > >> > > Similar code-size quesiton here. It looks like a lot of
> > checking code.
> > > > > >> > > Can we have an option to remove it?
> > > > > >> >
> > > > > >> > Again, I'm disinclined without a concrete example of a
> > problem.  Fwiw
> > > > > >> > the code size change is +276 bytes on my setup.
> > > > > >>
> > > > > >> That might not sound like a lot, but the overhead of DT in U-Boot
> > is
> > > > > >> about 3KB, so this adds nearly 10%.
> > > > > >
> > > > > > Hm.  And how much is it compared to the whole U-Boot blob?
> > > > > >
> > > > > >> The specific problem is that when U-Boot SPL gets too big boards
> > don't
> > > > > >> boot. Because we take the upstream libfdt this will affect U-Boot.
> > > > > >>
> > > > > >> Do you have any thoughts on how we could avoid this size increase?
> > > > > >
> > > > > > So, again, I'm very disinclined to prioritize size over memory
> > safety
> > > > > > without a *concrete* example.  i.e. "We hit this specific problem
> > with
> > > > > > size on this specific board that we were really using" rather than
> > > > > > just "it might be a problem".
> > > > > >
> > > > > > IMO, thinking of it in terms of the "increase" is the wrong way
> > > > > > arond.  If size is really a problem for you, you want to consider
> > how
> > > > > > you can reduce it in any way, not just rolling back the most recent
> > > > > > changes.  The most obvious one to me would be to try
> > > > > > -ffunction-sections to exclude any functions that aren't actually
> > used
> > > > > > by u-boot (if this is helpful and the compiler's an issue, I'd be
> > > > > > willing to consider splitting up libfdt into a bunch more C files).
> > > > >
> > > > > Actually U-Boot does use that option. Believe me, a lot of work has
> > > > > gone into making this small. There is constant pressure to
> > > > > reduce/retain the size in SPL so that we can stay below limits. E.g.
> > > > > firefly-rk3288 has a 30KB limit for SPL. Current problems are the
> > > > > 64-bit Allwinner parts which are right up against the 

Re: [U-Boot] [PATCH] ARM: rmobile: Add rudimentary SDHI2 node on R8A77970 V3M Eagle

2018-04-15 Thread Marek Vasut
On 04/16/2018 12:59 AM, Marek Vasut wrote:
> Add rudimentary SDHI2 DT node on R8A77970 V3M Eagle to allow the
> Renesas SDHI driver to bind with it and allow access to the SD card.
> 
> Signed-off-by: Marek Vasut 
> Cc: Nobuhiro Iwamatsu 
> ---

Please ignore, V2 out. The Eagle part shouldn't be in the commit
message, this is V3M generic.

-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH V2] ARM: rmobile: Add rudimentary SDHI2 node on R8A77970 V3M

2018-04-15 Thread Marek Vasut
Add rudimentary SDHI2 DT node on R8A77970 V3M to allow the
Renesas SDHI driver to bind with it and allow access to the
SD card.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
V2: Drop the Eagle part from commit message, it's obviously for all R8A77970
---
 arch/arm/dts/r8a77970.dtsi | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi
index 42c5c72bf2..ba0e52130a 100644
--- a/arch/arm/dts/r8a77970.dtsi
+++ b/arch/arm/dts/r8a77970.dtsi
@@ -389,5 +389,16 @@
bank-width = <2>;
status = "disabled";
};
+
+   sdhi2: sd@ee14 {
+   compatible = "renesas,sdhi-r8a77970";
+   reg = <0 0xee14 0 0x2000>;
+   interrupts = ;
+   clocks = < CPG_MOD 314>;
+   max-frequency = <2>;
+   power-domains = < 32>;
+   resets = < 314>;
+   status = "disabled";
+   };
};
 };
-- 
2.16.2

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[U-Boot] [PATCH] ARM: rmobile: Enable SDHI2 on R8A77970 V3M Eagle

2018-04-15 Thread Marek Vasut
Mark the SDHI2 as okay in the DT so it can be used.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 arch/arm/dts/r8a77970-eagle.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/r8a77970-eagle.dts b/arch/arm/dts/r8a77970-eagle.dts
index c051cddb25..45a204ac20 100644
--- a/arch/arm/dts/r8a77970-eagle.dts
+++ b/arch/arm/dts/r8a77970-eagle.dts
@@ -91,6 +91,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
-- 
2.16.2

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[U-Boot] [PATCH] ARM: rmobile: Add rudimentary SDHI2 node on R8A77970 V3M Eagle

2018-04-15 Thread Marek Vasut
Add rudimentary SDHI2 DT node on R8A77970 V3M Eagle to allow the
Renesas SDHI driver to bind with it and allow access to the SD card.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 arch/arm/dts/r8a77970.dtsi | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi
index 42c5c72bf2..ba0e52130a 100644
--- a/arch/arm/dts/r8a77970.dtsi
+++ b/arch/arm/dts/r8a77970.dtsi
@@ -389,5 +389,16 @@
bank-width = <2>;
status = "disabled";
};
+
+   sdhi2: sd@ee14 {
+   compatible = "renesas,sdhi-r8a77970";
+   reg = <0 0xee14 0 0x2000>;
+   interrupts = ;
+   clocks = < CPG_MOD 314>;
+   max-frequency = <2>;
+   power-domains = < 32>;
+   resets = < 314>;
+   status = "disabled";
+   };
};
 };
-- 
2.16.2

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[U-Boot] [PATCH] ARM: rmobile: Enable RPC QSPI on R8A77970 V3M Eagle

2018-04-15 Thread Marek Vasut
Enable the RPC QSPI driver on R8A77970 V3M Eagle and configure
the environment layout to match that used by old U-Boot.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 arch/arm/dts/r8a77970-eagle.dts  | 20 
 configs/r8a77970_eagle_defconfig |  9 +
 include/configs/eagle.h  |  6 ++
 3 files changed, 35 insertions(+)

diff --git a/arch/arm/dts/r8a77970-eagle.dts b/arch/arm/dts/r8a77970-eagle.dts
index cb76c89b57..c051cddb25 100644
--- a/arch/arm/dts/r8a77970-eagle.dts
+++ b/arch/arm/dts/r8a77970-eagle.dts
@@ -17,6 +17,7 @@
aliases {
serial0 = 
ethernet0 = 
+   spi0 = 
};
 
chosen {
@@ -59,6 +60,25 @@
};
 };
 
+ {
+   num-cs = <1>;
+   status = "okay";
+   spi-max-frequency = <5000>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   flash0: spi-flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "s25fs512s", "spi-flash", "jedec,spi-nor";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <1>;
+   spi-rx-bus-width = <1>;
+   reg = <0>;
+   status = "okay";
+   };
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index eb8666abca..65cfc91c80 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -18,6 +18,8 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -28,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
@@ -41,6 +44,10 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
@@ -52,6 +59,8 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/include/configs/eagle.h b/include/configs/eagle.h
index 2ef0c7a777..d2edd56130 100644
--- a/include/configs/eagle.h
+++ b/include/configs/eagle.h
@@ -19,6 +19,12 @@
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
+/* Environment compatibility */
+#undef CONFIG_ENV_SIZE_REDUND
+#undef CONFIG_ENV_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE   (256 * 1024)
+#define CONFIG_ENV_OFFSET  0x70
+
 /* Board Clock */
 /* XTAL_CLK : 33.33MHz */
 #define CONFIG_SYS_CLK_FREQu
-- 
2.16.2

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[U-Boot] [PATCH] ARM: rmobile: Enable fitImage support on Gen3

2018-04-15 Thread Marek Vasut
Enable fitImage support to be on the right side of the millenium.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 configs/r8a7795_salvator-x_defconfig  | 1 +
 configs/r8a7795_ulcb_defconfig| 1 +
 configs/r8a77965_salvator-x_defconfig | 1 +
 configs/r8a7796_salvator-x_defconfig  | 1 +
 configs/r8a7796_ulcb_defconfig| 1 +
 configs/r8a77970_eagle_defconfig  | 1 +
 configs/r8a77995_draak_defconfig  | 1 +
 7 files changed, 7 insertions(+)

diff --git a/configs/r8a7795_salvator-x_defconfig 
b/configs/r8a7795_salvator-x_defconfig
index 6b5f109870..fdfa41c395 100644
--- a/configs/r8a7795_salvator-x_defconfig
+++ b/configs/r8a7795_salvator-x_defconfig
@@ -6,6 +6,7 @@ CONFIG_RCAR_GEN3=y
 CONFIG_TARGET_SALVATOR_X=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a7795-salvator-x-u-boot"
 CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_FIT=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs 
nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
diff --git a/configs/r8a7795_ulcb_defconfig b/configs/r8a7795_ulcb_defconfig
index 4b2afb8874..5b15e74d0c 100644
--- a/configs/r8a7795_ulcb_defconfig
+++ b/configs/r8a7795_ulcb_defconfig
@@ -6,6 +6,7 @@ CONFIG_RCAR_GEN3=y
 CONFIG_TARGET_ULCB=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a7795-h3ulcb-u-boot"
 CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_FIT=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs 
nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
diff --git a/configs/r8a77965_salvator-x_defconfig 
b/configs/r8a77965_salvator-x_defconfig
index 1bfd91f1c7..986c076d51 100644
--- a/configs/r8a77965_salvator-x_defconfig
+++ b/configs/r8a77965_salvator-x_defconfig
@@ -7,6 +7,7 @@ CONFIG_R8A7796=y
 CONFIG_TARGET_SALVATOR_X=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a77965-salvator-x-u-boot"
 CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_FIT=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs 
nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
diff --git a/configs/r8a7796_salvator-x_defconfig 
b/configs/r8a7796_salvator-x_defconfig
index 3abd82ccd4..fefc719d1d 100644
--- a/configs/r8a7796_salvator-x_defconfig
+++ b/configs/r8a7796_salvator-x_defconfig
@@ -7,6 +7,7 @@ CONFIG_R8A7796=y
 CONFIG_TARGET_SALVATOR_X=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a7796-salvator-x-u-boot"
 CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_FIT=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs 
nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
diff --git a/configs/r8a7796_ulcb_defconfig b/configs/r8a7796_ulcb_defconfig
index fedb82f6d5..3fee38d641 100644
--- a/configs/r8a7796_ulcb_defconfig
+++ b/configs/r8a7796_ulcb_defconfig
@@ -7,6 +7,7 @@ CONFIG_R8A7796=y
 CONFIG_TARGET_ULCB=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a7796-m3ulcb-u-boot"
 CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_FIT=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs 
nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index 65cfc91c80..7151bb0d56 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -7,6 +7,7 @@ CONFIG_R8A77970=y
 CONFIG_TARGET_EAGLE=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot"
 CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_FIT=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs 
nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index ce92fbae56..d3cccec8fc 100644
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -7,6 +7,7 @@ CONFIG_R8A77995=y
 CONFIG_TARGET_DRAAK=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot"
 CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_FIT=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs 
nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-- 
2.16.2

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[U-Boot] [PATCH] ARM: rmobile: Add Renesas RPC HF/QSPI DT nodes

2018-04-15 Thread Marek Vasut
Add device tree nodes for the Renesas RPC HF/QSPI controller.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 arch/arm/dts/r8a7795.dtsi  | 8 
 arch/arm/dts/r8a7796.dtsi  | 8 
 arch/arm/dts/r8a77965.dtsi | 8 
 arch/arm/dts/r8a77970.dtsi | 8 
 arch/arm/dts/r8a77995.dtsi | 8 
 5 files changed, 40 insertions(+)

diff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a7795.dtsi
index f7dc147317..31df1f62aa 100644
--- a/arch/arm/dts/r8a7795.dtsi
+++ b/arch/arm/dts/r8a7795.dtsi
@@ -1525,6 +1525,14 @@
dma-channels = <2>;
};
 
+   rpc: rpc@0xee20 {
+   compatible = "renesas,rpc-r8a7795", "renesas,rpc";
+   reg = <0 0xee20 0 0x100>, <0 0x0800 0 0>;
+   clocks = < CPG_MOD 917>;
+   bank-width = <2>;
+   status = "disabled";
+   };
+
sdhi0: sd@ee10 {
compatible = "renesas,sdhi-r8a7795";
reg = <0 0xee10 0 0x2000>;
diff --git a/arch/arm/dts/r8a7796.dtsi b/arch/arm/dts/r8a7796.dtsi
index 83faabe040..7cb14bb65f 100644
--- a/arch/arm/dts/r8a7796.dtsi
+++ b/arch/arm/dts/r8a7796.dtsi
@@ -1350,6 +1350,14 @@
status = "disabled";
};
 
+   rpc: rpc@0xee20 {
+   compatible = "renesas,rpc-r8a7796", "renesas,rpc";
+   reg = <0 0xee20 0 0x100>, <0 0x0800 0 0>;
+   clocks = < CPG_MOD 917>;
+   bank-width = <2>;
+   status = "disabled";
+   };
+
sdhi0: sd@ee10 {
compatible = "renesas,sdhi-r8a7796";
reg = <0 0xee10 0 0x2000>;
diff --git a/arch/arm/dts/r8a77965.dtsi b/arch/arm/dts/r8a77965.dtsi
index 7eb4e65ea4..3630b52a92 100644
--- a/arch/arm/dts/r8a77965.dtsi
+++ b/arch/arm/dts/r8a77965.dtsi
@@ -748,6 +748,14 @@
status = "disabled";
};
 
+   rpc: rpc@0xee20 {
+   compatible = "renesas,rpc-r8a77965", "renesas,rpc";
+   reg = <0 0xee20 0 0x100>, <0 0x0800 0 0>;
+   clocks = < CPG_MOD 917>;
+   bank-width = <2>;
+   status = "disabled";
+   };
+
sdhi0: sd@ee10 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee10 0 0x2000>;
diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi
index 78e6f89e30..42c5c72bf2 100644
--- a/arch/arm/dts/r8a77970.dtsi
+++ b/arch/arm/dts/r8a77970.dtsi
@@ -381,5 +381,13 @@
#address-cells = <1>;
#size-cells = <0>;
};
+
+   rpc: rpc@0xee20 {
+   compatible = "renesas,rpc-r8a77970", "renesas,rpc";
+   reg = <0 0xee20 0 0x100>, <0 0x0800 0 0>;
+   clocks = < CPG_MOD 917>;
+   bank-width = <2>;
+   status = "disabled";
+   };
};
 };
diff --git a/arch/arm/dts/r8a77995.dtsi b/arch/arm/dts/r8a77995.dtsi
index d1a03cf811..733b6afc89 100644
--- a/arch/arm/dts/r8a77995.dtsi
+++ b/arch/arm/dts/r8a77995.dtsi
@@ -400,5 +400,13 @@
#phy-cells = <0>;
status = "disabled";
};
+
+   rpc: rpc@0xee20 {
+   compatible = "renesas,rpc-r8a77995", "renesas,rpc";
+   reg = <0 0xee20 0 0x100>, <0 0x0800 0 0>;
+   clocks = < CPG_MOD 917>;
+   bank-width = <2>;
+   status = "disabled";
+   };
};
 };
-- 
2.16.2

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Re: [U-Boot] net: sh_eth: Add remaining Gen2 DT compatible

2018-04-15 Thread Marek Vasut
On 04/15/2018 07:32 PM, Tom Rini wrote:
> On Sun, Apr 15, 2018 at 11:26:40AM -0500, Joe Hershberger wrote:
>> Hey Marek,
>>
>> On Sun, Apr 15, 2018 at 3:38 AM, Marek Vasut  wrote:
>>> On 04/15/2018 06:16 AM, Joe Hershberger wrote:
 Hi Marek,

 https://patchwork.ozlabs.org/patch/897786/ was applied to 
 http://git.denx.de/?p=u-boot/u-boot-net.git
>>>
>>> If you don't mind, I'll pull it through -sh alongside the rest of the
>>> Gen2 junk, OK ?
>>
>> Oops... It's already part of a pull request. Do you want me to pull it
>> out and resend the PR?
>>
>> Maybe Tom hasn't gotten to it yet.
> 
> I am testing (well, done testing about to push it out) with that PR.

Great. It's in, all good.

-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH] dts: dm: fec: imx53: Provide proper compatible string for imx53 fec driver

2018-04-15 Thread Lukasz Majewski
After this change the DM FEC ETH driver can be also reused on some imx53
devices.

Signed-off-by: Lukasz Majewski 
---

 drivers/net/fec_mxc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index ff7ad91116..3dc2816da0 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1325,6 +1325,7 @@ static int fecmxc_ofdata_to_platdata(struct udevice *dev)
 
 static const struct udevice_id fecmxc_ids[] = {
{ .compatible = "fsl,imx6q-fec" },
+   { .compatible = "fsl,imx53-fec" },
{ }
 };
 
-- 
2.11.0

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Re: [U-Boot] [PULL] Please pull u-boot-imx

2018-04-15 Thread Lukasz Majewski
Hi Tom,

> On Sun, Apr 15, 2018 at 12:28:54PM +0200, Stefano Babic wrote:
> 
> > Hi Tom,
> > 
> > please pull from u-boot-imx, thanks !
> > 
> > 
> > -- The following changes since commit
> > 6d7403bf72b5ea46497fe8222d0303cb79563379:
> > 
> >   doc: mxc_hab: Update i.MX HAB documentation (2018-03-11 16:00:21
> > +0100)
> > 
> > are available in the git repository at:
> > 
> >   git://www.denx.de/git/u-boot-imx.git master
> > 
> > for you to fetch changes up to
> > b4e9bdcd05ac83146ad16802a94db3e78f530d1a:
> > 
> >   mx6cuboxi: Fix some memory configuration errors (2018-04-15
> > 11:56:21 +0200)
> >   
> 
> Applied to u-boot/master.
> 
> For the record, the K+P KP_IMX6Q_TPC i.MX6Q commit is missing a
> Signed-off-by line.  I'm willing to assume it was just a thinko, right
> Lukasz ?  Thanks!
> 

Yes, this is my commit :-)



Best regards,

Lukasz Majewski

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[U-Boot] [PATCH] doc: Update git-mailrc entry for lukma (lu...@denx.de)

2018-04-15 Thread Lukasz Majewski
Signed-off-by: Lukasz Majewski 

---

 doc/git-mailrc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/git-mailrc b/doc/git-mailrc
index 5a365cddd9..159e446512 100644
--- a/doc/git-mailrc
+++ b/doc/git-mailrc
@@ -31,7 +31,7 @@ alias jhersh Joe Hershberger 
 alias jwrdegoede Hans de Goede 
 alias kimphill   Kim Phillips 
 alias luka   Luka Perkov 
-alias lukma  Lukasz Majewski 
+alias lukma  Lukasz Majewski 
 alias macpaulMacpaul Lin 
 alias marex  Marek Vasut 
 alias masahiro   Masahiro Yamada 
-- 
2.11.0

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[U-Boot] [PATCH] eth: dm: fec: Change FEC PHY mask setting from CONFIG_PHYLIB to CONFIG_FEC_MXC_PHYADDR

2018-04-15 Thread Lukasz Majewski
Without this commit we do have an explicit dependency on CONFIG_PHYLIB
when one wants to set PHY ADDR on a iMX board (FEC + driver model).

This shall be changed to CONFIG_FEC_MXC_PHYADDR, as only when we do have
it set, we shall mask out other devices.

As a side effect, when CONFIG_FEC_MXC_PHYADDR is not set, we scan PHY bus
for connected PHY devices.

Signed-off-by: Lukasz Majewski 

---

 drivers/net/fec_mxc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 3dc2816da0..2027d17fac 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1215,7 +1215,7 @@ static int fec_phy_init(struct fec_priv *priv, struct 
udevice *dev)
struct phy_device *phydev;
int mask = 0x;
 
-#ifdef CONFIG_PHYLIB
+#ifdef CONFIG_FEC_MXC_PHYADDR
mask = 1 << CONFIG_FEC_MXC_PHYADDR;
 #endif
 
-- 
2.11.0

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Re: [U-Boot] [PULL] u-boot-sh/master

2018-04-15 Thread Tom Rini
On Sun, Apr 15, 2018 at 12:38:32AM +0200, Marek Vasut wrote:

> The following changes since commit 901b77b9c8e716cd44dc85bf6bf54e4576d14ddd:
> 
>   vexpress: fix syntax error in armv7_boot_nonsec_default() (2018-04-13
> 17:06:16 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-sh.git master
> 
> for you to fetch changes up to cb0b6b035a356e958bf964803e87539464f01bf2:
> 
>   mmc: tmio: Rename Matsushita to TMIO (2018-04-14 00:03:30 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] Pull request: u-boot-net.git master

2018-04-15 Thread Tom Rini
On Sat, Apr 14, 2018 at 11:18:45PM -0500, Joe Hershberger wrote:

> Hi Tom,
> 
> There are a few checkpatch warnings, but I checked each of them and they seem 
> appropriate.
> 
> The following changes since commit 93cb6142c1d349492d23bad3951b5a8f59eaafed:
> 
>   Merge git://git.denx.de/u-boot-sh (2018-04-13 09:23:53 -0400)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-net.git master
> 
> for you to fetch changes up to 16879cd25a4089cde2f3393fb09567df53402679:
> 
>   net: phy: Don't limit phy addresses by default (2018-04-13 15:56:47 -0500)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PULL] Please pull u-boot-imx

2018-04-15 Thread Tom Rini
On Sun, Apr 15, 2018 at 12:28:54PM +0200, Stefano Babic wrote:

> Hi Tom,
> 
> please pull from u-boot-imx, thanks !
> 
> 
> -- The following changes since commit
> 6d7403bf72b5ea46497fe8222d0303cb79563379:
> 
>   doc: mxc_hab: Update i.MX HAB documentation (2018-03-11 16:00:21 +0100)
> 
> are available in the git repository at:
> 
>   git://www.denx.de/git/u-boot-imx.git master
> 
> for you to fetch changes up to b4e9bdcd05ac83146ad16802a94db3e78f530d1a:
> 
>   mx6cuboxi: Fix some memory configuration errors (2018-04-15 11:56:21
> +0200)
> 

Applied to u-boot/master.

For the record, the K+P KP_IMX6Q_TPC i.MX6Q commit is missing a
Signed-off-by line.  I'm willing to assume it was just a thinko, right
Lukasz ?  Thanks!

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Re: [U-Boot] net: sh_eth: Add remaining Gen2 DT compatible

2018-04-15 Thread Tom Rini
On Sun, Apr 15, 2018 at 11:26:40AM -0500, Joe Hershberger wrote:
> Hey Marek,
> 
> On Sun, Apr 15, 2018 at 3:38 AM, Marek Vasut  wrote:
> > On 04/15/2018 06:16 AM, Joe Hershberger wrote:
> >> Hi Marek,
> >>
> >> https://patchwork.ozlabs.org/patch/897786/ was applied to 
> >> http://git.denx.de/?p=u-boot/u-boot-net.git
> >
> > If you don't mind, I'll pull it through -sh alongside the rest of the
> > Gen2 junk, OK ?
> 
> Oops... It's already part of a pull request. Do you want me to pull it
> out and resend the PR?
> 
> Maybe Tom hasn't gotten to it yet.

I am testing (well, done testing about to push it out) with that PR.

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Re: [U-Boot] net: sh_eth: Add remaining Gen2 DT compatible

2018-04-15 Thread Joe Hershberger
Hey Marek,

On Sun, Apr 15, 2018 at 3:38 AM, Marek Vasut  wrote:
> On 04/15/2018 06:16 AM, Joe Hershberger wrote:
>> Hi Marek,
>>
>> https://patchwork.ozlabs.org/patch/897786/ was applied to 
>> http://git.denx.de/?p=u-boot/u-boot-net.git
>
> If you don't mind, I'll pull it through -sh alongside the rest of the
> Gen2 junk, OK ?

Oops... It's already part of a pull request. Do you want me to pull it
out and resend the PR?

Maybe Tom hasn't gotten to it yet.

-Joe

> --
> Best regards,
> Marek Vasut
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[U-Boot] [PATCH 5/5] spl: socfpga: Generate Arria10 SFP header V1

2018-04-15 Thread Marek Vasut
Generate SoCFPGA boot header version 1 instead of version 0 for Arria10.

Signed-off-by: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Chin Liang See 
---
 scripts/Makefile.spl | 4 
 1 file changed, 4 insertions(+)

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 2993ade41e..5d9adda996 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -309,7 +309,11 @@ LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
 endif
 endif
 
+ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
+MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage_v1
+else
 MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage
+endif
 $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
$(call if_changed,mkimage)
 
-- 
2.16.2

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[U-Boot] [PATCH 2/5] image: socfpga: Add SFP image version 1 definition

2018-04-15 Thread Marek Vasut
Add support for the SoCFPGA header v1, which is used on Arria 10.
The layout of the v0 and v1 header is similar, yet there are a few
differences which make it incompatible with previous v0 header, so
add a new entry.

Signed-off-by: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Chin Liang See 
---
 common/image.c  | 3 ++-
 include/image.h | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/common/image.c b/common/image.c
index e1c50eb25d..5024da3b17 100644
--- a/common/image.c
+++ b/common/image.c
@@ -146,7 +146,8 @@ static const table_entry_t uimage_type[] = {
{   IH_TYPE_PBLIMAGE,   "pblimage",   "Freescale PBL Boot Image",},
{   IH_TYPE_RAMDISK,"ramdisk","RAMDisk Image",  },
{   IH_TYPE_SCRIPT, "script", "Script", },
-   {   IH_TYPE_SOCFPGAIMAGE, "socfpgaimage", "Altera SOCFPGA 
preloader",},
+   {   IH_TYPE_SOCFPGAIMAGE, "socfpgaimage", "Altera SoCFPGA CV/AV 
preloader",},
+   {   IH_TYPE_SOCFPGAIMAGE_V1, "socfpgaimage_v1", "Altera SoCFPGA A10 
preloader",},
{   IH_TYPE_STANDALONE, "standalone", "Standalone Program", },
{   IH_TYPE_UBLIMAGE,   "ublimage",   "Davinci UBL image",},
{   IH_TYPE_MXSIMAGE,   "mxsimage",   "Freescale MXS Boot Image",},
diff --git a/include/image.h b/include/image.h
index a579c5f509..8ce722866b 100644
--- a/include/image.h
+++ b/include/image.h
@@ -260,7 +260,7 @@ enum {
IH_TYPE_MXSIMAGE,   /* Freescale MXSBoot Image  */
IH_TYPE_GPIMAGE,/* TI Keystone GPHeader Image   */
IH_TYPE_ATMELIMAGE, /* ATMEL ROM bootable Image */
-   IH_TYPE_SOCFPGAIMAGE,   /* Altera SOCFPGA Preloader */
+   IH_TYPE_SOCFPGAIMAGE,   /* Altera SOCFPGA CV/AV Preloader */
IH_TYPE_X86_SETUP,  /* x86 setup.bin Image  */
IH_TYPE_LPC32XXIMAGE,   /* x86 setup.bin Image  */
IH_TYPE_LOADABLE,   /* A list of typeless images*/
@@ -275,6 +275,7 @@ enum {
IH_TYPE_FIRMWARE_IVT,   /* Firmware Image with HABv4 IVT */
IH_TYPE_PMMC,/* TI Power Management Micro-Controller 
Firmware */
IH_TYPE_STM32IMAGE, /* STMicroelectronics STM32 Image */
+   IH_TYPE_SOCFPGAIMAGE_V1,/* Altera SOCFPGA A10 Preloader */
 
IH_TYPE_COUNT,  /* Number of image types */
 };
-- 
2.16.2

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[U-Boot] [PATCH 4/5] tools: socfpga: Add SFP image V1 support

2018-04-15 Thread Marek Vasut
Add support for the SoCFPGA header v1 , which is used on Arria 10.
Thus far the mkimage-socfpga image only supported header format v0
used on Cyclone V and Arria V, but is not supported on Arria 10.
The layout of the v0 and v1 header is similar, yet there are a few
differences, see the patch body for details.

Signed-off-by: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Chin Liang See 
---
 tools/socfpgaimage.c | 293 +--
 1 file changed, 216 insertions(+), 77 deletions(-)

diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c
index d77459cfed..19dcca9ed5 100644
--- a/tools/socfpgaimage.c
+++ b/tools/socfpgaimage.c
@@ -3,30 +3,52 @@
  *
  * SPDX-License-Identifier:GPL-2.0+
  *
- * Reference doc http://www.altera.com.cn/literature/hb/cyclone-v/cv_5400A.pdf
- * Note this doc is not entirely accurate. Of particular interest to us is the
- * "header" length field being in U32s and not bytes.
+ * Reference documents:
+ *   Cyclone V SoC: 
https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_5400a.pdf
+ *   Arria V SoC:   
https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-v/av_5400a.pdf
+ *   Arria 10 SoC:  
https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-10/a10_5400a.pdf
  *
- * "Header" is a structure of the following format.
- * this is positioned at 0x40.
+ * Bootable SoCFPGA image requires a structure of the following format
+ * positioned at offset 0x40 of the bootable image. Endian is LSB.
  *
- * Endian is LSB.
+ * There are two versions of the SoCFPGA header format, v0 and v1.
+ * The version 0 is used by Cyclone V SoC and Arria V SoC, while
+ * the version 1 is used by the Arria 10 SoC.
  *
+ * Version 0:
  * Offset   Length   Usage
  * ---
- *   0x404   Validation word 0x31305341
- *   0x441   Version (whatever, zero is fine)
- *   0x451   Flags   (unused, zero is fine)
- *   0x462   Length  (in units of u32, including the end checksum).
- *   0x482   Zero
+ *   0x404   Validation word (0x31305341)
+ *   0x441   Version (0x0)
+ *   0x451   Flags (unused, zero is fine)
+ *   0x462   Length (in units of u32, including the end checksum).
+ *   0x482   Zero (0x0)
  *   0x4A2   Checksum over the header. NB Not CRC32
  *
+ * Version 1:
+ * Offset   Length   Usage
+ * ---
+ *   0x404   Validation word (0x31305341)
+ *   0x441   Version (0x1)
+ *   0x451   Flags (unused, zero is fine)
+ *   0x462   Header length (in units of u8).
+ *   0x484   Length (in units of u8).
+ *   0x4C4   Image entry offset from standard of header
+ *   0x502   Zero (0x0)
+ *   0x522   Checksum over the header. NB Not CRC32
+ *
  * At the end of the code we have a 32-bit CRC checksum over whole binary
  * excluding the CRC.
  *
  * Note that the CRC used here is **not** the zlib/Adler crc32. It is the
  * CRC-32 used in bzip2, ethernet and elsewhere.
  *
+ * The Image entry offset in version 1 image is relative the the start of
+ * the header, 0x40, and must not be a negative number. Therefore, it is
+ * only possible to make the SoCFPGA jump forward. The U-Boot bootloader
+ * places a trampoline instruction at offset 0x5c, 0x1c bytes from the
+ * start of the SoCFPGA header, which jumps to the reset vector.
+ *
  * The image is padded out to 64k, because that is what is
  * typically used to write the image to the boot medium.
  */
@@ -39,32 +61,57 @@
 
 #define HEADER_OFFSET  0x40
 #define VALIDATION_WORD0x31305341
-#define PADDED_SIZE0x1
 
-/* To allow for adding CRC, the max input size is a bit smaller. */
-#define MAX_INPUT_SIZE (PADDED_SIZE - sizeof(uint32_t))
+static uint8_t buffer_v0[0x1];
+static uint8_t buffer_v1[0x4];
 
-static uint8_t buffer[PADDED_SIZE];
+struct socfpga_header_v0 {
+   uint32_tvalidation;
+   uint8_t version;
+   uint8_t flags;
+   uint16_tlength_u32;
+   uint16_tzero;
+   uint16_tchecksum;
+};
 
-struct socfpga_header {
-   uint32_t validation;
-   uint8_t  version;
-   uint8_t  flags;
-   uint16_t length_u32;
-   uint16_t zero;
-   uint16_t checksum;
+struct socfpga_header_v1 {
+   uint32_tvalidation;
+   uint8_t version;
+   uint8_t flags;
+   uint16_theader_u8;
+   uint32_tlength_u8;
+   uint32_tentry_offset;
+   uint16_tzero;
+   uint16_tchecksum;
 };
 
+static unsigned int sfp_hdr_size(uint8_t ver)
+{
+   if (ver == 0)
+   return sizeof(struct socfpga_header_v0);
+   if (ver == 1)
+   return sizeof(struct socfpga_header_v1);
+   return 0;
+}
+
+static 

[U-Boot] [PATCH 1/5] ARM: socfpga: Add boot trampoline for Arria10

2018-04-15 Thread Marek Vasut
The Arria10 uses slightly different boot image header than the Gen5 SoCs,
in particular the header itself contains an offset from the start of the
header to which the Arria10 jumps. This offset must not be negative, yet
the header is placed at offset 0x40 of the bootable binary. Therefore, to
jump into U-Boot, add a trampoline just past the Arria10 boot header and
point to this trampoline at fixed offset from the header generated using
the mkimage -T socfpgaimage_v1 . Note that it is not needed to jump back
to offset 0x0 of the image, it is possible to jump directly at the reset
label and save processing two instructions.

Signed-off-by: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Chin Liang See 
---
 arch/arm/mach-socfpga/include/mach/boot0.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h 
b/arch/arm/mach-socfpga/include/mach/boot0.h
index d6b9435d33..06bbe27d2c 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -18,10 +18,10 @@ _start:
.word   0xcafec0d3; /* Checksum, zero-pad */
nop;
 
-   b reset;/* SoCFPGA jumps here */
-   nop;
+   b reset;/* SoCFPGA Gen5 jumps here */
nop;
nop;
+   b reset;/* SoCFPGA Gen10 trampoline */
 #endif
 
 #endif /* __BOOT0_H */
-- 
2.16.2

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[U-Boot] [PATCH 3/5] tools: socfpga: Stop using global struct socfpga_image

2018-04-15 Thread Marek Vasut
The structure is passed around correctly, create local instances
where necessary and zap the global struct socfpga_image instance.

Signed-off-by: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Chin Liang See 
---
 tools/socfpgaimage.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c
index 8fe91fe80e..d77459cfed 100644
--- a/tools/socfpgaimage.c
+++ b/tools/socfpgaimage.c
@@ -46,14 +46,14 @@
 
 static uint8_t buffer[PADDED_SIZE];
 
-static struct socfpga_header {
+struct socfpga_header {
uint32_t validation;
uint8_t  version;
uint8_t  flags;
uint16_t length_u32;
uint16_t zero;
uint16_t checksum;
-} header;
+};
 
 /*
  * The header checksum is just a very simple checksum over
@@ -76,6 +76,8 @@ static uint16_t hdr_checksum(struct socfpga_header *header)
 static void build_header(uint8_t *buf, uint8_t version, uint8_t flags,
 uint16_t length_bytes)
 {
+   struct socfpga_header header;
+
header.validation = cpu_to_le32(VALIDATION_WORD);
header.version = version;
header.flags = flags;
@@ -92,6 +94,8 @@ static void build_header(uint8_t *buf, uint8_t version, 
uint8_t flags,
  */
 static int verify_header(const uint8_t *buf)
 {
+   struct socfpga_header header;
+
memcpy(, buf, sizeof(header));
 
if (le32_to_cpu(header.validation) != VALIDATION_WORD)
-- 
2.16.2

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[U-Boot] [PATCH v2] bootm: Align cache flush begin address

2018-04-15 Thread Bryan O'Donoghue
commit b4d956f6bc0f ("bootm: Align cache flush end address correctly")
aligns the end address of the cache flush operation to a cache-line size to
ensure lower-layers in the code accept the range provided and flush.

A similar action should be taken for the begin address of a cache flush
operation. The load address may not be aligned to a cache-line boundary, so
ensure the passed address is aligned.

Signed-off-by: Bryan O'Donoghue 
Reported-by: Breno Matheus Lima 
Suggested-by: Tom Rini 
Cc: Simon Glass 
---
 common/bootm.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/common/bootm.c b/common/bootm.c
index adb1213..3616291 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -434,6 +434,8 @@ static int bootm_load_os(bootm_headers_t *images, unsigned 
long *load_end,
ulong blob_end = os.end;
ulong image_start = os.image_start;
ulong image_len = os.image_len;
+   ulong flush_start = ALIGN_DOWN(load, ARCH_DMA_MINALIGN);
+   ulong flush_len = *load_end - load;
bool no_overlap;
void *load_buf, *image_buf;
int err;
@@ -447,7 +449,11 @@ static int bootm_load_os(bootm_headers_t *images, unsigned 
long *load_end,
bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE);
return err;
}
-   flush_cache(load, ALIGN(*load_end - load, ARCH_DMA_MINALIGN));
+
+   if (flush_start < load)
+   flush_len += load - flush_start;
+
+   flush_cache(flush_start, ALIGN(flush_len, ARCH_DMA_MINALIGN));
 
debug("   kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end);
bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED);
-- 
2.7.4

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Re: [U-Boot] [PATCH] Revert "imximage: Remove failure when no IVT offset is found"

2018-04-15 Thread Stefano Babic
Hi Fabio,

On 15/04/2018 12:37, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> This reverts commit b5b0e4e351e20a606de22db6a56ad6bc1e2aa8fd.
> 
> Commit f916757300c1 ("imx: Create distinct pre-processed mkimage
> config files") provided a proper fix for the parallel mkimage
> config files build failure, so the original workaround can be
> safely reverted now.
> 
> Signed-off-by: Fabio Estevam 
> ---
>  tools/imximage.c | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/tools/imximage.c b/tools/imximage.c
> index 6dabb13..5306699 100644
> --- a/tools/imximage.c
> +++ b/tools/imximage.c
> @@ -777,6 +777,11 @@ static uint32_t parse_cfg_file(struct imx_header 
> *imxhdr, char *name)
>   (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
>   fclose(fd);
>  
> + /* Exit if there is no BOOT_FROM field specifying the flash_offset */
> + if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
> + fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
> + exit(EXIT_FAILURE);
> + }
>   return dcd_len;
>  }

You're very quick, thanks !

Reviewed-by: Stefano Babic 

Best regards,
Stefano Babic

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[U-Boot] [PATCH] Revert "imximage: Remove failure when no IVT offset is found"

2018-04-15 Thread Fabio Estevam
From: Fabio Estevam 

This reverts commit b5b0e4e351e20a606de22db6a56ad6bc1e2aa8fd.

Commit f916757300c1 ("imx: Create distinct pre-processed mkimage
config files") provided a proper fix for the parallel mkimage
config files build failure, so the original workaround can be
safely reverted now.

Signed-off-by: Fabio Estevam 
---
 tools/imximage.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/tools/imximage.c b/tools/imximage.c
index 6dabb13..5306699 100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -777,6 +777,11 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, 
char *name)
(*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
fclose(fd);
 
+   /* Exit if there is no BOOT_FROM field specifying the flash_offset */
+   if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
+   fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
+   exit(EXIT_FAILURE);
+   }
return dcd_len;
 }
 
-- 
2.7.4

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[U-Boot] [PULL] Please pull u-boot-imx

2018-04-15 Thread Stefano Babic
Hi Tom,

please pull from u-boot-imx, thanks !


-- The following changes since commit
6d7403bf72b5ea46497fe8222d0303cb79563379:

  doc: mxc_hab: Update i.MX HAB documentation (2018-03-11 16:00:21 +0100)

are available in the git repository at:

  git://www.denx.de/git/u-boot-imx.git master

for you to fetch changes up to b4e9bdcd05ac83146ad16802a94db3e78f530d1a:

  mx6cuboxi: Fix some memory configuration errors (2018-04-15 11:56:21
+0200)


Anatolij Gustschin (1):
  imx: fix CAAM base for i.MX6UL

Bryan O'Donoghue (6):
  imx: mx7: Fix CONFIG_SERIAL_TAG compilation
  imx: mx7: Add comment to describe OTP TESTER registers
  warp7: Set u-boot serial# based on OTP value
  imximage: Encase majority of header in __ASSEMBLY__ declaration
  imx: hab: Provide hab_auth_img_or_fail command
  imx: mx7: snvs: Add an SNVS init routine

Eran Matityahu (4):
  mx7_common: Fix SPL compilation with secure boot support enabled
  Makefile: Build firmware-ivt image type for HAB verification also
for mx7
  imx7: Add src_base structure define macro
  imx7: spl: Check for Serial Downloader in spl_boot_device

Heinrich Schuchardt (1):
  wandboard: remove superfluous include

Ian Ray (1):
  board: ge: bx50v3: enable backlight on demand

Jon Nettleton (1):
  mx6cuboxi: Fix some memory configuration errors

Jörg Krause (2):
  ARM: dts: imx6ul: add wdog3
  ARM: dts: imx6ull: add wdog3

Ken Lin (1):
  arm: imx: Add Winbond SPI-NOR support for Advantech DMS-BA16 board

Lukasz Majewski (2):
  imx: board: Add support for the K+P's kp_imx6q_tpc board
  boot: script: The boot.scr file for K+P's boards

Marek Vasut (1):
  ARM: mx6: ddr: Add write leveling correction code

Nandor Han (1):
  board: ge: ppd: Fix environment variable location

Rasmus Villemoes (2):
  Makefile: always preserve output for images that can contain HAB
Blocks
  tools/imximage: use 0x prefix in HAB Blocks line

Sriram Dash (2):
  drivers: i2c: mxc: Update SYS_I2C_MXC_I2C support in Kconfig
  drivers: i2c: mxc: Update support to 8 I2C controllers

Tom Rini (2):
  imx31_phycore: Delete
  mx31ads: Delete

Trent Piepho (1):
  imx: Create distinct pre-processed mkimage config files

Vanessa Maegima (1):
  pico-imx7d: Replace fatload command

 Makefile  |   8 +-
 arch/arm/Kconfig  |  18 
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  23 +
 arch/arm/dts/imx6ul.dtsi  |   8 ++
 arch/arm/dts/imx6ull.dtsi |   8 ++
 arch/arm/include/asm/arch-mx6/imx-regs.h  |   4 +
 arch/arm/include/asm/arch-mx7/imx-regs.h  |   2 +
 arch/arm/include/asm/mach-imx/sys_proto.h |   1 +
 arch/arm/mach-imx/Makefile|  15 +--
 arch/arm/mach-imx/hab.c   |  35 +++
 arch/arm/mach-imx/mx6/Kconfig |  11 ++
 arch/arm/mach-imx/mx6/ddr.c   |  24 +
 arch/arm/mach-imx/mx7/Makefile|   2 +-
 arch/arm/mach-imx/mx7/snvs.c  |  22 
 arch/arm/mach-imx/mx7/soc.c   |  24 +
 arch/arm/mach-imx/spl.c   |  23 +
 board/freescale/mx31ads/Kconfig   |  15 ---
 board/freescale/mx31ads/MAINTAINERS   |   6 --
 board/freescale/mx31ads/Makefile  |   8 --
 board/freescale/mx31ads/lowlevel_init.S   | 268

 board/freescale/mx31ads/mx31ads.c | 114 -
 board/freescale/mx31ads/u-boot.lds| 110 
 board/ge/bx50v3/bx50v3.c  |  45 
 board/imx31_phycore/Kconfig   |  12 ---
 board/imx31_phycore/MAINTAINERS   |  11 --
 board/imx31_phycore/Makefile  |   9 --
 board/imx31_phycore/imx31_phycore.c   | 154

 board/imx31_phycore/lowlevel_init.S   |  88 
 board/k+p/bootscripts/tpcboot.cmd |  96 ++
 board/k+p/kp_imx6q_tpc/Kconfig|  12 +++
 board/k+p/kp_imx6q_tpc/MAINTAINERS|   6 ++
 board/k+p/kp_imx6q_tpc/Makefile   |  11 ++
 board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 302
++
 board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 338
+
 board/solidrun/mx6cuboxi/mx6cuboxi.c  |   3 +-
 board/wandboard/wandboard.c   |   1 -
 board/warp7/warp7.c   |  14 +++
 configs/dms-ba16-1g_defconfig |   1 +
 configs/dms-ba16_defconfig|   1 +
 configs/imx31_phycore_defconfig   |  19 
 configs/imx31_phycore_eet_defconfig   |  25 -
 configs/kp_imx6q_tpc_defconfig|  42 
 configs/mx31ads_defconfig |  15 ---
 configs/pico-imx7d_defconfig  |   1 +
 doc/README.mxc_hab  

Re: [U-Boot] [PATCH] mx6cuboxi: Fix some memory configuration errors

2018-04-15 Thread Stefano Babic


On 10/04/2018 22:05, Fabio Estevam wrote:
> From: Jon Nettleton 
> 
> These changes bring mainline back into line with the configurations
> that were originally set in our stable BSP.
> 
> Signed-off-by: Jon Nettleton 
> Signed-off-by: Fabio Estevam 
> ---
>  board/solidrun/mx6cuboxi/mx6cuboxi.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c 
> b/board/solidrun/mx6cuboxi/mx6cuboxi.c
> index ee9e4f7..727b639 100644
> --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
> +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
> @@ -428,7 +428,7 @@ static const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs 
> = {
>   .dram_sdclk_1 =  0x00020030,
>   .dram_cas =  0x00020030,
>   .dram_ras =  0x00020030,
> - .dram_reset =  0x00020030,
> + .dram_reset =  0x000c0030,
>   .dram_sdcke0 =  0x3000,
>   .dram_sdcke1 =  0x3000,
>   .dram_sdba2 =  0x,
> @@ -584,7 +584,6 @@ static struct mx6_ddr3_cfg mem_ddr_2g = {
>   .trcd  = 1375,
>   .trcmin= 4875,
>   .trasmin   = 3500,
> - .SRT   = 1,
>  };
>  
>  static struct mx6_ddr3_cfg mem_ddr_4g = {
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH 1/2] imx31_phycore: Delete

2018-04-15 Thread Stefano Babic


On 06/04/2018 22:27, Tom Rini wrote:
> This platform has been marked as orphaned since September 2013, remove.
> 
> Signed-off-by: Tom Rini 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH 2/2] mx31ads: Delete

2018-04-15 Thread Stefano Babic


On 06/04/2018 22:27, Tom Rini wrote:
> This platform has been marked as orphaned since September 2013, remove.
> 
> Signed-off-by: Tom Rini 
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH] imx: Create distinct pre-processed mkimage config files

2018-04-15 Thread Stefano Babic


On 07/04/2018 02:11, Trent Piepho wrote:
> Each imx image is created by a separate sub-make and during this process
> the mkimage config file is run though cpp.
> 
> The cpp output is to the same file no matter what imx image is being
> created.
> 
> This means if two imx images are generated in parallel they will attempt
> to independently produce the same pre-processed mkimage config file at
> the same time.
> 
> Avoid the problem by making the pre-processed config file name unique
> based on the imx image it will be used in.  This way each image will
> create a unique config file and they won't clobber each other when run
> in parallel.
> 
> This should fixed the build bug referenced in b5b0e4e3 ("imximage:
> Remove failure when no IVT offset is found").
> 
> Cc: Breno Lima 
> Cc: Thomas Petazzoni 
> Cc: Fabio Estevam 
> Signed-off-by: Trent Piepho 
> ---
>  arch/arm/mach-imx/Makefile | 15 ---
>  1 file changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> index 95a542fa01..306f779392 100644
> --- a/arch/arm/mach-imx/Makefile
> +++ b/arch/arm/mach-imx/Makefile
> @@ -78,9 +78,11 @@ endif
>  quiet_cmd_cpp_cfg = CFGS$@
>cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $<
>  
> -IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%).cfgtmp
> +# mkimage source config file
> +IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%)
>  
> -$(IMX_CONFIG): %.cfgtmp: % FORCE
> +# How to create a cpp processed config file, they all use the same source
> +%.cfgout: $(IMX_CONFIG) FORCE
>   $(Q)mkdir -p $(dir $@)
>   $(call if_changed_dep,cpp_cfg)
>  
> @@ -88,7 +90,7 @@ MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< 
> $(PHONY),$^) -T imxim
>   -e $(CONFIG_SYS_TEXT_BASE)
>  u-boot.imx: MKIMAGEOUTPUT = u-boot.imx.log
>  
> -u-boot.imx: u-boot.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE
> +u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE
>   $(call if_changed,mkimage)
>  
>  ifeq ($(CONFIG_OF_SEPARATE),y)
> @@ -96,16 +98,15 @@ MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out 
> $(PLUGIN).bin $< $(PHONY),$^) -T i
>   -e $(CONFIG_SYS_TEXT_BASE)
>  u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log
>  
> -u-boot-dtb.imx: u-boot-dtb.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE
> +u-boot-dtb.imx: u-boot-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE
>   $(call if_changed,mkimage)
>  endif
>  
>  MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T imximage 
> \
>   -e $(CONFIG_SPL_TEXT_BASE)
> -
>  SPL: MKIMAGEOUTPUT = SPL.log
>  
> -SPL: spl/u-boot-spl.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE
> +SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout $(PLUGIN).bin FORCE
>   $(call if_changed,mkimage)
>  
>  MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \
> @@ -133,7 +134,7 @@ cmd_u-boot-nand-spl_imx = (printf 
> '\000\000\000\000\106\103\102\040\001' && \
>  spl/u-boot-nand-spl.imx: SPL FORCE
>   $(call if_changed,u-boot-nand-spl_imx)
>  
> -targets += $(addprefix ../../../,$(IMX_CONFIG) SPL u-boot.uim 
> spl/u-boot-nand-spl.imx)
> +targets += $(addprefix ../../../,SPL spl/u-boot-spl.cfgout u-boot-dtb.cfgout 
> u-boot.cfgout u-boot.uim spl/u-boot-nand-spl.imx)
>  
>  obj-$(CONFIG_ARM64) += sip.o
>  
> 


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH] imx: mx7: snvs: Add an SNVS init routine

2018-04-15 Thread Stefano Babic


On 05/04/2018 20:46, Bryan O'Donoghue wrote:
> Working with HAB on the i.MX7 we've encountered a case where a board that
> successfully authenticates u-boot when booting Linux via OPTEE subsequently
> fails to properly bring up the RTC.
> 
> The RTC registers live in the low-power block of the Secure Non-Volatile
> Storage (SNVS) block.
> 
> The root cause of the error has been traced to the HAB handing off the
> SNVS-RTC in a state where HPCOMR::NPSWA_EN = 0 in other words where the
> Non-Privileged Software Access Enable bit is zero. In ordinary
> circumstances this is OK since we typically do not run in TZ mode, however
> when we boot via HAB and enablng TrustZone, it is required to set
> HPCOMR::NPSWA_EN = 1 in order for the upstream Linux driver to have
> sufficient permissions to manipulate the SNVS-LP block.
> 
> On our reference board it is the difference between Linux doing this:
> 
> root@imx7s-warp-mbl:~# dmesg | grep rtc
> snvs_rtc_enable read 0x from SNVS_LPLR @ 0x0034
> snvs_rtc_enable read 0x0021 from SNVS_LPCR @ 0x0038
> snvs_rtc_enable read 0x from SNVS_HPLR @ 0x
> snvs_rtc_enable read 0x80002100 from SNVS_HPCOMR @ 0x0004
> snvs_rtc 3037.snvs:snvs-rtc-lp: rtc core: registered
>  3037.snvs:snvs-rtc-lp as rtc0
> snvs_rtc 3037.snvs:snvs-rtc-lp: setting system clock to2018-04-01 
> 00:51:04 UTC (1522543864)
> 
> and doing this:
> 
> root@imx7s-warp-mbl:~# dmesg | grep rtc
> snvs_rtc_enable read 0x from SNVS_LPLR @ 0x0034
> snvs_rtc_enable read 0x0020 from SNVS_LPCR @ 0x0038
> snvs_rtc_enable read 0x0001 from SNVS_HPLR @ 0x
> snvs_rtc_enable read 0x2020 from SNVS_HPCOMR @ 0x0004
> snvs_rtc 3037.snvs:snvs-rtc-lp: failed to enable rtc -110
> snvs_rtc: probe of 3037.snvs:snvs-rtc-lp failed with error -110
> hctosys: unable to open rtc device (rtc0)
> 
> Note bit 1 of LPCR is not set in the second case and is set in the first
> case and that bit 31 of HPCOMR is set in the second case but not in the
> first.
> 
> Setting NPSWA_EN in HPCOMR allows us to boot through enabling TrustZone
> and continue onto the kernel. The kernel then has the necessary permissions
> to set LPCR::SRTC_ENV (RTC enable in the LP command register) whereas in
> contrast - in the failing case the non-privileged kernel cannot do so.
> 
> This patch adds a simple init_snvs() call which sets the permission-bit
> called from soc.c for the i.MX7. It may be possible, safe and desirable to
> perform this on other i.MX processors but for now this is only tested on
> i.MX7 as working.
> 
> Signed-off-by: Bryan O'Donoghue 
> ---
>  arch/arm/include/asm/mach-imx/sys_proto.h |  1 +
>  arch/arm/mach-imx/mx7/Makefile|  2 +-
>  arch/arm/mach-imx/mx7/snvs.c  | 22 ++
>  arch/arm/mach-imx/mx7/soc.c   |  2 ++
>  4 files changed, 26 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/mach-imx/mx7/snvs.c
> 
> diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h 
> b/arch/arm/include/asm/mach-imx/sys_proto.h
> index 96795e1..aa51c0d 100644
> --- a/arch/arm/include/asm/mach-imx/sys_proto.h
> +++ b/arch/arm/include/asm/mach-imx/sys_proto.h
> @@ -107,6 +107,7 @@ void set_chipselect_size(int const);
>  
>  void init_aips(void);
>  void init_src(void);
> +void init_snvs(void);
>  void imx_wdog_disable_powerdown(void);
>  
>  int board_mmc_get_env_dev(int devno);
> diff --git a/arch/arm/mach-imx/mx7/Makefile b/arch/arm/mach-imx/mx7/Makefile
> index ce289c1..e6bef6a 100644
> --- a/arch/arm/mach-imx/mx7/Makefile
> +++ b/arch/arm/mach-imx/mx7/Makefile
> @@ -5,7 +5,7 @@
>  #
>  #
>  
> -obj-y:= soc.o clock.o clock_slice.o ddr.o
> +obj-y:= soc.o clock.o clock_slice.o ddr.o snvs.o
>  
>  ifdef CONFIG_ARMV7_PSCI
>  obj-y  += psci-mx7.o psci.o
> diff --git a/arch/arm/mach-imx/mx7/snvs.c b/arch/arm/mach-imx/mx7/snvs.c
> new file mode 100644
> index 000..7e649b8
> --- /dev/null
> +++ b/arch/arm/mach-imx/mx7/snvs.c
> @@ -0,0 +1,22 @@
> +/*
> + * Copyright 2018 Linaro
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +#define SNVS_HPCOMR  0x04
> +#define SNVS_HPCOMR_NPSWA_EN BIT(31)
> +
> +void init_snvs(void)
> +{
> + u32 val;
> +
> + /* Ensure SNVS HPCOMR sets NPSWA_EN to allow unpriv access to SNVS LP */
> + val = readl(SNVS_BASE_ADDR + SNVS_HPCOMR);
> + val |= SNVS_HPCOMR_NPSWA_EN;
> + writel(val, SNVS_BASE_ADDR + SNVS_HPCOMR);
> +}
> diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
> index fb92a26..3ceeeff 100644
> --- a/arch/arm/mach-imx/mx7/soc.c
> +++ b/arch/arm/mach-imx/mx7/soc.c
> @@ -180,6 +180,8 @@ int arch_cpu_init(void)
>   isolate_resource();
>  #endif
>  
> + init_snvs();
> +
>   return 0;
>  }
>  
> 


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 

Re: [U-Boot] [PATCH] pico-imx7d: Replace fatload command

2018-04-15 Thread Stefano Babic


On 06/04/2018 21:54, Vanessa Maegima wrote:
> Replace fatload with the fs generic loading interface ('load' command).
> 
> Signed-off-by: Vanessa Maegima 
> ---
>  configs/pico-imx7d_defconfig | 1 +
>  include/configs/pico-imx7d.h | 4 ++--
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
> index edfe725..b85486d 100644
> --- a/configs/pico-imx7d_defconfig
> +++ b/configs/pico-imx7d_defconfig
> @@ -22,6 +22,7 @@ CONFIG_CMD_EXT2=y
>  CONFIG_CMD_EXT4=y
>  CONFIG_CMD_EXT4_WRITE=y
>  CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
>  CONFIG_PHYLIB=y
>  CONFIG_USB=y
>  CONFIG_USB_EHCI_HCD=y
> diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
> index ee48363..a81548c 100644
> --- a/include/configs/pico-imx7d.h
> +++ b/include/configs/pico-imx7d.h
> @@ -50,8 +50,8 @@
>   "finduuid=part uuid mmc 0:2 uuid\0" \
>   "mmcargs=setenv bootargs console=${console},${baudrate} " \
>   "root=PARTUUID=${uuid} rootwait rw\0" \
> - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
> - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
> + "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
> + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
>   "mmcboot=echo Booting from mmc ...; " \
>   "run finduuid; " \
>   "run mmcargs; " \
> 


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v2 1/2] imx: board: Add support for the K+P's kp_imx6q_tpc board

2018-04-15 Thread Stefano Babic


On 05/04/2018 09:04, Lukasz Majewski wrote:
> This commit provides support for Kieback & Peter GmbH IMX6Q based
> TPC board.
> 
> U-boot console output:
> 
> U-Boot SPL 2018.05-rc1-5-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
> Trying to boot from MMC1
> 
> U-Boot 2018.05-rc1-5-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
> 
> CPU:   Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz)
> CPU:   Extended Commercial temperature grade (-20C to 105C) at 37C
> Reset cause: POR
> Board: K+P KP_IMX6Q_TPC i.MX6Q
>Watchdog enabled
> I2C:   ready
> DRAM:  2 GiB
> MMC:   FSL_SDHC: 0, FSL_SDHC: 1
> Loading Environment from MMC... OK
> In:serial
> Out:   serial
> Err:   serial
> Net:   FEC [PRIME]
> Autoboot in 3 seconds
> 
> ---
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCHv2] board: ge: bx50v3: enable backlight on demand

2018-04-15 Thread Stefano Babic


On 04/04/2018 10:50, Sebastian Reichel wrote:
> From: Ian Ray 
> 
> Enable display backlight only if a message needs to be displayed.
> The kernel re-initializes the backlight, which results in some
> unwanted artifacts.
> 
> Signed-off-by: Ian Ray 
> Signed-off-by: Sebastian Reichel 
> ---
> Changes since PATCHv1:
> 
>  - rebase to v2018.05-rc1
>  - add missing return to do_backlight_enable
>  - add missing parameters to do_backlight_enable
> ---
>  board/ge/bx50v3/bx50v3.c| 45 
> -
>  include/configs/ge_bx50v3.h |  1 +
>  2 files changed, 29 insertions(+), 17 deletions(-)
> 
> diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
> index c7a29185bf49..46321ae666f1 100644
> --- a/board/ge/bx50v3/bx50v3.c
> +++ b/board/ge/bx50v3/bx50v3.c
> @@ -786,23 +786,6 @@ int board_late_init(void)
>   add_board_boot_modes(board_boot_modes);
>  #endif
>  
> -#ifdef CONFIG_VIDEO_IPUV3
> - /* We need at least 200ms between power on and backlight on
> -  * as per specifications from CHI MEI */
> - mdelay(250);
> -
> - /* enable backlight PWM 1 */
> - pwm_init(0, 0, 0);
> -
> - /* duty cycle 500ns, period: 500ns */
> - pwm_config(0, 500, 500);
> -
> - /* Backlight Power */
> - gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
> -
> - pwm_enable(0);
> -#endif
> -
>   /* board specific pmic init */
>   pmic_init();
>  
> @@ -843,3 +826,31 @@ int checkboard(void)
>   printf("BOARD: %s\n", CONFIG_BOARD_NAME);
>   return 0;
>  }
> +
> +static int do_backlight_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * 
> const argv[])
> +{
> +#ifdef CONFIG_VIDEO_IPUV3
> + /* We need at least 200ms between power on and backlight on
> +  * as per specifications from CHI MEI */
> + mdelay(250);
> +
> + /* enable backlight PWM 1 */
> + pwm_init(0, 0, 0);
> +
> + /* duty cycle 500ns, period: 500ns */
> + pwm_config(0, 500, 500);
> +
> + /* Backlight Power */
> + gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
> +
> + pwm_enable(0);
> +#endif
> +
> + return 0;
> +}
> +
> +U_BOOT_CMD(
> +   bx50_backlight_enable, 1,  1,  do_backlight_enable,
> +   "enable Bx50 backlight",
> +   ""
> +);
> diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
> index 8a0ac618e82a..cf35d580abd4 100644
> --- a/include/configs/ge_bx50v3.h
> +++ b/include/configs/ge_bx50v3.h
> @@ -127,6 +127,7 @@
>   "swappartitions=" \
>   "setexpr partnum 3 - ${partnum}\0" \
>   "failbootcmd=" \
> + "bx50_backlight_enable; " \
>   "msg=\"Monitor failed to start.  Try again, or contact GE 
> Service for support.\"; " \
>   "echo $msg; " \
>   "setenv stdout vga; " \
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v2 2/2] boot: script: The boot.scr file for K+P's boards

2018-04-15 Thread Stefano Babic


On 05/04/2018 09:04, Lukasz Majewski wrote:
> By using this file one can avoid cluttering .h file with u-boot
> HUSH commands necessary for booting target device.
> 
> With such approach the commands are stored only in one place and can be
> reused if needed.
> 
> Signed-off-by: Lukasz Majewski 
> Reviewed-by: Stefano Babic 
> 
> ---
> 


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH] arm: imx: Add Winbond SPI-NOR support for Advantech DMS-BA16 board

2018-04-15 Thread Stefano Babic


On 30/03/2018 03:11, Ken Lin wrote:
> Windbond's been in the AVL list and need to enable the support
> 
> Signed-off-by: Ken Lin 
> ---
>  configs/dms-ba16-1g_defconfig | 1 +
>  configs/dms-ba16_defconfig| 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig
> index 40b317093f..8008916234 100644
> --- a/configs/dms-ba16-1g_defconfig
> +++ b/configs/dms-ba16-1g_defconfig
> @@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
>  CONFIG_DWC_AHSATA=y
>  CONFIG_SPI_FLASH=y
>  CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_WINBOND=y
>  CONFIG_PHYLIB=y
>  CONFIG_MXC_SPI=y
>  CONFIG_USB=y
> diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig
> index 3519c5275c..7803052642 100644
> --- a/configs/dms-ba16_defconfig
> +++ b/configs/dms-ba16_defconfig
> @@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
>  CONFIG_DWC_AHSATA=y
>  CONFIG_SPI_FLASH=y
>  CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_WINBOND=y
>  CONFIG_PHYLIB=y
>  CONFIG_MXC_SPI=y
>  CONFIG_USB=y
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v3 1/2] imximage: Encase majority of header in __ASSEMBLY__ declaration

2018-04-15 Thread Stefano Babic


On 26/03/2018 16:36, Bryan O'Donoghue wrote:
> Subsequent patches will want to include imageimage.h but in doing so
> include it on an assembly compile path causing a range of compile errors.
> Fix the errors pre-emptively by encasing the majority of the declarations
> in imximage.h inside an ifdef __ASSEMBLY__ block.
> 
> Signed-off-by: Bryan O'Donoghue 
> Cc: Utkarsh Gupta 
> Cc: Breno Lima 
> Cc: Fabio Estevam 
> ---
>  include/imximage.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/imximage.h b/include/imximage.h
> index de1ea8f..553b852 100644
> --- a/include/imximage.h
> +++ b/include/imximage.h
> @@ -56,6 +56,7 @@
>  #define DCD_CHECK_BITS_SET_PARAM 0x14
>  #define DCD_CHECK_BITS_CLR_PARAM 0x04
>  
> +#ifndef __ASSEMBLY__
>  enum imximage_cmd {
>   CMD_INVALID,
>   CMD_IMAGE_VERSION,
> @@ -197,4 +198,5 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr,
>  typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
>   uint32_t entry_point, uint32_t flash_offset);
>  
> +#endif /* __ASSEMBLY__ */
>  #endif /* _IMXIMAGE_H_ */
> 
Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v3 2/2] imx: hab: Provide hab_auth_img_or_fail command

2018-04-15 Thread Stefano Babic


On 26/03/2018 16:36, Bryan O'Donoghue wrote:
> This patch adds hab_auth_img_or_fail() a command line function that
> encapsulates a common usage of authenticate and failover, namely if
> authenticate image fails, then drop to BootROM USB recovery mode.
> 
> For secure-boot systems, this type of locked down behavior is important to
> ensure no unsigned images can be run.
> 
> It's possible to script this logic but, when done over and over again the
> environment starts get very complex and repetitive, reducing that script
> repetition down to a command line function makes sense.
> 
> Signed-off-by: Bryan O'Donoghue 
> Cc: Utkarsh Gupta 
> Cc: Breno Lima 
> Cc: Fabio Estevam 
> ---
>  arch/arm/mach-imx/hab.c | 35 +++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
> index c730c8f..9ca7bad 100644
> --- a/arch/arm/mach-imx/hab.c
> +++ b/arch/arm/mach-imx/hab.c
> @@ -341,6 +341,31 @@ static int do_hab_failsafe(cmd_tbl_t *cmdtp, int flag, 
> int argc,
>   return 0;
>  }
>  
> +static int do_authenticate_image_or_failover(cmd_tbl_t *cmdtp, int flag,
> +  int argc, char * const argv[])
> +{
> + int ret = CMD_RET_FAILURE;
> +
> + if (argc != 4) {
> + ret = CMD_RET_USAGE;
> + goto error;
> + }
> +
> + if (!imx_hab_is_enabled()) {
> + printf("error: secure boot disabled\n");
> + goto error;
> + }
> +
> + if (do_authenticate_image(NULL, flag, argc, argv) != CMD_RET_SUCCESS) {
> + fprintf(stderr, "authentication fail -> %s %s %s %s\n",
> + argv[0], argv[1], argv[2], argv[3]);
> + do_hab_failsafe(0, 0, 1, NULL);
> + };
> + ret = CMD_RET_SUCCESS;
> +error:
> + return ret;
> +}
> +
>  U_BOOT_CMD(
>   hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
>   "display HAB status",
> @@ -362,6 +387,16 @@ U_BOOT_CMD(
>   ""
> );
>  
> +U_BOOT_CMD(
> + hab_auth_img_or_fail, 4, 0,
> + do_authenticate_image_or_failover,
> + "authenticate image via HAB on failure drop to USB BootROM 
> mode",
> + "addr length ivt_offset\n"
> + "addr - image hex address\n"
> + "length - image hex length\n"
> + "ivt_offset - hex offset of IVT in the image"
> +   );
> +
>  #endif /* !defined(CONFIG_SPL_BUILD) */
>  
>  /* Get CSF Header length */
> 
Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v3 3/3] warp7: Set u-boot serial# based on OTP value

2018-04-15 Thread Stefano Babic


On 26/03/2018 16:27, Bryan O'Donoghue wrote:
> u-boot has a standard "serial#" environment variable that is suitable
> for storing the iSerial number we will supply via the USB device
> descriptor. serial# is automatically picked up by the disk subsystem in
> u-boot - thus providing a handy unique identifier in /dev/disk/by-id as
> detailed below.
> 
> Storing the hardware serial identifier in serial# means we can change the
> serial# if we want before USB enumeration - thus making iSerial automatic
> via OTP but overridable if necessary.
> 
> This patch reads the defined OTP fuse and sets environment variable
> "serial#" to the value read.
> 
> With this patch in place the USB mass storage device will appear in
> /dev/disk/by-id with a unique name based on the OTP value. For example
> 
> /dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d301d4-0:0
> 
> Signed-off-by: Bryan O'Donoghue 
> Cc: Fabio Estevam 
> Cc: Rui Miguel Silva 
> Cc: Ryan Harkin 
> Reviewed-by: Fabio Estevam 
> ---
>  board/warp7/warp7.c | 14 ++
>  include/configs/warp7.h |  3 +++
>  2 files changed, 17 insertions(+)
> 
> diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c
> index d422d63..327f656 100644
> --- a/board/warp7/warp7.c
> +++ b/board/warp7/warp7.c
> @@ -23,6 +23,8 @@
>  #include 
>  #include 
>  #include "../freescale/common/pfuze.h"
> +#include 
> +#include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -186,6 +188,10 @@ int board_usb_phy_mode(int port)
>  int board_late_init(void)
>  {
>   struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
> +#ifdef CONFIG_SERIAL_TAG
> + struct tag_serialnr serialnr;
> + char serial_string[0x20];
> +#endif
>  
>   imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
>  
> @@ -197,5 +203,13 @@ int board_late_init(void)
>*/
>   clrsetbits_le16(>wcr, 0, 0x10);
>  
> +#ifdef CONFIG_SERIAL_TAG
> + /* Set serial# standard environment variable based on OTP settings */
> + get_board_serial();
> + snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
> +  serialnr.low, serialnr.high);
> + env_set("serial#", serial_string);
> +#endif
> +
>   return 0;
>  }
> diff --git a/include/configs/warp7.h b/include/configs/warp7.h
> index fe96988..0c3b605 100644
> --- a/include/configs/warp7.h
> +++ b/include/configs/warp7.h
> @@ -24,6 +24,9 @@
>  #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
>  #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
>  
> +/* Switch on SERIAL_TAG */
> +#define CONFIG_SERIAL_TAG
> +
>  #define CONFIG_DFU_ENV_SETTINGS \
>   "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
>  
> 


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v3 2/3] imx: mx7: Add comment to describe OTP TESTER registers

2018-04-15 Thread Stefano Babic


On 26/03/2018 16:27, Bryan O'Donoghue wrote:
> The tester registers provide a unique chip-level identifier which
> get_board_serial() returns in a "struct tag_serialnr".
> 
> This patch documents the properties of the registers; in summary.
> 
> 31:0 OCOTP_TESTER0 (most significant)
> - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
> 
> OCOTP_TESTER1 (least significant)
> 31:24
> - The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
>   ID
> 23:16
> - The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
>   ID
> 15:11
> - The wafer number of the wafer on which the device was fabricated/SJC
>   CHALLENGE/ Unique ID
> 10:0
> - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
> 
> The 64 bits of data generate a unique serial number per-chip.
> 
> Signed-off-by: Bryan O'Donoghue 
> Cc: Fabio Estevam 
> Cc: Peng Fan 
> Cc: Stefano Babic 
> Reviewed-by: Fabio Estevam 
> ---
>  arch/arm/mach-imx/mx7/soc.c | 21 +
>  1 file changed, 21 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
> index 1602585..fb92a26 100644
> --- a/arch/arm/mach-imx/mx7/soc.c
> +++ b/arch/arm/mach-imx/mx7/soc.c
> @@ -202,6 +202,27 @@ int arch_misc_init(void)
>  #endif
>  
>  #ifdef CONFIG_SERIAL_TAG
> +/*
> + * OCOTP_TESTER
> + * i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016
> + * OCOTP_TESTER describes a unique ID based on silicon wafer
> + * and die X/Y position
> + *
> + * OCOTOP_TESTER offset 0x410
> + * 31:0 fuse 0
> + * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
> + *
> + * OCOTP_TESTER1 offset 0x420
> + * 31:24 fuse 1
> + * The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID
> + * 23:16 fuse 1
> + * The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID
> + * 15:11 fuse 1
> + * The wafer number of the wafer on which the device was fabricated/SJC
> + * CHALLENGE/ Unique ID
> + * 10:0 fuse 1
> + * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
> + */
>  void get_board_serial(struct tag_serialnr *serialnr)
>  {
>   struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v3 1/3] imx: mx7: Fix CONFIG_SERIAL_TAG compilation

2018-04-15 Thread Stefano Babic


On 26/03/2018 16:27, Bryan O'Donoghue wrote:
> Currently when we define CONFIG_SERIAL_TAG we will barf with a failure to
> define "struct tag_serialnr".
> 
> This structure is defined in , this patch includes
>  to fix.
> 
> Signed-off-by: Bryan O'Donoghue 
> Cc: Fabio Estevam 
> Cc: Peng Fan 
> Cc: Stefano Babic 
> Reviewed-by: Fabio Estevam 
> ---
>  arch/arm/mach-imx/mx7/soc.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
> index d349676..1602585 100644
> --- a/arch/arm/mach-imx/mx7/soc.c
> +++ b/arch/arm/mach-imx/mx7/soc.c
> @@ -18,6 +18,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #if defined(CONFIG_IMX_THERMAL)
>  static const struct imx_thermal_plat imx7_thermal_plat = {
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH] ARM: mx6: ddr: Add write leveling correction code

2018-04-15 Thread Stefano Babic


On 30/03/2018 03:04, Marek Vasut wrote:
> When the DDR calibration is enabled, a situation may happen that it
> will fail on a few select boards out of a whole production lot. In
> particular, after the first write leveling stage, the MPWLDECTRLx
> registers will contain a value 0x1nn , for nn usually being 0x7f or
> slightly lower.
> 
> What this means is that the HW write leveling detected that the DQS
> rising edge on one or more bundles arrives slightly _after_ CLK and
> therefore when the DDR DRAM samples CLK on the DQS rising edge, the
> CLK signal is already high (cfr. AN4467 rev2 Figure 7 on page 18).
> 
> The HW write leveling then ends up adding almost an entire cycle (thus
> the 0x17f) to the DQS delay, which indeed aligns it, but also triggers
> subsequent calibration failure in DQS gating due to this massive offset.
> 
> There are two observations here:
> - If the MPWLDECTRLx value is corrected from 0x17f to 0x0 , then the
>   DQS gating passes, the entire calibration passes as well and the
>   DRAM is perfectly stable even under massive load.
> - When using the NXP DRAM calibrator for iMX6/7, the value 0x17f or so
>   in MPWLDECTRx register is not there, but it is replaced by 0x0 as one
>   would expect.
> 
> Someone from NXP finally explains why, quoting [1]:
> 
> "
> Having said all that, the DDR Stress Test does something that we
> do not advertise to the users. The Stress Test iself looks at the
> values of the MPWLDECTRL0/1 fields before reporting results, and
> if it sees any filed with a value greater than 200/256 delay
> (reported as half-cycle = 0x1 and ABS_OFFSET > 0x48), the DDR
> Stress test will reset the Write Leveling delay for this lane
> to 0x000 and not report it in the log.
> 
> The reason that the DDR Stress test does this is because a delay
> of more than 78% a clock cycle means that the DQS edge is arriving
> within the JEDEC tolerence of 25% of the clock edge. In most cases,
> DQS is arriving < 5% tCK of the SDCLK edge in the early case, and
> it does not make sense to delay the DQS strobe almost a full clock
> cycle and add extra latency to each Write burst just to make the
> two edges align exactly. In this case, we are guilty of making a
> decision for the customer without telling them we are doing it so
> that we don't have to provide the above explanation to every customer.
> They don't need to know it.
> "
> 
> This patch adds the correction described above, that is if the MPWLDECTRx
> value is over 0x148, the value is corrected back to 0x0.
> 
> [1] https://community.nxp.com/thread/456246
> 
> Signed-off-by: Marek Vasut 
> Cc: Stefano Babic 
> ---


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH 2/2] tools/imximage: use 0x prefix in HAB Blocks line

2018-04-15 Thread Stefano Babic


On 23/03/2018 12:08, Rasmus Villemoes wrote:
> The u-boot-ivt.img.log file contains 0x prefixes in the HAB Blocks line,
> while the SPL.log does not. For consistency, and to make it easier to
> extract and put into a .csf file for use with NXP's code signing tool,
> add 0x prefixes here.
> 
> Signed-off-by: Rasmus Villemoes 
> ---
>  doc/README.mxc_hab | 14 +++---
>  tools/imximage.c   |  2 +-
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/doc/README.mxc_hab b/doc/README.mxc_hab
> index 75390a505e..a40ebf3e84 100644
> --- a/doc/README.mxc_hab
> +++ b/doc/README.mxc_hab
> @@ -33,12 +33,12 @@ Image Ver:2 (i.MX53/6 compatible)
>  Data Size:327680 Bytes = 320.00 kB = 0.31 MB
>  Load Address: 177ff420
>  Entry Point:  1780
> -HAB Blocks:   177ff400  0004dc00
> -     
> - |   |  |
> - |   |   (1)
> - |   |
> - |   --- (2)
> +HAB Blocks:   0x177ff400 0x 0x0004dc00
> +   ^^ ^^ ^^
> + |  |  |
> + |  |  - (1)
> + |  |
> + |   (2)
>   |
>   --- (3)
>  
> @@ -78,7 +78,7 @@ Example Output of the SPL (imximage) creation:
>   Data Size:61440 Bytes = 60.00 kB = 0.06 MB
>   Load Address: 00907420
>   Entry Point:  00908000
> - HAB Blocks:   00907400  cc00
> + HAB Blocks:   0x00907400 0x 0xcc00
>  
>  Example Output of the u-boot-ivt.img (firmware_ivt) creation:
>   Image Name:   U-Boot 2016.11-rc1-31589-g2a4411
> diff --git a/tools/imximage.c b/tools/imximage.c
> index ed9d935903..6dabb13520 100644
> --- a/tools/imximage.c
> +++ b/tools/imximage.c
> @@ -516,7 +516,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr)
>   offs = (char *)_v2->data.dcd_table
>   - (char *)hdr_v2;
>  
> - printf("HAB Blocks:   %08x %08x %08x\n",
> + printf("HAB Blocks:   0x%08x 0x%08x 0x%08x\n",
>  (uint32_t)fhdr_v2->self, 0,
>  hdr_v2->boot_data.size - imximage_ivt_offset -
>  imximage_csf_size);
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 1/2] Makefile: always preserve output for images that can contain HAB Blocks

2018-04-15 Thread Stefano Babic


On 24/03/2018 23:13, Breno Matheus Lima wrote:
> Hi All,
> 
> 2018-03-23 8:08 GMT-03:00 Rasmus Villemoes :
>> The current makefile logic disables creation of the
>> SPL.log/u-boot-ivt.img.log etc. files when V=1 is given on the command
>> line, the rationale presumably being that the user wants and gets the
>> information on the console.
>>
>> However, from general principles, I don't think a higher V= level
>> should affect which build artifacts get generated (and certainly
>> shouldn't produce fewer). Concretely, it's also a problem that when
>> doing a V=1 build in a terminal, the relevant HAB blocks lines easily
>> drown in all the other V=1 output.
>>
>> Moreover, build systems such as Yocto by default pass V=1, so in that
>> case the information gets hidden away in the do_compile log file, making
>> it nigh impossible to create a recipe for creating signed U-boot images
>> - I don't want to disable V=1, because having verbose output in the log
>> file is valuable when things go wrong, but OTOH trying to go digging in
>> the do_compile log file (and getting exactly the right lines) is not
>> pleasant to even think about.
>>
>> So change the logic so that for V=0, the mkimage output is redirected
>> to MKIMAGEOUTPUT (which is also the current behaviour), while for any
>> other value of V, we _additionally_ write the information to make's
>> stdout, whatever that might be.
>>
>> Signed-off-by: Rasmus Villemoes 
> 
> Tested-by: Breno Lima 


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] net: sh_eth: Add remaining Gen2 DT compatible

2018-04-15 Thread Marek Vasut
On 04/15/2018 06:16 AM, Joe Hershberger wrote:
> Hi Marek,
> 
> https://patchwork.ozlabs.org/patch/897786/ was applied to 
> http://git.denx.de/?p=u-boot/u-boot-net.git

If you don't mind, I'll pull it through -sh alongside the rest of the
Gen2 junk, OK ?

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