Re: [U-Boot] [PATCH] mach-stm32: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET

2018-07-13 Thread Tom Rini
On Wed, Jul 11, 2018 at 05:56:57PM +0800, Ley Foon Tan wrote:

> Commit bfc6bae8fa1f2d8a9c51548767b02f1a1e0ffe52
> 
> This commit rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET. Update
> with new CONFIG name.
> 
> Signed-off-by: Ley Foon Tan 

With a slight reword to use the fixes tag, applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PULL] u-boot-socfpga/master

2018-07-13 Thread Tom Rini
On Fri, Jul 13, 2018 at 11:04:36AM +0200, Marek Vasut wrote:

> The following changes since commit 1612ff0dfba57b1002d8c7a54778eb553ace98f4:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-mips (2018-07-11
> 21:55:20 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to aa529663368e97663d7ec16d6997cb69a2dd8afb:
> 
>   arm: socfpga: Fixes: include  (2018-07-12 16:03:35 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PATCH 08/11] udoo_neo: Add Windows boot support for UDOO Neo

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch adds a new bootable configuration for Windows 10 IoT Core on
the i.MX6 SoloX UDOO Neo.

It also adds a new device tree sources file for imx6sx-udoo-neo.dts.
This is not required by Windows or UEFI but the build system requires a
device tree when building SPL with flat image tree support.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Breno Lima 
Cc: Francesco Montefoschi 
---
 arch/arm/dts/Makefile|  1 +
 arch/arm/dts/imx6sx-udoo-neo.dts |  8 ++
 board/udoo/neo/MAINTAINERS   |  2 ++
 board/udoo/neo/neo.c |  7 +
 configs/udoo_neo_nt_defconfig| 55 
 include/configs/udoo_neo.h   |  8 ++
 6 files changed, 81 insertions(+)
 create mode 100644 arch/arm/dts/imx6sx-udoo-neo.dts
 create mode 100644 configs/udoo_neo_nt_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 109a00219d..1bbb9bf388 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -424,6 +424,7 @@ dtb-$(CONFIG_MX6SL) += imx6sll-evk.dtb
 
 dtb-$(CONFIG_MX6SX) += \
imx6sx-sabreauto.dtb \
+   imx6sx-udoo-neo.dtb \
imx6sx-sdb.dtb
 
 dtb-$(CONFIG_MX6UL) += \
diff --git a/arch/arm/dts/imx6sx-udoo-neo.dts b/arch/arm/dts/imx6sx-udoo-neo.dts
new file mode 100644
index 00..f5b35a6175
--- /dev/null
+++ b/arch/arm/dts/imx6sx-udoo-neo.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+/dts-v1/;
+
+#include "imx6sx.dtsi"
diff --git a/board/udoo/neo/MAINTAINERS b/board/udoo/neo/MAINTAINERS
index 743fe33d05..4ab862e3dc 100644
--- a/board/udoo/neo/MAINTAINERS
+++ b/board/udoo/neo/MAINTAINERS
@@ -5,3 +5,5 @@ S:  Maintained
 F: board/udoo/neo/
 F: include/configs/udoo_neo.h
 F: configs/udoo_neo_defconfig
+F: configs/udoo_neo_nt_defconfig
+F: arch/arm/dts/imx6sx-udoo-neo.dts
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 828161360c..8429063bb0 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -593,3 +593,10 @@ void board_init_f(ulong dummy)
 }
 
 #endif
+
+#if defined(CONFIG_MULTI_DTB_FIT) || defined(CONFIG_SPL_LOAD_FIT)
+int board_fit_config_name_match(const char *name)
+{
+   return 0;
+}
+#endif
diff --git a/configs/udoo_neo_nt_defconfig b/configs/udoo_neo_nt_defconfig
new file mode 100644
index 00..d5123369ca
--- /dev/null
+++ b/configs/udoo_neo_nt_defconfig
@@ -0,0 +1,55 @@
+CONFIG_ARCH_MX6=y
+CONFIG_ARM=y
+CONFIG_SYS_TEXT_BASE=0x8780
+CONFIG_TARGET_UDOO_NEO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo"
+CONFIG_OF_CONTROL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_OPTEE_BOOT=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_BOOTDELAY=-2
+CONFIG_UEFI_BOOT=y
+CONFIG_UEFI_LOAD_ADDR=0x82004000
+CONFIG_EFI_LOADER=n
+CONFIG_CMD_BOOTD=n
+CONFIG_CMD_BOOTM=n
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=n
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPL=n
+CONFIG_DISTRO_DEFAULTS=n
+CONFIG_ENV_IS_IN_MMC=n
+CONFIG_HUSH_PARSER=y
+CONFIG_PCI=n
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_SECURE_BOOT=y
+CONFIG_SPL=y
+CONFIG_SPL_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LEGACY_IMAGE_SUPPORT=n
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=n
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=n
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=n
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=n
+CONFIG_SPL_USE_ARCH_MEMCPY=n
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-imx/u-boot-spl-sram.lds"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_SYS_L2CACHE_OFF=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_PHY_MICREL=y
+CONFIG_OF_LIBFDT=y
\ No newline at end of file
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index 2924e3143a..a71e9d64b2 100644
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -25,6 +25,13 @@
 #define CONFIG_MXC_UART_BASE   UART1_BASE
 #define CONFIG_SYS_MMC_ENV_DEV 0  /*USDHC2*/
 
+#ifdef CONFIG_UEFI_BOOT
+#include 
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+   "mmcdev=0\0" \
+   BOOTENV
+#else
 /* Linux only */
 #define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200\0" \
@@ -58,6 +65,7 @@
func(DHCP, dhcp, na)
 
 #include 
+#endif /* CONFIG_UEFI_BOOT */
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_MEMTEST_START   0x8000
-- 
2.16.2.gvfs.1.33.gf5370f1

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[U-Boot] [PATCH 07/11] mx6cuboxi: Add Windows boot support for mx6cuboxi

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch adds a new bootable configuration for Windows 10 IoT Core on
the i.MX6 Quad HummingBoard.

It also adds a new device tree sources file for imx6qdl-mx6cuboxi.dts.
This is not required by Windows or UEFI but the build system requires a
device tree when building SPL with flat image tree support.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Jon Nettleton 
---
 arch/arm/dts/Makefile|  1 +
 arch/arm/dts/imx6qdl-mx6cuboxi.dts   |  8 +
 board/solidrun/mx6cuboxi/MAINTAINERS |  2 ++
 board/solidrun/mx6cuboxi/mx6cuboxi.c |  7 
 configs/mx6cuboxi_nt_defconfig   | 62 
 include/configs/mx6cuboxi.h  |  8 +
 6 files changed, 88 insertions(+)
 create mode 100644 arch/arm/dts/imx6qdl-mx6cuboxi.dts
 create mode 100644 configs/mx6cuboxi_nt_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7d90bd39f3..109a00219d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -411,6 +411,7 @@ dtb-$(CONFIG_MX6QDL) += \
imx6dl-icore-rqs.dtb \
imx6dl-mamoj.dtb \
imx6qdl-sdb.dtb \
+   imx6qdl-mx6cuboxi.dtb \
imx6q-cm-fx6.dtb \
imx6q-icore.dtb \
imx6q-icore-mipi.dtb \
diff --git a/arch/arm/dts/imx6qdl-mx6cuboxi.dts 
b/arch/arm/dts/imx6qdl-mx6cuboxi.dts
new file mode 100644
index 00..907f44859f
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-mx6cuboxi.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
diff --git a/board/solidrun/mx6cuboxi/MAINTAINERS 
b/board/solidrun/mx6cuboxi/MAINTAINERS
index 81f82bc9b5..1e4ed35d36 100644
--- a/board/solidrun/mx6cuboxi/MAINTAINERS
+++ b/board/solidrun/mx6cuboxi/MAINTAINERS
@@ -4,3 +4,5 @@ S:  Maintained
 F: board/solidrun/mx6cuboxi/
 F: include/configs/mx6cuboxi.h
 F: configs/mx6cuboxi_defconfig
+F: configs/mx6cuboxi_nt_defconfig
+F: arch/arm/dts/imx6qdl-mx6cuboxi.dts
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c 
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 38d89f0130..bc423c3a86 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -143,6 +143,13 @@ static iomux_v3_cfg_t const usb_pads[] = {
IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)),
 };
 
+#if defined(CONFIG_MULTI_DTB_FIT) || defined(CONFIG_SPL_LOAD_FIT)
+int board_fit_config_name_match(const char *name)
+{
+   return 0;
+}
+#endif
+
 static void setup_iomux_uart(void)
 {
SETUP_IOMUX_PADS(uart1_pads);
diff --git a/configs/mx6cuboxi_nt_defconfig b/configs/mx6cuboxi_nt_defconfig
new file mode 100644
index 00..087569d2e9
--- /dev/null
+++ b/configs/mx6cuboxi_nt_defconfig
@@ -0,0 +1,62 @@
+CONFIG_ARCH_MX6=y
+CONFIG_ARM=y
+CONFIG_SYS_TEXT_BASE=0x1780
+CONFIG_TARGET_MX6CUBOXI=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6qdl-mx6cuboxi"
+CONFIG_OF_CONTROL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_OPTEE_BOOT=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_BOOTDELAY=-2
+CONFIG_UEFI_BOOT=y
+CONFIG_UEFI_LOAD_ADDR=0x1082
+CONFIG_EFI_LOADER=n
+CONFIG_CMD_BOOTD=n
+CONFIG_CMD_BOOTM=n
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_HDMIDETECT=y
+CONFIG_CMD_I2C=n
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPL=n
+CONFIG_CMD_USB=y
+CONFIG_DISTRO_DEFAULTS=n
+CONFIG_DM=y
+CONFIG_DM_THERMAL=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CONS_INDEX=1
+CONFIG_PCI=n
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_SECURE_BOOT=y
+CONFIG_SPL=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LEGACY_IMAGE_SUPPORT=n
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_SPL_DM=n
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=n
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=n
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=n
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=n
+CONFIG_SPL_USE_ARCH_MEMCPY=n
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-imx/u-boot-spl-sram.lds"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_SYS_L2CACHE_OFF=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_VIDEO=y
+CONFIG_OF_LIBFDT=y
\ No newline at end of file
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 803661cfa8..34fad495b1 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -71,6 +71,13 @@
 #define CONFIG_SYS_MMC_ENV_DEV 0   /* SDHC2 */
 
 #ifndef CONFIG_SPL_BUILD
+#ifdef CONFIG_UEFI_BOOT
+#include 
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+   "mmcdev=0\0" \
+   BOOTENV
+#else
 #define CONFIG_EXTRA_ENV_SETTINGS \
"fdtfile=undefined\0" \
"fdt_addr_r=0x1800\0" \
@@ -125,6 +132,7 @@
func(DHCP, dhcp, na)
 
 #include 
+#endif /* CONFIG_UEFI_BOOT */
 
 #else

[U-Boot] [PATCH 09/11] cl-som-imx7: Add Windows boot support for cl-som-imx7

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch adds a new bootable configuration for Windows 10 IoT Core on
the Compulab CL-SOM-iMX7.

It also adds a new device tree sources file for imx7d-cl-som-imx7.dts.
This is not required by Windows or UEFI but the build system requires a
device tree when building SPL with flat image tree support.

Baseboard I2C is required for display initialization. This commit
patch doesn't use display during U-Boot, but it needs to setup and MUX
the baseboard I2C for use in UEFI when the GOP driver initializes.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Uri Mashiach 
Cc: Igor Grinberg 
---
 arch/arm/dts/Makefile|  1 +
 arch/arm/dts/imx7d-cl-som-imx7.dts   |  8 
 board/compulab/cl-som-imx7/MAINTAINERS   |  2 +
 board/compulab/cl-som-imx7/cl-som-imx7.c | 47 +--
 board/compulab/cl-som-imx7/spl.c |  7 +++
 configs/cl-som-imx7_nt_defconfig | 80 
 include/configs/cl-som-imx7.h| 18 ++-
 7 files changed, 159 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/imx7d-cl-som-imx7.dts
 create mode 100644 configs/cl-som-imx7_nt_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1bbb9bf388..6fa7a78a2e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -436,6 +436,7 @@ dtb-$(CONFIG_MX6UL) += \
 dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb
 
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
+   imx7d-cl-som-imx7.dtb \
imx7d-sdb.dtb
 
 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
diff --git a/arch/arm/dts/imx7d-cl-som-imx7.dts 
b/arch/arm/dts/imx7d-cl-som-imx7.dts
new file mode 100644
index 00..cbb31ec693
--- /dev/null
+++ b/arch/arm/dts/imx7d-cl-som-imx7.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+/dts-v1/;
+
+#include "imx7d.dtsi"
diff --git a/board/compulab/cl-som-imx7/MAINTAINERS 
b/board/compulab/cl-som-imx7/MAINTAINERS
index 2b917a5c80..aeaa73a85a 100644
--- a/board/compulab/cl-som-imx7/MAINTAINERS
+++ b/board/compulab/cl-som-imx7/MAINTAINERS
@@ -4,3 +4,5 @@ S:  Maintained
 F: board/compulab/cl-som-imx7
 F: include/configs/cl-som-imx7.h
 F: configs/cl-som-imx7_defconfig
+F: configs/cl-som-imx7_nt_defconfig
+F: arch/arm/dts/imx7d-cl-som-imx7.dts
diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c 
b/board/compulab/cl-som-imx7/cl-som-imx7.c
index 1bc33b0a7b..6a219b892a 100644
--- a/board/compulab/cl-som-imx7/cl-som-imx7.c
+++ b/board/compulab/cl-som-imx7/cl-som-imx7.c
@@ -50,15 +50,54 @@ static struct i2c_pads_info cl_som_imx7_i2c_pad_info2 = {
},
 };
 
+static struct i2c_pads_info cl_som_imx7_i2c_pad_info4 = {
+   .scl = {
+   .i2c_mode = MX7D_PAD_GPIO1_IO10__I2C4_SCL |
+   MUX_PAD_CTRL(I2C_PAD_CTRL),
+   .gpio_mode = MX7D_PAD_GPIO1_IO10__GPIO1_IO10 |
+   MUX_PAD_CTRL(I2C_PAD_CTRL),
+   .gp = IMX_GPIO_NR(1, 10),
+   },
+   .sda = {
+   .i2c_mode = MX7D_PAD_GPIO1_IO11__I2C4_SDA |
+   MUX_PAD_CTRL(I2C_PAD_CTRL),
+   .gpio_mode = MX7D_PAD_GPIO1_IO11__GPIO1_IO11 |
+   MUX_PAD_CTRL(I2C_PAD_CTRL),
+   .gp = IMX_GPIO_NR(1, 11),
+   },
+};
+
+/* Environment variable: base board I2C bus enable */
+#define CL_SOM_IMX7_ENV_BASE_I2C "baseboard_i2c_enable"
+
 /*
  * cl_som_imx7_setup_i2c() - I2C  pinmux configuration.
  */
-static void cl_som_imx7_setup_i2c(void)
+static void cl_som_imx7_setup_i2c0(void)
 {
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, _som_imx7_i2c_pad_info2);
 }
+
+static int cl_som_imx7_setup_i2c1(void)
+{
+   int ret;
+   char *base_i2c = env_get(CL_SOM_IMX7_ENV_BASE_I2C);
+
+   if (base_i2c && (!strcmp(base_i2c, "yes") ||
+!strcmp(base_i2c, "true") ||
+!strcmp(base_i2c, "1"))) {
+   ret = setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f,
+   _som_imx7_i2c_pad_info4);
+   if (ret)
+   return 0;
+   return 1;
+   }
+
+   return 0;
+}
 #else /* !CONFIG_SYS_I2C_MXC */
-static void cl_som_imx7_setup_i2c(void) {}
+static void cl_som_imx7_setup_i2c0(void) {}
+static int cl_som_imx7_setup_i2c1(void) { return 0; }
 #endif /* CONFIG_SYS_I2C_MXC */
 
 int dram_init(void)
@@ -256,7 +295,7 @@ int board_init(void)
 {
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-   cl_som_imx7_setup_i2c();
+   cl_som_imx7_setup_i2c0();
cl_som_imx7_setup_fec();
cl_som_imx7_spi_init();
 
@@ -327,5 +366,7 @@ int checkboard(void)
 
printf("Board: CL-SOM-iMX7 in %s mode\n", mode);
 
+   cl_som_imx7_setup_i2c1();
+
return 0;
 }
diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c
index 

[U-Boot] [PATCH 03/11] spl: Add FIT boot into OP-TEE then U-Boot proper

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch is a part of the i.MX Windows 10 IoT Core boot flow.

It adds an entry path for OP-TEE when loaded from a FIT blob when
loadable has the OS type IH_OS_TEE. This booth path flushes and
disables caches, disables interrupts, and jumps into OP-TEE passing
the entry point for U-Boot Proper in one of the registers.

The CONFIG_SPL_OPTEE_BOOT option enables this boot path, and is also
used to automatically set the CONFIG_SYS_NORMAL_WORLD Kconfig option
while building U-Boot proper. This is because when OP-TEE returns to
U-Boot proper's entry point, it will be in normal mode, so several
secure world only initializations need to be omitted.

New Kconfig option:
CONFIG_SPL_OPTEE_BOOT - Enables SPL FIT to boot in to OP-TEE, and will
set the CONFIG_SYS_NORMAL_WORLD in U-Boot Proper to omit secure world
only code.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Tom Rini 
---
 arch/arm/cpu/armv7/Makefile |  1 +
 arch/arm/cpu/armv7/optee_jump.S | 31 +++
 arch/arm/lib/spl.c  | 16 
 common/spl/Kconfig  |  9 +
 common/spl/spl.c|  6 ++
 include/spl.h   | 21 +
 6 files changed, 84 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/optee_jump.S

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 4f4647c90a..5bad36a8b8 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_ARMV7_PSCI)  += psci.o psci-common.o
 obj-$(CONFIG_IPROC) += iproc-common/
 obj-$(CONFIG_KONA) += kona-common/
 obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
+obj-$(CONFIG_SPL_OPTEE_BOOT) += optee_jump.o
 
 ifneq (,$(filter s5pc1xx exynos,$(SOC)))
 obj-y += s5p-common/
diff --git a/arch/arm/cpu/armv7/optee_jump.S b/arch/arm/cpu/armv7/optee_jump.S
new file mode 100644
index 00..2a1d994bcc
--- /dev/null
+++ b/arch/arm/cpu/armv7/optee_jump.S
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_SPL_OPTEE_BOOT
+
+   .globl arch_jump_to_image_optee
+
+/*
+ void __noreturn arch_jump_to_image_optee(
+   u32 optee_entry_point,
+   u32 pageable_part,
+   u32 uboot_entry_point
+   );
+*/
+ENTRY(arch_jump_to_image_optee)
+
+   mov r3, r0
+   mov r0, r1
+   mov lr, r2
+
+   bx r3
+
+ENDPROC(arch_jump_to_image_optee)
+#endif
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index 33cc76ba3d..ee311d9fe8 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -73,3 +73,19 @@ void __noreturn jump_to_image_linux(struct spl_image_info 
*spl_image)
 }
 #endif /* CONFIG_ARM64 */
 #endif
+
+#ifdef CONFIG_SPL_OPTEE_BOOT
+void __noreturn arch_jump_to_image_optee(u32 optee_entry_point,
+u32 pageable_part,
+u32 uboot_entry_point);
+
+void __noreturn jump_to_image_optee(struct spl_image_info *spl_image)
+{
+   /* flush and turn off caches before jumping to OPTEE */
+   cleanup_before_linux();
+
+   arch_jump_to_image_optee(spl_image->entry_point,
+0,
+CONFIG_SYS_TEXT_BASE);
+}
+#endif
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0bbf8d5b02..643484a4a4 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -792,6 +792,15 @@ config SPL_ATF_NO_PLATFORM_PARAM
 
  If your ATF is affected, say Y.
 
+config SPL_OPTEE_BOOT
+   depends on SPL
+   bool "Enable support for loading OPTEE and jumping to it from SPL"
+   default n
+   help
+ Configure SPL to boot OPTEE. SPL passes the U-Boot proper entry
+ point as the return address when it jumps to OPTEE, allowing OPTEE
+ to start U-Boot proper in normal mode when it returns.
+
 config SPL_AM33XX_ENABLE_RTC32K_OSC
bool "Enable the RTC32K OSC on AM33xx based platforms"
default y if AM33XX
diff --git a/common/spl/spl.c b/common/spl/spl.c
index a09ada37d7..237083b08d 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -519,6 +519,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
spl_invoke_atf(_image);
break;
 #endif
+#ifdef CONFIG_SPL_OPTEE_BOOT
+   case IH_OS_TEE:
+   debug("Jumping to OPTEE\n");
+   jump_to_image_optee(_image);
+   break;
+#endif
 #ifdef CONFIG_SPL_OS_BOOT
case IH_OS_LINUX:
debug("Jumping to Linux\n");
diff --git a/include/spl.h b/include/spl.h
index 8454ea7ad4..338b4b573d 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -125,6 +125,19 @@ int spl_board_ubi_load_image(u32 boot_device);
  */
 void __noreturn jump_to_image_linux(struct spl_image_info *spl_image);
 
+#ifdef CONFIG_SPL_OPTEE_BOOT
+/**
+ * jump_to_image_optee() - Jump to OP-TEE from SPL
+ *

[U-Boot] [PATCH 11/11] imx: Add MAC addresses to global page to pass MAC into UEFI

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

U-Boot already has logic for determining the platform MAC address on
many i.MX platforms, such as pulling it from fuses or SPI flash. This
configuration option saves the MAC address from the ethaddr (and
potentially ethaddr1) into the global page and marks it as valid. This
value is then picked up in UEFI which will configure the LAN driver in
Windows with the correct MAC address.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/mach-imx/Kconfig| 16 
 arch/arm/mach-imx/global_page.c  | 26 +-
 configs/cl-som-imx7_nt_defconfig |  2 ++
 configs/mx6cuboxi_nt_defconfig   |  2 ++
 configs/mx6sabresd_nt_defconfig  |  2 ++
 configs/udoo_neo_nt_defconfig|  2 ++
 include/global_page.h|  8 
 7 files changed, 57 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c88fa2ca1b..9bc0294d0c 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -85,3 +85,19 @@ config GLOBAL_PAGE
help
  This option creates a global 4K page to store U-Boot environment data
  to pass to another environment such as UEFI or Windows.
+
+config STORE_MAC_IN_GLOBAL
+   bool "Store MAC address information in global page"
+   depends on GLOBAL_PAGE
+   default n
+   help
+ This option informs U-Boot to read the ethaddr environment
+ variable and store it in the global page for UEFI to use.
+
+config ETH1ADDR_IN_GLOBAL
+   bool "Store MAC Address for 2nd ethernet in global page"
+   depends on STORE_MAC_IN_GLOBAL
+   default n
+   help
+ This option informs U-Boot to read the eth1addr environment
+ variable and store it in the global page for UEFI to use.
diff --git a/arch/arm/mach-imx/global_page.c b/arch/arm/mach-imx/global_page.c
index 139e18f4bc..c753452ad6 100644
--- a/arch/arm/mach-imx/global_page.c
+++ b/arch/arm/mach-imx/global_page.c
@@ -20,9 +20,33 @@ void init_global_page(void)
global_page->header.signature = 0x474c424c;
 
/* Set revision */
-   global_page->header.revision = 0;
+   global_page->header.revision = 1;
 }
 
 void publish_to_global_page(void)
 {
+#ifdef CONFIG_STORE_MAC_IN_GLOBAL
+   publish_mac_to_global_page("ethaddr", 0);
+#endif /* CONFIG_STORE_MAC_IN_GLOBAL */
+
+#ifdef CONFIG_ETH1ADDR_IN_GLOBAL
+   publish_mac_to_global_page("eth1addr", 1);
+#endif /* CONFIG_ETH1ADDR_IN_GLOBAL */
+}
+
+void publish_mac_to_global_page(const char *env_var, int mac)
+{
+   uchar mac_id[6];
+
+   if (mac > 1)
+   return;
+
+   if (!(strcmp(env_var, "ethaddr") || strcmp(env_var, "eth1addr")))
+   return;
+
+   eth_env_get_enetaddr(env_var, mac_id);
+
+   global_page->mac_entry[mac].enet_id = mac;
+   global_page->mac_entry[mac].valid = 1;
+   memcpy(global_page->mac_entry[mac].mac, mac_id, 6);
 }
diff --git a/configs/cl-som-imx7_nt_defconfig b/configs/cl-som-imx7_nt_defconfig
index 4fe8233f0f..048621874c 100644
--- a/configs/cl-som-imx7_nt_defconfig
+++ b/configs/cl-som-imx7_nt_defconfig
@@ -77,4 +77,6 @@ CONFIG_MXC_USB_OTG_HACTIVE=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
+CONFIG_GLOBAL_PAGE=y
+CONFIG_STORE_MAC_IN_GLOBAL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/mx6cuboxi_nt_defconfig b/configs/mx6cuboxi_nt_defconfig
index 087569d2e9..b29084012f 100644
--- a/configs/mx6cuboxi_nt_defconfig
+++ b/configs/mx6cuboxi_nt_defconfig
@@ -59,4 +59,6 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_VIDEO=y
+CONFIG_GLOBAL_PAGE=y
+CONFIG_STORE_MAC_IN_GLOBAL=y
 CONFIG_OF_LIBFDT=y
\ No newline at end of file
diff --git a/configs/mx6sabresd_nt_defconfig b/configs/mx6sabresd_nt_defconfig
index 9d858a4418..47c6568e60 100644
--- a/configs/mx6sabresd_nt_defconfig
+++ b/configs/mx6sabresd_nt_defconfig
@@ -55,4 +55,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_USB=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_VIDEO=y
+CONFIG_GLOBAL_PAGE=y
+CONFIG_STORE_MAC_IN_GLOBAL=y
 CONFIG_OF_LIBFDT=y
\ No newline at end of file
diff --git a/configs/udoo_neo_nt_defconfig b/configs/udoo_neo_nt_defconfig
index d5123369ca..1be3180382 100644
--- a/configs/udoo_neo_nt_defconfig
+++ b/configs/udoo_neo_nt_defconfig
@@ -52,4 +52,6 @@ CONFIG_SYS_L2CACHE_OFF=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_PHY_MICREL=y
+CONFIG_GLOBAL_PAGE=y
+CONFIG_STORE_MAC_IN_GLOBAL=y
 CONFIG_OF_LIBFDT=y
\ No newline at end of file
diff --git a/include/global_page.h b/include/global_page.h
index a9ee6b67ad..2ba291019a 100644
--- a/include/global_page.h
+++ b/include/global_page.h
@@ -14,11 +14,19 @@ struct global_page_header {
u8 reserved[3];
 } __packed;
 
+struct global_mac_entry {
+   u8 enet_id;
+   u8 valid;
+   u8 mac[6];
+} __packed;
+
 struct imx_global_page {
struct global_page_header header;
+   struct global_mac_entry mac_entry[2];
 } 

[U-Boot] [PATCH 10/11] imx: Reserve a global page in memory to pass configuration to UEFI

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch is to enable U-Boot to pass configuration information
available during U-Boot Proper into a subsequent OS. This is required
for Windows because it lacks device tree support.

When CONFIG_GLOBAL_PAGE and CONFIG_UEFI_BOOT are set on an i.MX6 or
i.MX7 platform the go command will initialize a 4k page at a hardcoded
offset to zero. Then it will set a signature and revision number at the
start of the page so the consumer of the configuration can verify that
the page has been initialized to the expected format.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/mach-imx/Kconfig   |  7 +++
 arch/arm/mach-imx/Makefile  |  1 +
 arch/arm/mach-imx/boot.c|  6 ++
 arch/arm/mach-imx/global_page.c | 28 
 include/configs/mx6_common.h| 11 +++
 include/configs/mx7_common.h|  5 +
 include/global_page.h   | 24 
 7 files changed, 82 insertions(+)
 create mode 100644 arch/arm/mach-imx/global_page.c
 create mode 100644 include/global_page.h

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 3aec89d440..c88fa2ca1b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -78,3 +78,10 @@ config NXP_BOARD_REVISION
  NXP boards based on i.MX6/7 contain the board revision information
  stored in the fuses. Select this option if you want to be able to
  retrieve the board revision information.
+
+config GLOBAL_PAGE
+   bool "Enable global 4K page for configuration sharing"
+   default n
+   help
+ This option creates a global 4K page to store U-Boot environment data
+ to pass to another environment such as UEFI or Windows.
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index a81af51f03..be095d71a2 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_SATA) += sata.o
 obj-$(CONFIG_SECURE_BOOT)+= hab.o
 obj-$(CONFIG_SYSCOUNTER_TIMER) += syscounter.o
 obj-$(CONFIG_UEFI_BOOT) += boot.o
+obj-$(CONFIG_GLOBAL_PAGE) += global_page.o
 endif
 ifeq ($(SOC),$(filter $(SOC),mx7ulp))
 obj-y  += cache.o
diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c
index 457a323fa2..2dbde8d8ee 100644
--- a/arch/arm/mach-imx/boot.c
+++ b/arch/arm/mach-imx/boot.c
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -12,6 +13,11 @@ DECLARE_GLOBAL_DATA_PTR;
 unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
 char * const argv[])
 {
+#ifdef CONFIG_GLOBAL_PAGE
+   init_global_page();
+   publish_to_global_page();
+#endif
+
cleanup_before_linux();
 
return entry(argc, argv);
diff --git a/arch/arm/mach-imx/global_page.c b/arch/arm/mach-imx/global_page.c
new file mode 100644
index 00..139e18f4bc
--- /dev/null
+++ b/arch/arm/mach-imx/global_page.c
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct imx_global_page *global_page =
+   (struct imx_global_page *)GLOBAL_PAGE_BASE_ADDRESS;
+
+void init_global_page(void)
+{
+   /* Clear global page */
+   memset(global_page, 0, 0x1000);
+
+   /* Set signature to 'GLBL' */
+   global_page->header.signature = 0x474c424c;
+
+   /* Set revision */
+   global_page->header.revision = 0;
+}
+
+void publish_to_global_page(void)
+{
+}
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 756db4da61..6571787e50 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -74,4 +74,15 @@
 #define CONFIG_SYS_NORMAL_WORLD
 #endif
 
+/* Define global page address */
+#if defined(CONFIG_GLOBAL_PAGE)
+#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
+   defined(CONFIG_MX6SX) || \
+   defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
+#define GLOBAL_PAGE_BASE_ADDRESS 0x82003000
+#else
+#define GLOBAL_PAGE_BASE_ADDRESS 0x10817000
+#endif
+#endif
+
 #endif
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 4864df5108..a26805e93c 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -63,4 +63,9 @@
 #define CONFIG_SYS_NORMAL_WORLD
 #endif
 
+/* Define global page address */
+#if defined(CONFIG_GLOBAL_PAGE)
+#define GLOBAL_PAGE_BASE_ADDRESS 0x82003000
+#endif
+
 #endif
diff --git a/include/global_page.h b/include/global_page.h
new file mode 100644
index 00..a9ee6b67ad
--- /dev/null
+++ b/include/global_page.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+*/
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+#ifndef _GLOBAL_PAGE_H
+#define _GLOBAL_PAGE_H
+
+#include 
+
+struct global_page_header {
+   u32 signature;
+   u8 revision;
+   u8 reserved[3];
+} __packed;
+
+struct imx_global_page {
+   struct 

[U-Boot] [PATCH 02/11] arm: Allow U-Boot Proper to run in normal world

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

In order to minimize the surface area of secure world code, the i.MX
Windows 10 IoT Core boot flow uses SPL to jump into OP-TEE as soon as
possible. Once OP-TEE has locked down resources it returns into the
entry point U-Boot Proper in normal world.

The CONFIG_SYS_NORMAL_WORLD Kconfig option has been added so that
segments of code with a dependency on secure world are built into SPL
and selectively omitted from the U-Boot Proper built for normal world.
This is only enabled when the CONFIG_SPL_OPTEE_BOOT Kconfig option is
set. CONFIG_SPL_OPTEE_BOOT is added in the next patch in this series.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Tom Rini 
---
 arch/arm/cpu/armv7/Kconfig |  7 +++
 arch/arm/cpu/armv7/start.S | 11 ++-
 arch/arm/mach-imx/mx7/soc.c|  7 +--
 arch/arm/mach-imx/syscounter.c |  2 ++
 include/configs/mx6_common.h   |  5 +
 include/configs/mx7_common.h   |  5 +
 6 files changed, 30 insertions(+), 7 deletions(-)

diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 37a0be932e..21d68ccb67 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -58,4 +58,11 @@ config ARMV7_LPAE
Say Y here to use the long descriptor page table format. This is
required if U-Boot runs in HYP mode.
 
+config SYS_NORMAL_WORLD
+   bool "An internal build option that tells code that it is running in 
normal world"
+   default n
+   help
+ This option is set internally by headers if the code being
+ compiled must run in normal world.
+
 endif
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index c996525f86..14612fd0fe 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -168,30 +168,31 @@ ENTRY(cpu_init_cp15)
mcr p15, 0, r0, c1, c0, 0   @ write system control register
 #endif
 
-#if (defined(CONFIG_ARM_ERRATA_742230) || defined(CONFIG_ARM_ERRATA_794072))
+#if (defined(CONFIG_ARM_ERRATA_742230) || defined(CONFIG_ARM_ERRATA_794072)) \
+   && !defined(CONFIG_SYS_NORMAL_WORLD)
mrc p15, 0, r0, c15, c0, 1  @ read diagnostic register
orr r0, r0, #1 << 4 @ set bit #4
mcr p15, 0, r0, c15, c0, 1  @ write diagnostic register
 #endif
 
-#ifdef CONFIG_ARM_ERRATA_743622
+#if defined(CONFIG_ARM_ERRATA_743622) && !defined(CONFIG_SYS_NORMAL_WORLD)
mrc p15, 0, r0, c15, c0, 1  @ read diagnostic register
orr r0, r0, #1 << 6 @ set bit #6
mcr p15, 0, r0, c15, c0, 1  @ write diagnostic register
 #endif
 
-#ifdef CONFIG_ARM_ERRATA_751472
+#if defined(CONFIG_ARM_ERRATA_751472) && !defined(CONFIG_SYS_NORMAL_WORLD)
mrc p15, 0, r0, c15, c0, 1  @ read diagnostic register
orr r0, r0, #1 << 11@ set bit #11
mcr p15, 0, r0, c15, c0, 1  @ write diagnostic register
 #endif
-#ifdef CONFIG_ARM_ERRATA_761320
+#if defined(CONFIG_ARM_ERRATA_761320) && !defined(CONFIG_SYS_NORMAL_WORLD)
mrc p15, 0, r0, c15, c0, 1  @ read diagnostic register
orr r0, r0, #1 << 21@ set bit #21
mcr p15, 0, r0, c15, c0, 1  @ write diagnostic register
 #endif
 
-#ifdef CONFIG_ARM_ERRATA_845369
+#if defined(CONFIG_ARM_ERRATA_845369) && !defined(CONFIG_SYS_NORMAL_WORLD)
mrc p15, 0, r0, c15, c0, 1  @ read diagnostic register
orr r0, r0, #1 << 22@ set bit #22
mcr p15, 0, r0, c15, c0, 1  @ write diagnostic register
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 2aca24bbb0..cc987f2599 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -135,7 +135,7 @@ u32 __weak get_board_rev(void)
 #endif
 
 /* enable all periherial can be accessed in nosec mode */
-static void init_csu(void)
+static void __maybe_unused init_csu(void)
 {
int i = 0;
for (i = 0; i < CSU_NUM_REGS; i++)
@@ -164,7 +164,10 @@ int arch_cpu_init(void)
 {
init_aips();
 
+#ifndef CONFIG_SYS_NORMAL_WORLD
init_csu();
+#endif
+
/* Disable PDE bit of WMCR register */
imx_wdog_disable_powerdown();
 
@@ -194,7 +197,7 @@ int arch_misc_init(void)
env_set("soc", "imx7s");
 #endif
 
-#ifdef CONFIG_FSL_CAAM
+#if defined(CONFIG_FSL_CAAM) && !defined(CONFIG_SYS_NORMAL_WORLD)
sec_init();
 #endif
 
diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c
index 676bb3caa9..cfd82236f8 100644
--- a/arch/arm/mach-imx/syscounter.c
+++ b/arch/arm/mach-imx/syscounter.c
@@ -57,6 +57,7 @@ static inline unsigned long long us_to_tick(unsigned long 
long usec)
 
 int timer_init(void)
 {
+#if !defined(CONFIG_SYS_NORMAL_WORLD)
struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
unsigned long val, freq;
 
@@ -70,6 +71,7 @@ int timer_init(void)
val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | 

[U-Boot] [PATCH 05/11] mx6sabresd: Add Windows boot support for iMX6 Sabre

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch adds a new bootable configuration for Windows 10 IoT Core on
the i.MX6 Quad Sabre board.

Add a new device tree sources file for imx6qdl-sdb. This is not
required by Windows or UEFI but the build system requires a device
tree when building SPL with flat image tree support.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/dts/Makefile   |  1 +
 arch/arm/dts/imx6qdl-sdb.dts|  8 +
 board/freescale/mx6sabresd/MAINTAINERS  |  2 ++
 board/freescale/mx6sabresd/mx6sabresd.c |  9 -
 configs/mx6sabresd_nt_defconfig | 58 +
 include/configs/mx6sabre_common.h   | 10 ++
 6 files changed, 87 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imx6qdl-sdb.dts
 create mode 100644 configs/mx6sabresd_nt_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index baad87d4d7..7d90bd39f3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -410,6 +410,7 @@ dtb-$(CONFIG_MX6QDL) += \
imx6dl-icore-mipi.dtb \
imx6dl-icore-rqs.dtb \
imx6dl-mamoj.dtb \
+   imx6qdl-sdb.dtb \
imx6q-cm-fx6.dtb \
imx6q-icore.dtb \
imx6q-icore-mipi.dtb \
diff --git a/arch/arm/dts/imx6qdl-sdb.dts b/arch/arm/dts/imx6qdl-sdb.dts
new file mode 100644
index 00..907f44859f
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-sdb.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
diff --git a/board/freescale/mx6sabresd/MAINTAINERS 
b/board/freescale/mx6sabresd/MAINTAINERS
index 95752619e7..bc747e7d2a 100644
--- a/board/freescale/mx6sabresd/MAINTAINERS
+++ b/board/freescale/mx6sabresd/MAINTAINERS
@@ -4,3 +4,5 @@ S:  Maintained
 F: board/freescale/mx6sabresd/
 F: include/configs/mx6sabresd.h
 F: configs/mx6sabresd_defconfig
+F: configs/mx6sabresd_nt_defconfig
+F: arch/arm/dts/imx6qdl-sdb.dts
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index 0183ede148..9eae7140cf 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -229,7 +229,14 @@ static struct i2c_pads_info mx6dl_i2c_pad_info1 = {
}
 };
 
-static void setup_spi(void)
+#if defined(CONFIG_MULTI_DTB_FIT) || defined(CONFIG_SPL_LOAD_FIT)
+int board_fit_config_name_match(const char *name)
+{
+   return 0;
+}
+#endif
+
+static void __maybe_unused setup_spi(void)
 {
SETUP_IOMUX_PADS(ecspi1_pads);
 }
diff --git a/configs/mx6sabresd_nt_defconfig b/configs/mx6sabresd_nt_defconfig
new file mode 100644
index 00..9d858a4418
--- /dev/null
+++ b/configs/mx6sabresd_nt_defconfig
@@ -0,0 +1,58 @@
+CONFIG_ARCH_MX6=y
+CONFIG_ARM=y
+CONFIG_SYS_TEXT_BASE=0x1780
+CONFIG_TARGET_MX6SABRESD=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6qdl-sdb"
+CONFIG_OF_CONTROL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_OPTEE_BOOT=y
+CONFIG_BOOTDELAY=-2
+CONFIG_UEFI_BOOT=y
+CONFIG_UEFI_LOAD_ADDR=0x1082
+CONFIG_EFI_LOADER=n
+CONFIG_CMD_BOOTD=n
+CONFIG_CMD_BOOTM=n
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_FAT=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=n
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SPL=n
+CONFIG_CMD_USB=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CONS_INDEX=1
+CONFIG_SECURE_BOOT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=n
+CONFIG_SPI_FLASH_STMICRO=n
+CONFIG_SPL=y
+CONFIG_SPL_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LEGACY_IMAGE_SUPPORT=n
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_SPL_DM=n
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_USE_ARCH_MEMCPY=n
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-imx/u-boot-spl-sram.lds"
+CONFIG_SYS_DCACHE_OFF=n
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_SYS_ICACHE_OFF=n
+CONFIG_SYS_L2CACHE_OFF=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USB=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_VIDEO=y
+CONFIG_OF_LIBFDT=y
\ No newline at end of file
diff --git a/include/configs/mx6sabre_common.h 
b/include/configs/mx6sabre_common.h
index 99ecc412a6..56186f323c 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -56,6 +56,15 @@
 #define EMMC_ENV ""
 #endif
 
+#ifdef CONFIG_UEFI_BOOT
+#include 
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+   "mmcdev=1\0" \
+   BOOTENV
+
+#else
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
@@ -166,6 +175,7 @@
"fi; " \
"fi; " \
"else run netboot; fi"
+#endif /* CONFIG_UEFI_BOOT */
 
 #define CONFIG_ARP_TIMEOUT 200UL
 
-- 
2.16.2.gvfs.1.33.gf5370f1


[U-Boot] [PATCH 06/11] mx7dsabresd: Add Windows boot support for iMX7 Sabre

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch adds a new bootable configuration for Windows 10 IoT Core on
the i.MX7 Dual Sabre board.

It enables SPL on the i.MX7 Sabre in order to support the FIT load of
OP-TEE and U-Boot proper.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Adrian Alonso 
---
 arch/arm/mach-imx/mx7/Kconfig |   1 +
 board/freescale/mx7dsabresd/MAINTAINERS   |   1 +
 board/freescale/mx7dsabresd/mx7dsabresd.c |  79 +++
 configs/mx7dsabresd_nt_defconfig  | 102 ++
 drivers/gpio/Makefile |   3 +
 drivers/pinctrl/nxp/pinctrl-imx7.c|   4 +-
 include/configs/mx7dsabresd.h |  10 +++
 7 files changed, 199 insertions(+), 1 deletion(-)
 create mode 100644 configs/mx7dsabresd_nt_defconfig

diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig
index 2a3db860bb..0aaf246a79 100644
--- a/arch/arm/mach-imx/mx7/Kconfig
+++ b/arch/arm/mach-imx/mx7/Kconfig
@@ -33,6 +33,7 @@ config TARGET_MX7DSABRESD
select MX7D
select DM
select DM_THERMAL
+   select SUPPORT_SPL
 
 config TARGET_PICO_IMX7D
bool "pico-imx7d"
diff --git a/board/freescale/mx7dsabresd/MAINTAINERS 
b/board/freescale/mx7dsabresd/MAINTAINERS
index b96642a568..1fc9b2a491 100644
--- a/board/freescale/mx7dsabresd/MAINTAINERS
+++ b/board/freescale/mx7dsabresd/MAINTAINERS
@@ -4,3 +4,4 @@ S:  Maintained
 F: board/freescale/mx7dsabresd
 F: include/configs/mx7dsabresd.h
 F: configs/mx7dsabresd_defconfig
+F: configs/mx7dsabresd_nt_defconfig
\ No newline at end of file
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c 
b/board/freescale/mx7dsabresd/mx7dsabresd.c
index 90e2d1a92a..db34609caf 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -46,6 +46,9 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM)
 
+#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
+   PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
+
 #ifdef CONFIG_MXC_SPI
 static iomux_v3_cfg_t const ecspi3_pads[] = {
 MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
@@ -363,6 +366,75 @@ int power_init_board(void)
 }
 #endif
 
+#ifdef CONFIG_SPL_BUILD
+#include 
+
+#if !CONFIG_IS_ENABLED(DM_MMC)
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+   MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+
+   MX7D_PAD_SD1_CD_B__GPIO5_IO0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_WP__GPIO5_IO1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_RESET_B__SD1_RESET_B | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+#define USDHC1_CD IMX_GPIO_NR(5, 0)
+#define USDHC1_WP IMX_GPIO_NR(5, 1)
+
+int board_mmc_init(bd_t *bis)
+{
+   struct fsl_esdhc_cfg usdhc_cfg = {};
+
+   imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
+   gpio_direction_input(USDHC1_CD);
+   gpio_direction_input(USDHC1_WP);
+
+   usdhc_cfg.esdhc_base = USDHC1_BASE_ADDR;
+   usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+   usdhc_cfg.max_bus_width = 4;
+
+   return fsl_esdhc_initialize(bis, _cfg);
+}
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+   struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+   int ret = 0;
+
+   switch (cfg->esdhc_base) {
+   case USDHC1_BASE_ADDR:
+   ret = !gpio_get_value(USDHC1_CD);
+   break;
+   }
+
+   return ret;
+}
+#endif
+
+void board_init_f(ulong dummy)
+{
+   /* Clear the BSS. */
+   memset(__bss_start, 0, __bss_end - __bss_start);
+
+   setup_iomux_uart();
+
+   /* setup AIPS and disable watchdog */
+   arch_cpu_init();
+
+   /* setup GP timer */
+   timer_init();
+
+   preloader_console_init();
+
+   /* No need to initialize DRAM; handled by DCD script */
+}
+#endif
+
 int board_late_init(void)
 {
struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
@@ -393,3 +465,10 @@ int checkboard(void)
 
return 0;
 }
+
+#if defined(CONFIG_MULTI_DTB_FIT) || defined(CONFIG_SPL_LOAD_FIT)
+int board_fit_config_name_match(const char *name)
+{
+   return 0;
+}
+#endif
diff --git a/configs/mx7dsabresd_nt_defconfig b/configs/mx7dsabresd_nt_defconfig
new file mode 100644
index 00..9bb0fe1b54
--- /dev/null
+++ b/configs/mx7dsabresd_nt_defconfig
@@ -0,0 +1,102 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX7=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_SYS_TEXT_BASE=0x8780
+CONFIG_TARGET_MX7DSABRESD=y

[U-Boot] [PATCH 04/11] spl: imx: Add optional lds to keep SPL entirely in on-chip RAM

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch is part of the i.MX Windows 10 IoT Core boot flow.

It adds a modified linker script for SPL to keep all segments in
on-chip ram. This is to harden the device against potential leaks of
device secrets by keeping them out of DRAM.

Additionally if CONFIG_SYS_SPL_MALLOC_START is defined, it will
override the CONFIG_SPL_SYS_MALLOC_SIMPLE and allocate space in DRAM
instead of on-chip ram. This patch prevents the definition of those
values for i.MX6 and i.MX7 SPL if CONFIG_OPTEE_SPL_BOOT is selected.

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/mach-imx/u-boot-spl-sram.lds | 59 +++
 include/configs/imx6_spl.h|  2 ++
 include/configs/imx7_spl.h|  2 ++
 3 files changed, 63 insertions(+)
 create mode 100644 arch/arm/mach-imx/u-boot-spl-sram.lds

diff --git a/arch/arm/mach-imx/u-boot-spl-sram.lds 
b/arch/arm/mach-imx/u-boot-spl-sram.lds
new file mode 100644
index 00..dfbb4aef5d
--- /dev/null
+++ b/arch/arm/mach-imx/u-boot-spl-sram.lds
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, 
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, 
+ * Aneesh V 
+ *
+ * (C) Copyright 2018 Microsoft Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
+   LENGTH = CONFIG_SPL_MAX_SIZE }
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+   .text  :
+   {
+   __start = .;
+   *(.vectors)
+   arch/arm/cpu/armv7/start.o  (.text*)
+   *(.text*)
+   } >.sram
+
+   . = ALIGN(4);
+   .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
+
+   . = ALIGN(4);
+   .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
+
+   . = ALIGN(4);
+   .u_boot_list : {
+   KEEP(*(SORT(.u_boot_list*)));
+   } >.sram
+
+   . = ALIGN(4);
+   __image_copy_end = .;
+
+   .end :
+   {
+   *(.__end)
+   }
+
+   _image_binary_end = .;
+
+   .bss :
+   {
+   . = ALIGN(4);
+   __bss_start = .;
+   *(.bss*)
+   . = ALIGN(4);
+   __bss_end = .;
+   } >.sram
+}
diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
index 720ff045a7..4088e8a936 100644
--- a/include/configs/imx6_spl.h
+++ b/include/configs/imx6_spl.h
@@ -51,6 +51,7 @@
 # endif
 #endif
 
+#ifndef CONFIG_OPTEE_SPL_BOOT
 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
 #define CONFIG_SPL_BSS_START_ADDR  0x8820
@@ -63,6 +64,7 @@
 #define CONFIG_SYS_SPL_MALLOC_START0x1830
 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x10/* 1 MB */
 #endif
+#endif /* !CONFIG_OPTEE_SPL_BOOT */
 #endif
 
 #endif
diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h
index 1eb6cd894d..5dd4aed652 100644
--- a/include/configs/imx7_spl.h
+++ b/include/configs/imx7_spl.h
@@ -46,10 +46,12 @@
 # endif
 #endif
 
+#ifndef CONFIG_OPTEE_SPL_BOOT
 #define CONFIG_SPL_BSS_START_ADDR  0x8820
 #define CONFIG_SPL_BSS_MAX_SIZE0x10/* 1 MB */
 #define CONFIG_SYS_SPL_MALLOC_START0x8830
 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x10/* 1 MB */
+#endif /* !CONFIG_OPTEE_SPL_BOOT */
 
 #endif /* CONFIG_SPL */
 
-- 
2.16.2.gvfs.1.33.gf5370f1

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[U-Boot] [PATCH 01/11] imx: Add bootcmd to load and run UEFI from mmc

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch enables i.MX platforms to easily add a boot script to their
U-Boot Proper environment to automatically load and execute an EFI
firmware from the first FAT partition of an MMC device.

This is a portion of enabling the Windows 10 IoT Core boot path.

The go command is overridden when CONFIG_UEFI_BOOT is specified. This
new go will perform a cache flush/disable, disable interrupts, then
jump to the address where UEFI was loaded.

This patch adds two new Kconfig options:
CONFIG_UEFI_BOOT: Selects the UEFI bootcmd and overrides go to flush
caches and disable interrupts.
CONFIG_UEFI_LOAD_ADDR: Specifies the load address for the UEFI image

Signed-off-by: Henry Beberman 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Tom Rini 
---
 arch/arm/mach-imx/Makefile|  1 +
 arch/arm/mach-imx/boot.c  | 19 +++
 common/Kconfig| 17 +
 include/config_uefi_bootcmd.h | 29 +
 4 files changed, 66 insertions(+)
 create mode 100644 arch/arm/mach-imx/boot.c
 create mode 100644 include/config_uefi_bootcmd.h

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 733c308670..a81af51f03 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -42,6 +42,7 @@ endif
 obj-$(CONFIG_SATA) += sata.o
 obj-$(CONFIG_SECURE_BOOT)+= hab.o
 obj-$(CONFIG_SYSCOUNTER_TIMER) += syscounter.o
+obj-$(CONFIG_UEFI_BOOT) += boot.o
 endif
 ifeq ($(SOC),$(filter $(SOC),mx7ulp))
 obj-y  += cache.o
diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c
new file mode 100644
index 00..457a323fa2
--- /dev/null
+++ b/arch/arm/mach-imx/boot.c
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_UEFI_BOOT)
+unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
+char * const argv[])
+{
+   cleanup_before_linux();
+
+   return entry(argc, argv);
+}
+#endif /* CONFIG_UEFI_BOOT */
diff --git a/common/Kconfig b/common/Kconfig
index 4c7a1a9af8..35362b629c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -217,6 +217,23 @@ config BOOTCOMMAND
  This is the string of commands that will be used as bootcmd and if
  AUTOBOOT is set, automatically run.
 
+config UEFI_BOOT
+   bool "Boot a UEFI firmware loaded from the first FAT partition on the 
mmc"
+   default n
+   help
+ Override the CONFIG_BOOTCOMMAND to load a UEFI firmware image from the
+ first FAT partition on the mmc. Override the go command to make it 
disable
+ interrupts and flush the cache before jumping to the specified 
address.
+
+config UEFI_LOAD_ADDR
+   hex "Load address for the UEFI image"
+   depends on UEFI_BOOT
+   help
+ CONFIG_UEFI_BOOT uses this as the address to load the UEFI image.
+ The uefi_bootcmd script in the environment will fatload efi from the 
mmc
+ to this location, then use an overridden go command to disable caches 
and
+ interrupts then jump to this location.
+
 menu "Console"
 
 config MENU
diff --git a/include/config_uefi_bootcmd.h b/include/config_uefi_bootcmd.h
new file mode 100644
index 00..03903abf8f
--- /dev/null
+++ b/include/config_uefi_bootcmd.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Microsoft Corporation
+ */
+
+#ifndef _CONFIG_UEFI_BOOTCMD_H
+#define _CONFIG_UEFI_BOOTCMD_H
+
+#define BOOTENV \
+   "uefi_image_name=imxboard_efi.fd\0" \
+   "uefi_addr=" __stringify(CONFIG_UEFI_LOAD_ADDR) "\0" \
+   "uefi_bootcmd=" \
+   "part list mmc ${mmcdev} -bootable devplist; " \
+   "env exists devplist || setenv devplist 1; " \
+   "for bootpart in ${devplist}; do " \
+   "if fatload mmc ${mmcdev}:${bootpart} " \
+   "${uefi_addr} ${uefi_image_name}; then " \
+   "echo \"Jumping to ${uefi_image_name} at " \
+   "${uefi_addr}\"; " \
+   "go ${uefi_addr}; " \
+   "fi; " \
+   "done; " \
+   "echo \"Could not find ${uefi_image_name} on mmc ${mmcdev}\";\0"
+
+#ifdef CONFIG_UEFI_BOOT
+#define CONFIG_BOOTCOMMAND "run uefi_bootcmd"
+#endif
+
+#endif  /* _CONFIG_UEFI_BOOTCMD_H */
-- 
2.16.2.gvfs.1.33.gf5370f1

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[U-Boot] [PATCH 00/11] Enable Windows 10 IoT Core on i.MX6 and i.MX7

2018-07-13 Thread Henry Beberman
From: Henry Beberman 

This patch series is a collaboration between Microsoft and NXP to
enable Windows 10 IoT Core on NXP's iMX6 and iMX7 platforms.

The series contains reference configurations to enable Windows boot on the 
following
platforms: mx6sabresd, mx7dsabresd, mx6cuboxi, udoo_neo, and cl-som-imx7

These patches enable the following Windows boot flow:
1) U-Boot SPL loads from the MMC into on-chip RAM.
2) SPL loads a Flat Image Tree containing the OP-TEE runtime and U-Boot Proper.
3) SPL disables caches/interrupts and jumps into OP-TEE.
4) OP-TEE initializes then returns to the entry point of U-Boot
Proper in normal mode. OP-TEE is later used as a runtime for Trusted 
Applications from within Windows.
5) U-Boot Proper initializes the platform bypassing several actions
that would require secure world access.
6) The U-Boot Proper bootcmd loads a UEFI firmware binary from the
first FAT partition of the MMC into memory.
7) An overridden go command will stash the platform MAC address
from the U-Boot env into a page of memory that is preserved for UEFI.
8) The overridden go command will disable caches and interrupts then
jump into UEFI.
9) UEFI initializes the platform further and boots Windows from MMC.

Henry Beberman (11):
  imx: Add bootcmd to load and run UEFI from mmc
  arm: Allow U-Boot Proper to run in normal world
  spl: Add FIT boot into OP-TEE then U-Boot proper
  spl: imx: Add optional lds to keep SPL entirely in on-chip RAM
  mx6sabresd: nt: Add Windows boot support for iMX6 Sabre
  mx7dsabresd: Add Windows boot support for iMX7 Sabre
  mx6cuboxi: Add Windows boot support for mx6cuboxi
  udoo_neo: Add Windows boot support for UDOO Neo
  cl-som-imx7: Add Windows boot support for cl-som-imx7
  imx: Reserve a global page in memory to pass configuration to UEFI
  imx: Add MAC addresses to global page to pass MAC into UEFI

Cc:  Stefano Babic 
Cc:  Fabio Estevam 
Cc:  Tom Rini 
Cc:  Robert Solomon 
Cc:  Chirag Shah 
Cc:  Robert Oshana 
Cc:  Patrick Stilwell 

 arch/arm/cpu/armv7/Kconfig|   7 ++
 arch/arm/cpu/armv7/Makefile   |   1 +
 arch/arm/cpu/armv7/optee_jump.S   |  31 +
 arch/arm/cpu/armv7/start.S|  11 ++--
 arch/arm/dts/Makefile |   4 ++
 arch/arm/dts/imx6qdl-mx6cuboxi.dts|   8 +++
 arch/arm/dts/imx6qdl-sdb.dts  |   8 +++
 arch/arm/dts/imx6sx-udoo-neo.dts  |   8 +++
 arch/arm/dts/imx7d-cl-som-imx7.dts|   8 +++
 arch/arm/lib/spl.c|  16 +
 arch/arm/mach-imx/Kconfig |  23 +++
 arch/arm/mach-imx/Makefile|   2 +
 arch/arm/mach-imx/boot.c  |  25 
 arch/arm/mach-imx/global_page.c   |  52 +++
 arch/arm/mach-imx/mx7/Kconfig |   1 +
 arch/arm/mach-imx/mx7/soc.c   |   7 +-
 arch/arm/mach-imx/syscounter.c|   2 +
 arch/arm/mach-imx/u-boot-spl-sram.lds |  59 +
 board/compulab/cl-som-imx7/MAINTAINERS|   2 +
 board/compulab/cl-som-imx7/cl-som-imx7.c  |  47 +-
 board/compulab/cl-som-imx7/spl.c  |   7 ++
 board/freescale/mx6sabresd/MAINTAINERS|   2 +
 board/freescale/mx6sabresd/mx6sabresd.c   |   9 ++-
 board/freescale/mx7dsabresd/MAINTAINERS   |   1 +
 board/freescale/mx7dsabresd/mx7dsabresd.c |  79 +++
 board/solidrun/mx6cuboxi/MAINTAINERS  |   2 +
 board/solidrun/mx6cuboxi/mx6cuboxi.c  |   7 ++
 board/udoo/neo/MAINTAINERS|   2 +
 board/udoo/neo/neo.c  |   7 ++
 common/Kconfig|  17 +
 common/spl/Kconfig|   9 +++
 common/spl/spl.c  |   6 ++
 configs/cl-som-imx7_nt_defconfig  |  82 
 configs/mx6cuboxi_nt_defconfig|  64 +++
 configs/mx6sabresd_nt_defconfig   |  60 ++
 configs/mx7dsabresd_nt_defconfig  | 102 ++
 configs/udoo_neo_nt_defconfig |  57 +
 drivers/gpio/Makefile |   3 +
 drivers/pinctrl/nxp/pinctrl-imx7.c|   4 +-
 include/config_uefi_bootcmd.h |  29 +
 include/configs/cl-som-imx7.h |  18 +-
 include/configs/imx6_spl.h|   2 +
 include/configs/imx7_spl.h|   2 +
 include/configs/mx6_common.h  |  16 +
 include/configs/mx6cuboxi.h   |   8 +++
 include/configs/mx6sabre_common.h |  10 +++
 include/configs/mx7_common.h  |  10 +++
 include/configs/mx7dsabresd.h |  10 +++
 include/configs/udoo_neo.h|   8 +++
 include/global_page.h |  32 ++
 include/spl.h |  21 ++
 51 files changed, 995 insertions(+), 13 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/optee_jump.S
 create mode 100644 

[U-Boot] EBBR v0.6 Release Announcement

2018-07-13 Thread Grant Likely
I'm pleased to announce the release of version 0.6 of the Embedded Base 
Boot Requirements (EBBR) specification.


https://github.com/ARM-software/ebbr/releases/tag/v0.6

EBBR is a new specification defining a standard boot environment 
suitable for full feature operating systems running on embedded platforms...


Well, it will when it's finished.

It is well know that firmware for embedded systems is a fragmented area 
with each platform behaving in subtly incompatible ways. It is also 
completely different from the firmware interface used on general purpose 
desktops and servers. For OSes, this makes supporting more than a 
handful of platforms a nearly impossible affair. EBBR aims to solve this 
problem by defining a standard boot interface that can easily be 
implemented using either U-Boot or Tianocore, and is based on the same 
UEFI specification used on general purpose computers.


By adopting EBBR, platform vendors can reduce the amount of engineering 
effort required to support their products and make them easier to use. 
As EBBR is being developed in conjunction with the U-Boot, Tianocore, 
and Trusted Firmware projects, most of the functionality required is 
already implemented and ready to be used if one uses an up to date 
release of U-Boot or Tianocore.


For OS vendors, this makes far easier to support embedded platforms 
because they don't need to tailor the boot process for each platform. 
The same boot infrastructure works on both desktop/servers and on EBBR 
compliant embedded platforms.


And finally, for end users, working with an EBBR compliant platform 
means they can boot the OS of their choice without needing to learn low 
level details of the platform firmware.


This v0.6 release of EBBR is a pre-release document. The contents are 
not final. The purpose of this release is to raise awareness of the EBBR 
project, and to solicit feedback on the current draft. Please do read 
and provide comments on the boot-architect...@lists.linaro.org mailing list.


The plan is to release v1.0 before the end of the 2018.

Thanks to the EBBR committee members who contributed to this release:

  Andreas Färber (SUSE)
  Alex Graf (SUSE)
  Ryan Harkin (Linaro)
  Rob Herring (Linaro)
  Udit Kumar (NXP)
  Leif Lindholm (Linaro)
  Bill Mills (TI)
  Peter Robinson (Red Hat)
  Tom Rini (Konsulko)
  Daniel Thompson (Linaro)
  Dong Wei (Arm)

Sincerely,
Grant Likely, EBBR committee co-chair


Note on U-Boot implementations
--
It is expected that EBBR compliant can be achieved by using a recent 
version of U-Boot with the appropriate configuration options. An 
implementers guide for U-Boot will be written before EBBR v1.0 is released.


There is also work ongoing to get the UEFI Self Certification Test 
running on U-Boot. Once working, this will be a tool for vendors to test 
their platforms for EBBR compliance.


FAQ
---
1. Does EBBR define a new interface?

   No. EBBR builds on the existing UEFI spec by requiring a specific 
subset that can be implemented today using U-Boot, and either Devicetree 
or ACPI.


2. Does EBBR require Devicetree? ACPI?

   EBBR allows platforms to provide either ACPI or Devicetree. Linux 
supports both system description languages equally well, and Devicetree 
is in common use on embedded platforms. As long as the platform supplies 
a system description that can boot a mainline operating system.


   EBBR does not attempt to define a common base standard for 
Devicetree platforms because of the wide variety of platforms needed to 
be supported. The one assumption EBBR does make is that the target 
operating system already has support for the SoC on the platform.


3. Is EBBR only for U-Boot and Linux embedded systems?

   No. While U-Boot+Linux platforms were certainly the primary audience 
when EBBR was first conceived, the spec is very purposefully written to 
be OS-independent. EBBR requires specific interfaces, but those 
interface can be implemented by any firmware project.


   We would absolutely like to have review, feedback and contributions 
from non-Linux, non-U-Boot users.


4. Can I contribute to the EBBR specification?

   Yes. The EBBR source document is on GitHub, and we use the 
boot-architect...@lists.linaro.org mailing list.


   https://github.com/ARM-Software/ebbr
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot


Re: [U-Boot] [PATCH 0/2] dm: Complete CONFIG_BLK migration

2018-07-13 Thread Adam Ford
On Fri, Jul 13, 2018 at 10:43 AM Adam Ford  wrote:
>
> On Fri, Jul 13, 2018 at 10:23 AM Lukasz Majewski  wrote:
> >
> > On Fri, 13 Jul 2018 16:53:53 +0200
> > Marek Vasut  wrote:
> >
> > > On 07/13/2018 03:34 PM, Adam Ford wrote:
> > > > On Fri, Jun 29, 2018 at 3:21 PM Adam Ford 
> > > > wrote:
> > > >>
> > > >> On Fri, Jun 29, 2018 at 2:09 PM Tom Rini 
> > > >> wrote:
> > > >>>
> > > >>> On Thu, Jun 28, 2018 at 09:30:19PM -0500, Derald D. Woods wrote:
> > >  On Thu, Jun 28, 2018 at 10:47:36AM -0500, Adam Ford wrote:
> > > > On Wed, Jun 27, 2018 at 4:41 PM Tom Rini 
> > > > wrote:
> > > >>
> > > >> On Sat, Jun 23, 2018 at 07:59:30AM -0600, Simon Glass wrote:
> > > >>> The time has come to migrate all boards to use CONFIG_BLK.
> > > >>> This series is just a test to see what boards would have to
> > > >>> be removed if we required CONFIG_BLK, as we plan to after the
> > > >>> next release.
> > > >>>
> > > >>> This should help maintainers see what is impacted.
> > > >>>
> > > >>> Hopefully maintainers will be able to convert their boards
> > > >>> over in the next month so we we can avoid having to remove
> > > >>> any boards.
> > > >>>
> > > >>> The goal is to have all boards use driver model. But so far,
> > > >>> we do allow CONFIG_DM to not be defined.
> > > >>>
> > > >>>
> > > >>> For 'Force BLK', here is the buildman output showing failed
> > > >>> boards and the relatively small number of command errors:
> > > >>>
> > > >>> 03: Force BLK
> > > >>>   mips:  +   pic32mzdask
> > > >>>arm:  +   mixtile_loftq colibri_imx6_nospl sniper
> > > >>> omap3_zoom1 tbs2910 Mele_A1000G_quad am335x_igep003x
> > > >>> mx6ul_14x14_evk mk802_a10s am43xx_hs_evm devkit3250
> > > >>> pcm051_rev3 am57xx_hs_evm Empire_electronix_m712 Auxtek-T003
> > > >>> pcm058 zc5202 am335x_shc am335x_shc_ict Hummingbird_A31
> > > >>> vining_2000 am335x_evm_usbspl ot1200_spl igep00x0 Mele_I7
> > > >>> Wobo_i5 r7-tv-dongle liteboard omap3_overo am335x_boneblack
> > > >>> evb-ast2500 warp7 gwventana_gw5904 cairo A13-OLinuXinoM
> > > >>> mccmon6_sd apalis_imx6_nospl_it wandboard birdland_bav335a
> > > >>> colibri_imx7 colibri_imx6 inet_q972 xpress_spl
> > > >>> stm32f429-evaluation udoo_neo igep0032 Mele_M9 A13-OLinuXino
> > > >>> inet98v_rev2 A10s-OLinuXino-M riotboard snapper9260
> > > >>> am43xx_evm pfla02 mx6qsabrelite apalis_imx6_nospl_com
> > > >>> s5p_goni colibri_pxa270 snapper9g20 Yones_Toptech_BS1078_V2
> > > >>> am335x_shc_sdboot_prompt k2g_hs_evm cl-som-imx7
> > > >>> am335x_shc_sdboot vf610twr_nand stm32f469-discovery
> > > >>> am335x_evm_nor mx53cx9020 Empire_electronix_d709 vf610twr
> > > >>> cm_t43 pengwyn stm32f746-disco Sinovoip_BPI_M2
> > > >>> Sinovoip_BPI_M3 Sinlinx_SinA31s pico-imx7d am43xx_evm_rtconly
> > > >>> LicheePi_Zero pcm051_rev1 mccmon6_nor mx6sabreauto
> > > >>> display5_factory am335x_shc_prompt gwventana_nand
> > > >>> Bananapi_M2_Ultra Auxtek-T004 tbs_a711 cm_t335 h8_homlet_v2
> > > >>> Colombus am43xx_evm_usbhost_boot chiliboard am335x_baltos
> > > >>> colibri_vf mx6ul_9x9_evk kp_imx6q_tpc bk4r1 udoo
> > > >>> difrnce_dit4350 am335x_evm_norboot UTOO_P66 iNet_86VS
> > > >>> marsboard MSI_Primo81 apalis_imx6 bananapi_m2_berry
> > > >>> xilinx_zynqmp_r5 birdland_bav335b am43xx_evm_qspiboot
> > > >>> CSQ_CS908 Ampe_A76 kp_imx53 am335x_evm_spiboot
> > > >>> Cubietruck_plus k2g_evm mx6sabresd omap3_logic pepper
> > > >>> colorfly_e708_q1 pcm052 gwventana_emmc am335x_boneblack_vboot
> > > >>> am335x_shc_netboot xpress ot1200 cgtqmx6eval zc5601
> > > >>> devkit8000 dh_imx6 mx6cuboxi am57xx_evm am335x_sl50
> > > >>> q8_a13_tablet sksimx6
> > > >>>
> > > >>> microblaze:  +   microblaze-generic
> > > >>>powerpc:  +   P1010RDB-PA_36BIT_NOR_SECBOOT
> > > >>> BSC9132QDS_SDCARD_DDRCLK100_SECURE
> > > >>> P1010RDB-PB_SPIFLASH_SECBOOT T1024QDS_DDR4_SECURE_BOOT
> > > >>> controlcenterd_36BIT_SDCARD
> > > >>> BSC9132QDS_SDCARD_DDRCLK133_SECURE
> > > >>> P1010RDB-PA_SPIFLASH_SECBOOT BSC9132QDS_NAND_DDRCLK133_SECURE
> > > >>> P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P2041RDB_SECURE_BOOT
> > > >>> P5020DS_NAND_SECURE_BOOT P1010RDB-PB_36BIT_NOR_SECBOOT
> > > >>> BSC9132QDS_NOR_DDRCLK100_SECURE P3041DS_SECURE_BOOT
> > > >>> T1042D4RDB_SECURE_BOOT T1042RDB_SECURE_BOOT
> > > >>> T4240QDS_SECURE_BOOT P1010RDB-PB_36BIT_SPIFLASH_SECBOOT
> > > >>> P1010RDB-PB_NAND_SECBOOT BSC9132QDS_SPIFLASH_DDRCLK100_SECURE
> > > >>> P3041DS_NAND_SECURE_BOOT T4160QDS_SECURE_BOOT
> > > >>> T2080RDB_SECURE_BOOT B4860QDS_SECURE_BOOT P4080DS_SECURE_BOOT
> > > >>> T2080QDS_SECURE_BOOT P5040DS_SECURE_BOOT
> > > >>> P1010RDB-PB_36BIT_NAND_SECBOOT
> > > >>> controlcenterd_36BIT_SDCARD_DEVELOP P1010RDB-PA_NAND_SECBOOT
> > > >>> 

Re: [U-Boot] [PATCH] mtd: nand: denali: Replace the ad-hoc cache management with bouncebuf

2018-07-13 Thread Masahiro Yamada
2018-07-14 3:15 GMT+09:00 Marek Vasut :
> On 07/13/2018 05:09 PM, Masahiro Yamada wrote:
>> 2018-07-13 23:51 GMT+09:00 Marek Vasut :
>>> On 07/13/2018 01:05 PM, Masahiro Yamada wrote:
 2018-07-13 19:58 GMT+09:00 Marek Vasut :
> On 07/13/2018 12:52 PM, Masahiro Yamada wrote:
>> 2018-07-13 19:35 GMT+09:00 Marek Vasut :
>>> On 07/13/2018 12:22 PM, Masahiro Yamada wrote:
 2018-07-13 19:18 GMT+09:00 Marek Vasut :
> On 07/13/2018 12:09 PM, Masahiro Yamada wrote:
>> Hi Marek
>>
>> 2018-07-13 17:56 GMT+09:00 Marek Vasut :
>>> On 07/13/2018 10:23 AM, Masahiro Yamada wrote:
 Hi Marek,

 2018-07-13 16:59 GMT+09:00 Marek Vasut :
> On 07/13/2018 07:13 AM, Masahiro Yamada wrote:
>> 2018-07-12 21:51 GMT+09:00 Marek Vasut :
>>> On 06/20/2018 09:14 AM, Masahiro Yamada wrote:
 Hi Marek,
>>>
>>> Hi!
>>>
 2018-06-20 13:43 GMT+09:00 Marek Vasut :
> On 06/19/2018 08:39 AM, Masahiro Yamada wrote:
>> Hi Marek,
>
> Hi,
>
>> 2018-06-08 5:17 GMT+09:00 Marek Vasut :
>>> Replace the ad-hoc DMA cache management functions with 
>>> common bouncebuf,
>>> since those functions are not handling cases where 
>>> unaligned buffer is
>>> passed in,
>>
>>
>> Were you hit by a problem,
>> or just-in-case replacement?
>
> Yes, UBI triggers unaligned cache operations on my system 
> (SoCFPGA).
>> I thought I took care of the buffer alignment.
>>
>> The bounce buffer is allocated by kmalloc():
>> https://github.com/u-boot/u-boot/blob/v2018.05/drivers/mtd/nand/denali.c#L1348
>>
>> According to the lib/linux_compat.c implementation,
>> it returns memory aligned with ARCH_DMA_MINALIGN.
>>
>>
>> If the buffer is passed from the upper MTD layer,
>> the NAND core also makes sure the enough alignment:
>> https://github.com/u-boot/u-boot/blob/v2018.05/drivers/mtd/nand/denali.c#L1273
>>
>> This is how this driver works in Linux.
>>
>> I'd rather want to keep the current code
>> unless this is a real problem,
>>
>>
>> One possible clean-up is to move dma_(un)map_single to a 
>> common place.
> Is there any chance you can try UBI on the denali nand on 
> uniphier ? :)


 I tested the driver only for raw block devices.

 OK, I will test UBI on my platform.

 BTW, do you see the problem only in U-Boot?
 Is the denali driver in Linux working fine?
>>>
>>> Bump on this one ?
>>>
>>
>> Sorry for delay.
>>
>>
>> UBI is working for me without your patch.
>>
>> Not sure what is the difference.
>>
>> I will dig into it a little more, though.
>
> Verify that you're not seeing any unaligned cache flushes. I do.


 Yeah, I am testing it now,
 but I never see 'Misaligned operation at range' when using UBI.

 However, I found a simple way to trigger the warning
 in raw device access.



 => nand  read  8110   0  1000

 NAND read: device 0 offset 0x0, size 0x1000
 CACHE: Misaligned operation at range [8110, 81001010]
 CACHE: Misaligned operation at range [8110, 81001010]
 CACHE: Misaligned operation at range [8110, 81001010]
 CACHE: Misaligned operation at range [8110, 81001010]
  4096 bytes read: OK




 I can fix it with one liner.



 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
 index 6266c8a..f391727 100644
 --- a/drivers/mtd/nand/denali.c
 +++ b/drivers/mtd/nand/denali.c
 @@ -1270,7 +1270,7 @@ int denali_init(struct denali_nand_info 
 *denali)
 denali->dma_avail = 1;

 if (denali->dma_avail) {
 -   chip->buf_align = 16;
 

Re: [U-Boot] [PATCH] sandbox_flattree: Switch to TPMv2 support

2018-07-13 Thread Miquel Raynal
Hi Simon,


> >> >> > > > In order to have the test.py tests for TPMv2 run automatically we 
> >> >> > > > need
> >> >> > > > to have one of our sandbox builds use TPMv2 rather than TPMv1.  
> >> >> > > > Switch
> >> >> > > > sandbox_flattree over to this style of TPM.  
> >> >> > >
> >> >> > > The problem seems to be that the sandbox driver is only built with
> >> >> > > either TPMv1 or TPMv2. It needs to be able to build with both, so we
> >> >> > > can run tests with both.  
> >> >> >
> >> >> > Right.  But we don't have any run-time automatic tests for TPMv1 as 
> >> >> > the
> >> >> > 'tpm test' command needs to be done manually, at least today (unless 
> >> >> > I'm
> >> >> > missing something under test/py/tests/).  And we can't (functionally 
> >> >> > in
> >> >> > real uses) have both TPM types available.  Perhaps we should make 
> >> >> > TPMv2
> >> >> > the default for sandbox?  All of the TPMv1 code will still be getting
> >> >> > build-time exercised due to platforms with TPMv1 on them.  
> >> >>
> >> >> I'll take a look at this. It should actually be quite easy to have two
> >> >> TPMs in sandbox, one v1 and one v2. At least I don't know of any
> >> >> impediment.
> >> >>  
> >> >> >  
> >> >> > > It really doesn't make any sense to have build-time branches for 
> >> >> > > sandbox.
> >> >> > >
> >> >> > > We currently have:
> >> >> > >
> >> >> > > sandbox - should be used for most tests
> >> >> > > sandbox64 - special build that forces a 64-bit host
> >> >> > > sandbox_flattree - builds with dev_read_...() functions defined as
> >> >> > > inline. We need this build so that we can test those inline 
> >> >> > > functions,
> >> >> > > and we cannot build with both the inline functions and the 
> >> >> > > non-inline
> >> >> > > functions since they are named the same
> >> >> > > sandbox_noblk - builds without CONFIG_BLK, which means the legacy
> >> >> > > block drivers are used. We cannot use both the legacy and 
> >> >> > > driver-model
> >> >> > > block drivers since they implement the same functions
> >> >> > > sandbox_spl - builds sandbox with SPL support, so you can run
> >> >> > > spl/u-boot-spl and it will start up and then load ./u-boot. We could
> >> >> > > probably remove this and add SPL support to the vanilla sandbox 
> >> >> > > build,
> >> >> > > since people can still run ./u-boot directly
> >> >> > >
> >> >> > > At present there are unnecessary config differences between these
> >> >> > > builds. This is explained by the fact that it is a pain for people 
> >> >> > > to
> >> >> > > have to add configs separately to each defconfig. But we should
> >> >> > > probably make them more common. I will take a look.  
> >> >> >
> >> >> > OK.
> >> >> >  
> >> >> > > What do you think about dropping sandbox_spl and make sandbox build
> >> >> > > SPL? It does take slightly longer to build, perhaps 25%.  
> >> >> >
> >> >> > That's fine with me.
> >> >> >  
> >> >> > > > Cc: Simon Glass 
> >> >> > > > Signed-off-by: Tom Rini 
> >> >> > > > ---
> >> >> > > > I'm tempted to switch the main sandbox target over instead as I 
> >> >> > > > don't
> >> >> > > > quite see where we're running the tpm1.x tests automatically.  
> >> >> > > > Would
> >> >> > > > that be a better idea?
> >> >> > > > ---  
> >> >> > >
> >> >> > > Miquel, can we adjust the code to build both TPMv1 and v2 for 
> >> >> > > sandbox,
> >> >> > > and select at run-time?  
> >> >> >
> >> >> > I thought we had talked about that before and couldn't easily?  One
> >> >> > thing I am a bit wary of is adding indirection for build coverage 
> >> >> > sake.  
> >> >>
> >> >> Yes, I am hoping that it is just different drivers with the same API
> >> >> but perhaps I am going to be disappointed.  
> >> >
> >> > Indeed, both versions share the same 'architecture' but quite a few
> >> > structures/functions are defined differently for each TPM flavour in
> >> > different files. What makes the magic are the
> >> > #ifdef TPM_V1
> >> > #else
> >> > #endif
> >> > blocks around includes, making them mutually exclusive.
> >> >
> >> > Choice has been made not to use both flavours at the same time in the
> >> > second series, when I clearly made a separation between v1 code and v2
> >> > code. Trying to compile them both with just some Kconfig hacks would
> >> > simply not work IMHO.
> >> >
> >> > My apologies for not being helpful at all... As Tom said, there are no
> >> > tests running on v1 code so maybe it's better to exercise v2 code in
> >> > Sandbox and let people compile-test the former on their own?  
> >>
> >> I had a play with this and it does not seem too tricky.
> >>
> >> With a bit of fiddling I got it to build except for this:
> >>
> >> /home/sjg/c/src/third_party/u-boot/files/cmd/tpm-v2.c:324: multiple
> >> definition of `get_tpm_commands'  
> >
> > That's one problem. I'm pretty sure at some point we will need to
> > declare differently tpm_chip_priv depending on the version. Using two
> > structures in an enumeration could be 

[U-Boot] [PATCH] usb: musb-new: omap2430: Remove dead code

2018-07-13 Thread Adam Ford
A bunch of code was encapsulated in #ifdef's whether or not
it is building or for U-Boot.  Since this code is always building
for U-Boot, this patch removes the dead code.

Signed-off-by: Adam Ford 

diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c
index 4753d79ede..fd63c07789 100644
--- a/drivers/usb/musb-new/omap2430.c
+++ b/drivers/usb/musb-new/omap2430.c
@@ -8,202 +8,16 @@
  *
  * This file is part of the Inventra Controller Driver for Linux.
  */
-#ifndef __UBOOT__
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#else
 #include 
 #include 
 #include 
 #include 
 #include 
 #include "linux-compat.h"
-#endif
 
 #include "musb_core.h"
 #include "omap2430.h"
 
-#ifndef __UBOOT__
-struct omap2430_glue {
-   struct device   *dev;
-   struct platform_device  *musb;
-   enum omap_musb_vbus_id_status status;
-   struct work_struct  omap_musb_mailbox_work;
-};
-#define glue_to_musb(g)platform_get_drvdata(g->musb)
-
-struct omap2430_glue   *_glue;
-
-static struct timer_list musb_idle_timer;
-
-static void musb_do_idle(unsigned long _musb)
-{
-   struct musb *musb = (void *)_musb;
-   unsigned long   flags;
-   u8  power;
-   u8  devctl;
-
-   spin_lock_irqsave(>lock, flags);
-
-   switch (musb->xceiv->state) {
-   case OTG_STATE_A_WAIT_BCON:
-
-   devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
-   if (devctl & MUSB_DEVCTL_BDEVICE) {
-   musb->xceiv->state = OTG_STATE_B_IDLE;
-   MUSB_DEV_MODE(musb);
-   } else {
-   musb->xceiv->state = OTG_STATE_A_IDLE;
-   MUSB_HST_MODE(musb);
-   }
-   break;
-   case OTG_STATE_A_SUSPEND:
-   /* finish RESUME signaling? */
-   if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
-   power = musb_readb(musb->mregs, MUSB_POWER);
-   power &= ~MUSB_POWER_RESUME;
-   dev_dbg(musb->controller, "root port resume stopped, 
power %02x\n", power);
-   musb_writeb(musb->mregs, MUSB_POWER, power);
-   musb->is_active = 1;
-   musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
-   | MUSB_PORT_STAT_RESUME);
-   musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
-   usb_hcd_poll_rh_status(musb_to_hcd(musb));
-   /* NOTE: it might really be A_WAIT_BCON ... */
-   musb->xceiv->state = OTG_STATE_A_HOST;
-   }
-   break;
-   case OTG_STATE_A_HOST:
-   devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
-   if (devctl &  MUSB_DEVCTL_BDEVICE)
-   musb->xceiv->state = OTG_STATE_B_IDLE;
-   else
-   musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
-   default:
-   break;
-   }
-   spin_unlock_irqrestore(>lock, flags);
-}
-
-
-static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
-{
-   unsigned long   default_timeout = jiffies + msecs_to_jiffies(3);
-   static unsigned longlast_timer;
-
-   if (timeout == 0)
-   timeout = default_timeout;
-
-   /* Never idle if active, or when VBUS timeout is not set as host */
-   if (musb->is_active || ((musb->a_wait_bcon == 0)
-   && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
-   dev_dbg(musb->controller, "%s active, deleting timer\n",
-   otg_state_string(musb->xceiv->state));
-   del_timer(_idle_timer);
-   last_timer = jiffies;
-   return;
-   }
-
-   if (time_after(last_timer, timeout)) {
-   if (!timer_pending(_idle_timer))
-   last_timer = timeout;
-   else {
-   dev_dbg(musb->controller, "Longer idle timer already 
pending, ignoring\n");
-   return;
-   }
-   }
-   last_timer = timeout;
-
-   dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
-   otg_state_string(musb->xceiv->state),
-   (unsigned long)jiffies_to_msecs(timeout - jiffies));
-   mod_timer(_idle_timer, timeout);
-}
-
-static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
-{
-   struct usb_otg  *otg = musb->xceiv->otg;
-   u8  devctl;
-   unsigned long timeout = jiffies + msecs_to_jiffies(1000);
-   int ret = 1;
-   /* HDRC controls CPEN, but beware current surges during device
-* connect.  They can trigger transient overcurrent conditions
-* that must be ignored.
-*/
-
-   devctl = 

[U-Boot] [PATCH] ARM: configs: omap3_logic: remove Legacy OMAP3 USB driver

2018-07-13 Thread Adam Ford
Only the MUSB driver is currently supported on the omap3_logic
boards.  The driver is using the new-musb and not the legacy
version, so this patch removes the dead code references.

Signed-off-by: Adam Ford 

diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index cd8ffd5adf..ed9f454a5d 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -53,7 +53,6 @@ CONFIG_DM_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OMAP3=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_MUSB_OMAP2PLUS=y
 CONFIG_TWL4030_USB=y
-- 
2.17.1

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Re: [U-Boot] tpm TIS TPMv2.0

2018-07-13 Thread Miquel Raynal
Hi Martin,

> > > > > Is there any specific reason why the new tpm2_tis_spi_xfer doesn't  
> > > > support full duplex? It seems we did some work in parallel but you
> > > > sent the patches earlier. Is that codes tested against an existing
> > > > TPM v2? I have a working implementation what runs on SLB9670 including  
> > full duplex.  
> > > >
> > > > What do you mean exactly?
> > > >
> > > > I don't think the TPM2 protocol makes real use of full-duplex unless
> > > > for the wait state between the host command and the actual xfer.  
> > >
> > > You are right, TIS 1.3 FIFO doesn’t use full duplex in physical level. 
> > > What I  
> > mean is that the driver you just wrote doesn't use the xfer function in that
> > way that you can specify in and out parameters at same time. I did this in 
> > my
> > implementation what gave me an easy chance to control the CS# of the TPM.
> > 
> > Do you need this CS# handling for more advanced features? Same question
> > for the in/out xfers?
> >   
> > > Can you tell me on what TPM did you test? For the SLB9670 the code
> > > doesn't work on my hardware.  
> > 
> > I tested with a ST33TPHF20 SPI TPM.
> > 
> > I'm surprised it did not work with an SLB9670, I don't see anything in the 
> > spec
> > explaining this CS# specificity.  
> 
> The CS# may controls an internal state machine and the SLB9670 uses that 
> signal. 
> >   
> > > For the code you wrote I'm considering to add a few lines to control
> > > the CS# in that way how my xfer is doing this for the SLB9670.  
> > 
> > Yes please, share the patch and add me in cc so I could test it with mine.  
> Fine, will do so soon.

What's the status of this? I did not spot any patches, maybe you
forgot to copy me? Otherwise do you still plan to share the changes?
That would be great!

Thanks,
Miquèl
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Re: [U-Boot] [PATCH] mx25: fix the offset between the USB ports' registers

2018-07-13 Thread Fabio Estevam
Hi Martin,

Thanks for the patch!

On Fri, Jul 13, 2018 at 5:02 AM, Martin Kaiser  wrote:
> From: Martin Kaiser 
>
> The USBOH module on imx25 chips contains two USB controllers, which are
> called USB OTG Controller and USB Host Controller. Each one has its EHCI
> root hub. The OTG Controller's EHCI registers start at offset 0, the Host
> Controller's registers start at offset 0x400.
>
> We set CONFIG_MXC_USB_PORT=0 to select the OTG Controller and 1 for the
> Host Controller. Therefore, IMX_USB_PORT_OFFSET must be 0x400. Using
> this setting, the Host Controller starts working on my imx25 board.
>
> Please note that the imx25 reference manual claims that the Host
> Controller's registers start at 0x200. This is not correct. The Linux
> Kernel uses the correct offset 0x400 in imx25.dtsi.
>
> Signed-off-by: Martin Kaiser 
> ---
>  arch/arm/include/asm/arch-mx25/imx-regs.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h 
> b/arch/arm/include/asm/arch-mx25/imx-regs.h
> index 1b00ed7..8d08a85 100644
> --- a/arch/arm/include/asm/arch-mx25/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
> @@ -360,7 +360,7 @@ struct cspi_regs {
>  #define IMX_IIM_BASE   (0x53FF)
>  #define IIM_BASE_ADDR  IMX_IIM_BASE
>  #define IMX_USB_BASE   (0x53FF4000)
> -#define IMX_USB_PORT_OFFSET0x200
> +#define IMX_USB_PORT_OFFSET0x400

Could you also add some comments here?

Something like you wrote in the commit log would help.

This way we avoid in the future someone trying to fix the mismatch
between the Reference Manual and the code definition.

With that added:

Reviewed-by: Fabio Estevam 
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Re: [U-Boot] [PATCH 0/2] dm: Complete CONFIG_BLK migration

2018-07-13 Thread Marek Vasut
On 07/13/2018 05:22 PM, Lukasz Majewski wrote:
> On Fri, 13 Jul 2018 16:53:53 +0200
> Marek Vasut  wrote:
> 
>> On 07/13/2018 03:34 PM, Adam Ford wrote:
>>> On Fri, Jun 29, 2018 at 3:21 PM Adam Ford 
>>> wrote:  

 On Fri, Jun 29, 2018 at 2:09 PM Tom Rini 
 wrote:  
>
> On Thu, Jun 28, 2018 at 09:30:19PM -0500, Derald D. Woods wrote:  
>> On Thu, Jun 28, 2018 at 10:47:36AM -0500, Adam Ford wrote:  
>>> On Wed, Jun 27, 2018 at 4:41 PM Tom Rini 
>>> wrote:  

 On Sat, Jun 23, 2018 at 07:59:30AM -0600, Simon Glass wrote:  
> The time has come to migrate all boards to use CONFIG_BLK.
> This series is just a test to see what boards would have to
> be removed if we required CONFIG_BLK, as we plan to after the
> next release.
>
> This should help maintainers see what is impacted.
>
> Hopefully maintainers will be able to convert their boards
> over in the next month so we we can avoid having to remove
> any boards.
>
> The goal is to have all boards use driver model. But so far,
> we do allow CONFIG_DM to not be defined.
>
>
> For 'Force BLK', here is the buildman output showing failed
> boards and the relatively small number of command errors:
>
> 03: Force BLK
>   mips:  +   pic32mzdask
>arm:  +   mixtile_loftq colibri_imx6_nospl sniper
> omap3_zoom1 tbs2910 Mele_A1000G_quad am335x_igep003x
> mx6ul_14x14_evk mk802_a10s am43xx_hs_evm devkit3250
> pcm051_rev3 am57xx_hs_evm Empire_electronix_m712 Auxtek-T003
> pcm058 zc5202 am335x_shc am335x_shc_ict Hummingbird_A31
> vining_2000 am335x_evm_usbspl ot1200_spl igep00x0 Mele_I7
> Wobo_i5 r7-tv-dongle liteboard omap3_overo am335x_boneblack
> evb-ast2500 warp7 gwventana_gw5904 cairo A13-OLinuXinoM
> mccmon6_sd apalis_imx6_nospl_it wandboard birdland_bav335a
> colibri_imx7 colibri_imx6 inet_q972 xpress_spl
> stm32f429-evaluation udoo_neo igep0032 Mele_M9 A13-OLinuXino
> inet98v_rev2 A10s-OLinuXino-M riotboard snapper9260
> am43xx_evm pfla02 mx6qsabrelite apalis_imx6_nospl_com
> s5p_goni colibri_pxa270 snapper9g20 Yones_Toptech_BS1078_V2
> am335x_shc_sdboot_prompt k2g_hs_evm cl-som-imx7
> am335x_shc_sdboot vf610twr_nand stm32f469-discovery
> am335x_evm_nor mx53cx9020 Empire_electronix_d709 vf610twr
> cm_t43 pengwyn stm32f746-disco Sinovoip_BPI_M2
> Sinovoip_BPI_M3 Sinlinx_SinA31s pico-imx7d am43xx_evm_rtconly
> LicheePi_Zero pcm051_rev1 mccmon6_nor mx6sabreauto
> display5_factory am335x_shc_prompt gwventana_nand
> Bananapi_M2_Ultra Auxtek-T004 tbs_a711 cm_t335 h8_homlet_v2
> Colombus am43xx_evm_usbhost_boot chiliboard am335x_baltos
> colibri_vf mx6ul_9x9_evk kp_imx6q_tpc bk4r1 udoo
> difrnce_dit4350 am335x_evm_norboot UTOO_P66 iNet_86VS
> marsboard MSI_Primo81 apalis_imx6 bananapi_m2_berry
> xilinx_zynqmp_r5 birdland_bav335b am43xx_evm_qspiboot
> CSQ_CS908 Ampe_A76 kp_imx53 am335x_evm_spiboot
> Cubietruck_plus k2g_evm mx6sabresd omap3_logic pepper
> colorfly_e708_q1 pcm052 gwventana_emmc am335x_boneblack_vboot
> am335x_shc_netboot xpress ot1200 cgtqmx6eval zc5601
> devkit8000 dh_imx6 mx6cuboxi am57xx_evm am335x_sl50
> q8_a13_tablet sksimx6
>
> microblaze:  +   microblaze-generic
>powerpc:  +   P1010RDB-PA_36BIT_NOR_SECBOOT
> BSC9132QDS_SDCARD_DDRCLK100_SECURE
> P1010RDB-PB_SPIFLASH_SECBOOT T1024QDS_DDR4_SECURE_BOOT
> controlcenterd_36BIT_SDCARD
> BSC9132QDS_SDCARD_DDRCLK133_SECURE
> P1010RDB-PA_SPIFLASH_SECBOOT BSC9132QDS_NAND_DDRCLK133_SECURE
> P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P2041RDB_SECURE_BOOT
> P5020DS_NAND_SECURE_BOOT P1010RDB-PB_36BIT_NOR_SECBOOT
> BSC9132QDS_NOR_DDRCLK100_SECURE P3041DS_SECURE_BOOT
> T1042D4RDB_SECURE_BOOT T1042RDB_SECURE_BOOT
> T4240QDS_SECURE_BOOT P1010RDB-PB_36BIT_SPIFLASH_SECBOOT
> P1010RDB-PB_NAND_SECBOOT BSC9132QDS_SPIFLASH_DDRCLK100_SECURE
> P3041DS_NAND_SECURE_BOOT T4160QDS_SECURE_BOOT
> T2080RDB_SECURE_BOOT B4860QDS_SECURE_BOOT P4080DS_SECURE_BOOT
> T2080QDS_SECURE_BOOT P5040DS_SECURE_BOOT
> P1010RDB-PB_36BIT_NAND_SECBOOT
> controlcenterd_36BIT_SDCARD_DEVELOP P1010RDB-PA_NAND_SECBOOT
> BSC9132QDS_SPIFLASH_DDRCLK133_SECURE P1010RDB-PA_NOR_SECBOOT
> controlcenterd_TRAILBLAZER_DEVELOP P5020DS_SECURE_BOOT
> T1024QDS_SECURE_BOOT T1040QDS_SECURE_BOOT
> BSC9132QDS_NOR_DDRCLK133_SECURE T1024RDB_SECURE_BOOT
> P5040DS_NAND_SECURE_BOOT P1010RDB-PA_36BIT_NAND_SECBOOT
> T1042RDB_PI_NAND_SECURE_BOOT T1040RDB_SECURE_BOOT
> T1040D4RDB_SECURE_BOOT 

Re: [U-Boot] [PATCH 0/2] dm: Complete CONFIG_BLK migration

2018-07-13 Thread Adam Ford
On Fri, Jul 13, 2018 at 10:23 AM Lukasz Majewski  wrote:
>
> On Fri, 13 Jul 2018 16:53:53 +0200
> Marek Vasut  wrote:
>
> > On 07/13/2018 03:34 PM, Adam Ford wrote:
> > > On Fri, Jun 29, 2018 at 3:21 PM Adam Ford 
> > > wrote:
> > >>
> > >> On Fri, Jun 29, 2018 at 2:09 PM Tom Rini 
> > >> wrote:
> > >>>
> > >>> On Thu, Jun 28, 2018 at 09:30:19PM -0500, Derald D. Woods wrote:
> >  On Thu, Jun 28, 2018 at 10:47:36AM -0500, Adam Ford wrote:
> > > On Wed, Jun 27, 2018 at 4:41 PM Tom Rini 
> > > wrote:
> > >>
> > >> On Sat, Jun 23, 2018 at 07:59:30AM -0600, Simon Glass wrote:
> > >>> The time has come to migrate all boards to use CONFIG_BLK.
> > >>> This series is just a test to see what boards would have to
> > >>> be removed if we required CONFIG_BLK, as we plan to after the
> > >>> next release.
> > >>>
> > >>> This should help maintainers see what is impacted.
> > >>>
> > >>> Hopefully maintainers will be able to convert their boards
> > >>> over in the next month so we we can avoid having to remove
> > >>> any boards.
> > >>>
> > >>> The goal is to have all boards use driver model. But so far,
> > >>> we do allow CONFIG_DM to not be defined.
> > >>>
> > >>>
> > >>> For 'Force BLK', here is the buildman output showing failed
> > >>> boards and the relatively small number of command errors:
> > >>>
> > >>> 03: Force BLK
> > >>>   mips:  +   pic32mzdask
> > >>>arm:  +   mixtile_loftq colibri_imx6_nospl sniper
> > >>> omap3_zoom1 tbs2910 Mele_A1000G_quad am335x_igep003x
> > >>> mx6ul_14x14_evk mk802_a10s am43xx_hs_evm devkit3250
> > >>> pcm051_rev3 am57xx_hs_evm Empire_electronix_m712 Auxtek-T003
> > >>> pcm058 zc5202 am335x_shc am335x_shc_ict Hummingbird_A31
> > >>> vining_2000 am335x_evm_usbspl ot1200_spl igep00x0 Mele_I7
> > >>> Wobo_i5 r7-tv-dongle liteboard omap3_overo am335x_boneblack
> > >>> evb-ast2500 warp7 gwventana_gw5904 cairo A13-OLinuXinoM
> > >>> mccmon6_sd apalis_imx6_nospl_it wandboard birdland_bav335a
> > >>> colibri_imx7 colibri_imx6 inet_q972 xpress_spl
> > >>> stm32f429-evaluation udoo_neo igep0032 Mele_M9 A13-OLinuXino
> > >>> inet98v_rev2 A10s-OLinuXino-M riotboard snapper9260
> > >>> am43xx_evm pfla02 mx6qsabrelite apalis_imx6_nospl_com
> > >>> s5p_goni colibri_pxa270 snapper9g20 Yones_Toptech_BS1078_V2
> > >>> am335x_shc_sdboot_prompt k2g_hs_evm cl-som-imx7
> > >>> am335x_shc_sdboot vf610twr_nand stm32f469-discovery
> > >>> am335x_evm_nor mx53cx9020 Empire_electronix_d709 vf610twr
> > >>> cm_t43 pengwyn stm32f746-disco Sinovoip_BPI_M2
> > >>> Sinovoip_BPI_M3 Sinlinx_SinA31s pico-imx7d am43xx_evm_rtconly
> > >>> LicheePi_Zero pcm051_rev1 mccmon6_nor mx6sabreauto
> > >>> display5_factory am335x_shc_prompt gwventana_nand
> > >>> Bananapi_M2_Ultra Auxtek-T004 tbs_a711 cm_t335 h8_homlet_v2
> > >>> Colombus am43xx_evm_usbhost_boot chiliboard am335x_baltos
> > >>> colibri_vf mx6ul_9x9_evk kp_imx6q_tpc bk4r1 udoo
> > >>> difrnce_dit4350 am335x_evm_norboot UTOO_P66 iNet_86VS
> > >>> marsboard MSI_Primo81 apalis_imx6 bananapi_m2_berry
> > >>> xilinx_zynqmp_r5 birdland_bav335b am43xx_evm_qspiboot
> > >>> CSQ_CS908 Ampe_A76 kp_imx53 am335x_evm_spiboot
> > >>> Cubietruck_plus k2g_evm mx6sabresd omap3_logic pepper
> > >>> colorfly_e708_q1 pcm052 gwventana_emmc am335x_boneblack_vboot
> > >>> am335x_shc_netboot xpress ot1200 cgtqmx6eval zc5601
> > >>> devkit8000 dh_imx6 mx6cuboxi am57xx_evm am335x_sl50
> > >>> q8_a13_tablet sksimx6
> > >>>
> > >>> microblaze:  +   microblaze-generic
> > >>>powerpc:  +   P1010RDB-PA_36BIT_NOR_SECBOOT
> > >>> BSC9132QDS_SDCARD_DDRCLK100_SECURE
> > >>> P1010RDB-PB_SPIFLASH_SECBOOT T1024QDS_DDR4_SECURE_BOOT
> > >>> controlcenterd_36BIT_SDCARD
> > >>> BSC9132QDS_SDCARD_DDRCLK133_SECURE
> > >>> P1010RDB-PA_SPIFLASH_SECBOOT BSC9132QDS_NAND_DDRCLK133_SECURE
> > >>> P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P2041RDB_SECURE_BOOT
> > >>> P5020DS_NAND_SECURE_BOOT P1010RDB-PB_36BIT_NOR_SECBOOT
> > >>> BSC9132QDS_NOR_DDRCLK100_SECURE P3041DS_SECURE_BOOT
> > >>> T1042D4RDB_SECURE_BOOT T1042RDB_SECURE_BOOT
> > >>> T4240QDS_SECURE_BOOT P1010RDB-PB_36BIT_SPIFLASH_SECBOOT
> > >>> P1010RDB-PB_NAND_SECBOOT BSC9132QDS_SPIFLASH_DDRCLK100_SECURE
> > >>> P3041DS_NAND_SECURE_BOOT T4160QDS_SECURE_BOOT
> > >>> T2080RDB_SECURE_BOOT B4860QDS_SECURE_BOOT P4080DS_SECURE_BOOT
> > >>> T2080QDS_SECURE_BOOT P5040DS_SECURE_BOOT
> > >>> P1010RDB-PB_36BIT_NAND_SECBOOT
> > >>> controlcenterd_36BIT_SDCARD_DEVELOP P1010RDB-PA_NAND_SECBOOT
> > >>> BSC9132QDS_SPIFLASH_DDRCLK133_SECURE P1010RDB-PA_NOR_SECBOOT
> > >>> controlcenterd_TRAILBLAZER_DEVELOP P5020DS_SECURE_BOOT
> > >>> T1024QDS_SECURE_BOOT T1040QDS_SECURE_BOOT
> > >>> BSC9132QDS_NOR_DDRCLK133_SECURE T1024RDB_SECURE_BOOT
> > 

Re: [U-Boot] [PATCH 0/2] dm: Complete CONFIG_BLK migration

2018-07-13 Thread Lukasz Majewski
On Fri, 13 Jul 2018 16:53:53 +0200
Marek Vasut  wrote:

> On 07/13/2018 03:34 PM, Adam Ford wrote:
> > On Fri, Jun 29, 2018 at 3:21 PM Adam Ford 
> > wrote:  
> >>
> >> On Fri, Jun 29, 2018 at 2:09 PM Tom Rini 
> >> wrote:  
> >>>
> >>> On Thu, Jun 28, 2018 at 09:30:19PM -0500, Derald D. Woods wrote:  
>  On Thu, Jun 28, 2018 at 10:47:36AM -0500, Adam Ford wrote:  
> > On Wed, Jun 27, 2018 at 4:41 PM Tom Rini 
> > wrote:  
> >>
> >> On Sat, Jun 23, 2018 at 07:59:30AM -0600, Simon Glass wrote:  
> >>> The time has come to migrate all boards to use CONFIG_BLK.
> >>> This series is just a test to see what boards would have to
> >>> be removed if we required CONFIG_BLK, as we plan to after the
> >>> next release.
> >>>
> >>> This should help maintainers see what is impacted.
> >>>
> >>> Hopefully maintainers will be able to convert their boards
> >>> over in the next month so we we can avoid having to remove
> >>> any boards.
> >>>
> >>> The goal is to have all boards use driver model. But so far,
> >>> we do allow CONFIG_DM to not be defined.
> >>>
> >>>
> >>> For 'Force BLK', here is the buildman output showing failed
> >>> boards and the relatively small number of command errors:
> >>>
> >>> 03: Force BLK
> >>>   mips:  +   pic32mzdask
> >>>arm:  +   mixtile_loftq colibri_imx6_nospl sniper
> >>> omap3_zoom1 tbs2910 Mele_A1000G_quad am335x_igep003x
> >>> mx6ul_14x14_evk mk802_a10s am43xx_hs_evm devkit3250
> >>> pcm051_rev3 am57xx_hs_evm Empire_electronix_m712 Auxtek-T003
> >>> pcm058 zc5202 am335x_shc am335x_shc_ict Hummingbird_A31
> >>> vining_2000 am335x_evm_usbspl ot1200_spl igep00x0 Mele_I7
> >>> Wobo_i5 r7-tv-dongle liteboard omap3_overo am335x_boneblack
> >>> evb-ast2500 warp7 gwventana_gw5904 cairo A13-OLinuXinoM
> >>> mccmon6_sd apalis_imx6_nospl_it wandboard birdland_bav335a
> >>> colibri_imx7 colibri_imx6 inet_q972 xpress_spl
> >>> stm32f429-evaluation udoo_neo igep0032 Mele_M9 A13-OLinuXino
> >>> inet98v_rev2 A10s-OLinuXino-M riotboard snapper9260
> >>> am43xx_evm pfla02 mx6qsabrelite apalis_imx6_nospl_com
> >>> s5p_goni colibri_pxa270 snapper9g20 Yones_Toptech_BS1078_V2
> >>> am335x_shc_sdboot_prompt k2g_hs_evm cl-som-imx7
> >>> am335x_shc_sdboot vf610twr_nand stm32f469-discovery
> >>> am335x_evm_nor mx53cx9020 Empire_electronix_d709 vf610twr
> >>> cm_t43 pengwyn stm32f746-disco Sinovoip_BPI_M2
> >>> Sinovoip_BPI_M3 Sinlinx_SinA31s pico-imx7d am43xx_evm_rtconly
> >>> LicheePi_Zero pcm051_rev1 mccmon6_nor mx6sabreauto
> >>> display5_factory am335x_shc_prompt gwventana_nand
> >>> Bananapi_M2_Ultra Auxtek-T004 tbs_a711 cm_t335 h8_homlet_v2
> >>> Colombus am43xx_evm_usbhost_boot chiliboard am335x_baltos
> >>> colibri_vf mx6ul_9x9_evk kp_imx6q_tpc bk4r1 udoo
> >>> difrnce_dit4350 am335x_evm_norboot UTOO_P66 iNet_86VS
> >>> marsboard MSI_Primo81 apalis_imx6 bananapi_m2_berry
> >>> xilinx_zynqmp_r5 birdland_bav335b am43xx_evm_qspiboot
> >>> CSQ_CS908 Ampe_A76 kp_imx53 am335x_evm_spiboot
> >>> Cubietruck_plus k2g_evm mx6sabresd omap3_logic pepper
> >>> colorfly_e708_q1 pcm052 gwventana_emmc am335x_boneblack_vboot
> >>> am335x_shc_netboot xpress ot1200 cgtqmx6eval zc5601
> >>> devkit8000 dh_imx6 mx6cuboxi am57xx_evm am335x_sl50
> >>> q8_a13_tablet sksimx6
> >>>
> >>> microblaze:  +   microblaze-generic
> >>>powerpc:  +   P1010RDB-PA_36BIT_NOR_SECBOOT
> >>> BSC9132QDS_SDCARD_DDRCLK100_SECURE
> >>> P1010RDB-PB_SPIFLASH_SECBOOT T1024QDS_DDR4_SECURE_BOOT
> >>> controlcenterd_36BIT_SDCARD
> >>> BSC9132QDS_SDCARD_DDRCLK133_SECURE
> >>> P1010RDB-PA_SPIFLASH_SECBOOT BSC9132QDS_NAND_DDRCLK133_SECURE
> >>> P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P2041RDB_SECURE_BOOT
> >>> P5020DS_NAND_SECURE_BOOT P1010RDB-PB_36BIT_NOR_SECBOOT
> >>> BSC9132QDS_NOR_DDRCLK100_SECURE P3041DS_SECURE_BOOT
> >>> T1042D4RDB_SECURE_BOOT T1042RDB_SECURE_BOOT
> >>> T4240QDS_SECURE_BOOT P1010RDB-PB_36BIT_SPIFLASH_SECBOOT
> >>> P1010RDB-PB_NAND_SECBOOT BSC9132QDS_SPIFLASH_DDRCLK100_SECURE
> >>> P3041DS_NAND_SECURE_BOOT T4160QDS_SECURE_BOOT
> >>> T2080RDB_SECURE_BOOT B4860QDS_SECURE_BOOT P4080DS_SECURE_BOOT
> >>> T2080QDS_SECURE_BOOT P5040DS_SECURE_BOOT
> >>> P1010RDB-PB_36BIT_NAND_SECBOOT
> >>> controlcenterd_36BIT_SDCARD_DEVELOP P1010RDB-PA_NAND_SECBOOT
> >>> BSC9132QDS_SPIFLASH_DDRCLK133_SECURE P1010RDB-PA_NOR_SECBOOT
> >>> controlcenterd_TRAILBLAZER_DEVELOP P5020DS_SECURE_BOOT
> >>> T1024QDS_SECURE_BOOT T1040QDS_SECURE_BOOT
> >>> BSC9132QDS_NOR_DDRCLK133_SECURE T1024RDB_SECURE_BOOT
> >>> P5040DS_NAND_SECURE_BOOT P1010RDB-PA_36BIT_NAND_SECBOOT
> >>> T1042RDB_PI_NAND_SECURE_BOOT T1040RDB_SECURE_BOOT
> >>> T1040D4RDB_SECURE_BOOT BSC9132QDS_NAND_DDRCLK100_SECURE
> >>> P1010RDB-PB_NOR_SECBOOT 

Re: [U-Boot] [PATCH 0/2] dm: Complete CONFIG_BLK migration

2018-07-13 Thread Marek Vasut
On 07/13/2018 03:34 PM, Adam Ford wrote:
> On Fri, Jun 29, 2018 at 3:21 PM Adam Ford  wrote:
>>
>> On Fri, Jun 29, 2018 at 2:09 PM Tom Rini  wrote:
>>>
>>> On Thu, Jun 28, 2018 at 09:30:19PM -0500, Derald D. Woods wrote:
 On Thu, Jun 28, 2018 at 10:47:36AM -0500, Adam Ford wrote:
> On Wed, Jun 27, 2018 at 4:41 PM Tom Rini  wrote:
>>
>> On Sat, Jun 23, 2018 at 07:59:30AM -0600, Simon Glass wrote:
>>> The time has come to migrate all boards to use CONFIG_BLK. This series
>>> is just a test to see what boards would have to be removed if we 
>>> required
>>> CONFIG_BLK, as we plan to after the next release.
>>>
>>> This should help maintainers see what is impacted.
>>>
>>> Hopefully maintainers will be able to convert their boards over in the
>>> next month so we we can avoid having to remove any boards.
>>>
>>> The goal is to have all boards use driver model. But so far, we do allow
>>> CONFIG_DM to not be defined.
>>>
>>>
>>> For 'Force BLK', here is the buildman output showing failed boards and 
>>> the
>>> relatively small number of command errors:
>>>
>>> 03: Force BLK
>>>   mips:  +   pic32mzdask
>>>arm:  +   mixtile_loftq colibri_imx6_nospl sniper omap3_zoom1 
>>> tbs2910 Mele_A1000G_quad
>>> am335x_igep003x mx6ul_14x14_evk mk802_a10s am43xx_hs_evm devkit3250 
>>> pcm051_rev3
>>> am57xx_hs_evm Empire_electronix_m712 Auxtek-T003 pcm058 zc5202 
>>> am335x_shc
>>> am335x_shc_ict Hummingbird_A31 vining_2000 am335x_evm_usbspl ot1200_spl 
>>> igep00x0
>>> Mele_I7 Wobo_i5 r7-tv-dongle liteboard omap3_overo am335x_boneblack 
>>> evb-ast2500
>>> warp7 gwventana_gw5904 cairo A13-OLinuXinoM mccmon6_sd 
>>> apalis_imx6_nospl_it
>>> wandboard birdland_bav335a colibri_imx7 colibri_imx6 inet_q972 
>>> xpress_spl
>>> stm32f429-evaluation udoo_neo igep0032 Mele_M9 A13-OLinuXino 
>>> inet98v_rev2
>>> A10s-OLinuXino-M riotboard snapper9260 am43xx_evm pfla02 mx6qsabrelite
>>> apalis_imx6_nospl_com s5p_goni colibri_pxa270 snapper9g20
>>> Yones_Toptech_BS1078_V2 am335x_shc_sdboot_prompt k2g_hs_evm cl-som-imx7
>>> am335x_shc_sdboot vf610twr_nand stm32f469-discovery am335x_evm_nor 
>>> mx53cx9020
>>> Empire_electronix_d709 vf610twr cm_t43 pengwyn stm32f746-disco 
>>> Sinovoip_BPI_M2
>>> Sinovoip_BPI_M3 Sinlinx_SinA31s pico-imx7d am43xx_evm_rtconly 
>>> LicheePi_Zero
>>> pcm051_rev1 mccmon6_nor mx6sabreauto display5_factory am335x_shc_prompt
>>> gwventana_nand Bananapi_M2_Ultra Auxtek-T004 tbs_a711 cm_t335 
>>> h8_homlet_v2
>>> Colombus am43xx_evm_usbhost_boot chiliboard am335x_baltos colibri_vf
>>> mx6ul_9x9_evk kp_imx6q_tpc bk4r1 udoo difrnce_dit4350 am335x_evm_norboot
>>> UTOO_P66 iNet_86VS marsboard MSI_Primo81 apalis_imx6 bananapi_m2_berry
>>> xilinx_zynqmp_r5 birdland_bav335b am43xx_evm_qspiboot CSQ_CS908 Ampe_A76
>>> kp_imx53 am335x_evm_spiboot Cubietruck_plus k2g_evm mx6sabresd 
>>> omap3_logic
>>> pepper colorfly_e708_q1 pcm052 gwventana_emmc am335x_boneblack_vboot
>>> am335x_shc_netboot xpress ot1200 cgtqmx6eval zc5601 devkit8000 dh_imx6 
>>> mx6cuboxi
>>> am57xx_evm am335x_sl50 q8_a13_tablet sksimx6
>>>
>>> microblaze:  +   microblaze-generic
>>>powerpc:  +   P1010RDB-PA_36BIT_NOR_SECBOOT 
>>> BSC9132QDS_SDCARD_DDRCLK100_SECURE
>>> P1010RDB-PB_SPIFLASH_SECBOOT T1024QDS_DDR4_SECURE_BOOT
>>> controlcenterd_36BIT_SDCARD BSC9132QDS_SDCARD_DDRCLK133_SECURE
>>> P1010RDB-PA_SPIFLASH_SECBOOT BSC9132QDS_NAND_DDRCLK133_SECURE
>>> P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P2041RDB_SECURE_BOOT 
>>> P5020DS_NAND_SECURE_BOOT
>>> P1010RDB-PB_36BIT_NOR_SECBOOT BSC9132QDS_NOR_DDRCLK100_SECURE
>>> P3041DS_SECURE_BOOT T1042D4RDB_SECURE_BOOT T1042RDB_SECURE_BOOT
>>> T4240QDS_SECURE_BOOT P1010RDB-PB_36BIT_SPIFLASH_SECBOOT 
>>> P1010RDB-PB_NAND_SECBOOT
>>> BSC9132QDS_SPIFLASH_DDRCLK100_SECURE P3041DS_NAND_SECURE_BOOT
>>> T4160QDS_SECURE_BOOT T2080RDB_SECURE_BOOT B4860QDS_SECURE_BOOT
>>> P4080DS_SECURE_BOOT T2080QDS_SECURE_BOOT P5040DS_SECURE_BOOT
>>> P1010RDB-PB_36BIT_NAND_SECBOOT controlcenterd_36BIT_SDCARD_DEVELOP
>>> P1010RDB-PA_NAND_SECBOOT BSC9132QDS_SPIFLASH_DDRCLK133_SECURE
>>> P1010RDB-PA_NOR_SECBOOT controlcenterd_TRAILBLAZER_DEVELOP 
>>> P5020DS_SECURE_BOOT
>>> T1024QDS_SECURE_BOOT T1040QDS_SECURE_BOOT 
>>> BSC9132QDS_NOR_DDRCLK133_SECURE
>>> T1024RDB_SECURE_BOOT P5040DS_NAND_SECURE_BOOT 
>>> P1010RDB-PA_36BIT_NAND_SECBOOT
>>> T1042RDB_PI_NAND_SECURE_BOOT T1040RDB_SECURE_BOOT T1040D4RDB_SECURE_BOOT
>>> BSC9132QDS_NAND_DDRCLK100_SECURE P1010RDB-PB_NOR_SECBOOT 
>>> T1023RDB_SECURE_BOOT
>>> controlcenterd_TRAILBLAZER
>>
>> So, how are the maintainers CC'd on this feeling about the deadline?  It
>> was supposed to be 2018.05, but it's looking like we would 

Re: [U-Boot] [PATCH] mtd: nand: denali: Replace the ad-hoc cache management with bouncebuf

2018-07-13 Thread Marek Vasut
On 07/13/2018 05:09 PM, Masahiro Yamada wrote:
> 2018-07-13 23:51 GMT+09:00 Marek Vasut :
>> On 07/13/2018 01:05 PM, Masahiro Yamada wrote:
>>> 2018-07-13 19:58 GMT+09:00 Marek Vasut :
 On 07/13/2018 12:52 PM, Masahiro Yamada wrote:
> 2018-07-13 19:35 GMT+09:00 Marek Vasut :
>> On 07/13/2018 12:22 PM, Masahiro Yamada wrote:
>>> 2018-07-13 19:18 GMT+09:00 Marek Vasut :
 On 07/13/2018 12:09 PM, Masahiro Yamada wrote:
> Hi Marek
>
> 2018-07-13 17:56 GMT+09:00 Marek Vasut :
>> On 07/13/2018 10:23 AM, Masahiro Yamada wrote:
>>> Hi Marek,
>>>
>>> 2018-07-13 16:59 GMT+09:00 Marek Vasut :
 On 07/13/2018 07:13 AM, Masahiro Yamada wrote:
> 2018-07-12 21:51 GMT+09:00 Marek Vasut :
>> On 06/20/2018 09:14 AM, Masahiro Yamada wrote:
>>> Hi Marek,
>>
>> Hi!
>>
>>> 2018-06-20 13:43 GMT+09:00 Marek Vasut :
 On 06/19/2018 08:39 AM, Masahiro Yamada wrote:
> Hi Marek,

 Hi,

> 2018-06-08 5:17 GMT+09:00 Marek Vasut :
>> Replace the ad-hoc DMA cache management functions with 
>> common bouncebuf,
>> since those functions are not handling cases where unaligned 
>> buffer is
>> passed in,
>
>
> Were you hit by a problem,
> or just-in-case replacement?

 Yes, UBI triggers unaligned cache operations on my system 
 (SoCFPGA).
> I thought I took care of the buffer alignment.
>
> The bounce buffer is allocated by kmalloc():
> https://github.com/u-boot/u-boot/blob/v2018.05/drivers/mtd/nand/denali.c#L1348
>
> According to the lib/linux_compat.c implementation,
> it returns memory aligned with ARCH_DMA_MINALIGN.
>
>
> If the buffer is passed from the upper MTD layer,
> the NAND core also makes sure the enough alignment:
> https://github.com/u-boot/u-boot/blob/v2018.05/drivers/mtd/nand/denali.c#L1273
>
> This is how this driver works in Linux.
>
> I'd rather want to keep the current code
> unless this is a real problem,
>
>
> One possible clean-up is to move dma_(un)map_single to a 
> common place.
 Is there any chance you can try UBI on the denali nand on 
 uniphier ? :)
>>>
>>>
>>> I tested the driver only for raw block devices.
>>>
>>> OK, I will test UBI on my platform.
>>>
>>> BTW, do you see the problem only in U-Boot?
>>> Is the denali driver in Linux working fine?
>>
>> Bump on this one ?
>>
>
> Sorry for delay.
>
>
> UBI is working for me without your patch.
>
> Not sure what is the difference.
>
> I will dig into it a little more, though.

 Verify that you're not seeing any unaligned cache flushes. I do.
>>>
>>>
>>> Yeah, I am testing it now,
>>> but I never see 'Misaligned operation at range' when using UBI.
>>>
>>> However, I found a simple way to trigger the warning
>>> in raw device access.
>>>
>>>
>>>
>>> => nand  read  8110   0  1000
>>>
>>> NAND read: device 0 offset 0x0, size 0x1000
>>> CACHE: Misaligned operation at range [8110, 81001010]
>>> CACHE: Misaligned operation at range [8110, 81001010]
>>> CACHE: Misaligned operation at range [8110, 81001010]
>>> CACHE: Misaligned operation at range [8110, 81001010]
>>>  4096 bytes read: OK
>>>
>>>
>>>
>>>
>>> I can fix it with one liner.
>>>
>>>
>>>
>>> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
>>> index 6266c8a..f391727 100644
>>> --- a/drivers/mtd/nand/denali.c
>>> +++ b/drivers/mtd/nand/denali.c
>>> @@ -1270,7 +1270,7 @@ int denali_init(struct denali_nand_info 
>>> *denali)
>>> denali->dma_avail = 1;
>>>
>>> if (denali->dma_avail) {
>>> -   chip->buf_align = 16;
>>> +   chip->buf_align = ARCH_DMA_MINALIGN;
>>> if (denali->caps & DENALI_CAP_DMA_64BIT)
>>> 

Re: [U-Boot] [PATCH 1/1] avb2.0: add get_size_of_partition()

2018-07-13 Thread Andrew F. Davis
On 07/13/2018 12:09 PM, Igor Opaniuk wrote:
> Hi Andrew,
> Sorry I missed your message.
> 
> On 9 July 2018 at 18:21, Andrew F. Davis  wrote:
>> On 07/09/2018 09:52 AM, Sam Protsenko wrote:
>>> On Mon, Jul 9, 2018 at 3:15 PM, Igor Opaniuk  
>>> wrote:
 Implement get_size_of_partition() operation,
 which is required by the latest upstream libavb [1].

 [1] 
 https://android.googlesource.com/platform/external/avb/+/master/README.md

>>
>>
>> I may have missed it, where in here do we need this information? I looks
>> to be passed in on the command line for most ops. Has a new function
>> been added?
> 
> right, it was introduced in 417e8133af46 ("libavb: Load entire
> partition if |allow_verification_error| is true.").
> When I included the latest libavb for the avb v2 patch series (in v1
> the was out-dated version, AFAIK ~1y old),
> I noticed this new Avb operation, although it didn't have any impact
> on avb verify functionality.
> (I was receiving just a warning that no get_size_of_partition is set
> in AvbOps structure)
> 
> So I decided to introduce the implementation of this function in a
> separate patch.
> 
>>
 Signed-off-by: Igor Opaniuk 
 ---
>>>
>>> Reviewed-by: Sam Protsenko 
>>>
  common/avb_verify.c | 33 -
  1 file changed, 32 insertions(+), 1 deletion(-)

 diff --git a/common/avb_verify.c b/common/avb_verify.c
 index f9a00f8..5eabab0 100644
 --- a/common/avb_verify.c
 +++ b/common/avb_verify.c
 @@ -699,6 +699,37 @@ static AvbIOResult 
 get_unique_guid_for_partition(AvbOps *ops,
  }

  /**
 + * get_size_of_partition() - gets the size of a partition identified
 + * by a string name
 + *
 + * @ops: contains AVB ops handlers
 + * @partition: partition name (NUL-terminated UTF-8 string)
 + * @out_size_num_bytes: returns the value of a partition size
 + *
 + * @return:
 + *  AVB_IO_RESULT_OK, on success (GUID found)
 + *  AVB_IO_RESULT_ERROR_IO, out_size_num_bytes is NULL
>>
>>
>> This does not seems to be the right error code for this, this implies a
>> hardware error, maybe AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is a better
>> choice? 'out_size_num_bytes' is a buffer in a way (to 8 bytes).
> 
> Frankly, I chose the most "abstract" (if I can say that) error code,
> as there is no any in AVB that resembles POSIX EINVAL.


But it is not abstract or generic, it is very specific:

"is returned if the underlying hardware encountered an I/O error."

If no I/O error has occurred, you should not be returning this error code.


> Regarding AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE, which
> "is returned if a buffer is too small for the requested operation",
> I'm not sure that it's proper error either.
> 


Neither are perfectly proper, but lets not make the user think their HW
is broken.


> There is a question spinning in my mind "should we do any param 
> verification?",
> as only libavb is using these functions,
> and no theoretical case is possible when an invalid value is provided.
> 


Sanity checks never hurt, trust nobody, not even yourself.

For parameters input by user then of course verify. But parameters only
populated by other code, then it depends.

It matters what will happen when at some point when someone will mess up
the code and this function will get called with bad params. In this
particular case all that will happen is a null pointer exception will
get thrown, the dev will see it instantly and fix the code. So it's not
needed here.

The ones that really need it are ones that the bad parameter will
propagate silently and break somewhere else much later and may even make
it back in to production code bases if the problem it causes isn't
immediately obvious enough.

Andrew


>>
>> Andrew
>>
>>
 + *  AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION, if partition was not found
 + */
 +static AvbIOResult get_size_of_partition(AvbOps *ops,
 +const char *partition,
 +u64 *out_size_num_bytes)
 +{
 +   struct mmc_part *part;
 +
 +   if (!out_size_num_bytes)
 +   return AVB_IO_RESULT_ERROR_IO;
 +
 +   part = get_partition(ops, partition);
 +   if (!part)
 +   return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 +
 +   *out_size_num_bytes = part->info.blksz * part->info.size;
 +
 +   return AVB_IO_RESULT_OK;
 +}
 +
 +/**
   * 
 
   * AVB2.0 AvbOps alloc/initialisation/free
   * 
 
 @@ -721,7 +752,7 @@ AvbOps *avb_ops_alloc(int boot_device)
 ops_data->ops.read_is_device_unlocked = read_is_device_unlocked;
 ops_data->ops.get_unique_guid_for_partition =

Re: [U-Boot] [PATCH] snow: set fdtfile

2018-07-13 Thread Peter Robinson
On Thu, Jun 14, 2018 at 9:34 PM, Guillaume GARDET
 wrote:
> Needed to boot with EFI distro boot.
>
> Signed-off-by: Guillaume GARDET 
>
> Cc: Akshay Saraswat 
> Cc: Tom Rini 
> ---
>  include/configs/snow.h | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/include/configs/snow.h b/include/configs/snow.h
> index 3b0db32ece..c546a5a6d0 100644
> --- a/include/configs/snow.h
> +++ b/include/configs/snow.h
> @@ -8,6 +8,9 @@
>  #ifndef __CONFIG_SNOW_H
>  #define __CONFIG_SNOW_H
>
> +#define EXYNOS_FDTFILE_SETTING \
> +   "fdtfile=exynos5250-snow.dtb\0"

Isn't it set in configs/snow_defconfig with
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"

>  #include 
>  #include 
>  #include 
> --
> 2.17.1
>
> ___
> U-Boot mailing list
> U-Boot@lists.denx.de
> https://lists.denx.de/listinfo/u-boot
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot


Re: [U-Boot] [PATCH 1/1] avb2.0: add get_size_of_partition()

2018-07-13 Thread Igor Opaniuk
Hi Andrew,
Sorry I missed your message.

On 9 July 2018 at 18:21, Andrew F. Davis  wrote:
> On 07/09/2018 09:52 AM, Sam Protsenko wrote:
>> On Mon, Jul 9, 2018 at 3:15 PM, Igor Opaniuk  wrote:
>>> Implement get_size_of_partition() operation,
>>> which is required by the latest upstream libavb [1].
>>>
>>> [1] 
>>> https://android.googlesource.com/platform/external/avb/+/master/README.md
>>>
>
>
> I may have missed it, where in here do we need this information? I looks
> to be passed in on the command line for most ops. Has a new function
> been added?

right, it was introduced in 417e8133af46 ("libavb: Load entire
partition if |allow_verification_error| is true.").
When I included the latest libavb for the avb v2 patch series (in v1
the was out-dated version, AFAIK ~1y old),
I noticed this new Avb operation, although it didn't have any impact
on avb verify functionality.
(I was receiving just a warning that no get_size_of_partition is set
in AvbOps structure)

So I decided to introduce the implementation of this function in a
separate patch.

>
>>> Signed-off-by: Igor Opaniuk 
>>> ---
>>
>> Reviewed-by: Sam Protsenko 
>>
>>>  common/avb_verify.c | 33 -
>>>  1 file changed, 32 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/common/avb_verify.c b/common/avb_verify.c
>>> index f9a00f8..5eabab0 100644
>>> --- a/common/avb_verify.c
>>> +++ b/common/avb_verify.c
>>> @@ -699,6 +699,37 @@ static AvbIOResult 
>>> get_unique_guid_for_partition(AvbOps *ops,
>>>  }
>>>
>>>  /**
>>> + * get_size_of_partition() - gets the size of a partition identified
>>> + * by a string name
>>> + *
>>> + * @ops: contains AVB ops handlers
>>> + * @partition: partition name (NUL-terminated UTF-8 string)
>>> + * @out_size_num_bytes: returns the value of a partition size
>>> + *
>>> + * @return:
>>> + *  AVB_IO_RESULT_OK, on success (GUID found)
>>> + *  AVB_IO_RESULT_ERROR_IO, out_size_num_bytes is NULL
>
>
> This does not seems to be the right error code for this, this implies a
> hardware error, maybe AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is a better
> choice? 'out_size_num_bytes' is a buffer in a way (to 8 bytes).

Frankly, I chose the most "abstract" (if I can say that) error code,
as there is no any in AVB that resembles POSIX EINVAL.
Regarding AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE, which
"is returned if a buffer is too small for the requested operation",
I'm not sure that it's proper error either.

There is a question spinning in my mind "should we do any param verification?",
as only libavb is using these functions,
and no theoretical case is possible when an invalid value is provided.

>
> Andrew
>
>
>>> + *  AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION, if partition was not found
>>> + */
>>> +static AvbIOResult get_size_of_partition(AvbOps *ops,
>>> +const char *partition,
>>> +u64 *out_size_num_bytes)
>>> +{
>>> +   struct mmc_part *part;
>>> +
>>> +   if (!out_size_num_bytes)
>>> +   return AVB_IO_RESULT_ERROR_IO;
>>> +
>>> +   part = get_partition(ops, partition);
>>> +   if (!part)
>>> +   return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
>>> +
>>> +   *out_size_num_bytes = part->info.blksz * part->info.size;
>>> +
>>> +   return AVB_IO_RESULT_OK;
>>> +}
>>> +
>>> +/**
>>>   * 
>>> 
>>>   * AVB2.0 AvbOps alloc/initialisation/free
>>>   * 
>>> 
>>> @@ -721,7 +752,7 @@ AvbOps *avb_ops_alloc(int boot_device)
>>> ops_data->ops.read_is_device_unlocked = read_is_device_unlocked;
>>> ops_data->ops.get_unique_guid_for_partition =
>>> get_unique_guid_for_partition;
>>> -
>>> +   ops_data->ops.get_size_of_partition = get_size_of_partition;
>>> ops_data->mmc_dev = boot_device;
>>>
>>> return _data->ops;
>>> --
>>> 2.7.4
>>>



-- 
Regards,
Igor Opaniuk
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Re: [U-Boot] [PATCH] snow: set fdtfile

2018-07-13 Thread Guillaume Gardet

Hi,

This is a reminder for this patch.

Guillaume



Le 14/06/2018 à 22:34, Guillaume GARDET a écrit :

Needed to boot with EFI distro boot.

Signed-off-by: Guillaume GARDET 

Cc: Akshay Saraswat 
Cc: Tom Rini 
---
  include/configs/snow.h | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/include/configs/snow.h b/include/configs/snow.h
index 3b0db32ece..c546a5a6d0 100644
--- a/include/configs/snow.h
+++ b/include/configs/snow.h
@@ -8,6 +8,9 @@
  #ifndef __CONFIG_SNOW_H
  #define __CONFIG_SNOW_H
  
+#define EXYNOS_FDTFILE_SETTING \

+   "fdtfile=exynos5250-snow.dtb\0"
+
  #include 
  #include 
  #include 


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[U-Boot] [PATCH 2/2] mtd: nand: sunxi: Return on set_feature only when not ENOTSUPP

2018-07-13 Thread Mylène Josserand
Return the error code of the set_features function only if
the error code is not ENOTSUPP. Otherwise, if this function
is not supported, it will return and fail to initialize the
NAND.

Signed-off-by: Mylène Josserand 
---
 drivers/mtd/nand/sunxi_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_nand.c
index bb87aca698..3ccb168d13 100644
--- a/drivers/mtd/nand/sunxi_nand.c
+++ b/drivers/mtd/nand/sunxi_nand.c
@@ -1369,7 +1369,7 @@ static int sunxi_nand_chip_init_timings(struct 
sunxi_nand_chip *chip)
ONFI_FEATURE_ADDR_TIMING_MODE,
feature);
chip->nand.select_chip(mtd, -1);
-   if (ret)
+   if (ret && ret != -ENOTSUPP)
return ret;
}
}
-- 
2.11.0

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[U-Boot] [PATCH 1/2] mtd: nand: nand_base: Convert EINVAL into ENOTSUPP

2018-07-13 Thread Mylène Josserand
Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES
is not supported.

Signed-off-by: Mylène Josserand 
---
 drivers/mtd/nand/nand_base.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 64e4621aaa..9094f857c1 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3041,7 +3041,7 @@ static int nand_onfi_set_features(struct mtd_info *mtd, 
struct nand_chip *chip,
if (!chip->onfi_version ||
!(le16_to_cpu(chip->onfi_params.opt_cmd)
  & ONFI_OPT_CMD_SET_GET_FEATURES))
-   return -EINVAL;
+   return -ENOTSUPP;
 #endif
 
chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
@@ -3070,7 +3070,7 @@ static int nand_onfi_get_features(struct mtd_info *mtd, 
struct nand_chip *chip,
if (!chip->onfi_version ||
!(le16_to_cpu(chip->onfi_params.opt_cmd)
  & ONFI_OPT_CMD_SET_GET_FEATURES))
-   return -EINVAL;
+   return -ENOTSUPP;
 #endif
 
chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);
-- 
2.11.0

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[U-Boot] [PATCH 0/2] NAND: sunxi: Return ENOTSUPP on onfi functions

2018-07-13 Thread Mylène Josserand
Hello everyone,

This is a first version of this series that fix code for NAND chip that
does not have ONFI get/set features support.

Patch 01:
The current code returns an invalid error if it is not supported.
It should return ENOTSUPP instead.
Patch 02:
In sunxi_nand driver, we should return of sunxi_nand_chip_init_timings
function only when the ONFI is supported and we got a real error while
setting the timing. If the onfi_get/set_features is not supported, we
should continue the NAND intialization.

Let me kow what you think.

Thank you in advance,
Best regards,

Mylène Josserand (2):
  mtd: nand: nand_base: Convert EINVAL into ENOTSUPP
  mtd: nand: sunxi: Return on set_feature only when not ENOTSUPP

 drivers/mtd/nand/nand_base.c  | 4 ++--
 drivers/mtd/nand/sunxi_nand.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

-- 
2.11.0

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[U-Boot] [PATCH 1/2] avb2.0: add proper dependencies

2018-07-13 Thread Igor Opaniuk
1. Since libavb library alone is highly portable, introduce dedicated
Kconfig symbol for AVB compiler-dependent operations, so it's possible
to build libavb separately.
2. Add CONFIG_FASTBOOT dependency, as fastboot buffer is
re-used in partition verification operations.

Reported-by: Eugeniu Rosca 
Signed-off-by: Igor Opaniuk 
---
 cmd/Kconfig | 2 +-
 common/Kconfig  | 7 +++
 doc/README.avb2 | 1 +
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index aec2090..b3e030c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1771,7 +1771,7 @@ config CMD_TRACE
 
 config CMD_AVB
bool "avb - Android Verified Boot 2.0 operations"
-   depends on LIBAVB
+   depends on AVB_VERIFY
default n
help
  Enables a "avb" command to perform verification of partitions using
diff --git a/common/Kconfig b/common/Kconfig
index 4c7a1a9..1d31f9b 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -631,6 +631,13 @@ config HASH
  and the algorithms it supports are defined in common/hash.c. See
  also CMD_HASH for command-line access.
 
+config AVB_VERIFY
+   bool "Build Android Verified Boot operations"
+   depends on LIBAVB && FASTBOOT
+   help
+ This option enables compilation of bootloader-dependent operations,
+ used by Android Verified Boot 2.0 library (libavb).
+
 endmenu
 
 menu "Update support"
diff --git a/doc/README.avb2 b/doc/README.avb2
index 67784b5..120279f 100644
--- a/doc/README.avb2
+++ b/doc/README.avb2
@@ -58,6 +58,7 @@ Slot verification result: ERROR_IO
 ---
 The following options must be enabled:
 CONFIG_LIBAVB=y
+CONFIG_AVB_VERIFY=y
 CONFIG_CMD_AVB=y
 
 
-- 
2.7.4

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[U-Boot] [PATCH 2/2] avb2.0: use block API in AVB ops

2018-07-13 Thread Igor Opaniuk
Use blk_dread()/blk_dwrite() in mmc_read()/mmc_write() AVB operation
implementations. This fixes compilation issues when CONFIG_BLK is
enabled.

Signed-off-by: Igor Opaniuk 
---
 common/avb_verify.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/common/avb_verify.c b/common/avb_verify.c
index f9a00f8..20e35ad 100644
--- a/common/avb_verify.c
+++ b/common/avb_verify.c
@@ -5,6 +5,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -288,8 +289,8 @@ static unsigned long mmc_read_and_flush(struct mmc_part 
*part,
tmp_buf = buffer;
}
 
-   blks = part->mmc->block_dev.block_read(part->mmc_blk,
-   start, sectors, tmp_buf);
+   blks = blk_dread(part->mmc_blk,
+start, sectors, tmp_buf);
/* flush cache after read */
flush_cache((ulong)tmp_buf, sectors * part->info.blksz);
 
@@ -327,8 +328,8 @@ static unsigned long mmc_write(struct mmc_part *part, 
lbaint_t start,
tmp_buf = buffer;
}
 
-   return part->mmc->block_dev.block_write(part->mmc_blk,
-   start, sectors, tmp_buf);
+   return blk_dwrite(part->mmc_blk,
+ start, sectors, tmp_buf);
 }
 
 static struct mmc_part *get_partition(AvbOps *ops, const char *partition)
-- 
2.7.4

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[U-Boot] [PATCH 0/2] avb 2.0: fix multiple compilation issues in sandbox

2018-07-13 Thread Igor Opaniuk
This series of two patches fixes compilation issues when AVB 2.0 is 
enabled for the 'sandbox' architecture:

1. Since libavb library alone is highly portable, it introduce dedicated
Kconfig symbol for AVB compiler-dependent operations, so it's possible
to build libavb separately.
2. Add CONFIG_FASTBOOT dependency, as fastboot buffer is
re-used in partition verification operations.
3. Use blk_dread()/blk_dwrite() in mmc_read()/mmc_write() AVB operation
implementations. This fixes compilation issues when CONFIG_BLK is
enabled.

Igor Opaniuk (2):
  avb2.0: add proper dependencies
  avb2.0: use block API in AVB ops

 cmd/Kconfig | 2 +-
 common/Kconfig  | 7 +++
 common/avb_verify.c | 9 +
 doc/README.avb2 | 1 +
 4 files changed, 14 insertions(+), 5 deletions(-)

--
2.7.4

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[U-Boot] [PATCH 2/2] arm: zynq: add support for the zybo z7 board

2018-07-13 Thread Luis Araneda
The board is manufactured by Digilent
Main features:
- Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
- RAM: 1 GB DDR3L
- FLASH: 16 MB QSPI
- 1 Gbps Ethernet
- USB 2.0
- microSD slot
- Pcam camera connector
- HDMI Tx and Rx
- Audio codec: stereo out, stereo in, mic
- 5 (Z7-10) or 6 (Z7-20) Pmod ports
- 6 push-buttons, 4 switches, 5 LEDs
- 1 (Z7-10) or 2 (Z7-20) RGB LEDs

The device-tree was taken from Linux with some minor corrections

Signed-off-by: Luis Araneda 
---
 arch/arm/dts/Makefile  |  3 +-
 arch/arm/dts/zynq-zybo-z7.dts  | 91 ++
 configs/zynq_zybo_z7_defconfig | 68 +
 3 files changed, 161 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/zynq-zybo-z7.dts
 create mode 100644 configs/zynq_zybo_z7_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 946023093d..cee301a4c6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -145,7 +145,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zc770-xm013.dtb \
zynq-zed.dtb \
zynq-zturn.dtb \
-   zynq-zybo.dtb
+   zynq-zybo.dtb \
+   zynq-zybo-z7.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc0.dtb   \
zynqmp-mini-emmc1.dtb   \
diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts
new file mode 100644
index 00..ad9264e9b1
--- /dev/null
+++ b/arch/arm/dts/zynq-zybo-z7.dts
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  Copyright (C) 2011 - 2015 Xilinx
+ *  Copyright (C) 2012 National Instruments Corp.
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+#include 
+
+/ {
+   model = "Digilent Zybo Z7 board";
+   compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
+
+   aliases {
+   ethernet0 = 
+   serial0 = 
+   spi0 = 
+   i2c0 = 
+   i2c1 = 
+   mmc0 = 
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x4000>;
+   };
+
+   chosen {
+   bootargs = "";
+   stdout-path = "serial0:115200n8";
+   };
+
+   gpio-leds {
+   compatible = "gpio-leds";
+
+   ld4 {
+   label = "zynq-zybo-z7:green:ld4";
+   gpios = < 7 GPIO_ACTIVE_HIGH>;
+   };
+   };
+
+   usb_phy0: phy0 {
+   #phy-cells = <0>;
+   compatible = "usb-nop-xceiv";
+   reset-gpios = < 46 GPIO_ACTIVE_LOW>;
+   };
+};
+
+ {
+   ps-clk-frequency = <>;
+};
+
+ {
+   status = "okay";
+   phy-mode = "rgmii-id";
+   phy-handle = <_phy>;
+
+   ethernet_phy: ethernet-phy@0 {
+   reg = <0>;
+   device_type = "ethernet-phy";
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   dr_mode = "host";
+   usb-phy = <_phy0>;
+};
diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig
new file mode 100644
index 00..068a5a96e2
--- /dev/null
+++ b/configs/zynq_zybo_z7_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x400
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xe0001000
+CONFIG_DEBUG_UART_CLOCK=5000
+CONFIG_SPL_STACK_R_ADDR=0x20
+CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo-z7"
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_PROMPT="Zynq> "
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADFS=y
+CONFIG_CMD_FPGA_LOADMK=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_REALTEK=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_ZYNQ_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
+CONFIG_CI_UDC=y

[U-Boot] [PATCH 0/2] arm: zynq: add support for the zybo z7 board

2018-07-13 Thread Luis Araneda
This series adds support for the Digilent Zybo Z7 board

The only think, that I tested, and is not working yet, is reading the
MAC address from the OTP region of the SPI flash memory, but I pretend
to work on that

I decided to split this series in two patches because the first contains
the ps7_init_* file generated by Vivado and is ~170 kB. I tried to strip
as much as possible from the file (from ~520 kB), but I wanted to preserve
Vivado's comments to compare its output on future versions
(it might have bugfixes).
If the patch doesn't make it to the mailing list, I hope to find
another solution, or I'll just simply remove additional content
(Vivado's comments)


Luis Araneda (2):
  arm: zynq: add ps7_init file for zybo z7
  arm: zynq: add support for the zybo z7 board

 arch/arm/dts/Makefile |3 +-
 arch/arm/dts/zynq-zybo-z7.dts |   91 +
 board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c | 3959 +
 configs/zynq_zybo_z7_defconfig|   68 +
 4 files changed, 4120 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/zynq-zybo-z7.dts
 create mode 100644 board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
 create mode 100644 configs/zynq_zybo_z7_defconfig

-- 
2.18.0

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[U-Boot] [PATCH 1/4] stm32mp1: add gpio led support

2018-07-13 Thread Patrick Delaunay
This patch add the 4 LED available on the ED1 board and activated
gpio led driver.

Signed-off-by: Patrick Delaunay 
---

 arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 24 
 configs/stm32mp15_basic_defconfig|  2 ++
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi 
b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index 5b8be93..e10e4b6 100644
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -13,6 +13,30 @@
mmc1 = 
i2c3 = 
};
+
+   led {
+   compatible = "gpio-leds";
+
+   red {
+   label = "stm32mp:red:status";
+   gpios = < 13 GPIO_ACTIVE_LOW>;
+   default-state = "off";
+   };
+   green {
+   label = "stm32mp:green:user";
+   gpios = < 14 GPIO_ACTIVE_LOW>;
+   default-state = "on";
+   };
+   orange {
+   label = "stm32mp:orange:status";
+   gpios = < 7 GPIO_ACTIVE_HIGH>;
+   default-state = "off";
+   };
+   blue {
+   label = "stm32mp:blue:user";
+   gpios = < 11 GPIO_ACTIVE_HIGH>;
+   };
+   };
 };
 
 _pins_a {
diff --git a/configs/stm32mp15_basic_defconfig 
b/configs/stm32mp15_basic_defconfig
index 3a94db5..dc38bcc 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -29,6 +29,8 @@ CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_DOS_PARTITION is not set
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_STM32F7=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_STM32_SDMMC2=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-- 
2.7.4

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[U-Boot] [PATCH 4/4] stm32mp1: use new function led default state

2018-07-13 Thread Patrick Delaunay
Initialize the led with the default state defined in device tree.

Signed-off-by: Patrick Delaunay 
---

 board/st/stm32mp1/stm32mp1.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index cc39fa6..db8c805 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -22,5 +22,9 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
 
+#ifdef CONFIG_LED
+   led_default_state();
+#endif /* CONFIG_LED */
+
return 0;
 }
-- 
2.7.4

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[U-Boot] [PATCH 3/4] dm: led: move default state support in led uclass

2018-07-13 Thread Patrick Delaunay
This patch save common LED property "default-state" value
in post bind of LED uclass.
The configuration for this default state is only performed when
led_default_state() is called;
It can be called in your board_init()
or it could added in init_sequence_r[] in future.

Signed-off-by: Patrick Delaunay 
---

 drivers/led/led-uclass.c | 54 
 drivers/led/led_gpio.c   |  8 ---
 include/led.h| 23 +
 3 files changed, 77 insertions(+), 8 deletions(-)

diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 2f4d69e..141401d 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -63,8 +64,61 @@ int led_set_period(struct udevice *dev, int period_ms)
 }
 #endif
 
+static int led_post_bind(struct udevice *dev)
+{
+   struct led_uc_plat *uc_pdata;
+   const char *default_state;
+
+   uc_pdata = dev_get_uclass_platdata(dev);
+
+   /* common optional properties */
+   uc_pdata->default_state = LED_DEF_NO;
+   default_state = dev_read_string(dev, "default-state");
+   if (default_state) {
+   if (!strncmp(default_state, "on", 2))
+   uc_pdata->default_state = LED_DEF_ON;
+   else if (!strncmp(default_state, "off", 3))
+   uc_pdata->default_state = LED_DEF_OFF;
+   else if (!strncmp(default_state, "keep", 4))
+   uc_pdata->default_state = LED_DEF_KEEP;
+   }
+
+   return 0;
+}
+
+int led_default_state(void)
+{
+   struct udevice *dev;
+   struct uclass *uc;
+   struct led_uc_plat *uc_pdata;
+   int ret;
+
+   ret = uclass_get(UCLASS_LED, );
+   if (ret)
+   return ret;
+   for (uclass_find_first_device(UCLASS_LED, );
+dev;
+uclass_find_next_device()) {
+   uc_pdata = dev_get_uclass_platdata(dev);
+   if (!uc_pdata || uc_pdata->default_state == LED_DEF_NO)
+   continue;
+   ret = device_probe(dev);
+   if (ret)
+   return ret;
+   if (uc_pdata->default_state == LED_DEF_ON)
+   led_set_state(dev, LEDST_ON);
+   else if (uc_pdata->default_state == LED_DEF_OFF)
+   led_set_state(dev, LEDST_OFF);
+   printf("%s: default_state=%d\n",
+  uc_pdata->label, uc_pdata->default_state);
+   }
+
+   return ret;
+}
+
 UCLASS_DRIVER(led) = {
.id = UCLASS_LED,
.name   = "led",
+   .post_bind  = led_post_bind,
.per_device_platdata_auto_alloc_size = sizeof(struct led_uc_plat),
 };
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index 533587d..93f6b91 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -57,7 +57,6 @@ static int led_gpio_probe(struct udevice *dev)
 {
struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev);
struct led_gpio_priv *priv = dev_get_priv(dev);
-   const char *default_state;
int ret;
 
/* Ignore the top-level LED node */
@@ -68,13 +67,6 @@ static int led_gpio_probe(struct udevice *dev)
if (ret)
return ret;
 
-   default_state = dev_read_string(dev, "default-state");
-   if (default_state) {
-   if (!strncmp(default_state, "on", 2))
-   gpio_led_set_state(dev, LEDST_ON);
-   else if (!strncmp(default_state, "off", 3))
-   gpio_led_set_state(dev, LEDST_OFF);
-   }
return 0;
 }
 
diff --git a/include/led.h b/include/led.h
index 940b97f..ff45f03 100644
--- a/include/led.h
+++ b/include/led.h
@@ -8,12 +8,27 @@
 #define __LED_H
 
 /**
+ * enum led_default_state - The initial state of the LED.
+ * see Documentation/devicetree/bindings/leds/common.txt
+ */
+enum led_def_state_t {
+   LED_DEF_NO,
+   LED_DEF_ON,
+   LED_DEF_OFF,
+   LED_DEF_KEEP
+};
+
+/**
  * struct led_uc_plat - Platform data the uclass stores about each device
  *
  * @label: LED label
+ * @default_state* - The initial state of the LED.
+  see Documentation/devicetree/bindings/leds/common.txt
+ * * - set automatically on device bind by the uclass's '.post_bind' method.
  */
 struct led_uc_plat {
const char *label;
+   enum led_def_state_t default_state;
 };
 
 /**
@@ -106,4 +121,12 @@ enum led_state_t led_get_state(struct udevice *dev);
  */
 int led_set_period(struct udevice *dev, int period_ms);
 
+/**
+ * led_default_state() - set the default state for all the LED
+ *
+ * This enables all leds which have default state.
+ *
+ */
+int led_default_state(void);
+
 #endif
-- 
2.7.4

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[U-Boot] [PATCH 0/4] dm: led: remove auto probe in binding function

2018-07-13 Thread Patrick Delaunay

Hi,

The commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7
introduce auto probe of LED in binding function
but that cause issue on my board.

This first patch of this patchset activateis the LED on my board
to explain the issue, the second patch revert this commit and
the third one propose an other solution.

For me, this commit is a error because in README of doc/driver-model/
it is indicated:

  The device's bind() method is permitted to perform simple actions, but
  should not scan the device tree node, not initialise hardware, nor set up
  structures or allocate memory. All of these tasks should be left for
  the probe() method.

And in the patch the LED driver is probed during the binding scan.

When I activated the LED in my ARM target with the patch
"stm32mp1: add gpio led support", I have the sequence:

dm_init_and_scan() :

1/ dm_scan_fdt_node()
=> loop on all the node

2/ scan for LED node
=> probe of LED driver is forced by "default-state" detection
LED1 - "red"
=> probe of father of "red" node
A - led
B - soc
C - root
=> probe of node needed by GPIO
1 - pin-controller
2 - gpio@50002000
3 - rcc-clk@5000
4 - rcc@5000

=> probe forced by default state for other led
LED2 - green
LED3 - orange

=> probe of node needed by GPIO (other bank)
5 - gpio@50009000

3/ dm_extended_scan_fdt scan continue...
   scan node "fixed-clock" under "/clocks"
clk-hse
clk-hsi
clk-lse
clk-lsi
clk-csi

4/ probe of all the used devices after dm_extended_scan_fdt()

So many driver are probed before the end of the scan binding loop !

And that cause issue in my board (boot failed) because the rcc-clk clock
driver found the input frequency with these fixed-clock, which are binded
only after the stm32mp1 clock driver probe.

For me probe in forbidden in binding function and
thus uclass_get_device_tail() is not allowed in the commit
bc882f5d5c7b4d6ed5e927bf838863af43c786e7 which need to be reverted.

In the third patch I proposed an other solution based
on the existing solution in u-class regulator used to enable
regulator with "boot on" property (see regulators_enable_boot_on function).

I think that adding a function is the  better solution in the driver model
to force probe for some node according binding information
(after dm_init_and_scan call).

This new function should be called in board_init function for each board
but it could be also added in init_sequence_r[] in future.



Patrick Delaunay (4):
  stm32mp1: add gpio led support
  Revert "dm: led: auto probe() LEDs with "default-state""
  dm: led: move default state support in led uclass
  stm32mp1: use new function led default state

 arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 24 ++
 board/st/stm32mp1/stm32mp1.c |  4 +++
 configs/stm32mp15_basic_defconfig|  2 ++
 drivers/led/led-uclass.c | 54 
 drivers/led/led_gpio.c   | 17 --
 include/led.h| 23 ++
 6 files changed, 107 insertions(+), 17 deletions(-)

-- 
2.7.4

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[U-Boot] [PATCH 2/4] Revert "dm: led: auto probe() LEDs with "default-state""

2018-07-13 Thread Patrick Delaunay
This reverts commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7.

Signed-off-by: Patrick Delaunay 
---

 drivers/led/led_gpio.c | 9 -
 1 file changed, 9 deletions(-)

diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index a36942b..533587d 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 
 struct led_gpio_priv {
struct gpio_desc gpio;
@@ -118,14 +117,6 @@ static int led_gpio_bind(struct udevice *parent)
return ret;
uc_plat = dev_get_uclass_platdata(dev);
uc_plat->label = label;
-
-   if (ofnode_read_bool(node, "default-state")) {
-   struct udevice *devp;
-
-   ret = uclass_get_device_tail(dev, 0, );
-   if (ret)
-   return ret;
-   }
}
 
return 0;
-- 
2.7.4

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[U-Boot] [PATCH v2] gpio: xilinx: Convert driver to DM

2018-07-13 Thread Michal Simek
This patch is enabling GPIO_DM support to have an option to use this
driver together with zynq gpio driver.
!DM part is kept there till Microblaze is cleanup which will be done
hopefully soon.

Just a note:
There is no reason to initialize uc-priv->name because it is completely
unused.

Signed-off-by: Michal Simek 
---

Changes in v2:
- Show value in set_value when debug is enabled
- Implement xlate function
- Remove tabs from structures for alignment (to be consistent with the
  rest of code)

 drivers/gpio/xilinx_gpio.c | 265 -
 1 file changed, 264 insertions(+), 1 deletion(-)

diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 74c5be0865d1..48b52c985a55 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (c) 2013 Xilinx, Michal Simek
+ * Copyright (c) 2013 - 2018 Xilinx, Michal Simek
  */
 
 #include 
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static LIST_HEAD(gpio_list);
 
@@ -23,6 +24,8 @@ struct gpio_regs {
u32 gpiodir;
 };
 
+#if !defined(CONFIG_DM_GPIO)
+
 #define GPIO_NAME_SIZE 10
 
 struct gpio_names {
@@ -345,3 +348,263 @@ int gpio_alloc_dual(u32 baseaddr, const char *name, u32 
gpio_no0, u32 gpio_no1)
/* Return the first gpio allocated for this device */
return ret;
 }
+#else
+#include 
+
+#define XILINX_GPIO_MAX_BANK   2
+
+struct xilinx_gpio_platdata {
+   struct gpio_regs *regs;
+   int bank_max[XILINX_GPIO_MAX_BANK];
+   int bank_input[XILINX_GPIO_MAX_BANK];
+   int bank_output[XILINX_GPIO_MAX_BANK];
+};
+
+static int xilinx_gpio_get_bank_pin(unsigned offset, u32 *bank_num,
+   u32 *bank_pin_num, struct udevice *dev)
+{
+   struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+   u32 bank, max_pins;
+   /* the first gpio is 0 not 1 */
+   u32 pin_num = offset;
+
+   for (bank = 0; bank < XILINX_GPIO_MAX_BANK; bank++) {
+   max_pins = platdata->bank_max[bank];
+   if (pin_num < max_pins) {
+   debug("%s: found at bank 0x%x pin 0x%x\n", __func__,
+ bank, pin_num);
+   *bank_num = bank;
+   *bank_pin_num = pin_num;
+   return 0;
+   }
+   pin_num -= max_pins;
+   }
+
+   return -EINVAL;
+}
+
+static int xilinx_gpio_set_value(struct udevice *dev, unsigned offset,
+int value)
+{
+   struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+   int val, ret;
+   u32 bank, pin;
+
+   ret = xilinx_gpio_get_bank_pin(offset, , , dev);
+   if (ret)
+   return ret;
+
+   debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x\n",
+ __func__, (ulong)platdata->regs, value, offset, bank, pin);
+
+   if (value) {
+   val = readl(>regs->gpiodata + bank * 2);
+   val = val | (1 << pin);
+   writel(val, >regs->gpiodata + bank * 2);
+   } else {
+   val = readl(>regs->gpiodata + bank * 2);
+   val = val & ~(1 << pin);
+   writel(val, >regs->gpiodata + bank * 2);
+   }
+
+   return val;
+};
+
+static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
+{
+   struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+   int val, ret;
+   u32 bank, pin;
+
+   ret = xilinx_gpio_get_bank_pin(offset, , , dev);
+   if (ret)
+   return ret;
+
+   debug("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__,
+ (ulong)platdata->regs, offset, bank, pin);
+
+   val = readl(>regs->gpiodata + bank * 2);
+   val = !!(val & (1 << pin));
+
+   return val;
+};
+
+static int xilinx_gpio_get_function(struct udevice *dev, unsigned offset)
+{
+   struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+   int val, ret;
+   u32 bank, pin;
+
+   /* Check if all pins are inputs */
+   if (platdata->bank_input[bank])
+   return GPIOF_INPUT;
+
+   /* Check if all pins are outputs */
+   if (platdata->bank_output[bank])
+   return GPIOF_OUTPUT;
+
+   ret = xilinx_gpio_get_bank_pin(offset, , , dev);
+   if (ret)
+   return ret;
+
+   /* FIXME test on dual */
+   val = readl(>regs->gpiodir + bank * 2);
+   val = !(val & (1 << pin));
+
+   /* input is 1 in reg but GPIOF_INPUT is 0 */
+   /* output is 0 in reg but GPIOF_OUTPUT is 1 */
+
+   return val;
+}
+
+static int xilinx_gpio_direction_output(struct udevice *dev, unsigned offset,
+   int value)
+{
+   struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+   int val, ret;
+   u32 bank, pin;
+
+   ret = xilinx_gpio_get_bank_pin(offset, , , 

[U-Boot] [PATCH] sysreset: Add support for Microblaze soft reset jump

2018-07-13 Thread Michal Simek
Microblaze is storing reset vector at address 0x0.
It means soft reset can be done by just jumping to this address.
This code was in platform code but sysreset interface is providing
enough capabilities to have more options how to reset the system. It can
go from gpio reset through watchdog reset till soft reset.

The driver has not compatible string because this is cpu specific and DM
core is not able to detect compatible string in DT root that's why this
driver will be instantiated from platform code by calling
device_bind_driver(gd->dm_root, "mb_soft_reset", "reset_soft",
NULL);
It should be bind as the last reset method to ensure that hw reset is
called before this.

Signed-off-by: Michal Simek 
---

 drivers/sysreset/Kconfig   |  6 ++
 drivers/sysreset/Makefile  |  1 +
 drivers/sysreset/sysreset_microblaze.c | 30 ++
 3 files changed, 37 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_microblaze.c

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 1e228b97443a..f282d77bf9f5 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -21,6 +21,12 @@ config SYSRESET_GPIO
help
  Restart support via GPIO pin connected reset logic.
 
+config SYSRESET_MICROBLAZE
+   bool "Enable support for Microblaze soft reset"
+   depends on MICROBLAZE
+   help
+ This is soft reset on Microblaze which does jump to 0x0 address.
+
 config SYSRESET_PSCI
bool "Enable support for PSCI System Reset"
depends on ARM_PSCI_FW
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index ca533cfefaad..223a0716f0a3 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
 obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
+obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
diff --git a/drivers/sysreset/sysreset_microblaze.c 
b/drivers/sysreset/sysreset_microblaze.c
new file mode 100644
index ..514c95817f2f
--- /dev/null
+++ b/drivers/sysreset/sysreset_microblaze.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Xilinx, Inc. - Michal Simek
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int microblaze_sysreset_request(struct udevice *dev,
+  enum sysreset_t type)
+{
+   puts("Microblaze soft reset sysreset\n");
+   __asm__ __volatile__ (" mts rmsr, r0;" \
+   "bra r0");
+
+   return -EINPROGRESS;
+}
+
+static struct sysreset_ops microblaze_sysreset = {
+   .request = microblaze_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_microblaze) = {
+   .id = UCLASS_SYSRESET,
+   .name   = "mb_soft_reset",
+   .ops= _sysreset,
+};
-- 
1.9.1

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Re: [U-Boot] [PATCH] mtd: nand: denali: Replace the ad-hoc cache management with bouncebuf

2018-07-13 Thread Masahiro Yamada
2018-07-13 23:51 GMT+09:00 Marek Vasut :
> On 07/13/2018 01:05 PM, Masahiro Yamada wrote:
>> 2018-07-13 19:58 GMT+09:00 Marek Vasut :
>>> On 07/13/2018 12:52 PM, Masahiro Yamada wrote:
 2018-07-13 19:35 GMT+09:00 Marek Vasut :
> On 07/13/2018 12:22 PM, Masahiro Yamada wrote:
>> 2018-07-13 19:18 GMT+09:00 Marek Vasut :
>>> On 07/13/2018 12:09 PM, Masahiro Yamada wrote:
 Hi Marek

 2018-07-13 17:56 GMT+09:00 Marek Vasut :
> On 07/13/2018 10:23 AM, Masahiro Yamada wrote:
>> Hi Marek,
>>
>> 2018-07-13 16:59 GMT+09:00 Marek Vasut :
>>> On 07/13/2018 07:13 AM, Masahiro Yamada wrote:
 2018-07-12 21:51 GMT+09:00 Marek Vasut :
> On 06/20/2018 09:14 AM, Masahiro Yamada wrote:
>> Hi Marek,
>
> Hi!
>
>> 2018-06-20 13:43 GMT+09:00 Marek Vasut :
>>> On 06/19/2018 08:39 AM, Masahiro Yamada wrote:
 Hi Marek,
>>>
>>> Hi,
>>>
 2018-06-08 5:17 GMT+09:00 Marek Vasut :
> Replace the ad-hoc DMA cache management functions with common 
> bouncebuf,
> since those functions are not handling cases where unaligned 
> buffer is
> passed in,


 Were you hit by a problem,
 or just-in-case replacement?
>>>
>>> Yes, UBI triggers unaligned cache operations on my system 
>>> (SoCFPGA).
 I thought I took care of the buffer alignment.

 The bounce buffer is allocated by kmalloc():
 https://github.com/u-boot/u-boot/blob/v2018.05/drivers/mtd/nand/denali.c#L1348

 According to the lib/linux_compat.c implementation,
 it returns memory aligned with ARCH_DMA_MINALIGN.


 If the buffer is passed from the upper MTD layer,
 the NAND core also makes sure the enough alignment:
 https://github.com/u-boot/u-boot/blob/v2018.05/drivers/mtd/nand/denali.c#L1273

 This is how this driver works in Linux.

 I'd rather want to keep the current code
 unless this is a real problem,


 One possible clean-up is to move dma_(un)map_single to a 
 common place.
>>> Is there any chance you can try UBI on the denali nand on 
>>> uniphier ? :)
>>
>>
>> I tested the driver only for raw block devices.
>>
>> OK, I will test UBI on my platform.
>>
>> BTW, do you see the problem only in U-Boot?
>> Is the denali driver in Linux working fine?
>
> Bump on this one ?
>

 Sorry for delay.


 UBI is working for me without your patch.

 Not sure what is the difference.

 I will dig into it a little more, though.
>>>
>>> Verify that you're not seeing any unaligned cache flushes. I do.
>>
>>
>> Yeah, I am testing it now,
>> but I never see 'Misaligned operation at range' when using UBI.
>>
>> However, I found a simple way to trigger the warning
>> in raw device access.
>>
>>
>>
>> => nand  read  8110   0  1000
>>
>> NAND read: device 0 offset 0x0, size 0x1000
>> CACHE: Misaligned operation at range [8110, 81001010]
>> CACHE: Misaligned operation at range [8110, 81001010]
>> CACHE: Misaligned operation at range [8110, 81001010]
>> CACHE: Misaligned operation at range [8110, 81001010]
>>  4096 bytes read: OK
>>
>>
>>
>>
>> I can fix it with one liner.
>>
>>
>>
>> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
>> index 6266c8a..f391727 100644
>> --- a/drivers/mtd/nand/denali.c
>> +++ b/drivers/mtd/nand/denali.c
>> @@ -1270,7 +1270,7 @@ int denali_init(struct denali_nand_info 
>> *denali)
>> denali->dma_avail = 1;
>>
>> if (denali->dma_avail) {
>> -   chip->buf_align = 16;
>> +   chip->buf_align = ARCH_DMA_MINALIGN;
>> if (denali->caps & DENALI_CAP_DMA_64BIT)
>> denali->setup_dma = denali_setup_dma64;
>> else
>>
>>
>> I guess this will work for you too.
>
> Doesn't that only 

Re: [U-Boot] [PATCH] serial: ns16550: Add register shift variable

2018-07-13 Thread Alexander Graf

On 07/13/2018 04:43 PM, Felix Brack wrote:

This patch adds a new Kconfig variable that allows setting
the register shift value for the ns16550 driver to some other
value then 0 if not defined by the DT. All credit for this
patch goes to Lokesh Vutla as it was his idea.

The motivation for writing this patch originates in the
effort of synchronizing U-Boot DT to Linux DT for am33xx SOCs.
The current am33xx.dtsi file from U-Boot defines the 
property for all UART nodes. The actual (4.18+) am33xx.dtsi
file from Linux does not define  anymore. To prevent


How does Linux determine the shift value then?


Alex


(probably difficult) changes in many .dts and .dtsi files once
the synchronization is done, one can use this new variable. For
the pdu001 board, for example, SYS_NS16550_REG_SHIFT is set
to 2; no need to clutter U-Boot and board specific dts files
with  properties.

Signed-off-by: Felix Brack 
---

  drivers/serial/Kconfig   | 12 
  drivers/serial/ns16550.c |  3 ++-
  2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 766e5ce..c80ad4d 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -530,6 +530,18 @@ config SYS_NS16550
  be used. It can be a constant or a function to get clock, eg,
  get_serial_clock().
  
+config SYS_NS16550_REG_SHIFT

+   int "Number of bytes to shift register offsets"
+   default 0
+   depends on SYS_NS16550
+   help
+ Use this to specify the amount of bytes between discrete
+ device registers. If, for example, the device registers are
+ located at 0x00, 0x04, 0x08, 0x0C and so forth than set
+ this to 2. The default value is 0.
+ Note that a  property defined in a UART node of
+ the device tree will always take precedence.
+
  config INTEL_MID_SERIAL
bool "Intel MID platform UART support"
depends on DM_SERIAL && OF_CONTROL
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 9c80090..9ff6dbe 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -442,7 +442,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
  #endif
  
  	plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);

-   plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
+   plat->reg_shift = dev_read_u32_default(dev, "reg-shift",
+  CONFIG_SYS_NS16550_REG_SHIFT);
  
  	err = clk_get_by_index(dev, 0, );

if (!err) {



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Re: [U-Boot] SoCFPGA PL330 DMA driver and ECC scrubbing

2018-07-13 Thread Marek Vasut
On 07/13/2018 02:50 PM, Jason Rush wrote:
> On 7/11/2018 1:54 PM, Marek Vasut wrote:
>> On 07/11/2018 07:30 PM, Trent Piepho wrote:
>>> On Wed, 2018-07-11 at 08:56 -0500, Jason Rush wrote:
 On 7/11/2018 8:48 AM, Marek Vasut wrote:
> On 07/11/2018 03:49 PM, Jason Rush wrote:
>> My mistake.  I did disable the dcache after scrubbing too.  The
>> code is almost identical to the Arria10 code where after
>> scrubbing it flushes the dcache, then turns it off.
>>
>> The weird reset problems happens if I scrub the area where
>> u-boot relocates to with the dcache on, then turn dcache off.
>>
>> I tried to also tried turning the MMU off, but that didn't help.
> Maybe there are some data used by the SPL there ? I think the SPL has
> malloc area in RAM at some point.
>
 I thought something similar, so I narrowed it down to clearing
 just from where U-Boot relocates to the end of DRAM.  If I'm
 correct, that includes where U-Boot relocates and where the
 MMU tables are normally stored.
>>> I wonder if the reset does not properly reset the CPU caches?  The idea
>>> being that the CPU cache has stale data from before the reset, or maybe
>>> just stale tag bits, and the hang is due to using this bad data from
>>> the cache.
>> That's why we do dcache_off() icache_off() first, to make sure the
>> caches are in consistent state. But a good point nonetheless, this
>> should be checked.
> I call dcache_off() and icache_off() after scrubbing, and I
> verified the MMU control register indicated they were off.
>>> Or perhaps there is always something done incorrectly, but it is only
>>> the state of DRAM after a reset, vs a power cycle, that consistently
>>> triggers a hang?
>> The SoCFPGA has some weird warm/cold reset hooks even in the bootrom,
>> could be. But the DRAM should be torn down in either case.
> Maybe there is something wrong with the reset hooks? I could try
> and clear the on chip RAM after U-Boot relocates just to see what
> happens.  Or there is probably an enable for the hooks I could try
> and disable.

Warm reset just jumps into OCRAM. Maybe the code in OCRAM is corrupted.

Cold reset reloads the OCRAM content from flash/sdmmc.

>>> If possible, try to add code before the hang point to invalidate both
>>> the i-cache and d-cache for the problem region above.  Perhaps the SPL
>>> is doing something wrong w.r.t. cache invalidation, e.g. moving code
>>> around and not updating the i-cache, because it assumes nothing has yet
>>> used the caches, which is now no longer the case since you turn them on
>>> for scrubbing.
>>>
> After scrubbing I first call flush_dcache_all(), then I added calls to
> invalidate_icache_all() and invalidate_dcache_all(), and finally I
> call dcache_off() and icache_off().  I wasn't sure about the order
> I should call them, but there was no change.
> 


-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] mtd: nand: denali: Replace the ad-hoc cache management with bouncebuf

2018-07-13 Thread Marek Vasut
On 07/13/2018 01:05 PM, Masahiro Yamada wrote:
> 2018-07-13 19:58 GMT+09:00 Marek Vasut :
>> On 07/13/2018 12:52 PM, Masahiro Yamada wrote:
>>> 2018-07-13 19:35 GMT+09:00 Marek Vasut :
 On 07/13/2018 12:22 PM, Masahiro Yamada wrote:
> 2018-07-13 19:18 GMT+09:00 Marek Vasut :
>> On 07/13/2018 12:09 PM, Masahiro Yamada wrote:
>>> Hi Marek
>>>
>>> 2018-07-13 17:56 GMT+09:00 Marek Vasut :
 On 07/13/2018 10:23 AM, Masahiro Yamada wrote:
> Hi Marek,
>
> 2018-07-13 16:59 GMT+09:00 Marek Vasut :
>> On 07/13/2018 07:13 AM, Masahiro Yamada wrote:
>>> 2018-07-12 21:51 GMT+09:00 Marek Vasut :
 On 06/20/2018 09:14 AM, Masahiro Yamada wrote:
> Hi Marek,

 Hi!

> 2018-06-20 13:43 GMT+09:00 Marek Vasut :
>> On 06/19/2018 08:39 AM, Masahiro Yamada wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>> 2018-06-08 5:17 GMT+09:00 Marek Vasut :
 Replace the ad-hoc DMA cache management functions with common 
 bouncebuf,
 since those functions are not handling cases where unaligned 
 buffer is
 passed in,
>>>
>>>
>>> Were you hit by a problem,
>>> or just-in-case replacement?
>>
>> Yes, UBI triggers unaligned cache operations on my system 
>> (SoCFPGA).
>>> I thought I took care of the buffer alignment.
>>>
>>> The bounce buffer is allocated by kmalloc():
>>> https://github.com/u-boot/u-boot/blob/v2018.05/drivers/mtd/nand/denali.c#L1348
>>>
>>> According to the lib/linux_compat.c implementation,
>>> it returns memory aligned with ARCH_DMA_MINALIGN.
>>>
>>>
>>> If the buffer is passed from the upper MTD layer,
>>> the NAND core also makes sure the enough alignment:
>>> https://github.com/u-boot/u-boot/blob/v2018.05/drivers/mtd/nand/denali.c#L1273
>>>
>>> This is how this driver works in Linux.
>>>
>>> I'd rather want to keep the current code
>>> unless this is a real problem,
>>>
>>>
>>> One possible clean-up is to move dma_(un)map_single to a common 
>>> place.
>> Is there any chance you can try UBI on the denali nand on 
>> uniphier ? :)
>
>
> I tested the driver only for raw block devices.
>
> OK, I will test UBI on my platform.
>
> BTW, do you see the problem only in U-Boot?
> Is the denali driver in Linux working fine?

 Bump on this one ?

>>>
>>> Sorry for delay.
>>>
>>>
>>> UBI is working for me without your patch.
>>>
>>> Not sure what is the difference.
>>>
>>> I will dig into it a little more, though.
>>
>> Verify that you're not seeing any unaligned cache flushes. I do.
>
>
> Yeah, I am testing it now,
> but I never see 'Misaligned operation at range' when using UBI.
>
> However, I found a simple way to trigger the warning
> in raw device access.
>
>
>
> => nand  read  8110   0  1000
>
> NAND read: device 0 offset 0x0, size 0x1000
> CACHE: Misaligned operation at range [8110, 81001010]
> CACHE: Misaligned operation at range [8110, 81001010]
> CACHE: Misaligned operation at range [8110, 81001010]
> CACHE: Misaligned operation at range [8110, 81001010]
>  4096 bytes read: OK
>
>
>
>
> I can fix it with one liner.
>
>
>
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index 6266c8a..f391727 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -1270,7 +1270,7 @@ int denali_init(struct denali_nand_info *denali)
> denali->dma_avail = 1;
>
> if (denali->dma_avail) {
> -   chip->buf_align = 16;
> +   chip->buf_align = ARCH_DMA_MINALIGN;
> if (denali->caps & DENALI_CAP_DMA_64BIT)
> denali->setup_dma = denali_setup_dma64;
> else
>
>
> I guess this will work for you too.

 Doesn't that only apply if DMA is available ?
>>>
>>> Of course.
>>> If you use PIO instead of DMA,
>>> you do not need to perform cache operation, right?
>>>
>>>
>>>

[U-Boot] [PATCH] serial: ns16550: Add register shift variable

2018-07-13 Thread Felix Brack
This patch adds a new Kconfig variable that allows setting
the register shift value for the ns16550 driver to some other
value then 0 if not defined by the DT. All credit for this
patch goes to Lokesh Vutla as it was his idea.

The motivation for writing this patch originates in the
effort of synchronizing U-Boot DT to Linux DT for am33xx SOCs.
The current am33xx.dtsi file from U-Boot defines the 
property for all UART nodes. The actual (4.18+) am33xx.dtsi
file from Linux does not define  anymore. To prevent
(probably difficult) changes in many .dts and .dtsi files once
the synchronization is done, one can use this new variable. For
the pdu001 board, for example, SYS_NS16550_REG_SHIFT is set
to 2; no need to clutter U-Boot and board specific dts files
with  properties.

Signed-off-by: Felix Brack 
---

 drivers/serial/Kconfig   | 12 
 drivers/serial/ns16550.c |  3 ++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 766e5ce..c80ad4d 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -530,6 +530,18 @@ config SYS_NS16550
  be used. It can be a constant or a function to get clock, eg,
  get_serial_clock().
 
+config SYS_NS16550_REG_SHIFT
+   int "Number of bytes to shift register offsets"
+   default 0
+   depends on SYS_NS16550
+   help
+ Use this to specify the amount of bytes between discrete
+ device registers. If, for example, the device registers are
+ located at 0x00, 0x04, 0x08, 0x0C and so forth than set
+ this to 2. The default value is 0.
+ Note that a  property defined in a UART node of
+ the device tree will always take precedence.
+
 config INTEL_MID_SERIAL
bool "Intel MID platform UART support"
depends on DM_SERIAL && OF_CONTROL
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 9c80090..9ff6dbe 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -442,7 +442,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 #endif
 
plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
-   plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
+   plat->reg_shift = dev_read_u32_default(dev, "reg-shift",
+  CONFIG_SYS_NS16550_REG_SHIFT);
 
err = clk_get_by_index(dev, 0, );
if (!err) {
-- 
2.7.4

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Re: [U-Boot] [PATCH 0/2] dm: Complete CONFIG_BLK migration

2018-07-13 Thread Adam Ford
On Fri, Jun 29, 2018 at 3:21 PM Adam Ford  wrote:
>
> On Fri, Jun 29, 2018 at 2:09 PM Tom Rini  wrote:
> >
> > On Thu, Jun 28, 2018 at 09:30:19PM -0500, Derald D. Woods wrote:
> > > On Thu, Jun 28, 2018 at 10:47:36AM -0500, Adam Ford wrote:
> > > > On Wed, Jun 27, 2018 at 4:41 PM Tom Rini  wrote:
> > > > >
> > > > > On Sat, Jun 23, 2018 at 07:59:30AM -0600, Simon Glass wrote:
> > > > > > The time has come to migrate all boards to use CONFIG_BLK. This 
> > > > > > series
> > > > > > is just a test to see what boards would have to be removed if we 
> > > > > > required
> > > > > > CONFIG_BLK, as we plan to after the next release.
> > > > > >
> > > > > > This should help maintainers see what is impacted.
> > > > > >
> > > > > > Hopefully maintainers will be able to convert their boards over in 
> > > > > > the
> > > > > > next month so we we can avoid having to remove any boards.
> > > > > >
> > > > > > The goal is to have all boards use driver model. But so far, we do 
> > > > > > allow
> > > > > > CONFIG_DM to not be defined.
> > > > > >
> > > > > >
> > > > > > For 'Force BLK', here is the buildman output showing failed boards 
> > > > > > and the
> > > > > > relatively small number of command errors:
> > > > > >
> > > > > > 03: Force BLK
> > > > > >   mips:  +   pic32mzdask
> > > > > >arm:  +   mixtile_loftq colibri_imx6_nospl sniper 
> > > > > > omap3_zoom1 tbs2910 Mele_A1000G_quad
> > > > > > am335x_igep003x mx6ul_14x14_evk mk802_a10s am43xx_hs_evm devkit3250 
> > > > > > pcm051_rev3
> > > > > > am57xx_hs_evm Empire_electronix_m712 Auxtek-T003 pcm058 zc5202 
> > > > > > am335x_shc
> > > > > > am335x_shc_ict Hummingbird_A31 vining_2000 am335x_evm_usbspl 
> > > > > > ot1200_spl igep00x0
> > > > > > Mele_I7 Wobo_i5 r7-tv-dongle liteboard omap3_overo am335x_boneblack 
> > > > > > evb-ast2500
> > > > > > warp7 gwventana_gw5904 cairo A13-OLinuXinoM mccmon6_sd 
> > > > > > apalis_imx6_nospl_it
> > > > > > wandboard birdland_bav335a colibri_imx7 colibri_imx6 inet_q972 
> > > > > > xpress_spl
> > > > > > stm32f429-evaluation udoo_neo igep0032 Mele_M9 A13-OLinuXino 
> > > > > > inet98v_rev2
> > > > > > A10s-OLinuXino-M riotboard snapper9260 am43xx_evm pfla02 
> > > > > > mx6qsabrelite
> > > > > > apalis_imx6_nospl_com s5p_goni colibri_pxa270 snapper9g20
> > > > > > Yones_Toptech_BS1078_V2 am335x_shc_sdboot_prompt k2g_hs_evm 
> > > > > > cl-som-imx7
> > > > > > am335x_shc_sdboot vf610twr_nand stm32f469-discovery am335x_evm_nor 
> > > > > > mx53cx9020
> > > > > > Empire_electronix_d709 vf610twr cm_t43 pengwyn stm32f746-disco 
> > > > > > Sinovoip_BPI_M2
> > > > > > Sinovoip_BPI_M3 Sinlinx_SinA31s pico-imx7d am43xx_evm_rtconly 
> > > > > > LicheePi_Zero
> > > > > > pcm051_rev1 mccmon6_nor mx6sabreauto display5_factory 
> > > > > > am335x_shc_prompt
> > > > > > gwventana_nand Bananapi_M2_Ultra Auxtek-T004 tbs_a711 cm_t335 
> > > > > > h8_homlet_v2
> > > > > > Colombus am43xx_evm_usbhost_boot chiliboard am335x_baltos colibri_vf
> > > > > > mx6ul_9x9_evk kp_imx6q_tpc bk4r1 udoo difrnce_dit4350 
> > > > > > am335x_evm_norboot
> > > > > > UTOO_P66 iNet_86VS marsboard MSI_Primo81 apalis_imx6 
> > > > > > bananapi_m2_berry
> > > > > > xilinx_zynqmp_r5 birdland_bav335b am43xx_evm_qspiboot CSQ_CS908 
> > > > > > Ampe_A76
> > > > > > kp_imx53 am335x_evm_spiboot Cubietruck_plus k2g_evm mx6sabresd 
> > > > > > omap3_logic
> > > > > > pepper colorfly_e708_q1 pcm052 gwventana_emmc am335x_boneblack_vboot
> > > > > > am335x_shc_netboot xpress ot1200 cgtqmx6eval zc5601 devkit8000 
> > > > > > dh_imx6 mx6cuboxi
> > > > > > am57xx_evm am335x_sl50 q8_a13_tablet sksimx6
> > > > > >
> > > > > > microblaze:  +   microblaze-generic
> > > > > >powerpc:  +   P1010RDB-PA_36BIT_NOR_SECBOOT 
> > > > > > BSC9132QDS_SDCARD_DDRCLK100_SECURE
> > > > > > P1010RDB-PB_SPIFLASH_SECBOOT T1024QDS_DDR4_SECURE_BOOT
> > > > > > controlcenterd_36BIT_SDCARD BSC9132QDS_SDCARD_DDRCLK133_SECURE
> > > > > > P1010RDB-PA_SPIFLASH_SECBOOT BSC9132QDS_NAND_DDRCLK133_SECURE
> > > > > > P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P2041RDB_SECURE_BOOT 
> > > > > > P5020DS_NAND_SECURE_BOOT
> > > > > > P1010RDB-PB_36BIT_NOR_SECBOOT BSC9132QDS_NOR_DDRCLK100_SECURE
> > > > > > P3041DS_SECURE_BOOT T1042D4RDB_SECURE_BOOT T1042RDB_SECURE_BOOT
> > > > > > T4240QDS_SECURE_BOOT P1010RDB-PB_36BIT_SPIFLASH_SECBOOT 
> > > > > > P1010RDB-PB_NAND_SECBOOT
> > > > > > BSC9132QDS_SPIFLASH_DDRCLK100_SECURE P3041DS_NAND_SECURE_BOOT
> > > > > > T4160QDS_SECURE_BOOT T2080RDB_SECURE_BOOT B4860QDS_SECURE_BOOT
> > > > > > P4080DS_SECURE_BOOT T2080QDS_SECURE_BOOT P5040DS_SECURE_BOOT
> > > > > > P1010RDB-PB_36BIT_NAND_SECBOOT controlcenterd_36BIT_SDCARD_DEVELOP
> > > > > > P1010RDB-PA_NAND_SECBOOT BSC9132QDS_SPIFLASH_DDRCLK133_SECURE
> > > > > > P1010RDB-PA_NOR_SECBOOT controlcenterd_TRAILBLAZER_DEVELOP 
> > > > > > P5020DS_SECURE_BOOT
> > > > > > T1024QDS_SECURE_BOOT T1040QDS_SECURE_BOOT 
> > > > > > BSC9132QDS_NOR_DDRCLK133_SECURE
> > > > > > T1024RDB_SECURE_BOOT P5040DS_NAND_SECURE_BOOT 

[U-Boot] [PATCH v2 3/3] dfu: Provide more verbose error message

2018-07-13 Thread Sam Protsenko
It might be useful for user to see some human-readable root cause
message in addition to "configuration failed" message, so that the issue
can be fixed quickly.

Signed-off-by: Sam Protsenko 
---
Changes in v2:
  - None

 drivers/dfu/dfu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 5b9abd685d..318949529b 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -71,6 +71,7 @@ int dfu_init_env_entities(char *interface, char *devstr)
ret = dfu_config_entities(env_bkp, interface, devstr);
if (ret) {
pr_err("DFU entities configuration failed!\n");
+   pr_err("(partition table does not match dfu_alt_info?)\n");
goto done;
}
 
-- 
2.18.0

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[U-Boot] [PATCH v2 2/3] dfu: Fix memory leak in dfu_init_env_entities()

2018-07-13 Thread Sam Protsenko
In case of error in dfu_init_env_entities(), env_bkp will leak. Fix it
by providing single return path.

Signed-off-by: Sam Protsenko 
---
Changes in v2:
  - None

 drivers/dfu/dfu.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index a3c09334b7..5b9abd685d 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -56,7 +56,7 @@ int dfu_init_env_entities(char *interface, char *devstr)
 {
const char *str_env;
char *env_bkp;
-   int ret;
+   int ret = 0;
 
 #ifdef CONFIG_SET_DFU_ALT_INFO
set_dfu_alt_info(interface, devstr);
@@ -71,11 +71,12 @@ int dfu_init_env_entities(char *interface, char *devstr)
ret = dfu_config_entities(env_bkp, interface, devstr);
if (ret) {
pr_err("DFU entities configuration failed!\n");
-   return ret;
+   goto done;
}
 
+done:
free(env_bkp);
-   return 0;
+   return ret;
 }
 
 static unsigned char *dfu_buf;
-- 
2.18.0

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[U-Boot] [PATCH v2 1/3] dfu: Fix data abort in dfu_free_entities()

2018-07-13 Thread Sam Protsenko
Commit 5d8fae79163e ("dfu: avoid memory leak") brings a regression which
described below. This patch is effectively reverting that commit, adding
corresponding comment to avoid such regressions in future.

In case of error in dfu_config_entities(), it frees "dfu" array, which
leads to "data abort" in dfu_free_entities(), which tries to free the
same array (and even tries to access it from linked list first). The
issue occurs e.g. when partition table on device does not match
$dfu_alt_info layout:

=> dfu 0 mmc 1
Couldn't find part #2 on mmc device #1
DFU entities configuration failed!
data abort

To fix this issue, do not free "dfu" array in dfu_config_entities(). It
will be freed later in dfu_free_entities().

Tested on BeagleBone Black (where this regression was originally found).

Signed-off-by: Sam Protsenko 
---
Changes in v2:
  - Improve commit message by mentioning regression commit

 drivers/dfu/dfu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index e7c91193b9..a3c09334b7 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -462,7 +462,7 @@ int dfu_config_entities(char *env, char *interface, char 
*devstr)
ret = dfu_fill_entity([i], s, alt_num_cnt, interface,
  devstr);
if (ret) {
-   free(dfu);
+   /* We will free "dfu" in dfu_free_entities() */
return -1;
}
 
-- 
2.18.0

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Re: [U-Boot] [PATCH 1/3] dfu: Fix data abort in dfu_free_entities()

2018-07-13 Thread Sam Protsenko
Hi Lukasz,

On Fri, Jul 13, 2018 at 12:49 PM, Lukasz Majewski  wrote:
> Hi Sam,
>
>> The story of this change goes further... Just checked the reason, the
>> bug was introduced here [1]. So we can either use my patch (which adds
>> corresponding comment to ensure we won't "fix" it later), or the whole
>> design of dfu_config_entities() vs dfu_free_entities() should be
>> revised.
>>
>> Lukasz, what do you think about this?
>
> Your patch seems OK to me. I've checked all use cases and in the error
> path the dfu_free_entities() is called.
>

The patch itself is ok. What I'm trying to say, is that design of
dfu_config_entities() is not very good. It allocates memory for "dfu"
array, and on error it doesn't free it, relying on dfu_free_entities()
to free it later. That's why Coverity reported it as a memory leak in
a first place (though it was false positive of course). But such a
design is not what user of the function usually expects. Better design
(as for my taste) would be if dfu_config_entities() cleans up
everything on error, so that even if user doesn't call
dfu_free_entities() after calling dfu_config_entities() (with return
on error), there is no memory leak involved. This way it would be
easier to control code flow, and Coverity will be happy too.

I suggest next: let's merge this patch as is (at least it makes things
work as originally intended), and if my thoughts on design make sense
to you, dfu_config_entities() can be reworked in further commits.
Sounds ok?

I will send v2 with improved commit message soon.

>
> (Or have I misunderstood something) ?
>
>>
>> [1]
>> http://git.denx.de/?p=u-boot.git;a=commit;h=5d8fae79163e94671956c99654abf48cf49757ba
>>
>> On Fri, Jul 13, 2018 at 12:52 AM, Sam Protsenko
>>  wrote:
>> > In case of error in dfu_config_entities(), it frees "dfu" array,
>> > which leads to "data abort" in dfu_free_entities(), which tries to
>> > free the same array (and even tries to access it from linked list
>> > first). The issue occurs e.g. when partition table on device does
>> > not match $dfu_alt_info layout:
>> >
>> > => dfu 0 mmc 1 list
>> > Couldn't find part #2 on mmc device #1
>> > DFU entities configuration failed!
>> > data abort
>> >
>> > To fix this issue, do not free "dfu" array in
>> > dfu_config_entities(). It will be freed later in
>> > dfu_free_entities().
>> >
>> > Signed-off-by: Sam Protsenko 
>> > ---
>> >  drivers/dfu/dfu.c | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
>> > index e7c91193b9..a3c09334b7 100644
>> > --- a/drivers/dfu/dfu.c
>> > +++ b/drivers/dfu/dfu.c
>> > @@ -462,7 +462,7 @@ int dfu_config_entities(char *env, char
>> > *interface, char *devstr) ret = dfu_fill_entity([i], s,
>> > alt_num_cnt, interface, devstr);
>> > if (ret) {
>> > -   free(dfu);
>> > +   /* We will free "dfu" in
>> > dfu_free_entities() */ return -1;
>> > }
>> >
>> > --
>> > 2.18.0
>> >
>
>
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] [PATCH 1/3] dfu: Fix data abort in dfu_free_entities()

2018-07-13 Thread Sam Protsenko
On Fri, Jul 13, 2018 at 5:32 AM, Andy Shevchenko
 wrote:
> On Fri, Jul 13, 2018 at 1:10 AM, Sam Protsenko
>  wrote:
>> The story of this change goes further... Just checked the reason, the
>> bug was introduced here [1]. So we can either use my patch (which adds
>> corresponding comment to ensure we won't "fix" it later), or the whole
>> design of dfu_config_entities() vs dfu_free_entities() should be
>> revised.
>
> Effectively you are reverting that commit, perhaps make it clear in
> commit message that this is a revert.
>

Yeah, I just found that commit after sending my patch. Will add that
info in v2, thanks.

>>
>> Lukasz, what do you think about this?
>>
>> [1] 
>> http://git.denx.de/?p=u-boot.git;a=commit;h=5d8fae79163e94671956c99654abf48cf49757ba
>>
>> On Fri, Jul 13, 2018 at 12:52 AM, Sam Protsenko
>>  wrote:
>>> In case of error in dfu_config_entities(), it frees "dfu" array, which
>>> leads to "data abort" in dfu_free_entities(), which tries to free the
>>> same array (and even tries to access it from linked list first). The
>>> issue occurs e.g. when partition table on device does not match
>>> $dfu_alt_info layout:
>>>
>>> => dfu 0 mmc 1 list
>>> Couldn't find part #2 on mmc device #1
>>> DFU entities configuration failed!
>>> data abort
>>>
>>> To fix this issue, do not free "dfu" array in dfu_config_entities(). It
>>> will be freed later in dfu_free_entities().
>>>
>>> Signed-off-by: Sam Protsenko 
>>> ---
>>>  drivers/dfu/dfu.c | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
>>> index e7c91193b9..a3c09334b7 100644
>>> --- a/drivers/dfu/dfu.c
>>> +++ b/drivers/dfu/dfu.c
>>> @@ -462,7 +462,7 @@ int dfu_config_entities(char *env, char *interface, 
>>> char *devstr)
>>> ret = dfu_fill_entity([i], s, alt_num_cnt, interface,
>>>   devstr);
>>> if (ret) {
>>> -   free(dfu);
>>> +   /* We will free "dfu" in dfu_free_entities() */
>>> return -1;
>>> }
>>>
>>> --
>>> 2.18.0
>>>
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>
>
> --
> With Best Regards,
> Andy Shevchenko
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[U-Boot] [RFC] cmd: add bootslot command to select/boot slot based on boot counts

2018-07-13 Thread Martin Hundebøll
The existing bootcount feature is targeted systems with a primary, and a
rescue boot setup, where the number of boot tries to the primary boot is
tracked. If the number exceeds the limit, the alternative/rescue is
booted.

This patch adds support for a more sophisticated setup, where more than
two boot slots can exist, and the order of slots can be configured.

The 'bootcommand' command reads the configured slots (and their
priority/order) from a configured environment variable ("bootslots" by
default). For each conifgured slot, a remaining boot count is maintained
in an evnironment variable ("bootcount_" by default). If the first
boot slot has positive boot count, it is booted using the slot specific
boot command ("bootcmd_" by default). Otherwise the next slot is
checked.

An example environment when using the bootslot command with two slots
("a" and "b"):

bootslots=a b
bootcount_a=3
bootcount_b=3
bootcmd_a=setenv bootargs $bootargs root=/dev/mmcblk0p1; booti $loadaddr
bootcmd_b=setenv bootargs $bootargs root=/dev/mmcblk0p2; booti $loadaddr

Once linux is booted, it resets the bootcount variable for the booted
slot using "fw_setenv":

> fw_setenv bootcount_a 3

When the non-booted slot is updated, the order is updated by setting the
bootslots variable with "fw_setenv":

> fw_setenv bootslots=b a

Signed-off-by: Martin Hundebøll 
---
 cmd/Kconfig|  42 +
 cmd/Makefile   |   1 +
 cmd/bootslot.c | 225 +
 3 files changed, 268 insertions(+)
 create mode 100644 cmd/bootslot.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index aec209006d..3919606e74 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1277,6 +1277,48 @@ config CMD_BOOTCOUNT
  Enable the bootcount command, which allows interrogation and
  reset of the bootcounter.
 
+config CMD_BOOTSLOT
+   bool "Enable support for multiple boot slots"
+   help
+ Parses an ordered list of configured boot slot names (e.g. "a b")
+ and selects a corresponding boot command based on the current
+ boot counter for each slot.
+
+config CMD_BOOTSLOT_ENV_SLOTS
+   string "Environment variable to read bootslots from"
+   depends on CMD_BOOTSLOT
+   default "bootslots"
+   help
+ Configures the environment variable to read out when looking for a
+ list of available boot sloots.
+
+config CMD_BOOTSLOT_ENV_COUNT
+   string "Environment variable format string to read/write slot boot 
count from/to"
+   depends on CMD_BOOTSLOT
+   default "bootcount_%s"
+   help
+ Configures the prefix to use when reading the boot count for a
+ specific slot. The prefix is concatenated with the slot name, so
+ that the boot count for slot "a" is read and saved to "a".
+
+config CMD_BOOTSLOT_ENV_CMD
+   string "Environment variable format string to read slot boot command 
from"
+   depends on CMD_BOOTSLOT
+   default "bootcmd_%s"
+   help
+ Configures the prefix to use when reading the boot command for
+ specific slot. The prefix is concatenated with the slot name, so
+ that the boot command for slot "a" is read from "a".
+
+config CMD_BOOTSLOT_DEFAULT_COUNT
+   int "Default boot count for each configured slot"
+   depends on CMD_BOOTSLOT
+   default 3
+   help
+ The default number of times a slot is tried before proceeding to the
+ slot. The default is used when a slot has no count yet, or when it
+ is reset with the "bootslot reset" command.
+
 config CMD_BSP
bool "Enable board-specific commands"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index 323f1fd2c7..68c8e50c91 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_CMD_BOOTCOUNT) += bootcount.o
 obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
 obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
+obj-$(CONFIG_CMD_BOOTSLOT) += bootslot.o
 obj-$(CONFIG_CMD_BOOTZ) += bootz.o
 obj-$(CONFIG_CMD_BOOTI) += booti.o
 obj-$(CONFIG_CMD_BTRFS) += btrfs.o
diff --git a/cmd/bootslot.c b/cmd/bootslot.c
new file mode 100644
index 00..03897b1f60
--- /dev/null
+++ b/cmd/bootslot.c
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2018, Geanix, All rights reserved.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static char *bootslot_envname(const char *fmt, const char *slot)
+{
+   int len = strlen(fmt) + strlen(slot);
+   char *envname = malloc(len + 1);
+
+   sprintf(envname, fmt, slot);
+
+   return envname;
+}
+
+static unsigned long bootslot_get_count(const char *slot)
+{
+   char *envname;
+   unsigned long count;
+
+   envname = bootslot_envname(CONFIG_CMD_BOOTSLOT_ENV_COUNT, slot);
+   count = env_get_ulong(envname, 10, CONFIG_CMD_BOOTSLOT_DEFAULT_COUNT);
+   free(envname);
+
+   return count;
+}
+
+static void 

Re: [U-Boot] [PATCH] sysreset: Add support for gpio-restart

2018-07-13 Thread Dr. Philipp Tomsich

> On 13 Jul 2018, at 11:15, Michal Simek  wrote:
> 
> The Linux kernel has binding for gpio-restart node.
> This patch is adding basic support without supporting any optional
> properties.

Nice. This may also give us an opportunity to streamline some of the reset
logic (and the FDT-interface to the ATF) on our RK3399-Q7 board.

> This driver was tested on Microblaze system where gpio is connected to
> SoC reset logic.
> Output value is handled via gpios cells values.
> 
> In gpio_reboot_request() set_value is writing 1 because
> dm_gpio_set_value() is capable to changing it when it is ACTIVE_LOW.
> ...
>   if (desc->flags & GPIOD_ACTIVE_LOW)
>   value = !value;
> ...
> 
> Signed-off-by: Michal Simek 

Reviewed-by: Philipp Tomsich 

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Re: [U-Boot] SoCFPGA PL330 DMA driver and ECC scrubbing

2018-07-13 Thread Jason Rush
On 7/11/2018 1:54 PM, Marek Vasut wrote:
> On 07/11/2018 07:30 PM, Trent Piepho wrote:
>> On Wed, 2018-07-11 at 08:56 -0500, Jason Rush wrote:
>>> On 7/11/2018 8:48 AM, Marek Vasut wrote:
 On 07/11/2018 03:49 PM, Jason Rush wrote:
> My mistake.  I did disable the dcache after scrubbing too.  The
> code is almost identical to the Arria10 code where after
> scrubbing it flushes the dcache, then turns it off.
>
> The weird reset problems happens if I scrub the area where
> u-boot relocates to with the dcache on, then turn dcache off.
>
> I tried to also tried turning the MMU off, but that didn't help.
 Maybe there are some data used by the SPL there ? I think the SPL has
 malloc area in RAM at some point.

>>> I thought something similar, so I narrowed it down to clearing
>>> just from where U-Boot relocates to the end of DRAM.  If I'm
>>> correct, that includes where U-Boot relocates and where the
>>> MMU tables are normally stored.
>> I wonder if the reset does not properly reset the CPU caches?  The idea
>> being that the CPU cache has stale data from before the reset, or maybe
>> just stale tag bits, and the hang is due to using this bad data from
>> the cache.
> That's why we do dcache_off() icache_off() first, to make sure the
> caches are in consistent state. But a good point nonetheless, this
> should be checked.
I call dcache_off() and icache_off() after scrubbing, and I
verified the MMU control register indicated they were off.
>> Or perhaps there is always something done incorrectly, but it is only
>> the state of DRAM after a reset, vs a power cycle, that consistently
>> triggers a hang?
> The SoCFPGA has some weird warm/cold reset hooks even in the bootrom,
> could be. But the DRAM should be torn down in either case.
Maybe there is something wrong with the reset hooks? I could try
and clear the on chip RAM after U-Boot relocates just to see what
happens.  Or there is probably an enable for the hooks I could try
and disable.
>> If possible, try to add code before the hang point to invalidate both
>> the i-cache and d-cache for the problem region above.  Perhaps the SPL
>> is doing something wrong w.r.t. cache invalidation, e.g. moving code
>> around and not updating the i-cache, because it assumes nothing has yet
>> used the caches, which is now no longer the case since you turn them on
>> for scrubbing.
>>
After scrubbing I first call flush_dcache_all(), then I added calls to
invalidate_icache_all() and invalidate_dcache_all(), and finally I
call dcache_off() and icache_off().  I wasn't sure about the order
I should call them, but there was no change.

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[U-Boot] [PATCH v4 20/27] mtd: declare MTD_PARTITIONS symbol in Kconfig

2018-07-13 Thread Miquel Raynal
UBI selects MTD_PARTITIONS which is the symbol to compile
drivers/mtd/mtdpart.c. Unfortunately, the symbol was not defined in
Kconfig and this worked only with board files defining it. Fix this by
adding a boolean in Kconfig so boards defined by defconfig files only
will work as expected.

Signed-off-by: Miquel Raynal 
---
 drivers/mtd/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 5f52e9b3f8..c2c7250661 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -1,5 +1,8 @@
 menu "MTD Support"
 
+config MTD_PARTITIONS
+   bool
+
 config MTD
bool "Enable Driver Model for MTD drivers"
depends on DM
-- 
2.14.1

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[U-Boot] [PATCH v4 25/27] mtd: uclass: add probe function

2018-07-13 Thread Miquel Raynal
The user might want to trigger the probe of any MTD device, export these
functions so they can be called from a command source file.

Signed-off-by: Miquel Raynal 
---
 drivers/mtd/mtd-uclass.c | 9 +
 include/linux/mtd/mtd.h  | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/drivers/mtd/mtd-uclass.c b/drivers/mtd/mtd-uclass.c
index 9ca049c437..9a9470410c 100644
--- a/drivers/mtd/mtd-uclass.c
+++ b/drivers/mtd/mtd-uclass.c
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -13,6 +14,14 @@
  * The uclass private is pointed to mtd_info.
  */
 
+int mtd_probe(struct udevice *dev)
+{
+   if (device_active(dev))
+   return 0;
+
+   return device_probe(dev);
+}
+
 UCLASS_DRIVER(mtd) = {
.id = UCLASS_MTD,
.name   = "mtd",
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index cba1b9e875..285875f4cf 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -537,5 +537,8 @@ int mtd_arg_off_size(int argc, char *const argv[], int 
*idx, loff_t *off,
 void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset,
  const uint64_t length, uint64_t *len_incl_bad,
  int *truncated);
+
+int mtd_probe(struct udevice *dev);
+
 #endif
 #endif /* __MTD_MTD_H__ */
-- 
2.14.1

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[U-Boot] [PATCH v4 26/27] cmd: mtd: add 'mtd' command

2018-07-13 Thread Miquel Raynal
There should not be a 'nand' command, a 'sf' command and certainly not
another 'spi-nand'. Write a 'mtd' command instead to manage all MTD
devices at once. This should be the preferred way to access any MTD
device.

Signed-off-by: Miquel Raynal 
---
 cmd/Kconfig |   7 +
 cmd/Makefile|   1 +
 cmd/mtd.c   | 392 
 drivers/mtd/Makefile|   2 +-
 include/linux/mtd/mtd.h |   1 +
 5 files changed, 402 insertions(+), 1 deletion(-)
 create mode 100644 cmd/mtd.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 2fa0829925..8ed39ec67a 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -848,6 +848,13 @@ config CMD_MMC_SWRITE
  Enable support for the "mmc swrite" command to write Android sparse
  images to eMMC.
 
+config CMD_MTD
+   bool "mtd"
+   depends on CMD_MTDPARTS
+   select MTD_PARTITIONS
+   help
+ MTD commands support.
+
 config CMD_NAND
bool "nand"
default y if NAND_SUNXI
diff --git a/cmd/Makefile b/cmd/Makefile
index 323f1fd2c7..32fd102189 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -90,6 +90,7 @@ obj-$(CONFIG_CMD_MISC) += misc.o
 obj-$(CONFIG_CMD_MMC) += mmc.o
 obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
 obj-$(CONFIG_MP) += mp.o
+obj-$(CONFIG_CMD_MTD) += mtd.o
 obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
 obj-$(CONFIG_CMD_NAND) += nand.o
 obj-$(CONFIG_CMD_NET) += net.o
diff --git a/cmd/mtd.c b/cmd/mtd.c
new file mode 100644
index 00..221b12500f
--- /dev/null
+++ b/cmd/mtd.c
@@ -0,0 +1,392 @@
+// SPDX-License-Identifier:  GPL-2.0+
+/*
+ * mtd.c
+ *
+ * Generic command to handle basic operations on any memory device.
+ *
+ * Copyright: Bootlin, 2018
+ * Author: Miquèl Raynal 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static void mtd_dump_buf(u8 *buf, uint len, uint offset)
+{
+   int i, j;
+
+   for (i = 0; i < len; ) {
+   printf("0x%08x:\t", offset + i);
+   for (j = 0; j < 8; j++)
+   printf("%02x ", buf[i + j]);
+   printf(" ");
+   i += 8;
+   for (j = 0; j < 8; j++)
+   printf("%02x ", buf[i + j]);
+   printf("\n");
+   i += 8;
+   }
+}
+
+static void mtd_show_device(struct mtd_info *mtd)
+{
+   /* Device */
+   printf("* %s", mtd->name);
+   if (mtd->dev)
+   printf(" [device: %s] [parent: %s] [driver: %s]",
+  mtd->dev->name, mtd->dev->parent->name,
+  mtd->dev->driver->name);
+   printf("\n");
+
+   /* MTD information */
+   printf("\t> type: ");
+   switch (mtd->type) {
+   case MTD_RAM:
+   printf("RAM\n");
+   break;
+   case MTD_ROM:
+   printf("ROM\n");
+   break;
+   case MTD_NORFLASH:
+   printf("NOR flash\n");
+   break;
+   case MTD_NANDFLASH:
+   printf("NAND flash\n");
+   break;
+   case MTD_DATAFLASH:
+   printf("Data flash\n");
+   break;
+   case MTD_UBIVOLUME:
+   printf("UBI volume\n");
+   break;
+   case MTD_MLCNANDFLASH:
+   printf("MLC NAND flash\n");
+   break;
+   case MTD_ABSENT:
+   default:
+   printf("Unknown\n");
+   break;
+   }
+
+   printf("\t> Size: 0x%llx bytes\n", mtd->size);
+   printf("\t> Block: 0x%x bytes\n", mtd->erasesize);
+   printf("\t> Min I/O: 0x%x bytes\n", mtd->writesize);
+
+   if (mtd->oobsize) {
+   printf("\t> OOB size: %u bytes\n", mtd->oobsize);
+   printf("\t> OOB available: %u bytes\n", mtd->oobavail);
+   }
+
+   if (mtd->ecc_strength) {
+   printf("\t> ECC strength: %u bits\n", mtd->ecc_strength);
+   printf("\t> ECC step size: %u bytes\n", mtd->ecc_step_size);
+   printf("\t> Bitflip threshold: %u bits\n",
+  mtd->bitflip_threshold);
+   }
+}
+
+int mtd_probe_devices(void)
+{
+   const char *mtdparts = env_get("mtdparts");
+   struct udevice *dev;
+   int idx = 0;
+
+   /* Probe devices with DM compliant drivers */
+   while (!uclass_find_device(UCLASS_MTD, idx, ) && dev) {
+   mtd_probe(dev);
+   idx++;
+   }
+
+   /* Create the partitions defined in mtdparts, here the fun begins */
+
+   /* Ignore the extra 'mtdparts=' prefix if any */
+   if (strstr(mtdparts, "mtdparts="))
+   mtdparts += 9;
+
+   /* For each MTD device in mtdparts */
+   while (mtdparts[0] != '\0') {
+   struct mtd_partition *parts;
+   struct mtd_info *parent;
+   char mtdname[20];
+   int mtdname_len, len, ret;
+
+   mtdname_len = strchr(mtdparts, ':') - mtdparts;
+

[U-Boot] [PATCH v4 22/27] cmd: mtdparts: accept spi-nand devices

2018-07-13 Thread Miquel Raynal
Let spi-nand devices be recognized by mtdparts. This is superfluous
but a full mtdparts rework would be very time-consuming.

Signed-off-by: Miquel Raynal 
---
 cmd/mtdparts.c  | 13 -
 include/jffs2/load_kernel.h |  7 +--
 2 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index c401009133..1d504e0693 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -37,7 +37,7 @@
  * mtdids=[,,...]
  *
  * := =
- *:= 'nand'|'nor'|'onenand'
+ *:= 'nand'|'nor'|'onenand'|'spi-nand'
  *   := mtd device number, 0...
  *:= unique device tag used by linux kernel to find mtd device 
(mtd->name)
  *
@@ -336,7 +336,7 @@ static int part_validate_eraseblock(struct mtdids *id, 
struct part_info *part)
 
if (!mtd->numeraseregions) {
/*
-* Only one eraseregion (NAND, OneNAND or uniform NOR),
+* Only one eraseregion (NAND, SPI-NAND, OneNAND or uniform 
NOR),
 * checking for alignment is easy here
 */
offset = part->offset;
@@ -1027,7 +1027,7 @@ static struct mtdids* id_find_by_mtd_id(const char 
*mtd_id, unsigned int mtd_id_
 }
 
 /**
- * Parse device id string  := 'nand'|'nor'|'onenand',
+ * Parse device id string  := 
'nand'|'nor'|'onenand'|'spi-nand',
  * return device type and number.
  *
  * @param id string describing device id
@@ -1051,6 +1051,9 @@ int mtd_id_parse(const char *id, const char **ret_id, u8 
*dev_type,
} else if (strncmp(p, "onenand", 7) == 0) {
*dev_type = MTD_DEV_TYPE_ONENAND;
p += 7;
+   } else if (strncmp(p, "spi-nand", 8) == 0) {
+   *dev_type = MTD_DEV_TYPE_SPINAND;
+   p += 8;
} else {
printf("incorrect device type in %s\n", id);
return 1;
@@ -1633,7 +1636,7 @@ static int parse_mtdids(const char *const ids)
while(p && (*p != '\0')) {
 
ret = 1;
-   /* parse 'nor'|'nand'|'onenand' */
+   /* parse 'nor'|'nand'|'onenand'|'spi-nand' */
if (mtd_id_parse(p, , , ) != 0)
break;
 
@@ -2109,7 +2112,7 @@ static char mtdparts_help_text[] =
"'mtdids' - linux kernel mtd device id <-> u-boot device id mapping\n\n"
"mtdids=[,,...]\n\n"
":= =\n"
-   "   := 'nand'|'nor'|'onenand'\n"
+   "   := 'nand'|'nor'|'onenand'|'spi-nand'\n"
"  := mtd device number, 0...\n"
"   := unique device tag used by linux kernel to find mtd 
device (mtd->name)\n\n"
"'mtdparts' - partition list\n\n"
diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h
index 1ddff062ad..9346d7ee9f 100644
--- a/include/jffs2/load_kernel.h
+++ b/include/jffs2/load_kernel.h
@@ -15,9 +15,12 @@
 #define MTD_DEV_TYPE_NOR   0x0001
 #define MTD_DEV_TYPE_NAND  0x0002
 #define MTD_DEV_TYPE_ONENAND   0x0004
+#define MTD_DEV_TYPE_SPINAND   0x0008
 
-#define MTD_DEV_TYPE(type) ((type == MTD_DEV_TYPE_NAND) ? "nand" : \
-   (type == MTD_DEV_TYPE_ONENAND) ? "onenand" : "nor")
+#define MTD_DEV_TYPE(type) (type == MTD_DEV_TYPE_NAND ? "nand" :   \
+   (type == MTD_DEV_TYPE_NOR ? "nor" : \
+(type == MTD_DEV_TYPE_ONENAND ? "onenand" : \
+ "spi-nand"))) \
 
 struct mtd_device {
struct list_head link;
-- 
2.14.1

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[U-Boot] [PATCH v4 24/27] cmd: mtdparts: remove useless 'mtdparts=' prefix

2018-07-13 Thread Miquel Raynal
All U-Boot users must define the mtdparts environment variable with:
setenv mtdparts mtdparts=...

This is a pure software limitation and is a complete non-sense. Remove
this limitation but keep the backward compatibility.

Signed-off-by: Miquel Raynal 
---
 cmd/mtdparts.c | 17 ++---
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index da0b6bfb05..eac03cb273 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -44,7 +44,7 @@
  *
  * 'mtdparts' - partition list
  *
- * mtdparts=mtdparts=[;...]
+ * mtdparts=[mtdparts=][;...]
  *
  *   := :[,...]
  *:= unique device tag used by linux kernel to find mtd device 
(mtd->name)
@@ -62,11 +62,11 @@
  *
  * 1 NOR Flash, with 1 single writable partition:
  * mtdids=nor0=edb7312-nor
- * mtdparts=mtdparts=edb7312-nor:-
+ * mtdparts=[mtdparts=]edb7312-nor:-
  *
  * 1 NOR Flash with 2 partitions, 1 NAND with one
  * mtdids=nor0=edb7312-nor,nand0=edb7312-nand
- * mtdparts=mtdparts=edb7312-nor:256k(ARMboot)ro,-(root);edb7312-nand:-(home)
+ * mtdparts=[mtdparts=]edb7312-nor:256k(ARMboot)ro,-(root);edb7312-nand:-(home)
  *
  */
 
@@ -1167,9 +1167,6 @@ static int generate_mtdparts(char *buf, u32 buflen)
return 0;
}
 
-   strcpy(p, "mtdparts=");
-   p += 9;
-
list_for_each(dentry, ) {
dev = list_entry(dentry, struct mtd_device, link);
 
@@ -1640,11 +1637,9 @@ static int parse_mtdparts(const char *const mtdparts)
if (!p)
p = mtdparts;
 
-   if (strncmp(p, "mtdparts=", 9) != 0) {
-   printf("mtdparts variable doesn't start with 'mtdparts='\n");
-   return err;
-   }
-   p += 9;
+   /* Skip the useless prefix, if any */
+   if (strncmp(p, "mtdparts=", 9) == 0)
+   p += 9;
 
while (*p != '\0') {
err = 1;
-- 
2.14.1

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[U-Boot] [PATCH v4 23/27] cmd: mtdparts: add a generic 'mtdparts' parser

2018-07-13 Thread Miquel Raynal
The current parser is very specific to U-Boot mtdparts implementation.
It does not use MTD structures like mtd_info and mtd_partition. Write
some kind of a wrapper around the current implementation to allow other
commands to benefit from this parsing in a user-friendly way.

This new command will allocate an mtd_partition array for each
successful call. This array must be freed after use by the caller.
The given 'mtdparts' buffer pointer will be moved forward to the next
MTD device (if any, it will point towards a '\0' character otherwise).

Signed-off-by: Miquel Raynal 
---
 cmd/mtdparts.c | 71 ++
 include/linux/mtd/partitions.h |  3 ++
 2 files changed, 74 insertions(+)

diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index 1d504e0693..da0b6bfb05 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -78,6 +78,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #if defined(CONFIG_CMD_NAND)
 #include 
@@ -705,6 +706,76 @@ static int part_parse(const char *const partdef, const 
char **ret, struct part_i
return 0;
 }
 
+int mtdparts_parse_part(struct mtd_info *parent, const char **_mtdparts,
+   struct mtd_partition **_parts, int *_nb_parts)
+{
+   const char *mtdparts = *_mtdparts;
+   struct part_info *part_legacy;
+   struct mtd_partition *parts;
+   int cur_off = 0, cur_sz = 0;
+   int nb_parts = 0;
+   char *names;
+   int ret, idx;
+
+   *_parts = NULL;
+   *_nb_parts = 0;
+
+   /* First, iterate over the partitions until we know their number */
+   while (mtdparts[0] != '\0' && mtdparts[0] != ';') {
+   ret = part_parse(mtdparts, , _legacy);
+   if (ret)
+   return ret;
+
+   nb_parts++;
+   free(part_legacy);
+   }
+
+   /* Allocate an array of partitions to give back to the caller */
+   parts = malloc((sizeof(*parts) + 20) * nb_parts);
+   names = (char *)[nb_parts];
+   if (!parts) {
+   printf("Could not allocate enough space to save partitions 
meta-data\n");
+   return -ENOMEM;
+   }
+
+   /* Iterate again over each partition to save the data in our array */
+   for (idx = 0; idx < nb_parts; idx++) {
+   char *name;
+
+   ret = part_parse(*_mtdparts, _mtdparts, _legacy);
+   if (ret)
+   return ret;
+
+   name = [idx * 20];
+   strncpy(name, part_legacy->name, 20);
+   parts[idx].name = name;
+
+   parts[idx].size = part_legacy->size;
+   if (parts[idx].size == SIZE_REMAINING)
+   parts[idx].size = parent->size - cur_sz;
+   cur_sz += parts[idx].size;
+
+   parts[idx].offset = part_legacy->offset;
+   if (parts[idx].offset == OFFSET_NOT_SPECIFIED)
+   parts[idx].offset = cur_off;
+   cur_off += parts[idx].size;
+
+   parts[idx].mask_flags = part_legacy->mask_flags;
+   parts[idx].ecclayout = parent->ecclayout;
+
+   free(part_legacy);
+   }
+
+   /* Offset by one mtdparts to point to the next device if needed */
+   if (*_mtdparts[0] == ';')
+   _mtdparts++;
+
+   *_parts = parts;
+   *_nb_parts = nb_parts;
+
+   return 0;
+}
+
 /**
  * Check device number to be within valid range for given device type.
  *
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index ce0e8dbee4..0cf26ca945 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -87,4 +87,7 @@ int mtd_add_partition(struct mtd_info *master, const char 
*name,
 int mtd_del_partition(struct mtd_info *master, int partno);
 uint64_t mtd_get_device_size(const struct mtd_info *mtd);
 
+int mtdparts_parse_part(struct mtd_info *parent, const char **_mtdparts,
+   struct mtd_partition **_parts, int *_nb_parts);
+
 #endif
-- 
2.14.1

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[U-Boot] [PATCH v4 13/27] spi: Extend the core to ease integration of SPI memory controllers

2018-07-13 Thread Miquel Raynal
From: Boris Brezillon 

Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.

This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).

Signed-off-by: Boris Brezillon 
Signed-off-by: Miquel Raynal 
---
 drivers/spi/Kconfig   |   7 +
 drivers/spi/Makefile  |   1 +
 drivers/spi/spi-mem.c | 500 ++
 include/spi-mem.h | 258 ++
 include/spi.h |  11 ++
 5 files changed, 777 insertions(+)
 create mode 100644 drivers/spi/spi-mem.c
 create mode 100644 include/spi-mem.h

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index f5960a7c95..91f1e360c9 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -18,6 +18,13 @@ config DM_SPI
 
 if DM_SPI
 
+config SPI_MEM
+   bool "SPI memory extension"
+   help
+ Enable this option if you want to enable the SPI memory extension.
+ This extension is meant to simplify interaction with SPI memories
+ by providing an high-level interface to send memory-like commands.
+
 config ALTERA_SPI
bool "Altera SPI driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index e73b0cd7d5..9c2bfa3fb1 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -8,6 +8,7 @@ ifdef CONFIG_DM_SPI
 obj-y += spi-uclass.o
 obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o
 obj-$(CONFIG_SOFT_SPI) += soft_spi.o
+obj-$(CONFIG_SPI_MEM) += spi-mem.o
 else
 obj-y += spi.o
 obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
new file mode 100644
index 00..07ce799170
--- /dev/null
+++ b/drivers/spi/spi-mem.c
@@ -0,0 +1,500 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Exceet Electronics GmbH
+ * Copyright (C) 2018 Bootlin
+ *
+ * Author: Boris Brezillon 
+ */
+
+#ifndef __UBOOT__
+#include 
+#include 
+#include "internals.h"
+#else
+#include 
+#include 
+#endif
+
+#ifndef __UBOOT__
+/**
+ * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
+ *   memory operation
+ * @ctlr: the SPI controller requesting this dma_map()
+ * @op: the memory operation containing the buffer to map
+ * @sgt: a pointer to a non-initialized sg_table that will be filled by this
+ *  function
+ *
+ * Some controllers might want to do DMA on the data buffer embedded in @op.
+ * This helper prepares everything for you and provides a ready-to-use
+ * sg_table. This function is not intended to be called from spi drivers.
+ * Only SPI controller drivers should use it.
+ * Note that the caller must ensure the memory region pointed by
+ * op->data.buf.{in,out} is DMA-able before calling this function.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
+  const struct spi_mem_op *op,
+  struct sg_table *sgt)
+{
+   struct device *dmadev;
+
+   if (!op->data.nbytes)
+   return -EINVAL;
+
+   if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
+   dmadev = ctlr->dma_tx->device->dev;
+   else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
+   dmadev = ctlr->dma_rx->device->dev;
+   else
+   dmadev = ctlr->dev.parent;
+
+   if (!dmadev)
+   return -EINVAL;
+
+   return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
+  op->data.dir == SPI_MEM_DATA_IN ?
+  DMA_FROM_DEVICE : DMA_TO_DEVICE);
+}
+EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
+
+/**
+ * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
+ * memory operation
+ * @ctlr: the SPI controller requesting this dma_unmap()
+ * @op: the memory operation containing the buffer to unmap
+ * @sgt: a pointer to an sg_table previously initialized by
+ *  spi_controller_dma_map_mem_op_data()
+ *
+ * Some controllers might want to do DMA on the data buffer embedded in @op.
+ * This helper prepares things so that the CPU can access the
+ * op->data.buf.{in,out} buffer again.
+ *
+ * This function is not intended to be called from SPI drivers. Only SPI
+ * controller drivers should use it.
+ *
+ * This function should be called after the DMA operation has finished and is
+ * only valid if the previous spi_controller_dma_map_mem_op_data() call
+ * returned 0.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
+

[U-Boot] [PATCH v4 18/27] mtd: spinand: Add initial support for the MX35LF2GE4AB chip

2018-07-13 Thread Miquel Raynal
Add support for the MX35LF2GE4AB chip, which is similar to its cousin
MX35LF1GE4AB, with two planes instead of one.

Signed-off-by: Miquel Raynal 
---
 drivers/mtd/nand/spi/macronix.c | 20 ++--
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index dd351dcb6c..662c561e50 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -27,13 +27,13 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
SPINAND_PROG_LOAD(false, 0, NULL, 0));
 
-static int mx35lf1ge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
+static int mx35lfxge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
  struct mtd_oob_region *region)
 {
return -ERANGE;
 }
 
-static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd, int section,
+static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section,
   struct mtd_oob_region *region)
 {
if (section)
@@ -45,9 +45,9 @@ static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd, 
int section,
return 0;
 }
 
-static const struct mtd_ooblayout_ops mx35lf1ge4ab_ooblayout = {
-   .ecc = mx35lf1ge4ab_ooblayout_ecc,
-   .free = mx35lf1ge4ab_ooblayout_free,
+static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
+   .ecc = mx35lfxge4ab_ooblayout_ecc,
+   .free = mx35lfxge4ab_ooblayout_free,
 };
 
 static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
@@ -102,8 +102,16 @@ static const struct spinand_info macronix_spinand_table[] 
= {
  _cache_variants,
  _cache_variants),
 SPINAND_HAS_QE_BIT,
-SPINAND_ECCINFO(_ooblayout,
+SPINAND_ECCINFO(_ooblayout,
 mx35lf1ge4ab_ecc_get_status)),
+   SPINAND_INFO("MX35LF2GE4AB", 0x22,
+NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+NAND_ECCREQ(4, 512),
+SPINAND_INFO_OP_VARIANTS(_cache_variants,
+ _cache_variants,
+ _cache_variants),
+SPINAND_HAS_QE_BIT,
+SPINAND_ECCINFO(_ooblayout, NULL)),
 };
 
 static int macronix_spinand_detect(struct spinand_device *spinand)
-- 
2.14.1

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[U-Boot] [PATCH v4 21/27] cmd: ubi: delete useless and misleading definitions

2018-07-13 Thread Miquel Raynal
These definitions are simply not used and are misleading because similar
definitions exist in jffs2/load_kernel.h and are used widely to define
MTD device types (which is, by the way, totally redundant with what the
MTD core does). Remove these definitions.

Signed-off-by: Miquel Raynal 
---
 cmd/ubi.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/cmd/ubi.c b/cmd/ubi.c
index ac9a582437..2e8290c1a2 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -27,11 +27,6 @@
 #undef ubi_msg
 #define ubi_msg(fmt, ...) printf("UBI: " fmt "\n", ##__VA_ARGS__)
 
-#define DEV_TYPE_NONE  0
-#define DEV_TYPE_NAND  1
-#define DEV_TYPE_ONENAND   2
-#define DEV_TYPE_NOR   3
-
 /* Private own data */
 static struct ubi_device *ubi;
 static char buffer[80];
-- 
2.14.1

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[U-Boot] [PATCH v4 14/27] mtd: nand: Add core infrastructure to support SPI NANDs

2018-07-13 Thread Miquel Raynal
From: Peter Pan 

Add a SPI NAND framework based on the generic NAND framework and the
spi-mem infrastructure.

In its current state, this framework supports the following features:

- single/dual/quad IO modes
- on-die ECC

Signed-off-by: Peter Pan 
Signed-off-by: Boris Brezillon 
Signed-off-by: Miquel Raynal 
---
 drivers/mtd/nand/Kconfig  |2 +
 drivers/mtd/nand/Makefile |1 +
 drivers/mtd/nand/spi/Kconfig  |7 +
 drivers/mtd/nand/spi/Makefile |4 +
 drivers/mtd/nand/spi/core.c   | 1235 +
 include/linux/mtd/spinand.h   |  427 ++
 6 files changed, 1676 insertions(+)
 create mode 100644 drivers/mtd/nand/spi/Kconfig
 create mode 100644 drivers/mtd/nand/spi/Makefile
 create mode 100644 drivers/mtd/nand/spi/core.c
 create mode 100644 include/linux/mtd/spinand.h

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 1c1a1f487e..78ae04bdcb 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -2,3 +2,5 @@ config MTD_NAND_CORE
tristate
 
 source "drivers/mtd/nand/raw/Kconfig"
+
+source "drivers/mtd/nand/spi/Kconfig"
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index e07d0da46a..583e8880f3 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -3,3 +3,4 @@
 nandcore-objs := core.o bbt.o
 obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
 obj-$(CONFIG_MTD_NAND) += raw/
+obj-$(CONFIG_MTD_SPI_NAND) += spi/
diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
new file mode 100644
index 00..2197cb531f
--- /dev/null
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -0,0 +1,7 @@
+menuconfig MTD_SPI_NAND
+   bool "SPI NAND device Support"
+   depends on MTD && DM_SPI
+   select MTD_NAND_CORE
+   select SPI_MEM
+   help
+ This is the framework for the SPI NAND device drivers.
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
new file mode 100644
index 00..f0c6e69d2e
--- /dev/null
+++ b/drivers/mtd/nand/spi/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+spinand-objs := core.o
+obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
new file mode 100644
index 00..08f853ae11
--- /dev/null
+++ b/drivers/mtd/nand/spi/core.c
@@ -0,0 +1,1235 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016-2017 Micron Technology, Inc.
+ *
+ * Authors:
+ * Peter Pan 
+ * Boris Brezillon 
+ */
+
+#define pr_fmt(fmt)"spi-nand: " fmt
+
+#ifndef __UBOOT__
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#else
+#include 
+#include 
+#include 
+#include 
+#include 
+#endif
+
+/* SPI NAND index visible in MTD names */
+static int spi_nand_idx;
+
+static void spinand_cache_op_adjust_colum(struct spinand_device *spinand,
+ const struct nand_page_io_req *req,
+ u16 *column)
+{
+   struct nand_device *nand = spinand_to_nand(spinand);
+   unsigned int shift;
+
+   if (nand->memorg.planes_per_lun < 2)
+   return;
+
+   /* The plane number is passed in MSB just above the column address */
+   shift = fls(nand->memorg.pagesize);
+   *column |= req->pos.plane << shift;
+}
+
+static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
+{
+   struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg,
+ spinand->scratchbuf);
+   int ret;
+
+   ret = spi_mem_exec_op(spinand->slave, );
+   if (ret)
+   return ret;
+
+   *val = *spinand->scratchbuf;
+   return 0;
+}
+
+static int spinand_write_reg_op(struct spinand_device *spinand, u8 reg, u8 val)
+{
+   struct spi_mem_op op = SPINAND_SET_FEATURE_OP(reg,
+ spinand->scratchbuf);
+
+   *spinand->scratchbuf = val;
+   return spi_mem_exec_op(spinand->slave, );
+}
+
+static int spinand_read_status(struct spinand_device *spinand, u8 *status)
+{
+   return spinand_read_reg_op(spinand, REG_STATUS, status);
+}
+
+static int spinand_get_cfg(struct spinand_device *spinand, u8 *cfg)
+{
+   struct nand_device *nand = spinand_to_nand(spinand);
+
+   if (WARN_ON(spinand->cur_target < 0 ||
+   spinand->cur_target >= nand->memorg.ntargets))
+   return -EINVAL;
+
+   *cfg = spinand->cfg_cache[spinand->cur_target];
+   return 0;
+}
+
+static int spinand_set_cfg(struct spinand_device *spinand, u8 cfg)
+{
+   struct nand_device *nand = spinand_to_nand(spinand);
+   int ret;
+
+   if (WARN_ON(spinand->cur_target < 0 ||
+   spinand->cur_target >= nand->memorg.ntargets))
+   return -EINVAL;
+
+   if (spinand->cfg_cache[spinand->cur_target] == cfg)
+   return 0;
+
+   ret = 

[U-Boot] [PATCH v4 19/27] dt-bindings: Add bindings for SPI NAND devices

2018-07-13 Thread Miquel Raynal
From: Boris Brezillon 

Add bindings for SPI NAND chips.

Signed-off-by: Boris Brezillon 
Signed-off-by: Miquel Raynal 
---
 doc/device-tree-bindings/mtd/spi-nand.txt | 5 +
 1 file changed, 5 insertions(+)
 create mode 100644 doc/device-tree-bindings/mtd/spi-nand.txt

diff --git a/doc/device-tree-bindings/mtd/spi-nand.txt 
b/doc/device-tree-bindings/mtd/spi-nand.txt
new file mode 100644
index 00..8b51f3b6d5
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/spi-nand.txt
@@ -0,0 +1,5 @@
+SPI NAND flash
+
+Required properties:
+- compatible: should be "spi-nand"
+- reg: should encode the chip-select line used to access the NAND chip
-- 
2.14.1

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[U-Boot] [PATCH v4 27/27] cmd: mtdparts: try to probe the MTD devices as a fallback

2018-07-13 Thread Miquel Raynal
Current implementation of mtdparts command errors out if the desired MTD
device is not found. Fallback to the new probe function in this case
before erroring out.

This will the save the user the need to call something like 'mtd list'
before mtdparts.

Signed-off-by: Miquel Raynal 
---
 cmd/mtdparts.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index eac03cb273..5e7a8d2d70 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -305,9 +305,15 @@ static int get_mtd_info(u8 type, u8 num, struct mtd_info 
**mtd)
 
sprintf(mtd_dev, "%s%d", MTD_DEV_TYPE(type), num);
*mtd = get_mtd_device_nm(mtd_dev);
-   if (IS_ERR(*mtd)) {
-   printf("Device %s not found!\n", mtd_dev);
-   return 1;
+   if (IS_ERR_OR_NULL(*mtd)) {
+#ifdef CONFIG_CMD_MTD
+   mtd_probe_devices();
+   *mtd = get_mtd_device_nm(mtd_dev);
+#endif
+   if (IS_ERR_OR_NULL(*mtd)) {
+   printf("Device %s not found!\n", mtd_dev);
+   return 1;
+   }
}
put_mtd_device(*mtd);
 
-- 
2.14.1

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[U-Boot] [PATCH v4 02/27] mtd: Uninline mtd_write_oob and move it to mtdcore.c

2018-07-13 Thread Miquel Raynal
From: Ezequiel Garcia 

There's no reason for having mtd_write_oob inlined in mtd.h header.
Move it to mtdcore.c where it belongs.

Signed-off-by: Ezequiel Garcia 
Acked-by: Boris Brezillon 
Signed-off-by: Jacek Anaszewski 
Signed-off-by: Miquel Raynal 
---
 drivers/mtd/mtdcore.c   | 12 
 include/linux/mtd/mtd.h | 12 +---
 2 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 60ad28efd4..ad61406dac 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1031,6 +1031,18 @@ int mtd_read_oob(struct mtd_info *mtd, loff_t from, 
struct mtd_oob_ops *ops)
 }
 EXPORT_SYMBOL_GPL(mtd_read_oob);
 
+int mtd_write_oob(struct mtd_info *mtd, loff_t to,
+   struct mtd_oob_ops *ops)
+{
+   ops->retlen = ops->oobretlen = 0;
+   if (!mtd->_write_oob)
+   return -EOPNOTSUPP;
+   if (!(mtd->flags & MTD_WRITEABLE))
+   return -EROFS;
+   return mtd->_write_oob(mtd, to, ops);
+}
+EXPORT_SYMBOL_GPL(mtd_write_oob);
+
 /**
  * mtd_ooblayout_ecc - Get the OOB region definition of a specific ECC section
  * @mtd: MTD device structure
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 0c41140465..0876897c51 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -355,17 +355,7 @@ int mtd_panic_write(struct mtd_info *mtd, loff_t to, 
size_t len, size_t *retlen,
const u_char *buf);
 
 int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops);
-
-static inline int mtd_write_oob(struct mtd_info *mtd, loff_t to,
-   struct mtd_oob_ops *ops)
-{
-   ops->retlen = ops->oobretlen = 0;
-   if (!mtd->_write_oob)
-   return -EOPNOTSUPP;
-   if (!(mtd->flags & MTD_WRITEABLE))
-   return -EROFS;
-   return mtd->_write_oob(mtd, to, ops);
-}
+int mtd_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops);
 
 int mtd_get_fact_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen,
   struct otp_info *buf);
-- 
2.14.1

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[U-Boot] [PATCH v4 16/27] mtd: spinand: Add initial support for Winbond W25M02GV

2018-07-13 Thread Miquel Raynal
From: Frieder Schrempf 

Add support for the W25M02GV chip.

Signed-off-by: Frieder Schrempf 
Signed-off-by: Boris Brezillon 
Signed-off-by: Miquel Raynal 
---
 drivers/mtd/nand/spi/Makefile  |   2 +-
 drivers/mtd/nand/spi/core.c|   1 +
 drivers/mtd/nand/spi/winbond.c | 143 +
 include/linux/mtd/spinand.h|   1 +
 4 files changed, 146 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/nand/spi/winbond.c

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 4eb745abd4..11ba5de68b 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o micron.o
+spinand-objs := core.o micron.o winbond.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 36b8b52bc2..ef3e6445d8 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -831,6 +831,7 @@ static const struct nand_ops spinand_ops = {
 
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
_spinand_manufacturer,
+   _spinand_manufacturer,
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
new file mode 100644
index 00..eac811d97c
--- /dev/null
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017 exceet electronics GmbH
+ *
+ * Authors:
+ * Frieder Schrempf 
+ * Boris Brezillon 
+ */
+
+#ifndef __UBOOT__
+#include 
+#include 
+#endif
+#include 
+
+#define SPINAND_MFR_WINBOND0xEF
+
+#define WINBOND_CFG_BUF_READ   BIT(3)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+   SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+   SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+   SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+   SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+   SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int w25m02gv_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+   if (section > 3)
+   return -ERANGE;
+
+   region->offset = (16 * section) + 8;
+   region->length = 8;
+
+   return 0;
+}
+
+static int w25m02gv_ooblayout_free(struct mtd_info *mtd, int section,
+  struct mtd_oob_region *region)
+{
+   if (section > 3)
+   return -ERANGE;
+
+   region->offset = (16 * section) + 2;
+   region->length = 6;
+
+   return 0;
+}
+
+static const struct mtd_ooblayout_ops w25m02gv_ooblayout = {
+   .ecc = w25m02gv_ooblayout_ecc,
+   .free = w25m02gv_ooblayout_free,
+};
+
+static int w25m02gv_select_target(struct spinand_device *spinand,
+ unsigned int target)
+{
+   struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0xc2, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(1,
+   spinand->scratchbuf,
+   1));
+
+   *spinand->scratchbuf = target;
+   return spi_mem_exec_op(spinand->slave, );
+}
+
+static const struct spinand_info winbond_spinand_table[] = {
+   SPINAND_INFO("W25M02GV", 0xAB,
+NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 2),
+NAND_ECCREQ(1, 512),
+SPINAND_INFO_OP_VARIANTS(_cache_variants,
+ _cache_variants,
+ _cache_variants),
+0,
+SPINAND_ECCINFO(_ooblayout, NULL),
+SPINAND_SELECT_TARGET(w25m02gv_select_target)),
+};
+
+/**
+ * winbond_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a Winbond device.
+ * @spinand: SPI NAND device structure
+ */
+static int winbond_spinand_detect(struct spinand_device *spinand)
+{
+   u8 *id = spinand->id.data;
+   int ret;
+
+   /*
+* Winbond SPI NAND read ID need a dummy byte,
+* so the first byte in raw_id is dummy.
+*/
+   if (id[1] != SPINAND_MFR_WINBOND)
+   return 0;
+
+   ret = 

[U-Boot] [PATCH v4 17/27] mtd: spinand: Add initial support for the MX35LF1GE4AB chip

2018-07-13 Thread Miquel Raynal
From: Boris Brezillon 

Add minimal support for the MX35LF1GE4AB SPI NAND chip.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/spi/Makefile   |   2 +-
 drivers/mtd/nand/spi/core.c |   1 +
 drivers/mtd/nand/spi/macronix.c | 138 
 include/linux/mtd/spinand.h |   1 +
 4 files changed, 141 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/nand/spi/macronix.c

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 11ba5de68b..a66edd9199 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o micron.o winbond.o
+spinand-objs := core.o macronix.o micron.o winbond.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index ef3e6445d8..362d104846 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -830,6 +830,7 @@ static const struct nand_ops spinand_ops = {
 };
 
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
+   _spinand_manufacturer,
_spinand_manufacturer,
_spinand_manufacturer,
 };
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
new file mode 100644
index 00..dd351dcb6c
--- /dev/null
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Macronix
+ *
+ * Author: Boris Brezillon 
+ */
+
+#ifndef __UBOOT__
+#include 
+#include 
+#endif
+#include 
+
+#define SPINAND_MFR_MACRONIX   0xC2
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+   SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+   SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+   SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+   SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+   SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int mx35lf1ge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+   return -ERANGE;
+}
+
+static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd, int section,
+  struct mtd_oob_region *region)
+{
+   if (section)
+   return -ERANGE;
+
+   region->offset = 2;
+   region->length = mtd->oobsize - 2;
+
+   return 0;
+}
+
+static const struct mtd_ooblayout_ops mx35lf1ge4ab_ooblayout = {
+   .ecc = mx35lf1ge4ab_ooblayout_ecc,
+   .free = mx35lf1ge4ab_ooblayout_free,
+};
+
+static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
+{
+   struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_DUMMY(1, 1),
+ SPI_MEM_OP_DATA_IN(1, eccsr, 1));
+
+   return spi_mem_exec_op(spinand->slave, );
+}
+
+static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
+  u8 status)
+{
+   struct nand_device *nand = spinand_to_nand(spinand);
+   u8 eccsr;
+
+   switch (status & STATUS_ECC_MASK) {
+   case STATUS_ECC_NO_BITFLIPS:
+   return 0;
+
+   case STATUS_ECC_UNCOR_ERROR:
+   return -EBADMSG;
+
+   case STATUS_ECC_HAS_BITFLIPS:
+   /*
+* Let's try to retrieve the real maximum number of bitflips
+* in order to avoid forcing the wear-leveling layer to move
+* data around if it's not necessary.
+*/
+   if (mx35lf1ge4ab_get_eccsr(spinand, ))
+   return nand->eccreq.strength;
+
+   if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
+   return nand->eccreq.strength;
+
+   return eccsr;
+
+   default:
+   break;
+   }
+
+   return -EINVAL;
+}
+
+static const struct spinand_info macronix_spinand_table[] = {
+   SPINAND_INFO("MX35LF1GE4AB", 0x12,
+NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+NAND_ECCREQ(4, 512),
+SPINAND_INFO_OP_VARIANTS(_cache_variants,
+ _cache_variants,
+ _cache_variants),
+SPINAND_HAS_QE_BIT,
+SPINAND_ECCINFO(_ooblayout,
+mx35lf1ge4ab_ecc_get_status)),
+};
+
+static int macronix_spinand_detect(struct spinand_device *spinand)
+{
+ 

[U-Boot] [PATCH v4 12/27] mtd: nand: Pass mode information to nand_page_io_req

2018-07-13 Thread Miquel Raynal
From: Boris Brezillon 

The NAND sub-layers are likely to need the MTD_OPS_XXX mode information
in order to decide if they should enable/disable ECC or how they should
place the OOB bytes in the provided OOB buffer.

Add a field to nand_page_io_req to pass this information.

Signed-off-by: Boris Brezillon 
Signed-off-by: Miquel Raynal 
---
 include/linux/mtd/nand.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index ada7af4a41..13e8dd1103 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -86,6 +86,7 @@ struct nand_pos {
  * @ooboffs: the OOB offset within the page
  * @ooblen: the number of OOB bytes to read from/write to this page
  * @oobbuf: buffer to store OOB data in or get OOB data from
+ * @mode: one of the %MTD_OPS_XXX mode
  *
  * This object is used to pass per-page I/O requests to NAND sub-layers. This
  * way all useful information are already formatted in a useful way and
@@ -106,6 +107,7 @@ struct nand_page_io_req {
const void *out;
void *in;
} oobbuf;
+   int mode;
 };
 
 /**
@@ -599,6 +601,7 @@ static inline void nanddev_io_iter_init(struct nand_device 
*nand,
 {
struct mtd_info *mtd = nanddev_to_mtd(nand);
 
+   iter->req.mode = req->mode;
iter->req.dataoffs = nanddev_offs_to_pos(nand, offs, >req.pos);
iter->req.ooboffs = req->ooboffs;
iter->oobbytes_per_page = mtd_oobavail(mtd, req);
-- 
2.14.1

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[U-Boot] [PATCH v4 15/27] mtd: spinand: Add initial support for Micron MT29F2G01ABAGD

2018-07-13 Thread Miquel Raynal
From: Peter Pan 

Add a basic driver for Micron SPI NANDs. Only one device is supported
right now, but the driver will be extended to support more devices
afterwards.

Signed-off-by: Peter Pan 
Signed-off-by: Boris Brezillon 
Signed-off-by: Miquel Raynal 
---
 drivers/mtd/nand/spi/Makefile |   2 +-
 drivers/mtd/nand/spi/core.c   |  17 ++
 drivers/mtd/nand/spi/micron.c | 135 ++
 include/linux/mtd/spinand.h   |   3 +
 4 files changed, 156 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/nand/spi/micron.c

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index f0c6e69d2e..4eb745abd4 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o
+spinand-objs := core.o micron.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 08f853ae11..36b8b52bc2 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -829,8 +829,25 @@ static const struct nand_ops spinand_ops = {
.isbad = spinand_isbad,
 };
 
+static const struct spinand_manufacturer *spinand_manufacturers[] = {
+   _spinand_manufacturer,
+};
+
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
 {
+   unsigned int i;
+   int ret;
+
+   for (i = 0; i < ARRAY_SIZE(spinand_manufacturers); i++) {
+   ret = spinand_manufacturers[i]->ops->detect(spinand);
+   if (ret > 0) {
+   spinand->manufacturer = spinand_manufacturers[i];
+   return 0;
+   } else if (ret < 0) {
+   return ret;
+   }
+   }
+
return -ENOTSUPP;
 }
 
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
new file mode 100644
index 00..83951c5d0f
--- /dev/null
+++ b/drivers/mtd/nand/spi/micron.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2016-2017 Micron Technology, Inc.
+ *
+ * Authors:
+ * Peter Pan 
+ */
+
+#ifndef __UBOOT__
+#include 
+#include 
+#endif
+#include 
+
+#define SPINAND_MFR_MICRON 0x2c
+
+#define MICRON_STATUS_ECC_MASK GENMASK(7, 4)
+#define MICRON_STATUS_ECC_NO_BITFLIPS  (0 << 4)
+#define MICRON_STATUS_ECC_1TO3_BITFLIPS(1 << 4)
+#define MICRON_STATUS_ECC_4TO6_BITFLIPS(3 << 4)
+#define MICRON_STATUS_ECC_7TO8_BITFLIPS(5 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+   SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+   SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+   SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+   SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+   SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int mt29f2g01abagd_ooblayout_ecc(struct mtd_info *mtd, int section,
+   struct mtd_oob_region *region)
+{
+   if (section)
+   return -ERANGE;
+
+   region->offset = 64;
+   region->length = 64;
+
+   return 0;
+}
+
+static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section,
+struct mtd_oob_region *region)
+{
+   if (section)
+   return -ERANGE;
+
+   /* Reserve 2 bytes for the BBM. */
+   region->offset = 2;
+   region->length = 62;
+
+   return 0;
+}
+
+static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = {
+   .ecc = mt29f2g01abagd_ooblayout_ecc,
+   .free = mt29f2g01abagd_ooblayout_free,
+};
+
+static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
+u8 status)
+{
+   switch (status & MICRON_STATUS_ECC_MASK) {
+   case STATUS_ECC_NO_BITFLIPS:
+   return 0;
+
+   case STATUS_ECC_UNCOR_ERROR:
+   return -EBADMSG;
+
+   case MICRON_STATUS_ECC_1TO3_BITFLIPS:
+   return 3;
+
+   case MICRON_STATUS_ECC_4TO6_BITFLIPS:
+   return 6;
+
+   case MICRON_STATUS_ECC_7TO8_BITFLIPS:
+   return 8;
+
+   default:
+   break;
+   }
+
+   return -EINVAL;
+}
+
+static const struct spinand_info micron_spinand_table[] = {
+   SPINAND_INFO("MT29F2G01ABAGD", 0x24,
+NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
+NAND_ECCREQ(8, 512),
+

[U-Boot] [PATCH v4 11/27] mtd: nand: Add core infrastructure to deal with NAND devices

2018-07-13 Thread Miquel Raynal
From: Boris Brezillon 

Add an intermediate layer to abstract NAND device interface so that
some logic can be shared between SPI NANDs, parallel/raw NANDs,
OneNANDs, ...

Signed-off-by: Boris Brezillon 
Signed-off-by: Miquel Raynal 
---
 drivers/mtd/nand/Kconfig  |   3 +
 drivers/mtd/nand/Makefile |   2 +
 drivers/mtd/nand/bbt.c| 132 +
 drivers/mtd/nand/core.c   | 243 +++
 include/linux/mtd/nand.h  | 731 ++
 5 files changed,  insertions(+)
 create mode 100644 drivers/mtd/nand/bbt.c
 create mode 100644 drivers/mtd/nand/core.c
 create mode 100644 include/linux/mtd/nand.h

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 6d53734718..1c1a1f487e 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -1 +1,4 @@
+config MTD_NAND_CORE
+   tristate
+
 source "drivers/mtd/nand/raw/Kconfig"
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b2d0e118d..e07d0da46a 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -1,3 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0+
 
+nandcore-objs := core.o bbt.o
+obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
 obj-$(CONFIG_MTD_NAND) += raw/
diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
new file mode 100644
index 00..7e0ad3190c
--- /dev/null
+++ b/drivers/mtd/nand/bbt.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017 Free Electrons
+ *
+ * Authors:
+ * Boris Brezillon 
+ * Peter Pan 
+ */
+
+#define pr_fmt(fmt)"nand-bbt: " fmt
+
+#include 
+#ifndef __UBOOT__
+#include 
+#endif
+
+/**
+ * nanddev_bbt_init() - Initialize the BBT (Bad Block Table)
+ * @nand: NAND device
+ *
+ * Initialize the in-memory BBT.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_bbt_init(struct nand_device *nand)
+{
+   unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+   unsigned int nblocks = nanddev_neraseblocks(nand);
+   unsigned int nwords = DIV_ROUND_UP(nblocks * bits_per_block,
+  BITS_PER_LONG);
+
+   nand->bbt.cache = kzalloc(nwords, GFP_KERNEL);
+   if (!nand->bbt.cache)
+   return -ENOMEM;
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_init);
+
+/**
+ * nanddev_bbt_cleanup() - Cleanup the BBT (Bad Block Table)
+ * @nand: NAND device
+ *
+ * Undoes what has been done in nanddev_bbt_init()
+ */
+void nanddev_bbt_cleanup(struct nand_device *nand)
+{
+   kfree(nand->bbt.cache);
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_cleanup);
+
+/**
+ * nanddev_bbt_update() - Update a BBT
+ * @nand: nand device
+ *
+ * Update the BBT. Currently a NOP function since on-flash bbt is not yet
+ * supported.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_bbt_update(struct nand_device *nand)
+{
+   return 0;
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_update);
+
+/**
+ * nanddev_bbt_get_block_status() - Return the status of an eraseblock
+ * @nand: nand device
+ * @entry: the BBT entry
+ *
+ * Return: a positive number nand_bbt_block_status status or -%ERANGE if @entry
+ *is bigger than the BBT size.
+ */
+int nanddev_bbt_get_block_status(const struct nand_device *nand,
+unsigned int entry)
+{
+   unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+   unsigned long *pos = nand->bbt.cache +
+((entry * bits_per_block) / BITS_PER_LONG);
+   unsigned int offs = (entry * bits_per_block) % BITS_PER_LONG;
+   unsigned long status;
+
+   if (entry >= nanddev_neraseblocks(nand))
+   return -ERANGE;
+
+   status = pos[0] >> offs;
+   if (bits_per_block + offs > BITS_PER_LONG)
+   status |= pos[1] << (BITS_PER_LONG - offs);
+
+   return status & GENMASK(bits_per_block - 1, 0);
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_get_block_status);
+
+/**
+ * nanddev_bbt_set_block_status() - Update the status of an eraseblock in the
+ * in-memory BBT
+ * @nand: nand device
+ * @entry: the BBT entry to update
+ * @status: the new status
+ *
+ * Update an entry of the in-memory BBT. If you want to push the updated BBT
+ * the NAND you should call nanddev_bbt_update().
+ *
+ * Return: 0 in case of success or -%ERANGE if @entry is bigger than the BBT
+ *size.
+ */
+int nanddev_bbt_set_block_status(struct nand_device *nand, unsigned int entry,
+enum nand_bbt_block_status status)
+{
+   unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+   unsigned long *pos = nand->bbt.cache +
+((entry * bits_per_block) / BITS_PER_LONG);
+   unsigned int offs = (entry * bits_per_block) % BITS_PER_LONG;
+   unsigned long val = status & GENMASK(bits_per_block - 1, 0);
+
+   if (entry >= nanddev_neraseblocks(nand))
+   

[U-Boot] [PATCH v4 08/27] mtd: move all flash categories inside MTD submenu

2018-07-13 Thread Miquel Raynal
There is no reason to have NAND, SPI flashes and UBI sections outside of
the MTD submenu in Kconfig.

Signed-off-by: Miquel Raynal 
Reviewed-by: Jagan Teki 
---
 drivers/mtd/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 707359dca1..5f52e9b3f8 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -47,10 +47,10 @@ config RENESAS_RPC_HF
  This enables access to Hyperflash memory through the Renesas
  RCar Gen3 RPC controller.
 
-endmenu
-
 source "drivers/mtd/nand/Kconfig"
 
 source "drivers/mtd/spi/Kconfig"
 
 source "drivers/mtd/ubi/Kconfig"
+
+endmenu
-- 
2.14.1

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[U-Boot] [PATCH v4 09/27] mtd: move NAND files into a raw/ subdirectory

2018-07-13 Thread Miquel Raynal
NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.

Signed-off-by: Miquel Raynal 
---
 drivers/mtd/Makefile  |   2 +
 drivers/mtd/nand/Kconfig  | 280 +-
 drivers/mtd/nand/Makefile |  76 +--
 drivers/mtd/nand/raw/Kconfig  | 279 +
 drivers/mtd/nand/raw/Makefile |  77 +++
 drivers/mtd/nand/{ => raw}/am335x_spl_bch.c   |   0
 drivers/mtd/nand/{ => raw}/arasan_nfc.c   |   0
 drivers/mtd/nand/{ => raw}/atmel_nand.c   |   0
 drivers/mtd/nand/{ => raw}/atmel_nand_ecc.h   |   0
 drivers/mtd/nand/{ => raw}/davinci_nand.c |   0
 drivers/mtd/nand/{ => raw}/denali.c   |   0
 drivers/mtd/nand/{ => raw}/denali.h   |   0
 drivers/mtd/nand/{ => raw}/denali_dt.c|   0
 drivers/mtd/nand/{ => raw}/denali_spl.c   |   0
 drivers/mtd/nand/{ => raw}/fsl_elbc_nand.c|   0
 drivers/mtd/nand/{ => raw}/fsl_elbc_spl.c |   0
 drivers/mtd/nand/{ => raw}/fsl_ifc_nand.c |   0
 drivers/mtd/nand/{ => raw}/fsl_ifc_spl.c  |   0
 drivers/mtd/nand/{ => raw}/fsl_upm.c  |   0
 drivers/mtd/nand/{ => raw}/fsmc_nand.c|   0
 drivers/mtd/nand/{ => raw}/kb9202_nand.c  |   0
 drivers/mtd/nand/{ => raw}/kirkwood_nand.c|   0
 drivers/mtd/nand/{ => raw}/kmeter1_nand.c |   0
 drivers/mtd/nand/{ => raw}/lpc32xx_nand_mlc.c |   0
 drivers/mtd/nand/{ => raw}/lpc32xx_nand_slc.c |   0
 drivers/mtd/nand/{ => raw}/mxc_nand.c |   0
 drivers/mtd/nand/{ => raw}/mxc_nand.h |   0
 drivers/mtd/nand/{ => raw}/mxc_nand_spl.c |   0
 drivers/mtd/nand/{ => raw}/mxs_nand.c |   0
 drivers/mtd/nand/{ => raw}/mxs_nand.h |   0
 drivers/mtd/nand/{ => raw}/mxs_nand_dt.c  |   0
 drivers/mtd/nand/{ => raw}/mxs_nand_spl.c |   0
 drivers/mtd/nand/{ => raw}/nand.c |   0
 drivers/mtd/nand/{ => raw}/nand_base.c|   0
 drivers/mtd/nand/{ => raw}/nand_bbt.c |   0
 drivers/mtd/nand/{ => raw}/nand_bch.c |   0
 drivers/mtd/nand/{ => raw}/nand_ecc.c |   0
 drivers/mtd/nand/{ => raw}/nand_ids.c |   0
 drivers/mtd/nand/{ => raw}/nand_plat.c|   0
 drivers/mtd/nand/{ => raw}/nand_spl_load.c|   0
 drivers/mtd/nand/{ => raw}/nand_spl_loaders.c |   0
 drivers/mtd/nand/{ => raw}/nand_spl_simple.c  |   0
 drivers/mtd/nand/{ => raw}/nand_timings.c |   0
 drivers/mtd/nand/{ => raw}/nand_util.c|   0
 drivers/mtd/nand/{ => raw}/omap_elm.c |   0
 drivers/mtd/nand/{ => raw}/omap_gpmc.c|   0
 drivers/mtd/nand/{ => raw}/pxa3xx_nand.c  |   0
 drivers/mtd/nand/{ => raw}/pxa3xx_nand.h  |   0
 drivers/mtd/nand/{ => raw}/sunxi_nand.c   |   0
 drivers/mtd/nand/{ => raw}/sunxi_nand_spl.c   |   0
 drivers/mtd/nand/{ => raw}/tegra_nand.c   |   0
 drivers/mtd/nand/{ => raw}/tegra_nand.h   |   0
 drivers/mtd/nand/{ => raw}/vf610_nfc.c|   0
 drivers/mtd/nand/{ => raw}/zynq_nand.c|   0
 54 files changed, 360 insertions(+), 354 deletions(-)
 create mode 100644 drivers/mtd/nand/raw/Kconfig
 create mode 100644 drivers/mtd/nand/raw/Makefile
 rename drivers/mtd/nand/{ => raw}/am335x_spl_bch.c (100%)
 rename drivers/mtd/nand/{ => raw}/arasan_nfc.c (100%)
 rename drivers/mtd/nand/{ => raw}/atmel_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/atmel_nand_ecc.h (100%)
 rename drivers/mtd/nand/{ => raw}/davinci_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/denali.c (100%)
 rename drivers/mtd/nand/{ => raw}/denali.h (100%)
 rename drivers/mtd/nand/{ => raw}/denali_dt.c (100%)
 rename drivers/mtd/nand/{ => raw}/denali_spl.c (100%)
 rename drivers/mtd/nand/{ => raw}/fsl_elbc_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/fsl_elbc_spl.c (100%)
 rename drivers/mtd/nand/{ => raw}/fsl_ifc_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/fsl_ifc_spl.c (100%)
 rename drivers/mtd/nand/{ => raw}/fsl_upm.c (100%)
 rename drivers/mtd/nand/{ => raw}/fsmc_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/kb9202_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/kirkwood_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/kmeter1_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/lpc32xx_nand_mlc.c (100%)
 rename drivers/mtd/nand/{ => raw}/lpc32xx_nand_slc.c (100%)
 rename drivers/mtd/nand/{ => raw}/mxc_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/mxc_nand.h (100%)
 rename drivers/mtd/nand/{ => raw}/mxc_nand_spl.c (100%)
 rename drivers/mtd/nand/{ => raw}/mxs_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/mxs_nand.h (100%)
 rename drivers/mtd/nand/{ => raw}/mxs_nand_dt.c (100%)
 rename drivers/mtd/nand/{ => raw}/mxs_nand_spl.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_base.c 

[U-Boot] [PATCH v4 10/27] mtd: rename nand into rawnand in Kconfig prompt

2018-07-13 Thread Miquel Raynal
Sync the Kconfig raw NAND entry title with the code architecture.

Signed-off-by: Miquel Raynal 
---
 drivers/mtd/nand/raw/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index bdc272142e..118fae7620 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -1,6 +1,6 @@
 
 menuconfig NAND
-   bool "NAND Device Support"
+   bool "Raw NAND Device Support"
 if NAND
 
 config SYS_NAND_SELF_INIT
-- 
2.14.1

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[U-Boot] [PATCH v4 07/27] mtd: move definitions to enlarge their range

2018-07-13 Thread Miquel Raynal
Some helpers might be useful in a future 'mtd' U-Boot command to parse
MTD device list.

Signed-off-by: Miquel Raynal 
---
 drivers/mtd/mtdcore.h   | 6 --
 include/linux/mtd/mtd.h | 6 ++
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/mtdcore.h b/drivers/mtd/mtdcore.h
index 7b0353399a..1d181a1045 100644
--- a/drivers/mtd/mtdcore.h
+++ b/drivers/mtd/mtdcore.h
@@ -5,7 +5,6 @@
 
 extern struct mutex mtd_table_mutex;
 
-struct mtd_info *__mtd_next_device(int i);
 int add_mtd_device(struct mtd_info *mtd);
 int del_mtd_device(struct mtd_info *mtd);
 int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
@@ -16,8 +15,3 @@ int parse_mtd_partitions(struct mtd_info *master, const char 
* const *types,
 
 int __init init_mtdchar(void);
 void __exit cleanup_mtdchar(void);
-
-#define mtd_for_each_device(mtd)   \
-   for ((mtd) = __mtd_next_device(0);  \
-(mtd) != NULL; \
-(mtd) = __mtd_next_device(mtd->index + 1))
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 32e3f31f8c..cba1b9e875 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -521,6 +521,12 @@ int del_mtd_device(struct mtd_info *mtd);
 int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
 int del_mtd_partitions(struct mtd_info *);
 
+struct mtd_info *__mtd_next_device(int i);
+#define mtd_for_each_device(mtd)   \
+   for ((mtd) = __mtd_next_device(0);  \
+(mtd) != NULL; \
+(mtd) = __mtd_next_device(mtd->index + 1))
+
 int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size,
loff_t *maxsize, int devtype, uint64_t chipsize);
 int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,
-- 
2.14.1

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[U-Boot] [PATCH v4 04/27] mtd: Fallback to ->_read/write() when ->_read/write_oob() is missing

2018-07-13 Thread Miquel Raynal
Some MTD sublayers/drivers are implementing ->_read/write() and
not ->_read/write_oob().

While for NAND devices both are usually valid, for NOR devices, using
the _oob variant has no real meaning. But, as the MTD layer is supposed
to hide as much as possible the flash complexity to the user, there is
no reason to error out while it is just a matter of rewritting things
internally.

Add a fallback on mtd->_read() (resp. mtd->_write()) when the user calls
mtd_read_oob() (resp. mtd_write_oob()) while mtd->_read_oob() (resp.
mtd->_write_oob) is not implemented. There is already a fallback on the
_oob variant if the former is used.

Signed-off-by: Miquel Raynal 
---
 drivers/mtd/mtdcore.c | 26 --
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 9a3efe95df..fb1d68d5e2 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1047,20 +1047,27 @@ int mtd_read_oob(struct mtd_info *mtd, loff_t from, 
struct mtd_oob_ops *ops)
 {
int ret_code;
ops->retlen = ops->oobretlen = 0;
-   if (!mtd->_read_oob)
-   return -EOPNOTSUPP;
 
ret_code = mtd_check_oob_ops(mtd, from, ops);
if (ret_code)
return ret_code;
 
+   /* Check the validity of a potential fallback on mtd->_read */
+   if (!mtd->_read_oob && (!mtd->_read || ops->oobbuf))
+   return -EOPNOTSUPP;
+
+   if (mtd->_read_oob)
+   ret_code = mtd->_read_oob(mtd, from, ops);
+   else
+   ret_code = mtd->_read(mtd, from, ops->len, >retlen,
+ ops->datbuf);
+
/*
 * In cases where ops->datbuf != NULL, mtd->_read_oob() has semantics
 * similar to mtd->_read(), returning a non-negative integer
 * representing max bitflips. In other cases, mtd->_read_oob() may
 * return -EUCLEAN. In all cases, perform similar logic to mtd_read().
 */
-   ret_code = mtd->_read_oob(mtd, from, ops);
if (unlikely(ret_code < 0))
return ret_code;
if (mtd->ecc_strength == 0)
@@ -1075,8 +1082,7 @@ int mtd_write_oob(struct mtd_info *mtd, loff_t to,
int ret;
 
ops->retlen = ops->oobretlen = 0;
-   if (!mtd->_write_oob)
-   return -EOPNOTSUPP;
+
if (!(mtd->flags & MTD_WRITEABLE))
return -EROFS;
 
@@ -1084,7 +1090,15 @@ int mtd_write_oob(struct mtd_info *mtd, loff_t to,
if (ret)
return ret;
 
-   return mtd->_write_oob(mtd, to, ops);
+   /* Check the validity of a potential fallback on mtd->_write */
+   if (!mtd->_write_oob && (!mtd->_write || ops->oobbuf))
+   return -EOPNOTSUPP;
+
+   if (mtd->_write_oob)
+   return mtd->_write_oob(mtd, to, ops);
+   else
+   return mtd->_write(mtd, to, ops->len, >retlen,
+  ops->datbuf);
 }
 EXPORT_SYMBOL_GPL(mtd_write_oob);
 
-- 
2.14.1

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[U-Boot] [PATCH v4 05/27] mtd: add get/set of_node/flash_node helpers

2018-07-13 Thread Miquel Raynal
From: Brian Norris 

We are going to begin using the mtd->dev.of_node field for MTD device
nodes, so let's add helpers for it. Also, we'll be making some
conversions on spi_nor (and nand_chip eventually) too, so get that ready
with their own helpers.

Signed-off-by: Brian Norris 
Reviewed-by: Boris Brezillon 
Signed-off-by: Miquel Raynal 
Reviewed-by: Jagan Teki 
---
 include/linux/mtd/mtd.h | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 0876897c51..78eb745c04 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -310,6 +310,17 @@ struct mtd_info {
int usecount;
 };
 
+static inline void mtd_set_of_node(struct mtd_info *mtd,
+  const struct device_node *np)
+{
+   mtd->dev->node.np = np;
+}
+
+static inline const struct device_node *mtd_get_of_node(struct mtd_info *mtd)
+{
+   return mtd->dev->node.np;
+}
+
 int mtd_ooblayout_ecc(struct mtd_info *mtd, int section,
  struct mtd_oob_region *oobecc);
 int mtd_ooblayout_find_eccregion(struct mtd_info *mtd, int eccbyte,
-- 
2.14.1

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[U-Boot] [PATCH v4 01/27] mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing

2018-07-13 Thread Miquel Raynal
From: Boris Brezillon 

Some MTD sublayers/drivers are implementing ->_read/write_oob() and
provide dummy wrappers for their ->_read/write() implementations.
Let the core handle this case instead of duplicating the logic.

Signed-off-by: Boris Brezillon 
Acked-by: Robert Jarzmik 
Acked-by: Brian Norris 
Reviewed-by: Miquel Raynal 
Tested-by: Ladislav Michl 
Signed-off-by: Miquel Raynal 
Reviewed-by: Jagan Teki 
---
 drivers/mtd/mtdcore.c  | 31 ++--
 drivers/mtd/mtdpart.c  |  6 ++--
 drivers/mtd/nand/nand_base.c   | 56 ---
 drivers/mtd/onenand/onenand_base.c | 60 --
 4 files changed, 33 insertions(+), 120 deletions(-)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 6217be2352..60ad28efd4 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -937,7 +937,20 @@ int mtd_read(struct mtd_info *mtd, loff_t from, size_t 
len, size_t *retlen,
 * representing the maximum number of bitflips that were corrected on
 * any one ecc region (if applicable; zero otherwise).
 */
-   ret_code = mtd->_read(mtd, from, len, retlen, buf);
+   if (mtd->_read) {
+   ret_code = mtd->_read(mtd, from, len, retlen, buf);
+   } else if (mtd->_read_oob) {
+   struct mtd_oob_ops ops = {
+   .len = len,
+   .datbuf = buf,
+   };
+
+   ret_code = mtd->_read_oob(mtd, from, );
+   *retlen = ops.retlen;
+   } else {
+   return -ENOTSUPP;
+   }
+
if (unlikely(ret_code < 0))
return ret_code;
if (mtd->ecc_strength == 0)
@@ -952,10 +965,24 @@ int mtd_write(struct mtd_info *mtd, loff_t to, size_t 
len, size_t *retlen,
*retlen = 0;
if (to < 0 || to > mtd->size || len > mtd->size - to)
return -EINVAL;
-   if (!mtd->_write || !(mtd->flags & MTD_WRITEABLE))
+   if ((!mtd->_write && !mtd->_write_oob) ||
+   !(mtd->flags & MTD_WRITEABLE))
return -EROFS;
if (!len)
return 0;
+
+   if (!mtd->_write) {
+   struct mtd_oob_ops ops = {
+   .len = len,
+   .datbuf = (u8 *)buf,
+   };
+   int ret;
+
+   ret = mtd->_write_oob(mtd, to, );
+   *retlen = ops.retlen;
+   return ret;
+   }
+
return mtd->_write(mtd, to, len, retlen, buf);
 }
 EXPORT_SYMBOL_GPL(mtd_write);
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index f87c962205..ccbb1757ea 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -417,8 +417,10 @@ static struct mtd_part *allocate_partition(struct mtd_info 
*master,
slave->mtd.dev.parent = master->dev.parent;
 #endif
 
-   slave->mtd._read = part_read;
-   slave->mtd._write = part_write;
+   if (master->_read)
+   slave->mtd._read = part_read;
+   if (master->_write)
+   slave->mtd._write = part_write;
 
if (master->_panic_write)
slave->mtd._panic_write = part_panic_write;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 64e4621aaa..0b58e15b03 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1863,33 +1863,6 @@ read_retry:
return max_bitflips;
 }
 
-/**
- * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
- * @mtd: MTD device structure
- * @from: offset to read from
- * @len: number of bytes to read
- * @retlen: pointer to variable to store the number of read bytes
- * @buf: the databuffer to put data
- *
- * Get hold of the chip and call nand_do_read.
- */
-static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
-size_t *retlen, uint8_t *buf)
-{
-   struct mtd_oob_ops ops;
-   int ret;
-
-   nand_get_device(mtd, FL_READING);
-   memset(, 0, sizeof(ops));
-   ops.len = len;
-   ops.datbuf = buf;
-   ops.mode = MTD_OPS_PLACE_OOB;
-   ret = nand_do_read_ops(mtd, from, );
-   *retlen = ops.retlen;
-   nand_release_device(mtd);
-   return ret;
-}
-
 /**
  * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
  * @mtd: mtd info structure
@@ -2674,33 +2647,6 @@ static int panic_nand_write(struct mtd_info *mtd, loff_t 
to, size_t len,
return ret;
 }
 
-/**
- * nand_write - [MTD Interface] NAND write with ECC
- * @mtd: MTD device structure
- * @to: offset to write to
- * @len: number of bytes to write
- * @retlen: pointer to variable to store the number of written bytes
- * @buf: the data to write
- *
- * NAND write with ECC.
- */
-static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
- size_t *retlen, const uint8_t *buf)
-{
-   struct mtd_oob_ops ops;
-   int ret;
-
-   

[U-Boot] [PATCH v4 06/27] mtd: fix build issue with includes

2018-07-13 Thread Miquel Raynal
Fix build errors produced by mtd.h and dm/device.h if not included in
the right order.

Signed-off-by: Miquel Raynal 
Reviewed-by: Jagan Teki 
---
 include/linux/mtd/mtd.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 78eb745c04..32e3f31f8c 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define MAX_MTD_DEVICES 32
 #endif
-- 
2.14.1

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[U-Boot] [PATCH v4 03/27] mtd: Add sanity checks in mtd_write/read_oob()

2018-07-13 Thread Miquel Raynal
From: Boris Brezillon 

Unlike what's done in mtd_read/write(), there are no checks to make sure
the parameters passed to mtd_read/write_oob() are consistent, which
forces implementers of ->_read/write_oob() to do it, which in turn leads
to code duplication and possibly errors in the logic.

Do general sanity checks, like ops fields consistency and range checking.

Signed-off-by: Boris Brezillon 
Cc: Peter Pan 
Signed-off-by: Richard Weinberger 
[Miquel: squashed the fix about the chip's size check]
Signed-off-by: Miquel Raynal 
---
 drivers/mtd/mtdcore.c | 45 +
 1 file changed, 45 insertions(+)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index ad61406dac..9a3efe95df 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1010,12 +1010,50 @@ int mtd_panic_write(struct mtd_info *mtd, loff_t to, 
size_t len, size_t *retlen,
 }
 EXPORT_SYMBOL_GPL(mtd_panic_write);
 
+static int mtd_check_oob_ops(struct mtd_info *mtd, loff_t offs,
+struct mtd_oob_ops *ops)
+{
+   /*
+* Some users are setting ->datbuf or ->oobbuf to NULL, but are leaving
+* ->len or ->ooblen uninitialized. Force ->len and ->ooblen to 0 in
+*  this case.
+*/
+   if (!ops->datbuf)
+   ops->len = 0;
+
+   if (!ops->oobbuf)
+   ops->ooblen = 0;
+
+   if (offs < 0 || offs + ops->len > mtd->size)
+   return -EINVAL;
+
+   if (ops->ooblen) {
+   u64 maxooblen;
+
+   if (ops->ooboffs >= mtd_oobavail(mtd, ops))
+   return -EINVAL;
+
+   maxooblen = ((mtd_div_by_ws(mtd->size, mtd) -
+ mtd_div_by_ws(offs, mtd)) *
+mtd_oobavail(mtd, ops)) - ops->ooboffs;
+   if (ops->ooblen > maxooblen)
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
 int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops)
 {
int ret_code;
ops->retlen = ops->oobretlen = 0;
if (!mtd->_read_oob)
return -EOPNOTSUPP;
+
+   ret_code = mtd_check_oob_ops(mtd, from, ops);
+   if (ret_code)
+   return ret_code;
+
/*
 * In cases where ops->datbuf != NULL, mtd->_read_oob() has semantics
 * similar to mtd->_read(), returning a non-negative integer
@@ -1034,11 +1072,18 @@ EXPORT_SYMBOL_GPL(mtd_read_oob);
 int mtd_write_oob(struct mtd_info *mtd, loff_t to,
struct mtd_oob_ops *ops)
 {
+   int ret;
+
ops->retlen = ops->oobretlen = 0;
if (!mtd->_write_oob)
return -EOPNOTSUPP;
if (!(mtd->flags & MTD_WRITEABLE))
return -EROFS;
+
+   ret = mtd_check_oob_ops(mtd, to, ops);
+   if (ret)
+   return ret;
+
return mtd->_write_oob(mtd, to, ops);
 }
 EXPORT_SYMBOL_GPL(mtd_write_oob);
-- 
2.14.1

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[U-Boot] [PATCH v4 00/27] SPI-NAND support

2018-07-13 Thread Miquel Raynal
During the last months, Boris Brezillon shared his work to support
serial flashes within Linux. First, he delivered (and merged) a new
layer called spi-mem. He also initiated in Linux MTD subsystem the move
of all 'raw' NAND related code to a raw/ subdirectory, adding at the
same time a NAND core that would be shared with all NAND devices. Then,
he contributed a generic SPI-NAND driver, making use of this NAND core,
as well as some vendor code to drive a few chips.

On top of this work, I added an 'mtd' U-Boot command to handle all sort
of MTD devices. This should become the default command instead of having
one per flash flavor ('sf', 'nand', 'spi-nand' ?).

The series has been tested on an Ocelot board PCB123 (VSC7514),
featuring a Macronix SPI NAND chip.

TL;DR: the series contains:
- A few patches from Linux to resynchronize some areas of the MTD layer.
- Various fixes and re-organization of the MTD subsystem.
- The introduction of the SPI-mem interface.
- The addition of the generic SPI-NAND driver (and its bindings).
- Several SPI NAND chip drivers (Macronix, Micron, Winbond).
- A new 'mtd' command.
- Support for spi-nand devices in mtdparts.

To test your SPI-NAND device with U-Boot simply follow these lines:

> setenv mtdparts mtdparts=spi-nand0:1m(foo),-(bar)
> setenv mtdids spi-nand0=spi-nand0
> mtdparts # show the spi-nand device partitions
> ubi part bar # create a static UBI volume in the bar partition

Thanks,
Miquèl

Changes since v3:
-
* Fixed the debug messages in spi-mem to print either Rx or Tx data.
* Fixed a Kconfig error that prevented to build mtdparts with plain
  defconfig.
* Fixed a compilation error due to the above error that prevented one
  file to be compiled.
* Adapted the mtd command to probe MTD partitions also.
* Declared mtd_probe_devices() in a header so mtdparts or UBI could
  use it too (to probe all devices and MTD partitions in a clean way).
* As I worked on mtdparts, I found annoying and completely useless the
  fact that we need to prefix the environment variable with
  "mtdparts=". Canceled this obligation.
* Added one patch to allow spi-nand devices to be recognized by mtdparts
  (this is purely useless but needed to be done in order to use this
  command).
* Removed useless definitions of MTD device types in UBI code.
* Wrote a generic mtdparts environment variable parser, used by the mtd
  command.
* Used the mtd_probe_devices() function from get_mtd_info() in
  cmd/mtdparts.c to be sure the desired partition really does not exist
  (otherwise it will be probed and then found).

Changes since v2:
-
* Rebased on u-boot master branch.
* Removed extra-parenthesis in
  "mtd: Fallback to ->_read/write() when ->_read/write_oob() is missing"
* s/fiels/files/ in "mtd: move NAND fiels into a raw/ subdirectory"
* Do not describe generic SPI device properties in SPI NAND bindings.
* Changes in the mtd command:
  * Printing more information in 'mtd list' (device type, device
characteristics)
  * Switch to do_div() instead of '(u32)value64b % value32b' which only
worked because value32b was a power of 2.
  * Removed erase.chip option.
  * By default, erase/read/write happen on the full MTD device while a
dump will only work on a single page.

Changes since v1:
-
* Fixed the nand_memorg structure of the MX35LF2GE4AB chip.
* Added Reviewed-by tags from Jagan.
* Backported and squashed two patches fixing things in the SPI NAND core
  received on the Linux ML.
* Backported more changes in mtdcore.c from Linux.
* Added a patch to add a fallback on mtd->_read/_write() in mtdcore.c
  when mtd->_read/write_oob() is not supported.
* Removed the DT changes, useless as the DTs are not available in
  mainline yet.
* Addressed Boris/Stefan comments on the 'mtd' command.
* Added support for multi-pages OOB read/write.


Boris Brezillon (7):
  mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing
  mtd: Add sanity checks in mtd_write/read_oob()
  mtd: nand: Add core infrastructure to deal with NAND devices
  mtd: nand: Pass mode information to nand_page_io_req
  spi: Extend the core to ease integration of SPI memory controllers
  mtd: spinand: Add initial support for the MX35LF1GE4AB chip
  dt-bindings: Add bindings for SPI NAND devices

Brian Norris (1):
  mtd: add get/set of_node/flash_node helpers

Ezequiel Garcia (1):
  mtd: Uninline mtd_write_oob and move it to mtdcore.c

Frieder Schrempf (1):
  mtd: spinand: Add initial support for Winbond W25M02GV

Miquel Raynal (15):
  mtd: Fallback to ->_read/write() when ->_read/write_oob() is missing
  mtd: fix build issue with includes
  mtd: move definitions to enlarge their range
  mtd: move all flash categories inside MTD submenu
  mtd: move NAND files into a raw/ subdirectory
  mtd: rename nand into rawnand in Kconfig prompt
  mtd: spinand: Add initial support for the MX35LF2GE4AB chip
  mtd: declare MTD_PARTITIONS symbol in Kconfig
  cmd: ubi: 

Re: [U-Boot] [PATCH v3 00/21] SPI-NAND support

2018-07-13 Thread Miquel Raynal
Hi Miquel,

Miquel Raynal  wrote on Thu, 12 Jul 2018
15:24:45 +0200:

> During the last months, Boris Brezillon shared his work to support
> serial flashes within Linux. First, he delivered (and merged) a new
> layer called spi-mem. He also initiated in Linux MTD subsystem the move
> of all 'raw' NAND related code to a raw/ subdirectory, adding at the
> same time a NAND core that would be shared with all NAND devices. Then,
> he contributed a generic SPI-NAND driver, making use of this NAND core,
> as well as some vendor code to drive a few chips.
> 
> On top of this work, I added an 'mtd' U-Boot command to handle all sort
> of MTD devices. This should become the default command instead of having
> one per flash flavor ('sf', 'nand', 'spi-nand' ?).
> 
> The series has been tested on an Ocelot board PCB123 (VSC7514),
> featuring a Macronix SPI NAND chip.
> 
> TL;DR: the series contains:
> - A few patches from Linux to resynchronize some areas of the MTD layer.
> - Various fixes and re-organization of the MTD subsystem.
> - The introduction of the SPI-mem interface.
> - The addition of the generic SPI-NAND driver (and its bindings).
> - Several SPI NAND chip drivers (Macronix, Micron, Winbond).
> - A new 'mtd' command.
> 
> Any comments on the code, the organization and the respect of U-Boot
> driver model will be welcome.
> 
> Thanks,
> Miquèl
> 

Since this version, I tried to use UBI on top of this work and it
failed because of the following:
- mtdpart driver was not actually compiled because a Kconfig symbol was
  missing
- mtdpart.c could not compile anyway because of an error when
  backporting the patch from Linux (did not see it because of the above
  mistake).
- SPI-NAND devices were not supported in mtdparts.
- The mtd command did not create MTD devices for each desired partition.

This is now fixed/done in the next version that I am about to send.

One can try it with:

> setenv mtdparts mtdparts=spi-nand0:1m(foo),-(bar)
> setenv mtdids spi-nand0=spi-nand0
> ubi part bar

Thanks,
Miquèl
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[U-Boot] [ v2 06/10] video: add MIPI DSI host controller bridge

2018-07-13 Thread Yannick Fertré
Add a Synopsys Designware MIPI DSI host bridge driver, based on the
Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.

Signed-off-by: Yannick Fertré 
---
 drivers/video/Kconfig   |   9 +
 drivers/video/Makefile  |   1 +
 drivers/video/dw_mipi_dsi.c | 826 
 include/dw_mipi_dsi.h   |  32 ++
 4 files changed, 868 insertions(+)
 create mode 100644 drivers/video/dw_mipi_dsi.c
 create mode 100644 include/dw_mipi_dsi.h

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e1029e5..3ccc8df 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -674,6 +674,15 @@ config VIDEO_DW_HDMI
  rather requires a SoC-specific glue driver to call it), it
  can not be enabled from the configuration menu.
 
+config VIDEO_DW_MIPI_DSI
+   bool
+   help
+ Enables the common driver code for the Synopsis Designware
+ MIPI DSI block found in SoCs from various vendors.
+ As this does not provide any functionality by itself (but
+ rather requires a SoC-specific glue driver to call it), it
+ can not be enabled from the configuration menu.
+
 config VIDEO_SIMPLE
bool "Simple display driver for preconfigured display"
help
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 018343f..bb2fd3c 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
 obj-$(CONFIG_LG4573) += lg4573.o
 obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
 obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
 obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
 obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
new file mode 100644
index 000..db278c5
--- /dev/null
+++ b/drivers/video/dw_mipi_dsi.c
@@ -0,0 +1,826 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu  for STMicroelectronics.
+ *Yannick Fertre  for STMicroelectronics.
+ *
+ * This generic Synopsys DesignWare MIPI DSI host driver is inspired from
+ * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define HWVER_131  0x31333100  /* IP version 1.31 */
+
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+#define DSI_PWR_UP 0x04
+#define RESET  0
+#define POWERUPBIT(0)
+
+#define DSI_CLKMGR_CFG 0x08
+#define TO_CLK_DIVISION(div)   (((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVISION(div)   ((div) & 0xff)
+
+#define DSI_DPI_VCID   0x0c
+#define DPI_VCID(vcid) ((vcid) & 0x3)
+
+#define DSI_DPI_COLOR_CODING   0x10
+#define LOOSELY18_EN   BIT(8)
+#define DPI_COLOR_CODING_16BIT_1   0x0
+#define DPI_COLOR_CODING_16BIT_2   0x1
+#define DPI_COLOR_CODING_16BIT_3   0x2
+#define DPI_COLOR_CODING_18BIT_1   0x3
+#define DPI_COLOR_CODING_18BIT_2   0x4
+#define DPI_COLOR_CODING_24BIT 0x5
+
+#define DSI_DPI_CFG_POL0x14
+#define COLORM_ACTIVE_LOW  BIT(4)
+#define SHUTD_ACTIVE_LOW   BIT(3)
+#define HSYNC_ACTIVE_LOW   BIT(2)
+#define VSYNC_ACTIVE_LOW   BIT(1)
+#define DATAEN_ACTIVE_LOW  BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM 0x18
+#define OUTVACT_LPCMD_TIME(p)  (((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p)   ((p) & 0xff)
+
+#define DSI_DBI_VCID   0x1c
+#define DSI_DBI_CFG0x20
+#define DSI_DBI_PARTITIONING_EN0x24
+#define DSI_DBI_CMDSIZE0x28
+
+#define DSI_PCKHDL_CFG 0x2c
+#define CRC_RX_EN  BIT(4)
+#define ECC_RX_EN  BIT(3)
+#define BTA_EN BIT(2)
+#define EOTP_RX_EN BIT(1)
+#define EOTP_TX_EN BIT(0)
+
+#define DSI_GEN_VCID   0x30
+
+#define DSI_MODE_CFG   0x34
+#define ENABLE_VIDEO_MODE  0
+#define ENABLE_CMD_MODEBIT(0)
+
+#define DSI_VID_MODE_CFG   0x38
+#define ENABLE_LOW_POWER   (0x3f << 8)
+#define ENABLE_LOW_POWER_MASK  (0x3f << 8)
+#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0
+#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS0x1
+#define VID_MODE_TYPE_BURST0x2
+#define VID_MODE_TYPE_MASK 0x3
+
+#define 

[U-Boot] [ v2 10/10] board: Add STM32F769 SoC, discovery board support

2018-07-13 Thread Yannick Fertré
Signed-off-by: Yannick Fertré 
---
 configs/stm32f769-disco_defconfig | 67 +++
 1 file changed, 67 insertions(+)
 create mode 100644 configs/stm32f769-disco_defconfig

diff --git a/configs/stm32f769-disco_defconfig 
b/configs/stm32f769-disco_defconfig
new file mode 100644
index 000..bc99894
--- /dev/null
+++ b/configs/stm32f769-disco_defconfig
@@ -0,0 +1,67 @@
+CONFIG_ARM=y
+CONFIG_STM32=y
+CONFIG_SYS_TEXT_BASE=0x08008000
+CONFIG_SYS_MALLOC_F_LEN=0xC00
+CONFIG_STM32F7=y
+CONFIG_TARGET_STM32F746_DISCO=y
+CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 
ignore_loglevel"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot > "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+# CONFIG_BLK is not set
+CONFIG_DM_MMC=y
+# CONFIG_SPL_DM_MMC is not set
+CONFIG_ARM_PL180_MMCI=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+# CONFIG_PINCTRL_FULL is not set
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_STM32_QSPI=y
+CONFIG_DM_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
-- 
1.9.1

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[U-Boot] [ v2 09/10] arm: dts: stm32: add display for STM32F769 disco board

2018-07-13 Thread Yannick Fertré
Enable the display controller, mipi dsi bridge & panel.
Set panel display timings.

Signed-off-by: Yannick Fertré 
---
 arch/arm/dts/stm32f769-disco.dts | 41 
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 59c9d31..dec04bc 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -84,6 +84,18 @@
compatible = "st,button1";
button-gpio = < 0 0>;
};
+
+   panel: panel {
+   compatible = "orisetech,otm8009a";
+   reset-gpios = < 15 1>;
+   status = "okay";
+
+   port {
+   panel_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
 };
 
 _hse {
@@ -264,3 +276,32 @@
bus-width = <4>;
max-frequency = <2500>;
 };
+
+ {
+   status = "okay";
+
+   ports {
+   port@0 {
+   dp_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+};
+
+ {
+   status = "okay";
+
+   ports {
+   port@0 {
+   dsi_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   port@1 {
+   dsi_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
+};
-- 
1.9.1

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[U-Boot] [ v2 08/10] arm: dts: stm32: add dsi for STM32F746

2018-07-13 Thread Yannick Fertré
Add mipi dsi bridge node in device-tree.

Signed-off-by: Yannick Fertré 
---
 arch/arm/dts/stm32f746.dtsi | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index afa7832..005d267 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -340,6 +340,18 @@
u-boot,dm-pre-reloc;
status = "disabled";
};
+
+   dsi: dsi@40016c00 {
+   compatible = "st,stm32-dsi";
+   reg = <0x40016C00 0x800>;
+   resets = < STM32F7_APB2_RESET(DSI)>;
+   clocks =  < 0 STM32F7_APB2_CLOCK(DSI)>,
+ < 0 STM32F7_APB2_CLOCK(LTDC)>,
+ <_hse>;
+   clock-names = "pclk", "px_clk", "ref";
+   u-boot,dm-pre-reloc;
+   status = "disabled";
+   };
};
 };
 
-- 
1.9.1

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[U-Boot] [ v2 07/10] video: add support of STM32 MIPI DSI controller driver

2018-07-13 Thread Yannick Fertré
Add the STM32 DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.

Signed-off-by: Yannick Fertré 
---
 drivers/video/stm32/Kconfig |  10 +
 drivers/video/stm32/Makefile|   1 +
 drivers/video/stm32/stm32_dsi.c | 427 
 3 files changed, 438 insertions(+)
 create mode 100644 drivers/video/stm32/stm32_dsi.c

diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig
index 78b1fac..5b5e2c4 100644
--- a/drivers/video/stm32/Kconfig
+++ b/drivers/video/stm32/Kconfig
@@ -13,6 +13,16 @@ menuconfig VIDEO_STM32
  DSI. This option enables these supports which can be used on
  devices which have RGB TFT or DSI display connected.
 
+config VIDEO_STM32_DSI
+   bool "Enable STM32 DSI video support"
+   depends on VIDEO_STM32
+   select VIDEO_MIPI_DSI
+   select VIDEO_BRIDGE
+   select VIDEO_DW_MIPI_DSI
+   help
+ This option enables support DSI internal bridge which can be used on
+ devices which have DSI devices connected.
+
 config VIDEO_STM32_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_STM32
diff --git a/drivers/video/stm32/Makefile b/drivers/video/stm32/Makefile
index 7297e5f..f8b42d1 100644
--- a/drivers/video/stm32/Makefile
+++ b/drivers/video/stm32/Makefile
@@ -6,3 +6,4 @@
 #  Yannick Fertre 
 
 obj-${CONFIG_VIDEO_STM32} = stm32_ltdc.o
+obj-${CONFIG_VIDEO_STM32_DSI} += stm32_dsi.o
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
new file mode 100644
index 000..43da83d
--- /dev/null
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -0,0 +1,427 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu  for STMicroelectronics.
+ *   Yannick Fertre  for STMicroelectronics.
+ *
+ * This MIPI DSI controller driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/stm/dw_mipi_dsi-stm.c.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define HWVER_130  0x31333000  /* IP version 1.30 */
+#define HWVER_131  0x31333100  /* IP version 1.31 */
+
+/* DSI digital registers & bit definitions */
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+/*
+ * DSI wrapper registers & bit definitions
+ * Note: registers are named as in the Reference Manual
+ */
+#define DSI_WCFGR  0x0400  /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM BIT(0)  /* DSI Mode */
+#define WCFGR_COLMUX   GENMASK(3, 1)   /* COLor MUltipleXing */
+
+#define DSI_WCR0x0404  /* Wrapper Control Reg */
+#define WCR_DSIEN  BIT(3)  /* DSI ENable */
+
+#define DSI_WISR   0x040C  /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS BIT(8)  /* PLL Lock Status */
+#define WISR_RRS   BIT(12) /* Regulator Ready Status */
+
+#define DSI_WPCR0  0x0418  /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4 GENMASK(5, 0)   /* Unit Interval X 4 */
+#define WPCR0_TDDL BIT(16) /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR  0x0430  /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLENBIT(0)  /* PLL ENable */
+#define WRPCR_NDIV GENMASK(8, 2)   /* pll loop DIVision Factor */
+#define WRPCR_IDF  GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF  GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGENBIT(24) /* REGulator ENable */
+#define WRPCR_BGRENBIT(28) /* BandGap Reference ENable */
+#define IDF_MIN1
+#define IDF_MAX7
+#define NDIV_MIN   10
+#define NDIV_MAX   125
+#define ODF_MIN1
+#define ODF_MAX8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+   DSI_RGB565_CONF1,
+   DSI_RGB565_CONF2,
+   DSI_RGB565_CONF3,
+   DSI_RGB666_CONF1,
+   DSI_RGB666_CONF2,
+   DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS  31250
+#define LANE_MAX_KBPS  50
+
+/* Timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define TIMEOUT_US 20
+
+struct stm32_dsi_priv {
+   struct mipi_dsi_device device;
+   void __iomem *base;
+   struct udevice *panel;
+   u32 pllref_clk;
+   u32 hw_version;
+   int lane_min_kbps;
+   int lane_max_kbps;
+};
+
+static inline void dsi_write(struct stm32_dsi_priv *dsi, u32 reg, u32 val)
+{
+   writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct stm32_dsi_priv *dsi, u32 reg)
+{
+   return readl(dsi->base + reg);
+}
+
+static inline void dsi_set(struct stm32_dsi_priv *dsi, u32 reg, u32 mask)
+{
+   

[U-Boot] [ v2 04/10] video: add support of panel OTM8009A

2018-07-13 Thread Yannick Fertré
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.

Signed-off-by: Yannick Fertré 
---
 drivers/video/Kconfig  |   8 +
 drivers/video/Makefile |   1 +
 drivers/video/orisetech_otm8009a.c | 366 +
 3 files changed, 375 insertions(+)
 create mode 100644 drivers/video/orisetech_otm8009a.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 560da1a..8a168c8 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -329,6 +329,14 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
 
+config VIDEO_LCD_ORISETECH_OTM8009A
+   bool "OTM8009A DSI LCD panel support"
+   depends on DM_VIDEO
+   select VIDEO_MIPI_DSI
+   default n
+   help
+ Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+
 config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 4e2ec41..b9d7d81 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 obj-$(CONFIG_VIDEO_EFI) += efi.o
 obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
 obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
 obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
 obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/orisetech_otm8009a.c 
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..c5a1ee4
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,366 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre  for STMicroelectronics.
+ *Philippe Cornu  for STMicroelectronics.
+ *
+ * This otm8009a panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x  /* Address Shift Function */
+#define MCS_PANSET 0xB3A6  /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2  /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4  /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181  /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1  /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480  /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A  /* Command not documented */
+#define MCS_PWR_CTRL1  0xC580  /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2  0xC590  /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4  0xC5B0  /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80  /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90  /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0  /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0  /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0  /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0  /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0  /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0  /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80  /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90  /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0  /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0  /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0  /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0  /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80  /* GOA VST Setting */
+#define MCS_GOACLKA1   0xCEA0  /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3   0xCEB0  /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0  /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0  /* Command not documented */
+#define MCS_GVDDSET0xD800  /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900  /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P   0xE100  /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N   0xE200  /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6  /* Command not documented */
+#define MCS_CMD2_ENA1  0xFF00  /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2  0xFF80  /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+   struct udevice *reg;
+   struct gpio_desc reset;
+};
+
+static const struct display_timing default_timing = {
+   .pixelclock.typ = 32729000,
+   .hactive.typ= 480,
+   

[U-Boot] [ v2 05/10] video: add support of panel RM68200

2018-07-13 Thread Yannick Fertré
Support for Raydium RM68200 720p dsi 2dl video mode panel.
This rm68200 panel driver is based on the Linux Kernel driver from
drivers/gpu/drm/panel/panel-raydium-rm68200.c.

Signed-off-by: Yannick Fertré 
---
 drivers/video/Kconfig   |   8 +
 drivers/video/Makefile  |   1 +
 drivers/video/raydium-rm68200.c | 338 
 3 files changed, 347 insertions(+)
 create mode 100644 drivers/video/raydium-rm68200.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 8a168c8..e1029e5 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -337,6 +337,14 @@ config VIDEO_LCD_ORISETECH_OTM8009A
help
  Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
 
+config VIDEO_LCD_RAYDIUM_RM68200
+   bool "RM68200 DSI LCD panel support"
+   depends on DM_VIDEO
+   select VIDEO_MIPI_DSI
+   default n
+   help
+ Support for Raydium rm68200 720x1280 dsi 2dl video mode panel.
+
 config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index b9d7d81..018343f 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_VIDEO_EFI) += efi.o
 obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
 obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
 obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
+obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
 obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
 obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
new file mode 100644
index 000..b0b10c1
--- /dev/null
+++ b/drivers/video/raydium-rm68200.c
@@ -0,0 +1,338 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre  for STMicroelectronics.
+ *Philippe Cornu  for STMicroelectronics.
+ *
+ * This rm68200 panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-raydium-rm68200.c.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*** Manufacturer Command Set ***/
+#define MCS_CMD_MODE_SW0xFE /* CMD Mode Switch */
+#define MCS_CMD1_UCS   0x00 /* User Command Set (UCS = CMD1) */
+#define MCS_CMD2_P00x01 /* Manufacture Command Set Page0 (CMD2 P0) */
+#define MCS_CMD2_P10x02 /* Manufacture Command Set Page1 (CMD2 P1) */
+#define MCS_CMD2_P20x03 /* Manufacture Command Set Page2 (CMD2 P2) */
+#define MCS_CMD2_P30x04 /* Manufacture Command Set Page3 (CMD2 P3) */
+
+/* CMD2 P0 commands (Display Options and Power) */
+#define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
+#define MCS_SGOPCTR0x16 /* Source Bias Current */
+#define MCS_SDCTR  0x1A /* Source Output Delay Time */
+#define MCS_INVCTR 0x1B /* Inversion Type */
+#define MCS_EXT_PWR_IC 0x24 /* External PWR IC Control */
+#define MCS_SETAVDD0x27 /* PFM Control for AVDD Output */
+#define MCS_SETAVEE0x29 /* PFM Control for AVEE Output */
+#define MCS_BT2CTR 0x2B /* DDVDL Charge Pump Control */
+#define MCS_BT3CTR 0x2F /* VGH Charge Pump Control */
+#define MCS_BT4CTR 0x34 /* VGL Charge Pump Control */
+#define MCS_VCMCTR 0x46 /* VCOM Output Level Control */
+#define MCS_SETVGN 0x52 /* VG M/S N Control */
+#define MCS_SETVGP 0x54 /* VG M/S P Control */
+#define MCS_SW_CTRL0x5F /* Interface Control for PFM and MIPI */
+
+/* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
+#define GOA_VSTV1  0x00
+#define GOA_VSTV2  0x07
+#define GOA_VCLK1  0x0E
+#define GOA_VCLK2  0x17
+#define GOA_VCLK_OPT1  0x20
+#define GOA_BICLK1 0x2A
+#define GOA_BICLK2 0x37
+#define GOA_BICLK3 0x44
+#define GOA_BICLK4 0x4F
+#define GOA_BICLK_OPT1 0x5B
+#define GOA_BICLK_OPT2 0x60
+#define MCS_GOA_GPO1   0x6D
+#define MCS_GOA_GPO2   0x71
+#define MCS_GOA_EQ 0x74
+#define MCS_GOA_CLK_GALLON 0x7C
+#define MCS_GOA_FS_SEL00x7E
+#define MCS_GOA_FS_SEL10x87
+#define MCS_GOA_FS_SEL20x91
+#define MCS_GOA_FS_SEL30x9B
+#define MCS_GOA_BS_SEL00xAC
+#define MCS_GOA_BS_SEL10xB5
+#define MCS_GOA_BS_SEL20xBF
+#define MCS_GOA_BS_SEL30xC9
+#define MCS_GOA_BS_SEL40xD3
+
+/* CMD2 P3 commands (Gamma) */
+#define MCS_GAMMA_VP   0x60 /* Gamma VP1~VP16 */
+#define MCS_GAMMA_VN   0x70 /* Gamma VN1~VN16 */
+
+struct rm68200_panel_priv {
+   struct udevice *reg;
+   struct udevice *backlight;
+   struct gpio_desc reset;
+};
+
+static const struct display_timing 

[U-Boot] [ v2 03/10] video: add support of MIPI DSI interface

2018-07-13 Thread Yannick Fertré
Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).

Signed-off-by: Yannick Fertré 
---
 drivers/video/Kconfig|   9 +
 drivers/video/Makefile   |   1 +
 drivers/video/mipi_display.c | 817 +++
 include/mipi_display.h   | 257 +-
 4 files changed, 1083 insertions(+), 1 deletion(-)
 create mode 100644 drivers/video/mipi_display.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 5ee9032..560da1a 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -73,6 +73,15 @@ config VIDEO_ANSI
  Enable ANSI escape sequence decoding for a more fully functional
  console.
 
+config VIDEO_MIPI_DSI
+   bool "Support MIPI DSI interface"
+   depends on DM_VIDEO
+   default y if DM_VIDEO
+   help
+ Support MIPI DSI interface for driving a MIPI compatible device.
+ The MIPI Display Serial Interface (MIPI DSI) defines a high-speed
+ serial interface between a host processor and a display module.
+
 config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 7c89c67..4e2ec41 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
 obj-$(CONFIG_LG4573) += lg4573.o
 obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
 obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
 obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
 obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
 obj-${CONFIG_EXYNOS_FB} += exynos/
diff --git a/drivers/video/mipi_display.c b/drivers/video/mipi_display.c
new file mode 100644
index 000..9c96b9d
--- /dev/null
+++ b/drivers/video/mipi_display.c
@@ -0,0 +1,817 @@
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Andrzej Hajda 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Mipi_display.c contains a set of dsi helpers.
+ * This file is inspired from the drm helper file 
drivers/gpu/drm/drm_mipi_dsi.c
+ * (kernel linux).
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->attach)
+   return -ENOSYS;
+
+   return ops->attach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_attach);
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->detach)
+   return -ENOSYS;
+
+   return ops->detach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_detach);
+
+/**
+ * mipi_dsi_device_transfer - transfer message to a DSI device
+ * @dsi: DSI peripheral
+ * @msg: message
+ */
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+   struct mipi_dsi_msg *msg)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->transfer)
+   return -ENOSYS;
+
+   if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+   msg->flags |= MIPI_DSI_MSG_USE_LPM;
+
+   return ops->transfer(dsi->host, msg);
+}
+
+/**
+ * mipi_dsi_packet_format_is_short - check if a packet is of 

[U-Boot] [ v2 00/10] splash screen on the stm32f769 disco board

2018-07-13 Thread Yannick Fertré
Version 1:
- Initial commit:

Version2:
- swap patches to avoid compilation issue.
- remove panel timings from device tree

This serie contains all patchsets needed for displaying a splash screen 
on the stm32f769 disco board.
A new config has been created configs/stm32f769-disco_defconfig.
This is necessary due to the difference of panels between stm32f769-disco &
stm32f746-disco boards.

Yannick Fertré (10):
  dm: panel: get timings  from panel
  video: stm32: stm32_ltdc: add bridge to display controller
  video: add support of MIPI DSI interface
  video: add support of panel OTM8009A
  video: add support of panel RM68200
  video: add MIPI DSI host controller bridge
  video: add support of STM32 MIPI DSI controller driver
  arm: dts: stm32: add dsi for STM32F746
  arm: dts: stm32: add display for STM32F769 disco board
  board: Add STM32F769 SoC, discovery board support

 arch/arm/dts/stm32f746.dtsi|  12 +
 arch/arm/dts/stm32f769-disco.dts   |  41 ++
 configs/stm32f769-disco_defconfig  |  67 +++
 drivers/video/Kconfig  |  34 ++
 drivers/video/Makefile |   4 +
 drivers/video/dw_mipi_dsi.c| 826 +
 drivers/video/mipi_display.c   | 817 
 drivers/video/orisetech_otm8009a.c | 366 
 drivers/video/panel-uclass.c   |  11 +
 drivers/video/raydium-rm68200.c| 338 +++
 drivers/video/stm32/Kconfig|  10 +
 drivers/video/stm32/Makefile   |   1 +
 drivers/video/stm32/stm32_dsi.c| 427 +++
 drivers/video/stm32/stm32_ltdc.c   | 154 ---
 include/dw_mipi_dsi.h  |  32 ++
 include/mipi_display.h | 257 +++-
 include/panel.h|  18 +
 17 files changed, 3352 insertions(+), 63 deletions(-)
 create mode 100644 configs/stm32f769-disco_defconfig
 create mode 100644 drivers/video/dw_mipi_dsi.c
 create mode 100644 drivers/video/mipi_display.c
 create mode 100644 drivers/video/orisetech_otm8009a.c
 create mode 100644 drivers/video/raydium-rm68200.c
 create mode 100644 drivers/video/stm32/stm32_dsi.c
 create mode 100644 include/dw_mipi_dsi.h

-- 
1.9.1

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[U-Boot] [ v2 02/10] video: stm32: stm32_ltdc: add bridge to display controller

2018-07-13 Thread Yannick Fertré
Manage a bridge insert between the display controller & a panel.

Signed-off-by: Yannick Fertré 
---
 drivers/video/stm32/stm32_ltdc.c | 154 +++
 1 file changed, 92 insertions(+), 62 deletions(-)

diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index dc6c889..4a1db5e 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -4,22 +4,20 @@
  * Author(s): Philippe Cornu  for STMicroelectronics.
  *   Yannick Fertre  for STMicroelectronics.
  */
-
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct stm32_ltdc_priv {
void __iomem *regs;
-   struct display_timing timing;
enum video_log2_bpp l2bpp;
u32 bg_col_argb;
u32 crop_x, crop_y, crop_w, crop_h;
@@ -174,8 +172,8 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp 
l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
-   debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+   pr_warn("%s: warning %dbpp not supported yet, %dbpp instead\n",
+   __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
@@ -209,23 +207,23 @@ static void stm32_ltdc_enable(struct stm32_ltdc_priv 
*priv)
setbits_le32(priv->regs + LTDC_GCR, GCR_LTDCEN);
 }
 
-static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv)
+static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv,
+   struct display_timing *timings)
 {
void __iomem *regs = priv->regs;
-   struct display_timing *timing = >timing;
u32 hsync, vsync, acc_hbp, acc_vbp, acc_act_w, acc_act_h;
u32 total_w, total_h;
u32 val;
 
/* Convert video timings to ltdc timings */
-   hsync = timing->hsync_len.typ - 1;
-   vsync = timing->vsync_len.typ - 1;
-   acc_hbp = hsync + timing->hback_porch.typ;
-   acc_vbp = vsync + timing->vback_porch.typ;
-   acc_act_w = acc_hbp + timing->hactive.typ;
-   acc_act_h = acc_vbp + timing->vactive.typ;
-   total_w = acc_act_w + timing->hfront_porch.typ;
-   total_h = acc_act_h + timing->vfront_porch.typ;
+   hsync = timings->hsync_len.typ - 1;
+   vsync = timings->vsync_len.typ - 1;
+   acc_hbp = hsync + timings->hback_porch.typ;
+   acc_vbp = vsync + timings->vback_porch.typ;
+   acc_act_w = acc_hbp + timings->hactive.typ;
+   acc_act_h = acc_vbp + timings->vactive.typ;
+   total_w = acc_act_w + timings->hfront_porch.typ;
+   total_h = acc_act_h + timings->vfront_porch.typ;
 
/* Synchronization sizes */
val = (hsync << 16) | vsync;
@@ -247,14 +245,14 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv 
*priv)
 
/* Signal polarities */
val = 0;
-   debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);
-   if (timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)
+   debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+   if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
-   if (timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)
+   if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= GCR_VSPOL;
-   if (timing->flags & DISPLAY_FLAGS_DE_HIGH)
+   if (timings->flags & DISPLAY_FLAGS_DE_HIGH)
val |= GCR_DEPOL;
-   if (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+   if (timings->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
val |= GCR_PCPOL;
clrsetbits_le32(regs + LTDC_GCR,
GCR_HSPOL | GCR_VSPOL | GCR_DEPOL | GCR_PCPOL, val);
@@ -330,96 +328,128 @@ static int stm32_ltdc_probe(struct udevice *dev)
struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct stm32_ltdc_priv *priv = dev_get_priv(dev);
-   struct udevice *panel;
+#ifdef CONFIG_VIDEO_BRIDGE
+   struct udevice *bridge = NULL;
+#endif
+   struct udevice *panel = NULL;
+   struct display_timing timings;
struct clk pclk;
struct reset_ctl rst;
-   int rate, ret;
+   int ret;
 
priv->regs = (void *)dev_read_addr(dev);
if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
-   debug("%s: ltdc dt register address error\n", __func__);
+   dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
 
ret = clk_get_by_index(dev, 0, );
if (ret) {
-   debug("%s: peripheral clock get error %d\n", __func__, ret);
+   dev_err(dev, "peripheral clock get error %d\n", ret);
return ret;
}
 
ret = clk_enable();
if 

[U-Boot] [ v2 01/10] dm: panel: get timings from panel

2018-07-13 Thread Yannick Fertré
Get timings from panel instead of read device tree.

Signed-off-by: Yannick Fertré 
---
 drivers/video/panel-uclass.c | 11 +++
 include/panel.h  | 18 ++
 2 files changed, 29 insertions(+)

diff --git a/drivers/video/panel-uclass.c b/drivers/video/panel-uclass.c
index 2841bb3..aec44a8 100644
--- a/drivers/video/panel-uclass.c
+++ b/drivers/video/panel-uclass.c
@@ -18,6 +18,17 @@ int panel_enable_backlight(struct udevice *dev)
return ops->enable_backlight(dev);
 }
 
+int panel_get_display_timing(struct udevice *dev,
+struct display_timing *timings)
+{
+   struct panel_ops *ops = panel_get_ops(dev);
+
+   if (!ops->get_display_timing)
+   return -ENOSYS;
+
+   return ops->get_display_timing(dev, timings);
+}
+
 UCLASS_DRIVER(panel) = {
.id = UCLASS_PANEL,
.name   = "panel",
diff --git a/include/panel.h b/include/panel.h
index 46dca48b..6237d32 100644
--- a/include/panel.h
+++ b/include/panel.h
@@ -15,6 +15,15 @@ struct panel_ops {
 * @return 0 if OK, -ve on error
 */
int (*enable_backlight)(struct udevice *dev);
+   /**
+* get_timings() - Get display timings from panel.
+*
+* @dev:Panel device containing the display timings
+* @tim:Place to put timings
+* @return 0 if OK, -ve on error
+*/
+   int (*get_display_timing)(struct udevice *dev,
+ struct display_timing *timing);
 };
 
 #define panel_get_ops(dev) ((struct panel_ops *)(dev)->driver->ops)
@@ -27,4 +36,13 @@ struct panel_ops {
  */
 int panel_enable_backlight(struct udevice *dev);
 
+/**
+ * panel_get_display_timing() - Get display timings from panel.
+ *
+ * @dev:   Panel device containing the display timings
+ * @return 0 if OK, -ve on error
+ */
+int panel_get_display_timing(struct udevice *dev,
+struct display_timing *timing);
+
 #endif
-- 
1.9.1

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