Re: [U-Boot] [PATCH] spl: fit: Enable GZIP compression also for no kernel partitions

[Michal Simek]

On 24.7.2018 18:26, York Sun wrote:
> On 07/24/2018 06:07 AM, Michal Simek wrote:
>> There is no reason to limit gzip usage only for OS_BOOT and kernel image
>> type.
>>
>> Signed-off-by: Michal Simek 
>> ---
>>
>>  common/spl/spl_fit.c | 5 +
>>  1 file changed, 1 insertion(+), 4 deletions(-)
>>
>> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
>> index 9eabb1c1058b..dbf5ac33a845 100644
>> --- a/common/spl/spl_fit.c
>> +++ b/common/spl/spl_fit.c
>> @@ -257,10 +257,7 @@ static int spl_load_fit_image(struct spl_load_info 
>> *info, ulong sector,
>>  board_fit_image_post_process(, );
>>  #endif
>>  
>> -if (IS_ENABLED(CONFIG_SPL_OS_BOOT)  &&
>> -IS_ENABLED(CONFIG_SPL_GZIP) &&
>> -image_comp == IH_COMP_GZIP  &&
>> -type == IH_TYPE_KERNEL) {
>> +if (IS_ENABLED(CONFIG_SPL_GZIP) && image_comp == IH_COMP_GZIP) {
>>  size = length;
>>  if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
>> src, )) {
>>
> 
> This will uncompress ramdisk unnecessarily.

Can you please share your its fragment? Also is there any other image
which should be exclude?

Thanks,
Michal


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Re: [U-Boot] [PATCH] ddr: altera: Add ECC DRAM scrubbing support for Stratix 10

[Chee, Tien Fong]

On Tue, 2018-07-24 at 12:52 +0200, Marek Vasut wrote:
> On 07/24/2018 10:10 AM, Chee, Tien Fong wrote:
> > 
> > On Mon, 2018-07-23 at 11:46 +0200, Marek Vasut wrote:
> > > 
> > > On 07/23/2018 10:20 AM, tien.fong.c...@intel.com wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee 
> > > > 
> > > > The SDRAM must first be rewritten by zeroes if ECC is used to
> > > > initialize
> > > > the ECC metadata. Make the CPU overwrite the DRAM with zeroes
> > > > in
> > > > such a
> > > > case. This scrubbing implementation turns the caches on
> > > > temporarily, then
> > > > overwrites the whole RAM with zeroes, flushes the caches and
> > > > turns
> > > > them
> > > > off again. This provides satisfactory performance.
> > > > 
> > > > Signed-off-by: Tien Fong Chee 
> > > > ---
> > > >  drivers/ddr/altera/sdram_s10.c |   44
> > > > 
> > > >  1 files changed, 44 insertions(+), 0 deletions(-)
> > > > 
> > > > diff --git a/drivers/ddr/altera/sdram_s10.c
> > > > b/drivers/ddr/altera/sdram_s10.c
> > > > index 48f4f47..cce261f 100644
> > > > --- a/drivers/ddr/altera/sdram_s10.c
> > > > +++ b/drivers/ddr/altera/sdram_s10.c
> > > > @@ -8,6 +8,7 @@
> > > >  #include 
> > > >  #include 
> > > >  #include 
> > > > +#include 
> > > >  #include 
> > > >  #include 
> > > >  #include 
> > > > @@ -134,6 +135,47 @@ static int poll_hmc_clock_status(void)
> > > >      SYSMGR_HMC_CLK_STATUS_MSK,
> > > > true,
> > > > 1000, false);
> > > >  }
> > > >  
> > > > +/* Initialize SDRAM ECC bits to avoid false DBE */
> > > > +static void sdram_init_ecc_bits(unsigned long long size)
> > > > +{
> > > > +   /* 1GB per chunk */
> > > > +   unsigned long long size_byte = SZ_1G;
> > > > +   unsigned long long remaining_size;
> > > > +   unsigned long long dst_addr = 0x8000;
> > > > +   unsigned int start = get_timer(0);
> > > > +
> > > > +   icache_enable();
> > > > +
> > > > +   memset(0, 0, dst_addr);
> > > > +   gd->arch.tlb_addr = 0x4000;
> > > > +   gd->arch.tlb_size = PGTABLE_SIZE;
> > > Are you sure this is valid on arm64 ? It looks like something
> > > copies
> > > from arria10.
> > The cache on/off is copied from your implementation on Arria 10.
> > Yes, i
> > have tested it, it is working on Stratix 10 board.
> Right, except S10 is arm64, A10 is arm32, which is why I wonder
> whether
> careless copying is enough.
The PGTABLE_SIZE is getting from the function get_page_table_size()
which is specific for armv8 architecture. I'm also testing it on board
to ensure sufficient RAM for the page table.
> 
> > 
> > > 
> > > > 
> > > > 
> > > > +   dcache_enable();
> > > > +
> > > > +   remaining_size = size - dst_addr;
> > > > +   printf("DDRCAL: Scrubbing ECC RAM (%d MiB).\n",
> > > > (u32)(size
> > > > > 
> > > > > > 
> > > > > > 20));
> > > > +
> > > > +   while (remaining_size) {
> > > > +   if (remaining_size <= size_byte) {
> > > > +   memset((void *)dst_addr, 0,
> > > > remaining_size);
> > > > +   break;
> > > > +   } else {
> > > > +   memset((void *)dst_addr, 0,
> > > > size_byte);
> > > > +   dst_addr += size_byte;
> > > > +   }
> > > > +
> > > > +   WATCHDOG_RESET();
> > > > +   remaining_size -= size_byte;
> > > > +   }
> > > How long does this take ?
> > 1359ms for 2GB.
> So why do you need this watchdog reset hack ?
Yeah, for size scalable. When size growing up, it would take longer to
scrub. Without watchdog reset on time, it might be causing system to
reset.
> 
> > 
> > But I have no idea why Arria 10 board can't achieve the
> > same result. Could you try again on your Arria 10 ES board?
> There's nothing to try, the scrubbing works fine on A10.
Then, that really weird it took so long to finish scrubbing.
> 
> > 
> > > 
> > > > 
> > > > 
> > > > +   flush_dcache_all();
> > > > +   printf("DDRCAL: Scrubbing ECC RAM done.\n");
> > > > +   dcache_disable();
> > > > +
> > > > +   printf("SDRAM-ECC: Initialized success with %d ms\n",
> > > > +   (unsigned)get_timer(start));
> > > > +}
> > > > +
> > > >  /**
> > > >   * sdram_mmr_init_full() - Function to initialize SDRAM MMR
> > > >   *
> > > > @@ -351,6 +393,8 @@ int sdram_mmr_init_full(unsigned int
> > > > unused)
> > > >     setbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL2,
> > > >      (DDR_HMC_ECCCTL2_RMW_EN_SET_MSK |
> > > >       DDR_HMC_ECCCTL2_AWB_EN_SET_MSK))
> > > > ;
> > > > +
> > > > +   sdram_init_ecc_bits(gd->ram_size);
> > > >     } else {
> > > >     clrbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL1,
> > > >      (DDR_HMC_ECCCTL_AWB_CNT_RST_SET_M
> > > > SK |
> > > > 
> 
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[U-Boot] [PATCH v2 2/4] arm: odroid: Increase default env size in preparation for distro_bootcmd.

[Vagrant Cascadian]

Adding distro_bootcmd support bumps the default environment size over
4500. Increase to SZ_16K to allow for room to grow in the future.

Acked-by: Lukasz Majewski 

Signed-off-by: Vagrant Cascadian 
---

Changes in v2:
- Change from 16384 to SZ_16K, as suggested by Minkyu Kang.

 include/configs/odroid.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index b7b75c0dc0..07882aca9a 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -50,7 +50,7 @@
 #define CONFIG_SYS_MONITOR_BASE0x
 
 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
-#define CONFIG_ENV_SIZE4096
+#define CONFIG_ENV_SIZESZ_16K
 #define CONFIG_ENV_OFFSET  (SZ_1K * 1280) /* 1.25 MiB offset */
 #define CONFIG_ENV_OVERWRITE
 
-- 
2.11.0

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[U-Boot] [PATCH v2 4/4] arm: odroid: Inherit default value for bootdelay from distro_bootcmd.

[Vagrant Cascadian]

The default value with distro_bootcmd is 2 seconds, which is
reasonably fast, and provides a consistent experience across platforms
supporting distro_bootcmd.

The current bootdelay value of 0 seconds is a bit challenging to
interrupt when desired.

Acked-by: Lukasz Majewski 

Signed-off-by: Vagrant Cascadian 
---

Changes in v2: None

 include/configs/odroid.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index a4d1a76c36..67a790ef02 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -164,7 +164,6 @@
"mmcbootpart=1\0" \
"mmcrootdev=0\0" \
"mmcrootpart=2\0" \
-   "bootdelay=0\0" \
"dfu_alt_system="CONFIG_DFU_ALT \
"dfu_alt_info=Please reset the board\0" \
"consoleon=set console console=ttySAC1,115200n8; save; reset\0" \
-- 
2.11.0

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[U-Boot] [PATCH v2 3/4] arm: odroid: Enable distro_bootcmd support.

[Vagrant Cascadian]

Enable distro_bootcmd for a standardized boot process across multiple
platforms.

Acked-by: Lukasz Majewski 
Signed-off-by: Vagrant Cascadian 
---

Changes in v2: None

 include/configs/odroid.h | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 07882aca9a..a4d1a76c36 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -41,7 +41,7 @@
 
 /* Console configuration */
 
-#define CONFIG_BOOTCOMMAND "run autoboot"
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd ; run autoboot"
 #define CONFIG_DEFAULT_CONSOLE "ttySAC1,115200n8"
 
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR \
@@ -83,6 +83,12 @@
"bl2 raw 0x1f 0x1d;" \
"tzsw raw 0x83f 0x138\0"
 
+#define BOOT_TARGET_DEVICES(func) \
+   func(MMC, mmc, 1) \
+   func(MMC, mmc, 0)
+
+#include 
+
 /*
  * Bootable media layout:
  * dev:SD   eMMC(part boot)
@@ -167,7 +173,8 @@
"ramdisk_addr_r=0x4200\0" \
"scriptaddr=0x4200\0" \
"fdt_addr_r=0x4080\0" \
-   "kernel_addr_r=0x4100\0"
+   "kernel_addr_r=0x4100\0" \
+   BOOTENV
 
 /* GPT */
 
-- 
2.11.0

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[U-Boot] [PATCH v2 1/4] arm: odroid: Use standard environment variable names kernel_addr_r, ramdisk_addr_r and fdt_addr_r.

[Vagrant Cascadian]

Replace non-standard variable names kerneladdr, initrdaddr and fdtaddr
with kernel_addr_r, ramdisk_addr_r and fdt_addr_r, as documented in
u-boot README.

Acked-by: Lukasz Majewski 
Signed-off-by: Vagrant Cascadian 
---

Changes in v2: None

 include/configs/odroid.h | 24 +++-
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 92811cfc54..b7b75c0dc0 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -100,21 +100,21 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
"loadbootscript=load mmc ${mmcbootdev}:${mmcbootpart} ${scriptaddr} " \
"boot.scr\0" \
-   "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \
+   "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kernel_addr_r} " \
"${kernelname}\0" \
-   "loadinitrd=load mmc ${mmcbootdev}:${mmcbootpart} ${initrdaddr} " \
+   "loadinitrd=load mmc ${mmcbootdev}:${mmcbootpart} ${ramdisk_addr_r} " \
"${initrdname}\0" \
-   "loaddtb=load mmc ${mmcbootdev}:${mmcbootpart} ${fdtaddr} " \
+   "loaddtb=load mmc ${mmcbootdev}:${mmcbootpart} ${fdt_addr_r} " \
"${fdtfile}\0" \
"check_ramdisk=" \
"if run loadinitrd; then " \
-   "setenv initrd_addr ${initrdaddr};" \
+   "setenv initrd_addr ${ramdisk_addr_r};" \
"else " \
"setenv initrd_addr -;" \
"fi;\0" \
"check_dtb=" \
"if run loaddtb; then " \
-   "setenv fdt_addr ${fdtaddr};" \
+   "setenv fdt_addr ${fdt_addr_r};" \
"else " \
"setenv fdt_addr;" \
"fi;\0" \
@@ -125,27 +125,24 @@
"run loadbootscript;" \
"source ${scriptaddr}\0" \
"boot_fit=" \
-   "setenv kerneladdr 0x4200;" \
"setenv kernelname Image.itb;" \
"run loadkernel;" \
"run kernel_args;" \
-   "bootm ${kerneladdr}#${boardname}\0" \
+   "bootm ${kernel_addr_r}#${boardname}\0" \
"boot_uimg=" \
-   "setenv kerneladdr 0x40007FC0;" \
"setenv kernelname uImage;" \
"run check_dtb;" \
"run check_ramdisk;" \
"run loadkernel;" \
"run kernel_args;" \
-   "bootm ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \
+   "bootm ${kernel_addr_r} ${initrd_addr} ${fdt_addr};\0" \
"boot_zimg=" \
-   "setenv kerneladdr 0x40007FC0;" \
"setenv kernelname zImage;" \
"run check_dtb;" \
"run check_ramdisk;" \
"run loadkernel;" \
"run kernel_args;" \
-   "bootz ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \
+   "bootz ${kernel_addr_r} ${initrd_addr} ${fdt_addr};\0" \
"autoboot=" \
"if test -e mmc 0 boot.scr; then; " \
"run boot_script; " \
@@ -167,9 +164,10 @@
"consoleon=set console console=ttySAC1,115200n8; save; reset\0" \
"consoleoff=set console console=ram; save; reset\0" \
"initrdname=uInitrd\0" \
-   "initrdaddr=4200\0" \
+   "ramdisk_addr_r=0x4200\0" \
"scriptaddr=0x4200\0" \
-   "fdtaddr=4080\0"
+   "fdt_addr_r=0x4080\0" \
+   "kernel_addr_r=0x4100\0"
 
 /* GPT */
 
-- 
2.11.0

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[U-Boot] [PATCH v2 0/4] arm: odroid: Convert to distro_bootcmd.

[Vagrant Cascadian]

Switch odroid platform to use distro_bootcmd, adjusting to use
standardized environment variable names, and use the default
bootdelay.

The additional environment variables from distro_bootcmd requires
increasing the default environment size, which would break backwards
compatibility with saved environments. At Marek's suggestion, I've
bumped it well over the size needed (~4.5k vs. 16k) to give room for
future growth.

Variations on these patches have been in use in Debian's u-boot
packages since 2016.

A variation of this patch series was originally submitted to u-boot
over a year ago, and resent a few times since, with little to no
response.

Thanks for considering!

Changes in v2:
- Change from 16384 to SZ_16K, as suggested by Minkyu Kang.

Vagrant Cascadian (4):
  arm: odroid: Use standard environment variable names kernel_addr_r,
ramdisk_addr_r and fdt_addr_r.
  arm: odroid: Increase default env size in preparation for
distro_bootcmd.
  arm: odroid: Enable distro_bootcmd support.
  arm: odroid: Inherit default value for bootdelay from distro_bootcmd.

 include/configs/odroid.h | 36 
 1 file changed, 20 insertions(+), 16 deletions(-)

-- 
2.11.0

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Re: [U-Boot] [PATCH] tools: genboardscfg: move buildman path to first

[Simon Glass]

Hi Peng,

On 24 July 2018 at 19:51, Peng Fan  wrote:
> Hi Simon,
>
>> -Original Message-
>> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
>> Sent: 2018年7月25日 10:45
>> To: Peng Fan 
>> Cc: U-Boot Mailing List ; dl-linux-imx
>> ; Masahiro Yamada ;
>> Tom Rini 
>> Subject: Re: [PATCH] tools: genboardscfg: move buildman path to first
>>
>> Hi Peng,
>>
>> On 24 July 2018 at 00:27, Peng Fan  wrote:
>> > To system which has kconfiglib installed, genboardscfg will use system
>> > kconfiglib, we need it use U-Boot owned version, so move the buildman
>> > path to first.
>> >
>> > Signed-off-by: Peng Fan 
>> > Cc: Masahiro Yamada 
>> > Cc: Simon Glass 
>> > Cc: Tom Rini 
>> > ---
>> >  tools/genboardscfg.py | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py index
>> > 0648472af0..e9bbd15e15 100755
>> > --- a/tools/genboardscfg.py
>> > +++ b/tools/genboardscfg.py
>> > @@ -24,7 +24,7 @@ import sys
>> >  import tempfile
>> >  import time
>> >
>> > -sys.path.append(os.path.join(os.path.dirname(__file__), 'buildman'))
>> > +sys.path.insert(1, os.path.join(os.path.dirname(__file__),
>> > +'buildman'))
>>
>> How come you insert this second in the list rather than first? If that is 
>> deliberate,
>> can you please add a comment?
>
> Do you mean I need to use `sys.path.insert(0, 
> os.path.join(os.path.dirname(__file__), +'buildman'))`?
>
> I print my sys.path, the first is '', So I follow other code in uboot, and 
> use '1' here.

OK I see, fair enough.

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PULL] efi patch queue 2018-07-10

[Simon Glass]

Hi Alex,

On 10 July 2018 at 14:06, Alexander Graf  wrote:
>
>
>
> On 10.07.18 23:04, Alexander Graf wrote:
> >
> >
> > On 10.07.18 22:55, Tom Rini wrote:
> >> On Tue, Jul 10, 2018 at 06:06:56PM +0200, Alexander Graf wrote:
> >>
> >>> Hi Tom,
> >>>
> >>> This is my current patch queue for efi.  Please pull.
> >>>
> >>> Alex
> >>>
> >>>
> >>> The following changes since commit 
> >>> 495c70f9dfad1a5428ec84b52e8667ea4760ecd6:
> >>>
> >>>   net: designware: Add reset ctrl to driver (2018-07-09 15:28:28 -0400)
> >>>
> >>> are available in the git repository at:
> >>>
> >>>   git://github.com/agraf/u-boot.git tags/signed-efi-next
> >>>
> >>> for you to fetch changes up to e2c6ec921b5a37ac96aba34731c972dfee9943b0:
> >>>
> >>>   MAINTAINERS: assign lib/charset.c (2018-07-10 18:01:08 +0200)
> >>>
> >>
> >> NAK, this totally breaks qemu-x86_64:
> >> Building current source for 1 boards (1 thread, 16 jobs per thread)
> >> 100 /1  qemu-x86_64
> >> +u-boot-test-flash qemu-x86_64 na
> >> = test session starts 
> >> =
> >> platform linux2 -- Python 2.7.12, pytest-2.8.7, py-1.4.31, pluggy-0.3.1
> >> rootdir: /, inifile:
> >> collected 127 items
> >> +u-boot-test-reset qemu-x86_64 na
> >> warning: TCG doesn't support requested feature: CPUID.01H:ECX.vmx [bit 5]
> >>
> >> U-Boot SPL 2018.07-00106-gdbe7256f0d42 (Jul 10 2018 - 16:54:23 -0400)
> >> CPU: x86_64, vendor AMD, device 663h
> >> Trying to boot from SPI
> >> Jumping to 64-bit U-Boot: Note many features are missing
> >>  No serial driver found
> >> ^C
> >
> > That was the breakage that I reported to Bin earlier as well. Let me
> > bisect ...
>
> I think I have an idea ;)
>
> ab1340bf15c9ad7d1a7edbe51ec93c45e11c5c2c is the first bad commit
> commit ab1340bf15c9ad7d1a7edbe51ec93c45e11c5c2c
> Author: Alexander Graf 
> Date:   Tue Jun 12 07:48:37 2018 +0200
>
> efi_loader: Rename sections to allow for implicit data
>
> Some times gcc may generate data that is then used within code that may
> be part of an efi runtime section. That data could be jump tables,
> constants or strings.
>
> In order to make sure we catch these, we need to ensure that gcc emits
> them into a section that we can relocate together with all the other
> efi runtime bits. This only works if the -ffunction-sections and
> -fdata-sections flags are passed and the efi runtime functions are
> in a section that starts with ".text".
>
> Up to now we had all efi runtime bits in sections that did not
> interfere with the normal section naming scheme, but this forces
> us to do so. Hence we need to move the efi_loader text/data/rodata
> sections before the global *(.text*) catch-all section.
>
> With this patch in place, we should hopefully have an easier time
> to extend the efi runtime functionality in the future.
>
> Signed-off-by: Alexander Graf 
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Do you have an ETA on this pull request? I have some patches to enable
sandbox EFI support but I think I need to wait until your patches are
in?

Regards,
Simon
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Re: [U-Boot] [PATCH V2] drivers: regulator: fixed: add u-boot, off-on-delay-us

[Fabio Estevam]

Hi Peng,

On Wed, Jul 25, 2018 at 12:02 AM, Peng Fan  wrote:

> I was not aware of this place. I am not sure, because there is also a 
> Documentation/devicetree/bindings/ directory.

Yes, currently we have only a few bindings inside
Documentation/devicetree/bindings/.

Most of the bindings are inside doc/device-tree-bindings/ in U-Boot.

Breno has recently submitted a patch to move bindings to the more
common used doc/device-tree-bindings/ directory:
https://lists.denx.de/pipermail/u-boot/2018-July/335626.html

> Tom,
>
> Where should the new uboot bindings be put into?

Yes, some guidance here would be helpful to avoid inconsistent
placement of the bindings.

Thanks
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Re: [U-Boot] [PATCH 0/6] driver: net: fsl-mc: Add support of multiple phys for dpmac

[Pankaj Bansal]

Hi Joe,

Can you please review these changes ?

Regards,
Pankaj Bansal

> -Original Message-
> From: Prabhakar Kushwaha
> Sent: Thursday, July 19, 2018 9:06 AM
> To: Pankaj Bansal ; u-boot@lists.denx.de
> Cc: Priyanka Jain ; Varun Sethi
> ; York Sun ;
> joe.hershber...@ni.com
> Subject: RE: [PATCH 0/6] driver: net: fsl-mc: Add support of multiple phys
> for dpmac
> 
> 
> > -Original Message-
> > From: Pankaj Bansal
> > Sent: Friday, July 13, 2018 8:11 PM
> > To: u-boot@lists.denx.de
> > Cc: Prabhakar Kushwaha ; Priyanka Jain
> > ; Varun Sethi ; York Sun
> > ; joe.hershber...@ni.com; Pankaj Bansal
> > 
> > Subject: [PATCH 0/6] driver: net: fsl-mc: Add support of multiple phys
> > for dpmac
> >
> > This patch set adds support of multiple phys for one dpmac
> >
> > Till now we have had cases where we had one phy device per dpmac.
> > Now, with the upcoming products (LX2160AQDS), we have cases, where
> > there are sometimes two phy devices for one dpmac. One phy for TX
> > lanes and one phy for RX lanes. To handle such cases, add the support
> > for multiple phys in ethernet driver. The ethernet link is up if all
> > the phy devices connected to one dpmac report link up.
> > also the link capabilities are limited by the weakest phy device.
> >
> > i.e. say if there are two phys for one dpmac. one operates at 10G
> > without autoneg and other operate at 1G with autoneg. Then the
> > ethernet interface will operate at 1G without autoneg.
> >
> > Pankaj Bansal (6):
> >   driver: net: fsl-mc: modify the label name
> >   driver: net: fsl-mc: remove unused strcture elements
> >   driver: net: fsl-mc: fix error handing in init_phy
> >   driver: net: fsl-mc: Modify the dpmac link detection method
> >   driver: net: fsl-mc: initialize dpmac irrespective of phy
> >   driver: net: fsl-mc: Add support of multiple phys for dpmac
> >
> >  board/freescale/ls1088a/eth_ls1088aqds.c   |  18 +--
> >  board/freescale/ls1088a/eth_ls1088ardb.c   |  21 +--
> >  board/freescale/ls2080aqds/eth.c   |  26 +--
> >  board/freescale/ls2080ardb/eth_ls2080rdb.c |  24 +--
> >  drivers/net/fsl-mc/mc.c|   6 +-
> >  drivers/net/ldpaa_eth/ldpaa_eth.c  | 180 +
> >  drivers/net/ldpaa_eth/ldpaa_eth.h  |   1 -
> >  drivers/net/ldpaa_eth/ldpaa_wriop.c|  49 --
> >  include/fsl-mc/ldpaa_wriop.h   |  22 +--
> >  9 files changed, 209 insertions(+), 138 deletions(-)
> 
> Patch set looks good.
> 
> Reviewed-by: Prabhakar Kushwaha 
> 
> 

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Re: [U-Boot] [PATCH V2] drivers: regulator: fixed: add u-boot, off-on-delay-us

[Peng Fan]

Hi Fabio,

> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: 2018年7月25日 10:59
> To: Peng Fan 
> Cc: Simon Glass ; U-Boot-Denx ;
> dl-linux-imx ; Breno Matheus Lima 
> Subject: Re: [U-Boot] [PATCH V2] drivers: regulator: fixed: add u-boot,
> off-on-delay-us
> 
> Hi Peng,
> 
> On Tue, Jul 24, 2018 at 5:11 AM, Peng Fan  wrote:
> 
> >  .../devicetree/bindings/regulator/fixed-regulator.txt| 16
> 
> >  drivers/power/regulator/fixed.c  |  6
> ++
> >  2 files changed, 22 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/regulator/fixed-regulator.txt
> 
> I thought that bindings should go into doc/device-tree-bindings/ in U-Boot
> instead?

I was not aware of this place. I am not sure, because there is also a 
Documentation/devicetree/bindings/ directory.

Tom,

Where should the new uboot bindings be put into?

Thanks,
Peng.
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Re: [U-Boot] [PATCH V2] drivers: regulator: fixed: add u-boot, off-on-delay-us

[Fabio Estevam]

Hi Peng,

On Tue, Jul 24, 2018 at 5:11 AM, Peng Fan  wrote:

>  .../devicetree/bindings/regulator/fixed-regulator.txt| 16 
> 
>  drivers/power/regulator/fixed.c  |  6 ++
>  2 files changed, 22 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/regulator/fixed-regulator.txt

I thought that bindings should go into doc/device-tree-bindings/ in
U-Boot instead?
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Re: [U-Boot] [PATCH 1/4] configs: opos6uldev: undef CONFIG_POWER_DOMAIN when SPL_BUILD

[Peng Fan]

Hi Simon,

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2018年7月25日 10:46
> To: Peng Fan 
> Cc: U-Boot Mailing List ; dl-linux-imx
> ; Sébastien Szymanski
> ; Stefano Babic 
> Subject: Re: [PATCH 1/4] configs: opos6uldev: undef CONFIG_POWER_DOMAIN
> when SPL_BUILD
> 
> Hi Peng,
> 
> On 24 July 2018 at 01:45, Peng Fan  wrote:
> > Because CONFIG_POWER_DOMAIN is enabled in defconfig, however
> > driver/power/domain is not built for SPL, there is build failure when
> > power_domain_on added to device_probe.
> > Because power domain is not needed in SPL, let's undef it.
> >
> > Signed-off-by: Peng Fan 
> > Cc: "Sébastien Szymanski" 
> > Cc: Stefano Babic 
> > ---
> >
> > Need to find a way to avoid SPL build failure in future patch, but in
> > this patchset let's undef CONFIG_POWER_DOMAIN first, because it is not
> > needed.
> >
> >  include/configs/opos6uldev.h | 1 +
> >  1 file changed, 1 insertion(+)
> 
> This should be handled by adding an SPL_POWER_DOMAIN option and
> converting existing uses to CONFIG_IS_ENABLED(POWER_DOMAIN)

The opos6uldev_defconfig has "CONFIG_POWER_DOMAIN=y", so when building
SPL, this macro is still effective.
Opos6uldev compiles driver/core/device.c which includes power-domain.h in my 
later patch.
Because driver/power/domain is not built for SPL, so build failure for SPL.

The simple method for now is to undef CONFIG_POWER_DOMAIN for SPL build.
If use CONFIG_IS_ENABLED, the undef CONFIG_POWER_DOMAIN will not be detected in 
Kconfig.

Simply introduce SPL_POWER_DOMAIN could not fix this issue. Need to let SPL 
choose CONFIG_SPL_POWER_DOMAIN,
but not CONFIG_POWER_DOMAIN, I do not have a clear idea on how.

Thanks,
Peng.

> 
> Regards,
> Simon
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Re: [U-Boot] [PATCH] tools: genboardscfg: move buildman path to first

[Peng Fan]

Hi Simon,

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2018年7月25日 10:45
> To: Peng Fan 
> Cc: U-Boot Mailing List ; dl-linux-imx
> ; Masahiro Yamada ;
> Tom Rini 
> Subject: Re: [PATCH] tools: genboardscfg: move buildman path to first
> 
> Hi Peng,
> 
> On 24 July 2018 at 00:27, Peng Fan  wrote:
> > To system which has kconfiglib installed, genboardscfg will use system
> > kconfiglib, we need it use U-Boot owned version, so move the buildman
> > path to first.
> >
> > Signed-off-by: Peng Fan 
> > Cc: Masahiro Yamada 
> > Cc: Simon Glass 
> > Cc: Tom Rini 
> > ---
> >  tools/genboardscfg.py | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py index
> > 0648472af0..e9bbd15e15 100755
> > --- a/tools/genboardscfg.py
> > +++ b/tools/genboardscfg.py
> > @@ -24,7 +24,7 @@ import sys
> >  import tempfile
> >  import time
> >
> > -sys.path.append(os.path.join(os.path.dirname(__file__), 'buildman'))
> > +sys.path.insert(1, os.path.join(os.path.dirname(__file__),
> > +'buildman'))
> 
> How come you insert this second in the list rather than first? If that is 
> deliberate,
> can you please add a comment?

Do you mean I need to use `sys.path.insert(0, 
os.path.join(os.path.dirname(__file__), +'buildman'))`?

I print my sys.path, the first is '', So I follow other code in uboot, and use 
'1' here.

Thanks,
Peng.

> 
> >  import kconfiglib
> >
> >  ### constant variables ###
> > --
> > 2.14.1
> >
> 
> Regards,
> Simon
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Re: [U-Boot] [PATCH v2 6/6] ARM: dts: stm32mp157: Add ADC DT node

[Simon Glass]

On 24 July 2018 at 08:31, Fabrice Gasnier  wrote:
> Add ADC device tree node. This allows to get analog conversions on
> stm32mp157.
>
> Signed-off-by: Fabrice Gasnier 
> ---
>
> Changes in v2: None
>
> ---
>  arch/arm/dts/stm32mp157.dtsi | 32 
>  1 file changed, 32 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 4/4] dm: power-domain: query power domain after get device

[Simon Glass]

On 24 July 2018 at 01:45, Peng Fan  wrote:
> This is to test power_domain_on in device_probe.
> If the device has a power-domain property, enable it
> when probe the device. So add the test to check
> whether it is powered on or not.
>
> Signed-off-by: Peng Fan 
> Cc: Simon Glass 
> ---
>  test/dm/power-domain.c | 2 ++
>  1 file changed, 2 insertions(+)

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Re: [U-Boot] [PATCH 3/4] dm: core: device: enable power domain in probe

[Simon Glass]

On 24 July 2018 at 01:45, Peng Fan  wrote:
> Enable power domain associated with the device when probe.
>
> Signed-off-by: Peng Fan 
> Cc: Simon Glass 
> ---
>  drivers/core/device.c | 7 +++
>  1 file changed, 7 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 11/17] fs: add mkdir interface

[Simon Glass]

Hi,

On 23 July 2018 at 19:45, AKASHI Takahiro  wrote:
> On Mon, Jul 23, 2018 at 07:56:58PM -0400, Tom Rini wrote:
>> On Mon, Jul 23, 2018 at 05:48:13PM -0600, Simon Glass wrote:
>> > Hi,
>> >
>> > On 20 July 2018 at 11:35, Heinrich Schuchardt  wrote:
>> > > On 07/20/2018 04:57 AM, AKASHI Takahiro wrote:
>> > >> "mkdir" interface is added to file operations.
>> > >> This is a preparatory change as mkdir support for FAT file system
>> > >> will be added in next patch.
>> > >>
>> > >> Signed-off-by: AKASHI Takahiro 
>> > >> ---
>> > >>  fs/fs.c  | 45 +
>> > >>  include/fs.h | 10 ++
>> > >>  2 files changed, 55 insertions(+)
>> > >>
>> >
>> > We need to get a proper fs test in place before we add any more stuff.
>>
>> Agreed that we need more tests as part of this series.
>
> Is this a new standard rule for new features?
> Just kidding, but testing was definitely one of my concerns partly
> because fs-test.sh is anyhow in an old fashion and partly because
> I can't find any criteria for test coverage:
> - white-box test or black-box test
> - coverage for corner (or edge) cases
> - some sort of stress test, etc.
>
>> > Does someone waent to try converting fs-test.sh to pytest in test/py/tests 
>> > ?
>>
>> I thought there was at least a first pass at that?
>
> Well, I don't see any file system related scripts under test/py/tests.
>
> Please advise me.

It should be possible to translate it from shell to Python without too
much trouble if you able able to give it a crack. See for example:

8729d58259 test: Convert the vboot test to test/py

Re testing in general, my view is:

- Unit tests / smaller tests are better than large ones
- We don't need stress tests for functionality (e.g. the current FS
test uses filesystems that are quite large, and I think they could
just be very very small and still get good test coverage and run
faster)
- Corner cases are an important part of tests (and easy to test with unit tests)
- Use the pytest framework

One day we'll enable code coverage for U-Boot sandbox and get a feel
for the missing test coverage.

Regards,
Simon
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Re: [U-Boot] [PATCH V2] drivers: regulator: fixed: add u-boot, off-on-delay-us

[Simon Glass]

On 24 July 2018 at 02:11, Peng Fan  wrote:
> Add u-boot,off-on-delay-us for fixed regulator.
>
> Depends on board design, the gpio regulator sometimes
> connects with a big capacitance. When need to off, then
> on the regulator, if there is no enough delay,
> the voltage does not drop to 0, so introduce this
> property to handle such case.
>
> Signed-off-by: Peng Fan 
> Cc: Masahiro Yamada 
> Cc: Simon Glass 
> ---
>
> Simon, I droped your reviewed-by tag in V2, because I changed
> "off-on-delay-us" to "u-boot,off-on-delay-us" and
> add devicetree bindings.
>
> Thanks,
> Peng.
>
>  .../devicetree/bindings/regulator/fixed-regulator.txt| 16 
> 
>  drivers/power/regulator/fixed.c  |  6 ++
>  2 files changed, 22 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/regulator/fixed-regulator.txt

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Re: [U-Boot] [PATCH 1/4] configs: opos6uldev: undef CONFIG_POWER_DOMAIN when SPL_BUILD

[Simon Glass]

Hi Peng,

On 24 July 2018 at 01:45, Peng Fan  wrote:
> Because CONFIG_POWER_DOMAIN is enabled in defconfig,
> however driver/power/domain is not built for SPL, there is build
> failure when power_domain_on added to device_probe.
> Because power domain is not needed in SPL, let's undef it.
>
> Signed-off-by: Peng Fan 
> Cc: "Sébastien Szymanski" 
> Cc: Stefano Babic 
> ---
>
> Need to find a way to avoid SPL build failure in future patch,
> but in this patchset let's undef CONFIG_POWER_DOMAIN first,
> because it is not needed.
>
>  include/configs/opos6uldev.h | 1 +
>  1 file changed, 1 insertion(+)

This should be handled by adding an SPL_POWER_DOMAIN option and
converting existing uses to CONFIG_IS_ENABLED(POWER_DOMAIN)

Regards,
Simon
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Re: [U-Boot] [PATCH 2/4] power-domain: add dummy functions when CONFIG_POWER_DOMAIN not defined

[Simon Glass]

Hi Peng,

On 24 July 2018 at 01:45, Peng Fan  wrote:
> Add dummy functions when CONFIG_POWER_DOMAIN not defined.
>
> Signed-off-by: Peng Fan 
> Reviewed-by: Simon Glass 
> ---
>  include/power-domain.h | 28 
>  1 file changed, 28 insertions(+)
>
> diff --git a/include/power-domain.h b/include/power-domain.h
> index aba8c0f65c..fe2a1c5119 100644
> --- a/include/power-domain.h
> +++ b/include/power-domain.h
> @@ -87,7 +87,14 @@ struct power_domain {
>   * @power_domain   A pointer to a power domain struct to initialize.
>   * @return 0 if OK, or a negative error code.
>   */
> +#ifdef CONFIG_POWER_DOMAIN
>  int power_domain_get(struct udevice *dev, struct power_domain *power_domain);
> +#else
> +int power_domain_get(struct udevice *dev, struct power_domain *power_domain)
> +{
> +   return -EINVAL;

Actually shouldn't this be -ENOSYS?

> +}
> +#endif
>
>  /**
>   * power_domain_free - Free a previously requested power domain.
> @@ -96,7 +103,14 @@ int power_domain_get(struct udevice *dev, struct 
> power_domain *power_domain);
>   * requested by power_domain_get().
>   * @return 0 if OK, or a negative error code.
>   */
> +#ifdef CONFIG_POWER_DOMAIN
>  int power_domain_free(struct power_domain *power_domain);
> +#else
> +int power_domain_free(struct power_domain *power_domain)
> +{
> +   return -EINVAL;
> +}
> +#endif
>
>  /**
>   * power_domain_on - Enable power to a power domain.
> @@ -105,7 +119,14 @@ int power_domain_free(struct power_domain *power_domain);
>   * requested by power_domain_get().
>   * @return 0 if OK, or a negative error code.
>   */
> +#ifdef CONFIG_POWER_DOMAIN
>  int power_domain_on(struct power_domain *power_domain);
> +#else
> +int power_domain_on(struct power_domain *power_domain)
> +{
> +   return -EINVAL;
> +}
> +#endif
>
>  /**
>   * power_domain_off - Disable power ot a power domain.
> @@ -114,6 +135,13 @@ int power_domain_on(struct power_domain *power_domain);
>   * requested by power_domain_get().
>   * @return 0 if OK, or a negative error code.
>   */
> +#ifdef CONFIG_POWER_DOMAIN
>  int power_domain_off(struct power_domain *power_domain);
> +#else
> +int power_domain_off(struct power_domain *power_domain)
> +{
> +   return -EINVAL;
> +}
> +#endif
>
>  #endif
> --
> 2.14.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH v2 1/6] clk: add clk_valid()

[Simon Glass]

On 24 July 2018 at 08:31, Fabrice Gasnier  wrote:
> Add clk_valid() to check for optional clocks are valid.
> Call clk_valid() in test/dm/clk.c and add relevant test routine to
> sandbox clk tests.
>
> Signed-off-by: Fabrice Gasnier 
> ---
>
> Changes in v2:
> - add test case for 'clk_valid()', e.g. in test/dm/clk.c and sandbox.
> - Update TRUE/FALSE comments to lower case: true/false
>
> ---
>  arch/sandbox/include/asm/clk.h |  8 
>  drivers/clk/clk_sandbox_test.c | 13 +
>  include/clk.h  | 10 ++
>  test/dm/clk.c  |  1 +
>  4 files changed, 32 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 2/6] dm: adc: uclass: get reference regulator once

[Simon Glass]

On 24 July 2018 at 08:31, Fabrice Gasnier  wrote:
> device_get_supply_regulator() only needs to be called once.
> But each time there's call to adc_vxx_value() for instance, it calls
> adc_vxx_platdata_update() -> device_get_supply_regulator().
>
> So, move device_get_supply_regulator() to pre_probe() routine.
>
> This also allows vdd_supply/vss_supply to be provided directly from
> uc_pdata, e.g dt-binding variant like stm32-adc provide its own
> 'vref-supply'.
>
> Signed-off-by: Fabrice Gasnier 
> ---
>
> Changes in v2:
> - move device_get_supply_regulator() call to pre_probe() routine
>
> ---
>  drivers/adc/adc-uclass.c | 35 +--
>  1 file changed, 17 insertions(+), 18 deletions(-)

I think this looks right.

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Re: [U-Boot] [PATCH] tools: genboardscfg: move buildman path to first

[Simon Glass]

Hi Peng,

On 24 July 2018 at 00:27, Peng Fan  wrote:
> To system which has kconfiglib installed, genboardscfg will
> use system kconfiglib, we need it use U-Boot owned version,
> so move the buildman path to first.
>
> Signed-off-by: Peng Fan 
> Cc: Masahiro Yamada 
> Cc: Simon Glass 
> Cc: Tom Rini 
> ---
>  tools/genboardscfg.py | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py
> index 0648472af0..e9bbd15e15 100755
> --- a/tools/genboardscfg.py
> +++ b/tools/genboardscfg.py
> @@ -24,7 +24,7 @@ import sys
>  import tempfile
>  import time
>
> -sys.path.append(os.path.join(os.path.dirname(__file__), 'buildman'))
> +sys.path.insert(1, os.path.join(os.path.dirname(__file__), 'buildman'))

How come you insert this second in the list rather than first? If that
is deliberate, can you please add a comment?

>  import kconfiglib
>
>  ### constant variables ###
> --
> 2.14.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH v3 2/5] Revert "dm: led: auto probe() LEDs with "default-state""

[Simon Glass]

On 24 July 2018 at 02:58, Patrick Delaunay  wrote:
>
> This reverts commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7.
> because this patch adds the probe of LED driver during the
> binding phasis. It is not allowed in driver model because
> the drivers (clock, pincontrol) needed by the LED driver can
> be also probed before the binding of all the device and
> it is a source of problems.
>
> Signed-off-by: Patrick Delaunay 
> ---
>
> Changes in v3:
> - add motivation in revert commit
>
> Changes in v2: None
>
>  drivers/led/led_gpio.c | 9 -
>  1 file changed, 9 deletions(-)
>

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Re: [U-Boot] ext4: massive corruption with ext4write

[Aaron Williams]

On Tuesday, July 24, 2018 2:45:42 AM PDT Marek Vasut wrote:
> External Email
> 
> On 07/24/2018 08:25 AM, Aaron Williams wrote:
> > On Monday, July 23, 2018 11:15:59 PM PDT Aaron Williams wrote:
> >> External Email
> >> 
> >> Hi all,
> >> 
> >> It looks like after a certain amount of data has been written that all
> >> hell
> >> breaks loose with the ext4 filesystem.
> >> 
> >> In my case, I have the following files on a 64G USB thumb drive with two
> >> partitions, a small FAT partition with the rest of the space dedicated to
> >> ext4
> >> 
> >  created using mkfs.ext4 /dev/sdg2
> >  
> >> total 477632
> >> -rwxr-xr-x 1 root root 152777216 Jul 23 18:11 Image
> >> drwx-- 2 root root 16384 Jul 23 18:10 lost+found
> >> -rwxr-xr-x 1 root root  90706976 Dec 31  1969 test.64
> >> -rwxr-xr-x 1 root root 152777216 Dec 31  1969 test.img
> >> -rwxr-xr-x 1 root root50 Dec 31  1969 test.txt
> >> -rwxr-xr-x 1 root root   1841408 Jul 23 18:12 u-boot-octeon_ebb7304.bin
> >> -rwxr-xr-x 1 root root  90706976 Jul 23 18:11 vmlinux.64
> >> 
> >> Everything is fine until I wrote the file test.64, which is basically a
> >> copy
> >> 
> >  of vmlinux.64.
> >  
> >> The first few files were written using my host Linux system, namely
> >> Image,
> >> u-
> >> 
> >  boot-octeon_ebb7304.bin and vmlinux.64.
> >  
> >> From within U-Boot I performed the following commands:
> >> 
> >> # ext4load usb 0:2 $loadaddr Image
> >> # ext4write usb 0:2 $fileaddr /test.img $filesize
> >> # tftpboot $loadaddr test.txt
> >> # ext4write usb 0:2 $fileaddr /test.txt $filesize
> >> # ext4load usb 0:2 $loadaddr vmlinux.64
> >> # ext4write usb 0:2 $fileaddr /test.64 $filesize
> >> 
> >> Everything is fine on the drive until I write test.64. At this point, I
> >> get
> >> a
> >> 
> >  huge list of errors:
> >> # fsck.ext4 -v -n /dev/sdg2
> >> e2fsck 1.42.11 (09-Jul-2014)
> >> Group descriptor 0 has invalid unused inodes count 57374.  Fix? no
> >> 
> >> /dev/sdg2 contains a file system with errors, check forced.
> >> Pass 1: Checking inodes, blocks, and sizes
> >> Deleted inode 130913 has zero dtime.  Fix? no
> >> 
> >> Inode 130915 is in use, but has dtime set.  Fix? no
> >> 
> >> Inode 130915 has imagic flag set.  Clear? no
> >> 
> >> Inode 130915 has a extra size (8223) which is invalid
> >> Fix? no
> >> 
> >> Inode 130916 is in use, but has dtime set.  Fix? no
> >> 
> >> Inode 130916 has imagic flag set.  Clear? no
> >> 
> >> Inode 130916 has a extra size (8223) which is invalid
> >> Fix? no
> >> 
> >> ...
> >> Illegal block #11 (2435760161) in inode 131070.  IGNORED.
> >> Illegal indirect block (4026556192) in inode 131070.  IGNORED.
> >> Illegal double indirect block (2433138721) in inode 131070.  IGNORED.
> >> Illegal triple indirect block (2434195456) in inode 131070.  IGNORED.
> >> Error while iterating over blocks in inode 131070: Illegal triply
> >> indirect
> >> block found
> >> 
> >> 
> >> and many many more errors.
> >> 
> >> Note that I am using the very latest ext4 code from the master branch.
> >> This
> >> 
> >  is not a USB problem because I can reproduce this problem with an SD
> >  
> >> card. This problem also occurs on two different platforms, one being
> >> aarch64 little endian and the other being MIPS64 big endian.  The
> >> filesystem code is identical since the latest code has been backported to
> >> our older MIPS bootloader.
> >> 
> >> My guess is that all hell is breaking loose when a file spans multiple
> >> block
> >> 
> >  groups.
> >  
> >> -Aaron Williams
> >> 
> >> On Thursday, July 19, 2018 7:35:46 PM PDT Aaron Williams wrote:
> >>> Hi all,
> >>> 
> >>> 
> >>> 
> >>> I am sometimes seeing issues when using ext4write where fsck later
> >>> complains
> >>> 
> >>  that the group descriptor has an invalid number of unused
> >>  
> >>> inodes. Is this a known problem?
> >>> 
> >>> 
> >>> 
> >>> Also, I think the assert(offset == sizeof(*desc)); in
> >>> ext4fs_checksum_update()
> >>> 
> >>  is invalid since with ext4 the descriptor is
> >>  
> >>> larger than the offset. When debugging was enabled I'd always hit this
> >>> assert.
> >>> 
> >>> 
> >>> 
> >>> Also, in ext4fs_write, the debug statement should say blocks and not
> >>> bytes.
> >>> 
> >>> 
> >>> 
> >>> -Aaron
> >>> 
> >>> 
> >>> 
> >>> --
> >>> Aaron Williams
> >>> Senior Software Engineer
> >>> Cavium, Inc.
> >>> (408) 943-7198  (510) 789-8988 (cell)
> >>> ___
> >>> U-Boot mailing list
> >>> U-Boot@lists.denx.de
> >>> https://lists.denx.de/listinfo/u-boot
> >> 
> >> --
> >> Aaron Williams
> >> Senior Software Engineer
> >> Cavium, Inc.
> >> (408) 943-7198  (510) 789-8988 (cell)
> >> ___
> >> U-Boot mailing list
> >> U-Boot@lists.denx.de
> >> https://lists.denx.de/listinfo/u-boot
> > 
> > Here is the output after the write operation from fsck.ext4 -v /dev/sdg2
> > 
> > fsck.ext4 -v  /dev/sdg2
> > e2fsck 1.42.11 (09-Jul-2014)
> > Group descriptor 0 has 

Re: [U-Boot] [RFC 1/1] efi_loader: check parameters of efi_file_open()

[AKASHI, Takahiro]

On Sun, Jul 22, 2018 at 01:34:13PM +0200, Heinrich Schuchardt wrote:
> Check the parameters of efi_file_open().
> 
> Signed-off-by: Heinrich Schuchardt 
> ---
> Hello Takahiro,
> 
> this patch is necessary to become more UEFI compliant. But it interferes
> with your FAT patch series.
> 
> You might integrate the changes into the next version of you patch series.
> Otherwise I keep the patch until your series is merged.

I still believe, as I mentioned elsewhere, that such kind of patches
be compiled into a separate (follow-up) patch series.

Speaking of your specific patch, it looks good as a whole, please let me
advise you that a section number in UEFI specification or UEFI SCT
test case number be included in your comment wherever possible which
would make it easier for not only me but also others to assure your
changes.

> Best regards
> 
> Heinrich
> ---
>  lib/efi_loader/efi_file.c | 30 ++
>  1 file changed, 26 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c
> index 07696a8f56..8f04943670 100644
> --- a/lib/efi_loader/efi_file.c
> +++ b/lib/efi_loader/efi_file.c
> @@ -202,15 +202,37 @@ static efi_status_t EFIAPI efi_file_open(struct 
> efi_file_handle *file,
>   s16 *file_name, u64 open_mode, u64 attributes)
>  {
>   struct file_handle *fh = to_fh(file);
> + efi_status_t ret;
>  
>   EFI_ENTRY("%p, %p, \"%ls\", %llx, %llu", file, new_handle, file_name,
> open_mode, attributes);
>  
> - *new_handle = file_open(fh->fs, fh, file_name, open_mode);
> - if (!*new_handle)
> - return EFI_EXIT(EFI_NOT_FOUND);
> + /* Check parameters */
> + if (!file || !file || !file_name) {

nit: duplicated !file

> + ret = EFI_INVALID_PARAMETER;

Strangely, EFI_INVALID_PARAMETER is not listed in "Status Codes Returned"
at section 13.5 File Protocol, p.524.

> + goto out;
> + }
> + if (open_mode != EFI_FILE_MODE_READ &&
> + open_mode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE) &&
> + open_mode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE |
> +  EFI_FILE_MODE_CREATE)) {

(open_mode | CREATE) && !(open_mode | WRITE) would be simpler.

> + ret = EFI_INVALID_PARAMETER;
> + goto out;
> + }
> + if ((!(open_mode & EFI_FILE_MODE_CREATE) && attributes) ||

OK,

> + (attributes & (EFI_FILE_READ_ONLY | ~EFI_FILE_VALID_ATTR))) {

Why is EFI_FILE_READ_ONLY not allowed?

> + ret = EFI_INVALID_PARAMETER;
> + goto out;
> + }
>  
> - return EFI_EXIT(EFI_SUCCESS);
> + /* Open file */
> + *new_handle = file_open(fh->fs, fh, file_name, open_mode);
> + if (*new_handle)
> + ret = EFI_SUCCESS;
> + else
> + ret = EFI_NOT_FOUND;

Should we always return NOT_FOUND here?
(No choices, probably)

-Takahiro AKASHI

> +out:
> + return EFI_EXIT(ret);
>  }
>  
>  static efi_status_t file_close(struct file_handle *fh)
> -- 
> 2.18.0
> 
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Re: [U-Boot] [PATCH V2 29/32] fsl_esdhc: Update usdhc driver to support i.MX8

[Peng Fan]

Hi Troy,

> -Original Message-
> From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
> Sent: 2018年7月25日 2:27
> To: Fabio Estevam ; Peng Fan 
> Cc: Fabio Estevam ; U-Boot-Denx
> ; dl-linux-imx 
> Subject: Re: [U-Boot] [PATCH V2 29/32] fsl_esdhc: Update usdhc driver to
> support i.MX8
> 
> On 7/23/2018 5:51 PM, Fabio Estevam wrote:
> > Hi Peng,
> >
> > On Mon, Jul 23, 2018 at 9:45 PM, Peng Fan  wrote:
> >
> >> In V1, I use CONFIG_IMX8, but I think there is no need to use it, because
> >> CONFIG_ARCH_IMX8 could do same thing.
> >
> > Yes, I prefer to drop "ARCH" for consistency.
> >
> >> I could revert to use CONFIG_IMX8, since you prefer it.
> >
> > Yes, that would be better.
> 
> 
> 
> Didn't we already discuss this and decide to be consistent with CONFIG_MX6 /7
> and the rest ?

NXP marketing requires us to use IMX for i.MX family for i.MX8. So
I choose CONFIG_IMX[x]. You could see NXP vendor tree all switch to
use CONFIG_XX_IMX[x].

I understand CONFIG_MX6/7, but this change only impacts i.MX8,
The MX6/7 could also be converted to use IMX I think, just a large patch by
some scripts.

Also no talking this config, all the device tree names has 'i' before mx, for 
i.MX family, including i.MX6/7.

So I prefer to use _IMX[x]_

Stefano, What do you think?

Thanks,
Peng.

> 
> 
> >
> >>> Also, for consistency: should CONFIG_MX8M be changed to
> CONFIG_IMX8M?
> >>
> >> Yes. CONFIG_MX8M also need to be changed to CONFIG_IMX8M, but not in
> this patchset.
> >
> > Correct.
> >
> > Thanks
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> >
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.de
> nx.de%2Flistinfo%2Fu-bootdata=02%7C01%7Cpeng.fan%40nxp.com%7C
> 4c27504551844e8386a108d5f1931308%7C686ea1d3bc2b4c6fa92cd99c5c3016
> 35%7C0%7C0%7C636680536334072741sdata=uEGuO5BIo2SI5v%2FSY6y
> aYnd2Q9I8ZMUzyhitJbgXQ34%3Dreserved=0
> >

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[U-Boot] [PATCH] sunxi: A64: fix default DRAM_ODT_EN symbol

[Andre Przywara]

"default" lines in Kconfig are processed in order, the first hit will
stop considering subsequent lines. In the case of the DRAM_ODT_EN symbol
that means that everything following the first two lines will never be
checked:

config DRAM_ODT_EN
bool "sunxi dram odt enable"
default n if !MACH_SUN8I_A23
default y if MACH_SUN8I_A23
default y if MACH_SUN8I_R40
default y if MACH_SUN50I


Assuming that the "default y" for the A64 and the R40 were a deliberate
choice, fix the Kconfig stanza to take this into account.
Also remove the now redundant lines from the respective defconfigs.

Signed-off-by: Andre Przywara 
---
Hi,

I would be grateful if people could test this and find out whether
enabling ODT works reliably.

Thanks!
Andre.

 arch/arm/mach-sunxi/Kconfig | 2 +-
 configs/Bananapi_M2_Ultra_defconfig | 1 -
 configs/amarula_a64_relic_defconfig | 1 -
 configs/bananapi_m2_berry_defconfig | 1 -
 configs/sopine_baseboard_defconfig  | 1 -
 5 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 678e33dd40..7ff0347e20 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -405,10 +405,10 @@ config DRAM_ZQ
 
 config DRAM_ODT_EN
bool "sunxi dram odt enable"
-   default n if !MACH_SUN8I_A23
default y if MACH_SUN8I_A23
default y if MACH_SUN8I_R40
default y if MACH_SUN50I
+   default n
---help---
Select this to enable dram odt (on die termination).
 
diff --git a/configs/Bananapi_M2_Ultra_defconfig 
b/configs/Bananapi_M2_Ultra_defconfig
index edcbb16cf6..914ca09708 100644
--- a/configs/Bananapi_M2_Ultra_defconfig
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -4,7 +4,6 @@ CONFIG_SPL=y
 CONFIG_MACH_SUN8I_R40=y
 CONFIG_DRAM_CLK=576
 CONFIG_DRAM_ZQ=3881979
-CONFIG_DRAM_ODT_EN=y
 CONFIG_MMC0_CD_PIN="PH13"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra"
diff --git a/configs/amarula_a64_relic_defconfig 
b/configs/amarula_a64_relic_defconfig
index b72cbfabc6..9ab4c0c1de 100644
--- a/configs/amarula_a64_relic_defconfig
+++ b/configs/amarula_a64_relic_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y
 CONFIG_SPL=y
 CONFIG_MACH_SUN50I=y
 CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
-CONFIG_DRAM_ODT_EN=y
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 # CONFIG_VIDEO_DE2 is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-amarula-relic"
diff --git a/configs/bananapi_m2_berry_defconfig 
b/configs/bananapi_m2_berry_defconfig
index 9d75108d04..0ebb1c38da 100644
--- a/configs/bananapi_m2_berry_defconfig
+++ b/configs/bananapi_m2_berry_defconfig
@@ -4,7 +4,6 @@ CONFIG_SPL=y
 CONFIG_MACH_SUN8I_R40=y
 CONFIG_DRAM_CLK=576
 CONFIG_DRAM_ZQ=3881979
-CONFIG_DRAM_ODT_EN=y
 CONFIG_MMC0_CD_PIN="PH13"
 CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
diff --git a/configs/sopine_baseboard_defconfig 
b/configs/sopine_baseboard_defconfig
index c79c111b5d..1d0b3fbbc7 100644
--- a/configs/sopine_baseboard_defconfig
+++ b/configs/sopine_baseboard_defconfig
@@ -6,7 +6,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
 CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y
 CONFIG_DRAM_CLK=552
 CONFIG_DRAM_ZQ=3881949
-CONFIG_DRAM_ODT_EN=y
 CONFIG_MMC0_CD_PIN=""
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_SPL_SPI_SUNXI=y
-- 
2.14.4

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[U-Boot] [PATCH 2/2] armv8: make SPL exception vectors optional

[Andre Przywara]

Even though the exception vector table is a fundamental part of the ARM
architecture, U-Boot mostly does not make real use of it, except when
crash dumping. But having it in takes up quite some space, partly due to
the architectural alignment requirement of 2KB. Since we don't take special
care of that, the compiler adds a more or less random amount of padding
space, which increases the image size quite a bit, especially for the SPL.

On a typical Allwinner build this is around 1.5KB of padding, plus 1KB
for the vector table (mostly padding space again), then some extra code
to do the actual handling. This amounts to almost 10% of the maximum image
size, which is quite a lot for a pure debugging feature.

Add a Kconfig symbol to allow the exception vector table to be left out
of the build for the SPL.
For now this is "default y" for everyone, but specific defconfigs,
platforms or .config files can opt out here at will, to mitigate the code
size pressure we see for some SPLs.

Signed-off-by: Andre Przywara 
---
 arch/arm/cpu/armv8/Kconfig  | 11 +++
 arch/arm/cpu/armv8/Makefile |  4 
 arch/arm/cpu/armv8/start.S  | 19 +++
 3 files changed, 30 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index 22d2f29548..bd1e759c37 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -1,5 +1,16 @@
 if ARM64
 
+config ARMV8_SPL_EXCEPTION_VECTORS
+   bool "Install crash dump exception vectors"
+   depends on SPL
+   default y
+   help
+ The default exception vector table is only used for the crash
+ dump, but still takes quite a lot of space in the image size.
+
+ Say N here if you are running out of code space in the image
+ and want to save some space at the cost of less debugging info.
+
 config ARMV8_MULTIENTRY
 bool "Enable multiple CPUs to enter into U-Boot"
 
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index d1d4ffecfd..52c8daa049 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -10,7 +10,11 @@ ifndef CONFIG_$(SPL_TPL_)TIMER
 obj-$(CONFIG_SYS_ARCH_TIMER) += generic_timer.o
 endif
 obj-y  += cache_v8.o
+ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o
+else
 obj-y  += exceptions.o
+endif
 obj-y  += cache.o
 obj-y  += tlb.o
 obj-y  += transition.o
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index d4db4d044f..12a78ee38b 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -86,14 +86,23 @@ pie_fixup_done:
 
 #ifdef CONFIG_SYS_RESET_SCTRL
bl reset_sctrl
+#endif
+
+#if defined(CONFIG_ARMV8__SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
+.macro set_vbar, regname, reg
+   msr \regname, \reg
+.endm
+   adr x0, vectors
+#else
+.macro set_vbar, regname, reg
+.endm
 #endif
/*
 * Could be EL3/EL2/EL1, Initial State:
 * Little Endian, MMU Disabled, i/dCache Disabled
 */
-   adr x0, vectors
switch_el x1, 3f, 2f, 1f
-3: msr vbar_el3, x0
+3: set_vbar vbar_el3, x0
mrs x0, scr_el3
orr x0, x0, #0xf/* SCR_EL3.NS|IRQ|FIQ|EA */
msr scr_el3, x0
@@ -103,11 +112,11 @@ pie_fixup_done:
msr cntfrq_el0, x0  /* Initialize CNTFRQ */
 #endif
b   0f
-2: msr vbar_el2, x0
+2: set_vbarvbar_el2, x0
mov x0, #0x33ff
msr cptr_el2, x0/* Enable FP/SIMD */
b   0f
-1: msr vbar_el1, x0
+1: set_vbarvbar_el1, x0
mov x0, #3 << 20
msr cpacr_el1, x0   /* Enable FP/SIMD */
 0:
@@ -345,6 +354,7 @@ ENDPROC(smp_kick_all_cpus)
 /*---*/
 
 ENTRY(c_runtime_cpu_setup)
+#if defined(CONFIG_ARMV8__SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
/* Relocate vBAR */
adr x0, vectors
switch_el x1, 3f, 2f, 1f
@@ -354,6 +364,7 @@ ENTRY(c_runtime_cpu_setup)
b   0f
 1: msr vbar_el1, x0
 0:
+#endif
 
ret
 ENDPROC(c_runtime_cpu_setup)
-- 
2.14.4

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[U-Boot] [PATCH 0/2] armv8: reduce exception handling code size

[Andre Przywara]

These two patches try to address the issue that the default ARMv8
exception vectors take up quite some code space, but don't provide much
benefit apart from a crash dump. Since the overhead might not be justified
for some very size-restricted SPLs, we try to reduce the code size:
- Patch 1/2 stuffs the shared register save/restore code into the gaps
  between the exception entries, which have to follow an architectural
  128 byte alignment requirement.
  This reduces the code size by about 250 bytes, while still having the
  full functionality.
- Patch 2/2 goes much further by introducing a Kconfig symbol allowing to
  drop the exception vector table for the SPL at all, at the expense of
  losing the crash dump feature. On the Allwinner A64 SPL this saves about
  3KB of code, which sound quite worthwhile with our chronically tight
  SPL builds.

The last feature is off by default, but could be selected manually in
menuconfig to fix too big SPL builds.

Cheers,
Andre.

Andre Przywara (2):
  armv8: Reduce exception handling code
  armv8: make SPL exception vectors optional

 arch/arm/cpu/armv8/Kconfig  |  11 
 arch/arm/cpu/armv8/Makefile |   4 ++
 arch/arm/cpu/armv8/exceptions.S | 132 +---
 arch/arm/cpu/armv8/start.S  |  19 --
 4 files changed, 112 insertions(+), 54 deletions(-)

-- 
2.14.4

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[U-Boot] [PATCH 1/2] armv8: Reduce exception handling code

[Andre Przywara]

The arm64 exception handling code is quite big, mostly due to
architectural alignment requirements. Each exception entry spans 32
instructions, which sounds generous, but is too small to fit all of the
save/branch/restore code in there. So at the moment we use only four
instructions, branching into shared save and restore routines.
To not leave the space for those remaining 28 instructions wasted, let's
split the save and restore routines and stuff them into the gaps.
This saves about 250 bytes of code, which is helpful for those tight
SPLs.

Signed-off-by: Andre Przywara 
---
 arch/arm/cpu/armv8/exceptions.S | 132 +---
 1 file changed, 82 insertions(+), 50 deletions(-)

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 1a78a5d1dc..a15af72e02 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -11,7 +11,26 @@
 #include 
 
 /*
- * Exception vectors.
+ * AArch64 exception vectors:
+ * We have four types of exceptions:
+ * - synchronous: traps, data aborts, undefined instructions, ...
+ * - IRQ: group 1 (normal) interrupts
+ * - FIQ: group 0 or secure interrupts
+ * - SError: fatal system errors
+ * There are entries for all four of those for different contexts:
+ * - from same exception level, when using the SP_EL0 stack pointer
+ * - from same exception level, when using the SP_ELx stack pointer
+ * - from lower exception level, when this is AArch64
+ * - from lower exception level, when this is AArch32
+ * Each of those 16 entries have space for 32 instructions, each entry must
+ * be 128 byte aligned, the whole table must be 2K aligned.
+ * The 32 instructions are not enough to save and restore all registers and
+ * to branch to the actual handler, so we split this up:
+ * Each entry saves the LR, branches to the save routine, then to the actual
+ * handler, then to the restore routine. The save and restore routines are
+ * each split in half and stuffed in the unused gap between the entries.
+ * Also as we do not run anything in a lower exception level, we just provide
+ * the first 8 entries for exceptions from the same EL.
  */
.align  11
.globl  vectors
@@ -22,52 +41,9 @@ vectors:
bl  do_bad_sync
b   exception_exit
 
-   .align  7   /* Current EL IRQ Thread */
-   stp x29, x30, [sp, #-16]!
-   bl  _exception_entry
-   bl  do_bad_irq
-   b   exception_exit
-
-   .align  7   /* Current EL FIQ Thread */
-   stp x29, x30, [sp, #-16]!
-   bl  _exception_entry
-   bl  do_bad_fiq
-   b   exception_exit
-
-   .align  7   /* Current EL Error Thread */
-   stp x29, x30, [sp, #-16]!
-   bl  _exception_entry
-   bl  do_bad_error
-   b   exception_exit
-
-   .align  7/* Current EL Synchronous Handler */
-   stp x29, x30, [sp, #-16]!
-   bl  _exception_entry
-   bl  do_sync
-   b   exception_exit
-
-   .align  7/* Current EL IRQ Handler */
-   stp x29, x30, [sp, #-16]!
-   bl  _exception_entry
-   bl  do_irq
-   b   exception_exit
-
-   .align  7/* Current EL FIQ Handler */
-   stp x29, x30, [sp, #-16]!
-   bl  _exception_entry
-   bl  do_fiq
-   b   exception_exit
-
-   .align  7/* Current EL Error Handler */
-   stp x29, x30, [sp, #-16]!
-   bl  _exception_entry
-   bl  do_error
-   b   exception_exit
-
 /*
- * Enter Exception.
- * This will save the processor state that is ELR/X0~X30
- * to the stack frame.
+ * Save (most of) the GP registers to the stack frame.
+ * This is the first part of the shared routine called into from all entries.
  */
 _exception_entry:
stp x27, x28, [sp, #-16]!
@@ -84,7 +60,19 @@ _exception_entry:
stp x5, x6, [sp, #-16]!
stp x3, x4, [sp, #-16]!
stp x1, x2, [sp, #-16]!
+   b   _save_el_regs   /* jump to the second part */
 
+   .align  7   /* Current EL IRQ Thread */
+   stp x29, x30, [sp, #-16]!
+   bl  _exception_entry
+   bl  do_bad_irq
+   b   exception_exit
+
+/*
+ * Save exception specific context: ESR and ELR, for all exception levels.
+ * This is the second part of the shared routine called into from all entries.
+ */
+_save_el_regs:
/* Could be running at EL3/EL2/EL1 */
switch_el x11, 3f, 2f, 1f
 3: mrs x1, esr_el3
@@ -100,16 +88,36 @@ _exception_entry:
mov x0, sp
ret
 
-
+   .align  7   /* Current EL FIQ Thread */
+   stp x29, x30, [sp, #-16]!
+   bl  _exception_entry
+   bl  do_bad_fiq
+   /* falling through to _exception_exit */
+/*
+ * Restore the exception 

[U-Boot] [GIT PULL] u-boot-uniphier/master

[Masahiro Yamada]

Hi Tom,

Please pull UniPhier updates + Kconfig warning fix.

Thanks.



The following changes since commit 323a73adc9a1bf2de43fe03bdd9c3038ce7c2784:

  mtd: nand: add new enum for storing ECC algorithm (2018-07-23 14:33:21 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-uniphier.git master

for you to fetch changes up to 7ef5b1e7ed040683ff551f0234c471ce0d76828c:

  ARM: uniphier: enable distro boot (2018-07-25 08:47:53 +0900)


Luis Araneda (1):
  kconfig: Avoid format overflow warning from GCC 8.1

Masahiro Yamada (8):
  mtd: nand: denali: correct buffer alignment for DMA transfer
  fdt_support: make fdt_fixup_mtdparts() prototype more specific
  board: constify struct node_info array
  ARM: uniphier: clean-up ft_board_setup()
  ARM: uniphier: split ft_board_setup() out to a separate file
  ARM: uniphier: support fdt_fixup_mtdparts
  ARM: uniphier: enable MTD partition and UBI
  ARM: uniphier: enable distro boot

 arch/arm/Kconfig  |  2 +
 arch/arm/mach-uniphier/Kconfig|  1 -
 arch/arm/mach-uniphier/Makefile   |  1 +
 arch/arm/mach-uniphier/board_late_init.c  |  8 +--
 arch/arm/mach-uniphier/dram_init.c| 35 -
 arch/arm/mach-uniphier/fdt-fixup.c| 64 +
 board/CarMediaLab/flea3/flea3.c   |  2 +-
 board/compulab/cm_fx6/cm_fx6.c|  2 +-
 board/freescale/bsc9131rdb/bsc9131rdb.c   |  2 +-
 board/freescale/bsc9132qds/bsc9132qds.c   |  2 +-
 board/gateworks/gw_ventana/gw_ventana.c   |  2 +-
 board/isee/igep003x/board.c   |  2 +-
 board/isee/igep00x0/igep00x0.c|  2 +-
 board/toradex/colibri_imx7/colibri_imx7.c |  2 +-
 board/toradex/colibri_vf/colibri_vf.c |  2 +-
 common/fdt_support.c  | 13 ++--
 configs/uniphier_ld4_sld8_defconfig   |  6 +-
 configs/uniphier_v7_defconfig |  6 +-
 configs/uniphier_v8_defconfig |  5 +-
 doc/README.uniphier   | 55 ++
 drivers/mtd/nand/denali.c |  2 +-
 include/configs/uniphier.h| 84 +++---
 include/fdt_support.h | 11 ++-
 scripts/kconfig/confdata.c|  2 +-
 24 files changed, 206 insertions(+), 107 deletions(-)
 create mode 100644 arch/arm/mach-uniphier/fdt-fixup.c


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[U-Boot] [PATCH] Fix LibreSSL before v2.7.0

[nomble]

From: Nomble 

Signed-off-by: Nomble 
Signed-off-by: Caliph Nomble 
---
 lib/rsa/rsa-sign.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index cfe09cc94c..ab8572894d 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -20,7 +20,7 @@
 #define HAVE_ERR_REMOVE_THREAD_STATE
 #endif
 
-#if OPENSSL_VERSION_NUMBER < 0x1010L
+#if OPENSSL_VERSION_NUMBER < 0x1010L || (defined(LIBRESSL_VERSION_NUMBER) 
&& LIBRESSL_VERSION_NUMBER < 0x0207fL)
 static void RSA_get0_key(const RSA *r,
  const BIGNUM **n, const BIGNUM **e, const BIGNUM **d)
 {
@@ -299,7 +299,7 @@ static int rsa_init(void)
 {
int ret;
 
-#if OPENSSL_VERSION_NUMBER < 0x1010L
+#if OPENSSL_VERSION_NUMBER < 0x1010L || defined(LIBRESSL_VERSION_NUMBER)
ret = SSL_library_init();
 #else
ret = OPENSSL_init_ssl(0, NULL);
@@ -308,7 +308,7 @@ static int rsa_init(void)
fprintf(stderr, "Failure to init SSL library\n");
return -1;
}
-#if OPENSSL_VERSION_NUMBER < 0x1010L
+#if OPENSSL_VERSION_NUMBER < 0x1010L || defined(LIBRESSL_VERSION_NUMBER)
SSL_load_error_strings();
 
OpenSSL_add_all_algorithms();
@@ -354,7 +354,7 @@ err_set_rsa:
 err_engine_init:
ENGINE_free(e);
 err_engine_by_id:
-#if OPENSSL_VERSION_NUMBER < 0x1010L
+#if OPENSSL_VERSION_NUMBER < 0x1010L || (defined(LIBRESSL_VERSION_NUMBER) 
&& LIBRESSL_VERSION_NUMBER < 0x0207fL)
ENGINE_cleanup();
 #endif
return ret;
@@ -362,7 +362,7 @@ err_engine_by_id:
 
 static void rsa_remove(void)
 {
-#if OPENSSL_VERSION_NUMBER < 0x1010L
+#if OPENSSL_VERSION_NUMBER < 0x1010L || (defined(LIBRESSL_VERSION_NUMBER) 
&& LIBRESSL_VERSION_NUMBER < 0x0207fL)
CRYPTO_cleanup_all_ex_data();
ERR_free_strings();
 #ifdef HAVE_ERR_REMOVE_THREAD_STATE
@@ -432,7 +432,8 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo 
*checksum_algo,
ret = rsa_err("Could not obtain signature");
goto err_sign;
}
-   #if OPENSSL_VERSION_NUMBER < 0x1010L
+
+   #if OPENSSL_VERSION_NUMBER < 0x1010L || 
(defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x0207fL)
EVP_MD_CTX_cleanup(context);
#else
EVP_MD_CTX_reset(context);
-- 
2.16.4

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Re: [U-Boot] [PATCH] kconfig: Avoid format overflow warning from GCC 8.1

[Masahiro Yamada]

2018-07-06 5:55 GMT+09:00 Luis Araneda :
> cherry-pick kernel commit 2ae89c7 (2018-06-05)
> to avoid warnings when compiling with GCC 8.1
>
> In file included from scripts/kconfig/zconf.tab.c:2486:
> scripts/kconfig/confdata.c: In function ‘conf_write’:
> scripts/kconfig/confdata.c:771:22: warning: ‘%s’ directive writing likely 7 
> or more bytes into a region of size between 1 and 4097 [-Wformat-overflow=]
>   sprintf(newname, "%s%s", dirname, basename);
>   ^~
> scripts/kconfig/confdata.c:771:19: note: assuming directive output of 7 bytes
>   sprintf(newname, "%s%s", dirname, basename);
>^~
> scripts/kconfig/confdata.c:771:2: note: ‘sprintf’ output 1 or more bytes 
> (assuming 4104) into a destination of size 4097
>   sprintf(newname, "%s%s", dirname, basename);
>   ^~~
> scripts/kconfig/confdata.c:774:23: warning: ‘.tmpconfig.’ directive writing 
> 11 bytes into a region of size between 1 and 4097 [-Wformat-overflow=]
>sprintf(tmpname, "%s.tmpconfig.%d", dirname, (int)getpid());
>^~~
> scripts/kconfig/confdata.c:774:3: note: ‘sprintf’ output between 13 and 4119 
> bytes into a destination of size 4097
>sprintf(tmpname, "%s.tmpconfig.%d", dirname, (int)getpid());
>^~~
>
> Signed-off-by: Luis Araneda 
> ---

Applied to u-boot-uniphier.

>  scripts/kconfig/confdata.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/scripts/kconfig/confdata.c b/scripts/kconfig/confdata.c
> index e4cbb87d76..a04bb26304 100644
> --- a/scripts/kconfig/confdata.c
> +++ b/scripts/kconfig/confdata.c
> @@ -743,7 +743,7 @@ int conf_write(const char *name)
> struct menu *menu;
> const char *basename;
> const char *str;
> -   char dirname[PATH_MAX+1], tmpname[PATH_MAX+1], newname[PATH_MAX+1];
> +   char dirname[PATH_MAX+1], tmpname[PATH_MAX+22], newname[PATH_MAX+8];
> char *env;
>
> dirname[0] = 0;
> --
> 2.18.0
>
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Re: [U-Boot] [PATCH] ARM: uniphier: enable distro boot

[Masahiro Yamada]

2018-07-20 21:47 GMT+09:00 Masahiro Yamada :
> Switch to the distro boot for UniPhier platform.
>
>  - Remove the environment vairalbes used to load images from raw
>block devices.
>
>  - Keep the command to download images via tftp.  This will be
>useful to boot the kernel when no valid kernel image is ready
>yet in the file system.
>
>  - Use root.cpio.gz instead of root.cpio.uboot because we always know
>the file size of the init ramdisk; it is loaded via either a file
>system or network.
>
>  - Rename fit_addr_r to kernel_addr_r, which the distro command
>checks to get the load address of FIT image.
>
> Signed-off-by: Masahiro Yamada 
> ---

Applied to u-boot-uniphier.


>  arch/arm/Kconfig |  1 +
>  arch/arm/mach-uniphier/board_late_init.c |  8 +--
>  doc/README.uniphier  | 55 +
>  include/configs/uniphier.h   | 84 
> +++-
>  4 files changed, 100 insertions(+), 48 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 5b3746c..56956c7 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1231,6 +1231,7 @@ config ARCH_UNIPHIER
> select SPL_OF_CONTROL if SPL
> select SPL_PINCTRL if SPL
> select SUPPORT_SPL
> +   imply DISTRO_DEFAULTS
> imply FAT_WRITE
> help
>   Support for UniPhier SoC family developed by Socionext Inc.
> diff --git a/arch/arm/mach-uniphier/board_late_init.c 
> b/arch/arm/mach-uniphier/board_late_init.c
> index 6a99572..8ffb9a8 100644
> --- a/arch/arm/mach-uniphier/board_late_init.c
> +++ b/arch/arm/mach-uniphier/board_late_init.c
> @@ -66,20 +66,20 @@ int board_late_init(void)
> switch (uniphier_boot_device_raw()) {
> case BOOT_DEVICE_MMC1:
> printf("eMMC Boot");
> -   env_set("bootmode", "emmcboot");
> +   env_set("bootcmd", "run bootcmd_mmc0; run distro_bootcmd");
> break;
> case BOOT_DEVICE_NAND:
> printf("NAND Boot");
> -   env_set("bootmode", "nandboot");
> +   env_set("bootcmd", "run bootcmd_ubifs0; run distro_bootcmd");
> nand_denali_wp_disable();
> break;
> case BOOT_DEVICE_NOR:
> printf("NOR Boot");
> -   env_set("bootmode", "norboot");
> +   env_set("bootcmd", "run tftpboot; run distro_bootcmd");
> break;
> case BOOT_DEVICE_USB:
> printf("USB Boot");
> -   env_set("bootmode", "usbboot");
> +   env_set("bootcmd", "run bootcmd_usb0; run distro_bootcmd");
> break;
> default:
> printf("Unknown");
> diff --git a/doc/README.uniphier b/doc/README.uniphier
> index 990806a..badfacd 100644
> --- a/doc/README.uniphier
> +++ b/doc/README.uniphier
> @@ -332,6 +332,61 @@ for kernel, DTB, and Init ramdisk.
>  If they are not displayed, the Verified Boot is not working.
>
>
> +Deployment for Distro Boot
> +--
> +
> +UniPhier SoC family boot the kernel in a generic manner as described in
> +doc/README.distro .
> +
> +To boot the kernel, you need to deploy necesssary components to a file
> +system on one of your block devices (eMMC, NAND, USB drive, etc.).
> +
> +The components depend on the kernel image format.
> +
> +[1] Bare images
> +
> +  - kernel
> +  - init ramdisk
> +  - device tree blob
> +  - boot configuration file (extlinux.conf)
> +
> +Here is an exmple of the configuration file.
> +
> +>8
> +menu title UniPhier Boot Options.
> +
> +timeout 50
> +default UniPhier
> +
> +label UniPhier
> +  kernel ../Image
> +  initrd ../rootfs.cpio.gz
> +  fdtdir ..
> +>8
> +
> +Then, write 'Image', 'rootfs.cpio.gz', 'uniphier-ld20-ref.dtb' (DTB depends 
> on
> +your board), and 'extlinux/extlinux.conf' to the file system.
> +
> +[2] FIT
> +
> +  - FIT blob
> +  - boot configuration file (extlinux.conf)
> +
> +>8
> +menu title UniPhier Boot Options.
> +
> +timeout 50
> +default UniPhier
> +
> +label UniPhier
> +  kernel ../fitImage
> +>8
> +
> +Since the init ramdisk and DTB are contained in the FIT blob,
> +you do not need to describe them in the configuration file.
> +Write 'fitImage' and 'extlinux/extlinux.conf' to the file system.
> +
> +
>  UniPhier specific commands
>  --
>
> diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
> index b631f79..3c46a6e 100644
> --- a/include/configs/uniphier.h
> +++ b/include/configs/uniphier.h
> @@ -10,6 +10,35 @@
>  #ifndef __CONFIG_UNIPHIER_COMMON_H__
>  #define __CONFIG_UNIPHIER_COMMON_H__
>
> +#ifndef CONFIG_SPL_BUILD
> +#include 
> +
> +#ifdef CONFIG_CMD_MMC
> +#define BOOT_TARGET_DEVICE_MMC(func)   func(MMC, 

Re: [U-Boot] [PATCH] mtd: nand: denali: correct buffer alignment for DMA transfer

[Masahiro Yamada]

2018-07-19 10:13 GMT+09:00 Masahiro Yamada :
> The NAND framework makes sure to pass in the buffer with at least
> chip->buf_align alignment.  Currently, the Denali NAND driver only
> requests 16 byte alignment.  This causes unaligned cache operations
> for the DMA transfer.
>
> [Error Example]
>
> => nand read 8110 0 1000
>
> NAND read: device 0 offset 0x0, size 0x1000
> CACHE: Misaligned operation at range [8110, 81001010]
> CACHE: Misaligned operation at range [8110, 81001010]
> CACHE: Misaligned operation at range [8110, 81001010]
> CACHE: Misaligned operation at range [8110, 81001010]
>  4096 bytes read: OK
>
> Reported-by: Marek Vasut 
> Signed-off-by: Masahiro Yamada 
> ---


Applied to u-boot-uniphier.

>  drivers/mtd/nand/denali.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index 6266c8a..7302c37 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -1270,7 +1270,7 @@ int denali_init(struct denali_nand_info *denali)
> denali->dma_avail = 1;
>
> if (denali->dma_avail) {
> -   chip->buf_align = 16;
> +   chip->buf_align = ARCH_DMA_MINALIGN;
> if (denali->caps & DENALI_CAP_DMA_64BIT)
> denali->setup_dma = denali_setup_dma64;
> else
> --
> 2.7.4
>
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Re: [U-Boot] [PATCH 1/6] fdt_support: make fdt_fixup_mtdparts() prototype more specific

[Masahiro Yamada]

2018-07-19 16:28 GMT+09:00 Masahiro Yamada :
> The second argument of fdt_fixup_mtdparts() is an opaque pointer,
> 'void *node_info', hence callers can pass any pointer.
>
> Obviously, fdt_fixup_mtdparts() expects 'struct node_info *'
> otherwise, it crashes run-time.
>
> Change the prototype so that it is compile-time checked.
>
> Also, add 'const' qualifier to it so that callers can constify
> the struct node_info arrays.
>
> Signed-off-by: Masahiro Yamada 
> ---


Series, applied to u-boot-uniphier.


>  common/fdt_support.c  | 13 +++--
>  include/fdt_support.h | 11 ---
>  2 files changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/common/fdt_support.c b/common/fdt_support.c
> index 812eca8..3b31f3d 100644
> --- a/common/fdt_support.c
> +++ b/common/fdt_support.c
> @@ -893,9 +893,9 @@ err_prop:
>   *
>   * fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
>   */
> -void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size)
> +void fdt_fixup_mtdparts(void *blob, const struct node_info *node_info,
> +   int node_info_size)
>  {
> -   struct node_info *ni = node_info;
> struct mtd_device *dev;
> int i, idx;
> int noff;
> @@ -905,12 +905,13 @@ void fdt_fixup_mtdparts(void *blob, void *node_info, 
> int node_info_size)
>
> for (i = 0; i < node_info_size; i++) {
> idx = 0;
> -   noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat);
> +   noff = fdt_node_offset_by_compatible(blob, -1,
> +node_info[i].compat);
> while (noff != -FDT_ERR_NOTFOUND) {
> debug("%s: %s, mtd dev type %d\n",
> fdt_get_name(blob, noff, 0),
> -   ni[i].compat, ni[i].type);
> -   dev = device_find(ni[i].type, idx++);
> +   node_info[i].compat, node_info[i].type);
> +   dev = device_find(node_info[i].type, idx++);
> if (dev) {
> if (fdt_node_set_part_info(blob, noff, dev))
> return; /* return on error */
> @@ -918,7 +919,7 @@ void fdt_fixup_mtdparts(void *blob, void *node_info, int 
> node_info_size)
>
> /* Jump to next flash node */
> noff = fdt_node_offset_by_compatible(blob, noff,
> -ni[i].compat);
> +
> node_info[i].compat);
> }
> }
>  }
> diff --git a/include/fdt_support.h b/include/fdt_support.h
> index a9a0078..27fe564 100644
> --- a/include/fdt_support.h
> +++ b/include/fdt_support.h
> @@ -205,11 +205,16 @@ int fdt_increase_size(void *fdt, int add_len);
>
>  int fdt_fixup_nor_flash_size(void *blob);
>
> +struct node_info;
>  #if defined(CONFIG_FDT_FIXUP_PARTITIONS)
> -void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size);
> +void fdt_fixup_mtdparts(void *fdt, const struct node_info *node_info,
> +   int node_info_size);
>  #else
> -static inline void fdt_fixup_mtdparts(void *fdt, void *node_info,
> -   int node_info_size) {}
> +static inline void fdt_fixup_mtdparts(void *fdt,
> + const struct node_info *node_info,
> + int node_info_size)
> +{
> +}
>  #endif
>
>  void fdt_del_node_and_alias(void *blob, const char *alias);
> --
> 2.7.4
>
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Re: [U-Boot] [PATCH] tools: genboardscfg: move buildman path to first

[Masahiro Yamada]

2018-07-24 15:27 GMT+09:00 Peng Fan :
> To system which has kconfiglib installed, genboardscfg will
> use system kconfiglib, we need it use U-Boot owned version,
> so move the buildman path to first.
>
> Signed-off-by: Peng Fan 
> Cc: Masahiro Yamada 
> Cc: Simon Glass 
> Cc: Tom Rini 
> ---


Acked-by: Masahiro Yamada 


>  tools/genboardscfg.py | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py
> index 0648472af0..e9bbd15e15 100755
> --- a/tools/genboardscfg.py
> +++ b/tools/genboardscfg.py
> @@ -24,7 +24,7 @@ import sys
>  import tempfile
>  import time
>
> -sys.path.append(os.path.join(os.path.dirname(__file__), 'buildman'))
> +sys.path.insert(1, os.path.join(os.path.dirname(__file__), 'buildman'))
>  import kconfiglib
>
>  ### constant variables ###
> --
> 2.14.1
>
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[U-Boot] [PATCH V2] ti_omap3_common: Add CONFIG_SYS_NS16550_COMx entries

[Adam Ford]

Several boards do not use the default UART3, so they do a check
for ifdef CONFIG_SPL_BUILD and enable the pointer for
CONFIG_SYS_NS16550_COMx to point to OMAP34XX_UARTx.

Let's consoldate this all into one place, and remove them from the
individual boards.

Signed-off-by: Adam Ford 

---

V2:  Rebase against master

diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h
index 5081f3200e..72f04c3c18 100644
--- a/include/configs/omap3_cairo.h
+++ b/include/configs/omap3_cairo.h
@@ -203,8 +203,6 @@
  * function per_clocks_enable().
  */
 #ifdef CONFIG_SPL_BUILD
-#undef CONFIG_SYS_NS16550_COM3
-#define CONFIG_SYS_NS16550_COM2OMAP34XX_UART2
 #undef CONFIG_SERIAL3
 #define CONFIG_SERIAL2
 #endif
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 4d811e096c..3b65a8505f 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -16,12 +16,6 @@
 
 #include 
 
-#ifdef CONFIG_SPL_BUILD
-/* select serial console configuration for SPL */
-#define CONFIG_SYS_NS16550_COM1OMAP34XX_UART1
-#endif
-
-
 /*
  * We are only ever GP parts and will utilize all of the "downloaded image"
  * area in SRAM which starts at 0x4020 and ends at 0x4020 (64KB) in
diff --git a/include/configs/ti_omap3_common.h 
b/include/configs/ti_omap3_common.h
index 7cd4272ce5..6d16fc782b 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -38,6 +38,8 @@
 
 /* Select serial console configuration */
 #ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_NS16550_COM1OMAP34XX_UART1
+#define CONFIG_SYS_NS16550_COM2OMAP34XX_UART2
 #define CONFIG_SYS_NS16550_COM3OMAP34XX_UART3
 #define CONFIG_SERIAL3 3
 #endif
-- 
2.17.1

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Re: [U-Boot] [PATCH] arm64: zynqmp: Add support for Avnet Ultra96

[Marek Vasut]

On 07/24/2018 04:38 PM, Michal Simek wrote:
> Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files
> and point to origin internal board name.
> 
> Signed-off-by: Michal Simek 
> ---

[...]

> diff --git a/arch/arm/dts/avnet-ultra96-rev1.dts 
> b/arch/arm/dts/avnet-ultra96-rev1.dts

Why don't you just keep it consistent and call it zynqmp-zcu100 ?

[...]

> diff --git a/board/xilinx/zynqmp/avnet-ultra96-rev1 
> b/board/xilinx/zynqmp/avnet-ultra96-rev1
> new file mode 12
> index ..f2beed309a21
> --- /dev/null
> +++ b/board/xilinx/zynqmp/avnet-ultra96-rev1
> @@ -0,0 +1 @@
> +zynqmp-zcu100-revC
> \ No newline at end of file

What's this file about ?

-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH 06/10] net: Add an accessor to know if waiting for ARP

[Joe Hershberger]

This single-sources the state of the ARP.

Signed-off-by: Joe Hershberger 
---

 include/net.h |  1 +
 net/arp.c | 11 ---
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/include/net.h b/include/net.h
index f9984ae86c..63718a47f2 100644
--- a/include/net.h
+++ b/include/net.h
@@ -635,6 +635,7 @@ rxhand_f *net_get_udp_handler(void);/* Get UDP RX 
packet handler */
 void net_set_udp_handler(rxhand_f *);  /* Set UDP RX packet handler */
 rxhand_f *net_get_arp_handler(void);   /* Get ARP RX packet handler */
 void net_set_arp_handler(rxhand_f *);  /* Set ARP RX packet handler */
+int arp_is_waiting(void);  /* Waiting for ARP reply? */
 void net_set_icmp_handler(rxhand_icmp_f *f); /* Set ICMP RX handler */
 void net_set_timeout_handler(ulong, thand_f *);/* Set timeout handler */
 
diff --git a/net/arp.c b/net/arp.c
index b8a71684cd..524361cf1b 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -100,7 +100,7 @@ int arp_timeout_check(void)
 {
ulong t;
 
-   if (!net_arp_wait_packet_ip.s_addr)
+   if (!arp_is_waiting())
return 0;
 
t = get_timer(0);
@@ -187,8 +187,8 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr 
*ip, int len)
return;
 
case ARPOP_REPLY:   /* arp reply */
-   /* are we waiting for a reply */
-   if (!net_arp_wait_packet_ip.s_addr)
+   /* are we waiting for a reply? */
+   if (!arp_is_waiting())
break;
 
 #ifdef CONFIG_KEEP_SERVERADDR
@@ -233,3 +233,8 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr 
*ip, int len)
return;
}
 }
+
+int arp_is_waiting(void)
+{
+   return !!net_arp_wait_packet_ip.s_addr;
+}
-- 
2.11.0

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[U-Boot] [PATCH 07/10] net: sandbox: Add a priv ptr for tests to use

[Joe Hershberger]

Signed-off-by: Joe Hershberger 
---

 arch/sandbox/include/asm/eth.h |  9 +
 drivers/net/sandbox.c  | 20 
 2 files changed, 29 insertions(+)

diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index 6dabbf00ab..6bb3f1bbfd 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -53,6 +53,7 @@ typedef int sandbox_eth_tx_hand_f(struct udevice *dev, void 
*pkt,
  * recv_packet_length - lengths of the packet returned as received
  * recv_packets - number of packets returned
  * tx_handler - function to generate responses to sent packets
+ * priv - a pointer to some structure a test may want to keep track of
  */
 struct eth_sandbox_priv {
uchar fake_host_hwaddr[ARP_HLEN];
@@ -62,6 +63,7 @@ struct eth_sandbox_priv {
int recv_packet_length[PKTBUFSRX];
int recv_packets;
sandbox_eth_tx_hand_f *tx_handler;
+   void *priv;
 };
 
 /*
@@ -71,4 +73,11 @@ struct eth_sandbox_priv {
  */
 void sandbox_eth_set_tx_handler(int index, sandbox_eth_tx_hand_f *handler);
 
+/*
+ * Set priv ptr
+ *
+ * priv - priv void ptr to store in the device
+ */
+void sandbox_eth_set_priv(int index, void *priv);
+
 #endif /* __ETH_H */
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 5117af8a82..29767ef291 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -204,6 +204,26 @@ void sandbox_eth_set_tx_handler(int index, 
sandbox_eth_tx_hand_f *handler)
priv->tx_handler = sb_default_handler;
 }
 
+/*
+ * Set priv ptr
+ *
+ * priv - priv void ptr to store in the device
+ */
+void sandbox_eth_set_priv(int index, void *priv)
+{
+   struct udevice *dev;
+   struct eth_sandbox_priv *uc_priv;
+   int ret;
+
+   ret = uclass_get_device(UCLASS_ETH, index, );
+   if (ret)
+   return;
+
+   uc_priv = dev_get_priv(dev);
+
+   uc_priv->priv = priv;
+}
+
 static int sb_eth_start(struct udevice *dev)
 {
struct eth_sandbox_priv *priv = dev_get_priv(dev);
-- 
2.11.0

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[U-Boot] [PATCH 00/10] net: Fix packet corruption issue when handling asynch replies

[Joe Hershberger]

The issue [1] was reported by (Peter) Tran Tien Dat. Unfortunately his
fix for the issue broke notmal operation and I don't feel is a good way
to address the issue. Also, the situation was not covered in the unit
tests, so we'll add them now.

First we refactor the unit test capability of the sandbox ethernet fake
driver so that we can exercise that part of the network stack, then
add the tests where we prove that the async replies work, but that in
the process, the action expected by the user (ping in this case) is
broken.

Lastly, we correct the problem and change the unit tests to also expect
success of the user's operation.

[1] https://patchwork.ozlabs.org/patch/939617/


Joe Hershberger (10):
  net: sandbox: Move disabled flag into priv struct
  net: sandbox: Refactor sandbox send function
  net: sandbox: Make the fake eth driver response configurable
  net: sandbox: Share the priv structure with tests
  net: sandbox: Allow fake eth to handle more than 1 packet response
  net: Add an accessor to know if waiting for ARP
  net: sandbox: Add a priv ptr for tests to use
  test: eth: Add a test for ARP requests
  test: eth: Add a test for the target being pinged
  net: Don't overwrite waiting packets with asynchronous replies

 arch/sandbox/include/asm/eth.h |  85 +
 drivers/net/sandbox.c  | 415 +++--
 include/net.h  |   9 +
 net/arp.c  |  20 +-
 net/arp.h  |   1 +
 net/net.c  |   8 +
 net/ping.c |   7 +-
 test/dm/eth.c  | 160 
 8 files changed, 596 insertions(+), 109 deletions(-)

-- 
2.11.0

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[U-Boot] [PATCH 03/10] net: sandbox: Make the fake eth driver response configurable

[Joe Hershberger]

Make the send handler registerable so tests can check for different
things.

Signed-off-by: Joe Hershberger 
---

 arch/sandbox/include/asm/eth.h | 17 ++
 drivers/net/sandbox.c  | 53 ++
 2 files changed, 66 insertions(+), 4 deletions(-)

diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index 00062616a4..04ce266e2a 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -33,4 +33,21 @@ int sandbox_eth_arp_req_to_reply(struct udevice *dev, void 
*packet,
 int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet,
  unsigned int len);
 
+/**
+ * A packet handler
+ *
+ * dev - device pointer
+ * pkt - pointer to the "sent" packet
+ * len - packet length
+ */
+typedef int sandbox_eth_tx_hand_f(struct udevice *dev, void *pkt,
+  unsigned int len);
+
+/*
+ * Set packet handler
+ *
+ * handler - The func ptr to call on send. If NULL, set to default handler
+ */
+void sandbox_eth_set_tx_handler(int index, sandbox_eth_tx_hand_f *handler);
+
 #endif /* __ETH_H */
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 5746af11a6..2eb1b418f5 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -22,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
  * disabled: Will not respond
  * recv_packet_buffer: buffer of the packet returned as received
  * recv_packet_length: length of the packet returned as received
+ * tx_handler - function to generate responses to sent packets
  */
 struct eth_sandbox_priv {
uchar fake_host_hwaddr[ARP_HLEN];
@@ -29,6 +31,7 @@ struct eth_sandbox_priv {
bool disabled;
uchar *recv_packet_buffer;
int recv_packet_length;
+   sandbox_eth_tx_hand_f *tx_handler;
 };
 
 static bool skip_timeout;
@@ -165,6 +168,50 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, 
void *packet,
return 1;
 }
 
+/*
+ * sb_default_handler()
+ *
+ * perform typical responses to simple ping
+ *
+ * dev - device pointer
+ * pkt - "sent" packet buffer
+ * len - length of packet
+ */
+static int sb_default_handler(struct udevice *dev, void *packet,
+ unsigned int len)
+{
+   sandbox_eth_arp_req_to_reply(dev, packet, len);
+   sandbox_eth_ping_req_to_reply(dev, packet, len);
+
+   return 0;
+}
+
+/*
+ * sandbox_eth_set_tx_handler()
+ *
+ * Set a custom response to a packet being sent through the sandbox eth test
+ * driver
+ *
+ * index - interface to set the handler for
+ * handler - The func ptr to call on send. If NULL, set to default handler
+ */
+void sandbox_eth_set_tx_handler(int index, sandbox_eth_tx_hand_f *handler)
+{
+   struct udevice *dev;
+   struct eth_sandbox_priv *priv;
+   int ret;
+
+   ret = uclass_get_device(UCLASS_ETH, index, );
+   if (ret)
+   return;
+
+   priv = dev_get_priv(dev);
+   if (handler)
+   priv->tx_handler = handler;
+   else
+   priv->tx_handler = sb_default_handler;
+}
+
 static int sb_eth_start(struct udevice *dev)
 {
struct eth_sandbox_priv *priv = dev_get_priv(dev);
@@ -185,10 +232,7 @@ static int sb_eth_send(struct udevice *dev, void *packet, 
int length)
if (priv->disabled)
return 0;
 
-   sandbox_eth_arp_req_to_reply(dev, packet, length);
-   sandbox_eth_ping_req_to_reply(dev, packet, length);
-
-   return 0;
+   return priv->tx_handler(dev, packet, length);
 }
 
 static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp)
@@ -254,6 +298,7 @@ static int sb_eth_ofdata_to_platdata(struct udevice *dev)
}
memcpy(priv->fake_host_hwaddr, mac, ARP_HLEN);
priv->disabled = false;
+   priv->tx_handler = sb_default_handler;
 
return 0;
 }
-- 
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[U-Boot] [PATCH 10/10] net: Don't overwrite waiting packets with asynchronous replies

[Joe Hershberger]

Peter originally sent a fix, but it breaks a number of other things.
This addresses the original reported issue in a different way.

That report was:

> U-Boot has 1 common buffer to send Ethernet frames, pointed to by
> net_tx_packet.  When sending to an IP address without knowing the MAC
> address, U-Boot makes an ARP request (using the arp_tx_packet buffer)
> to find out the MAC address of the IP addressr. When a matching ARP
> reply is received, U-Boot continues sending the frame stored in the
> net_tx_packet buffer.
>
> However, in the mean time, if U-Boot needs to send out any network
> packets (e.g. replying ping packets or ARP requests for its own IP
> address etc.), it will use the net_tx_packet buffer to prepare the
> new packet. Thus this buffer is no longer the original packet meant
> to be transmitted after the ARP reply. The original packet will be
> lost.

This instead uses the ARP tx buffer to send async replies in the case
where we are actively waiting for an ARP reply.

Signed-off-by: Joe Hershberger 

Reported-by: Tran Tien Dat 
---

 include/net.h | 8 
 net/arp.c | 9 +
 net/arp.h | 1 +
 net/net.c | 8 
 net/ping.c| 7 +--
 test/dm/eth.c | 6 ++
 6 files changed, 29 insertions(+), 10 deletions(-)

diff --git a/include/net.h b/include/net.h
index 63718a47f2..03d1056bc5 100644
--- a/include/net.h
+++ b/include/net.h
@@ -654,6 +654,14 @@ static inline void net_set_state(enum net_loop_state state)
net_state = state;
 }
 
+/*
+ * net_get_async_tx_pkt_buf - Get a packet buffer that is not in use for
+ *   sending an asynchronous reply
+ *
+ * returns - ptr to packet buffer
+ */
+uchar * net_get_async_tx_pkt_buf(void);
+
 /* Transmit a packet */
 static inline void net_send_packet(uchar *pkt, int len)
 {
diff --git a/net/arp.c b/net/arp.c
index 524361cf1b..5af65dffd6 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -34,8 +34,7 @@ uchar*arp_wait_packet_ethaddr;
 intarp_wait_tx_packet_size;
 ulong  arp_wait_timer_start;
 intarp_wait_try;
-
-static uchar   *arp_tx_packet; /* THE ARP transmit packet */
+uchar *arp_tx_packet; /* THE ARP transmit packet */
 static uchar   arp_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN];
 
 void arp_init(void)
@@ -126,6 +125,7 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr 
*ip, int len)
struct arp_hdr *arp;
struct in_addr reply_ip_addr;
int eth_hdr_size;
+   uchar *tx_packet;
 
/*
 * We have to deal with two types of ARP packets:
@@ -182,8 +182,9 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr 
*ip, int len)
(net_read_ip(>ar_spa).s_addr & net_netmask.s_addr))
udelay(5000);
 #endif
-   memcpy(net_tx_packet, et, eth_hdr_size + ARP_HDR_SIZE);
-   net_send_packet(net_tx_packet, eth_hdr_size + ARP_HDR_SIZE);
+   tx_packet = net_get_async_tx_pkt_buf();
+   memcpy(tx_packet, et, eth_hdr_size + ARP_HDR_SIZE);
+   net_send_packet(tx_packet, eth_hdr_size + ARP_HDR_SIZE);
return;
 
case ARPOP_REPLY:   /* arp reply */
diff --git a/net/arp.h b/net/arp.h
index afb86958f3..25b3c00d5c 100644
--- a/net/arp.h
+++ b/net/arp.h
@@ -20,6 +20,7 @@ extern uchar *arp_wait_packet_ethaddr;
 extern int arp_wait_tx_packet_size;
 extern ulong arp_wait_timer_start;
 extern int arp_wait_try;
+extern uchar *arp_tx_packet;
 
 void arp_init(void);
 void arp_request(void);
diff --git a/net/net.c b/net/net.c
index f35695b4fc..bc3b66837d 100644
--- a/net/net.c
+++ b/net/net.c
@@ -799,6 +799,14 @@ void net_set_timeout_handler(ulong iv, thand_f *f)
}
 }
 
+uchar *net_get_async_tx_pkt_buf(void)
+{
+   if (arp_is_waiting())
+   return arp_tx_packet; /* If we are waiting, we already sent */
+   else
+   return net_tx_packet;
+}
+
 int net_send_udp_packet(uchar *ether, struct in_addr dest, int dport, int 
sport,
int payload_len)
 {
diff --git a/net/ping.c b/net/ping.c
index 3e5461a36a..821d35d01d 100644
--- a/net/ping.c
+++ b/net/ping.c
@@ -84,6 +84,7 @@ void ping_receive(struct ethernet_hdr *et, struct ip_udp_hdr 
*ip, int len)
struct icmp_hdr *icmph = (struct icmp_hdr *)>udp_src;
struct in_addr src_ip;
int eth_hdr_size;
+   uchar *tx_packet;
 
switch (icmph->type) {
case ICMP_ECHO_REPLY:
@@ -107,8 +108,10 @@ void ping_receive(struct ethernet_hdr *et, struct 
ip_udp_hdr *ip, int len)
icmph->type = ICMP_ECHO_REPLY;
icmph->checksum = 0;
icmph->checksum = compute_ip_checksum(icmph, len - IP_HDR_SIZE);
-   memcpy(net_tx_packet, et, eth_hdr_size + len);
-   net_send_packet(net_tx_packet, eth_hdr_size + len);
+
+   tx_packet = net_get_async_tx_pkt_buf();
+   memcpy(tx_packet, et, eth_hdr_size + 

[U-Boot] [PATCH 02/10] net: sandbox: Refactor sandbox send function

[Joe Hershberger]

Make the behavior of the send function reusable.

Signed-off-by: Joe Hershberger 
---

 arch/sandbox/include/asm/eth.h |  20 +
 drivers/net/sandbox.c  | 176 -
 2 files changed, 124 insertions(+), 72 deletions(-)

diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index bfcd11b593..00062616a4 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -13,4 +13,24 @@ void sandbox_eth_disable_response(int index, bool disable);
 
 void sandbox_eth_skip_timeout(void);
 
+/*
+ * sandbox_eth_arp_req_to_reply()
+ *
+ * Check for an arp request to be sent. If so, inject a reply
+ *
+ * returns 1 if injected, 0 if not
+ */
+int sandbox_eth_arp_req_to_reply(struct udevice *dev, void *packet,
+unsigned int len);
+
+/*
+ * sandbox_eth_ping_req_to_reply()
+ *
+ * Check for a ping request to be sent. If so, inject a reply
+ *
+ * returns 1 if injected, 0 if not
+ */
+int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet,
+ unsigned int len);
+
 #endif /* __ETH_H */
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 60fe065ee5..5746af11a6 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -63,6 +63,108 @@ void sandbox_eth_skip_timeout(void)
skip_timeout = true;
 }
 
+/*
+ * sandbox_eth_arp_req_to_reply()
+ *
+ * Check for an arp request to be sent. If so, inject a reply
+ *
+ * returns 1 if injected, 0 if not
+ */
+int sandbox_eth_arp_req_to_reply(struct udevice *dev, void *packet,
+unsigned int len)
+{
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
+   struct ethernet_hdr *eth = packet;
+   struct arp_hdr *arp;
+   struct ethernet_hdr *eth_recv;
+   struct arp_hdr *arp_recv;
+
+   if (ntohs(eth->et_protlen) != PROT_ARP)
+   return 0;
+
+   arp = packet + ETHER_HDR_SIZE;
+
+   if (ntohs(arp->ar_op) != ARPOP_REQUEST)
+   return 0;
+
+   /* store this as the assumed IP of the fake host */
+   priv->fake_host_ipaddr = net_read_ip(>ar_tpa);
+
+   /* Formulate a fake response */
+   eth_recv = (void *)priv->recv_packet_buffer;
+   memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN);
+   memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
+   eth_recv->et_protlen = htons(PROT_ARP);
+
+   arp_recv = (void *)eth_recv + ETHER_HDR_SIZE;
+   arp_recv->ar_hrd = htons(ARP_ETHER);
+   arp_recv->ar_pro = htons(PROT_IP);
+   arp_recv->ar_hln = ARP_HLEN;
+   arp_recv->ar_pln = ARP_PLEN;
+   arp_recv->ar_op = htons(ARPOP_REPLY);
+   memcpy(_recv->ar_sha, priv->fake_host_hwaddr, ARP_HLEN);
+   net_write_ip(_recv->ar_spa, priv->fake_host_ipaddr);
+   memcpy(_recv->ar_tha, >ar_sha, ARP_HLEN);
+   net_copy_ip(_recv->ar_tpa, >ar_spa);
+
+   priv->recv_packet_length = ETHER_HDR_SIZE + ARP_HDR_SIZE;
+
+   return 1;
+}
+
+/*
+ * sandbox_eth_ping_req_to_reply()
+ *
+ * Check for a ping request to be sent. If so, inject a reply
+ *
+ * returns 1 if injected, 0 if not
+ */
+int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet,
+ unsigned int len)
+{
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
+   struct ethernet_hdr *eth = packet;
+   struct ip_udp_hdr *ip;
+   struct icmp_hdr *icmp;
+   struct ethernet_hdr *eth_recv;
+   struct ip_udp_hdr *ipr;
+   struct icmp_hdr *icmpr;
+
+   if (ntohs(eth->et_protlen) != PROT_IP)
+   return 0;
+
+   ip = packet + ETHER_HDR_SIZE;
+
+   if (ip->ip_p != IPPROTO_ICMP)
+   return 0;
+
+   icmp = (struct icmp_hdr *)>udp_src;
+
+   if (icmp->type != ICMP_ECHO_REQUEST)
+   return 0;
+
+   /* reply to the ping */
+   eth_recv = (void *)priv->recv_packet_buffer;
+   memcpy(eth_recv, packet, len);
+   ipr = (void *)eth_recv + ETHER_HDR_SIZE;
+   icmpr = (struct icmp_hdr *)>udp_src;
+   memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN);
+   memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
+   ipr->ip_sum = 0;
+   ipr->ip_off = 0;
+   net_copy_ip((void *)>ip_dst, >ip_src);
+   net_write_ip((void *)>ip_src, priv->fake_host_ipaddr);
+   ipr->ip_sum = compute_ip_checksum(ipr, IP_HDR_SIZE);
+
+   icmpr->type = ICMP_ECHO_REPLY;
+   icmpr->checksum = 0;
+   icmpr->checksum = compute_ip_checksum(icmpr, ICMP_HDR_SIZE);
+
+   priv->recv_packet_length = len;
+
+   return 1;
+}
+
 static int sb_eth_start(struct udevice *dev)
 {
struct eth_sandbox_priv *priv = dev_get_priv(dev);
@@ -77,84 +179,14 @@ static int sb_eth_start(struct udevice *dev)
 static int sb_eth_send(struct udevice *dev, void *packet, int length)
 {
struct eth_sandbox_priv *priv = dev_get_priv(dev);
-   struct ethernet_hdr *eth = packet;
 

[U-Boot] [PATCH 08/10] test: eth: Add a test for ARP requests

[Joe Hershberger]

This tests that ARP requests made to this target's IP address are
responded-to by the target when it is doing other networking operations.

This currently corrupts the ongoing operation of the device if it
happens to be awaiting an ARP reply of its own to whatever serverip it
is attempting to communicate with. In the test, add an expectation that
the user operation (ping, in this case) will fail. A later patch will
address this problem.

Signed-off-by: Joe Hershberger 
---

 arch/sandbox/include/asm/eth.h |  9 +
 drivers/net/sandbox.c  | 41 +
 test/dm/eth.c  | 81 ++
 3 files changed, 131 insertions(+)

diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index 6bb3f1bbfd..7cd5b551d9 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -33,6 +33,15 @@ int sandbox_eth_arp_req_to_reply(struct udevice *dev, void 
*packet,
 int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet,
  unsigned int len);
 
+/*
+ * sandbox_eth_recv_arp_req()
+ *
+ * Inject an ARP request for this target
+ *
+ * returns 1 if injected, 0 if not
+ */
+int sandbox_eth_recv_arp_req(struct udevice *dev);
+
 /**
  * A packet handler
  *
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 29767ef291..2c2a2c6311 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -161,6 +161,47 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, 
void *packet,
 }
 
 /*
+ * sandbox_eth_recv_arp_req()
+ *
+ * Inject an ARP request for this target
+ *
+ * returns 1 if injected, 0 if not
+ */
+int sandbox_eth_recv_arp_req(struct udevice *dev)
+{
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
+   struct ethernet_hdr *eth_recv;
+   struct arp_hdr *arp_recv;
+
+   /* Don't allow the buffer to overrun */
+   if (priv->recv_packets >= PKTBUFSRX)
+   return 0;
+
+   /* Formulate a fake request */
+   eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets];
+   memcpy(eth_recv->et_dest, net_bcast_ethaddr, ARP_HLEN);
+   memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
+   eth_recv->et_protlen = htons(PROT_ARP);
+
+   arp_recv = (void *)eth_recv + ETHER_HDR_SIZE;
+   arp_recv->ar_hrd = htons(ARP_ETHER);
+   arp_recv->ar_pro = htons(PROT_IP);
+   arp_recv->ar_hln = ARP_HLEN;
+   arp_recv->ar_pln = ARP_PLEN;
+   arp_recv->ar_op = htons(ARPOP_REQUEST);
+   memcpy(_recv->ar_sha, priv->fake_host_hwaddr, ARP_HLEN);
+   net_write_ip(_recv->ar_spa, priv->fake_host_ipaddr);
+   memcpy(_recv->ar_tha, net_null_ethaddr, ARP_HLEN);
+   net_write_ip(_recv->ar_tpa, net_ip);
+
+   priv->recv_packet_length[priv->recv_packets] =
+   ETHER_HDR_SIZE + ARP_HDR_SIZE;
+   ++priv->recv_packets;
+
+   return 1;
+}
+
+/*
  * sb_default_handler()
  *
  * perform typical responses to simple ping
diff --git a/test/dm/eth.c b/test/dm/eth.c
index 1a7684a887..9b5f53e819 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -258,3 +258,84 @@ static int dm_test_net_retry(struct unit_test_state *uts)
return retval;
 }
 DM_TEST(dm_test_net_retry, DM_TESTF_SCAN_FDT);
+
+static int sb_check_arp_reply(struct udevice *dev, void *packet,
+ unsigned int len)
+{
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
+   struct ethernet_hdr *eth = packet;
+   struct arp_hdr *arp;
+   struct unit_test_state *uts = priv->priv;
+
+   if (ntohs(eth->et_protlen) != PROT_ARP)
+   return 0;
+
+   arp = packet + ETHER_HDR_SIZE;
+
+   if (ntohs(arp->ar_op) != ARPOP_REPLY)
+   return 0;
+
+   /* This test would be worthless if we are not waiting */
+   ut_assert(arp_is_waiting());
+
+   /* Validate response */
+   ut_assert(memcmp(eth->et_src, net_ethaddr, ARP_HLEN) == 0);
+   ut_assert(memcmp(eth->et_dest, priv->fake_host_hwaddr, ARP_HLEN) == 0);
+   ut_assert(eth->et_protlen == htons(PROT_ARP));
+
+   ut_assert(arp->ar_hrd == htons(ARP_ETHER));
+   ut_assert(arp->ar_pro == htons(PROT_IP));
+   ut_assert(arp->ar_hln == ARP_HLEN);
+   ut_assert(arp->ar_pln == ARP_PLEN);
+   ut_assert(memcmp(>ar_sha, net_ethaddr, ARP_HLEN) == 0);
+   ut_assert(net_read_ip(>ar_spa).s_addr == net_ip.s_addr);
+   ut_assert(memcmp(>ar_tha, priv->fake_host_hwaddr, ARP_HLEN) == 0);
+   ut_assert(net_read_ip(>ar_tpa).s_addr ==
+ string_to_ip("1.1.2.4").s_addr);
+
+   return 0;
+}
+
+static int sb_with_async_arp_handler(struct udevice *dev, void *packet,
+unsigned int len)
+{
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
+   struct ethernet_hdr *eth = packet;
+   struct arp_hdr *arp = packet + ETHER_HDR_SIZE;
+
+   /*
+* If we are about to generate a reply to ARP, 

[U-Boot] [PATCH 09/10] test: eth: Add a test for the target being pinged

[Joe Hershberger]

The target will respond to pings while doing other network handling.
Make sure that the response happens and is correct.

This currently corrupts the ongoing operation of the device if it
happens to be awaiting an ARP reply of its own to whatever serverip it
is attempting to communicate with. In the test, add an expectation that
the user operation (ping, in this case) will fail. A later patch will
address this problem.

Signed-off-by: Joe Hershberger 
---

 arch/sandbox/include/asm/eth.h |  9 +
 drivers/net/sandbox.c  | 51 ++
 test/dm/eth.c  | 81 ++
 3 files changed, 141 insertions(+)

diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index 7cd5b551d9..66f6b4078b 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -42,6 +42,15 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, void 
*packet,
  */
 int sandbox_eth_recv_arp_req(struct udevice *dev);
 
+/*
+ * sandbox_eth_recv_ping_req()
+ *
+ * Inject a ping request for this target
+ *
+ * returns 1 if injected, 0 if not
+ */
+int sandbox_eth_recv_ping_req(struct udevice *dev);
+
 /**
  * A packet handler
  *
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 2c2a2c6311..039c1e3222 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -202,6 +202,57 @@ int sandbox_eth_recv_arp_req(struct udevice *dev)
 }
 
 /*
+ * sandbox_eth_recv_ping_req()
+ *
+ * Inject a ping request for this target
+ *
+ * returns 1 if injected, 0 if not
+ */
+int sandbox_eth_recv_ping_req(struct udevice *dev)
+{
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
+   struct ethernet_hdr *eth_recv;
+   struct ip_udp_hdr *ipr;
+   struct icmp_hdr *icmpr;
+
+   /* Don't allow the buffer to overrun */
+   if (priv->recv_packets >= PKTBUFSRX)
+   return 0;
+
+   /* Formulate a fake ping */
+   eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets];
+
+   memcpy(eth_recv->et_dest, net_ethaddr, ARP_HLEN);
+   memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
+   eth_recv->et_protlen = htons(PROT_IP);
+
+   ipr = (void *)eth_recv + ETHER_HDR_SIZE;
+   ipr->ip_hl_v = 0x45;
+   ipr->ip_len = htons(IP_ICMP_HDR_SIZE);
+   ipr->ip_off = htons(IP_FLAGS_DFRAG);
+   ipr->ip_p = IPPROTO_ICMP;
+   ipr->ip_sum = 0;
+   net_write_ip(>ip_src, priv->fake_host_ipaddr);
+   net_write_ip(>ip_dst, net_ip);
+   ipr->ip_sum = compute_ip_checksum(ipr, IP_HDR_SIZE);
+
+   icmpr = (struct icmp_hdr *)>udp_src;
+
+   icmpr->type = ICMP_ECHO_REQUEST;
+   icmpr->code = 0;
+   icmpr->checksum = 0;
+   icmpr->un.echo.id = 0;
+   icmpr->un.echo.sequence = htons(1);
+   icmpr->checksum = compute_ip_checksum(icmpr, ICMP_HDR_SIZE);
+
+   priv->recv_packet_length[priv->recv_packets] =
+   ETHER_HDR_SIZE + IP_ICMP_HDR_SIZE;
+   ++priv->recv_packets;
+
+   return 1;
+}
+
+/*
  * sb_default_handler()
  *
  * perform typical responses to simple ping
diff --git a/test/dm/eth.c b/test/dm/eth.c
index 9b5f53e819..77c602beaf 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -339,3 +339,84 @@ static int dm_test_eth_async_arp_reply(struct 
unit_test_state *uts)
 }
 
 DM_TEST(dm_test_eth_async_arp_reply, DM_TESTF_SCAN_FDT);
+
+static int sb_check_ping_reply(struct udevice *dev, void *packet,
+  unsigned int len)
+{
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
+   struct ethernet_hdr *eth = packet;
+   struct ip_udp_hdr *ip;
+   struct icmp_hdr *icmp;
+   struct unit_test_state *uts = priv->priv;
+
+   if (ntohs(eth->et_protlen) != PROT_IP)
+   return 0;
+
+   ip = packet + ETHER_HDR_SIZE;
+
+   if (ip->ip_p != IPPROTO_ICMP)
+   return 0;
+
+   icmp = (struct icmp_hdr *)>udp_src;
+
+   if (icmp->type != ICMP_ECHO_REPLY)
+   return 0;
+
+   /* This test would be worthless if we are not waiting */
+   ut_assert(arp_is_waiting());
+
+   /* Validate response */
+   ut_assert(memcmp(eth->et_src, net_ethaddr, ARP_HLEN) == 0);
+   ut_assert(memcmp(eth->et_dest, priv->fake_host_hwaddr, ARP_HLEN) == 0);
+   ut_assert(eth->et_protlen == htons(PROT_IP));
+
+   ut_assert(net_read_ip(>ip_src).s_addr == net_ip.s_addr);
+   ut_assert(net_read_ip(>ip_dst).s_addr ==
+ string_to_ip("1.1.2.4").s_addr);
+
+   return 0;
+}
+
+static int sb_with_async_ping_handler(struct udevice *dev, void *packet,
+ unsigned int len)
+{
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
+   struct ethernet_hdr *eth = packet;
+   struct arp_hdr *arp = packet + ETHER_HDR_SIZE;
+
+   /*
+* If we are about to generate a reply to ARP, first inject a request
+* from another host
+*/
+   if 

[U-Boot] [PATCH 04/10] net: sandbox: Share the priv structure with tests

[Joe Hershberger]

If tests want to implement tx handlers, they will likely need access to
the details in the priv structure.

Signed-off-by: Joe Hershberger 
---

 arch/sandbox/include/asm/eth.h | 19 +++
 drivers/net/sandbox.c  | 19 ---
 2 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index 04ce266e2a..03c3fb2a28 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -43,6 +43,25 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, void 
*packet,
 typedef int sandbox_eth_tx_hand_f(struct udevice *dev, void *pkt,
   unsigned int len);
 
+/**
+ * struct eth_sandbox_priv - memory for sandbox mock driver
+ *
+ * fake_host_hwaddr - MAC address of mocked machine
+ * fake_host_ipaddr - IP address of mocked machine
+ * disabled - Will not respond
+ * recv_packet_buffer - buffer of the packet returned as received
+ * recv_packet_length - length of the packet returned as received
+ * tx_handler - function to generate responses to sent packets
+ */
+struct eth_sandbox_priv {
+   uchar fake_host_hwaddr[ARP_HLEN];
+   struct in_addr fake_host_ipaddr;
+   bool disabled;
+   uchar *recv_packet_buffer;
+   int recv_packet_length;
+   sandbox_eth_tx_hand_f *tx_handler;
+};
+
 /*
  * Set packet handler
  *
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 2eb1b418f5..0af7bc1439 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -15,25 +15,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/**
- * struct eth_sandbox_priv - memory for sandbox mock driver
- *
- * fake_host_hwaddr: MAC address of mocked machine
- * fake_host_ipaddr: IP address of mocked machine
- * disabled: Will not respond
- * recv_packet_buffer: buffer of the packet returned as received
- * recv_packet_length: length of the packet returned as received
- * tx_handler - function to generate responses to sent packets
- */
-struct eth_sandbox_priv {
-   uchar fake_host_hwaddr[ARP_HLEN];
-   struct in_addr fake_host_ipaddr;
-   bool disabled;
-   uchar *recv_packet_buffer;
-   int recv_packet_length;
-   sandbox_eth_tx_hand_f *tx_handler;
-};
-
 static bool skip_timeout;
 
 /*
-- 
2.11.0

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[U-Boot] [PATCH 05/10] net: sandbox: Allow fake eth to handle more than 1 packet response

[Joe Hershberger]

Use up to the max allocated receive buffers so be able to test more
complex situations.

Signed-off-by: Joe Hershberger 
---

 arch/sandbox/include/asm/eth.h | 10 +---
 drivers/net/sandbox.c  | 57 ++
 2 files changed, 52 insertions(+), 15 deletions(-)

diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index 03c3fb2a28..6dabbf00ab 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -49,16 +49,18 @@ typedef int sandbox_eth_tx_hand_f(struct udevice *dev, void 
*pkt,
  * fake_host_hwaddr - MAC address of mocked machine
  * fake_host_ipaddr - IP address of mocked machine
  * disabled - Will not respond
- * recv_packet_buffer - buffer of the packet returned as received
- * recv_packet_length - length of the packet returned as received
+ * recv_packet_buffer - buffers of the packet returned as received
+ * recv_packet_length - lengths of the packet returned as received
+ * recv_packets - number of packets returned
  * tx_handler - function to generate responses to sent packets
  */
 struct eth_sandbox_priv {
uchar fake_host_hwaddr[ARP_HLEN];
struct in_addr fake_host_ipaddr;
bool disabled;
-   uchar *recv_packet_buffer;
-   int recv_packet_length;
+   uchar * recv_packet_buffer[PKTBUFSRX];
+   int recv_packet_length[PKTBUFSRX];
+   int recv_packets;
sandbox_eth_tx_hand_f *tx_handler;
 };
 
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 0af7bc1439..5117af8a82 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -71,11 +71,15 @@ int sandbox_eth_arp_req_to_reply(struct udevice *dev, void 
*packet,
if (ntohs(arp->ar_op) != ARPOP_REQUEST)
return 0;
 
+   /* Don't allow the buffer to overrun */
+   if (priv->recv_packets >= PKTBUFSRX)
+   return 0;
+
/* store this as the assumed IP of the fake host */
priv->fake_host_ipaddr = net_read_ip(>ar_tpa);
 
/* Formulate a fake response */
-   eth_recv = (void *)priv->recv_packet_buffer;
+   eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets];
memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN);
memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
eth_recv->et_protlen = htons(PROT_ARP);
@@ -91,7 +95,9 @@ int sandbox_eth_arp_req_to_reply(struct udevice *dev, void 
*packet,
memcpy(_recv->ar_tha, >ar_sha, ARP_HLEN);
net_copy_ip(_recv->ar_tpa, >ar_spa);
 
-   priv->recv_packet_length = ETHER_HDR_SIZE + ARP_HDR_SIZE;
+   priv->recv_packet_length[priv->recv_packets] =
+   ETHER_HDR_SIZE + ARP_HDR_SIZE;
+   ++priv->recv_packets;
 
return 1;
 }
@@ -127,8 +133,12 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, 
void *packet,
if (icmp->type != ICMP_ECHO_REQUEST)
return 0;
 
+   /* Don't allow the buffer to overrun */
+   if (priv->recv_packets >= PKTBUFSRX)
+   return 0;
+
/* reply to the ping */
-   eth_recv = (void *)priv->recv_packet_buffer;
+   eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets];
memcpy(eth_recv, packet, len);
ipr = (void *)eth_recv + ETHER_HDR_SIZE;
icmpr = (struct icmp_hdr *)>udp_src;
@@ -144,7 +154,8 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, void 
*packet,
icmpr->checksum = 0;
icmpr->checksum = compute_ip_checksum(icmpr, ICMP_HDR_SIZE);
 
-   priv->recv_packet_length = len;
+   priv->recv_packet_length[priv->recv_packets] = len;
+   ++priv->recv_packets;
 
return 1;
 }
@@ -199,7 +210,11 @@ static int sb_eth_start(struct udevice *dev)
 
debug("eth_sandbox: Start\n");
 
-   priv->recv_packet_buffer = net_rx_packets[0];
+   priv->recv_packets = 0;
+   for (int i = 0; i < PKTBUFSRX; i++) {
+   priv->recv_packet_buffer[i] = net_rx_packets[i];
+   priv->recv_packet_length[i] = 0;
+   }
 
return 0;
 }
@@ -225,18 +240,37 @@ static int sb_eth_recv(struct udevice *dev, int flags, 
uchar **packetp)
skip_timeout = false;
}
 
-   if (priv->recv_packet_length) {
-   int lcl_recv_packet_length = priv->recv_packet_length;
+   if (priv->recv_packets) {
+   int lcl_recv_packet_length = priv->recv_packet_length[0];
 
-   debug("eth_sandbox: received packet %d\n",
- priv->recv_packet_length);
-   priv->recv_packet_length = 0;
-   *packetp = priv->recv_packet_buffer;
+   debug("eth_sandbox: received packet[%d], %d waiting\n",
+ lcl_recv_packet_length, priv->recv_packets - 1);
+   *packetp = priv->recv_packet_buffer[0];
return lcl_recv_packet_length;
}
return 0;
 }
 
+static int sb_eth_free_pkt(struct udevice *dev, uchar *packet, int 

[U-Boot] [PATCH 01/10] net: sandbox: Move disabled flag into priv struct

[Joe Hershberger]

Store the per-device data with the device.

Signed-off-by: Joe Hershberger 
---

 drivers/net/sandbox.c | 18 ++
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index b71c8f88d9..60fe065ee5 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -19,17 +19,18 @@ DECLARE_GLOBAL_DATA_PTR;
  *
  * fake_host_hwaddr: MAC address of mocked machine
  * fake_host_ipaddr: IP address of mocked machine
+ * disabled: Will not respond
  * recv_packet_buffer: buffer of the packet returned as received
  * recv_packet_length: length of the packet returned as received
  */
 struct eth_sandbox_priv {
uchar fake_host_hwaddr[ARP_HLEN];
struct in_addr fake_host_ipaddr;
+   bool disabled;
uchar *recv_packet_buffer;
int recv_packet_length;
 };
 
-static bool disabled[8] = {false};
 static bool skip_timeout;
 
 /*
@@ -40,7 +41,16 @@ static bool skip_timeout;
  */
 void sandbox_eth_disable_response(int index, bool disable)
 {
-   disabled[index] = disable;
+   struct udevice *dev;
+   struct eth_sandbox_priv *priv;
+   int ret;
+
+   ret = uclass_get_device(UCLASS_ETH, index, );
+   if (ret)
+   return;
+
+   priv = dev_get_priv(dev);
+   priv->disabled = disable;
 }
 
 /*
@@ -71,8 +81,7 @@ static int sb_eth_send(struct udevice *dev, void *packet, int 
length)
 
debug("eth_sandbox: Send packet %d\n", length);
 
-   if (dev->seq >= 0 && dev->seq < ARRAY_SIZE(disabled) &&
-   disabled[dev->seq])
+   if (priv->disabled)
return 0;
 
if (ntohs(eth->et_protlen) == PROT_ARP) {
@@ -212,6 +221,7 @@ static int sb_eth_ofdata_to_platdata(struct udevice *dev)
return -EINVAL;
}
memcpy(priv->fake_host_hwaddr, mac, ARP_HLEN);
+   priv->disabled = false;
 
return 0;
 }
-- 
2.11.0

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Re: [U-Boot] [PATCH v2] cmd: fastboot: Validate user input

[Lukasz Majewski]

Hi Sam,

> On Sat, Jun 30, 2018 at 7:20 AM, Simon Glass  wrote:
> > On 29 June 2018 at 11:59, Sam Protsenko
> >  wrote:  
> >> In case when user provides '-' as USB controller index, like this:
> >>  
> >> => fastboot -  
> >>
> >> data abort occurs in strcmp() function in do_fastboot(), here:
> >>
> >> if (!strcmp(argv[1], "udp"))
> >>
> >> (tested on BeagleBone Black).
> >>
> >> That's because argv[1] is NULL when user types in the '-', and null
> >> pointer dereference occurs in strcmp() (which is ok according to C
> >> standard specification). So we must validate user input to prevent
> >> such behavior.
> >>
> >> While at it, check also the result of strtoul() function and handle
> >> error cases properly.
> >>
> >> Signed-off-by: Sam Protsenko 
> >> ---
> >> Changes for v2:
> >>   - replace argv check with argc check
> >>   - add mentioning of testing platform in commit message
> >>
> >>  cmd/fastboot.c | 13 -
> >>  1 file changed, 12 insertions(+), 1 deletion(-)  
> >
> > Reviewed-by: Simon Glass   
> 
> Hi Lukasz,
> 
> Can you please review and merge?

I've noticed that I was not CC'ed, so I've missed the patch from the
mailing list.
You may consider using patman for sending patches (which adds
recipients automatically).


The patch itself seems OK - thanks.

Reviewed-by: Lukasz Majewski 

I've added it to u-boot-dfu tree. Lets wait for Travis-CI output.

> 
> Thanks!




Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH v2 1/3] dfu: Fix data abort in dfu_free_entities()

[Lukasz Majewski]

Hi Sam,

> On Fri, Jul 13, 2018 at 4:35 PM, Sam Protsenko
>  wrote:
> > Commit 5d8fae79163e ("dfu: avoid memory leak") brings a regression
> > which described below. This patch is effectively reverting that
> > commit, adding corresponding comment to avoid such regressions in
> > future.
> >
> > In case of error in dfu_config_entities(), it frees "dfu" array,
> > which leads to "data abort" in dfu_free_entities(), which tries to
> > free the same array (and even tries to access it from linked list
> > first). The issue occurs e.g. when partition table on device does
> > not match $dfu_alt_info layout:
> >  
> > => dfu 0 mmc 1  
> > Couldn't find part #2 on mmc device #1
> > DFU entities configuration failed!
> > data abort
> >
> > To fix this issue, do not free "dfu" array in
> > dfu_config_entities(). It will be freed later in
> > dfu_free_entities().
> >
> > Tested on BeagleBone Black (where this regression was originally
> > found).
> >
> > Signed-off-by: Sam Protsenko 
> > ---
> > Changes in v2:
> >   - Improve commit message by mentioning regression commit
> >  
> 
> Hi Lukasz,
> 
> Can you please review and merge this whole series?

This has been already included:

http://git.denx.de/?p=u-boot/u-boot-dfu.git;a=shortlog;h=refs/heads/master

Marek has fetch this tree and will send PR soon.

> 
> Thanks!
> 
> >  drivers/dfu/dfu.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
> > index e7c91193b9..a3c09334b7 100644
> > --- a/drivers/dfu/dfu.c
> > +++ b/drivers/dfu/dfu.c
> > @@ -462,7 +462,7 @@ int dfu_config_entities(char *env, char
> > *interface, char *devstr) ret = dfu_fill_entity([i], s,
> > alt_num_cnt, interface, devstr);
> > if (ret) {
> > -   free(dfu);
> > +   /* We will free "dfu" in
> > dfu_free_entities() */ return -1;
> > }
> >
> > --
> > 2.18.0
> >  




Best regards,

Lukasz Majewski

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[U-Boot] [PATCH v2 0/6] Add support for STM32 ADC

[Fabrice Gasnier]

This series adds support for STM32 Analog to Digital Converter.
STM32 ADC support is originally based on Linux kernel v4.18-rcs:
- First two patches brings some changes in clk and adc uclass
- Next two patches add STM32 ADC dt-bindings and driver for STM32MP1 and
  STM32H7
- Last patches add config and DT on stm32mp15

Changes in v2:
- add test case for 'clk_valid()', e.g. in test/dm/clk.c and sandbox.
- Update TRUE/FALSE comments to lower case: true/false
- move device_get_supply_regulator() call to pre_probe() routine

Fabrice Gasnier (6):
  clk: add clk_valid()
  dm: adc: uclass: get reference regulator once
  dt-bindings: Document STM32 ADC DT bindings
  adc: Add driver for STM32 ADC
  configs: stm32mp15: enable ADC
  ARM: dts: stm32mp157: Add ADC DT node

 arch/arm/dts/stm32mp157.dtsi  |  32 
 arch/sandbox/include/asm/clk.h|   8 +
 configs/stm32mp15_basic_defconfig |   3 +-
 doc/device-tree-bindings/adc/st,stm32-adc.txt | 141 ++
 drivers/adc/Kconfig   |  16 ++
 drivers/adc/Makefile  |   1 +
 drivers/adc/adc-uclass.c  |  35 ++--
 drivers/adc/stm32-adc-core.c  | 209 +
 drivers/adc/stm32-adc-core.h  |  51 +
 drivers/adc/stm32-adc.c   | 257 ++
 drivers/clk/clk_sandbox_test.c|  13 ++
 include/clk.h |  10 +
 test/dm/clk.c |   1 +
 13 files changed, 758 insertions(+), 19 deletions(-)
 create mode 100644 doc/device-tree-bindings/adc/st,stm32-adc.txt
 create mode 100644 drivers/adc/stm32-adc-core.c
 create mode 100644 drivers/adc/stm32-adc-core.h
 create mode 100644 drivers/adc/stm32-adc.c

-- 
1.9.1

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[U-Boot] [PATCH 1/1] arm: socfpga: Add support for the ReflexCES R329 board

[Xavier Ruppen]

The ReflexCES PCIe carrier board Arria 10 SoC SoM (R329) provides
access to all the features of the Arria 10 SoC SoM (R315) (Ethernet,
OTG USB, Transceivers, UART) and adds further functions, including SFP+
connectors, PCIe x8 Gen3, USB3.0 and a wifi interface.

No fpga portion is provided in fit_spl_fpga.its as MSEL is hardwired on
this board. Thus, a bitstream is loaded before booting by using the EPCQ.
It is possible to load a bitstream from the HPS (packaged in the .sfp file)
but a small hardware mod on the MSEL lines is required (tested and works).

Signed-off-by: Xavier Ruppen 
Cc: Marek Vasut 
Cc: Chin Liang See 
Cc: Dinh Nguyen 
---

This patch was created and tested against u-boot-socfpga/arria10_sdmmc.

The handoff.dtsi file was created by meld'ing the (old) .dts file provided
by ReflexCES and socfpga_arria10_socdk_sdmmc_handoff.dtsi.

The board was tested with what I believe is the factory bitstream written
in the EPCQ.

As I copied and pasted the majority of the files from the arria10-socdk,
I purposely ignored a bunch of checkpatch warnings, i.e. lenghty lines
and a missing SPDX-License-Identifier in the .dts(i) files.

 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/socfpga_arria10_r329.dts | 108 ++
 .../arm/dts/socfpga_arria10_r329_handoff.dtsi | 350 ++
 arch/arm/mach-socfpga/Kconfig |   7 +
 board/reflexces/r329-a10-pcie/Kconfig |  18 +
 board/reflexces/r329-a10-pcie/MAINTAINERS |   8 +
 board/reflexces/r329-a10-pcie/Makefile|   5 +
 .../reflexces/r329-a10-pcie/fit_spl_fpga.its  |  45 +++
 board/reflexces/r329-a10-pcie/socfpga.c   |   6 +
 configs/socfpga_r329_a10_pcie_defconfig   |  67 
 include/configs/socfpga_r329_a10_pcie.h   |  50 +++
 11 files changed, 665 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_arria10_r329.dts
 create mode 100644 arch/arm/dts/socfpga_arria10_r329_handoff.dtsi
 create mode 100644 board/reflexces/r329-a10-pcie/Kconfig
 create mode 100644 board/reflexces/r329-a10-pcie/MAINTAINERS
 create mode 100644 board/reflexces/r329-a10-pcie/Makefile
 create mode 100644 board/reflexces/r329-a10-pcie/fit_spl_fpga.its
 create mode 100644 board/reflexces/r329-a10-pcie/socfpga.c
 create mode 100644 configs/socfpga_r329_a10_pcie_defconfig
 create mode 100644 include/configs/socfpga_r329_a10_pcie.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 946023093d..05cd7af467 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -188,6 +188,7 @@ dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) +=  \
socfpga_arria5_socdk.dtb\
socfpga_arria10_socdk_sdmmc.dtb \
+   socfpga_arria10_r329.dtb\
socfpga_cyclone5_is1.dtb\
socfpga_cyclone5_socdk.dtb  \
socfpga_cyclone5_dbm_soc1.dtb   \
diff --git a/arch/arm/dts/socfpga_arria10_r329.dts 
b/arch/arm/dts/socfpga_arria10_r329.dts
new file mode 100644
index 00..8869ef0fe7
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_r329.dts
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2015 Altera Corporation 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+/dts-v1/;
+#include "socfpga_arria10_r329_handoff.dtsi"
+
+/ {
+   model = "Reflex CES R329 SOM-A10 PCIe";
+   compatible = "altr,socfpga-arria10", "altr,socfpga";
+
+   aliases {
+   ethernet0 = 
+   serial0 = 
+   };
+
+   chosen {
+   bootargs = "earlyprintk";
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   name = "memory";
+   device_type = "memory";
+   reg = <0x0 0xC000>; /* 3GB */
+   };
+
+   soc {
+   u-boot,dm-pre-reloc;
+   };
+};
+
+ {
+   phy-mode = "rgmii";
+   phy-addr = <0x>; /* probe for phy addr */
+
+   /*
+* These skews assume the user's FPGA design is adding 600ps of delay
+* for TX_CLK on Arria 10.
+*
+* All skews are offset since hardware skew values for the ksz9031
+* range from a negative skew to a positive skew.
+* See the micrel-ksz90x1.txt Documentation file for details.
+*/
+   txd0-skew-ps 

Re: [U-Boot] [PATCH 2/6] dm: adc: uclass: get reference regulator once

[Fabrice Gasnier]

On 07/24/2018 01:48 AM, Simon Glass wrote:
> Hi Fabrice,
> 
> On 23 July 2018 at 06:35, Fabrice Gasnier  wrote:
>> device_get_supply_regulator() only needs to be called once.
>> But each time there's call to adc_vxx_value() for instance, it calls
>> adc_vxx_platdata_update() -> device_get_supply_regulator().
>>
>> This also allows vdd_supply/vss_supply to be provided directly from
>> uc_pdata, e.g dt-binding variant like stm32-adc provide its own
>> 'vref-supply'.
>>
>> Signed-off-by: Fabrice Gasnier 
>> ---
>>
>>  drivers/adc/adc-uclass.c | 21 +
>>  1 file changed, 13 insertions(+), 8 deletions(-)
> 
> The original code doesn't look right to me.
> 
> Reading from the DT should happen in the ofdata_to_platdata() method,
> except (as here) where we need to probe another device, iwc we can use
> the probe() method.
> 
> So can you move this code into a new probe() method, so it just
> happens once, when the device is probed?

Hi Simon,

I just sent an updated version of this patchset. I agree with you, so I
moved device_get_supply_regulator() call to pre_probe().

But I get confused about "a new probe()" as you mention above.
So, please take a look at v2, and tell me if this change is in line with
your view.

Many thanks for reviewing,
Best Regards,
Fabrice

> 
>>
>> diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
>> index 17c1a4e..70f4cde 100644
>> --- a/drivers/adc/adc-uclass.c
>> +++ b/drivers/adc/adc-uclass.c
>> @@ -264,10 +264,13 @@ static int adc_vdd_platdata_update(struct udevice *dev)
>>  * will bind before its supply regulator device, then the below 'get'
>>  * will return an error.
>>  */
>> -   ret = device_get_supply_regulator(dev, "vdd-supply",
>> - _pdata->vdd_supply);
>> -   if (ret)
>> -   return ret;
>> +   if (!uc_pdata->vdd_supply) {
>> +   /* Only get vdd_supply once */
>> +   ret = device_get_supply_regulator(dev, "vdd-supply",
>> + _pdata->vdd_supply);
>> +   if (ret)
>> +   return ret;
>> +   }
>>
>> ret = regulator_get_value(uc_pdata->vdd_supply);
>> if (ret < 0)
>> @@ -283,10 +286,12 @@ static int adc_vss_platdata_update(struct udevice *dev)
>> struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
>> int ret;
>>
>> -   ret = device_get_supply_regulator(dev, "vss-supply",
>> - _pdata->vss_supply);
>> -   if (ret)
>> -   return ret;
>> +   if (!uc_pdata->vss_supply) {
>> +   ret = device_get_supply_regulator(dev, "vss-supply",
>> + _pdata->vss_supply);
>> +   if (ret)
>> +   return ret;
>> +   }
>>
>> ret = regulator_get_value(uc_pdata->vss_supply);
>> if (ret < 0)
>> --
>> 1.9.1
>>
> 
> Regards,
> Simon
> 
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[U-Boot] [PATCH v2 6/6] ARM: dts: stm32mp157: Add ADC DT node

[Fabrice Gasnier]

Add ADC device tree node. This allows to get analog conversions on
stm32mp157.

Signed-off-by: Fabrice Gasnier 
---

Changes in v2: None

---
 arch/arm/dts/stm32mp157.dtsi | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/dts/stm32mp157.dtsi b/arch/arm/dts/stm32mp157.dtsi
index 2b89416..88b5460 100644
--- a/arch/arm/dts/stm32mp157.dtsi
+++ b/arch/arm/dts/stm32mp157.dtsi
@@ -86,6 +86,38 @@
status = "disabled";
};
 
+   adc: adc@48003000 {
+   compatible = "st,stm32mp1-adc-core";
+   reg = <0x48003000 0x400>;
+   interrupts = ,
+;
+   clocks = <_clk ADC12>, <_clk ADC12_K>;
+   clock-names = "bus", "adc";
+   interrupt-controller;
+   #interrupt-cells = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   adc1: adc@0 {
+   compatible = "st,stm32mp1-adc";
+   #io-channel-cells = <1>;
+   reg = <0x0>;
+   interrupt-parent = <>;
+   interrupts = <0>;
+   status = "disabled";
+   };
+
+   adc2: adc@100 {
+   compatible = "st,stm32mp1-adc";
+   #io-channel-cells = <1>;
+   reg = <0x100>;
+   interrupt-parent = <>;
+   interrupts = <1>;
+   status = "disabled";
+   };
+   };
+
sdmmc3: sdmmc@48004000 {
compatible = "st,stm32-sdmmc2";
reg = <0x48004000 0x400>, <0x48005000 0x400>;
-- 
1.9.1

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[U-Boot] [PATCH v2 4/6] adc: Add driver for STM32 ADC

[Fabrice Gasnier]

This patch adds support for STMicroelectronics STM32 ADC (analog to
digital converter). It's originally based on Linux kernel v4.18-rcs
drivers/iio/adc/stm32-adc*. It's composed of:
- core driver (UCLASS_SIMPLE_BUS) manages common resources (clk, regu).
- child drivers (UCLASS_ADC) declare each ADC, channels and handle
  conversions.
This driver currently supports STM32H7 and STM32MP1 ADC.

Signed-off-by: Fabrice Gasnier 
Reviewed-by: Simon Glass 
---

Changes in v2: None

 drivers/adc/Kconfig  |  16 +++
 drivers/adc/Makefile |   1 +
 drivers/adc/stm32-adc-core.c | 209 +++
 drivers/adc/stm32-adc-core.h |  51 +
 drivers/adc/stm32-adc.c  | 257 +++
 5 files changed, 534 insertions(+)
 create mode 100644 drivers/adc/stm32-adc-core.c
 create mode 100644 drivers/adc/stm32-adc-core.h
 create mode 100644 drivers/adc/stm32-adc.c

diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig
index 93e27f1..e719c38 100644
--- a/drivers/adc/Kconfig
+++ b/drivers/adc/Kconfig
@@ -47,3 +47,19 @@ config SARADC_ROCKCHIP
  - 2~6 analog input channels
  - 1O or 12 bits resolution
  - Up to 1MSPS of sample rate
+
+config STM32_ADC
+   bool "Enable STMicroelectronics STM32 ADC driver"
+   depends on ADC && (STM32H7 || ARCH_STM32MP)
+   help
+ This enables driver for STMicroelectronics STM32 analog-to-digital
+ converter (ADC).
+ A STM32 ADC block can be composed of several individual ADCs.
+ Each has its own private registers, but shares some resources:
+ - clock selection and prescaler
+ - voltage reference
+ - common registers area.
+ STM32 ADC driver is composed of:
+ - core driver to deal with common resources
+ - child driver to deal with individual ADC resources (declare ADC
+ device and associated channels, start/stop conversions)
diff --git a/drivers/adc/Makefile b/drivers/adc/Makefile
index 95c93d4..cca0fec 100644
--- a/drivers/adc/Makefile
+++ b/drivers/adc/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
 obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
 obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
 obj-$(CONFIG_SARADC_MESON) += meson-saradc.o
+obj-$(CONFIG_STM32_ADC) += stm32-adc.o stm32-adc-core.o
diff --git a/drivers/adc/stm32-adc-core.c b/drivers/adc/stm32-adc-core.c
new file mode 100644
index 000..a9aa143
--- /dev/null
+++ b/drivers/adc/stm32-adc-core.c
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author: Fabrice Gasnier 
+ *
+ * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc-core.c.
+ */
+
+#include 
+#include 
+#include 
+#include "stm32-adc-core.h"
+
+/* STM32H7 - common registers for all ADC instances */
+#define STM32H7_ADC_CCR(STM32_ADCX_COMN_OFFSET + 0x08)
+
+/* STM32H7_ADC_CCR - bit fields */
+#define STM32H7_PRESC_SHIFT18
+#define STM32H7_PRESC_MASK GENMASK(21, 18)
+#define STM32H7_CKMODE_SHIFT   16
+#define STM32H7_CKMODE_MASKGENMASK(17, 16)
+
+/* STM32 H7 maximum analog clock rate (from datasheet) */
+#define STM32H7_ADC_MAX_CLK_RATE   3600
+
+/**
+ * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock
+ * @ckmode: ADC clock mode, Async or sync with prescaler.
+ * @presc: prescaler bitfield for async clock mode
+ * @div: prescaler division ratio
+ */
+struct stm32h7_adc_ck_spec {
+   u32 ckmode;
+   u32 presc;
+   int div;
+};
+
+static const struct stm32h7_adc_ck_spec stm32h7_adc_ckmodes_spec[] = {
+   /* 00: CK_ADC[1..3]: Asynchronous clock modes */
+   { 0, 0, 1 },
+   { 0, 1, 2 },
+   { 0, 2, 4 },
+   { 0, 3, 6 },
+   { 0, 4, 8 },
+   { 0, 5, 10 },
+   { 0, 6, 12 },
+   { 0, 7, 16 },
+   { 0, 8, 32 },
+   { 0, 9, 64 },
+   { 0, 10, 128 },
+   { 0, 11, 256 },
+   /* HCLK used: Synchronous clock modes (1, 2 or 4 prescaler) */
+   { 1, 0, 1 },
+   { 2, 0, 2 },
+   { 3, 0, 4 },
+};
+
+static int stm32h7_adc_clk_sel(struct udevice *dev,
+  struct stm32_adc_common *common)
+{
+   u32 ckmode, presc;
+   unsigned long rate;
+   int i, div;
+
+   /* stm32h7 bus clock is common for all ADC instances (mandatory) */
+   if (!clk_valid(>bclk)) {
+   dev_err(dev, "No bclk clock found\n");
+   return -ENOENT;
+   }
+
+   /*
+* stm32h7 can use either 'bus' or 'adc' clock for analog circuitry.
+* So, choice is to have bus clock mandatory and adc clock optional.
+* If optional 'adc' clock has been found, then try to use it first.
+*/
+   if (clk_valid(>aclk)) {
+   /*
+* Asynchronous clock modes (e.g. ckmode == 0)
+* From spec: PLL output musn't exceed max 

[U-Boot] [PATCH v2 5/6] configs: stm32mp15: enable ADC

[Fabrice Gasnier]

Enable ADC on stm32mp15.
- CONFIG_CMD_ADC
- CONFIG_STM32_ADC

Signed-off-by: Fabrice Gasnier 
Reviewed-by: Simon Glass 
---

Changes in v2: None

 configs/stm32mp15_basic_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configs/stm32mp15_basic_defconfig 
b/configs/stm32mp15_basic_defconfig
index 3a94db5..bbb65b5 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
 # CONFIG_CMD_EXPORTENV is not set
 # CONFIG_CMD_IMPORTENV is not set
 CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_ADC=y
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
@@ -27,6 +28,7 @@ CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_STM32_ADC=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_STM32F7=y
 CONFIG_DM_MMC=y
@@ -35,7 +37,6 @@ CONFIG_STM32_SDMMC2=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_STPMU1=y
-CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_REGULATOR_STM32_VREFBUF=y
 CONFIG_DM_REGULATOR_STPMU1=y
-- 
1.9.1

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[U-Boot] [PATCH v2 1/6] clk: add clk_valid()

[Fabrice Gasnier]

Add clk_valid() to check for optional clocks are valid.
Call clk_valid() in test/dm/clk.c and add relevant test routine to
sandbox clk tests.

Signed-off-by: Fabrice Gasnier 
---

Changes in v2:
- add test case for 'clk_valid()', e.g. in test/dm/clk.c and sandbox.
- Update TRUE/FALSE comments to lower case: true/false

---
 arch/sandbox/include/asm/clk.h |  8 
 drivers/clk/clk_sandbox_test.c | 13 +
 include/clk.h  | 10 ++
 test/dm/clk.c  |  1 +
 4 files changed, 32 insertions(+)

diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index d85cbad..2b1c49f 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -138,5 +138,13 @@ int sandbox_clk_test_free(struct udevice *dev);
  * @return:0 if OK, or a negative error code.
  */
 int sandbox_clk_test_release_bulk(struct udevice *dev);
+/**
+ * sandbox_clk_test_valid - Ask the sandbox clock test device to check its
+ * clocks are valid.
+ *
+ * @dev:   The sandbox clock test (client) devivce.
+ * @return:0 if OK, or a negative error code.
+ */
+int sandbox_clk_test_valid(struct udevice *dev);
 
 #endif
diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
index 8cd4abb..e8465db 100644
--- a/drivers/clk/clk_sandbox_test.c
+++ b/drivers/clk/clk_sandbox_test.c
@@ -116,6 +116,19 @@ int sandbox_clk_test_release_bulk(struct udevice *dev)
return clk_release_bulk(>bulk);
 }
 
+int sandbox_clk_test_valid(struct udevice *dev)
+{
+   struct sandbox_clk_test *sbct = dev_get_priv(dev);
+   int i;
+
+   for (i = 0; i < SANDBOX_CLK_TEST_ID_COUNT; i++) {
+   if (!clk_valid(>clks[i]))
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
 static const struct udevice_id sandbox_clk_test_ids[] = {
{ .compatible = "sandbox,clk-test" },
{ }
diff --git a/include/clk.h b/include/clk.h
index 9a35764..f6d1cc5 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -294,4 +294,14 @@ int clk_disable_bulk(struct clk_bulk *bulk);
 
 int soc_clk_dump(void);
 
+/**
+ * clk_valid() - check if clk is valid
+ *
+ * @clk:   the clock to check
+ * @return true if valid, or false
+ */
+static inline bool clk_valid(struct clk *clk)
+{
+   return !!clk->dev;
+}
 #endif
diff --git a/test/dm/clk.c b/test/dm/clk.c
index b06906a..898c034 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -28,6 +28,7 @@ static int dm_test_clk(struct unit_test_state *uts)
ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
  _test));
ut_assertok(sandbox_clk_test_get(dev_test));
+   ut_assertok(sandbox_clk_test_valid(dev_test));
 
ut_asserteq(1234,
sandbox_clk_test_get_rate(dev_test,
-- 
1.9.1

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[U-Boot] [PATCH v2 3/6] dt-bindings: Document STM32 ADC DT bindings

[Fabrice Gasnier]

This patch adds documentation of device tree bindings for the STM32 ADC.
It's based on linux-v4.18-rc* dt-bindings, at the time of writing:
- Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt

Signed-off-by: Fabrice Gasnier 
Reviewed-by: Simon Glass 
---

Changes in v2: None

 doc/device-tree-bindings/adc/st,stm32-adc.txt | 141 ++
 1 file changed, 141 insertions(+)
 create mode 100644 doc/device-tree-bindings/adc/st,stm32-adc.txt

diff --git a/doc/device-tree-bindings/adc/st,stm32-adc.txt 
b/doc/device-tree-bindings/adc/st,stm32-adc.txt
new file mode 100644
index 000..07fb6cd
--- /dev/null
+++ b/doc/device-tree-bindings/adc/st,stm32-adc.txt
@@ -0,0 +1,141 @@
+STMicroelectronics STM32 ADC device
+
+STM32 ADC is a successive approximation analog-to-digital converter.
+It has several multiplexed input channels. Conversions can be performed
+in single, continuous, scan or discontinuous mode. Result of the ADC is
+stored in a left-aligned or right-aligned 32-bit data register.
+Conversions can be launched in software or using hardware triggers.
+
+The analog watchdog feature allows the application to detect if the input
+voltage goes beyond the user-defined, higher or lower thresholds.
+
+Each STM32 ADC block can have up to 3 ADC instances.
+
+Each instance supports two contexts to manage conversions, each one has its
+own configurable sequence and trigger:
+- regular conversion can be done in sequence, running in background
+- injected conversions have higher priority, and so have the ability to
+  interrupt regular conversion sequence (either triggered in SW or HW).
+  Regular sequence is resumed, in case it has been interrupted.
+
+Contents of a stm32 adc root node:
+---
+Required properties:
+- compatible: Should be one of:
+  "st,stm32f4-adc-core"
+  "st,stm32h7-adc-core"
+  "st,stm32mp1-adc-core"
+- reg: Offset and length of the ADC block register set.
+- interrupts: One or more interrupts for ADC block. Some parts like stm32f4
+  and stm32h7 share a common ADC interrupt line. stm32mp1 has two separate
+  interrupt lines, one for each ADC within ADC block.
+- clocks: Core can use up to two clocks, depending on part used:
+  - "adc" clock: for the analog circuitry, common to all ADCs.
+It's required on stm32f4.
+It's optional on stm32h7.
+  - "bus" clock: for registers access, common to all ADCs.
+It's not present on stm32f4.
+It's required on stm32h7.
+- clock-names: Must be "adc" and/or "bus" depending on part used.
+- interrupt-controller: Identifies the controller node as interrupt-parent
+- vref-supply: Phandle to the vref input analog reference voltage.
+- #interrupt-cells = <1>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Optional properties:
+- A pinctrl state named "default" for each ADC channel may be defined to set
+  inX ADC pins in mode of operation for analog input on external pin.
+
+Contents of a stm32 adc child node:
+---
+An ADC block node should contain at least one subnode, representing an
+ADC instance available on the machine.
+
+Required properties:
+- compatible: Should be one of:
+  "st,stm32f4-adc"
+  "st,stm32h7-adc"
+  "st,stm32mp1-adc"
+- reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200).
+- clocks: Input clock private to this ADC instance. It's required only on
+  stm32f4, that has per instance clock input for registers access.
+- interrupt-parent: Phandle to the parent interrupt controller.
+- interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or
+  2 for adc@200).
+- st,adc-channels: List of single-ended channels muxed for this ADC.
+  It can have up to 16 channels on stm32f4 or 20 channels on stm32h7, numbered
+  from 0 to 15 or 19 (resp. for in0..in15 or in0..in19).
+- st,adc-diff-channels: List of differential channels muxed for this ADC.
+  Depending on part used, some channels can be configured as differential
+  instead of single-ended (e.g. stm32h7). List here positive and negative
+  inputs pairs as , ,... vinp and vinn are numbered
+  from 0 to 19 on stm32h7)
+  Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is 
required.
+  Both properties can be used together. Some channels can be used as
+  single-ended and some other ones as differential (mixed). But channels
+  can't be configured both as single-ended and differential (invalid).
+- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in
+  Documentation/devicetree/bindings/iio/iio-bindings.txt
+
+Optional properties:
+- dmas: Phandle to dma channel for this ADC instance.
+  See ../../dma/dma.txt for details.
+- dma-names: Must be "rx" when dmas property is being used.
+- assigned-resolution-bits: Resolution (bits) to use for conversions. Must
+  match device available resolutions:
+  * can be 6, 8, 10 or 12 on stm32f4
+  * can be 8, 10, 12, 14 or 16 on stm32h7
+  Default is maximum resolution if unset.
+- 

[U-Boot] [PATCH v2 2/6] dm: adc: uclass: get reference regulator once

[Fabrice Gasnier]

device_get_supply_regulator() only needs to be called once.
But each time there's call to adc_vxx_value() for instance, it calls
adc_vxx_platdata_update() -> device_get_supply_regulator().

So, move device_get_supply_regulator() to pre_probe() routine.

This also allows vdd_supply/vss_supply to be provided directly from
uc_pdata, e.g dt-binding variant like stm32-adc provide its own
'vref-supply'.

Signed-off-by: Fabrice Gasnier 
---

Changes in v2:
- move device_get_supply_regulator() call to pre_probe() routine

---
 drivers/adc/adc-uclass.c | 35 +--
 1 file changed, 17 insertions(+), 18 deletions(-)

diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
index 17c1a4e..738c1ea 100644
--- a/drivers/adc/adc-uclass.c
+++ b/drivers/adc/adc-uclass.c
@@ -264,10 +264,8 @@ static int adc_vdd_platdata_update(struct udevice *dev)
 * will bind before its supply regulator device, then the below 'get'
 * will return an error.
 */
-   ret = device_get_supply_regulator(dev, "vdd-supply",
- _pdata->vdd_supply);
-   if (ret)
-   return ret;
+   if (!uc_pdata->vdd_supply)
+   return 0;
 
ret = regulator_get_value(uc_pdata->vdd_supply);
if (ret < 0)
@@ -283,10 +281,8 @@ static int adc_vss_platdata_update(struct udevice *dev)
struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
int ret;
 
-   ret = device_get_supply_regulator(dev, "vss-supply",
- _pdata->vss_supply);
-   if (ret)
-   return ret;
+   if (!uc_pdata->vss_supply)
+   return 0;
 
ret = regulator_get_value(uc_pdata->vss_supply);
if (ret < 0)
@@ -302,14 +298,11 @@ int adc_vdd_value(struct udevice *dev, int *uV)
struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
int ret, value_sign = uc_pdata->vdd_polarity_negative ? -1 : 1;
 
-   if (!uc_pdata->vdd_supply)
-   goto nodev;
-
/* Update the regulator Value. */
ret = adc_vdd_platdata_update(dev);
if (ret)
return ret;
-nodev:
+
if (uc_pdata->vdd_microvolts == -ENODATA)
return -ENODATA;
 
@@ -323,14 +316,11 @@ int adc_vss_value(struct udevice *dev, int *uV)
struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
int ret, value_sign = uc_pdata->vss_polarity_negative ? -1 : 1;
 
-   if (!uc_pdata->vss_supply)
-   goto nodev;
-
/* Update the regulator Value. */
ret = adc_vss_platdata_update(dev);
if (ret)
return ret;
-nodev:
+
if (uc_pdata->vss_microvolts == -ENODATA)
return -ENODATA;
 
@@ -348,7 +338,12 @@ static int adc_vdd_platdata_set(struct udevice *dev)
prop = "vdd-polarity-negative";
uc_pdata->vdd_polarity_negative = dev_read_bool(dev, prop);
 
-   ret = adc_vdd_platdata_update(dev);
+   /* Optionally get regulators */
+   ret = device_get_supply_regulator(dev, "vdd-supply",
+ _pdata->vdd_supply);
+   if (!ret)
+   return adc_vdd_platdata_update(dev);
+
if (ret != -ENOENT)
return ret;
 
@@ -368,7 +363,11 @@ static int adc_vss_platdata_set(struct udevice *dev)
prop = "vss-polarity-negative";
uc_pdata->vss_polarity_negative = dev_read_bool(dev, prop);
 
-   ret = adc_vss_platdata_update(dev);
+   ret = device_get_supply_regulator(dev, "vss-supply",
+ _pdata->vss_supply);
+   if (!ret)
+   return adc_vss_platdata_update(dev);
+
if (ret != -ENOENT)
return ret;
 
-- 
1.9.1

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Re: [U-Boot] [PATCH 3/4] gpio: xilinx: Not read output values via regs

[Stefan Herbrechtsmeier]

Am 24.07.2018 um 12:31 schrieb Michal Simek:

On 23.7.2018 20:42, Stefan Herbrechtsmeier wrote:

Am 23.07.2018 um 13:43 schrieb Michal Simek:

Reading registers for finding out output value is not working because
input value is read instead in case of tristate.

Reported-by: Stefan Herbrechtsmeier 
Signed-off-by: Michal Simek 
---

   drivers/gpio/xilinx_gpio.c | 38 +-
   1 file changed, 33 insertions(+), 5 deletions(-)

diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 4da9ae114d87..9d3e9379d0e5 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c


[snip]


   +    priv->output_val[bank] = val;
+
   return val;
   };
   @@ -441,6 +449,7 @@ static int xilinx_gpio_get_function(struct
udevice *dev, unsigned offset)
   static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
   {
   struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+    struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
   int val, ret;
   u32 bank, pin;
   @@ -451,7 +460,14 @@ static int xilinx_gpio_get_value(struct udevice
*dev, unsigned offset)
   debug("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__,
     (ulong)platdata->regs, offset, bank, pin);
   -    val = readl(>regs->gpiodata + bank * 2);
+    if (xilinx_gpio_get_function(dev, offset) == GPIOF_INPUT) {
+    debug("%s: Read input value from reg\n", __func__);
+    val = readl(>regs->gpiodata + bank * 2);
+    } else {
+    debug("%s: Read saved output value\n", __func__);
+    val = priv->output_val[bank];
+    }

Why you don't always read the data register? This doesn't work for three
state outputs.

In three state register every bit/pin is 0 - output, 1 input.
It means else part is output and I read saved value in priv->output_val.
If pin is setup as INPUT then I need read data reg to find out input value.
Maybe you are commenting something else but please let me know if there
is any other bug.


What happen if I have an open drain output. Even if the gpio output is 1 
the input could read a 0. You driver will always return the output value 
and not the real input value. According to the picture in documentation 
and my tests a data register write writes the output registers and a 
data register read reads the input registers.


Why should the driver return the desired state (output register) and not 
the real state (input register)?


Best regards
  Stefan

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Re: [U-Boot] Ethernet sandox driver issue

[Joe Hershberger]

Hi Steven,

On Mon, Jul 23, 2018 at 6:26 AM, Steven Stoner
 wrote:
> Hello there,
>
> Sorry about this but I could use some assistance.  I am trying to get the 
> ethernet to work under the sandbox and am having issues.  I saw and applied 
> the patch from Joe Hershberger-2 that seemed to be relevant to my issue.
>
> I have applied the patches on the following page to my latest master git 
> version w/ hash 4c6363b of u-boot:
> http://u-boot.10912.n7.nabble.com/PATCH-0-5-sandbox-net-Fix-sandbox-eth-drivers-td00.html
>
> Once complete, I compile using the python test harness with: 
> ./test/py/test.py --bd sandbox --build , then run the sandbox at the command 
> line using build-sandbox/u-boot. I see the following:
>
> U-Boot 2018.07-00296-g474ecd2-dirty (Jul 23 2018 - 11:15:29 +0100)
>
> DRAM:  128 MiB
> MMC:
> In:serial
> Out:   serial
> Err:   serial
> SCSI:
> Net:   No ethernet found.
>
> The "No ethernet found." is coming from function: int eth_initialize(void) on 
> line 400
> printf("No ethernet found.\n");
> in eth-uclass.c.
>
> What is causing this and how do I get the sandbox to receive and send packets 
> to my local network adapter (the second one listed by ifconfig)?

It looks like you are running with no device tree. The sandbox will
not look if there is no DT to tell it to. You need to use the
sandbox.dts. Run "build-sandbox/u-boot -D".

Cheers,
-Joe

> Thanks,
>
> Steven Stoner
> Senior Embedded Engineer
>
> e.  mailto:ssto...@asl-control.co.uk
> w.  http://www.asl-control.co.uk
>
>
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Re: [U-Boot] [RFC PATCH] gpio: zynq: Setup bank_name to dev->name

[Stefan Herbrechtsmeier]

Am 24.07.2018 um 10:37 schrieb Michal Simek:

On 23.7.2018 20:29, Stefan Herbrechtsmeier wrote:

Am 23.07.2018 um 11:08 schrieb Michal Simek:

On 20.7.2018 21:31, Stefan Herbrechtsmeier wrote:

Am 12.07.2018 um 16:04 schrieb Michal Simek:

There should be proper bank name setup to distiguish between different
gpio drivers. Use dev->name for it.

Signed-off-by: Michal Simek 
---

    drivers/gpio/zynq_gpio.c | 2 ++
    1 file changed, 2 insertions(+)

diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
index 26f69b1a713f..f793ee5754a8 100644
--- a/drivers/gpio/zynq_gpio.c
+++ b/drivers/gpio/zynq_gpio.c
@@ -337,6 +337,8 @@ static int zynq_gpio_probe(struct udevice *dev)
    struct zynq_gpio_privdata *priv = dev_get_priv(dev);
    struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
    +    uc_priv->bank_name = dev->name;
+
    if (priv->p_data)
    uc_priv->gpio_count = priv->p_data->ngpio;


Does this not lead to ugly names because the gpio number is append to
the bank_name? Have you check the "gpio status -a" output?

Yes I was checking it. Names are composed together but also just numbers
works as before.

gpio@ff0a0: input: 0 [ ]
gpio@ff0a1: input: 0 [ ]
gpio@ff0a2: input: 0 [ ]
gpio@ff0a3: input: 0 [ ]
gpio@ff0a4: input: 0 [ ]
gpio@ff0a5: input: 0 [ ]
gpio@ff0a6: input: 0 [ ]
gpio@ff0a7: input: 0 [ ]
gpio@ff0a8: input: 0 [ ]
gpio@ff0a9: input: 0 [ ]

Do you think that this are meaningful names? It isn't possible to
separate the device and pin number as well as it mix hex and decimal
numbers.


If you know better way how to setup a bank name please let me know but I
need to distinguish ps gpio from pl one and for pl we need to know the
address.

I know the use case.

A lot of drivers use the bank_name from the device tree, some drivers
append an underscore to the bank name and others add the req_seq of the
device to an alphabetic character.


Other drivers use the gpio-bank-name from the device tree.

I can't see this property inside Linux kernel. If this has been reviewed
by dt guys please let me know.

This property is only used by u-boot. I think it isn't needed by the
Linux kernel.

I am happy to use consistent solution but what's that?


Consistent solution between what?


Mixing name with hex and int is not nice but adding "_" or something
else is just a pain in driver code. If this is done in core I am fine
with that but adding this code to all drivers don't look like generic
solution at all.


Normally the bank name is an alphabetic character or string. Maybe we 
could add the device name to the gpio_lookup_name function and add an 
additional optional device name parameter to the gpio command.



Using additional u-boot property is not good too.

I have mentioned in "gpio: xilinx: Convert driver to DM"
(sha1:10441ec9224d0d269dc512819a32c0785a6338d3)
that uc-priv->name is completely unused. Maybe this should be dev->name
and bank_name should be really used for banks.


Isn't the uc-priv->name used for the label of the request?


Then in gpio status -a can be

Device gpio@a0001000:
Bank:
...

but not sure how gpio commands will work to address exact pin from
prompt. Because this is normally working
gpio toggle gpio@a00010001


With an optional device name this would be:
gpio toggle gpio@a0001000 1

Alternative the gpio command could support the requested labels:
gpio toggle second-gpio

Best regards
  Stefan

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[U-Boot] i.MX6Q SPL won't boot U-Boot from NAND

[Adam Ford]

I am trying to boot an i.MX6Q via SPL to U-Boot and eventually, use
Falcon mode to start the kernel.  I can boot via SPL over USB.  I have
enabled the NAND and SPL NAND, and i can confirm that mxs_nand_spl.c
is being built in.  The board is imx6q_logic

Unfortunately, I have run into two issues.

1.  Imxs_nand_init from mxs_nand_spl.c is trying to run
nand_chip.scan_bbt(mtd), but nand_chip.scan_bbt hasn't been defined
from what i can tell.

There is a function called nand_default_bb which looks like it should
be setup as the default for this, but I am not sure.  As-is, the
system crashes when it attempts to run because it's a broken/NULL
function pointer.  Is there something that should initialize this
pointer and/or what should it reference?

2.  With the #1 commented out,  I get some error messages, but I am
mostly concerned about the BCH read timeout.  I am asking if there is
something missing.

#define CONFIG_SYS_NAND_U_BOOT_OFFS0x20


U-Boot SPL 2018.07-00031-g771af54de4-dirty (Jul 24 2018 - 14:18:14 -0500)
>>spl:board_init_r()
spl_early_init()
Trying to boot from NAND
spl: nand - using hw ecc
0x01:0xd3 erasesize=131072 (>>17)
writesize=2048 (>>11)
oobsize=64
chipsize=1073741824
nand_spl_load_image offset:0x0020 len:64 page:1024
MXS NAND: BCH read timeout
mkimage signature not found - ih_magic = d4aa74ca
nand_spl_load_image offset:0x0020 len:204800 page:1024
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
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MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
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MXS NAND: BCH read timeout
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MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
is_badblock offs=0x0022 block:17 page:1088
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
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MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
MXS NAND: BCH read timeout
Jumping to U-Boot
loaded - jumping to U-Boot...
image entry point: 0x1780
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Re: [U-Boot] [PATCH V2 29/32] fsl_esdhc: Update usdhc driver to support i.MX8

[Fabio Estevam]

On Tue, Jul 24, 2018 at 3:27 PM, Troy Kisky
 wrote:

> Didn't we already discuss this and decide to be consistent with CONFIG_MX6 /7 
> and the rest ?

Good point.

Peng, please use CONFIG_MX8 instead.

Thanks
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Re: [U-Boot] [PATCH V2 29/32] fsl_esdhc: Update usdhc driver to support i.MX8

[Troy Kisky]

On 7/23/2018 5:51 PM, Fabio Estevam wrote:
> Hi Peng,
> 
> On Mon, Jul 23, 2018 at 9:45 PM, Peng Fan  wrote:
> 
>> In V1, I use CONFIG_IMX8, but I think there is no need to use it, because
>> CONFIG_ARCH_IMX8 could do same thing.
> 
> Yes, I prefer to drop "ARCH" for consistency.
> 
>> I could revert to use CONFIG_IMX8, since you prefer it.
> 
> Yes, that would be better.



Didn't we already discuss this and decide to be consistent with CONFIG_MX6 /7 
and the rest ?


> 
>>> Also, for consistency: should CONFIG_MX8M be changed to CONFIG_IMX8M?
>>
>> Yes. CONFIG_MX8M also need to be changed to CONFIG_IMX8M, but not in this 
>> patchset.
> 
> Correct.
> 
> Thanks
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> 

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Re: [U-Boot] [PATCH v2 0/2] env: Make environment loading log more clear

[Sam Protsenko]

On Fri, Jul 20, 2018 at 6:18 PM, Sam Protsenko
 wrote:
> This patch series intended to make boot log better. Basically here we
> just remove unwanted error messages, relying on the message from most
> deep API to be printed (like mmc subsystem). At the moment this looks
> like most clean solution to cluttered log problem, as any other solution
> will be hackish.
>
> With this patch set applied we will see something like this:
>
> Loading Environment from FAT... MMC: no card present
> Loading Environment from MMC... OK
>
> instead of:
>
> Loading Environment from FAT... MMC: no card present
> ** Bad device mmc 0 **
> Failed (-5)
> Loading Environment from MMC... OK
>
> Sam Protsenko (2):
>   env: Don't print "Failed" error message
>   disk: part: Don't show redundant error message
>
>  disk/part.c |  2 +-
>  env/env.c   | 12 +++-
>  2 files changed, 8 insertions(+), 6 deletions(-)
>
> --
> 2.18.0
>

Hi Wolfgang,

Does this series look ok to you? Can you please review?

Thanks!
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Re: [U-Boot] [PATCH v2 1/3] dfu: Fix data abort in dfu_free_entities()

[Sam Protsenko]

On Fri, Jul 13, 2018 at 4:35 PM, Sam Protsenko
 wrote:
> Commit 5d8fae79163e ("dfu: avoid memory leak") brings a regression which
> described below. This patch is effectively reverting that commit, adding
> corresponding comment to avoid such regressions in future.
>
> In case of error in dfu_config_entities(), it frees "dfu" array, which
> leads to "data abort" in dfu_free_entities(), which tries to free the
> same array (and even tries to access it from linked list first). The
> issue occurs e.g. when partition table on device does not match
> $dfu_alt_info layout:
>
> => dfu 0 mmc 1
> Couldn't find part #2 on mmc device #1
> DFU entities configuration failed!
> data abort
>
> To fix this issue, do not free "dfu" array in dfu_config_entities(). It
> will be freed later in dfu_free_entities().
>
> Tested on BeagleBone Black (where this regression was originally found).
>
> Signed-off-by: Sam Protsenko 
> ---
> Changes in v2:
>   - Improve commit message by mentioning regression commit
>

Hi Lukasz,

Can you please review and merge this whole series?

Thanks!

>  drivers/dfu/dfu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
> index e7c91193b9..a3c09334b7 100644
> --- a/drivers/dfu/dfu.c
> +++ b/drivers/dfu/dfu.c
> @@ -462,7 +462,7 @@ int dfu_config_entities(char *env, char *interface, char 
> *devstr)
> ret = dfu_fill_entity([i], s, alt_num_cnt, interface,
>   devstr);
> if (ret) {
> -   free(dfu);
> +   /* We will free "dfu" in dfu_free_entities() */
> return -1;
> }
>
> --
> 2.18.0
>
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Re: [U-Boot] [PATCH v2] cmd: fastboot: Validate user input

[Sam Protsenko]

On Sat, Jun 30, 2018 at 7:20 AM, Simon Glass  wrote:
> On 29 June 2018 at 11:59, Sam Protsenko  wrote:
>> In case when user provides '-' as USB controller index, like this:
>>
>> => fastboot -
>>
>> data abort occurs in strcmp() function in do_fastboot(), here:
>>
>> if (!strcmp(argv[1], "udp"))
>>
>> (tested on BeagleBone Black).
>>
>> That's because argv[1] is NULL when user types in the '-', and null
>> pointer dereference occurs in strcmp() (which is ok according to C
>> standard specification). So we must validate user input to prevent such
>> behavior.
>>
>> While at it, check also the result of strtoul() function and handle
>> error cases properly.
>>
>> Signed-off-by: Sam Protsenko 
>> ---
>> Changes for v2:
>>   - replace argv check with argc check
>>   - add mentioning of testing platform in commit message
>>
>>  cmd/fastboot.c | 13 -
>>  1 file changed, 12 insertions(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass 

Hi Lukasz,

Can you please review and merge?

Thanks!
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Re: [U-Boot] [PATCH] spl: fit: Enable GZIP compression also for no kernel partitions

[York Sun]

On 07/24/2018 06:07 AM, Michal Simek wrote:
> There is no reason to limit gzip usage only for OS_BOOT and kernel image
> type.
> 
> Signed-off-by: Michal Simek 
> ---
> 
>  common/spl/spl_fit.c | 5 +
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
> index 9eabb1c1058b..dbf5ac33a845 100644
> --- a/common/spl/spl_fit.c
> +++ b/common/spl/spl_fit.c
> @@ -257,10 +257,7 @@ static int spl_load_fit_image(struct spl_load_info 
> *info, ulong sector,
>   board_fit_image_post_process(, );
>  #endif
>  
> - if (IS_ENABLED(CONFIG_SPL_OS_BOOT)  &&
> - IS_ENABLED(CONFIG_SPL_GZIP) &&
> - image_comp == IH_COMP_GZIP  &&
> - type == IH_TYPE_KERNEL) {
> + if (IS_ENABLED(CONFIG_SPL_GZIP) && image_comp == IH_COMP_GZIP) {
>   size = length;
>   if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
>  src, )) {
> 

This will uncompress ramdisk unnecessarily.

York
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Re: [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A

[York Sun]

On 07/10/2018 07:11 PM, Ran Wang wrote:
> Hi York,
> 
>> -Original Message-
>> From: York Sun
>> Sent: Wednesday, July 11, 2018 05:06
>> To: Ran Wang ; Albert Aribaud
>> 
>> Cc: u-boot@lists.denx.de
>> Subject: Re: [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
>>
>> On 07/02/2018 10:34 PM, Ran Wang wrote:
>>> Program Central Security Unit (CSU) to grant access permission for USB
>>> 2.0 controller, otherwiase EHCI funciton will down.
>>>
>>> Signed-off-by: Ran Wang 
>>> ---
>>>  arch/arm/cpu/armv8/fsl-layerscape/soc.c  | 8 
>>>  arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
>>>  2 files changed, 9 insertions(+)
>>>
>>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>> index 6a56269..2c4cf7f 100644
>>> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>> @@ -14,6 +14,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
>>>  #include 
>>>  #endif
>>> @@ -668,6 +669,13 @@ void fsl_lsch2_early_init_f(void)
>>>  CCI400_DVM_MESSAGE_REQ_EN |
>> CCI400_SNOOP_REQ_EN);
>>> }
>>>
>>> +   /*
>>> +* Program Central Security Unit (CSU) to grant access
>>> +* permission for USB 2.0 controller
>>> +*/
>>> +#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL)
>>> +   set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW); #endif
>>
>> Is this LS1012A specific?
>>
> For Layerscape platforms, only LS1012A and LS1021A have USB2.0(EHCI) 
> controller,
> Others have USB3.0 controller only. For now I can only verify on LS1012A, so 
> didn't
> cover LS1021A yet.
> 

Ran,

I think calling function set_devices_ns_access() may have an issue. It
is not EL2 safe, is it? Please check enable_layerscape_ns_access(). It
detects exception level before accessing EL3-only registers.

York
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[U-Boot] [PATCH v3] arm: zynq: add support for the zybo z7 board

[Luis Araneda]

The board is manufactured by Digilent
Main features:
- Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
- RAM: 1 GB DDR3L
- FLASH: 16 MB QSPI
- 1 Gbps Ethernet
- USB 2.0
- microSD slot
- Pcam camera connector
- HDMI Tx and Rx
- Audio codec: stereo out, stereo in, mic
- 5 (Z7-10) or 6 (Z7-20) Pmod ports
- 6 push-buttons, 4 switches, 5 LEDs
- 1 (Z7-10) or 2 (Z7-20) RGB LEDs

Signed-off-by: Luis Araneda 
---

This patch adds support for the Digilent Zybo Z7 board

The only thing that I tested and is not working yet, is reading the
MAC address from the OTP region of the SPI flash memory, but I'm trying
to find a solution

Changes from v2:
- Removed silicon version 2_0 and 1_0 from ps7_init_gpl.c

Changes from v1:
- Rebased on u-boot/master
- Removed comments and indented ps7_init_gpl.c
- Removed CONFIG_DISPLAY from defconfig
- Replaced the cadence I2C driver by zynq_i2c
- Squashed the patches as they are less than 100kB now
---
 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/zynq-zybo-z7.dts |  81 +
 board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c | 297 ++
 configs/zynq_zybo_z7_defconfig|  68 
 4 files changed, 448 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/zynq-zybo-z7.dts
 create mode 100644 board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
 create mode 100644 configs/zynq_zybo_z7_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 09adf5eab1..07d8729104 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -149,7 +149,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zc770-xm013.dtb \
zynq-zed.dtb \
zynq-zturn.dtb \
-   zynq-zybo.dtb
+   zynq-zybo.dtb \
+   zynq-zybo-z7.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc0.dtb   \
zynqmp-mini-emmc1.dtb   \
diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts
new file mode 100644
index 00..3f8a3bfa0f
--- /dev/null
+++ b/arch/arm/dts/zynq-zybo-z7.dts
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  Copyright (C) 2011 - 2015 Xilinx
+ *  Copyright (C) 2012 National Instruments Corp.
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+#include 
+
+/ {
+   model = "Digilent Zybo Z7 board";
+   compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
+
+   aliases {
+   ethernet0 = 
+   serial0 = 
+   spi0 = 
+   mmc0 = 
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x4000>;
+   };
+
+   chosen {
+   bootargs = "";
+   stdout-path = "serial0:115200n8";
+   };
+
+   gpio-leds {
+   compatible = "gpio-leds";
+
+   ld4 {
+   label = "zynq-zybo-z7:green:ld4";
+   gpios = < 7 GPIO_ACTIVE_HIGH>;
+   };
+   };
+
+   usb_phy0: phy0 {
+   #phy-cells = <0>;
+   compatible = "usb-nop-xceiv";
+   reset-gpios = < 46 GPIO_ACTIVE_LOW>;
+   };
+};
+
+ {
+   ps-clk-frequency = <>;
+};
+
+ {
+   status = "okay";
+   phy-mode = "rgmii-id";
+   phy-handle = <_phy>;
+
+   ethernet_phy: ethernet-phy@0 {
+   reg = <0>;
+   device_type = "ethernet-phy";
+   };
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   dr_mode = "host";
+   usb-phy = <_phy0>;
+};
diff --git a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c 
b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
new file mode 100644
index 00..f1b9357780
--- /dev/null
+++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
@@ -0,0 +1,297 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
+ *
+ * Procedure to generate this file (using Vivado Webpack 2018.2):
+ * + Install board files from digilent/vivado-boards repository
+ *   (commit 6a45981 from 2018-06-05)
+ * + Start Vivado and create a new RTL project with the Zybo-z7-20 board
+ * + Create a block design
+ *   - Add "ZYNQ7 Processing System" IP
+ *   - Run "Block Automation" (Check "Apply Board Preset")
+ *   - Connect ports FCLK_CLK0 and M_AXI_GP0_ACLK
+ *   - Save diagram changes
+ *   - Go to sources view, select the block diagram,
+ * and select "Generate Output Products"
+ * + Copy the generated "ps7_init_gpl.c" file
+ * + Perform manual editions based on existing Zynq boards
+ *   and the checkpatch.pl script
+ *
+ */
+
+#include 
+
+static unsigned long ps7_pll_init_data_3_0[] = {
+   EMIT_WRITE(0xF808, 0xDF0DU),
+   EMIT_MASKWRITE(0xF8000110, 0x0030U, 0x000FA220U),
+   EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U),
+   

Re: [U-Boot] [PATCH 11/20] w1: enumerate sandbox driver if configured

[Simon Glass]

Hi Maxime,

On 24 July 2018 at 00:58, Maxime Ripard  wrote:
> On Mon, Jul 23, 2018 at 05:48:25PM -0600, Simon Glass wrote:
>> Hi,
>>
>> On 20 July 2018 at 08:01, Lukasz Majewski  wrote:
>> > Hi Eugen,
>> >
>> > Thanks for (re-)bringing the One wire support to u-boot.
>> >
>> >> Add a sandbox eeprom on the bus as a device, if sandbox driver is
>> >> configured.
>> >>
>> >> Signed-off-by: Eugen Hristev 
>> >> ---
>> >>  drivers/w1/w1-uclass.c | 5 +
>> >>  1 file changed, 5 insertions(+)
>> >>
>> >> diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c
>> >> index cfddda3..e58c1ca 100644
>> >> --- a/drivers/w1/w1-uclass.c
>> >> +++ b/drivers/w1/w1-uclass.c
>> >> @@ -142,6 +142,11 @@ static int w1_enumerate(struct udevice *bus)
>> >>   }
>> >>   }
>> >>
>> >> +#ifdef CONFIG_W1_EEPROM_SANDBOX
>> >> + /* before we are finished, add a sandbox device if we can */
>> >> + w1_new_device(bus, W1_FAMILY_EEP_SANDBOX);
>> >> +#endif
>> >
>> > IMHO we shouldn't mix the sandbox code with production (on boards) code.
>> >
>> > Maybe Simon (+CCed) could provide some more input here?
>>
>> I have not seen this series. But new devices should be created
>> automatically based on them being in the device tree. So you should
>> just be able to add them there.
>
> 1-Wire is discoverable, so there's no device nodes in the DT.

Well there should be. See for example PCI, USB, I2C and SPI :-)

Regards,
Simon
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Re: [U-Boot] [PATCH v2] arm: zynq: add support for the zybo z7 board

[Luis Araneda]

Hi Michal,

On Tue, Jul 24, 2018 at 8:39 AM Michal Simek  wrote:
> [...]
> This should be tuned more. That file is long because you support all
> silicon version which is not needed at all. z7 is quite new product
> where 3_0 tables are used. It means just manually remove that
> PCW_SILICON_VERSION_1, PCW_SILICON_VERSION_2 and all that tables and we
> are ready for applying.
> Take a look at board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c.

Yes, I already read the topic-miamiplus file, in fact, I removed
silicon version 1_0 and 2_0 from v1, but I decided to include them
with v2 because the patch were less tha 100 kB.
I'll remove silicon version 1_0 and 2_0 with v3, which I'll send in a bit.

Thanks,

Luis Araneda.
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[U-Boot] [PATCH] arm64: zynqmp: Add support for Avnet Ultra96

[Michal Simek]

Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files
and point to origin internal board name.

Signed-off-by: Michal Simek 
---

 MAINTAINERS|  1 +
 arch/arm/dts/Makefile  |  1 +
 arch/arm/dts/avnet-ultra96-rev1.dts| 19 +++
 board/xilinx/zynqmp/avnet-ultra96-rev1 |  1 +
 configs/avnet_ultra96_rev1_defconfig   | 92 ++
 5 files changed, 114 insertions(+)
 create mode 100644 arch/arm/dts/avnet-ultra96-rev1.dts
 create mode 12 board/xilinx/zynqmp/avnet-ultra96-rev1
 create mode 100644 configs/avnet_ultra96_rev1_defconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index a2293b7c88d4..aee2c3841f5e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -316,6 +316,7 @@ F:  drivers/usb/host/ehci-zynq.c
 F: drivers/watchdog/cdns_wdt.c
 F: include/zynqmppl.h
 F: tools/zynqmp*
+N: ultra96
 N: zynqmp
 
 ARM ZYNQMP R5
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 09adf5eab1da..ae54b5335ecb 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -151,6 +151,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zturn.dtb \
zynq-zybo.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += \
+   avnet-ultra96-rev1.dtb  \
zynqmp-mini-emmc0.dtb   \
zynqmp-mini-emmc1.dtb   \
zynqmp-mini-nand.dtb\
diff --git a/arch/arm/dts/avnet-ultra96-rev1.dts 
b/arch/arm/dts/avnet-ultra96-rev1.dts
new file mode 100644
index ..88aa06fa78a8
--- /dev/null
+++ b/arch/arm/dts/avnet-ultra96-rev1.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Avnet Ultra96 rev1
+ *
+ * (C) Copyright 2018, Xilinx, Inc.
+ *
+ * Michal Simek 
+ */
+
+/dts-v1/;
+
+#include "zynqmp-zcu100-revC.dts"
+
+/ {
+   model = "Avnet Ultra96 Rev1";
+   compatible = "avnet,ultra96-rev1", "avnet,ultra96",
+"xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100",
+"xlnx,zynqmp";
+};
diff --git a/board/xilinx/zynqmp/avnet-ultra96-rev1 
b/board/xilinx/zynqmp/avnet-ultra96-rev1
new file mode 12
index ..f2beed309a21
--- /dev/null
+++ b/board/xilinx/zynqmp/avnet-ultra96-rev1
@@ -0,0 +1 @@
+zynqmp-zcu100-revC
\ No newline at end of file
diff --git a/configs/avnet_ultra96_rev1_defconfig 
b/configs/avnet_ultra96_rev1_defconfig
new file mode 100644
index ..0b5281a25021
--- /dev/null
+++ b/configs/avnet_ultra96_rev1_defconfig
@@ -0,0 +1,92 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu100"
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff01
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_ZYNQ_SDHCI_MAX_FREQ=1500
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEFAULT_DEVICE_TREE="avnet-ultra96-rev1"
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
+CONFIG_SYS_PROMPT="ZynqMP> "
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_MP=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_XILINX_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C1=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ZYNQ_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_ZYNQMP=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_WDT=y
+CONFIG_WDT_CDNS=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-- 
1.9.1

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[U-Boot] [PATCH v4 4/8] armv8: fsl-layerscape: add missing debug stream ID

[laurentiu . tudor]

From: Laurentiu Tudor 

Add a define with a value for the missing debug stream ID.

Signed-off-by: Laurentiu Tudor 
---
 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
index 61c6e533c6..1b02d484d9 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
@@ -50,6 +50,7 @@
 #define FSL_QDMA_STREAM_ID 7
 #define FSL_EDMA_STREAM_ID 8
 #define FSL_ETR_STREAM_ID  9
+#define FSL_DEBUG_STREAM_ID10
 
 /* PCI - programmed in PEXn_LUT */
 #define FSL_PEX_STREAM_ID_START11
-- 
2.17.1

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[U-Boot] [PATCH v4 3/8] misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms

[laurentiu . tudor]

From: Laurentiu Tudor 

QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.

Signed-off-by: Laurentiu Tudor 
---
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 +--
 drivers/misc/fsl_portals.c | 2 --
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 644a16dd30..d22ec70aa5 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -57,8 +57,7 @@
 #define CONFIG_SYS_BMAN_SWP_ISDR_REG0x3E80
 #define CONFIG_SYS_QMAN_NUM_PORTALS10
 #define CONFIG_SYS_QMAN_MEM_BASE   0x5
-#define CONFIG_SYS_QMAN_MEM_PHYS   (0xfull + \
-   CONFIG_SYS_QMAN_MEM_BASE)
+#define CONFIG_SYS_QMAN_MEM_PHYS   CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_MEM_SIZE   0x0800
 #define CONFIG_SYS_QMAN_SP_CENA_SIZE0x1
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE0x1
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 7c22b8d209..22faf16751 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -24,7 +24,6 @@ void setup_qbman_portals(void)
CONFIG_SYS_BMAN_SWP_ISDR_REG;
void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
CONFIG_SYS_QMAN_SWP_ISDR_REG;
-#ifdef CONFIG_PPC
struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
 
/* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
@@ -32,7 +31,6 @@ void setup_qbman_portals(void)
out_be32(>qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
 #endif
out_be32(>qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
-#endif
 #ifdef CONFIG_FSL_CORENET
int i;
 
-- 
2.17.1

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[U-Boot] [PATCH v4 5/8] armv8: ls1046a: initial icid setup support

[laurentiu . tudor]

From: Laurentiu Tudor 

Add infrastructure for ICID setup and device tree fixup on ARM
platforms. This include basic ICID setup for several devices.

Signed-off-by: Laurentiu Tudor 
---
 arch/arm/cpu/armv8/fsl-layerscape/Makefile|   1 +
 arch/arm/cpu/armv8/fsl-layerscape/icid.c  | 110 ++
 .../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c |  29 +
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   |   3 +
 .../asm/arch-fsl-layerscape/fsl_icid.h|  80 +
 board/freescale/ls1046aqds/ls1046aqds.c   |   2 +
 board/freescale/ls1046ardb/ls1046ardb.c   |   3 +
 7 files changed, 228 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/icid.c
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile 
b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index 1e9e4680fe..5d6f68aad6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -37,6 +37,7 @@ endif
 
 ifneq ($(CONFIG_ARCH_LS1046A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
+obj-y += icid.o ls1046_ids.o
 endif
 
 ifneq ($(CONFIG_ARCH_LS1088A),)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c 
b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
new file mode 100644
index 00..ae3b8daa95
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+static void set_icid(struct icid_id_table *tbl, int size)
+{
+   int i;
+
+   for (i = 0; i < size; i++)
+   out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
+}
+
+void set_icids(void)
+{
+   /* setup general icid offsets */
+   set_icid(icid_tbl, icid_tbl_sz);
+}
+
+int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids)
+{
+   int i, ret;
+   u32 prop[8];
+
+   /*
+* Note: The "iommus" property definition mentions Stream IDs while
+* this code handles ICIDs. The current implementation assumes that
+* ICIDs and Stream IDs are equal.
+*/
+   for (i = 0; i < num_ids; i++) {
+   prop[i * 2] = cpu_to_fdt32(smmu_ph);
+   prop[i * 2 + 1] = cpu_to_fdt32(ids[i]);
+   }
+   ret = fdt_setprop(blob, off, "iommus",
+ prop, sizeof(u32) * num_ids * 2);
+   if (ret) {
+   printf("WARNING unable to set iommus: %s\n", fdt_strerror(ret));
+   return ret;
+   }
+
+   return 0;
+}
+
+int fdt_fixup_icid_tbl(void *blob, int smmu_ph,
+  struct icid_id_table *tbl, int size)
+{
+   int i, err, off;
+
+   for (i = 0; i < size; i++) {
+   if (!tbl[i].compat)
+   continue;
+
+   off = fdt_node_offset_by_compat_reg(blob,
+   tbl[i].compat,
+   tbl[i].compat_addr);
+   if (off > 0) {
+   err = fdt_set_iommu_prop(blob, off, smmu_ph,
+[i].id, 1);
+   if (err)
+   return err;
+   } else {
+   printf("WARNING could not find node %s: %s.\n",
+  tbl[i].compat, fdt_strerror(off));
+   }
+   }
+
+   return 0;
+}
+
+int fdt_get_smmu_phandle(void *blob)
+{
+   int noff, smmu_ph;
+
+   noff = fdt_node_offset_by_compatible(blob, -1, "arm,mmu-500");
+   if (noff < 0) {
+   printf("WARNING failed to get smmu node: %s\n",
+  fdt_strerror(noff));
+   return noff;
+   }
+
+   smmu_ph = fdt_get_phandle(blob, noff);
+   if (!smmu_ph) {
+   smmu_ph = fdt_create_phandle(blob, noff);
+   if (!smmu_ph) {
+   printf("WARNING failed to get smmu phandle\n");
+   return -1;
+   }
+   }
+
+   return smmu_ph;
+}
+
+void fdt_fixup_icid(void *blob)
+{
+   int smmu_ph;
+
+   smmu_ph = fdt_get_smmu_phandle(blob);
+   if (smmu_ph < 0)
+   return;
+
+   fdt_fixup_icid_tbl(blob, smmu_ph, icid_tbl, icid_tbl_sz);
+}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
new file mode 100644
index 00..1c528ab751
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include 
+#include 
+#include 
+
+struct icid_id_table icid_tbl[] = {
+#ifdef CONFIG_SYS_DPAA_QBMAN
+   SET_QMAN_ICID(FSL_DPAA1_STREAM_ID_START),
+   SET_BMAN_ICID(FSL_DPAA1_STREAM_ID_START + 1),
+#endif
+
+

[U-Boot] [PATCH v4 6/8] armv8: ls1046a: add icid setup for qman portals

[laurentiu . tudor]

From: Laurentiu Tudor 

Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.

Signed-off-by: Laurentiu Tudor 
---
 .../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 16 +++
 .../asm/arch-fsl-layerscape/fsl_portals.h | 24 +++
 drivers/misc/fsl_portals.c| 43 +++
 3 files changed, 75 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 1c528ab751..80e1ceadc0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -6,6 +6,22 @@
 #include 
 #include 
 #include 
+#include 
+
+#ifdef CONFIG_SYS_DPAA_QBMAN
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+   SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+};
+#endif
 
 struct icid_id_table icid_tbl[] = {
 #ifdef CONFIG_SYS_DPAA_QBMAN
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h 
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
new file mode 100644
index 00..1577e935a6
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 NXP
+ */
+
+#ifndef _FSL_PORTALS_H_
+#define _FSL_PORTALS_H_
+
+struct qportal_info {
+   u16 dicid;  /* DQRR ICID */
+   u16 ficid;  /* frame data ICID */
+   u16 icid;
+   u8  sdest;
+};
+
+#define SET_QP_INFO(streamid, dest) \
+   { .dicid = (streamid), .ficid = (streamid), .icid = (streamid), \
+   .sdest = (dest) }
+
+extern struct qportal_info qp_info[];
+void fdt_portal(void *blob, const char *compat, const char *container,
+   u64 addr, u32 size);
+
+#endif
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 22faf16751..a524510707 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -13,6 +13,9 @@
 #ifdef CONFIG_PPC
 #include 
 #include 
+#else
+#include 
+#include 
 #endif
 #include 
 
@@ -45,6 +48,22 @@ void setup_qbman_portals(void)
/* set frame liodn */
out_be32(>qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn);
}
+#else
+#ifdef CONFIG_ARM
+   int i;
+
+   for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
+   u8 sdest = qp_info[i].sdest;
+   u16 ficid = qp_info[i].ficid;
+   u16 dicid = qp_info[i].dicid;
+   u16 icid = qp_info[i].icid;
+
+   out_be32(>qcsp[i].qcsp_lio_cfg, (icid << 16) |
+   dicid);
+   /* set frame icid */
+   out_be32(>qcsp[i].qcsp_io_cfg, (sdest << 16) | ficid);
+   }
+#endif
 #endif
 
/* Change default state of BMan ISDR portals to all 1s */
@@ -178,6 +197,10 @@ void fdt_fixup_qportals(void *blob)
char compat[64];
int compat_len;
 
+#ifndef CONFIG_PPC
+   int smmu_ph = fdt_get_smmu_phandle(blob);
+#endif
+
maj = (rev_1 >> 8) & 0xff;
min = rev_1 & 0xff;
ip_cfg = rev_2 & 0xff;
@@ -188,7 +211,6 @@ void fdt_fixup_qportals(void *blob)
 
off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
while (off != -FDT_ERR_NOTFOUND) {
-#ifdef CONFIG_PPC
 #ifdef CONFIG_FSL_CORENET
u32 liodns[2];
 #endif
@@ -198,12 +220,7 @@ void fdt_fixup_qportals(void *blob)
if (!ci)
goto err;
 
-   i = *ci;
-#ifdef CONFIG_SYS_DPAA_FMAN
-   int j;
-#endif
-
-#endif /* CONFIG_PPC */
+   i = fdt32_to_cpu(*ci);
err = fdt_setprop(blob, off, "compatible", compat, compat_len);
if (err < 0)
goto err;
@@ -235,7 +252,7 @@ void fdt_fixup_qportals(void *blob)
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-   for (j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
+   for (int j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
char name[] = "fman@0";
 
name[sizeof(name) - 2] = '0' + j;
@@ -251,6 +268,16 @@ void fdt_fixup_qportals(void *blob)
if (err < 0)
goto err;
 #endif
+#else
+   if (smmu_ph >= 0) {
+   u32 icids[3];
+
+   icids[0] = qp_info[i].icid;
+   icids[1] = qp_info[i].dicid;
+ 

[U-Boot] [PATCH v4 7/8] armv8: ls1046a: setup fman ports ICIDs and device tree

[laurentiu . tudor]

From: Laurentiu Tudor 

Add support for ICID setting of fman ports and the required device
tree fixups.

Signed-off-by: Laurentiu Tudor 
---
 arch/arm/cpu/armv8/fsl-layerscape/icid.c  | 82 +++
 .../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 30 +++
 .../asm/arch-fsl-layerscape/fsl_icid.h| 10 +++
 3 files changed, 122 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c 
b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
index ae3b8daa95..bada5040a8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static void set_icid(struct icid_id_table *tbl, int size)
 {
@@ -19,10 +20,27 @@ static void set_icid(struct icid_id_table *tbl, int size)
out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
 }
 
+#ifdef CONFIG_SYS_FMAN_V3
+void set_fman_icids(struct fman_icid_id_table *tbl, int size)
+{
+   int i;
+   ccsr_fman_t *fm = (void *)CONFIG_SYS_FSL_FM1_ADDR;
+
+   for (i = 0; i < size; i++) {
+   out_be32(>fm_bmi_common.fmbm_ppid[tbl[i].port_id - 1],
+tbl[i].icid);
+   }
+}
+#endif
+
 void set_icids(void)
 {
/* setup general icid offsets */
set_icid(icid_tbl, icid_tbl_sz);
+
+#ifdef CONFIG_SYS_FMAN_V3
+   set_fman_icids(fman_icid_tbl, fman_icid_tbl_sz);
+#endif
 }
 
 int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids)
@@ -75,6 +93,66 @@ int fdt_fixup_icid_tbl(void *blob, int smmu_ph,
return 0;
 }
 
+#ifdef CONFIG_SYS_FMAN_V3
+int get_fman_port_icid(int port_id, struct fman_icid_id_table *tbl,
+  const int size)
+{
+   int i;
+
+   for (i = 0; i < size; i++) {
+   if (tbl[i].port_id == port_id)
+   return tbl[i].icid;
+   }
+
+   return -1;
+}
+
+void fdt_fixup_fman_port_icid_by_compat(void *blob, int smmu_ph,
+   const char *compat)
+{
+   int noff, len, icid;
+   const u32 *prop;
+
+   noff = fdt_node_offset_by_compatible(blob, -1, compat);
+   while (noff > 0) {
+   prop = fdt_getprop(blob, noff, "cell-index", );
+   if (!prop) {
+   printf("WARNING missing cell-index for fman port\n");
+   continue;
+   }
+   if (len != 4) {
+   printf("WARNING bad cell-index size for fman port\n");
+   continue;
+   }
+
+   icid = get_fman_port_icid(fdt32_to_cpu(*prop),
+ fman_icid_tbl, fman_icid_tbl_sz);
+   if (icid < 0) {
+   printf("WARNING unknown ICID for fman port %d\n",
+  *prop);
+   continue;
+   }
+
+   fdt_set_iommu_prop(blob, noff, smmu_ph, (u32 *), 1);
+
+   noff = fdt_node_offset_by_compatible(blob, noff, compat);
+   }
+}
+
+void fdt_fixup_fman_icids(void *blob, int smmu_ph)
+{
+   static const char * const compats[] = {
+   "fsl,fman-v3-port-oh",
+   "fsl,fman-v3-port-rx",
+   "fsl,fman-v3-port-tx",
+   };
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(compats); i++)
+   fdt_fixup_fman_port_icid_by_compat(blob, smmu_ph, compats[i]);
+}
+#endif
+
 int fdt_get_smmu_phandle(void *blob)
 {
int noff, smmu_ph;
@@ -107,4 +185,8 @@ void fdt_fixup_icid(void *blob)
return;
 
fdt_fixup_icid_tbl(blob, smmu_ph, icid_tbl, icid_tbl_sz);
+
+#ifdef CONFIG_SYS_FMAN_V3
+   fdt_fixup_fman_icids(blob, smmu_ph);
+#endif
 }
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 80e1ceadc0..30c7d8d28a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -43,3 +43,33 @@ struct icid_id_table icid_tbl[] = {
 };
 
 int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+struct fman_icid_id_table fman_icid_tbl[] = {
+   /* port id, icid */
+   SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x03, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x04, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x05, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x06, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x07, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x08, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x09, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x0a, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x0b, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x0c, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x0d, FSL_DPAA1_STREAM_ID_END),
+   SET_FMAN_ICID_ENTRY(0x28, FSL_DPAA1_STREAM_ID_END),
+   

[U-Boot] [PATCH v4 8/8] armv8: ls1046a: setup SEC ICIDs and fix up device tree

[laurentiu . tudor]

From: Laurentiu Tudor 

Add support for SEC ICID configuration and apply it for ls1046a.
Also add code to make the necessary device tree fixups.
Also included in this patch, while adding the new required JR
defines sanitize the preexisting ones by dropping the CONFIG_
prefixes.

Signed-off-by: Laurentiu Tudor 
---
 .../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 15 
 .../asm/arch-fsl-layerscape/fsl_icid.h| 24 +++
 .../asm/arch-fsl-layerscape/immap_lsch2.h | 11 ++---
 drivers/crypto/fsl/jr.c   |  2 +-
 scripts/config_whitelist.txt  |  2 --
 5 files changed, 48 insertions(+), 6 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 30c7d8d28a..84f7665929 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
 struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
@@ -40,6 +41,20 @@ struct icid_id_table icid_tbl[] = {
SET_EDMA_ICID(FSL_EDMA_STREAM_ID),
SET_ETR_ICID(FSL_ETR_STREAM_ID),
SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
+#ifdef CONFIG_FSL_CAAM
+   SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_JR_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_RTIC_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_RTIC_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_RTIC_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_RTIC_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_DECO_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_DECO_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 2),
+   SET_SEC_DECO_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 2),
+#endif
 };
 
 int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h 
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
index 5be50a17ab..bd613219b6 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
@@ -82,6 +82,30 @@ void fdt_fixup_icid(void *blob);
 #define SET_FMAN_ICID_ENTRY(_port_id, streamid) \
{ .port_id = (_port_id), .icid = (streamid) }
 
+#define SET_SEC_QI_ICID(streamid) \
+   SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
+   (((streamid) << 16) | (streamid)), \
+   offsetof(struct ccsr_sec, qilcr_ls) + \
+   CONFIG_SYS_FSL_SEC_ADDR, \
+   CONFIG_SYS_FSL_SEC_ADDR)
+
+#define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \
+   SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \
+   (((streamid) << 16) | (streamid)), \
+   offsetof(struct ccsr_sec, jrliodnr[jr_num].ls) + \
+   CONFIG_SYS_FSL_SEC_ADDR, \
+   FSL_SEC_JR##jr_num##_BASE_ADDR)
+
+#define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \
+   SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
+   offsetof(struct ccsr_sec, decoliodnr[deco_num].ls) + \
+   CONFIG_SYS_FSL_SEC_ADDR, 0)
+
+#define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \
+   SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
+   offsetof(struct ccsr_sec, rticliodnr[rtic_num].ls) + \
+   CONFIG_SYS_FSL_SEC_ADDR, 0)
+
 extern struct icid_id_table icid_tbl[];
 extern struct fman_icid_id_table fman_icid_tbl[];
 extern int icid_tbl_sz;
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index d22ec70aa5..0dd09a5d81 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -199,11 +199,16 @@ struct sys_info {
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET)
 
 #define CONFIG_SYS_FSL_SEC_OFFSET  0x70ull
-#define CONFIG_SYS_FSL_JR0_OFFSET  0x71ull
+#define FSL_SEC_JR0_OFFSET 0x71ull
+#define FSL_SEC_JR1_OFFSET 0x72ull
+#define FSL_SEC_JR2_OFFSET 0x73ull
+#define FSL_SEC_JR3_OFFSET 0x74ull
 #define CONFIG_SYS_FSL_SEC_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
-#define CONFIG_SYS_FSL_JR0_ADDR \
-   (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET)
+#define FSL_SEC_JR0_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR0_OFFSET)
+#define FSL_SEC_JR1_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR1_OFFSET)
+#define FSL_SEC_JR2_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR2_OFFSET)
+#define FSL_SEC_JR3_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR3_OFFSET)
 
 

[U-Boot] [PATCH v4 1/8] armv8: fsl-layerscape: add missing register blocks base address defines

[laurentiu . tudor]

From: Laurentiu Tudor 

Add defines for the edma and qdma register block base addresses.

Signed-off-by: Laurentiu Tudor 
---
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 5b4767e0fe..644a16dd30 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -88,8 +88,12 @@
 
 #define LPUART_BASE(CONFIG_SYS_IMMR + 0x0195)
 
+#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x01c0)
+
 #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x0220)
 
+#define QDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x0738)
+
 #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x40ULL
 #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x48ULL
 #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x50ULL
-- 
2.17.1

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[U-Boot] [PATCH v4 2/8] armv8: ls1046a: advertise QMan v3 in configuration

[laurentiu . tudor]

From: Laurentiu Tudor 

The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.

Signed-off-by: Laurentiu Tudor 
---
 arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 23faffd9fc..8a05148136 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -257,6 +257,7 @@
 
 #elif defined(CONFIG_ARCH_LS1046A)
 #define CONFIG_SYS_FMAN_V3
+#define CONFIG_SYS_FSL_QMAN_V3
 #define CONFIG_SYS_NUM_FMAN1
 #define CONFIG_SYS_NUM_FM1_DTSEC   8
 #define CONFIG_SYS_NUM_FM1_10GEC   2
-- 
2.17.1

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[U-Boot] [PATCH v4 0/8] LS1046A SMMU enabling patches

[laurentiu . tudor]

From: Laurentiu Tudor 

This patch series adds the required devices setup and device tree
fixups for SMMU enablement on LS1046A chips. The approach taken tries
to mimic the implementation of PAMU LIODN setup on booke powerpc.

First 4 patches contain some fixes and add some missing bits & pieces.
Last 3 patches add the actual infrastructure for ICID setup, qman
portal and fman ICID configuration.

Changes in v4:
 - added missing SEC ICID config
 - updated macro params to match arguments
 - supplemental comments

Changes in v3:
 - cleaner QMAN_BAR setup
 - moved SoC specific bits from generic ICID arch setup to board code

Changes in v2:
 - drop CONFIG_SYS_ prefix from newly introduced defines in patch [1/7]

Laurentiu Tudor (8):
  armv8: fsl-layerscape: add missing register blocks base address
defines
  armv8: ls1046a: advertise QMan v3 in configuration
  misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
  armv8: fsl-layerscape: add missing debug stream ID
  armv8: ls1046a: initial icid setup support
  armv8: ls1046a: add icid setup for qman portals
  armv8: ls1046a: setup fman ports ICIDs and device tree
  armv8: ls1046a: setup SEC ICIDs and fix up device tree

 arch/arm/cpu/armv8/fsl-layerscape/Makefile|   1 +
 arch/arm/cpu/armv8/fsl-layerscape/icid.c  | 192 ++
 .../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c |  90 
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   |   3 +
 .../include/asm/arch-fsl-layerscape/config.h  |   1 +
 .../asm/arch-fsl-layerscape/fsl_icid.h| 114 +++
 .../asm/arch-fsl-layerscape/fsl_portals.h |  24 +++
 .../asm/arch-fsl-layerscape/immap_lsch2.h |  18 +-
 .../asm/arch-fsl-layerscape/stream_id_lsch2.h |   1 +
 board/freescale/ls1046aqds/ls1046aqds.c   |   2 +
 board/freescale/ls1046ardb/ls1046ardb.c   |   3 +
 drivers/crypto/fsl/jr.c   |   2 +-
 drivers/misc/fsl_portals.c|  45 +++-
 scripts/config_whitelist.txt  |   2 -
 14 files changed, 480 insertions(+), 18 deletions(-)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/icid.c
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h

-- 
2.17.1

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Re: [U-Boot] [RFC PATCH 0/4] arm: zynq: implement FPGA load from SPL

[Michal Simek]

Hi,

On 20.7.2018 18:17, Luis Araneda wrote:
> Hi Michal,
> 
> On Fri, Jul 20, 2018 at 6:38 AM Michal Simek  wrote:
>> On 20.7.2018 01:37, Luis Araneda wrote:
>>> Hi Michal,
>>>
>>> On Thu, Jul 19, 2018 at 2:23 AM Michal Simek  
>>> wrote:
>> We need that functionality first but then enable it for all boards is
>> fine for me and via one patch.
> 
> Ok
> 
>> Can you please be more specific what time1/time2 and time3 means?
> 
> The exact location of time 1/2/3 are on the attached diff file, and
> they are placed within the spl_load_simple_fit() function.
> They represent, roughly:
> - time1: Time to load the the FIT image
> - time2: Time to extract (and decompress)
>   the FPGA image from the FIT image
> - time3: Time to program the FPGA

Sorry I missed that attachment.

First of all I have sent patch for that gzip.

On zc706 with 13MB bitstream size this looks much better.

file size (bytes) time1 time2 time3
uncompressed  138696132533  2694  4422
compressed -9   599149144   765   2491

This is SD boot mode and initial time depends on SD you use.

Thanks,
Michal
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Re: [U-Boot] [PATCH] ARM: mx6ul: Apply ERR011115 errata workaround

[Marcin Niestroj]

Hi Stefano,

On 23.07.2018 10:09, Stefano Babic wrote:

Hi Marcin,

On 19/07/2018 13:37, Marcin Niestroj wrote:

ERR05 in IMX6UL errata says to use OCRAM memory above
0x908000 (instead of 0x907000) for silicon revision 1.2 shipped
prior date code 1740.

As we cannot check affected targets in runtime, apply that
workaround by default for all IMX6UL platforms. Leave possibility
to disable that workaround for non-affected targets, so more OCRAM
area can be used by SPL (e.g. for featureful SPL images).




I had a project with this issue - anyway, I disagree to apply the
work-around for all MX6UL.

Rather, we have no possibilities to detect and solve this at runtime.
SPL is already loaded. But NXP has already fixed this in later
production. Companies already know if there production is affected or
not, and they can enable MX6UL_ERR05 for their products.


I am not sure companies know about affected chips. We already know (you
and me) that such issue exists, because we've already run into it.
Unfortunately it took time to figure out what was the real reason of
non-functional device. Our client has manufactured devices (prototypes,
but still...) with affected chips in last two weeks, so in my opinion it
is easy to run into problems. So the idea of this patch was to prevent
that in future for all i.MX6UL boards.

In my opinion it is easier to figure out that ERR05 workaround
can be disabled (after verifying that we do not use affected chips)
instead of figuring out why we have non-functional device (because we
were not aware of ERR05 issue).



We are already fighting with the OCRAM size, specially if other features
(HAB and secure boot, further filesystems) are enabled. Reducing size is
ok for some products (they cannot do in other way if they have some of
these broken devices), it is not ok for other ones.

I will propose to not set it as default for MX6UL.


Signed-off-by: Marcin Niestroj 
---
  arch/arm/mach-imx/mx6/Kconfig |  9 +
  include/configs/imx6_spl.h| 11 +--
  2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 521fad74b5..61708a0526 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -58,6 +58,15 @@ config MX6UL
select SYSCOUNTER_TIMER
bool
  
+config MX6UL_ERR05

+   bool "Workaround for ERR05 in IMX6UL Errata"
+   depends on MX6UL
+   default MX6UL
+   help
+ Say N here if you are sure that your platform is not affected
+ with ERR05. Doing so might be useful in case of featureful
+ (big) SPL images.


Boards Maintainer should decide themselves instead of setting this as
default.


As written above, I do not think that board maintainer is usually
the person that knows which chip revision will be used in production.




+
  config MX6UL_LITESOM
bool
select MX6UL
diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
index 720ff045a7..42d12c7503 100644
--- a/include/configs/imx6_spl.h
+++ b/include/configs/imx6_spl.h
@@ -19,16 +19,23 @@
   *which consists of a 4K header in front of us that contains the IVT, DCD
   *and some padding thus 'our' max size is really 0x00908000 - 0x00918000
   *or 64KB
+ *  - Use 0x00909000 as start of OCRAM Free Area as a workaround for
+ *ERR05 in IMX6UL Errata
   */
+#ifdef CONFIG_MX6UL_ERR05
+#define CONFIG_SPL_TEXT_BASE   0x00909000
+#else
  #define CONFIG_SPL_TEXT_BASE  0x00908000
-#define CONFIG_SPL_MAX_SIZE0x1
+#endif
+
+#define CONFIG_SPL_MAX_SIZE(0x00918000 - CONFIG_SPL_TEXT_BASE)


Sebastian has already reported that this is wrong. Anyway, even if this
was correct, it would be another issue and should be fixed in a separate
patch. The issue in the commit messsage is fixed just moving
CONFIG_MX6UL_ERR05.


Sebastian reported CONFIG_SPL_PAD_TO to be wrong and I agree with that.
However CONFIG_SPL_MAX_SIZE in my opinion should be set as I proposed.
It is only used in linker scripts, mainly to check that we fit our code
within maximum SPL size.

Regards,
Marcin




  #define CONFIG_SPL_STACK  0x0091FFB8
  /*
   * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
   * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
   * boot media (given that boot media specific offset is configured properly).
   */
-#define CONFIG_SPL_PAD_TO  0x11000
+#define CONFIG_SPL_PAD_TO  (CONFIG_SPL_MAX_SIZE + 0x1000)
  
  /* MMC support */

  #if defined(CONFIG_SPL_MMC_SUPPORT)



Best regards,
Stefano Babic



--
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[U-Boot] [PATCH] spl: fit: Enable GZIP compression also for no kernel partitions

[Michal Simek]

There is no reason to limit gzip usage only for OS_BOOT and kernel image
type.

Signed-off-by: Michal Simek 
---

 common/spl/spl_fit.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 9eabb1c1058b..dbf5ac33a845 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -257,10 +257,7 @@ static int spl_load_fit_image(struct spl_load_info *info, 
ulong sector,
board_fit_image_post_process(, );
 #endif
 
-   if (IS_ENABLED(CONFIG_SPL_OS_BOOT)  &&
-   IS_ENABLED(CONFIG_SPL_GZIP) &&
-   image_comp == IH_COMP_GZIP  &&
-   type == IH_TYPE_KERNEL) {
+   if (IS_ENABLED(CONFIG_SPL_GZIP) && image_comp == IH_COMP_GZIP) {
size = length;
if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
   src, )) {
-- 
1.9.1

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Re: [U-Boot] [PATCH] ddr: altera: Add ECC DRAM scrubbing support for Stratix 10

[Marek Vasut]

On 07/24/2018 10:10 AM, Chee, Tien Fong wrote:
> On Mon, 2018-07-23 at 11:46 +0200, Marek Vasut wrote:
>> On 07/23/2018 10:20 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee 
>>>
>>> The SDRAM must first be rewritten by zeroes if ECC is used to
>>> initialize
>>> the ECC metadata. Make the CPU overwrite the DRAM with zeroes in
>>> such a
>>> case. This scrubbing implementation turns the caches on
>>> temporarily, then
>>> overwrites the whole RAM with zeroes, flushes the caches and turns
>>> them
>>> off again. This provides satisfactory performance.
>>>
>>> Signed-off-by: Tien Fong Chee 
>>> ---
>>>  drivers/ddr/altera/sdram_s10.c |   44
>>> 
>>>  1 files changed, 44 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/drivers/ddr/altera/sdram_s10.c
>>> b/drivers/ddr/altera/sdram_s10.c
>>> index 48f4f47..cce261f 100644
>>> --- a/drivers/ddr/altera/sdram_s10.c
>>> +++ b/drivers/ddr/altera/sdram_s10.c
>>> @@ -8,6 +8,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>> @@ -134,6 +135,47 @@ static int poll_hmc_clock_status(void)
>>>      SYSMGR_HMC_CLK_STATUS_MSK, true,
>>> 1000, false);
>>>  }
>>>  
>>> +/* Initialize SDRAM ECC bits to avoid false DBE */
>>> +static void sdram_init_ecc_bits(unsigned long long size)
>>> +{
>>> +   /* 1GB per chunk */
>>> +   unsigned long long size_byte = SZ_1G;
>>> +   unsigned long long remaining_size;
>>> +   unsigned long long dst_addr = 0x8000;
>>> +   unsigned int start = get_timer(0);
>>> +
>>> +   icache_enable();
>>> +
>>> +   memset(0, 0, dst_addr);
>>> +   gd->arch.tlb_addr = 0x4000;
>>> +   gd->arch.tlb_size = PGTABLE_SIZE;
>> Are you sure this is valid on arm64 ? It looks like something copies
>> from arria10.
> The cache on/off is copied from your implementation on Arria 10. Yes, i
> have tested it, it is working on Stratix 10 board.

Right, except S10 is arm64, A10 is arm32, which is why I wonder whether
careless copying is enough.

>>>
>>> +   dcache_enable();
>>> +
>>> +   remaining_size = size - dst_addr;
>>> +   printf("DDRCAL: Scrubbing ECC RAM (%d MiB).\n", (u32)(size
> 20));
>>> +
>>> +   while (remaining_size) {
>>> +   if (remaining_size <= size_byte) {
>>> +   memset((void *)dst_addr, 0,
>>> remaining_size);
>>> +   break;
>>> +   } else {
>>> +   memset((void *)dst_addr, 0, size_byte);
>>> +   dst_addr += size_byte;
>>> +   }
>>> +
>>> +   WATCHDOG_RESET();
>>> +   remaining_size -= size_byte;
>>> +   }
>> How long does this take ?
> 1359ms for 2GB.

So why do you need this watchdog reset hack ?

> But I have no idea why Arria 10 board can't achieve the
> same result. Could you try again on your Arria 10 ES board?

There's nothing to try, the scrubbing works fine on A10.

>>>
>>> +   flush_dcache_all();
>>> +   printf("DDRCAL: Scrubbing ECC RAM done.\n");
>>> +   dcache_disable();
>>> +
>>> +   printf("SDRAM-ECC: Initialized success with %d ms\n",
>>> +   (unsigned)get_timer(start));
>>> +}
>>> +
>>>  /**
>>>   * sdram_mmr_init_full() - Function to initialize SDRAM MMR
>>>   *
>>> @@ -351,6 +393,8 @@ int sdram_mmr_init_full(unsigned int unused)
>>>     setbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL2,
>>>      (DDR_HMC_ECCCTL2_RMW_EN_SET_MSK |
>>>       DDR_HMC_ECCCTL2_AWB_EN_SET_MSK));
>>> +
>>> +   sdram_init_ecc_bits(gd->ram_size);
>>>     } else {
>>>     clrbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL1,
>>>      (DDR_HMC_ECCCTL_AWB_CNT_RST_SET_MSK |
>>>


-- 
Best regards,
Marek Vasut
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Re: [U-Boot] ext4: massive corruption with ext4write

[Marek Vasut]

On 07/24/2018 08:25 AM, Aaron Williams wrote:
> On Monday, July 23, 2018 11:15:59 PM PDT Aaron Williams wrote:
>> External Email
>>
>> Hi all,
>>
>> It looks like after a certain amount of data has been written that all hell
>> breaks loose with the ext4 filesystem.
>>
>> In my case, I have the following files on a 64G USB thumb drive with two
>> partitions, a small FAT partition with the rest of the space dedicated to
>> ext4
>  created using mkfs.ext4 /dev/sdg2
>>
>> total 477632
>> -rwxr-xr-x 1 root root 152777216 Jul 23 18:11 Image
>> drwx-- 2 root root 16384 Jul 23 18:10 lost+found
>> -rwxr-xr-x 1 root root  90706976 Dec 31  1969 test.64
>> -rwxr-xr-x 1 root root 152777216 Dec 31  1969 test.img
>> -rwxr-xr-x 1 root root50 Dec 31  1969 test.txt
>> -rwxr-xr-x 1 root root   1841408 Jul 23 18:12 u-boot-octeon_ebb7304.bin
>> -rwxr-xr-x 1 root root  90706976 Jul 23 18:11 vmlinux.64
>>
>> Everything is fine until I wrote the file test.64, which is basically a
>> copy
>  of vmlinux.64.
>>
>> The first few files were written using my host Linux system, namely Image,
>> u-
>  boot-octeon_ebb7304.bin and vmlinux.64.
>>
>> From within U-Boot I performed the following commands:
>>
>> # ext4load usb 0:2 $loadaddr Image
>> # ext4write usb 0:2 $fileaddr /test.img $filesize
>> # tftpboot $loadaddr test.txt
>> # ext4write usb 0:2 $fileaddr /test.txt $filesize
>> # ext4load usb 0:2 $loadaddr vmlinux.64
>> # ext4write usb 0:2 $fileaddr /test.64 $filesize
>>
>> Everything is fine on the drive until I write test.64. At this point, I get
>> a
>  huge list of errors:
>>
>> # fsck.ext4 -v -n /dev/sdg2
>> e2fsck 1.42.11 (09-Jul-2014)
>> Group descriptor 0 has invalid unused inodes count 57374.  Fix? no
>>
>> /dev/sdg2 contains a file system with errors, check forced.
>> Pass 1: Checking inodes, blocks, and sizes
>> Deleted inode 130913 has zero dtime.  Fix? no
>>
>> Inode 130915 is in use, but has dtime set.  Fix? no
>>
>> Inode 130915 has imagic flag set.  Clear? no
>>
>> Inode 130915 has a extra size (8223) which is invalid
>> Fix? no
>>
>> Inode 130916 is in use, but has dtime set.  Fix? no
>>
>> Inode 130916 has imagic flag set.  Clear? no
>>
>> Inode 130916 has a extra size (8223) which is invalid
>> Fix? no
>>
>> ...
>> Illegal block #11 (2435760161) in inode 131070.  IGNORED.
>> Illegal indirect block (4026556192) in inode 131070.  IGNORED.
>> Illegal double indirect block (2433138721) in inode 131070.  IGNORED.
>> Illegal triple indirect block (2434195456) in inode 131070.  IGNORED.
>> Error while iterating over blocks in inode 131070: Illegal triply indirect
>> block found
>>
>>
>> and many many more errors.
>>
>> Note that I am using the very latest ext4 code from the master branch. 
>> This
>  is not a USB problem because I can reproduce this problem with an SD
>> card. This problem also occurs on two different platforms, one being
>> aarch64 little endian and the other being MIPS64 big endian.  The
>> filesystem code is identical since the latest code has been backported to
>> our older MIPS bootloader.
>>
>> My guess is that all hell is breaking loose when a file spans multiple
>> block
>  groups.
>>
>> -Aaron Williams
>>
>> On Thursday, July 19, 2018 7:35:46 PM PDT Aaron Williams wrote:
>>
>>>
>>>
>>> Hi all,
>>>
>>>
>>>
>>> I am sometimes seeing issues when using ext4write where fsck later
>>> complains
>>
>>  that the group descriptor has an invalid number of unused
>>
>>> inodes. Is this a known problem?
>>>
>>>
>>>
>>> Also, I think the assert(offset == sizeof(*desc)); in
>>> ext4fs_checksum_update()
>>
>>  is invalid since with ext4 the descriptor is
>>
>>> larger than the offset. When debugging was enabled I'd always hit this
>>> assert.
>>>
>>>
>>>
>>> Also, in ext4fs_write, the debug statement should say blocks and not
>>> bytes.
>>
>>>
>>>
>>> -Aaron
>>>
>>>
>>>
>>> --
>>> Aaron Williams
>>> Senior Software Engineer
>>> Cavium, Inc.
>>> (408) 943-7198  (510) 789-8988 (cell)
>>> ___
>>> U-Boot mailing list
>>> U-Boot@lists.denx.de
>>> https://lists.denx.de/listinfo/u-boot
>>
>>
>> --
>> Aaron Williams
>> Senior Software Engineer
>> Cavium, Inc.
>> (408) 943-7198  (510) 789-8988 (cell)
>> ___
>> U-Boot mailing list
>> U-Boot@lists.denx.de
>> https://lists.denx.de/listinfo/u-boot
> 
> Here is the output after the write operation from fsck.ext4 -v /dev/sdg2
> 
> fsck.ext4 -v  /dev/sdg2
> e2fsck 1.42.11 (09-Jul-2014)
> Group descriptor 0 has invalid unused inodes count 57374.  Fix? yes
> Pass 1: Checking inodes, blocks, and sizes
> 
> Running additional passes to resolve blocks claimed by more than one inode...
> Pass 1B: Rescanning for multiply-claimed blocks
> Multiply-claimed block(s) in inode 7: 98307 98308 98309 98310 98311 98312 
> 98313 98314 98315 98316 98317 98318 98319 98320 98321 98322 98323 98324 98325 
> 98326 98327 98328 98329 98330 98331 98332 98333 98334 98335 98336 98337 98338 
> 98339 

Re: [U-Boot] [UBOOT PATCH] Kconfig: Move config SYS_MALLOC_LEN to Kconfig for zynq

[Michal Simek]

On 20.7.2018 11:41, Vipul Kumar wrote:
> From: Siva Durga Prasad Paladugu 
> 
> This patch moves the the config SYS_MALLOC_LEN to
> Kconfig. It will be just for Zynq arch and to do
> will be for all other archs.
> 
> Signed-off-by: Siva Durga Prasad Paladugu 
> Signed-off-by: Vipul Kumar 
> ---
>  Kconfig | 7 +++
>  arch/arm/mach-zynq/Kconfig  | 3 +++
>  configs/zynq_cse_nand_defconfig | 1 +
>  configs/zynq_cse_nor_defconfig  | 1 +
>  configs/zynq_cse_qspi_defconfig | 1 +
>  include/configs/zynq-common.h   | 2 --
>  include/configs/zynq_cse.h  | 3 ---
>  7 files changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/Kconfig b/Kconfig
> index c8b86cd..61795e3 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -136,6 +136,13 @@ config SYS_MALLOC_F_LEN
> particular needs this to operate, so that it can allocate the
> initial serial device and any others that are needed.
>  
> +config SYS_MALLOC_LEN
> + hex "Define memory for Dynamic allocation"
> + depends on ARCH_ZYNQ
> + help
> +   This defines memory to be allocated for Dynamic allocation
> +   TODO: Use for other architectures
> +
>  config SPL_SYS_MALLOC_F_LEN
>  hex "Size of malloc() pool in SPL before relocation"
>  depends on SYS_MALLOC_F
> diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
> index 1352359..a599ed6 100644
> --- a/arch/arm/mach-zynq/Kconfig
> +++ b/arch/arm/mach-zynq/Kconfig
> @@ -57,6 +57,9 @@ config SYS_CONFIG_NAME
>  config SYS_MALLOC_F_LEN
>   default 0x600
>  
> +config SYS_MALLOC_LEN
> + default 0x140
> +
>  config BOOT_INIT_FILE
>   string "boot.bin init register filename"
>   default ""
> diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
> index eb7e574..d228f9a 100644
> --- a/configs/zynq_cse_nand_defconfig
> +++ b/configs/zynq_cse_nand_defconfig
> @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x10
>  CONFIG_ENV_SIZE=0x190
>  CONFIG_SPL=y
>  CONFIG_SPL_STACK_R_ADDR=0x20
> +CONFIG_SYS_MALLOC_LEN=0x1000
>  CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand"
>  # CONFIG_DISPLAY_CPUINFO is not set
>  CONFIG_SPL_STACK_R=y
> diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
> index 95b31a0..3052c5b 100644
> --- a/configs/zynq_cse_nor_defconfig
> +++ b/configs/zynq_cse_nor_defconfig
> @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0xFFFC
>  CONFIG_ENV_SIZE=0x190
>  CONFIG_SPL=y
>  CONFIG_SPL_STACK_R_ADDR=0x20
> +CONFIG_SYS_MALLOC_LEN=0x1000
>  CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor"
>  CONFIG_BOOTDELAY=-1
>  # CONFIG_DISPLAY_CPUINFO is not set
> diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
> index c094a5e..2410806 100644
> --- a/configs/zynq_cse_qspi_defconfig
> +++ b/configs/zynq_cse_qspi_defconfig
> @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0x0
>  CONFIG_DEBUG_UART_CLOCK=0
>  CONFIG_SPL_STACK_R_ADDR=0x20
>  # CONFIG_ZYNQ_DDRC_INIT is not set
> +CONFIG_SYS_MALLOC_LEN=0x1000
>  # CONFIG_CMD_ZYNQ is not set
>  CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
>  CONFIG_DEBUG_UART=y
> diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
> index c41dc2c..3c2987b 100644
> --- a/include/configs/zynq-common.h
> +++ b/include/configs/zynq-common.h
> @@ -236,8 +236,6 @@
>  #define CONFIG_SYS_MEMTEST_START 0
>  #define CONFIG_SYS_MEMTEST_END   0x1000
>  
> -#define CONFIG_SYS_MALLOC_LEN0x140
> -
>  #define CONFIG_SYS_INIT_RAM_ADDR 0x
>  #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
>  #define CONFIG_SYS_INIT_SP_ADDR  (CONFIG_SYS_INIT_RAM_ADDR + \
> diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h
> index 36fbe0e..c4587a1 100644
> --- a/include/configs/zynq_cse.h
> +++ b/include/configs/zynq_cse.h
> @@ -36,7 +36,4 @@
>  #define CONFIG_SPL_BSS_START_ADDR0x2
>  #define CONFIG_SPL_BSS_MAX_SIZE  0x8000
>  
> -#undef CONFIG_SYS_MALLOC_LEN
> -#define CONFIG_SYS_MALLOC_LEN0x1000
> -
>  #endif /* __CONFIG_ZYNQ_CSE_H */
> 

Applied.
M
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[U-Boot] [PATCH] kconfig: Replace spaces with tabs

[Michal Simek]

Trivial Kconfig cleanup. Use tabs instead of spaces.

Signed-off-by: Michal Simek 
---

 Kconfig | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/Kconfig b/Kconfig
index cb953144c9da..db0f545e459b 100644
--- a/Kconfig
+++ b/Kconfig
@@ -144,24 +144,24 @@ config SYS_MALLOC_LEN
  TODO: Use for other architectures
 
 config SPL_SYS_MALLOC_F_LEN
-hex "Size of malloc() pool in SPL before relocation"
-depends on SYS_MALLOC_F
-default SYS_MALLOC_F_LEN
-help
-  Before relocation, memory is very limited on many platforms. Still,
-  we can provide a small malloc() pool if needed. Driver model in
-  particular needs this to operate, so that it can allocate the
-  initial serial device and any others that are needed.
+   hex "Size of malloc() pool in SPL before relocation"
+   depends on SYS_MALLOC_F
+   default SYS_MALLOC_F_LEN
+   help
+ Before relocation, memory is very limited on many platforms. Still,
+ we can provide a small malloc() pool if needed. Driver model in
+ particular needs this to operate, so that it can allocate the
+ initial serial device and any others that are needed.
 
 config TPL_SYS_MALLOC_F_LEN
-hex "Size of malloc() pool in TPL before relocation"
-depends on SYS_MALLOC_F
-default SYS_MALLOC_F_LEN
-help
-  Before relocation, memory is very limited on many platforms. Still,
-  we can provide a small malloc() pool if needed. Driver model in
-  particular needs this to operate, so that it can allocate the
-  initial serial device and any others that are needed.
+   hex "Size of malloc() pool in TPL before relocation"
+   depends on SYS_MALLOC_F
+   default SYS_MALLOC_F_LEN
+   help
+ Before relocation, memory is very limited on many platforms. Still,
+ we can provide a small malloc() pool if needed. Driver model in
+ particular needs this to operate, so that it can allocate the
+ initial serial device and any others that are needed.
 
 menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
-- 
1.9.1

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Re: [U-Boot] [PATCH v2] arm: zynq: add support for the zybo z7 board

[Michal Simek]

On 24.7.2018 08:10, Luis Araneda wrote:
> The board is manufactured by Digilent
> Main features:
> - Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
> - RAM: 1 GB DDR3L
> - FLASH: 16 MB QSPI
> - 1 Gbps Ethernet
> - USB 2.0
> - microSD slot
> - Pcam camera connector
> - HDMI Tx and Rx
> - Audio codec: stereo out, stereo in, mic
> - 5 (Z7-10) or 6 (Z7-20) Pmod ports
> - 6 push-buttons, 4 switches, 5 LEDs
> - 1 (Z7-10) or 2 (Z7-20) RGB LEDs
> 
> Signed-off-by: Luis Araneda 
> ---
> 
> This patch adds support for the Digilent Zybo Z7 board
> 
> The only thing that I tested and is not working yet, is reading the
> MAC address from the OTP region of the SPI flash memory, but I'm trying
> to find a solution
> 
> Changes from v1:
> - Rebased on u-boot/master
> - Removed comments and indented ps7_init_gpl.c
> - Removed CONFIG_DISPLAY from defconfig
> - Replaced the cadence I2C driver by zynq_i2c
> - Squashed the patches as they are less than 100kB now
> ---
>  arch/arm/dts/Makefile |   3 +-
>  arch/arm/dts/zynq-zybo-z7.dts |  81 ++
>  board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c | 809 ++
>  configs/zynq_zybo_z7_defconfig|  68 ++
>  4 files changed, 960 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/zynq-zybo-z7.dts
>  create mode 100644 board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
>  create mode 100644 configs/zynq_zybo_z7_defconfig
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 09adf5eab1..07d8729104 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -149,7 +149,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>   zynq-zc770-xm013.dtb \
>   zynq-zed.dtb \
>   zynq-zturn.dtb \
> - zynq-zybo.dtb
> + zynq-zybo.dtb \
> + zynq-zybo-z7.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += \
>   zynqmp-mini-emmc0.dtb   \
>   zynqmp-mini-emmc1.dtb   \
> diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts
> new file mode 100644
> index 00..3f8a3bfa0f
> --- /dev/null
> +++ b/arch/arm/dts/zynq-zybo-z7.dts
> @@ -0,0 +1,81 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + *  Copyright (C) 2011 - 2015 Xilinx
> + *  Copyright (C) 2012 National Instruments Corp.
> + */
> +/dts-v1/;
> +#include "zynq-7000.dtsi"
> +#include 
> +
> +/ {
> + model = "Digilent Zybo Z7 board";
> + compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
> +
> + aliases {
> + ethernet0 = 
> + serial0 = 
> + spi0 = 
> + mmc0 = 
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x4000>;
> + };
> +
> + chosen {
> + bootargs = "";
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio-leds {
> + compatible = "gpio-leds";
> +
> + ld4 {
> + label = "zynq-zybo-z7:green:ld4";
> + gpios = < 7 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + usb_phy0: phy0 {
> + #phy-cells = <0>;
> + compatible = "usb-nop-xceiv";
> + reset-gpios = < 46 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> + {
> + ps-clk-frequency = <>;
> +};
> +
> + {
> + status = "okay";
> + phy-mode = "rgmii-id";
> + phy-handle = <_phy>;
> +
> + ethernet_phy: ethernet-phy@0 {
> + reg = <0>;
> + device_type = "ethernet-phy";
> + };
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> + status = "okay";
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> + status = "okay";
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> + dr_mode = "host";
> + usb-phy = <_phy0>;
> +};
> diff --git a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c 
> b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
> new file mode 100644
> index 00..5da4941338
> --- /dev/null
> +++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
> @@ -0,0 +1,809 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
> + *
> + * Procedure to generate this file (using Vivado Webpack 2018.2):
> + * + Install board files from digilent/vivado-boards repository
> + *   (commit 6a45981 from 2018-06-05)
> + * + Start Vivado and create a new RTL project with the Zybo-z7-20 board
> + * + Create a block design
> + *   - Add "ZYNQ7 Processing System" IP
> + *   - Run "Block Automation" (Check "Apply Board Preset")
> + *   - Connect ports FCLK_CLK0 and M_AXI_GP0_ACLK
> + *   - Save diagram changes
> + *   - Go to sources view, select the block diagram,
> + * and select "Generate Output Products"
> + * + Copy the generated "ps7_init_gpl.c" file
> + * + Perform manual editions based on existing Zynq boards
> + *   and the checkpatch.pl script
> + *
> + */
> +
> +#include 
> +
> +static unsigned long ps7_pll_init_data_3_0[] = {
> + 

Re: [U-Boot] ARM: configs: omap3_logic: remove Legacy OMAP3 USB driver

[Tom Rini]

On Fri, Jul 13, 2018 at 03:27:13PM -0500, Adam Ford wrote:

> Only the MUSB driver is currently supported on the omap3_logic
> boards.  The driver is using the new-musb and not the legacy
> version, so this patch removes the dead code references.
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
> index cd8ffd5adf..ed9f454a5d 100644

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] ARM: DTS: Resync am3517-evm.dts with Linux 4.18-rc4

[Tom Rini]

On Mon, Jul 09, 2018 at 07:52:48PM -0500, Adam Ford wrote:

> Several changes have been made to the AM3517-evm and the underlying
> am3517.dtsi file.  This patch re-sync's the DTS and DTSI files with
> Linux.
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/arch/arm/dts/am3517-evm.dts b/arch/arm/dts/am3517-evm.dts
> index 0e4a125f78..98aadb0f81 100644

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [U-Boot, 1/1] bios_emulator: remove assignment without effect

[Tom Rini]

On Sun, Mar 18, 2018 at 11:01:23AM +0100, Heinrich Schuchardt wrote:

> Assigning a parameter which is not used afterwards has not effect.
> 
> Signed-off-by: Heinrich Schuchardt 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] doc: Replace DocBook with sphinx-based docs

[Tom Rini]

On Tue, Jul 10, 2018 at 08:40:17AM +0200, Mario Six wrote:

> The Linux kernel moved to sphinx-based documentation and got rid of the
> DocBook based documentation quite a while ago. Hence, the DocBook
> documentation for U-Boot should be converted as well.
> 
> To achieve this, import the necessary files from Linux v4.17, and
> convert the current DocBook documentation (three files altogether) to
> sphinx/reStructuredText.
> 
> For now, all old DocBook documentation was merged into a single
> handbook, tentatively named "U-Boot Hacker Manual".
> 
> For some source files, the documentation style was changed to comply
> with kernel-doc; no functional changes were applied.
> 
> Signed-off-by: Mario Six 

Applied to u-boot/master, thanks!

-- 
Tom


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