Re: [U-Boot] [PATCH v3 0/4] Add Rock960 and Ficus 96Board support

2018-12-05 Thread Alexander Graf


On 26.10.18 20:00, Philipp Tomsich wrote:
> 
> 
>> On 26.10.2018, at 19:17, Manivannan Sadhasivam 
>>  wrote:
>>
>> On Fri, Sep 28, 2018 at 12:32:57AM +0530, Manivannan Sadhasivam wrote:
>>> This patchset adds support for Rock960 and Ficus 96Boards from Vamrs.
>>> Since both boards share most of the configurations, a common Rock960
>>> family support is added with common support and the actual boards are
>>> based on this.
>>>
>>> The previous version of the patchseries were adding Rock960 [1] and
>>> Ficus [2] board support individually, but this series fuses them
>>> together based on the common board support as per Linux kernel.
>>>
>>> [1] https://patchwork.ozlabs.org/cover/963239/
>>> [2] https://lists.denx.de/pipermail/u-boot/2018-August/339059.html
>>>
>>> This patchseries has been tested on Rock960 v1.2 board and expecting
>>> Ezequiel to do the testing for Ficus.
>>>
>>> PS: I have explicitly removed the previous Ack's for the Ficus board
>>> since there has been a heavy modification done on these patches.
>>>
>>> Thanks,
>>> Mani
>>>
>>
>> Hi,
>>
>> Is there any update on this patchset? AFAIK everyone is happy to get
>> this merged!
> 
> It’s on pretty high up my list for the next merge window, but I didn’t get it 
> into
> the current version.

So there goes another merge window. Any progress here?

Alex
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Re: [U-Boot] [PATCH] sunxi: H6: DRAM: avoid memcpy() on MMIO registers

2018-12-05 Thread Maxime Ripard
On Thu, Dec 06, 2018 at 12:02:20AM +, Andre Przywara wrote:
> Using memcpy() for MMIO operations is, however tempting, not a good idea:
> It depends on the specific implementation of memcpy, also lacks barriers.
> In this particular case the first registers were written using 64-bit
> writes, and the last register using four separate single-byte writes.
> Neither is what we actually want.
> We get away with it in this case because of the particular details of
> the bus implementation, the DRAM controller IP and the values that we
> actually write, but we should not leave a bad example around.
> 
> Replace the memcpy with a proper loop using the writel() accessor.
> 
> Signed-off-by: Andre Przywara 
> ---
>  arch/arm/mach-sunxi/dram_sun50i_h6.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c 
> b/arch/arm/mach-sunxi/dram_sun50i_h6.c
> index 5da90a2835..e2f141eb9b 100644
> --- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
> +++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
> @@ -182,6 +182,7 @@ static void mctl_set_timing_lpddr3(struct dram_para *para)
>   (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;
>   struct sunxi_mctl_phy_reg * const mctl_phy =
>   (struct sunxi_mctl_phy_reg *)SUNXI_DRAM_PHY0_BASE;
> + int i;
>  
>   u8 tccd = 2;
>   u8 tfaw = max(ns_to_t(50), 4);
> @@ -237,8 +238,9 @@ static void mctl_set_timing_lpddr3(struct dram_para *para)
>   u8 twr2rd   = tcwl + 4 + 1 + twtr;
>   u8 trd2wr   = tcl + 4 + (tcksrea >> 1) - tcwl + 1;
>  
> - /* set mode register */
> - memcpy(mctl_phy->mr, mr_lpddr3, sizeof(mr_lpddr3));
> + /* set mode registers */
> + for (i = 0; i < ARRAY_SIZE(mr_lpddr3); i++)
> + writel(mr_lpddr3[i], &mctl_phy->mr[i]);

memcpy_toio is meant to do just that.

Maxime

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Re: [U-Boot] [PATCH 20/21] Add inttypes.h

2018-12-05 Thread Masahiro Yamada
On Sat, Nov 24, 2018 at 1:43 PM Simon Glass  wrote:
>
> Even if U-Boot does not use this, some libraries do. Add back this header
> file so that the build does not fall back to using the host version, which
> may include stdint.h and break the build due to conflicts with uint64_t,
> etc.



The root cause of the problem might be,
those libraries mix up  from U-Boot
and  from the compiler.


Linux kernel has a different  for user-space tools
in tools/include/linux/types.h



I agree that U-Boot has been screwed up here
to a hopeless level.



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Re: [U-Boot] [PATCH v2 0/7] Add USB boot to HS DRA7xx/AM57xx

2018-12-05 Thread Lokesh Vutla



On 05/12/18 11:21 PM, Andrew F. Davis wrote:

Hello all,

This series adds USB boot support to HS DRA7xx/AM57xx platforms.

We start by cleaning up DFU boot in SPL support. What is done in the
first patch for DFU, if acceptable, should be done to the other boot
modes.

The 4th patch is needed as on HS devices a header is added to the
boot image that tells the ROM where to load this image. This only
works for block device booting as the ROM can read the header and
move the image into memory in steps. For streaming boot modes USB/
UART/NET the image is placed in memory as it is received from the
media live. This means the header is ignored and the image has
a fixed offset in memory.

For AM47xx we align the boot modes by making the offset for block
device booting the same as the fixed offset for streaming boot modes,
in this way only one defconfig is needed. For DRA7xx/AM57xx the signing
tools will need to be updated to support specifying this address, when
this is done the offset in the base HS defconfig can be moved to match
the new offset and the defconfigs added here in patch 5 and 6 can be
unified back into the base HS defconfig.

The last patch updates the docs for the same above.


For the entire series:

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh



Thanks,
Andrew

Changes from v1:
  - Drop explicit UART boot support from DRA7xx as this cannot be tested

Andrew F. Davis (7):
   spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU
   dfu: Make DFU support more SPL friendly
   dfu: Remove dependency on HUSH parser in SPL
   ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry point
   defconfigs: Add config for DRA7xx High Security EVM with USB Boot
 support
   defconfigs: Add config for AM57xx High Security EVM with USB/UART Boot
 support
   doc: ti-secure: Add ULO info for AM57xx/DRA7xx secure devices from TI

  MAINTAINERS |   2 +
  arch/arm/cpu/armv8/zynqmp/spl.c |   2 +-
  arch/arm/mach-omap2/Kconfig |  13 
  arch/arm/mach-omap2/am33xx/Kconfig  |  15 
  arch/arm/mach-omap2/boot-common.c   |   2 +-
  common/Makefile |   3 +-
  common/cli.c|   2 +-
  common/spl/Kconfig  |   6 +-
  common/spl/Makefile |   2 +-
  common/spl/spl_ram.c|   4 +-
  configs/am57xx_hs_evm_usb_defconfig |  92 
  configs/dra7xx_hs_evm_usb_defconfig | 106 
  doc/README.ti-secure|   8 ++-
  drivers/Makefile|   3 +-
  drivers/dfu/Makefile|  12 ++--
  drivers/usb/gadget/Makefile |   2 +-
  include/configs/dra7xx_evm.h|   2 +-
  include/configs/ti_omap5_common.h   |   2 +-
  include/configs/xilinx_zynqmp.h |   4 +-
  include/dfu.h   |  10 +--
  20 files changed, 246 insertions(+), 46 deletions(-)
  create mode 100644 configs/am57xx_hs_evm_usb_defconfig
  create mode 100644 configs/dra7xx_hs_evm_usb_defconfig


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Re: [U-Boot] [PATCH 00/19] riscv: Adding RISC-V CPU and timer driver

2018-12-05 Thread Anup Patel
Hi Bin,

On Tue, Nov 13, 2018 at 1:47 PM Bin Meng  wrote:
>
> This adds DM drivers to support RISC-V CPU and timer.
>
> The U-Boot RISC-V SBI support is still working in progress.
> Some patches in this series like adding CSR numbers, exception
> numbers, are prerequisites for the SBI implementation, but it
> does no harm to include them as part of this series.
>
> This series is dependent on Lukas's riscv series @
> http://patchwork.ozlabs.org/project/uboot/list/?series=74999
>
> This series is available at u-boot-x86/riscv-working for testing.
>
>
> Bin Meng (18):
>   dm: cpu: Add timebase frequency to the platdata
>   riscv: qemu: Create a simple-bus driver for the soc node
>   cpu: Add a RISC-V CPU driver
>   riscv: Add a SYSCON driver for Core Local Interruptor
>   timer: Add driver for RISC-V privileged architecture defined timer
>   riscv: kconfig: Allow platform to specify Kconfig options
>   riscv: Enlarge the default SYS_MALLOC_F_LEN
>   riscv: qemu: Probe cpus during boot
>   riscv: Add CSR numbers
>   riscv: Add exception codes for xcause register
>   riscv: Do some basic architecture level cpu initialization
>   riscv: Move trap handler codes to mtrap.S
>   riscv: Fix context restore before returning from trap handler
>   riscv: Return to previous privilege level after trap handling
>   riscv: Adjust the _exit_trap() position to come before handle_trap()
>   riscv: Pass correct exception code to _exit_trap()
>   riscv: Refactor handle_trap() a little for future extension
>   riscv: Allow U-Boot to run on hart 0 only
>
> Lukas Auer (1):
>   riscv: add Kconfig entries for the code model
>

I guess you had posted this series before S-mode changes.

For your v2, please do try your patches on S-mode too.

Thanks,
Anup
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Re: [U-Boot] network not work with u-boot

2018-12-05 Thread cleanc...@163.com
Hi Wolfgang,

Thank you so much, I managed to upload the kernel image by using a tftp server 
in my desktop. 
I thought the tftp was a kind of ftp with a naming difference...

As for the configuration item ipaddr1, I still cannot delete it, I am not happy 
about that.
Do you or anyone else know how to delete this kind of ill-spelled items?
If not, I can accept it as it has no side-effect to the system, the uboot 
brings up the linux kernel every time.
However, if there is a way to delete, it would make me happier.

--
Best wishes.

Zhangguofu (Gary)

From: Wolfgang Denk
Date: 2018-12-05 21:37
To: 张国富
CC: u-boot
Subject: Re: [U-Boot] network not work with u-boot
Dear 张国富,
 
In message <3ddf0dcd.d340.1677de6d85a.coremail.cleanc...@163.com> you wrote:
>
> Recently I came across a problem, and I tried many things but it still 
> does not work.
> I have a board with a u-boot ready and the kernel image yet to upload. 
> Unfortunately the board could not get the kernel image by ftp.
 
If what you write is correct, then this is expected behaviour.
 
U-Boot does not have support for TCP/IP, and so it cannot implement
the FTP protocol.  All we have is TFTP = TRIVIAL FTP.
 
You your FTP server will not help - you need a TFTP server instead.
 
This also explains the port mismatch you see in wireshark.
 
Best regards,
 
Wolfgang Denk
 
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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] [RFC PATCH v2 05/11] mtd: spi: Port SPI NOR framework from Linux

2018-12-05 Thread Simon Goldschmidt

Am 04.12.2018 um 13:26 schrieb Vignesh R:

Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB space.
Also, many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
flashes but sf layer isn't using that.
So sync SPI NOR framework from Linux v4.19 and add spi-mem support on top.
in order to gain 4 byte addressing support, SFDP support and a way to
support SPI controllers with MMIO flash interface.

Signed-off-by: Vignesh R 
---
  drivers/mtd/spi/spi-nor.c   | 2613 +++
  include/linux/mtd/cfi.h |   32 +
  include/linux/mtd/spi-nor.h |  421 ++
  3 files changed, 3066 insertions(+)
  create mode 100644 drivers/mtd/spi/spi-nor.c
  create mode 100644 include/linux/mtd/cfi.h
  create mode 100644 include/linux/mtd/spi-nor.h

diff --git a/drivers/mtd/spi/spi-nor.c b/drivers/mtd/spi/spi-nor.c
new file mode 100644
index ..ff79601a8896
--- /dev/null
+++ b/drivers/mtd/spi/spi-nor.c
@@ -0,0 +1,2613 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Based on m25p80.c, by Mike Lavender (m...@steroidmicros.com), with
+ * influence from lart.c (Abraham Van Der Merwe) and mtd_dataflash.c
+ *
+ * Copyright (C) 2005, Intec Automation Inc.
+ * Copyright (C) 2014, Freescale Semiconductor, Inc.
+ *
+ * Synced from Linux v4.19
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/* Define max times to check status register before we give up. */
+
+/*
+ * For everything but full-chip erase; probably could be much smaller, but kept
+ * around for safety for now
+ */
+
+#define HZ CONFIG_SYS_HZ
+
+#define DEFAULT_READY_WAIT_JIFFIES (40UL * HZ)
+
+#define SPI_NOR_MAX_ID_LEN 6
+#define SPI_NOR_MAX_ADDR_WIDTH 4
+
+struct flash_info {
+   char*name;
+
+   /*
+* This array stores the ID bytes.
+* The first three bytes are the JEDIC ID.
+* JEDEC ID zero means "no ID" (mostly older chips).
+*/
+   u8  id[SPI_NOR_MAX_ID_LEN];
+   u8  id_len;
+
+   /* The size listed here is what works with SPINOR_OP_SE, which isn't
+* necessarily called a "sector" by the vendor.
+*/
+   unsigned intsector_size;
+   u16 n_sectors;
+
+   u16 page_size;
+   u16 addr_width;
+
+   u16 flags;
+#define SECT_4KBIT(0)  /* SPINOR_OP_BE_4K works 
uniformly */
+#define SPI_NOR_NO_ERASE   BIT(1)  /* No erase command needed */
+#define SST_WRITE  BIT(2)  /* use SST byte programming */
+#define SPI_NOR_NO_FR  BIT(3)  /* Can't do fastread */
+#define SECT_4K_PMCBIT(4)  /* SPINOR_OP_BE_4K_PMC works uniformly 
*/
+#define SPI_NOR_DUAL_READ  BIT(5)  /* Flash supports Dual Read */
+#define SPI_NOR_QUAD_READ  BIT(6)  /* Flash supports Quad Read */
+#define USE_FSRBIT(7)  /* use flag status register */
+#define SPI_NOR_HAS_LOCK   BIT(8)  /* Flash supports lock/unlock via SR */
+#define SPI_NOR_HAS_TB BIT(9)  /*
+* Flash SR has Top/Bottom (TB) protect
+* bit. Must be used with
+* SPI_NOR_HAS_LOCK.
+*/
+#defineSPI_S3ANBIT(10) /*
+* Xilinx Spartan 3AN In-System Flash
+* (MFR cannot be used for probing
+* because it has the same value as
+* ATMEL flashes)
+*/
+#define SPI_NOR_4B_OPCODES BIT(11) /*
+* Use dedicated 4byte address op codes
+* to support memory size above 128Mib.
+*/
+#define NO_CHIP_ERASE  BIT(12) /* Chip does not support chip erase */
+#define SPI_NOR_SKIP_SFDP  BIT(13) /* Skip parsing of SFDP tables */
+#define USE_CLSR   BIT(14) /* use CLSR command */
+
+   int (*quad_enable)(struct spi_nor *nor);
+};
+
+#define JEDEC_MFR(info)((info)->id[0])
+
+static int spi_nor_read_write_reg(struct spi_nor *nor, struct spi_mem_op
+   *op, void *buf)
+{
+   if (op->data.dir == SPI_MEM_DATA_IN)
+   op->data.buf.in = buf;
+   else
+   op->data.buf.out = buf;
+   return spi_mem_exec_op(nor->spi, op)

[U-Boot] [PATCH] dm: Tidy up 'dm tree' output when there are many devices

2018-12-05 Thread Simon Glass
At present the 'Index' column assumes there is only one digit. But on some
devices (e.g. snow) there are a lot of regulators and GPIO banks. Adjust
the output to allow for two digits without messing up the display.

Also capatalise the heading to match.

Fixes: 5197dafc42 (dm: core: Widen the dump tree to show more of the
driver's name.)

Signed-off-by: Simon Glass 
---

 drivers/core/dump.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 04217cbde87..8fbfd93fb5e 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -16,7 +16,7 @@ static void show_devices(struct udevice *dev, int depth, int 
last_flag)
struct udevice *child;
 
/* print the first 20 characters to not break the tree-format. */
-   printf(" %-10.10s  %d  [ %c ]   %-20.20s  ", dev->uclass->uc_drv->name,
+   printf(" %-10.10s  %2d  [ %c ]   %-20.20s  ", dev->uclass->uc_drv->name,
   dev_get_uclass_index(dev, NULL),
   dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ', dev->driver->name);
 
@@ -49,7 +49,7 @@ void dm_dump_all(void)
 
root = dm_root();
if (root) {
-   printf(" Classindex  Probed  DriverName\n");
+   printf(" Class Index  Probed  Driver
Name\n");

printf("---\n");
show_devices(root, -1, 0);
}
-- 
2.20.0.rc1.387.gf8505762e3-goog

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Re: [U-Boot] Pull request: u-boot-spi/master

2018-12-05 Thread Tom Rini
On Thu, Dec 06, 2018 at 12:53:32AM +0530, Jagan Teki wrote:

> Hi Tom,
> 
> Please pull this PR.

I've done a short summary this time, can you please include one in the
future?  Thanks.

> 
> thanks,
> Jagan.
> 
> The following changes since commit a3e1653ddeb02f39481eba572275016171e9670c:
> 
>   Merge git://git.denx.de/u-boot-marvell (2018-11-20 12:39:16 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-spi.git master
> 
> for you to fetch changes up to 08898e8b22d74a4511eadee9b06b11aab43e809c:
> 
>   mtd: sf: Make sf_mtd.c more robust (2018-12-06 00:45:36 +0530)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] fdt: Add warning about CONFIG_OF_EMBED

2018-12-05 Thread Tom Rini
On Wed, Dec 05, 2018 at 06:57:08AM -0700, Simon Glass wrote:

> This option has crept into use with some boards. Add a warning to try to
> prevent this.
> 
> As an example:
>https://lists.denx.de/pipermail/u-boot/2017-September/304966.html
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH] arm: dts: am33xx: Sync dts with Linux 4.20.0

2018-12-05 Thread Tom Rini
On Wed, Dec 05, 2018 at 02:53:42PM +0100, Felix Brack wrote:

> This patch synchronizes the am33xx SoC specific files with those from
> Linux 4.20.0. Hence all board maintainers of am33xx based boards are
> on the cc list.
> The main purpose of this patch is to prevent further diverging of the
> dts files from U-Boot and those from Linux. It aims to set the stage
> for the synchronization of board specific dts files. Example: I'm the
> maintainer of the PDU001 board: once this patch is applied successfully
> I will make changes to the board specific dts file in Linux only and
> then post a patch with a copy of this exact dts file to U-Boot. This
> will make U-Boot and Linux remain in sync.
> The stumbling block of https://patchwork.ozlabs.org/patch/943627 was
> removed by the patch https://patchwork.ozlabs.org/patch/962428 from
> Lokesh Vutla (many thanks!). This omap-serial driver allows using the
> Linux am33xx.dtsi file in U-Boot.
> Other changes to dts and dtsi files made by this patch are mainly to
> prevent _new_ warnings during the build process. Especially the warning
> at pinmux@800 stating 'unnecessary #address-cells/#size-cells without
> "ranges" or child "reg"' was not removed. This warning is a good example
> showing the benefit of the synchronization: if it needs to be fixed it
> will be fixed in Linux and ported back to U-Boot.
> Buildman reports all 46 am33xx SoC based boards to build fine, with
> warnings of course. Nevertheless this patch should be tested thoroughly
> on as many boards as possible to prevent any collateral damage.
> 
> Signed-off-by: Felix Brack 

Reviewed-by: Tom Rini 

-- 
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Re: [U-Boot] [PATCH 1/7] cmd: part: Add 'number' sub-command

2018-12-05 Thread Simon Glass
On Tue, 27 Nov 2018 at 12:57, Ruslan Trofymenko
 wrote:
>
> This sub-command serves for getting the partition index from
> partition name. Also it can be used to test the existence of specified
> partition.
>
> Signed-off-by: Ruslan Trofymenko 
> ---
>  cmd/part.c | 16 +++-
>  1 file changed, 15 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 3/3] travis: Use buildman for building with clang

2018-12-05 Thread Tom Rini
On Wed, Dec 05, 2018 at 05:35:28AM -0700, Simon Glass wrote:

> Now that buildman supports clang, use it.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Tom Rini 

-- 
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Re: [U-Boot] [PATCH 3/7] common: Implement A/B metadata

2018-12-05 Thread Simon Glass
Hi Ruslan,

On Tue, 27 Nov 2018 at 12:57, Ruslan Trofymenko
 wrote:
>
> This patch determines the A/B-specific bootloader message structure
> that is the basis for implementation of recovery and A/B update
> functions. A/B metadata is stored in this structure and used to decide
> which slot should we use to boot the device. Also some basic functions
> for A/B metadata manipulation are implemented (like slot selection).
>
> The patch was extracted from commits [1], [2] with some coding style
> fixes.
>
> [1] 
> https://android-review.googlesource.com/c/platform/external/u-boot/+/729878/2
> [2] 
> https://android-review.googlesource.com/c/platform/external/u-boot/+/729880/2
>
> Signed-off-by: Ruslan Trofymenko 
> ---
>  common/Kconfig   |  10 ++
>  common/Makefile  |   1 +
>  common/android_ab.c  | 278 
> +++
>  include/android_ab.h |  34 +
>  include/android_bootloader_message.h | 164 +
>  5 files changed, 487 insertions(+)
>  create mode 100644 common/android_ab.c
>  create mode 100644 include/android_ab.h
>  create mode 100644 include/android_bootloader_message.h
>
> diff --git a/common/Kconfig b/common/Kconfig
> index 57bd16d..0ff4679 100644
> --- a/common/Kconfig
> +++ b/common/Kconfig
> @@ -748,6 +748,16 @@ config UPDATE_TFTP_MSEC_MAX
> default 100
> depends on UPDATE_TFTP
>
> +config ANDROID_AB
> +   bool "Android A/B updates"
> +   default n
> +   help
> + If enabled, adds support for the new Android A/B update model. This
> + allows the bootloader to select which slot to boot from based on the
> + information provided by userspace via the Android boot_ctrl HAL. 
> This
> + allows a bootloader to try a new version of the system but roll back
> + to previous version if the new one didn't boot all the way.
> +
>  endmenu
>
>  menu "Blob list"
> diff --git a/common/Makefile b/common/Makefile
> index 88079d1..a1a252c 100644
> --- a/common/Makefile
> +++ b/common/Makefile
> @@ -104,6 +104,7 @@ endif
>  endif
>
>  obj-y += image.o
> +obj-$(CONFIG_ANDROID_AB) += android_ab.o
>  obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
>  obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
>  obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
> diff --git a/common/android_ab.c b/common/android_ab.c
> new file mode 100644
> index 000..25daba7
> --- /dev/null
> +++ b/common/android_ab.c
> @@ -0,0 +1,278 @@
> +// SPDX-License-Identifier: BSD-2-Clause
> +/*
> + * Copyright (C) 2017 The Android Open Source Project
> + */
> +
> +#include 

Please put common.h first

> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/**
> + * Compute the CRC-32 of the bootloader control struct.
> + *
> + * Only the bytes up to the crc32_le field are considered for the CRC-32
> + * calculation.
> + */
> +static uint32_t ab_control_compute_crc(struct android_bootloader_control 
> *abc)
> +{
> +   return crc32(0, (void *)abc, offsetof(typeof(*abc), crc32_le));
> +}
> +
> +/**
> + * Initialize android_bootloader_control to the default value.
> + *
> + * It allows us to boot all slots in order from the first one. This value
> + * should be used when the bootloader message is corrupted, but not when
> + * a valid message indicates that all slots are unbootable.
> + */
> +static void ab_control_default(struct android_bootloader_control *abc)
> +{
> +   int i;
> +   const struct android_slot_metadata metadata = {
> +   .priority = 15,
> +   .tries_remaining = 7,
> +   .successful_boot = 0,
> +   .verity_corrupted = 0,
> +   .reserved = 0
> +   };
> +
> +   memcpy(abc->slot_suffix, "a\0\0\0", 4);
> +   abc->magic = ANDROID_BOOT_CTRL_MAGIC;
> +   abc->version = ANDROID_BOOT_CTRL_VERSION;
> +   abc->nb_slot = ANDROID_NUM_SLOTS;
> +   memset(abc->reserved0, 0, sizeof(abc->reserved0));
> +   for (i = 0; i < abc->nb_slot; ++i)
> +   abc->slot_info[i] = metadata;
> +
> +   memset(abc->reserved1, 0, sizeof(abc->reserved1));
> +   abc->crc32_le = ab_control_compute_crc(abc);
> +}
> +
> +/**
> + * Load the boot_control struct from disk into newly allocated memory.
> + *
> + * This function allocates and returns an integer number of disk blocks,
> + * based on the block size of the passed device to help performing a
> + * read-modify-write operation on the boot_control struct.
> + * The boot_control struct offset (2 KiB) must be a multiple of the device
> + * block size, for simplicity.
> + *
> + * @param[in] dev_desc Device where to read the boot_control struct from
> + * @param[in] part_info Partition in 'dev_desc' where to read from, normally
> + * the "misc" partition should be used
> + * @return boot_control loaded from disk or NULL on error

You have different error types in this function. Can you change it to
re

Re: [U-Boot] [PATCH 2/3] buildman: Add support for building with clang

2018-12-05 Thread Tom Rini
On Wed, Dec 05, 2018 at 05:35:27AM -0700, Simon Glass wrote:

> Add a -O option which allows building with clang.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Tom Rini 

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Re: [U-Boot] Please pull u-boot-riscv

2018-12-05 Thread Tom Rini
On Wed, Dec 05, 2018 at 03:12:29PM +0800, Rick Chen wrote:

> Hi Tom,
> 
> Please pull some riscv update:
> 1. Fix BBL may be corrupted problem.
> 2. Support U-Boot run in S-mode.
> 
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/463646974
> 
> Thanks
> 
> Rick
> 
> 
> The following changes since commit 2e2a2a5d4f0c2e2642326d9000ce1f1553632e6a:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-sh (2018-12-04
> 19:22:31 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to 48cbf6246052de10d35b616b5efb2f783904a49d:
> 
>   riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
> (2018-12-05 14:14:16 +0800)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Please pull u-boot-video

2018-12-05 Thread Tom Rini
On Wed, Dec 05, 2018 at 01:53:41AM +0100, Anatolij Gustschin wrote:

> Hi Tom,
> 
> please pull some video updates for v2019.01.
> 
> https://travis-ci.org/vdsao/u-boot-video/builds/463489627
> 
> Thanks,
> Anatolij
> 
> The following changes since commit 8f5bfb7615e82ffccebf79530b08034f81e56268:
> 
>   Merge tag 'u-boot-amlogic-20181203' of git://git.denx.de/u-boot-amlogic 
> (2018-12-03 09:21:06 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-video.git tags/video-updates-for-2019.01-rc2
> 
> for you to fetch changes up to 96d82f6c860e3f7ce5c301a3d4fc5541b2ce713e:
> 
>   video: use BMP_ALIGN_CENTER define from splash.h (2018-12-04 19:47:20 +0100)
> 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH] sf: prevent clean_bar overwriting error codes

2018-12-05 Thread Simon Glass
On Tue, 27 Nov 2018 at 13:09, Simon Goldschmidt
 wrote:
>
> In spi_flash.c, if CONFIG_SPI_FLASH_BAR is enabled, the function
> 'clean_bar' makes sure that the Bank Address Register is reset at the
> end of functions using it.
>
> However, if this is enabled, those functions may return zero (success)
> when they should return an error. This is because after e.g.
> 'spi_flash_read_common' fails, the return value in 'ret' is overwritten
> with the return value of 'clean_bar'.
>
> Fix this by changing 'clean_bar' to take the outer error code into
> account and returning its own return value only if the outer error code
> is 0.
>
> Signed-off-by: Simon Goldschmidt 
> ---
>
>  drivers/mtd/spi/spi_flash.c | 21 +++--
>  1 file changed, 15 insertions(+), 6 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 6/7] doc: android: Add simple guide for A/B updates

2018-12-05 Thread Simon Glass
Hi,

On Tue, 27 Nov 2018 at 12:57, Ruslan Trofymenko
 wrote:
>
> Add a short documentation for A/B enablement and 'android_ab_select'
> command usage.
>
> Signed-off-by: Ruslan Trofymenko 
> ---
>  doc/README.android-ab | 67 
> +++
>  1 file changed, 67 insertions(+)
>  create mode 100644 doc/README.android-ab
>
> diff --git a/doc/README.android-ab b/doc/README.android-ab
> new file mode 100644
> index 000..230088c
> --- /dev/null
> +++ b/doc/README.android-ab
> @@ -0,0 +1,67 @@
> +Android A/B updates
> +===
> +
> +Overview
> +
> +
> +A/B system updates ensures modern approach for system update. This feature
> +allows one to use two sets (or more) of partitions referred to as slots
> +(normally slot A and slot B). The system runs from the current slot while the
> +partitions in the unused slot can be updated [1].
> +
> +A/B enablement
> +--
> +
> +The A/B updates support can be activated by specifying next options in
> +your board configuration file:
> +
> +CONFIG_ANDROID_AB=y
> +CONFIG_CMD_ANDROID_AB_SELECT=y
> +
> +The disk space on target device must be partitioned in a way so that each
> +partition which needs to be updated has two or more instances. The name of
> +each instance must be formed by adding suffixes: _a, _b, _c, etc.
> +For example: boot_a, boot_b, system_a, system_b, vendor_a, vendor_b.
> +
> +As a result you can use 'android_ab_select' command to ensure A/B boot 
> process
> +in your boot script. This command analyzes and processes A/B metadata stored
> +on a special partition (e.g. "misc") and determines which slot should be used
> +for booting up.
> +
> +Command usage
> +-
> +
> +android_ab_select   
> 

Can we have a shorter command?

Perhaps we need a new 'android' command with an 'ab_select'
subcommand? Then the automatica abbreviation will work.

> +
> +for example:
> +
> +=> android_ab_select slot_name mmc 1:4
> +
> +or
> +
> +=> android_ab_select slot_name mmc 1#misc
> +
> +Result:
> +
> +=> printenv slot_name
> +slot_name=a
> +
> +Based on this slot information, the current boot partition should be defined,
> +and next kernel command line parameters should be generated:
> +
> + - androidboot.slot_suffix=
> + - root=
> +
> +For example:
> +
> +androidboot.slot_suffix=_a root=/dev/mmcblk1p12
> +
> +A/B metadata is organized according to AOSP reference [2]. On the first 
> system
> +start with A/B enabled, when 'misc' partition doesn't contain required data,
> +the default A/B metadata will be created and written to 'misc' partition.
> +
> +References
> +--
> +
> +[1] https://source.android.com/devices/tech/ota/ab
> +[2] 
> bootable/recovery/bootloader_message/include/bootloader_message/bootloader_message.h
> --
> 2.7.4
>

Regards,
Simon
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Re: [U-Boot] [PATCH 5/7] test/py: Add base test case for A/B updates

2018-12-05 Thread Simon Glass
On Tue, 27 Nov 2018 at 12:57, Ruslan Trofymenko
 wrote:
>
> Add sandbox test for 'android_ab_select' command.
>
> Test: ./test/py/test.py --bd sandbox --build -k test_ab
>
> Signed-off-by: Ruslan Trofymenko 
> ---
>  configs/sandbox_defconfig |  2 ++
>  test/py/tests/test_ab.py  | 74 
> +++
>  2 files changed, 76 insertions(+)
>  create mode 100644 test/py/tests/test_ab.py

Reviewed-by: Simon Glass 

Please see below

>
> diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
> index 5a744f4..f246f89 100644
> --- a/configs/sandbox_defconfig
> +++ b/configs/sandbox_defconfig
> @@ -20,6 +20,7 @@ CONFIG_PRE_CON_BUF_ADDR=0x10
>  CONFIG_LOG_MAX_LEVEL=6
>  CONFIG_LOG_ERROR_RETURN=y
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_ANDROID_AB=y
>  CONFIG_CMD_CPU=y
>  CONFIG_CMD_LICENSE=y
>  CONFIG_CMD_BOOTZ=y
> @@ -61,6 +62,7 @@ CONFIG_CMD_TIME=y
>  CONFIG_CMD_TIMER=y
>  CONFIG_CMD_SOUND=y
>  CONFIG_CMD_QFW=y
> +CONFIG_CMD_ANDROID_AB_SELECT=y
>  CONFIG_CMD_BOOTSTAGE=y
>  CONFIG_CMD_PMIC=y
>  CONFIG_CMD_REGULATOR=y
> diff --git a/test/py/tests/test_ab.py b/test/py/tests/test_ab.py
> new file mode 100644
> index 000..f27538e
> --- /dev/null
> +++ b/test/py/tests/test_ab.py
> @@ -0,0 +1,74 @@
> +# SPDX-License-Identifier: GPL-2.0
> +# (C) Copyright 2018 Texas Instruments, 
> +
> +# Test A/B update commands.
> +
> +import os
> +import pytest
> +import u_boot_utils
> +
> +class ABTestDiskImage(object):
> +"""Disk Image used by the A/B tests."""
> +
> +def __init__(self, u_boot_console):
> +"""Initialize a new ABTestDiskImage object.
> +
> +Args:
> +u_boot_console: A U-Boot console.
> +
> +Returns:
> +Nothing.
> +"""
> +
> +filename = 'test_ab_disk_image.bin'
> +
> +persistent = u_boot_console.config.persistent_data_dir + '/' + 
> filename
> +self.path = u_boot_console.config.result_dir  + '/' + filename
> +
> +with u_boot_utils.persistent_file_helper(u_boot_console.log, 
> persistent):
> +if os.path.exists(persistent):
> +u_boot_console.log.action('Disk image file ' + persistent +
> +' already exists')
> +else:
> +u_boot_console.log.action('Generating ' + persistent)
> +fd = os.open(persistent, os.O_RDWR | os.O_CREAT)
> +os.ftruncate(fd, 524288)
> +os.close(fd)
> +cmd = ('sgdisk', persistent)
> +u_boot_utils.run_and_log(u_boot_console, cmd)
> +
> +cmd = ('sgdisk', '--new=1:64:512', '-c 1:misc', persistent)
> +u_boot_utils.run_and_log(u_boot_console, cmd)
> +cmd = ('sgdisk', '-l', persistent)
> +u_boot_utils.run_and_log(u_boot_console, cmd)
> +
> +cmd = ('cp', persistent, self.path)
> +u_boot_utils.run_and_log(u_boot_console, cmd)
> +
> +di = None
> +@pytest.fixture(scope='function')
> +def ab_disk_image(u_boot_console):
> +global di
> +if not di:
> +di = ABTestDiskImage(u_boot_console)
> +return di
> +
> +@pytest.mark.boardspec('sandbox')
> +@pytest.mark.buildconfigspec('android_ab')
> +@pytest.mark.buildconfigspec('cmd_android_ab_select')
> +@pytest.mark.requiredtool('sgdisk')
> +def test_ab(ab_disk_image, u_boot_console):
> +"""Test the 'android_ab_select' command."""
> +
> +u_boot_console.run_command('host bind 0 ' + ab_disk_image.path)
> +
> +output = u_boot_console.run_command('android_ab_select slot_name host 
> 0#misc')
> +assert 're-initializing A/B metadata' in output
> +assert 'Attempting slot a, tries remaining 7' in output
> +output = u_boot_console.run_command('printenv slot_name')
> +assert 'a' in output

I just worry their mind be other next there.

Maybe assert 'b' not in output ?

> +
> +output = u_boot_console.run_command('android_ab_select slot_name host 
> 0:1')
> +assert 'Attempting slot b, tries remaining 7' in output
> +output = u_boot_console.run_command('printenv slot_name')
> +assert 'b' in output
> --
> 2.7.4
>

Regards,
Simon
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Re: [U-Boot] [PATCH 2/7] disk: part: Extend API to get partition info

2018-12-05 Thread Simon Glass
Hi Ruslan,

On Tue, 27 Nov 2018 at 12:57, Ruslan Trofymenko
 wrote:
>
> This patch adds part_get_info_by_dev_and_name_or_num() function which
> allows us to get partition info from its number or name. Partition of
> interest is specified by string like "device_num:partition_number" or
> "device_num#partition_name".
>
> The patch was extracted from [1].
>
> [1] 
> https://android-review.googlesource.com/c/platform/external/u-boot/+/729880/2
>
> Signed-off-by: Ruslan Trofymenko 
> ---
>  disk/part.c| 68 
> ++
>  include/part.h | 21 ++
>  2 files changed, 89 insertions(+)
>
> diff --git a/disk/part.c b/disk/part.c
> index f30f9e9..ad4239d 100644
> --- a/disk/part.c
> +++ b/disk/part.c
> @@ -675,6 +675,74 @@ int part_get_info_by_name(struct blk_desc *dev_desc, 
> const char *name,
> return part_get_info_by_name_type(dev_desc, name, info, 
> PART_TYPE_ALL);
>  }
>
> +/**
> + * Get partition info from device number and partition name.
> + *
> + * Parse a device number and partition name string in the form of
> + * "device_num#partition_name", for example "0#misc". If the partition
> + * is found, sets dev_desc and part_info accordingly with the information
> + * of the partition with the given partition_name.
> + *
> + * @param[in] dev_iface Device interface
> + * @param[in] dev_part_str Input string argument, like "0#misc"
> + * @param[out] dev_desc Place to store the device description pointer
> + * @param[out] part_info Place to store the partition information
> + * @return 0 on success, or -1 on error

Can you please return an error like -EINVAL? -1 is defined as -EPERM
whcih seems wrong.

Regards,
Simon
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Re: [U-Boot] [PATCH] serial: serial_stm32: Add reset support

2018-12-05 Thread Simon Glass
On Tue, 4 Dec 2018 at 06:11, Patrice Chotard  wrote:
>
> In some cases, UART is configured by early boot stage.
> To be sure of the initial state of UART and to avoid
> spurious chars on console, reset the serial block before
> configuring it.
>
> Signed-off-by: Patrice Chotard 
> ---
>
>  drivers/serial/serial_stm32.c | 9 +
>  1 file changed, 9 insertions(+)

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Re: [U-Boot] [RESENT PATCH 1/2] rockchip: rk3128: use ROCKCHIP_BOOT_MODE_REG to update reboot flag

2018-12-05 Thread Simon Glass
Hi Philipp,

On Thu, 29 Nov 2018 at 13:57, Philipp Tomsich
 wrote:
>
> Simon,
>
> On 29.11.2018, at 19:43, Simon Glass  wrote:
>
> Hi Kever,
>
> On Wed, 28 Nov 2018 at 18:10, Kever Yang  wrote:
>
>
> Hi Philipp,
>
>
> On 11/28/2018 05:07 PM, Philipp Tomsich wrote:
>
> Kever,
>
> On 28.11.2018, at 03:04, Kever Yang  wrote:
>
> Use ROCKCHIP_BOOT_MODE_REG instead of grf structure so that
> we can re-use the source code later.
>
> Signed-off-by: Kever Yang 
>
> NAK, as there are still pending changes.
>
> Yes, I got that, and I send out my comments on your comments with no
> more response.
>
> See below for the reminder, in case this got lost.
>
> ---
>
> arch/arm/mach-rockchip/Kconfig| 1 +
> arch/arm/mach-rockchip/rk3128-board.c | 5 +
> 2 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> index 145d96b1f0..94a03e2a38 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -179,6 +179,7 @@ config TPL_ROCKCHIP_BACK_TO_BROM
> config ROCKCHIP_BOOT_MODE_REG
> hex "Rockchip boot mode flag register address"
> default 0x200081c8 if ROCKCHIP_RK3036
> +default 0x100a0038 if ROCKCHIP_RK3128
> default 0x20004040 if ROCKCHIP_RK3188
> default 0x110005c8 if ROCKCHIP_RK322X
> default 0xff730094 if ROCKCHIP_RK3288
>
> As previously discussed: these should all go into header files, as they are 
> not user-configurable.
> This affects multiple patch series (as I requested the same for the STIMER 
> address).
>
> I believe you mention about this: http://patchwork.ozlabs.org/patch/891462/
> Now the model in u-boot rockchip channel is:
> - People send out patches to mailing list;
> - The patch get an ACK patch and review patch may request for change in
> 1 week~4 months;
> - According to the maintainer's comment, people reply for why the patch
> like this,
>   and maybe the patch do not need to change just like what the
> maintainer want.
> - BUT, there will never be more reply/comments.
> - Then, people have to resend the patches they think it may be
> reasonable, and maintainer
>   then complain people doesn't address his comment.
>
> For this patch, I think:
> - This is not an first patch for this operation, this just make rk3128
> work like other SoCs, it's not a new feature;
> - This kind of default value setting is all over the U-Boot project, I'm
> not say it's correct,
>  but it's a good solution and convenient for us to use the same object
> with different value in different SoCs,
>  It's much better to separate them into more then 10 header files or
> lots of "#ifdef CONFIG_ROCKCHIIP_RK3128"
>  in one header files.
>
>  I hope I can get reply for this mail this time.
>
> Hi Simon,
>Could you help to comment on this?
>
>
> What happens if the user changes the value?
>
> Can this go in the device tree?
>
> It seems like this should be in a driver, to me. We have a SYSCON
> driver for GRF. Should we add an ioctl-type interface to it?
>
>
> This affects a number of settings by now, including the addresses for the
> debug UARTs, secure timer base addresses and the boot-mode register.
>
> What we’d really need would be a “read/write named-register” operation
> (which could either be an ioctl or a new read/write operation that takes a
> selector that can then internally be mapped onto an actual address).
> However, this would require a custom syscon for each chip (or at least a
> per-chip driver-data), which also doesn’t sound like a desirable design.

I assume it would come from the device tree.

To me this seems like a reasonable design. Yes it would need per-chip
DT settings, or perhaps driver data.

But I believe we alreayd have a syscon_.c for each chip.

Regards,
Simon
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Re: [U-Boot] Question regarding early pinctrl and driver model in u-boot

2018-12-05 Thread Simon Glass
Hi Lukasz,

On Mon, 3 Dec 2018 at 15:13, Lukasz Majewski  wrote:
>
> Dear All,
>
> I've stumbled upon a following issue:
>
> - I do have a vybrid SoC which is not using SPL. It only uses U-boot
>   proper (u-boot.vyb).
>
> - In the board_early_init_f() (when we are still in SRAM) I do perform
>   pinctrl (pinmux) setup for UART1 (this is the console device).
>
> - I also do use ucalss-serial.c for this device and have proper pinmux
>   definition for it in the *.dts file - but this is done latter.
>
> The problem is that, when I try to remove pinmux setup code
> (imx_iomux_v3_setup_multiple_pads()) from board_early_init_f(), then I
> do see uart output late (no U-boot early output - U-Boot
> 2018.11-00052-g6552299a40-dirty (Nov 23 2018 - 16:13:51 +0100)).
>
> The reason for this is the lack of pinctrl UART pins setup.
>
>
> Do you see any idea how to move to full dts support for uart? The uart
> driver and pinmux have defined DM_FLAG_PRE_RELOC.

Is this due to pinconfig_post_bind() only operating after relocation?

>
>
> The same kind of problem I do have with DDR memory controller pin
> setup. It would be nice to have it all in DTS, not in a board file.
>
>
>
>
> [ My idea would be to manually extract relevant data from fdt blob and
> configure pins in board_early_init_f(), but this looks like a hack -
> maybe there is another, better solution? ]

Hopefully :-)

Regards,
Simon
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Re: [U-Boot] [PATCH] common: fdt_support: print hexadecimal numbers in debug

2018-12-05 Thread Simon Glass
On Wed, 5 Dec 2018 at 02:46, Sekhar Nori  wrote:
>
> We usually deal with hexadecimal addresses and sizes in
> device-tree. Its much easier if debug logs print hexadecimal
> values too.
>
> Signed-off-by: Sekhar Nori 
> ---
>  common/fdt_support.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>

Reviewed-by: Simon Glass 


> diff --git a/common/fdt_support.c b/common/fdt_support.c
> index 3440e42a257b..194bb41d1414 100644
> --- a/common/fdt_support.c
> +++ b/common/fdt_support.c
> @@ -1025,7 +1025,7 @@ static u64 of_bus_default_map(fdt32_t *addr, const 
> fdt32_t *range,
> s  = fdt_read_number(range + na + pna, ns);
> da = fdt_read_number(addr, na);
>
> -   debug("OF: default map, cp=%llu, s=%llu, da=%llu\n", cp, s, da);
> +   debug("OF: default map, cp=0x%llx, s=0x%llx, da=0x%llx\n", cp, s, da);

Note you probably don't need the 0x, since U-Boot uses hex by default.
But if you do want it, you can use %#x.

>
> if (da < cp || da >= (cp + s))
> return OF_BAD_ADDR;
> @@ -1080,7 +1080,7 @@ static u64 of_bus_isa_map(fdt32_t *addr, const fdt32_t 
> *range,
> s  = fdt_read_number(range + na + pna, ns);
> da = fdt_read_number(addr + 1, na - 1);
>
> -   debug("OF: ISA map, cp=%llu, s=%llu, da=%llu\n", cp, s, da);
> +   debug("OF: ISA map, cp=0x%llx, s=0x%llx, da=0x%llx\n", cp, s, da);
>
> if (da < cp || da >= (cp + s))
> return OF_BAD_ADDR;
> --
> 2.16.2
>
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Re: [U-Boot] [RFC PATCH] spl/tpl: change banner into upper case

2018-12-05 Thread Simon Glass
On Wed, 5 Dec 2018 at 03:30, Heiko Schocher  wrote:
>
> commit d6330064634a ("spl: Add a define for SPL_TPL_PROMPT")
>
> changes the SPL/TPL banner from upper case into lower
> case. As SPL and TPL are three-letter acronyms and they
> are written in upper case, change it back to upper case.
>
> Signed-off-by: Heiko Schocher 
> ---
>
>  include/spl.h  | 4 ++--
>  test/py/u_boot_console_base.py | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)

Oh well, I liked them like that :-)

Reviewed-by: Simon Glass 
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[U-Boot] Please pull u-boot-dm

2018-12-05 Thread Simon Glass
Hi Tom,

The following changes since commit 2e2a2a5d4f0c2e2642326d9000ce1f1553632e6a:

  Merge branch 'master' of git://git.denx.de/u-boot-sh (2018-12-04
19:22:31 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-dm.git tags/dm-pull-5dec18

for you to fetch changes up to b288cd9600724ad3a0e55c8786e70741dd13deae:

  x86: acpi: Generate SPCR table (2018-12-05 07:23:16 -0700)


Travis here

https://travis-ci.org/sglass68/u-boot/builds/463866708



Minor sandbox enhancements  / fixes
tpm improvements to clear up v1/v2 support
buildman toolchain fixes
New serial options to set/get config


Andy Shevchenko (7):
  dm: serial: Add ->getconfig() callback
  dm: serial: Introduce ->getinfo() callback
  serial: ns16550: Group reg_* members of ns16550_platdata
  serial: ns16550: Read reg-io-width from device tree
  serial: ns16550: Provide ->getinfo() implementation
  x86: acpi: Add SPCR table description
  x86: acpi: Generate SPCR table

Patrick Delaunay (1):
  power: regulator: denied disable on always-on regulator

Philipp Tomsich (2):
  dm: rtc: Fix function name in comment
  dm: (re)sort uclass ids alphabetically

Simon Glass (19):
  sandbox: Fix up the debug message for the image filename
  sandbox: Check the filename in jump_to_image_no_args()
  sandbox: physmem: Use mapping to support sandbox
  sandbox: net: Correct name copy in eth_raw_bus_post_bind()
  sandbox: sysreset: Update to support power-on reset
  sandbox: Zero the ram buffer on startup
  sandbox: Use 'extras' to specify 'head' files
  tpm: Remove use of build-time TPM versions
  tpm: Export tpm_clear_and_reenable()
  tpm: Add non-volatile index attributes needed for v2
  tpm: Fix a logging warning in unpack_byte_string()
  cros: Correct a printf() string and comment
  cros_ec: Adjust to use v1 vboot context only
  input: i8042: Use remove() instead of exported functions
  video: backlight: Fix log message in enable_sequence()
  time: Update mdelay() to delay in one large chunk
  Add UINT32_MAX and UINT64_MAX
  Add inttypes.h
  binman: Add myself as maintainer

Trevor Woerner (2):
  buildman/toolchain.py: fix toolchain directory
  buildman/toolchain.py: handle inconsistent tarball names

Álvaro Fernández Rojas (1):
  dm: core: add functions to get/remap I/O addresses by name

 MAINTAINERS|   5 +
 arch/sandbox/Makefile  |   4 +-
 arch/sandbox/config.mk |   3 +-
 arch/sandbox/cpu/Makefile  |   5 +-
 arch/sandbox/cpu/os.c  |   2 +-
 arch/sandbox/cpu/spl.c |   8 +-
 arch/sandbox/cpu/start.c   |   7 +
 arch/sandbox/dts/test.dts  |   1 +
 arch/sandbox/include/asm/state.h   |   1 +
 arch/x86/include/asm/acpi_table.h  |  51 ++
 arch/x86/lib/acpi_table.c  | 118 +
 drivers/core/fdtaddr.c |  10 ++
 drivers/core/read.c|  20 +++
 drivers/input/i8042.c  |  35 ++--
 drivers/misc/cros_ec.c |   4 +-
 drivers/misc/cros_ec_sandbox.c |  10 +-
 drivers/net/sandbox-raw-bus.c  |   2 +-
 drivers/power/regulator/regulator-uclass.c |   5 +
 drivers/serial/ns16550.c   |  23 ++-
 drivers/serial/sandbox.c   |  34 
 drivers/serial/serial-uclass.c |  37 
 drivers/sysreset/sysreset_sandbox.c|   8 +-
 drivers/video/pwm_backlight.c  |   2 +-
 include/common.h   |   4 +
 include/dm/fdtaddr.h   |  13 ++
 include/dm/read.h  |  36 
 include/dm/uclass-id.h |   8 +-
 include/i8042.h|  15 --
 include/inttypes.h | 271 +
 include/linux/delay.h  |   3 +-
 include/linux/kernel.h |   4 +
 include/ns16550.h  |   4 +-
 include/rtc.h  |   2 +-
 include/serial.h   |  66 ++-
 include/tpm-common.h   |  19 ++
 include/tpm-v2.h   |  33 
 lib/physmem.c  |   4 +-
 lib/tpm-common.c   |   9 +-
 lib/tpm-v1.c   |  22 +--
 test/dm/serial.c   |  12 ++
 test/dm/sysreset.c |   4 +-
 test/dm/test-fdt.c |  82 -
 tools/buildman/toolchain.py|   8 +-
 43 files changed, 935 insertions(+), 79 deletions(-)
 create mode 100644 include/inttypes.h

Regards,
Simo

[U-Boot] [PATCH] sunxi: update README.sunxi64

2018-12-05 Thread Andre Przywara
Now that the Allwinner port in the official mainline ARM Trusted
Firmware repository has reached feature parity with the "legacy" ATF
port, let's use the opportunity to update the Allwinner 64-bit build
instructions. This changes:
- Update ATF build instructions to use the mainline repo.
- Add quick command lines for TL;DR people.
- Mention Allwinner H6 build target.
- Mention pre-built FEL binaries.

Signed-off-by: Andre Przywara 
---
 board/sunxi/README.sunxi64 | 25 +++--
 1 file changed, 19 insertions(+), 6 deletions(-)

diff --git a/board/sunxi/README.sunxi64 b/board/sunxi/README.sunxi64
index bba2e01b60..258921af22 100644
--- a/board/sunxi/README.sunxi64
+++ b/board/sunxi/README.sunxi64
@@ -12,8 +12,13 @@ file describes how to make full use of the 64-bit 
capabilities.
 Quick Start / Overview
 ==
 - Build the ARM Trusted Firmware binary (see "ARM Trusted Firmware (ATF)" 
below)
+  $ cd /src/arm-trusted-firmware
+  $ make PLAT=sun50i_a64 DEBUG=1 bl31
 - Build U-Boot (see "SPL/U-Boot" below)
+  $ export BL31=/path/to/bl31.bin
+  $ make pine64_plus_defconfig && make -j5
 - Transfer to an uSD card (see "microSD card" below)
+  $ dd if=u-boot-sunxi-with-spl.bin of=/dev/sdx bs=8k seek=1
 - Boot and enjoy!
 
 Building the firmware
@@ -29,14 +34,18 @@ to build it first.
 
  ARM Trusted Firmware (ATF)
 
-Checkout the "allwinner" branch from the github repository [1] and build it:
+Checkout the latest master branch from the official ATF repository [1] and
+build it:
 $ export CROSS_COMPILE=aarch64-linux-gnu-
-$ make PLAT=sun50iw1p1 DEBUG=1 bl31
-The resulting binary is build/sun50iw1p1/debug/bl31.bin. Either put the
+$ make PLAT=sun50i_a64 DEBUG=1 bl31
+The resulting binary is build/sun50i_a64/debug/bl31.bin. Either put the
 location of this file into the BL31 environment variable or copy this to
 the root of your U-Boot build directory (or create a symbolic link).
-$ export BL31=/src/arm-trusted-firmware/build/sun50iw1p1/debug/bl31.bin
+$ export BL31=/src/arm-trusted-firmware/build/sun50i_a64/debug/bl31.bin
   (adjust the actual path accordingly)
+The platform target "sun50i_a64" covers all boards with either an Allwinner
+A64 or H5 SoC (since they are very similar). For boards with an Allwinner H6
+SoC use "sun50i_h6".
 
 If you run into size issues with the resulting U-Boot image file, it might
 help to use a release build, by using "DEBUG=0" when building bl31.bin.
@@ -59,7 +68,8 @@ $ make pine64_plus_defconfig
 $ make
 
 This will build the SPL in spl/sunxi-spl.bin and a FIT image called u-boot.itb,
-which contains the rest of the firmware.
+which contains the rest of the firmware. u-boot-sunxi-with-spl.bin joins those
+two components in one convenient image file.
 
 
 Boot process
@@ -91,6 +101,9 @@ by using the USB-OTG interface and a host port on another 
computer.
 As the FEL mode is controlled by the boot ROM, it expects to be running in
 AArch32. For now the AArch64 SPL cannot properly return into FEL mode, so the
 feature is disabled in the configuration at the moment.
+The repository in [3] contains FEL capable SPL binaries, built using an
+off-tree branch to generate 32-bit ARM code (along with instructions
+how to re-create them).
 
 microSD card
 
@@ -165,6 +178,6 @@ Then write this image to a microSD card, replacing /dev/sdx 
with the right
 device file (see above):
 $ dd if=firmware.img of=/dev/sdx bs=8k seek=1
 
-[1] https://github.com/apritzel/arm-trusted-firmware.git
+[1] https://github.com/ARM-software/arm-trusted-firmware.git
 [2] git://github.com/linux-sunxi/sunxi-tools.git
 [3] https://github.com/apritzel/pine64/
-- 
2.14.5

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Re: [U-Boot] [RESEND][PATCH] power: regulator: denied disable on always-on regulator

2018-12-05 Thread Simon Glass
On Tue, 4 Dec 2018 at 01:02, Patrice CHOTARD  wrote:
>
> Hi Simon
>
> On 12/3/18 7:20 PM, Simon Glass wrote:
> > Hi,
> >
> > On Mon, 3 Dec 2018 at 04:07, Felix Brack  wrote:
> >>
> >> On 15.11.2018 13:45, Patrice Chotard wrote:
> >>> From: Patrick Delaunay 
> >>>
> >>> Don't disable regulator which are tagged as "regulator-always-on" in DT.
> >>>
> >>> Signed-off-by: Patrick Delaunay 
> >>> Reviewed-by: Simon Glass 
> >>> Reviewed-by: Jack Mitchell 
> >>> Tested-by: Jack Mitchell 
> >>> Signed-off-by: Patrice Chotard 
> >>> ---
> >>>
> >>>  drivers/power/regulator/regulator-uclass.c | 5 +
> >>>  1 file changed, 5 insertions(+)
> >>>
> >
> > I'm happy to pick it up if that helps.
>
> Thank you ;-)

Applied to u-boot-dm, thanks!
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Re: [U-Boot] [PATCH 0/5] dm: serial: Fix up some serial API errors

2018-12-05 Thread Simon Glass
Hi Andy,

On Wed, 5 Dec 2018 at 14:26, Andy Shevchenko  wrote:
>
> On Wed, Dec 5, 2018 at 9:54 PM Simon Glass  wrote:
> >
> > New serial functions should use a device pointer as the first argument.
> > The old functions are only there for backwards compatibilty, and can be
> > adjusted soon.
> >
> > For now, adjust the new functions to work correctly.
> >
>
> Thanks!
> I'm not sure I would be able to test it, but you may use my
> Reviewed-by: Andy Shevchenko 
>
> Couple of remarks:
> - I think it make sense to try for serial device only once in
> acpi_create_spcr() if I'm reading result correctly

I believe that is what I am doing. Can you please be more specific?

> - the setconfig() / getconfig() have both some staled comments, it
> seems you dropped only for one.

Again I am not sure where?

Regards,
Simon
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Re: [U-Boot] [PATCH] usb: dwc2-otg: make regs_phy (in platdata) a uintptr_t

2018-12-05 Thread Marek Vasut
On 12/06/2018 01:32 AM, Philipp Tomsich wrote:
> The regs_phy field of the platform data structure for dwc2-otg is
> today declared an unsigned int, but will eventually be cast into a
> void* for a writel operation.  This triggers errors on modern GCC
> versions.
> 
> E.g. we get the following error with GCC 6.3:
>   drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable':
>   arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of 
> different size [-Werror=int-to-pointer-cast]
>#define __arch_putl(v,a)  (*(volatile unsigned int *)(a) = (v))
>^
>   arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl'
>#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
>   ^~~
>   drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 
> 'writel'
> writel(val, pdata->regs_phy + reg->offset);
> ^~
> 
> This commit changes regs_phy to be a uintptr_t to ensure that it is
> large enough to hold any valid pointer (and fix the associated
> warning).
> 
> Signed-off-by: Philipp Tomsich 

Oh, ew. Good catch.

Acked-by: Marek Vasut 

Apply it alongside the Rock960 series, thanks.

> ---
> 
>  include/usb/dwc2_udc.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
> index 62e3236..4068de0 100644
> --- a/include/usb/dwc2_udc.h
> +++ b/include/usb/dwc2_udc.h
> @@ -14,7 +14,7 @@ struct dwc2_plat_otg_data {
>   void*priv;
>   int phy_of_node;
>   int (*phy_control)(int on);
> - unsigned intregs_phy;
> + uintptr_t   regs_phy;
>   uintptr_t   regs_otg;
>   unsigned intusb_phy_ctrl;
>   unsigned intusb_flags;
> 


-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] usb: dwc2-otg: make regs_phy (in platdata) a uintptr_t

2018-12-05 Thread Philipp Tomsich
Marek,

I need the below change before I can apply an overdue series to the rockchip 
tree.
Please review and let me know if it’s ok for you that I pick this one through 
the 
rockchip tree, so I can put the Rock960 series on top…

Thanks,
Philipp.

> On 06.12.2018, at 01:32, Philipp Tomsich 
>  wrote:
> 
> The regs_phy field of the platform data structure for dwc2-otg is
> today declared an unsigned int, but will eventually be cast into a
> void* for a writel operation.  This triggers errors on modern GCC
> versions.
> 
> E.g. we get the following error with GCC 6.3:
>  drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable':
>  arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of 
> different size [-Werror=int-to-pointer-cast]
>   #define __arch_putl(v,a)  (*(volatile unsigned int *)(a) = (v))
>   ^
>  arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl'
>   #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
>  ^~~
>  drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 
> 'writel'
>writel(val, pdata->regs_phy + reg->offset);
>^~
> 
> This commit changes regs_phy to be a uintptr_t to ensure that it is
> large enough to hold any valid pointer (and fix the associated
> warning).
> 
> Signed-off-by: Philipp Tomsich 
> ---
> 
> include/usb/dwc2_udc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
> index 62e3236..4068de0 100644
> --- a/include/usb/dwc2_udc.h
> +++ b/include/usb/dwc2_udc.h
> @@ -14,7 +14,7 @@ struct dwc2_plat_otg_data {
>   void*priv;
>   int phy_of_node;
>   int (*phy_control)(int on);
> - unsigned intregs_phy;
> + uintptr_t   regs_phy;
>   uintptr_t   regs_otg;
>   unsigned intusb_phy_ctrl;
>   unsigned intusb_flags;
> -- 
> 2.1.4
> 

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[U-Boot] [PATCH] usb: dwc2-otg: make regs_phy (in platdata) a uintptr_t

2018-12-05 Thread Philipp Tomsich
The regs_phy field of the platform data structure for dwc2-otg is
today declared an unsigned int, but will eventually be cast into a
void* for a writel operation.  This triggers errors on modern GCC
versions.

E.g. we get the following error with GCC 6.3:
  drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable':
  arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of 
different size [-Werror=int-to-pointer-cast]
   #define __arch_putl(v,a)  (*(volatile unsigned int *)(a) = (v))
   ^
  arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl'
   #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
  ^~~
  drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 'writel'
writel(val, pdata->regs_phy + reg->offset);
^~

This commit changes regs_phy to be a uintptr_t to ensure that it is
large enough to hold any valid pointer (and fix the associated
warning).

Signed-off-by: Philipp Tomsich 
---

 include/usb/dwc2_udc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
index 62e3236..4068de0 100644
--- a/include/usb/dwc2_udc.h
+++ b/include/usb/dwc2_udc.h
@@ -14,7 +14,7 @@ struct dwc2_plat_otg_data {
void*priv;
int phy_of_node;
int (*phy_control)(int on);
-   unsigned intregs_phy;
+   uintptr_t   regs_phy;
uintptr_t   regs_otg;
unsigned intusb_phy_ctrl;
unsigned intusb_flags;
-- 
2.1.4

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[U-Boot] [PATCH] sunxi: H6: DRAM: avoid memcpy() on MMIO registers

2018-12-05 Thread Andre Przywara
Using memcpy() for MMIO operations is, however tempting, not a good idea:
It depends on the specific implementation of memcpy, also lacks barriers.
In this particular case the first registers were written using 64-bit
writes, and the last register using four separate single-byte writes.
Neither is what we actually want.
We get away with it in this case because of the particular details of
the bus implementation, the DRAM controller IP and the values that we
actually write, but we should not leave a bad example around.

Replace the memcpy with a proper loop using the writel() accessor.

Signed-off-by: Andre Przywara 
---
 arch/arm/mach-sunxi/dram_sun50i_h6.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c 
b/arch/arm/mach-sunxi/dram_sun50i_h6.c
index 5da90a2835..e2f141eb9b 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
@@ -182,6 +182,7 @@ static void mctl_set_timing_lpddr3(struct dram_para *para)
(struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;
struct sunxi_mctl_phy_reg * const mctl_phy =
(struct sunxi_mctl_phy_reg *)SUNXI_DRAM_PHY0_BASE;
+   int i;
 
u8 tccd = 2;
u8 tfaw = max(ns_to_t(50), 4);
@@ -237,8 +238,9 @@ static void mctl_set_timing_lpddr3(struct dram_para *para)
u8 twr2rd   = tcwl + 4 + 1 + twtr;
u8 trd2wr   = tcl + 4 + (tcksrea >> 1) - tcwl + 1;
 
-   /* set mode register */
-   memcpy(mctl_phy->mr, mr_lpddr3, sizeof(mr_lpddr3));
+   /* set mode registers */
+   for (i = 0; i < ARRAY_SIZE(mr_lpddr3); i++)
+   writel(mr_lpddr3[i], &mctl_phy->mr[i]);
 
/* set DRAM timing */
writel((twtp << 24) | (tfaw << 16) | (trasmax << 8) | tras,
-- 
2.14.5

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Re: [U-Boot] [PATCH 05/19] riscv: Add a SYSCON driver for Core Local Interruptor

2018-12-05 Thread Auer, Lukas
Hi Bin,

On Wed, 2018-12-05 at 17:59 +0800, Bin Meng wrote:
> Hi Lukas,
> 
> On Wed, Nov 14, 2018 at 6:33 PM Auer, Lukas
>  wrote:
> > 
> > Hi Bin,
> > 
> > On Wed, 2018-11-14 at 09:48 +0800, Bin Meng wrote:
> > > Hi Lukas,
> > > 
> > > On Tue, Nov 13, 2018 at 10:45 PM Auer, Lukas
> > >  wrote:
> > > > 
> > > > Hi Bin,
> > > > 
> > > > On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote:
> > > > > This adds U-Boot syscon driver for RISC-V Core Local
> > > > > Interruptor
> > > > > (CLINT). The CLINT block holds memory-mapped control and
> > > > > status
> > > > > registers associated with software and timer interrupts.
> > > > > 
> > > > > 3 APIs are provided for U-Boot to implement Supervisor Binary
> > > > > Interface (SBI) as defined by the RISC-V privileged
> > > > > architecture
> > > > > spec v1.10.
> > > > > 
> > > > > Signed-off-by: Bin Meng 
> > > > > ---
> > > > 
> > > > Would it make sense to also abstract the functions provided by
> > > > the
> > > > CLINT more? The reason why I am asking is because the CLINT is
> > > > (unfortunately) not specified as part of RISC-V. It is
> > > > developing
> > > > into
> > > > a de facto standard since other platforms are following
> > > > SiFive's
> > > > implementation, but there is nothing that would prevent them
> > > > from
> > > > implementing something else.
> > > > 
> > > 
> > > I think your observation is correct about CLINT. Rick, does
> > > Andes's
> > > RISC-V processor also follow SiFive's CLINT model?
> > > 
> > > > Two immediate examples I can think of would be mtime and the
> > > > IPI
> > > > implementation. Many SoC vendors will likely already have a
> > > > suitable
> > > > timer IP block for mtime. I can imagine that they would choose
> > > > to
> > > > re-
> > > > use their memory map instead of following that of the CLINT.
> > > > For the IPI implementation there is already an alternative, the
> > > > SBI. If
> > > > U-Boot should be able to run in supervisor mode, it would be
> > > > helpful to
> > > > support both the SBI and the CLINT interface.
> > > > 
> > > 
> > > I am not sure I followed you here. This driver provides 3 APIs:
> > > riscv_send_ipi() is for IPI, and the other 2 are for
> > > mtime/mtimecmp.
> > > 
> > 
> > It does, but I am not sure how easy it is to support different
> > devices.
> > Supporting the SBI is not going to be an issue, more problematic
> > would
> > be if we have two different devices and device tree nodes to
> > implement
> > the functionality of the APIs. Now we have to bind this driver to
> > two
> > devices and call the APIs from the correct instantiation, which
> > would
> > not work.
> > 
> > Thinking about this a little more, I think the only issue is that
> > we
> > have both IPI- and mtime-related APIs in one driver. How about
> > something like this? Instead of binding this driver to
> > riscv,clint0, we
> > add a new misc driver for the clint0. The only thing the driver
> > does,
> > is to bind the syscon driver and the timer driver (see for example
> > tegra-car.c). Other architectures with separate device tree nodes
> > for
> > the API functionality won't need the misc driver and can just bind
> > the
> > devices to the syscon driver and a timer driver.
> > 
> 
> Sorry it took a long time before replying this. I did have a look at
> the tegra-car.c driver, and also tried various experiments. As Rick
> pointed out we have to handle mixed IP blocks like Andes chip for
> mtimer and IPIs. So it looks we need be able to flexibly handle the
> following cases (sigh):
> 
> - SiFive's clint model which implements mtimer and IPI
> - mtimer following SiFive's clint model, but IPI does not (Andes
> chip)
> - IPI following SiFive's clint model, but mtimer follows
> (hypothetical
> model which does not exist today)
> - completely different mtimer and IPI models from SiFive's clint
> model
> 

This really is not ideal. I don't think there is a nice way of handling
this since there is no way to detect which version we have. A cleaner
solution would be to get everyone to use separate compatible strings so
that we can load the correct driver or use the correct register
offsets.
I can't actually find a device node for the CLINT in the device tree of
Andes' chip. If they already use a different compatible string then
this should work.

>  I don't quite follow your idea of implementing clint as a misc
> driver, then binding syscon and timer devices in the misc driver. But
> I think we can only have the misc driver, and use misc uclass's
> ioctl() to implement the SBI required calls (set_timecmp, get_time,
> send_ipi), and we can have another ioctl code to report its
> capability
> to support mtimer and/or IPI functionality. This can support
> flexibility. However I believe this may affect performance if we go
> through many uclass function calls when doing SBI.
> 
> The solution does not look clean to me :(
> 

Yes I agree, that seems too complex. My idea was to only use the misc
driver to bind different sub-dev

Re: [U-Boot] [PATCH 05/21] sandbox: sysreset: Update to support power-on reset

2018-12-05 Thread sjg
If U-Boot is started from SPL or TPL, then those earlier phases deal with
the reset cause. On real hardware this cause may be lost once it is read.
Emulate that behaviour in sandbox by reporting a warm reset when a
previous phase has run since start-up.

Signed-off-by: Simon Glass 
---

 drivers/sysreset/sysreset_sandbox.c | 8 +++-
 test/dm/sysreset.c  | 4 ++--
 2 files changed, 9 insertions(+), 3 deletions(-)

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Re: [U-Boot] [PATCH v3 1/7] dm: serial: Add ->getconfig() callback

2018-12-05 Thread sjg
Hi Andy,

On Wed, 5 Dec 2018 at 07:01, Andy Shevchenko
 wrote:
>
> On Wed, Dec 05, 2018 at 05:55:37AM -0700, Simon Glass wrote:
> > On Tue, 27 Nov 2018 at 09:03, Andy Shevchenko
> >  wrote:
> > > On Mon, Nov 26, 2018 at 06:02:28PM -0700, Simon Glass wrote:
>
> > > The rest of similar functions are operate on top of current console 
> > > device and
> > > do not have such parameter, while being DM-based functions.
> > >
> > > I would gladly rebase my series on top any work which is done regard 
> > > above request.
> > > For now, I don't see such possibility.
> >
> > My point is that you are adding a new function which does not use
> > driver model properly. The serial_getconfig() function should have a
> > device parameter, and it should not support non-DM, since it is a new
> > feature.
>
> I understand that, OTOH I can repeat myself that this would be very
> inconsistent with preexisting set of the functions. In my opinion that must be
> fixed altogether either before or after, but at once.

I don't think we can do that until DM migration is complete. But
perhaps I am missing something.

>
> > I'm going to pick this up, absent any other issues, and see if I can
> > do a patch for it afterwards.
> >
> > Reviewed-by: Simon Glass 
>
> Thank you for review, and sorry for being persuader, I have several big tasks
> to be accomplished before my vacation starts.

So, given all my effort here, am I invited? :-)

Regards,
Simon

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Re: [U-Boot] [PATCH v3 6/7] x86: acpi: Add SPCR table description

2018-12-05 Thread sjg
Add SPCR table description as it provided in Linux kernel.

Port subtype for ACPI_DBG2_SERIAL_PORT is used as an interface type in SPCR.
Thus, provide a set of definitions to be utilized later.

Signed-off-by: Andy Shevchenko 
Reviewed-by: Bin Meng 
---
 arch/x86/include/asm/acpi_table.h | 49 +++
 1 file changed, 49 insertions(+)

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Re: [U-Boot] [PATCH 07/21] sandbox: Use 'extras' to specify 'head' files

2018-12-05 Thread sjg
At present sandbox has a start.o in the 'start' target but also includes
it in the normal target list. This is not how this is normally handled. It
is needed because sandbox does not include the u-boot-init variable in its
link rule.

Update the rule and move start.o from the normal target list to the
'extras' list.

Signed-off-by: Simon Glass 
---

 arch/sandbox/Makefile | 4 ++--
 arch/sandbox/config.mk| 3 ++-
 arch/sandbox/cpu/Makefile | 5 +++--
 3 files changed, 7 insertions(+), 5 deletions(-)

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Re: [U-Boot] [PATCH v3 2/7] dm: serial: Introduce ->getinfo() callback

2018-12-05 Thread sjg
On Tue, 20 Nov 2018 at 14:52, Andy Shevchenko
 wrote:
>
> New callback will give a necessary information to fill up ACPI SPCR table,
> for example. Maybe used later for other purposes.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  drivers/serial/sandbox.c   | 21 ++
>  drivers/serial/serial-uclass.c | 21 ++
>  include/common.h   |  3 +++
>  include/serial.h   | 40 ++
>  test/dm/serial.c   |  5 +
>  5 files changed, 90 insertions(+)

Reviewed-by: Simon Glass 

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Re: [U-Boot] [PATCH v3 4/7] serial: ns16550: Read reg-io-width from device tree

2018-12-05 Thread sjg
On Tue, 20 Nov 2018 at 14:52, Andy Shevchenko
 wrote:
>
> Cache the value of the reg-io-width property for the future use.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  drivers/serial/ns16550.c | 1 +
>  include/ns16550.h| 2 ++
>  2 files changed, 3 insertions(+)

Reviewed-by: Simon Glass 

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Re: [U-Boot] [PATCH 02/21] sandbox: Check the filename in jump_to_image_no_args()

2018-12-05 Thread sjg
If the filename is NULL this function currently crashes. Update it to fail
gracefully.

Signed-off-by: Simon Glass 
---

 arch/sandbox/cpu/spl.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

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Re: [U-Boot] [PATCH 10/21] tpm: Export tpm_clear_and_reenable()

2018-12-05 Thread sjg
This function is intended to be exported but is not. Add it to the header
file.

Signed-off-by: Simon Glass 
---

 include/tpm-common.h | 8 
 1 file changed, 8 insertions(+)

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Re: [U-Boot] [PATCH 15/21] input: i8042: Use remove() instead of exported functions

2018-12-05 Thread sjg
We should not have exported functions in a driver. The i8042_disable()
function is used to disable the keyboard. Provide a remove() method
instead, which is the standard way of disabling a device.

We could potentially add a method to flush input but that does not seem
necessary.

Signed-off-by: Simon Glass 
---

 drivers/input/i8042.c | 35 ---
 include/i8042.h   | 15 ---
 2 files changed, 20 insertions(+), 30 deletions(-)

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Re: [U-Boot] [PATCH v3 7/7] x86: acpi: Generate SPCR table

2018-12-05 Thread sjg
On Tue, 20 Nov 2018 at 14:52, Andy Shevchenko
 wrote:
>
> Microsoft specifies a SPCR (Serial Port Console Redirection Table) [1].
> Let's provide it in U-Boot.
>
> [1]: 
> https://docs.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
>
> Signed-off-by: Andy Shevchenko 
> ---
>  arch/x86/include/asm/acpi_table.h |   2 +
>  arch/x86/lib/acpi_table.c | 118 ++
>  2 files changed, 120 insertions(+)

Reviewed-by: Simon Glass 

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Re: [U-Boot] [PATCH] binman: Add myself as maintainer

2018-12-05 Thread sjg
Add an entry for my maintainership of this tool.

Signed-off-by: Simon Glass 
---

 MAINTAINERS | 5 +
 1 file changed, 5 insertions(+)

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Re: [U-Boot] [PATCH 13/21] cros: Correct a printf() string and comment

2018-12-05 Thread sjg
Correct a warning that occurs on sandbox. Also fix the comment style in
cros_ec_set_lid_shutdown_mask().

Signed-off-by: Simon Glass 
---

 drivers/misc/cros_ec.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

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Re: [U-Boot] [PATCH v3 3/7] serial: ns16550: Group reg_* members of ns16550_platdata

2018-12-05 Thread sjg
On Tue, 20 Nov 2018 at 14:52, Andy Shevchenko
 wrote:
>
> Group reg_* members of struct ns16550_platdata together for better 
> maintenance.
>
> No functional change intended.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  include/ns16550.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass 

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Re: [U-Boot] [PATCH 04/21] sandbox: net: Correct name copy in eth_raw_bus_post_bind()

2018-12-05 Thread sjg
We cannot be sure that the interface name takes up the full length of the
space available to it. Use strcpy() instead of memcpy() in this case. This
corrects a valgrind warning.

Signed-off-by: Simon Glass 
---

 drivers/net/sandbox-raw-bus.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH 3/3] buildman/toolchain.py: handle inconsistent tarball names

2018-12-05 Thread sjg
On Wed, Nov 28, 2018 at 2:38 PM Simon Glass  wrote:

> Hi Trevor,
>
> On Tue, 27 Nov 2018 at 17:51, Trevor Woerner  wrote:
> >
> > On Mon, Nov 26, 2018 at 8:06 PM Simon Glass  wrote:
> >>
> >> Reviewed-by: Simon Glass 
> >> But please use single quotes for strings.
> >
> >
> > I can send a v2 if you like?
>
> If you like, but I can fix it up when applying.
>
>
Yes, please go ahead and fix it up.

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Re: [U-Boot] [PATCH v3 5/7] serial: ns16550: Provide ->getinfo() implementation

2018-12-05 Thread sjg
On Tue, 20 Nov 2018 at 14:52, Andy Shevchenko
 wrote:
>
> New callback will supply necessary information, for example,
> to ACPI SPCR table.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  drivers/serial/ns16550.c | 20 
>  1 file changed, 20 insertions(+)

Reviewed-by: Simon Glass 

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Re: [U-Boot] [PATCH 01/21] sandbox: Fix up the debug message for the image filename

2018-12-05 Thread sjg
This currently prints out the wrong filename. Fix it.

Signed-off-by: Simon Glass 
---

 arch/sandbox/cpu/os.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH 12/21] tpm: Fix a logging warning in unpack_byte_string()

2018-12-05 Thread sjg
Fix the printf() string to avoid a warning.

Signed-off-by: Simon Glass 
---

 lib/tpm-common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH 09/21] tpm: Remove use of build-time TPM versions

2018-12-05 Thread sjg
There is only one place in the code which assumes at build-time that we
are using either a v1 or a v2 TPM. Fix this up and add a new function to
return the version of a TPM.

Supported TPM versions (v1 and v2) can be enabled independently and it is
possible to use both versions at once. This is useful for sandbox when
running tests.

Signed-off-by: Simon Glass 
---

 include/tpm-common.h | 11 +++
 lib/tpm-common.c |  7 +++
 lib/tpm-v1.c | 22 +++---
 3 files changed, 29 insertions(+), 11 deletions(-)

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Re: [U-Boot] [PATCH 06/21] sandbox: Zero the ram buffer on startup

2018-12-05 Thread sjg
At present the RAM buffer is not inited unless it is read from a file,
likely produced by an earlier phase of U-Boot. This causes valgrind
warnings whenever the RAM buffer is used. Correct this by initing it if
needed.

Signed-off-by: Simon Glass 
---

 arch/sandbox/cpu/start.c | 7 +++
 arch/sandbox/include/asm/state.h | 1 +
 2 files changed, 8 insertions(+)

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Re: [U-Boot] [PATCH 03/21] sandbox: physmem: Use mapping to support sandbox

2018-12-05 Thread sjg
Replace the raw cast with a map_sysmem() call so this code works with
sandbox.

Signed-off-by: Simon Glass 
---

 lib/physmem.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

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Re: [U-Boot] [PATCH 19/21] Add UINT32_MAX and UINT64_MAX

2018-12-05 Thread sjg
These constants are defined by stdint.h but not by kernel.h, which is
its stand-in in U-Boot. Add the definitions so that libraries which expect
stdint.h constants can work.

Signed-off-by: Simon Glass 
---

 include/linux/kernel.h | 4 
 1 file changed, 4 insertions(+)

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Re: [U-Boot] [PATCH 11/21] tpm: Add non-volatile index attributes needed for v2

2018-12-05 Thread sjg
Version-2 TPMs support attributes for nvdata. Add definitions to the
header file so that clients can use it.

Signed-off-by: Simon Glass 
---

 include/tpm-v2.h | 33 +
 1 file changed, 33 insertions(+)

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Re: [U-Boot] [PATCH] dm: rtc: Fix function name in comment

2018-12-05 Thread sjg
On 11/25/18 7:32 PM, Philipp Tomsich wrote:
> The documentation comment for dm_rtc_set was referring to dm_rtc_put
> instead. Fix it.
>
> Signed-off-by: Philipp Tomsich 
> ---
>
>  include/rtc.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
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Re: [U-Boot] [PATCH 14/21] cros_ec: Adjust to use v1 vboot context only

2018-12-05 Thread sjg
At present there are no users of the 64-byte v2 context. The v1 context is
only 16 bytes long and currently an error is raised if too much data is
returned from the EC.

Update the code to limit the size to 16 bytes.

Signed-off-by: Simon Glass 
---

 drivers/misc/cros_ec_sandbox.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

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Re: [U-Boot] [PATCH 20/21] Add inttypes.h

2018-12-05 Thread sjg
Even if U-Boot does not use this, some libraries do. Add back this header
file so that the build does not fall back to using the host version, which
may include stdint.h and break the build due to conflicts with uint64_t,
etc.

This partially reverts commit dee37fc99d94 ("Remove  includes
and PRI* usages in printf() entirely")

The only change from the file that was in U-Boot until recently is that it
now comes twice as close to passing checkpatch. The remaining warnings
pertain to the typedefs, which checkpatch does not like.

Signed-off-by: Simon Glass 
---

 include/inttypes.h | 271 +
 1 file changed, 271 insertions(+)
 create mode 100644 include/inttypes.h

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Re: [U-Boot] [PATCH 16/21] video: backlight: Fix log message in enable_sequence()

2018-12-05 Thread sjg
On Fri, 23 Nov 2018 21:29:39 -0700
Simon Glass s...@chromium.org wrote:

> This has an extra argument. Remove it.
>
> Signed-off-by: Simon Glass 

Acked-by: Anatolij Gustschin 


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Re: [U-Boot] [PATCH 17/21] time: Update mdelay() to delay in one large chunk

2018-12-05 Thread sjg
The current function delays in one millisecond at a time. This does not
work well on sandbox since it results in lots of calls to usleep(1000) in
a tight loop. This makes the sleep duration quite variable since each call
results in a sleep of *at least* 1000us, but possibly more. Depending on
how busy the machine is, the sleep time can change quite a bit.

We cannot fix this in general, but we can reduce the effect by doing a
single sleep. The multiplication works fine with an unsigned long argument
up until a sleep time of about 4m milliseconds. This is over an hour and
we can be sure that delays of that length are not useful.

Update the mdelay() function to call udelay() only once with the
calculated delay value.

Signed-off-by: Simon Glass 
---

 include/linux/delay.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

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Re: [U-Boot] [PATCH v3 1/1] dm: core: add functions to get/remap I/O addresses by name

2018-12-05 Thread sjg
On Mon, 3 Dec 2018 at 11:37, Álvaro Fernández Rojas  wrote:
>
> This functions allow us to get and remap I/O addresses by name, which is 
> useful when there are multiple reg addresses indexed by reg-names property.
> This is needed in bmips dma/eth patch series, but can also be used on many
> other drivers.
>
> Signed-off-by: Álvaro Fernández Rojas 
> ---
>  v3: add commit message
>  v2: add remap tests
>
>  arch/sandbox/dts/test.dts |  1 +
>  drivers/core/fdtaddr.c| 10 ++
>  drivers/core/read.c   | 20 
>  include/dm/fdtaddr.h  | 13 
>  include/dm/read.h | 36 +
>  test/dm/test-fdt.c| 82 
> +--
>  6 files changed, 160 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass 

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Re: [U-Boot] [PATCH] dm: (re)sort uclass ids alphabetically

2018-12-05 Thread sjg
The comment in uclass-id.h states that
"U-Boot uclasses start here - in alphabetical order"
but the subsequent list is not sorted alphabetically.
This reestablishes order.

Signed-off-by: Philipp Tomsich 
---

 include/dm/uclass-id.h | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

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Re: [U-Boot] [PATCH 0/5] dm: serial: Fix up some serial API errors

2018-12-05 Thread Andy Shevchenko
On Wed, Dec 5, 2018 at 9:54 PM Simon Glass  wrote:
>
> New serial functions should use a device pointer as the first argument.
> The old functions are only there for backwards compatibilty, and can be
> adjusted soon.
>
> For now, adjust the new functions to work correctly.
>

Thanks!
I'm not sure I would be able to test it, but you may use my
Reviewed-by: Andy Shevchenko 

Couple of remarks:
- I think it make sense to try for serial device only once in
acpi_create_spcr() if I'm reading result correctly
- the setconfig() / getconfig() have both some staled comments, it
seems you dropped only for one.



> Simon Glass (5):
>   serial: Move new functions to serial.h
>   dm: serial: Adjust serial_getconfig() to use proper API
>   dm: serial: Adjust serial_setconfig() to use proper API
>   dm: serial: Adjust serial_getinfo() to use proper API
>   dm: serial: Tidy up header file comments
>
>  arch/x86/lib/acpi_table.c  | 11 +++
>  drivers/serial/serial-uclass.c | 27 +
>  include/common.h   |  5 -
>  include/serial.h   | 36 +++---
>  test/dm/serial.c   | 19 ++
>  5 files changed, 60 insertions(+), 38 deletions(-)
>
> --
> 2.20.0.rc1.387.gf8505762e3-goog
>
> ___
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Andy Shevchenko
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Re: [U-Boot] [RFC PATCH v2 00/11] SF: Migrate to Linux SPI NOR framework

2018-12-05 Thread Simon Goldschmidt

Am 05.12.2018 um 07:55 schrieb Simon Goldschmidt:

On Wed, Dec 5, 2018 at 7:51 AM Vignesh R  wrote:


On 05/12/18 1:41 AM, Simon Goldschmidt wrote:

Am 04.12.2018 um 13:55 schrieb Boris Brezillon:

On Tue, 4 Dec 2018 17:56:48 +0530
Vignesh R  wrote:


U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB space.
Also, many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
flashes but sf layer isn't using that.
This patch series syncs SPI NOR framework from Linux v4.19. It also adds
spi-mem support on top.
So, we gain 4byte addressing support and SFDP support. This makes
migrating to U-Boot MTD framework easier.


Glad to see that happen sooner than I had expected. Looks like the
patch series is in a good shape already, and I'm happy to see the
u-boot spi-nor layer being based on the Linux one.




Good job, and thanks again for working on that!


Right, I do appreciate this!



Thanks!


I did some compilation tests first and I'm happy to say that with the
SPL_SPI_FLASH_TINY option enabled, my SPL is about 1900 byte smaller
than before :-)

However, my socfpga socrates board does not boot. I'll have to
investigate why. I just applied this series and compiled for
socfpga_socrates_defconfig. Is there anything else I should have changed
to make it work?



Oops, that's unfortunate.
Just to be sure, does SPL fail to come up or SPL fails to load U-Boot
from flash? Is this with SPL_SPI_FLASH_TINY enabled?


I tried both TINY and standard. Both are failing to load U-Boot (I get
the standard error message that loading from SPI flash failed).


Could you enable debug prints at the end of spi_mem_exec_op() in
drivers/spi/spi-mem.c to see what commands are sent and their responses?


OK, I'll do that.


I have TI EVM with Cadence QSPI(like SoCFPGA) but with a Spansion flash
and that seems to work fine with both full and tiny stack.


OK, so I enabled some debugging and the first issue is that U-Boot has 
SNOR_MFR_MICRON and SNOR_MFR_ST while Linux only has SNOR_MFR_MICRON but 
defines it to CFI_MFR_ST (0x20, U-Boot ends up with 0x2c). While this 
might be correct, it leads to my n25q256a not being handled as 
"micron-like" and the code falls through to using Spansion-like opcode 
(0x17) that my chip does not understand.


However, after changing this (and using opcode 0xb7 to bring the chip 
into 4 byte mode, including 0x06 for write-enable), it still does not 
work as it uses the 'READ' opcode 0x03 instead of the 'FAST READ' opcode 
0x0b that U-Boot used until now. The problem here might be that 'READ' 
cannot do Quad-SPI (4-4-4) and I'm not sure the Cadence driver can 
handle Extended-SPI (1-1-1) that the 'READ' command is limited to...


Using SFDP would probably help, but that doesn't compile (as I wrote in 
the other thread).


On the other hand, enabling SFDP will increase the text/rodata size for 
SPL. We might need to remove the non-SFDP and write code as a counter 
measure to prevent increasing code size.


Regards,
Simon
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Re: [U-Boot] boot.bin on SD Card for SAMA5D3 Xplained

2018-12-05 Thread Robert Nelson
On Wed, Dec 5, 2018 at 8:37 AM  wrote:
>
>
>
> On 05.12.2018 02:15, Daniel Evans wrote:
> > Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 
> > xplained board.  All I get is RomBOOT and no other messages.  I have tried 
> > throwing in a couple test pins to toggle in board_early_init_f but still 
> > not getting any debug.  I can get at91bootstrap to produce a boot.bin that 
> > works on the sama5d3 xplained so I am assuming I don’t have a bad board.  
> > My boot partition is FAT16.  To compile I just run the following on Debian 
> > Buster :
> >
> > make mrproper
> > make sama5d3_xplained_mmc_defconfig
> > make
> >
> > Cross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf
> >
> > When finished compiling I just copy the boot.bin to my BOOT partition.
> >
> > Has to be something obvious that I am missing.  Any insight is appreciated…
>
> Hello,
>
> Check the datasheet for sama5d3 SoC section 11.4.3. - Valid code
> detection (my datasheet is dated 2 Feb 2016 if it helps)
>
> Basically the vector 6 needs to have hardcoded the binary size. Are you
> doing that ? Otherwise the RomBOOT code will consider your binary as faulty.
>
> PS. make sure endianess is right, use a good hexeditor...
>
> Hope this helps,
> Eugen

Okay, just finished my git bisect, this turned out to be a miss-placed
#endif when Wenyou did the "configs: at91: Remove
CONFIG_SYS_EXTRA_OPTIONS assignment" patch:

https://github.com/u-boot/u-boot/commit/5541543f686b43210fb92181003ff7175d4ab036#diff-651b6ffe22be4df459343a0d6d25154e

=> RomBOOT

U-Boot spl 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600)
Trying to boot from MMC1


U-Boot 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600)



diff --git a/include/configs/sama5d3_xplained.h
b/include/configs/sama5d3_xplained.h
index d0d8087ca3..f87713319d 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -80,7 +80,6 @@
 #elif CONFIG_NAND_BOOT
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_BASE
-#endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS0x4
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE  0x800
@@ -91,3 +90,5 @@
 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

 #endif
+
+#endif

Before:
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"

#elif CONFIG_SYS_USE_NANDFLASH
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x2
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

#endif

After:
#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"

#elif CONFIG_NAND_BOOT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#endif
<- WHY HERE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x2
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

#endif

Regards,

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[U-Boot] [PATCH 5/5] dm: serial: Tidy up header file comments

2018-12-05 Thread Simon Glass
The getconfig() comment is out of date. Fix this and add comments for
recently added functions.

Signed-off-by: Simon Glass 
---

 include/serial.h | 32 +---
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/include/serial.h b/include/serial.h
index 8a790ccaaf4..7acf781ebb8 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -235,9 +235,7 @@ struct dm_serial_ops {
 * Get a current config for this device.
 *
 * @dev: Device pointer
-* @parity: parity to use
-* @bits: bits number to use
-* @stop: stop bits number to use
+* @serial_config: Returns config information (see SERIAL_... above)
 * @return 0 if OK, -ve on error
 */
int (*getconfig)(struct udevice *dev, uint *serial_config);
@@ -281,8 +279,36 @@ struct serial_dev_priv {
 /* Access the serial operations for a device */
 #define serial_get_ops(dev)((struct dm_serial_ops *)(dev)->driver->ops)
 
+/**
+ * serial_getconfig() - Get the uart configuration
+ * (parity, 5/6/7/8 bits word length, stop bits)
+ *
+ * Get a current config for this device.
+ *
+ * @dev: Device pointer
+ * @serial_config: Returns config information (see SERIAL_... above)
+ * @return 0 if OK, -ve on error
+ */
 int serial_getconfig(struct udevice *dev, uint *config);
+
+/**
+ * serial_setconfig() - Set up the uart configuration
+ * (parity, 5/6/7/8 bits word length, stop bits)
+ *
+ * Set up a new config for this device.
+ *
+ * @dev: Device pointer
+ * @serial_config: number of bits, parity and number of stopbits to use
+ * @return 0 if OK, -ve on error
+ */
 int serial_setconfig(struct udevice *dev, uint config);
+
+/**
+ * serial_getinfo() - Get serial device information
+ *
+ * @dev: Device pointer
+ * @info: struct serial_device_info to fill
+ */
 int serial_getinfo(struct udevice *dev, struct serial_device_info *info);
 
 void atmel_serial_initialize(void);
-- 
2.20.0.rc1.387.gf8505762e3-goog

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[U-Boot] [PATCH 2/5] dm: serial: Adjust serial_getconfig() to use proper API

2018-12-05 Thread Simon Glass
All driver-model functions should have a device as the first parameter.
Update this function accordingly.

Signed-off-by: Simon Glass 
---

 arch/x86/lib/acpi_table.c  | 5 -
 drivers/serial/serial-uclass.c | 9 +++--
 include/serial.h   | 2 +-
 test/dm/serial.c   | 4 ++--
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 79bc2000bda..bfcf2adbf12 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -342,6 +342,7 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
struct acpi_table_header *header = &(spcr->header);
struct serial_device_info serial_info = {0};
ulong serial_address, serial_offset;
+   struct udevice *dev;
uint serial_config;
uint serial_width;
int access_size;
@@ -431,7 +432,9 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
break;
}
 
-   ret = serial_getconfig(&serial_config);
+   ret = uclass_first_device_err(UCLASS_SERIAL, &dev);
+   if (!ret)
+   ret = serial_getconfig(dev, &serial_config);
if (ret)
serial_config = SERIAL_DEFAULT_CONFIG;
 
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index ffcd6d15af2..81f1067f422 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -294,16 +294,13 @@ void serial_setbrg(void)
ops->setbrg(gd->cur_serial_dev, gd->baudrate);
 }
 
-int serial_getconfig(uint *config)
+int serial_getconfig(struct udevice *dev, uint *config)
 {
struct dm_serial_ops *ops;
 
-   if (!gd->cur_serial_dev)
-   return 0;
-
-   ops = serial_get_ops(gd->cur_serial_dev);
+   ops = serial_get_ops(dev);
if (ops->getconfig)
-   return ops->getconfig(gd->cur_serial_dev, config);
+   return ops->getconfig(dev, config);
 
return 0;
 }
diff --git a/include/serial.h b/include/serial.h
index fa7e0130bd2..5ba031ab534 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -281,7 +281,7 @@ struct serial_dev_priv {
 /* Access the serial operations for a device */
 #define serial_get_ops(dev)((struct dm_serial_ops *)(dev)->driver->ops)
 
-int serial_getconfig(uint *config);
+int serial_getconfig(struct udevice *dev, uint *config);
 int serial_setconfig(uint config);
 int serial_getinfo(struct serial_device_info *info);
 
diff --git a/test/dm/serial.c b/test/dm/serial.c
index 19a15d5d952..972755face3 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -24,7 +24,7 @@ static int dm_test_serial(struct unit_test_state *uts)
 * sandbox_serial driver
 */
ut_assertok(serial_setconfig(SERIAL_DEFAULT_CONFIG));
-   ut_assertok(serial_getconfig(&value_serial));
+   ut_assertok(serial_getconfig(dev_serial, &value_serial));
ut_assert(value_serial == SERIAL_DEFAULT_CONFIG);
ut_assertok(serial_getinfo(&info_serial));
ut_assert(info_serial.type == SERIAL_CHIP_UNKNOWN);
@@ -32,7 +32,7 @@ static int dm_test_serial(struct unit_test_state *uts)
/*
 * test with a parameter which is NULL pointer
 */
-   ut_asserteq(-EINVAL, serial_getconfig(NULL));
+   ut_asserteq(-EINVAL, serial_getconfig(dev_serial, NULL));
ut_asserteq(-EINVAL, serial_getinfo(NULL));
/*
 * test with a serial config which is not supported by
-- 
2.20.0.rc1.387.gf8505762e3-goog

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[U-Boot] [PATCH 1/5] serial: Move new functions to serial.h

2018-12-05 Thread Simon Glass
We should not be adding new functions to common.h. Move these recently
added functions to serial.h.

Signed-off-by: Simon Glass 
---

 include/common.h | 5 -
 include/serial.h | 4 
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/include/common.h b/include/common.h
index 20c99da1aa9..43d348b67c9 100644
--- a/include/common.h
+++ b/include/common.h
@@ -357,8 +357,6 @@ void smp_set_core_boot_addr(unsigned long addr, int corenr);
 void smp_kick_all_cpus(void);
 
 /* $(CPU)/serial.c */
-struct serial_device_info;
-
 intserial_init   (void);
 void   serial_setbrg (void);
 void   serial_putc   (const char);
@@ -366,9 +364,6 @@ voidserial_putc_raw(const char);
 void   serial_puts   (const char *);
 intserial_getc   (void);
 intserial_tstc   (void);
-intserial_getconfig(uint *config);
-intserial_setconfig(uint config);
-intserial_getinfo(struct serial_device_info *info);
 
 /* $(CPU)/speed.c */
 intget_clocks (void);
diff --git a/include/serial.h b/include/serial.h
index c1a9fee250e..fa7e0130bd2 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -281,6 +281,10 @@ struct serial_dev_priv {
 /* Access the serial operations for a device */
 #define serial_get_ops(dev)((struct dm_serial_ops *)(dev)->driver->ops)
 
+int serial_getconfig(uint *config);
+int serial_setconfig(uint config);
+int serial_getinfo(struct serial_device_info *info);
+
 void atmel_serial_initialize(void);
 void mcf_serial_initialize(void);
 void mpc85xx_serial_initialize(void);
-- 
2.20.0.rc1.387.gf8505762e3-goog

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[U-Boot] [PATCH 3/5] dm: serial: Adjust serial_setconfig() to use proper API

2018-12-05 Thread Simon Glass
All driver-model functions should have a device as the first parameter.
Update this function accordingly.

Signed-off-by: Simon Glass 
---

 drivers/serial/serial-uclass.c |  9 +++--
 include/serial.h   |  2 +-
 test/dm/serial.c   | 11 +++
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 81f1067f422..669c82f3793 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -305,16 +305,13 @@ int serial_getconfig(struct udevice *dev, uint *config)
return 0;
 }
 
-int serial_setconfig(uint config)
+int serial_setconfig(struct udevice *dev, uint config)
 {
struct dm_serial_ops *ops;
 
-   if (!gd->cur_serial_dev)
-   return 0;
-
-   ops = serial_get_ops(gd->cur_serial_dev);
+   ops = serial_get_ops(dev);
if (ops->setconfig)
-   return ops->setconfig(gd->cur_serial_dev, config);
+   return ops->setconfig(dev, config);
 
return 0;
 }
diff --git a/include/serial.h b/include/serial.h
index 5ba031ab534..8a05a090898 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -282,7 +282,7 @@ struct serial_dev_priv {
 #define serial_get_ops(dev)((struct dm_serial_ops *)(dev)->driver->ops)
 
 int serial_getconfig(struct udevice *dev, uint *config);
-int serial_setconfig(uint config);
+int serial_setconfig(struct udevice *dev, uint config);
 int serial_getinfo(struct serial_device_info *info);
 
 void atmel_serial_initialize(void);
diff --git a/test/dm/serial.c b/test/dm/serial.c
index 972755face3..f82b4a19e8f 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -23,7 +23,7 @@ static int dm_test_serial(struct unit_test_state *uts)
 * test with default config which is the only one supported by
 * sandbox_serial driver
 */
-   ut_assertok(serial_setconfig(SERIAL_DEFAULT_CONFIG));
+   ut_assertok(serial_setconfig(dev_serial, SERIAL_DEFAULT_CONFIG));
ut_assertok(serial_getconfig(dev_serial, &value_serial));
ut_assert(value_serial == SERIAL_DEFAULT_CONFIG);
ut_assertok(serial_getinfo(&info_serial));
@@ -39,7 +39,8 @@ static int dm_test_serial(struct unit_test_state *uts)
 * sandbox_serial driver: test with wrong parity
 */
ut_asserteq(-ENOTSUPP,
-   serial_setconfig(SERIAL_CONFIG(SERIAL_PAR_ODD,
+   serial_setconfig(dev_serial,
+SERIAL_CONFIG(SERIAL_PAR_ODD,
   SERIAL_8_BITS,
   SERIAL_ONE_STOP)));
/*
@@ -47,7 +48,8 @@ static int dm_test_serial(struct unit_test_state *uts)
 * sandbox_serial driver: test with wrong bits number
 */
ut_asserteq(-ENOTSUPP,
-   serial_setconfig(SERIAL_CONFIG(SERIAL_PAR_NONE,
+   serial_setconfig(dev_serial,
+SERIAL_CONFIG(SERIAL_PAR_NONE,
   SERIAL_6_BITS,
   SERIAL_ONE_STOP)));
 
@@ -56,7 +58,8 @@ static int dm_test_serial(struct unit_test_state *uts)
 * sandbox_serial driver: test with wrong stop bits number
 */
ut_asserteq(-ENOTSUPP,
-   serial_setconfig(SERIAL_CONFIG(SERIAL_PAR_NONE,
+   serial_setconfig(dev_serial,
+SERIAL_CONFIG(SERIAL_PAR_NONE,
   SERIAL_8_BITS,
   SERIAL_TWO_STOP)));
 
-- 
2.20.0.rc1.387.gf8505762e3-goog

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[U-Boot] [PATCH 4/5] dm: serial: Adjust serial_getinfo() to use proper API

2018-12-05 Thread Simon Glass
All driver-model functions should have a device as the first parameter.
Update this function accordingly.

Signed-off-by: Simon Glass 
---

 arch/x86/lib/acpi_table.c  | 10 +-
 drivers/serial/serial-uclass.c |  9 +++--
 include/serial.h   |  2 +-
 test/dm/serial.c   |  4 ++--
 4 files changed, 11 insertions(+), 14 deletions(-)

diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index bfcf2adbf12..cc7bbfa1436 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -354,7 +354,9 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
header->length = sizeof(struct acpi_spcr);
header->revision = 2;
 
-   ret = serial_getinfo(&serial_info);
+   ret = uclass_first_device_err(UCLASS_SERIAL, &dev);
+   if (!ret)
+   ret = serial_getinfo(dev, &serial_info);
if (ret)
serial_info.type = SERIAL_CHIP_UNKNOWN;
 
@@ -432,11 +434,9 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
break;
}
 
-   ret = uclass_first_device_err(UCLASS_SERIAL, &dev);
-   if (!ret)
+   serial_config = SERIAL_DEFAULT_CONFIG;
+   if (dev)
ret = serial_getconfig(dev, &serial_config);
-   if (ret)
-   serial_config = SERIAL_DEFAULT_CONFIG;
 
spcr->parity = SERIAL_GET_PARITY(serial_config);
spcr->stop_bits = SERIAL_GET_STOP(serial_config);
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 669c82f3793..d4488a2cc28 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -316,21 +316,18 @@ int serial_setconfig(struct udevice *dev, uint config)
return 0;
 }
 
-int serial_getinfo(struct serial_device_info *info)
+int serial_getinfo(struct udevice *dev, struct serial_device_info *info)
 {
struct dm_serial_ops *ops;
 
-   if (!gd->cur_serial_dev)
-   return -ENODEV;
-
if (!info)
return -EINVAL;
 
info->baudrate = gd->baudrate;
 
-   ops = serial_get_ops(gd->cur_serial_dev);
+   ops = serial_get_ops(dev);
if (ops->getinfo)
-   return ops->getinfo(gd->cur_serial_dev, info);
+   return ops->getinfo(dev, info);
 
return -EINVAL;
 }
diff --git a/include/serial.h b/include/serial.h
index 8a05a090898..8a790ccaaf4 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -283,7 +283,7 @@ struct serial_dev_priv {
 
 int serial_getconfig(struct udevice *dev, uint *config);
 int serial_setconfig(struct udevice *dev, uint config);
-int serial_getinfo(struct serial_device_info *info);
+int serial_getinfo(struct udevice *dev, struct serial_device_info *info);
 
 void atmel_serial_initialize(void);
 void mcf_serial_initialize(void);
diff --git a/test/dm/serial.c b/test/dm/serial.c
index f82b4a19e8f..3d741a8c363 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -26,14 +26,14 @@ static int dm_test_serial(struct unit_test_state *uts)
ut_assertok(serial_setconfig(dev_serial, SERIAL_DEFAULT_CONFIG));
ut_assertok(serial_getconfig(dev_serial, &value_serial));
ut_assert(value_serial == SERIAL_DEFAULT_CONFIG);
-   ut_assertok(serial_getinfo(&info_serial));
+   ut_assertok(serial_getinfo(dev_serial, &info_serial));
ut_assert(info_serial.type == SERIAL_CHIP_UNKNOWN);
ut_assert(info_serial.addr == SERIAL_DEFAULT_ADDRESS);
/*
 * test with a parameter which is NULL pointer
 */
ut_asserteq(-EINVAL, serial_getconfig(dev_serial, NULL));
-   ut_asserteq(-EINVAL, serial_getinfo(NULL));
+   ut_asserteq(-EINVAL, serial_getinfo(dev_serial, NULL));
/*
 * test with a serial config which is not supported by
 * sandbox_serial driver: test with wrong parity
-- 
2.20.0.rc1.387.gf8505762e3-goog

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[U-Boot] [PATCH 0/5] dm: serial: Fix up some serial API errors

2018-12-05 Thread Simon Glass
New serial functions should use a device pointer as the first argument.
The old functions are only there for backwards compatibilty, and can be
adjusted soon.

For now, adjust the new functions to work correctly.


Simon Glass (5):
  serial: Move new functions to serial.h
  dm: serial: Adjust serial_getconfig() to use proper API
  dm: serial: Adjust serial_setconfig() to use proper API
  dm: serial: Adjust serial_getinfo() to use proper API
  dm: serial: Tidy up header file comments

 arch/x86/lib/acpi_table.c  | 11 +++
 drivers/serial/serial-uclass.c | 27 +
 include/common.h   |  5 -
 include/serial.h   | 36 +++---
 test/dm/serial.c   | 19 ++
 5 files changed, 60 insertions(+), 38 deletions(-)

-- 
2.20.0.rc1.387.gf8505762e3-goog

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[U-Boot] Pull request: u-boot-spi/master

2018-12-05 Thread Jagan Teki
Hi Tom,

Please pull this PR.

thanks,
Jagan.

The following changes since commit a3e1653ddeb02f39481eba572275016171e9670c:

  Merge git://git.denx.de/u-boot-marvell (2018-11-20 12:39:16 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-spi.git master

for you to fetch changes up to 08898e8b22d74a4511eadee9b06b11aab43e809c:

  mtd: sf: Make sf_mtd.c more robust (2018-12-06 00:45:36 +0530)


Boris Brezillon (11):
  mtd: Add a function to report when the MTD dev list has been updated
  mtd: Parse mtdparts/mtdids again when the MTD list has been updated
  mtd: Delete partitions attached to the device when a device is deleted
  mtd: sf: Make sure we don't register the same device twice
  mtd: Use get_mtdids() instead of env_get("mtdids") in 
mtd_search_alternate_name()
  mtd: Be more strict on the "mtdparts=" prefix check
  mtd: Make sure the name passed in mtdparts fits in mtd_name[]
  mtd: Make sure we don't parse MTD partitions belonging to another dev
  mtd: Don't stop MTD partition creation when it fails on one device
  mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
  mtd: sf: Make sf_mtd.c more robust

Christophe Leroy (1):
  spi: mpc8xx: Migrate to DM_SPI

Guochun Mao (1):
  spi: mtk_qspi: add qspi driver for MT7629 SoC

Jagan Teki (8):
  spi: pl022: Simplify platdata code
  spi: pl022: Drop unnecessary include files
  dm: platform_data: spi: s/pl022_spi.h/spi_pl022.h
  spi: Remove unused spi_init
  spi: Remove used spi_init
  spi: Remove unused mpc8xx code
  spi: Zap CONFIG_HARD_SPI
  board_r: Remove initr_spi

Miquel Raynal (3):
  mtd: nand: pxa3xx: add raw read support
  mtd: nand: pxa3xx: re-read a page in raw mode on uncorrectable error
  mtd: rawnand: pxa3xx: fix 2kiB pages with 8b strength chips layout

Neil Armstrong (3):
  regmap: add regmap_read_poll_timeout() helper
  test: regmap: add regmap_read_poll_timeout test
  spi: Add Amlogic Meson SPI Flash Controller driver

Stefan Roese (1):
  cmd: ubi: Make ubi_detach() static

 README |   8 -
 arch/powerpc/include/asm/config.h  |   7 -
 board/freescale/mpc8349emds/mpc8349emds.c  |   2 +-
 board/ids/ids8313/ids8313.c|   2 +-
 cmd/eeprom.c   |  15 +-
 cmd/ubi.c  |   5 +-
 common/board_f.c   |  14 -
 common/board_r.c   |  18 --
 doc/driver-model/spi-howto.txt |   5 -
 drivers/mtd/mtd_uboot.c| 185 +++
 drivers/mtd/mtdcore.c  |  23 +-
 drivers/mtd/mtdpart.c  |  12 +
 drivers/mtd/nand/raw/pxa3xx_nand.c | 143 ++--
 drivers/mtd/spi/sf_mtd.c   |  48 ++-
 drivers/mtd/spi/sf_probe.c |   9 +
 drivers/net/e1000_spi.c|   3 -
 drivers/spi/Kconfig|  27 +-
 drivers/spi/Makefile   |   2 +
 drivers/spi/atmel_spi.c|   5 -
 drivers/spi/davinci_spi.c  |   5 -
 drivers/spi/fsl_dspi.c |   5 -
 drivers/spi/fsl_espi.c |   5 -
 drivers/spi/lpc32xx_ssp.c  |   9 -
 drivers/spi/meson_spifc.c  | 320 ++
 drivers/spi/mpc8xx_spi.c   | 179 ++
 drivers/spi/mtk_qspi.c | 359 +
 drivers/spi/mxc_spi.c  |   4 -
 drivers/spi/mxs_spi.c  |   4 -
 drivers/spi/omap3_spi.c|   5 -
 drivers/spi/pl022_spi.c|  55 ++--
 drivers/spi/sh_qspi.c  |   5 -
 drivers/spi/sh_spi.c   |   4 -
 drivers/spi/soft_spi_legacy.c  |   7 -
 examples/standalone/atmel_df_pow2.c|   2 -
 include/_exports.h |   2 -
 include/common.h   |   7 -
 include/configs/M52277EVB.h|   1 -
 include/configs/M54418TWR.h|   1 -
 include/configs/M54451EVB.h|   1 -
 include/configs/M54455EVB.h|   1 -
 include/configs/MPC8536DS.h|   5 -
 include/configs/P1022DS.h  |   6 -
 include/configs/UCP1020.h  |   5 -
 include/configs/controlcenterd.h   |   4 -
 include/configs/dreamplug.h|   1 -
 include/configs/ds109.h   

Re: [U-Boot] [PATCH v4 00/11] mtd/sf: Various fixes

2018-12-05 Thread Jagan Teki
On Sun, Dec 2, 2018 at 3:25 PM Boris Brezillon
 wrote:
>
> Hello,
>
> This is the 4th version of the mtd / sf fixes patchset. This v4 just
> adds a new check in del_mtd_device() (and a debug() when
> del_mtd_partitions() fails).
>
> Regards,
>
> Boris
>
> P.S.: travis-ci results =>
>   https://travis-ci.org/bbrezillon/u-boot/builds/461943011
>
> Boris Brezillon (11):
>   mtd: Add a function to report when the MTD dev list has been updated
>   mtd: Parse mtdparts/mtdids again when the MTD list has been updated
>   mtd: Delete partitions attached to the device when a device is deleted
>   mtd: sf: Make sure we don't register the same device twice
>   mtd: Use get_mtdids() instead of env_get("mtdids") in
> mtd_search_alternate_name()
>   mtd: Be more strict on the "mtdparts=" prefix check
>   mtd: Make sure the name passed in mtdparts fits in mtd_name[]
>   mtd: Make sure we don't parse MTD partitions belonging to another dev
>   mtd: Don't stop MTD partition creation when it fails on one device
>   mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
>   mtd: sf: Make sf_mtd.c more robust

Applied to u-boot-spi/master
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[U-Boot] [PATCH] defconfigs: am335x_hs_evm: Sync HS and non-HS defconfigs

2018-12-05 Thread Andrew F. Davis
Sync new additions to non-HS defconfig with HS defconfig.

Signed-off-by: Andrew F. Davis 
---
 configs/am335x_hs_evm_defconfig  |  8 +++-
 configs/am335x_hs_evm_uart_defconfig | 13 +++--
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index aa6e9665d2..1a7c5cfb17 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -1,6 +1,4 @@
 CONFIG_ARM=y
-# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_TI_SECURE_DEVICE=y
 CONFIG_TI_COMMON_CMD_OPTIONS=y
@@ -8,10 +6,11 @@ CONFIG_AM33XX=y
 CONFIG_ISW_ENTRY_ADDR=0x40300350
 CONFIG_SPL=y
 CONFIG_DISTRO_DEFAULTS=y
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run 
findfdt; run init_console; run envboot; run distro_bootcmd"
 CONFIG_LOGLEVEL=3
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_VERSION_VARIABLE=y
@@ -47,9 +46,9 @@ CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
-CONFIG_DRIVER_TI_CPSW=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
+CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
@@ -60,7 +59,6 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_MUSB_TI=y
 CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
diff --git a/configs/am335x_hs_evm_uart_defconfig 
b/configs/am335x_hs_evm_uart_defconfig
index 379b9580a2..7c36f2f4d0 100644
--- a/configs/am335x_hs_evm_uart_defconfig
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -12,9 +12,13 @@ CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run 
findfdt; run init_console; run envboot; run distro_bootcmd"
+CONFIG_LOGLEVEL=3
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_FIT_IMAGE_TINY=y
 # CONFIG_SPL_ENV_SUPPORT is not set
 # CONFIG_SPL_EXT_SUPPORT is not set
 CONFIG_SPL_MTD_SUPPORT=y
@@ -39,14 +43,15 @@ CONFIG_DFU_RAM=y
 CONFIG_DM_I2C=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
+# CONFIG_MMC_HW_PARTITIONING is not set
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
-CONFIG_DRIVER_TI_CPSW=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
+CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
@@ -57,8 +62,12 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_MUSB_TI=y
 CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_ETHER=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y
 CONFIG_LZO=y
-- 
2.19.1

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Re: [U-Boot] boot.bin on SD Card for SAMA5D3 Xplained

2018-12-05 Thread Daniel Evans
Thanks,

That put me on the right path.  For some reason the nandheader is being added 
to the top of the boot.bin for the mmc/SD build.

$ ls -l boot.bin
-rw-r--r-- 1 nelson nelson 62686 Dec  5 12:25 boot.bin
$ hexdump boot.bin | head
000 2405 c090 2405 c090 2405 c090 2405 c090
*
0d0 000f ea00 f014 e59f f014 e59f f014 e59f
0e0 f014 e59f f40e  f014 e59f f014 e59f
0f0 0040 0030 0040 0030 0040 0030 0040 0030
100 0040 0030 0040 0030 0040 0030 beef dead
110 fffe eaff 002a ea00  e10f 101f e200
120 001a e331 001f 13c0 0013 1380 00c0 e380
130 f000 e129 0f10 ee11 0a02 e3c0 0f10 ee01
140 0078 e59f 0f10 ee0c 0006 eb00 001a eb00

So I just removed it and then you can see the size is correct once removed 
(0xF40E):

$ dd bs=208 skip=1 if=boot.bin of=bootShort.bin
$ hexdump bootShort.bin | head
000 000f ea00 f014 e59f f014 e59f f014 e59f
010 f014 e59f f40e  f014 e59f f014 e59f
020 0040 0030 0040 0030 0040 0030 0040 0030
030 0040 0030 0040 0030 0040 0030 beef dead
040 fffe eaff 002a ea00  e10f 101f e200
050 001a e331 001f 13c0 0013 1380 00c0 e380
060 f000 e129 0f10 ee11 0a02 e3c0 0f10 ee01
070 0078 e59f 0f10 ee0c 0006 eb00 001a eb00
080 01b6 eb00 0f15 ee07 0f9a ee07 0f95 ee07
090 ff1e e12f ffeb eaff  e3a0 0f17 ee08
$ ls -l bootShort.bin
-rw-r--r-- 1 nelson nelson 62478 Dec  5 12:54 bootShort.bin

Any insight into why that is being added at the beginning?  Is there a 
configuration that needs tweaking or to be removed?

Dan

> On Dec 5, 2018, at 7:36 AM,  
>  wrote:
> 
> 
> 
> On 05.12.2018 02:15, Daniel Evans wrote:
>> Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 
>> xplained board.  All I get is RomBOOT and no other messages.  I have tried 
>> throwing in a couple test pins to toggle in board_early_init_f but still not 
>> getting any debug.  I can get at91bootstrap to produce a boot.bin that works 
>> on the sama5d3 xplained so I am assuming I don’t have a bad board.  My boot 
>> partition is FAT16.  To compile I just run the following on Debian Buster :
>> 
>> make mrproper
>> make sama5d3_xplained_mmc_defconfig
>> make
>> 
>> Cross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf
>> 
>> When finished compiling I just copy the boot.bin to my BOOT partition.
>> 
>> Has to be something obvious that I am missing.  Any insight is appreciated…
> 
> Hello,
> 
> Check the datasheet for sama5d3 SoC section 11.4.3. - Valid code 
> detection (my datasheet is dated 2 Feb 2016 if it helps)
> 
> Basically the vector 6 needs to have hardcoded the binary size. Are you 
> doing that ? Otherwise the RomBOOT code will consider your binary as faulty.
> 
> PS. make sure endianess is right, use a good hexeditor...
> 
> Hope this helps,
> Eugen
> 
>> 
>> Dan
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[U-Boot] [PATCH v2 3/7] dfu: Remove dependency on HUSH parser in SPL

2018-12-05 Thread Andrew F. Davis
CLI support with the HUSH parser is not currently SPL safe due to it's
use of realloc. That function is not defined for SPLs that use
SYS_MALLOC_SIMPLE. CLI support can be built in to SPL and some functions
do work, but use of some like run_command() will cause build to fail.
When no SPL code calls this function build works as the compiler removes
this unreachable code so the unresolved symbols are ignored.

If DFU support is enabled in SPL then MMU DFU support may get brought in
also, this code does make a call to run_command() causing build to fail
if the HUSH parser is not built-in. To break this odd and unneeded
dependency chain we use CONFIG_IS_ENABLED where appropriate to prevent
calls into HUSH code from SPL. This also removes our need to pull in the
rather unrelated source file when SPL_DFU is defined.

Signed-off-by: Andrew F. Davis 
---
 common/Makefile | 1 -
 common/cli.c| 2 +-
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/common/Makefile b/common/Makefile
index 69cec69608..bbb03e1c57 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -67,7 +67,6 @@ ifdef CONFIG_SPL_BUILD
 ifdef CONFIG_SPL_DFU
 obj-$(CONFIG_DFU_OVER_USB) += dfu.o
 endif
-obj-$(CONFIG_SPL_DFU) += cli_hush.o
 obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
 obj-$(CONFIG_TPL_HASH_SUPPORT) += hash.o
 obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
diff --git a/common/cli.c b/common/cli.c
index 51b8d5f85c..fea8f8004c 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 int run_command(const char *cmd, int flag)
 {
-#ifndef CONFIG_HUSH_PARSER
+#if !CONFIG_IS_ENABLED(HUSH_PARSER)
/*
 * cli_run_command can return 0 or 1 for success, so clean up
 * its result.
-- 
2.19.1

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[U-Boot] [PATCH v2 4/7] ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry point

2018-12-05 Thread Andrew F. Davis
Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to
have an non-standard boot address in memory. This may be due
to the device being a high security variant, which place the
Initial SoftWare (ISW) after certificates and secure software.

Allow these devices to set this from Kconfig.

Signed-off-by: Andrew F. Davis 
---
 arch/arm/mach-omap2/Kconfig| 13 +
 arch/arm/mach-omap2/am33xx/Kconfig | 15 ---
 include/configs/ti_omap5_common.h  |  2 +-
 3 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 58e545a45b..ebe3c0f39a 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -167,6 +167,19 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE
  using hardware memory firewalls. This value must be smaller than the
  TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
 
+config ISW_ENTRY_ADDR
+   hex "Address in memory or XIP address of bootloader entry point"
+   default 0x402F4000 if AM43XX
+   default 0x402F0400 if AM33XX
+   default 0x40301350 if OMAP54XX
+   help
+ After any reset, the boot ROM searches the boot media for a valid
+ boot image. For non-XIP devices, the ROM then copies the image into
+ internal memory. For all boot modes, after the ROM processes the
+ boot image it eventually computes the entry point address depending
+ on the device type (secure/non-secure), boot media (xip/non-xip) and
+ image headers.
+
 source "arch/arm/mach-omap2/omap3/Kconfig"
 
 source "arch/arm/mach-omap2/omap4/Kconfig"
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig 
b/arch/arm/mach-omap2/am33xx/Kconfig
index 3529607479..5f2ee83c27 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -274,21 +274,6 @@ config SPL_RTC_DDR_SUPPORT
 endif
 
 if AM43XX || AM33XX
-config ISW_ENTRY_ADDR
-   hex "Address in memory or XIP flash of bootloader entry point"
-   default 0x402F4000 if AM43XX
-   default 0x402F0400 if AM33XX
-   help
- After any reset, the boot ROM on the AM43XX SOC
- searches the boot media for a valid boot image.
- For non-XIP devices, the ROM then copies the
- image into internal memory.
- For all boot modes, after the ROM processes the
- boot image it eventually computes the entry
- point address depending on the device type
- (secure/non-secure), boot media (xip/non-xip) and
- image headers.
-
 config PUB_ROM_DATA_SIZE
hex "Size in bytes of the L3 SRAM reserved by ROM to store data"
default 0x8400
diff --git a/include/configs/ti_omap5_common.h 
b/include/configs/ti_omap5_common.h
index 8bf4a6b7e9..ba57c40182 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -81,7 +81,7 @@
  * RAM from address 0x40301350 (0x4030+0x1000(reserved)+0x350(cert)).
  */
 #define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ  0x1000
-#define CONFIG_SPL_TEXT_BASE   0x40301350
+#define CONFIG_SPL_TEXT_BASE   CONFIG_ISW_ENTRY_ADDR
 /* If no specific start address is specified then the secure EMIF
  * region will be placed at the end of the DDR space. In order to prevent
  * the main u-boot relocation from clobbering that memory and causing a
-- 
2.19.1

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[U-Boot] [PATCH v2 5/7] defconfigs: Add config for DRA7xx High Security EVM with USB Boot support

2018-12-05 Thread Andrew F. Davis
Add a new defconfig file for the DRA7xx High Security EVM. This config
is specific for the case of USB booting.

Signed-off-by: Andrew F. Davis 
---
 MAINTAINERS |   1 +
 configs/dra7xx_hs_evm_usb_defconfig | 106 
 2 files changed, 107 insertions(+)
 create mode 100644 configs/dra7xx_hs_evm_usb_defconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index 8ea8ef9924..e574662d9d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -651,6 +651,7 @@ F:  configs/am335x_hs_evm_uart_defconfig
 F: configs/am43xx_hs_evm_defconfig
 F: configs/am57xx_hs_evm_defconfig
 F: configs/dra7xx_hs_evm_defconfig
+F: configs/dra7xx_hs_evm_usb_defconfig
 F: configs/k2hk_hs_evm_defconfig
 F: configs/k2e_hs_evm_defconfig
 F: configs/k2g_hs_evm_defconfig
diff --git a/configs/dra7xx_hs_evm_usb_defconfig 
b/configs/dra7xx_hs_evm_usb_defconfig
new file mode 100644
index 00..7842851491
--- /dev/null
+++ b/configs/dra7xx_hs_evm_usb_defconfig
@@ -0,0 +1,106 @@
+CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_OMAP54XX=y
+CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb0
+CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x0200
+CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0
+CONFIG_ISW_ENTRY_ADDR=0x40306d50
+CONFIG_TARGET_DRA7XX_EVM=y
+CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ARMV7_LPAE=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 
androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard"
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_MISC_INIT_R is not set
+CONFIG_VERSION_VARIABLE=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_DMA_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_DFU=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
+CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm dra76-evm"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_DWC_AHCI=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_DFU_SF=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8200
+CONFIG_FASTBOOT_BUF_SIZE=0x2F00
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_PCF8575_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_OMAP_HS=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_MII=y
+CONFIG_DRIVER_TI_CPSW=y
+CONFIG_SPL_PHY=y
+CONFIG_PIPE3_PHY=y
+CONFIG_PMIC_PALMAS=y
+CONFIG_PMIC_LP873X=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_REGULATOR_PALMAS=y
+CONFIG_DM_REGULATOR_LP873X=y
+CONFIG_DM_SCSI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_TI_QSPI=y
+CONFIG_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_DRA7XX_INDEX=1
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_OMAP=y
+CONFIG_USB_DWC3_PHY_OMAP=y
+CONFIG_OMAP_USB_PHY=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
-- 
2.19.1

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[U-Boot] [PATCH v2 6/7] defconfigs: Add config for AM57xx High Security EVM with USB/UART Boot support

2018-12-05 Thread Andrew F. Davis
Add a new defconfig file for the AM57xx High Security EVM. This config
is specific for the case of USB/UART booting.

Signed-off-by: Andrew F. Davis 
---
 MAINTAINERS |  1 +
 configs/am57xx_hs_evm_usb_defconfig | 92 +
 2 files changed, 93 insertions(+)
 create mode 100644 configs/am57xx_hs_evm_usb_defconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index e574662d9d..c021ec2024 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -650,6 +650,7 @@ F:  configs/am335x_hs_evm_defconfig
 F: configs/am335x_hs_evm_uart_defconfig
 F: configs/am43xx_hs_evm_defconfig
 F: configs/am57xx_hs_evm_defconfig
+F: configs/am57xx_hs_evm_usb_defconfig
 F: configs/dra7xx_hs_evm_defconfig
 F: configs/dra7xx_hs_evm_usb_defconfig
 F: configs/k2hk_hs_evm_defconfig
diff --git a/configs/am57xx_hs_evm_usb_defconfig 
b/configs/am57xx_hs_evm_usb_defconfig
new file mode 100644
index 00..a0c42387ec
--- /dev/null
+++ b/configs/am57xx_hs_evm_usb_defconfig
@@ -0,0 +1,92 @@
+CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_OMAP54XX=y
+CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb0
+CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x0200
+CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0
+CONFIG_ISW_ENTRY_ADDR=0x40306d50
+CONFIG_TARGET_AM57XX_EVM=y
+CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ARMV7_LPAE=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 
androidboot.console=ttyS2 androidboot.hardware=beagle_x15board"
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_MISC_INIT_R is not set
+CONFIG_VERSION_VARIABLE=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_DMA_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_DFU=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
+CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 
am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SCSI_AHCI=y
+# CONFIG_BLK is not set
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8200
+CONFIG_FASTBOOT_BUF_SIZE=0x2F00
+CONFIG_FASTBOOT_USB_DEV=1
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_OMAP_HS=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_ETH=y
+CONFIG_MII=y
+CONFIG_DRIVER_TI_CPSW=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_PALMAS=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PALMAS=y
+CONFIG_DM_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_TI_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_OMAP=y
+CONFIG_USB_DWC3_PHY_OMAP=y
+CONFIG_OMAP_USB_PHY=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
-- 
2.19.1

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[U-Boot] [PATCH v2 7/7] doc: ti-secure: Add ULO info for AM57xx/DRA7xx secure devices from TI

2018-12-05 Thread Andrew F. Davis
Booting from UART and USB on HS devices is now supported for this
platform. Update documentation for the same.

Signed-off-by: Andrew F. Davis 
---
 doc/README.ti-secure | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/doc/README.ti-secure b/doc/README.ti-secure
index 4b5380c0f3..76950253ac 100644
--- a/doc/README.ti-secure
+++ b/doc/README.ti-secure
@@ -108,7 +108,8 @@ Booting of U-Boot SPL
Invoking the script for DRA7xx/AM57xx Secure Devices

 
-   create-boot-image.sh   
+   create-boot-image.sh \
+  
 
 is a value that specifies the type of the image to
generate OR the action the image generation tool will take. Valid
@@ -116,7 +117,6 @@ Booting of U-Boot SPL
X-LOADER - Generates an image for NOR or QSPI boot modes
MLO - Generates an image for SD/MMC/eMMC boot modes
ULO - Generates an image for USB/UART peripheral boot modes
-   Note: ULO is not yet used by the u-boot build process
 
 is the full path and filename of the public world boot
loader binary file (for this platform, this is always u-boot-spl.bin).
@@ -130,9 +130,13 @@ Booting of U-Boot SPL
the device ROM bootloader requires for loading from
the FAT partition of an SD card (same as on
non-secure devices)
+   u-boot-spl_HS_ULO - boot image for USB/UART peripheral boot modes
u-boot-spl_HS_X-LOADER - boot image for all other flash memories
including QSPI and NOR flash
 
+is the address at which SOC ROM should load the
+   
+
Invoking the script for Keystone2 Secure Devices
=
 
-- 
2.19.1

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[U-Boot] [PATCH v2 2/7] dfu: Make DFU support more SPL friendly

2018-12-05 Thread Andrew F. Davis
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
This ensures the files and features are only built into the right build
for which they are enabled. Using the macros to simplify this patch was
made possible by the config symbol rename done in the last patch.

Signed-off-by: Andrew F. Davis 
---
 drivers/Makefile |  3 +--
 drivers/dfu/Makefile | 12 ++--
 include/dfu.h| 10 +-
 3 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/Makefile b/drivers/Makefile
index 7fe80b1d72..26e4d39df6 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -2,6 +2,7 @@
 
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
 obj-$(CONFIG_$(SPL_TPL_)DM) += core/
+obj-$(CONFIG_$(SPL_TPL_)DFU) += dfu/
 obj-$(CONFIG_$(SPL_TPL_)GPIO_SUPPORT) += gpio/
 obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
 obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
@@ -48,7 +49,6 @@ obj-$(CONFIG_SPL_USB_ETHER) += net/phy/
 obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/
 obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/
 obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/udc/
-obj-$(CONFIG_SPL_DFU) += dfu/
 obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/
 obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/
 obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
@@ -85,7 +85,6 @@ obj-y += misc/
 obj-$(CONFIG_MMC) += mmc/
 obj-$(CONFIG_NVME) += nvme/
 obj-y += pcmcia/
-obj-y += dfu/
 obj-$(CONFIG_X86) += pch/
 obj-y += phy/allwinner/
 obj-y += phy/marvell/
diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
index 56f9b0c5f4..4164f342ac 100644
--- a/drivers/dfu/Makefile
+++ b/drivers/dfu/Makefile
@@ -3,9 +3,9 @@
 # Copyright (C) 2012 Samsung Electronics
 # Lukasz Majewski 
 
-obj-$(CONFIG_DFU) += dfu.o
-obj-$(CONFIG_DFU_MMC) += dfu_mmc.o
-obj-$(CONFIG_DFU_NAND) += dfu_nand.o
-obj-$(CONFIG_DFU_RAM) += dfu_ram.o
-obj-$(CONFIG_DFU_SF) += dfu_sf.o
-obj-$(CONFIG_DFU_TFTP) += dfu_tftp.o
+obj-$(CONFIG_$(SPL_)DFU) += dfu.o
+obj-$(CONFIG_$(SPL_)DFU_MMC) += dfu_mmc.o
+obj-$(CONFIG_$(SPL_)DFU_NAND) += dfu_nand.o
+obj-$(CONFIG_$(SPL_)DFU_RAM) += dfu_ram.o
+obj-$(CONFIG_$(SPL_)DFU_SF) += dfu_sf.o
+obj-$(CONFIG_$(SPL_)DFU_TFTP) += dfu_tftp.o
diff --git a/include/dfu.h b/include/dfu.h
index fbe978abdc..9340a900a2 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -202,7 +202,7 @@ static inline void dfu_set_defer_flush(struct dfu_entity 
*dfu)
 int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size);
 
 /* Device specific */
-#ifdef CONFIG_DFU_MMC
+#if CONFIG_IS_ENABLED(DFU_MMC)
 extern int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s);
 #else
 static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr,
@@ -213,7 +213,7 @@ static inline int dfu_fill_entity_mmc(struct dfu_entity 
*dfu, char *devstr,
 }
 #endif
 
-#ifdef CONFIG_DFU_NAND
+#if CONFIG_IS_ENABLED(DFU_NAND)
 extern int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s);
 #else
 static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr,
@@ -224,7 +224,7 @@ static inline int dfu_fill_entity_nand(struct dfu_entity 
*dfu, char *devstr,
 }
 #endif
 
-#ifdef CONFIG_DFU_RAM
+#if CONFIG_IS_ENABLED(DFU_RAM)
 extern int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s);
 #else
 static inline int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr,
@@ -235,7 +235,7 @@ static inline int dfu_fill_entity_ram(struct dfu_entity 
*dfu, char *devstr,
 }
 #endif
 
-#ifdef CONFIG_DFU_SF
+#if CONFIG_IS_ENABLED(DFU_SF)
 extern int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s);
 #else
 static inline int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr,
@@ -259,7 +259,7 @@ static inline int dfu_fill_entity_sf(struct dfu_entity 
*dfu, char *devstr,
  *
  * @return 0 on success, otherwise error code
  */
-#ifdef CONFIG_DFU_TFTP
+#if CONFIG_IS_ENABLED(DFU_TFTP)
 int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len,
   char *interface, char *devstring);
 #else
-- 
2.19.1

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[U-Boot] [PATCH v2 1/7] spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU

2018-12-05 Thread Andrew F. Davis
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
to allow for cleaner use in code.

Signed-off-by: Andrew F. Davis 
---
 arch/arm/cpu/armv8/zynqmp/spl.c   | 2 +-
 arch/arm/mach-omap2/boot-common.c | 2 +-
 common/Makefile   | 4 ++--
 common/spl/Kconfig| 6 +++---
 common/spl/Makefile   | 2 +-
 common/spl/spl_ram.c  | 4 ++--
 drivers/Makefile  | 2 +-
 drivers/usb/gadget/Makefile   | 2 +-
 include/configs/dra7xx_evm.h  | 2 +-
 include/configs/xilinx_zynqmp.h   | 4 ++--
 10 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index 01f31d0f0e..fb3955c93f 100644
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -93,7 +93,7 @@ u32 spl_boot_device(void)
case EMMC_MODE:
return BOOT_DEVICE_MMC1;
 #endif
-#ifdef CONFIG_SPL_DFU_SUPPORT
+#ifdef CONFIG_SPL_DFU
case USB_MODE:
return BOOT_DEVICE_DFU;
 #endif
diff --git a/arch/arm/mach-omap2/boot-common.c 
b/arch/arm/mach-omap2/boot-common.c
index 176d4f67cb..2db19227b9 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -108,7 +108,7 @@ void save_omap_boot_params(void)
sys_boot_device = 1;
break;
 #endif
-#if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU_SUPPORT)
+#if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU)
case BOOT_DEVICE_DFU:
sys_boot_device = 1;
break;
diff --git a/common/Makefile b/common/Makefile
index 65d89dc62d..69cec69608 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -64,10 +64,10 @@ obj-$(CONFIG_$(SPL_TPL_)BOOTSTAGE) += bootstage.o
 obj-$(CONFIG_$(SPL_TPL_)BLOBLIST) += bloblist.o
 
 ifdef CONFIG_SPL_BUILD
-ifdef CONFIG_SPL_DFU_SUPPORT
+ifdef CONFIG_SPL_DFU
 obj-$(CONFIG_DFU_OVER_USB) += dfu.o
 endif
-obj-$(CONFIG_SPL_DFU_SUPPORT) += cli_hush.o
+obj-$(CONFIG_SPL_DFU) += cli_hush.o
 obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
 obj-$(CONFIG_TPL_HASH_SUPPORT) += hash.o
 obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0ddbffc7d1..8dec080deb 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -790,7 +790,7 @@ config SPL_USB_ETHER
  since the network stack uses a number of environment variables.
  See also SPL_NET_SUPPORT and SPL_ETH_SUPPORT.
 
-config SPL_DFU_SUPPORT
+config SPL_DFU
bool "Support DFU (Device Firmware Upgrade)"
select SPL_HASH_SUPPORT
select SPL_DFU_NO_RESET
@@ -805,11 +805,11 @@ config SPL_DFU_SUPPORT
 
 choice
bool "DFU device selection"
-   depends on SPL_DFU_SUPPORT
+   depends on SPL_DFU
 
 config SPL_DFU_RAM
bool "RAM device"
-   depends on SPL_DFU_SUPPORT && SPL_RAM_SUPPORT
+   depends on SPL_DFU && SPL_RAM_SUPPORT
help
 select RAM/DDR memory device for loading binary images
 (u-boot/kernel) to the selected device partition using
diff --git a/common/spl/Makefile b/common/spl/Makefile
index a130a5be4b..6f8d7599ae 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -26,7 +26,7 @@ obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
 obj-$(CONFIG_$(SPL_TPL_)SATA_SUPPORT) += spl_sata.o
-obj-$(CONFIG_$(SPL_TPL_)DFU_SUPPORT) += spl_dfu.o
+obj-$(CONFIG_$(SPL_TPL_)DFU) += spl_dfu.o
 obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o
 obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SDP_SUPPORT) += spl_sdp.o
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index 5fcc3b1504..954e91a004 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -35,7 +35,7 @@ static int spl_ram_load_image(struct spl_image_info 
*spl_image,
 
header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS;
 
-#if CONFIG_IS_ENABLED(DFU_SUPPORT)
+#if CONFIG_IS_ENABLED(DFU)
if (bootdev->boot_device == BOOT_DEVICE_DFU)
spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0");
 #endif
@@ -76,7 +76,7 @@ static int spl_ram_load_image(struct spl_image_info 
*spl_image,
 #if CONFIG_IS_ENABLED(RAM_DEVICE)
 SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image);
 #endif
-#if CONFIG_IS_ENABLED(DFU_SUPPORT)
+#if CONFIG_IS_ENABLED(DFU)
 SPL_LOAD_IMAGE_METHOD("DFU", 0, BOOT_DEVICE_DFU, spl_ram_load_image);
 #endif
 
diff --git a/drivers/Makefile b/drivers/Makefile
index 55de10926e..7fe80b1d72 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -48,7 +48,7 @@ obj-$(CONFIG_SPL_USB_ETHER) += net/phy/
 obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/
 obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/
 obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/udc/
-obj-$(CONFIG_SPL_DFU_SU

[U-Boot] [PATCH v2 0/7] Add USB boot to HS DRA7xx/AM57xx

2018-12-05 Thread Andrew F. Davis
Hello all,

This series adds USB boot support to HS DRA7xx/AM57xx platforms.

We start by cleaning up DFU boot in SPL support. What is done in the
first patch for DFU, if acceptable, should be done to the other boot
modes.

The 4th patch is needed as on HS devices a header is added to the
boot image that tells the ROM where to load this image. This only
works for block device booting as the ROM can read the header and
move the image into memory in steps. For streaming boot modes USB/
UART/NET the image is placed in memory as it is received from the
media live. This means the header is ignored and the image has
a fixed offset in memory.

For AM47xx we align the boot modes by making the offset for block
device booting the same as the fixed offset for streaming boot modes,
in this way only one defconfig is needed. For DRA7xx/AM57xx the signing
tools will need to be updated to support specifying this address, when
this is done the offset in the base HS defconfig can be moved to match
the new offset and the defconfigs added here in patch 5 and 6 can be
unified back into the base HS defconfig.

The last patch updates the docs for the same above.

Thanks,
Andrew

Changes from v1:
 - Drop explicit UART boot support from DRA7xx as this cannot be tested

Andrew F. Davis (7):
  spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU
  dfu: Make DFU support more SPL friendly
  dfu: Remove dependency on HUSH parser in SPL
  ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry point
  defconfigs: Add config for DRA7xx High Security EVM with USB Boot
support
  defconfigs: Add config for AM57xx High Security EVM with USB/UART Boot
support
  doc: ti-secure: Add ULO info for AM57xx/DRA7xx secure devices from TI

 MAINTAINERS |   2 +
 arch/arm/cpu/armv8/zynqmp/spl.c |   2 +-
 arch/arm/mach-omap2/Kconfig |  13 
 arch/arm/mach-omap2/am33xx/Kconfig  |  15 
 arch/arm/mach-omap2/boot-common.c   |   2 +-
 common/Makefile |   3 +-
 common/cli.c|   2 +-
 common/spl/Kconfig  |   6 +-
 common/spl/Makefile |   2 +-
 common/spl/spl_ram.c|   4 +-
 configs/am57xx_hs_evm_usb_defconfig |  92 
 configs/dra7xx_hs_evm_usb_defconfig | 106 
 doc/README.ti-secure|   8 ++-
 drivers/Makefile|   3 +-
 drivers/dfu/Makefile|  12 ++--
 drivers/usb/gadget/Makefile |   2 +-
 include/configs/dra7xx_evm.h|   2 +-
 include/configs/ti_omap5_common.h   |   2 +-
 include/configs/xilinx_zynqmp.h |   4 +-
 include/dfu.h   |  10 +--
 20 files changed, 246 insertions(+), 46 deletions(-)
 create mode 100644 configs/am57xx_hs_evm_usb_defconfig
 create mode 100644 configs/dra7xx_hs_evm_usb_defconfig

-- 
2.19.1

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Re: [U-Boot] [PATCH 6/7] defconfigs: Add config for AM57xx High Security EVM with UART/USB Boot support

2018-12-05 Thread Andrew F. Davis
On 12/5/18 6:42 AM, Lokesh Vutla wrote:
> 
> 
> On 05/12/18 3:07 AM, Andrew F. Davis wrote:
>> On 12/2/18 11:24 PM, Lokesh Vutla wrote:
>>>
>>>
>>> On 30/11/18 10:41 PM, Andrew F. Davis wrote:
 Add a new defconfig file for the AM57xx High Security EVM. This config
 is specific for the case of UART/USB booting.
>>>
>>> Can you share the steps on how you verified uart boot?
>>>
>>
>> All the verification for this defconfig was with USB boot for the first
>> stage (ULO). UART cannot be tested with our DRA7xx EVMs as you pointed
>> out and to test on AM57xx special scrips need to be used as the ROM UART
>> loading protocol is not standard. UART loading of the second stage is
>> possible after loading the first stage using some other boot media.
> 
> okay, drop uart support from dra7xx hs defconfig. We should not confuse
> anyone looking at the commit description or code.
> 

Fair enough, will rename it dra7xx_hs_evm_usb_defconfig. Although it is
the right defconfig to use for UART, I will do the same for am57xx to
keep the defconfig naming consistent.

Andrew

> Thanks and regards,
> Lokesh
> 
>>
>> On HS, both USB and UART are special in their load address requirements,
>> this patch set fixes that. The UART support on HS cannot work with the
>> old defconfig.
>>
>> Andrew
>>
>>> Thanks and regards,
>>> Lokesh
>>>

 Signed-off-by: Andrew F. Davis 
 ---
    MAINTAINERS  |  1 +
    configs/am57xx_hs_evm_uart_defconfig | 92
 
    2 files changed, 93 insertions(+)
    create mode 100644 configs/am57xx_hs_evm_uart_defconfig

 diff --git a/MAINTAINERS b/MAINTAINERS
 index d0c208b93d..b7366cfc0a 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
 @@ -647,6 +647,7 @@ F:    configs/am335x_hs_evm_defconfig
    F:    configs/am335x_hs_evm_uart_defconfig
    F:    configs/am43xx_hs_evm_defconfig
    F:    configs/am57xx_hs_evm_defconfig
 +F:    configs/am57xx_hs_evm_uart_defconfig
    F:    configs/dra7xx_hs_evm_defconfig
    F:    configs/dra7xx_hs_evm_uart_defconfig
    F:    configs/k2hk_hs_evm_defconfig
 diff --git a/configs/am57xx_hs_evm_uart_defconfig
 b/configs/am57xx_hs_evm_uart_defconfig
 new file mode 100644
 index 00..a0c42387ec
 --- /dev/null
 +++ b/configs/am57xx_hs_evm_uart_defconfig
 @@ -0,0 +1,92 @@
 +CONFIG_ARM=y
 +CONFIG_ARCH_OMAP2PLUS=y
 +CONFIG_TI_SECURE_DEVICE=y
 +CONFIG_TI_COMMON_CMD_OPTIONS=y
 +CONFIG_SYS_MALLOC_F_LEN=0x2000
 +CONFIG_OMAP54XX=y
 +CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb0
 +CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x0200
 +CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0
 +CONFIG_ISW_ENTRY_ADDR=0x40306d50
 +CONFIG_TARGET_AM57XX_EVM=y
 +CONFIG_SPL=y
 +CONFIG_SPL_SPI_FLASH_SUPPORT=y
 +CONFIG_SPL_SPI_SUPPORT=y
 +CONFIG_ARMV7_LPAE=y
 +CONFIG_DISTRO_DEFAULTS=y
 +CONFIG_NR_DRAM_BANKS=2
 +CONFIG_FIT_IMAGE_POST_PROCESS=y
 +CONFIG_SPL_LOAD_FIT=y
 +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 +CONFIG_OF_BOARD_SETUP=y
 +CONFIG_USE_BOOTARGS=y
 +CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200
 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board"
 +# CONFIG_USE_BOOTCOMMAND is not set
 +CONFIG_SYS_CONSOLE_INFO_QUIET=y
 +# CONFIG_MISC_INIT_R is not set
 +CONFIG_VERSION_VARIABLE=y
 +CONFIG_BOARD_EARLY_INIT_F=y
 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 +CONFIG_SPL_SEPARATE_BSS=y
 +CONFIG_SPL_DMA_SUPPORT=y
 +# CONFIG_SPL_NAND_SUPPORT is not set
 +CONFIG_SPL_RAM_SUPPORT=y
 +CONFIG_SPL_SPI_LOAD=y
 +CONFIG_SPL_USB_GADGET_SUPPORT=y
 +CONFIG_SPL_DFU=y
 +CONFIG_SPL_YMODEM_SUPPORT=y
 +# CONFIG_CMD_FLASH is not set
 +# CONFIG_CMD_SETEXPR is not set
 +CONFIG_OF_CONTROL=y
 +CONFIG_SPL_OF_CONTROL=y
 +CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
 +CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1
 am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk"
 +CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_DM=y
 +CONFIG_SPL_DM=y
 +CONFIG_SCSI_AHCI=y
 +# CONFIG_BLK is not set
 +CONFIG_DFU_MMC=y
 +CONFIG_DFU_RAM=y
 +CONFIG_USB_FUNCTION_FASTBOOT=y
 +CONFIG_FASTBOOT_BUF_ADDR=0x8200
 +CONFIG_FASTBOOT_BUF_SIZE=0x2F00
 +CONFIG_FASTBOOT_USB_DEV=1
 +CONFIG_FASTBOOT_FLASH=y
 +CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 +CONFIG_DM_GPIO=y
 +CONFIG_DM_I2C=y
 +CONFIG_DM_MMC=y
 +CONFIG_MMC_OMAP_HS=y
 +CONFIG_DM_SPI_FLASH=y
 +CONFIG_SPI_FLASH=y
 +CONFIG_SPI_FLASH_BAR=y
 +CONFIG_SPI_FLASH_SPANSION=y
 +CONFIG_PHY_MICREL=y
 +CONFIG_PHY_MICREL_KSZ90X1=y
 +CONFIG_DM_ETH=y
 +CONFIG_MII=y
 +CONFIG_DRIVER_TI_CPSW=y
 +CONFIG_DM_PMIC=y
 +CONFIG_PMIC_PALMAS=y
 +CONFIG_DM_REGULATO

[U-Boot] [PATCH v3 7/7] MIPS: bootm: Add support for Vcore III linux kernel

2018-12-05 Thread Gregory CLEMENT
The kernels built for the Vcore III linux kernel have different
expectation in the way the data were passed.

Unlike with yamon, the command line is expected to be a single string
passed in argv[1]. An other expectation is that the arguments are located
in the cached address space.

However, like yamon, they expect that rd_start and rd_size was passed by
the bootloader in the command line of the kernel, and besides that it
also wait for the root=/dev/ram0.

Signed-off-by: Gregory CLEMENT 
---
 arch/mips/lib/bootm.c | 78 ---
 1 file changed, 58 insertions(+), 20 deletions(-)

diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index deca5189e3..a3831c28a4 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -15,6 +15,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #defineLINUX_MAX_ENVS  256
 #defineLINUX_MAX_ARGS  256
 
+enum legacy_boot_type {
+   LEGACY_BOOT_YAML,
+   LEGACY_BOOT_VCORE,
+};
+
 static int linux_argc;
 static char **linux_argv;
 static char *linux_argp;
@@ -44,22 +49,47 @@ void arch_lmb_reserve(struct lmb *lmb)
lmb_reserve(lmb, sp, gd->ram_top - sp);
 }
 
-static void linux_cmdline_init(void)
+static void linux_cmdline_init(enum legacy_boot_type boot_type)
 {
+   switch (boot_type) {
+   /*
+* Vcore III linux kernels expect arguments in the cached
+* address space. They also expect the command line being a
+* single string in the first argument
+*/
+   case LEGACY_BOOT_VCORE:
+   linux_argv = (char **)(gd->bd->bi_boot_params);
+   linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
+   linux_argv[1] = linux_argp;
+   break;
+   case LEGACY_BOOT_YAML:
+   /* fall-through */
+   default:
+   linux_argv = (char **)UNCACHED_SDRAM(gd->bd->bi_boot_params);
+   linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
+   }
linux_argc = 1;
-   linux_argv = (char **)UNCACHED_SDRAM(gd->bd->bi_boot_params);
linux_argv[0] = 0;
-   linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
 }
 
-static void linux_cmdline_set(const char *value, size_t len)
+static void linux_cmdline_set(const char *value, size_t len,
+ enum legacy_boot_type boot_type)
 {
-   linux_argv[linux_argc] = linux_argp;
memcpy(linux_argp, value, len);
-   linux_argp[len] = 0;
-
+   switch (boot_type) {
+   case LEGACY_BOOT_VCORE:
+   linux_argv[linux_argc] = linux_argp;
+   linux_argp[len] = 0;
+   linux_argc++;
+   break;
+   case LEGACY_BOOT_YAML:
+   /* fall-through */
+   default:
+   linux_argp[len] = ' ';
+   linux_argp[len + 1] = 0;
+   linux_argc = 2;
+   }
linux_argp += len + 1;
-   linux_argc++;
 }
 
 static void linux_cmdline_dump(void)
@@ -73,12 +103,11 @@ static void linux_cmdline_dump(void)
debug("   arg %03d: %s\n", i, linux_argv[i]);
 }
 
-static void linux_cmdline_legacy(bootm_headers_t *images)
+static void linux_cmdline_legacy(bootm_headers_t *images,
+enum legacy_boot_type boot_type)
 {
const char *bootargs, *next, *quote;
-
-   linux_cmdline_init();
-
+   linux_cmdline_init(boot_type);
bootargs = env_get("bootargs");
if (!bootargs)
return;
@@ -104,7 +133,7 @@ static void linux_cmdline_legacy(bootm_headers_t *images)
if (!next)
next = bootargs + strlen(bootargs);
 
-   linux_cmdline_set(bootargs, next - bootargs);
+   linux_cmdline_set(bootargs, next - bootargs, boot_type);
 
if (*next)
next++;
@@ -113,7 +142,8 @@ static void linux_cmdline_legacy(bootm_headers_t *images)
}
 }
 
-static void linux_cmdline_append(bootm_headers_t *images)
+static void linux_cmdline_append(bootm_headers_t *images,
+enum legacy_boot_type boot_type)
 {
char buf[24];
ulong mem, rd_start, rd_size;
@@ -121,7 +151,7 @@ static void linux_cmdline_append(bootm_headers_t *images)
/* append mem */
mem = gd->ram_size >> 20;
sprintf(buf, "mem=%luM", mem);
-   linux_cmdline_set(buf, strlen(buf));
+   linux_cmdline_set(buf, strlen(buf), boot_type);
 
/* append rd_start and rd_size */
rd_start = images->initrd_start;
@@ -129,9 +159,13 @@ static void linux_cmdline_append(bootm_headers_t *images)
 
if (rd_size) {
sprintf(buf, "rd_start=0x%08lX", rd_start);
-   linux_cmdline_set(buf, strlen(buf));
+   linux_cmdline_set(buf, strlen(buf), boot_type);
sprintf(buf, "rd_size=0x%lX", rd_size);
-   linux_cmdline_set(buf, strlen(buf));
+

[U-Boot] [PATCH v3 6/7] MSCC: add board support for the Luton based evaluation board

2018-12-05 Thread Gregory CLEMENT
Adding the support for the Luton boards PCB91 which share common code with
the Ocelots boards, including board code, device tree and configuration.

Signed-off-by: Gregory CLEMENT 
---
 MAINTAINERS|  1 +
 arch/mips/dts/luton_pcb091.dts | 35 ++
 arch/mips/dts/mscc,luton.dtsi  | 87 ++
 arch/mips/mach-mscc/Kconfig|  2 +
 board/mscc/luton/Kconfig   | 14 ++
 board/mscc/luton/Makefile  |  3 ++
 board/mscc/luton/luton.c   | 28 +++
 configs/mscc_luton_defconfig   | 66 ++
 8 files changed, 236 insertions(+)
 create mode 100644 arch/mips/dts/luton_pcb091.dts
 create mode 100644 arch/mips/dts/mscc,luton.dtsi
 create mode 100644 board/mscc/luton/Kconfig
 create mode 100644 board/mscc/luton/Makefile
 create mode 100644 board/mscc/luton/luton.c
 create mode 100644 configs/mscc_luton_defconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index c906ca006b..4ce19aef11 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -490,6 +490,7 @@ M:  Lars Povlsen 
 M: Horatiu Vultur 
 S: Maintained
 F: arch/mips/mach-mscc/
+F: arch/mips/dts/luton*
 F: arch/mips/dts/mscc*
 F: arch/mips/dts/ocelot*
 F: board/mscc/
diff --git a/arch/mips/dts/luton_pcb091.dts b/arch/mips/dts/luton_pcb091.dts
new file mode 100644
index 00..3a2bc42294
--- /dev/null
+++ b/arch/mips/dts/luton_pcb091.dts
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Microsemi Corporation
+ */
+
+/dts-v1/;
+#include "mscc,luton.dtsi"
+
+/ {
+   model = "Luton10 PCB091 Reference Board";
+   compatible = "mscc,luton-pcb091", "mscc,luton";
+
+   aliases {
+   serial0 = &uart0;
+   spi0 = &spi0;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+&uart0 {
+   status = "okay";
+};
+
+&spi0 {
+   status = "okay";
+   spi-flash@0 {
+   compatible = "spi-flash";
+   spi-max-frequency = <1800>; /* input clock */
+   reg = <0>; /* CS0 */
+   };
+};
+
diff --git a/arch/mips/dts/mscc,luton.dtsi b/arch/mips/dts/mscc,luton.dtsi
new file mode 100644
index 00..6a4ad2a5be
--- /dev/null
+++ b/arch/mips/dts/mscc,luton.dtsi
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Microsemi Corporation
+ */
+
+#include 
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "mscc,luton";
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   compatible = "mips,mips24KEc";
+   device_type = "cpu";
+   reg = <0>;
+   };
+   };
+
+   aliases {
+   serial0 = &uart0;
+   };
+
+   ahb_clk: ahb-clk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <20833>;
+   };
+
+   ahb {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x6000 0x1020>;
+
+   uart0: serial@1010 {
+   pinctrl-0 = <&uart_pins>;
+   pinctrl-names = "default";
+
+   compatible = "ns16550a";
+   reg = <0x1010 0x20>;
+   clocks = <&ahb_clk>;
+   reg-io-width = <4>;
+   reg-shift = <2>;
+
+   status = "disabled";
+   };
+
+   gpio: pinctrl@70068 {
+   compatible = "mscc,luton-pinctrl";
+   reg = <0x70068 0x68>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = <&gpio 0 0 32>;
+
+   uart_pins: uart-pins {
+   pins = "GPIO_30", "GPIO_31";
+   function = "uart";
+   };
+
+   };
+
+   gpio_spi_bitbang: gpio@1064 {
+   compatible = "mscc,spi-bitbang-gpio";
+   reg = <0x1064 0x4>;
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   };
+
+   spi0: spi-bitbang {
+   compatible = "spi-gpio";
+   status = "okay";
+   gpio-sck = <&gpio_spi_bitbang 6 0>;
+   gpio-miso = <&gpio_spi_bitbang 0 0>;
+   gpio-mosi = <&gpio_spi_bitbang 5 0>;
+   cs-gpios = <&gpio_spi_bitbang 1 0>;
+   num-chipselects = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+   };
+};
diff --git a/arch/mips/mach-mscc/

[U-Boot] [PATCH v3 5/7] MSCC: add board support for the Ocelots based evaluation boards

2018-12-05 Thread Gregory CLEMENT
Adding the support for 2 boards sharing common code for Ocelot chip:
PCB120 and PCB123

Signed-off-by: Gregory CLEMENT 
---
 MAINTAINERS  |   5 +
 arch/mips/dts/mscc,ocelot.dtsi   | 152 +++
 arch/mips/dts/mscc,ocelot_pcb.dtsi   |  42 
 arch/mips/dts/ocelot_pcb120.dts  |  12 +++
 arch/mips/dts/ocelot_pcb123.dts  |  12 +++
 arch/mips/mach-mscc/Kconfig  |   2 +
 board/mscc/ocelot/Kconfig|  14 +++
 board/mscc/ocelot/Makefile   |   4 +
 board/mscc/ocelot/ocelot.c   |  58 ++
 configs/mscc_ocelot_defconfig|  73 +
 configs/mscc_ocelot_pcb120_defconfig |  66 
 include/configs/vcoreiii.h   |  82 +++
 12 files changed, 522 insertions(+)
 create mode 100644 arch/mips/dts/mscc,ocelot.dtsi
 create mode 100644 arch/mips/dts/mscc,ocelot_pcb.dtsi
 create mode 100644 arch/mips/dts/ocelot_pcb120.dts
 create mode 100644 arch/mips/dts/ocelot_pcb123.dts
 create mode 100644 board/mscc/ocelot/Kconfig
 create mode 100644 board/mscc/ocelot/Makefile
 create mode 100644 board/mscc/ocelot/ocelot.c
 create mode 100644 configs/mscc_ocelot_defconfig
 create mode 100644 configs/mscc_ocelot_pcb120_defconfig
 create mode 100644 include/configs/vcoreiii.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 53a3c5bec6..c906ca006b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -490,6 +490,11 @@ M: Lars Povlsen 
 M: Horatiu Vultur 
 S: Maintained
 F: arch/mips/mach-mscc/
+F: arch/mips/dts/mscc*
+F: arch/mips/dts/ocelot*
+F: board/mscc/
+F: configs/mscc*
+F: include/configs/vcoreiii.h
 
 MMC
 M: Jaehoon Chung 
diff --git a/arch/mips/dts/mscc,ocelot.dtsi b/arch/mips/dts/mscc,ocelot.dtsi
new file mode 100644
index 00..87b4736285
--- /dev/null
+++ b/arch/mips/dts/mscc,ocelot.dtsi
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Microsemi Corporation
+ */
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "mscc,ocelot";
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   compatible = "mips,mips24KEc";
+   device_type = "cpu";
+   clocks = <&cpu_clk>;
+   reg = <0>;
+   };
+   };
+
+   aliases {
+   serial0 = &uart0;
+   };
+
+   cpuintc: interrupt-controller@0 {
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   interrupt-controller;
+   compatible = "mti,cpu-interrupt-controller";
+   };
+
+   cpu_clk: cpu-clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <5>;
+   };
+
+   ahb_clk: ahb-clk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <25000>;
+   };
+
+   ahb {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x7000 0x200>;
+
+   interrupt-parent = <&intc>;
+
+   cpu_ctrl: syscon@0 {
+   compatible = "mscc,ocelot-cpu-syscon", "syscon";
+   reg = <0x0 0x2c>;
+   };
+
+   intc: interrupt-controller@70 {
+   compatible = "mscc,ocelot-icpu-intr";
+   reg = <0x70 0x70>;
+   #interrupt-cells = <1>;
+   interrupt-controller;
+   interrupt-parent = <&cpuintc>;
+   interrupts = <2>;
+   };
+
+   uart0: serial@10 {
+   pinctrl-0 = <&uart_pins>;
+   pinctrl-names = "default";
+   compatible = "ns16550a";
+   reg = <0x10 0x20>;
+   interrupts = <6>;
+   clocks = <&ahb_clk>;
+   reg-io-width = <4>;
+   reg-shift = <2>;
+
+   status = "disabled";
+   };
+
+   uart2: serial@100800 {
+   pinctrl-0 = <&uart2_pins>;
+   pinctrl-names = "default";
+   compatible = "ns16550a";
+   reg = <0x100800 0x20>;
+   interrupts = <7>;
+   clocks = <&ahb_clk>;
+   reg-io-width = <4>;
+   reg-shift = <2>;
+
+   status = "disabled";
+   };
+
+   spi0: spi-master@101000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dw-apb-ssi";
+   reg = <0x101000 0x40>

[U-Boot] [PATCH v3 3/7] MSCC: add support for Ocelot SoCs

2018-12-05 Thread Gregory CLEMENT
This family of SoCs are found in the Microsemi Switches solution and have
already a support in the linux kernel.

Signed-off-by: Gregory CLEMENT 
---
 MAINTAINERS   |   7 +
 arch/mips/Kconfig |   6 +
 arch/mips/Makefile|   1 +
 arch/mips/mach-mscc/Kconfig   |  69 ++
 arch/mips/mach-mscc/Makefile  |   5 +
 arch/mips/mach-mscc/cpu.c |  90 +++
 arch/mips/mach-mscc/dram.c|  71 ++
 arch/mips/mach-mscc/include/ioremap.h |  51 ++
 arch/mips/mach-mscc/include/mach/common.h |  24 +
 arch/mips/mach-mscc/include/mach/ddr.h| 692 ++
 .../mach-mscc/include/mach/ocelot/ocelot.h|  24 +
 .../include/mach/ocelot/ocelot_devcpu_gcb.h   |  21 +
 .../include/mach/ocelot/ocelot_icpu_cfg.h | 274 +++
 arch/mips/mach-mscc/include/mach/tlb.h|  55 ++
 arch/mips/mach-mscc/lowlevel_init.S   |  23 +
 arch/mips/mach-mscc/reset.c   |  36 +
 16 files changed, 1449 insertions(+)
 create mode 100644 arch/mips/mach-mscc/Kconfig
 create mode 100644 arch/mips/mach-mscc/Makefile
 create mode 100644 arch/mips/mach-mscc/cpu.c
 create mode 100644 arch/mips/mach-mscc/dram.c
 create mode 100644 arch/mips/mach-mscc/include/ioremap.h
 create mode 100644 arch/mips/mach-mscc/include/mach/common.h
 create mode 100644 arch/mips/mach-mscc/include/mach/ddr.h
 create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot.h
 create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
 create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
 create mode 100644 arch/mips/mach-mscc/include/mach/tlb.h
 create mode 100644 arch/mips/mach-mscc/lowlevel_init.S
 create mode 100644 arch/mips/mach-mscc/reset.c

diff --git a/MAINTAINERS b/MAINTAINERS
index abdb6dcdb5..53a3c5bec6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -484,6 +484,13 @@ S: Maintained
 T: git git://git.denx.de/u-boot-mips.git
 F: arch/mips/
 
+MIPS MSCC
+M: Gregory CLEMENT 
+M: Lars Povlsen 
+M: Horatiu Vultur 
+S: Maintained
+F: arch/mips/mach-mscc/
+
 MMC
 M: Jaehoon Chung 
 S: Maintained
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 6d646ef999..bfe9c11069 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -59,6 +59,11 @@ config ARCH_ATH79
select OF_CONTROL
imply CMD_DM
 
+config ARCH_MSCC
+   bool "Support MSCC VCore-III"
+   select OF_CONTROL
+   select DM
+
 config ARCH_BMIPS
bool "Support BMIPS SoCs"
select CLK
@@ -135,6 +140,7 @@ source "board/imgtec/xilfpga/Kconfig"
 source "board/micronas/vct/Kconfig"
 source "board/qemu-mips/Kconfig"
 source "arch/mips/mach-ath79/Kconfig"
+source "arch/mips/mach-mscc/Kconfig"
 source "arch/mips/mach-bmips/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
 source "arch/mips/mach-mt7620/Kconfig"
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 802244a06e..124e93fa26 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -15,6 +15,7 @@ machine-$(CONFIG_ARCH_ATH79) += ath79
 machine-$(CONFIG_ARCH_BMIPS) += bmips
 machine-$(CONFIG_MACH_PIC32) += pic32
 machine-$(CONFIG_ARCH_MT7620) += mt7620
+machine-$(CONFIG_ARCH_MSCC) += mscc
 
 machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
 libs-y += $(machdirs)
diff --git a/arch/mips/mach-mscc/Kconfig b/arch/mips/mach-mscc/Kconfig
new file mode 100644
index 00..7f1b270207
--- /dev/null
+++ b/arch/mips/mach-mscc/Kconfig
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+menu "MSCC VCore-III platforms"
+   depends on ARCH_MSCC
+
+config SOC_VCOREIII
+   select MIPS_TUNE_24KC
+   select ROM_EXCEPTION_VECTORS
+   select SUPPORTS_BIG_ENDIAN
+   select SUPPORTS_CPU_MIPS32_R1
+   select SUPPORTS_CPU_MIPS32_R2
+   select SUPPORTS_LITTLE_ENDIAN
+   bool
+
+config SYS_SOC
+   default "mscc"
+
+config SOC_OCELOT
+   bool
+   select SOC_VCOREIII
+   help
+ This supports MSCC Ocelot family of SOCs.
+
+config SYS_CONFIG_NAME
+   default "vcoreiii"
+
+choice
+   prompt "Board select"
+
+config TARGET_OCELOT_PCB120
+   bool "MSCC PCB120 Reference Board (aka VSC5635EV)"
+   select SOC_OCELOT
+   help
+ When selected, CONFIG_DEFAULT_DEVICE_TREE should be set to
+ ocelot_pcb120
+
+config TARGET_OCELOT_PCB123
+   bool "MSCC PCB123 Reference Board (aka VSC7514EV))"
+   select SOC_OCELOT
+   help
+ When selected, CONFIG_DEFAULT_DEVICE_TREE should be set to
+ ocelot_pcb123
+
+endchoice
+
+choice
+   prompt "DDR type"
+
+config DDRTYPE_H5TQ4G63MFR
+   bool "Hynix H5TQ4G63MFR-PBC (4Gbit, DDR3-800, 256Mbitx16)"
+
+config DDRTYPE_MT41K256M16
+   bool "Micron MT41K256M16 (4Gbit, DDR3L-800, 256Mbitx16)"
+
+config DDRTYPE_H5TQ1G63BFA
+   bool "Hynix H5TQ1G63BFA (1Gbit DDR3, x16)"
+
+config DDRTYPE_MT4

[U-Boot] [PATCH v3 4/7] MSCC: add support for Luton SoCs

2018-12-05 Thread Gregory CLEMENT
As the Ocelots SoCs, this family of SoCs are found in the Microsemi
Switches solution.

Signed-off-by: Gregory CLEMENT 
---
 arch/mips/mach-mscc/Kconfig   |  13 +
 arch/mips/mach-mscc/Makefile  |   1 +
 arch/mips/mach-mscc/cpu.c |  14 +-
 arch/mips/mach-mscc/dram.c|   2 +
 arch/mips/mach-mscc/include/mach/common.h |   4 +
 arch/mips/mach-mscc/include/mach/ddr.h| 112 +++-
 .../mips/mach-mscc/include/mach/luton/luton.h |  24 ++
 .../include/mach/luton/luton_devcpu_gcb.h |  14 +
 .../include/mach/luton/luton_icpu_cfg.h   | 245 ++
 arch/mips/mach-mscc/lowlevel_init.S   |   7 +
 arch/mips/mach-mscc/lowlevel_init_luton.S |  62 +
 11 files changed, 494 insertions(+), 4 deletions(-)
 create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton.h
 create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
 create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
 create mode 100644 arch/mips/mach-mscc/lowlevel_init_luton.S

diff --git a/arch/mips/mach-mscc/Kconfig b/arch/mips/mach-mscc/Kconfig
index 7f1b270207..a8cace0e79 100644
--- a/arch/mips/mach-mscc/Kconfig
+++ b/arch/mips/mach-mscc/Kconfig
@@ -21,6 +21,12 @@ config SOC_OCELOT
help
  This supports MSCC Ocelot family of SOCs.
 
+config SOC_LUTON
+   bool
+   select SOC_VCOREIII
+   help
+ This supports MSCC Luton family of SOCs.
+
 config SYS_CONFIG_NAME
default "vcoreiii"
 
@@ -41,6 +47,13 @@ config TARGET_OCELOT_PCB123
  When selected, CONFIG_DEFAULT_DEVICE_TREE should be set to
  ocelot_pcb123
 
+config TARGET_LUTON_PCB091
+   bool "MSCC PCB091 Reference Board"
+   select SOC_LUTON
+   select MSCC_BITBANG_SPI_GPIO
+   help
+ When selected, CONFIG_DEFAULT_DEVICE_TREE should be set to
+ luton_pcb091
 endchoice
 
 choice
diff --git a/arch/mips/mach-mscc/Makefile b/arch/mips/mach-mscc/Makefile
index d14ec33838..6c60f26ca4 100644
--- a/arch/mips/mach-mscc/Makefile
+++ b/arch/mips/mach-mscc/Makefile
@@ -3,3 +3,4 @@
 CFLAGS_cpu.o += -finline-limit=64000
 
 obj-y += cpu.o dram.o reset.o lowlevel_init.o
+obj-$(CONFIG_SOC_LUTON) += lowlevel_init_luton.o
diff --git a/arch/mips/mach-mscc/cpu.c b/arch/mips/mach-mscc/cpu.c
index b503e1407b..5be8ff69d5 100644
--- a/arch/mips/mach-mscc/cpu.c
+++ b/arch/mips/mach-mscc/cpu.c
@@ -48,6 +48,10 @@ void vcoreiii_tlb_init(void)
 */
create_tlb(tlbix++, MSCC_IO_ORIGIN1_OFFSET, SZ_16M, MMU_REGIO_RW,
   MMU_REGIO_RW);
+#ifdef CONFIG_SOC_LUTON
+   create_tlb(tlbix++, MSCC_IO_ORIGIN2_OFFSET, SZ_16M, MMU_REGIO_RW,
+  MMU_REGIO_RW);
+#endif
 
 #if  CONFIG_SYS_TEXT_BASE == MSCC_FLASH_TO
/*
@@ -75,6 +79,14 @@ void vcoreiii_tlb_init(void)
 int mach_cpu_init(void)
 {
/* Speed up NOR flash access */
+#ifdef CONFIG_SOC_LUTON
+   writel(ICPU_PI_MST_CFG_TRISTATE_CTRL +
+  ICPU_PI_MST_CFG_CLK_DIV(4), BASE_CFG + ICPU_PI_MST_CFG);
+
+   writel(ICPU_SPI_MST_CFG_FAST_READ_ENA +
+  ICPU_SPI_MST_CFG_CS_DESELECT_TIME(0x19) +
+  ICPU_SPI_MST_CFG_CLK_DIV(9), BASE_CFG + ICPU_SPI_MST_CFG);
+#else
writel(ICPU_SPI_MST_CFG_CS_DESELECT_TIME(0x19) +
   ICPU_SPI_MST_CFG_CLK_DIV(9), BASE_CFG + ICPU_SPI_MST_CFG);
/*
@@ -85,6 +97,6 @@ int mach_cpu_init(void)
writel(0, BASE_CFG + ICPU_DST_INTR_MAP(1));
writel(0, BASE_CFG + ICPU_DST_INTR_MAP(2));
writel(0, BASE_CFG + ICPU_DST_INTR_MAP(3));
-
+#endif
return 0;
 }
diff --git a/arch/mips/mach-mscc/dram.c b/arch/mips/mach-mscc/dram.c
index 5acee6f918..309007c14e 100644
--- a/arch/mips/mach-mscc/dram.c
+++ b/arch/mips/mach-mscc/dram.c
@@ -19,9 +19,11 @@ static inline int vcoreiii_train_bytelane(void)
 
ret = hal_vcoreiii_train_bytelane(0);
 
+#ifdef CONFIG_SOC_OCELOT
if (ret)
return ret;
ret = hal_vcoreiii_train_bytelane(1);
+#endif
 
return ret;
 }
diff --git a/arch/mips/mach-mscc/include/mach/common.h 
b/arch/mips/mach-mscc/include/mach/common.h
index 842462aeed..931ecd7985 100644
--- a/arch/mips/mach-mscc/include/mach/common.h
+++ b/arch/mips/mach-mscc/include/mach/common.h
@@ -10,6 +10,10 @@
 #include 
 #include 
 #include 
+#elif defined(CONFIG_SOC_LUTON)
+#include 
+#include 
+#include 
 #else
 #error Unsupported platform
 #endif
diff --git a/arch/mips/mach-mscc/include/mach/ddr.h 
b/arch/mips/mach-mscc/include/mach/ddr.h
index 4bdea90506..97eff2a196 100644
--- a/arch/mips/mach-mscc/include/mach/ddr.h
+++ b/arch/mips/mach-mscc/include/mach/ddr.h
@@ -598,6 +598,98 @@ static inline int dram_check(void)
}
return 0;
 }
+#else  /* Luton */
+
+static inline void sleep_100ns(u32 val)
+{
+}
+
+static inline void hal_vcoreiii_ddr_reset_assert(void)
+{
+   setbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY

[U-Boot] [PATCH v3 0/7] ] Add support for the SoCs found in Microsemi switches

2018-12-05 Thread Gregory CLEMENT
Hello,

For the record this the third version of the series adding the
support of 2 SoCs: Ocelot and Luton from Microsemi. Both of them
belongs to the same family Vcore III.

We found them on various advanced switches product.

The support for Ocelot already have been submit to Linux, but not yet
the Luton support.

Since the v2, U-boot was continued to be tested internally and besides
the changes asked by Daniel, we also made several fixes and
improvements. Most of them come from Lars Povlsen and Horatiu Vultur.

I tried to address all the comment from Daniel and for the part I kept
more or less as is, I added comment explaining the rational for this
choice inside the code itself.

Gregory

Changelog:

v2 -> v3:
 - Added n entry in the MAINTAINER file for the SoCs
 - Fixup the last errors from checkpatch, the remaining ones are only
   about volatile, long line and Kconfig, but each ones have good
   reason to be here.
 - Add SPI NAND flash support in device tree and configuration files,
   the driver are already be merged in U-Boot.
 - In order to improve boot time, setup the TLB to allow using cache
   in the memory mapped to the SPI NOR.
 - Removed all the macro REG_CFG to only keep direct access to memory.
 - Put back the setting of the interrupt map as it is needed by
   mainline kernel (without it the kernel doesn't finish to boot)
 - During DDR training, prevent the compiler reordering the
   instruction.
 - Add early debug support to Ocelot (it was already done for Luton)

v1 -> v2:
 - a big clean-up for indentation and some style issue
 - usage of the clrsetbits family functions where it was possible
 - split the patches for Ocelot and Luton
 - add a new patch to introduce the icache_lock function which was in
   the mscc directory in the first version
 - remove more unused define in the platform header files
 - use the automatic cache size detection instead of hard coding it
 - reduce the tlb init to only two entries for the IO as needed by the
kernel
 - remove the interrupt disabling
 - fix the ddr init for luton

Gregory CLEMENT (7):
  MIPS: move create_tlb() in an proper header: mipsregs.h
  MIPS: Allow to prefetch and lock instructions into cache
  MSCC: add support for Ocelot SoCs
  MSCC: add support for Luton SoCs
  MSCC: add board support for the Ocelots based evaluation boards
  MSCC: add board support for the Luton based evaluation board
  MIPS: bootm: Add support for Vcore III linux kernel

 MAINTAINERS   |  13 +
 arch/mips/Kconfig |   6 +
 arch/mips/Makefile|   1 +
 arch/mips/cpu/cpu.c   |  10 -
 arch/mips/dts/luton_pcb091.dts|  35 +
 arch/mips/dts/mscc,luton.dtsi |  87 ++
 arch/mips/dts/mscc,ocelot.dtsi| 152 
 arch/mips/dts/mscc,ocelot_pcb.dtsi|  42 +
 arch/mips/dts/ocelot_pcb120.dts   |  12 +
 arch/mips/dts/ocelot_pcb123.dts   |  12 +
 arch/mips/include/asm/cacheops.h  |  19 +
 arch/mips/include/asm/mipsregs.h  |  11 +
 arch/mips/lib/bootm.c |  78 +-
 arch/mips/mach-mscc/Kconfig   |  86 ++
 arch/mips/mach-mscc/Makefile  |   6 +
 arch/mips/mach-mscc/cpu.c | 102 +++
 arch/mips/mach-mscc/dram.c|  73 ++
 arch/mips/mach-mscc/include/ioremap.h |  51 ++
 arch/mips/mach-mscc/include/mach/common.h |  28 +
 arch/mips/mach-mscc/include/mach/ddr.h| 798 ++
 .../mips/mach-mscc/include/mach/luton/luton.h |  24 +
 .../include/mach/luton/luton_devcpu_gcb.h |  14 +
 .../include/mach/luton/luton_icpu_cfg.h   | 245 ++
 .../mach-mscc/include/mach/ocelot/ocelot.h|  24 +
 .../include/mach/ocelot/ocelot_devcpu_gcb.h   |  21 +
 .../include/mach/ocelot/ocelot_icpu_cfg.h | 274 ++
 arch/mips/mach-mscc/include/mach/tlb.h|  55 ++
 arch/mips/mach-mscc/lowlevel_init.S   |  30 +
 arch/mips/mach-mscc/lowlevel_init_luton.S |  62 ++
 arch/mips/mach-mscc/reset.c   |  36 +
 board/mscc/luton/Kconfig  |  14 +
 board/mscc/luton/Makefile |   3 +
 board/mscc/luton/luton.c  |  28 +
 board/mscc/ocelot/Kconfig |  14 +
 board/mscc/ocelot/Makefile|   4 +
 board/mscc/ocelot/ocelot.c|  58 ++
 configs/mscc_luton_defconfig  |  66 ++
 configs/mscc_ocelot_defconfig |  73 ++
 configs/mscc_ocelot_pcb120_defconfig  |  66 ++
 include/configs/vcoreiii.h|  82 ++
 40 files changed, 2785 insertions(+), 30 deletions(-)
 create mode 100644 arch/mips/dts/luton_pcb091.dts
 create mode 100644 arch/mips/dts/mscc,luton.dtsi
 create mode 100644 arch/mips/dts/mscc,ocelot.dtsi
 create mode 100644 arch/mips/dts/mscc,ocelot_pcb.dtsi
 create mode 100644 arch/mips/dts/

[U-Boot] [PATCH v3 2/7] MIPS: Allow to prefetch and lock instructions into cache

2018-12-05 Thread Gregory CLEMENT
This path add a new helper allowing to prefetch and lock instructions
into cache. This is useful very early in the boot when no RAM is
available yet.

Signed-off-by: Gregory CLEMENT 
---
 arch/mips/include/asm/cacheops.h | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 3161875441..98b67ccc8e 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -19,6 +19,25 @@ static inline void mips_cache(int op, const volatile void 
*addr)
 #endif
 }
 
+#define MIPS32_WHICH_ICACHE0x0
+#define MIPS32_FETCH_AND_LOCK  0x7
+
+#define ICACHE_LOAD_LOCK (MIPS32_WHICH_ICACHE | (MIPS32_FETCH_AND_LOCK << 2))
+
+/* Prefetch and lock instructions into cache */
+static inline void icache_lock(void *func, size_t len)
+{
+   int i, lines = ((len - 1) / ARCH_DMA_MINALIGN) + 1;
+
+   for (i = 0; i < lines; i++) {
+   asm volatile (" cache %0, %1(%2)"
+ : /* No Output */
+ : "I" ICACHE_LOAD_LOCK,
+   "n" (i * ARCH_DMA_MINALIGN),
+   "r" (func)
+ : /* No Clobbers */);
+   }
+}
 #endif /* !__ASSEMBLY__ */
 
 /*
-- 
2.19.2

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[U-Boot] [PATCH v3 1/7] MIPS: move create_tlb() in an proper header: mipsregs.h

2018-12-05 Thread Gregory CLEMENT
Export create_tlb() as an inline function in mipsregs.h. It allows to
remove the declaration of the function from the board files.

Then it will allow also to use this function very early in the boot when
the stack is not usable.

Signed-off-by: Gregory CLEMENT 
---
 arch/mips/cpu/cpu.c  | 10 --
 arch/mips/include/asm/mipsregs.h | 11 +++
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c
index 5c56ab0289..a403ff729b 100644
--- a/arch/mips/cpu/cpu.c
+++ b/arch/mips/cpu/cpu.c
@@ -28,16 +28,6 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 }
 #endif
 
-void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
-{
-   write_c0_entrylo0(low0);
-   write_c0_pagemask(pagemask);
-   write_c0_entrylo1(low1);
-   write_c0_entryhi(hi);
-   write_c0_index(index);
-   tlb_write_indexed();
-}
-
 int arch_cpu_init(void)
 {
mips_cache_probe();
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 48fa1f1f7f..930562ebb2 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -2005,6 +2005,17 @@ static inline unsigned int get_ebase_cpunum(void)
return read_c0_ebase() & 0x3ff;
 }
 
+static inline void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0,
+u32 low1)
+{
+   write_c0_entrylo0(low0);
+   write_c0_pagemask(pagemask);
+   write_c0_entrylo1(low1);
+   write_c0_entryhi(hi);
+   write_c0_index(index);
+   tlb_write_indexed();
+}
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_MIPSREGS_H */
-- 
2.19.2

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Re: [U-Boot] [PATCH] fdt: Add warning about CONFIG_OF_EMBED

2018-12-05 Thread Tom Rini
On Wed, Dec 05, 2018 at 05:08:53PM +0100, Simon Goldschmidt wrote:
> Hi Simon,
> 
> Am 05.12.2018 um 16:57 schrieb Simon Glass:
> >Hi Simon,
> >
> >On Wed, 5 Dec 2018 at 07:22, Simon Goldschmidt
> > wrote:
> >>
> >>Am 05.12.2018 um 14:57 schrieb Simon Glass:
> >>>This option has crept into use with some boards. Add a warning to try to
> >>>prevent this.
> >>>
> >>>As an example:
> >>> https://lists.denx.de/pipermail/u-boot/2017-September/304966.html
> >>
> >>We have just discussed this in another thread. There seem to be ~109
> >>defconfigs in the tree that enable OF_EMBED.
> >>
> >>I doubt all of them do this for fun, so we might want to collect the
> >>reasons they do so. I do know two:
> >>
> >>- socfpga_stratix10_defconfig needs this to get a correct u-boot-spl.hex
> >
> >Let's fix that then.
> >
> >>- I would need it to ensure in SPL, the DTB is in one block with the
> >>other readonly parts. Without OF_EMBED, we have '.text', '.bss', DT.
> >
> >Similarly, let's change that.
> >
> >CONFIG_OF_EMBED should not be a work-around for missing features that we 
> >need.
> 
> I'm with you there. Don't get me wrong, I don't want to argue to use
> OF_EMBED, just wanted to list the use cases I know so that we only fix them
> once instead of letting everyone fixing them on their own.

Yes, please, what is the way to fix say this one board?  And can we then
from there try and (semi)automate changing over?

-- 
Tom


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Re: [U-Boot] [PATCH 66/93] arm: Remove ot1200 board

2018-12-05 Thread Simon Goldschmidt

Am 05.12.2018 um 16:55 schrieb Simon Glass:

Hi Simon,

On Wed, 5 Dec 2018 at 07:17, Simon Goldschmidt
 wrote:


Am 05.12.2018 um 14:54 schrieb Simon Glass:

Hi Simon,

On Wed, 5 Dec 2018 at 06:38, Simon Goldschmidt
 wrote:


On Wed, Dec 5, 2018 at 2:21 PM Simon Glass  wrote:


Hi Simon,

On Sun, 25 Nov 2018 at 23:05, Simon Goldschmidt
 wrote:


[I've cut down the CC list a bit due to some gmail warnings]
On Mon, Nov 26, 2018 at 4:00 AM Simon Glass  wrote:


Hi Simon,

On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt
 wrote:


On Thu, Nov 22, 2018 at 9:50 PM Simon Glass  wrote:


Hi,

On Thu, 22 Nov 2018 at 10:02, Tom Rini  wrote:


On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote:

Am Do., 22. Nov. 2018, 14:44 hat Tom Rini  geschrieben:


On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote:

On 11/22/2018 01:52 PM, Tom Rini wrote:

On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote:


Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass <

s...@chromium.org>:


This board has not been converted to CONFIG_DM_BLK by the deadline.
Remove it.



As the board is still mainted I will NAK it for the moment. Are there
any hints want needs to be done
to port thie board over to new DM stuff?


Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and
selecting/providing a dtb file.  I see ot1200 is using DWC_AHSATA which
needs more work, but this is the board-level work that needs doing.


Wasn't there a possibility to use platform data in board file instead of
DT ? Or is DT mandatory now , including the libfdt overhead ?


In short, DT for U-Boot and platform data for SPL is what's recommended,
yes.



This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it
seems a little strange or outdated overall.

Would there be some kind of reference architecture or mach to look at
what's the suggested/up-to-date way to implement SPL? Also regarding code
flow?


So, SPL is where things get, ahem, fuzzy.  While I don't want to
encourage boundless growth in U-Boot proper, we aren't exactly size
constrained (but rather, functional/logical constrained).  But in SPL,
yes, we have many platforms with 32/64/128 kilobyte hard limits (and
some smaller) and we can't always shove in a "TPL" before SPL either.
So in SPL we do make use of platform data instead.  While not the
smallest size constraint, am335x_hs_evm is a reasonable thing to look at
in this case.


Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house -
still uses DT, but it gets converted into C structs so saves code
space.

firefly-rk3288 is a pretty good DM/DT example, including SPL.


I've currently got an issue on socfpga gen5 that could be solved best
by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a
problem for CRC calculation). However, it could probably also solve by
using platform data (but that doesn't work out of the box, yet). The
problem with CONFIG_OF_EMBED is that I think it's OK to enable this
for SPL but I don't like enabling it for U-Boot, so:

Would it make sense to duplicate the whole "Provider of DTB for OF
control" choice so that it can be OF_EMBED for SPL but different for
U-Boot? Or does it make more sense to convert socfpga gen5 to use
OF_PLATDATA?


We should not be using OF_EMBED in in-tree boards or production code.


What's the reason for this? I can understand this for U-Boot, and I
can understand that it's at least theoretically a bit cleaner for SPL,
too. But there are some drawbacks when doing this in SPL where code is
not relocated:
- you lose the ability to check total size in linker file (which is
bad for size-constrained platforms: sometimes you notice failure only
when booting)


You can add an SPL size check in Makefile.spl if you like.


That might be required, yes.


- you get an inconsistent memory layout regarding read/write: the
linker places bss at the end but then, DTB follows as const data


This should be handled by the $(SPL-BIN)-pad.bin file (or by binman if
you are using that).


I don't understand that. How does the padding help? I have these
sections (roughly):
- text: readonly
- bss: writable
- DTB: readonly, added as post build step after linking

How does $(SPL-BIN)-pad.bin help?


It covers over the BSS section so that the image ends where the DTB
starts, thus fixing the addressing issue you mentioned. It allows you
to do this:

cat u-boot-spl-nodtb.bin u-boot-spl.dtn >-u-boot-spl.bin




- binary size "on disk" grows due to this inconsistent memory layout
(since the flat binary includes the DTB, it needs to include the
zeroed-out bss, too)


Right, but this is a few bytes. Why does it matter?


- "spl/u-boot-spl.hex" created by the default Makefiles does not seem
to include the DTB


That might just be a bug.


It might, yes. The hex file is currently built from the elf file, so
there's no DTB in there.


OK. Could be worth a patch.






Can you please explain the issue a bit more?


Of course: socfpga gen5 h

Re: [U-Boot] [PATCH] fdt: Add warning about CONFIG_OF_EMBED

2018-12-05 Thread Simon Goldschmidt

Hi Simon,

Am 05.12.2018 um 16:57 schrieb Simon Glass:

Hi Simon,

On Wed, 5 Dec 2018 at 07:22, Simon Goldschmidt
 wrote:


Am 05.12.2018 um 14:57 schrieb Simon Glass:

This option has crept into use with some boards. Add a warning to try to
prevent this.

As an example:
 https://lists.denx.de/pipermail/u-boot/2017-September/304966.html


We have just discussed this in another thread. There seem to be ~109
defconfigs in the tree that enable OF_EMBED.

I doubt all of them do this for fun, so we might want to collect the
reasons they do so. I do know two:

- socfpga_stratix10_defconfig needs this to get a correct u-boot-spl.hex


Let's fix that then.


- I would need it to ensure in SPL, the DTB is in one block with the
other readonly parts. Without OF_EMBED, we have '.text', '.bss', DT.


Similarly, let's change that.

CONFIG_OF_EMBED should not be a work-around for missing features that we need.


I'm with you there. Don't get me wrong, I don't want to argue to use 
OF_EMBED, just wanted to list the use cases I know so that we only fix 
them once instead of letting everyone fixing them on their own.


Regards,
Simon
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[U-Boot] [PATCH v2 3/3] ddr: vybrid: Add calibration code to memory controler's (DDRMC) setup code

2018-12-05 Thread Lukasz Majewski
This patch extends the vf610 DDR memory controller code to support SW
leveling.

Signed-off-by: Lukasz Majewski 
Reviewed-by: Stefan Agner 


---

Changes in v2:
 - Remove not needed #ifdef

 arch/arm/mach-imx/ddrmc-vf610.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c
index ea6a49e0fa..2f59ec907f 100644
--- a/arch/arm/mach-imx/ddrmc-vf610.c
+++ b/arch/arm/mach-imx/ddrmc-vf610.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include "ddrmc-vf610-calibration.h"
 
 void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)
 {
@@ -233,4 +234,8 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const 
*timings,
 
while (!(readl(&ddrmr->cr[80]) & 0x100))
udelay(10);
+
+#ifdef CONFIG_DDRMC_VF610_CALIBRATION
+   ddrmc_calibration(ddrmr);
+#endif
 }
-- 
2.11.0

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[U-Boot] [PATCH v2 2/3] ddr: vybrid: Provide code to perform on-boot calibration

2018-12-05 Thread Lukasz Majewski
This patch provides the code to calibrate the DDR's
DQS to DQ signals (RDLVL).

It is based on:
VFxxx Controller Reference Manual, Rev. 0, 10/2016, page 1600
10.1.6.16.4.1 "Software Read Leveling in MC Evaluation Mode"

and NXP's community thread:
"Vybrid: About DDR leveling feature on DDRMC."
https://community.nxp.com/thread/395323

Signed-off-by: Lukasz Majewski 

---

Changes in v2:
 - CR93_SWLVL_EXIT -> CR94_SWLVL_EXIT (EXIT is in CR94)
 - Update Kconfig information regarding DDRMC_VF610_CALIBRATION
 - Update ddrmc-vf610-calibration. comment
 - Update code after extending imx-regs.h

 arch/arm/mach-imx/Kconfig   |  12 +
 arch/arm/mach-imx/Makefile  |   1 +
 arch/arm/mach-imx/ddrmc-vf610-calibration.c | 342 
 arch/arm/mach-imx/ddrmc-vf610-calibration.h |  45 
 4 files changed, 400 insertions(+)
 create mode 100644 arch/arm/mach-imx/ddrmc-vf610-calibration.c
 create mode 100644 arch/arm/mach-imx/ddrmc-vf610-calibration.h

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index a1566cc2ad..8631fbd481 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -78,3 +78,15 @@ config NXP_BOARD_REVISION
  NXP boards based on i.MX6/7 contain the board revision information
  stored in the fuses. Select this option if you want to be able to
  retrieve the board revision information.
+
+config DDRMC_VF610_CALIBRATION
+   bool "Enable DDRMC (DDR3) on-chip calibration"
+   depends on ARCH_VF610
+   help
+ Vybrid (vf610) SoC provides some on-chip facility to tune the DDR3
+ memory parameters. Select this option if you want to calculate them
+ at boot time.
+ NOTE:
+ NXP does NOT recommend to perform this calibration at each boot. One
+ shall perform it on a new PCB and then use those values to program
+ the ddrmc_cr_setting on relevant board file.
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 53d9e5f42b..4a07b1ea69 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_SECURE_BOOT) += hab.o
 endif
 ifeq ($(SOC),$(filter $(SOC),vf610))
 obj-y += ddrmc-vf610.o
+obj-$(CONFIG_DDRMC_VF610_CALIBRATION) += ddrmc-vf610-calibration.o
 endif
 ifneq ($(CONFIG_SPL_BUILD),y)
 obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
diff --git a/arch/arm/mach-imx/ddrmc-vf610-calibration.c 
b/arch/arm/mach-imx/ddrmc-vf610-calibration.c
new file mode 100644
index 00..f29de74c39
--- /dev/null
+++ b/arch/arm/mach-imx/ddrmc-vf610-calibration.c
@@ -0,0 +1,342 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * ddrmc DDR3 calibration code for NXP's VF610
+ *
+ * Copyright (C) 2018 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lu...@denx.de
+ *
+ */
+/* #define DEBUG */
+#include 
+#include 
+#include 
+#include 
+
+#include "ddrmc-vf610-calibration.h"
+
+/*
+ * Documents:
+ *
+ * [1] "Vybrid: About DDR leveling feature on DDRMC."
+ * https://community.nxp.com/thread/395323
+ *
+ * [2] VFxxx Controller Reference Manual, Rev. 0, 10/2016
+ *
+ *
+ * NOTE
+ * 
+ *
+ * NXP recommends setting 'fixed' parameters instead of performing the
+ * training at each boot.
+ *
+ * Use those functions to determine those values on new HW, read the
+ * calculated value from registers and add them to the board specific
+ * struct ddrmc_cr_setting.
+ *
+ * SW leveling supported operations - CR93[SW_LVL_MODE]:
+ *
+ * - 0x0 (b'00) - No leveling
+ *
+ * - 0x1 (b'01) - WRLVL_DL_X - It is not recommended to perform this tuning
+ * on HW designs utilizing non-flyback topology
+ * (Single DDR3 with x16).
+ * Instead the WRLVL_DL_0/1 fields shall be set
+ * based on trace length differences from their
+ * layout.
+ * Mismatches up to 25% or tCK (clock period) are
+ * allowed, so the value in the filed doesn’t have
+ * to be very accurate.
+ *
+ * - 0x2 (b'10) - RDLVL_DL_0/1 - refers to adjusting the DQS strobe in relation
+ * to the DQ signals so that the strobe edge is
+ * centered in the window of valid read data.
+ *
+ * - 0x3 (b'11) - RDLVL_GTDL_0/1 - refers to the delay the PHY uses to un-gate
+ * the Read DQS strobe pad from the time that the
+ * PHY enables the pad to input the strobe signal.
+ *
+ */
+static int ddr_cal_get_first_edge_index(unsigned long *bmap, enum edge e,
+   int samples, int start, int max)
+{
+   int i, ret = -1;
+
+   /*
+* We look only for the first value (and filter out
+* some wrong data)
+*/
+   switch (e) {
+   case RISING_EDGE:
+   f

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