date:20181216

Re: [U-Boot] [PATCH v4] zynq-gem: Use appropriate cache flush/invalidate for RX and TX

2018-12-16 Thread Stefan Theil

> -Ursprüngliche Nachricht-
> Von: Bin Meng [mailto:bmeng...@gmail.com]
> Gesendet: Montag, 17. Dezember 2018 08:52
> An: Stefan Theil
> Cc: U-Boot Mailing List; Michal Simek
> Betreff: Re: [PATCH v4] zynq-gem: Use appropriate cache flush/invalidate for
> RX and TX
> 
> Hi Stefan,
> 
> On Mon, Dec 17, 2018 at 3:49 PM Stefan Theil  mode.de> wrote:
> >
> > The cache was only flushed before *transmitting* packets, but not when
> > receiving them, leading to an issue where new packets were handed to
> > the receive handler with old contents in cache. This only happens when
> > a lot of packets are received without sending packages every now and
> > then. Also flushing the receive buffers in the transmit function makes
> > no sense and can be removed.
> >
> > Signed-off-by: Stefan Theil 
> >
> > ---
> > Changes for v2:
> > - Use invalidate_dcache_range instead of
> >   flush_dcache_range
> > Changes for v3:
> > - Remove unnecessary flushing of all RX
> >   buffers in zynq_gem_send
> > Changes for v4:
> > - Invalidate receive buffers after allocating
> >   them in zynq_gem_probe
> > ---
> >  drivers/net/zynq_gem.c | 12 ++--
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index
> > 9bd79b198a..79a22fb1ed 100644
> > --- a/drivers/net/zynq_gem.c
> > +++ b/drivers/net/zynq_gem.c
> > @@ -570,11 +570,6 @@ static int zynq_gem_send(struct udevice *dev,
> void *ptr, int len)
> > addr &= ~(ARCH_DMA_MINALIGN - 1);
> > size = roundup(len, ARCH_DMA_MINALIGN);
> > flush_dcache_range(addr, addr + size);
> > -
> > -   addr = (ulong)priv->rxbuffers;
> > -   addr &= ~(ARCH_DMA_MINALIGN - 1);
> > -   size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
> > -   flush_dcache_range(addr, addr + size);
> > barrier();
> >
> > /* Start transmit */
> > @@ -621,6 +616,9 @@ static int zynq_gem_recv(struct udevice *dev, int
> > flags, uchar **packetp)
> >
> > *packetp = (uchar *)(uintptr_t)addr;
> >
> > +   invalidate_dcache_range(addr, addr + roundup(PKTSIZE_ALIGN,
> ARCH_DMA_MINALIGN));
> > +   barrier();
> > +
> > return frame_len;
> >  }
> >
> > @@ -705,7 +703,9 @@ static int zynq_gem_probe(struct udevice *dev)
> > if (!priv->rxbuffers)
> > return -ENOMEM;
> >
> > -   memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
> > +   u32 addr = (ulong)priv->rxbuffers;
> > +   invalidate_dcache_range(addr, addr + roundup(RX_BUF *
> PKTSIZE_ALIGN, ARCH_DMA_MINALIGN));
> > +   barrier();
> >
> 
> Does this fix anything? I see no need to update this.

I was just following Michal's suggestion 
(https://lists.denx.de/pipermail/u-boot/2018-December/351969.html):
> Also in probe there should be flush of priv->rxbuffers to make sure that
> it is initialized properly.
> (memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN); - this should be
> useless)

> 
> > /* Align bd_space to MMU_SECTION_SHIFT */
> > bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
> > --
> 
> Regards,
> Bin

Regards,
Stefan
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Re: [U-Boot] [PATCH v2 11/11] fdt: tegra: Drop COMPAT_AMS_AS3722

2018-12-16 Thread Lukasz Majewski

On Sun, 16 Dec 2018 19:36:38 -0700
Simon Glass  wrote:

> This is no-longer used. Drop it.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2:
> - Add new patches as per the cover letter
> 
>  include/fdtdec.h | 1 -
>  lib/fdtdec.c | 1 -
>  2 files changed, 2 deletions(-)
> 
> diff --git a/include/fdtdec.h b/include/fdtdec.h
> index de7dd63b5a4..2a8ad960260 100644
> --- a/include/fdtdec.h
> +++ b/include/fdtdec.h
> @@ -141,7 +141,6 @@ enum fdt_compat_id {
>   COMPAT_GENERIC_SPI_FLASH,   /* Generic SPI Flash chip */
>   COMPAT_SAMSUNG_EXYNOS_SYSMMU,   /* Exynos sysmmu */
>   COMPAT_INTEL_MICROCODE, /* Intel microcode
> update */
> - COMPAT_AMS_AS3722,  /* AMS AS3722 PMIC */
>   COMPAT_INTEL_QRK_MRC,   /* Intel Quark MRC */
>   COMPAT_ALTERA_SOCFPGA_DWMAC,/* SoCFPGA Ethernet
> controller */ COMPAT_ALTERA_SOCFPGA_DWMMC,/* SoCFPGA DWMMC
> controller */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index 18b8bf81955..e06f2282028 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -48,7 +48,6 @@ static const char * const
> compat_names[COMPAT_COUNT] = { COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
>   COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
>   COMPAT(INTEL_MICROCODE, "intel,microcode"),
> - COMPAT(AMS_AS3722, "ams,as3722"),
>   COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
>   COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
>   COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH v2 09/11] samsung: mmc: Drop old MMC init code

2018-12-16 Thread Lukasz Majewski

On Sun, 16 Dec 2018 19:36:36 -0700
Simon Glass  wrote:

> Now that these boards use driver model we can drop the old code. At
> present s5p_mmc_init() is still used by goni and smdkv310 so cannot be
> removed unless we remove those boards.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2: None
> 
>  arch/arm/mach-exynos/include/mach/mmc.h |  2 -
>  board/samsung/common/board.c| 38 ---
>  drivers/mmc/s5p_sdhci.c | 50
> - 3 files changed, 90 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/include/mach/mmc.h
> b/arch/arm/mach-exynos/include/mach/mmc.h index
> ca4e7eda342..eece44ea1aa 100644 ---
> a/arch/arm/mach-exynos/include/mach/mmc.h +++
> b/arch/arm/mach-exynos/include/mach/mmc.h @@ -64,6 +64,4 @@ static
> inline int s5p_mmc_init(int index, int bus_width) return
> s5p_sdhci_init(base, index, bus_width); }
>  
> -int exynos_mmc_init(const void *blob);
> -
>  #endif
> diff --git a/board/samsung/common/board.c
> b/board/samsung/common/board.c index 3391228522c..96228a86a11 100644
> --- a/board/samsung/common/board.c
> +++ b/board/samsung/common/board.c
> @@ -249,44 +249,6 @@ int board_eth_init(bd_t *bis)
>   return 0;
>  }
>  
> -#ifdef CONFIG_MMC
> -static int init_mmc(void)
> -{
> -#ifdef CONFIG_MMC_SDHCI
> - return exynos_mmc_init(gd->fdt_blob);
> -#else
> - return 0;
> -#endif
> -}
> -
> -static int init_dwmmc(void)
> -{
> -#ifdef CONFIG_MMC_DW
> - return exynos_dwmmc_init(gd->fdt_blob);
> -#else
> - return 0;
> -#endif
> -}
> -
> -int board_mmc_init(bd_t *bis)
> -{
> - int ret;
> -
> - if (get_boot_mode() == BOOT_MODE_SD) {
> - ret = init_mmc();
> - ret |= init_dwmmc();
> - } else {
> - ret = init_dwmmc();
> - ret |= init_mmc();
> - }
> -
> - if (ret)
> - debug("mmc init failed\n");
> -
> - return ret;
> -}
> -#endif
> -
>  #ifdef CONFIG_DISPLAY_BOARDINFO
>  int checkboard(void)
>  {
> diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
> index 591a3bce084..9dd0b865eb8 100644
> --- a/drivers/mmc/s5p_sdhci.c
> +++ b/drivers/mmc/s5p_sdhci.c
> @@ -118,9 +118,6 @@ int s5p_sdhci_init(u32 regbase, int index, int
> bus_width) return s5p_sdhci_core_init(host);
>  }
>  
> -#if CONFIG_IS_ENABLED(OF_CONTROL)
> -struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
> -
>  static int do_sdhci_init(struct sdhci_host *host)
>  {
>   int dev_id, flag, ret;
> @@ -191,53 +188,6 @@ static int sdhci_get_config(const void *blob,
> int node, struct sdhci_host *host) return 0;
>  }
>  
> -static int process_nodes(const void *blob, int node_list[], int
> count) -{
> - struct sdhci_host *host;
> - int i, node, ret;
> - int failed = 0;
> -
> - debug("%s: count = %d\n", __func__, count);
> -
> - /* build sdhci_host[] for each controller */
> - for (i = 0; i < count; i++) {
> - node = node_list[i];
> - if (node <= 0)
> - continue;
> -
> - host = &sdhci_host[i];
> -
> - ret = sdhci_get_config(blob, node, host);
> - if (ret) {
> - printf("%s: failed to decode dev %d
> (%d)\n",  __func__, i, ret);
> - failed++;
> - continue;
> - }
> -
> - ret = do_sdhci_init(host);
> - if (ret && ret != -ENODEV) {
> - printf("%s: failed to initialize dev %d
> (%d)\n", __func__, i, ret);
> - failed++;
> - }
> - }
> -
> - /* we only consider it an error when all nodes fail */
> - return (failed == count ? -1 : 0);
> -}
> -
> -int exynos_mmc_init(const void *blob)
> -{
> - int count;
> - int node_list[SDHCI_MAX_HOSTS];
> -
> - count = fdtdec_find_aliases_for_id(blob, "mmc",
> - COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
> - SDHCI_MAX_HOSTS);
> -
> - return process_nodes(blob, node_list, count);
> -}
> -#endif
> -
>  #ifdef CONFIG_DM_MMC
>  static int s5p_sdhci_probe(struct udevice *dev)
>  {

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

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Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de


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Re: [U-Boot] [PATCH v2 10/11] fdt: samsung: Drop unused fdt_compat_id values

2018-12-16 Thread Lukasz Majewski

On Sun, 16 Dec 2018 19:36:37 -0700
Simon Glass  wrote:

> This enum still exists but we can shrink it a little based on recent
> driver-model conversions with samsung. Update it to remove unused
> items.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2: None
> 
>  include/fdtdec.h | 6 --
>  lib/fdtdec.c | 6 --
>  2 files changed, 12 deletions(-)
> 
> diff --git a/include/fdtdec.h b/include/fdtdec.h
> index f1bcbf837ff..de7dd63b5a4 100644
> --- a/include/fdtdec.h
> +++ b/include/fdtdec.h
> @@ -133,18 +133,12 @@ enum fdt_compat_id {
>   /* Tegra210 XUSB pad
> controller */ COMPAT_SMSC_LAN9215,/* SMSC 10/100
> Ethernet LAN9215 */ COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5
> SROMC */
> - COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller
> */
> - COMPAT_SAMSUNG_EXYNOS5_SOUND,   /* Exynos Sound */
> - COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound
> Codec */ COMPAT_SAMSUNG_EXYNOS_USB_PHY,   /* Exynos phy
> controller for usb2.0 */ COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos
> phy controller for usb3.0 */ COMPAT_SAMSUNG_EXYNOS_TMU,   /*
> Exynos TMU */ COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi
> dsi */ COMPAT_SAMSUNG_EXYNOS_DWMMC,   /* Exynos DWMMC controller
> */
> - COMPAT_SAMSUNG_EXYNOS_MMC,  /* Exynos MMC controller */
>   COMPAT_GENERIC_SPI_FLASH,   /* Generic SPI Flash chip */
> - COMPAT_MAXIM_98095_CODEC,   /* MAX98095 Codec */
> - COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C
> Controller */ COMPAT_SAMSUNG_EXYNOS_SYSMMU,   /* Exynos sysmmu */
>   COMPAT_INTEL_MICROCODE, /* Intel microcode
> update */ COMPAT_AMS_AS3722,  /* AMS AS3722 PMIC */
> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index 6f8ec0dbed7..18b8bf81955 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -40,18 +40,12 @@ static const char * const
> compat_names[COMPAT_COUNT] = { COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL,
> "nvidia,tegra210-xusb-padctl"), COMPAT(SMSC_LAN9215, "smsc,lan9215"),
>   COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
> - COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
> - COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
> - COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
>   COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
>   COMPAT(SAMSUNG_EXYNOS5_USB3_PHY,
> "samsung,exynos5250-usb3-phy"), COMPAT(SAMSUNG_EXYNOS_TMU,
> "samsung,exynos-tmu"), COMPAT(SAMSUNG_EXYNOS_MIPI_DSI,
> "samsung,exynos-mipi-dsi"), COMPAT(SAMSUNG_EXYNOS_DWMMC,
> "samsung,exynos-dwmmc"),
> - COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
>   COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
> - COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
> - COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
>   COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
>   COMPAT(INTEL_MICROCODE, "intel,microcode"),
>   COMPAT(AMS_AS3722, "ams,as3722"),

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH v2 08/11] samsung: Drop board_enable_audio_codec()

2018-12-16 Thread Lukasz Majewski

On Sun, 16 Dec 2018 19:36:35 -0700
Simon Glass  wrote:

> This function is not needed now since the audio codecs have been
> converted to proper drivers. The codec-enable GPIO is handled there.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2: None
> 
>  board/samsung/common/exynos5-dt.c | 29 -
>  1 file changed, 29 deletions(-)
> 
> diff --git a/board/samsung/common/exynos5-dt.c
> b/board/samsung/common/exynos5-dt.c index c183965b92a..87eb381345d
> 100644 --- a/board/samsung/common/exynos5-dt.c
> +++ b/board/samsung/common/exynos5-dt.c
> @@ -34,37 +34,8 @@
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> -static void board_enable_audio_codec(void)
> -{
> - int node, ret;
> - struct gpio_desc en_gpio;
> -
> - node = fdtdec_next_compatible(gd->fdt_blob, 0,
> - COMPAT_SAMSUNG_EXYNOS5_SOUND);
> - if (node <= 0)
> - return;
> -
> - ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
> -  "codec-enable-gpio", 0,
> &en_gpio,
> -  GPIOD_IS_OUT |
> GPIOD_IS_OUT_ACTIVE);
> - if (ret == -FDT_ERR_NOTFOUND)
> - return;
> -
> - /* Turn on the GPIO which connects to the codec's "enable"
> line. */
> - gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);
> -
> -#ifdef CONFIG_SOUND_MAX98095
> - /* Enable MAX98095 Codec */
> - gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
> - gpio_direction_output(EXYNOS5_GPIO_X17, 1);
> - gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
> -#endif
> -}
> -
>  int exynos_init(void)
>  {
> - board_enable_audio_codec();
> -
>   return 0;
>  }
>  

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH v4] zynq-gem: Use appropriate cache flush/invalidate for RX and TX

2018-12-16 Thread Bin Meng

Hi Stefan,

On Mon, Dec 17, 2018 at 3:49 PM Stefan Theil  wrote:
>
> The cache was only flushed before *transmitting* packets, but not
> when receiving them, leading to an issue where new packets were
> handed to the receive handler with old contents in cache. This
> only happens when a lot of packets are received without sending
> packages every now and then. Also flushing the receive buffers
> in the transmit function makes no sense and can be removed.
>
> Signed-off-by: Stefan Theil 
>
> ---
> Changes for v2:
> - Use invalidate_dcache_range instead of
>   flush_dcache_range
> Changes for v3:
> - Remove unnecessary flushing of all RX
>   buffers in zynq_gem_send
> Changes for v4:
> - Invalidate receive buffers after allocating
>   them in zynq_gem_probe
> ---
>  drivers/net/zynq_gem.c | 12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index 9bd79b198a..79a22fb1ed 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -570,11 +570,6 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, 
> int len)
> addr &= ~(ARCH_DMA_MINALIGN - 1);
> size = roundup(len, ARCH_DMA_MINALIGN);
> flush_dcache_range(addr, addr + size);
> -
> -   addr = (ulong)priv->rxbuffers;
> -   addr &= ~(ARCH_DMA_MINALIGN - 1);
> -   size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
> -   flush_dcache_range(addr, addr + size);
> barrier();
>
> /* Start transmit */
> @@ -621,6 +616,9 @@ static int zynq_gem_recv(struct udevice *dev, int flags, 
> uchar **packetp)
>
> *packetp = (uchar *)(uintptr_t)addr;
>
> +   invalidate_dcache_range(addr, addr + roundup(PKTSIZE_ALIGN, 
> ARCH_DMA_MINALIGN));
> +   barrier();
> +
> return frame_len;
>  }
>
> @@ -705,7 +703,9 @@ static int zynq_gem_probe(struct udevice *dev)
> if (!priv->rxbuffers)
> return -ENOMEM;
>
> -   memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
> +   u32 addr = (ulong)priv->rxbuffers;
> +   invalidate_dcache_range(addr, addr + roundup(RX_BUF * PKTSIZE_ALIGN, 
> ARCH_DMA_MINALIGN));
> +   barrier();
>

Does this fix anything? I see no need to update this.

> /* Align bd_space to MMU_SECTION_SHIFT */
> bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
> --

Regards,
Bin
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[U-Boot] [PATCH v4] zynq-gem: Use appropriate cache flush/invalidate for RX and TX

2018-12-16 Thread Stefan Theil

The cache was only flushed before *transmitting* packets, but not
when receiving them, leading to an issue where new packets were
handed to the receive handler with old contents in cache. This
only happens when a lot of packets are received without sending
packages every now and then. Also flushing the receive buffers
in the transmit function makes no sense and can be removed.

Signed-off-by: Stefan Theil 

---
Changes for v2:
- Use invalidate_dcache_range instead of
  flush_dcache_range
Changes for v3:
- Remove unnecessary flushing of all RX
  buffers in zynq_gem_send
Changes for v4:
- Invalidate receive buffers after allocating
  them in zynq_gem_probe
---
 drivers/net/zynq_gem.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 9bd79b198a..79a22fb1ed 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -570,11 +570,6 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, 
int len)
addr &= ~(ARCH_DMA_MINALIGN - 1);
size = roundup(len, ARCH_DMA_MINALIGN);
flush_dcache_range(addr, addr + size);
-
-   addr = (ulong)priv->rxbuffers;
-   addr &= ~(ARCH_DMA_MINALIGN - 1);
-   size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
-   flush_dcache_range(addr, addr + size);
barrier();
 
/* Start transmit */
@@ -621,6 +616,9 @@ static int zynq_gem_recv(struct udevice *dev, int flags, 
uchar **packetp)
 
*packetp = (uchar *)(uintptr_t)addr;
 
+   invalidate_dcache_range(addr, addr + roundup(PKTSIZE_ALIGN, 
ARCH_DMA_MINALIGN));
+   barrier();
+
return frame_len;
 }
 
@@ -705,7 +703,9 @@ static int zynq_gem_probe(struct udevice *dev)
if (!priv->rxbuffers)
return -ENOMEM;
 
-   memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
+   u32 addr = (ulong)priv->rxbuffers;
+   invalidate_dcache_range(addr, addr + roundup(RX_BUF * PKTSIZE_ALIGN, 
ARCH_DMA_MINALIGN));
+   barrier();
 
/* Align bd_space to MMU_SECTION_SHIFT */
bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
-- 
2.17.1

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Re: [U-Boot] [PATCH v2 04/11] exynos: Convert to use CONFIG_BLK

2018-12-16 Thread Lukasz Majewski

On Sun, 16 Dec 2018 19:36:31 -0700
Simon Glass  wrote:

> Move all exynos boards over to use CONFIG_BLK.
> 
> This converts s5p_goni also, but adding dummy functions for pinmux and
> peripheral ID. This will not function correctly, but gives the
> maintainer more time to convert the board if desired.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2:
> - Update to convert s5p_goni also
> 
>  arch/arm/mach-exynos/Kconfig   |  7 +++
>  arch/arm/mach-s5pc1xx/Kconfig  |  2 ++
>  arch/arm/mach-s5pc1xx/Makefile |  1 +
>  arch/arm/mach-s5pc1xx/pinmux.c | 20 
>  4 files changed, 30 insertions(+)
>  create mode 100644 arch/arm/mach-s5pc1xx/pinmux.c
> 
> diff --git a/arch/arm/mach-exynos/Kconfig
> b/arch/arm/mach-exynos/Kconfig index ed04369cfae..38077703621 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -8,6 +8,8 @@ config ARCH_EXYNOS4
>   bool "Exynos4 SoC family"
>   select BOARD_EARLY_INIT_F
>   select CPU_V7A
> + select BLK
> + select DM_MMC
>   help
> Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU.
> There are multiple SoCs in this family including Exynos4210,
> Exynos4412, @@ -24,6 +26,9 @@ config ARCH_EXYNOS5
>   imply USB_ETHER_ASIX
>   imply USB_ETHER_RTL8152
>   imply USB_ETHER_SMSC95XX
> + select BLK
> + select DM_MMC
> +
>   help
> Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU
> (and Cortex-A7 CPU in big.LITTLE configuration). There are multiple
> SoCs @@ -33,6 +38,8 @@ config ARCH_EXYNOS7
>   bool "Exynos7 SoC family"
>   select ARM64
>   select BOARD_EARLY_INIT_F
> + select BLK
> + select DM_MMC
>   help
> Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU
> or Cortex-A53 CPU (and some in a big.LITTLE configuration). There are
> diff --git a/arch/arm/mach-s5pc1xx/Kconfig
> b/arch/arm/mach-s5pc1xx/Kconfig index 04acdaad79c..8cffced5512 100644
> --- a/arch/arm/mach-s5pc1xx/Kconfig
> +++ b/arch/arm/mach-s5pc1xx/Kconfig
> @@ -7,6 +7,8 @@ choice
>  config TARGET_S5P_GONI
>   bool "S5P Goni board"
>   select OF_CONTROL
> + select BLK
> + select DM_MMC
>  
>  config TARGET_SMDKC100
>   bool "Support smdkc100 board"
> diff --git a/arch/arm/mach-s5pc1xx/Makefile
> b/arch/arm/mach-s5pc1xx/Makefile index a4be3fcbdae..ab804604d54 100644
> --- a/arch/arm/mach-s5pc1xx/Makefile
> +++ b/arch/arm/mach-s5pc1xx/Makefile
> @@ -10,3 +10,4 @@ obj-y   = cache.o
>  obj-y+= reset.o
>  
>  obj-y+= clock.o
> +obj-y+= pinmux.o
> diff --git a/arch/arm/mach-s5pc1xx/pinmux.c
> b/arch/arm/mach-s5pc1xx/pinmux.c new file mode 100644
> index 000..511e57a28df
> --- /dev/null
> +++ b/arch/arm/mach-s5pc1xx/pinmux.c
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Dummy functions to keep s3p_goni building (although it won't work)
   s5p_goni

> + *
> + * Copyright 2018 Google LLC
> + * Written by Simon Glass 
> + */
> +
> +#include 
> +#include 
> +
> +int exynos_pinmux_config(int peripheral, int flags)
> +{
> + return 0;
> +}
> +
> +int pinmux_decode_periph_id(const void *blob, int node)
> +{
> + return 0;
> +}

Despite the above comment, rest seems Ok.

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH v2 03/11] exynos: Drop duplicate 'model' line

2018-12-16 Thread Lukasz Majewski

On Sun, 16 Dec 2018 19:36:30 -0700
Simon Glass  wrote:

> At present the model is shown twice, once in the generic code and once
> in the exynos code. Drop the latter.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2: None
> 
>  board/samsung/common/board.c | 14 ++
>  include/samsung/misc.h   |  2 --
>  2 files changed, 6 insertions(+), 10 deletions(-)
> 
> diff --git a/board/samsung/common/board.c
> b/board/samsung/common/board.c index 6fd26a3a919..3391228522c 100644
> --- a/board/samsung/common/board.c
> +++ b/board/samsung/common/board.c
> @@ -290,15 +290,13 @@ int board_mmc_init(bd_t *bis)
>  #ifdef CONFIG_DISPLAY_BOARDINFO
>  int checkboard(void)
>  {
> - const char *board_info;
> + if (IS_ENABLED(CONFIG_BOARD_TYPES)) {
> + const char *board_info = get_board_type();
> +
> + if (board_info)
> + printf("Type:  %s\n", board_info);
> + }
>  
> - board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
> - printf("Board: %s\n", board_info ? board_info : "unknown");
> -#ifdef CONFIG_BOARD_TYPES
> - board_info = get_board_type();
> - if (board_info)
> - printf("Type:  %s\n", board_info);
> -#endif
>   return 0;
>  }
>  #endif
> diff --git a/include/samsung/misc.h b/include/samsung/misc.h
> index 0f957dc3675..017560c2566 100644
> --- a/include/samsung/misc.h
> +++ b/include/samsung/misc.h
> @@ -32,9 +32,7 @@ void draw_logo(void);
>  char *get_dfu_alt_system(char *interface, char *devstr);
>  char *get_dfu_alt_boot(char *interface, char *devstr);
>  #endif
> -#ifdef CONFIG_BOARD_TYPES
>  void set_board_type(void);
>  const char *get_board_type(void);
> -#endif
>  
>  #endif /* __SAMSUNG_MISC_COMMON_H__ */

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH v2 02/11] Convert CONFIG_BOARD_TYPES to Kconfig

2018-12-16 Thread Lukasz Majewski

On Sun, 16 Dec 2018 19:36:29 -0700
Simon Glass  wrote:

> This converts the following to Kconfig:
>CONFIG_BOARD_TYPES
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2:
> - Remove stranded comments in the header files
> 
>  common/Kconfig   | 8 
>  configs/axs101_defconfig | 1 +
>  configs/axs103_defconfig | 1 +
>  configs/odroid-xu3_defconfig | 1 +
>  configs/odroid_defconfig | 1 +
>  include/configs/axs10x.h | 5 -
>  include/configs/hsdk.h   | 5 -
>  include/configs/odroid.h | 1 -
>  include/configs/odroid_xu3.h | 1 -
>  scripts/config_whitelist.txt | 1 -
>  10 files changed, 12 insertions(+), 13 deletions(-)
> 
> diff --git a/common/Kconfig b/common/Kconfig
> index 57bd16d9623..a118bbb4b65 100644
> --- a/common/Kconfig
> +++ b/common/Kconfig
> @@ -645,6 +645,14 @@ config DISPLAY_BOARDINFO_LATE
> the relocation phase. The board function checkboard() is
> called to do this.
>  
> +config BOARD_TYPES
> + bool "Call get_board_type() to get and display the board
> type"
> + help
> +   If this option is enabled, checkboard() will call
> get_board_type()
> +   to get a string containing the board type and this will be
> +   displayed immediately after the model is shown on the
> console
> +   early in boot.
> +
>  menu "Start-up hooks"
>  
>  config ARCH_EARLY_INIT_R
> diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
> index b4621c359fc..126ee1a3edf 100644
> --- a/configs/axs101_defconfig
> +++ b/configs/axs101_defconfig
> @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART=y
>  CONFIG_BOOTDELAY=3
>  CONFIG_USE_BOOTARGS=y
>  CONFIG_BOOTARGS="console=ttyS3,115200n8"
> +CONFIG_BOARD_TYPES=y
>  CONFIG_BOARD_EARLY_INIT_F=y
>  CONFIG_HUSH_PARSER=y
>  CONFIG_SYS_PROMPT="AXS# "
> diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
> index e7894d297cd..c50d51b189b 100644
> --- a/configs/axs103_defconfig
> +++ b/configs/axs103_defconfig
> @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART=y
>  CONFIG_BOOTDELAY=3
>  CONFIG_USE_BOOTARGS=y
>  CONFIG_BOOTARGS="console=ttyS3,115200n8"
> +CONFIG_BOARD_TYPES=y
>  CONFIG_BOARD_EARLY_INIT_F=y
>  CONFIG_HUSH_PARSER=y
>  CONFIG_SYS_PROMPT="AXS# "
> diff --git a/configs/odroid-xu3_defconfig
> b/configs/odroid-xu3_defconfig index 11796e5bdf4..f6f05b29483 100644
> --- a/configs/odroid-xu3_defconfig
> +++ b/configs/odroid-xu3_defconfig
> @@ -2,6 +2,7 @@ CONFIG_ARM=y
>  CONFIG_ARCH_EXYNOS=y
>  CONFIG_SYS_TEXT_BASE=0x43E0
>  CONFIG_ARCH_EXYNOS5=y
> +CONFIG_BOARD_TYPES=y
>  CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2"
>  CONFIG_DISTRO_DEFAULTS=y
>  CONFIG_NR_DRAM_BANKS=8
> diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
> index cdb033ba780..184bb62c1c1 100644
> --- a/configs/odroid_defconfig
> +++ b/configs/odroid_defconfig
> @@ -3,6 +3,7 @@ CONFIG_ARCH_EXYNOS=y
>  CONFIG_SYS_TEXT_BASE=0x43e0
>  CONFIG_ARCH_EXYNOS4=y
>  CONFIG_TARGET_ODROID=y
> +CONFIG_BOARD_TYPES=y
>  CONFIG_DISTRO_DEFAULTS=y
>  CONFIG_NR_DRAM_BANKS=8
>  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h
> index 1b2966fd612..79411282ce2 100644
> --- a/include/configs/axs10x.h
> +++ b/include/configs/axs10x.h
> @@ -31,11 +31,6 @@
>  #define CONFIG_SYS_BOOTM_LEN SZ_128M
>  #define CONFIG_SYS_LOAD_ADDR 0x8200
>  
> -/*
> - * This board might be of different versions so handle it
> - */
> -#define CONFIG_BOARD_TYPES
> -
>  /*
>   * NAND Flash configuration
>   */
> diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h
> index cdf4fddd940..d8331206cd9 100644
> --- a/include/configs/hsdk.h
> +++ b/include/configs/hsdk.h
> @@ -32,11 +32,6 @@
>  #define CONFIG_SYS_BOOTM_LEN SZ_128M
>  #define CONFIG_SYS_LOAD_ADDR 0x8200
>  
> -/*
> - * This board might be of different versions so handle it
> - */
> -#define CONFIG_BOARD_TYPES
> -
>  /*
>   * UART configuration
>   */
> diff --git a/include/configs/odroid.h b/include/configs/odroid.h
> index ad77242e380..bc044e069e0 100644
> --- a/include/configs/odroid.h
> +++ b/include/configs/odroid.h
> @@ -186,7 +186,6 @@
>   * TODO: Add Odroid X support
>   */
>  #define CONFIG_MISC_COMMON
> -#define CONFIG_BOARD_TYPES
>  
>  #undef CONFIG_REVISION_TAG
>  
> diff --git a/include/configs/odroid_xu3.h
> b/include/configs/odroid_xu3.h index f683ee46e39..c2363dd1eef 100644
> --- a/include/configs/odroid_xu3.h
> +++ b/include/configs/odroid_xu3.h
> @@ -86,7 +86,6 @@
>  /* Set soc_rev, soc_id, board_rev, boardname, fdtfile */
>  #define CONFIG_ODROID_REV_AIN9
>  #define CONFIG_REVISION_TAG
> -#define CONFIG_BOARD_TYPES
>  
>  #undef CONFIG_SYS_BOARD
>  #define CONFIG_SYS_BOARD "odroid"
> diff --git a/scripts/config_whitelist.txt
> b/scripts/config_whitelist.txt index b8addeaf693..335977b3038 100644
> --- a/scripts/config_whitelist.txt
> +++ b/scripts/config_whitelist.txt
> @@ -132,7 +132,6 @@ CONFIG_BOARD_POSTCLK_INIT
>  CONFIG_BOARD_REVISION_T

Re: [U-Boot] [PATCH v2 01/11] odroid: Resync defconfigs

2018-12-16 Thread Lukasz Majewski

On Sun, 16 Dec 2018 19:36:28 -0700
Simon Glass  wrote:

> Sync defconfigs again since USB_STORAGE is the default on these
> boards.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2:
> - Add new patch to resync defconfigs for odroid
> 
>  configs/odroid-xu3_defconfig | 1 -
>  configs/odroid_defconfig | 1 -
>  2 files changed, 2 deletions(-)
> 
> diff --git a/configs/odroid-xu3_defconfig
> b/configs/odroid-xu3_defconfig index d5c7cc7129d..11796e5bdf4 100644
> --- a/configs/odroid-xu3_defconfig
> +++ b/configs/odroid-xu3_defconfig
> @@ -47,7 +47,6 @@ CONFIG_USB_EHCI_HCD=y
>  CONFIG_USB_DWC3=y
>  CONFIG_USB_DWC3_GADGET=y
>  CONFIG_USB_DWC3_PHY_SAMSUNG=y
> -CONFIG_USB_STORAGE=y
>  CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="Samsung"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
> diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
> index 594800fc50c..cdb033ba780 100644
> --- a/configs/odroid_defconfig
> +++ b/configs/odroid_defconfig
> @@ -47,7 +47,6 @@ CONFIG_DM_REGULATOR_MAX77686=y
>  CONFIG_USB=y
>  CONFIG_DM_USB=y
>  CONFIG_USB_EHCI_HCD=y
> -CONFIG_USB_STORAGE=y
>  CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="Samsung"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x04e8

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH v5 3/4] arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table

2018-12-16 Thread Ang, Chee Hong

On Thu, 2018-11-29 at 12:28 +0100, Marek Vasut wrote:
> On 11/29/2018 10:40 AM, chee.hong@intel.com wrote:
> > 
> > From: "Ang, Chee Hong" 
> > 
> > Enable 'fpga' command in u-boot. User will be able to use the FPGA
> > command to program the FPGA on Stratix10 SoC.
> > 
> > Signed-off-by: Ang, Chee Hong 
> > ---
> >  arch/arm/mach-socfpga/Makefile   |  4 ++
> >  arch/arm/mach-socfpga/fpga_device.c  | 59
> > 
> >  arch/arm/mach-socfpga/include/mach/fpga_device.h | 15 ++
> >  arch/arm/mach-socfpga/include/mach/misc.h|  6 ---
> >  arch/arm/mach-socfpga/misc.c | 31 
> > -
> >  arch/arm/mach-socfpga/misc_arria10.c |  1 +
> >  arch/arm/mach-socfpga/misc_gen5.c|  1 +
> >  arch/arm/mach-socfpga/misc_s10.c |  3 ++
> >  drivers/fpga/altera.c|  6 +++
> >  include/altera.h |  4 ++
> >  10 files changed, 93 insertions(+), 37 deletions(-)
> >  create mode 100644 arch/arm/mach-socfpga/fpga_device.c
> >  create mode 100644 arch/arm/mach-
> > socfpga/include/mach/fpga_device.h
> > 
> > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-
> > socfpga/Makefile
> > index e667204..2ff1b3f 100644
> > --- a/arch/arm/mach-socfpga/Makefile
> > +++ b/arch/arm/mach-socfpga/Makefile
> > @@ -10,6 +10,10 @@ obj-y+= clock_manager.o
> >  obj-y  += misc.o
> >  obj-y  += reset_manager.o
> >  
> > +ifdef CONFIG_FPGA
> > +obj-y  += fpga_device.o
> > +endif
> > +
> >  ifdef CONFIG_TARGET_SOCFPGA_GEN5
> >  obj-y  += clock_manager_gen5.o
> >  obj-y  += misc_gen5.o
> > diff --git a/arch/arm/mach-socfpga/fpga_device.c b/arch/arm/mach-
> > socfpga/fpga_device.c
> > new file mode 100644
> > index 000..97b27eb
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/fpga_device.c
> > @@ -0,0 +1,59 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2018 Intel Corporation 
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#ifdef CONFIG_FPGA_STRATIX10
> > +/*
> > + * FPGA programming support for SoC FPGA Stratix 10
> > + */
> > +static Altera_desc altera_fpga[] = {
> > +   {
> > +   /* Family */
> > +   Intel_FPGA_Stratix10,
> > +   /* Interface type */
> > +   secure_device_manager_mailbox,
> > +   /* No limitation as additional data will be
> > ignored */
> > +   -1,
> > +   /* No device function table */
> > +   NULL,
> > +   /* Base interface address specified in driver */
> > +   NULL,
> > +   /* No cookie implementation */
> > +   0
> > +   },
> > +};
> > +#else
> > +/*
> > + * FPGA programming support for SoC FPGA Cyclone V
> > + */
> > +static Altera_desc altera_fpga[] = {
> > +   {
> > +   /* Family */
> > +   Altera_SoCFPGA,
> > +   /* Interface type */
> > +   fast_passive_parallel,
> > +   /* No limitation as additional data will be
> > ignored */
> > +   -1,
> > +   /* No device function table */
> > +   NULL,
> > +   /* Base interface address specified in driver */
> > +   NULL,
> > +   /* No cookie implementation */
> > +   0
> > +   },
> > +};
> > +#endif
> > +
> > +/* add device descriptor to FPGA device table */
> > +void socfpga_fpga_add(void)
> > +{
> > +   int i;
> > +
> > +   fpga_init();
> > +   for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
> > +   fpga_add(fpga_altera, &altera_fpga[i]);
> Why do we need this loop if there's only one entry in the array ?
This ensure we have support for future platforms which might have more
than 1 FPGA devices on the platform.

> btw this function could stay in misc.c , the altera_fpga tables could
> be
> in misc_s10.c resp. something for Gen5 IMO, so you won't need another
> new file.
Yes. This will be addressed in v6 patchsets.
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Re: [U-Boot] [PATCH 1/1] arm: sunxi: Add NULL pointer check

2018-12-16 Thread Stefan Mavrodiev



On 12/14/18 5:55 PM, Maxime Ripard wrote:

On Fri, Dec 14, 2018 at 04:14:31PM +0200, Stefan Mavrodiev wrote:

On 12/14/18 11:25 AM, Maxime Ripard wrote:

On Thu, Dec 13, 2018 at 09:12:57AM +0200, Stefan Mavrodiev wrote:

On 12/6/18 8:41 AM, Stefan Mavrodiev wrote:

On 12/5/18 5:46 PM, Maxime Ripard wrote:

On Wed, Dec 05, 2018 at 02:27:57PM +0200, Stefan Mavrodiev wrote:

Current driver doesn't check if the destination pointer is NULL.
This cause the data from the FIFO to be stored inside the internal
SDRAM ( address 0 ).

The patch add simple check if the destination pointer is NULL.

Signed-off-by: Stefan Mavrodiev 
---
    drivers/spi/sun4i_spi.c | 3 ++-
    1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c
index b86b5a00ad..38cc743c61 100644
--- a/drivers/spi/sun4i_spi.c
+++ b/drivers/spi/sun4i_spi.c
@@ -129,7 +129,8 @@ static inline void
sun4i_spi_drain_fifo(struct sun4i_spi_priv *priv, int len)
      while (len--) {
    byte = readb(&priv->regs->rxdata);
-    *priv->rx_buf++ = byte;
+    if (priv->rx_buf)
+    *priv->rx_buf++ = byte;

It seems pretty inefficient to test the pointer at each access, it
would be better to check it once before starting the transfer.

I'm not sure if that can even happen?

I've tried to check that before draining the receive fifo, but
then the controller doesn't work. I'm thinking that the fifo must
be drained in any case.

Any further comments?

I was expecting you to comment on whether the FIFO needed to be
drained or not :)

Sorry. I didn't understand that.

Anyway. After some code checking, I found that the FIFO needs to be drained
because TP_EN (Transmit Pause Enable) bit is set during bus claim.

"

In master mode, it is used to control transmit state machine to
stop smart burst sending when RX FIFO is full.

..."

Perhaps this bit should be enabled only when we want to read back data?

It's been a while since I last looked at the spi driver. What is linux
doing?


In the kernel version there is the same check, like the one in the patch:

drivers/spi/spi-sun4i.c:
static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len)
..

while (len--) {
    byte = readb(sspi->base_addr + SUN4I_RXDATA_REG);
    if (sspi->rx_buf)
        *sspi->rx_buf++ = byte;
}
.

Guess I've missed this check when I was adopting the driver for u-boot.




Maxime


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Re: [U-Boot] [PATCH v5 0/4] Stratix10 FPGA reconfiguration support

2018-12-16 Thread Ang, Chee Hong

On Thu, 2018-11-29 at 12:25 +0100, Marek Vasut wrote:
> On 11/29/2018 10:40 AM, chee.hong@intel.com wrote:
> > 
> > From: "Ang, Chee Hong" 
> > 
> > Summary of v5 changes:
> > - Patch 1/4, 2/4 and 4/4 are unchanged
> > - Patch 3/4:
> >   - add arch/arm/mach-socfpga/fpga_device.c for Cyclone/Stratix
> > platforms
> >   - remove weak socfpga_fpga_add()
> > 
> > v4 patchsets:
> > https://lists.denx.de/pipermail/u-boot/2018-November/347962.html
> > 
> > Ang, Chee Hong (4):
> >   arm: socfpga: stratix10: Add macros for mailbox's arguments
> >   arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration
> > Driver
> >   arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device
> > table
> >   arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration
> > 
> >  arch/arm/mach-socfpga/Makefile   |   4 +
> >  arch/arm/mach-socfpga/fpga_device.c  |  59 +
> >  arch/arm/mach-socfpga/include/mach/fpga_device.h |  15 ++
> >  arch/arm/mach-socfpga/include/mach/mailbox_s10.h |   6 +
> >  arch/arm/mach-socfpga/include/mach/misc.h|   6 -
> >  arch/arm/mach-socfpga/misc.c |  31 ---
> >  arch/arm/mach-socfpga/misc_arria10.c |   1 +
> >  arch/arm/mach-socfpga/misc_gen5.c|   1 +
> >  arch/arm/mach-socfpga/misc_s10.c |   3 +
> >  configs/socfpga_stratix10_defconfig  |   1 +
> >  drivers/fpga/Kconfig |  11 +
> >  drivers/fpga/Makefile|   1 +
> >  drivers/fpga/altera.c|   6 +
> >  drivers/fpga/stratix10.c | 288
> > +++
> >  include/altera.h |   8 +
> >  15 files changed, 404 insertions(+), 37 deletions(-)
> >  create mode 100644 arch/arm/mach-socfpga/fpga_device.c
> >  create mode 100644 arch/arm/mach-
> > socfpga/include/mach/fpga_device.h
> >  create mode 100644 drivers/fpga/stratix10.c
> > 
> Is this fixing the build errors I reported recently ?
This patchsets only address the coding styles/structures of FPGA
configurations for all Intel/Altera FPGA platforms.
What sort of build errors you encountered recently ?
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Re: [U-Boot] [PATCH 2/2] dm: video: lcd: MIGRATION: Add migration plan for video

2018-12-16 Thread Simon Goldschmidt

On Sun, Dec 16, 2018 at 9:30 PM Simon Glass  wrote:
>
> Add a migration plan for video which is an important subsystem in U-Boot.
>
> Signed-off-by: Simon Glass 
> ---
>
>  Makefile   | 10 ++
>  doc/driver-model/MIGRATION.txt |  8 
>  2 files changed, 18 insertions(+)
>
> diff --git a/Makefile b/Makefile
> index 4923722f82d..4b5022a53c7 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -957,6 +957,16 @@ ifneq ($(CONFIG_DM_PCI),y)
> @echo >&2 ""
>  endif
>  endif
> +ifneq ($(CONFIG_LCD)$(CONFIG_VIDEO),)
> +ifneq ($(CONFIG_DM_VIDEO),y)
> +   @echo >&2 "= WARNING =="
> +   @echo >&2 "This board does not use CONFIG_DM_VIDEO Please update"
> +   @echo >&2 "the board to use CONFIG_DM_VIDEO before the v2019.07 
> release."
> +   @echo >&2 "Failure to update by the deadline may result in board 
> removal."
> +   @echo >&2 "See doc/driver-model/MIGRATION.txt for more info."
> +   @echo >&2 ""
> +endif
> +endif
>  ifeq ($(CONFIG_OF_EMBED),y)
> @echo "= WARNING =="
> @echo "CONFIG_OF_EMBED is enabled. This option should only"
> diff --git a/doc/driver-model/MIGRATION.txt b/doc/driver-model/MIGRATION.txt
> index 03a2cae7976..dba3f9fe307 100644
> --- a/doc/driver-model/MIGRATION.txt
> +++ b/doc/driver-model/MIGRATION.txt
> @@ -92,3 +92,11 @@ The PCI subsystem has supported driver model since mid 
> 2015. Maintainers should
>  submit patches switching over to using CONFIG_DM_PCI and other base driver
>  model options in time for inclusion in the 2019.04 rerelease.
>
> +
> +CONFIG_DM_VIDEO
> +---
> +Deadline: 2019.07
> +
> +The PCI subsystem has supported driver model since early 2016. Maintainers

This is probably cut&paste and should say something like 'The video
subsystem' (not PCI)?

Regards,
Simon

> +should submit patches switching over to using CONFIG_DM_VIDEO and other base
> +driver model options in time for inclusion in the 2019.04 release.
> --
> 2.20.0.405.gbc1bbc6f85-goog
>
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Re: [U-Boot] [PATCH v2 0/2] SiFive UART support

2018-12-16 Thread Rick Chen

Hi Anup

Anup Patel  於 2018年12月17日 週一 下午12:15寫道：
>
> On Mon, Dec 17, 2018 at 7:21 AM Rick Chen  wrote:
> >
> > Hi Anup
> >
> > > > From: Anup Patel [mailto:a...@brainfault.org]
> > > > Sent: Friday, December 14, 2018 5:23 PM
> > > > To: Rick Jian-Zhi Chen(陳建志); Bin Meng; Lukas Auer
> > > > Cc: Alexander Graf; Palmer Dabbelt; Atish Patra; Christoph Hellwig; 
> > > > U-Boot
> > > > Mailing List
> > > > Subject: Re: [PATCH v2 0/2] SiFive UART support
> > > >
> > > > On Tue, Dec 11, 2018 at 8:32 PM Anup Patel  wrote:
> > > > >
> > > > > This patchset adds SiFive UART driver for SiFive UART found on SiFive
> > > > > boards.
> > > > >
> > > > > The driver is tested on QEMU sifive_u machine. In fact, with this
> > > > > patchset same U-Boot binary boots on QEMU virt machine and QEMU
> > > > > sifive_u machine in both M-mode and S-mode.
> > > > >
> > > > > The patches are based upon latest RISC-V UBoot tree
> > > > > (git://git.denx.de/u-boot-riscv.git) at commit id
> > > > > 48cbf6246052de10d35b616b5efb2f783904a49d
> > > > >
> > > > > Changes since v1:
> > > > >  - Fixed copyright header in SiFive UART driver
> > > > >  - Imply SIFIVE_SERIAL for QEMU emulation instead
> > > > >of enabling it in defconfigs.
> > > > >
> > > > > Anup Patel (2):
> > > > >   drivers: serial: Add SiFive UART driver
> > > > >   riscv: qemu: Imply SIFIVE_SERIAL for emulation
> > > > >
> > > > >  board/emulation/qemu-riscv/Kconfig |   1 +
> > > > >  drivers/serial/Kconfig |  13 ++
> > > > >  drivers/serial/Makefile|   1 +
> > > > >  drivers/serial/serial_sifive.c | 191 
> > > > > +
> > > > >  4 files changed, 206 insertions(+)
> > > > >  create mode 100644 drivers/serial/serial_sifive.c
> > > > >
> > > > > --
> > > > > 2.17.1
> > > > >
> > > >
> > > > Hi Rick,
> > > >
> > > > The required QEMU fix has been submitted by Alistair Francis on QEMU 
> > > > mailing
> > > > list.
> > > > (QEMU PATCH subject "sifive_u: Set 'clock-frequency' DT property for 
> > > > SiFive
> > > > UART")
> > > >
> > > > Can you please consider this series for U-Boot v2019.01?
> > > >
> >
> > OK
> > I will include yours in this PR.
>
> I have send v3 of this patch. Please include that.
>

Yes.
I fetch your v3 and apply to u-boot-riscv.git.
Travis is verifying.
Then I will send a PR later.

B.R
Rick

> Thanks,
> Anup
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Re: [U-Boot] [PATCH v2] riscv: configs: Rename ax25-ae350 defconfig

2018-12-16 Thread Bin Meng

On Mon, Dec 17, 2018 at 12:29 PM Andes  wrote:
>
> From: Rick Chen 
>
> Remove cpu name from the defconfig naming.
> Because other cpus maybe run on AE350 platform.
> So only use platfrom name in defconfig naming
> will be better.
>
> Signed-off-by: Rick Chen 
> Cc: Greentime Hu 
> ---
> Changes since v1:
>  Use git format-patch ¡VM to show delta when rename.
> ---
>  configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig}  | 0
>  configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} | 0
>  2 files changed, 0 insertions(+), 0 deletions(-)
>  rename configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} (100%)
>  rename configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} (100%)
>

Reviewed-by: Bin Meng 
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[U-Boot] [PATCH v2] riscv: configs: Rename ax25-ae350 defconfig

2018-12-16 Thread Andes

From: Rick Chen 

Remove cpu name from the defconfig naming.
Because other cpus maybe run on AE350 platform.
So only use platfrom name in defconfig naming
will be better.

Signed-off-by: Rick Chen 
Cc: Greentime Hu 
---
Changes since v1:
 Use git format-patch �VM to show delta when rename.
---
 configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig}  | 0
 configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} | 0
 2 files changed, 0 insertions(+), 0 deletions(-)
 rename configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} (100%)
 rename configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} (100%)

diff --git a/configs/a25-ae350_32_defconfig b/configs/ae350_rv32_defconfig
similarity index 100%
rename from configs/a25-ae350_32_defconfig
rename to configs/ae350_rv32_defconfig
diff --git a/configs/ax25-ae350_64_defconfig b/configs/ae350_rv64_defconfig
similarity index 100%
rename from configs/ax25-ae350_64_defconfig
rename to configs/ae350_rv64_defconfig
-- 
2.7.4

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Re: [U-Boot] [PATCH v2 0/2] SiFive UART support

2018-12-16 Thread Anup Patel

On Mon, Dec 17, 2018 at 7:21 AM Rick Chen  wrote:
>
> Hi Anup
>
> > > From: Anup Patel [mailto:a...@brainfault.org]
> > > Sent: Friday, December 14, 2018 5:23 PM
> > > To: Rick Jian-Zhi Chen(陳建志); Bin Meng; Lukas Auer
> > > Cc: Alexander Graf; Palmer Dabbelt; Atish Patra; Christoph Hellwig; U-Boot
> > > Mailing List
> > > Subject: Re: [PATCH v2 0/2] SiFive UART support
> > >
> > > On Tue, Dec 11, 2018 at 8:32 PM Anup Patel  wrote:
> > > >
> > > > This patchset adds SiFive UART driver for SiFive UART found on SiFive
> > > > boards.
> > > >
> > > > The driver is tested on QEMU sifive_u machine. In fact, with this
> > > > patchset same U-Boot binary boots on QEMU virt machine and QEMU
> > > > sifive_u machine in both M-mode and S-mode.
> > > >
> > > > The patches are based upon latest RISC-V UBoot tree
> > > > (git://git.denx.de/u-boot-riscv.git) at commit id
> > > > 48cbf6246052de10d35b616b5efb2f783904a49d
> > > >
> > > > Changes since v1:
> > > >  - Fixed copyright header in SiFive UART driver
> > > >  - Imply SIFIVE_SERIAL for QEMU emulation instead
> > > >of enabling it in defconfigs.
> > > >
> > > > Anup Patel (2):
> > > >   drivers: serial: Add SiFive UART driver
> > > >   riscv: qemu: Imply SIFIVE_SERIAL for emulation
> > > >
> > > >  board/emulation/qemu-riscv/Kconfig |   1 +
> > > >  drivers/serial/Kconfig |  13 ++
> > > >  drivers/serial/Makefile|   1 +
> > > >  drivers/serial/serial_sifive.c | 191 +
> > > >  4 files changed, 206 insertions(+)
> > > >  create mode 100644 drivers/serial/serial_sifive.c
> > > >
> > > > --
> > > > 2.17.1
> > > >
> > >
> > > Hi Rick,
> > >
> > > The required QEMU fix has been submitted by Alistair Francis on QEMU 
> > > mailing
> > > list.
> > > (QEMU PATCH subject "sifive_u: Set 'clock-frequency' DT property for 
> > > SiFive
> > > UART")
> > >
> > > Can you please consider this series for U-Boot v2019.01?
> > >
>
> OK
> I will include yours in this PR.

I have send v3 of this patch. Please include that.

Thanks,
Anup
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Re: [U-Boot] [PATCH] riscv: configs: Rename ax25-ae350 defconfig

2018-12-16 Thread Rick Chen

Hi Bin

Bin Meng  於 2018年12月17日 週一 上午11:32寫道：
>
> Hi Rick,
>
> On Mon, Dec 17, 2018 at 11:21 AM Andes  wrote:
> >
> > From: Rick Chen 
> >
> > Remove cpu name from the defconfig naming.
> > Because other cpus maybe run on AE350 platform.
> > So only use platfrom name in defconfig naming
> > will be better.
> >
> > Signed-off-by: Rick Chen 
> > Cc: Greentime Hu 
> > ---
> >  configs/a25-ae350_32_defconfig  | 36 
> >  configs/ae350_rv32_defconfig| 36 
> >  configs/ae350_rv64_defconfig| 37 +
> >  configs/ax25-ae350_64_defconfig | 37 -
>
> It looks the patch does not use "git mv"?
>

Thanks for reminding.
I will use git mv and in v2.

Thanks
Rick

> >  4 files changed, 73 insertions(+), 73 deletions(-)
> >  delete mode 100644 configs/a25-ae350_32_defconfig
> >  create mode 100644 configs/ae350_rv32_defconfig
> >  create mode 100644 configs/ae350_rv64_defconfig
> >  delete mode 100644 configs/ax25-ae350_64_defconfig
> >
>
> Regards,
> Bin
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Re: [U-Boot] [PATCH] riscv: configs: Rename ax25-ae350 defconfig

2018-12-16 Thread Bin Meng

Hi Rick,

On Mon, Dec 17, 2018 at 11:21 AM Andes  wrote:
>
> From: Rick Chen 
>
> Remove cpu name from the defconfig naming.
> Because other cpus maybe run on AE350 platform.
> So only use platfrom name in defconfig naming
> will be better.
>
> Signed-off-by: Rick Chen 
> Cc: Greentime Hu 
> ---
>  configs/a25-ae350_32_defconfig  | 36 
>  configs/ae350_rv32_defconfig| 36 
>  configs/ae350_rv64_defconfig| 37 +
>  configs/ax25-ae350_64_defconfig | 37 -

It looks the patch does not use "git mv"?

>  4 files changed, 73 insertions(+), 73 deletions(-)
>  delete mode 100644 configs/a25-ae350_32_defconfig
>  create mode 100644 configs/ae350_rv32_defconfig
>  create mode 100644 configs/ae350_rv64_defconfig
>  delete mode 100644 configs/ax25-ae350_64_defconfig
>

Regards,
Bin
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[U-Boot] [PATCH] riscv: configs: Rename ax25-ae350 defconfig

2018-12-16 Thread Andes

From: Rick Chen 

Remove cpu name from the defconfig naming.
Because other cpus maybe run on AE350 platform.
So only use platfrom name in defconfig naming
will be better.

Signed-off-by: Rick Chen 
Cc: Greentime Hu 
---
 configs/a25-ae350_32_defconfig  | 36 
 configs/ae350_rv32_defconfig| 36 
 configs/ae350_rv64_defconfig| 37 +
 configs/ax25-ae350_64_defconfig | 37 -
 4 files changed, 73 insertions(+), 73 deletions(-)
 delete mode 100644 configs/a25-ae350_32_defconfig
 create mode 100644 configs/ae350_rv32_defconfig
 create mode 100644 configs/ae350_rv64_defconfig
 delete mode 100644 configs/ax25-ae350_64_defconfig

diff --git a/configs/a25-ae350_32_defconfig b/configs/a25-ae350_32_defconfig
deleted file mode 100644
index 5837b48..000
--- a/configs/a25-ae350_32_defconfig
+++ /dev/null
@@ -1,36 +0,0 @@
-CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x
-CONFIG_TARGET_AX25_AE350=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SF_TEST=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_BOOTP_PREFER_SERVERIP=y
-CONFIG_CMD_CACHE=y
-CONFIG_OF_BOARD=y
-CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_MMC=y
-CONFIG_FTSDC010=y
-CONFIG_FTSDC010_SDIO=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_FTMAC100=y
-CONFIG_BAUDRATE=38400
-CONFIG_SYS_NS16550=y
-CONFIG_SPI=y
-CONFIG_ATCSPI200_SPI=y
-CONFIG_ATCPIT100_TIMER=y
diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
new file mode 100644
index 000..5837b48
--- /dev/null
+++ b/configs/ae350_rv32_defconfig
@@ -0,0 +1,36 @@
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x
+CONFIG_TARGET_AX25_AE350=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_CACHE=y
+CONFIG_OF_BOARD=y
+CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_FTMAC100=y
+CONFIG_BAUDRATE=38400
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_ATCSPI200_SPI=y
+CONFIG_ATCPIT100_TIMER=y
diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
new file mode 100644
index 000..b250d3f
--- /dev/null
+++ b/configs/ae350_rv64_defconfig
@@ -0,0 +1,37 @@
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x
+CONFIG_TARGET_AX25_AE350=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_CACHE=y
+CONFIG_OF_BOARD=y
+CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_FTMAC100=y
+CONFIG_BAUDRATE=38400
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_ATCSPI200_SPI=y
+CONFIG_ATCPIT100_TIMER=y
diff --git a/configs/ax25-ae350_64_defconfig b/configs/ax25-ae350_64_defconfig
deleted file mode 100644
index b250d3f..000
--- a/configs/ax25-ae350_64_defconfig
+++ /dev/null
@@ -1,37 +0,0 @@
-CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x
-CONFIG_TARGET_AX25_AE350=y
-CONFIG_ARCH_RV64I=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SF_TEST=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_BOOTP_PREFER_SERVERIP=y
-CONFIG_CMD_CACHE=y
-CONFIG_OF_BOARD=y
-CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_MMC=y
-CONFIG_FTSDC010=y
-CONFIG_FTSDC010_SDIO=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_FTMAC100=y
-CONFIG_BAUDRATE=38400
-CONFIG_SYS_NS16550=y
-CONFIG_SPI=y
-CONFIG_ATCSPI20

[U-Boot] [PATCH v2 11/11] fdt: tegra: Drop COMPAT_AMS_AS3722

2018-12-16 Thread Simon Glass

This is no-longer used. Drop it.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Add new patches as per the cover letter

 include/fdtdec.h | 1 -
 lib/fdtdec.c | 1 -
 2 files changed, 2 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index de7dd63b5a4..2a8ad960260 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -141,7 +141,6 @@ enum fdt_compat_id {
COMPAT_GENERIC_SPI_FLASH,   /* Generic SPI Flash chip */
COMPAT_SAMSUNG_EXYNOS_SYSMMU,   /* Exynos sysmmu */
COMPAT_INTEL_MICROCODE, /* Intel microcode update */
-   COMPAT_AMS_AS3722,  /* AMS AS3722 PMIC */
COMPAT_INTEL_QRK_MRC,   /* Intel Quark MRC */
COMPAT_ALTERA_SOCFPGA_DWMAC,/* SoCFPGA Ethernet controller */
COMPAT_ALTERA_SOCFPGA_DWMMC,/* SoCFPGA DWMMC controller */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 18b8bf81955..e06f2282028 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -48,7 +48,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
COMPAT(INTEL_MICROCODE, "intel,microcode"),
-   COMPAT(AMS_AS3722, "ams,as3722"),
COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
-- 
2.20.0.405.gbc1bbc6f85-goog

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[U-Boot] [PATCH v2 06/11] spring: Update sound to use max98088 codec

2018-12-16 Thread Simon Glass

Update the spring settings to use this codec, which is what it actually
shipped with.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/dts/exynos5250-spring.dts | 36 +++---
 configs/spring_defconfig   |  1 +
 2 files changed, 19 insertions(+), 18 deletions(-)

diff --git a/arch/arm/dts/exynos5250-spring.dts 
b/arch/arm/dts/exynos5250-spring.dts
index 191e12af6a1..942f5027753 100644
--- a/arch/arm/dts/exynos5250-spring.dts
+++ b/arch/arm/dts/exynos5250-spring.dts
@@ -93,6 +93,22 @@
samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
};
 
+   sound {
+   compatible = "google,spring-audio-max98088";
+
+   samsung,model = "Spring-I2S-MAX98088";
+   samsung,audio-codec = <&max98088>;
+   codec-enable-gpio = <&gpx1 7 0>;
+
+   cpu {
+   sound-dai = <&i2s1 0>;
+   };
+
+   codec {
+   sound-dai = <&max98088 0>;
+   };
+   };
+
spi@12d3 {
spi-max-frequency = <5000>;
firmware_storage_spi: flash@0 {
@@ -638,27 +654,11 @@
};
};
 
-   max98095: soundcodec@10 {
+   max98088: soundcodec@10 {
reg = <0x10>;
-   compatible = "maxim,max98095";
+   compatible = "maxim,max98088";
#sound-dai-cells = <1>;
};
-
-   sound {
-   compatible = "google,spring-audio-max98095";
-
-   samsung,model = "Spring-I2S-MAX98095";
-   samsung,audio-codec = <&max98095>;
-
-   cpu {
-   sound-dai = <&i2s0 0>;
-   };
-
-   codec {
-   sound-dai = <&max98095 0>;
-   };
-   };
-
 };
 
 #include "cros-ec-keyboard.dtsi"
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
index c089517692e..07ff029a413 100644
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@@ -62,6 +62,7 @@ CONFIG_DEBUG_UART_S5P=y
 CONFIG_SOUND=y
 CONFIG_I2S=y
 CONFIG_I2S_SAMSUNG=y
+CONFIG_SOUND_MAX98088=y
 CONFIG_SOUND_MAX98095=y
 CONFIG_SOUND_WM8994=y
 CONFIG_EXYNOS_SPI=y
-- 
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[U-Boot] [PATCH v2 05/11] sound: Add a driver for max98088

2018-12-16 Thread Simon Glass

This chip is used by spring. Add a driver for it and update the
samsung_sound driver to pick it up.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 drivers/sound/Kconfig |   8 +
 drivers/sound/Makefile|   1 +
 drivers/sound/max98088.c  | 431 ++
 drivers/sound/max98088.h  | 192 +++
 drivers/sound/samsung_sound.c |   2 +-
 5 files changed, 633 insertions(+), 1 deletion(-)
 create mode 100644 drivers/sound/max98088.c
 create mode 100644 drivers/sound/max98088.h

diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig
index c0d97cca338..6a04a59dada 100644
--- a/drivers/sound/Kconfig
+++ b/drivers/sound/Kconfig
@@ -31,6 +31,14 @@ config I2S_SAMSUNG
  option provides an implementation for sound_init() and
  sound_play().
 
+config SOUND_MAX98088
+   bool "Support Maxim max98088 audio codec"
+   depends on I2S_SAMSUNG
+   help
+ Enable the max98088 audio codec. This is connected via I2S for
+ audio data and I2C for codec control. At present it only works
+ with the Samsung I2S driver.
+
 config SOUND_MAX98090
bool "Support Maxim max98090 audio codec"
depends on I2S_SAMSUNG
diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile
index 1de4346ec7a..238f33bbb40 100644
--- a/drivers/sound/Makefile
+++ b/drivers/sound/Makefile
@@ -11,5 +11,6 @@ obj-$(CONFIG_I2S_SAMSUNG) += samsung-i2s.o
 obj-$(CONFIG_SOUND_SANDBOX)+= sandbox.o
 obj-$(CONFIG_I2S_SAMSUNG)  += samsung_sound.o
 obj-$(CONFIG_SOUND_WM8994) += wm8994.o
+obj-$(CONFIG_SOUND_MAX98088)   += max98088.o maxim_codec.o
 obj-$(CONFIG_SOUND_MAX98090)   += max98090.o maxim_codec.o
 obj-$(CONFIG_SOUND_MAX98095)   += max98095.o maxim_codec.o
diff --git a/drivers/sound/max98088.c b/drivers/sound/max98088.c
new file mode 100644
index 000..5ddc11ac5c7
--- /dev/null
+++ b/drivers/sound/max98088.c
@@ -0,0 +1,431 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * max98088.c -- MAX98088 ALSA SoC Audio driver
+ *
+ * Copyright 2010 Maxim Integrated Products
+ *
+ * Modified for U-Boot by Chih-Chung Chang (chihch...@chromium.org),
+ * following the changes made in max98095.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "maxim_codec.h"
+#include "max98088.h"
+
+/* codec mclk clock divider coefficients. Index 0 is reserved. */
+static const int rate_table[] = {0, 8000, 11025, 16000, 22050, 24000, 32000,
+44100, 48000, 88200, 96000};
+
+/*
+ * codec mclk clock divider coefficients based on sampling rate
+ *
+ * @param rate sampling rate
+ * @param value address of indexvalue to be stored
+ *
+ * @return 0 for success or negative error code.
+ */
+static int rate_value(int rate, u8 *value)
+{
+   int i;
+
+   for (i = 1; i < ARRAY_SIZE(rate_table); i++) {
+   if (rate_table[i] >= rate) {
+   *value = i;
+   return 0;
+   }
+   }
+   *value = 1;
+
+   return -1;
+}
+
+/*
+ * Sets hw params for max98088
+ *
+ * @priv: max98088 information pointer
+ * @rate: Sampling rate
+ * @bits_per_sample: Bits per sample
+ *
+ * @return -EIO for error, 0 for success.
+ */
+int max98088_hw_params(struct maxim_priv *priv, unsigned int rate,
+  unsigned int bits_per_sample)
+{
+   int error;
+   u8 regval;
+
+   switch (bits_per_sample) {
+   case 16:
+   error = maxim_bic_or(priv, M98088_REG_DAI1_FORMAT,
+M98088_DAI_WS, 0);
+   break;
+   case 24:
+   error = maxim_bic_or(priv, M98088_REG_DAI1_FORMAT,
+M98088_DAI_WS, M98088_DAI_WS);
+   break;
+   default:
+   debug("%s: Illegal bits per sample %d.\n",
+ __func__, bits_per_sample);
+   return -1;
+   }
+
+   error |= maxim_bic_or(priv, M98088_REG_PWR_SYS, M98088_SHDNRUN, 0);
+
+   if (rate_value(rate, ®val)) {
+   debug("%s: Failed to set sample rate to %d.\n",
+ __func__, rate);
+   return -1;
+   }
+
+   error |= maxim_bic_or(priv, M98088_REG_DAI1_CLKMODE,
+ M98088_CLKMODE_MASK, regval << 4);
+   priv->rate = rate;
+
+   /* Update sample rate mode */
+   if (rate < 5)
+   error |= maxim_bic_or(priv, M98088_REG_DAI1_FILTERS,
+ M98088_DAI_DHF, 0);
+   else
+   error |= maxim_bic_or(priv, M98088_REG_DAI1_FILTERS,
+ M98088_DAI_DHF, M98088_DAI_DHF);
+
+   error |= maxim_bic_or(priv, M98088_REG_PWR_SYS, M98088_SHDNRUN,
+ M98088_SHDNRUN);
+
+   if (error < 0) {
+   debug("%s: Error setting hardware params.\n",

[U-Boot] [PATCH v2 09/11] samsung: mmc: Drop old MMC init code

2018-12-16 Thread Simon Glass

Now that these boards use driver model we can drop the old code. At
present s5p_mmc_init() is still used by goni and smdkv310 so cannot be
removed unless we remove those boards.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/mach-exynos/include/mach/mmc.h |  2 -
 board/samsung/common/board.c| 38 ---
 drivers/mmc/s5p_sdhci.c | 50 -
 3 files changed, 90 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/mmc.h 
b/arch/arm/mach-exynos/include/mach/mmc.h
index ca4e7eda342..eece44ea1aa 100644
--- a/arch/arm/mach-exynos/include/mach/mmc.h
+++ b/arch/arm/mach-exynos/include/mach/mmc.h
@@ -64,6 +64,4 @@ static inline int s5p_mmc_init(int index, int bus_width)
return s5p_sdhci_init(base, index, bus_width);
 }
 
-int exynos_mmc_init(const void *blob);
-
 #endif
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 3391228522c..96228a86a11 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -249,44 +249,6 @@ int board_eth_init(bd_t *bis)
return 0;
 }
 
-#ifdef CONFIG_MMC
-static int init_mmc(void)
-{
-#ifdef CONFIG_MMC_SDHCI
-   return exynos_mmc_init(gd->fdt_blob);
-#else
-   return 0;
-#endif
-}
-
-static int init_dwmmc(void)
-{
-#ifdef CONFIG_MMC_DW
-   return exynos_dwmmc_init(gd->fdt_blob);
-#else
-   return 0;
-#endif
-}
-
-int board_mmc_init(bd_t *bis)
-{
-   int ret;
-
-   if (get_boot_mode() == BOOT_MODE_SD) {
-   ret = init_mmc();
-   ret |= init_dwmmc();
-   } else {
-   ret = init_dwmmc();
-   ret |= init_mmc();
-   }
-
-   if (ret)
-   debug("mmc init failed\n");
-
-   return ret;
-}
-#endif
-
 #ifdef CONFIG_DISPLAY_BOARDINFO
 int checkboard(void)
 {
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 591a3bce084..9dd0b865eb8 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -118,9 +118,6 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
return s5p_sdhci_core_init(host);
 }
 
-#if CONFIG_IS_ENABLED(OF_CONTROL)
-struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
-
 static int do_sdhci_init(struct sdhci_host *host)
 {
int dev_id, flag, ret;
@@ -191,53 +188,6 @@ static int sdhci_get_config(const void *blob, int node, 
struct sdhci_host *host)
return 0;
 }
 
-static int process_nodes(const void *blob, int node_list[], int count)
-{
-   struct sdhci_host *host;
-   int i, node, ret;
-   int failed = 0;
-
-   debug("%s: count = %d\n", __func__, count);
-
-   /* build sdhci_host[] for each controller */
-   for (i = 0; i < count; i++) {
-   node = node_list[i];
-   if (node <= 0)
-   continue;
-
-   host = &sdhci_host[i];
-
-   ret = sdhci_get_config(blob, node, host);
-   if (ret) {
-   printf("%s: failed to decode dev %d (%d)\n",
__func__, i, ret);
-   failed++;
-   continue;
-   }
-
-   ret = do_sdhci_init(host);
-   if (ret && ret != -ENODEV) {
-   printf("%s: failed to initialize dev %d (%d)\n", 
__func__, i, ret);
-   failed++;
-   }
-   }
-
-   /* we only consider it an error when all nodes fail */
-   return (failed == count ? -1 : 0);
-}
-
-int exynos_mmc_init(const void *blob)
-{
-   int count;
-   int node_list[SDHCI_MAX_HOSTS];
-
-   count = fdtdec_find_aliases_for_id(blob, "mmc",
-   COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
-   SDHCI_MAX_HOSTS);
-
-   return process_nodes(blob, node_list, count);
-}
-#endif
-
 #ifdef CONFIG_DM_MMC
 static int s5p_sdhci_probe(struct udevice *dev)
 {
-- 
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[U-Boot] [PATCH v2 10/11] fdt: samsung: Drop unused fdt_compat_id values

2018-12-16 Thread Simon Glass

This enum still exists but we can shrink it a little based on recent
driver-model conversions with samsung. Update it to remove unused items.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 include/fdtdec.h | 6 --
 lib/fdtdec.c | 6 --
 2 files changed, 12 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index f1bcbf837ff..de7dd63b5a4 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -133,18 +133,12 @@ enum fdt_compat_id {
/* Tegra210 XUSB pad controller */
COMPAT_SMSC_LAN9215,/* SMSC 10/100 Ethernet LAN9215 */
COMPAT_SAMSUNG_EXYNOS5_SROMC,   /* Exynos5 SROMC */
-   COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */
-   COMPAT_SAMSUNG_EXYNOS5_SOUND,   /* Exynos Sound */
-   COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
COMPAT_SAMSUNG_EXYNOS_USB_PHY,  /* Exynos phy controller for usb2.0 */
COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */
COMPAT_SAMSUNG_EXYNOS_TMU,  /* Exynos TMU */
COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi dsi */
COMPAT_SAMSUNG_EXYNOS_DWMMC,/* Exynos DWMMC controller */
-   COMPAT_SAMSUNG_EXYNOS_MMC,  /* Exynos MMC controller */
COMPAT_GENERIC_SPI_FLASH,   /* Generic SPI Flash chip */
-   COMPAT_MAXIM_98095_CODEC,   /* MAX98095 Codec */
-   COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */
COMPAT_SAMSUNG_EXYNOS_SYSMMU,   /* Exynos sysmmu */
COMPAT_INTEL_MICROCODE, /* Intel microcode update */
COMPAT_AMS_AS3722,  /* AMS AS3722 PMIC */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 6f8ec0dbed7..18b8bf81955 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -40,18 +40,12 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
COMPAT(SMSC_LAN9215, "smsc,lan9215"),
COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
-   COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
-   COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
-   COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
-   COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
-   COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
-   COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
COMPAT(INTEL_MICROCODE, "intel,microcode"),
COMPAT(AMS_AS3722, "ams,as3722"),
-- 
2.20.0.405.gbc1bbc6f85-goog

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[U-Boot] [PATCH v2 07/11] spring: Update flashmap details

2018-12-16 Thread Simon Glass

Update the flashmap so that this board can be started over USB A-A. It
is slightly different from snow.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/dts/exynos5250-spring.dts | 41 --
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/exynos5250-spring.dts 
b/arch/arm/dts/exynos5250-spring.dts
index 942f5027753..c7553208ade 100644
--- a/arch/arm/dts/exynos5250-spring.dts
+++ b/arch/arm/dts/exynos5250-spring.dts
@@ -40,9 +40,46 @@
reg = <0x4000 0x8000>;
};
 
+   iram {
+   reg = <0x0202 0x6>;
+   };
+
+   config {
+   samsung,bl1-offset = <0x1400>;
+   samsung,bl2-offset = <0x3400>;
+   u-boot-memory = "/memory";
+   u-boot-offset = <0x3e0 0x10>;
+   };
+
flash@0 {
-   spl { /* spl size override */
-   size = <0x8000>;
+   reg = <0 0x10>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   pre-boot {
+   label = "bl1 pre-boot";
+   reg = <0 0x2000>;
+   read-only;
+   filename = "e5250.nbl1.bin";
+   type = "blob exynos-bl1";
+   required;
+   };
+
+   spl {
+   label = "bl2 spl";
+   reg = <0x2000 0x8000>;
+   read-only;
+   filename = "bl2.bin";
+   type = "blob exynos-bl2 boot,dtb";
+   payload = "/flash/ro-boot";
+   required;
+   };
+
+   ro-boot {
+   label = "u-boot";
+   reg = <0xa000 0xb>;
+   read-only;
+   type = "blob boot,dtb";
+   required;
};
};
 
-- 
2.20.0.405.gbc1bbc6f85-goog

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[U-Boot] [PATCH v2 08/11] samsung: Drop board_enable_audio_codec()

2018-12-16 Thread Simon Glass

This function is not needed now since the audio codecs have been converted
to proper drivers. The codec-enable GPIO is handled there.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 board/samsung/common/exynos5-dt.c | 29 -
 1 file changed, 29 deletions(-)

diff --git a/board/samsung/common/exynos5-dt.c 
b/board/samsung/common/exynos5-dt.c
index c183965b92a..87eb381345d 100644
--- a/board/samsung/common/exynos5-dt.c
+++ b/board/samsung/common/exynos5-dt.c
@@ -34,37 +34,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static void board_enable_audio_codec(void)
-{
-   int node, ret;
-   struct gpio_desc en_gpio;
-
-   node = fdtdec_next_compatible(gd->fdt_blob, 0,
-   COMPAT_SAMSUNG_EXYNOS5_SOUND);
-   if (node <= 0)
-   return;
-
-   ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
-"codec-enable-gpio", 0, &en_gpio,
-GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
-   if (ret == -FDT_ERR_NOTFOUND)
-   return;
-
-   /* Turn on the GPIO which connects to the codec's "enable" line. */
-   gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);
-
-#ifdef CONFIG_SOUND_MAX98095
-   /* Enable MAX98095 Codec */
-   gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
-   gpio_direction_output(EXYNOS5_GPIO_X17, 1);
-   gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
-#endif
-}
-
 int exynos_init(void)
 {
-   board_enable_audio_codec();
-
return 0;
 }
 
-- 
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[U-Boot] [PATCH v2 03/11] exynos: Drop duplicate 'model' line

2018-12-16 Thread Simon Glass

At present the model is shown twice, once in the generic code and once
in the exynos code. Drop the latter.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 board/samsung/common/board.c | 14 ++
 include/samsung/misc.h   |  2 --
 2 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 6fd26a3a919..3391228522c 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -290,15 +290,13 @@ int board_mmc_init(bd_t *bis)
 #ifdef CONFIG_DISPLAY_BOARDINFO
 int checkboard(void)
 {
-   const char *board_info;
+   if (IS_ENABLED(CONFIG_BOARD_TYPES)) {
+   const char *board_info = get_board_type();
+
+   if (board_info)
+   printf("Type:  %s\n", board_info);
+   }
 
-   board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
-   printf("Board: %s\n", board_info ? board_info : "unknown");
-#ifdef CONFIG_BOARD_TYPES
-   board_info = get_board_type();
-   if (board_info)
-   printf("Type:  %s\n", board_info);
-#endif
return 0;
 }
 #endif
diff --git a/include/samsung/misc.h b/include/samsung/misc.h
index 0f957dc3675..017560c2566 100644
--- a/include/samsung/misc.h
+++ b/include/samsung/misc.h
@@ -32,9 +32,7 @@ void draw_logo(void);
 char *get_dfu_alt_system(char *interface, char *devstr);
 char *get_dfu_alt_boot(char *interface, char *devstr);
 #endif
-#ifdef CONFIG_BOARD_TYPES
 void set_board_type(void);
 const char *get_board_type(void);
-#endif
 
 #endif /* __SAMSUNG_MISC_COMMON_H__ */
-- 
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[U-Boot] [PATCH v2 04/11] exynos: Convert to use CONFIG_BLK

2018-12-16 Thread Simon Glass

Move all exynos boards over to use CONFIG_BLK.

This converts s5p_goni also, but adding dummy functions for pinmux and
peripheral ID. This will not function correctly, but gives the maintainer
more time to convert the board if desired.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Update to convert s5p_goni also

 arch/arm/mach-exynos/Kconfig   |  7 +++
 arch/arm/mach-s5pc1xx/Kconfig  |  2 ++
 arch/arm/mach-s5pc1xx/Makefile |  1 +
 arch/arm/mach-s5pc1xx/pinmux.c | 20 
 4 files changed, 30 insertions(+)
 create mode 100644 arch/arm/mach-s5pc1xx/pinmux.c

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index ed04369cfae..38077703621 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -8,6 +8,8 @@ config ARCH_EXYNOS4
bool "Exynos4 SoC family"
select BOARD_EARLY_INIT_F
select CPU_V7A
+   select BLK
+   select DM_MMC
help
  Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
  are multiple SoCs in this family including Exynos4210, Exynos4412,
@@ -24,6 +26,9 @@ config ARCH_EXYNOS5
imply USB_ETHER_ASIX
imply USB_ETHER_RTL8152
imply USB_ETHER_SMSC95XX
+   select BLK
+   select DM_MMC
+
help
  Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and
  Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
@@ -33,6 +38,8 @@ config ARCH_EXYNOS7
bool "Exynos7 SoC family"
select ARM64
select BOARD_EARLY_INIT_F
+   select BLK
+   select DM_MMC
help
  Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU or
  Cortex-A53 CPU (and some in a big.LITTLE configuration). There are
diff --git a/arch/arm/mach-s5pc1xx/Kconfig b/arch/arm/mach-s5pc1xx/Kconfig
index 04acdaad79c..8cffced5512 100644
--- a/arch/arm/mach-s5pc1xx/Kconfig
+++ b/arch/arm/mach-s5pc1xx/Kconfig
@@ -7,6 +7,8 @@ choice
 config TARGET_S5P_GONI
bool "S5P Goni board"
select OF_CONTROL
+   select BLK
+   select DM_MMC
 
 config TARGET_SMDKC100
bool "Support smdkc100 board"
diff --git a/arch/arm/mach-s5pc1xx/Makefile b/arch/arm/mach-s5pc1xx/Makefile
index a4be3fcbdae..ab804604d54 100644
--- a/arch/arm/mach-s5pc1xx/Makefile
+++ b/arch/arm/mach-s5pc1xx/Makefile
@@ -10,3 +10,4 @@ obj-y = cache.o
 obj-y  += reset.o
 
 obj-y  += clock.o
+obj-y  += pinmux.o
diff --git a/arch/arm/mach-s5pc1xx/pinmux.c b/arch/arm/mach-s5pc1xx/pinmux.c
new file mode 100644
index 000..511e57a28df
--- /dev/null
+++ b/arch/arm/mach-s5pc1xx/pinmux.c
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Dummy functions to keep s3p_goni building (although it won't work)
+ *
+ * Copyright 2018 Google LLC
+ * Written by Simon Glass 
+ */
+
+#include 
+#include 
+
+int exynos_pinmux_config(int peripheral, int flags)
+{
+   return 0;
+}
+
+int pinmux_decode_periph_id(const void *blob, int node)
+{
+   return 0;
+}
-- 
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[U-Boot] [PATCH v2 01/11] odroid: Resync defconfigs

2018-12-16 Thread Simon Glass

Sync defconfigs again since USB_STORAGE is the default on these boards.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Add new patch to resync defconfigs for odroid

 configs/odroid-xu3_defconfig | 1 -
 configs/odroid_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index d5c7cc7129d..11796e5bdf4 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -47,7 +47,6 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_PHY_SAMSUNG=y
-CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Samsung"
 CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index 594800fc50c..cdb033ba780 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -47,7 +47,6 @@ CONFIG_DM_REGULATOR_MAX77686=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Samsung"
 CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
-- 
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[U-Boot] [PATCH v2 02/11] Convert CONFIG_BOARD_TYPES to Kconfig

2018-12-16 Thread Simon Glass

This converts the following to Kconfig:
   CONFIG_BOARD_TYPES

Signed-off-by: Simon Glass 
---

Changes in v2:
- Remove stranded comments in the header files

 common/Kconfig   | 8 
 configs/axs101_defconfig | 1 +
 configs/axs103_defconfig | 1 +
 configs/odroid-xu3_defconfig | 1 +
 configs/odroid_defconfig | 1 +
 include/configs/axs10x.h | 5 -
 include/configs/hsdk.h   | 5 -
 include/configs/odroid.h | 1 -
 include/configs/odroid_xu3.h | 1 -
 scripts/config_whitelist.txt | 1 -
 10 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/common/Kconfig b/common/Kconfig
index 57bd16d9623..a118bbb4b65 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -645,6 +645,14 @@ config DISPLAY_BOARDINFO_LATE
  the relocation phase. The board function checkboard() is called to do
  this.
 
+config BOARD_TYPES
+   bool "Call get_board_type() to get and display the board type"
+   help
+ If this option is enabled, checkboard() will call get_board_type()
+ to get a string containing the board type and this will be
+ displayed immediately after the model is shown on the console
+ early in boot.
+
 menu "Start-up hooks"
 
 config ARCH_EARLY_INIT_R
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index b4621c359fc..126ee1a3edf 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS3,115200n8"
+CONFIG_BOARD_TYPES=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="AXS# "
diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index e7894d297cd..c50d51b189b 100644
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS3,115200n8"
+CONFIG_BOARD_TYPES=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="AXS# "
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index 11796e5bdf4..f6f05b29483 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
 CONFIG_SYS_TEXT_BASE=0x43E0
 CONFIG_ARCH_EXYNOS5=y
+CONFIG_BOARD_TYPES=y
 CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2"
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_NR_DRAM_BANKS=8
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index cdb033ba780..184bb62c1c1 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_EXYNOS=y
 CONFIG_SYS_TEXT_BASE=0x43e0
 CONFIG_ARCH_EXYNOS4=y
 CONFIG_TARGET_ODROID=y
+CONFIG_BOARD_TYPES=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_NR_DRAM_BANKS=8
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h
index 1b2966fd612..79411282ce2 100644
--- a/include/configs/axs10x.h
+++ b/include/configs/axs10x.h
@@ -31,11 +31,6 @@
 #define CONFIG_SYS_BOOTM_LEN   SZ_128M
 #define CONFIG_SYS_LOAD_ADDR   0x8200
 
-/*
- * This board might be of different versions so handle it
- */
-#define CONFIG_BOARD_TYPES
-
 /*
  * NAND Flash configuration
  */
diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h
index cdf4fddd940..d8331206cd9 100644
--- a/include/configs/hsdk.h
+++ b/include/configs/hsdk.h
@@ -32,11 +32,6 @@
 #define CONFIG_SYS_BOOTM_LEN   SZ_128M
 #define CONFIG_SYS_LOAD_ADDR   0x8200
 
-/*
- * This board might be of different versions so handle it
- */
-#define CONFIG_BOARD_TYPES
-
 /*
  * UART configuration
  */
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index ad77242e380..bc044e069e0 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -186,7 +186,6 @@
  * TODO: Add Odroid X support
  */
 #define CONFIG_MISC_COMMON
-#define CONFIG_BOARD_TYPES
 
 #undef CONFIG_REVISION_TAG
 
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index f683ee46e39..c2363dd1eef 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -86,7 +86,6 @@
 /* Set soc_rev, soc_id, board_rev, boardname, fdtfile */
 #define CONFIG_ODROID_REV_AIN  9
 #define CONFIG_REVISION_TAG
-#define CONFIG_BOARD_TYPES
 
 #undef CONFIG_SYS_BOARD
 #define CONFIG_SYS_BOARD   "odroid"
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b8addeaf693..335977b3038 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -132,7 +132,6 @@ CONFIG_BOARD_POSTCLK_INIT
 CONFIG_BOARD_REVISION_TAG
 CONFIG_BOARD_SIZE_LIMIT
 CONFIG_BOARD_TAURUS
-CONFIG_BOARD_TYPES
 CONFIG_BOOGER
 CONFIG_BOOTBLOCK
 CONFIG_BOOTFILE
-- 
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[U-Boot] [PATCH v2 00/11] samsung: Tidy up sound, DM_MMC drop dead code

2018-12-16 Thread Simon Glass

This series was previously sent as a v1 without a cover letter. Since then
I have added a few more patches:

- Support for spring's audio codec
- Dropping unused MMC and audio code
- Removing unused fdt_compat_id values

Changes in v2:
- Add new patch to resync defconfigs for odroid
- Remove stranded comments in the header files
- Update to convert s5p_goni also
- Add new patches as per the cover letter

Simon Glass (11):
  odroid: Resync defconfigs
  Convert CONFIG_BOARD_TYPES to Kconfig
  exynos: Drop duplicate 'model' line
  exynos: Convert to use CONFIG_BLK
  sound: Add a driver for max98088
  spring: Update sound to use max98088 codec
  spring: Update flashmap details
  samsung: Drop board_enable_audio_codec()
  samsung: mmc: Drop old MMC init code
  fdt: samsung: Drop unused fdt_compat_id values
  fdt: tegra: Drop COMPAT_AMS_AS3722

 arch/arm/dts/exynos5250-spring.dts  |  77 +++--
 arch/arm/mach-exynos/Kconfig|   7 +
 arch/arm/mach-exynos/include/mach/mmc.h |   2 -
 arch/arm/mach-s5pc1xx/Kconfig   |   2 +
 arch/arm/mach-s5pc1xx/Makefile  |   1 +
 arch/arm/mach-s5pc1xx/pinmux.c  |  20 ++
 board/samsung/common/board.c|  52 +--
 board/samsung/common/exynos5-dt.c   |  29 --
 common/Kconfig  |   8 +
 configs/axs101_defconfig|   1 +
 configs/axs103_defconfig|   1 +
 configs/odroid-xu3_defconfig|   2 +-
 configs/odroid_defconfig|   2 +-
 configs/spring_defconfig|   1 +
 drivers/mmc/s5p_sdhci.c |  50 ---
 drivers/sound/Kconfig   |   8 +
 drivers/sound/Makefile  |   1 +
 drivers/sound/max98088.c| 431 
 drivers/sound/max98088.h| 192 +++
 drivers/sound/samsung_sound.c   |   2 +-
 include/configs/axs10x.h|   5 -
 include/configs/hsdk.h  |   5 -
 include/configs/odroid.h|   1 -
 include/configs/odroid_xu3.h|   1 -
 include/fdtdec.h|   7 -
 include/samsung/misc.h  |   2 -
 lib/fdtdec.c|   7 -
 scripts/config_whitelist.txt|   1 -
 28 files changed, 739 insertions(+), 179 deletions(-)
 create mode 100644 arch/arm/mach-s5pc1xx/pinmux.c
 create mode 100644 drivers/sound/max98088.c
 create mode 100644 drivers/sound/max98088.h

-- 
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Re: [U-Boot] [PATCH v2 0/2] SiFive UART support

2018-12-16 Thread Rick Chen

Hi Anup

> > From: Anup Patel [mailto:a...@brainfault.org]
> > Sent: Friday, December 14, 2018 5:23 PM
> > To: Rick Jian-Zhi Chen(陳建志); Bin Meng; Lukas Auer
> > Cc: Alexander Graf; Palmer Dabbelt; Atish Patra; Christoph Hellwig; U-Boot
> > Mailing List
> > Subject: Re: [PATCH v2 0/2] SiFive UART support
> >
> > On Tue, Dec 11, 2018 at 8:32 PM Anup Patel  wrote:
> > >
> > > This patchset adds SiFive UART driver for SiFive UART found on SiFive
> > > boards.
> > >
> > > The driver is tested on QEMU sifive_u machine. In fact, with this
> > > patchset same U-Boot binary boots on QEMU virt machine and QEMU
> > > sifive_u machine in both M-mode and S-mode.
> > >
> > > The patches are based upon latest RISC-V UBoot tree
> > > (git://git.denx.de/u-boot-riscv.git) at commit id
> > > 48cbf6246052de10d35b616b5efb2f783904a49d
> > >
> > > Changes since v1:
> > >  - Fixed copyright header in SiFive UART driver
> > >  - Imply SIFIVE_SERIAL for QEMU emulation instead
> > >of enabling it in defconfigs.
> > >
> > > Anup Patel (2):
> > >   drivers: serial: Add SiFive UART driver
> > >   riscv: qemu: Imply SIFIVE_SERIAL for emulation
> > >
> > >  board/emulation/qemu-riscv/Kconfig |   1 +
> > >  drivers/serial/Kconfig |  13 ++
> > >  drivers/serial/Makefile|   1 +
> > >  drivers/serial/serial_sifive.c | 191 +
> > >  4 files changed, 206 insertions(+)
> > >  create mode 100644 drivers/serial/serial_sifive.c
> > >
> > > --
> > > 2.17.1
> > >
> >
> > Hi Rick,
> >
> > The required QEMU fix has been submitted by Alistair Francis on QEMU mailing
> > list.
> > (QEMU PATCH subject "sifive_u: Set 'clock-frequency' DT property for SiFive
> > UART")
> >
> > Can you please consider this series for U-Boot v2019.01?
> >

OK
I will include yours in this PR.

B.R
Rick

> > Thanks,
> > Anup
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Re: [U-Boot] [RESEND PATCH v2 2/6] efi_loader: Initial HII database protocols

2018-12-16 Thread AKASHI Takahiro

On Sun, Dec 16, 2018 at 09:36:38PM +0100, Heinrich Schuchardt wrote:
> On 12/14/18 11:10 AM, AKASHI Takahiro wrote:
> > From: Leif Lindholm 
> > 
> > This patch provides enough implementation of the following protocols to
> > run EDKII's Shell.efi and UEFI SCT:
> > 
> >   * EfiHiiDatabaseProtocol
> >   * EfiHiiStringProtocol
> > 
> > Not implemented are:
> >   * ExportPackageLists()
> >   * RegisterPackageNotify()/UnregisterPackageNotify()
> >   * SetKeyboardLayout() (i.e. *current* keyboard layout)
> > 
> > HII database protocol can handle only:
> >   * GUID package
> >   * string package
> >   * keyboard layout package
> >   (The other packages, except Device path package, will be necessary
> >for interactive and graphical UI.)
> > 
> > We'll fill in the rest once SCT is running properly so we can validate
> > the implementation against the conformance test suite.
> > 
> > Cc: Leif Lindholm 
> > Signed-off-by: Rob Clark 
> > Signed-off-by: AKASHI Takahiro 
> > ---
> >  include/efi_api.h | 242 ++
> >  include/efi_loader.h  |   4 +
> >  lib/efi_loader/Makefile   |   1 +
> >  lib/efi_loader/efi_boottime.c |  12 +
> >  lib/efi_loader/efi_hii.c  | 886 ++
> >  5 files changed, 1145 insertions(+)
> >  create mode 100644 lib/efi_loader/efi_hii.c
> > 
> > diff --git a/include/efi_api.h b/include/efi_api.h
> > index aef77b6319de..c9dbd5a6037d 100644
> > --- a/include/efi_api.h
> > +++ b/include/efi_api.h
> > @@ -17,6 +17,7 @@
> >  #define _EFI_API_H
> >  
> >  #include 
> > +#include 
> >  
> >  #ifdef CONFIG_EFI_LOADER
> >  #include 
> > @@ -697,6 +698,247 @@ struct efi_device_path_utilities_protocol {
> > uint16_t node_length);
> >  };
> >  
> > +typedef u16 efi_string_id_t;
> > +
> > +#define EFI_HII_DATABASE_PROTOCOL_GUID  \
> > +   EFI_GUID(0xef9fc172, 0xa1b2, 0x4693, \
> > +0xb3, 0x27, 0x6d, 0x32, 0xfc, 0x41, 0x60, 0x42)
> > +
> > +typedef enum {
> > +   EFI_KEY_LCTRL, EFI_KEY_A0, EFI_KEY_LALT, EFI_KEY_SPACE_BAR,
> > +   EFI_KEY_A2, EFI_KEY_A3, EFI_KEY_A4, EFI_KEY_RCTRL, EFI_KEY_LEFT_ARROW,
> > +   EFI_KEY_DOWN_ARROW, EFI_KEY_RIGHT_ARROW, EFI_KEY_ZERO,
> > +   EFI_KEY_PERIOD, EFI_KEY_ENTER, EFI_KEY_LSHIFT, EFI_KEY_B0,
> > +   EFI_KEY_B1, EFI_KEY_B2, EFI_KEY_B3, EFI_KEY_B4, EFI_KEY_B5, EFI_KEY_B6,
> > +   EFI_KEY_B7, EFI_KEY_B8, EFI_KEY_B9, EFI_KEY_B10, EFI_KEY_RSHIFT,
> > +   EFI_KEY_UP_ARROW, EFI_KEY_ONE, EFI_KEY_TWO, EFI_KEY_THREE,
> > +   EFI_KEY_CAPS_LOCK, EFI_KEY_C1, EFI_KEY_C2, EFI_KEY_C3, EFI_KEY_C4,
> > +   EFI_KEY_C5, EFI_KEY_C6, EFI_KEY_C7, EFI_KEY_C8, EFI_KEY_C9,
> > +   EFI_KEY_C10, EFI_KEY_C11, EFI_KEY_C12, EFI_KEY_FOUR, EFI_KEY_FIVE,
> > +   EFI_KEY_SIX, EFI_KEY_PLUS, EFI_KEY_TAB, EFI_KEY_D1, EFI_KEY_D2,
> > +   EFI_KEY_D3, EFI_KEY_D4, EFI_KEY_D5, EFI_KEY_D6, EFI_KEY_D7, EFI_KEY_D8,
> > +   EFI_KEY_D9, EFI_KEY_D10, EFI_KEY_D11, EFI_KEY_D12, EFI_KEY_D13,
> > +   EFI_KEY_DEL, EFI_KEY_END, EFI_KEY_PG_DN, EFI_KEY_SEVEN, EFI_KEY_EIGHT,
> > +   EFI_KEY_NINE, EFI_KEY_E0, EFI_KEY_E1, EFI_KEY_E2, EFI_KEY_E3,
> > +   EFI_KEY_E4, EFI_KEY_E5, EFI_KEY_E6, EFI_KEY_E7, EFI_KEY_E8, EFI_KEY_E9,
> > +   EFI_KEY_E10, EFI_KEY_E11, EFI_KEY_E12, EFI_KEY_BACK_SPACE,
> > +   EFI_KEY_INS, EFI_KEY_HOME, EFI_KEY_PG_UP, EFI_KEY_NLCK, EFI_KEY_SLASH,
> > +   EFI_KEY_ASTERISK, EFI_KEY_MINUS, EFI_KEY_ESC, EFI_KEY_F1, EFI_KEY_F2,
> > +   EFI_KEY_F3, EFI_KEY_F4, EFI_KEY_F5, EFI_KEY_F6, EFI_KEY_F7, EFI_KEY_F8,
> > +   EFI_KEY_F9, EFI_KEY_F10, EFI_KEY_F11, EFI_KEY_F12, EFI_KEY_PRINT,
> > +   EFI_KEY_SLCK, EFI_KEY_PAUSE,
> > +} efi_key;
> > +
> > +struct efi_key_descriptor {
> > +   efi_key key;
> 
> Hello Takahiro,
> 
> with the patch I can start the EFI shell. But I am still trying to check
> the different definitions in this file.
> 
> As mentioned in prior mail the size of enum is not defined in the C
> spec. So better use u32.

Sure, but I still wonder whether this should be u32 or u16 (or even u8)
as UEFI spec doesn't clearly define this.

> > +   u16 unicode;
> > +   u16 shifted_unicode;
> > +   u16 alt_gr_unicode;
> > +   u16 shifted_alt_gr_unicode;
> > +   u16 modifier;
> > +   u16 affected_attribute;
> > +};
> > +
> > +struct efi_hii_keyboard_layout {
> > +   u16 layout_length;
> > +   efi_guid_t guid;
> 
> A patch to change the alignment of efi_guid_t to __alinged(8) has been
> merged into efi-next.

I have one concern here;
This structure will also be used as a data format/layout in a file,
a package list, given the fact that UEFI defines ExportPackageLists().
So extra six bytes after layout_length, for example, may not be very
useful in general.
I'm not very much sure if UEFI spec intends so.

> > +   u32 layout_descriptor_string_offset;
> > +   u8 descriptor_count;
> > +   struct efi_key_descriptor descriptors[];
> > +};
> > +
> > +struct efi_hii_package_list_header {
> > +   efi_guid_t package_list_guid;
> > +   u32 package_length;
> > +} __packed;
> 
> You are defining several structures as __packed. It is unclea

[U-Boot] [PATCH] net: macb: fix mapping of registers

2018-12-16 Thread Ramon Fried

Some architectures (MIPS) needs mapping to access IOMEM.
Fix that.

Fixes: f1dcc19b213d ("net: macb: Convert to driver model")

Signed-off-by: Ramon Fried 
---

 drivers/net/macb.c | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 94c89c762b..6e1b479813 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -36,6 +36,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1149,9 +1150,18 @@ int __weak macb_late_eth_ofdata_to_platdata(struct 
udevice *dev)
 
 static int macb_eth_ofdata_to_platdata(struct udevice *dev)
 {
+   fdt_addr_t addr;
+   fdt_size_t size;
+   int node = dev_of_offset(dev);
struct eth_pdata *pdata = dev_get_platdata(dev);
 
-   pdata->iobase = devfdt_get_addr(dev);
+   addr = fdtdec_get_addr_size(gd->fdt_blob, node, "reg", &size);
+   if (addr == FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   pdata->iobase = (phys_addr_t)ioremap(addr, size);
+   if (!pdata->iobase)
+   return -EINVAL;
 
return macb_late_eth_ofdata_to_platdata(dev);
 }
-- 
2.19.2

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Re: [U-Boot] [RESEND PATCH v2 2/6] efi_loader: Initial HII database protocols

2018-12-16 Thread AKASHI Takahiro

On Sat, Dec 15, 2018 at 09:48:19PM +0100, Heinrich Schuchardt wrote:
> On 12/14/18 11:10 AM, AKASHI Takahiro wrote:
> > From: Leif Lindholm 
> > 
> > This patch provides enough implementation of the following protocols to
> > run EDKII's Shell.efi and UEFI SCT:
> > 
> >   * EfiHiiDatabaseProtocol
> >   * EfiHiiStringProtocol
> > 
> > Not implemented are:
> >   * ExportPackageLists()
> >   * RegisterPackageNotify()/UnregisterPackageNotify()
> >   * SetKeyboardLayout() (i.e. *current* keyboard layout)
> > 
> > HII database protocol can handle only:
> >   * GUID package
> >   * string package
> >   * keyboard layout package
> >   (The other packages, except Device path package, will be necessary
> >for interactive and graphical UI.)
> > 
> > We'll fill in the rest once SCT is running properly so we can validate
> > the implementation against the conformance test suite.
> > 
> > Cc: Leif Lindholm 
> > Signed-off-by: Rob Clark 
> > Signed-off-by: AKASHI Takahiro 
> > ---
> >  include/efi_api.h | 242 ++
> >  include/efi_loader.h  |   4 +
> >  lib/efi_loader/Makefile   |   1 +
> >  lib/efi_loader/efi_boottime.c |  12 +
> >  lib/efi_loader/efi_hii.c  | 886 ++
> >  5 files changed, 1145 insertions(+)
> >  create mode 100644 lib/efi_loader/efi_hii.c
> > 
> > diff --git a/include/efi_api.h b/include/efi_api.h
> > index aef77b6319de..c9dbd5a6037d 100644
> > --- a/include/efi_api.h
> > +++ b/include/efi_api.h
> > @@ -17,6 +17,7 @@
> >  #define _EFI_API_H
> >  
> >  #include 
> > +#include 
> >  
> >  #ifdef CONFIG_EFI_LOADER
> >  #include 
> > @@ -697,6 +698,247 @@ struct efi_device_path_utilities_protocol {
> > uint16_t node_length);
> >  };
> >  
> > +typedef u16 efi_string_id_t;
> > +
> > +#define EFI_HII_DATABASE_PROTOCOL_GUID  \
> > +   EFI_GUID(0xef9fc172, 0xa1b2, 0x4693, \
> > +0xb3, 0x27, 0x6d, 0x32, 0xfc, 0x41, 0x60, 0x42)
> > +
> > +typedef enum {
> > +   EFI_KEY_LCTRL, EFI_KEY_A0, EFI_KEY_LALT, EFI_KEY_SPACE_BAR,
> > +   EFI_KEY_A2, EFI_KEY_A3, EFI_KEY_A4, EFI_KEY_RCTRL, EFI_KEY_LEFT_ARROW,
> > +   EFI_KEY_DOWN_ARROW, EFI_KEY_RIGHT_ARROW, EFI_KEY_ZERO,
> > +   EFI_KEY_PERIOD, EFI_KEY_ENTER, EFI_KEY_LSHIFT, EFI_KEY_B0,
> > +   EFI_KEY_B1, EFI_KEY_B2, EFI_KEY_B3, EFI_KEY_B4, EFI_KEY_B5, EFI_KEY_B6,
> > +   EFI_KEY_B7, EFI_KEY_B8, EFI_KEY_B9, EFI_KEY_B10, EFI_KEY_RSHIFT,
> > +   EFI_KEY_UP_ARROW, EFI_KEY_ONE, EFI_KEY_TWO, EFI_KEY_THREE,
> > +   EFI_KEY_CAPS_LOCK, EFI_KEY_C1, EFI_KEY_C2, EFI_KEY_C3, EFI_KEY_C4,
> > +   EFI_KEY_C5, EFI_KEY_C6, EFI_KEY_C7, EFI_KEY_C8, EFI_KEY_C9,
> > +   EFI_KEY_C10, EFI_KEY_C11, EFI_KEY_C12, EFI_KEY_FOUR, EFI_KEY_FIVE,
> > +   EFI_KEY_SIX, EFI_KEY_PLUS, EFI_KEY_TAB, EFI_KEY_D1, EFI_KEY_D2,
> > +   EFI_KEY_D3, EFI_KEY_D4, EFI_KEY_D5, EFI_KEY_D6, EFI_KEY_D7, EFI_KEY_D8,
> > +   EFI_KEY_D9, EFI_KEY_D10, EFI_KEY_D11, EFI_KEY_D12, EFI_KEY_D13,
> > +   EFI_KEY_DEL, EFI_KEY_END, EFI_KEY_PG_DN, EFI_KEY_SEVEN, EFI_KEY_EIGHT,
> > +   EFI_KEY_NINE, EFI_KEY_E0, EFI_KEY_E1, EFI_KEY_E2, EFI_KEY_E3,
> > +   EFI_KEY_E4, EFI_KEY_E5, EFI_KEY_E6, EFI_KEY_E7, EFI_KEY_E8, EFI_KEY_E9,
> > +   EFI_KEY_E10, EFI_KEY_E11, EFI_KEY_E12, EFI_KEY_BACK_SPACE,
> > +   EFI_KEY_INS, EFI_KEY_HOME, EFI_KEY_PG_UP, EFI_KEY_NLCK, EFI_KEY_SLASH,
> > +   EFI_KEY_ASTERISK, EFI_KEY_MINUS, EFI_KEY_ESC, EFI_KEY_F1, EFI_KEY_F2,
> > +   EFI_KEY_F3, EFI_KEY_F4, EFI_KEY_F5, EFI_KEY_F6, EFI_KEY_F7, EFI_KEY_F8,
> > +   EFI_KEY_F9, EFI_KEY_F10, EFI_KEY_F11, EFI_KEY_F12, EFI_KEY_PRINT,
> > +   EFI_KEY_SLCK, EFI_KEY_PAUSE,
> > +} efi_key;
> > +
> > +struct efi_key_descriptor {
> > +   efi_key key;
> 
> The size of enum is not defined in the C standard. Please, use u32 or s32.

Good catch, thanks. We should not use any enum types in a struct
for compatibility across architectures.
UEFI spec v2.7a, however, makes definitions as exactly the same above.
This could be misleading.

-Takahiro Akashi

> 
> > +   u16 unicode;
> > +   u16 shifted_unicode;
> > +   u16 alt_gr_unicode;
> > +   u16 shifted_alt_gr_unicode;
> > +   u16 modifier;
> > +   u16 affected_attribute;
> > +};
> > +
> > +struct efi_hii_keyboard_layout {
> > +   u16 layout_length;
> > +   efi_guid_t guid;
> 
> This structure is not packed correctly:
> 
> The UEFI spec defines EFI_GUID as a 128 bit buffer that is 64 bit
> aligned if not otherwise specified.
> 
> Our efi_guid_t is 8 bit aligned.
> 
> EDK2 has in base.h, UefiBaseType.h, and HiiDatabase.h:
> 
> ///
> /// 128 bit buffer containing a unique identifier value.
> /// Unless otherwise specified, aligned on a 64 bit boundary.
> ///
> typedef struct {
>   UINT32  Data1;
>   UINT16  Data2;
>   UINT16  Data3;
>   UINT8   Data4[8];
> } GUID;
> typedef GUID EFI_GUID;
> typedef struct {
>   UINT16  LayoutLength;
>   EFI_GUIDGuid;
>   UINT32  LayoutDescriptorStringOffset;
>   UINT8   DescriptorCount;
>   // EFI_KEY_DESCRIPTORDescriptors[];
> } EFI_HII_KEYBO

[U-Boot] [PATCH v3 5/5] mips: jz47xx: Add Creator CI20 platform

2018-12-16 Thread Ezequiel Garcia

From: Paul Burton 

Add support for the Creator CI20 platform based on the JZ4780 SoC.

Cc: Daniel Schwierzeck 
Signed-off-by: Paul Burton 
Signed-off-by: Marek Vasut 
Signed-off-by: Ezequiel Garcia 
---
 arch/mips/dts/Makefile|   1 +
 arch/mips/dts/ci20.dts| 120 +++
 arch/mips/mach-jz47xx/Kconfig |  11 ++
 board/imgtec/ci20/Kconfig |  15 ++
 board/imgtec/ci20/MAINTAINERS |   6 +
 board/imgtec/ci20/Makefile|   5 +
 board/imgtec/ci20/README  |  10 +
 board/imgtec/ci20/ci20.c  | 362 ++
 configs/ci20_defconfig|  46 +
 include/configs/ci20.h|  73 +++
 10 files changed, 649 insertions(+)
 create mode 100644 arch/mips/dts/ci20.dts
 create mode 100644 board/imgtec/ci20/Kconfig
 create mode 100644 board/imgtec/ci20/MAINTAINERS
 create mode 100644 board/imgtec/ci20/Makefile
 create mode 100644 board/imgtec/ci20/README
 create mode 100644 board/imgtec/ci20/ci20.c
 create mode 100644 configs/ci20_defconfig
 create mode 100644 include/configs/ci20.h

diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index b447141f8717..647d2bf0d53b 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -16,6 +16,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
 dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f...@st1704.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
+dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/mips/dts/ci20.dts b/arch/mips/dts/ci20.dts
new file mode 100644
index ..934d9e96d24d
--- /dev/null
+++ b/arch/mips/dts/ci20.dts
@@ -0,0 +1,120 @@
+/dts-v1/;
+
+#include "jz4780.dtsi"
+
+/ {
+   compatible = "img,ci20", "ingenic,jz4780";
+
+   aliases {
+   serial0 = &uart0;
+   serial1 = &uart1;
+   serial3 = &uart3;
+   serial4 = &uart4;
+   };
+
+   chosen {
+   stdout-path = "serial4:115200n8";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x1000
+  0x3000 0x3000>;
+   };
+};
+
+&ext {
+   clock-frequency = <4800>;
+};
+
+&uart0 {
+   status = "okay";
+};
+
+&uart1 {
+   status = "okay";
+};
+
+&uart3 {
+   status = "okay";
+};
+
+&uart4 {
+   status = "okay";
+};
+
+&nemc {
+   status = "okay";
+
+   nandc: nand-controller@1 {
+   compatible = "ingenic,jz4780-nand";
+   reg = <1 0 0x100>;
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   ingenic,bch-controller = <&bch>;
+
+   ingenic,nemc-tAS = <10>;
+   ingenic,nemc-tAH = <5>;
+   ingenic,nemc-tBP = <10>;
+   ingenic,nemc-tAW = <15>;
+   ingenic,nemc-tSTRV = <100>;
+
+   nand@1 {
+   reg = <1>;
+
+   nand-ecc-step-size = <1024>;
+   nand-ecc-strength = <24>;
+   nand-ecc-mode = "hw";
+   nand-on-flash-bbt;
+
+   partitions {
+   compatible = "fixed-partitions";
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   partition@0 {
+   label = "u-boot-spl";
+   reg = <0x0 0x0 0x0 0x80>;
+   };
+
+   partition@0x80 {
+   label = "u-boot";
+   reg = <0x0 0x80 0x0 0x20>;
+   };
+
+   partition@0xa0 {
+   label = "u-boot-env";
+   reg = <0x0 0xa0 0x0 0x20>;
+   };
+
+   partition@0xc0 {
+   label = "boot";
+   reg = <0x0 0xc0 0x0 0x400>;
+   };
+
+   partition@0x8c0 {
+   label = "system";
+   reg = <0x0 0x4c0 0x1 0xfb40>;
+   };
+   };
+   };
+   };
+};
+
+&bch {
+   status = "okay";
+};
+
+&mmc0 {
+   bus-width = <4>;
+   max-frequency = <5000>;
+   status = "okay";
+};
+
+&mmc1 {
+   bus-width = <4>;
+   max-frequency = <5000>;
+   status = "okay";
+};
diff --git a/arch/mips/mach-jz47xx/Kconfig b/arch/mips/mach-jz47xx/Kconfig
index cd6944cfc252..dcaac0162866 100644
--- a/arch/mips/mach-jz47xx/Kconfig
+++ b/arch/mips/mach-jz47xx/Kconfi

[U-Boot] [PATCH v3 4/5] mips: jz47xx: Add JZ4780 SoC support

2018-12-16 Thread Ezequiel Garcia

From: Paul Burton 

Add initial support for the Ingenic JZ47xx MIPS SoC.

Cc: Daniel Schwierzeck 
Signed-off-by: Paul Burton 
Signed-off-by: Marek Vasut 
Signed-off-by: Ezequiel Garcia 
---
 MAINTAINERS   |   6 +
 arch/mips/Kconfig |   7 +
 arch/mips/Makefile|   1 +
 arch/mips/dts/jz4780.dtsi | 162 ++
 arch/mips/mach-jz47xx/Kconfig |  15 +
 arch/mips/mach-jz47xx/Makefile|   7 +
 arch/mips/mach-jz47xx/include/mach/jz4780.h   | 103 
 .../mach-jz47xx/include/mach/jz4780_dram.h| 456 +++
 .../mach-jz47xx/include/mach/jz4780_gpio.h|  12 +
 arch/mips/mach-jz47xx/jz4780/Makefile |   5 +
 arch/mips/mach-jz47xx/jz4780/TODO |   4 +
 arch/mips/mach-jz47xx/jz4780/gpio.c   |  39 ++
 arch/mips/mach-jz47xx/jz4780/jz4780.c |  82 +++
 arch/mips/mach-jz47xx/jz4780/pll.c| 527 ++
 arch/mips/mach-jz47xx/jz4780/reset.c  |  53 ++
 arch/mips/mach-jz47xx/jz4780/sdram.c  | 270 +
 arch/mips/mach-jz47xx/jz4780/timer.c  | 237 
 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds   |  52 ++
 arch/mips/mach-jz47xx/start.S |  99 
 include/dt-bindings/clock/jz4780-cgu.h|  88 +++
 20 files changed, 2225 insertions(+)
 create mode 100644 arch/mips/dts/jz4780.dtsi
 create mode 100644 arch/mips/mach-jz47xx/Kconfig
 create mode 100644 arch/mips/mach-jz47xx/Makefile
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_gpio.h
 create mode 100644 arch/mips/mach-jz47xx/jz4780/Makefile
 create mode 100644 arch/mips/mach-jz47xx/jz4780/TODO
 create mode 100644 arch/mips/mach-jz47xx/jz4780/gpio.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/jz4780.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/pll.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/reset.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/sdram.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/timer.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds
 create mode 100644 arch/mips/mach-jz47xx/start.S
 create mode 100644 include/dt-bindings/clock/jz4780-cgu.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 0cec39c542db..3809a12f9ee7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -512,6 +512,12 @@ S: Maintained
 T: git git://git.denx.de/u-boot-mips.git
 F: arch/mips/
 
+MIPS JZ4780
+M: Ezequiel Garcia 
+S: Maintained
+T: git git://git.denx.de/u-boot-mips.git
+F: arch/mips/mach-jz47xx/
+
 MMC
 M: Jaehoon Chung 
 S: Maintained
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 1b1b1d7d0031..44b25460b8cc 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -88,6 +88,12 @@ config ARCH_MT7620
select SUPPORTS_LITTLE_ENDIAN
select SYSRESET
 
+config ARCH_JZ47XX
+   bool "Support Ingenic JZ47xx"
+   select SUPPORT_SPL
+   select OF_CONTROL
+   select DM
+
 config MACH_PIC32
bool "Support Microchip PIC32"
select DM
@@ -139,6 +145,7 @@ source "board/micronas/vct/Kconfig"
 source "board/qemu-mips/Kconfig"
 source "arch/mips/mach-ath79/Kconfig"
 source "arch/mips/mach-bmips/Kconfig"
+source "arch/mips/mach-jz47xx/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
 source "arch/mips/mach-mt7620/Kconfig"
 
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 802244a06e5d..a294e9b1e8b9 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -13,6 +13,7 @@ libs-y += arch/mips/lib/
 
 machine-$(CONFIG_ARCH_ATH79) += ath79
 machine-$(CONFIG_ARCH_BMIPS) += bmips
+machine-$(CONFIG_ARCH_JZ47XX) += jz47xx
 machine-$(CONFIG_MACH_PIC32) += pic32
 machine-$(CONFIG_ARCH_MT7620) += mt7620
 
diff --git a/arch/mips/dts/jz4780.dtsi b/arch/mips/dts/jz4780.dtsi
new file mode 100644
index ..e34f8d359036
--- /dev/null
+++ b/arch/mips/dts/jz4780.dtsi
@@ -0,0 +1,162 @@
+#include 
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "ingenic,jz4780";
+
+   cpuintc: interrupt-controller {
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   interrupt-controller;
+   compatible = "mti,cpu-interrupt-controller";
+   };
+
+   intc: interrupt-controller@10001000 {
+   compatible = "ingenic,jz4780-intc";
+   reg = <0x10001000 0x50>;
+
+   interrupt-controller;
+   #interrupt-cells = <1>;
+
+   interrupt-parent = <&cpuintc>;
+   interrupts = <2>;
+   };
+
+   ext: ext {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   };
+
+   rtc: rtc {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <32768>;
+

[U-Boot] [PATCH v3 2/5] mmc: Add JZ47xx SD/MMC controller driver

2018-12-16 Thread Ezequiel Garcia

From: Paul Burton 

Add driver for the JZ47xx MSC controller.

Cc: Daniel Schwierzeck 
Signed-off-by: Paul Burton 
Signed-off-by: Marek Vasut 
Signed-off-by: Ezequiel Garcia 
---
 drivers/mmc/Kconfig  |   6 +
 drivers/mmc/Makefile |   1 +
 drivers/mmc/jz_mmc.  |   0
 drivers/mmc/jz_mmc.c | 489 +++
 4 files changed, 496 insertions(+)
 create mode 100644 drivers/mmc/jz_mmc.
 create mode 100644 drivers/mmc/jz_mmc.c

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index fbd13964a084..496b2cba6405 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -332,6 +332,12 @@ config MMC_BCM2835
 
  If unsure, say N.
 
+config JZ47XX_MMC
+   bool "Ingenic JZ47xx SD/MMC Host Controller support"
+   depends on ARCH_JZ47XX
+   help
+ This selects support for the SD Card Controller on Ingenic JZ47xx 
SoCs.
+
 config MMC_SANDBOX
bool "Sandbox MMC support"
depends on SANDBOX
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 801a26d82192..7892c468f05c 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o
 obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
 obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
 obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
+obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
 
 # SDHCI
 obj-$(CONFIG_MMC_SDHCI)+= sdhci.o
diff --git a/drivers/mmc/jz_mmc. b/drivers/mmc/jz_mmc.
new file mode 100644
index ..e69de29bb2d1
diff --git a/drivers/mmc/jz_mmc.c b/drivers/mmc/jz_mmc.c
new file mode 100644
index ..2e92fa16e6c8
--- /dev/null
+++ b/drivers/mmc/jz_mmc.c
@@ -0,0 +1,489 @@
+/*
+ * Ingenic JZ MMC driver
+ *
+ * Copyright (c) 2013 Imagination Technologies
+ * Author: Paul Burton 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Registers */
+#define MSC_STRPCL 0x000
+#define MSC_STAT   0x004
+#define MSC_CLKRT  0x008
+#define MSC_CMDAT  0x00c
+#define MSC_RESTO  0x010
+#define MSC_RDTO   0x014
+#define MSC_BLKLEN 0x018
+#define MSC_NOB0x01c
+#define MSC_SNOB   0x020
+#define MSC_IMASK  0x024
+#define MSC_IREG   0x028
+#define MSC_CMD0x02c
+#define MSC_ARG0x030
+#define MSC_RES0x034
+#define MSC_RXFIFO 0x038
+#define MSC_TXFIFO 0x03c
+#define MSC_LPM0x040
+#define MSC_DMAC   0x044
+#define MSC_DMANDA 0x048
+#define MSC_DMADA  0x04c
+#define MSC_DMALEN 0x050
+#define MSC_DMACMD 0x054
+#define MSC_CTRL2  0x058
+#define MSC_RTCNT  0x05c
+#define MSC_DBG0x0fc
+
+/* MSC Clock and Control Register (MSC_STRPCL) */
+#define MSC_STRPCL_EXIT_MULTIPLE   BIT(7)
+#define MSC_STRPCL_EXIT_TRANSFER   BIT(6)
+#define MSC_STRPCL_START_READWAIT  BIT(5)
+#define MSC_STRPCL_STOP_READWAIT   BIT(4)
+#define MSC_STRPCL_RESET   BIT(3)
+#define MSC_STRPCL_START_OPBIT(2)
+#define MSC_STRPCL_CLOCK_CONTROL_STOP  BIT(0)
+#define MSC_STRPCL_CLOCK_CONTROL_START BIT(1)
+
+/* MSC Status Register (MSC_STAT) */
+#define MSC_STAT_AUTO_CMD_DONE BIT(31)
+#define MSC_STAT_IS_RESETTING  BIT(15)
+#define MSC_STAT_SDIO_INT_ACTIVE   BIT(14)
+#define MSC_STAT_PRG_DONE  BIT(13)
+#define MSC_STAT_DATA_TRAN_DONEBIT(12)
+#define MSC_STAT_END_CMD_RES   BIT(11)
+#define MSC_STAT_DATA_FIFO_AFULL   BIT(10)
+#define MSC_STAT_IS_READWAIT   BIT(9)
+#define MSC_STAT_CLK_ENBIT(8)
+#define MSC_STAT_DATA_FIFO_FULLBIT(7)
+#define MSC_STAT_DATA_FIFO_EMPTY   BIT(6)
+#define MSC_STAT_CRC_RES_ERR   BIT(5)
+#define MSC_STAT_CRC_READ_ERRORBIT(4)
+#define MSC_STAT_CRC_WRITE_ERROR   BIT(2)
+#define MSC_STAT_CRC_WRITE_ERROR_NOSTS BIT(4)
+#define MSC_STAT_TIME_OUT_RES  BIT(1)
+#define MSC_STAT_TIME_OUT_READ BIT(0)
+
+/* MSC Bus Clock Control Register (MSC_CLKRT) */
+#define MSC_CLKRT_CLK_RATE_MASK0x7
+
+/* MSC Command Sequence Control Register (MSC_CMDAT) */
+#define MSC_CMDAT_IO_ABORT BIT(11)
+#define MSC_CMDAT_BUS_WIDTH_1BIT   (0x0 << 9)
+#define MSC_CMDAT_BUS_WIDTH_4BIT   (0x2 << 9)
+#define MSC_CMDAT_DMA_EN   BIT(8)
+#define MSC_CMDAT_INIT BIT(7)
+#define MSC_CMDAT_BUSY BIT(6)
+#define MSC_CMDAT_STREAM_BLOCK BIT(5)
+#define MSC_CMDAT_WRITE

[U-Boot] [PATCH v3 1/5] misc: Add JZ47xx efuse driver

2018-12-16 Thread Ezequiel Garcia

From: Paul Burton 

Add driver for the efuse block in the JZ47xx SOC.

Cc: Daniel Schwierzeck 
Signed-off-by: Paul Burton 
Signed-off-by: Marek Vasut 
Signed-off-by: Ezequiel Garcia 
---
 drivers/misc/Kconfig|   6 +++
 drivers/misc/Makefile   |   1 +
 drivers/misc/jz4780_efuse.c | 104 
 3 files changed, 111 insertions(+)
 create mode 100644 drivers/misc/jz4780_efuse.c

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 48febc47d263..704c8dd1955f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -120,6 +120,12 @@ config FSL_SEC_MON
  Security Monitor can be transitioned on any security failures,
  like software violations or hardware security violations.
 
+config JZ4780_EFUSE
+   bool "Ingenic JZ4780 eFUSE support"
+   depends on ARCH_JZ47XX
+   help
+ This selects support for the eFUSE on Ingenic JZ4780 SoCs.
+
 config MXC_OCOTP
bool "Enable MXC OCOTP Driver"
help
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 302d44159274..6bdf5054f475 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -62,3 +62,4 @@ obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
 obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
 obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
+obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o
diff --git a/drivers/misc/jz4780_efuse.c b/drivers/misc/jz4780_efuse.c
new file mode 100644
index ..7b327f54b15c
--- /dev/null
+++ b/drivers/misc/jz4780_efuse.c
@@ -0,0 +1,104 @@
+/*
+ * JZ4780 EFUSE driver
+ *
+ * Copyright (c) 2014 Imagination Technologies
+ * Author: Alex Smith 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define EFUSE_EFUCTRL  0xd0
+#define EFUSE_EFUCFG   0xd4
+#define EFUSE_EFUSTATE 0xd8
+#define EFUSE_EFUDATA(n)   (0xdc + ((n) * 4))
+
+#define EFUSE_EFUCTRL_RD_ENBIT(0)
+#define EFUSE_EFUCTRL_LEN_BIT  16
+#define EFUSE_EFUCTRL_LEN_MASK 0x1f
+#define EFUSE_EFUCTRL_ADDR_BIT 21
+#define EFUSE_EFUCTRL_ADDR_MASK0x1ff
+#define EFUSE_EFUCTRL_CS   BIT(30)
+
+#define EFUSE_EFUCFG_RD_STROBE_BIT 16
+#define EFUSE_EFUCFG_RD_STROBE_MASK0xf
+#define EFUSE_EFUCFG_RD_ADJ_BIT20
+#define EFUSE_EFUCFG_RD_ADJ_MASK   0xf
+
+#define EFUSE_EFUSTATE_RD_DONE BIT(0)
+
+static void jz4780_efuse_read_chunk(size_t addr, size_t count, u8 *buf)
+{
+   void __iomem *regs = (void __iomem *)NEMC_BASE;
+   size_t i;
+   u32 val;
+   int ret;
+
+   val = EFUSE_EFUCTRL_RD_EN |
+ ((count - 1) << EFUSE_EFUCTRL_LEN_BIT) |
+ (addr << EFUSE_EFUCTRL_ADDR_BIT) |
+ ((addr > 0x200) ? EFUSE_EFUCTRL_CS : 0);
+   writel(val, regs + EFUSE_EFUCTRL);
+
+   ret = wait_for_bit_le32(regs + EFUSE_EFUSTATE,
+   EFUSE_EFUSTATE_RD_DONE, true, 1, false);
+   if (ret)
+   return;
+
+   if ((count % 4) == 0) {
+   for (i = 0; i < count / 4; i++) {
+   val = readl(regs + EFUSE_EFUDATA(i));
+   put_unaligned(val, (u32 *)(buf + (i * 4)));
+   }
+   } else {
+   val = readl(regs + EFUSE_EFUDATA(0));
+   if (count > 2)
+   buf[2] = (val >> 16) & 0xff;
+   if (count > 1)
+   buf[1] = (val >> 8) & 0xff;
+   buf[0] = val & 0xff;
+   }
+}
+
+static inline int jz4780_efuse_chunk_size(size_t count)
+{
+   if (count >= 32)
+   return 32;
+   else if ((count / 4) > 0)
+   return (count / 4) * 4;
+   else
+   return count % 4;
+}
+
+void jz4780_efuse_read(size_t addr, size_t count, u8 *buf)
+{
+   size_t chunk;
+
+   while (count > 0) {
+   chunk = jz4780_efuse_chunk_size(count);
+   jz4780_efuse_read_chunk(addr, chunk, buf);
+   addr += chunk;
+   buf += chunk;
+   count -= chunk;
+   }
+}
+
+void jz4780_efuse_init(u32 ahb2_rate)
+{
+   void __iomem *regs = (void __iomem *)NEMC_BASE;
+   u32 rd_adj, rd_strobe, tmp;
+
+   rd_adj = (((6500 * (ahb2_rate / 100)) / 100) + 0xf) / 2;
+   tmp = (((35000 * (ahb2_rate / 100)) / 100) - 4) - rd_adj;
+   rd_strobe = ((tmp + 0xf) / 2 < 7) ? 7 : (tmp + 0xf) / 2;
+
+   tmp = (rd_adj << EFUSE_EFUCFG_RD_ADJ_BIT) |
+ (rd_strobe << EFUSE_EFUCFG_RD_STROBE_BIT);
+   writel(tmp, regs + EFUSE_EFUCFG);
+}
-- 
2.20.0

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[U-Boot] [PATCH v3 3/5] mips: Add SPL header

2018-12-16 Thread Ezequiel Garcia

From: Paul Burton 

Add header with SPL boot mode and type definitions.

Cc: Daniel Schwierzeck 
Signed-off-by: Paul Burton 
Signed-off-by: Marek Vasut 
---
 arch/mips/include/asm/spl.h | 35 +++
 1 file changed, 35 insertions(+)
 create mode 100644 arch/mips/include/asm/spl.h

diff --git a/arch/mips/include/asm/spl.h b/arch/mips/include/asm/spl.h
new file mode 100644
index ..01baab606606
--- /dev/null
+++ b/arch/mips/include/asm/spl.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2012
+ * Texas Instruments, 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#ifndef_ASM_SPL_H_
+#define_ASM_SPL_H_
+
+enum {
+   BOOT_DEVICE_RAM,
+   BOOT_DEVICE_MMC1,
+   BOOT_DEVICE_MMC2,
+   BOOT_DEVICE_MMC2_2,
+   BOOT_DEVICE_NAND,
+   BOOT_DEVICE_ONENAND,
+   BOOT_DEVICE_NOR,
+   BOOT_DEVICE_UART,
+   BOOT_DEVICE_SPI,
+   BOOT_DEVICE_USB,
+   BOOT_DEVICE_SATA,
+   BOOT_DEVICE_I2C,
+   BOOT_DEVICE_BOARD,
+   BOOT_DEVICE_NONE
+};
+
+/* Linker symbols. */
+extern char __bss_start[];
+extern ulong __bss_end;
+
+#ifndef CONFIG_DM
+extern gd_t gdata;
+#endif
+
+#endif
-- 
2.20.0

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[U-Boot] [PATCH v3 0/5] Add support for MIPS Creator CI20

2018-12-16 Thread Ezequiel Garcia

A new round, addressing feedback from Daniel.

Daniel: do you think this is acceptable as a first submission?

v3:
 * Cleanup SoC reset logic.
 * Move gpio driver to SoC specific code, to be used by SPL.
   A proper dm gpio driver will be added later.
 * Cleaned up SPDX.
 * Added myself as JZ4780 maintainer.
 * Added TODO file.

v2:

 * Replaced infinite while loop with wait_for_bit.
 * Added a MAINTAINERS file. If anyone wants to co-maintain this,
   please let me know.

This is based on master and has been tested by SD-card booting
both U-Boot and Linux. Booting Linux via TFTP was also tested.

I've pushed a branch to https://github.com/ezequielgarcia/u-boot/tree/ci20-v3
and started travis.

Note that Paul's contributions are recorded using his imgtec.com
mail although it's no longer valid, and that we will rely on mailmap
to map it to mips.com.

It would be terrific to fit this on the next release.

Thanks!

Paul Burton (5):
  misc: Add JZ47xx efuse driver
  mmc: Add JZ47xx SD/MMC controller driver
  mips: Add SPL header
  mips: jz47xx: Add JZ4780 SoC support
  mips: jz47xx: Add Creator CI20 platform

 MAINTAINERS   |   6 +
 arch/mips/Kconfig |   7 +
 arch/mips/Makefile|   1 +
 arch/mips/dts/Makefile|   1 +
 arch/mips/dts/ci20.dts| 120 
 arch/mips/dts/jz4780.dtsi | 162 ++
 arch/mips/include/asm/spl.h   |  35 ++
 arch/mips/mach-jz47xx/Kconfig |  26 +
 arch/mips/mach-jz47xx/Makefile|   7 +
 arch/mips/mach-jz47xx/include/mach/jz4780.h   | 103 
 .../mach-jz47xx/include/mach/jz4780_dram.h| 456 +++
 .../mach-jz47xx/include/mach/jz4780_gpio.h|  12 +
 arch/mips/mach-jz47xx/jz4780/Makefile |   5 +
 arch/mips/mach-jz47xx/jz4780/TODO |   4 +
 arch/mips/mach-jz47xx/jz4780/gpio.c   |  39 ++
 arch/mips/mach-jz47xx/jz4780/jz4780.c |  82 +++
 arch/mips/mach-jz47xx/jz4780/pll.c| 527 ++
 arch/mips/mach-jz47xx/jz4780/reset.c  |  53 ++
 arch/mips/mach-jz47xx/jz4780/sdram.c  | 270 +
 arch/mips/mach-jz47xx/jz4780/timer.c  | 237 
 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds   |  52 ++
 arch/mips/mach-jz47xx/start.S |  99 
 board/imgtec/ci20/Kconfig |  15 +
 board/imgtec/ci20/MAINTAINERS |   6 +
 board/imgtec/ci20/Makefile|   5 +
 board/imgtec/ci20/README  |  10 +
 board/imgtec/ci20/ci20.c  | 362 
 configs/ci20_defconfig|  46 ++
 drivers/misc/Kconfig  |   6 +
 drivers/misc/Makefile |   1 +
 drivers/misc/jz4780_efuse.c   | 104 
 drivers/mmc/Kconfig   |   6 +
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/jz_mmc.   |   0
 drivers/mmc/jz_mmc.c  | 489 
 include/configs/ci20.h|  73 +++
 include/dt-bindings/clock/jz4780-cgu.h|  88 +++
 37 files changed, 3516 insertions(+)
 create mode 100644 arch/mips/dts/ci20.dts
 create mode 100644 arch/mips/dts/jz4780.dtsi
 create mode 100644 arch/mips/include/asm/spl.h
 create mode 100644 arch/mips/mach-jz47xx/Kconfig
 create mode 100644 arch/mips/mach-jz47xx/Makefile
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_gpio.h
 create mode 100644 arch/mips/mach-jz47xx/jz4780/Makefile
 create mode 100644 arch/mips/mach-jz47xx/jz4780/TODO
 create mode 100644 arch/mips/mach-jz47xx/jz4780/gpio.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/jz4780.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/pll.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/reset.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/sdram.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/timer.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds
 create mode 100644 arch/mips/mach-jz47xx/start.S
 create mode 100644 board/imgtec/ci20/Kconfig
 create mode 100644 board/imgtec/ci20/MAINTAINERS
 create mode 100644 board/imgtec/ci20/Makefile
 create mode 100644 board/imgtec/ci20/README
 create mode 100644 board/imgtec/ci20/ci20.c
 create mode 100644 configs/ci20_defconfig
 create mode 100644 drivers/misc/jz4780_efuse.c
 create mode 100644 drivers/mmc/jz_mmc.
 create mode 100644 drivers/mmc/jz_mmc.c
 create mode 100644 include/configs/ci20.h
 create mode 100644 include/dt-bindings/clock/jz4780-cgu.h

-- 
2.20.0

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Re: [U-Boot] [PATCH v2] imx6: apalis: Make the boot process more generic

2018-12-16 Thread Otavio Salvador

Hello Petr,

On Sun, Dec 16, 2018 at 7:31 PM Petr Štetiar  wrote:
> I'm preparing support for Apalis imx6 boards in OpenWrt and I've ended
> up with quite huge patchset against upstream U-Boot 2018.03, so I'm
> trying to propose more generic way of boot process handling.
>
> In OpenWrt we usually have kernel, dtbs and U-Boot boot script in boot
> partition with ext4fs, so for some use cases it would be handy to be
> able to replace some of the files in the boot partion, that's why I've
> added write support to the ext4.

I wonder if you couldn't instead move the board to use the common
distro environment? Doing that, it allows for easy changing of
bootargs from rootfs (well, technically it can be in a single
partition or not) and easy to hack / understand syslinux.cfg
compatible file.

At OpenEmbedded / Yocto Project, we have been slowly adopting this
more and more as it allows very easy integration and is convenient for
hacking as well. Take a look at Wandboard as an example of it.

-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9 9981-7854  Mobile: +1 (347) 903-9750
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[U-Boot] [PATCH v2] imx6: apalis: Make the boot process more generic

2018-12-16 Thread Petr Štetiar

I'm preparing support for Apalis imx6 boards in OpenWrt and I've ended
up with quite huge patchset against upstream U-Boot 2018.03, so I'm
trying to propose more generic way of boot process handling.

In OpenWrt we usually have kernel, dtbs and U-Boot boot script in boot
partition with ext4fs, so for some use cases it would be handy to be
able to replace some of the files in the boot partion, that's why I've
added write support to the ext4.

I've added `set_blkcnt` environment variable which is needed for every
`mmc write` command as we need to always specify size in block count.
This is copy&pasted from official Toradex's flashing scripts, so all the
credits for this work belongs to them.

Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the boot device
changes depending on the kernel version and imx6 SoC type.  In order to
avoid such issues, use the UUID method to specify the rootfs location.

I've added new boot sequence, where we first try to load and run boot
script defined in the new `script` variable, so the boot process could
be more generic and overridden by the distro. When the boot script isn't
loaded, it will use the previous boot sequence.

For the recovery purposes and better end user experience I've added boot
from SDP as the last boot command if every other boot option fails. I
plan to use SDP as official flashing/recovery procedure in OpenWrt for
Apalis imx6 boards.

I've copy&pasted almost everything from the `f086812a mx6sxsabresd: Use
PARTUUID to specify the rootfs location` commit, so credits for the rest
of this patch belongs to Fabio.

Cc: Stefan Agner 
Cc: Max Krummenacher 
Signed-off-by: Petr Štetiar 
---
 configs/apalis_imx6_defconfig |  2 ++
 include/configs/apalis_imx6.h | 26 +-
 2 files changed, 23 insertions(+), 5 deletions(-)

Changes since v1:

  * Made note about ext4 write support more clear
  * I've removed Kconfig variables and all variables which were coupled to the 
code
  * I've removed the note about backward compatibility from commit message,
because I've realized, that this changes are not backward compatible,
because this patch is switching to part UUID, so the distributions would
need to provide filesystem with part UUID for rootfs.

diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 133fc1a..279d39f 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -39,6 +39,7 @@ CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -48,6 +49,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 135b3c9..3601891 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -142,9 +142,9 @@
"imx6q-colibri-cam-eval-v3.dtb fat 0 1"
 
 #define EMMC_BOOTCMD \
-   "emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext3 " \
+   "emmcargs=ip=off root=PARTUUID=${uuid} rw,noatime rootfstype=ext3 " \
"rootwait\0" \
-   "emmcboot=run setup; " \
+   "emmcboot=run setup; run finduuid;" \
"setenv bootargs ${defargs} ${emmcargs} ${setupargs} " \
"${vidargs}; echo Booting from internal eMMC chip...; " \
"run emmcdtbload; load mmc 0:1 ${kernel_addr_r} " \
@@ -201,10 +201,17 @@
 #define FDT_FILE "imx6q-apalis_v1_0-eval.dtb"
 #endif
 #define CONFIG_EXTRA_ENV_SETTINGS \
-   "bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \
+   "script=boot.scr\0" \
+   "finduuid=part uuid mmc 0:2 uuid\0" \
+   "loadbootscript=" \
+   "load mmc 0:1 ${loadaddr} ${script};\0" \
+   "bootscript=echo Running bootscript from mmc ...; " \
+   "source\0" \
+   "bootcmd_default=run emmcboot ; echo ; echo emmcboot failed ; " \
"run nfsboot ; echo ; echo nfsboot failed ; " \
"usb start ;" \
-   "setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \
+   "setenv stdout serial,vga ; setenv stdin serial,usbkbd;" \
+   "sdp 0\0" \
"boot_file=uImage\0" \
"console=ttymxc0\0" \
"defargs=enable_wait_mode=off vmalloc=400M\0" \
@@ -232,7 +239,16 @@
"vidargs=mxc_hdmi.only_cea=1 " \
"video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24 " \
"video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off " \
-   "fbmem=32M\0 "
+   "fbmem=32M\0 " \
+   "set_blkcnt=setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt 
${blkcnt} / 0x200\0"
+
+#define CONFIG_BOOTCOMMAND \
+  "mmc dev 0;" \
+  "if run loadbootscript; then " \
+  "r

Re: [U-Boot] U-Boot 2019.01-rc1-00337-g42cc2cf partition table issues on imx6

2018-12-16 Thread Petr Štetiar

Petr Štetiar  [2018-12-16 01:20:07]:

>   U-Boot 2019.01-rc1-00337-g42cc2cf (Dec 16 2018 - 01:02:22 +0100)
>   Model: Toradex Apalis iMX6 Quad 2GB IT V1.1A, Serial# 04875944
> 
>   # mmc dev 0
>   switch to partitions #0, OK
>   mmc0(part 0) is current device
> 
>   # load mmc 0:1 ${loadaddr} ${script}
>   ** No partition table - mmc 0 **

I've bisected it down to the following commit:

  commit d0851c8937067ad396f2bdafc46d0326bf3317db
  Author: Bin Meng 
  Date:   Mon Oct 15 02:21:07 2018 -0700
  
  blk: Call part_init() in the post_probe() method
  
  part_init() is currently called in every DM BLK driver, either
  in its bind() or probe() method. However we can use the BLK
  uclass driver's post_probe() method to do it automatically.
  
  Update all DM BLK drivers to adopt this change.
  
  Signed-off-by: Bin Meng 
  Reviewed-by: Simon Glass 

I've looked at it and it seems, that it's happening because blk_post_probe
isn't called.

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Re: [U-Boot] [PULL] Please pull u-boot-imx: u-boot-imx-20181214

2018-12-16 Thread Lukasz Majewski

Dear Stefano,

> On Fri, Dec 14, 2018 at 02:39:04PM +0100, Stefano Babic wrote:
> 
> > Hi Tom,
> > 
> > please pull from u-boot-imx, thanks !
> > 
> > 
> > The following changes since commit
> > c49aff3e66b930aa06936afee401cf5e19377958:
> > 
> >   Merge branch 'master' of git://git.denx.de/u-boot-sunxi
> > (2018-12-07 19:02:01 -0500)
> > 
> > are available in the Git repository at:
> > 
> >   git://www.denx.de/git/u-boot-imx.git tags/u-boot-imx-20181214
> > 
> > for you to fetch changes up to
> > 5d0f0b567c78197db6f2f47c89a18b44ade28284:
> > 
> >   pico-imx7d: Increase the CONFIG_ENV_OFFSET size (2018-12-14
> > 14:30:57 +0100)
> >   
> 
> NAK.  You're failing the "no new defconfigs without MAINTAINERS" test
> in Travis: https://travis-ci.org/trini/u-boot/jobs/468004873#L975
> 
> Also, Wolfgang's patch is breaking
> guruplug,sheevaplug,linkit-smart-7688-ram,colibri_pxa270,linkit-smart-7688,gardena-smart-gateway-mt7688-ram,gardena-smart-gateway-mt7688
> in my specific Debian chroot and I need to dig in more to provide
> something useful there other than "it fails".  So please drop that for
> now too.  Thanks!
> 

As this PR is not accepted; Stefano, could you also pull following
changes (relevant for vybrid):

http://patchwork.ozlabs.org/patch/1006731/
http://patchwork.ozlabs.org/patch/1006732/
http://patchwork.ozlabs.org/patch/1006733/

One of it:
"nand: vybrid: Use calloc() instead of malloc() to allocate struct nfc"
is a fix.

The other two just add support for Vybrid's NFC controller in device
tree. There shall be no issues with this code for in-tree boards.

Thanks in advance and sorry for a late reply to this thread.


Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH v1 1/2] dm: usb: udc: Use SEQ_ALIAS to index the USB gadget ports

2018-12-16 Thread Lukasz Majewski

Hi Marek, Jean-Jacques,

> On 12/15/2018 05:43 PM, Jean-Jacques Hiblot wrote:
> > dfu, fastbot and other usb gadget commands take the USB port index
> > as a  
> 
> fastboot.
> 
> Looks good to me, I expect Lukasz to pick it, test it and send me a
> PR.
> 
> > parameter. Currently this index is assigned in the order of the
> > driver bindings.
> > Changing this behavior using the SEQ_ALIAS feature. This option
> > assign to the device a SEQ number based on its alias (if it exists)
> > 
> > To use it we must set the DM_UC_FLAG_SEQ_ALIAS flag and follow the
> > existing naming convention: use "usb" for the name of the gadget
> > UCLASS_DRIVER (same as for the UCLASS_USB).

I must admit that this change fixes a long standing problem with the
usb number assignment.

Great job. I will test and send it in a few days time.

> > 
> > If no alias is provided, then the index falls back to the order in
> > which the bindings took place.
> > 
> > Signed-off-by: Jean-Jacques Hiblot 
> > Reported-by: Sam Protsenko 
> > ---
> > 
> >  drivers/usb/gadget/udc/udc-uclass.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/usb/gadget/udc/udc-uclass.c
> > b/drivers/usb/gadget/udc/udc-uclass.c index 0620518..e9f8f5f 100644
> > --- a/drivers/usb/gadget/udc/udc-uclass.c
> > +++ b/drivers/usb/gadget/udc/udc-uclass.c
> > @@ -20,7 +20,7 @@ int usb_gadget_initialize(int index)
> > return -EINVAL;
> > if (dev_array[index])
> > return 0;
> > -   ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, index,
> > &dev);
> > +   ret = uclass_get_device_by_seq(UCLASS_USB_GADGET_GENERIC,
> > index, &dev); if (!dev || ret) {
> > pr_err("No USB device found\n");
> > return -ENODEV;
> > @@ -54,5 +54,6 @@ int usb_gadget_handle_interrupts(int index)
> >  
> >  UCLASS_DRIVER(usb_gadget_generic) = {
> > .id = UCLASS_USB_GADGET_GENERIC,
> > -   .name   = "usb_gadget_generic",
> > +   .name   = "usb",
> > +   .flags  = DM_UC_FLAG_SEQ_ALIAS,
> >  };
> >   
> 
> 




Best regards,

Lukasz Majewski

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[U-Boot] [PATCH v4 08/12] configs: add DM_SPI config option

2018-12-16 Thread Angelo Dureghello

This patch adds CONFIG_DM_SPI for all m68k boards using
the cf_spi.c driver (DSPI module).

Reviewed-by: Simon Glass 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- new patch
Changes for v3:
- none
Changes for v4:
- none
---
 configs/M52277EVB_defconfig   | 1 +
 configs/M52277EVB_stmicro_defconfig   | 1 +
 configs/M54418TWR_defconfig   | 1 +
 configs/M54418TWR_nand_mii_defconfig  | 1 +
 configs/M54418TWR_nand_rmii_defconfig | 1 +
 configs/M54418TWR_nand_rmii_lowfreq_defconfig | 1 +
 configs/M54418TWR_serial_mii_defconfig| 1 +
 configs/M54418TWR_serial_rmii_defconfig   | 1 +
 configs/M54451EVB_defconfig   | 1 +
 configs/M54451EVB_stmicro_defconfig   | 1 +
 configs/M54455EVB_a66_defconfig   | 1 +
 configs/M54455EVB_defconfig   | 1 +
 configs/M54455EVB_i66_defconfig   | 1 +
 configs/M54455EVB_intel_defconfig | 1 +
 configs/M54455EVB_stm33_defconfig | 1 +
 configs/stmark2_defconfig | 2 ++
 16 files changed, 17 insertions(+)

diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig
index 87d5e852f0..bc7b051239 100644
--- a/configs/M52277EVB_defconfig
+++ b/configs/M52277EVB_defconfig
@@ -26,4 +26,5 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M52277EVB_stmicro_defconfig 
b/configs/M52277EVB_stmicro_defconfig
index ed24d3e11d..c76ff5fb3a 100644
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -25,4 +25,5 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig
index 3b35bcec4f..7713f266bb 100644
--- a/configs/M54418TWR_defconfig
+++ b/configs/M54418TWR_defconfig
@@ -26,3 +26,4 @@ CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_CF_SPI=y
+CONFIG_DM_SPI=y
diff --git a/configs/M54418TWR_nand_mii_defconfig 
b/configs/M54418TWR_nand_mii_defconfig
index c53c9d4512..1c2d337367 100644
--- a/configs/M54418TWR_nand_mii_defconfig
+++ b/configs/M54418TWR_nand_mii_defconfig
@@ -24,4 +24,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_rmii_defconfig 
b/configs/M54418TWR_nand_rmii_defconfig
index 822d34928a..29d891b073 100644
--- a/configs/M54418TWR_nand_rmii_defconfig
+++ b/configs/M54418TWR_nand_rmii_defconfig
@@ -24,4 +24,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig 
b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
index dda2864e18..4881076757 100644
--- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig
+++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
@@ -24,4 +24,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_serial_mii_defconfig 
b/configs/M54418TWR_serial_mii_defconfig
index 25d8c4c72c..95949fec76 100644
--- a/configs/M54418TWR_serial_mii_defconfig
+++ b/configs/M54418TWR_serial_mii_defconfig
@@ -25,4 +25,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_serial_rmii_defconfig 
b/configs/M54418TWR_serial_rmii_defconfig
index 29490e2faa..229f1d45d3 100644
--- a/configs/M54418TWR_serial_rmii_defconfig
+++ b/configs/M54418TWR_serial_rmii_defconfig
@@ -25,4 +25,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig
index 067eaa1369..c85b476089 100644
--- a/configs/M54451EVB_defconfig
+++ b/configs/M54451EVB_defconfig
@@ -31,4 +31,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54451EVB_stmicro_defconfig 
b/configs/M54451EVB_stmicro_defconfig
index 95b54612c9..36393c50fe 100644
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -30,4 +30,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig
index e131460ca9..9cfd1f896c 100644
--- a/configs/M54455EVB_a66_defconfig
+++ b/configs/M54455EVB_a66_defconfig
@@ -35,4 +35,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig
index cda5702f07..8d0f9bf54f 100644
--- a/configs/M54455EVB_defconfig
+++ b/configs/M54455EVB_defconfig
@@ -36,4 +36,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 C

Re: [U-Boot] [RESEND PATCH v2 2/6] efi_loader: Initial HII database protocols

2018-12-16 Thread Heinrich Schuchardt

On 12/14/18 11:10 AM, AKASHI Takahiro wrote:
> From: Leif Lindholm 
> 
> This patch provides enough implementation of the following protocols to
> run EDKII's Shell.efi and UEFI SCT:
> 
>   * EfiHiiDatabaseProtocol
>   * EfiHiiStringProtocol
> 
> Not implemented are:
>   * ExportPackageLists()
>   * RegisterPackageNotify()/UnregisterPackageNotify()
>   * SetKeyboardLayout() (i.e. *current* keyboard layout)
> 
> HII database protocol can handle only:
>   * GUID package
>   * string package
>   * keyboard layout package
>   (The other packages, except Device path package, will be necessary
>for interactive and graphical UI.)
> 
> We'll fill in the rest once SCT is running properly so we can validate
> the implementation against the conformance test suite.
> 
> Cc: Leif Lindholm 
> Signed-off-by: Rob Clark 
> Signed-off-by: AKASHI Takahiro 
> ---
>  include/efi_api.h | 242 ++
>  include/efi_loader.h  |   4 +
>  lib/efi_loader/Makefile   |   1 +
>  lib/efi_loader/efi_boottime.c |  12 +
>  lib/efi_loader/efi_hii.c  | 886 ++
>  5 files changed, 1145 insertions(+)
>  create mode 100644 lib/efi_loader/efi_hii.c
> 
> diff --git a/include/efi_api.h b/include/efi_api.h
> index aef77b6319de..c9dbd5a6037d 100644
> --- a/include/efi_api.h
> +++ b/include/efi_api.h
> @@ -17,6 +17,7 @@
>  #define _EFI_API_H
>  
>  #include 
> +#include 
>  
>  #ifdef CONFIG_EFI_LOADER
>  #include 
> @@ -697,6 +698,247 @@ struct efi_device_path_utilities_protocol {
>   uint16_t node_length);
>  };
>  
> +typedef u16 efi_string_id_t;
> +
> +#define EFI_HII_DATABASE_PROTOCOL_GUID\
> + EFI_GUID(0xef9fc172, 0xa1b2, 0x4693, \
> +  0xb3, 0x27, 0x6d, 0x32, 0xfc, 0x41, 0x60, 0x42)
> +
> +typedef enum {
> + EFI_KEY_LCTRL, EFI_KEY_A0, EFI_KEY_LALT, EFI_KEY_SPACE_BAR,
> + EFI_KEY_A2, EFI_KEY_A3, EFI_KEY_A4, EFI_KEY_RCTRL, EFI_KEY_LEFT_ARROW,
> + EFI_KEY_DOWN_ARROW, EFI_KEY_RIGHT_ARROW, EFI_KEY_ZERO,
> + EFI_KEY_PERIOD, EFI_KEY_ENTER, EFI_KEY_LSHIFT, EFI_KEY_B0,
> + EFI_KEY_B1, EFI_KEY_B2, EFI_KEY_B3, EFI_KEY_B4, EFI_KEY_B5, EFI_KEY_B6,
> + EFI_KEY_B7, EFI_KEY_B8, EFI_KEY_B9, EFI_KEY_B10, EFI_KEY_RSHIFT,
> + EFI_KEY_UP_ARROW, EFI_KEY_ONE, EFI_KEY_TWO, EFI_KEY_THREE,
> + EFI_KEY_CAPS_LOCK, EFI_KEY_C1, EFI_KEY_C2, EFI_KEY_C3, EFI_KEY_C4,
> + EFI_KEY_C5, EFI_KEY_C6, EFI_KEY_C7, EFI_KEY_C8, EFI_KEY_C9,
> + EFI_KEY_C10, EFI_KEY_C11, EFI_KEY_C12, EFI_KEY_FOUR, EFI_KEY_FIVE,
> + EFI_KEY_SIX, EFI_KEY_PLUS, EFI_KEY_TAB, EFI_KEY_D1, EFI_KEY_D2,
> + EFI_KEY_D3, EFI_KEY_D4, EFI_KEY_D5, EFI_KEY_D6, EFI_KEY_D7, EFI_KEY_D8,
> + EFI_KEY_D9, EFI_KEY_D10, EFI_KEY_D11, EFI_KEY_D12, EFI_KEY_D13,
> + EFI_KEY_DEL, EFI_KEY_END, EFI_KEY_PG_DN, EFI_KEY_SEVEN, EFI_KEY_EIGHT,
> + EFI_KEY_NINE, EFI_KEY_E0, EFI_KEY_E1, EFI_KEY_E2, EFI_KEY_E3,
> + EFI_KEY_E4, EFI_KEY_E5, EFI_KEY_E6, EFI_KEY_E7, EFI_KEY_E8, EFI_KEY_E9,
> + EFI_KEY_E10, EFI_KEY_E11, EFI_KEY_E12, EFI_KEY_BACK_SPACE,
> + EFI_KEY_INS, EFI_KEY_HOME, EFI_KEY_PG_UP, EFI_KEY_NLCK, EFI_KEY_SLASH,
> + EFI_KEY_ASTERISK, EFI_KEY_MINUS, EFI_KEY_ESC, EFI_KEY_F1, EFI_KEY_F2,
> + EFI_KEY_F3, EFI_KEY_F4, EFI_KEY_F5, EFI_KEY_F6, EFI_KEY_F7, EFI_KEY_F8,
> + EFI_KEY_F9, EFI_KEY_F10, EFI_KEY_F11, EFI_KEY_F12, EFI_KEY_PRINT,
> + EFI_KEY_SLCK, EFI_KEY_PAUSE,
> +} efi_key;
> +
> +struct efi_key_descriptor {
> + efi_key key;

Hello Takahiro,

with the patch I can start the EFI shell. But I am still trying to check
the different definitions in this file.

As mentioned in prior mail the size of enum is not defined in the C
spec. So better use u32.

> + u16 unicode;
> + u16 shifted_unicode;
> + u16 alt_gr_unicode;
> + u16 shifted_alt_gr_unicode;
> + u16 modifier;
> + u16 affected_attribute;
> +};
> +
> +struct efi_hii_keyboard_layout {
> + u16 layout_length;
> + efi_guid_t guid;

A patch to change the alignment of efi_guid_t to __alinged(8) has been
merged into efi-next.

> + u32 layout_descriptor_string_offset;
> + u8 descriptor_count;
> + struct efi_key_descriptor descriptors[];
> +};
> +
> +struct efi_hii_package_list_header {
> + efi_guid_t package_list_guid;
> + u32 package_length;
> +} __packed;

You are defining several structures as __packed. It is unclear to me
where I can find this in the UEFI spec. Looking at EDK2 I could not find
the same __packed attributes.

If this packing is necessary a comment in the code would be helpful.

> +
> +/**
> + * struct efi_hii_package_header - EFI HII package header
> + *
> + * @fields:  'fields' replaces the bit-fields defined in the EFI
> + *   specification to to avoid possible compiler incompatibilities::
> + *
> + *   u32 length:24;
> + *   u32 type:8;
> + */
> +struct efi_hii_package_header {
> + u32 fields;
> +} __packed;

Same here.

> +
> +#define __EFI_HII_PACKAGE_LEN_SHIFT  0
> +#define __EFI_HII_PACKAGE_TYP

[U-Boot] [PATCH 1/2] dm: pci: MIGRATION: Add migration plan for PCI

2018-12-16 Thread Simon Glass

Add a migration plan for PCI which is an important subsystem in U-Boot.

Signed-off-by: Simon Glass 
---

 Makefile   | 10 ++
 doc/driver-model/MIGRATION.txt | 10 ++
 2 files changed, 20 insertions(+)

diff --git a/Makefile b/Makefile
index 5683714947f..4923722f82d 100644
--- a/Makefile
+++ b/Makefile
@@ -947,6 +947,16 @@ ifeq 
($(CONFIG_LIBATA)$(CONFIG_DM_SCSI)$(CONFIG_MVSATA_IDE),y)
@echo "See doc/driver-model/MIGRATION.txt for more info."
@echo ""
 endif
+ifeq ($(CONFIG_PCI),y)
+ifneq ($(CONFIG_DM_PCI),y)
+   @echo >&2 "= WARNING =="
+   @echo >&2 "This board does not use CONFIG_DM_PCI Please update"
+   @echo >&2 "the board to use CONFIG_DM_PCI before the v2019.07 release."
+   @echo >&2 "Failure to update by the deadline may result in board 
removal."
+   @echo >&2 "See doc/driver-model/MIGRATION.txt for more info."
+   @echo >&2 ""
+endif
+endif
 ifeq ($(CONFIG_OF_EMBED),y)
@echo "= WARNING =="
@echo "CONFIG_OF_EMBED is enabled. This option should only"
diff --git a/doc/driver-model/MIGRATION.txt b/doc/driver-model/MIGRATION.txt
index dce4aa3e1dc..03a2cae7976 100644
--- a/doc/driver-model/MIGRATION.txt
+++ b/doc/driver-model/MIGRATION.txt
@@ -82,3 +82,13 @@ Partially converted:
 --
 Jagan Teki 
 03/14/2018
+
+
+CONFIG_DM_PCI
+-
+Deadline: 2019.07
+
+The PCI subsystem has supported driver model since mid 2015. Maintainers should
+submit patches switching over to using CONFIG_DM_PCI and other base driver
+model options in time for inclusion in the 2019.04 rerelease.
+
-- 
2.20.0.405.gbc1bbc6f85-goog

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[U-Boot] [PATCH 2/2] dm: video: lcd: MIGRATION: Add migration plan for video

2018-12-16 Thread Simon Glass

Add a migration plan for video which is an important subsystem in U-Boot.

Signed-off-by: Simon Glass 
---

 Makefile   | 10 ++
 doc/driver-model/MIGRATION.txt |  8 
 2 files changed, 18 insertions(+)

diff --git a/Makefile b/Makefile
index 4923722f82d..4b5022a53c7 100644
--- a/Makefile
+++ b/Makefile
@@ -957,6 +957,16 @@ ifneq ($(CONFIG_DM_PCI),y)
@echo >&2 ""
 endif
 endif
+ifneq ($(CONFIG_LCD)$(CONFIG_VIDEO),)
+ifneq ($(CONFIG_DM_VIDEO),y)
+   @echo >&2 "= WARNING =="
+   @echo >&2 "This board does not use CONFIG_DM_VIDEO Please update"
+   @echo >&2 "the board to use CONFIG_DM_VIDEO before the v2019.07 
release."
+   @echo >&2 "Failure to update by the deadline may result in board 
removal."
+   @echo >&2 "See doc/driver-model/MIGRATION.txt for more info."
+   @echo >&2 ""
+endif
+endif
 ifeq ($(CONFIG_OF_EMBED),y)
@echo "= WARNING =="
@echo "CONFIG_OF_EMBED is enabled. This option should only"
diff --git a/doc/driver-model/MIGRATION.txt b/doc/driver-model/MIGRATION.txt
index 03a2cae7976..dba3f9fe307 100644
--- a/doc/driver-model/MIGRATION.txt
+++ b/doc/driver-model/MIGRATION.txt
@@ -92,3 +92,11 @@ The PCI subsystem has supported driver model since mid 2015. 
Maintainers should
 submit patches switching over to using CONFIG_DM_PCI and other base driver
 model options in time for inclusion in the 2019.04 rerelease.
 
+
+CONFIG_DM_VIDEO
+---
+Deadline: 2019.07
+
+The PCI subsystem has supported driver model since early 2016. Maintainers
+should submit patches switching over to using CONFIG_DM_VIDEO and other base
+driver model options in time for inclusion in the 2019.04 release.
-- 
2.20.0.405.gbc1bbc6f85-goog

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[U-Boot] [PATCH v4 05/12] configs: enable use of DT for all m68k boards

2018-12-16 Thread Angelo Dureghello

Enable DT usage for all m68k boards. To provide a
working single binary, the dts has been kept as embedded.

Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- new patch
Changes for v3:
- none
Changes for v4:
- remove CONFIG_OF_EMBED=y
---
 configs/M5208EVBE_defconfig   | 1 +
 configs/M52277EVB_defconfig   | 1 +
 configs/M52277EVB_stmicro_defconfig   | 1 +
 configs/M5235EVB_Flash32_defconfig| 1 +
 configs/M5235EVB_defconfig| 1 +
 configs/M5249EVB_defconfig| 1 +
 configs/M5253DEMO_defconfig   | 1 +
 configs/M5272C3_defconfig | 1 +
 configs/M5275EVB_defconfig| 1 +
 configs/M5282EVB_defconfig| 1 +
 configs/M53017EVB_defconfig   | 1 +
 configs/M5329AFEE_defconfig   | 1 +
 configs/M5329BFEE_defconfig   | 1 +
 configs/M5373EVB_defconfig| 1 +
 configs/M54418TWR_defconfig   | 1 +
 configs/M54418TWR_nand_mii_defconfig  | 1 +
 configs/M54418TWR_nand_rmii_defconfig | 1 +
 configs/M54418TWR_nand_rmii_lowfreq_defconfig | 1 +
 configs/M54418TWR_serial_mii_defconfig| 1 +
 configs/M54418TWR_serial_rmii_defconfig   | 1 +
 configs/M54451EVB_defconfig   | 1 +
 configs/M54451EVB_stmicro_defconfig   | 1 +
 configs/M54455EVB_a66_defconfig   | 1 +
 configs/M54455EVB_defconfig   | 1 +
 configs/M54455EVB_i66_defconfig   | 1 +
 configs/M54455EVB_intel_defconfig | 1 +
 configs/M54455EVB_stm33_defconfig | 1 +
 configs/M5475AFE_defconfig| 1 +
 configs/M5475BFE_defconfig| 1 +
 configs/M5475CFE_defconfig| 1 +
 configs/M5475DFE_defconfig| 1 +
 configs/M5475EFE_defconfig| 1 +
 configs/M5475FFE_defconfig| 1 +
 configs/M5475GFE_defconfig| 1 +
 configs/M5485AFE_defconfig| 1 +
 configs/M5485BFE_defconfig| 1 +
 configs/M5485CFE_defconfig| 1 +
 configs/M5485DFE_defconfig| 1 +
 configs/M5485EFE_defconfig| 1 +
 configs/M5485FFE_defconfig| 1 +
 configs/M5485GFE_defconfig| 1 +
 configs/M5485HFE_defconfig| 1 +
 configs/amcore_defconfig  | 1 +
 configs/astro_mcf5373l_defconfig  | 1 +
 configs/cobra5272_defconfig   | 1 +
 configs/eb_cpu5282_defconfig  | 1 +
 configs/eb_cpu5282_internal_defconfig | 1 +
 configs/stmark2_defconfig | 1 +
 48 files changed, 48 insertions(+)

diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index 934cda4aa6..01b2c97b66 100644
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x0
 CONFIG_TARGET_M5208EVBE=y
+CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE"
 CONFIG_BOOTDELAY=1
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMDLINE_EDITING is not set
diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig
index efa5e7102b..87d5e852f0 100644
--- a/configs/M52277EVB_defconfig
+++ b/configs/M52277EVB_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x0
 CONFIG_TARGET_M52277EVB=y
+CONFIG_DEFAULT_DEVICE_TREE="M52277EVB"
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/M52277EVB_stmicro_defconfig 
b/configs/M52277EVB_stmicro_defconfig
index 3628729a48..ed24d3e11d 100644
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x43E0
 CONFIG_TARGET_M52277EVB=y
+CONFIG_DEFAULT_DEVICE_TREE="M52277EVB_stmicro"
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/M5235EVB_Flash32_defconfig 
b/configs/M5235EVB_Flash32_defconfig
index fff57436c7..aef8281319 100644
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0xFFC0
 CONFIG_TARGET_M5235EVB=y
+CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32"
 CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT"
 CONFIG_BOOTDELAY=1
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index 07e0f4f50b..efc03179c9 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0xFFE0
 CONFIG_TARGET_M5235EVB=y
+CONFIG_DEFAULT_DEVICE_TREE="M5235EVB"
 CONFIG_BOOTDELAY=1
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMDLINE_EDITING is not set
diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig
index

[U-Boot] [PATCH v4 07/12] drivers: spi: cf_spi: convert to driver model

2018-12-16 Thread Angelo Dureghello

Converting to driver model and removes non-dm code.

Reviewed-by: Simon Glass 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- removed non DM code part
- add default setup of CTAR registers
- add DT CTAR register setup support
Changes for v3:
- changed commit head
- removed spi_slave reference
- add #ifdefs for the case OF_PLATDATA is used
Changes for v4:
- remove all internal static functions that are no more needed including
  their code in the standard driver methods
- add helper macro for ctrl setup
- fix wrong fifo level check on spi tx
- move code inside same #if (avoid multiple #if on same option)
- removed externals and moved bus control code here
---
 drivers/spi/cf_spi.c| 539 
 include/dm/platform_data/spi_coldfire.h |  29 ++
 2 files changed, 401 insertions(+), 167 deletions(-)
 create mode 100644 include/dm/platform_data/spi_coldfire.h

diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c
index 522631cbbf..3d02c87637 100644
--- a/drivers/spi/cf_spi.c
+++ b/drivers/spi/cf_spi.c
@@ -6,23 +6,31 @@
  *
  * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
  * TsiChung Liew (tsi-chung.l...@freescale.com)
+ *
+ * Support for DM and DT, non-DM code removed.
+ * Copyright (C) 2018 Angelo Dureghello 
+ *
+ * TODO: fsl_dspi.c should work as a driver for the DSPI module.
  */
 
 #include 
+#include 
+#include 
 #include 
 #include 
+#include 
+#include 
 #include 
+#include 
 
-struct cf_spi_slave {
-   struct spi_slave slave;
+struct coldfire_spi_priv {
+   struct dspi *regs;
+   struct gpio *gpio_regs;
uint baudrate;
+   int mode;
int charbit;
 };
 
-extern void cfspi_port_conf(void);
-extern int cfspi_claim_bus(uint bus, uint cs);
-extern void cfspi_release_bus(uint bus, uint cs);
-
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifndef CONFIG_SPI_IDLE_VAL
@@ -33,149 +41,267 @@ DECLARE_GLOBAL_DATA_PTR;
 #endif
 #endif
 
-#if defined(CONFIG_CF_DSPI)
 /* DSPI specific mode */
 #define SPI_MODE_MOD   0x0020
 #define SPI_DBLRATE0x0010
 
-static inline struct cf_spi_slave *to_cf_spi_slave(struct spi_slave *slave)
+#define MCF_DSPI_MAX_CTAR_REGS 8
+
+/* Default values */
+#define MCF_DSPI_DEFAULT_SCK_FREQ  1000
+#define MCF_DSPI_DEFAULT_MAX_CS4
+#define MCF_DSPI_DEFAULT_MODE  0
+
+#define MCF_DSPI_DEFAULT_CTAR  (DSPI_CTAR_TRSZ(7) | \
+   DSPI_CTAR_PCSSCK_1CLK | \
+   DSPI_CTAR_PASC(0) | \
+   DSPI_CTAR_PDT(0) | \
+   DSPI_CTAR_CSSCK(0) | \
+   DSPI_CTAR_ASC(0) | \
+   DSPI_CTAR_DT(1) | \
+   DSPI_CTAR_BR(6))
+
+#define setup_ctrl(ctrl, cs)   ((ctrl & 0xFF00) | ((1 << cs) << 16))
+
+static inline void cfspi_tx(struct coldfire_spi_priv *cfspi,
+   u32 ctrl, u16 data)
 {
-   return container_of(slave, struct cf_spi_slave, slave);
+   /*
+* Need to check fifo level here
+*/
+   while ((readl(&cfspi->regs->sr) & 0xF000) >= 0x4000)
+   ;
+
+   writel(ctrl | data, &cfspi->regs->tfr);
 }
 
-static void cfspi_init(void)
+static inline u16 cfspi_rx(struct coldfire_spi_priv *cfspi)
 {
-   volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-
-   cfspi_port_conf();  /* port configuration */
+   while ((readl(&cfspi->regs->sr) & 0x00F0) == 0)
+   ;
 
-   dspi->mcr = DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 |
-   DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 |
-   DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 |
-   DSPI_MCR_CRXF | DSPI_MCR_CTXF;
+   return readw(&cfspi->regs->rfr);
+}
 
-   /* Default setting in platform configuration */
-#ifdef CONFIG_SYS_DSPI_CTAR0
-   dspi->ctar[0] = CONFIG_SYS_DSPI_CTAR0;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR1
-   dspi->ctar[1] = CONFIG_SYS_DSPI_CTAR1;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR2
-   dspi->ctar[2] = CONFIG_SYS_DSPI_CTAR2;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR3
-   dspi->ctar[3] = CONFIG_SYS_DSPI_CTAR3;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR4
-   dspi->ctar[4] = CONFIG_SYS_DSPI_CTAR4;
+static int coldfire_spi_claim_bus(struct udevice *dev)
+{
+   struct udevice *bus = dev->parent;
+   struct coldfire_spi_priv *cfspi = dev_get_priv(bus);
+   struct dspi *dspi = cfspi->regs;
+#if defined(CONFIG_MCF5445x) || \
+   defined(CONFIG_MCF5441x) || defined(CONFIG_MCF5227x)
+   struct dm_spi_slave_platdata *slave_plat =
+   dev_get_parent_platdata(dev);
+   struct gpio *gpio = cfspi->gpio_regs;
 #endif
-#ifdef CONFIG_SYS_DSPI_CTAR5
-   dspi->ctar[5] = CONFIG_SYS_DSPI_CTAR5;
+
+   if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS)
+   return -1;
+
+   /* Clear FIFO and resume tr

[U-Boot] [PATCH v4 10/12] configs: remove CONFIG_SYS_DSPI_XX references

2018-12-16 Thread Angelo Dureghello

This patch removes CONFIG_SYS_DSPI_XX options from
include/configs "m68k" .h board files, since CTAR
registers are now set with default values in the cf_spi
driver initialization, and configurable by devicetree.

Note, these options cannot be totally removed from the
whitelist, since still used from boards using fsl_dspi.c
(mostly arm-based boards).

Reviewed-by: Simon Glass 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- new patch
Changes for v3:
- none
Changes for v4:
- none
---
 include/configs/M52277EVB.h | 11 ---
 include/configs/M54418TWR.h | 12 
 include/configs/M54451EVB.h | 12 
 include/configs/M54455EVB.h | 10 --
 include/configs/stmark2.h   | 11 ---
 5 files changed, 56 deletions(-)

diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index 83d774527a..b0e9a0f526 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -103,17 +103,6 @@
 /* DSPI and Serial Flash */
 #define CONFIG_CF_DSPI
 #define CONFIG_SYS_SBFHDR_SIZE 0x7
-#ifdef CONFIG_CMD_SPI
-#  define CONFIG_SYS_DSPI_CS2
-
-#  define CONFIG_SYS_DSPI_CTAR0(DSPI_CTAR_TRSZ(7) | \
-DSPI_CTAR_PCSSCK_1CLK | \
-DSPI_CTAR_PASC(0) | \
-DSPI_CTAR_PDT(0) | \
-DSPI_CTAR_CSSCK(0) | \
-DSPI_CTAR_ASC(0) | \
-DSPI_CTAR_DT(1))
-#endif
 
 /* Input, PCI, Flexbus, and VCO */
 #define CONFIG_EXTRA_CLOCK
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index 4b8ef38c0b..1426492c23 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -152,18 +152,6 @@
 #define CONFIG_CF_DSPI
 #define CONFIG_SERIAL_FLASH
 #define CONFIG_SYS_SBFHDR_SIZE 0x7
-#ifdef CONFIG_CMD_SPI
-
-#  define CONFIG_SYS_DSPI_CTAR0(DSPI_CTAR_TRSZ(7) | \
-DSPI_CTAR_PCSSCK_1CLK | \
-DSPI_CTAR_PASC(0) | \
-DSPI_CTAR_PDT(0) | \
-DSPI_CTAR_CSSCK(0) | \
-DSPI_CTAR_ASC(0) | \
-DSPI_CTAR_DT(1))
-#  define CONFIG_SYS_DSPI_CTAR1(CONFIG_SYS_DSPI_CTAR0)
-#  define CONFIG_SYS_DSPI_CTAR2(CONFIG_SYS_DSPI_CTAR0)
-#endif
 
 /* Input, PCI, Flexbus, and VCO */
 #define CONFIG_EXTRA_CLOCK
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 87cdbae1db..44fd8072fc 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -117,18 +117,6 @@
 #define CONFIG_CF_DSPI
 #define CONFIG_SERIAL_FLASH
 #define CONFIG_SYS_SBFHDR_SIZE 0x7
-#ifdef CONFIG_CMD_SPI
-
-#  define CONFIG_SYS_DSPI_CTAR0(DSPI_CTAR_TRSZ(7) | \
-DSPI_CTAR_PCSSCK_1CLK | \
-DSPI_CTAR_PASC(0) | \
-DSPI_CTAR_PDT(0) | \
-DSPI_CTAR_CSSCK(0) | \
-DSPI_CTAR_ASC(0) | \
-DSPI_CTAR_DT(1))
-#  define CONFIG_SYS_DSPI_CTAR1(CONFIG_SYS_DSPI_CTAR0)
-#  define CONFIG_SYS_DSPI_CTAR2(CONFIG_SYS_DSPI_CTAR0)
-#endif
 
 /* Input, PCI, Flexbus, and VCO */
 #define CONFIG_EXTRA_CLOCK
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index d41b7c4492..ea97188fe8 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -143,16 +143,6 @@
 /* DSPI and Serial Flash */
 #define CONFIG_CF_DSPI
 #define CONFIG_SYS_SBFHDR_SIZE 0x13
-#ifdef CONFIG_CMD_SPI
-
-#  define CONFIG_SYS_DSPI_CTAR0(DSPI_CTAR_TRSZ(7) | \
-DSPI_CTAR_PCSSCK_1CLK | \
-DSPI_CTAR_PASC(0) | \
-DSPI_CTAR_PDT(0) | \
-DSPI_CTAR_CSSCK(0) | \
-DSPI_CTAR_ASC(0) | \
-DSPI_CTAR_DT(1))
-#endif
 
 /* PCI */
 #ifdef CONFIG_CMD_PCI
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index f49e79c824..d16ed8f253 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -78,17 +78,6 @@
 
 #define CONFIG_SYS_SBFHDR_SIZE 0x7
 
-#define CONFIG_SYS_DSPI_CTAR0  (DSPI_CTAR_TRSZ(7) | \
-   DSPI_CTAR_PCSSCK_1CLK | \
-   DSPI_CTAR_PASC(0) | \
-   DSPI_CTAR_PDT(0) | \
-   DSPI_CTAR_CSSCK(0) | \
-   DSPI_CTAR_ASC(0) | \
-

[U-Boot] [PATCH v4 12/12] m68k: move dspi bus control functions into cf_spi.c driver

2018-12-16 Thread Angelo Dureghello

This patches move dspi bus-related operations into more
proper location, to avoid the driver to declares them as externs.

Signed-off-by: Angelo Dureghello 
---
Changes for v4:
- new patch
---
 arch/m68k/cpu/mcf5227x/cpu_init.c |  65 +++---
 arch/m68k/cpu/mcf5445x/cpu_init.c | 142 +++---
 2 files changed, 41 insertions(+), 166 deletions(-)

diff --git a/arch/m68k/cpu/mcf5227x/cpu_init.c 
b/arch/m68k/cpu/mcf5227x/cpu_init.c
index 0d6a484a45..3bbc42f508 100644
--- a/arch/m68k/cpu/mcf5227x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5227x/cpu_init.c
@@ -16,6 +16,15 @@
 #include 
 #include 
 
+void cfspi_port_conf(void)
+{
+   gpio_t *gpio = (gpio_t *)MMAP_GPIO;
+
+   out_8(&gpio->par_dspi,
+ GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
+ GPIO_PAR_DSPI_SCK_SCK);
+}
+
 /*
  * Breath some life into the CPU...
  *
@@ -93,6 +102,8 @@ void cpu_init_f(void)
 #endif
 
icache_enable();
+
+   cfspi_port_conf();
 }
 
 /*
@@ -137,57 +148,3 @@ void uart_port_conf(int port)
break;
}
 }
-
-#ifdef CONFIG_CF_DSPI
-void cfspi_port_conf(void)
-{
-   gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-   out_8(&gpio->par_dspi,
-   GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
-   GPIO_PAR_DSPI_SCK_SCK);
-}
-
-int cfspi_claim_bus(uint bus, uint cs)
-{
-   dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-   gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-   if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS)
-   return -1;
-
-   /* Clear FIFO and resume transfer */
-   clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
-
-   switch (cs) {
-   case 0:
-   clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK);
-   setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
-   break;
-   case 2:
-   clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
-   setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2);
-   break;
-   }
-
-   return 0;
-}
-
-void cfspi_release_bus(uint bus, uint cs)
-{
-   dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-   gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-   /* Clear FIFO */
-   clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
-
-   switch (cs) {
-   case 0:
-   clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
-   break;
-   case 2:
-   clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
-   break;
-   }
-}
-#endif
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c 
b/arch/m68k/cpu/mcf5445x/cpu_init.c
index 7632d9262c..8f4991c1cb 100644
--- a/arch/m68k/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -66,6 +66,32 @@ void init_fbcs(void)
 #endif
 }
 
+#ifdef CONFIG_CF_DSPI
+void cfspi_port_conf(void)
+{
+   gpio_t *gpio = (gpio_t *)MMAP_GPIO;
+
+#ifdef CONFIG_MCF5445x
+   out_8(&gpio->par_dspi,
+ GPIO_PAR_DSPI_SIN_SIN |
+ GPIO_PAR_DSPI_SOUT_SOUT |
+ GPIO_PAR_DSPI_SCK_SCK);
+#endif
+
+#ifdef CONFIG_MCF5441x
+   pm_t *pm = (pm_t *)MMAP_PM;
+
+   out_8(&gpio->par_dspi0,
+ GPIO_PAR_DSPI0_SIN_DSPI0SIN | GPIO_PAR_DSPI0_SOUT_DSPI0SOUT |
+ GPIO_PAR_DSPI0_SCK_DSPI0SCK);
+   out_8(&gpio->srcr_dspiow, 3);
+
+   /* DSPI0 */
+   out_8(&pm->pmcr0, 23);
+#endif
+}
+#endif
+
 /*
  * Breath some life into the CPU...
  *
@@ -204,6 +230,10 @@ void cpu_init_f(void)
GPIO_PAR_FBCTL_OE | GPIO_PAR_FBCTL_TA_TA |
GPIO_PAR_FBCTL_RW_RW | GPIO_PAR_FBCTL_TS_TS);
 
+#ifdef CONFIG_CF_SPI
+   cfspi_port_conf();
+#endif
+
 #ifdef CONFIG_SYS_FSL_I2C
out_be16(&gpio->par_feci2c,
GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA);
@@ -433,115 +463,3 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
 }
 #endif
 
-#ifdef CONFIG_CF_DSPI
-void cfspi_port_conf(void)
-{
-   gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-#ifdef CONFIG_MCF5445x
-   out_8(&gpio->par_dspi,
-   GPIO_PAR_DSPI_SIN_SIN |
-   GPIO_PAR_DSPI_SOUT_SOUT |
-   GPIO_PAR_DSPI_SCK_SCK);
-#endif
-
-#ifdef CONFIG_MCF5441x
-   pm_t *pm = (pm_t *) MMAP_PM;
-
-   out_8(&gpio->par_dspi0,
-   GPIO_PAR_DSPI0_SIN_DSPI0SIN | GPIO_PAR_DSPI0_SOUT_DSPI0SOUT |
-   GPIO_PAR_DSPI0_SCK_DSPI0SCK);
-   out_8(&gpio->srcr_dspiow, 3);
-
-   /* DSPI0 */
-   out_8(&pm->pmcr0, 23);
-#endif
-}
-
-int cfspi_claim_bus(uint bus, uint cs)
-{
-   dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-   gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-   if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS)
-   return -1;
-
-   /* Clear FIFO and resume transfer */
-   clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
-
-#ifdef CONFIG_MCF5445x
-   switch (cs) {
-   case 0:
-   clrbits_8(&gpio->par_dspi, G

[U-Boot] [PATCH v4 09/12] drivers: serial: mcfuart: add DT support

2018-12-16 Thread Angelo Dureghello

This patch adds devicetree support to the mcfuart.c driver
and removes non DM code.

Reviewed-by: Simon Glass 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- remove non DM code
Changes for v3:
- none
Changes for v4:
- none
---
 drivers/serial/Kconfig   |   8 +++
 drivers/serial/mcfuart.c | 106 +++
 2 files changed, 36 insertions(+), 78 deletions(-)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 6252dd8c4b..bf2e345964 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -530,6 +530,14 @@ config MVEBU_A3700_UART
  Choose this option to add support for UART driver on the Marvell
  Armada 3700 SoC. The base address is configured via DT.
 
+config MCFUART
+   bool "Freescale ColdFire UART support"
+help
+  Choose this option to add support for UART driver on the ColdFire
+  SoC's family. The serial communication channel provides a full-duplex
+  asynchronous/synchronous receiver and transmitter deriving an
+  operating frequency from the internal bus clock or an external clock.
+
 config MXC_UART
bool "IMX serial port support"
depends on MX5 || MX6
diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c
index 1371049de2..066e5a18d8 100644
--- a/drivers/serial/mcfuart.c
+++ b/drivers/serial/mcfuart.c
@@ -5,6 +5,9 @@
  *
  * Modified to add device model (DM) support
  * (C) Copyright 2015  Angelo Dureghello 
+ *
+ * Modified to add DM and fdt support, removed non DM code
+ * (C) Copyright 2018  Angelo Dureghello 
  */
 
 /*
@@ -78,83 +81,6 @@ static void mcf_serial_setbrg_common(uart_t *uart, int 
baudrate)
writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr);
 }
 
-#ifndef CONFIG_DM_SERIAL
-
-static int mcf_serial_init(void)
-{
-   uart_t *uart_base;
-   int port_idx;
-
-   uart_base = (uart_t *)CONFIG_SYS_UART_BASE;
-   port_idx = CONFIG_SYS_UART_PORT;
-
-   return mcf_serial_init_common(uart_base, port_idx, gd->baudrate);
-}
-
-static void mcf_serial_putc(const char c)
-{
-   uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE;
-
-   if (c == '\n')
-   serial_putc('\r');
-
-   /* Wait for last character to go. */
-   while (!(readb(&uart->usr) & UART_USR_TXRDY))
-   ;
-
-   writeb(c, &uart->utb);
-}
-
-static int mcf_serial_getc(void)
-{
-   uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE;
-
-   /* Wait for a character to arrive. */
-   while (!(readb(&uart->usr) & UART_USR_RXRDY))
-   ;
-
-   return readb(&uart->urb);
-}
-
-static void mcf_serial_setbrg(void)
-{
-   uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE;
-
-   mcf_serial_setbrg_common(uart, gd->baudrate);
-}
-
-static int mcf_serial_tstc(void)
-{
-   uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE;
-
-   return readb(&uart->usr) & UART_USR_RXRDY;
-}
-
-static struct serial_device mcf_serial_drv = {
-   .name   = "mcf_serial",
-   .start  = mcf_serial_init,
-   .stop   = NULL,
-   .setbrg = mcf_serial_setbrg,
-   .putc   = mcf_serial_putc,
-   .puts   = default_serial_puts,
-   .getc   = mcf_serial_getc,
-   .tstc   = mcf_serial_tstc,
-};
-
-void mcf_serial_initialize(void)
-{
-   serial_register(&mcf_serial_drv);
-}
-
-__weak struct serial_device *default_serial_console(void)
-{
-   return &mcf_serial_drv;
-}
-
-#endif
-
-#ifdef CONFIG_DM_SERIAL
-
 static int coldfire_serial_probe(struct udevice *dev)
 {
struct coldfire_serial_platdata *plat = dev->platdata;
@@ -212,6 +138,23 @@ static int coldfire_serial_pending(struct udevice *dev, 
bool input)
return 0;
 }
 
+static int coldfire_ofdata_to_platdata(struct udevice *dev)
+{
+   struct coldfire_serial_platdata *plat = dev_get_platdata(dev);
+   fdt_addr_t addr_base;
+
+   addr_base = devfdt_get_addr(dev);
+   if (addr_base == FDT_ADDR_T_NONE)
+   return -ENODEV;
+
+   plat->base = (uint32_t)addr_base;
+
+   plat->port = dev->seq;
+   plat->baudrate = gd->baudrate;
+
+   return 0;
+}
+
 static const struct dm_serial_ops coldfire_serial_ops = {
.putc = coldfire_serial_putc,
.pending = coldfire_serial_pending,
@@ -219,11 +162,18 @@ static const struct dm_serial_ops coldfire_serial_ops = {
.setbrg = coldfire_serial_setbrg,
 };
 
+static const struct udevice_id coldfire_serial_ids[] = {
+   { .compatible = "fsl,mcf-uart" },
+   { }
+};
+
 U_BOOT_DRIVER(serial_coldfire) = {
.name = "serial_coldfire",
.id = UCLASS_SERIAL,
+   .of_match = coldfire_serial_ids,
+   .ofdata_to_platdata = coldfire_ofdata_to_platdata,
+   .platdata_auto_alloc_size = sizeof(struct coldfire_serial_platdata),
.probe = coldfire_serial_probe,
.ops = &coldfire_serial_ops,
.flags = DM_FLAG_PRE_RELOC,
 };
-#endif
-- 
2.19.1

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[U-Boot] Please pull u-boot-rockchip

2018-12-16 Thread Philipp Tomsich

Tom,

Here’s a few minor fixes for RC2.
I am still waiting for a final revision on a somewhat involved bug-fix for our 
RK3399-Q7,
which is held up by my colleagues also introducing changes to pinctrl to ensure 
a PWM
regulator can be auto-set.

The all-green Travis report for these changes is at
https://travis-ci.org/ptomsich/u-boot-rockchip/builds/468541679

Thanks,
Philipp.


The following changes since commit 8fc26fce41592175ae004514e431e68a9dd60671:

  Merge tag 'dm-pull-14dec18' of git://git.denx.de/u-boot-dm (2018-12-14 
14:18:47 -0500)

are available in the git repository at:

  git://git.denx.de/u-boot-rockchip.git tags/for-master-20181216

for you to fetch changes up to e11ef3d26eff8d14a11f89b9bdc20471b425d2d7:

  ARM: rockchip: Add rv1108-elgin-r1 board support (2018-12-16 01:30:11 +0100)


Improvements and fixes or u-boot-rockchip:
- new board: adds rv1108-elgin-r1 board support
- rk3288-evb: dts: remove 'vmmc' from emmc node
- rk3399-puma: dts: remove obsolete DTS node 'vcc5v0_host'


Christoph Muellner (1):
  rockchip: rk3399-puma: Remove obsolete DTS node 'vcc5v0_host'.

Kever Yang (1):
  rockchip: rk3288-evb: dts: remove 'vmmc' from emmc node

Otavio Salvador (1):
  ARM: rockchip: Add rv1108-elgin-r1 board support

 arch/arm/dts/Makefile   |  1 +
 arch/arm/dts/rk3288-evb.dtsi|  2 -
 arch/arm/dts/rk3399-puma.dtsi   | 12 +-
 arch/arm/dts/rv1108-elgin-r1.dts| 48 +
 arch/arm/mach-rockchip/rv1108/Kconfig   |  6 +++
 board/elgin/elgin_rv1108/Kconfig| 15 +++
 board/elgin/elgin_rv1108/MAINTAINERS|  6 +++
 board/elgin/elgin_rv1108/Makefile   |  7 
 board/elgin/elgin_rv1108/elgin_rv1108.c | 74 +
 configs/elgin-rv1108_defconfig  | 58 ++
 include/configs/elgin_rv1108.h  | 13 ++
 11 files changed, 230 insertions(+), 12 deletions(-)
 create mode 100644 arch/arm/dts/rv1108-elgin-r1.dts
 create mode 100644 board/elgin/elgin_rv1108/Kconfig
 create mode 100644 board/elgin/elgin_rv1108/MAINTAINERS
 create mode 100644 board/elgin/elgin_rv1108/Makefile
 create mode 100644 board/elgin/elgin_rv1108/elgin_rv1108.c
 create mode 100644 configs/elgin-rv1108_defconfig
 create mode 100644 include/configs/elgin_rv1108.h

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Re: [U-Boot] [U-Boot, v3] rockchip: rk3288-evb: dts: remove 'vmmc' from emmc node

2018-12-16 Thread Philipp Tomsich

> This is a sync with kernel mainline dts.
> 
> The U-Boot eMMC does not need to care about the power for Rockchip
> SoCs, because if the board is using eMMC, the power will default on
> (for bootrom), so the 'vmmc', 'vqmmc' is only useful for SD in U-Boot.
> 
> Signed-off-by: Kever Yang 
> Reviewed-by: Philipp Tomsich 
> ---
> 
> Changes in v3:
> - update commit message base on comments from Philipp and Tom.
> 
> Changes in v2:
> - only update for rk3288-evb, remove change for other boards.
> 
>  arch/arm/dts/rk3288-evb.dtsi | 2 --
>  1 file changed, 2 deletions(-)
> 

Applied to u-boot-rockchip, thanks!
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Re: [U-Boot] ARM: rockchip: Add rv1108-elgin-r1 board support

2018-12-16 Thread Philipp Tomsich

> Add the initial support for Elgin R1 board, which is based on the
> RV1108 SoC and has the following features currently supported in
> U-Boot:
> 
> - UART
> - eMMC
> - USB
> 
> Signed-off-by: Otavio Salvador 
> Reviewed-by: Philipp Tomsich 
> ---
> 
>  arch/arm/dts/Makefile   |  1 +
>  arch/arm/dts/rv1108-elgin-r1.dts| 48 
>  arch/arm/mach-rockchip/rv1108/Kconfig   |  6 ++
>  board/elgin/elgin_rv1108/Kconfig| 15 +
>  board/elgin/elgin_rv1108/MAINTAINERS|  6 ++
>  board/elgin/elgin_rv1108/Makefile   |  7 +++
>  board/elgin/elgin_rv1108/elgin_rv1108.c | 74 +
>  configs/elgin-rv1108_defconfig  | 58 +++
>  include/configs/elgin_rv1108.h  | 13 +
>  9 files changed, 228 insertions(+)
>  create mode 100644 arch/arm/dts/rv1108-elgin-r1.dts
>  create mode 100644 board/elgin/elgin_rv1108/Kconfig
>  create mode 100644 board/elgin/elgin_rv1108/MAINTAINERS
>  create mode 100644 board/elgin/elgin_rv1108/Makefile
>  create mode 100644 board/elgin/elgin_rv1108/elgin_rv1108.c
>  create mode 100644 configs/elgin-rv1108_defconfig
>  create mode 100644 include/configs/elgin_rv1108.h
> 

Applied to u-boot-rockchip, thanks!
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Re: [U-Boot] [U-Boot, v1] rockchip: rk3399-puma: Remove obsolete DTS node 'vcc5v0_host'.

2018-12-16 Thread Philipp Tomsich

> vcc5v0_host and usbhub_enable share gpio4 RK_PA3,
> which is a problem during probing (the second probe
> will trigger a -EBUSY, when trying to get the gpio handle).
> 
> An analysis of the situation shows, that both regulators
> are actually describing the same supply.
> 
> This patch removes the (currenlty not successful probing)
> regulator vcc5v0_host from the DTS and adds the pinctrl-*
> setting to usbhub_enable.
> 
> Signed-off-by: Christoph Muellner 
> Reviewed-by: Phiilipp Tomsich 
> ---
> 
>  arch/arm/dts/rk3399-puma.dtsi | 12 ++--
>  1 file changed, 2 insertions(+), 10 deletions(-)
> 

Applied to u-boot-rockchip, thanks!
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[U-Boot] [PATCH v4 11/12] m68k: add OF control support to m68k

2018-12-16 Thread Angelo Dureghello

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello 
---
Changes for v4:
- new patch
---
 arch/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/Kconfig b/arch/Kconfig
index 35e2712fce..a8393b86e9 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -28,6 +28,7 @@ config M68K
select HAVE_PRIVATE_LIBGCC
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
+   select SUPPORT_OF_CONTROL
 
 config MICROBLAZE
bool "MicroBlaze architecture"
-- 
2.19.1

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[U-Boot] [PATCH v4 04/12] m68k: enabling long jumps on mcf54x5 SoCs

2018-12-16 Thread Angelo Dureghello

Growing of binary size asks for long assembly jumps.

Reviewed-by: Simon Glass 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- new patch
Changes for v3:
- none
Changes for v4:
- none
---
 arch/m68k/cpu/mcf547x_8x/start.S | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/m68k/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S
index 7cb5db7ff0..4dd57bf39c 100644
--- a/arch/m68k/cpu/mcf547x_8x/start.S
+++ b/arch/m68k/cpu/mcf547x_8x/start.S
@@ -131,7 +131,8 @@ _start:
 * then (and always) gd struct space will be reserved
 */
move.l  %sp, -(%sp)
-   bsr board_init_f_alloc_reserve
+   move.l  #board_init_f_alloc_reserve, %a1
+   jsr (%a1)
 
/* update stack and frame-pointers */
move.l  %d0, %sp
@@ -139,7 +140,8 @@ _start:
 
/* initialize reserved area */
move.l  %d0, -(%sp)
-   bsr board_init_f_init_reserve
+   move.l  #board_init_f_init_reserve, %a1
+   jsr (%a1)
 
/* run low-level CPU init code (from flash) */
jbsrcpu_init_f
-- 
2.19.1

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[U-Boot] [PATCH v4 06/12] drivers: spi: cf_spi: add Kconfig option

2018-12-16 Thread Angelo Dureghello

This patch adds cf_spi DM Kconfig option.

Reviewed-by: Simon Glass 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- new patch
Changes for v3:
- re-put SOFT_SPI in place, options are out of alphabetical order
Changes for v4:
- none
---
 drivers/spi/Kconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index a7bb5b35c2..9057abcd32 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -87,6 +87,12 @@ config CADENCE_QSPI
  used to access the SPI NOR flash on platforms embedding this
  Cadence IP core.
 
+config CF_SPI
+bool "ColdFire SPI driver"
+help
+  Enable the ColdFire SPI driver. This driver can be used on
+  some m68k SoCs.
+
 config DESIGNWARE_SPI
bool "Designware SPI driver"
help
-- 
2.19.1

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[U-Boot] [PATCH v4 03/12] m68k: add initial dts files for all m68k boards

2018-12-16 Thread Angelo Dureghello

This patch adds basic dts files for all the m68k boards.

Reviewed-by: Simon Glass 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- new patch
Changes for v3:
- none
Changes for v4:
- none
---
 arch/m68k/dts/M5208EVBE.dts   | 22 +++
 arch/m68k/dts/M52277EVB.dts   | 25 
 arch/m68k/dts/M52277EVB_stmicro.dts   | 22 +++
 arch/m68k/dts/M5235EVB.dts| 22 +++
 arch/m68k/dts/M5235EVB_Flash32.dts| 22 +++
 arch/m68k/dts/M5249EVB.dts| 22 +++
 arch/m68k/dts/M5253DEMO.dts   | 22 +++
 arch/m68k/dts/M5272C3.dts | 22 +++
 arch/m68k/dts/M5275EVB.dts| 22 +++
 arch/m68k/dts/M5282EVB.dts| 22 +++
 arch/m68k/dts/M53017EVB.dts   | 22 +++
 arch/m68k/dts/M5329AFEE.dts   | 22 +++
 arch/m68k/dts/M5329BFEE.dts   | 22 +++
 arch/m68k/dts/M5373EVB.dts| 22 +++
 arch/m68k/dts/M54418TWR.dts   | 25 
 arch/m68k/dts/M54418TWR_nand_mii.dts  | 25 
 arch/m68k/dts/M54418TWR_nand_rmii.dts | 25 
 arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts | 25 
 arch/m68k/dts/M54418TWR_serial_mii.dts| 25 
 arch/m68k/dts/M54418TWR_serial_rmii.dts   | 25 
 arch/m68k/dts/M54451EVB.dts   | 25 
 arch/m68k/dts/M54451EVB_stmicro.dts   | 25 
 arch/m68k/dts/M54455EVB.dts   | 25 
 arch/m68k/dts/M54455EVB_a66.dts   | 25 
 arch/m68k/dts/M54455EVB_i66.dts   | 25 
 arch/m68k/dts/M54455EVB_intel.dts | 26 +
 arch/m68k/dts/M54455EVB_stm33.dts | 25 
 arch/m68k/dts/M5475AFE.dts| 13 +
 arch/m68k/dts/M5475BFE.dts| 13 +
 arch/m68k/dts/M5475CFE.dts| 13 +
 arch/m68k/dts/M5475DFE.dts| 13 +
 arch/m68k/dts/M5475EFE.dts| 13 +
 arch/m68k/dts/M5475FFE.dts| 13 +
 arch/m68k/dts/M5475GFE.dts| 13 +
 arch/m68k/dts/M5485AFE.dts| 17 ++
 arch/m68k/dts/M5485BFE.dts| 17 ++
 arch/m68k/dts/M5485CFE.dts| 17 ++
 arch/m68k/dts/M5485DFE.dts| 17 ++
 arch/m68k/dts/M5485EFE.dts| 17 ++
 arch/m68k/dts/M5485FFE.dts| 17 ++
 arch/m68k/dts/M5485GFE.dts| 17 ++
 arch/m68k/dts/M5485HFE.dts| 17 ++
 arch/m68k/dts/Makefile| 58 +++
 arch/m68k/dts/amcore.dts  | 22 +++
 arch/m68k/dts/astro_mcf5373l.dts  | 22 +++
 arch/m68k/dts/cobra5272.dts   | 22 +++
 arch/m68k/dts/eb_cpu5282.dts  | 22 +++
 arch/m68k/dts/eb_cpu5282_internal.dts | 22 +++
 arch/m68k/dts/stmark2.dts | 34 +++
 49 files changed, 1066 insertions(+)
 create mode 100644 arch/m68k/dts/M5208EVBE.dts
 create mode 100644 arch/m68k/dts/M52277EVB.dts
 create mode 100644 arch/m68k/dts/M52277EVB_stmicro.dts
 create mode 100644 arch/m68k/dts/M5235EVB.dts
 create mode 100644 arch/m68k/dts/M5235EVB_Flash32.dts
 create mode 100644 arch/m68k/dts/M5249EVB.dts
 create mode 100644 arch/m68k/dts/M5253DEMO.dts
 create mode 100644 arch/m68k/dts/M5272C3.dts
 create mode 100644 arch/m68k/dts/M5275EVB.dts
 create mode 100644 arch/m68k/dts/M5282EVB.dts
 create mode 100644 arch/m68k/dts/M53017EVB.dts
 create mode 100644 arch/m68k/dts/M5329AFEE.dts
 create mode 100644 arch/m68k/dts/M5329BFEE.dts
 create mode 100644 arch/m68k/dts/M5373EVB.dts
 create mode 100644 arch/m68k/dts/M54418TWR.dts
 create mode 100644 arch/m68k/dts/M54418TWR_nand_mii.dts
 create mode 100644 arch/m68k/dts/M54418TWR_nand_rmii.dts
 create mode 100644 arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts
 create mode 100644 arch/m68k/dts/M54418TWR_serial_mii.dts
 create mode 100644 arch/m68k/dts/M54418TWR_serial_rmii.dts
 create mode 100644 arch/m68k/dts/M54451EVB.dts
 create mode 100644 arch/m68k/dts/M54451EVB_stmicro.dts
 create mode 100644 arch/m68k/dts/M54455EVB.dts
 create mode 100644 arch/m68k/dts/M54455EVB_a66.dts
 create mode 100644 arch/m68k/dts/M54455EVB_i66.dts
 create mode 100644 arch/m68k/dts/M54455EVB_intel.dts
 create mode 100644 arch/m68k/dts/M54455EVB_stm33.dts
 create mode 100644 arch/m68k/dts/M5475AFE.dts
 create mode 100644 arch/m68k/dts/M5475BFE.dts
 create mode 100644 arch/m68k/dts/M5475CFE.dts
 create mode 100644 arch/m68k/dts/M5475DFE.dts
 create mode 100644 arch/m68k/dts/M5475EFE.dts
 create mode 100644 arch/m68k/dts/M5475FFE.dts
 create mode 100644 arch/m68k/dts/M5475GFE.dts
 create mode 100644 arch/m68k/dts/M5485AFE.dts
 create mode 100644 arch/m68k/dts/M5485BFE.d

[U-Boot] [PATCH v4 02/12] m68k: architecture changes to support fdt

2018-12-16 Thread Angelo Dureghello

This patch adds fdt support to the m68k architecture.

Reviewed-by: Simon Glass 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- add OF_CONTROL, DM and DM_SERIAL as default config options
  for all cpu families
Changes for v3:
- none
Changes for v4:
- bisectability, moved SUPPORT_OF_CONTROL to next patch
---
 arch/m68k/Kconfig| 33 +
 arch/m68k/cpu/u-boot.lds |  6 --
 2 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 1f6df5c870..fef108105b 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -6,36 +6,69 @@ config SYS_ARCH
 
 # processor family
 config MCF520x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF52x2
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF523x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF530x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF5301x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF532x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF537x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF5441x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF5445x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF5227x
+   select OF_CONTROL
+   select DM
+select DM_SERIAL
bool
 
 config MCF547x_8x
+   select OF_CONTROL
+select DM
+select DM_SERIAL
bool
 
 # processor type
diff --git a/arch/m68k/cpu/u-boot.lds b/arch/m68k/cpu/u-boot.lds
index 96451208e5..64cf2ff5ef 100644
--- a/arch/m68k/cpu/u-boot.lds
+++ b/arch/m68k/cpu/u-boot.lds
@@ -68,13 +68,15 @@ SECTIONS
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
 
-   . = ALIGN(256);
+   . = ALIGN(4);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
-   . = ALIGN(256);
+   . = ALIGN(4);
__init_end = .;
 
+   _end = .;
+
__bss_start = .;
.bss (NOLOAD)   :
{
-- 
2.19.1

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[U-Boot] [PATCH v4 01/12] m68k: add basic set of devicetrees

2018-12-16 Thread Angelo Dureghello

This patch adds a basic group of devicetrees, one for each
cpu family, including actually just uart and dspi devices,
since these are the drivers supporting devicetree (support
added in this patch-set).

Acked-by: Jagan Teki 
Signed-off-by: Angelo Dureghello 
---
Changes for v2:
- add mcf54xx.dtsi and mcf537x.dtsi
Changes for v3:
- none
Changes for v4:
- none
---
 arch/m68k/dts/mcf5208.dtsi| 36 
 arch/m68k/dts/mcf5227x.dtsi   | 48 ++
 arch/m68k/dts/mcf523x.dtsi| 44 ++
 arch/m68k/dts/mcf5249.dtsi| 38 
 arch/m68k/dts/mcf5253.dtsi| 44 ++
 arch/m68k/dts/mcf5271.dtsi| 44 ++
 arch/m68k/dts/mcf5272.dtsi| 38 
 arch/m68k/dts/mcf5275.dtsi| 44 ++
 arch/m68k/dts/mcf5282.dtsi| 44 ++
 arch/m68k/dts/mcf5301x.dtsi   | 48 ++
 arch/m68k/dts/mcf5307.dtsi| 39 +
 arch/m68k/dts/mcf5329.dtsi| 36 
 arch/m68k/dts/mcf537x.dtsi| 36 
 arch/m68k/dts/mcf5441x.dtsi   | 87 +++
 arch/m68k/dts/mcf5445x.dtsi   | 48 ++
 arch/m68k/dts/mcf54xx.dtsi| 40 +
 doc/device-tree-bindings/serial/mcf-uart.txt  | 19 
 doc/device-tree-bindings/spi/spi-mcf-dspi.txt | 30 +++
 18 files changed, 763 insertions(+)
 create mode 100644 arch/m68k/dts/mcf5208.dtsi
 create mode 100644 arch/m68k/dts/mcf5227x.dtsi
 create mode 100644 arch/m68k/dts/mcf523x.dtsi
 create mode 100644 arch/m68k/dts/mcf5249.dtsi
 create mode 100644 arch/m68k/dts/mcf5253.dtsi
 create mode 100644 arch/m68k/dts/mcf5271.dtsi
 create mode 100644 arch/m68k/dts/mcf5272.dtsi
 create mode 100644 arch/m68k/dts/mcf5275.dtsi
 create mode 100644 arch/m68k/dts/mcf5282.dtsi
 create mode 100644 arch/m68k/dts/mcf5301x.dtsi
 create mode 100644 arch/m68k/dts/mcf5307.dtsi
 create mode 100644 arch/m68k/dts/mcf5329.dtsi
 create mode 100644 arch/m68k/dts/mcf537x.dtsi
 create mode 100644 arch/m68k/dts/mcf5441x.dtsi
 create mode 100644 arch/m68k/dts/mcf5445x.dtsi
 create mode 100644 arch/m68k/dts/mcf54xx.dtsi
 create mode 100644 doc/device-tree-bindings/serial/mcf-uart.txt
 create mode 100644 doc/device-tree-bindings/spi/spi-mcf-dspi.txt

diff --git a/arch/m68k/dts/mcf5208.dtsi b/arch/m68k/dts/mcf5208.dtsi
new file mode 100644
index 00..558d8bf41a
--- /dev/null
+++ b/arch/m68k/dts/mcf5208.dtsi
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Angelo Dureghello 
+ */
+
+/ {
+   compatible = "fsl,mcf5208";
+
+   aliases {
+   serial0 = &uart0;
+   };
+
+   soc {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   uart0: uart@fc06 {
+   compatible = "fsl,mcf-uart";
+   reg = <0xfc06 0x40>;
+   status = "disabled";
+   };
+
+   uart1: uart@fc064000 {
+   compatible = "fsl,mcf-uart";
+   reg = <0xfc064000 0x40>;
+   status = "disabled";
+   };
+
+   uart2: uart@fc068000 {
+   compatible = "fsl,mcf-uart";
+   reg = <0xfc068000 0x40>;
+   status = "disabled";
+   };
+   };
+};
diff --git a/arch/m68k/dts/mcf5227x.dtsi b/arch/m68k/dts/mcf5227x.dtsi
new file mode 100644
index 00..8c95edddb6
--- /dev/null
+++ b/arch/m68k/dts/mcf5227x.dtsi
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Angelo Dureghello 
+ */
+
+/ {
+   compatible = "fsl,mcf5227x";
+
+   aliases {
+   serial0 = &uart0;
+   spi0 = &dspi0;
+   };
+
+   soc {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   uart0: uart@fc06 {
+   compatible = "fsl,mcf-uart";
+   reg = <0xfc06 0x40>;
+   status = "disabled";
+   };
+
+   uart1: uart@fc064000 {
+   compatible = "fsl,mcf-uart";
+   reg = <0xfc064000 0x40>;
+   status = "disabled";
+   };
+
+   uart2: uart@fc068000 {
+   compatible = "fsl,mcf-uart";
+   reg = <0xfc068000 0x40>;
+   status = "disabled";
+   };
+
+   dspi0: dspi@fc05c000 {
+   compatible = "fsl,mcf-dspi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0xfc05c000 0x100>;
+   spi-max-frequ

Re: [U-Boot] [PATCH 1/1] arm: sunxi: Add NULL pointer check

2018-12-16 Thread André Przywara

On 05/12/2018 15:46, Maxime Ripard wrote:

Hi,

> On Wed, Dec 05, 2018 at 02:27:57PM +0200, Stefan Mavrodiev wrote:
>> Current driver doesn't check if the destination pointer is NULL.
>> This cause the data from the FIFO to be stored inside the internal
>> SDRAM ( address 0 ).
>>
>> The patch add simple check if the destination pointer is NULL.
>>
>> Signed-off-by: Stefan Mavrodiev 
>> ---
>>  drivers/spi/sun4i_spi.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c
>> index b86b5a00ad..38cc743c61 100644
>> --- a/drivers/spi/sun4i_spi.c
>> +++ b/drivers/spi/sun4i_spi.c
>> @@ -129,7 +129,8 @@ static inline void sun4i_spi_drain_fifo(struct 
>> sun4i_spi_priv *priv, int len)
>>  
>>  while (len--) {
>>  byte = readb(&priv->regs->rxdata);
>> -*priv->rx_buf++ = byte;
>> +if (priv->rx_buf)
>> +*priv->rx_buf++ = byte;
> 
> It seems pretty inefficient to test the pointer at each access, it
> would be better to check it once before starting the transfer.

I appreciate the intention to avoid bloat and the attention to detail, but:

This check boils down to exactly one 16-bit instruction:
10c:   b11a cbz r2, 116 
- which only accesses a register
- inside a loop with does an MMIO(!) read from a device
- handling transfers from a serial device transferring 100s of KB/s
- in a system which's sole purpose is to read data on a single core
- in U-Boot ;-)

So the "performance impact" of this check is probably totally negligible.

There are quite some spi_xfer() calls with explicit NULL arguments, for
instance when we just want to transfer something.

So I wonder if we just want to take this patch, since it fixes a memory
corruption issue, plus we have a similar check in the TX path.

Cheers,
Andre.
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[U-Boot] [PATCH v2 1/1] efi_loader: efi_guid_t must be 64-bit aligned

2018-12-16 Thread Heinrich Schuchardt

The UEFI Specification Version 2.7 Errata A defines:

"EFI_GUID
128-bit buffer containing a unique identifier value.
Unless otherwise specified, aligned on a 64-bit boundary."

Before this patch efi_guid_t was 8-bit aligned.

Signed-off-by: Heinrich Schuchardt 
Acked-by: Ard Biesheuvel 
---
v2
remove superfluous white space
---
 include/efi.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/efi.h b/include/efi.h
index b5e2c64f38..3018c61b37 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -49,7 +49,7 @@ struct efi_device_path;
 
 typedef struct {
u8 b[16];
-} efi_guid_t;
+} efi_guid_t __attribute__((aligned(8)));
 
 #define EFI_BITS_PER_LONG  (sizeof(long) * 8)
 
-- 
2.19.2

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Re: [U-Boot] [PATCH 1/1] efi_loader: efi_guid_t must be 64-bit aligned

2018-12-16 Thread Ard Biesheuvel

On Sat, 15 Dec 2018 at 22:40, Heinrich Schuchardt  wrote:
>
> The UEFI Specification Version 2.7 Errata A defines:
>
> "EFI_GUID
> 128-bit buffer containing a unique identifier value.
> Unless otherwise specified, aligned on a 64-bit boundary."
>
> Before this patch efi_guid_t was 8-bit aligned.
>
> Signed-off-by: Heinrich Schuchardt 

Acked-by: Ard Biesheuvel 

> ---
>  include/efi.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/efi.h b/include/efi.h
> index b5e2c64f38b..3018c61b373 100644
> --- a/include/efi.h
> +++ b/include/efi.h
> @@ -49,7 +49,7 @@ struct efi_device_path;
>
>  typedef struct {
> u8 b[16];
> -} efi_guid_t;
> +} efi_guid_t __attribute__ ((aligned (8)));
>
>  #define EFI_BITS_PER_LONG  (sizeof(long) * 8)
>
> --
> 2.19.2
>
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Re: [U-Boot] [PATCH v4 6/7] MSCC: add board support for the Luton based evaluation board

2018-12-16 Thread Gregory CLEMENT

Hi Daniel,
 
 On sam., déc. 15 2018, Daniel Schwierzeck  wrote:

> Am 14.12.18 um 16:16 schrieb Gregory CLEMENT:
>> Adding the support for the Luton boards PCB91 which share common code with
>> the Ocelots boards, including board code, device tree and configuration.
>> 
>> Signed-off-by: Gregory CLEMENT 
>> ---
>>  MAINTAINERS|  1 +
>>  arch/mips/dts/luton_pcb091.dts | 36 ++
>>  arch/mips/dts/mscc,luton.dtsi  | 87 ++
>>  arch/mips/mach-mscc/Kconfig|  2 +
>>  board/mscc/luton/Kconfig   | 14 ++
>>  board/mscc/luton/Makefile  |  3 ++
>>  board/mscc/luton/luton.c   | 28 +++
>>  configs/mscc_luton_defconfig   | 66 ++
>>  8 files changed, 237 insertions(+)
>>  create mode 100644 arch/mips/dts/luton_pcb091.dts
>>  create mode 100644 arch/mips/dts/mscc,luton.dtsi
>>  create mode 100644 board/mscc/luton/Kconfig
>>  create mode 100644 board/mscc/luton/Makefile
>>  create mode 100644 board/mscc/luton/luton.c
>>  create mode 100644 configs/mscc_luton_defconfig
>> 
>
>> diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig
>> new file mode 100644
>> index 00..47fe12b6ee
>> --- /dev/null
>> +++ b/configs/mscc_luton_defconfig
>> @@ -0,0 +1,66 @@
>> +CONFIG_MIPS=y
>> +CONFIG_SYS_TEXT_BASE=0x4000
>> +CONFIG_SYS_MALLOC_F_LEN=0x2000
>> +CONFIG_DEBUG_UART_BOARD_INIT=y
>> +CONFIG_DEBUG_UART_BASE=0x7010
>> +CONFIG_DEBUG_UART_CLOCK=20833
>> +CONFIG_ARCH_MSCC=y
>> +CONFIG_TARGET_LUTON_PCB091=y
>> +CONFIG_DDRTYPE_MT47H128M8HQ=y
>> +CONFIG_SYS_LITTLE_ENDIAN=y
>> +CONFIG_MIPS_BOOT_FDT=y
>> +CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091"
>> +CONFIG_DEBUG_UART=y
>> +CONFIG_FIT=y
>> +CONFIG_BOOTDELAY=3
>> +CONFIG_USE_BOOTARGS=y
>> +CONFIG_BOOTARGS="console=ttyS0,115200"
>> +CONFIG_LOGLEVEL=7
>> +CONFIG_DISPLAY_CPUINFO=y
>> +CONFIG_SYS_PROMPT="pcb091 # "
>> +# CONFIG_CMD_BDI is not set
>> +# CONFIG_CMD_CONSOLE is not set
>> +# CONFIG_CMD_ELF is not set
>> +# CONFIG_CMD_EXPORTENV is not set
>> +# CONFIG_CMD_IMPORTENV is not set
>> +# CONFIG_CMD_CRC32 is not set
>> +CONFIG_CMD_MD5SUM=y
>> +CONFIG_CMD_MEMINFO=y
>> +CONFIG_CMD_MEMTEST=y
>> +# CONFIG_CMD_FLASH is not set
>> +CONFIG_CMD_GPIO=y
>> +CONFIG_CMD_SF=y
>> +CONFIG_CMD_SPI=y
>> +CONFIG_CMD_DHCP=y
>> +# CONFIG_NET_TFTP_VARS is not set
>> +# CONFIG_CMD_NFS is not set
>> +CONFIG_CMD_PING=y
>> +CONFIG_CMD_MTDPARTS=y
>> +CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
>> +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:512k(UBoot),256k(Env),256k(conf),6m@1m(linux)"
>> +# CONFIG_ISO_PARTITION is not set
>> +CONFIG_OF_EMBED=y
>
> this gives now a build warning
>
> = WARNING ==
> CONFIG_OF_EMBED is enabled. This option should only
> be used for debugging purposes. Please use
> CONFIG_OF_SEPARATE for boards in mainline.
> See doc/README.fdt-control for more info.
> 

I did not get this warning. For now I base my series on v2018.11,
should I base it on v2019.01-rc1 (i didn't realized it was already
released) ?

>
>
> Shall I change it when applying or do you want to test it first and send
> a follow-up patch?

I'd like to test it to be sure it continue to work.

Thanks,

Gregory

>
>> +CONFIG_ENV_IS_IN_SPI_FLASH=y
>> +CONFIG_NET_RANDOM_ETHADDR=y
>> +CONFIG_CLK=y
>> +CONFIG_DM_GPIO=y
>> +CONFIG_DM_SPI_FLASH=y
>> +CONFIG_SPI_FLASH=y
>> +CONFIG_SPI_FLASH_BAR=y
>> +CONFIG_SPI_FLASH_GIGADEVICE=y
>> +CONFIG_SPI_FLASH_MACRONIX=y
>> +CONFIG_SPI_FLASH_SPANSION=y
>> +CONFIG_SPI_FLASH_STMICRO=y
>> +CONFIG_SPI_FLASH_WINBOND=y
>> +CONFIG_SPI_FLASH_MTD=y
>> +CONFIG_DM_ETH=y
>> +CONFIG_PINCTRL=y
>> +CONFIG_PINCONF=y
>> +CONFIG_DM_SERIAL=y
>> +CONFIG_DEBUG_UART_SHIFT=2
>> +CONFIG_SYS_NS16550=y
>> +CONFIG_SPI=y
>> +CONFIG_DM_SPI=y
>> +CONFIG_SOFT_SPI=y
>> +CONFIG_LZMA=y
>> +CONFIG_XZ=y
>> 
>
> -- 
> - Daniel

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
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