Re: [U-Boot] [PATCH v2] video: Armada XP: Move driver to DM_VIDEO
On Wed, 30 Jan 2019 08:54:11 +0100 Stefan Roese s...@denx.de wrote: > This patch moves the Armada XP video / LCD driver to DM_VIDEO. With this > move, the legacy interface board_video_init() is removed from the > theadorable board code (only user of this video driver). The support > via DT will be added in a separate patch. > > This patch also enables DM_VIDEO for the theadorable board, as this is > needed to not break git bisect'ability. > > Signed-off-by: Stefan Roese > Reviewed-by: Anatolij Gustschin Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2] video: bmp: Add support for 24bpp BMP files on 16bpp displays
On Wed, 30 Jan 2019 08:54:12 +0100 Stefan Roese s...@denx.de wrote: > This patch adds support to load 24bpp BMP files on 16bpp displays. This > will be used by the theadorable board. The "old" bmp command did support > this operartion mode and to not break compatibility with the move to > DM_VIDEO, we need to add this support to the "new" bmp code. > > Signed-off-by: Stefan Roese > Reviewed-by: Anatolij Gustschin Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2] arm: mvebu: theadorable: Enable video / LCD support with the new DM driver
On Wed, 30 Jan 2019 08:54:13 +0100 Stefan Roese s...@denx.de wrote: > With the new DM_VIDEO support in the Armada XP LCD driver, this patch > adds the needed DT node for the LCD controller to the theadorable dts > file. This DT property is not added to the Armada XP dtsi files, as this > LCD feature is pretty unusual for this SoC and I personally know of no > other board that uses this controller. > > This patch also enables CONFIG_BMP_16BPP/24BPP/32BPP, as the "old" bmp > command supported these BMP files. > > Signed-off-by: Stefan Roese > Reviewed-by: Anatolij Gustschin Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] video: Armada XP: Move driver to DM_VIDEO
Hi Stefan, On Wed, 30 Jan 2019 08:49:38 +0100 Stefan Roese s...@denx.de wrote: ... > Could you please send your Acked-by tag as well to the new video > patches (will come in a few minutes). This makes it more clear that > you are "okay" with me pulling them. Done. -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] net: phy: Add gmiitorgmii converter support
From: Siva Durga Prasad Paladugu
This patch adds support for gmiitorgmii converter.
This converter sits between the MAC and the external phy
MAC <==> GMII2RGMII <==> RGMII_PHY.
The ethernet driver probes this bridge and this bridge driver
probes real phy driver and invokes the real phy functionalities
as requested. This bridge just needs to be configured based on
real phy negotiated speed and duplex.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
Changes in v2:
- Include "net: phy: Fix logic around gmiitorgmii wiring" patch
- Update patch on the top of
"net: phy: Add clause 45 identifier to phy_device
(sha1: b3eabd82f21b4d9206622fc5aee16751d2f4be8f) which adds one more
parameter to phy_device_create (bool is_c45)
drivers/net/phy/Kconfig | 7 +++
drivers/net/phy/Makefile| 1 +
drivers/net/phy/phy.c | 42 +++
drivers/net/phy/xilinx_gmii2rgmii.c | 103
include/phy.h | 6 +++
5 files changed, 159 insertions(+)
create mode 100644 drivers/net/phy/xilinx_gmii2rgmii.c
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 3dc0822d9c21..a68e1678de61 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -217,6 +217,13 @@ config PHY_VITESSE
config PHY_XILINX
bool "Xilinx Ethernet PHYs support"
+config PHY_XILINX_GMII2RGMII
+ bool "Xilinx GMII to RGMII Ethernet PHYs support"
+ help
+ This adds support for Xilinx GMII to RGMII IP core. This IP acts
+ as bridge between MAC connected over GMII and external phy that
+ is connected over RGMII interface.
+
config PHY_FIXED
bool "Fixed-Link PHY"
depends on DM_ETH
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 555da83630f4..76b6197009bc 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_PHY_SMSC) += smsc.o
obj-$(CONFIG_PHY_TERANETICS) += teranetics.o
obj-$(CONFIG_PHY_TI) += ti.o
obj-$(CONFIG_PHY_XILINX) += xilinx_phy.o
+obj-$(CONFIG_PHY_XILINX_GMII2RGMII) += xilinx_gmii2rgmii.o
obj-$(CONFIG_PHY_VITESSE) += vitesse.o
obj-$(CONFIG_PHY_MSCC) += mscc.o
obj-$(CONFIG_PHY_FIXED) += fixed.o
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 0c8b29dae44a..17cfcfe62a78 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -528,6 +528,9 @@ int phy_init(void)
#ifdef CONFIG_PHY_FIXED
phy_fixed_init();
#endif
+#ifdef CONFIG_PHY_XILINX_GMII2RGMII
+ phy_xilinx_gmii2rgmii_init();
+#endif
return 0;
}
@@ -881,6 +884,41 @@ void phy_connect_dev(struct phy_device *phydev, struct
eth_device *dev)
debug("%s connected to %s\n", dev->name, phydev->drv->name);
}
+#ifdef CONFIG_PHY_XILINX_GMII2RGMII
+#ifdef CONFIG_DM_ETH
+static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
+struct udevice *dev,
+phy_interface_t interface)
+#else
+static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
+struct eth_device *dev,
+phy_interface_t interface)
+#endif
+{
+ struct phy_device *phydev = NULL;
+ int sn = dev_of_offset(dev);
+ int off;
+
+ while (sn > 0) {
+ off = fdt_node_offset_by_compatible(gd->fdt_blob, sn,
+ "xlnx,gmii-to-rgmii-1.0");
+ if (off > 0) {
+ phydev = phy_device_create(bus, off,
+ PHY_GMII2RGMII_ID, false,
+ interface);
+ break;
+ }
+ if (off == -FDT_ERR_NOTFOUND)
+ sn = fdt_first_subnode(gd->fdt_blob, sn);
+ else
+ printf("%s: Error finding compat string:%d\n",
+ __func__, off);
+ }
+
+ return phydev;
+}
+#endif
+
#ifdef CONFIG_PHY_FIXED
#ifdef CONFIG_DM_ETH
static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
@@ -926,6 +964,10 @@ struct phy_device *phy_connect(struct mii_dev *bus, int
addr,
#ifdef CONFIG_PHY_FIXED
phydev = phy_connect_fixed(bus, dev, interface);
#endif
+#ifdef CONFIG_PHY_XILINX_GMII2RGMII
+ if (!phydev)
+ phydev = phy_connect_gmii2rgmii(bus, dev, interface);
+#endif
if (!phydev)
phydev = phy_find_by_mask(bus, 1 << addr, interface);
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c
b/drivers/net/phy/xilinx_gmii2rgmii.c
new file mode 100644
index ..aa4ce86d2e36
--- /dev/null
+++ b/drivers/net/phy/xilinx_gmii2rgmii.c
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx GMII2RGMII phy driver
+ *
+ * Copyright (C) 20
Re: [U-Boot] [PATCH 16/20] imx8m: fix sd to mmc1 and emmc to mmc2 for i.MX8MM
Hi Peng,
> > -Original Message-
> > From: Lukasz Majewski [mailto:lu...@denx.de]
> > Sent: 2019年1月30日 14:50
> > To: Peng Fan
> > Cc: sba...@denx.de; Fabio Estevam ;
> > dl-uboot-imx ; u-boot@lists.denx.de
> > Subject: Re: [U-Boot] [PATCH 16/20] imx8m: fix sd to mmc1 and emmc
> > to mmc2 for i.MX8MM
> >
> > Hi Peng,
> >
> > > > -Original Message-
> > > > From: Lukasz Majewski [mailto:lu...@denx.de]
> > > > Sent: 2019年1月30日 6:58
> > > > To: Peng Fan
> > > > Cc: sba...@denx.de; Fabio Estevam ;
> > > > dl-uboot-imx ; u-boot@lists.denx.de
> > > > Subject: Re: [U-Boot] [PATCH 16/20] imx8m: fix sd to mmc1 and
> > > > emmc to mmc2 for i.MX8MM
> > > >
> > > > Hi Peng,
> > > >
> > > > > Since the SD is usdhc2 and eMMC is usdhc3,
> > > >
> > > > Is this true on all IMX8M boards? Or is it only on the
> > > > development kit you do have?
> > >
> > > This is a hack for board, needs to be fixed in next version.
> > >
> > > >
> > > > My point is that this shall be setup by DTS aliases or maybe by
> > > > Kconfig option.
> > >
> > > Could you share more information?
> >
> > For example:
> >
> > / {
> > model = "K+P iMX6Q";
> > compatible = "kp,imx6-kp", "fsl,imx6";
> >
> > aliases {
> > mmc0 = &usdhc2;
> > mmc1 = &usdhc4;
> > usb1 = &usbh1;
> > };
> >
> > chosen {
> > stdout-path = &uart1;
> > };
> >
> >
> > And the "aliases" set the order in which you get the devices (like
> > mmc0, mmc1 above).
>
> Then we need SPL to have Device tree support, right?
Yes, this would be the easiest way to support this feature.
If your board doesn't have any footprint constraints (and boottime)
then IMHO it would be worth to switch to full (including SPL)
conversion to DM/DTS.
Other option would be to provide such configuration via Kconfig or
define spl_boot_device(void) in board's file.
>
> Thanks,
> Peng.
>
> >
> > >
> > > Thanks,
> > > Peng.
> > >
> > > >
> > > > > this cause mapping problem
> > > > > for spl_boot_device. So far hard coded them to correct MMC
> > > > > index, so that SD and eMMC boot can work.
> > > > >
> > > > > Signed-off-by: Peng Fan
> > > > > ---
> > > > > arch/arm/mach-imx/spl.c | 9 +
> > > > > 1 file changed, 9 insertions(+)
> > > > >
> > > > > diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
> > > > > index ebd8ff9290..0048832be8 100644
> > > > > --- a/arch/arm/mach-imx/spl.c
> > > > > +++ b/arch/arm/mach-imx/spl.c
> > > > > @@ -147,9 +147,18 @@ u32 spl_boot_device(void)
> > > > > case SD1_BOOT:
> > > > > case MMC1_BOOT:
> > > > > return BOOT_DEVICE_MMC1;
> > > > > +#if defined(CONFIG_IMX8MM)
> > > > > + case SD2_BOOT:
> > > > > + case MMC2_BOOT:
> > > > > + return BOOT_DEVICE_MMC1;
> > > > > + case SD3_BOOT:
> > > > > + case MMC3_BOOT:
> > > > > + return BOOT_DEVICE_MMC2;
> > > > > +#else
> > > > > case SD2_BOOT:
> > > > > case MMC2_BOOT:
> > > > > return BOOT_DEVICE_MMC2;
> > > > > +#endif
> > > > > #endif
> > > > > case NAND_BOOT:
> > > > > return BOOT_DEVICE_NAND;
> > > >
> > > >
> > > >
> > > >
> > > > Best regards,
> > > >
> > > > Lukasz Majewski
> > > >
> > > > --
> > > >
> > > > DENX Software Engineering GmbH, Managing Director: Wolfgang
> > > > Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194
> > > > Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax:
> > > > (+49)-8142-66989-80 Email: lu...@denx.de
> >
> >
> >
> >
> > Best regards,
> >
> > Lukasz Majewski
> >
> > --
> >
> > DENX Software Engineering GmbH, Managing Director: Wolfgang
> > Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell,
> > Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> > lu...@denx.de
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de
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Re: [U-Boot] [PATCH v2 17/22] board: mx6sabreauto: Remove the non-DM code
On 19-01-29 13:43:49, Peng Fan wrote:
>
>
> > -Original Message-
> > From: Abel Vesa
> > Sent: 2019年1月29日 19:35
> > To: Tom Rini ; Fabio Estevam
> > ; u-boot@lists.denx.de; dl-uboot-imx
> > ; Peng Fan
> > Cc: Nitin Garg ; Abel Vesa
> > Subject: [PATCH v2 17/22] board: mx6sabreauto: Remove the non-DM code
> >
> > Since the mx6sabreauto has DM support, remove the unused non-DM code
> > from mx6sabreauto board file.
>
> Has DM_PCA953X been enabled?
>
No. Why?
> Regards,
> Peng.
>
> >
> > Signed-off-by: Abel Vesa
> > ---
> > board/freescale/mx6sabreauto/mx6sabreauto.c | 70
> > -
> > 1 file changed, 70 deletions(-)
> >
> > diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c
> > b/board/freescale/mx6sabreauto/mx6sabreauto.c
> > index c7e3e67..dd72de9 100644
> > --- a/board/freescale/mx6sabreauto/mx6sabreauto.c
> > +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
> > @@ -159,44 +159,6 @@ static iomux_v3_cfg_t const port_exp[] = {
> > IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 |
> > MUX_PAD_CTRL(NO_PAD_CTRL)),
> > };
> >
> > -/*Define for building port exp gpio, pin starts from 0*/ -#define
> > PORTEXP_IO_NR(chip, pin) \
> > - ((chip << 5) + pin)
> > -
> > -/*Get the chip addr from a ioexp gpio*/ -#define
> > PORTEXP_IO_TO_CHIP(gpio_nr) \
> > - (gpio_nr >> 5)
> > -
> > -/*Get the pin number from a ioexp gpio*/ -#define
> > PORTEXP_IO_TO_PIN(gpio_nr) \
> > - (gpio_nr & 0x1f)
> > -
> > -static int port_exp_direction_output(unsigned gpio, int value) -{
> > - int ret;
> > -
> > - i2c_set_bus_num(2);
> > - ret = i2c_probe(PORTEXP_IO_TO_CHIP(gpio));
> > - if (ret)
> > - return ret;
> > -
> > - ret = pca953x_set_dir(PORTEXP_IO_TO_CHIP(gpio),
> > - (1 << PORTEXP_IO_TO_PIN(gpio)),
> > - (PCA953X_DIR_OUT << PORTEXP_IO_TO_PIN(gpio)));
> > -
> > - if (ret)
> > - return ret;
> > -
> > - ret = pca953x_set_val(PORTEXP_IO_TO_CHIP(gpio),
> > - (1 << PORTEXP_IO_TO_PIN(gpio)),
> > - (value << PORTEXP_IO_TO_PIN(gpio)));
> > -
> > - if (ret)
> > - return ret;
> > -
> > - return 0;
> > -}
> > -
> > #ifdef CONFIG_MTD_NOR_FLASH
> > static iomux_v3_cfg_t const eimnor_pads[] = {
> > IOMUX_PADS(PAD_EIM_D16__EIM_DATA16 |
> > MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)),
> > @@ -681,19 +643,10 @@ int checkboard(void) }
> >
> > #ifdef CONFIG_USB_EHCI_MX6
> > -#define USB_HOST1_PWR PORTEXP_IO_NR(0x32, 7)
> > -#define USB_OTG_PWR PORTEXP_IO_NR(0x34, 1)
> > -
> > -iomux_v3_cfg_t const usb_otg_pads[] = {
> > - IOMUX_PADS(PAD_ENET_RX_ER__USB_OTG_ID |
> > MUX_PAD_CTRL(NO_PAD_CTRL)),
> > -};
> > -
> > int board_ehci_hcd_init(int port)
> > {
> > switch (port) {
> > case 0:
> > - SETUP_IOMUX_PADS(usb_otg_pads);
> > -
> > /*
> > * Set daisy chain for otg_pin_id on 6q.
> > * For 6dl, this bit is reserved.
> > @@ -708,29 +661,6 @@ int board_ehci_hcd_init(int port)
> > }
> > return 0;
> > }
> > -
> > -int board_ehci_power(int port, int on)
> > -{
> > - switch (port) {
> > - case 0:
> > - if (on)
> > - port_exp_direction_output(USB_OTG_PWR, 1);
> > - else
> > - port_exp_direction_output(USB_OTG_PWR, 0);
> > - break;
> > - case 1:
> > - if (on)
> > - port_exp_direction_output(USB_HOST1_PWR, 1);
> > - else
> > - port_exp_direction_output(USB_HOST1_PWR, 0);
> > - break;
> > - default:
> > - printf("MXC USB port %d not yet supported\n", port);
> > - return -EINVAL;
> > - }
> > -
> > - return 0;
> > -}
> > #endif
> >
> > #ifdef CONFIG_SPL_BUILD
> > --
> > 2.7.4
>
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Re: [U-Boot] [PATCH v2 08/22] arm: dts: Add all the imx6[q|qp|dl] sabre[auto|sd] u-boot dts[i] files
On 19-01-29 13:33:54, Peng Fan wrote:
> Hi Abel,
>
> > -Original Message-
> > From: Abel Vesa
> > Sent: 2019年1月29日 19:31
> > To: Tom Rini ; Fabio Estevam
> > ; u-boot@lists.denx.de; dl-uboot-imx
> > ; Peng Fan
> > Cc: Nitin Garg ; Abel Vesa
> > Subject: [PATCH v2 08/22] arm: dts: Add all the imx6[q|qp|dl] sabre[auto|sd]
> > u-boot dts[i] files
> >
> > This allows us to keep the basic dts[i] files up-to-date with the ones in
> > kernel,
> > but at the same time allowing the u-boot to add its own properties to the
> > existing nodes.
> >
> > Signed-off-by: Abel Vesa
> > ---
> > arch/arm/dts/imx6dl-sabreauto-u-boot.dtsi | 6 ++
> > arch/arm/dts/imx6dl-sabresd-u-boot.dtsi| 6 ++
> > arch/arm/dts/imx6q-sabreauto-u-boot.dtsi | 6 ++
> > arch/arm/dts/imx6q-sabresd-u-boot.dtsi | 6 ++
> > arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi | 23
> > +++
> > arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi | 14 ++
> > arch/arm/dts/imx6qdl-u-boot.dtsi | 4 ++--
> > arch/arm/dts/imx6qp-sabreauto-u-boot.dtsi | 6 ++
> > arch/arm/dts/imx6qp-sabresd-u-boot.dtsi| 6 ++
> > 9 files changed, 75 insertions(+), 2 deletions(-) create mode 100644
> > arch/arm/dts/imx6dl-sabreauto-u-boot.dtsi
> > create mode 100644 arch/arm/dts/imx6dl-sabresd-u-boot.dtsi
> > create mode 100644 arch/arm/dts/imx6q-sabreauto-u-boot.dtsi
> > create mode 100644 arch/arm/dts/imx6q-sabresd-u-boot.dtsi
> > create mode 100644 arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi
> > create mode 100644 arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi
> > create mode 100644 arch/arm/dts/imx6qp-sabreauto-u-boot.dtsi
> > create mode 100644 arch/arm/dts/imx6qp-sabresd-u-boot.dtsi
> >
> > diff --git a/arch/arm/dts/imx6dl-sabreauto-u-boot.dtsi
> > b/arch/arm/dts/imx6dl-sabreauto-u-boot.dtsi
> > new file mode 100644
> > index 000..b3f5f2d
> > --- /dev/null
> > +++ b/arch/arm/dts/imx6dl-sabreauto-u-boot.dtsi
> > @@ -0,0 +1,6 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2018 Jagan Teki */
>
> Is this file copied from other places? Do you need to update Copyright?
> Same questions to the following files with Copyright.
>
Oups, I took the icore implementation as example and forgot to
modify the copyright header. Will do in the next version.
> > +
> > +#include "imx6qdl-sabreauto-u-boot.dtsi"
> > diff --git a/arch/arm/dts/imx6dl-sabresd-u-boot.dtsi
> > b/arch/arm/dts/imx6dl-sabresd-u-boot.dtsi
> > new file mode 100644
> > index 000..e34cf3c
> > --- /dev/null
> > +++ b/arch/arm/dts/imx6dl-sabresd-u-boot.dtsi
> > @@ -0,0 +1,6 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2018 Jagan Teki */
> > +
> > +#include "imx6qdl-sabresd-u-boot.dtsi"
> > diff --git a/arch/arm/dts/imx6q-sabreauto-u-boot.dtsi
> > b/arch/arm/dts/imx6q-sabreauto-u-boot.dtsi
> > new file mode 100644
> > index 000..b3f5f2d
> > --- /dev/null
> > +++ b/arch/arm/dts/imx6q-sabreauto-u-boot.dtsi
> > @@ -0,0 +1,6 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2018 Jagan Teki */
> > +
> > +#include "imx6qdl-sabreauto-u-boot.dtsi"
> > diff --git a/arch/arm/dts/imx6q-sabresd-u-boot.dtsi
> > b/arch/arm/dts/imx6q-sabresd-u-boot.dtsi
> > new file mode 100644
> > index 000..e34cf3c
> > --- /dev/null
> > +++ b/arch/arm/dts/imx6q-sabresd-u-boot.dtsi
> > @@ -0,0 +1,6 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2018 Jagan Teki */
> > +
> > +#include "imx6qdl-sabresd-u-boot.dtsi"
> > diff --git a/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi
> > b/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi
> > new file mode 100644
> > index 000..3995849
> > --- /dev/null
> > +++ b/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi
> > @@ -0,0 +1,23 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2019 NXP
> > + */
> > +
> > +#include "imx6qdl-u-boot.dtsi"
> > +
> > +/ {
> > + aliases {
> > + mmc0 = &usdhc3;
> > + };
> > +};
> > +
> > +&usdhc3 {
> > + no-1-8-v;
> > + keep-power-in-suspend;
> > + enable-sdio-wakeup;
>
> You could drop the upper two lines. They are not used by U-Boot.
>
> Regards,
> Peng.
>
> > + u-boot,dm-spl;
> > +};
> > +
> > +&pinctrl_usdhc3 {
> > + u-boot,dm-spl;
> > +};
> > diff --git a/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi
> > b/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi
> > new file mode 100644
> > index 000..45f02b1
> > --- /dev/null
> > +++ b/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi
> > @@ -0,0 +1,14 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2019 NXP
> > + */
> > +
> > +#include "imx6qdl-u-boot.dtsi"
> > +
> > +&usdhc3 {
> > + u-boot,dm-spl;
> > +};
> > +
> > +&pinctrl_usdhc3 {
> > + u-boot,dm-spl;
> > +};
> > diff --git a/arch/arm/dts/imx6qdl-u-boot.dtsi
> > b/arch/arm/dts/imx6qdl-u-boot.dtsi
> > index dffc21b..45ae2fa 100644
> > --- a/arch/arm/dts/imx6qdl-u-boot.dtsi
> > +++ b/arch/arm/dts/imx6qdl-u-bo
Re: [U-Boot] [PATCH 10/20] imx8m: add clk support for i.MX8MM
Hi Peng,
> > -Original Message-
> > From: Lukasz Majewski [mailto:lu...@denx.de]
> > Sent: 2019年1月30日 14:47
> > To: Peng Fan
> > Cc: sba...@denx.de; Fabio Estevam ;
> > dl-uboot-imx ; u-boot@lists.denx.de
> > Subject: Re: [U-Boot] [PATCH 10/20] imx8m: add clk support for
> > i.MX8MM
> >
> > Hi Peng,
> >
> > > Hi Lukasz,
> > >
> > > > -Original Message-
> > > > From: Lukasz Majewski [mailto:lu...@denx.de]
> > > > Sent: 2019年1月30日 6:55
> > > > To: Peng Fan
> > > > Cc: sba...@denx.de; Fabio Estevam ;
> > > > dl-uboot-imx ; u-boot@lists.denx.de
> > > > Subject: Re: [U-Boot] [PATCH 10/20] imx8m: add clk support for
> > > > i.MX8MM
> > > >
> > > > Hi Peng,
> > > >
> > > > > Introduce clk implementation for i.MX8MM, including pll
> > > > > configuration, pll decoding, ccm configuration.
> > > > >
> > > > > Signed-off-by: Peng Fan
> > > > > ---
> > > > > arch/arm/include/asm/arch-imx8m/clock.h| 2 +
> > > > > arch/arm/include/asm/arch-imx8m/clock_imx8mm.h | 387
> > +++
> > > > > arch/arm/mach-imx/imx8m/Makefile | 1 +
> > > > > arch/arm/mach-imx/imx8m/clock_imx8mm.c | 866
> > > > > +
> > > > > arch/arm/mach-imx/imx8m/clock_slice.c | 461
> > > > + 5
> > > > > files changed, 1717 insertions(+) create mode 100644
> > > > > arch/arm/include/asm/arch-imx8m/clock_imx8mm.h create mode
> > 100644
> > > > > arch/arm/mach-imx/imx8m/clock_imx8mm.c
> > > >
> > > > As fair as I see this approach is not similar to the one from
> > > > Linux kernel:
> > > >
> > > >
> > https://elixir.bootlin.com/linux/v5.0-rc3/source/drivers/clk/imx/clk-imx8mq.
> >
> > > > c
> > > > or simpler:
> > > >
> > https://git.pengutronix.de/cgit/barebox/tree/drivers/clk/imx/clk-imx8mq.c
> > > >
> > > > Also Fabio pointed out in the other mail that we shall stick to
> > > > Linux kernel Common Clock Framework.
> > > >
> > > > IMHO we shall add the simple CCF look alike code (I'm going to
> > > > post imx6q port in a few days).
> > >
> > > That will be too complicated for SPL and it will bring more
> > > efforts when we do pre/post silicon bringup.
> >
> > If we use OF_PLATDATA to avoid DTB inclusion (and provide necessary
> > information for the SPL driver) then we may do the trick.
> >
> > As of now - the problem is that SPL on IMX{568} get bloated very
> > rapidly when converted to DM/DTS..., but this shall not be the case
> > for generic EVAL board.
>
> Ok. I'll wait for your work about CCF, then check whether that could
> be used on i.MX8MM. On some platform, there are limited SRAM,
IMX6Q has a lot of OCRAM, so SPL will fit.
What is the smallest SRAM size for IMX8MM?
There are other options to trim the SPL - like reduced eMMC support,
reduced FitImage, reduced printf, etc.
> hope we not goes into use TPL.
I would also prefer to avoid TPL by any means.
>
> Thanks,
> Peng.
>
> >
> > >
> > > Regards,
> > > Peng.
> > >
> > > >
> > > > >
> > > > > diff --git a/arch/arm/include/asm/arch-imx8m/clock.h
> > > > > b/arch/arm/include/asm/arch-imx8m/clock.h index
> > > > > 7225c760fe..ead4b8d3dc 100644 ---
> > > > > a/arch/arm/include/asm/arch-imx8m/clock.h +++
> > > > > b/arch/arm/include/asm/arch-imx8m/clock.h @@ -7,6 +7,8 @@
> > > > >
> > > > > #ifdef CONFIG_IMX8MQ
> > > > > #include
> > > > > +#elif defined(CONFIG_IMX8MM)
> > > > > +#include
> > > > > #else
> > > > > #error "Error no clock.h"
> > > > > #endif
> > > > > diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h
> > > > > b/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h new file
> > > > > mode
> > > > 100644
> > > > > index 00..305514a4ec
> > > > > --- /dev/null
> > > > > +++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h
> > > > > @@ -0,0 +1,387 @@
> > > > > +/* SPDX-License-Identifier: GPL-2.0+ */
> > > > > +/*
> > > > > + * Copyright 2018-2019 NXP
> > > > > + *
> > > > > + * Peng Fan
> > > > > + */
> > > > > +
> > > > > +#ifndef _ASM_ARCH_IMX8MM_CLOCK_H
> > > > > +#define _ASM_ARCH_IMX8MM_CLOCK_H
> > > > > +
> > > > > +#define PLL_1443X_RATE(_rate, _m, _p, _s, _k)
> > > > > \
> > > > > + {
> > > > > \
> > > > > + .rate =
> > > > > (_rate), \
> > > > > + .mdiv =
> > > > > (_m), \
> > > > > + .pdiv =
> > > > > (_p), \
> > > > > + .sdiv =
> > > > > (_s), \
> > > > > + .kdiv =
> > > > > (_k), \
> > > > > + }
> > > > > +
> > > > > +#define LOCK_STATUS BIT(31)
> > > > > +#define LOCK_SEL_MASKBIT(29)
> > > > > +#define CLKE_MASKBIT(11)
> > > > > +#define RST_MASK BIT(9)
> > > > > +#define BYPASS_MASK BIT(4)
> > > > > +#define MDIV_SHIFT 12
> > > > > +#define MDIV_MASK GENMASK(21, 12)
> > > > > +#define PDIV_SHIFT 4
> > > > > +#define PDIV_MASKGENMASK(9, 4)
> > > > > +#define SDI
Re: [U-Boot] [PATCH v3] moveconfig: add a second pass for empty #if/#endif blocks
On Wed, Jan 30, 2019 at 4:23 PM Chris Packham wrote:
>
> Moveconfig already attempts to remove empty #if/#endif blocks when there
> is a matching CONFIG_ being moved. Add a second pass which covers files
> without a match.
>
> Signed-off-by: Chris Packham
> ---
> This was previously submitted as
> http://patchwork.ozlabs.org/patch/924901/ there still seems to be cases
> of #if/#endif left over from Kconfig migrations so perhaps this is still
> needed/wanted.
>
> I've plumbed this in as a second pass because ultimately we may want to
> make this a separate option. Also I couldn't figure out how to implement
> this without using re.M so I couldn't make it work in with the line by
> line parsing of cleanup_one_header().
This seems useful to find leftover code
regardless of the CONFIG options you are moving.
One drawback is, it may fold unrelated cleanups.
Maybe, it would be useful to add a separate option to turn on this feature,
or make it into a separate tool.
> Changes in v3:
> - drop rfc
>
> Changes in v2:
> - use re.compile
>
> tools/moveconfig.py | 27 +--
> 1 file changed, 25 insertions(+), 2 deletions(-)
>
> diff --git a/tools/moveconfig.py b/tools/moveconfig.py
> index caa81ac2ed77..1a214c560546 100755
> --- a/tools/moveconfig.py
> +++ b/tools/moveconfig.py
> @@ -545,6 +545,28 @@ def confirm(options, prompt):
>
> return True
>
> +def cleanup_empty_blocks(header_path, options):
> +"""Clean up empty conditional blocks
> +
> +Arguments:
> + header_path: path to the cleaned file.
> + options: option flags.
> +"""
> +pattern = re.compile(r'^\s*#\s*if.*$\n^\s*#\s*endif.*$\n*', flags=re.M)
> +with open(header_path) as f:
> +data = f.read()
> +
> +new_data = pattern.sub('\n', data)
> +
> +show_diff(data.splitlines(True), new_data.splitlines(True), header_path,
> + options.color)
> +
> +if options.dry_run:
> +return
> +
> +with open(header_path, 'w') as f:
> +f.write(new_data)
> +
> def cleanup_one_header(header_path, patterns, options):
> """Clean regex-matched lines away from a file.
>
> @@ -626,8 +648,9 @@ def cleanup_headers(configs, options):
> continue
> for filename in filenames:
> if not fnmatch.fnmatch(filename, '*~'):
> -cleanup_one_header(os.path.join(dirpath, filename),
> - patterns, options)
> +header_path = os.path.join(dirpath, filename)
> +cleanup_one_header(header_path, patterns, options)
> +cleanup_empty_blocks(header_path, options)
>
> def cleanup_one_extra_option(defconfig_path, configs, options):
> """Delete config defines in CONFIG_SYS_EXTRA_OPTIONS in one defconfig
> file.
> --
> 2.20.1
>
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> https://lists.denx.de/listinfo/u-boot
--
Best Regards
Masahiro Yamada
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[U-Boot] imx8: cpu: restrict checking ROM passover info for revA
> Passover info only for revA. > move get_cpu_rev out of CONFIG_CPU to avoid build failure when using > get_cpu_rev in SPL. > Add a CONFIG_SPL_BUILD for passover usage, no need to execute it again > in normal U-Boot stage. Also if still checking passover info in normal > U-Boot stage, need to make the passover code executed after > arch_cpu_init_dm. > So to make it easy and clean, only execute the code for SPL stage. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, 1/3] mmc: fsl_esdhc: add compatible for fsl, imx53-esdhc
> From: Patrick Bruenn > Add compatible "fsl,imx53-esdhc" to keep mmc working on i.MX53 platforms > with CONFIG_DM_MMC=y > Signed-off-by: Patrick Bruenn Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] MTD: nand: mxs_nand_spl: Fix empty function pointer for BBT
> The initialization function calls a nand_chip.scan_bbt(mtd) but > scan_bbt is never initialized resulting in an undefined function > pointer. This will direct the function pointer to nand_default_bbt > defined in the same file. > Signed-off-by: Adam Ford > Acked-by: Stefan Agner > diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c > b/drivers/mtd/nand/raw/mxs_nand_spl.c > index 2d7bbe83cc..c628f3adec 100644 > --- a/drivers/mtd/nand/raw/mxs_nand_spl.c > +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c > @@ -185,6 +185,7 @@ static int mxs_nand_init(void) > mtd = nand_to_mtd(&nand_chip); > /* set mtd functions */ > nand_chip.cmdfunc = mxs_nand_command; > + nand_chip.scan_bbt = nand_default_bbt; > nand_chip.numchips = 1; > > /* identify flash device */ Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, v2, 11/11] configs: add default configuraiton for Colibri iMX7 with eMMC
> From: Stefan Agner > Add a default configuration for Colibri iMX7D 1GB (with eMMC > NAND flash). > Signed-off-by: Stefan Agner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, 3/3] dm: arm: imx: migrate cx9020 to CONFIG_DM_MMC
> From: Patrick Bruenn > Enable esdhc1/2 device nodes for cx9020 and build with CONFIG_DM_MMC=y > Signed-off-by: Patrick Bruenn Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] MAINTAINERS: imx: Change Fabio's email address
> I prefer to use my personal email address for U-Boot related work. > Signed-off-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2,10/10] imx8qxp: mek: update README
> Update README after we switch to use SPL > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, V2, 06/10] dts: imx8qxp-mek: introduce u-boot dtsi
> Introduce u-boot dtsi for i.MX8QXP MEK board. > we do not introduce a common dtsi for SoC, because different board > has different requirement on which needs to be enabled in SPL DM. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, 1/1] tools: imx8image: use correct printf escape sequence
> core is of type uint64_t. So for printing we need "%"PRIu64 (not "%lu"). > Without the patch a warning is issued when building on a 32bit system. > Signed-off-by: Heinrich Schuchardt Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, 1/3] mx7: Do not call lcdif_power_down() in the SPL case
> From: Fabio Estevam
> Like it was done on imx6 in commit 9236269de57d ("imx: mx6: Fix
> implementantion reset_misc")
> Do not call lcdif_power_down() in the SPL case to fix the following
> build error:
> LD spl/u-boot-spl
> MKIMAGE u-boot.img
> arch/arm/mach-imx/built-in.o: In function `reset_misc':
> /home/fabio/ossystems/u-boot/arch/arm/mach-imx/mx7/soc.c:372: undefined
> reference to `lcdif_power_down'
> scripts/Makefile.spl:375: recipe for target 'spl/u-boot-spl' failed
> Signed-off-by: Fabio Estevam
> Signed-off-by: Otavio Salvador
> Signed-off-by: Fabio Estevam
> Signed-off-by: Otavio Salvador
> Reviewed-by: Peng Fan
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
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=
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> This patch sets up an alias for mmc0 to usdhc3. > Before the DM conversion only usdhc3 was enabled and therefore it appeared > as MMC 0 to u-boot. After enabling MMC DM though usdhc3 defaults to MMC 2, > which left unattended would drive changes to existing warp7 bootscripts and > environment variables that rely on mmc 0. > Setup the alias of mmc0 and usdhc3 so that existing warp7 boot code will > work unmodified. > Signed-off-by: Bryan O'Donoghue > Cc: Albert Aribaud > Cc: Peng Fan > Cc: Fabio Estevam > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, RESEND, v3, 4/8] arm: imx7s-warp: Convert to DM MMC initialization
> Converts from fixed initialization of MMC to DM initialization of MMC. > Signed-off-by: Bryan O'Donoghue > Cc: Albert Aribaud > Cc: Peng Fan > Cc: Fabio Estevam > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2,08/10] imx: build flash.bin for i.MX8
> Build flash.bin for i.MX8 when SPL enabled. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] imx: Check the PL310 version for applying errata
> Apply errata based on PL310 version instead of compile > time. Also set Prefetch offset to 15, since it improves > memcpy performance by 35%. Don't enable Incr double > Linefill enable since it adversely affects memcpy > performance by about 32MB/s and reads by 90MB/s. Tested > with 4K to 16MB sized src and dst aligned buffer. > Signed-off-by: Nitin Garg > Signed-off-by: Ye Li Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] spi: mxc_spi: Fix build warning on ARM64 platforms
> When building mxc_spi driver on ARM64 platforms, get below build warnings.
> Fix it in this patch.
> In file included from include/common.h:48:0,
> from drivers/spi/mxc_spi.c:9:
> drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’:
> drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of
> different size [-Wpointer-to-int-cast]
> _func_, bitlen, (u32)dout, (u32)din);
> ^
> include/log.h:135:26: note: in definition of macro ‘debug_cond’
> printf(pr_fmt(fmt), ##args); \
> ^~~~
> drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’
> debug("%s: bitlen %d dout 0x%x din 0x%x\n",
> ^
> drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of
> different size [-Wpointer-to-int-cast]
> _func_, bitlen, (u32)dout, (u32)din);
> ^
> include/log.h:135:26: note: in definition of macro ‘debug_cond’
> printf(pr_fmt(fmt), ##args); \
> ^~~~
> drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’
> debug("%s: bitlen %d dout 0x%x din 0x%x\n",
> ^
> Signed-off-by: Ye Li
> Reviewed-by: Peng Fan
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
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[U-Boot] [U-Boot, RESEND, v3, 2/8] arm: dts: imx7s-warp: Import Linux warp7 dts
> This patch imports the Linux kernel warp7 dts as at upstream kernel commit > cf76c364a1e1. > Signed-off-by: Bryan O'Donoghue > Cc: Albert Aribaud > Cc: Peng Fan > Cc: Fabio Estevam > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2,03/10] arm: imx: build mach-imx for i.MX8
> To enable SPL for i.MX8, we could reuse code in arch/arm/mach-imx. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, v2, 04/11] configs: colibri_imx7: use separate device tree
> From: Stefan Agner > Use OF_SEPARATE as suggested by the build system. > Signed-off-by: Stefan Agner > Acked-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,v2,01/11] colibri_imx7: fix boot commands
> From: Stefan Agner
> Fix mixed up boot commands between raw NAND and eMMC variant. Also
> make sure that the boot_file is defined for the eMMC boot command.
> Fixes: a62c60610f51 ("colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module
> support")
> Signed-off-by: Stefan Agner
> Acked-by: Marcel Ziswiler
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
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[U-Boot] [U-Boot, v2, 09/11] configs: colibri_imx7: use DFU for NAND instead of MMC
> From: Stefan Agner > The colibri_imx7_defconfig is for Colibri iMX7 raw NAND devices. > Hence DFU for NAND is more useful then for MMC devices. > Signed-off-by: Stefan Agner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] Makefile: remove generated font files
Hi Heinrich, On Tue, 29 Jan 2019 21:15:21 +0100 Heinrich Schuchardt xypron.g...@gmx.de wrote: > If `make mrproper` does not delete the generated drivers/video/fonts/*.S > files a following `make tests` fails. > > Signed-off-by: Heinrich Schuchardt Reviewed-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, V2, 07/10] imx: mkimage_fit_atf: introduce BL33_BASE_ADDR
> Introduce BL33_BASE_ADDR, then we could reuse this script for i.MX8QXP. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, RESEND, v3, 6/8] warp7: defconfig: Switch on IMX7 GPIO/pinctrl for both ports
> Switches on the IMX7 pinctrl driver for the warp7 and warp7_bl33 ports, > necessary to convert over to DM for this board. > It is necessary to switch on pinctrl and GPIO in one go. > Signed-off-by: Bryan O'Donoghue > Cc: Peng Fan > Cc: Fabio Estevam > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, v2, 07/11] colibri_imx7: drop legacy usdhc support
> From: Stefan Agner > Drop legacy pinmux/usdhc board configuration. > Signed-off-by: Stefan Agner > Acked-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] m53menlo: fix addmtd cmd in default environment
> The original definition added the string mtdparts= to the Linux Kernel > args twice: mtdparts=mtdparts=. Fix that. > Signed-off-by: Olaf Mandel > Reviewed-by: Marek Vasut Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,v2,06/11] configs: colibri_imx7: use DM_MMC
> From: Stefan Agner > Now that device tree is in place use DM_MMC for Colibri iMX7 > devices. > Signed-off-by: Stefan Agner > Acked-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, v2, 02/11] arm: dts: imx7: colibri: split dt for raw NAND and eMMC devices
> From: Stefan Agner > In preparation of adding CONFIG_DM_MMC support use separate device > trees for raw NAND and eMMC devices. > Signed-off-by: Stefan Agner > Acked-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] imx: Fix potential lmb memory overwritten by stack
> At default, u-boot reserves the memory from SP - 4KB to DRAM end for > lmb in arch_lmb_reserve. So lmb won't allocate any memory from it. > But we found the 4K gap for SP is not enough now, because some FDT > updating operations are added in our u-boot before jumping to kernel, > which needs larger stack. This causes the lmb allocated memory is overwritten > by stack. > Fix the issue by implementing the board_lmb_reserve to reserve from > SP - 16KB to memory end for lmb. > Signed-off-by: Ye Li Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, RESEND, v3, 1/8] arm: dts: imx7: Correct spelling mistake in GPIO name
> As pointed out by Lucas WDOD1_WDOG_ANY should be WDOG1_WDOG_ANY. Once > corrected we can import the latest kernel DTS unmodified. > Signed-off-by: Bryan O'Donoghue > Reported-by: Lukas Auer Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2,09/10] imx8qxp: mek: default enable SPL
> Enable SPL for i.MX8QXP MEK, and currently use SPL FIT. > The SPL enable SPL_DM to use MMC/PINCTRL/POWER DOMAIN/CLK. > Note: SPL FIT could not support secure boot chain, because i.MX8/8X > only support i.MX container format. This container format has > not been upstreamed, so we use FIT for now. When SPL container > supported, we could switch to that. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, RESEND, v3, 7/8] warp7: defconfig: Switch to DM for I2C
> This commit switches to DM I2C for warp7 and warp7_bl33 defconfigs. > Signed-off-by: Bryan O'Donoghue > Reviewed-by: Peng Fan > Cc: Peng Fan > Cc: Fabio Estevam > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, v2, 08/11] configs: colibri_imx7: enable CAAM driver
> From: Stefan Agner > Access to CAAM in non-secure mode must be enabled by the boot > loader first. The U-Boot CAAM driver enables access to CAAM in > non-secure mode by default. Hence enable the CAAM driver to > allow Linux accessing CAAM directly. This prevents error > messages like the following on Linux boot: > caam 3090.caam: Entropy delay = 3200 > caam 3090.caam: failed to acquire DECO 0 > caam 3090.caam: failed to instantiate RNG > Signed-off-by: Stefan Agner > Acked-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,v4,2/2] imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
> Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on > the PHYTEC phyCORE-i.MX6UL SOM (PCL063). > CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) > CPU: Industrial temperature grade (-40C to 105C) at 44C > Reset cause: POR > Board: PHYTEC phyCORE-i.MX6UL > I2C: ready > DRAM: 256 MiB > NAND: 512 MiB > MMC: FSL_SDHC: 0 > In:serial > Out: serial > Err: serial > Net: FEC0 > Working: > - Eth0 > - i2C > - MMC/SD > - NAND > - UART (1 & 5) > - USB (host & otg) > Signed-off-by: Martyn Welch Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] ARM: imx6q_logic: Enable Falcon Mode and fatwrite
> This patch enables Falcon Mode by default and updates the README
> file to show instructions on how to run from the micro SD card
> or eMMC. This patch also enables fatwrite to help assist with
> writing the 'args' to the microSD card.
> Signed-off-by: Adam Ford
> diff --git a/board/logicpd/imx6/README b/board/logicpd/imx6/README
> index df43b55d6b..26d053a32c 100644
> --- a/board/logicpd/imx6/README
> +++ b/board/logicpd/imx6/README
> @@ -22,8 +22,17 @@ To build U-Boot for the Dual and Quad variants:
>
> Flashing U-Boot into the SD card
>
> +U-Boot is now building with SPL enabled which means there are two files to
> +load into the SD card. Make sure the card is formatted with at least two
> +partitions with the first partition being FAT32. First copy u-boot-dtb.img
> +to the first partition then burn SPL to the SD card with dd.
> +The SPL portion is programmed into a certain location for use by the internal
> +bootROM and it cannot be changed. The following instructions assume the SD
> +card is located as /dev/sdb.
> +
> + cp u-boot-dtb.img /dev/media/logic/boot
> + sudo dd if=SPL of=/dev/sdb bs=1k seek=1 oflag=sync status=none && sync
>
> -See README.imximage for details on booting from SD
>
> Flashing U-Boot into NAND
> -
> @@ -32,6 +41,43 @@ with:
>
>kobs-ng init -v -x u-boot-dtb.imx
>
> +
> +Using Falcon Mode
> +-
> +With Falcon Mode enabled, U-Boot can be bypassed by having SPL directly load
> +the kernel. The device tree, Kernel and boot args must first be configured,
> +and stored to a file on the micro SD card called 'args'
> +The kernel uImage is built with LOAD_ADDR=0x1200 and the device tree is
> +assummed to be imx6q-logicpd.dtb.
> +
> +By default the mmcroot is set to the baseboard.
> +
> + # Establish bootargs
> + run mmcargs
> +
> + # Load Linux Kernel uImage
> + fatload mmc 1 $loadaddr uImage
> +
> + # Load Device Tree
> + run loadfdt
> +
> + # Setup the blob that will get passed to the kernel
> + spl export fdt ${loadaddr} - ${fdt_addr_r}
> +
> + # Note the starting and ending address of the updated device tree.
> + # for this example:
> + # Loading Device Tree to 1ffdf000, end 1fff038b ... OK
> + # Notice that 0x1fff038b - 1ffdf000 = 0x1138b
> + # now Add 1, so the length is 0x1138c.
> +
> + fatwrite mmc 1 0x1ffdf000 args 0x1138c
> +
> + # Reset the board and it will bypass U-Boot and SPL will directly boot
> + # the uImage
> +
> +To interrupt the boot sequence and force U-Boot to load, hold the 'c' button
> +while starting.
> +
> Additional Support Documentation can be found at:
> https://support.logicpd.com/
>
> diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
> index 3358c08cb6..457366a664 100644
> --- a/configs/imx6q_logic_defconfig
> +++ b/configs/imx6q_logic_defconfig
> @@ -22,6 +22,7 @@ CONFIG_SPL_SEPARATE_BSS=y
> CONFIG_SPL_DMA_SUPPORT=y
> CONFIG_SPL_I2C_SUPPORT=y
> CONFIG_SPL_NAND_SUPPORT=y
> +CONFIG_SPL_OS_BOOT=y
> CONFIG_SPL_PAYLOAD="u-boot.img"
> CONFIG_SPL_USB_HOST_SUPPORT=y
> CONFIG_SPL_USB_GADGET_SUPPORT=y
> @@ -77,3 +78,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
> CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
> CONFIG_CI_UDC=y
> CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_FAT_WRITE=y
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
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[U-Boot] imx: hab: Convert non-NULL IVT DCD pointer warning to an error
> The following NXP application notes and manual recommend to ensure the
> IVT DCD pointer is Null prior to calling HAB API authenticate_image()
> function:
> - AN12263: HABv4 RVT Guidelines and Recommendations
> - AN4581: Secure Boot on i.MX50, i.MX53, i.MX 6 and i.MX7 Series using
> HABv4
> - CST docs: High Assurance Boot Version 4 Application Programming
> Interface Reference Manual
> Commit ca89df7dd46f ("imx: hab: Convert DCD non-NULL error to warning")
> converted DCD non-NULL error to warning due to the lack of documentation
> at the time of first patch submission. We have warned U-Boot users since
> v2018.03, and it makes sense now to follow the NXP recommendation to
> ensure the IVT DCD pointer is Null.
> DCD commands should only be present in the initial boot image loaded by
> the SoC ROM. Starting in HAB v4.3.7 the HAB code will generate an error
> if a DCD pointer is present in an image being authenticated by calling the
> HAB RVT API. Older versions of HAB will process and run DCD if it is
> present, and this could lead to an incorrect authentication boot flow.
> Signed-off-by: Breno Lima
> Reviewed-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
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[U-Boot] [U-Boot, v2, 05/11] arm: dts: imx7: colibri: add usdhci peripherals to device tree
> From: Stefan Agner > Add usdhci peripherals to device tree. This allows to use DM_MMC > for Colibri iMX7 devices. > Signed-off-by: Stefan Agner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] ARM: imx6q_logic: Enable DM_USB and dependent regulators
> With the updated device trees in place, this patch enables > DM_USB which uses several regulators also enabled with this patch. > Signed-off-by: Adam Ford > diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig > index d0362665bb..3358c08cb6 100644 > --- a/configs/imx6q_logic_defconfig > +++ b/configs/imx6q_logic_defconfig > @@ -64,8 +64,13 @@ CONFIG_MII=y > CONFIG_PINCTRL=y > CONFIG_PINCTRL_IMX6=y > CONFIG_DM_PMIC_PFUZE100=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_PFUZE100=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_REGULATOR_GPIO=y > CONFIG_MXC_UART=y > CONFIG_USB=y > +CONFIG_DM_USB=y > CONFIG_USB_GADGET=y > CONFIG_USB_GADGET_MANUFACTURER="FSL" > CONFIG_USB_GADGET_VENDOR_NUM=0x0525 Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,2/3] pico-imx7d: Add LCD support
> From: Fabio Estevam > Add support for the VXT VL050-8048NT-C01 panel connected through > the 24 bit parallel LCDIF interface. > Signed-off-by: Fabio Estevam > Signed-off-by: Otavio Salvador Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, 2/2] ARM: DTS: imx6q-logicpd: Update DTS/DTSI files
> The i.MX6 SOM and development kits have undergone significant
> updates and changes over the past few months. This re-sync's
> the U-Boot with Logic PD's BSP.
> Signed-off-by: Adam Ford
> diff --git a/arch/arm/dts/imx6-logicpd-baseboard.dtsi
> b/arch/arm/dts/imx6-logicpd-baseboard.dtsi
> new file mode 100644
> index 00..303c09334b
> --- /dev/null
> +++ b/arch/arm/dts/imx6-logicpd-baseboard.dtsi
> @@ -0,0 +1,596 @@
> +/*
> + * Copyright 2018 Logic PD, Inc.
> + * Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/ {
> + keyboard {
> + compatible = "gpio-keys";
> +
> + btn0 {
> + gpios = <&pcf8575 0 GPIO_ACTIVE_LOW>;
> + label = "btn0";
> + linux,code = ;
> + debounce-interval = <10>;
> + wakeup-source;
> + };
> +
> + btn1 {
> + gpios = <&pcf8575 1 GPIO_ACTIVE_LOW>;
> + label = "btn1";
> + linux,code = ;
> + debounce-interval = <10>;
> + wakeup-source;
> + };
> +
> + btn2 {
> + gpios = <&pcf8575 2 GPIO_ACTIVE_LOW>;
> + label = "btn2";
> + linux,code = ;
> + debounce-interval = <10>;
> + wakeup-source;
> + };
> + btn3 {
> + gpios = <&pcf8575 3 GPIO_ACTIVE_LOW>;
> + label = "btn3";
> + linux,code = ;
> + debounce-interval = <10>;
> + wakeup-source;
> + };
> +
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + gen_led0 {
> + label = "led0";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_led0>;
> + gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "cpu0";
> + };
> +
> + gen_led1 {
> + label = "led1";
> + gpios = <&pcf8575 8 GPIO_ACTIVE_HIGH>;
> + };
> +
> + gen_led2 {
> + label = "led2";
> + gpios = <&pcf8575 9 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> +
> + gen_led3 {
> + label = "led3";
> + gpios = <&pcf8575 10 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "default-on";
> + };
> + };
> +
> + reg_usb_otg_vbus: regulator-otg-vbus@0 {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <500>;
> + regulator-max-microvolt = <500
[U-Boot] ARM: imx: fix: Provide correct enum values for ONENAND/NOR boot recognition
> According to "Table 5-1. Boot Device Select" (page 335, > i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 4, 09/2017) > the BOOT_CFG1[3] have following values (regarding EIM booting): > 0 - NOR flash and 1 - ONENAND > This commit provides correct identification of the boot medium for IMX6Q > boards booting from NOR memory (MCCMON6 is one of them). > Signed-off-by: Lukasz Majewski Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2] imx6q_logic: Enable MMC booting from SPL
> The MMC booting wasn't previously fitting into the codespace. > This patch enables MMC booting from the baseboard by reducing > some DM overhead during SPL. > Signed-off-by: Adam Ford Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] pinctrl: imx: Fix select input issue
> The pinctrl supports to set any bit in input register on iMX6 if > the MSB of input value is 0xff. But the driver uses signed int for > input value, so when executing the codes below, it won't meet. > Because this is arithmetic right shift. > if (input_val >> 24 == 0xff) > Fix the issue by changing the input_val, config_val and mux_mode to u32. > Signed-off-by: Ye Li > Reviewed-by: Fugang Duan > Reviewed-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, v2, 10/11] configs: colibri_imx7: use distro defaults
> From: Stefan Agner > The defconfig already use most features implied by distro defaults. > Make sure we enable all features required by distro boot by making > use of CONFIG_DISTRO_DEFAULTS. > Signed-off-by: Stefan Agner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2,01/10] imx8qxp: add SUPPORT_SPL option
> Enable SUPPORT_SPL option for i.MX8QXP, then we could enable SPL. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2,04/10] gpio: introduce CONFIG_SPL_DM_PCA953X
> Introduce CONFIG_SPL_DM_PCA953X for SPL usage. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, 2/2] imx8mq_evk/README: remove ARCH environment variable
> There is no need to set the ARCH variable when building U-Boot. In fact, > the ARCH name in U-Boot is 'arm'. > Signed-off-by: Baruch Siach Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2,05/10] spl: imx8: add spl boot device
> Add spl_boot_device for i.MX8, also add BOOT_DEVICE_MMC2_2 for > spl_boot_mode. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, RESEND, v3, 3/8] arm: imx7s-warp: Add DT file hooks
> This patch adds DT file hooks for imx7s-warp.dtb to the warp7 and > warp7_bl33 builds. > Signed-off-by: Bryan O'Donoghue > Reviewed-by: Peng Fan > Cc: Albert Aribaud > Cc: Peng Fan > Cc: Fabio Estevam > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, v2, 03/11] configs: colibri_imx7: enable DM for raw NAND devices
> From: Stefan Agner > Use DM and device trees for raw NAND devices by default. This > fixes -74 NAND read errors since it makes sure the ECC settings > are the same as used in Linux and our downstream U-Boot. > Signed-off-by: Stefan Agner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Revert "tools: imx8image: set dcd_skip to true"
> This reverts commit f7e475db4011d18b4ae974154eb022c3af6a4d16. > This commit breaks the boot on imx8qxp evk and it should only > be re-applied after imx8qxp evk is converted to SPL. > Revert it for now, so that imx8qxp evk can be functional. > Reported-by: Breno Lima > Signed-off-by: Fabio Estevam > Reviewed-by: Peng Fan > Tested-by: Breno Lima Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] m53menlo: fix splashfile location
> After merging the boot partition into the root partition, the splashfile > resides in the /boot subdirectory: update the default environment to > reflect that. > Signed-off-by: Olaf Mandel > Reviewed-by: Marek Vasut Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot,V2,02/10] imx8: scu: use dedicated MU for SPL
> SPL runs in EL3 mode, except MU0_A, others are not powered on, > and could not be used. However normal U-Boot use MU1_A, so we > could not reuse the one in dts. And we could not replace the one > in dts with MU0_A, because MU0_A is reserved in secure world. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, v4, 1/2] Enable FEC driver to retrieve PHY address from device tree
> Currently if we have more than one phy on the MDIO bus, we do not have a > good mechanism for determining which should be used at runtime. Enable the > FEC driver to determine the address for the PHY from the device tree. > Signed-off-by: Martyn Welch > Reviewed-by: Lukasz Majewski Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Pull request: u-boot-imx u -boot-imx-20190129
Hi Tom,
please pull from u-boot-imx, thanks !
Tag: u -boot-imx-20190110
Travis: https://travis-ci.org/sbabic/u-boot-imx
The following changes since commit d01806a8fcbdaedcc67cead56ece572021d97ab7:
Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2019-01-24
15:30:48 -0500)
are available in the Git repository at:
git://www.denx.de/git/u-boot-imx.git tags/u-boot-imx-20190129
for you to fetch changes up to 6d69e535116ba9d6d3b8e4dc57cf3543301b59df:
ARM: imx6q_logic: Enable Falcon Mode and fatwrite (2019-01-28 21:11:14
+0100)
For 2019.04
Adam Ford (5):
MTD: nand: mxs_nand_spl: Fix empty function pointer for BBT
imx6q_logic: Enable MMC booting from SPL
ARM: DTS: imx6q-logicpd: Update DTS/DTSI files
ARM: imx6q_logic: Enable DM_USB and dependent regulators
ARM: imx6q_logic: Enable Falcon Mode and fatwrite
Baruch Siach (1):
imx8mq_evk/README: remove ARCH environment variable
Breno Matheus Lima (1):
imx: hab: Convert non-NULL IVT DCD pointer warning to an error
Bryan O'Donoghue (8):
arm: dts: imx7: Correct spelling mistake in GPIO name
arm: dts: imx7s-warp: Import Linux warp7 dts
arm: imx7s-warp: Add DT file hooks
arm: imx7s-warp: Convert to DM MMC initialization
arm: dts: imx7s-warp: Create alias for mmc0 to &usdhc3
warp7: defconfig: Switch on IMX7 GPIO/pinctrl for both ports
warp7: defconfig: Switch to DM for I2C
arm: imx7s-warp: Convert to DM PMIC
Fabio Estevam (4):
mx7: Do not call lcdif_power_down() in the SPL case
pico-imx7d: Add LCD support
Revert "tools: imx8image: set dcd_skip to true"
MAINTAINERS: imx: Change Fabio's email address
Heinrich Schuchardt (1):
tools: imx8image: use correct printf escape sequence
Lukasz Majewski (1):
ARM: imx: fix: Provide correct enum values for ONENAND/NOR boot
recognition
Martyn Welch (2):
Enable FEC driver to retrieve PHY address from device tree
imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Olaf Mandel (2):
m53menlo: fix splashfile location
m53menlo: fix addmtd cmd in default environment
Patrick Bruenn (3):
mmc: fsl_esdhc: add compatible for fsl, imx53-esdhc
arm: imx: Add esdhc1/2 nodes to imx53.dtsi
dm: arm: imx: migrate cx9020 to CONFIG_DM_MMC
Peng Fan (11):
imx8qxp: add SUPPORT_SPL option
imx8: scu: use dedicated MU for SPL
arm: imx: build mach-imx for i.MX8
gpio: introduce CONFIG_SPL_DM_PCA953X
spl: imx8: add spl boot device
dts: imx8qxp-mek: introduce u-boot dtsi
imx: mkimage_fit_atf: introduce BL33_BASE_ADDR
imx: build flash.bin for i.MX8
imx8qxp: mek: default enable SPL
imx8qxp: mek: update README
imx8: cpu: restrict checking ROM passover info for revA
Stefan Agner (11):
colibri_imx7: fix boot commands
arm: dts: imx7: colibri: split dt for raw NAND and eMMC devices
configs: colibri_imx7: enable DM for raw NAND devices
configs: colibri_imx7: use separate device tree
arm: dts: imx7: colibri: add usdhci peripherals to device tree
configs: colibri_imx7: use DM_MMC
colibri_imx7: drop legacy usdhc support
configs: colibri_imx7: enable CAAM driver
configs: colibri_imx7: use DFU for NAND instead of MMC
configs: colibri_imx7: use distro defaults
configs: add default configuraiton for Colibri iMX7 with eMMC
Ye Li (4):
pinctrl: imx: Fix select input issue
imx: Fix potential lmb memory overwritten by stack
spi: mxc_spi: Fix build warning on ARM64 platforms
imx: Check the PL310 version for applying errata
MAINTAINERS| 2 +-
Makefile | 2 +-
arch/arm/Makefile | 2 +-
arch/arm/dts/Makefile | 6 +-
arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 112
arch/arm/dts/fsl-imx8qxp-mek.dts | 1 +
arch/arm/dts/imx53-cx9020.dts | 52 +-
arch/arm/dts/imx53.dtsi| 34 ++
arch/arm/dts/imx6-logicpd-baseboard.dtsi | 596
+
...{imx6qdl-logicpd.dtsi => imx6-logicpd-som.dtsi} | 232
arch/arm/dts/imx6q-logicpd.dts | 188 +++
arch/arm/dts/imx6ul-pcl063.dtsi| 173 ++
arch/arm/dts/imx6ul-phycore-segin.dts | 76 +++
arch/arm/dts/imx7-colibri-emmc.dts | 47 ++
arch/arm/dts/imx7-colibri-rawnand.dts | 46 ++
.../dts/{imx7-colibri.dts => imx7-colibri.dtsi}| 65 +--
arch/arm/dts/imx7d-pinfunc.h | 6 +-
arch/arm/dts/imx7s-warp.dts| 442 +++
arch/arm/include/asm/mach-imx/sys_proto.h | 2 +-
arch/arm/inclu
[U-Boot] [U-Boot,2/3] arm: imx: Add esdhc1/2 nodes to imx53.dtsi
> From: Patrick Bruenn > These nodes are required by CX9020 when build with CONFIG_DM_MMC=y > They are copied from Linux 4.20 > Signed-off-by: Patrick Bruenn Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [U-Boot, RESEND, v3, 8/8] arm: imx7s-warp: Convert to DM PMIC
> This patch converts the warp7 and warp7_bl33 board ports over to using the > DM PMIC model. > Signed-off-by: Bryan O'Donoghue > Reviewed-by: Peng Fan > Cc: Peng Fan > Cc: Fabio Estevam > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/2] imx8mq_evk/README: remove ARCH environment variable
Hi Stefano,
On Wed, Jan 30, 2019 at 10:40:19AM +0200, sba...@denx.de wrote:
> > There is no need to set the ARCH variable when building U-Boot. In fact,
> > the ARCH name in U-Boot is 'arm'.
> > Signed-off-by: Baruch Siach
>
> Applied to u-boot-imx, master, thanks !
Thanks.
What about patch #1 in this series? It fixes build failure when /bin/sh is not
bash.
baruch
--
http://baruch.siach.name/blog/ ~. .~ Tk Open Systems
=}ooO--U--Ooo{=
- bar...@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
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[U-Boot] [PATCH u-boot] MAINTAINERS: Add Amlogic entry
Add entry for Amlogic SoC maintained files and the freshly created mailing-list. Signed-off-by: Neil Armstrong --- MAINTAINERS | 22 ++ 1 file changed, 22 insertions(+) Notice for members of linux-amlogic mailing list, I will stop CC this list and CC the new u-boot-amlo...@groups.io dedicated for U-Boot development. You can subscribe at https://groups.io/g/u-boot-amlogic diff --git a/MAINTAINERS b/MAINTAINERS index 33f1127e50..5eed16d2f5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -91,6 +91,28 @@ S: Maintainted T: git git://git.denx.de/u-boot-socfpga.git F: arch/arm/mach-socfpga/ +ARM AMLOGIC SOC SUPPORT +M: Neil Armstrong +S: Maintained +L: u-boot-amlo...@groups.io +T: git git://git.denx.de/u-boot-amlogic.git +F: arch/arm/mach-meson/ +F: arch/arm/include/asm/arch-meson/ +F: drivers/clk/clk_meson* +F: drivers/serial/serial_meson.c +F: drivers/reset/reset-meson.c +F: drivers/i2c/meson_i2c.c +F: drivers/net/phy/meson-gxl.c +F: drivers/adc/meson-saradc.c +F: drivers/phy/meson* +F: drivers/mmc/meson_gx_mmc.c +F: drivers/spi/meson_spifc.c +F: drivers/pinctrl/meson/ +F: drivers/power/domain/meson-gx-pwrc-vpu.c +F: drivers/video/meson/ +F: include/configs/meson64.h +N: meson + ARM ATMEL AT91 M: Andreas Bießmann S: Maintained -- 2.20.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] x86: Add efi runtime reset
On 30.01.19 00:48, Heinrich Schuchardt wrote:
> On 1/30/19 12:15 AM, Alexander Graf wrote:
>>
>>
>> On 30.01.19 00:08, Heinrich Schuchardt wrote:
>>> On 1/28/19 4:42 PM, Alexander Graf wrote:
Our selftest will soon test the actual runtime reset function rather than
the boot time one. For this, we need to ensure that the runtime version
actually succeeds on x86 to keep our travis tests work.
So this patch implements an x86 runtime reset function. It is missing
shutdown functionality today, but OSs usually implement that via ACPI
and this function does more than the stub from before, so it's at least
an improvement.
Signed-off-by: Alexander Graf
---
drivers/sysreset/sysreset_x86.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/sysreset/sysreset_x86.c
b/drivers/sysreset/sysreset_x86.c
index 20b958cfd4..efed45ccb7 100644
--- a/drivers/sysreset/sysreset_x86.c
+++ b/drivers/sysreset/sysreset_x86.c
@@ -10,6 +10,29 @@
#include
#include
#include
+#include
+
+#ifdef CONFIG_EFI_LOADER
+void __efi_runtime EFIAPI efi_reset_system(
+ enum efi_reset_type reset_type,
+ efi_status_t reset_status,
+ unsigned long data_size, void *reset_data)
+{
+ u32 value = 0;
+
+ if (reset_type == EFI_RESET_COLD)
+ value = SYS_RST | RST_CPU | FULL_RST;
+ else if (reset_type == EFI_RESET_WARM)
+ value = SYS_RST | RST_CPU;
+
+ /* TODO EFI_RESET_PLATFORM_SPECIFIC and EFI_RESET_SHUTDOWN */
+
+ if (value)
+ outb(value, IO_PORT_RESET);
>>>
>>> This does not look ACPI compliant. Shouldn't we read the ACPI table to
>>> identify the reset register?
>>
>> There are about 500 different ways to reset the system, CPU, something
>> on x86. I don't think U-Boot should do anything with ACPI. It's an ACPI
>> producer, not an ACPI consumer.
>>
>>> When we do the reset CPUs in several sockets may be running multiple
>>> cores each. Are all of these stopped via this register? Or do we first
>>> have to halt all but one core before doing the reset?
>>
>> I don't know what the reset protocol dictates here. But it probably also
>> heavily depends on the target platform we're looking at. IIUC this
>> particular reset is the keyboard controller one which just pulls the
>> reset line of the primary CPU socket.
>>
>> I am not aware of any multi-socket targets that U-Boot supports, so it
>> should work in all of today's cases?
>>
>> Realistically, I would not expect anyone to care too much about U-Boot
>> on multi-socket (x86) systems :).
>
> Your code resembles loosely BOOT_CF9_SAFE in
> native_machine_emergency_restart() in Linux arch/x86/kernel/reboot.c
> which is tried before using the keyboard controller as last resort.
>
> u8 reboot_code = reboot_mode == REBOOT_WARM ? 0x06 : 0x0E;
> u8 cf9 = inb(0xcf9) & ~reboot_code;
> outb(cf9|2, 0xcf9); /* Request hard reset */
> udelay(50);
> /* Actually do the reset */
> outb(cf9|reboot_code, 0xcf9);
> udelay(50);
>
> So the Kernel first switches bit 2 off and bit 1 on, waits, and then
> switches bit 2 on, cf.
> http://smackerelofopinion.blogspot.com/2011/02/resetting-pc-using-reset-control.html
>
> Shouldn't we do it the same way as the Kernel does it?
Not sure, I really just copied the existing code ;). I guess I should
make that more obvious by not duplicating, but calling it.
Alex
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Re: [U-Boot] [PATCH v4 1/9] sunxi: clk: enable clk and reset for CCU devices
On Tue, 29 Jan 2019 23:56:44 +0530
Jagan Teki wrote:
Hi,
> On Tue, Jan 29, 2019 at 11:47 PM Andre Przywara
> wrote:
> >
> > On Tue, 29 Jan 2019 23:40:26 +0530
> > Jagan Teki wrote:
> >
> > > On Tue, Jan 29, 2019 at 9:25 PM Andre Przywara
> > > wrote:
> > > >
> > > > Some Allwinner clock devices have parent clocks and reset gates
> > > > itself, which need to be activated for them to work.
> > > >
> > > > Add some code to just assert all resets and enable all clocks
> > > > given. This should enable the A80 MMC config clock, which
> > > > requires both to be activated. The full CCU devices typically
> > > > don't require resets, and have just fixed clocks as their
> > > > parents. Since we treat both as optional and enabling fixed
> > > > clocks is a NOP, this works for all cases, without the need to
> > > > differentiate between those clock types.
> > > >
> > > > Signed-off-by: Andre Przywara
> > > > ---
> > > > drivers/clk/sunxi/clk_sunxi.c | 12
> > > > 1 file changed, 12 insertions(+)
> > > >
> > > > diff --git a/drivers/clk/sunxi/clk_sunxi.c
> > > > b/drivers/clk/sunxi/clk_sunxi.c index 62ce2994e4..6d4aeb5315
> > > > 100644 --- a/drivers/clk/sunxi/clk_sunxi.c
> > > > +++ b/drivers/clk/sunxi/clk_sunxi.c
> > > > @@ -8,6 +8,7 @@
> > > > #include
> > > > #include
> > > > #include
> > > > +#include
> > > > #include
> > > > #include
> > > > #include
> > > > @@ -61,6 +62,9 @@ struct clk_ops sunxi_clk_ops = {
> > > > int sunxi_clk_probe(struct udevice *dev)
> > > > {
> > > > struct ccu_priv *priv = dev_get_priv(dev);
> > > > + struct clk_bulk clk_bulk;
> > > > + struct reset_ctl_bulk rst_bulk;
> > > > + int ret;
> > > >
> > > > priv->base = dev_read_addr_ptr(dev);
> > > > if (!priv->base)
> > > > @@ -70,5 +74,13 @@ int sunxi_clk_probe(struct udevice *dev)
> > > > if (!priv->desc)
> > > > return -EINVAL;
> > > >
> > > > + ret = clk_get_bulk(dev, &clk_bulk);
> > > > + if (!ret)
> > > > + clk_enable_bulk(&clk_bulk);
> > > > +
> > > > + ret = reset_get_bulk(dev, &rst_bulk);
> > > > + if (!ret)
> > > > + reset_deassert_bulk(&rst_bulk);
> > > > +
> > >
> > > Can't we do this locally to clk_a80 probe?
> >
> > That's the point: there is no such thing. For all SoCs we use the
> > shared sunxi_clk_probe() function. Doing this only for the A80
> > would mean to split this up, which is duplicating a lot of code for
> > very little effect. The code here just enables every clock and
> > reset given, which is generic and should always be the right
> > thing.
>
> But enable and dessert of clock and reset is job respective IP driver
> isn't it?
Which IP driver are you thinking about? This is "the IP driver"
for those clock, isn't it?
So you could come up with a completely separate driver for this tiny
A80 MMC config clock, and would find that this is actually almost the
same as the "big" CCU driver (just gates and resets). That's why this
idea of piggy backing on what we already have, just adding the clock
enablement and reset deasserting, which doesn't hurt the "big" driver.
Cheers,
Andre.
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Re: [U-Boot] [PATCH v4 1/9] sunxi: clk: enable clk and reset for CCU devices
On Wed, Jan 30, 2019 at 4:04 PM Andre Przywara wrote:
>
> On Tue, 29 Jan 2019 23:56:44 +0530
> Jagan Teki wrote:
>
> Hi,
>
> > On Tue, Jan 29, 2019 at 11:47 PM Andre Przywara
> > wrote:
> > >
> > > On Tue, 29 Jan 2019 23:40:26 +0530
> > > Jagan Teki wrote:
> > >
> > > > On Tue, Jan 29, 2019 at 9:25 PM Andre Przywara
> > > > wrote:
> > > > >
> > > > > Some Allwinner clock devices have parent clocks and reset gates
> > > > > itself, which need to be activated for them to work.
> > > > >
> > > > > Add some code to just assert all resets and enable all clocks
> > > > > given. This should enable the A80 MMC config clock, which
> > > > > requires both to be activated. The full CCU devices typically
> > > > > don't require resets, and have just fixed clocks as their
> > > > > parents. Since we treat both as optional and enabling fixed
> > > > > clocks is a NOP, this works for all cases, without the need to
> > > > > differentiate between those clock types.
> > > > >
> > > > > Signed-off-by: Andre Przywara
> > > > > ---
> > > > > drivers/clk/sunxi/clk_sunxi.c | 12
> > > > > 1 file changed, 12 insertions(+)
> > > > >
> > > > > diff --git a/drivers/clk/sunxi/clk_sunxi.c
> > > > > b/drivers/clk/sunxi/clk_sunxi.c index 62ce2994e4..6d4aeb5315
> > > > > 100644 --- a/drivers/clk/sunxi/clk_sunxi.c
> > > > > +++ b/drivers/clk/sunxi/clk_sunxi.c
> > > > > @@ -8,6 +8,7 @@
> > > > > #include
> > > > > #include
> > > > > #include
> > > > > +#include
> > > > > #include
> > > > > #include
> > > > > #include
> > > > > @@ -61,6 +62,9 @@ struct clk_ops sunxi_clk_ops = {
> > > > > int sunxi_clk_probe(struct udevice *dev)
> > > > > {
> > > > > struct ccu_priv *priv = dev_get_priv(dev);
> > > > > + struct clk_bulk clk_bulk;
> > > > > + struct reset_ctl_bulk rst_bulk;
> > > > > + int ret;
> > > > >
> > > > > priv->base = dev_read_addr_ptr(dev);
> > > > > if (!priv->base)
> > > > > @@ -70,5 +74,13 @@ int sunxi_clk_probe(struct udevice *dev)
> > > > > if (!priv->desc)
> > > > > return -EINVAL;
> > > > >
> > > > > + ret = clk_get_bulk(dev, &clk_bulk);
> > > > > + if (!ret)
> > > > > + clk_enable_bulk(&clk_bulk);
> > > > > +
> > > > > + ret = reset_get_bulk(dev, &rst_bulk);
> > > > > + if (!ret)
> > > > > + reset_deassert_bulk(&rst_bulk);
> > > > > +
> > > >
> > > > Can't we do this locally to clk_a80 probe?
> > >
> > > That's the point: there is no such thing. For all SoCs we use the
> > > shared sunxi_clk_probe() function. Doing this only for the A80
> > > would mean to split this up, which is duplicating a lot of code for
> > > very little effect. The code here just enables every clock and
> > > reset given, which is generic and should always be the right
> > > thing.
> >
> > But enable and dessert of clock and reset is job respective IP driver
> > isn't it?
>
> Which IP driver are you thinking about? This is "the IP driver"
> for those clock, isn't it?
IP can be any peripheral like USB, MMC, UART and it those drivers job
to get and enable the clock isn't it?
I assume this code would do the same thing what these peripheral driver do?
> > > > > + ret = clk_get_bulk(dev, &clk_bulk);
> > > > > + if (!ret)
> > > > > + clk_enable_bulk(&clk_bulk);
> > > > > +
> > > > > + ret = reset_get_bulk(dev, &rst_bulk);
> > > > > + if (!ret)
> > > > > + reset_deassert_bulk(&rst_bulk);
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[U-Boot] [PATCH v3 2/2] efi_loader: Patch non-runtime code out at ExitBootServices already
While discussing something compeltely different, Ard pointed out
that it might be legal to omit calling SetVirtualAddressMap altogether.
There is even a patch on the Linux Kernel Mailing List that implements
such behavior by now:
https://patchwork.kernel.org/patch/10782393/
While that sounds great, we currently rely on the SetVirtualAddressMap
call to remove all references to code that would not workoutside of
boot services.
So let's patch out those bits already on the call to ExitBootServices,
so that we can successfully run even when an OS chooses to omit
any call to SetVirtualAddressMap.
Reported-by: Ard Biesheuvel
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Add missing icache invalidation
v2 -> v3:
- Add link to upstream Linux patch
---
include/efi_loader.h | 2 ++
lib/efi_loader/efi_boottime.c | 1 +
lib/efi_loader/efi_runtime.c | 29 -
3 files changed, 23 insertions(+), 9 deletions(-)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 9dd933dae7..2a40b09693 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -310,6 +310,8 @@ void efi_save_gd(void);
void efi_restore_gd(void);
/* Call this to relocate the runtime section to an address space */
void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
+/* Call this when we start to live in a runtime only world */
+void efi_runtime_detach(ulong offset);
/* Call this to set the current device name */
void efi_set_bootdev(const char *dev, const char *devnr, const char *path);
/* Add a new object to the object list. */
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index fc26d6adc1..8cb2979bab 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -1917,6 +1917,7 @@ static efi_status_t EFIAPI
efi_exit_boot_services(efi_handle_t image_handle,
bootm_disable_interrupts();
/* Disable boot time services */
+ efi_runtime_detach((ulong)gd->relocaddr);
systab.con_in_handle = NULL;
systab.con_in = NULL;
systab.con_out_handle = NULL;
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 636dfdab39..17d22d429e 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -276,16 +276,12 @@ struct efi_runtime_detach_list_struct {
void *patchto;
};
-static const struct efi_runtime_detach_list_struct efi_runtime_detach_list[] =
{
+static struct efi_runtime_detach_list_struct efi_runtime_detach_list[] = {
{
/* do_reset is gone */
.ptr = &efi_runtime_services.reset_system,
.patchto = efi_reset_system,
}, {
- /* invalidate_*cache_all are gone */
- .ptr = &efi_runtime_services.set_virtual_address_map,
- .patchto = &efi_unimplemented,
- }, {
/* RTC accessors are gone */
.ptr = &efi_runtime_services.get_time,
.patchto = &efi_get_time,
@@ -328,7 +324,15 @@ static bool efi_runtime_tobedetached(void *p)
return false;
}
-static void efi_runtime_detach(ulong offset)
+/**
+ * efi_runtime_detach() - Remove any dependency on non-runtime sections
+ *
+ * This function patches all remaining code to be self-sufficient inside
+ * runtime sections. Any calls to non-runtime will be removed after this.
+ *
+ * @offset:relocaddr for pre-set_v_a_space, offset to VA after
+ */
+__efi_runtime void efi_runtime_detach(ulong offset)
{
int i;
ulong patchoff = offset - (ulong)gd->relocaddr;
@@ -344,6 +348,8 @@ static void efi_runtime_detach(ulong offset)
/* Update CRC32 */
efi_update_table_header_crc32(&efi_runtime_services.hdr);
+
+invalidate_icache_all();
}
/* Relocate EFI runtime to uboot_reloc_base = offset */
@@ -430,19 +436,25 @@ void efi_runtime_relocate(ulong offset, struct
efi_mem_desc *map)
* @virtmap: virtual address mapping information
* Return: status code
*/
-static efi_status_t EFIAPI efi_set_virtual_address_map(
+static __efi_runtime efi_status_t EFIAPI efi_set_virtual_address_map(
unsigned long memory_map_size,
unsigned long descriptor_size,
uint32_t descriptor_version,
struct efi_mem_desc *virtmap)
{
+ static __efi_runtime_data bool is_patched;
int n = memory_map_size / descriptor_size;
int i;
int rt_code_sections = 0;
+ if (is_patched)
+ return EFI_INVALID_PARAMETER;
+
EFI_ENTRY("%lx %lx %x %p", memory_map_size, descriptor_size,
descriptor_version, virtmap);
+ is_patched = true;
+
/*
* TODO:
* Further down we are cheating. While really we should implement
@@ -514,8 +526,7 @@ static efi_status_t EFIAPI efi_set_virtual_address_map(
[U-Boot] [PATCH v3 1/2] x86: Add efi runtime reset
Our selftest will soon test the actual runtime reset function rather than
the boot time one. For this, we need to ensure that the runtime version
actually succeeds on x86 to keep our travis tests work.
So this patch implements an x86 runtime reset function. It is missing
shutdown functionality today, but OSs usually implement that via ACPI
and this function does more than the stub from before, so it's at least
an improvement.
Eventually we will want to have full DM functionality in runtime services.
But this fixes a travis failure and doesn't clutter the code too heavily, so
we should pull it in without the amazing new RTS DM framework.
Signed-off-by: Alexander Graf
---
v2 -> v3:
- support EFI_RESET_PLATFORM_SPECIFIC
- reuse existing x86_sysreset_request() function
---
drivers/sysreset/sysreset_x86.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c
index 20b958cfd4..009f376602 100644
--- a/drivers/sysreset/sysreset_x86.c
+++ b/drivers/sysreset/sysreset_x86.c
@@ -10,8 +10,10 @@
#include
#include
#include
+#include
-static int x86_sysreset_request(struct udevice *dev, enum sysreset_t type)
+static __efi_runtime int x86_sysreset_request(struct udevice *dev,
+ enum sysreset_t type)
{
int value;
@@ -31,6 +33,25 @@ static int x86_sysreset_request(struct udevice *dev, enum
sysreset_t type)
return -EINPROGRESS;
}
+#ifdef CONFIG_EFI_LOADER
+void __efi_runtime EFIAPI efi_reset_system(
+ enum efi_reset_type reset_type,
+ efi_status_t reset_status,
+ unsigned long data_size, void *reset_data)
+{
+ if (reset_type == EFI_RESET_COLD ||
+reset_type == EFI_RESET_PLATFORM_SPECIFIC)
+ x86_sysreset_request(NULL, SYSRESET_COLD);
+ else if (reset_type == EFI_RESET_WARM)
+ x86_sysreset_request(NULL, SYSRESET_WARM);
+
+ /* TODO EFI_RESET_SHUTDOWN */
+
+ while (1) { }
+}
+#endif
+
+
static const struct udevice_id x86_sysreset_ids[] = {
{ .compatible = "x86,reset" },
{ }
--
2.12.3
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[U-Boot] [PATCH v3 0/2] efi_loader: Patch RTS at ExitBootServices
While discussing something compeltely different, Ard pointed out that it might be legal to omit calling SetVirtualAddressMap altogether. While that sounds great, we currently rely on that call to remove all function pointers to code that we do not support outside of boot services. So let's patch out those bits already on the call to ExitBootServices, so that we can successfully run even when an OS chooses to omit any call to SetVirtualAddressMap. --- v1 -> v2: - Add missing icache invalidation - New patch: x86: Add efi runtime reset v2 -> v3: - Add link to upstream Linux patch - support EFI_RESET_PLATFORM_SPECIFIC - reuse existing x86_sysreset_request() function Alexander Graf (2): x86: Add efi runtime reset efi_loader: Patch non-runtime code out at ExitBootServices already drivers/sysreset/sysreset_x86.c | 23 ++- include/efi_loader.h| 2 ++ lib/efi_loader/efi_boottime.c | 1 + lib/efi_loader/efi_runtime.c| 29 - 4 files changed, 45 insertions(+), 10 deletions(-) -- 2.12.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/9] sunxi: clk: enable clk and reset for CCU devices
On Wed, 30 Jan 2019 16:08:14 +0530
Jagan Teki wrote:
> On Wed, Jan 30, 2019 at 4:04 PM Andre Przywara
> wrote:
> >
> > On Tue, 29 Jan 2019 23:56:44 +0530
> > Jagan Teki wrote:
> >
> > Hi,
> >
> > > On Tue, Jan 29, 2019 at 11:47 PM Andre Przywara
> > > wrote:
> > > >
> > > > On Tue, 29 Jan 2019 23:40:26 +0530
> > > > Jagan Teki wrote:
> > > >
> > > > > On Tue, Jan 29, 2019 at 9:25 PM Andre Przywara
> > > > > wrote:
> > > > > >
> > > > > > Some Allwinner clock devices have parent clocks and reset
> > > > > > gates itself, which need to be activated for them to work.
> > > > > >
> > > > > > Add some code to just assert all resets and enable all
> > > > > > clocks given. This should enable the A80 MMC config clock,
> > > > > > which requires both to be activated. The full CCU devices
> > > > > > typically don't require resets, and have just fixed clocks
> > > > > > as their parents. Since we treat both as optional and
> > > > > > enabling fixed clocks is a NOP, this works for all cases,
> > > > > > without the need to differentiate between those clock types.
> > > > > >
> > > > > > Signed-off-by: Andre Przywara
> > > > > > ---
> > > > > > drivers/clk/sunxi/clk_sunxi.c | 12
> > > > > > 1 file changed, 12 insertions(+)
> > > > > >
> > > > > > diff --git a/drivers/clk/sunxi/clk_sunxi.c
> > > > > > b/drivers/clk/sunxi/clk_sunxi.c index 62ce2994e4..6d4aeb5315
> > > > > > 100644 --- a/drivers/clk/sunxi/clk_sunxi.c
> > > > > > +++ b/drivers/clk/sunxi/clk_sunxi.c
> > > > > > @@ -8,6 +8,7 @@
> > > > > > #include
> > > > > > #include
> > > > > > #include
> > > > > > +#include
> > > > > > #include
> > > > > > #include
> > > > > > #include
> > > > > > @@ -61,6 +62,9 @@ struct clk_ops sunxi_clk_ops = {
> > > > > > int sunxi_clk_probe(struct udevice *dev)
> > > > > > {
> > > > > > struct ccu_priv *priv = dev_get_priv(dev);
> > > > > > + struct clk_bulk clk_bulk;
> > > > > > + struct reset_ctl_bulk rst_bulk;
> > > > > > + int ret;
> > > > > >
> > > > > > priv->base = dev_read_addr_ptr(dev);
> > > > > > if (!priv->base)
> > > > > > @@ -70,5 +74,13 @@ int sunxi_clk_probe(struct udevice *dev)
> > > > > > if (!priv->desc)
> > > > > > return -EINVAL;
> > > > > >
> > > > > > + ret = clk_get_bulk(dev, &clk_bulk);
> > > > > > + if (!ret)
> > > > > > + clk_enable_bulk(&clk_bulk);
> > > > > > +
> > > > > > + ret = reset_get_bulk(dev, &rst_bulk);
> > > > > > + if (!ret)
> > > > > > + reset_deassert_bulk(&rst_bulk);
> > > > > > +
> > > > >
> > > > > Can't we do this locally to clk_a80 probe?
> > > >
> > > > That's the point: there is no such thing. For all SoCs we use
> > > > the shared sunxi_clk_probe() function. Doing this only for the
> > > > A80 would mean to split this up, which is duplicating a lot of
> > > > code for very little effect. The code here just enables every
> > > > clock and reset given, which is generic and should always be
> > > > the right thing.
> > >
> > > But enable and dessert of clock and reset is job respective IP
> > > driver isn't it?
> >
> > Which IP driver are you thinking about? This is "the IP driver"
> > for those clock, isn't it?
>
> IP can be any peripheral like USB, MMC, UART and it those drivers job
> to get and enable the clock isn't it?
Yes, using the DM_CLK framework. This is what we do: the A80 MMC DT
node refers to the MMC config clock (instead of the generic CCU), and
the MMC driver doesn't care about any requirement this clock has
*itself*.
This is the responsibility of the *A80 MMC config clock driver*, which
we introduce in patch 3/9. So in *this* driver's probe function you
would need to enable the parent clocks, which is exactly what we do.
Just by re-using the existing sunxi_clk_probe() function.
> I assume this code would do the same thing what these peripheral
> driver do?
It does, it's just one layer in between.
---
A64 MMC driver A64 CCU driver fixed clock driver
sunxi_clk_probe()
clk_enable()-> (NULL)
clk_enable() -> sunxi_clk_enable()
---
A80 MMC driver A80 MMC cfg clk driver A80 CCU driver fixed clk
sunxi_clk_probe()
clk_enable() -> (NULL)
sunxi_clk_probe()
clk_enable()-> sunxi_clk_enable()
clk_enable() -> sunxi_clk_enable()
---
Hope that makes it clearer.
Cheers,
Andre.
>
> > > > > > + ret = clk_get_bulk(dev, &clk_bulk);
> > > > > > + if (!ret)
> > > > > > + clk_enable_bulk(&clk_bulk);
> > > > > > +
> > > > > > + ret = reset_get_bulk(dev, &rst_bulk);
> > > > > > + if (!ret)
> > > > > > + reset_deassert_bulk(&rst_bulk);
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Re: [U-Boot] [PATCH v2 08/22] arm: dts: Add all the imx6[q|qp|dl] sabre[auto|sd] u-boot dts[i] files
On 19-01-29 12:03:35, Tom Rini wrote: > On Tue, Jan 29, 2019 at 11:30:47AM +, Abel Vesa wrote: > > This allows us to keep the basic dts[i] files up-to-date with > > the ones in kernel, but at the same time allowing the u-boot > > to add its own properties to the existing nodes. > > > > Signed-off-by: Abel Vesa > > --- > > arch/arm/dts/imx6dl-sabreauto-u-boot.dtsi | 6 ++ > > arch/arm/dts/imx6dl-sabresd-u-boot.dtsi| 6 ++ > > arch/arm/dts/imx6q-sabreauto-u-boot.dtsi | 6 ++ > > arch/arm/dts/imx6q-sabresd-u-boot.dtsi | 6 ++ > > arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi | 23 +++ > > arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi | 14 ++ > > arch/arm/dts/imx6qdl-u-boot.dtsi | 4 ++-- > > arch/arm/dts/imx6qp-sabreauto-u-boot.dtsi | 6 ++ > > arch/arm/dts/imx6qp-sabresd-u-boot.dtsi| 6 ++ > > 9 files changed, 75 insertions(+), 2 deletions(-) > > create mode 100644 arch/arm/dts/imx6dl-sabreauto-u-boot.dtsi > > create mode 100644 arch/arm/dts/imx6dl-sabresd-u-boot.dtsi > > create mode 100644 arch/arm/dts/imx6q-sabreauto-u-boot.dtsi > > create mode 100644 arch/arm/dts/imx6q-sabresd-u-boot.dtsi > > create mode 100644 arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi > > create mode 100644 arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi > > create mode 100644 arch/arm/dts/imx6qp-sabreauto-u-boot.dtsi > > create mode 100644 arch/arm/dts/imx6qp-sabresd-u-boot.dtsi > > Since a lot of these files are just #include the main one, is there not > some rule under u_boot_dtsi_options in scripts/Makefile.lib that would > match and pick that main one up automatically? > OK, so I looked into it. The thing is, the CONFIG_SYS_SOC is not generic enough. Lets take an example. For imx6dl-sabresd.dts, in order to include the most generic one (or as you named it: 'the main one'), in this case imx6qdl-sabresd-u-boot.dtsi, the CONFIG_SYS_SOC should be set to imx6qdl instead of imx6dl. I don't know the implications if we make this rename, but this is why your suggestion doesn't work as is. So I'll keep all the files for now. > -- > Tom ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/7] armv8: fsl-layerscape: ls1043a: move SCSI_AHCI and SCSI form arch/arm/cpu/armv8/fsl-layerscape/Kconfig to arch/arm/Kconfig
remove SCSI and SCSI_AHCI configs for ls1043ardb due to no sata interface support. this changed is to fixed the ls1043ardb compile warning as fallows: = WARNING == This board does not use CONFIG_DM_SCSI. Please update the storage controller to use CONFIG_DM_SCSI before the v2019.07 release. Failure to update by the deadline may result in board removal.See doc/driver-model/MIGRATION.txt for more info. Signed-off-by: Peng Ma --- arch/arm/Kconfig | 2 +- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d6b1629a00..afc8a85602 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1221,6 +1221,7 @@ config TARGET_LS1043AQDS select BOARD_LATE_INIT select SUPPORT_SPL imply SCSI + imply SCSI_AHCI help Support for Freescale LS1043AQDS platform. @@ -1232,7 +1233,6 @@ config TARGET_LS1043ARDB select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL - imply SCSI help Support for Freescale LS1043ARDB platform. diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 01c5068ab6..7d52ed20e2 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -49,8 +49,6 @@ config ARCH_LS1043A select SYS_I2C_MXC_I2C2 select SYS_I2C_MXC_I2C3 select SYS_I2C_MXC_I2C4 - imply SCSI - imply SCSI_AHCI imply CMD_PCI config ARCH_LS1046A -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/7] configs: ls1043aqds: enable sata configs for all ls1043aqds defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1043aqds defconfigs that missing one of them or more. Support sata for all ls1043aqds defconfigs Signed-off-by: Peng Ma --- configs/ls1043aqds_lpuart_defconfig | 3 +++ configs/ls1043aqds_nand_defconfig| 3 +++ configs/ls1043aqds_nor_ddr3_defconfig| 3 +++ configs/ls1043aqds_qspi_defconfig| 3 +++ configs/ls1043aqds_sdcard_ifc_defconfig | 3 +++ configs/ls1043aqds_sdcard_qspi_defconfig | 3 +++ configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 ++ configs/ls1043aqds_tfa_defconfig | 2 ++ 8 files changed, 22 insertions(+) diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 79448129bd..c8ddbc28ab 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x6010 CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -30,6 +31,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -44,6 +46,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_SPI=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index ada225c3b6..c845b01831 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -44,6 +45,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -58,6 +60,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index e86d4196b5..3cabc68729 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x6010 CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -29,6 +30,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DM_MMC=y @@ -44,6 +46,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index d948981080..434f69c289 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x4010 CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -29,6 +30,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -39,6 +41,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index afa91e8b3a..bdbb12d302 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -44,6 +45,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -58,6 +60,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 310cb2319a..3b16f3e84f 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FI
[U-Boot] [PATCH 3/7] configs: ls1046a: enable sata configs for all ls1046a defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1046ardb and ls1046aqds defconfigs that missing one of them or more. enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK Support sata for all ls1046a defconfigs Signed-off-by: Peng Ma --- configs/ls1046aqds_SECURE_BOOT_defconfig | 3 +++ configs/ls1046aqds_lpuart_defconfig | 3 +++ configs/ls1046aqds_nand_defconfig | 3 +++ configs/ls1046aqds_qspi_defconfig | 3 +++ configs/ls1046aqds_sdcard_ifc_defconfig | 3 +++ configs/ls1046aqds_sdcard_qspi_defconfig | 3 +++ configs/ls1046ardb_emmc_defconfig | 3 +++ configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 3 +++ configs/ls1046ardb_qspi_spl_defconfig | 4 configs/ls1046ardb_sdcard_defconfig | 3 +++ configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 3 +++ 11 files changed, 34 insertions(+) diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index ae05dd150b..2a811ae627 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x6010 CONFIG_SECURE_BOOT=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y @@ -30,6 +31,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=6000.nor:2m@0x10(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y @@ -43,6 +45,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 0a8d51e43d..5b5800a9bf 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x6010 CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -31,6 +32,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -45,6 +47,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_SPI=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 9e11db7d7f..4b594d5a87 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x8200 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -37,6 +38,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -51,6 +53,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index a6bbf106e1..16fc81a46d 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x4010 CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -29,6 +30,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -40,6 +42,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index edf915fdd6..9da8fe0d4f 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -46,6 +47,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -60,6 +62,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index afb7
[U-Boot] [PATCH 4/7] configs: ls1088a: enable sata configs for all ls1088a defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1088ardb and ls1088aqds defconfigs that missing one of them or more. Support sata for all ls1088a defconfigs Signed-off-by: Peng Ma --- configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 3 +++ configs/ls1088aqds_qspi_defconfig | 3 +++ configs/ls1088aqds_sdcard_ifc_defconfig | 3 +++ configs/ls1088aqds_sdcard_qspi_defconfig | 3 +++ configs/ls1088aqds_tfa_defconfig | 17 +++-- configs/ls1088ardb_qspi_SECURE_BOOT_defconfig | 3 +++ configs/ls1088ardb_sdcard_qspi_defconfig | 3 +++ configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 14 +++--- configs/ls1088ardb_tfa_defconfig | 12 ++-- 9 files changed, 38 insertions(+), 23 deletions(-) diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 731408c13e..0254a861d8 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x2010 CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set @@ -29,6 +30,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y @@ -41,6 +43,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 1a3e74600c..9160de255d 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x2010 CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set @@ -29,6 +30,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y @@ -41,6 +43,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index b34be2eaf9..868d6e7c87 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y @@ -38,6 +39,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y @@ -51,6 +53,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index d0319a5b63..6a9577aba2 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set @@ -39,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y @@ -51,6 +53,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 857362bb01..891810a583 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -1,10 +1,11 @@ CONFIG_ARM=y CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x8200 +CONFIG_QSPI_AHB_INIT=y CONFIG_TFABOOT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_QSPI_AHB_INIT=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set @@ -17,7 +18,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y @@ -25,18 +25,18 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEF
[U-Boot] [PATCH 5/7] configs: ls208xa: enable sata configs for all ls208xa defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls208xardb and ls208xaqds defconfigs that missing one of them or more. enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK Support sata for all ls208xa defconfigs Signed-off-by: Peng Ma --- configs/ls2080aqds_SECURE_BOOT_defconfig | 3 +++ configs/ls2080aqds_nand_defconfig | 3 +++ configs/ls2080aqds_qspi_defconfig | 3 +++ configs/ls2080aqds_sdcard_defconfig | 3 +++ configs/ls2080ardb_SECURE_BOOT_defconfig | 3 +++ configs/ls2080ardb_nand_defconfig | 3 +++ configs/ls2081ardb_defconfig | 4 configs/ls2088aqds_tfa_defconfig | 9 + configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 3 +++ configs/ls2088ardb_qspi_defconfig | 3 +++ configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 18 +++--- configs/ls2088ardb_tfa_defconfig | 14 ++ 12 files changed, 46 insertions(+), 23 deletions(-) diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index d7c0db6343..5b85a94ed1 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x3010 CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y @@ -31,6 +32,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y @@ -46,6 +48,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 30b506fafc..6340c19b08 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -41,6 +42,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -53,6 +55,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 44a718e855..5c509f60be 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x2010 +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -32,6 +33,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y @@ -44,6 +46,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index d6ca28979f..9c85b8e9c0 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -40,6 +41,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y @@ -51,6 +53,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 150693b387..647edeaed7 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x3010 CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y @@ -31,6 +32,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y @@ -46,6 +48,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080
[U-Boot] [PATCH] drivers: serial: dm: Enable DM_FLAG_PRE_RELOC in SBSA pl011 uart driver
The DM_FLAG_PRE_RELOC shall be enabled in SBSA PL011 uart driver
as this driver is used in NXP based SoCs
It is necessary to have Serial console running before relocation
The !CONFIG_IS_ENABLED(OF_CONTROL) [*] check is set as "workaround"
for DM problem : 4687919684e
This flag is set if board does not support device-tree and using
platform data, In DM Model either of device tree or platform data
can be used to fetch device configuration
It is possible to use SBSA UART with CONFIG_DM_SERIAL but witout
corresponding device tree description (OF_CONTROL)
Other board/SoCs have this flag set unconditionally
Signed-off-by: Vabhav Sharma
---
drivers/serial/serial_pl01x.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 12512f6..2a5f256 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -363,9 +363,7 @@ U_BOOT_DRIVER(serial_pl01x) = {
.platdata_auto_alloc_size = sizeof(struct pl01x_serial_platdata),
.probe = pl01x_serial_probe,
.ops= &pl01x_serial_ops,
-#if !CONFIG_IS_ENABLED(OF_CONTROL)
.flags = DM_FLAG_PRE_RELOC,
-#endif
.priv_auto_alloc_size = sizeof(struct pl01x_priv),
};
--
2.7.4
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[U-Boot] [PATCH 7/7] configs: ls1021a: enable sata configs for all ls1021a defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1021a defconfigs that missing one of them or more. enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK Support sata for all ls1021a defconfigs Signed-off-by: Peng Ma --- configs/ls1021aiot_qspi_defconfig| 5 - configs/ls1021aiot_sdcard_defconfig | 5 - configs/ls1021aqds_ddr4_nor_defconfig| 4 configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 4 configs/ls1021aqds_nand_defconfig| 4 configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 4 configs/ls1021aqds_nor_defconfig | 4 configs/ls1021aqds_nor_lpuart_defconfig | 4 configs/ls1021aqds_qspi_defconfig| 4 configs/ls1021aqds_sdcard_ifc_defconfig | 4 configs/ls1021aqds_sdcard_qspi_defconfig | 4 configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 3 +++ configs/ls1021atwr_nor_lpuart_defconfig | 3 +++ configs/ls1021atwr_qspi_defconfig| 3 +++ configs/ls1021atwr_sdcard_ifc_defconfig | 3 +++ configs/ls1021atwr_sdcard_qspi_defconfig | 3 +++ 16 files changed, 59 insertions(+), 2 deletions(-) diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 0cafb5f294..c166abcdd4 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AIOT=y CONFIG_SYS_TEXT_BASE=0x4001 +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" CONFIG_MISC_INIT_R=y @@ -15,7 +16,9 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y @@ -28,6 +31,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y @@ -36,4 +40,3 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_STORAGE=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 0b15353bac..cbe1bf1186 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1021AIOT=y CONFIG_SYS_TEXT_BASE=0x8200 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" CONFIG_MISC_INIT_R=y @@ -20,7 +21,9 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y @@ -33,6 +36,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y @@ -41,4 +45,3 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_STORAGE=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index d697a0302b..296cd094a3 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x6010 +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -33,7 +34,9 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y @@ -47,6 +50,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index f485b73a8b..187c534ffc 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x6010 +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -34,7 +35,9 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y @@ -48,6 +51,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_USB=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 045ef52a0f..81701fccf0 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=
[U-Boot] [PATCH 6/7] configs: ls1012afrwy: enable sata configs for all ls1012afrwy defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1012afrwy and ls1012afrwy defconfigs that missing one of them or more. Support sata for all ls1012afrwy defconfigs Signed-off-by: Peng Ma --- configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 4 +++- configs/ls1012afrwy_qspi_defconfig | 4 +++- configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 4 +++- configs/ls1012afrwy_tfa_defconfig | 4 +++- 4 files changed, 12 insertions(+), 4 deletions(-) diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index c273dc937e..d5034b7b26 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1012AFRWY=y CONFIG_SYS_TEXT_BASE=0x4010 CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set @@ -28,7 +29,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -# CONFIG_BLK is not set +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -40,6 +41,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 85523ba2d3..6fa13b205e 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012AFRWY=y CONFIG_SYS_TEXT_BASE=0x4010 CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set @@ -29,7 +30,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -# CONFIG_BLK is not set +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -41,6 +42,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index d9020c5281..02f5dedfa2 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -5,6 +5,7 @@ CONFIG_SECURE_BOOT=y CONFIG_TFABOOT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set @@ -28,7 +29,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -# CONFIG_BLK is not set +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -40,6 +41,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 08b3692f97..1da166e43a 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x8200 CONFIG_TFABOOT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set @@ -29,7 +30,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -# CONFIG_BLK is not set +CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -41,6 +42,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/9] mmc: sunxi: Enable DM_MMC
On Wed, 30 Jan 2019 11:16:07 +0100 Tomas Novotny wrote: Hi, > On Tue, 29 Jan 2019 15:54:07 +, Andre Przywara > wrote: > > This series gathers all remaining patches we need to enable DM_MMC > > for Allwinner boards. It relies on the clock gates framework > > already merged, and adds the respective gates and resets for each > > SoC. It then teaches the sunxi MMC driver to use the clock > > framework for those reset and gates clocks. The "mod clock", > > responsible for setting the actual interface speed, is still > > handled in the MMC driver, as the DM_CLK part of that is not ready > > yet (and is not trivial). This allows to turn on DM_MMC, and gets > > rid of the doomsday warning message every Allwinner board was > > blessed with for a while. > > > > This series is available at: > > https://github.com/apritzel/u-boot/commits/sunxi-dm-gates > > I've briefly tested that branch on A83t mainlined tablet (TBS A711). > I was able to boot from SD card and eMMC. > > Just noticed that message: > MMC: Device 'mmc@1c11000': seq 1 is in use by 'mmc@1c1' > mmc@1c0f000: 0, mmc@1c1: 2, mmc@1c11000: 1 > I guess that this is the mmc1/2 renaming stuff? I think so. So is this just a warning, and it continues anyway and works? TBH, I don't like this patch 9/9 very much, I actually believe relying on this numbering scheme in /aliases is something odd and fragile. Especially since Linux (and other OSes) seem to get away without it. For MMC, can't we just enumerate them dynamically? AFAIU the MMC driver would not probe a block device successfully on an SDIO device, would it? But for the sake of having something working, I am fine with the patch, at least on a for-now basis. Cheers, Andre. > With 2019.01 I got: > MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1 > > Tomas > > > --- > > > > Jagan, can you please have a look whether this is fine? If you are > > not sure about patch 7, you can leave this one out for now. > > If you are good with it, can you merge it to sunxi/master and send > > the PR, so that it still goes into the release? > > We can then fix all the remaining issues until the release. > > > > Cheers, > > Andre. > > > > Changes in v4: > > - Add proper A80 support (special MMC config clock) > > - Add V3s support (gates and resets) > > - Fix pinmux problem when not booting via SD or eMMC > > - smaller fixes per ML discussion > > Changes for v3: > > - Handle clock via CLK framework. > > Changes for v2: > > - update the 'reset enablement' logic to do > > required SoC's > > > > Andre Przywara (5): > > sunxi: clk: enable clk and reset for CCU devices > > sunxi: clk: add MMC gates/resets > > sunxi: clk: A80: add MMC clock support > > mmc: sunxi: Add DM clk and reset support > > sunxi: board: do MMC pinmux setup for DM_MMC builds > > > > Jagan Teki (4): > > mmc: sunxi: Add remaining compatible strings > > mmc: sunxi: Add DM_MMC support for H6 > > arm: sunxi: Enable DM_MMC > > arm: dts: sunxi: Enumerate MMC2 as MMC1 > > > > arch/arm/Kconfig | 1 + > > arch/arm/dts/sunxi-u-boot.dtsi| 4 +++ > > arch/arm/mach-sunxi/Kconfig | 1 - > > board/sunxi/board.c | 15 ++ > > configs/Linksprite_pcDuino3_defconfig | 1 - > > drivers/clk/sunxi/clk_a10.c | 4 +++ > > drivers/clk/sunxi/clk_a10s.c | 3 ++ > > drivers/clk/sunxi/clk_a23.c | 6 > > drivers/clk/sunxi/clk_a31.c | 8 + > > drivers/clk/sunxi/clk_a64.c | 6 > > drivers/clk/sunxi/clk_a80.c | 32 +++- > > drivers/clk/sunxi/clk_a83t.c | 6 > > drivers/clk/sunxi/clk_h3.c| 6 > > drivers/clk/sunxi/clk_h6.c| 6 > > drivers/clk/sunxi/clk_r40.c | 8 + > > drivers/clk/sunxi/clk_sunxi.c | 12 > > drivers/clk/sunxi/clk_v3s.c | 6 > > drivers/mmc/sunxi_mmc.c | 42 > > +++ 18 files changed, 159 insertions(+), 8 > > deletions(-) > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] configs: Enable CONFIG_BLK in a few TI boards
Hi, On 25/01/19 8:24 PM, Tom Rini wrote: > On Fri, Jan 25, 2019 at 03:40:35PM +0100, Jean-Jacques Hiblot wrote: >> >> On 15/01/2019 15:28, Tom Rini wrote: >>> On Tue, Jan 08, 2019 at 06:16:31PM +0530, Faiz Abbas wrote: >>> With DM conversion completed, enable CONFIG_BLK for a few pending TI boards. Signed-off-by: Faiz Abbas Reviewed-by: Lokesh Vutla --- configs/am335x_boneblack_vboot_defconfig | 1 - configs/am335x_evm_defconfig | 1 - configs/am335x_hs_evm_defconfig | 1 - configs/am335x_hs_evm_uart_defconfig | 1 - configs/am43xx_evm_defconfig | 1 - configs/am43xx_evm_qspiboot_defconfig | 1 - configs/am43xx_evm_rtconly_defconfig | 1 - configs/am43xx_evm_usbhost_boot_defconfig | 1 - configs/am43xx_hs_evm_defconfig | 1 - configs/am57xx_evm_defconfig | 1 - configs/am57xx_hs_evm_defconfig | 1 - configs/k2g_evm_defconfig | 1 - configs/k2g_hs_evm_defconfig | 1 - 13 files changed, 13 deletions(-) >>> So, a problem with this patch is that we can't only enable CONFIG_BLK in >>> all cases, we also need to make sure that if we have MMC we have DM_MMC >>> and if we have USB we have DM_USB. This latter case is what tripped me >>> up as am43xx_evm_usbhost_boot_defconfig will have a warning with this >>> patch applied as SPL_USB_SUPPORT really requires CONFIG_USB_STORAGE >>> support and that in turn depends on either (BLK==n && DM_USB==n) or >>> (BLK==y && DM_USB==y). >> >> Maybe we should break this down. >> >> 1) k2g and am57: they already have the right options enabled. >> >> 2) am335x: the options are also present, although some are disabled in SPL >> >> 3) am43x: some configs need to be converted to DM_USB and DM_MMC first. > > Yes, submitting this as a 3 or 4 part change that goes per-SoC would be > good, and clear that you're also changing a bit more on am43xx. Thanks! > Sounds good. Will post a patch for each defconfig. Thanks, Faiz ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/3] fsl_sec: fix register layout on Layerscape architectures
From: Laurentiu Tudor
On Layerscape architectures the SEC memory map is 1MB and the
register blocks contained in it are 64KB aligned, not 4KB as
the ccsr_sec structure currently assumes. Fix the layout of
the structure for these architectures.
Signed-off-by: Laurentiu Tudor
---
include/fsl_sec.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index 16e3fcb5a1..be08a2b88b 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -121,10 +121,18 @@ typedef struct ccsr_sec {
u32 chanum_ls; /* CHA Number Register, LS */
u32 secvid_ms; /* SEC Version ID Register, MS */
u32 secvid_ls; /* SEC Version ID Register, LS */
+#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3)
+ u8 res9[0x6f020];
+#else
u8 res9[0x6020];
+#endif
u32 qilcr_ms; /* Queue Interface LIODN CFG Register, MS */
u32 qilcr_ls; /* Queue Interface LIODN CFG Register, LS */
+#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3)
+ u8 res10[0x8ffd8];
+#else
u8 res10[0x8fd8];
+#endif
} ccsr_sec_t;
#define SEC_CTPR_MS_AXI_LIODN 0x0800
--
2.17.1
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[U-Boot] [PATCH 2/3] armv8: fsl-layerscape: fix SEC QI ICID setup
From: Laurentiu Tudor
The SEC QI ICID setup in the QIIC_LS register is actually an offset
that is being added to the ICID coming from the qman portal. Setting
it with a non-zero value breaks SMMU setup as the resulting ICID is
not known. On top of that, the SEC QI ICID must match the qman portal
ICIDs in order to share the isolation context.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c | 2 +-
arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 2 +-
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h | 3 +--
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
index 0e8649427e..3bd993bebf 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
@@ -43,7 +43,7 @@ struct icid_id_table icid_tbl[] = {
SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
SET_QE_ICID(FSL_QE_STREAM_ID),
#ifdef CONFIG_FSL_CAAM
- SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+ SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 2da9adab5b..abd847b5be 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -41,7 +41,7 @@ struct icid_id_table icid_tbl[] = {
SET_ETR_ICID(FSL_ETR_STREAM_ID),
SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
#ifdef CONFIG_FSL_CAAM
- SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+ SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
index f375fe7115..e7a8801262 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
@@ -93,8 +93,7 @@ void fdt_fixup_icid(void *blob);
#define SET_SEC_QI_ICID(streamid) \
SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
- (((streamid) << 16) | (streamid)), \
- offsetof(ccsr_sec_t, qilcr_ls) + \
+ 0, offsetof(ccsr_sec_t, qilcr_ls) + \
CONFIG_SYS_FSL_SEC_ADDR, \
CONFIG_SYS_FSL_SEC_ADDR)
--
2.17.1
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[U-Boot] [PATCH 3/3] armv8: fsl-layerscape: avoid DT fixup warning
From: Laurentiu Tudor
sec_firmware reserves JR3 for it's own usage and deletes the JR3 node
from the device tree. This causes this warning to be issued when doing
the device tree fixup:
WARNING could not find node fsl,sec-v4.0-job-ring: FDT_ERR_NOTFOUND.
Fix it by excluding the device tree fixup for the JR reserved by
sec_firmware.
Signed-off-by: Laurentiu Tudor
---
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
index e7a8801262..f971af8d26 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
struct icid_id_table {
const char *compat;
@@ -98,7 +99,13 @@ void fdt_fixup_icid(void *blob);
CONFIG_SYS_FSL_SEC_ADDR)
#define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \
- SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \
+ SET_ICID_ENTRY( \
+ (CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT && \
+ (FSL_SEC_JR##jr_num##_OFFSET == \
+ SEC_JR3_OFFSET + CONFIG_SYS_FSL_SEC_OFFSET) \
+ ? NULL \
+ : "fsl,sec-v4.0-job-ring"), \
+ streamid, \
(((streamid) << 16) | (streamid)), \
offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \
CONFIG_SYS_FSL_SEC_ADDR, \
--
2.17.1
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[U-Boot] [PATCH] pci: layerscape: add option to statically allocate PCI StreamIDs
From: Laurentiu Tudor
Certain PCI scenarios have more dynamic requirements, e.g. endpoints
are "hot-plugged" later in the system lifetime. Add a Kconfig option
that allows specifying a maximum number of end-points, per PCI controller
and allocate a StreamID for each one.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 28 +
drivers/pci/pcie_layerscape_fixup.c | 38 +++
2 files changed, 66 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 2b086da79b..1d633d71a8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -571,3 +571,31 @@ config TFABOOT
help
Enabling this will make a U-Boot binary that is capable of being
booted via TFA.
+
+menuconfig FSL_PCIE_STATIC_STREAM_IDS
+ bool "Allocate PCI streamIDs statically"
+ default n
+ depends on PCIE_LAYERSCAPE
+ help
+ Statically allocate a certain number of StreamIDs for each PCI
+ controller, instead of enumerating the connected endpoints and
+ allocate a StreamID for each one. This allocation method can
+ be used in more dynamic PCI scenarios, e.g. where endpoints are
+ "hot-plugged" later in the system bringup, by statically specifying
+ a maximum number of StreamIDs expected for each PCI controller.
+
+if FSL_PCIE_STATIC_STREAM_IDS
+
+config FSL_PCIE1_STREAM_IDS_COUNT
+ default 3
+ int "Maximum number of streamIDs to allocate for PCI1 controller"
+
+config FSL_PCIE2_STREAM_IDS_COUNT
+ default 3
+ int "Maximum number of streamIDs to allocate for PCI2 controller"
+
+config FSL_PCIE3_STREAM_IDS_COUNT
+ default 3
+ int "Maximum number of streamIDs to allocate for PCI3 controller"
+
+endif
diff --git a/drivers/pci/pcie_layerscape_fixup.c
b/drivers/pci/pcie_layerscape_fixup.c
index 1a17bd98aa..32355cbf2e 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -177,6 +177,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct
ls_pcie *pcie,
static void fdt_fixup_pcie(void *blob)
{
+#if !CONFIG_FSL_PCIE_STATIC_STREAM_IDS
struct udevice *dev, *bus;
struct ls_pcie *pcie;
int streamid;
@@ -215,6 +216,43 @@ static void fdt_fixup_pcie(void *blob)
fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
streamid);
}
+#else
+ static const int streamid_cnt[] = {
+ CONFIG_FSL_PCIE1_STREAM_IDS_COUNT,
+ CONFIG_FSL_PCIE2_STREAM_IDS_COUNT,
+ CONFIG_FSL_PCIE3_STREAM_IDS_COUNT
+ };
+ struct ls_pcie *pcie;
+ int i, streamid, index;
+ pci_dev_t bdf;
+
+ list_for_each_entry(pcie, &ls_pcie_list, list) {
+ for (i = 0; i < streamid_cnt[pcie->idx]; i++) {
+ streamid = ls_pcie_next_streamid();
+ if (streamid < 0) {
+ debug("ERROR: no stream ids free\n");
+ continue;
+ }
+
+ index = ls_pcie_next_lut_index(pcie);
+ if (index < 0) {
+ debug("ERROR: no LUT indexes free\n");
+ continue;
+ }
+
+ bdf = PCI_BDF(i, 0, 0);
+ /* map PCI b.d.f to streamID in LUT */
+ ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
+ streamid);
+ /* update msi-map in device tree */
+ fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
+ streamid);
+ /* update iommu-map in device tree */
+ fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
+streamid);
+ }
+ }
+#endif /* !CONFIG_FSL_PCIE_STATIC_STREAM_IDS */
}
#endif
--
2.17.1
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[U-Boot] [PATCH 1/7] clk: stm32mp1: no more get ck_usbo_48m in device tree
Remove support of ck_usbo_48m clock node in device tree,
but force 48MHz frequency to prepare alignment
with kernel device tree.
Signed-off-by: Patrick Delaunay
---
drivers/clk/clk_stm32mp1.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index 9e9c667..e3ea29a 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -243,7 +243,6 @@ enum stm32mp1_parent_id {
_LSI,
_LSE,
_I2S_CKIN,
- _USB_PHY_48,
NB_OSC,
/* other parent source */
@@ -275,6 +274,7 @@ enum stm32mp1_parent_id {
_CK_MPU,
_CK_MCU,
_DSI_PHY,
+ _USB_PHY_48,
_PARENT_NB,
_UNKNOWN_ID = 0xff,
};
@@ -1081,7 +1081,7 @@ static ulong stm32mp1_clk_get(struct stm32mp1_clk_priv
*priv, int p)
break;
/* other */
case _USB_PHY_48:
- clock = stm32mp1_clk_get_fixed(priv, _USB_PHY_48);
+ clock = 4800;
break;
case _DSI_PHY:
{
@@ -1861,7 +1861,7 @@ static void stm32mp1_osc_init(struct udevice *dev)
[_HSE] = "clk-hse",
[_CSI] = "clk-csi",
[_I2S_CKIN] = "i2s_ckin",
- [_USB_PHY_48] = "ck_usbo_48m"};
+ };
for (i = 0; i < NB_OSC; i++) {
stm32mp1_osc_clk_init(name[i], priv, i);
--
2.7.4
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[U-Boot] [PATCH 0/7] stm32mp1: update clock driver
This serie udpates the stm32mp1 clock driver with the latest patches and prepare alignment with latest kernel device tree. This patch is applicable on the top of the serie "stm32mp1: add trusted boot with TF-A" http://patchwork.ozlabs.org/project/uboot/list/?series=88521 Patrick Delaunay (7): clk: stm32mp1: no more get ck_usbo_48m in device tree clk: stm32mp1: add IPCC clock clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR clk: stm32mp1: recalculate counter when switching freq clk: stm32mp1: add debug information dts: stm32mp1: clock tree update clk: stm32mp1: correctly handle Clock Spreading Generator arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 27 +++--- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig| 1 + doc/device-tree-bindings/clock/st,stm32mp1.txt | 10 +-- drivers/clk/clk_stm32mp1.c | 120 + include/dt-bindings/clock/stm32mp1-clks.h | 3 - 6 files changed, 124 insertions(+), 38 deletions(-) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/7] clk: stm32mp1: add IPCC clock
Add support for enable/disable of IPCC clock using AHB3 registers
Signed-off-by: Patrick Delaunay
---
drivers/clk/clk_stm32mp1.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index e3ea29a..e1477a1 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -538,6 +538,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] =
{
STM32MP1_CLK_SET_CLR(RCC_MP_AHB2ENSETR, 16, SDMMC3_K, _SDMMC3_SEL),
STM32MP1_CLK_SET_CLR(RCC_MP_AHB3ENSETR, 11, HSEM, _UNKNOWN_SEL),
+ STM32MP1_CLK_SET_CLR(RCC_MP_AHB3ENSETR, 12, IPCC, _UNKNOWN_SEL),
STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 0, GPIOA, _UNKNOWN_SEL),
STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 1, GPIOB, _UNKNOWN_SEL),
--
2.7.4
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[U-Boot] [PATCH 3/7] clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR
Remove unnecessary setbits on set/clear registers.
Avoid to deactivate HSI with HSE.
Signed-off-by: Patrick Delaunay
---
drivers/clk/clk_stm32mp1.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index e1477a1..5f2b2f1 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -1182,10 +1182,7 @@ static void stm32mp1_ls_osc_set(int enable, fdt_addr_t
rcc, u32 offset,
static void stm32mp1_hs_ocs_set(int enable, fdt_addr_t rcc, u32 mask_on)
{
- if (enable)
- setbits_le32(rcc + RCC_OCENSETR, mask_on);
- else
- setbits_le32(rcc + RCC_OCENCLRR, mask_on);
+ writel(mask_on, rcc + (enable ? RCC_OCENSETR : RCC_OCENCLRR));
}
static int stm32mp1_osc_wait(int enable, fdt_addr_t rcc, u32 offset,
@@ -1256,20 +1253,20 @@ static void stm32mp1_lsi_set(fdt_addr_t rcc, int enable)
static void stm32mp1_hse_enable(fdt_addr_t rcc, int bypass, int digbyp, int
css)
{
if (digbyp)
- setbits_le32(rcc + RCC_OCENSETR, RCC_OCENR_DIGBYP);
+ writel(RCC_OCENR_DIGBYP, rcc + RCC_OCENSETR);
if (bypass || digbyp)
- setbits_le32(rcc + RCC_OCENSETR, RCC_OCENR_HSEBYP);
+ writel(RCC_OCENR_HSEBYP, rcc + RCC_OCENSETR);
stm32mp1_hs_ocs_set(1, rcc, RCC_OCENR_HSEON);
stm32mp1_osc_wait(1, rcc, RCC_OCRDYR, RCC_OCRDYR_HSERDY);
if (css)
- setbits_le32(rcc + RCC_OCENSETR, RCC_OCENR_HSECSSON);
+ writel(RCC_OCENR_HSECSSON, rcc + RCC_OCENSETR);
}
static void stm32mp1_csi_set(fdt_addr_t rcc, int enable)
{
- stm32mp1_ls_osc_set(enable, rcc, RCC_OCENSETR, RCC_OCENR_CSION);
+ stm32mp1_hs_ocs_set(enable, rcc, RCC_OCENR_CSION);
stm32mp1_osc_wait(enable, rcc, RCC_OCRDYR, RCC_OCRDYR_CSIRDY);
}
--
2.7.4
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[U-Boot] [PATCH 4/7] clk: stm32mp1: recalculate counter when switching freq
Because stgen is initialized with HSI clock, we need to
recalculate the counter when changing frequency.
Signed-off-by: Lionel Debieve
Signed-off-by: Patrick Delaunay
---
drivers/clk/clk_stm32mp1.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index 5f2b2f1..ca98e0b 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -1471,10 +1471,15 @@ static void stgen_config(struct stm32mp1_clk_priv *priv)
rate = stm32mp1_clk_get(priv, p);
if (cntfid0 != rate) {
+ u64 counter;
+
pr_debug("System Generic Counter (STGEN) update\n");
clrbits_le32(stgenc + STGENC_CNTCR, STGENC_CNTCR_EN);
- writel(0x0, stgenc + STGENC_CNTCVL);
- writel(0x0, stgenc + STGENC_CNTCVU);
+ counter = (u64)readl(stgenc + STGENC_CNTCVL);
+ counter |= ((u64)(readl(stgenc + STGENC_CNTCVU))) << 32;
+ counter = lldiv(counter * (u64)rate, cntfid0);
+ writel((u32)counter, stgenc + STGENC_CNTCVL);
+ writel((u32)(counter >> 32), stgenc + STGENC_CNTCVU);
writel(rate, stgenc + STGENC_CNTFID0);
setbits_le32(stgenc + STGENC_CNTCR, STGENC_CNTCR_EN);
--
2.7.4
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[U-Boot] [PATCH 6/7] dts: stm32mp1: clock tree update
- Add st,digbypass on clk_hse node (needed for board rev.C)
- MLAHB/AHB max frequency increased from 200 to 209MHz, with:
- PLL3P set to 208.8MHz for MCU sub-system
- PLL3Q set to 24.57MHz for 48kHz SAI/SPI2S
- PLL3R set to 11.29MHz for 44.1kHz SAI/SPI2S
- PLL4P set to 99MHz for SDMMC and SPDIFRX
- PLL4Q set to 74.25MHz for EVAL board
Signed-off-by: Patrick Delaunay
---
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 27 +++
include/dt-bindings/clock/stm32mp1-clks.h | 3 ---
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index 4898483..70bbf66 100644
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -39,6 +39,10 @@
};
};
+&clk_hse {
+ st,digbypass;
+};
+
&uart4_pins_a {
u-boot,dm-pre-reloc;
pins1 {
@@ -68,7 +72,6 @@
u-boot,dm-pre-reloc;
};
-/* CLOCK init */
&rcc {
st,clksrc = <
CLK_MPU_PLL1P
@@ -101,7 +104,7 @@
CLK_FMC_ACLK
CLK_QSPI_ACLK
CLK_ETH_DISABLED
- CLK_SDMMC12_PLL3R
+ CLK_SDMMC12_PLL4P
CLK_DSI_DSIPLL
CLK_STGEN_HSE
CLK_USBPHY_HSE
@@ -110,7 +113,7 @@
CLK_SPI45_HSI
CLK_SPI6_HSI
CLK_I2C46_HSI
- CLK_SDMMC3_PLL3R
+ CLK_SDMMC3_PLL4P
CLK_USBO_USBPHY
CLK_ADC_CKPER
CLK_CEC_LSE
@@ -121,17 +124,17 @@
CLK_UART35_HSI
CLK_UART6_HSI
CLK_UART78_HSI
- CLK_SPDIF_PLL3Q
+ CLK_SPDIF_PLL4P
CLK_FDCAN_PLL4Q
CLK_SAI1_PLL3Q
CLK_SAI2_PLL3Q
CLK_SAI3_PLL3Q
CLK_SAI4_PLL3Q
- CLK_RNG1_CSI
- CLK_RNG2_CSI
+ CLK_RNG1_LSI
+ CLK_RNG2_LSI
CLK_LPTIM1_PCLK1
CLK_LPTIM23_PCLK3
- CLK_LPTIM45_PCLK3
+ CLK_LPTIM45_LSE
>;
/* VCO = 1300.0 MHz => P = 650 (CPU) */
@@ -148,16 +151,16 @@
u-boot,dm-pre-reloc;
};
- /* VCO = 786.4 MHz => P = 197, Q = 49, R = 98 */
+ /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
pll3: st,pll@2 {
- cfg = < 2 97 3 15 7 PQR(1,1,1) >;
- frac = < 0x9ba >;
+ cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+ frac = < 0x1a04 >;
u-boot,dm-pre-reloc;
};
- /* VCO = 508.0 MHz => P = 56, Q = 56, R = 56 */
+ /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
pll4: st,pll@3 {
- cfg = < 5 126 8 8 8 PQR(1,1,1) >;
+ cfg = < 3 98 5 7 7 PQR(1,1,1) >;
u-boot,dm-pre-reloc;
};
};
diff --git a/include/dt-bindings/clock/stm32mp1-clks.h
b/include/dt-bindings/clock/stm32mp1-clks.h
index 90ec780..4cdaf13 100644
--- a/include/dt-bindings/clock/stm32mp1-clks.h
+++ b/include/dt-bindings/clock/stm32mp1-clks.h
@@ -248,7 +248,4 @@
#define STM32MP1_LAST_CLK 232
-#define LTDC_K LTDC_PX
-#define ETHMAC_K ETHCK_K
-
#endif /* _DT_BINDINGS_STM32MP1_CLKS_H_ */
--
2.7.4
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[U-Boot] [PATCH 5/7] clk: stm32mp1: add debug information
Add support of clk dump command and
display information during probe (under CONFIG_DISPLAY_CPUINFO).
Signed-off-by: Patrick Delaunay
---
configs/stm32mp15_basic_defconfig | 1 +
configs/stm32mp15_trusted_defconfig | 1 +
drivers/clk/clk_stm32mp1.c | 83 +++--
3 files changed, 81 insertions(+), 4 deletions(-)
diff --git a/configs/stm32mp15_basic_defconfig
b/configs/stm32mp15_basic_defconfig
index 304688e..d20b2ab 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -19,6 +19,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_ADC=y
+CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/stm32mp15_trusted_defconfig
b/configs/stm32mp15_trusted_defconfig
index e905ae1..62ab010 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_ADC=y
+CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index ca98e0b..76b7b5a 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -668,8 +668,8 @@ static const u8 stm32mp1_axi_div[8] = {
1, 2, 3, 4, 4, 4, 4, 4
};
-#ifdef DEBUG
-static const char * const stm32mp1_clk_parent_name[_PARENT_NB] = {
+static const __maybe_unused
+char * const stm32mp1_clk_parent_name[_PARENT_NB] = {
[_HSI] = "HSI",
[_HSE] = "HSE",
[_CSI] = "CSI",
@@ -707,7 +707,8 @@ static const char * const
stm32mp1_clk_parent_name[_PARENT_NB] = {
[_DSI_PHY] = "DSI_PHY_PLL",
};
-static const char * const stm32mp1_clk_parent_sel_name[_PARENT_SEL_NB] = {
+static const __maybe_unused
+char * const stm32mp1_clk_parent_sel_name[_PARENT_SEL_NB] = {
[_I2C12_SEL] = "I2C12",
[_I2C35_SEL] = "I2C35",
[_I2C46_SEL] = "I2C46",
@@ -726,7 +727,6 @@ static const char * const
stm32mp1_clk_parent_sel_name[_PARENT_SEL_NB] = {
[_DSI_SEL] = "DSI",
[_ADC12_SEL] = "ADC12",
};
-#endif
static const struct stm32mp1_clk_data stm32mp1_data = {
.gate = stm32mp1_clk_gate,
@@ -1872,6 +1872,54 @@ static void stm32mp1_osc_init(struct udevice *dev)
}
}
+static void __maybe_unused stm32mp1_clk_dump(struct stm32mp1_clk_priv *priv)
+{
+ char buf[32];
+ int i, s, p;
+
+ printf("Clocks:\n");
+ for (i = 0; i < _PARENT_NB; i++) {
+ printf("- %s : %s MHz\n",
+ stm32mp1_clk_parent_name[i],
+ strmhz(buf, stm32mp1_clk_get(priv, i)));
+ }
+ printf("Source Clocks:\n");
+ for (i = 0; i < _PARENT_SEL_NB; i++) {
+ p = (readl(priv->base + priv->data->sel[i].offset) >>
+priv->data->sel[i].src) & priv->data->sel[i].msk;
+ if (p < priv->data->sel[i].nb_parent) {
+ s = priv->data->sel[i].parent[p];
+ printf("- %s(%d) => parent %s(%d)\n",
+ stm32mp1_clk_parent_sel_name[i], i,
+ stm32mp1_clk_parent_name[s], s);
+ } else {
+ printf("- %s(%d) => parent index %d is invalid\n",
+ stm32mp1_clk_parent_sel_name[i], i, p);
+ }
+ }
+}
+
+#ifdef CONFIG_CMD_CLK
+int soc_clk_dump(void)
+{
+ struct udevice *dev;
+ struct stm32mp1_clk_priv *priv;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_CLK,
+ DM_GET_DRIVER(stm32mp1_clock),
+ &dev);
+ if (ret)
+ return ret;
+
+ priv = dev_get_priv(dev);
+
+ stm32mp1_clk_dump(priv);
+
+ return 0;
+}
+#endif
+
static int stm32mp1_clk_probe(struct udevice *dev)
{
int result = 0;
@@ -1895,6 +1943,33 @@ static int stm32mp1_clk_probe(struct udevice *dev)
result = stm32mp1_clktree(dev);
#endif
+#ifndef CONFIG_SPL_BUILD
+#if defined(DEBUG)
+ /* display debug information for probe after relocation */
+ if (gd->flags & GD_FLG_RELOC)
+ stm32mp1_clk_dump(priv);
+#endif
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+ if (gd->flags & GD_FLG_RELOC) {
+ char buf[32];
+
+ printf("Clocks:\n");
+ printf("- MPU : %s MHz\n",
+ strmhz(buf, stm32mp1_clk_get(priv, _CK_MPU)));
+ printf("- MCU : %s MHz\n",
+ strmhz(buf, stm32mp1_clk_get(priv, _CK_MCU)));
+ printf("- AXI : %s MHz\n",
+ strmhz(buf, stm32mp1_clk_get(priv, _ACLK)));
+ printf("- PER : %s MHz\n",
+ strmhz(buf, stm32mp1_clk_get(priv, _CK_PER)));
+ /* DDRPHYC fat
[U-Boot] [PATCH 7/7] clk: stm32mp1: correctly handle Clock Spreading Generator
To activate the csg option, the driver need to set the bit2
of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator
of PLLn enable.
Signed-off-by: Patrick Delaunay
---
doc/device-tree-bindings/clock/st,stm32mp1.txt | 10 +-
drivers/clk/clk_stm32mp1.c | 8 +++-
2 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/doc/device-tree-bindings/clock/st,stm32mp1.txt
b/doc/device-tree-bindings/clock/st,stm32mp1.txt
index 6a9397e..ffcf8cd 100644
--- a/doc/device-tree-bindings/clock/st,stm32mp1.txt
+++ b/doc/device-tree-bindings/clock/st,stm32mp1.txt
@@ -132,15 +132,15 @@ Optional Properties:
frac = < 0x810 >;
};
st,pll@1 {
- cfg = < 1 43 1 0 0 PQR(0,1,1)>;
- csg = <10 20 1>;
+ cfg = < 1 43 1 0 0 PQR(0,1,1) >;
+ csg = < 10 20 1 >;
};
st,pll@2 {
- cfg = < 2 85 3 13 3 0>;
- csg = <10 20 SSCG_MODE_CENTER_SPREAD>;
+ cfg = < 2 85 3 13 3 0 >;
+ csg = < 10 20 SSCG_MODE_CENTER_SPREAD >;
};
st,pll@3 {
- cfg = < 2 78 4 7 9 3>;
+ cfg = < 2 78 4 7 9 3 >;
};
st,pkcs = <
CLK_STGEN_HSE
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index 76b7b5a..24859fd 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -167,6 +167,7 @@
/* used for ALL PLLNCR registers */
#define RCC_PLLNCR_PLLON BIT(0)
#define RCC_PLLNCR_PLLRDY BIT(1)
+#define RCC_PLLNCR_SSCG_CTRL BIT(2)
#define RCC_PLLNCR_DIVPEN BIT(4)
#define RCC_PLLNCR_DIVQEN BIT(5)
#define RCC_PLLNCR_DIVREN BIT(6)
@@ -1321,7 +1322,10 @@ static void pll_start(struct stm32mp1_clk_priv *priv,
int pll_id)
{
const struct stm32mp1_clk_pll *pll = priv->data->pll;
- writel(RCC_PLLNCR_PLLON, priv->base + pll[pll_id].pllxcr);
+ clrsetbits_le32(priv->base + pll[pll_id].pllxcr,
+ RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN |
+ RCC_PLLNCR_DIVREN,
+ RCC_PLLNCR_PLLON);
}
static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output)
@@ -1440,6 +1444,8 @@ static void pll_csg(struct stm32mp1_clk_priv *priv, int
pll_id, u32 *csg)
RCC_PLLNCSGR_SSCG_MODE_MASK);
writel(pllxcsg, priv->base + pll[pll_id].pllxcsgr);
+
+ setbits_le32(priv->base + pll[pll_id].pllxcr, RCC_PLLNCR_SSCG_CTRL);
}
static int set_clksrc(struct stm32mp1_clk_priv *priv, unsigned int clksrc)
--
2.7.4
___
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Re: [U-Boot] [PATCH 20/20] imx: add i.MX8MM EVK board support
Hi Peng,
> > -Original Message-
> > From: Lukasz Majewski [mailto:lu...@denx.de]
> > Sent: 2019年1月30日 7:19
> > To: Peng Fan
> > Cc: sba...@denx.de; Fabio Estevam ;
> > dl-uboot-imx ; u-boot@lists.denx.de
> > Subject: Re: [U-Boot] [PATCH 20/20] imx: add i.MX8MM EVK board
> > support
> >
> > Hi Peng,
> >
> > > Add i.MX8MM EVK board support.
> > >
> > > Add board and SoC dts
> > > Add ddr training code
> > > support SD/MMC/GPIO/PINCTRL/UART
> > >
> > > U-Boot SPL 2019.01-00148-g1179cffe66 (Jan 28 2019 - 17:37:34
> > > +0800) Normal Boot
> > > Trying to boot from MMC1
> > >
> > > U-Boot 2019.01-00148-g1179cffe66 (Jan 28 2019 - 17:37:34 +0800)
> > >
> > > CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz
> > > Reset cause: POR
> > > Model: NXP i.MX8MM EVK board
> > > DRAM: 2 GiB
> > > MMC: FSL_SDHC: 1, FSL_SDHC: 2
> > > In:serial
> > > Out: serial
> > > Err: serial
> > > DM
> >
> > You set/adjust latter in the code the fec network driver. Why it is
> > not found?
>
> I dropped network support, could add it in V2.
From the patch it seems like the ETH is fully supported, at lease from
the source code point of view.
>
> >
> > Could you also share the output of "dm tree" command?
>
> Sure.
>
> >
> > I suppose/guess that this board shall support as much as possible of
> > the DT/DM conversions?
>
> Ok.
And I would like to emphasize the need of DDR training code (as a
functions, not pair of offset and value).
Are you able to provide such code in the next version of the patch?
>
> Regards,
> Peng.
>
> >
> > > Hit any key to stop autoboot: 2
> > >
> > > Signed-off-by: Peng Fan
> > > ---
> > > arch/arm/dts/fsl-imx8mm-evk.dts| 203 +++
> > > arch/arm/dts/fsl-imx8mm.dtsi | 586
> > > arch/arm/mach-imx/imx8m/Kconfig|7 +
> > > board/freescale/imx8mm_evk/Kconfig | 12 +
> > > board/freescale/imx8mm_evk/MAINTAINERS |6 +
> > > board/freescale/imx8mm_evk/Makefile| 12 +
> > > board/freescale/imx8mm_evk/imx8mm_evk.c| 144 ++
> > > board/freescale/imx8mm_evk/lpddr4_timing.c | 1980
> > >
> > > board/freescale/imx8mm_evk/spl.c | 187 +++
> > > configs/imx8mm_evk_defconfig | 41 +
> > > include/configs/imx8mm_evk.h | 221 11 files
> > > changed, 3399 insertions(+) create mode 100644
> > > arch/arm/dts/fsl-imx8mm-evk.dts create mode 100644
> > > arch/arm/dts/fsl-imx8mm.dtsi create mode 100644
> > > board/freescale/imx8mm_evk/Kconfig create mode 100644
> > > board/freescale/imx8mm_evk/MAINTAINERS create mode 100644
> > > board/freescale/imx8mm_evk/Makefile create mode 100644
> > > board/freescale/imx8mm_evk/imx8mm_evk.c create mode 100644
> > > board/freescale/imx8mm_evk/lpddr4_timing.c create mode 100644
> > > board/freescale/imx8mm_evk/spl.c create mode 100644
> > > configs/imx8mm_evk_defconfig create mode 100644
> > > include/configs/imx8mm_evk.h
> > >
> > > diff --git a/arch/arm/dts/fsl-imx8mm-evk.dts
> > > b/arch/arm/dts/fsl-imx8mm-evk.dts new file mode 100644
> > > index 00..df409eca47
> > > --- /dev/null
> > > +++ b/arch/arm/dts/fsl-imx8mm-evk.dts
> > > @@ -0,0 +1,203 @@
> > > +// SPDX-License-Identifier: GPL-2.0+
> > > +/*
> > > + * Copyright 2019 NXP
> > > + */
> > > +
> > > +/dts-v1/;
> > > +
> > > +#include "fsl-imx8mm.dtsi"
> > > +
> > > +/ {
> > > + model = "NXP i.MX8MM EVK board";
> > > + compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
> > > +
> > > + chosen {
> > > + stdout-path = &uart2;
> > > + };
> > > +
> > > + regulators {
> > > + compatible = "simple-bus";
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > +
> > > + reg_usdhc2_vmmc: regulator-usdhc2 {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "VSD_3V3";
> > > + regulator-min-microvolt = <330>;
> > > + regulator-max-microvolt = <330>;
> > > + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > > + off-on-delay = <2>;
> > > + enable-active-high;
> > > + };
> > > + };
> > > +};
> > > +
> > > +&iomuxc {
> > > + pinctrl-names = "default";
> > > +
> > > + imx8mm-evk {
> > > + pinctrl_fec1: fec1grp {
> > > + fsl,pins = <
> > > +
> > > MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
> > > +
> > > MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
> > > +
> > > MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
> > > +
> > > MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
> > > +
> > > MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
> > > +
> > > MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
> > > +
> > > MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
> > > +
> > > MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
> > > +
> > > MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
> > > +
> > > MX8MM_IOMU
Re: [U-Boot] [PATCH 20/20] imx: add i.MX8MM EVK board support
On Wed, 30 Jan 2019 07:07:10 +
Peng Fan wrote:
> > -Original Message-
> > From: Lukasz Majewski [mailto:lu...@denx.de]
> > Sent: 2019年1月30日 14:54
> > To: Peng Fan
> > Cc: sba...@denx.de; Fabio Estevam ;
> > dl-uboot-imx ; u-boot@lists.denx.de
> > Subject: Re: [U-Boot] [PATCH 20/20] imx: add i.MX8MM EVK board
> > support
> >
> > Hi Peng,
> >
> > > > -Original Message-
> > > > From: Lukasz Majewski [mailto:lu...@denx.de]
> > > > Sent: 2019年1月30日 7:19
> > > > To: Peng Fan
> > > > Cc: sba...@denx.de; Fabio Estevam ;
> > > > dl-uboot-imx ; u-boot@lists.denx.de
> > > > Subject: Re: [U-Boot] [PATCH 20/20] imx: add i.MX8MM EVK board
> > > > support
> > > >
> > > > Hi Peng,
> > > >
> > > > > Add i.MX8MM EVK board support.
> > > > >
> > > > > Add board and SoC dts
> > > > > Add ddr training code
> > > > > support SD/MMC/GPIO/PINCTRL/UART
> > > > >
> > > > > U-Boot SPL 2019.01-00148-g1179cffe66 (Jan 28 2019 - 17:37:34
> > > > > +0800) Normal Boot
> > > > > Trying to boot from MMC1
> > > > >
> > > > > U-Boot 2019.01-00148-g1179cffe66 (Jan 28 2019 - 17:37:34
> > > > > +0800)
> > > > >
> > > > > CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz
> > > > > Reset cause: POR
> > > > > Model: NXP i.MX8MM EVK board
> > > > > DRAM: 2 GiB
> > > > > MMC: FSL_SDHC: 1, FSL_SDHC: 2
> > > > > In:serial
> > > > > Out: serial
> > > > > Err: serial
> > > > > DM
> > > >
> > > > You set/adjust latter in the code the fec network driver. Why
> > > > it is not found?
> > >
> > > I dropped network support, could add it in V2.
> >
> > From the patch it seems like the ETH is fully supported, at lease
> > from the source code point of view.
> >
> > >
> > > >
> > > > Could you also share the output of "dm tree" command?
> > >
> > > Sure.
> > >
> > > >
> > > > I suppose/guess that this board shall support as much as
> > > > possible of the DT/DM conversions?
> > >
> > > Ok.
> >
> > And I would like to emphasize the need of DDR training code (as a
> > functions, not pair of offset and value).
> >
> > Are you able to provide such code in the next version of the
> > patch?
>
> There is already common code under drivers/ddr/imx8m
Yes. Indeed there code is there.
> For the array in board file, It need ddr tool change, out of my
> knowledge.
If the code is there - why not use it for this board? In that way we
would kill two birds with one stone - the code would be tested on
"blessed" NXP's development board.
>
> Thanks,
> Peng.
>
> >
> > >
> > > Regards,
> > > Peng.
> > >
> > > >
> > > > > Hit any key to stop autoboot: 2
> > > > >
> > > > > Signed-off-by: Peng Fan
> > > > > ---
> > > > > arch/arm/dts/fsl-imx8mm-evk.dts| 203 +++
> > > > > arch/arm/dts/fsl-imx8mm.dtsi | 586
> > > > > arch/arm/mach-imx/imx8m/Kconfig|7 +
> > > > > board/freescale/imx8mm_evk/Kconfig | 12 +
> > > > > board/freescale/imx8mm_evk/MAINTAINERS |6 +
> > > > > board/freescale/imx8mm_evk/Makefile| 12 +
> > > > > board/freescale/imx8mm_evk/imx8mm_evk.c| 144 ++
> > > > > board/freescale/imx8mm_evk/lpddr4_timing.c | 1980
> > > > >
> > > > > board/freescale/imx8mm_evk/spl.c | 187 +++
> > > > > configs/imx8mm_evk_defconfig | 41 +
> > > > > include/configs/imx8mm_evk.h | 221 11
> > > > > files changed, 3399 insertions(+) create mode 100644
> > > > > arch/arm/dts/fsl-imx8mm-evk.dts create mode 100644
> > > > > arch/arm/dts/fsl-imx8mm.dtsi create mode 100644
> > > > > board/freescale/imx8mm_evk/Kconfig create mode 100644
> > > > > board/freescale/imx8mm_evk/MAINTAINERS create mode 100644
> > > > > board/freescale/imx8mm_evk/Makefile create mode 100644
> > > > > board/freescale/imx8mm_evk/imx8mm_evk.c create mode 100644
> > > > > board/freescale/imx8mm_evk/lpddr4_timing.c create mode 100644
> > > > > board/freescale/imx8mm_evk/spl.c create mode 100644
> > > > > configs/imx8mm_evk_defconfig create mode 100644
> > > > > include/configs/imx8mm_evk.h
> > > > >
> > > > > diff --git a/arch/arm/dts/fsl-imx8mm-evk.dts
> > > > > b/arch/arm/dts/fsl-imx8mm-evk.dts new file mode 100644
> > > > > index 00..df409eca47
> > > > > --- /dev/null
> > > > > +++ b/arch/arm/dts/fsl-imx8mm-evk.dts
> > > > > @@ -0,0 +1,203 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > > +/*
> > > > > + * Copyright 2019 NXP
> > > > > + */
> > > > > +
> > > > > +/dts-v1/;
> > > > > +
> > > > > +#include "fsl-imx8mm.dtsi"
> > > > > +
> > > > > +/ {
> > > > > + model = "NXP i.MX8MM EVK board";
> > > > > + compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
> > > > > +
> > > > > + chosen {
> > > > > + stdout-path = &uart2;
> > > > > + };
> > > > > +
> > > > > + regulators {
> > > > > + compatible = "simple-bus";
> > > > > + #address-cells = <1>;
> > > > > + #size-cells = <0>;
> > > > > +
> > > > > + reg
