Re: [U-Boot] [PATCH v2 1/2] wandboard: Don't use I2C speed Kconfig settings with DM_I2C

2019-05-08 Thread Anatolij Gustschin
On Wed, 8 May 2019 23:30:01 +
Trent Piepho tpie...@impinj.com wrote:
...
> diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
> index 69fbc8b690..9d7a94ff9d 100644
> --- a/board/wandboard/wandboard.c
> +++ b/board/wandboard/wandboard.c
> @@ -46,6 +46,15 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define ETH_PHY_AR8035_POWER IMX_GPIO_NR(7, 13)
>  #define REV_DETECTIONIMX_GPIO_NR(2, 28)
>  
> +/* Speed defined in Kconfig is only applicable when not using DM_I2C.  */
> +#ifdef CONFIG_DM_I2C
> +#define I2C1_SPEED_NON_DM0
> +#define I2C2_SPEED_NON_DM0
> +#else
> +#define I2C1_SPEED_NON_DMCONFIG_SYS_MXC_I2C1_SPEED
> +#define I2C2_SPEED_NON_DMCONFIG_SYS_MXC_I2C2_SPEED

Shouldn't we change this to

#ifdef CONFIG_DM_I2C
#define I2C2_SPEED_NON_DM   0
#define I2C3_SPEED_NON_DM   0
#else
#define I2C2_SPEED_NON_DM   CONFIG_SYS_MXC_I2C2_SPEED
#define I2C3_SPEED_NON_DM   CONFIG_SYS_MXC_I2C3_SPEED
#endif
...
setup_i2c(1, I2C2_SPEED_NON_DM, 0x7f, &mx6q_i2c2_pad_info);
setup_i2c(2, I2C3_SPEED_NON_DM, 0x7f, &mx6q_i2c3_pad_info);
?

Because the first argument to setup_i2c() is the bus number
which starts counting from 0, but the CONFIG_SYS_MXC_I2C*
start counting from 1. This doesn't affect the actual
configuration since the speed value is currently the same
for all buses. But it is more accurate.

--
Anatolij
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Re: [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux

2019-05-08 Thread Ang, Chee Hong
On Mon, 2019-05-06 at 22:20 -0700, chee.hong@intel.com wrote:
> From: "Ang, Chee Hong" 
> 
> Add "SYTEM_RESET" (cold reset) and "CPU_ON" (SMP) PSCI support
> for booting Linux on Stratix 10 platform.
> 
> Ang, Chee Hong (3):
>   ARM: socfpga: stratix10: Enable PSCI system reset
>   ARM: socfpga: stratix10: Enable PSCI CPU_ON
>   ARM: socfpga: stratix10: Enable PSCI support for Stratix 10
> 
>  arch/arm/mach-socfpga/Kconfig  |  9 ++-
>  arch/arm/mach-socfpga/Makefile |  3 +++
>  arch/arm/mach-socfpga/psci.c   | 56
> ++
>  3 files changed, 67 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/mach-socfpga/psci.c
> 
Hi Marek,

Any comment on this ? These PSCI patches are needed for booting Linux
on our S10 platform.

BR,
Ang
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Re: [U-Boot] [PATCH] arm: mvebu: clearfog: add MMC to SPL DT

2019-05-08 Thread Stefan Roese

On 08.05.19 16:47, Baruch Siach wrote:

This allows SPL to load the main U-Boot image from MMC once DM_MMC is
enabled.

Signed-off-by: Baruch Siach 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH] net: mvpp2: support setting hardware addresses from ethernet core

2019-05-08 Thread Stefan Roese

On 08.05.19 21:34, Matt Pelland wrote:

mvpp2 already has support for setting MAC addresses but this
functionality was not exposed to the ethernet core. This commit exposes
this functionality so that MAC address assignments stored in U-Boot's
environment are correctly applied before Linux boots.

Signed-off-by: Matt Pelland 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH v3 2/4] pci_ep: add Cadence PCIe endpoint driver

2019-05-08 Thread Simon Glass
On Sat, 27 Apr 2019 at 02:15, Ramon Fried  wrote:
>
> Add Cadence PCIe endpoint driver supporting configuration
> of header, bars and MSI for device.
>
> Signed-off-by: Ramon Fried 
> ---
>
> Changes in v3: None
>
>  .../pci_endpoint/cdns,cdns-pcie-ep.txt|  18 +
>  drivers/pci_endpoint/Kconfig  |   8 +
>  drivers/pci_endpoint/Makefile |   1 +
>  drivers/pci_endpoint/pcie-cadence-ep.c| 177 ++
>  drivers/pci_endpoint/pcie-cadence.h   | 309 ++
>  5 files changed, 513 insertions(+)
>  create mode 100644 
> doc/device-tree-bindings/pci_endpoint/cdns,cdns-pcie-ep.txt
>  create mode 100644 drivers/pci_endpoint/pcie-cadence-ep.c
>  create mode 100644 drivers/pci_endpoint/pcie-cadence.h

Reviewed-by: Simon Glass 

It would be better if you avoided the #includes in your header file.
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Re: [U-Boot] [PATCH v3 4/4] test: pci_ep: add basic pci_ep tests

2019-05-08 Thread Simon Glass
On Sat, 27 Apr 2019 at 02:15, Ramon Fried  wrote:
>
> Add basic PCI endpoint sandbox testing.
>
> Signed-off-by: Ramon Fried 
> ---
>
> Changes in v3:
> - Added more testing of sandbox driver
>
>  arch/sandbox/include/asm/test.h |  8 +
>  test/dm/Makefile|  1 +
>  test/dm/pci_ep.c| 64 +
>  3 files changed, 73 insertions(+)
>  create mode 100644 test/dm/pci_ep.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] ARM: socfpga: Fix FPGA bitstream loading code

2019-05-08 Thread Chee, Tien Fong
On Wed, 2019-05-08 at 14:55 +0200, Marek Vasut wrote:
> On 5/8/19 12:17 PM, Chee, Tien Fong wrote:
> > 
> > On Tue, 2019-05-07 at 21:44 +0200, Marek Vasut wrote:
> > > 
> > > On 5/7/19 9:43 PM, Simon Goldschmidt wrote:
> > > > 
> > > > 
> > > > 
> > > > 
> > > > On 07.05.19 21:41, Marek Vasut wrote:
> > > > > 
> > > > > 
> > > > > On 5/7/19 9:36 PM, Simon Goldschmidt wrote:
> > > > > > 
> > > > > > 
> > > > > > 
> > > > > > 
> > > > > > On 07.05.19 21:19, Marek Vasut wrote:
> > > > > > > 
> > > > > > > 
> > > > > > > According to SoCFPGA Cyclone V datasheet rev.2018.01.26
> > > > > > > page
> > > > > > > 175
> > > > > > > (Chapter 5, FPGA Manager, data register) and Arria10
> > > > > > > datasheet
> > > > > > > rev.2017.07.22 page 211 (Chapter 5.4.1.2, FPGA Manager,
> > > > > > > img_data_w
> > > > > > > register), the FPGA data register must be written with
> > > > > > > writes
> > > > > > > with
> > > > > > > non-incrementing address.
> > > > > > > 
> > > > > > > The current code increments the address in 32-byte
> > > > > > > bursts.
> > > > > > > Fix the
> > > > > > > code so it does not increment the address and writes the
> > > > > > > register
> > > > > > > repeatedly instead. >
> > > > > > > Signed-off-by: Marek Vasut 
> > > > > > > Cc: Chin Liang See 
> > > > > > > Cc: Dinh Nguyen 
> > > > > > > Cc: Simon Goldschmidt 
> > > > > > > Cc: Tien Fong Chee 
> > > > > > > ---
> > > > > > >    drivers/fpga/socfpga.c | 3 +--
> > > > > > >    1 file changed, 1 insertion(+), 2 deletions(-)
> > > > > > > 
> > > > > > > diff --git a/drivers/fpga/socfpga.c
> > > > > > > b/drivers/fpga/socfpga.c
> > > > > > > index 685957626b..6ecea771ce 100644
> > > > > > > --- a/drivers/fpga/socfpga.c
> > > > > > > +++ b/drivers/fpga/socfpga.c
> > > > > > > @@ -55,8 +55,7 @@ void fpgamgr_program_write(const void
> > > > > > > *rbf_data,
> > > > > > > size_t rbf_size)
> > > > > > >    "    cmp    %2,    #0\n"
> > > > > > >    "    beq    2f\n"
> > > > > > >    "1:    ldmia    %0!,    {r0-r7}\n"
> > > > > > > -    "    stmia    %1!,    {r0-r7}\n"
> > > > > > > -    "    sub    %1,    #32\n"
> > > > > > > +    "    stmia    %1,    {r0-r7}\n"
> > > > > > Iirc, stmia without the "!" still stores the registers to
> > > > > > different
> > > > > > addresses, it just does not change %1 any more if you leave
> > > > > > away the
> > > > > > "!"? So this would save on opcode, but not change anything?
> > > > > Uh oh, you're right. Do we have a bigger problem here then ?
> > > > > Or
> > > > > is the
> > > > > socfpga ignoring the bottom 5 bits of this register address ?
> > > > Well, bitsream programming works for me very well (we're
> > > > loading
> > > > all our
> > > > FGPAs in U-Boot from a FIT image), so maybe it's the
> > > > documentation
> > > > that
> > > > has a problem?
> > > That could indeed be, maybe someone on the CC list can take a
> > > look
> > > into
> > > it and crosscheck it with internal docs ?
> > I can't find any doc mention about "FPGA data must be written in
> > non-
> > incremting address", but i saw there is a description about
> > configuration data is buffered in a 64 deep x 32 bits wide FIFO in
> > the
> > FPGA Manager https://www.intel.com/content/dam/www/programmable/us/
> > en/p
> > dfs/literature/hb/arria-10/a10_5v4.pdf (pg. 204)
> Well yes, it's a FIFO, but is the FIFO populated by writing to a
> single
> non-incrementing address or are we supposed to write to subsequent
> incrementing addresses ?
> 
> > 
> > Based on my understand through this register fpga_mgr_fpgamgrdata
> > address map (0xFFCFE400-0xFFCFE7FF) on pg. 207 , the 256 bytes of
> > FIFO
> > buffer is mapping to above range addresses.
> 0xFFCFE7FF-0xFFCFE400 = 0x400 = 1024 Bytes , not 256 . Why ?

Finally, i have connected all scattered dot information from few
internal docs. The register fpga_mgr_fpgamgrdata is actually a space in
memory, acting like a buffer for the FPGA data. Regardless of the
programming mode, data input from this buffer is translated into a 32-
bit wide data path used by the configuration logic.

Thanks.
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Re: [U-Boot] [PATCH 2/4] ARM: dts: stm32mp: Add iwdg2 support for stm32mp157c

2019-05-08 Thread Simon Glass
On Mon, 29 Apr 2019 at 03:23, Patrice Chotard  wrote:
>
> This patch adds independent watchdog support for stm32mp157c
> in SPL.
>
> Signed-off-by: Patrice Chotard 
> ---
>
>  arch/arm/dts/stm32mp157-u-boot.dtsi | 4 
>  1 file changed, 4 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 3/4] pci_ep: add pci endpoint sandbox driver

2019-05-08 Thread Simon Glass
On Sat, 27 Apr 2019 at 02:15, Ramon Fried  wrote:
>
> Add a dummy PCI endpoint for sandbox.
> Supporting only a single function, it allows setting
> and reading header configuration.
>
> Signed-off-by: Ramon Fried 
> ---
>
> Changes in v3:
> - Added more description to commit message and kmsg
> - Removed some unused functionality that can't be
>tested.
> - Removed entries from sandbox config and added implies and select
>   to arch/Kconfig sandbox entry.
>
>  arch/Kconfig  |   2 +
>  arch/sandbox/dts/test.dts |   4 +
>  drivers/pci_endpoint/Kconfig  |   9 ++
>  drivers/pci_endpoint/Makefile |   1 +
>  drivers/pci_endpoint/sandbox-pci_ep.c | 182 ++
>  5 files changed, 198 insertions(+)
>  create mode 100644 drivers/pci_endpoint/sandbox-pci_ep.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 1/4] drivers: pci_ep: Introduce UCLASS_PCI_EP uclass

2019-05-08 Thread Simon Glass
On Sat, 27 Apr 2019 at 02:15, Ramon Fried  wrote:
>
> Introduce new UCLASS_PCI_EP class for handling PCI endpoint
> devices, allowing to set various attributes of the PCI endpoint
> device, such as:
> * configuration space header
> * BAR definitions
> * outband memory mapping
> * start/stop PCI link
>
> Signed-off-by: Ramon Fried 
>
> ---
>
> Changes in v3: None
>
>  MAINTAINERS  |   6 +
>  drivers/Kconfig  |   2 +
>  drivers/Makefile |   1 +
>  drivers/pci_endpoint/Kconfig |  17 ++
>  drivers/pci_endpoint/Makefile|   6 +
>  drivers/pci_endpoint/pci_ep-uclass.c | 211 ++
>  include/dm/uclass-id.h   |   1 +
>  include/pci_ep.h | 414 +++
>  8 files changed, 658 insertions(+)
>  create mode 100644 drivers/pci_endpoint/Kconfig
>  create mode 100644 drivers/pci_endpoint/Makefile
>  create mode 100644 drivers/pci_endpoint/pci_ep-uclass.c
>  create mode 100644 include/pci_ep.h

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 13/18] arm: K3: am654: Map common EEPROM data into SRAM scratch space

2019-05-08 Thread Lokesh Vutla


On 09/05/19 3:07 AM, Andreas Dannenberg wrote:
> The board detection scheme employed on various TI EVMs makes use of
> SRAM scratch space to share data read from an on-board EEPROM between
> the different bootloading stages. Map the associated definition that's
> used to locate this data into the SRAM scratch space we use on AM654x.
> 
> Signed-off-by: Andreas Dannenberg 
> ---
>  arch/arm/mach-k3/include/mach/am6_hardware.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h 
> b/arch/arm/mach-k3/include/mach/am6_hardware.h
> index 3343233aa3..6df7631545 100644
> --- a/arch/arm/mach-k3/include/mach/am6_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
> @@ -44,4 +44,7 @@
>  #define CTRLMMR_LOCK_KICK1   0x0100c
>  #define CTRLMMR_LOCK_KICK1_UNLOCK_VAL0xd172bc5a
>  
> +/* MCU SCRATCHPAD usage */
> +#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE

Won't HS devices fail while accessing this region? We should drop it altogether.

Thanks and regards,
Lokesh

> +
>  #endif /* __ASM_ARCH_AM6_HARDWARE_H */
> 
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Re: [U-Boot] [PATCH v1] dm: pinctrl: Remove obsolete function pinctrl_decode_pin_config_dm().

2019-05-08 Thread Simon Glass
Hi,

On Fri, 5 Apr 2019 at 05:43, Christoph Müllner
 wrote:
>
> Hi Simon,
>
> any plans to get this merged?

Yes, Kever should do it.

- Simon

>
> Thanks,
> Christoph
>
> > On 14.02.2019, at 02:54, Simon Glass  wrote:
> >
> > On Tue, 12 Feb 2019 at 18:29, Christoph Muellner
> >  wrote:
> >>
> >> This reverts commit 5ff776889212c080e3d1a33634ac904405ed6845.
> >>
> >> As noted in the comment, the function pinctrl_decode_pin_config_dm()
> >> only served as a temporary solution.
> >>
> >> Since the function has no users anymore, we can remove it again.
> >>
> >> Signed-off-by: Christoph Muellner 
> >> 
> >>
> >> ---
> >>
> >> drivers/pinctrl/pinctrl-uclass.c | 22 --
> >> include/dm/pinctrl.h | 12 
> >> 2 files changed, 34 deletions(-)
> >
> > Reviewed-by: Simon Glass 
>
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[U-Boot] [PATCH v8] rockchip: dts: rk3399: nanopi4: Use CD pin as RK_FUNC_1

2019-05-08 Thread Jagan Teki
Attaching GPIO functionality to SDMMC0_DET pin (which
does in Linux base dts) make dwmmc driver "fail to detect
the card".

  Card did not respond to voltage select!

It may be because the existing driver can't support gpio
card detection. So, change the pinctrl functionality from
RK_FUNC_GPIO to RK_FUNC_1 like other rk3399 dts does via
sdmmc_cd pin.

Add this change in -u-boot.dtsi so once we have a proper
fix or more details we may drop it this in future.

Cc: Robin Murphy 
Reviewed-by: Kever Yang 
Signed-off-by: Jagan Teki 
---
Changes for v8:
- drop pinctrl-names
- update proper commit

 arch/arm/dts/rk3399-nanopi4-u-boot.dtsi | 8 
 1 file changed, 8 insertions(+)
 create mode 100644 arch/arm/dts/rk3399-nanopi4-u-boot.dtsi

diff --git a/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi 
b/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
new file mode 100644
index 00..bb8bdf08c5
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Jagan Teki 
+ */
+
+&sdmmc {
+   pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
+};
-- 
2.18.0.321.gffc6fa0e3

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Re: [U-Boot] [PATCH 1/2] riscv: set CONFIG_SYS_BOOTM_LEN to SZ_64M

2019-05-08 Thread Rick Chen
> Subject: Re: [U-Boot] [PATCH 1/2] riscv: set CONFIG_SYS_BOOTM_LEN to
> SZ_64M
>
> On Tue, Apr 9, 2019 at 8:30 PM David Abdurachmanov
>  wrote:
> >
> > After updating Fedora/RISCV kernel to 5.1-rc3+ the size increased
> > above the current threshold. Looking into HiKey, Dragonboards, etc.
> > seems that SZ_64M is a popular option.
> >
> > This sucessfully boots Fedora/RISCV with 5.1-rc3+ kernel on QEMU 4.0
> > (master) with OpenSBI -> U-Boot (S-mode) [extlinux] -> Kernel setup.
> >
> > Signed-off-by: David Abdurachmanov 
> > ---
> >  include/configs/qemu-riscv.h | 12 ++--
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> >
>
> Reviewed-by: Bin Meng 

Applied to u-boot-riscv/master, thanks!
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Re: [U-Boot] [PATCH 2/2] riscv: qemu-riscv.h: define CONFIG_PREBOOT (enables extlinux)

2019-05-08 Thread Rick Chen
> Subject: Re: [PATCH 2/2] riscv: qemu-riscv.h: define CONFIG_PREBOOT (enables
> extlinux)
>
> On Fri, Apr 12, 2019 at 12:38 AM Auer, Lukas 
> wrote:
> >
> > On Thu, 2019-04-11 at 14:51 +0200, David Abdurachmanov wrote:
> > > On Thu, Apr 11, 2019 at 2:41 PM Auer, Lukas
> > >  wrote:
> > > > + Bin
> > > >
> > > > On Tue, 2019-04-09 at 12:42 +0200, David Abdurachmanov wrote:
> > > > - Set fdt_addr variable, which is needed for extlinux to find FDT.
> > > >   Otherwise booting kernel using extlinux results in missing FDT.
> > > >
> > > > - Also run fdt addr with FDT address so that fdt commands would
> > > >   work out of the box in U-Boot prompt.
> > >
> > > > While often useful to have, the fdt command is not used during a
> > > > normal boot. I think we should avoid calling commands, which are
> > > > not normally needed. Can you remove this from your patch?
> > >
> > > I borrowed idea from other boards, and I find it useful to have fdt
> > > working out-of-the-box without trying to figure the correct variable
> > > which holds address of FDT.
> > >
> > > I can remove it from the patch, but I will probably keep adding it
> > > as Fedora specific patch then.
> > >
> >
> > That makes sense. I would still tend towards removing it, but will
> > wait to see what everybody else thinks.
>
> Yes, I am inclined to not include "fdt addr ${fdtcontroladdr};" too.
>
> >
> > Other than that, the patch looks good to me.
> >
> > Reviewed-by: Lukas Auer 
> >
>
> Reviewed-by: Bin Meng 

Applied to u-boot-riscv/master, thanks!
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Re: [U-Boot] [PATCH v7 2/4] arm64: rockchip: dts: rk3399: Add board -u-boot.dtsi files

2019-05-08 Thread Kever Yang


On 05/08/2019 11:39 AM, Kever Yang wrote:
>
> On 05/08/2019 02:21 AM, Jagan Teki wrote:
>> Devicetree files in RK3399 platform is synced from Linux, like other
>> platforms does. Apart from these u-boot in rk3399 would also require
>> some u-boot specific node like dmc.
>>
>> dmc node has big chunk of DDR timing parameters which are specific
>> to specific board, and maintained with rk3399-sdram*.dtsi.
>>
>> So, create board specific -u-boot.dtsi files and move these sdram dtsi
>> files accordingly. This would help of maintain u-boot specific changes
>> separately without touching Linux dts(i) files which indeed easy for
>> syncing from Linux between releases.
>>
>> These board specific -u-boot.dtsi can be extendible to add more u-boot
>> specific nodes or properties in future.
>>
>> Signed-off-by: Jagan Teki 
>
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>  arch/arm/dts/rk3399-evb-u-boot.dtsi | 6 ++
>>  arch/arm/dts/rk3399-evb.dts | 1 -
>>  arch/arm/dts/rk3399-ficus-u-boot.dtsi   | 6 ++
>>  arch/arm/dts/rk3399-ficus.dts   | 1 -
>>  arch/arm/dts/rk3399-firefly-u-boot.dtsi | 6 ++
>>  arch/arm/dts/rk3399-firefly.dts | 1 -
>>  arch/arm/dts/rk3399-gru-bob-u-boot.dtsi | 6 ++
>>  arch/arm/dts/rk3399-gru-bob.dts | 1 -
>>  arch/arm/dts/rk3399-rock960-u-boot.dtsi | 6 ++
>>  arch/arm/dts/rk3399-rock960.dts | 1 -
>>  10 files changed, 30 insertions(+), 5 deletions(-)
>>  create mode 100644 arch/arm/dts/rk3399-evb-u-boot.dtsi
>>  create mode 100644 arch/arm/dts/rk3399-ficus-u-boot.dtsi
>>  create mode 100644 arch/arm/dts/rk3399-firefly-u-boot.dtsi
>>  create mode 100644 arch/arm/dts/rk3399-gru-bob-u-boot.dtsi
>>  create mode 100644 arch/arm/dts/rk3399-rock960-u-boot.dtsi
>>
>> diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-evb-u-boot.dtsi
>> new file mode 100644
>> index 00..7e2c57af22
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
>> @@ -0,0 +1,6 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Jagan Teki 
>> + */
>> +
>> +#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
>> diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
>> index 9162f3dd50..a506e8da37 100644
>> --- a/arch/arm/dts/rk3399-evb.dts
>> +++ b/arch/arm/dts/rk3399-evb.dts
>> @@ -7,7 +7,6 @@
>>  #include 
>>  #include 
>>  #include "rk3399.dtsi"
>> -#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
>>  
>>  / {
>>  model = "Rockchip RK3399 Evaluation Board";
>> diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
>> new file mode 100644
>> index 00..eab86bdb30
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
>> @@ -0,0 +1,6 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Jagan Teki 
>> + */
>> +
>> +#include "rk3399-sdram-ddr3-1600.dtsi"
>> diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts
>> index 4af0e4e383..4b2dd82b67 100644
>> --- a/arch/arm/dts/rk3399-ficus.dts
>> +++ b/arch/arm/dts/rk3399-ficus.dts
>> @@ -8,7 +8,6 @@
>>  
>>  /dts-v1/;
>>  #include "rk3399-rock960.dtsi"
>> -#include "rk3399-sdram-ddr3-1600.dtsi"
>>  
>>  / {
>>  model = "96boards RK3399 Ficus";
>> diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
>> new file mode 100644
>> index 00..eab86bdb30
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
>> @@ -0,0 +1,6 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Jagan Teki 
>> + */
>> +
>> +#include "rk3399-sdram-ddr3-1600.dtsi"
>> diff --git a/arch/arm/dts/rk3399-firefly.dts 
>> b/arch/arm/dts/rk3399-firefly.dts
>> index 46f2ffaf8d..a4cb64f8bd 100644
>> --- a/arch/arm/dts/rk3399-firefly.dts
>> +++ b/arch/arm/dts/rk3399-firefly.dts
>> @@ -7,7 +7,6 @@
>>  #include 
>>  #include 
>>  #include "rk3399.dtsi"
>> -#include "rk3399-sdram-ddr3-1600.dtsi"
>>  
>>  / {
>>  model = "Firefly-RK3399 Board";
>> diff --git a/arch/arm/dts/rk3399-gru-bob-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-gru-bob-u-boot.dtsi
>> new file mode 100644
>> index 00..9edb8cf841
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3399-gru-bob-u-boot.dtsi
>> @@ -0,0 +1,6 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Jagan Teki 
>> + */
>> +
>> +#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi"
>> diff --git a/arch/arm/dts/rk3399-gru-bob.dts 
>> b/arch/arm/dts/rk3399-gru-bob.dts
>> index 0e3d91fc28..1ee0dc0d9f 100644
>> --- a/arch/arm/dts/rk3399-gru-bob.dts
>> +++ b/arch/arm/dts/rk3399-gru-bob.dts
>> @@ -7,7 +7,6 @@
>>  
>>  /dts-v1/;
>>  #include "rk3399-gru-chromebook.dtsi"
>> -#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi"
>>  
>>  / {
>>  model = "Google Bob";
>> diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
>> new file mode 100644
>> index 00

Re: [U-Boot] [PATCH v7 4/4] arm64: rockchip: dts: rk3399: Use rk3399-u-boot.dtsi

2019-05-08 Thread Kever Yang


On 05/08/2019 11:39 AM, Kever Yang wrote:
>
> On 05/08/2019 02:21 AM, Jagan Teki wrote:
>> Now we have
>> - board specific -u-boot.dtsi files for board specific u-boot
>>   dts changes.
>> - soc specific rk3399-u-boot.dtsi for soc specific u-boot
>>   dts changes.
>>
>> So, include the rk3399-u-boot-dtsi on respective board -u-boot.dtsi
>> and drop the properties which are globally available in rk3399-u-boot.dtsi
>>
>> Right now rk3399-u-boot.dtsi has sdmmc, spi1 u-boot,dm-pre-reloc
>> property and more properties and nodes can be move further based
>> on the requirements.
>>
>> This would fix, the -u-boot.dtsi inclusion for evb, firefly, puma
>> boards that was accidentally merged on below commit.
>> "rockchip: dts: rk3399: Create initial rk3399-u-boot.dtsi"
>> (sha1: e05b4a4fa84b65a0c8873e8f34721741fe2bc09d)
>>
>> Signed-off-by: Jagan Teki 
>
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>  arch/arm/dts/rk3399-evb-u-boot.dtsi | 1 +
>>  arch/arm/dts/rk3399-firefly-u-boot.dtsi | 1 +
>>  arch/arm/dts/rk3399-gru-bob-u-boot.dtsi | 1 +
>>  arch/arm/dts/rk3399-gru-u-boot.dtsi | 6 ++
>>  arch/arm/dts/rk3399-gru.dtsi| 1 -
>>  arch/arm/dts/rk3399-puma-ddr1600.dts| 1 +
>>  arch/arm/dts/rk3399-puma.dtsi   | 2 --
>>  7 files changed, 10 insertions(+), 3 deletions(-)
>>  create mode 100644 arch/arm/dts/rk3399-gru-u-boot.dtsi
>>
>> diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-evb-u-boot.dtsi
>> index 7e2c57af22..20910e744b 100644
>> --- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
>> @@ -3,4 +3,5 @@
>>   * Copyright (C) 2019 Jagan Teki 
>>   */
>>  
>> +#include "rk3399-u-boot.dtsi"
>>  #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
>> diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
>> index eab86bdb30..67b63a8352 100644
>> --- a/arch/arm/dts/rk3399-firefly-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
>> @@ -3,4 +3,5 @@
>>   * Copyright (C) 2019 Jagan Teki 
>>   */
>>  
>> +#include "rk3399-u-boot.dtsi"
>>  #include "rk3399-sdram-ddr3-1600.dtsi"
>> diff --git a/arch/arm/dts/rk3399-gru-bob-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-gru-bob-u-boot.dtsi
>> index 9edb8cf841..726f396f32 100644
>> --- a/arch/arm/dts/rk3399-gru-bob-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-gru-bob-u-boot.dtsi
>> @@ -3,4 +3,5 @@
>>   * Copyright (C) 2019 Jagan Teki 
>>   */
>>  
>> +#include "rk3399-gru-u-boot.dtsi"
>>  #include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi"
>> diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-gru-u-boot.dtsi
>> new file mode 100644
>> index 00..7bddc3acdb
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
>> @@ -0,0 +1,6 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Jagan Teki 
>> + */
>> +
>> +#include "rk3399-u-boot.dtsi"
>> diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
>> index 4cdb4320b7..ca0fc391b2 100644
>> --- a/arch/arm/dts/rk3399-gru.dtsi
>> +++ b/arch/arm/dts/rk3399-gru.dtsi
>> @@ -545,7 +545,6 @@ ap_i2c_audio: &i2c8 {
>>  
>>  &spi1 {
>>  status = "okay";
>> -u-boot,dm-pre-reloc;
>>  
>>  pinctrl-names = "default", "sleep";
>>  pinctrl-1 = <&spi1_sleep>;
>> diff --git a/arch/arm/dts/rk3399-puma-ddr1600.dts 
>> b/arch/arm/dts/rk3399-puma-ddr1600.dts
>> index 337e0eabb4..42763f82d0 100644
>> --- a/arch/arm/dts/rk3399-puma-ddr1600.dts
>> +++ b/arch/arm/dts/rk3399-puma-ddr1600.dts
>> @@ -6,5 +6,6 @@
>>  /dts-v1/;
>>  
>>  #include "rk3399-puma.dtsi"
>> +#include "rk3399-u-boot.dtsi"
>>  #include "rk3399-sdram-ddr3-1600.dtsi"
>>  
>> diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
>> index 319a610022..897e0bda85 100644
>> --- a/arch/arm/dts/rk3399-puma.dtsi
>> +++ b/arch/arm/dts/rk3399-puma.dtsi
>> @@ -647,8 +647,6 @@
>>  
>>  
>>  &spi1 {
>> -u-boot,dm-pre-reloc;
>> -
>>  status = "okay";
>>  
>>  #address-cells = <1>;
>
>
>
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Re: [U-Boot] [PATCH v7 3/4] rockchip: dts: rk3399-u-boot: Add u-boot, dm-pre-reloc for spi1

2019-05-08 Thread Kever Yang


On 05/08/2019 11:39 AM, Kever Yang wrote:
>
> On 05/08/2019 02:21 AM, Jagan Teki wrote:
>> Add u-boot,dm-pre-reloc property for spi1, so-that the
>> subsequent rk3399 boards which boot from SPI.
>>
>> This help to separate the u-boot specific properties away
>> from base dts files so-that the Linux sync become easy and
>> meaningful.
>>
>> Signed-off-by: Jagan Teki 
>
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>  arch/arm/dts/rk3399-u-boot.dtsi | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-u-boot.dtsi
>> index f533ed95eb..0786c1193a 100644
>> --- a/arch/arm/dts/rk3399-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
>> @@ -6,3 +6,7 @@
>>  &sdmmc {
>>  u-boot,dm-pre-reloc;
>>  };
>> +
>> +&spi1 {
>> +u-boot,dm-pre-reloc;
>> +};
>
>
>
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Re: [U-Boot] [PATCH v7 1/4] dts: Makefile: Build rockchip dtbs based on SoC types【请注意,邮件由linux-rockchip-bounces+kever.yang=rock-chips....@lists.infradead.org代发】

2019-05-08 Thread Kever Yang


On 05/08/2019 11:38 AM, Kever Yang wrote:
>
> On 05/08/2019 02:21 AM, Jagan Teki wrote:
>> - Sometimes u-boot specific dtsi files are included
>>   automatically which would build for entire rockchip SoC,
>>   even-though the respective dtsi should used it for specific
>>   family of rockchip SoC.
>> - Sometimes u-boot specific dts nodes or properties can use
>>   config macros from respective rockchip family include/configs
>>   files, example CONFIG_SPL_PAD_TO.
>>
>> So, it's better to compile the dtbs based on the respective
>> rockchip family types rather than rockchip itself to avoid
>> compilation issues.
>>
>> This patch organize the existing dtb's based on the rockchip
>> family types.
>>
>> Signed-off-by: Jagan Teki 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>  arch/arm/dts/Makefile | 35 ++-
>>  1 file changed, 26 insertions(+), 9 deletions(-)
>>
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index 8e082f2840..35cbbfabd0 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -65,16 +65,23 @@ dtb-$(CONFIG_KIRKWOOD) += \
>>  dtb-$(CONFIG_ARCH_OWL) += \
>>  bubblegum_96.dtb
>>  
>> -dtb-$(CONFIG_ARCH_ROCKCHIP) += \
>> -rk3036-sdk.dtb \
>> -rk3128-evb.dtb \
>> -rk3188-radxarock.dtb \
>> -rk3229-evb.dtb \
>> +dtb-$(CONFIG_ROCKCHIP_RK3036) += \
>> +rk3036-sdk.dtb
>> +
>> +dtb-$(CONFIG_ROCKCHIP_RK3128) += \
>> +rk3128-evb.dtb
>> +
>> +dtb-$(CONFIG_ROCKCHIP_RK3188) += \
>> +rk3188-radxarock.dtb
>> +
>> +dtb-$(CONFIG_ROCKCHIP_RK322X) += \
>> +rk3229-evb.dtb
>> +
>> +dtb-$(CONFIG_ROCKCHIP_RK3288) += \
>>  rk3288-evb.dtb \
>>  rk3288-fennec.dtb \
>>  rk3288-firefly.dtb \
>>  rk3288-miqi.dtb \
>> -rk3399-orangepi.dtb \
>>  rk3288-phycore-rdk.dtb \
>>  rk3288-popmetal.dtb \
>>  rk3288-rock2-square.dtb \
>> @@ -83,22 +90,32 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
>>  rk3288-veyron-mickey.dtb \
>>  rk3288-veyron-minnie.dtb \
>>  rk3288-veyron-speedy.dtb \
>> -rk3288-vyasa.dtb \
>> -rk3328-evb.dtb \
>> -rk3399-ficus.dtb \
>> +rk3288-vyasa.dtb
>> +
>> +dtb-$(CONFIG_ROCKCHIP_RK3328) += \
>> +rk3328-evb.dtb
>> +
>> +dtb-$(CONFIG_ROCKCHIP_RK3368) += \
>>  rk3368-lion.dtb \
>>  rk3368-sheep.dtb \
>>  rk3368-geekbox.dtb \
>>  rk3368-px5-evb.dtb \
>> +
>> +dtb-$(CONFIG_ROCKCHIP_RK3399) += \
>>  rk3399-evb.dtb \
>> +rk3399-ficus.dtb \
>>  rk3399-firefly.dtb \
>>  rk3399-gru-bob.dtb \
>> +rk3399-orangepi.dtb \
>>  rk3399-puma-ddr1333.dtb \
>>  rk3399-puma-ddr1600.dtb \
>>  rk3399-puma-ddr1866.dtb \
>>  rk3399-rock960.dtb \
>> +
>> +dtb-$(CONFIG_ROCKCHIP_RV1108) += \
>>  rv1108-elgin-r1.dtb \
>>  rv1108-evb.dtb
>> +
>>  dtb-$(CONFIG_ARCH_MESON) += \
>>  meson-gxbb-nanopi-k2.dtb \
>>  meson-gxbb-odroidc2.dtb \
>
>
>
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Re: [U-Boot] [v5 PATCH] RISCV: image: Add booti support

2019-05-08 Thread Rick Chen
> From: Marek Vasut [mailto:marek.va...@gmail.com]
> Sent: Tuesday, May 07, 2019 9:11 AM
> To: Atish Patra; u-boot@lists.denx.de
> Cc: Tom Rini; Karsten Merker; Alexander Graf; Alex Kiernan; Anup Patel; Bin
> Meng; Heinrich Schuchardt; Joe Hershberger; Lukas Auer; Michal Simek; Rick
> Jian-Zhi Chen(陳建志); Simon Glass
> Subject: Re: [U-Boot] [v5 PATCH] RISCV: image: Add booti support
>
> On 5/7/19 2:49 AM, Atish Patra wrote:
> > This patch adds booti support for RISC-V Linux kernel. The existing
> > bootm method will also continue to work as it is.
> >
> > It depends on the following kernel patch which adds the header to the
> > flat Image. Gzip compressed Image (Image.gz) support is not enabled
> > with this patch.
> >
> > https://patchwork.kernel.org/patch/10925543/
> >
> > Tested on HiFive Unleashed and QEMU.
> >
> > Signed-off-by: Atish Patra 
> > Reviewed-by: Tom Rini 
> > Tested-by: Karsten Merker 
>
> Reviewed-by: Marek Vasut 
>

Applied to u-boot-riscv/master, thanks!
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[U-Boot] [PATCH] x86: Avoid writing temporary asl files into the source tree

2019-05-08 Thread Simon Glass
At present the iasl tool (Intel ACPI (Advanced Configuration and Power
Interface) Source Language compiler) is called in such a way that it uses
the source directory for its temporary files.

This means we end up with these files when building x86 boards:

   board/dfi/dfi-bt700/dsdt.aml
   board/dfi/dfi-bt700/dsdt.asl.tmp

Update the code to put temporary files in the target directory instead.

Signed-off-by: Simon Glass 
---

 scripts/Makefile.lib | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index de67677f61..6cf1382721 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -397,9 +397,10 @@ $(obj)/%_efi.so: $(obj)/%.o $(obj)/efi_crt0.o 
$(obj)/efi_reloc.o $(obj)/efi_free
 # ---
 quiet_cmd_acpi_c_asl= ASL $<
 cmd_acpi_c_asl= \
-   $(CPP) -x assembler-with-cpp -D__ASSEMBLY__ -P $(UBOOTINCLUDE) -o 
$<.tmp $<; \
-   iasl -p $< -tc $<.tmp $(if $(KBUILD_VERBOSE:1=), >/dev/null) && \
-   mv $(patsubst %.asl,%.hex,$<) $@
+   $(CPP) -x assembler-with-cpp -D__ASSEMBLY__ -P $(UBOOTINCLUDE) \
+   -o $@.tmp $< && \
+   iasl -p $@ -tc $@.tmp $(if $(KBUILD_VERBOSE:1=), >/dev/null) && \
+   mv $(patsubst %.c,%.hex,$@) $@
 
 $(obj)/dsdt.c:$(src)/dsdt.asl
$(call cmd,acpi_c_asl)
-- 
2.21.0.1020.gf2820cf01a-goog

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Re: [U-Boot] [PATCH v5 6/6] riscv: configs: add ae350_rv[32|64]_xip_defconfig to MAINTAINERS

2019-05-08 Thread Rick Chen
Hi Bin

Bin Meng  於 2019年5月9日 週四 上午10:21寫道:
>
> Hi Rick,
>
> On Thu, May 9, 2019 at 10:01 AM Rick Chen  wrote:
> >
> > Hi Bin
> >
> > Bin Meng  於 2019年5月9日 週四 上午9:32寫道:
> > >
> > > Hi Rick,
> > >
> > > On Thu, May 9, 2019 at 9:30 AM Andes  wrote:
> > > >
> > > > From: Rick Chen 
> > > >
> > > > This patch will fix Travis failure item as below:
> > > > https://travis-ci.org/rickchen36/u-boot-riscv/jobs/529605196
> > > >
> > > > Check for configs without MAINTAINERS entry
> > > >
> > > > Signed-off-by: Rick Chen 
> > > > Cc: Greentime Hu 
> > > > ---
> > > >  board/AndesTech/ax25-ae350/MAINTAINERS | 2 ++
> > > >  1 file changed, 2 insertions(+)
> > > >
> > >
> > > Please squash this one into "[PATCH v5 2/6] riscv: configs: Support
> > > AE350 SMP booting from flash flow", as they are from the same patch
> > > series, and not applied yet as of today.
> > >
> >
> > OK. I will squash into [PATCH v5 2/6].
> >
> > After that shall I prepare v6 for review, or I can just apply into
> > u-boot-riscv tree ?
>
> I think you can just do the squash and apply into u-boot-riscv tree to
> save some traffic :).
>

OK

Thanks
Rick

> Regards,
> Bin
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Re: [U-Boot] Pull request v3: u-boot-sunxi/master

2019-05-08 Thread Tom Rini
On Thu, May 09, 2019 at 12:52:33AM +0530, Jagan Teki wrote:

> Hi Tom,
> 
> Please pull this PR.
> 
> Summary:
> - H6 Beelink GS1 board (Clément)
> - Olimex A64-Teres-I board (Jonas)
> - sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej)
> - Change include order (Jagan)
> - EPHY clock changes (Jagan)
> - EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
> 
> Travis-CI:
> https://travis-ci.org/openedev/u-boot-amarula/builds/529820317
> 
> The following changes since commit 1f4ae66eaab29bfb5d1eb44996f7826c9cd01ed1:
> 
>   Merge tag 'arc-for-2019.07' of git://git.denx.de/u-boot-arc (2019-04-18 
> 12:12:16 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-sunxi.git master
> 
> for you to fetch changes up to c23b33f5311abe32db96884318996d2b41db4c94:
> 
>   sunxi: Enable EMAC on the Bananapi M3 (2019-05-09 00:44:14 +0530)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PATCH 1/2] logos: Add the TechNexion's logo

2019-05-08 Thread Otavio Salvador
From: Fabio Estevam 

Add the TechNexion's logo from their internal U-Boot tree.

Signed-off-by: Fabio Estevam 
Signed-off-by: Otavio Salvador 
---

 tools/logos/technexion.bmp | Bin 0 -> 22390 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 create mode 100644 tools/logos/technexion.bmp

diff --git a/tools/logos/technexion.bmp b/tools/logos/technexion.bmp
new file mode 100644
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..bccde2de5922cb5d015ce302b74937b2812404ee
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Re: [U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Tom Rini
+ Rob

On Wed, May 08, 2019 at 11:05:29PM +, Vladimir Oltean wrote:
> On 5/9/19 1:55 AM, Tom Rini wrote:
> > On Wed, May 08, 2019 at 10:52:28PM +, Vladimir Oltean wrote:
> >> On 5/9/19 1:48 AM, Tom Rini wrote:
> >>> On Wed, May 08, 2019 at 10:45:50PM +, Vladimir Oltean wrote:
>  On 5/9/19 1:42 AM, Tom Rini wrote:
> > On Wed, May 08, 2019 at 10:40:57PM +, Vladimir Oltean wrote:
> >> On 5/9/19 1:24 AM, Joe Hershberger wrote:
> >>> On Tue, May 7, 2019 at 5:15 PM Joe Hershberger 
> >>>  wrote:
> 
>  Hi Tom,
> 
>  The following changes since commit 
>  8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:
> 
>  I rebased on your master and built for BB Black. DHCP seems to work 
>  fine.
>  MLO also now fits again.
> 
>    Merge branch 'master' of git://git.denx.de/u-boot-sh 
>  (2019-05-07 09:38:00 -0400)
> 
>  are available in the git repository at:
> 
>    git://git.denx.de/u-boot-net.git master
> 
>  for you to fetch changes up to 
>  8d0c6858455e89b089222a08d55ff711681ca011:
> 
>    net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 
>  14:51:55 -0500)
> 
>  
>  Carlo Caione (4):
>    net: phy: Add generic helpers to access MMD PHY registers
>    net: phy: ti: use generic helpers to access MMD registers
>    cmd: mdio: Switch to generic helpers when accessing the 
>  registers
>    net: phy: realtek: Introduce quirk to mark RXC not 
>  stoppable
> 
>  James Byrne (2):
>    net: phy: micrel: Use correct skew values on KSZ9021
>    net: phy: micrel: Find Micrel PHY node correctly
> 
>  Murali Karicheri (2):
>    ARM: k2g-gp-evm: update to rgmii pinmux configuration
>    ARM: k2g-ice: Add pinmux support for rgmii interface
> 
>  Pankaj Bansal (1):
>    drivers: net: ldpaa_eth: fix resource leak
> 
>  Siva Durga Prasad Paladugu (2):
>    net: phy: Reloc next and prev pointers inside phy_drivers
>    net: phy: Fix return value check phy_probe
> 
>  Valentin-catalin Neacsu (1):
>    net: phy: aquantia: Set only autoneg on in register 4.c441
> 
>  Vladimir Oltean (6):
>    net: phy: ar803x: Address packet drops at low traffic rate 
>  due to SmartEEE feature
>    net: phy: ar803x: Make RGMII Tx delays actually 
>  configurable for AR8035
>    net: phy: ar803x: Use common functions for RGMII internal 
>  delays
>    net: phy: ar803x: Clarify the configuration of the CLK_25M 
>  output pin
>    net: phy: ar803x: Explicitly disable RGMII delays
> >>>
> >>> Tom, this [1] is the patch that is breaking the evm. It doesn't affect
> >>> BB Black because it uses an SMSC phy, where as this evm uses an
> >>> AR8031/AR8033.
> >>>
> >>> Is it possible the device tree [2] is wrong for the board? It lists
> >>> 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
> >>> delay is now being disabled.
> >>>
> >>> Any thoughts, Vladimir?
> >>>
> >>> Thanks,
> >>> -Joe
> >>>
> >>> [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
> >>> [2] arch/arm/dts/am335x-evm.dts
> >>>
>    net: phy: ar803x: Clarify the intention of ar8021_config
> 
>   arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
>   arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
>   arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
>   arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
>   arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
>   arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
>   arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
>   board/ti/ks2_evm/mux-k2g.h  |  36 +++
>   cmd/mdio.c  |  27 +++--
>   doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
>   drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
>   drivers/net/phy/Kconfig |  41 
>   drivers/net/phy/aquantia.c  |   7 +-
>   drivers/net/phy/atheros.c   | 128 
>  ---
>   drivers/net/phy/micrel_ksz90x1.c|  24 -
>   drivers/net

[U-Boot] [PATCH 2/2] pico-imx6ul: Add DWARF baseboard support

2019-05-08 Thread Otavio Salvador
This add the boot menu option for the DWARF baseboard as well as a
specific config file for users which wish to use it as a pre-defined
board.

Signed-off-by: Otavio Salvador 
---

 configs/pico-dwarf-imx6ul_defconfig | 66 +
 include/configs/pico-imx6ul.h   |  6 ++-
 2 files changed, 70 insertions(+), 2 deletions(-)
 create mode 100644 configs/pico-dwarf-imx6ul_defconfig

diff --git a/configs/pico-dwarf-imx6ul_defconfig 
b/configs/pico-dwarf-imx6ul_defconfig
new file mode 100644
index 00..d733e4c586
--- /dev/null
+++ b/configs/pico-dwarf-imx6ul_defconfig
@@ -0,0 +1,66 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x8780
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb"
+CONFIG_BOUNCE_BUFFER=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-dwarf"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_DFU_MMC=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x1000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index cd051bf263..39c83a8c78 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -63,9 +63,11 @@
"rootfs part 0 1\0" \
 
 #define BOOTMENU_ENV \
-   "bootmenu_0=Boot using PICO-Hobbit baseboard=" \
+   "bootmenu_0=Boot using PICO-Dwarf baseboard=" \
+   "setenv fdtfile imx6ul-pico-dwarf.dtb\0" \
+   "bootmenu_1=Boot using PICO-Hobbit baseboard=" \
"setenv fdtfile imx6ul-pico-hobbit.dtb\0" \
-   "bootmenu_1=Boot using PICO-Pi baseboard=" \
+   "bootmenu_2=Boot using PICO-Pi baseboard=" \
"setenv fdtfile imx6ul-pico-pi.dtb\0" \
 
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
-- 
2.21.0

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Re: [U-Boot] [PATCH v5 6/6] riscv: configs: add ae350_rv[32|64]_xip_defconfig to MAINTAINERS

2019-05-08 Thread Bin Meng
Hi Rick,

On Thu, May 9, 2019 at 10:01 AM Rick Chen  wrote:
>
> Hi Bin
>
> Bin Meng  於 2019年5月9日 週四 上午9:32寫道:
> >
> > Hi Rick,
> >
> > On Thu, May 9, 2019 at 9:30 AM Andes  wrote:
> > >
> > > From: Rick Chen 
> > >
> > > This patch will fix Travis failure item as below:
> > > https://travis-ci.org/rickchen36/u-boot-riscv/jobs/529605196
> > >
> > > Check for configs without MAINTAINERS entry
> > >
> > > Signed-off-by: Rick Chen 
> > > Cc: Greentime Hu 
> > > ---
> > >  board/AndesTech/ax25-ae350/MAINTAINERS | 2 ++
> > >  1 file changed, 2 insertions(+)
> > >
> >
> > Please squash this one into "[PATCH v5 2/6] riscv: configs: Support
> > AE350 SMP booting from flash flow", as they are from the same patch
> > series, and not applied yet as of today.
> >
>
> OK. I will squash into [PATCH v5 2/6].
>
> After that shall I prepare v6 for review, or I can just apply into
> u-boot-riscv tree ?

I think you can just do the squash and apply into u-boot-riscv tree to
save some traffic :).

Regards,
Bin
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Re: [U-Boot] [PATCH v5 6/6] riscv: configs: add ae350_rv[32|64]_xip_defconfig to MAINTAINERS

2019-05-08 Thread Rick Chen
Hi Bin

Bin Meng  於 2019年5月9日 週四 上午9:32寫道:
>
> Hi Rick,
>
> On Thu, May 9, 2019 at 9:30 AM Andes  wrote:
> >
> > From: Rick Chen 
> >
> > This patch will fix Travis failure item as below:
> > https://travis-ci.org/rickchen36/u-boot-riscv/jobs/529605196
> >
> > Check for configs without MAINTAINERS entry
> >
> > Signed-off-by: Rick Chen 
> > Cc: Greentime Hu 
> > ---
> >  board/AndesTech/ax25-ae350/MAINTAINERS | 2 ++
> >  1 file changed, 2 insertions(+)
> >
>
> Please squash this one into "[PATCH v5 2/6] riscv: configs: Support
> AE350 SMP booting from flash flow", as they are from the same patch
> series, and not applied yet as of today.
>

OK. I will squash into [PATCH v5 2/6].

After that shall I prepare v6 for review, or I can just apply into
u-boot-riscv tree ?

Thanks
Rick

> Regards,
> Bin
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Re: [U-Boot] [PATCH 1/2] include: android_bl_msg.h: Initial import

2019-05-08 Thread Eugeniu Rosca
Hi Sam,

Thanks for the amazing effort to put the recent BCB/AB-related
advancements together and make them work. I really look forward to
seeing this part of mainline. Still, I have some concerns/questions
and hope to get your feedback.

First, the ("Implement Reboot reason support") series included in your
"misc-reboot-reason" branch looks to be brand new, i.e. it hasn't been
previously submitted for community review. I have comments in that area.

Second, some review comments of mine posted in various patches of
https://patchwork.ozlabs.org/cover/1044152/ ("[U-Boot,v3,0/7] android:
implement A/B boot process") still haven't been addressed. Who is going
to handle that work?

Third, yes, there is more overlap than I initially expected. It is
mostly between ("Add 'bcb' command to read/modify/write Android BCB")
and ("Implement Reboot reason support"). The resolution is not as
straightforward as one might assume. It is both a conflict of code
and a conflict of perspective on how Android bootloader flow
should be implemented in U-Boot. More on that later.

Fourth, some words on commit order and split. I think the most natural
commit order is the one reflecting the development of features in AOSP,
i.e. I would expect getting the reboot reason to come before the A/B
support, just b/c BCB structure with its "command" field existed in
AOSP for ages (since the inception of "recovery" repository in 2008)
while A/B support came _much_ (at least 7 years) later. WRT commit
split, one comment is that we would potentially like to import getting
reboot reason w/o importing A/B support. Surprisingly, this is not
possible if the bootloader message header is glued to commit
("common: Implement A/B metadata"). So, the best order to me is:
 - add android_bl_msg.h in a standalone commit
 - add bcb command
 - add getting reboot reason (if needed at all, more on it later)
 - add A/B support
 - update platform support

More comments below.

On Wed, May 08, 2019 at 08:25:15PM +0300, Sam Protsenko wrote:
> Hi Eugeniu,
> 
> I created GitHub repo with all related patches applied on top of most
> recent mainline U-Boot master: [1]. It contains next patches (on
> "misc-reboot-reason" branch):
> 
> 1. Series from Ruslan Trofymenko: [PATCH v3 0/7] android: implement
> A/B boot process:
>   * cmd: part: Add 'number' sub-command
>   * disk: part: Extend API to get partition info
>   * common: Implement A/B metadata
>   * cmd: Add 'ab_select' command
>   * test/py: Add base test case for A/B updates
>   * doc: android: Add simple guide for A/B updates
>   * env: am57xx: Implement A/B boot process
> 2. Series from Ruslan Trofymenko: [U-Boot][PATCH 0/4] Implement Reboot
> reason support:
>   * common: Implement Reboot reason flow
>   * cmd: Add 'rb_reason' command
>   * env: am57xx: Add Reboot reason support
>   * configs: am57xx_evm: Enable Reboot reason support
>   * Rename android_bl_msg.h -> android_bl_msg2.h (my patch to make
> this series apply along with next patches from Eugeniu)
> 3. Series from Eugeniu Rosca: [PATCH 0/2] Add 'bcb' command to
> read/modify/write Android BCB:
>   * include: android_bl_msg.h: Initial import
>   * cmd: Add 'bcb' command to read/modify/write BCB fields
> 4. My local patches to enable it all on X15 board, make it work
> correctly, and use original android_bl_msg.h (as close as possible to
> AOSP file):
>   * configs: am57xx: Enable BCB command
>   * environment: ti: Fix USB controller number
>   * android: reboot reason: Use original android_bl_msg.h
>   * android: ab: Use original android_bl_msg.h
>   * android: Remove android_bl_msg2.h
>   * android: bcb: Use original android_bl_msg.h API
> 
> With all those patches applied, I'm able to do next (after "adb reboot
> bootloader" command):
> 1. Use "bcb" command by Eugeniu:
> => bcb load 1 4

"bcb load 1 misc" should be also supported, in case it helps.

> => bcb dump command
> 2. Use "rb_reason" command by Ruslan:
> => rb_reason mmc 1:4
> => rb_reason mmc 1:misc

Well, here we have two different perspectives.
Below should be a 'bcb' equivalent (mostly pseudo code, not tested):

if bcb load 1 misc; then
# Valid BCB found
if bcb test command = bootonce-bootloader; then
bcb clear command; bcb store;
# do the equivalent of $fastbootcmd
else if bcb test command = boot-recovery; then
bcb clear command; bcb store;
# do the equivalent of $recoverycmd
else
# boot Android OS normally
fi
else
# Corrupted/non-existent BCB
# Boot non-Android OS?
fi

Here I see some room for discussion, since we have two approaches to
getting the reboot reason and act accordingly. I'll point out some
pros (+) and cons (-) in each case (IMHO):

rb_reason:
+ compact when used (one-liner)
- does much more than just reading the boot reason:
   - clears the 'command' field in BCB
   - runs $fastbootcmd/$recoverycmd, presumably populated beforehand
 => the above means that:
   - command name does not reflect

[U-Boot] [PATCH v5 6/6] riscv: configs: add ae350_rv[32|64]_xip_defconfig to MAINTAINERS

2019-05-08 Thread Andes
From: Rick Chen 

This patch will fix Travis failure item as below:
https://travis-ci.org/rickchen36/u-boot-riscv/jobs/529605196

Check for configs without MAINTAINERS entry

Signed-off-by: Rick Chen 
Cc: Greentime Hu 
---
 board/AndesTech/ax25-ae350/MAINTAINERS | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS 
b/board/AndesTech/ax25-ae350/MAINTAINERS
index b0a99e4..feed5d1 100644
--- a/board/AndesTech/ax25-ae350/MAINTAINERS
+++ b/board/AndesTech/ax25-ae350/MAINTAINERS
@@ -5,3 +5,5 @@ F:  board/AndesTech/ax25-ae350/
 F: include/configs/ax25-ae350.h
 F: configs/ae350_rv32_defconfig
 F: configs/ae350_rv64_defconfig
+F: configs/ae350_rv32_xip_defconfig
+F: configs/ae350_rv64_xip_defconfig
-- 
2.7.4

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[U-Boot] [PATCH v5 4/6] riscv: configs: AE350 will use CONFIG_OF_PRIOR_STAGE when boots from ram

2019-05-08 Thread Andes
From: Rick Chen 

When AE350 boots from ram, use CONFIG_OF_PRIOR_STAGE instead
of CONFIG_OF_BOARD.

Signed-off-by: Rick Chen 
Cc: Greentime Hu 
Reviewed-by: Bin Meng 
Reviewed-by: Lukas Auer 
---
 configs/ae350_rv32_defconfig | 2 +-
 configs/ae350_rv64_defconfig | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
index f029455..71d2716 100644
--- a/configs/ae350_rv32_defconfig
+++ b/configs/ae350_rv32_defconfig
@@ -14,7 +14,7 @@ CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_CACHE=y
-CONFIG_OF_BOARD=y
+CONFIG_OF_PRIOR_STAGE=y
 CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
index 98635a2..9bf1737 100644
--- a/configs/ae350_rv64_defconfig
+++ b/configs/ae350_rv64_defconfig
@@ -15,7 +15,7 @@ CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_CACHE=y
-CONFIG_OF_BOARD=y
+CONFIG_OF_PRIOR_STAGE=y
 CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
-- 
2.7.4

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[U-Boot] [PATCH v5 5/6] riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flash

2019-05-08 Thread Andes
From: Rick Chen 

When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of
CONFIG_OF_BOARD.

Also remove unused code about prior_stage_fdt_address.
And modify CONFIG_SYS_FDT_BASE as flash address.

Signed-off-by: Rick Chen 
Cc: Greentime Hu 
Reviewed-by: Bin Meng 
Reviewed-by: Lukas Auer 
---
 board/AndesTech/ax25-ae350/ax25-ae350.c | 4 
 configs/ae350_rv32_xip_defconfig| 2 +-
 configs/ae350_rv64_xip_defconfig| 2 +-
 include/configs/ax25-ae350.h| 2 +-
 4 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c 
b/board/AndesTech/ax25-ae350/ax25-ae350.c
index d343453..3d65ce7 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -67,10 +67,6 @@ ulong board_flash_get_legacy(ulong base, int banknum, 
flash_info_t *info)
 
 void *board_fdt_blob_setup(void)
 {
-   void **ptr = (void *)&prior_stage_fdt_address;
-   if (fdt_magic(*ptr) == FDT_MAGIC)
-   return (void *)*ptr;
-
return (void *)CONFIG_SYS_FDT_BASE;
 }
 
diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig
index 76534f2..07f1ecc 100644
--- a/configs/ae350_rv32_xip_defconfig
+++ b/configs/ae350_rv32_xip_defconfig
@@ -15,7 +15,7 @@ CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_CACHE=y
-CONFIG_OF_BOARD=y
+CONFIG_OF_SEPARATE=y
 CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig
index f7f2925..28afd81 100644
--- a/configs/ae350_rv64_xip_defconfig
+++ b/configs/ae350_rv64_xip_defconfig
@@ -16,7 +16,7 @@ CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_CACHE=y
-CONFIG_OF_BOARD=y
+CONFIG_OF_SEPARATE=y
 CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
index 395f3a4..a4037f3 100644
--- a/include/configs/ax25-ae350.h
+++ b/include/configs/ax25-ae350.h
@@ -40,7 +40,7 @@
 #define CONFIG_SYS_MALLOC_LEN   (512 << 10)
 
 /* DT blob (fdt) address */
-#define CONFIG_SYS_FDT_BASE0x000f
+#define CONFIG_SYS_FDT_BASE0x800f
 
 /*
  * Physical Memory Map
-- 
2.7.4

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[U-Boot] [PATCH v5 2/6] riscv: configs: Support AE350 SMP booting from flash flow

2019-05-08 Thread Andes
From: Rick Chen 

Add two defconfigs to support AE350 SMP booting from flash.

Signed-off-by: Rick Chen 
Cc: Greentime Hu 
Reviewed-by: Bin Meng 
Reviewed-by: Lukas Auer 
---
 configs/ae350_rv32_xip_defconfig | 37 +
 configs/ae350_rv64_xip_defconfig | 38 ++
 2 files changed, 75 insertions(+)
 create mode 100644 configs/ae350_rv32_xip_defconfig
 create mode 100644 configs/ae350_rv64_xip_defconfig

diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig
new file mode 100644
index 000..76534f2
--- /dev/null
+++ b/configs/ae350_rv32_xip_defconfig
@@ -0,0 +1,37 @@
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x8000
+CONFIG_XIP=y
+CONFIG_TARGET_AX25_AE350=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_CACHE=y
+CONFIG_OF_BOARD=y
+CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x0
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_FTMAC100=y
+CONFIG_BAUDRATE=38400
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_ATCSPI200_SPI=y
diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig
new file mode 100644
index 000..f7f2925
--- /dev/null
+++ b/configs/ae350_rv64_xip_defconfig
@@ -0,0 +1,38 @@
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x8000
+CONFIG_XIP=y
+CONFIG_TARGET_AX25_AE350=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_CACHE=y
+CONFIG_OF_BOARD=y
+CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x0
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_FTMAC100=y
+CONFIG_BAUDRATE=38400
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_ATCSPI200_SPI=y
-- 
2.7.4

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[U-Boot] [PATCH v5 3/6] riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled

2019-05-08 Thread Andes
From: Rick Chen 

This patch will fix prior_stage_fdt_address write failure problem, when
AE350 boots from flash.

When AE350 boots from flash, prior_stage_fdt_address will be flash
address, we shall avoid it to be written.

Signed-off-by: Rick Chen 
Cc: Greentime Hu 
Reviewed-by: Bin Meng 
Reviewed-by: Lukas Auer 
---
 arch/riscv/cpu/cpu.c   | 2 ++
 arch/riscv/cpu/start.S | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 0cfd7d6..e9a8b43 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -15,7 +15,9 @@
  * The variables here must be stored in the data section since they are used
  * before the bss section is available.
  */
+#ifdef CONFIG_OF_PRIOR_STAGE
 phys_addr_t prior_stage_fdt_address __attribute__((section(".data")));
+#endif
 #ifndef CONFIG_XIP
 u32 hart_lottery __attribute__((section(".data"))) = 0;
 
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 3402d09..60ac8c6 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -111,8 +111,10 @@ call_board_init_f_0:
bneztp, secondary_hart_loop
 #endif
 
+#ifdef CONFIG_OF_PRIOR_STAGE
la  t0, prior_stage_fdt_address
SREGs1, 0(t0)
+#endif
 
jal board_init_f_init_reserve
 
-- 
2.7.4

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Re: [U-Boot] [PATCH v5 6/6] riscv: configs: add ae350_rv[32|64]_xip_defconfig to MAINTAINERS

2019-05-08 Thread Bin Meng
Hi Rick,

On Thu, May 9, 2019 at 9:30 AM Andes  wrote:
>
> From: Rick Chen 
>
> This patch will fix Travis failure item as below:
> https://travis-ci.org/rickchen36/u-boot-riscv/jobs/529605196
>
> Check for configs without MAINTAINERS entry
>
> Signed-off-by: Rick Chen 
> Cc: Greentime Hu 
> ---
>  board/AndesTech/ax25-ae350/MAINTAINERS | 2 ++
>  1 file changed, 2 insertions(+)
>

Please squash this one into "[PATCH v5 2/6] riscv: configs: Support
AE350 SMP booting from flash flow", as they are from the same patch
series, and not applied yet as of today.

Regards,
Bin
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[U-Boot] [PATCH v5 0/6] AE350 support SMP boot from flash

2019-05-08 Thread Andes
From: Rick Chen 

In current RISC-V SMP flow, AE350 will encounter the the write
failure problem since hart_lottery and available_harts_lock was
not in ram address but in flash address when booing from flash.

This patch can help to fix the failure problem when AE350 was
booting from flash by disabling this two features.

Changes in v5:
- New patch
[PATCH v5 6/6] riscv: configs: add ae350_rv[32|64]_xip_defconfig to 
MAINTAINERS
It will fix Travis failure item :
https://travis-ci.org/rickchen36/u-boot-riscv/jobs/529605196

Changes in v4:
- Use CONFIG_OF_SEPARATE instead of CONFIG_OF_BOARD in ae350_rv32_xip_defconfig 
and ae350_rv64_xip_defconfig.
- Remove prior_stage_fdt_address in board_fdt_blob_setup.
- Modify CONFIG_SYS_FDT_BASE as flash address.

Changes in v3:
- Modify CONFIG_XIP descriptions
- Use #ifdef CONFIG_OF_PRIOR_STAGE to replace #  if 
CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
- Recovery some blank lines
- Add CONFIG_SF_DEFAULT_MODE=0x0 in ae350_rv32_xip_defconfig and 
ae350_rv64_xip_defconfig
- #ifdef CONFIG_OF_PRIOR_STAGE shall also surround SREG s1, 0(t0)
- Modify CONFIG_SYS_FDT_BASE from 0x000f as 0x800f in ax25-ae350.h


Changes in v2:
- Fix some typos
- Also surround the declaration of prior_stage_fdt_address in 
arch/riscv/cpu/cpu.c with OF_PRIOR_STAGE
- Use CONFIP_XIP to replace CONFIG_HART_LOTTERY and CONFIG_AVAILABLE_HARTS

Rick Chen (6):
  riscv: Introduce CONFIG_XIP to support booting from flash
  riscv: configs: Support AE350 SMP booting from flash flow
  riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE
is enabled
  riscv: configs: AE350 will use CONFIG_OF_PRIOR_STAGE when boots from
ram
  riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from
flash
  riscv: configs: add ae350_rv[32|64]_xip_defconfig to MAINTAINERS

 arch/riscv/Kconfig  |  7 ++
 arch/riscv/cpu/cpu.c|  4 
 arch/riscv/cpu/start.S  |  8 +++
 arch/riscv/include/asm/global_data.h|  2 ++
 arch/riscv/lib/asm-offsets.c|  2 ++
 arch/riscv/lib/smp.c|  2 ++
 board/AndesTech/ax25-ae350/MAINTAINERS  |  2 ++
 board/AndesTech/ax25-ae350/ax25-ae350.c |  4 
 configs/ae350_rv32_defconfig|  2 +-
 configs/ae350_rv32_xip_defconfig| 37 
 configs/ae350_rv64_defconfig|  2 +-
 configs/ae350_rv64_xip_defconfig| 38 +
 include/configs/ax25-ae350.h|  2 +-
 13 files changed, 105 insertions(+), 7 deletions(-)
 create mode 100644 configs/ae350_rv32_xip_defconfig
 create mode 100644 configs/ae350_rv64_xip_defconfig

-- 
2.7.4

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[U-Boot] [PATCH v5 1/6] riscv: Introduce CONFIG_XIP to support booting from flash

2019-05-08 Thread Andes
From: Rick Chen 

When U-Boot boots from flash, during the boot process,
hart_lottery and available_harts_lock variable addresses
point to flash which is not writable. This causes boot
failures on AE350. Introduce a config option CONFIG_XIP
to support such configuration.

Signed-off-by: Rick Chen 
Cc: Greentime Hu 
Reviewed-by: Lukas Auer 
Reviewed-by: Bin Meng 
---
 arch/riscv/Kconfig   | 7 +++
 arch/riscv/cpu/cpu.c | 2 ++
 arch/riscv/cpu/start.S   | 6 ++
 arch/riscv/include/asm/global_data.h | 2 ++
 arch/riscv/lib/asm-offsets.c | 2 ++
 arch/riscv/lib/smp.c | 2 ++
 6 files changed, 21 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ae8ff7b..362f3cd 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -162,6 +162,13 @@ config SBI_IPI
default y if RISCV_SMODE
depends on SMP
 
+config XIP
+   bool "XIP mode"
+   help
+ XIP (eXecute In Place) is a method for executing code directly
+ from a NOR flash memory without copying the code to ram.
+ Say yes here if U-Boot boots from flash directly.
+
 config STACK_SIZE_SHIFT
int
default 13
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index c32de8a..0cfd7d6 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -16,6 +16,7 @@
  * before the bss section is available.
  */
 phys_addr_t prior_stage_fdt_address __attribute__((section(".data")));
+#ifndef CONFIG_XIP
 u32 hart_lottery __attribute__((section(".data"))) = 0;
 
 /*
@@ -23,6 +24,7 @@ u32 hart_lottery __attribute__((section(".data"))) = 0;
  * finished initialization of global data.
  */
 u32 available_harts_lock = 1;
+#endif
 
 static inline bool supports_extension(char ext)
 {
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index a4433fb..3402d09 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -98,6 +98,7 @@ call_board_init_f_0:
mv  sp, a0
 #endif
 
+#ifndef CONFIG_XIP
/*
 * Pick hart to initialize global data and run U-Boot. The other harts
 * wait for initialization to complete.
@@ -106,6 +107,9 @@ call_board_init_f_0:
li  s2, 1
amoswap.w s2, t1, 0(t0)
bnezs2, wait_for_gd_init
+#else
+   bneztp, secondary_hart_loop
+#endif
 
la  t0, prior_stage_fdt_address
SREGs1, 0(t0)
@@ -115,6 +119,7 @@ call_board_init_f_0:
/* save the boot hart id to global_data */
SREGtp, GD_BOOT_HART(gp)
 
+#ifndef CONFIG_XIP
la  t0, available_harts_lock
fence   rw, w
amoswap.w zero, zero, 0(t0)
@@ -141,6 +146,7 @@ wait_for_gd_init:
 * secondary_hart_loop.
 */
bnezs2, secondary_hart_loop
+#endif
 
/* Enable cache */
jal icache_enable
diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index dffcd45..b74bd7e 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -27,7 +27,9 @@ struct arch_global_data {
 #ifdef CONFIG_SMP
struct ipi_data ipi[CONFIG_NR_CPUS];
 #endif
+#ifndef CONFIG_XIP
ulong available_harts;
+#endif
 };
 
 #include 
diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
index f998402..4fa4fd3 100644
--- a/arch/riscv/lib/asm-offsets.c
+++ b/arch/riscv/lib/asm-offsets.c
@@ -14,7 +14,9 @@
 int main(void)
 {
DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
+#ifndef CONFIG_XIP
DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts));
+#endif
 
return 0;
 }
diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
index caa292c..cc66f15 100644
--- a/arch/riscv/lib/smp.c
+++ b/arch/riscv/lib/smp.c
@@ -63,9 +63,11 @@ static int send_ipi_many(struct ipi_data *ipi)
continue;
}
 
+#ifndef CONFIG_XIP
/* skip if hart is not available */
if (!(gd->arch.available_harts & (1 << reg)))
continue;
+#endif
 
gd->arch.ipi[reg].addr = ipi->addr;
gd->arch.ipi[reg].arg0 = ipi->arg0;
-- 
2.7.4

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Re: [U-Boot] [PATCH v3 10/10] pinctrl: rockchip: Also move common set_schmitter func into per Soc file【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:44 AM, Kever Yang wrote:
>
> On 04/16/2019 09:58 PM, David Wu wrote:
>> Only some Soc need Schmitter feature, so move the
>> implementation into their own files.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - None
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk3328.c | 17 -
>>  .../pinctrl/rockchip/pinctrl-rockchip-core.c  | 19 +++
>>  drivers/pinctrl/rockchip/pinctrl-rockchip.h   |  5 ++---
>>  drivers/pinctrl/rockchip/pinctrl-rv1108.c | 17 -
>>  4 files changed, 37 insertions(+), 21 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
>> index d4d37af206..8d37a6f945 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
>> @@ -264,6 +264,21 @@ static int rk3328_calc_schmitt_reg_and_bit(struct 
>> rockchip_pin_bank *bank,
>>  return 0;
>>  }
>>  
>> +static int rk3328_set_schmitt(struct rockchip_pin_bank *bank,
>> +  int pin_num, int enable)
>> +{
>> +struct regmap *regmap;
>> +int reg;
>> +u8 bit;
>> +u32 data;
>> +
>> +rk3328_calc_schmitt_reg_and_bit(bank, pin_num, ®map, ®, &bit);
>> +/* enable the write to the equivalent lower bits */
>> +data = BIT(bit + 16) | (enable << bit);
>> +
>> +return regmap_write(regmap, reg, data);
>> +}
>> +
>>  static struct rockchip_pin_bank rk3328_pin_banks[] = {
>>  PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
>>  PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
>> @@ -289,7 +304,7 @@ static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
>>  .set_mux= rk3328_set_mux,
>>  .set_pull   = rk3328_set_pull,
>>  .set_drive  = rk3328_set_drive,
>> -.schmitt_calc_reg   = rk3328_calc_schmitt_reg_and_bit,
>> +.set_schmitt= rk3328_set_schmitt,
>>  };
>>  
>>  static const struct udevice_id rk3328_pinctrl_ids[] = {
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
>> index b3379a0d3f..80dc431d20 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
>> @@ -306,30 +306,20 @@ static int rockchip_set_schmitt(struct 
>> rockchip_pin_bank *bank,
>>  {
>>  struct rockchip_pinctrl_priv *priv = bank->priv;
>>  struct rockchip_pin_ctrl *ctrl = priv->ctrl;
>> -struct regmap *regmap;
>> -int reg, ret;
>> -u8 bit;
>> -u32 data;
>>  
>>  debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num,
>>pin_num, enable);
>>  
>> -ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit);
>> -if (ret)
>> -return ret;
>> -
>> -/* enable the write to the equivalent lower bits */
>> -data = BIT(bit + 16) | (enable << bit);
>> +if (!ctrl->set_schmitt)
>> +return -ENOTSUPP;
>>  
>> -return regmap_write(regmap, reg, data);
>> +return ctrl->set_schmitt(bank, pin_num, enable);
>>  }
>>  
>>  /* set the pin config settings for a specified pin */
>>  static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
>>  u32 pin, u32 param, u32 arg)
>>  {
>> -struct rockchip_pinctrl_priv *priv = bank->priv;
>> -struct rockchip_pin_ctrl *ctrl = priv->ctrl;
>>  int rc;
>>  
>>  switch (param) {
>> @@ -350,9 +340,6 @@ static int rockchip_pinconf_set(struct rockchip_pin_bank 
>> *bank,
>>  break;
>>  
>>  case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
>> -if (!ctrl->schmitt_calc_reg)
>> -return -ENOTSUPP;
>> -
>>  rc = rockchip_set_schmitt(bank, pin, arg);
>>  if (rc < 0)
>>  return rc;
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h 
>> b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
>> index 1c6fc2c5b2..9651e9c7a6 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
>> @@ -271,9 +271,8 @@ struct rockchip_pin_ctrl {
>>  int pin_num, int pull);
>>  int (*set_drive)(struct rockchip_pin_bank *bank,
>>   int pin_num, int strength);
>> -int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
>> -int pin_num, struct regmap **regmap,
>> -int *reg, u8 *bit);
>> +int (*set_schmitt)(struct rockchip_pin_bank *bank,
>> +   int pin_num, int enable);
>>  };
>>  
>>  /**
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
>> index 0bcf11bb41..54610a3e90 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c

Re: [U-Boot] [PATCH v3 08/10] pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:44 AM, Kever Yang wrote:
>
> On 04/16/2019 09:57 PM, David Wu wrote:
>> RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding
>> bits, need to read before write the register.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - None
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk3288.c | 11 +--
>>  1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> index 9192aa3949..24af3597ec 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> @@ -116,8 +116,15 @@ static int rk3288_set_pull(struct rockchip_pin_bank 
>> *bank,
>>  return ret;
>>  }
>>  
>> -/* enable the write to the equivalent lower bits */
>> -data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
>> +/* bank0 is special, there are no higher 16 bit writing bits */
>> +if (bank->bank_num == 0) {
>> +regmap_read(regmap, reg, &data);
>> +data &= ~(((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << bit);
>> +} else {
>> +/* enable the write to the equivalent lower bits */
>> +data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
>> +}
>> +
>>  data |= (ret << bit);
>>  ret = regmap_write(regmap, reg, data);
>>  
>
>
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Re: [U-Boot] [PATCH v3 09/10] pinctrl: rockchip: Clean the unused type and label【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:44 AM, Kever Yang wrote:
>
> On 04/16/2019 09:57 PM, David Wu wrote:
>> As the mux/pull/drive feature implement at own file,
>> the type and label are not necessary.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - None
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk3036.c   |  2 --
>>  drivers/pinctrl/rockchip/pinctrl-rk3128.c   |  2 --
>>  drivers/pinctrl/rockchip/pinctrl-rk3188.c   |  2 --
>>  drivers/pinctrl/rockchip/pinctrl-rk322x.c   |  2 --
>>  drivers/pinctrl/rockchip/pinctrl-rk3288.c   |  2 --
>>  drivers/pinctrl/rockchip/pinctrl-rk3328.c   |  2 --
>>  drivers/pinctrl/rockchip/pinctrl-rk3368.c   |  2 --
>>  drivers/pinctrl/rockchip/pinctrl-rk3399.c   |  2 --
>>  drivers/pinctrl/rockchip/pinctrl-rockchip.h | 12 
>>  drivers/pinctrl/rockchip/pinctrl-rv1108.c   |  2 --
>>  10 files changed, 30 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> index 498b633f22..28c905129b 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> @@ -83,8 +83,6 @@ static struct rockchip_pin_bank rk3036_pin_banks[] = {
>>  static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
>>  .pin_banks  = rk3036_pin_banks,
>>  .nr_banks   = ARRAY_SIZE(rk3036_pin_banks),
>> -.label  = "RK3036-GPIO",
>> -.type   = RK3036,
>>  .grf_mux_offset = 0xa8,
>>  .set_mux= rk3036_set_mux,
>>  .set_pull   = rk3036_set_pull,
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> index 104b76c19e..3eb4d952bb 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> @@ -183,8 +183,6 @@ static struct rockchip_pin_bank rk3128_pin_banks[] = {
>>  static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
>>  .pin_banks  = rk3128_pin_banks,
>>  .nr_banks   = ARRAY_SIZE(rk3128_pin_banks),
>> -.label  = "RK3128-GPIO",
>> -.type   = RK3128,
>>  .grf_mux_offset = 0xa8,
>>  .iomux_recalced = rk3128_mux_recalced_data,
>>  .niomux_recalced= ARRAY_SIZE(rk3128_mux_recalced_data),
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> index e09c799e72..043764fc92 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> @@ -108,8 +108,6 @@ static struct rockchip_pin_bank rk3188_pin_banks[] = {
>>  static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
>>  .pin_banks  = rk3188_pin_banks,
>>  .nr_banks   = ARRAY_SIZE(rk3188_pin_banks),
>> -.label  = "RK3188-GPIO",
>> -.type   = RK3188,
>>  .grf_mux_offset = 0x60,
>>  .set_mux= rk3188_set_mux,
>>  .set_pull   = rk3188_set_pull,
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> index b69d9795bb..c5e4fe30a7 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> @@ -268,8 +268,6 @@ static struct rockchip_pin_bank rk3228_pin_banks[] = {
>>  static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
>>  .pin_banks  = rk3228_pin_banks,
>>  .nr_banks   = ARRAY_SIZE(rk3228_pin_banks),
>> -.label  = "RK3228-GPIO",
>> -.type   = RK3288,
>>  .grf_mux_offset = 0x0,
>>  .iomux_routes   = rk3228_mux_route_data,
>>  .niomux_routes  = ARRAY_SIZE(rk3228_mux_route_data),
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> index 24af3597ec..7ae147f304 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> @@ -223,8 +223,6 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
>>  static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
>>  .pin_banks  = rk3288_pin_banks,
>>  .nr_banks   = ARRAY_SIZE(rk3288_pin_banks),
>> -.label  = "RK3288-GPIO",
>> -.type   = RK3288,
>>  .grf_mux_offset = 0x0,
>>  .pmu_mux_offset = 0x84,
>>  .iomux_routes   = rk3288_mux_route_data,
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
>> index 7ac5c0226e..d4d37af206 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
>> @@ -281,8 +281,6 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
>>  static struct rockchip_

Re: [U-Boot] [PATCH v3 07/10] pinctrl: rockchip: Split the common set_pull() func into per Soc【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:43 AM, Kever Yang wrote:
>
> On 04/16/2019 09:57 PM, David Wu wrote:
>> As the common set_mux func(), implement the feature at the own file
>> for each Soc.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - None
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk3036.c | 23 -
>>  drivers/pinctrl/rockchip/pinctrl-rk3128.c | 23 -
>>  drivers/pinctrl/rockchip/pinctrl-rk3188.c | 29 +-
>>  drivers/pinctrl/rockchip/pinctrl-rk322x.c | 29 +-
>>  drivers/pinctrl/rockchip/pinctrl-rk3288.c | 40 ++--
>>  drivers/pinctrl/rockchip/pinctrl-rk3328.c | 29 +-
>>  drivers/pinctrl/rockchip/pinctrl-rk3368.c | 40 ++--
>>  drivers/pinctrl/rockchip/pinctrl-rk3399.c | 40 ++--
>>  .../pinctrl/rockchip/pinctrl-rockchip-core.c  | 97 ---
>>  drivers/pinctrl/rockchip/pinctrl-rockchip.h   |  7 +-
>>  drivers/pinctrl/rockchip/pinctrl-rv1108.c | 30 +-
>>  11 files changed, 275 insertions(+), 112 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> index 8969aea2e3..498b633f22 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> @@ -53,6 +53,27 @@ static void rk3036_calc_pull_reg_and_bit(struct 
>> rockchip_pin_bank *bank,
>>  *bit = pin_num % RK3036_PULL_PINS_PER_REG;
>>  };
>>  
>> +static int rk3036_set_pull(struct rockchip_pin_bank *bank,
>> +   int pin_num, int pull)
>> +{
>> +struct regmap *regmap;
>> +int reg, ret;
>> +u8 bit;
>> +u32 data;
>> +
>> +if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT &&
>> +pull != PIN_CONFIG_BIAS_DISABLE)
>> +return -ENOTSUPP;
>> +
>> +rk3036_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
>> +data = BIT(bit + 16);
>> +if (pull == PIN_CONFIG_BIAS_DISABLE)
>> +data |= BIT(bit);
>> +ret = regmap_write(regmap, reg, data);
>> +
>> +return ret;
>> +}
>> +
>>  static struct rockchip_pin_bank rk3036_pin_banks[] = {
>>  PIN_BANK(0, 32, "gpio0"),
>>  PIN_BANK(1, 32, "gpio1"),
>> @@ -66,7 +87,7 @@ static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
>>  .type   = RK3036,
>>  .grf_mux_offset = 0xa8,
>>  .set_mux= rk3036_set_mux,
>> -.pull_calc_reg  = rk3036_calc_pull_reg_and_bit,
>> +.set_pull   = rk3036_set_pull,
>>  };
>>  
>>  static const struct udevice_id rk3036_pinctrl_ids[] = {
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> index de203334c7..104b76c19e 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> @@ -152,6 +152,27 @@ static void rk3128_calc_pull_reg_and_bit(struct 
>> rockchip_pin_bank *bank,
>>  *bit = pin_num % RK3128_PULL_PINS_PER_REG;
>>  }
>>  
>> +static int rk3128_set_pull(struct rockchip_pin_bank *bank,
>> +   int pin_num, int pull)
>> +{
>> +struct regmap *regmap;
>> +int reg, ret;
>> +u8 bit;
>> +u32 data;
>> +
>> +if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT &&
>> +pull != PIN_CONFIG_BIAS_DISABLE)
>> +return -ENOTSUPP;
>> +
>> +rk3128_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
>> +data = BIT(bit + 16);
>> +if (pull == PIN_CONFIG_BIAS_DISABLE)
>> +data |= BIT(bit);
>> +ret = regmap_write(regmap, reg, data);
>> +
>> +return ret;
>> +}
>> +
>>  static struct rockchip_pin_bank rk3128_pin_banks[] = {
>>  PIN_BANK(0, 32, "gpio0"),
>>  PIN_BANK(1, 32, "gpio1"),
>> @@ -170,7 +191,7 @@ static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
>>  .iomux_routes   = rk3128_mux_route_data,
>>  .niomux_routes  = ARRAY_SIZE(rk3128_mux_route_data),
>>  .set_mux= rk3128_set_mux,
>> -.pull_calc_reg  = rk3128_calc_pull_reg_and_bit,
>> +.set_pull   = rk3128_set_pull,
>>  };
>>  
>>  static const struct udevice_id rk3128_pinctrl_ids[] = {
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> index 617ae28ac8..e09c799e72 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> @@ -71,6 +71,33 @@ static void rk3188_calc_pull_reg_and_bit(struct 
>> rockchip_pin_bank *bank,
>>  }
>>  }
>>  
>> +static int rk3188_set_pull(struct rockchip_pin_bank *bank,
>> +   int pin_num, int pull)
>> +{
>> +struct regmap *regmap;
>> +int reg, ret;
>> +u8 bit, type;
>> +u32 data;
>> +
>> +if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
>> +return -ENOTSUPP;
>> +
>> +rk3188_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
>> +type = bank->pull_type[pin_num 

Re: [U-Boot] [PATCH v3 06/10] pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:43 AM, Kever Yang wrote:
>
> On 04/16/2019 09:56 PM, David Wu wrote:
>> RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
>> corresponding bits, need to read before write the register.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - Add some comment
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk3288.c | 11 +--
>>  1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> index 6ae9f1c76e..d1b9aeb3d9 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> @@ -143,8 +143,15 @@ static int rk3288_set_drive(struct rockchip_pin_bank 
>> *bank,
>>  return ret;
>>  }
>>  
>> -/* enable the write to the equivalent lower bits */
>> -data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
>> +/* bank0 is special, there are no higher 16 bit writing bits. */
>> +if (bank->bank_num == 0) {
>> +regmap_read(regmap, reg, &data);
>> +data &= ~(((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << bit);
>> +} else {
>> +/* enable the write to the equivalent lower bits */
>> +data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
>> +}
>> +
>>  data |= (ret << bit);
>>  ret = regmap_write(regmap, reg, data);
>>  return ret;
>
>
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Re: [U-Boot] [PATCH v3 05/10] pinctrl: rockchip: Split the common set_drive() func into per Soc【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:43 AM, Kever Yang wrote:
>
> On 04/16/2019 09:55 PM, David Wu wrote:
>> As the common set_mux func(), implement the feature at the own file
>> for each Soc.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - None
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk322x.c | 25 -
>>  drivers/pinctrl/rockchip/pinctrl-rk3288.c | 35 +--
>>  drivers/pinctrl/rockchip/pinctrl-rk3328.c | 26 -
>>  drivers/pinctrl/rockchip/pinctrl-rk3368.c | 36 +--
>>  drivers/pinctrl/rockchip/pinctrl-rk3399.c | 75 ++-
>>  .../pinctrl/rockchip/pinctrl-rockchip-core.c  | 95 ---
>>  drivers/pinctrl/rockchip/pinctrl-rockchip.h   |  6 +-
>>  drivers/pinctrl/rockchip/pinctrl-rv1108.c | 26 -
>>  8 files changed, 224 insertions(+), 100 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> index 442c40ce0b..10200ff3c8 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> @@ -208,6 +208,29 @@ static void rk3228_calc_drv_reg_and_bit(struct 
>> rockchip_pin_bank *bank,
>>  *bit *= ROCKCHIP_DRV_BITS_PER_PIN;
>>  }
>>  
>> +static int rk3228_set_drive(struct rockchip_pin_bank *bank,
>> +int pin_num, int strength)
>> +{
>> +struct regmap *regmap;
>> +int reg, ret;
>> +u32 data;
>> +u8 bit;
>> +int type = bank->drv[pin_num / 8].drv_type;
>> +
>> +rk3228_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit);
>> +ret = rockchip_translate_drive_value(type, strength);
>> +if (ret < 0) {
>> +debug("unsupported driver strength %d\n", strength);
>> +return ret;
>> +}
>> +
>> +/* enable the write to the equivalent lower bits */
>> +data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
>> +data |= (ret << bit);
>> +ret = regmap_write(regmap, reg, data);
>> +return ret;
>> +}
>> +
>>  static struct rockchip_pin_bank rk3228_pin_banks[] = {
>>  PIN_BANK(0, 32, "gpio0"),
>>  PIN_BANK(1, 32, "gpio1"),
>> @@ -225,7 +248,7 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
>>  .niomux_routes  = ARRAY_SIZE(rk3228_mux_route_data),
>>  .set_mux= rk3228_set_mux,
>>  .pull_calc_reg  = rk3228_calc_pull_reg_and_bit,
>> -.drv_calc_reg   = rk3228_calc_drv_reg_and_bit,
>> +.set_drive  = rk3228_set_drive,
>>  };
>>  
>>  static const struct udevice_id rk3228_pinctrl_ids[] = {
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> index 5040cd8f48..6ae9f1c76e 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> @@ -113,10 +113,6 @@ static void rk3288_calc_drv_reg_and_bit(struct 
>> rockchip_pin_bank *bank,
>>  if (bank->bank_num == 0) {
>>  *regmap = priv->regmap_pmu;
>>  *reg = RK3288_DRV_PMU_OFFSET;
>> -
>> -*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
>> -*bit = pin_num % ROCKCHIP_DRV_PINS_PER_REG;
>> -*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
>>  } else {
>>  *regmap = priv->regmap_base;
>>  *reg = RK3288_DRV_GRF_OFFSET;
>> @@ -124,11 +120,34 @@ static void rk3288_calc_drv_reg_and_bit(struct 
>> rockchip_pin_bank *bank,
>>  /* correct the offset, as we're starting with the 2nd bank */
>>  *reg -= 0x10;
>>  *reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
>> -*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
>> +}
>> +
>> +*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
>> +*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
>> +*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
>> +}
>>  
>> -*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
>> -*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
>> +static int rk3288_set_drive(struct rockchip_pin_bank *bank,
>> +int pin_num, int strength)
>> +{
>> +struct regmap *regmap;
>> +int reg, ret;
>> +u32 data;
>> +u8 bit;
>> +int type = bank->drv[pin_num / 8].drv_type;
>> +
>> +rk3288_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit);
>> +ret = rockchip_translate_drive_value(type, strength);
>> +if (ret < 0) {
>> +debug("unsupported driver strength %d\n", strength);
>> +return ret;
>>  }
>> +
>> +/* enable the write to the equivalent lower bits */
>> +data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
>> +data |= (ret << bit);
>> +ret = regmap_write(regmap, reg, data);
>> +return ret;
>>  }
>>  
>>  static struct rockchip_pin_bank rk3288_pin_banks[] = {
>> @@ -174,7 +193,7 @@ static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
>>  .niomux_routes  = ARRA

Re: [U-Boot] [PATCH v3 04/10] pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:43 AM, Kever Yang wrote:
>
> On 04/16/2019 09:50 PM, David Wu wrote:
>> RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
>> bits, need to read before write the register.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - Add some comment
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk3288.c | 10 +-
>>  1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> index 1fa601d954..5040cd8f48 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> @@ -54,7 +54,15 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, 
>> int pin, int mux)
>>  }
>>  }
>>  
>> -data = (mask << (bit + 16));
>> +/* bank0 is special, there are no higher 16 bit writing bits. */
>> +if (bank->bank_num == 0) {
>> +regmap_read(regmap, reg, &data);
>> +data &= ~(mask << bit);
>> +} else {
>> +/* enable the write to the equivalent lower bits */
>> +data = (mask << (bit + 16));
>> +}
>> +
>>  data |= (mux & mask) << bit;
>>  ret = regmap_write(regmap, reg, data);
>>  
>
>
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Re: [U-Boot] [PATCH v3 03/10] pinctrl: rockchip: Split the common set_mux() into per Soc【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:43 AM, Kever Yang wrote:
>
> On 04/16/2019 09:50 PM, David Wu wrote:
>> Such as rk3288's pins of pmu_gpio0 are a special feature, which have no
>> higher 16 writing corresponding bits, use common set_mux() func would
>> introduce more code, so implement their set_mux() in each Soc's own
>> file to reduce the size of code.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - None
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk3036.c | 25 +++
>>  drivers/pinctrl/rockchip/pinctrl-rk3128.c | 37 +
>>  drivers/pinctrl/rockchip/pinctrl-rk3188.c | 25 +++
>>  drivers/pinctrl/rockchip/pinctrl-rk322x.c | 34 +++
>>  drivers/pinctrl/rockchip/pinctrl-rk3288.c | 35 +++-
>>  drivers/pinctrl/rockchip/pinctrl-rk3328.c | 37 +
>>  drivers/pinctrl/rockchip/pinctrl-rk3368.c | 25 +++
>>  drivers/pinctrl/rockchip/pinctrl-rk3399.c | 34 +++
>>  .../pinctrl/rockchip/pinctrl-rockchip-core.c  | 41 +--
>>  drivers/pinctrl/rockchip/pinctrl-rockchip.h   |  8 
>>  drivers/pinctrl/rockchip/pinctrl-rv1108.c | 28 +
>>  11 files changed, 297 insertions(+), 32 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> index 2a651cd9b8..8969aea2e3 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> @@ -11,6 +11,30 @@
>>  
>>  #include "pinctrl-rockchip.h"
>>  
>> +static int rk3036_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
>> +{
>> +struct rockchip_pinctrl_priv *priv = bank->priv;
>> +int iomux_num = (pin / 8);
>> +struct regmap *regmap;
>> +int reg, ret, mask, mux_type;
>> +u8 bit;
>> +u32 data;
>> +
>> +regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
>> +? priv->regmap_pmu : priv->regmap_base;
>> +
>> +/* get basic quadrupel of mux registers and the correct reg inside */
>> +mux_type = bank->iomux[iomux_num].type;
>> +reg = bank->iomux[iomux_num].offset;
>> +reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
>> +
>> +data = (mask << (bit + 16));
>> +data |= (mux & mask) << bit;
>> +ret = regmap_write(regmap, reg, data);
>> +
>> +return ret;
>> +}
>> +
>>  #define RK3036_PULL_OFFSET  0x118
>>  #define RK3036_PULL_PINS_PER_REG16
>>  #define RK3036_PULL_BANK_STRIDE 8
>> @@ -41,6 +65,7 @@ static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
>>  .label  = "RK3036-GPIO",
>>  .type   = RK3036,
>>  .grf_mux_offset = 0xa8,
>> +.set_mux= rk3036_set_mux,
>>  .pull_calc_reg  = rk3036_calc_pull_reg_and_bit,
>>  };
>>  
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> index 43a6c173a0..de203334c7 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
>> @@ -98,6 +98,42 @@ static struct rockchip_mux_route_data 
>> rk3128_mux_route_data[] = {
>>  },
>>  };
>>  
>> +static int rk3128_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
>> +{
>> +struct rockchip_pinctrl_priv *priv = bank->priv;
>> +int iomux_num = (pin / 8);
>> +struct regmap *regmap;
>> +int reg, ret, mask, mux_type;
>> +u8 bit;
>> +u32 data, route_reg, route_val;
>> +
>> +regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
>> +? priv->regmap_pmu : priv->regmap_base;
>> +
>> +/* get basic quadrupel of mux registers and the correct reg inside */
>> +mux_type = bank->iomux[iomux_num].type;
>> +reg = bank->iomux[iomux_num].offset;
>> +reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
>> +
>> +if (bank->recalced_mask & BIT(pin))
>> +rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
>> +
>> +if (bank->route_mask & BIT(pin)) {
>> +if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
>> +   &route_val)) {
>> +ret = regmap_write(regmap, route_reg, route_val);
>> +if (ret)
>> +return ret;
>> +}
>> +}
>> +
>> +data = (mask << (bit + 16));
>> +data |= (mux & mask) << bit;
>> +ret = regmap_write(regmap, reg, data);
>> +
>> +return ret;
>> +}
>> +
>>  #define RK3128_PULL_OFFSET  0x118
>>  #define RK3128_PULL_PINS_PER_REG16
>>  #define RK3128_PULL_BANK_STRIDE 8
>> @@ -133,6 +169,7 @@ static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
>>  .niomux_recalced= ARRAY_SIZE(rk3128_mux_recalced_data),
>>  .iomux_routes   = rk3128_mux_route_data,
>>  .niomux_routes  =

Re: [U-Boot] [PATCH v3 02/10] pinctrl: rockchip: Remove redundant spaces【请注意,邮件由u-boot-boun...@lists.denx.de代发】 spaces

2019-05-08 Thread Kever Yang


On 05/07/2019 11:42 AM, Kever Yang wrote:
>
> On 04/16/2019 09:50 PM, David Wu wrote:
>> Some files have the redundant spaces, remove them.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - None
>>
>>  drivers/pinctrl/rockchip/pinctrl-rk3036.c | 12 ++--
>>  drivers/pinctrl/rockchip/pinctrl-rk3188.c | 12 ++--
>>  drivers/pinctrl/rockchip/pinctrl-rk322x.c | 18 -
>>  drivers/pinctrl/rockchip/pinctrl-rk3288.c | 20 +--
>>  drivers/pinctrl/rockchip/pinctrl-rk3328.c | 24 +++
>>  drivers/pinctrl/rockchip/pinctrl-rk3368.c | 16 +++
>>  drivers/pinctrl/rockchip/pinctrl-rk3399.c | 24 +++
>>  7 files changed, 63 insertions(+), 63 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> index 2729b03443..2a651cd9b8 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
>> @@ -36,12 +36,12 @@ static struct rockchip_pin_bank rk3036_pin_banks[] = {
>>  };
>>  
>>  static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
>> -.pin_banks  = rk3036_pin_banks,
>> -.nr_banks   = ARRAY_SIZE(rk3036_pin_banks),
>> -.label  = "RK3036-GPIO",
>> -.type   = RK3036,
>> -.grf_mux_offset = 0xa8,
>> -.pull_calc_reg  = rk3036_calc_pull_reg_and_bit,
>> +.pin_banks  = rk3036_pin_banks,
>> +.nr_banks   = ARRAY_SIZE(rk3036_pin_banks),
>> +.label  = "RK3036-GPIO",
>> +.type   = RK3036,
>> +.grf_mux_offset = 0xa8,
>> +.pull_calc_reg  = rk3036_calc_pull_reg_and_bit,
>>  };
>>  
>>  static const struct udevice_id rk3036_pinctrl_ids[] = {
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> index 5ed9aec938..7cc52c0075 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
>> @@ -55,12 +55,12 @@ static struct rockchip_pin_bank rk3188_pin_banks[] = {
>>  };
>>  
>>  static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
>> -.pin_banks  = rk3188_pin_banks,
>> -.nr_banks   = ARRAY_SIZE(rk3188_pin_banks),
>> -.label  = "RK3188-GPIO",
>> -.type   = RK3188,
>> -.grf_mux_offset = 0x60,
>> -.pull_calc_reg  = rk3188_calc_pull_reg_and_bit,
>> +.pin_banks  = rk3188_pin_banks,
>> +.nr_banks   = ARRAY_SIZE(rk3188_pin_banks),
>> +.label  = "RK3188-GPIO",
>> +.type   = RK3188,
>> +.grf_mux_offset = 0x60,
>> +.pull_calc_reg  = rk3188_calc_pull_reg_and_bit,
>>  };
>>  
>>  static const struct udevice_id rk3188_pinctrl_ids[] = {
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> index d2a6cd7055..d67b48a06a 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
>> @@ -183,15 +183,15 @@ static struct rockchip_pin_bank rk3228_pin_banks[] = {
>>  };
>>  
>>  static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
>> -.pin_banks  = rk3228_pin_banks,
>> -.nr_banks   = ARRAY_SIZE(rk3228_pin_banks),
>> -.label  = "RK3228-GPIO",
>> -.type   = RK3288,
>> -.grf_mux_offset = 0x0,
>> -.iomux_routes   = rk3228_mux_route_data,
>> -.niomux_routes  = ARRAY_SIZE(rk3228_mux_route_data),
>> -.pull_calc_reg  = rk3228_calc_pull_reg_and_bit,
>> -.drv_calc_reg   = rk3228_calc_drv_reg_and_bit,
>> +.pin_banks  = rk3228_pin_banks,
>> +.nr_banks   = ARRAY_SIZE(rk3228_pin_banks),
>> +.label  = "RK3228-GPIO",
>> +.type   = RK3288,
>> +.grf_mux_offset = 0x0,
>> +.iomux_routes   = rk3228_mux_route_data,
>> +.niomux_routes  = ARRAY_SIZE(rk3228_mux_route_data),
>> +.pull_calc_reg  = rk3228_calc_pull_reg_and_bit,
>> +.drv_calc_reg   = rk3228_calc_drv_reg_and_bit,
>>  };
>>  
>>  static const struct udevice_id rk3228_pinctrl_ids[] = {
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> index 60585f3208..3648f37207 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
>> @@ -124,16 +124,16 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
>>  };
>>  
>>  static

Re: [U-Boot] [PATCH v3 01/10] pinctrl: rockchip: Add pull-pin-default param and remove unused param【请注意,邮件由u-boot-boun...@lists.denx.de代发】

2019-05-08 Thread Kever Yang


On 05/07/2019 11:42 AM, Kever Yang wrote:
>
> On 04/16/2019 09:50 PM, David Wu wrote:
>> Some Socs use the pull-pin-default config param, need to add it.
>> And input-enable/disable config params are not necessary, remove it.
>>
>> Signed-off-by: David Wu 
> Reviewed-by: Kever Yang 

Applied to u-boot-rockchip, thanks!

>
> Thanks,
> - Kever
>> ---
>>
>> Change in v3:
>> - Add some commit message
>>
>>  drivers/pinctrl/rockchip/pinctrl-rockchip-core.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c 
>> b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
>> index b84b079064..77ac981c40 100644
>> --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
>> +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
>> @@ -509,9 +509,8 @@ static const struct pinconf_param rockchip_conf_params[] 
>> = {
>>  { "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 },
>>  { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
>>  { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
>> +{ "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
>>  { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
>> -{ "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
>> -{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
>>  { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
>>  { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
>>  };
>
>
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[U-Boot] [PULL]Please pull u-boot-rockchip/tags/rockchip-for-v2019.07-rc1

2019-05-08 Thread Kever Yang
Hi Tom,

Here is the second batch of changes for the Rockchip side of the repository.

Clean bill-of-health in Travis-CI at

https://travis-ci.org/keveryang/u-boot/builds/529695743

And I have test on all evb of Rockchip SoCs.

Thanks,
- Kever


The following changes since commit 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:

  Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07
09:38:00 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-rockchip.git tags/rockchip-for-v2019.07-rc1

for you to fetch changes up to 53fc7795e2310a5c52cdc240d84fed8d3373:

  doc: rockchip: Add global doc for rk3399 build/flash (2019-05-08
17:34:14 +0800)


Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4/NEO4, Nanopc T4, RockPro64, Rock PI 4
- enable sound for chromebook_minnie



David Wu (10):
  pinctrl: rockchip: Add pull-pin-default param and remove unused param
  pinctrl: rockchip: Remove redundant spaces
  pinctrl: rockchip: Split the common set_mux() into per Soc
  pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux
  pinctrl: rockchip: Split the common set_drive() func into per Soc
  pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive
strength
  pinctrl: rockchip: Split the common set_pull() func into per Soc
  pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull
  pinctrl: rockchip: Clean the unused type and label
  pinctrl: rockchip: Also move common set_schmitter func into per
Soc file

Jagan Teki (16):
  dts: Makefile: Build rockchip dtbs based on SoC types
  arm64: rockchip: dts: rk3399: Add board -u-boot.dtsi files
  rockchip: dts: rk3399-u-boot: Add u-boot, dm-pre-reloc for spi1
  arm64: rockchip: dts: rk3399: Use rk3399-u-boot.dtsi
  rockchip: rk3399: orangepi: Add SPL_TEXT_BASE
  rockchip: dts: rk3399: Sync pwm2_pin_pull_down from Linux 5.1-rc2
  Kconfig: Add default SPL_FIT_GENERATOR for rockchip
  arm: rockchip: rk3399: Move common configs in Kconfig
  rockchip: dts: rk3399: Sync rk3399-nanopi4.dtsi from Linux
  rockchip: dts: rk3399: nanopi4: Use CD pin as RK_FUNC_1
  rockchip: rk3399: Add Nanopi M4 board support
  rockchip: rk3399: Add Nanopc T4 board support
  rockchip: rk3399: Add Nanopi NEO4 board support
  rockchip: rk3399: Add Rockpro64 board support
  rockchip: rk3399: Add Rock PI 4 support
  doc: rockchip: Add global doc for rk3399 build/flash

Kever Yang (26):
  rockchip: add common header boot0.h and gpio.h for soc
  arm: remove ARCH_ROCKCHIP macro in common code
  Revert "rockchip: rk322x: ram: enable DRAM init in SPL instead of TPL"
  arm: add option for TPL support in arm 32bit
  arm: add a separate stack for TPL
  rockchip: rk322x: add CLK_EMMC_SAMPLE clock support
  rockchip: clk: rk322x: fix assert clock value
  rockchip: rk322x: add tpl support
  sysreset: enable driver support in SPL/TPL
  rockchip: rk322x: dts: enable uart2 for SPL/TPL
  rockchip: evb-rk3229: remove unnecessary defines
  rockchip: evb-rk3229: add README file for OP-TEE support
  rockchip: evb-rk322x: update defconfig with tpl and optee support
  rockchip: rk3368: support UART2/4 in board_debug_uart_init()
  rockchip: px5 update dts for spl/tpl
  rockchip: px5: update SPL size for spl/tpl
  rockchip: px5: update defconfig for TPL/SPL
  rockchip: boot0: update CONFIG_ROCKCHIP_SPL_RESERVE_IRAM for SPL only
  rockchip: dmc: rk3368: update rank number for evb-px5
  rockchip: rk3368: remove uart iomux init in SPL
  rockchip: px5: add timer0 dts node as tick timer
  rockchip: add u-boot-tpl-v8.lds
  rockchip: rk3399: add tpl support
  rockchip: ram: rk3399: update for TPL
  rockchip: rk3399: update defconfig for TPL
  Revert "pinctrl: rockchip: Add 32bit writing function for rk3288
gpio0 pinctrl"

Simon Glass (1):
  rockchip: chromebook_minnie: Enable sound

 Kconfig  |   1 +
 arch/Kconfig |   1 +
 arch/arm/Kconfig |  30 +
 arch/arm/cpu/armv8/start.S   |   4 -
 arch/arm/dts/Makefile    |  40 +-
 arch/arm/dts/rk3229-evb.dts  |   1 +
 arch/arm/dts/rk3288-veyron-minnie.dts    |  12 +
 arch/arm/dts/rk3368-px5-evb-u-boot.dtsi  |  36 ++
 arch/arm/dts/rk3399-evb-u-boot.dtsi  |   7 +
 

Re: [U-Boot] [PATCH] Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue"

2019-05-08 Thread Peng Fan
> Subject: Re: [PATCH] Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode clock
> setting issue"
> 
> On Wed, 8 May 2019 13:59:14 +
> Peng Fan  wrote:
> 
> > > -Original Message-
> > > From: Lukasz Majewski [mailto:lu...@denx.de]
> > > Sent: 2019年5月8日 14:38
> > > To: Peng Fan 
> > > Cc: u-boot@lists.denx.de; Tom Rini ; Marcel
> > > Ziswiler ; Fabio Estevam
> > > ; dl-uboot-imx ;
> > > sba...@denx.de; Stefan Agner ; BOUGH
> CHEN
> > > ; Ye Li 
> > > Subject: Re: [PATCH] Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode
> > > clock setting issue"
> > >
> > > On Wed, 8 May 2019 08:19:45 +0200
> > > Lukasz Majewski  wrote:
> > >
> > > > Hi Peng,
> > > >
> > > > > Hi Lukasz,
> > > > >
> > > > > > Subject: [PATCH] Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode
> > > > > > clock setting issue"
> > > > > >
> > > > > > This reverts commit
> 72a89e0da5ac6a4ab929b15a2b656f04f50767f6,
> > > > > > which causes the imx53 HSC to hang as the eMMC is not working
> > > > > > properly anymore.
> > > > > >
> > > > > > The exact error message:
> > > > > > MMC write: dev # 0, block # 2, count 927 ... mmc write failed
> > > > > > 0 blocks written: ERROR
> > > > > >
> > > > > > imx53 is not using the DDR mode.
> > > > > >
> > > > > > Debugging of pre_div and div generation showed that those
> > > > > > values are generated in a way, which is not matching the ones
> > > > > > from working setup.
> > > > > >
> > > > > > As the original patch was performing code refactoring, let's
> > > > > > revert this change, so all imx53 boards would work again.
> > > > >
> > > > > Could you share what is the clock value for your board?
> > > >
> > > > Sure, no problem:
> > > >
> > > > Working setup:
> > > > --
> > > >
> > > > MMC:
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 8 div: 12 set_sysctl: clk: 2240
> > > > FSL_SDHC: 0
> > > > Loading Environment from MMC...
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 8 div: 12 set_sysctl: clk: 2240
> > > >
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 8 div: 12 set_sysctl: clk: 2240
> > > >
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 1 div: 1 set_sysctl: clk: 272
> > > >
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 1 div: 0 set_sysctl: clk: 256
> > > >
> > > >
> > > >
> > > >
> > > > Broken:
> > > > ---
> > > > MMC:
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 8 div: 12 set_sysctl: clk: 2240
> > > > FSL_SDHC: 0
> > > > Loading Environment from MMC...
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 8 div: 12 set_sysctl: clk: 2240
> > > >
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 8 div: 12 set_sysctl: clk: 2240
> > > >
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 0 div: 3 set_sysctl: clk: 48
> > > >
> > > > set_sysctl: pre_div = 2 mmc->ddr: 0 sdhc_clk: 8000
> > > >  pre_div: 0 div: 1 set_sysctl: clk: 16
> > > >
> > > >
> > > > (Please also find attached patch to reproduce debug output).
> > > >
> > >
> > > And maybe the most important question - why it was necessary to
> > > refactor this code?
> > >
> > > Parts responsible for calculating pre_div and div seems not related
> > > to ddr problem (one spot issue is div <= 16 , but in the original
> > > code it was div < 16)?
> >
> > Could you help verify whether the patch fixes you issue?
> >
> > index 1b7de74a72..3347fbe738 100644
> > --- a/drivers/mmc/fsl_esdhc.c
> > +++ b/drivers/mmc/fsl_esdhc.c
> > @@ -640,8 +640,7 @@ static void set_sysctl(struct fsl_esdhc_priv
> > *priv, struct mmc *mmc, uint clock) for (; pre_div < 256; pre_div *=
> > 2) if ((sdhc_clk / pre_div) <= (clock * 16))
> > break;
> > -   } else
> > -   pre_div = 1;
> > +   }
> 
> Please examine this code thoroughly and provide patch.

The pre_div should not override the initialization value at the beginning
of the function.

> 
> The
> } else
>   pre_div = 1;
> 
> was added there for a purpose, so I'm wondering why it can be easily
> removed now.

The else was wrongly added. It is not correct.

> 
> >
> > for (div = 1; div <= 16; div++)
> > if ((sdhc_clk / (div * pre_div)) <= clock)
> >
> 
> As I've stated above - is the above for() correct?
> 
> In the original code it was div < 16, but here it is div <= 16.

Checking i.MX53 SDHC DVS, it supports [1,16], so should use "<=16", other i.MX 
has same.

Divisor:
This register is used to provide a more exact divisor to generate the desired 
SD clock frequency.
NOTE: The divider can even support odd divisor without deterioration of duty 
cycle.
The setting are as following:
0x0 Divisor by 1
0x1 Divisor by 2
0xe Divisor by 15
0xf Divisor by 16

Regards,
Peng.

> 
> >
> > Thanks,
> > Peng.
> >
> > >
> > > > >
> > > > > Thanks,
> > > > >

Re: [U-Boot] [i.MX8MM+CCF 11/41] clk: fixed_rate: export clk_fixed_rate

2019-05-08 Thread Peng Fan
> Subject: Re: [i.MX8MM+CCF 11/41] clk: fixed_rate: export clk_fixed_rate
> 
> On Wed, 8 May 2019 07:45:39 +
> Peng Fan  wrote:
> 
> > > -Original Message-
> > > From: Lukasz Majewski [mailto:lu...@denx.de]
> > > Sent: 2019年5月8日 15:40
> > > To: Peng Fan 
> > > Cc: sba...@denx.de; feste...@gmail.com; dl-uboot-imx
> > > ; s...@chromium.org;
> ja...@amarulasolutions.com;
> > > s...@denx.de; u-boot@lists.denx.de; tr...@konsulko.com
> > > Subject: Re: [i.MX8MM+CCF 11/41] clk: fixed_rate: export
> > > clk_fixed_rate
> > >
> > > On Wed, 8 May 2019 06:51:46 +
> > > Peng Fan  wrote:
> > >
> > > > > -Original Message-
> > > > > From: Lukasz Majewski [mailto:lu...@denx.de]
> > > > > Sent: 2019年5月8日 14:46
> > > > > To: Peng Fan 
> > > > > Cc: sba...@denx.de; feste...@gmail.com; dl-uboot-imx
> > > > > ; s...@chromium.org;
> > > ja...@amarulasolutions.com;
> > > > > s...@denx.de; u-boot@lists.denx.de; tr...@konsulko.com
> > > > > Subject: Re: [i.MX8MM+CCF 11/41] clk: fixed_rate: export
> > > > > clk_fixed_rate
> > > > >
> > > > > On Tue, 7 May 2019 13:27:45 + Peng Fan 
> > > > > wrote:
> > > > >
> > > > > > > Subject: Re: [i.MX8MM+CCF 11/41] clk: fixed_rate: export
> > > > > > > clk_fixed_rate
> > > > > > >
> > > > > > > Hi Peng,
> > > > > > >
> > > > > > > > Export the structure for others to use.
> > > > > > > >
> > > > > > > > Signed-off-by: Peng Fan 
> > > > > > > > ---
> > > > > > > >  drivers/clk/clk_fixed_rate.c | 8 +---
> > > > > > > > include/linux/clk-provider.h | 7 +++
> > > > > > > >  2 files changed, 8 insertions(+), 7 deletions(-)
> > > > > > > >
> > > > > > > > diff --git a/drivers/clk/clk_fixed_rate.c
> > > > > > > > b/drivers/clk/clk_fixed_rate.c index
> > > > > > > > 089f060a23..069e643fbc 100644 ---
> > > > > > > > a/drivers/clk/clk_fixed_rate.c +++
> > > > > > > > b/drivers/clk/clk_fixed_rate.c @@ -6,13 +6,7 @@  #include
> > > > > > > >   #include   #include 
> > > > > > > > -
> > > > > > > > -struct clk_fixed_rate {
> > > > > > > > -   struct clk clk;
> > > > > > > > -   unsigned long fixed_rate;
> > > > > > > > -};
> > > > > > > > -
> > > > > > > > -#define to_clk_fixed_rate(dev) ((struct
> > > > > > > > clk_fixed_rate *)dev_get_platdata(dev)) +#include
> > > > > > > > 
> > > > > > > >
> > > > > > > >  static ulong clk_fixed_rate_get_rate(struct clk *clk) {
> > > > > > > > diff --git a/include/linux/clk-provider.h
> > > > > > > > b/include/linux/clk-provider.h index
> > > > > > > > 3ed0db86d2..b2bed768b6 100644 ---
> > > > > > > > a/include/linux/clk-provider.h +++
> > > > > > > > b/include/linux/clk-provider.h @@ -112,6 +112,13 @@ struct
> > > > > > > > clk_fixed_factor {  #define
> > > > > > > > to_clk_fixed_factor(_clk) container_of(_clk, struct
> > > > > > > > clk_fixed_factor,\ clk)
> > > > > > > >
> > > > > > > > +struct clk_fixed_rate {
> > > > > > > > +   struct clk clk;
> > > > > > > > +   unsigned long fixed_rate; };
> > > > > > >
> > > > > > > I think that this struct shall stay where it was. Moreover,
> > > > > > > the clk-provider.h is not the API to be used by other parts
> > > > > > > of the clock API.
> > > > > > >
> > > > > > > The clk_fixed_rate shall be accessed via get_rate() only and
> > > > > > > in IMX6Q it is available in early SPL (parsed from dts
> > > > > > > /clocks property
> > > > > > > - the 24MHz OSC)
> > > > > > > > +
> > > > > > > > +#define to_clk_fixed_rate(dev) ((struct
> > > > > > > > clk_fixed_rate *)dev_get_platdata(dev)) +  int
> > > > > > > > clk_register(struct clk *clk, const char *drv_name,
> > > > > > > >  ulong drv_data, const char *name,
> > > > > > > >  const char *parent_name);
> > > > > > >
> > > > > > > Please explain why iMX8MM needs such global export?
> > > > > >
> > > > > > In clk-imx8mm.c, first configure ARM clk to osc24M fixed clk
> > > > > > to change pll clock.
> > > > > > +   /* Configure ARM to osc24M */
> > > > > > +   clk_get_by_id(IMX8MM_CLK_A53_SRC, &clkp);
> > > > > > +   uclass_get_device_by_name(UCLASS_CLK,
> > > > > > "clock-osc-24m",
> > > > > &devp);
> > > > > > +   clkp1 = &to_clk_fixed_rate(devp)->clk;
> > > > > > +   clk_set_parent(clkp, clkp1);
> > > > >
> > > > > This code looks a bit strange to me. Why imx8mm sets parent
> > > > > here?
> > > >
> > > > The A53 clk could not change on the fly. There is a mux here, one
> > > > is PLL, one is OSC, And there are others. If we want to change the
> > > > pll clock which is currently being used by A53, we need first
> > > > switch the A53 clk to source from OSC, then change pll clock, then
> > > > switch A53 clk back to PLL.
> > >
> > > The above description looks like a "standard" procedure for
> > > bypassing PLL when it is going to be locked.
> > >
> > > The same is also performed on IMX6Q:
> > >
> > > https://elixir.bootlin.com/linux/v5.1/source/drivers/clk/imx/clk-imx
> > > 6q.c#L88
> > >
> > > But I've not ported that part from the original Linux source code.
> >
> > i.

Re: [U-Boot] [PATCH v3 0/4] Add Cadence PCIe endpoint driver with new uclass

2019-05-08 Thread Ramon Fried
Hi Simon,
Kind reminder, just touching base.

Thanks,
Ramon.

On Sat, Apr 27, 2019 at 11:15 AM Ramon Fried  wrote:
>
>
> This patchset adds support for new uclass, UCLASS_PCI_EP
> allowing new set of PCI endpoint drivers.
> Included in the patch is also a driver for Cadence PCIe endpoint.
>
> Changes in V2:
> - Removed "pci.h: add missing maskbit" as it was already merged
>   by Simon.
> - Added PCI endpoint sandbox driver
> - Added testing for sandbox driver
> - Addressed issues raised by Simon in UCLASS_PCI_EP class implementation
>
> Changes in v3:
> - Added function to read bar config
> - Fixed a bug in set MSI implementation (missing -1)
> - Elaborate a bit more in comments
> - Added MAINTAINER entry for PCI Endpoint
> - Added more description to commit message and kmsg
> - Removed some unused functionality that can't be
>tested.
> - Removed entries from sandbox config and added implies and select
>   to arch/Kconfig sandbox entry.
> - Added more testing of sandbox driver
>
> Ramon Fried (4):
>   drivers: pci_ep: Introduce UCLASS_PCI_EP uclass
>   pci_ep: add Cadence PCIe endpoint driver
>   pci_ep: add pci endpoint sandbox driver
>   test: pci_ep: add basic pci_ep tests
>
>  MAINTAINERS   |   6 +
>  arch/Kconfig  |   2 +
>  arch/sandbox/dts/test.dts |   4 +
>  arch/sandbox/include/asm/test.h   |   8 +
>  .../pci_endpoint/cdns,cdns-pcie-ep.txt|  18 +
>  drivers/Kconfig   |   2 +
>  drivers/Makefile  |   1 +
>  drivers/pci_endpoint/Kconfig  |  34 ++
>  drivers/pci_endpoint/Makefile |   8 +
>  drivers/pci_endpoint/pci_ep-uclass.c  | 211 +
>  drivers/pci_endpoint/pcie-cadence-ep.c| 177 
>  drivers/pci_endpoint/pcie-cadence.h   | 309 +
>  drivers/pci_endpoint/sandbox-pci_ep.c | 182 
>  include/dm/uclass-id.h|   1 +
>  include/pci_ep.h  | 414 ++
>  test/dm/Makefile  |   1 +
>  test/dm/pci_ep.c  |  64 +++
>  17 files changed, 1442 insertions(+)
>  create mode 100644 
> doc/device-tree-bindings/pci_endpoint/cdns,cdns-pcie-ep.txt
>  create mode 100644 drivers/pci_endpoint/Kconfig
>  create mode 100644 drivers/pci_endpoint/Makefile
>  create mode 100644 drivers/pci_endpoint/pci_ep-uclass.c
>  create mode 100644 drivers/pci_endpoint/pcie-cadence-ep.c
>  create mode 100644 drivers/pci_endpoint/pcie-cadence.h
>  create mode 100644 drivers/pci_endpoint/sandbox-pci_ep.c
>  create mode 100644 include/pci_ep.h
>  create mode 100644 test/dm/pci_ep.c
>
> --
> 2.21.0
>
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[U-Boot] [PATCH v2 2/2] i2c: mxc: Hide kconfig based control in DM_I2C mode

2019-05-08 Thread Trent Piepho
These options only apply when not using DM_I2C.  When using device
trees, the dt will enable and control the speeds of the I2C
controller(s) and these configuration options have no effect.

So disable them in DM_I2C mode.  Otherwise they show up as decoys, and
make it look like one is enabling I2C controllers and setting the speed
when really it's doing nothing.

However, a system using a SPL build will not use DM_I2C in the SPL, even
if DM_I2C is enabled for the main u-boot.  And so the SPL might use the
kconfig based I2C speed controls while the main u-boot does not.

Cc: Sriram Dash 
Cc: Priyanka Jain 
Cc: Heiko Schocher 
Signed-off-by: Trent Piepho 
---
Changes from v1:
  Added patch in series to fix wandboard build issue
  Enable settings if SPL is enabled, as SPL will not use DM_I2C

 drivers/i2c/Kconfig | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 215624020f..095a9bc6a4 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -161,7 +161,10 @@ config SYS_I2C_MXC
  channels and operating on standard mode up to 100 kbits/s and fast
  mode up to 400 kbits/s.
 
-if SYS_I2C_MXC
+# These settings are not used with DM_I2C, however SPL doesn't use
+# DM_I2C even if DM_I2C is enabled, and so might use these settings even
+# when main u-boot does not!
+if SYS_I2C_MXC && (!DM_I2C || SPL)
 config SYS_I2C_MXC_I2C1
bool "NXP MXC I2C1"
help
-- 
2.14.5

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[U-Boot] [PATCH v2 1/2] wandboard: Don't use I2C speed Kconfig settings with DM_I2C

2019-05-08 Thread Trent Piepho
When using DM_I2C the speed value supplied to setup_i2c() is not used,
so this code required CONFIG_SYS_MXC_I2C[12]_SPEED to be defined to
compile, but did not actually use them.

Change this so we no longer need to define an unused macro to compile in
DM_I2C mode.  Also make it more clear that they do not control the bus
speed.  Otherwise it is quite easy to mistakenly believe they are used
to set the bus speed.

Cc: Heiko Schocher 
Cc: Anatolij Gustschin 
Signed-off-by: Trent Piepho 
---
 board/wandboard/wandboard.c | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index 69fbc8b690..9d7a94ff9d 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -46,6 +46,15 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ETH_PHY_AR8035_POWER   IMX_GPIO_NR(7, 13)
 #define REV_DETECTION  IMX_GPIO_NR(2, 28)
 
+/* Speed defined in Kconfig is only applicable when not using DM_I2C.  */
+#ifdef CONFIG_DM_I2C
+#define I2C1_SPEED_NON_DM  0
+#define I2C2_SPEED_NON_DM  0
+#else
+#define I2C1_SPEED_NON_DM  CONFIG_SYS_MXC_I2C1_SPEED
+#define I2C2_SPEED_NON_DM  CONFIG_SYS_MXC_I2C2_SPEED
+#endif
+
 static bool with_pmic;
 
 int dram_init(void)
@@ -463,13 +472,13 @@ int board_init(void)
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
 #if defined(CONFIG_VIDEO_IPUV3)
-   setup_i2c(1, CONFIG_SYS_MXC_I2C1_SPEED, 0x7f, &mx6dl_i2c2_pad_info);
+   setup_i2c(1, I2C1_SPEED_NON_DM, 0x7f, &mx6dl_i2c2_pad_info);
if (is_mx6dq() || is_mx6dqp()) {
-   setup_i2c(1, CONFIG_SYS_MXC_I2C1_SPEED, 0x7f, 
&mx6q_i2c2_pad_info);
-   setup_i2c(2, CONFIG_SYS_MXC_I2C2_SPEED, 0x7f, 
&mx6q_i2c3_pad_info);
+   setup_i2c(1, I2C1_SPEED_NON_DM, 0x7f, &mx6q_i2c2_pad_info);
+   setup_i2c(2, I2C2_SPEED_NON_DM, 0x7f, &mx6q_i2c3_pad_info);
} else {
-   setup_i2c(1, CONFIG_SYS_MXC_I2C1_SPEED, 0x7f, 
&mx6dl_i2c2_pad_info);
-   setup_i2c(2, CONFIG_SYS_MXC_I2C2_SPEED, 0x7f, 
&mx6dl_i2c3_pad_info);
+   setup_i2c(1, I2C1_SPEED_NON_DM, 0x7f, &mx6dl_i2c2_pad_info);
+   setup_i2c(2, I2C2_SPEED_NON_DM, 0x7f, &mx6dl_i2c3_pad_info);
}
 
setup_display();
-- 
2.14.5

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Re: [U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Vladimir Oltean
On 5/9/19 1:55 AM, Tom Rini wrote:
> On Wed, May 08, 2019 at 10:52:28PM +, Vladimir Oltean wrote:
>> On 5/9/19 1:48 AM, Tom Rini wrote:
>>> On Wed, May 08, 2019 at 10:45:50PM +, Vladimir Oltean wrote:
 On 5/9/19 1:42 AM, Tom Rini wrote:
> On Wed, May 08, 2019 at 10:40:57PM +, Vladimir Oltean wrote:
>> On 5/9/19 1:24 AM, Joe Hershberger wrote:
>>> On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  
>>> wrote:

 Hi Tom,

 The following changes since commit 
 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:

 I rebased on your master and built for BB Black. DHCP seems to work 
 fine.
 MLO also now fits again.

   Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 
 09:38:00 -0400)

 are available in the git repository at:

   git://git.denx.de/u-boot-net.git master

 for you to fetch changes up to 
 8d0c6858455e89b089222a08d55ff711681ca011:

   net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 
 14:51:55 -0500)

 
 Carlo Caione (4):
   net: phy: Add generic helpers to access MMD PHY registers
   net: phy: ti: use generic helpers to access MMD registers
   cmd: mdio: Switch to generic helpers when accessing the 
 registers
   net: phy: realtek: Introduce quirk to mark RXC not stoppable

 James Byrne (2):
   net: phy: micrel: Use correct skew values on KSZ9021
   net: phy: micrel: Find Micrel PHY node correctly

 Murali Karicheri (2):
   ARM: k2g-gp-evm: update to rgmii pinmux configuration
   ARM: k2g-ice: Add pinmux support for rgmii interface

 Pankaj Bansal (1):
   drivers: net: ldpaa_eth: fix resource leak

 Siva Durga Prasad Paladugu (2):
   net: phy: Reloc next and prev pointers inside phy_drivers
   net: phy: Fix return value check phy_probe

 Valentin-catalin Neacsu (1):
   net: phy: aquantia: Set only autoneg on in register 4.c441

 Vladimir Oltean (6):
   net: phy: ar803x: Address packet drops at low traffic rate 
 due to SmartEEE feature
   net: phy: ar803x: Make RGMII Tx delays actually configurable 
 for AR8035
   net: phy: ar803x: Use common functions for RGMII internal 
 delays
   net: phy: ar803x: Clarify the configuration of the CLK_25M 
 output pin
   net: phy: ar803x: Explicitly disable RGMII delays
>>>
>>> Tom, this [1] is the patch that is breaking the evm. It doesn't affect
>>> BB Black because it uses an SMSC phy, where as this evm uses an
>>> AR8031/AR8033.
>>>
>>> Is it possible the device tree [2] is wrong for the board? It lists
>>> 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
>>> delay is now being disabled.
>>>
>>> Any thoughts, Vladimir?
>>>
>>> Thanks,
>>> -Joe
>>>
>>> [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
>>> [2] arch/arm/dts/am335x-evm.dts
>>>
   net: phy: ar803x: Clarify the intention of ar8021_config

  arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
  arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
  arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
  arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
  arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
  arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
  arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
  board/ti/ks2_evm/mux-k2g.h  |  36 +++
  cmd/mdio.c  |  27 +++--
  doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
  drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
  drivers/net/phy/Kconfig |  41 
  drivers/net/phy/aquantia.c  |   7 +-
  drivers/net/phy/atheros.c   | 128 
 ---
  drivers/net/phy/micrel_ksz90x1.c|  24 -
  drivers/net/phy/phy.c   |  21 +++-
  drivers/net/phy/realtek.c   |  19 
  drivers/net/phy/ti.c| 130 
 +---
  include/phy.h   |  70 

Re: [U-Boot] [PATCH] Convert CONFIG_IP_DEFRAG to Kconfig

2019-05-08 Thread Joe Hershberger
On Fri, Mar 1, 2019 at 3:44 PM Joe Hershberger  wrote:
>
> On Tue, Feb 12, 2019 at 6:29 AM Christian Gmeiner
>  wrote:
> >
> > This converts the following to Kconfig:
> >CONFIG_IP_DEFRAG
> >
> > Signed-off-by: Christian Gmeiner 
>
> Thanks for doing this, but don't we also need to migrate the existing
> targets that define this?
>
> include/configs/apalis_imx6.h:72:#define CONFIG_IP_DEFRAG
> include/configs/colibri_imx6.h:60:#define CONFIG_IP_DEFRAG
> include/configs/xilinx_versal.h:44:#define CONFIG_IP_DEFRAG
> include/configs/apalis_t30.h:31:#define CONFIG_IP_DEFRAG
> include/configs/sandbox.h:74:#define CONFIG_IP_DEFRAG
> include/configs/colibri-imx6ull.h:26:#define CONFIG_IP_DEFRAG
> include/configs/apalis-tk1.h:37:#define CONFIG_IP_DEFRAG
> include/configs/colibri_t30.h:30:#define CONFIG_IP_DEFRAG
> include/configs/colibri_t20.h:21:#define CONFIG_IP_DEFRAG
> include/configs/colibri_imx7.h:25:#define CONFIG_IP_DEFRAG
>

Any word on this?

Thanks,
-Joe

>
> > ---
> >  net/Kconfig  | 6 ++
> >  scripts/config_whitelist.txt | 1 -
> >  2 files changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/net/Kconfig b/net/Kconfig
> > index f2363e5256..5f5f632469 100644
> > --- a/net/Kconfig
> > +++ b/net/Kconfig
> > @@ -8,6 +8,12 @@ menuconfig NET
> >
> >  if NET
> >
> > +config IP_DEFRAG
> > +   bool "Support IP datagram reassembly"
> > +   help
> > + Selecting this will enable IP datagram reassembly according
> > + to the algorithm in RFC815.
> > +
> >  config NET_RANDOM_ETHADDR
> > bool "Random ethaddr if unset"
> > help
> > diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
> > index 2b3572568b..6b746c5242 100644
> > --- a/scripts/config_whitelist.txt
> > +++ b/scripts/config_whitelist.txt
> > @@ -972,7 +972,6 @@ CONFIG_IPAM390_GPIO_BOOTMODE
> >  CONFIG_IPAM390_GPIO_LED_GREEN
> >  CONFIG_IPAM390_GPIO_LED_RED
> >  CONFIG_IPROC
> > -CONFIG_IP_DEFRAG
> >  CONFIG_IRAM_BASE
> >  CONFIG_IRAM_END
> >  CONFIG_IRAM_SIZE
> > --
> > 2.20.1
> >
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > https://lists.denx.de/listinfo/u-boot
> ___
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Re: [U-Boot] [PATCH] eth: mtk-eth: fix incorrect read of phy-handle

2019-05-08 Thread Joe Hershberger
On Sun, Apr 28, 2019 at 2:09 AM Weijie Gao  wrote:
>
> In mt7629-rfb.dts, the phy-handle is a reference to the node phy0, not the
> node itself:
>
> phy-handle = <&phy0>;
>
> phy0: ethernet-phy@0 {
> reg = <0>;
> }
>
> However the driver used ofnode_find_subnode("phy-handle") to read the node.
> It will always fail.
>
> This patch replaces ofnode_find_subnode with dev_read_phandle_with_args to
> make sure the node can be read correctly.
>
> Cc: Joe Hershberger 
> Signed-off-by: Weijie Gao 

Acked-by: Joe Hershberger 
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Re: [U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Tom Rini
On Wed, May 08, 2019 at 10:52:28PM +, Vladimir Oltean wrote:
> On 5/9/19 1:48 AM, Tom Rini wrote:
> > On Wed, May 08, 2019 at 10:45:50PM +, Vladimir Oltean wrote:
> >> On 5/9/19 1:42 AM, Tom Rini wrote:
> >>> On Wed, May 08, 2019 at 10:40:57PM +, Vladimir Oltean wrote:
>  On 5/9/19 1:24 AM, Joe Hershberger wrote:
> > On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  
> > wrote:
> >>
> >> Hi Tom,
> >>
> >> The following changes since commit 
> >> 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:
> >>
> >> I rebased on your master and built for BB Black. DHCP seems to work 
> >> fine.
> >> MLO also now fits again.
> >>
> >>  Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 
> >> 09:38:00 -0400)
> >>
> >> are available in the git repository at:
> >>
> >>  git://git.denx.de/u-boot-net.git master
> >>
> >> for you to fetch changes up to 
> >> 8d0c6858455e89b089222a08d55ff711681ca011:
> >>
> >>  net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 
> >> 14:51:55 -0500)
> >>
> >> 
> >> Carlo Caione (4):
> >>  net: phy: Add generic helpers to access MMD PHY registers
> >>  net: phy: ti: use generic helpers to access MMD registers
> >>  cmd: mdio: Switch to generic helpers when accessing the 
> >> registers
> >>  net: phy: realtek: Introduce quirk to mark RXC not stoppable
> >>
> >> James Byrne (2):
> >>  net: phy: micrel: Use correct skew values on KSZ9021
> >>  net: phy: micrel: Find Micrel PHY node correctly
> >>
> >> Murali Karicheri (2):
> >>  ARM: k2g-gp-evm: update to rgmii pinmux configuration
> >>  ARM: k2g-ice: Add pinmux support for rgmii interface
> >>
> >> Pankaj Bansal (1):
> >>  drivers: net: ldpaa_eth: fix resource leak
> >>
> >> Siva Durga Prasad Paladugu (2):
> >>  net: phy: Reloc next and prev pointers inside phy_drivers
> >>  net: phy: Fix return value check phy_probe
> >>
> >> Valentin-catalin Neacsu (1):
> >>  net: phy: aquantia: Set only autoneg on in register 4.c441
> >>
> >> Vladimir Oltean (6):
> >>  net: phy: ar803x: Address packet drops at low traffic rate 
> >> due to SmartEEE feature
> >>  net: phy: ar803x: Make RGMII Tx delays actually configurable 
> >> for AR8035
> >>  net: phy: ar803x: Use common functions for RGMII internal 
> >> delays
> >>  net: phy: ar803x: Clarify the configuration of the CLK_25M 
> >> output pin
> >>  net: phy: ar803x: Explicitly disable RGMII delays
> >
> > Tom, this [1] is the patch that is breaking the evm. It doesn't affect
> > BB Black because it uses an SMSC phy, where as this evm uses an
> > AR8031/AR8033.
> >
> > Is it possible the device tree [2] is wrong for the board? It lists
> > 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
> > delay is now being disabled.
> >
> > Any thoughts, Vladimir?
> >
> > Thanks,
> > -Joe
> >
> > [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
> > [2] arch/arm/dts/am335x-evm.dts
> >
> >>  net: phy: ar803x: Clarify the intention of ar8021_config
> >>
> >> arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
> >> arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
> >> arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
> >> arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
> >> arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
> >> arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
> >> arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
> >> board/ti/ks2_evm/mux-k2g.h  |  36 +++
> >> cmd/mdio.c  |  27 +++--
> >> doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
> >> drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
> >> drivers/net/phy/Kconfig |  41 
> >> drivers/net/phy/aquantia.c  |   7 +-
> >> drivers/net/phy/atheros.c   | 128 
> >> ---
> >> drivers/net/phy/micrel_ksz90x1.c|  24 -
> >> drivers/net/phy/phy.c   |  21 +++-
> >> drivers/net/phy/realtek.c   |  19 
> >> drivers/net/phy/ti.c| 130 
> >> +---
> >> include/phy.h   |  70 +
> >> 19 files changed, 394 insertions(+), 221 deletions(

Re: [U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Vladimir Oltean
On 5/9/19 1:48 AM, Tom Rini wrote:
> On Wed, May 08, 2019 at 10:45:50PM +, Vladimir Oltean wrote:
>> On 5/9/19 1:42 AM, Tom Rini wrote:
>>> On Wed, May 08, 2019 at 10:40:57PM +, Vladimir Oltean wrote:
 On 5/9/19 1:24 AM, Joe Hershberger wrote:
> On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  
> wrote:
>>
>> Hi Tom,
>>
>> The following changes since commit 
>> 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:
>>
>> I rebased on your master and built for BB Black. DHCP seems to work fine.
>> MLO also now fits again.
>>
>>  Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 
>> 09:38:00 -0400)
>>
>> are available in the git repository at:
>>
>>  git://git.denx.de/u-boot-net.git master
>>
>> for you to fetch changes up to 8d0c6858455e89b089222a08d55ff711681ca011:
>>
>>  net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 
>> 14:51:55 -0500)
>>
>> 
>> Carlo Caione (4):
>>  net: phy: Add generic helpers to access MMD PHY registers
>>  net: phy: ti: use generic helpers to access MMD registers
>>  cmd: mdio: Switch to generic helpers when accessing the 
>> registers
>>  net: phy: realtek: Introduce quirk to mark RXC not stoppable
>>
>> James Byrne (2):
>>  net: phy: micrel: Use correct skew values on KSZ9021
>>  net: phy: micrel: Find Micrel PHY node correctly
>>
>> Murali Karicheri (2):
>>  ARM: k2g-gp-evm: update to rgmii pinmux configuration
>>  ARM: k2g-ice: Add pinmux support for rgmii interface
>>
>> Pankaj Bansal (1):
>>  drivers: net: ldpaa_eth: fix resource leak
>>
>> Siva Durga Prasad Paladugu (2):
>>  net: phy: Reloc next and prev pointers inside phy_drivers
>>  net: phy: Fix return value check phy_probe
>>
>> Valentin-catalin Neacsu (1):
>>  net: phy: aquantia: Set only autoneg on in register 4.c441
>>
>> Vladimir Oltean (6):
>>  net: phy: ar803x: Address packet drops at low traffic rate due 
>> to SmartEEE feature
>>  net: phy: ar803x: Make RGMII Tx delays actually configurable 
>> for AR8035
>>  net: phy: ar803x: Use common functions for RGMII internal delays
>>  net: phy: ar803x: Clarify the configuration of the CLK_25M 
>> output pin
>>  net: phy: ar803x: Explicitly disable RGMII delays
>
> Tom, this [1] is the patch that is breaking the evm. It doesn't affect
> BB Black because it uses an SMSC phy, where as this evm uses an
> AR8031/AR8033.
>
> Is it possible the device tree [2] is wrong for the board? It lists
> 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
> delay is now being disabled.
>
> Any thoughts, Vladimir?
>
> Thanks,
> -Joe
>
> [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
> [2] arch/arm/dts/am335x-evm.dts
>
>>  net: phy: ar803x: Clarify the intention of ar8021_config
>>
>> arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
>> arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
>> arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
>> arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
>> arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
>> arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
>> arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
>> board/ti/ks2_evm/mux-k2g.h  |  36 +++
>> cmd/mdio.c  |  27 +++--
>> doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
>> drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
>> drivers/net/phy/Kconfig |  41 
>> drivers/net/phy/aquantia.c  |   7 +-
>> drivers/net/phy/atheros.c   | 128 
>> ---
>> drivers/net/phy/micrel_ksz90x1.c|  24 -
>> drivers/net/phy/phy.c   |  21 +++-
>> drivers/net/phy/realtek.c   |  19 
>> drivers/net/phy/ti.c| 130 
>> +---
>> include/phy.h   |  70 +
>> 19 files changed, 394 insertions(+), 221 deletions(-)
>>
>> Thanks!
>> -Joe
>> ___
>> U-Boot mailing list
>> U-Boot@lists.denx.de
>> https://lists.denx.de/listinfo/u-boot
>

 Hi Joe, Tom,

 It sounds like what Joe pointed to (my patch) has a high chance of
 

Re: [U-Boot] [EXT] Re: Pull request: u-boot-net.git master

2019-05-08 Thread Vladimir Oltean
On 5/9/19 1:24 AM, Joe Hershberger wrote:
> On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  wrote:
>>
>> Hi Tom,
>>
>> The following changes since commit 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:
>>
>> I rebased on your master and built for BB Black. DHCP seems to work fine.
>> MLO also now fits again.
>>
>>Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 09:38:00 
>> -0400)
>>
>> are available in the git repository at:
>>
>>git://git.denx.de/u-boot-net.git master
>>
>> for you to fetch changes up to 8d0c6858455e89b089222a08d55ff711681ca011:
>>
>>net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 14:51:55 
>> -0500)
>>
>> 
>> Carlo Caione (4):
>>net: phy: Add generic helpers to access MMD PHY registers
>>net: phy: ti: use generic helpers to access MMD registers
>>cmd: mdio: Switch to generic helpers when accessing the registers
>>net: phy: realtek: Introduce quirk to mark RXC not stoppable
>>
>> James Byrne (2):
>>net: phy: micrel: Use correct skew values on KSZ9021
>>net: phy: micrel: Find Micrel PHY node correctly
>>
>> Murali Karicheri (2):
>>ARM: k2g-gp-evm: update to rgmii pinmux configuration
>>ARM: k2g-ice: Add pinmux support for rgmii interface
>>
>> Pankaj Bansal (1):
>>drivers: net: ldpaa_eth: fix resource leak
>>
>> Siva Durga Prasad Paladugu (2):
>>net: phy: Reloc next and prev pointers inside phy_drivers
>>net: phy: Fix return value check phy_probe
>>
>> Valentin-catalin Neacsu (1):
>>net: phy: aquantia: Set only autoneg on in register 4.c441
>>
>> Vladimir Oltean (6):
>>net: phy: ar803x: Address packet drops at low traffic rate due to 
>> SmartEEE feature
>>net: phy: ar803x: Make RGMII Tx delays actually configurable for 
>> AR8035
>>net: phy: ar803x: Use common functions for RGMII internal delays
>>net: phy: ar803x: Clarify the configuration of the CLK_25M output pin
>>net: phy: ar803x: Explicitly disable RGMII delays
> 
> Tom, this [1] is the patch that is breaking the evm. It doesn't affect
> BB Black because it uses an SMSC phy, where as this evm uses an
> AR8031/AR8033.
> 
> Is it possible the device tree [2] is wrong for the board? It lists
> 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
> delay is now being disabled.
> 
> Any thoughts, Vladimir?
> 
> Thanks,
> -Joe
> 
> [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
> [2] arch/arm/dts/am335x-evm.dts
> 
>>net: phy: ar803x: Clarify the intention of ar8021_config
>>
>>   arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
>>   arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
>>   arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
>>   arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
>>   arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
>>   arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
>>   arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
>>   board/ti/ks2_evm/mux-k2g.h  |  36 +++
>>   cmd/mdio.c  |  27 +++--
>>   doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
>>   drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
>>   drivers/net/phy/Kconfig |  41 
>>   drivers/net/phy/aquantia.c  |   7 +-
>>   drivers/net/phy/atheros.c   | 128 
>> ---
>>   drivers/net/phy/micrel_ksz90x1.c|  24 -
>>   drivers/net/phy/phy.c   |  21 +++-
>>   drivers/net/phy/realtek.c   |  19 
>>   drivers/net/phy/ti.c| 130 
>> +---
>>   include/phy.h   |  70 +
>>   19 files changed, 394 insertions(+), 221 deletions(-)
>>
>> Thanks!
>> -Joe
>> ___
>> U-Boot mailing list
>> U-Boot@lists.denx.de
>> https://lists.denx.de/listinfo/u-boot
> 

Hi Joe, Tom,

It sounds like what Joe pointed to (my patch) has a high chance of 
causing link failure.
If the board is relying on RX delays in the Atheros PHY to ensure 
correct RGMII timing budget, then for sure it was working before and now 
it is broken. In that case, it was working by mistake; the DT blob is 
broken and should be corrected.
Sorry for the trouble this has caused.

Regards,
-Vladimir
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Re: [U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Tom Rini
On Wed, May 08, 2019 at 10:45:50PM +, Vladimir Oltean wrote:
> On 5/9/19 1:42 AM, Tom Rini wrote:
> > On Wed, May 08, 2019 at 10:40:57PM +, Vladimir Oltean wrote:
> >> On 5/9/19 1:24 AM, Joe Hershberger wrote:
> >>> On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  
> >>> wrote:
> 
>  Hi Tom,
> 
>  The following changes since commit 
>  8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:
> 
>  I rebased on your master and built for BB Black. DHCP seems to work fine.
>  MLO also now fits again.
> 
>  Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 
>  09:38:00 -0400)
> 
>  are available in the git repository at:
> 
>  git://git.denx.de/u-boot-net.git master
> 
>  for you to fetch changes up to 8d0c6858455e89b089222a08d55ff711681ca011:
> 
>  net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 
>  14:51:55 -0500)
> 
>  
>  Carlo Caione (4):
>  net: phy: Add generic helpers to access MMD PHY registers
>  net: phy: ti: use generic helpers to access MMD registers
>  cmd: mdio: Switch to generic helpers when accessing the registers
>  net: phy: realtek: Introduce quirk to mark RXC not stoppable
> 
>  James Byrne (2):
>  net: phy: micrel: Use correct skew values on KSZ9021
>  net: phy: micrel: Find Micrel PHY node correctly
> 
>  Murali Karicheri (2):
>  ARM: k2g-gp-evm: update to rgmii pinmux configuration
>  ARM: k2g-ice: Add pinmux support for rgmii interface
> 
>  Pankaj Bansal (1):
>  drivers: net: ldpaa_eth: fix resource leak
> 
>  Siva Durga Prasad Paladugu (2):
>  net: phy: Reloc next and prev pointers inside phy_drivers
>  net: phy: Fix return value check phy_probe
> 
>  Valentin-catalin Neacsu (1):
>  net: phy: aquantia: Set only autoneg on in register 4.c441
> 
>  Vladimir Oltean (6):
>  net: phy: ar803x: Address packet drops at low traffic rate due 
>  to SmartEEE feature
>  net: phy: ar803x: Make RGMII Tx delays actually configurable for 
>  AR8035
>  net: phy: ar803x: Use common functions for RGMII internal delays
>  net: phy: ar803x: Clarify the configuration of the CLK_25M 
>  output pin
>  net: phy: ar803x: Explicitly disable RGMII delays
> >>>
> >>> Tom, this [1] is the patch that is breaking the evm. It doesn't affect
> >>> BB Black because it uses an SMSC phy, where as this evm uses an
> >>> AR8031/AR8033.
> >>>
> >>> Is it possible the device tree [2] is wrong for the board? It lists
> >>> 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
> >>> delay is now being disabled.
> >>>
> >>> Any thoughts, Vladimir?
> >>>
> >>> Thanks,
> >>> -Joe
> >>>
> >>> [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
> >>> [2] arch/arm/dts/am335x-evm.dts
> >>>
>  net: phy: ar803x: Clarify the intention of ar8021_config
> 
> arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
> arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
> arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
> arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
> arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
> arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
> arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
> board/ti/ks2_evm/mux-k2g.h  |  36 +++
> cmd/mdio.c  |  27 +++--
> doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
> drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
> drivers/net/phy/Kconfig |  41 
> drivers/net/phy/aquantia.c  |   7 +-
> drivers/net/phy/atheros.c   | 128 
>  ---
> drivers/net/phy/micrel_ksz90x1.c|  24 -
> drivers/net/phy/phy.c   |  21 +++-
> drivers/net/phy/realtek.c   |  19 
> drivers/net/phy/ti.c| 130 
>  +---
> include/phy.h   |  70 +
> 19 files changed, 394 insertions(+), 221 deletions(-)
> 
>  Thanks!
>  -Joe
>  ___
>  U-Boot mailing list
>  U-Boot@lists.denx.de
>  https://lists.denx.de/listinfo/u-boot
> >>>
> >>
> >> Hi Joe, Tom,
> >>
> >> It sounds like what Joe pointed to (my patch) has a high chance of
> >> causing link failure.
> >> If the board is relying on RX delays in the Atheros PHY to e

Re: [U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Vladimir Oltean
On 5/9/19 1:42 AM, Tom Rini wrote:
> On Wed, May 08, 2019 at 10:40:57PM +, Vladimir Oltean wrote:
>> On 5/9/19 1:24 AM, Joe Hershberger wrote:
>>> On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  
>>> wrote:

 Hi Tom,

 The following changes since commit 
 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:

 I rebased on your master and built for BB Black. DHCP seems to work fine.
 MLO also now fits again.

 Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 
 09:38:00 -0400)

 are available in the git repository at:

 git://git.denx.de/u-boot-net.git master

 for you to fetch changes up to 8d0c6858455e89b089222a08d55ff711681ca011:

 net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 14:51:55 
 -0500)

 
 Carlo Caione (4):
 net: phy: Add generic helpers to access MMD PHY registers
 net: phy: ti: use generic helpers to access MMD registers
 cmd: mdio: Switch to generic helpers when accessing the registers
 net: phy: realtek: Introduce quirk to mark RXC not stoppable

 James Byrne (2):
 net: phy: micrel: Use correct skew values on KSZ9021
 net: phy: micrel: Find Micrel PHY node correctly

 Murali Karicheri (2):
 ARM: k2g-gp-evm: update to rgmii pinmux configuration
 ARM: k2g-ice: Add pinmux support for rgmii interface

 Pankaj Bansal (1):
 drivers: net: ldpaa_eth: fix resource leak

 Siva Durga Prasad Paladugu (2):
 net: phy: Reloc next and prev pointers inside phy_drivers
 net: phy: Fix return value check phy_probe

 Valentin-catalin Neacsu (1):
 net: phy: aquantia: Set only autoneg on in register 4.c441

 Vladimir Oltean (6):
 net: phy: ar803x: Address packet drops at low traffic rate due to 
 SmartEEE feature
 net: phy: ar803x: Make RGMII Tx delays actually configurable for 
 AR8035
 net: phy: ar803x: Use common functions for RGMII internal delays
 net: phy: ar803x: Clarify the configuration of the CLK_25M output 
 pin
 net: phy: ar803x: Explicitly disable RGMII delays
>>>
>>> Tom, this [1] is the patch that is breaking the evm. It doesn't affect
>>> BB Black because it uses an SMSC phy, where as this evm uses an
>>> AR8031/AR8033.
>>>
>>> Is it possible the device tree [2] is wrong for the board? It lists
>>> 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
>>> delay is now being disabled.
>>>
>>> Any thoughts, Vladimir?
>>>
>>> Thanks,
>>> -Joe
>>>
>>> [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
>>> [2] arch/arm/dts/am335x-evm.dts
>>>
 net: phy: ar803x: Clarify the intention of ar8021_config

arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
board/ti/ks2_evm/mux-k2g.h  |  36 +++
cmd/mdio.c  |  27 +++--
doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
drivers/net/phy/Kconfig |  41 
drivers/net/phy/aquantia.c  |   7 +-
drivers/net/phy/atheros.c   | 128 
 ---
drivers/net/phy/micrel_ksz90x1.c|  24 -
drivers/net/phy/phy.c   |  21 +++-
drivers/net/phy/realtek.c   |  19 
drivers/net/phy/ti.c| 130 
 +---
include/phy.h   |  70 +
19 files changed, 394 insertions(+), 221 deletions(-)

 Thanks!
 -Joe
 ___
 U-Boot mailing list
 U-Boot@lists.denx.de
 https://lists.denx.de/listinfo/u-boot
>>>
>>
>> Hi Joe, Tom,
>>
>> It sounds like what Joe pointed to (my patch) has a high chance of
>> causing link failure.
>> If the board is relying on RX delays in the Atheros PHY to ensure
>> correct RGMII timing budget, then for sure it was working before and now
>> it is broken. In that case, it was working by mistake; the DT blob is
>> broken and should be corrected.
>> Sorry for the trouble this has caused.
> 
> How is this handled in the Linux kernel and/or why doesn't

Re: [U-Boot] [EXT] Re: Pull request: u-boot-net.git master

2019-05-08 Thread Tom Rini
On Wed, May 08, 2019 at 10:40:57PM +, Vladimir Oltean wrote:
> On 5/9/19 1:24 AM, Joe Hershberger wrote:
> > On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  
> > wrote:
> >>
> >> Hi Tom,
> >>
> >> The following changes since commit 
> >> 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:
> >>
> >> I rebased on your master and built for BB Black. DHCP seems to work fine.
> >> MLO also now fits again.
> >>
> >>Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 
> >> 09:38:00 -0400)
> >>
> >> are available in the git repository at:
> >>
> >>git://git.denx.de/u-boot-net.git master
> >>
> >> for you to fetch changes up to 8d0c6858455e89b089222a08d55ff711681ca011:
> >>
> >>net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 14:51:55 
> >> -0500)
> >>
> >> 
> >> Carlo Caione (4):
> >>net: phy: Add generic helpers to access MMD PHY registers
> >>net: phy: ti: use generic helpers to access MMD registers
> >>cmd: mdio: Switch to generic helpers when accessing the registers
> >>net: phy: realtek: Introduce quirk to mark RXC not stoppable
> >>
> >> James Byrne (2):
> >>net: phy: micrel: Use correct skew values on KSZ9021
> >>net: phy: micrel: Find Micrel PHY node correctly
> >>
> >> Murali Karicheri (2):
> >>ARM: k2g-gp-evm: update to rgmii pinmux configuration
> >>ARM: k2g-ice: Add pinmux support for rgmii interface
> >>
> >> Pankaj Bansal (1):
> >>drivers: net: ldpaa_eth: fix resource leak
> >>
> >> Siva Durga Prasad Paladugu (2):
> >>net: phy: Reloc next and prev pointers inside phy_drivers
> >>net: phy: Fix return value check phy_probe
> >>
> >> Valentin-catalin Neacsu (1):
> >>net: phy: aquantia: Set only autoneg on in register 4.c441
> >>
> >> Vladimir Oltean (6):
> >>net: phy: ar803x: Address packet drops at low traffic rate due to 
> >> SmartEEE feature
> >>net: phy: ar803x: Make RGMII Tx delays actually configurable for 
> >> AR8035
> >>net: phy: ar803x: Use common functions for RGMII internal delays
> >>net: phy: ar803x: Clarify the configuration of the CLK_25M output 
> >> pin
> >>net: phy: ar803x: Explicitly disable RGMII delays
> > 
> > Tom, this [1] is the patch that is breaking the evm. It doesn't affect
> > BB Black because it uses an SMSC phy, where as this evm uses an
> > AR8031/AR8033.
> > 
> > Is it possible the device tree [2] is wrong for the board? It lists
> > 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
> > delay is now being disabled.
> > 
> > Any thoughts, Vladimir?
> > 
> > Thanks,
> > -Joe
> > 
> > [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
> > [2] arch/arm/dts/am335x-evm.dts
> > 
> >>net: phy: ar803x: Clarify the intention of ar8021_config
> >>
> >>   arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
> >>   arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
> >>   arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
> >>   arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
> >>   arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
> >>   arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
> >>   arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
> >>   board/ti/ks2_evm/mux-k2g.h  |  36 +++
> >>   cmd/mdio.c  |  27 +++--
> >>   doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
> >>   drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
> >>   drivers/net/phy/Kconfig |  41 
> >>   drivers/net/phy/aquantia.c  |   7 +-
> >>   drivers/net/phy/atheros.c   | 128 
> >> ---
> >>   drivers/net/phy/micrel_ksz90x1.c|  24 -
> >>   drivers/net/phy/phy.c   |  21 +++-
> >>   drivers/net/phy/realtek.c   |  19 
> >>   drivers/net/phy/ti.c| 130 
> >> +---
> >>   include/phy.h   |  70 +
> >>   19 files changed, 394 insertions(+), 221 deletions(-)
> >>
> >> Thanks!
> >> -Joe
> >> ___
> >> U-Boot mailing list
> >> U-Boot@lists.denx.de
> >> https://lists.denx.de/listinfo/u-boot
> > 
> 
> Hi Joe, Tom,
> 
> It sounds like what Joe pointed to (my patch) has a high chance of 
> causing link failure.
> If the board is relying on RX delays in the Atheros PHY to ensure 
> correct RGMII timing budget, then for sure it was working before and now 
> it is broken. In that case, it was working by mistake; the DT blob is 
> broken and should be corrected.
> Sorry for the trouble this has caused.

How is this handled in the Linux kernel and/or why doesn't it fail
there?

-- 
Tom


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Re: [U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Tom Rini
On Wed, May 08, 2019 at 10:24:29PM +, Joe Hershberger wrote:
> On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  wrote:
> >
> > Hi Tom,
> >
> > The following changes since commit 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:
> >
> > I rebased on your master and built for BB Black. DHCP seems to work fine.
> > MLO also now fits again.
> >
> >   Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 09:38:00 
> > -0400)
> >
> > are available in the git repository at:
> >
> >   git://git.denx.de/u-boot-net.git master
> >
> > for you to fetch changes up to 8d0c6858455e89b089222a08d55ff711681ca011:
> >
> >   net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 14:51:55 
> > -0500)
> >
> > 
> > Carlo Caione (4):
> >   net: phy: Add generic helpers to access MMD PHY registers
> >   net: phy: ti: use generic helpers to access MMD registers
> >   cmd: mdio: Switch to generic helpers when accessing the registers
> >   net: phy: realtek: Introduce quirk to mark RXC not stoppable
> >
> > James Byrne (2):
> >   net: phy: micrel: Use correct skew values on KSZ9021
> >   net: phy: micrel: Find Micrel PHY node correctly
> >
> > Murali Karicheri (2):
> >   ARM: k2g-gp-evm: update to rgmii pinmux configuration
> >   ARM: k2g-ice: Add pinmux support for rgmii interface
> >
> > Pankaj Bansal (1):
> >   drivers: net: ldpaa_eth: fix resource leak
> >
> > Siva Durga Prasad Paladugu (2):
> >   net: phy: Reloc next and prev pointers inside phy_drivers
> >   net: phy: Fix return value check phy_probe
> >
> > Valentin-catalin Neacsu (1):
> >   net: phy: aquantia: Set only autoneg on in register 4.c441
> >
> > Vladimir Oltean (6):
> >   net: phy: ar803x: Address packet drops at low traffic rate due to 
> > SmartEEE feature
> >   net: phy: ar803x: Make RGMII Tx delays actually configurable for 
> > AR8035
> >   net: phy: ar803x: Use common functions for RGMII internal delays
> >   net: phy: ar803x: Clarify the configuration of the CLK_25M output pin
> >   net: phy: ar803x: Explicitly disable RGMII delays
> 
> Tom, this [1] is the patch that is breaking the evm. It doesn't affect
> BB Black because it uses an SMSC phy, where as this evm uses an
> AR8031/AR8033.
> 
> Is it possible the device tree [2] is wrong for the board? It lists
> 'phy-mode = "rgmii-txid";', so that means that with this patch the RX
> delay is now being disabled.
> 
> Any thoughts, Vladimir?
> 
> Thanks,
> -Joe
> 
> [1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
> [2] arch/arm/dts/am335x-evm.dts

Thanks for tracking this down.  I believe the DTS is right as it matches
the kernel in this regard.  That said, it's the Bone which has the
schematic available and not the EVM so I can't point at that for
further digging.

-- 
Tom


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[U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Joe Hershberger
Hi Tom,

This is the series with the AR8xxx phy series removed until we figure it out.

Tested to work fine on your evm.

The following changes since commit 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:

  Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 09:38:00 
-0400)

are available in the git repository at:

  git://git.denx.de/u-boot-net.git master

for you to fetch changes up to 6314d1c8c035d1c4d14ea1ffd133f25385edd067:

  net: phy: micrel: Find Micrel PHY node correctly (2019-05-08 17:27:01 -0500)


Carlo Caione (4):
  net: phy: Add generic helpers to access MMD PHY registers
  net: phy: ti: use generic helpers to access MMD registers
  cmd: mdio: Switch to generic helpers when accessing the registers
  net: phy: realtek: Introduce quirk to mark RXC not stoppable

James Byrne (2):
  net: phy: micrel: Use correct skew values on KSZ9021
  net: phy: micrel: Find Micrel PHY node correctly

Murali Karicheri (2):
  ARM: k2g-gp-evm: update to rgmii pinmux configuration
  ARM: k2g-ice: Add pinmux support for rgmii interface

Pankaj Bansal (1):
  drivers: net: ldpaa_eth: fix resource leak

Siva Durga Prasad Paladugu (2):
  net: phy: Reloc next and prev pointers inside phy_drivers
  net: phy: Fix return value check phy_probe

Valentin-catalin Neacsu (1):
  net: phy: aquantia: Set only autoneg on in register 4.c441

 arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
 arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
 arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
 arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
 arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
 arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
 board/ti/ks2_evm/mux-k2g.h  |  36 +++
 cmd/mdio.c  |  27 +++--
 doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
 drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
 drivers/net/phy/Kconfig |  20 
 drivers/net/phy/aquantia.c  |   7 +-
 drivers/net/phy/micrel_ksz90x1.c|  24 -
 drivers/net/phy/phy.c   |  21 +++-
 drivers/net/phy/realtek.c   |  19 
 drivers/net/phy/ti.c| 130 +---
 include/phy.h   |  70 +
 18 files changed, 283 insertions(+), 183 deletions(-)

Thanks!
-Joe
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Re: [U-Boot] [i.MX8MM+CCF 11/41] clk: fixed_rate: export clk_fixed_rate

2019-05-08 Thread Lukasz Majewski
On Wed, 8 May 2019 07:45:39 +
Peng Fan  wrote:

> > -Original Message-
> > From: Lukasz Majewski [mailto:lu...@denx.de]
> > Sent: 2019年5月8日 15:40
> > To: Peng Fan 
> > Cc: sba...@denx.de; feste...@gmail.com; dl-uboot-imx
> > ; s...@chromium.org; ja...@amarulasolutions.com;
> > s...@denx.de; u-boot@lists.denx.de; tr...@konsulko.com
> > Subject: Re: [i.MX8MM+CCF 11/41] clk: fixed_rate: export
> > clk_fixed_rate
> > 
> > On Wed, 8 May 2019 06:51:46 +
> > Peng Fan  wrote:
> >   
> > > > -Original Message-
> > > > From: Lukasz Majewski [mailto:lu...@denx.de]
> > > > Sent: 2019年5月8日 14:46
> > > > To: Peng Fan 
> > > > Cc: sba...@denx.de; feste...@gmail.com; dl-uboot-imx
> > > > ; s...@chromium.org;  
> > ja...@amarulasolutions.com;  
> > > > s...@denx.de; u-boot@lists.denx.de; tr...@konsulko.com
> > > > Subject: Re: [i.MX8MM+CCF 11/41] clk: fixed_rate: export
> > > > clk_fixed_rate
> > > >
> > > > On Tue, 7 May 2019 13:27:45 +
> > > > Peng Fan  wrote:
> > > >  
> > > > > > Subject: Re: [i.MX8MM+CCF 11/41] clk: fixed_rate: export
> > > > > > clk_fixed_rate
> > > > > >
> > > > > > Hi Peng,
> > > > > >  
> > > > > > > Export the structure for others to use.
> > > > > > >
> > > > > > > Signed-off-by: Peng Fan 
> > > > > > > ---
> > > > > > >  drivers/clk/clk_fixed_rate.c | 8 +---
> > > > > > > include/linux/clk-provider.h | 7 +++
> > > > > > >  2 files changed, 8 insertions(+), 7 deletions(-)
> > > > > > >
> > > > > > > diff --git a/drivers/clk/clk_fixed_rate.c
> > > > > > > b/drivers/clk/clk_fixed_rate.c index
> > > > > > > 089f060a23..069e643fbc 100644 ---
> > > > > > > a/drivers/clk/clk_fixed_rate.c +++
> > > > > > > b/drivers/clk/clk_fixed_rate.c @@ -6,13 +6,7 @@
> > > > > > >  #include 
> > > > > > >  #include 
> > > > > > >  #include 
> > > > > > > -
> > > > > > > -struct clk_fixed_rate {
> > > > > > > - struct clk clk;
> > > > > > > - unsigned long fixed_rate;
> > > > > > > -};
> > > > > > > -
> > > > > > > -#define to_clk_fixed_rate(dev)   ((struct
> > > > > > > clk_fixed_rate *)dev_get_platdata(dev)) +#include
> > > > > > > 
> > > > > > >
> > > > > > >  static ulong clk_fixed_rate_get_rate(struct clk *clk)
> > > > > > > { diff --git a/include/linux/clk-provider.h
> > > > > > > b/include/linux/clk-provider.h index
> > > > > > > 3ed0db86d2..b2bed768b6 100644 ---
> > > > > > > a/include/linux/clk-provider.h +++
> > > > > > > b/include/linux/clk-provider.h @@ -112,6 +112,13 @@
> > > > > > > struct clk_fixed_factor {  #define
> > > > > > > to_clk_fixed_factor(_clk) container_of(_clk, struct
> > > > > > > clk_fixed_factor,\ clk)
> > > > > > >
> > > > > > > +struct clk_fixed_rate {
> > > > > > > + struct clk clk;
> > > > > > > + unsigned long fixed_rate;
> > > > > > > +};  
> > > > > >
> > > > > > I think that this struct shall stay where it was. Moreover,
> > > > > > the clk-provider.h is not the API to be used by other parts
> > > > > > of the clock API.
> > > > > >
> > > > > > The clk_fixed_rate shall be accessed via get_rate() only
> > > > > > and in IMX6Q it is available in early SPL (parsed from
> > > > > > dts /clocks property
> > > > > > - the 24MHz OSC)  
> > > > > > > +
> > > > > > > +#define to_clk_fixed_rate(dev)   ((struct
> > > > > > > clk_fixed_rate *)dev_get_platdata(dev)) +
> > > > > > >  int clk_register(struct clk *clk, const char *drv_name,
> > > > > > >ulong drv_data, const char *name,
> > > > > > >const char *parent_name);  
> > > > > >
> > > > > > Please explain why iMX8MM needs such global export?  
> > > > >
> > > > > In clk-imx8mm.c, first configure ARM clk to osc24M fixed clk
> > > > > to change pll clock.
> > > > > +   /* Configure ARM to osc24M */
> > > > > +   clk_get_by_id(IMX8MM_CLK_A53_SRC, &clkp);
> > > > > +   uclass_get_device_by_name(UCLASS_CLK,
> > > > > "clock-osc-24m",  
> > > > &devp);  
> > > > > +   clkp1 = &to_clk_fixed_rate(devp)->clk;
> > > > > +   clk_set_parent(clkp, clkp1);  
> > > >
> > > > This code looks a bit strange to me. Why imx8mm sets parent
> > > > here?  
> > >
> > > The A53 clk could not change on the fly. There is a mux here, one
> > > is PLL, one is OSC, And there are others. If we want to change
> > > the pll clock which is currently being used by A53, we need first
> > > switch the A53 clk to source from OSC, then change pll clock,
> > > then switch A53 clk back to PLL.  
> > 
> > The above description looks like a "standard" procedure for
> > bypassing PLL when it is going to be locked.
> > 
> > The same is also performed on IMX6Q:
> > 
> > https://elixir.bootlin.com/linux/v5.1/source/drivers/clk/imx/clk-imx6q.c#L88
> > 
> > But I've not ported that part from the original Linux source code.  
> 
> i.MX8MM is different.
> 
> This is how Linux change cpu's clock.
> https://elixir.bootlin.com/linux/v5.1/source/drivers/clk/imx/clk-imx8mm.c#L655
> 
> It has a new cpu clk driver, I do not want to introduce that
> complexity in U-Boot.

Ok.

> 
> This patch is just a simplified

Re: [U-Boot] [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded

2019-05-08 Thread Lukasz Majewski
On Wed, 8 May 2019 07:41:18 +
Peng Fan  wrote:

> > -Original Message-
> > From: Lukasz Majewski [mailto:lu...@denx.de]
> > Sent: 2019年5月8日 15:31
> > To: Peng Fan 
> > Cc: sba...@denx.de; feste...@gmail.com; dl-uboot-imx
> > ; s...@chromium.org; ja...@amarulasolutions.com;
> > s...@denx.de; u-boot@lists.denx.de; tr...@konsulko.com
> > Subject: Re: [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded
> > 
> > On Tue, 7 May 2019 13:22:24 +
> > Peng Fan  wrote:
> >   
> > > > Subject: Re: [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded
> > > >
> > > > On Tue, 30 Apr 2019 10:17:40 +
> > > > Peng Fan  wrote:
> > > >  
> > > > > When support Clock Common Framework, U-Boot use dev for clk
> > > > > tree information, there is no clk->parent.  
> > > >
> > > > There is a function in clk uclass named:
> > > > clk_get_parent() to provide parent of the clock.
> > > >  
> > > > > When
> > > > > support composite clk, it contains mux/gate/divider, but the
> > > > > mux/gate/divider is not binded with device.  
> > > >
> > > > There is a binding:
> > > > struct clk_pllv3 {
> > > > struct clk  clk;
> > > > ...
> > > > };
> > > >
> > > > The clk.dev points to corresponding device.
> > > >
> > > > In the opposite direction we do have dev->driver_data, which
> > > > points to struct clk embedded in for example struct clk_pllv3.
> > > > (as struct clk_pllv3 and struct clk share the same address it
> > > > is up to us to cast it properly).
> > > >
> > > > I've written my thoughts and considerations about using
> > > > dev->private and dev->driver_data in the patch cover letter [1]
> > > >
> > > >  
> > > > > So we could not use dev_get_driver_data to get the correct
> > > > > clk_mux/gate/divider.  
> > > >
> > > > Maybe I've overlooked something, but dev_get_driver_data() shall
> > > > provide correct reference to udevice.  
> > >
> > > A composite clk contains a mux/gate/divider clk. Only the
> > > composite clk needs to binded with a udevice.  
> > 
> > So, if I understood correctly we do need to have another reference
> > to udevice (or clock)?  
> 
> The composite clk structure
> struct clk_composite {
> struct clk  clk;
> struct clk_ops  ops;
> 
> struct clk  *mux;
> struct clk  *rate;
> struct clk  *gate;
> 
> const struct clk_ops*mux_ops;
> const struct clk_ops*rate_ops;
> const struct clk_ops*gate_ops;
> };
> 
> Only the first clk needs to be binded with a udevice.
> The mux/rate/gate pointer is only used for composite clk
> internal usage and no udevice will be binded with them.
> 
> > 
> > Please correct my understanding:
> > 
> > - Composite clock would use clk->dev (to have pointer to struct
> > udevice) and dev->driver_data to have pointer to clk.  
> 
> Yes, for the composite clk.
> 
> > 
> > - Then we use udevice flag DM_FLAG_BOUND to indicate if this device
> > has other udevices (i.e. clk) bound.  
> 
> Yes, DM_FLAG_BOUND means the clk has a udevice binded.
> 
> > 
> > - If it has bounded device then we use dev->driver_data to get it's
> >   struct clk (or clock IP - like mux). If not, then we just use this
> >   clk.  
> 
> Yes.
> 
> > 
> > Considering the above - the commit message needs detailed
> > explanation of the "binding" concept.
> >   
> > > The mux/gate/divider inside a
> > > composite clk should not bind a device, because they needs to be
> > > hidden from dm tree or clk dumps.
> > >
> > > If bind the mux/gate/divider insides a composite clk, that will be
> > > mess.  
> > 
> > But the composite clock itself would be printed in 'dm tree' ?  
> 
> Yes.
> 
> > 
> > If yes, maybe we can add some kind of indication that it is a
> > "container" and that it has some clocks "binded" ?  
> 
> Looking at clk summary from Linux /sys/kernel/debug/clk/clk_summary,
> There is no flag shows that it is a composite clk or not.
> 
> I think only add a flag to show the clk is a container does not make
> much sense.

Ok. I see.

> 
> Thanks,
> Peng.
> 
> >   
> > > The reason to introduce composite clk is to make clk tree
> > > cleaner/simplier.  
> > 
> > Ok. No problem with this.
> >   
> > >
> > > Regards,
> > > Peng.
> > >  
> > > >  
> > > > > So add clk_dev_binded to let
> > > > > choose the correct method.
> > > > >  
> > > >
> > > > [1] - http://patchwork.ozlabs.org/cover/1090669/
> > > >  
> > > > > Signed-off-by: Peng Fan 
> > > > > ---
> > > > >  drivers/clk/clk.c | 8 
> > > > >  include/clk.h | 9 +
> > > > >  2 files changed, 17 insertions(+)
> > > > >
> > > > > diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index
> > > > > 0a0fffb50b..025bb99ecc 100644
> > > > > --- a/drivers/clk/clk.c
> > > > > +++ b/drivers/clk/clk.c
> > > > > @@ -54,3 +54,11 @@ const char *clk_hw_get_name(const struct
> > > > > clk *hw) {
> > > > >   return hw->dev->name;
> > > > >  }
> > > > > +
> > > > > +bool clk_dev_binded(struct clk *clk) {
> > > > > + if (clk->dev &&

Re: [U-Boot] Pull request: u-boot-net.git master

2019-05-08 Thread Joe Hershberger
On Tue, May 7, 2019 at 5:15 PM Joe Hershberger  wrote:
>
> Hi Tom,
>
> The following changes since commit 8d7f06bbbef16f172cd5e9c4923cdcebe16b8980:
>
> I rebased on your master and built for BB Black. DHCP seems to work fine.
> MLO also now fits again.
>
>   Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-07 09:38:00 
> -0400)
>
> are available in the git repository at:
>
>   git://git.denx.de/u-boot-net.git master
>
> for you to fetch changes up to 8d0c6858455e89b089222a08d55ff711681ca011:
>
>   net: phy: micrel: Find Micrel PHY node correctly (2019-05-07 14:51:55 -0500)
>
> 
> Carlo Caione (4):
>   net: phy: Add generic helpers to access MMD PHY registers
>   net: phy: ti: use generic helpers to access MMD registers
>   cmd: mdio: Switch to generic helpers when accessing the registers
>   net: phy: realtek: Introduce quirk to mark RXC not stoppable
>
> James Byrne (2):
>   net: phy: micrel: Use correct skew values on KSZ9021
>   net: phy: micrel: Find Micrel PHY node correctly
>
> Murali Karicheri (2):
>   ARM: k2g-gp-evm: update to rgmii pinmux configuration
>   ARM: k2g-ice: Add pinmux support for rgmii interface
>
> Pankaj Bansal (1):
>   drivers: net: ldpaa_eth: fix resource leak
>
> Siva Durga Prasad Paladugu (2):
>   net: phy: Reloc next and prev pointers inside phy_drivers
>   net: phy: Fix return value check phy_probe
>
> Valentin-catalin Neacsu (1):
>   net: phy: aquantia: Set only autoneg on in register 4.c441
>
> Vladimir Oltean (6):
>   net: phy: ar803x: Address packet drops at low traffic rate due to 
> SmartEEE feature
>   net: phy: ar803x: Make RGMII Tx delays actually configurable for AR8035
>   net: phy: ar803x: Use common functions for RGMII internal delays
>   net: phy: ar803x: Clarify the configuration of the CLK_25M output pin
>   net: phy: ar803x: Explicitly disable RGMII delays

Tom, this [1] is the patch that is breaking the evm. It doesn't affect
BB Black because it uses an SMSC phy, where as this evm uses an
AR8031/AR8033.

Is it possible the device tree [2] is wrong for the board? It lists
'phy-mode = "rgmii-txid";', so that means that with this patch the RX
delay is now being disabled.

Any thoughts, Vladimir?

Thanks,
-Joe

[1] b3224e0f7e - "net: phy: ar803x: Explicitly disable RGMII delays"
[2] arch/arm/dts/am335x-evm.dts

>   net: phy: ar803x: Clarify the intention of ar8021_config
>
>  arch/arm/dts/sama5d3xcm.dtsi|  32 +++---
>  arch/arm/dts/sama5d3xcm_cmp.dtsi|  32 +++---
>  arch/arm/dts/socfpga_arria5_socdk.dts   |   4 +-
>  arch/arm/dts/socfpga_cyclone5_is1.dts   |   4 +-
>  arch/arm/dts/socfpga_cyclone5_socdk.dts |   4 +-
>  arch/arm/dts/socfpga_cyclone5_sockit.dts|   4 +-
>  arch/arm/dts/socfpga_cyclone5_vining_fpga.dts   |   4 +-
>  board/ti/ks2_evm/mux-k2g.h  |  36 +++
>  cmd/mdio.c  |  27 +++--
>  doc/device-tree-bindings/net/micrel-ksz90x1.txt |  27 +
>  drivers/net/ldpaa_eth/ldpaa_eth.c   |   1 +
>  drivers/net/phy/Kconfig |  41 
>  drivers/net/phy/aquantia.c  |   7 +-
>  drivers/net/phy/atheros.c   | 128 ---
>  drivers/net/phy/micrel_ksz90x1.c|  24 -
>  drivers/net/phy/phy.c   |  21 +++-
>  drivers/net/phy/realtek.c   |  19 
>  drivers/net/phy/ti.c| 130 
> +---
>  include/phy.h   |  70 +
>  19 files changed, 394 insertions(+), 221 deletions(-)
>
> Thanks!
> -Joe
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[U-Boot] [PATCH 3/5] nitrogen6x: reserve used gpios

2019-05-08 Thread Troy Kisky
This prevents messages like
gpio@20a: get_value: error: gpio GPIO2_2 not reserved

when CONFIG_DM_GPIO is enabled.

Also, when CONFIG_DM_GPIO is enabled, checkboard is too
early to use gpio_get_value, so read it directly on failure.

Signed-off-by: Troy Kisky 
---
 board/boundary/nitrogen6x/nitrogen6x.c | 30 +-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/board/boundary/nitrogen6x/nitrogen6x.c 
b/board/boundary/nitrogen6x/nitrogen6x.c
index 84d7cee740..d0e9eb835d 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -381,6 +381,15 @@ int board_eth_init(bd_t *bis)
struct phy_device *phydev = NULL;
int ret;
 
+   gpio_request(WL12XX_WL_IRQ_GP, "wifi_irq");
+   gpio_request(IMX_GPIO_NR(6, 30), "rgmii_rxc");
+   gpio_request(IMX_GPIO_NR(6, 25), "rgmii_rd0");
+   gpio_request(IMX_GPIO_NR(6, 27), "rgmii_rd1");
+   gpio_request(IMX_GPIO_NR(6, 28), "rgmii_rd2");
+   gpio_request(IMX_GPIO_NR(6, 29), "rgmii_rd3");
+   gpio_request(IMX_GPIO_NR(6, 24), "rgmii_rx_ctl");
+   gpio_request(IMX_GPIO_NR(3, 23), "rgmii_reset_sabrelite");
+   gpio_request(IMX_GPIO_NR(1, 27), "rgmii_reset_nitrogen6x");
setup_iomux_enet();
 
 #ifdef CONFIG_FEC_MXC
@@ -911,7 +920,16 @@ int board_init(void)
 
 int checkboard(void)
 {
-   if (gpio_get_value(WL12XX_WL_IRQ_GP))
+   int ret = gpio_get_value(WL12XX_WL_IRQ_GP);
+
+   if (ret < 0) {
+   /* The gpios have not been probed yet. Read it myself */
+   struct gpio_regs *regs = (struct gpio_regs *)GPIO6_BASE_ADDR;
+   int gpio = WL12XX_WL_IRQ_GP & 0x1f;
+
+   ret = (readl(®s->gpio_psr) >> gpio) & 0x01;
+   }
+   if (ret)
puts("Board: Nitrogen6X\n");
else
puts("Board: SABRE Lite\n");
@@ -1013,6 +1031,16 @@ static const struct boot_mode board_boot_modes[] = {
 
 int misc_init_r(void)
 {
+   gpio_request(RGB_BACKLIGHT_GP, "lvds backlight");
+   gpio_request(LVDS_BACKLIGHT_GP, "lvds backlight");
+   gpio_request(GP_USB_OTG_PWR, "usbotg power");
+   gpio_request(IMX_GPIO_NR(7, 12), "usbh1 hub reset");
+   gpio_request(IMX_GPIO_NR(2, 2), "back");
+   gpio_request(IMX_GPIO_NR(2, 4), "home");
+   gpio_request(IMX_GPIO_NR(2, 1), "menu");
+   gpio_request(IMX_GPIO_NR(2, 3), "search");
+   gpio_request(IMX_GPIO_NR(7, 13), "volup");
+   gpio_request(IMX_GPIO_NR(4, 5), "voldown");
 #ifdef CONFIG_PREBOOT
preboot_keys();
 #endif
-- 
2.18.0

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[U-Boot] [PATCH 5/5] configs: nitrogen6x: Add DM_SPI/DM_SPI_FLASH support

2019-05-08 Thread Troy Kisky
Add CONFIG_DM_SPI/CONFIG_DM_SPI_FLASH to all defconfigs whose board is
nitrogen6x.

mx6qsabrelite_defconfig
nitrogen6dl2g_defconfig
nitrogen6dl_defconfig
nitrogen6q2g_defconfig
nitrogen6q_defconfig
nitrogen6s1g_defconfig

Signed-off-by: Troy Kisky 
---
 configs/mx6qsabrelite_defconfig | 2 ++
 configs/nitrogen6dl2g_defconfig | 2 ++
 configs/nitrogen6dl_defconfig   | 2 ++
 configs/nitrogen6q2g_defconfig  | 2 ++
 configs/nitrogen6q_defconfig| 2 ++
 configs/nitrogen6s1g_defconfig  | 2 ++
 configs/nitrogen6s_defconfig| 2 ++
 7 files changed, 14 insertions(+)

diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index f7d6e22438..8a98004bce 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -41,6 +41,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x1200
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
@@ -50,6 +51,7 @@ CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 36fe642b57..40a68bad2a 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -44,6 +44,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x1200
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
@@ -53,6 +54,7 @@ CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index aa308abb9b..8a5d52209c 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -44,6 +44,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x1200
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
@@ -53,6 +54,7 @@ CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 18fae5b3f5..a3c087e7ff 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -46,6 +46,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x1200
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
@@ -55,6 +56,7 @@ CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 609247dfe2..ad7e9830a9 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -46,6 +46,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x1200
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
@@ -55,6 +56,7 @@ CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 4ad9cb37c6..c602a362cb 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -44,6 +44,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x1200
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
@@ -53,6 +54,7 @@ CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index f531858f6d..8e812d09f4 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -44,6 +44,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x1200
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
@@ -53,6 +54,7 @@ CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MII=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
-- 
2.18.0

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[U-Boot] [PATCH 1/5] nitrogen6x: migrate to using device tree

2019-05-08 Thread Troy Kisky
Migrate to using device tree required for further driver model
integration.

Signed-off-by: Troy Kisky 
---
 arch/arm/dts/Makefile |  31 ++-
 arch/arm/dts/imx6dl-nitrogen6x.dts|  15 +
 arch/arm/dts/imx6q-nitrogen6x.dts |  19 ++
 arch/arm/dts/imx6q-sabrelite.dts  |  19 ++
 arch/arm/dts/imx6qdl-nitrogen6x.dtsi  |  69 +
 arch/arm/dts/imx6qdl-sabrelite.dtsi   | 384 ++
 board/boundary/nitrogen6x/MAINTAINERS |   5 +
 configs/mx6qsabrelite_defconfig   |   3 +-
 configs/nitrogen6dl2g_defconfig   |   3 +-
 configs/nitrogen6dl_defconfig |   3 +-
 configs/nitrogen6q2g_defconfig|   3 +-
 configs/nitrogen6q_defconfig  |   3 +-
 configs/nitrogen6s1g_defconfig|   3 +-
 configs/nitrogen6s_defconfig  |   3 +-
 14 files changed, 545 insertions(+), 18 deletions(-)
 create mode 100644 arch/arm/dts/imx6dl-nitrogen6x.dts
 create mode 100644 arch/arm/dts/imx6q-nitrogen6x.dts
 create mode 100644 arch/arm/dts/imx6q-sabrelite.dts
 create mode 100644 arch/arm/dts/imx6qdl-nitrogen6x.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-sabrelite.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 92074cd8da..04cddce3d2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -495,30 +495,39 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
 dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \
imx53-kp.dtb
 
-dtb-$(CONFIG_MX6Q) += \
-   imx6-apalis.dtb \
-   imx6q-display5.dtb \
-   imx6q-logicpd.dtb
-
-dtb-$(CONFIG_TARGET_TBS2910) += \
-   imx6q-tbs2910.dtb
-
-dtb-$(CONFIG_MX6QDL) += \
+ifneq ($(CONFIG_MX6DL)$(CONFIG_MX6QDL)$(CONFIG_MX6S),)
+dtb-y += \
imx6dl-icore.dtb \
imx6dl-icore-mipi.dtb \
imx6dl-icore-rqs.dtb \
imx6dl-mamoj.dtb \
+   imx6dl-nitrogen6x.dtb \
+   imx6dl-sabreauto.dtb \
+   imx6dl-sabresd.dtb \
+
+endif
+
+ifneq ($(CONFIG_MX6Q)$(CONFIG_MX6QDL),)
+dtb-y += \
+   imx6-apalis.dtb \
imx6q-cm-fx6.dtb \
+   imx6q-display5.dtb \
imx6q-icore.dtb \
imx6q-icore-mipi.dtb \
imx6q-icore-rqs.dtb \
+   imx6q-logicpd.dtb \
+   imx6q-nitrogen6x.dtb \
imx6q-sabreauto.dtb \
+   imx6q-sabrelite.dtb \
imx6q-sabresd.dtb \
-   imx6dl-sabreauto.dtb \
-   imx6dl-sabresd.dtb \
imx6qp-sabreauto.dtb \
imx6qp-sabresd.dtb
 
+endif
+
+dtb-$(CONFIG_TARGET_TBS2910) += \
+   imx6q-tbs2910.dtb
+
 dtb-$(CONFIG_TARGET_WANDBOARD) += \
imx6dl-wandboard-revb1.dtb
 
diff --git a/arch/arm/dts/imx6dl-nitrogen6x.dts 
b/arch/arm/dts/imx6dl-nitrogen6x.dts
new file mode 100644
index 00..9427ab6399
--- /dev/null
+++ b/arch/arm/dts/imx6dl-nitrogen6x.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright 2013-2019 Boundary Devices, Inc.
+// Copyright 2012 Freescale Semiconductor, Inc.
+// Copyright 2011 Linaro Ltd.
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-nitrogen6x.dtsi"
+
+/ {
+   model = "Boundary Devices i.MX6 DualLite Nitrogen6x Board";
+   compatible = "boundary,imx6dl-nitrogen6x", "fsl,imx6dl";
+};
diff --git a/arch/arm/dts/imx6q-nitrogen6x.dts 
b/arch/arm/dts/imx6q-nitrogen6x.dts
new file mode 100644
index 00..ebb22a404e
--- /dev/null
+++ b/arch/arm/dts/imx6q-nitrogen6x.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright 2013-2019 Boundary Devices, Inc.
+// Copyright 2012 Freescale Semiconductor, Inc.
+// Copyright 2011 Linaro Ltd.
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-nitrogen6x.dtsi"
+
+/ {
+   model = "Boundary Devices i.MX6 Quad Nitrogen6x Board";
+   compatible = "boundary,imx6q-nitrogen6x", "fsl,imx6q";
+};
+
+&sata {
+   status = "okay";
+};
diff --git a/arch/arm/dts/imx6q-sabrelite.dts b/arch/arm/dts/imx6q-sabrelite.dts
new file mode 100644
index 00..91e031c7ca
--- /dev/null
+++ b/arch/arm/dts/imx6q-sabrelite.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright 2013-2019 Boundary Devices, Inc.
+// Copyright 2012 Freescale Semiconductor, Inc.
+// Copyright 2011 Linaro Ltd.
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-sabrelite.dtsi"
+
+/ {
+   model = "Freescale i.MX6 Quad SABRE Lite Board";
+   compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+};
+
+&sata {
+   status = "okay";
+};
diff --git a/arch/arm/dts/imx6qdl-nitrogen6x.dtsi 
b/arch/arm/dts/imx6qdl-nitrogen6x.dtsi
new file mode 100644
index 00..5094929b6d
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-nitrogen6x.dtsi
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright 2013-2019 Boundary Devices, Inc.
+// Copyright 2012 Freescale Semiconductor, Inc.
+// Copyright 2011 Linaro Ltd.
+
+#include "imx6qdl-sabrelite.dtsi"
+
+&iomuxc {
+   pinctrl_enet: enetgrp {
+   fsl,pins = <
+   MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+   MX6QDL_PAD_ENET_MDC__ENET_MDC   0

[U-Boot] [PATCH 4/5] configs: nitrogen6x: Add DM_GPIO support

2019-05-08 Thread Troy Kisky
Add CONFIG_DM_GPIO to all defconfigs whose board is
nitrogen6x.

mx6qsabrelite_defconfig
nitrogen6dl2g_defconfig
nitrogen6dl_defconfig
nitrogen6q2g_defconfig
nitrogen6q_defconfig
nitrogen6s1g_defconfig

This is in preparation for adding CONFIG_DM_SPI.

Signed-off-by: Troy Kisky 
---
 configs/mx6qsabrelite_defconfig | 1 +
 configs/nitrogen6dl2g_defconfig | 1 +
 configs/nitrogen6dl_defconfig   | 1 +
 configs/nitrogen6q2g_defconfig  | 1 +
 configs/nitrogen6q_defconfig| 1 +
 configs/nitrogen6s1g_defconfig  | 1 +
 configs/nitrogen6s_defconfig| 1 +
 7 files changed, 7 insertions(+)

diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 2142a39e17..f7d6e22438 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -38,6 +38,7 @@ CONFIG_DM=y
 CONFIG_DWC_AHSATA=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 29c96dd69e..36fe642b57 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -41,6 +41,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 885bb2856f..aa308abb9b 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -41,6 +41,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 37d24e7189..18fae5b3f5 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -43,6 +43,7 @@ CONFIG_DM=y
 CONFIG_DWC_AHSATA=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 40b0218939..609247dfe2 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -43,6 +43,7 @@ CONFIG_DM=y
 CONFIG_DWC_AHSATA=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 105fbedd47..4ad9cb37c6 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -41,6 +41,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index 8220d369a2..f531858f6d 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -41,6 +41,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
-- 
2.18.0

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[U-Boot] [PATCH 2/5] configs: nitrogen6x: Add DM_MMC/DM_USB/AHCI support

2019-05-08 Thread Troy Kisky
Add DM_MMC to all defconfigs whose board is
nitrogen6x.

mx6qsabrelite_defconfig
nitrogen6dl2g_defconfig
nitrogen6dl_defconfig
nitrogen6q2g_defconfig
nitrogen6q_defconfig
nitrogen6s1g_defconfig

This commit is adding multiple configs, but
seems to be the minimum change to not lose features
and still compile fine.

Signed-off-by: Troy Kisky 
---
 configs/mx6qsabrelite_defconfig | 6 +-
 configs/nitrogen6dl2g_defconfig | 7 ++-
 configs/nitrogen6dl_defconfig   | 7 ++-
 configs/nitrogen6q2g_defconfig  | 7 ++-
 configs/nitrogen6q_defconfig| 7 ++-
 configs/nitrogen6s1g_defconfig  | 7 ++-
 configs/nitrogen6s_defconfig| 7 ++-
 7 files changed, 41 insertions(+), 7 deletions(-)

diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 34ca7d88f5..2142a39e17 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -3,8 +3,10 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x1780
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_CMD_HDMIDETECT=y
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_NR_DRAM_BANKS=1
+# CONFIG_SYS_MALLOC_F is not set
 
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE"
 CONFIG_BOOTDELAY=3
 # CONFIG_USE_BOOTCOMMAND is not set
@@ -36,6 +38,7 @@ CONFIG_DM=y
 CONFIG_DWC_AHSATA=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
@@ -49,6 +52,7 @@ CONFIG_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
@@ -58,6 +62,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
-CONFIG_VIDEO=y
 CONFIG_VIDEO_IPUV3=y
+CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 4cb20a1099..29c96dd69e 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -3,7 +3,9 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x1780
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_CMD_HDMIDETECT=y
+CONFIG_AHCI=y
 CONFIG_NR_DRAM_BANKS=1
+# CONFIG_SYS_MALLOC_F is not set
 
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048"
 CONFIG_BOOTDELAY=3
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -36,8 +38,10 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
@@ -50,6 +54,7 @@ CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
@@ -60,6 +65,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
-CONFIG_VIDEO=y
 CONFIG_VIDEO_IPUV3=y
+CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 85c3601983..885bb2856f 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -3,7 +3,9 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x1780
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_CMD_HDMIDETECT=y
+CONFIG_AHCI=y
 CONFIG_NR_DRAM_BANKS=1
+# CONFIG_SYS_MALLOC_F is not set
 
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024"
 CONFIG_BOOTDELAY=3
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -36,8 +38,10 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x1200
+CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
@@ -50,6 +54,7 @@ CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
@@ -60,6 +65,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
-CONFIG_VIDEO=y
 CONFIG_VIDEO_IPUV3=y
+CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 9e5d4ed3eb..37d24e7189 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -3,7 +3,9 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x1780
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_CMD_HDMIDETECT=y
+CONFIG_AHCI=y
 CONFIG_NR_DRAM_BANKS=1
+# CONFIG_SYS_MALLOC_F is not set
 
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048"
 CONFIG_BOOTDELAY=3
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -37,9 +39,11 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="imx6q-ni

Re: [U-Boot] Pull request for UEFI sub-system for v2019.07-rc2 (2)

2019-05-08 Thread Graf, Alexander


On 09.05.19 00:03, Heinrich Schuchardt wrote:

On 5/8/19 7:50 PM, Tom Rini wrote:

On Wed, May 08, 2019 at 07:57:57AM +0200, Heinrich Schuchardt wrote:


The following changes since commit
44237e272f1eac3b026709e76333a07b2d3a3523:

Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-06
07:19:31 -0400)

are available in the Git repository at:

git://git.denx.de/u-boot-efi.git tags/efi-2019-07-rc2-2

for you to fetch changes up to
b015ab57bf558daa1c768995a7a7f1df2d40191e:

efi_loader: signature of ExitBootServices() (2019-05-07 21:10:04
+0200)

Travis CI results are here:
https://travis-ci.org/xypron2/u-boot/builds/529448555

Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC
2C05 1AC4



Note that you may want to run ./scripts/checkpatch.pl --git
origin/master.. or similar as: WARNING: 'follwing' may be misspelled
- perhaps 'following'?

which I left alone rather than mess up the tag.


Sorry I missed that one. Typically I run checkpatch.pl.



Applied to u-boot/master, thanks!

And all of that said, looking over my before/after builds I see a lot
of size growth, everywhere, due to EFI changes.  I assume this is due
to increasing overall functionality and support, which is good. But
is there perhaps some way we can split things into a minimal "we
have enough to support loading ${OS LOADER}" and then "we are aiming
for large parts of spec compliance" ?  Some days I start to wonder
if "EFI_LOADER on by default" was a bad idea.



The following switches allow to reduce the size of the UEFI subsystem:

CONFIG_CMD_BOOTEFI_HELLO, default N
CONFIG_CMD_BOOTEFI_SELFTEST, default N except QEMU
CONFIG_EFI_UNICODE_CAPITALIZATION, default Y
CONFIG_EFI_LOADER_HII
(The Makefile does not consider it yet correctly, patch submitted.)
CONFIG_CMD_EFIDEBUG, default N
CONFIG_CMD_NVEDIT_EFI

In doc/README.uefi we describe that we target EBBR compatibility.

We have implemented functionality that is not needed for EBBR
compatibility but is needed to run the EFI Shell and the conformance
tests or iPXE. Here we should think about making it customizable, e.g.

lib/efi_loader/efi_bootmgr.c
lib/efi_driver/*
lib/efi_loader/efi_unicode_collation.c
lib/efi_loader/efi_variable.c
lib/efi_loader/device_path_to_text.c
lib/efi_loader/device_path_utilities.c

For the Unicode collation protocol I just sent a patch.



Do you have size estimates for how much each of those bits are? Where 
did we see the biggest growth? What eats up the most code/data space?


I think we should aim to ideally incur less than 20kb overhead for an 
arm target. How far are we from that? We used to be at 10kb.



Alex


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Re: [U-Boot] Pull request for UEFI sub-system for v2019.07-rc2 (2)

2019-05-08 Thread Heinrich Schuchardt

On 5/8/19 7:50 PM, Tom Rini wrote:

On Wed, May 08, 2019 at 07:57:57AM +0200, Heinrich Schuchardt wrote:


The following changes since commit
44237e272f1eac3b026709e76333a07b2d3a3523:

Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-06
07:19:31 -0400)

are available in the Git repository at:

git://git.denx.de/u-boot-efi.git tags/efi-2019-07-rc2-2

for you to fetch changes up to
b015ab57bf558daa1c768995a7a7f1df2d40191e:

efi_loader: signature of ExitBootServices() (2019-05-07 21:10:04
+0200)

Travis CI results are here:
https://travis-ci.org/xypron2/u-boot/builds/529448555

Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC
2C05 1AC4



Note that you may want to run ./scripts/checkpatch.pl --git
origin/master.. or similar as: WARNING: 'follwing' may be misspelled
- perhaps 'following'?

which I left alone rather than mess up the tag.


Sorry I missed that one. Typically I run checkpatch.pl.



Applied to u-boot/master, thanks!

And all of that said, looking over my before/after builds I see a lot
of size growth, everywhere, due to EFI changes.  I assume this is due
to increasing overall functionality and support, which is good.  But
is there perhaps some way we can split things into a minimal "we
have enough to support loading ${OS LOADER}" and then "we are aiming
for large parts of spec compliance" ?  Some days I start to wonder
if "EFI_LOADER on by default" was a bad idea.



The following switches allow to reduce the size of the UEFI subsystem:

CONFIG_CMD_BOOTEFI_HELLO, default N
CONFIG_CMD_BOOTEFI_SELFTEST, default N except QEMU
CONFIG_EFI_UNICODE_CAPITALIZATION, default Y
CONFIG_EFI_LOADER_HII
(The Makefile does not consider it yet correctly, patch submitted.)
CONFIG_CMD_EFIDEBUG, default N
CONFIG_CMD_NVEDIT_EFI

In doc/README.uefi we describe that we target EBBR compatibility.

We have implemented functionality that is not needed for EBBR
compatibility but is needed to run the EFI Shell and the conformance
tests or iPXE. Here we should think about making it customizable, e.g.

lib/efi_loader/efi_bootmgr.c
lib/efi_driver/*
lib/efi_loader/efi_unicode_collation.c
lib/efi_loader/efi_variable.c
lib/efi_loader/device_path_to_text.c
lib/efi_loader/device_path_utilities.c

For the Unicode collation protocol I just sent a patch.

Best regards

Heinrich
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Re: [U-Boot] Pull request for UEFI sub-system for v2019.07-rc2 (2)

2019-05-08 Thread Tom Rini
On Thu, May 09, 2019 at 12:03:38AM +0200, Heinrich Schuchardt wrote:
> On 5/8/19 7:50 PM, Tom Rini wrote:
> >On Wed, May 08, 2019 at 07:57:57AM +0200, Heinrich Schuchardt wrote:
> >
> >>The following changes since commit
> >>44237e272f1eac3b026709e76333a07b2d3a3523:
> >>
> >>Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-05-06
> >>07:19:31 -0400)
> >>
> >>are available in the Git repository at:
> >>
> >>git://git.denx.de/u-boot-efi.git tags/efi-2019-07-rc2-2
> >>
> >>for you to fetch changes up to
> >>b015ab57bf558daa1c768995a7a7f1df2d40191e:
> >>
> >>efi_loader: signature of ExitBootServices() (2019-05-07 21:10:04
> >>+0200)
> >>
> >>Travis CI results are here:
> >>https://travis-ci.org/xypron2/u-boot/builds/529448555
> >>
> >>Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC
> >>2C05 1AC4
> >>
> >
> >Note that you may want to run ./scripts/checkpatch.pl --git
> >origin/master.. or similar as: WARNING: 'follwing' may be misspelled
> >- perhaps 'following'?
> >
> >which I left alone rather than mess up the tag.
> 
> Sorry I missed that one. Typically I run checkpatch.pl.
> 
> >
> >Applied to u-boot/master, thanks!
> >
> >And all of that said, looking over my before/after builds I see a lot
> >of size growth, everywhere, due to EFI changes.  I assume this is due
> >to increasing overall functionality and support, which is good.  But
> >is there perhaps some way we can split things into a minimal "we
> >have enough to support loading ${OS LOADER}" and then "we are aiming
> >for large parts of spec compliance" ?  Some days I start to wonder
> >if "EFI_LOADER on by default" was a bad idea.
> >
> 
> The following switches allow to reduce the size of the UEFI subsystem:
> 
> CONFIG_CMD_BOOTEFI_HELLO, default N
> CONFIG_CMD_BOOTEFI_SELFTEST, default N except QEMU
> CONFIG_EFI_UNICODE_CAPITALIZATION, default Y
> CONFIG_EFI_LOADER_HII
> (The Makefile does not consider it yet correctly, patch submitted.)
> CONFIG_CMD_EFIDEBUG, default N
> CONFIG_CMD_NVEDIT_EFI
> 
> In doc/README.uefi we describe that we target EBBR compatibility.

Right.  And I think we need to make the defaults reflect that, and then
have some targets opt-in for more (such as QEMU where we're testing
things).

> We have implemented functionality that is not needed for EBBR
> compatibility but is needed to run the EFI Shell and the conformance
> tests or iPXE. Here we should think about making it customizable, e.g.
> 
> lib/efi_loader/efi_bootmgr.c
> lib/efi_driver/*
> lib/efi_loader/efi_unicode_collation.c
> lib/efi_loader/efi_variable.c
> lib/efi_loader/device_path_to_text.c
> lib/efi_loader/device_path_utilities.c
> 
> For the Unicode collation protocol I just sent a patch.

Adding more options to be able to remove stuff would be good, thanks!

-- 
Tom


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[U-Boot] [PATCH 1/2] efi_loader: format Kconfig

2019-05-08 Thread Heinrich Schuchardt
Use if/endif for dependencies to give structure to the configuration menu.

Sort important settings to the top.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/Kconfig | 43 +-
 1 file changed, 22 insertions(+), 21 deletions(-)

diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 50b050159c..055051bde3 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -16,9 +16,21 @@ config EFI_LOADER
  interfaces to a loaded EFI application, enabling it to reuse U-Boot's
  device drivers.

+if EFI_LOADER
+
+config EFI_LOADER_HII
+   bool "Expose HII protocols to EFI applications"
+   default y
+   help
+ The Human Interface Infrastructure is a complicated framework that
+ allows UEFI applications to draw fancy menus and hook strings using
+ a translation framework.
+
+ U-Boot implements enough of its features to be able to run the UEFI
+ Shell, but not more than that.
+
 config EFI_UNICODE_CAPITALIZATION
bool "Support Unicode capitalization"
-   depends on EFI_LOADER
default y
help
  Select this option to enable correct handling of the capitalization of
@@ -26,33 +38,22 @@ config EFI_UNICODE_CAPITALIZATION
  set, only the the correct handling of the letters of the codepage
  used by the FAT file system is ensured.

-config EFI_PLATFORM_LANG_CODES
-   string "Language codes supported by firmware"
-   depends on EFI_LOADER
-   default "en-US"
-   help
- This value is used to initialize the PlatformLangCodes variable. Its
- value is a semicolon (;) separated list of language codes in native
- RFC 4646 format, e.g. "en-US;de-DE". The first language code is used
- to initialize the PlatformLang variable.
-
 config EFI_LOADER_BOUNCE_BUFFER
bool "EFI Applications use bounce buffers for DMA operations"
-   depends on EFI_LOADER && ARM64
+   depends on ARM64
default n
help
  Some hardware does not support DMA to full 64bit addresses. For this
  hardware we can create a bounce buffer so that payloads don't have to
  worry about platform details.

-config EFI_LOADER_HII
-   bool "Expose HII protocols to EFI applications"
-   depends on EFI_LOADER
-   default y
+config EFI_PLATFORM_LANG_CODES
+   string "Language codes supported by firmware"
+   default "en-US"
help
- The Human Interface Infrastructure is a complicated framework that
- allows UEFI applications to draw fancy menus and hook strings using
- a translation framework.
+ This value is used to initialize the PlatformLangCodes variable. Its
+ value is a semicolon (;) separated list of language codes in native
+ RFC 4646 format, e.g. "en-US;de-DE". The first language code is used
+ to initialize the PlatformLang variable.

- U-Boot implements enough of its features to be able to run the UEFI
- Shell, but not more than that.
+endif
--
2.20.1

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[U-Boot] [PATCH 2/2] efi_loader: make Unicode collation protocol customizable

2019-05-08 Thread Heinrich Schuchardt
The Unicode collation protocol is not needed for EBBR compliance. So let's
make it a customizable option.

The Unicode capitalization table is only needed by this protocol. So let it
depend on the Unicode collation protocol.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/Kconfig | 11 +++
 lib/efi_loader/Makefile|  2 +-
 lib/efi_loader/efi_root_node.c |  2 ++
 lib/efi_selftest/Makefile  |  3 ++-
 4 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 055051bde3..0307d731a8 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -29,6 +29,15 @@ config EFI_LOADER_HII
  U-Boot implements enough of its features to be able to run the UEFI
  Shell, but not more than that.

+config EFI_UNICODE_COLLATION_PROTOCOL
+   bool "Provide Unicode collation protocol"
+   default y
+   help
+ The Unicode collation protocol is used for lexical comparisons. It is
+ required to run the UEFI shell.
+
+if EFI_UNICODE_COLLATION_PROTOCOL
+
 config EFI_UNICODE_CAPITALIZATION
bool "Support Unicode capitalization"
default y
@@ -38,6 +47,8 @@ config EFI_UNICODE_CAPITALIZATION
  set, only the the correct handling of the letters of the codepage
  used by the FAT file system is ensured.

+endif
+
 config EFI_LOADER_BOUNCE_BUFFER
bool "EFI Applications use bounce buffers for DMA operations"
depends on ARM64
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index e6bbe43154..2b1ae61a3d 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -30,7 +30,7 @@ obj-y += efi_memory.o
 obj-y += efi_root_node.o
 obj-y += efi_runtime.o
 obj-y += efi_setup.o
-obj-y += efi_unicode_collation.o
+obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL) += efi_unicode_collation.o
 obj-y += efi_variable.o
 obj-y += efi_watchdog.o
 obj-$(CONFIG_LCD) += efi_gop.o
diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
index 38514e0820..f36ca3456e 100644
--- a/lib/efi_loader/efi_root_node.c
+++ b/lib/efi_loader/efi_root_node.c
@@ -58,9 +58,11 @@ efi_status_t efi_root_node_register(void)
 /* Device path utilities protocol */
 &efi_guid_device_path_utilities_protocol,
 (void *)&efi_device_path_utilities,
+#if CONFIG_IS_ENABLED(EFI_UNICODE_COLLATION_PROTOCOL)
 /* Unicode collation protocol */
 &efi_guid_unicode_collation_protocol,
 (void *)&efi_unicode_collation_protocol,
+#endif
 #if CONFIG_IS_ENABLED(EFI_LOADER_HII)
 /* HII string protocol */
 &efi_guid_hii_string_protocol,
diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index c69ad7a9c0..7fdf189c5c 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -34,11 +34,12 @@ efi_selftest_textinput.o \
 efi_selftest_textinputex.o \
 efi_selftest_textoutput.o \
 efi_selftest_tpl.o \
-efi_selftest_unicode_collation.o \
 efi_selftest_util.o \
 efi_selftest_variables.o \
 efi_selftest_watchdog.o

+obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL) += 
efi_selftest_unicode_collation.o
+
 obj-$(CONFIG_CPU_V7) += efi_selftest_unaligned.o
 obj-$(CONFIG_EFI_LOADER_HII) += efi_selftest_hii.o

--
2.20.1

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[U-Boot] [PATCH 0/2] efi_loader: make Unicode collation protocol customizable

2019-05-08 Thread Heinrich Schuchardt
Our development target is to reach Embedded Base Boot Requirements (EBBR)
specification compliance. Functionality that is not needed for this target
should be customizable.

Provide a new configuration option to idsable the Unicode collation
protocol.

Heinrich Schuchardt (2):
  efi_loader: format Kconfig
  efi_loader: make Unicode collation protocol customizable

 lib/efi_loader/Kconfig | 52 +-
 lib/efi_loader/Makefile|  2 +-
 lib/efi_loader/efi_root_node.c |  2 ++
 lib/efi_selftest/Makefile  |  3 +-
 4 files changed, 37 insertions(+), 22 deletions(-)

--
2.20.1

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Re: [U-Boot] [PATCH] net: mvpp2: support setting hardware addresses from ethernet core

2019-05-08 Thread Joe Hershberger
On Wed, May 8, 2019 at 2:36 PM Matt Pelland  wrote:
>
> mvpp2 already has support for setting MAC addresses but this
> functionality was not exposed to the ethernet core. This commit exposes
> this functionality so that MAC address assignments stored in U-Boot's
> environment are correctly applied before Linux boots.
>
> Signed-off-by: Matt Pelland 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 07/18] configs: am65x_hs_evm_defconfig: Enable I2C support

2019-05-08 Thread Andrew F. Davis
On 5/8/19 5:37 PM, Andreas Dannenberg wrote:
> Enable I2C via driver model as well as the associated set of U-Boot
> commands to allow us interacting with various I2C slave devices.
> 
> Signed-off-by: Andreas Dannenberg 
> ---
>  configs/am65x_hs_evm_a53_defconfig | 4 
>  configs/am65x_hs_evm_r5_defconfig  | 4 

Thanks for not forgetting HS :)

For all the _hs defconfig changes in this series:

Acked-by: Andrew F. Davis 

>  2 files changed, 8 insertions(+)
> 
> diff --git a/configs/am65x_hs_evm_a53_defconfig 
> b/configs/am65x_hs_evm_a53_defconfig
> index 7af0046ee3..cebfbb93d9 100644
> --- a/configs/am65x_hs_evm_a53_defconfig
> +++ b/configs/am65x_hs_evm_a53_defconfig
> @@ -33,6 +33,7 @@ CONFIG_SPL_REMOTEPROC=y
>  CONFIG_SPL_YMODEM_SUPPORT=y
>  CONFIG_CMD_ASKENV=y
>  # CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_I2C=y
>  CONFIG_CMD_MMC=y
>  CONFIG_CMD_REMOTEPROC=y
>  # CONFIG_CMD_SETEXPR is not set
> @@ -56,6 +57,9 @@ CONFIG_CLK_TI_SCI=y
>  CONFIG_DMA_CHANNELS=y
>  CONFIG_TI_K3_NAVSS_UDMA=y
>  CONFIG_TI_SCI_PROTOCOL=y
> +CONFIG_DM_I2C=y
> +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
> +CONFIG_SYS_I2C_OMAP24XX=y
>  CONFIG_DM_MAILBOX=y
>  CONFIG_K3_SEC_PROXY=y
>  CONFIG_DM_MMC=y
> diff --git a/configs/am65x_hs_evm_r5_defconfig 
> b/configs/am65x_hs_evm_r5_defconfig
> index 8d5d3590b2..6977cd72a6 100644
> --- a/configs/am65x_hs_evm_r5_defconfig
> +++ b/configs/am65x_hs_evm_r5_defconfig
> @@ -37,6 +37,7 @@ CONFIG_CMD_BOOTZ=y
>  CONFIG_CMD_ASKENV=y
>  # CONFIG_CMD_FLASH is not set
>  CONFIG_CMD_GPT=y
> +CONFIG_CMD_I2C=y
>  CONFIG_CMD_MMC=y
>  CONFIG_CMD_REMOTEPROC=y
>  # CONFIG_CMD_SETEXPR is not set
> @@ -60,6 +61,9 @@ CONFIG_CLK_TI_SCI=y
>  CONFIG_TI_SCI_PROTOCOL=y
>  CONFIG_DM_GPIO=y
>  CONFIG_DA8XX_GPIO=y
> +CONFIG_DM_I2C=y
> +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
> +CONFIG_SYS_I2C_OMAP24XX=y
>  CONFIG_DM_MAILBOX=y
>  CONFIG_K3_SEC_PROXY=y
>  CONFIG_MISC=y
> 
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[U-Boot] [PATCH 01/18] i2c: omap24xx_i2c: Adapt driver to support K3 devices

2019-05-08 Thread Andreas Dannenberg
From: Vignesh R 

K3 devices have I2C IP that is same as OMAP2+ family. Allow driver to be
compiled for ARCH_K3.

Signed-off-by: Vignesh R 
Signed-off-by: Andreas Dannenberg 
---
 drivers/i2c/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 215624020f..4cd7e9ad82 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -327,7 +327,7 @@ endif
 
 config SYS_I2C_OMAP24XX
bool "TI OMAP2+ I2C driver"
-   depends on ARCH_OMAP2PLUS
+   depends on ARCH_OMAP2PLUS || ARCH_K3
help
  Add support for the OMAP2+ I2C driver.
 
-- 
2.17.1

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[U-Boot] [PATCH 13/18] arm: K3: am654: Map common EEPROM data into SRAM scratch space

2019-05-08 Thread Andreas Dannenberg
The board detection scheme employed on various TI EVMs makes use of
SRAM scratch space to share data read from an on-board EEPROM between
the different bootloading stages. Map the associated definition that's
used to locate this data into the SRAM scratch space we use on AM654x.

Signed-off-by: Andreas Dannenberg 
---
 arch/arm/mach-k3/include/mach/am6_hardware.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h 
b/arch/arm/mach-k3/include/mach/am6_hardware.h
index 3343233aa3..6df7631545 100644
--- a/arch/arm/mach-k3/include/mach/am6_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
@@ -44,4 +44,7 @@
 #define CTRLMMR_LOCK_KICK1 0x0100c
 #define CTRLMMR_LOCK_KICK1_UNLOCK_VAL  0xd172bc5a
 
+/* MCU SCRATCHPAD usage */
+#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
+
 #endif /* __ASM_ARCH_AM6_HARDWARE_H */
-- 
2.17.1

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[U-Boot] [PATCH 18/18] configs: am65x_hs_evm: Add support for applying overlays

2019-05-08 Thread Andreas Dannenberg
This will allow for downloading and applying overlays from an MMC/SD
boot media based on the overlay_files ENV variable containing a list
of overlay files.

Signed-off-by: Andreas Dannenberg 
---
 configs/am65x_hs_evm_a53_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configs/am65x_hs_evm_a53_defconfig 
b/configs/am65x_hs_evm_a53_defconfig
index 54a2f73f45..934d52840a 100644
--- a/configs/am65x_hs_evm_a53_defconfig
+++ b/configs/am65x_hs_evm_a53_defconfig
@@ -19,7 +19,7 @@ CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run 
get_kern_${boot}; run get_fdt_${boot}; run run_kern"
+CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run 
get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_TEXT_BASE=0x8008
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -82,3 +82,4 @@ CONFIG_DM_SERIAL=y
 CONFIG_SOC_TI=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_TI_SCI=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.17.1

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[U-Boot] [PATCH 09/18] configs: am65x_evm_a53: Enable PCA953X-type GPIO driver

2019-05-08 Thread Andreas Dannenberg
Enable GPIO driver for PCA953X-compatible I2C-based I/O expander
which includes support for the TCA9554/PCA9554-type expander found
on the AM654 EVM base board.

Signed-off-by: Andreas Dannenberg 
---
 configs/am65x_evm_a53_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 5c8ecb19a2..eb1ffb36ab 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -54,6 +54,8 @@ CONFIG_CLK_TI_SCI=y
 CONFIG_DMA_CHANNELS=y
 CONFIG_TI_K3_NAVSS_UDMA=y
 CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_SYS_I2C_OMAP24XX=y
-- 
2.17.1

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[U-Boot] [PATCH 06/18] configs: am65x_evm_defconfig: Enable I2C support

2019-05-08 Thread Andreas Dannenberg
Enable I2C via driver model as well as the associated set of U-Boot
commands to allow us interacting with various I2C slave devices.

Signed-off-by: Andreas Dannenberg 
Signed-off-by: Vignesh R 
---
 configs/am65x_evm_a53_defconfig | 4 
 configs/am65x_evm_r5_defconfig  | 4 
 2 files changed, 8 insertions(+)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 101fae1456..5c8ecb19a2 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -30,6 +30,7 @@ CONFIG_SPL_REMOTEPROC=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_REMOTEPROC=y
 # CONFIG_CMD_SETEXPR is not set
@@ -53,6 +54,9 @@ CONFIG_CLK_TI_SCI=y
 CONFIG_DMA_CHANNELS=y
 CONFIG_TI_K3_NAVSS_UDMA=y
 CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
 CONFIG_DM_MMC=y
diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index 8dce577cf7..46eb991f27 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_REMOTEPROC=y
 # CONFIG_CMD_SETEXPR is not set
@@ -58,6 +59,9 @@ CONFIG_CLK_TI_SCI=y
 CONFIG_TI_SCI_PROTOCOL=y
 CONFIG_DM_GPIO=y
 CONFIG_DA8XX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
 CONFIG_MISC=y
-- 
2.17.1

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[U-Boot] [PATCH 17/18] configs: am65x_evm: Add support for applying overlays

2019-05-08 Thread Andreas Dannenberg
This will allow for downloading and applying overlays from an MMC/SD
boot media based on the overlay_files ENV variable containing a list
of overlay files.

Signed-off-by: Andreas Dannenberg 
---
 configs/am65x_evm_a53_defconfig | 3 ++-
 include/configs/am65x_evm.h | 9 +
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 12319dcdeb..058b7dbbf7 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -16,7 +16,7 @@ CONFIG_DISTRO_DEFAULTS=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run 
get_kern_${boot}; run get_fdt_${boot}; run run_kern"
+CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run 
get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_TEXT_BASE=0x8008
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -79,3 +79,4 @@ CONFIG_DM_SERIAL=y
 CONFIG_SOC_TI=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_TI_SCI=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index 7e3d6a3b8f..e3dbcce0bf 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -42,6 +42,7 @@
"setenv overlay_files ${name_overlays}\0"   \
"loadaddr=0x8008\0" \
"fdtaddr=0x8200\0"  \
+   "overlayaddr=0x8300\0"  \
"name_kern=Image\0" \
"console=ttyS2,115200n8\0"  \
"args_all=setenv optargs earlycon=ns16550a,mmio32,0x0280\0" \
@@ -56,6 +57,14 @@
"rd_spec=-\0"   \
"init_mmc=run args_all args_mmc\0"  \
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
+   "get_overlay_mmc="  \
+   "fdt address ${fdtaddr};"   \
+   "fdt resize 0x10;"  \
+   "for overlay in $overlay_files;"\
+   "do;"   \
+   "load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay};"
\
+   "fdt apply ${overlayaddr};" \
+   "done;\0"   \
"get_kern_mmc=load mmc ${bootpart} ${loadaddr} "\
"${bootdir}/${name_kern}\0"
 
-- 
2.17.1

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[U-Boot] [PATCH 05/18] arm: dts: k3-am654-base-board: Enable wkup_i2c0 across all boot stages

2019-05-08 Thread Andreas Dannenberg
To enable the use of an EEPROM-based board detection scheme we need to
be able to access the I2C bus associated with the EEPROMs across all
3 stages of U-Boot: R5 SPL, A53 SPL, and A53 U-Boot (proper). So go
ahead and add/update the wkup_i2c0 peripheral module DTS definitions
and its associated pinmux node accordingly.

Signed-off-by: Andreas Dannenberg 
---
 arch/arm/dts/k3-am65.dtsi|  1 +
 arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 12 
 arch/arm/dts/k3-am654-base-board.dts | 15 +++
 arch/arm/dts/k3-am654-r5-base-board.dts  | 13 +
 4 files changed, 41 insertions(+)

diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi
index 5bcf6e0693..50f4be2047 100644
--- a/arch/arm/dts/k3-am65.dtsi
+++ b/arch/arm/dts/k3-am65.dtsi
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 
 / {
model = "Texas Instruments K3 AM654 SoC";
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi 
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index c802f0b2b7..eb057e7a96 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -117,6 +117,14 @@
u-boot,dm-spl;
 };
 
+&wkup_pmx0 {
+   u-boot,dm-spl;
+
+   wkup_i2c0_pins_default {
+   u-boot,dm-spl;
+   };
+};
+
 &main_pmx0 {
u-boot,dm-spl;
main_uart0_pins_default: main_uart0_pins_default {
@@ -189,3 +197,7 @@
pinctrl-0 = <&main_mmc1_pins_default>;
sdhci-caps-mask = <0x7 0x0>;
 };
+
+&wkup_i2c0 {
+   u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/k3-am654-base-board.dts 
b/arch/arm/dts/k3-am654-base-board.dts
index af6956fdc1..e31411e39d 100644
--- a/arch/arm/dts/k3-am654-base-board.dts
+++ b/arch/arm/dts/k3-am654-base-board.dts
@@ -34,3 +34,18 @@
};
};
 };
+
+&wkup_pmx0 {
+   wkup_i2c0_pins_default: wkup-i2c0-pins-default {
+   pinctrl-single,pins = <
+   AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) 
WKUP_I2C0_SCL */
+   AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) 
WKUP_I2C0_SDA */
+   >;
+   };
+};
+
+&wkup_i2c0 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&wkup_i2c0_pins_default>;
+   clock-frequency = <40>;
+};
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts 
b/arch/arm/dts/k3-am654-r5-base-board.dts
index a07038be70..1ef525ea69 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -130,6 +130,13 @@
>;
u-boot,dm-spl;
};
+
+   wkup_i2c0_pins_default: wkup-i2c0-pins-default {
+   pinctrl-single,pins = <
+   AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) 
WKUP_I2C0_SCL */
+   AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) 
WKUP_I2C0_SDA */
+   >;
+   };
 };
 
 &memorycontroller {
@@ -137,3 +144,9 @@
pinctrl-names = "default";
pinctrl-0 = <&wkup_vtt_pins_default>;
 };
+
+&wkup_i2c0 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&wkup_i2c0_pins_default>;
+   clock-frequency = <40>;
+};
-- 
2.17.1

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[U-Boot] [PATCH 14/18] ti: common: am6: Add support for board description EEPROM

2019-05-08 Thread Andreas Dannenberg
The AM654x EVM based on the TI K3 family of SoCs have an updated board
detection EEPROM structure, now comprising variable-sized TLV-type
records, containing a superset of what is already being provided on
earlier platforms such as DRA7. Add basic support for parsing the new
data structures contained on the base board into the common TI EEPROM
structure while also providing infrastructure that can be used later on
to parse data from additional EEPROMs such as the ones that are used on
daughtercards for this platform.

Signed-off-by: Andreas Dannenberg 
---
 board/ti/common/board_detect.c | 214 +
 board/ti/common/board_detect.h | 194 ++
 2 files changed, 408 insertions(+)

diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index e258e22f37..fea39f21e8 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -284,6 +285,191 @@ int __maybe_unused ti_i2c_eeprom_dra7_get(int bus_addr, 
int dev_addr)
return 0;
 }
 
+static int ti_i2c_eeprom_am6_parse_record(struct ti_am6_eeprom_record *record,
+ struct ti_am6_eeprom *ep,
+ char **mac_addr,
+ u8 mac_addr_max_cnt,
+ u8 *mac_addr_cnt)
+{
+   switch (record->header.id) {
+   case TI_AM6_EEPROM_RECORD_BOARD_INFO:
+   if (record->header.len != sizeof(record->data.board_info))
+   return -EINVAL;
+
+   if (!ep)
+   break;
+
+   /* Populate (and clean, if needed) the board name */
+   strlcpy(ep->name, record->data.board_info.name,
+   sizeof(ep->name));
+   ti_eeprom_string_cleanup(ep->name);
+
+   /* Populate selected other fields from the board info record */
+   strlcpy(ep->version, record->data.board_info.version,
+   sizeof(ep->version));
+   strlcpy(ep->software_revision,
+   record->data.board_info.software_revision,
+   sizeof(ep->software_revision));
+   strlcpy(ep->serial, record->data.board_info.serial,
+   sizeof(ep->serial));
+   break;
+   case TI_AM6_EEPROM_RECORD_MAC_INFO:
+   if (record->header.len != sizeof(record->data.mac_info))
+   return -EINVAL;
+
+   if (!mac_addr || !mac_addr_max_cnt)
+   break;
+
+   *mac_addr_cnt = ((record->data.mac_info.mac_control &
+TI_AM6_EEPROM_MAC_ADDR_COUNT_MASK) >>
+TI_AM6_EEPROM_MAC_ADDR_COUNT_SHIFT) + 1;
+
+   /*
+* The EEPROM can (but may not) hold a very large amount
+* of MAC addresses, by far exceeding what we want/can store
+* in the common memory array, so only grab what we can fit.
+* Note that a value of 0 means 1 MAC address, and so on.
+*/
+   *mac_addr_cnt = min(*mac_addr_cnt, mac_addr_max_cnt);
+
+   memcpy(mac_addr, record->data.mac_info.mac_addr,
+  *mac_addr_cnt * TI_EEPROM_HDR_ETH_ALEN);
+   break;
+   case 0x00:
+   /* Illegal value... Fall through... */
+   case 0xFF:
+   /* Illegal value... Something went horribly wrong... */
+   return -EINVAL;
+   default:
+   pr_warn("%s: Ignoring record id %u\n", __func__,
+   record->header.id);
+   }
+
+   return 0;
+}
+
+int __maybe_unused ti_i2c_eeprom_am6_get(int bus_addr, int dev_addr,
+struct ti_am6_eeprom *ep,
+char **mac_addr,
+u8 mac_addr_max_cnt,
+u8 *mac_addr_cnt)
+{
+   struct udevice *dev;
+   struct udevice *bus;
+   unsigned int eeprom_addr;
+   struct ti_am6_eeprom_record_board_id board_id;
+   struct ti_am6_eeprom_record record;
+   int rc;
+
+   /* Initialize with a known bad marker for i2c fails.. */
+   memset(ep, 0, sizeof(*ep));
+   ep->header = TI_DEAD_EEPROM_MAGIC;
+
+   /* Read the board ID record which is always the first EEPROM record */
+   rc = ti_i2c_eeprom_get(bus_addr, dev_addr, TI_EEPROM_HEADER_MAGIC,
+  sizeof(board_id), (uint8_t *)&board_id);
+   if (rc)
+   return rc;
+
+   if (board_id.header.id != TI_AM6_EEPROM_RECORD_BOARD_ID) {
+   pr_err("%s: Invalid board ID record!\n", __func__);
+   return -EINVAL;
+   }
+
+   /* Establish DM handle to board config 

[U-Boot] [PATCH 11/18] configs: am65x_evm_a53: Increase malloc pool before relocation

2019-05-08 Thread Andreas Dannenberg
The malloc pool used before relocation is getting tight leading to
out of memory errors doing certain DM-related calls. Since we are
running the A53 SPL out of DDR let's just go ahead and bump its size
as used in U-Boot proper as well as SPL (via Kconfig default value)
from 8KB to 32KB.

Signed-off-by: Andreas Dannenberg 
---
 configs/am65x_evm_a53_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index eb1ffb36ab..12319dcdeb 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_K3=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_SOC_K3_AM6=y
 CONFIG_TARGET_AM654_A53_EVM=y
 CONFIG_SPL_MMC_SUPPORT=y
-- 
2.17.1

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[U-Boot] [PATCH 15/18] ti: common: am6: Add support for setting MAC addresses

2019-05-08 Thread Andreas Dannenberg
The AM654x EVM based on the TI K3 family of SoCs has an updated board
detection EEPROM structure that contains a TLV record of dedicated MAC
addresses rather than a range of MAC addresses as it was used on earlier
platforms such as DRA7. Add a basic function that allows us setting up
Ethernet MAC addresses into the U-Boot environment based on the MAC
address record contained in the common TI EEPROM structure.

Signed-off-by: Andreas Dannenberg 
---
 board/ti/common/board_detect.c | 32 
 board/ti/common/board_detect.h | 12 
 2 files changed, 44 insertions(+)

diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index fea39f21e8..32fa10599e 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -534,6 +534,25 @@ fail:
memset(mac_addr, 0, TI_EEPROM_HDR_ETH_ALEN);
 }
 
+void __maybe_unused
+board_ti_am6_get_eth_mac_addr(int index,
+ u8 mac_addr[TI_EEPROM_HDR_ETH_ALEN])
+{
+   struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+
+   if (ep->header == TI_DEAD_EEPROM_MAGIC)
+   goto fail;
+
+   if (index < 0 || index >= ep->mac_addr_cnt)
+   goto fail;
+
+   memcpy(mac_addr, ep->mac_addr[index], TI_EEPROM_HDR_ETH_ALEN);
+   return;
+
+fail:
+   memset(mac_addr, 0, TI_EEPROM_HDR_ETH_ALEN);
+}
+
 u64 __maybe_unused board_ti_get_emif1_size(void)
 {
struct ti_common_eeprom *ep = TI_EEPROM_DATA;
@@ -667,6 +686,19 @@ void board_ti_set_ethaddr(int index)
}
 }
 
+void board_ti_am6_set_ethaddr(int index, int count)
+{
+   u8 mac_addr[6];
+   int i;
+
+   for (i = 0; i < count; i++) {
+   board_ti_am6_get_eth_mac_addr(i, mac_addr);
+   if (is_valid_ethaddr(mac_addr))
+   eth_env_set_enetaddr_by_index("eth", i + index,
+ mac_addr);
+   }
+}
+
 bool __maybe_unused board_ti_was_eeprom_read(void)
 {
struct ti_common_eeprom *ep = TI_EEPROM_DATA;
diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h
index bf563c84c8..a45d8961b9 100644
--- a/board/ti/common/board_detect.h
+++ b/board/ti/common/board_detect.h
@@ -398,6 +398,18 @@ void set_board_info_env_am6(char *name);
  */
 void board_ti_set_ethaddr(int index);
 
+/**
+ * board_ti_am6_set_ethaddr- Sets the ethaddr environment from EEPROM
+ * @index: The first ethaddr environment variable to set
+ * @count: The number of MAC addresses to process
+ *
+ * EEPROM should be already read before calling this function. The EEPROM
+ * contains n dedicated MAC addresses. This function sets the ethaddr
+ * environment variable for all the available MAC addresses starting
+ * from ethaddr.
+ */
+void board_ti_am6_set_ethaddr(int index, int count);
+
 /**
  * board_ti_was_eeprom_read() - Check to see if the eeprom contents have been 
read
  *
-- 
2.17.1

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[U-Boot] [PATCH 03/18] arm: dts: k3-am65: Move pinctrl nodes out of U-Boot specific dtsi

2019-05-08 Thread Andreas Dannenberg
Only U-Boot specifc DT properties or overrides, must be in -u-boot.dtsi.
Pinctrl nodes does not belong here. Now that pinctrl nodes are in kernel
DT, there is no reason to be keep these in -u-boot.dtsi. Move them to
proper places so that it would ease copying DT entries from kernel DT.

Signed-off-by: Vignesh R 
---
 arch/arm/dts/k3-am65-main.dtsi   | 16 ++
 arch/arm/dts/k3-am65-wakeup.dtsi |  8 +++
 arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 23 
 3 files changed, 24 insertions(+), 23 deletions(-)

diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index adcd6341e4..f7c2a60d5c 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -69,4 +69,20 @@
clock-frequency = <4800>;
current-speed = <115200>;
};
+
+   main_pmx0: pinmux@11c000 {
+   compatible = "pinctrl-single";
+   reg = <0x0 0x11c000 0x0 0x2e4>;
+   #pinctrl-cells = <1>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <0x>;
+   };
+
+   main_pmx1: pinmux@11c2e8 {
+   compatible = "pinctrl-single";
+   reg = <0x0 0x11c2e8 0x0 0x24>;
+   #pinctrl-cells = <1>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <0x>;
+   };
 };
diff --git a/arch/arm/dts/k3-am65-wakeup.dtsi b/arch/arm/dts/k3-am65-wakeup.dtsi
index 1f591ef8bb..1b67747dfe 100644
--- a/arch/arm/dts/k3-am65-wakeup.dtsi
+++ b/arch/arm/dts/k3-am65-wakeup.dtsi
@@ -34,6 +34,14 @@
};
};
 
+   wkup_pmx0: pinmux@4301c000 {
+   compatible = "pinctrl-single";
+   reg = <0x4301c000 0x118>;
+   #pinctrl-cells = <1>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <0x>;
+   };
+
wkup_uart0: serial@4230 {
compatible = "ti,am654-uart";
reg = <0x4230 0x100>;
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi 
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index f5c8253831..c802f0b2b7 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -19,22 +19,6 @@
 &cbass_main{
u-boot,dm-spl;
 
-   main_pmx0: pinmux@11c000 {
-   compatible = "pinctrl-single";
-   reg = <0x0 0x11c000 0x0 0x2e4>;
-   #pinctrl-cells = <1>;
-   pinctrl-single,register-width = <32>;
-   pinctrl-single,function-mask = <0x>;
-   };
-
-   main_pmx1: pinmux@11c2e8 {
-   compatible = "pinctrl-single";
-   reg = <0x0 0x11c2e8 0x0 0x24>;
-   #pinctrl-cells = <1>;
-   pinctrl-single,register-width = <32>;
-   pinctrl-single,function-mask = <0x>;
-   };
-
sdhci0: sdhci@04F8 {
compatible = "arasan,sdhci-5.1";
reg = <0x0 0x4F8 0x0 0x1000>,
@@ -57,13 +41,6 @@
 
 &cbass_mcu {
u-boot,dm-spl;
-   wkup_pmx0: pinmux@4301c000 {
-   compatible = "pinctrl-single";
-   reg = <0x0 0x4301c000 0x0 0x118>;
-   #pinctrl-cells = <1>;
-   pinctrl-single,register-width = <32>;
-   pinctrl-single,function-mask = <0x>;
-   };
 
navss_mcu: navss-mcu {
compatible = "simple-bus";
-- 
2.17.1

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[U-Boot] [PATCH 16/18] board: ti: am654: Use EEPROM-based board detection

2019-05-08 Thread Andreas Dannenberg
The TI AM654x EVM base board and the associated daughtercards have on-
board I2C-based EEPROMs containing board configuration data. Use the
board detection infrastructure introduced earlier to do the following:

1) Parse the AM654x EVM base board EEPROM and populate items like board
   name and MAC addresses into the TI common EEPROM data structure
   residing in SRAM scratch space
2) Check for presence of daughter card(s) by probing the associated
   presence signals via an I2C-based GPIO expander. Then, if such a
   card is found, parse the data such as additional Ethernet MAC
   addresses from its on-board EEPROM and populate into U-Boot
   accordingly
3) Dynamically create an U-Boot ENV variable called overlay_files
   containing a list of daugherboard-specific DTB overlays based on
   daughercards found.

This patch adds support for the AM654x base board ("AM6-COMPROCEVM")
as well as for the IDK ("AM6-IDKAPPEVM"), OLDI LCD ("OLDI-LCD1EVM")
PCIe/USB3.0 ("SER-PCIEUSBEVM"), 2 Lane PCIe/USB2.0 ("SER-PCIE2LEVM"),
and general purpuse ("AM6-GPAPPEVM") daughtercards.

Signed-off-by: Andreas Dannenberg 
---
 arch/arm/mach-k3/am6_init.c   |   4 +
 arch/arm/mach-k3/include/mach/sys_proto.h |   2 +
 board/ti/am65x/Kconfig|   7 +
 board/ti/am65x/evm.c  | 241 ++
 include/configs/am65x_evm.h   |   9 +-
 5 files changed, 257 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 60a580305d..72bce7ce43 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "common.h"
 #include 
 
@@ -86,6 +87,9 @@ void board_init_f(ulong dummy)
/* Prepare console output */
preloader_console_init();
 
+   /* Perform EEPROM-based board detection */
+   do_board_detect();
+
 #ifdef CONFIG_K3_AM654_DDRSS
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h 
b/arch/arm/mach-k3/include/mach/sys_proto.h
index 018725b4d1..787a274492 100644
--- a/arch/arm/mach-k3/include/mach/sys_proto.h
+++ b/arch/arm/mach-k3/include/mach/sys_proto.h
@@ -12,4 +12,6 @@ u32 wait_on_value(u32 read_bit_mask, u32 match_value, void 
*read_addr,
  u32 bound);
 struct ti_sci_handle *get_ti_sci_handle(void);
 int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name);
+int do_board_detect(void);
+
 #endif
diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
index 98172c28f5..64d9b8cdae 100644
--- a/board/ti/am65x/Kconfig
+++ b/board/ti/am65x/Kconfig
@@ -12,6 +12,8 @@ config TARGET_AM654_A53_EVM
select ARM64
select SOC_K3_AM6
select SYS_DISABLE_DCACHE_OPS
+   select BOARD_LATE_INIT
+   imply TI_I2C_BOARD_DETECT
 
 config TARGET_AM654_R5_EVM
bool "TI K3 based AM654 EVM running on R5"
@@ -20,6 +22,7 @@ config TARGET_AM654_R5_EVM
select SOC_K3_AM6
select K3_AM654_DDRSS
imply SYS_K3_SPL_ATF
+   imply TI_I2C_BOARD_DETECT
 
 endchoice
 
@@ -34,6 +37,8 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
default "am65x_evm"
 
+source "board/ti/common/Kconfig"
+
 endif
 
 if TARGET_AM654_R5_EVM
@@ -50,4 +55,6 @@ config SYS_CONFIG_NAME
 config SPL_LDSCRIPT
default "arch/arm/mach-omap2/u-boot-spl.lds"
 
+source "board/ti/common/Kconfig"
+
 endif
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 52f5d6b11e..7bd8c4fa66 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -8,10 +8,31 @@
  */
 
 #include 
+#include 
+#include 
+#include 
+#include 
 #include 
+#include 
 #include 
 #include 
 
+#include "../common/board_detect.h"
+
+#define board_is_am65x_base_board()board_ti_is("AM6-COMPROCEVM")
+
+/* Daughter card presence detection signals */
+enum {
+   AM65X_EVM_APP_BRD_DET,
+   AM65X_EVM_LCD_BRD_DET,
+   AM65X_EVM_SERDES_BRD_DET,
+   AM65X_EVM_HDMI_GPMC_BRD_DET,
+   AM65X_EVM_BRD_DET_COUNT,
+};
+
+/* Max number of MAC addresses that are parsed/processed per daughter card */
+#define DAUGHTER_CARD_NO_OF_MAC_ADDR   8
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
@@ -80,3 +101,223 @@ int ft_board_setup(void *blob, bd_t *bd)
return ret;
 }
 #endif
+
+int do_board_detect(void)
+{
+   int ret;
+
+   ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
+CONFIG_EEPROM_CHIP_ADDRESS);
+   if (ret)
+   pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
+  CONFIG_EEPROM_CHIP_ADDRESS, ret);
+
+   return ret;
+}
+
+static void setup_board_eeprom_env(void)
+{
+   char *name = "am65x";
+
+   if (do_board_detect())
+   goto invalid_eeprom;
+
+   if (board_is_am65x_base_board())
+   name = "am65x";
+   else
+   printf("Unidentified board claims %s in eepr

[U-Boot] [PATCH 07/18] configs: am65x_hs_evm_defconfig: Enable I2C support

2019-05-08 Thread Andreas Dannenberg
Enable I2C via driver model as well as the associated set of U-Boot
commands to allow us interacting with various I2C slave devices.

Signed-off-by: Andreas Dannenberg 
---
 configs/am65x_hs_evm_a53_defconfig | 4 
 configs/am65x_hs_evm_r5_defconfig  | 4 
 2 files changed, 8 insertions(+)

diff --git a/configs/am65x_hs_evm_a53_defconfig 
b/configs/am65x_hs_evm_a53_defconfig
index 7af0046ee3..cebfbb93d9 100644
--- a/configs/am65x_hs_evm_a53_defconfig
+++ b/configs/am65x_hs_evm_a53_defconfig
@@ -33,6 +33,7 @@ CONFIG_SPL_REMOTEPROC=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_REMOTEPROC=y
 # CONFIG_CMD_SETEXPR is not set
@@ -56,6 +57,9 @@ CONFIG_CLK_TI_SCI=y
 CONFIG_DMA_CHANNELS=y
 CONFIG_TI_K3_NAVSS_UDMA=y
 CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
 CONFIG_DM_MMC=y
diff --git a/configs/am65x_hs_evm_r5_defconfig 
b/configs/am65x_hs_evm_r5_defconfig
index 8d5d3590b2..6977cd72a6 100644
--- a/configs/am65x_hs_evm_r5_defconfig
+++ b/configs/am65x_hs_evm_r5_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_REMOTEPROC=y
 # CONFIG_CMD_SETEXPR is not set
@@ -60,6 +61,9 @@ CONFIG_CLK_TI_SCI=y
 CONFIG_TI_SCI_PROTOCOL=y
 CONFIG_DM_GPIO=y
 CONFIG_DA8XX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
 CONFIG_MISC=y
-- 
2.17.1

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[U-Boot] [PATCH 00/18] Add EEPROM-based board detect support for TI

2019-05-08 Thread Andreas Dannenberg
This series adds the pieces needed to fully configure the TI AM654x EVM
and its associated (optional) daughtercards using a GPIO-based card
presence detection scheme. It then reads out and parses any I2C EEPROM
data present on any such boards for example board name, serial #,
Ethernet MAC addresses, etc. and incorporates this data into the current
U-Boot environment. One important aspect is the application of
daughercard-specific DTB overlays right before the Kernel boot happens.

This series also adds basic I2C support for TI K3 family devices which
is a prerequisite for the EEPROM access.

--
Andreas Dannenberg
Texas Instruments Inc


Andreas Dannenberg (16):
  arm: dts: k3-am65: Move pinctrl nodes out of U-Boot specific dtsi
  arm: dts: k3-am65: Add I2C nodes
  arm: dts: k3-am654-base-board: Enable wkup_i2c0 across all boot stages
  configs: am65x_evm_defconfig: Enable I2C support
  configs: am65x_hs_evm_defconfig: Enable I2C support
  arm64: dts: k3-am654-base-board: Add I2C GPIO expander @ 0x38
  configs: am65x_evm_a53: Enable PCA953X-type GPIO driver
  configs: am65x_hs_evm_a53: Enable PCA953X-type GPIO driver
  configs: am65x_evm_a53: Increase malloc pool before relocation
  configs: am65x_hs_evm_a53: Increase malloc pool before relocation
  arm: K3: am654: Map common EEPROM data into SRAM scratch space
  ti: common: am6: Add support for board description EEPROM
  ti: common: am6: Add support for setting MAC addresses
  board: ti: am654: Use EEPROM-based board detection
  configs: am65x_evm: Add support for applying overlays
  configs: am65x_hs_evm: Add support for applying overlays

Vignesh R (2):
  i2c: omap24xx_i2c: Adapt driver to support K3 devices
  arm: omap_i2c: Remove unwanted header file inclusion

 arch/arm/dts/k3-am65-main.dtsi   |  60 +
 arch/arm/dts/k3-am65-mcu.dtsi|  11 +
 arch/arm/dts/k3-am65-wakeup.dtsi |  19 ++
 arch/arm/dts/k3-am65.dtsi|   7 +
 arch/arm/dts/k3-am654-base-board-u-boot.dtsi |  35 +--
 arch/arm/dts/k3-am654-base-board.dts |  22 ++
 arch/arm/dts/k3-am654-r5-base-board.dts  |  13 +
 arch/arm/include/asm/omap_i2c.h  |   2 -
 arch/arm/mach-k3/am6_init.c  |   4 +
 arch/arm/mach-k3/include/mach/am6_hardware.h |   3 +
 arch/arm/mach-k3/include/mach/sys_proto.h|   2 +
 board/ti/am65x/Kconfig   |   7 +
 board/ti/am65x/evm.c | 241 ++
 board/ti/common/board_detect.c   | 246 +++
 board/ti/common/board_detect.h   | 206 
 configs/am65x_evm_a53_defconfig  |  11 +-
 configs/am65x_evm_r5_defconfig   |   4 +
 configs/am65x_hs_evm_a53_defconfig   |  11 +-
 configs/am65x_hs_evm_r5_defconfig|   4 +
 drivers/i2c/Kconfig  |   2 +-
 include/configs/am65x_evm.h  |  18 +-
 21 files changed, 892 insertions(+), 36 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH 04/18] arm: dts: k3-am65: Add I2C nodes

2019-05-08 Thread Andreas Dannenberg
Add I2C DT nodes

Signed-off-by: Vignesh R 
---
 arch/arm/dts/k3-am65-main.dtsi   | 44 
 arch/arm/dts/k3-am65-mcu.dtsi| 11 
 arch/arm/dts/k3-am65-wakeup.dtsi | 11 
 arch/arm/dts/k3-am65.dtsi|  6 +
 4 files changed, 72 insertions(+)

diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index f7c2a60d5c..9164348396 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -85,4 +85,48 @@
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x>;
};
+
+   main_i2c0: i2c@200 {
+   compatible = "ti,am654-i2c", "ti,omap4-i2c";
+   reg = <0x0 0x200 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-names = "fck";
+   clocks = <&k3_clks 110 1>;
+   power-domains = <&k3_pds 110>;
+   };
+
+   main_i2c1: i2c@201 {
+   compatible = "ti,am654-i2c", "ti,omap4-i2c";
+   reg = <0x0 0x201 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-names = "fck";
+   clocks = <&k3_clks 111 1>;
+   power-domains = <&k3_pds 111>;
+   };
+
+   main_i2c2: i2c@202 {
+   compatible = "ti,am654-i2c", "ti,omap4-i2c";
+   reg = <0x0 0x202 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-names = "fck";
+   clocks = <&k3_clks 112 1>;
+   power-domains = <&k3_pds 112>;
+   };
+
+   main_i2c3: i2c@203 {
+   compatible = "ti,am654-i2c", "ti,omap4-i2c";
+   reg = <0x0 0x203 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-names = "fck";
+   clocks = <&k3_clks 113 1>;
+   power-domains = <&k3_pds 113>;
+   };
 };
diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi
index 8c611d16df..1fd027748e 100644
--- a/arch/arm/dts/k3-am65-mcu.dtsi
+++ b/arch/arm/dts/k3-am65-mcu.dtsi
@@ -15,4 +15,15 @@
clock-frequency = <9600>;
current-speed = <115200>;
};
+
+   mcu_i2c0: i2c@40b0 {
+   compatible = "ti,am654-i2c", "ti,omap4-i2c";
+   reg = <0x0 0x40b0 0x0 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-names = "fck";
+   clocks = <&k3_clks 114 1>;
+   power-domains = <&k3_pds 114>;
+   };
 };
diff --git a/arch/arm/dts/k3-am65-wakeup.dtsi b/arch/arm/dts/k3-am65-wakeup.dtsi
index 1b67747dfe..1f85006f55 100644
--- a/arch/arm/dts/k3-am65-wakeup.dtsi
+++ b/arch/arm/dts/k3-am65-wakeup.dtsi
@@ -51,4 +51,15 @@
clock-frequency = <4800>;
current-speed = <115200>;
};
+
+   wkup_i2c0: i2c@4212 {
+   compatible = "ti,am654-i2c", "ti,omap4-i2c";
+   reg = <0x4212 0x100>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-names = "fck";
+   clocks = <&k3_clks 115 1>;
+   power-domains = <&k3_pds 115>;
+   };
 };
diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi
index 3d4bf369d0..5bcf6e0693 100644
--- a/arch/arm/dts/k3-am65.dtsi
+++ b/arch/arm/dts/k3-am65.dtsi
@@ -22,6 +22,12 @@
serial2 = &main_uart0;
serial3 = &main_uart1;
serial4 = &main_uart2;
+   i2c0 = &wkup_i2c0;
+   i2c1 = &mcu_i2c0;
+   i2c2 = &main_i2c0;
+   i2c3 = &main_i2c1;
+   i2c4 = &main_i2c2;
+   i2c5 = &main_i2c3;
};
 
chosen { };
-- 
2.17.1

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[U-Boot] [PATCH 12/18] configs: am65x_hs_evm_a53: Increase malloc pool before relocation

2019-05-08 Thread Andreas Dannenberg
The malloc pool used before relocation is getting tight leading to
out of memory errors doing certain DM-related calls. Since we are
running the A53 SPL out of DDR let's just go ahead and bump its size
as used in U-Boot proper as well as SPL (via Kconfig default value)
from 8KB to 32KB.

Signed-off-by: Andreas Dannenberg 
---
 configs/am65x_hs_evm_a53_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/am65x_hs_evm_a53_defconfig 
b/configs/am65x_hs_evm_a53_defconfig
index 8376a6be3d..54a2f73f45 100644
--- a/configs/am65x_hs_evm_a53_defconfig
+++ b/configs/am65x_hs_evm_a53_defconfig
@@ -3,7 +3,7 @@ CONFIG_ARCH_K3=y
 CONFIG_TI_SECURE_DEVICE=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_SOC_K3_AM6=y
 CONFIG_TARGET_AM654_A53_EVM=y
 CONFIG_SPL_MMC_SUPPORT=y
-- 
2.17.1

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[U-Boot] [PATCH 08/18] arm64: dts: k3-am654-base-board: Add I2C GPIO expander @ 0x38

2019-05-08 Thread Andreas Dannenberg
The AM654 base board has a TCA9554/PCA9554-type GPIO expander on the
wkup_i2c0 bus at address 0x38 that is used to detect the presence of
daughter cards.  Add a respective DTS description of this expander
to enable its use.

Signed-off-by: Andreas Dannenberg 
---
 arch/arm/dts/k3-am654-base-board.dts | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/dts/k3-am654-base-board.dts 
b/arch/arm/dts/k3-am654-base-board.dts
index e31411e39d..c6a595be23 100644
--- a/arch/arm/dts/k3-am654-base-board.dts
+++ b/arch/arm/dts/k3-am654-base-board.dts
@@ -48,4 +48,11 @@
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <40>;
+
+   tca9554: gpio@38 {
+   compatible = "nxp,pca9554";
+   reg = <0x38>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   };
 };
-- 
2.17.1

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[U-Boot] [PATCH 10/18] configs: am65x_hs_evm_a53: Enable PCA953X-type GPIO driver

2019-05-08 Thread Andreas Dannenberg
Enable GPIO driver for PCA953X-compatible I2C-based I/O expander
which includes support for the TCA9554/PCA9554-type expander found
on the AM654 EVM base board.

Signed-off-by: Andreas Dannenberg 
---
 configs/am65x_hs_evm_a53_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/am65x_hs_evm_a53_defconfig 
b/configs/am65x_hs_evm_a53_defconfig
index cebfbb93d9..8376a6be3d 100644
--- a/configs/am65x_hs_evm_a53_defconfig
+++ b/configs/am65x_hs_evm_a53_defconfig
@@ -57,6 +57,8 @@ CONFIG_CLK_TI_SCI=y
 CONFIG_DMA_CHANNELS=y
 CONFIG_TI_K3_NAVSS_UDMA=y
 CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_SYS_I2C_OMAP24XX=y
-- 
2.17.1

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[U-Boot] [PATCH 02/18] arm: omap_i2c: Remove unwanted header file inclusion

2019-05-08 Thread Andreas Dannenberg
From: Vignesh R 

There is no need for to include this header here, so drop it.

Signed-off-by: Vignesh R 
---
 arch/arm/include/asm/omap_i2c.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/include/asm/omap_i2c.h b/arch/arm/include/asm/omap_i2c.h
index c1695cbbee..a6975401da 100644
--- a/arch/arm/include/asm/omap_i2c.h
+++ b/arch/arm/include/asm/omap_i2c.h
@@ -3,8 +3,6 @@
 #ifndef _OMAP_I2C_H
 #define _OMAP_I2C_H
 
-#include 
-
 #ifdef CONFIG_DM_I2C
 
 /* Information about a GPIO bank */
-- 
2.17.1

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[U-Boot] [PATCH 1/1] efi_loader: observe CONFIG_EFI_LOADER_HII

2019-05-08 Thread Heinrich Schuchardt
If EFI_LOADER_HII is not set, do not unnecessarily compile files for HII
protocols.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 4e90a35896..e6bbe43154 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -24,7 +24,7 @@ obj-y += efi_device_path.o
 obj-y += efi_device_path_to_text.o
 obj-y += efi_device_path_utilities.o
 obj-y += efi_file.o
-obj-y += efi_hii.o efi_hii_config.o
+obj-$(CONFIG_EFI_LOADER_HII) += efi_hii.o efi_hii_config.o
 obj-y += efi_image_loader.o
 obj-y += efi_memory.o
 obj-y += efi_root_node.o
--
2.20.1

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