[U-Boot] [RESEND PATCH v2 01/13] davinci: remove CONFIG_DM_I2C_COMPAT from defconfigs
From: Bartosz Golaszewski This option is no longer used on any davinci board but still selected in defconfigs which causes the following warning: = WARNING == This board uses CONFIG_DM_I2C_COMPAT. Please remove (possibly in a subsequent patch in your series) before sending patches to the mailing list. Remove all references to CONFIG_DM_I2C_COMPAT from davinci. Signed-off-by: Bartosz Golaszewski Acked-by: Heiko Schocher --- configs/da850_am18xxevm_defconfig | 1 - configs/omapl138_lcdk_defconfig | 1 - include/configs/am3517_evm.h | 1 - include/configs/omapl138_lcdk.h | 8 4 files changed, 11 deletions(-) diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index f7054b4a1e..bc6199822e 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -43,7 +43,6 @@ CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y -CONFIG_DM_I2C_COMPAT=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_MTD_DEVICE=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 466ae860cd..b5d41bd3f6 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -36,7 +36,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_DM_I2C=y -CONFIG_DM_I2C_COMPAT=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_DM_MMC=y CONFIG_NAND=y diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 2e8481890f..c2c5c1f668 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -14,7 +14,6 @@ #include -#undef CONFIG_DM_I2C_COMPAT #define CONFIG_REVISION_TAG /* Hardware drivers */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index da615e5063..db4a663c53 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -16,14 +16,6 @@ #undef CONFIG_USE_SPIFLASH #undef CONFIG_SYS_USE_NOR -/* -* Disable DM_* for SPL build and can be re-enabled after adding -* DM support in SPL -*/ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_I2C -#undef CONFIG_DM_I2C_COMPAT -#endif /* * SoC Configuration */ -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 05/13] nand: davinci: make davinci_nand_init() static
From: Bartosz Golaszewski
This function is only used within the driver itself. No need
to export it.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/include/asm/ti-common/davinci_nand.h | 2 --
drivers/mtd/nand/raw/davinci_nand.c | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/ti-common/davinci_nand.h
b/arch/arm/include/asm/ti-common/davinci_nand.h
index e26381c7fd..28842c3b15 100644
--- a/arch/arm/include/asm/ti-common/davinci_nand.h
+++ b/arch/arm/include/asm/ti-common/davinci_nand.h
@@ -95,6 +95,4 @@ struct davinci_emif_regs {
#define DAVINCI_ABCR_ASIZE_16BIT 1
#define DAVINCI_ABCR_ASIZE_8BIT0
-void davinci_nand_init(struct nand_chip *nand);
-
#endif
diff --git a/drivers/mtd/nand/raw/davinci_nand.c
b/drivers/mtd/nand/raw/davinci_nand.c
index cfa9b535c8..e1c4498cb9 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -730,7 +730,7 @@ static int nand_davinci_dev_ready(struct mtd_info *mtd)
return __raw_readl(&davinci_emif_regs->nandfsr) & 0x1;
}
-void davinci_nand_init(struct nand_chip *nand)
+static void davinci_nand_init(struct nand_chip *nand)
{
#if defined CONFIG_KEYSTONE_RBL_NAND
int i;
--
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[U-Boot] [RESEND PATCH v2 11/13] davinci: omapl138-lcdk: remove unneeded includes
From: Bartosz Golaszewski There's no SPI on da850-lcdk. Remove unnecessary includes. Signed-off-by: Bartosz Golaszewski --- board/davinci/da8xxevm/omapl138_lcdk.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c index dd11551428..7f8c28b953 100644 --- a/board/davinci/da8xxevm/omapl138_lcdk.c +++ b/board/davinci/da8xxevm/omapl138_lcdk.c @@ -11,8 +11,6 @@ #include #include #include -#include -#include #include #include #include -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 08/13] davinci: da850-evm: enable driver model for NAND
From: Bartosz Golaszewski
Enable the driver-model on da850-evm. We need to add a dummy nand node
to the device tree, as the real nand node is a sub-node of the aemif
device.
On linux the aemif driver populates all its child nodes, but we can't do
it in u-boot currently.
Signed-off-by: Bartosz Golaszewski
Tested-by: Adam Ford #da850-evm
---
arch/arm/dts/da850-evm-u-boot.dtsi| 4
configs/da850evm_defconfig| 1 +
configs/da850evm_direct_nor_defconfig | 1 +
configs/da850evm_nand_defconfig | 1 +
include/configs/da850evm.h| 4
5 files changed, 11 insertions(+)
diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi
b/arch/arm/dts/da850-evm-u-boot.dtsi
index 1683f3472e..d9e8b9926a 100644
--- a/arch/arm/dts/da850-evm-u-boot.dtsi
+++ b/arch/arm/dts/da850-evm-u-boot.dtsi
@@ -10,6 +10,10 @@
soc@1c0 {
u-boot,dm-spl;
};
+
+ nand {
+ compatible = "ti,davinci-nand";
+ };
};
&flash {
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index 99300cb297..7de1d2ffc4 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -52,6 +52,7 @@ CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_DM_MMC=y
+CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
diff --git a/configs/da850evm_direct_nor_defconfig
b/configs/da850evm_direct_nor_defconfig
index dcb4d96d0d..e3c2d13986 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -42,6 +42,7 @@ CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 7065205783..96602e514a 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -49,6 +49,7 @@ CONFIG_DM_GPIO=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
+CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 2dab17afab..ff536131ba 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -174,6 +174,10 @@
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_LOAD
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SYS_NAND_SELF_INIT
+#endif
#endif
/*
--
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[U-Boot] [RESEND PATCH v2 02/13] sandbox: remove CONFIG_DM_I2C_COMPAT from defconfigs
From: Bartosz Golaszewski There are no more "real" users of CONFIG_DM_I2C_COMPAT and we'll soon remove it altogether. Stop building it in sandbox mode. Signed-off-by: Bartosz Golaszewski Acked-by: Heiko Schocher --- Makefile | 2 +- configs/sandbox64_defconfig| 1 - configs/sandbox_defconfig | 1 - configs/sandbox_flattree_defconfig | 1 - configs/sandbox_noblk_defconfig| 1 - configs/sandbox_spl_defconfig | 1 - configs/tools-only_defconfig | 1 - 7 files changed, 1 insertion(+), 7 deletions(-) diff --git a/Makefile b/Makefile index 704579bec1..252525bf0a 100644 --- a/Makefile +++ b/Makefile @@ -936,7 +936,7 @@ ifneq ($(CONFIG_DM_SPI)$(CONFIG_OF_CONTROL),yy) endif endif endif -ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) +ifeq ($(CONFIG_DM_I2C_COMPAT),y) @echo >&2 "= WARNING ==" @echo >&2 "This board uses CONFIG_DM_I2C_COMPAT. Please remove" @echo >&2 "(possibly in a subsequent patch in your series)" diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 827b8761cd..c177ff8ad5 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -89,7 +89,6 @@ CONFIG_BOARD=y CONFIG_BOARD_SANDBOX=y CONFIG_PM8916_GPIO=y CONFIG_SANDBOX_GPIO=y -CONFIG_DM_I2C_COMPAT=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 62594e3c21..aa09c4571a 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -107,7 +107,6 @@ CONFIG_PM8916_GPIO=y CONFIG_SANDBOX_GPIO=y CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_SANDBOX=y -CONFIG_DM_I2C_COMPAT=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 2429ae4621..a70793b7ad 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -75,7 +75,6 @@ CONFIG_BOARD=y CONFIG_BOARD_SANDBOX=y CONFIG_PM8916_GPIO=y CONFIG_SANDBOX_GPIO=y -CONFIG_DM_I2C_COMPAT=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig index da9229fc79..381bad2003 100644 --- a/configs/sandbox_noblk_defconfig +++ b/configs/sandbox_noblk_defconfig @@ -81,7 +81,6 @@ CONFIG_BOARD=y CONFIG_BOARD_SANDBOX=y CONFIG_PM8916_GPIO=y CONFIG_SANDBOX_GPIO=y -CONFIG_DM_I2C_COMPAT=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 27034cfaa9..c40a79cc73 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -95,7 +95,6 @@ CONFIG_BOARD=y CONFIG_BOARD_SANDBOX=y CONFIG_PM8916_GPIO=y CONFIG_SANDBOX_GPIO=y -CONFIG_DM_I2C_COMPAT=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index aa73661a92..4808b49850 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -12,7 +12,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_IP_DEFRAG=y # CONFIG_UDP_FUNCTION_FASTBOOT is not set CONFIG_SANDBOX_GPIO=y -CONFIG_DM_I2C_COMPAT=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_PCI_SANDBOX=y -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 09/13] davinci: omapl138-lcdk: enable SPL_SYS_MALLOC_SIMPLE
From: Bartosz Golaszewski We're working towards enabling the driver model in SPL for da850-lcdk. Enable SPL_SYS_MALLOC_SIMPLE in defconfig to reduce SPL size. Signed-off-by: Bartosz Golaszewski --- configs/omapl138_lcdk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index fa4ce692ff..bfb88e397a 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -18,6 +18,7 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_TEXT_BASE=0x8000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 04/13] omapl138_lcdk_defconfig: don't build support for SPI
From: Bartosz Golaszewski The following warning is emited when building u-boot for da850-lcdk: = WARNING == This board does not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. = WARNING == This board does not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. While we could fix it by selecting CONFIG_DM_SPI, there's no need to build it at all as SPI is disabled on da850-lcdk. Remove all unneeded options from the defconfig. Signed-off-by: Bartosz Golaszewski Acked-by: Heiko Schocher --- configs/omapl138_lcdk_defconfig | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index b5d41bd3f6..7752308564 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -26,6 +26,7 @@ CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set CONFIG_CMD_NAND=y +# CONFIG_CMD_SPI is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MTDPARTS=y CONFIG_CMD_DIAG=y @@ -44,14 +45,9 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000 CONFIG_SPL_NAND_SIMPLE=y -CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=3000 -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_DAVINCI_SPI=y -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 12/13] davinci: omapl138-lcdk: enable driver-model in SPL
From: Bartosz Golaszewski
Enable CONFIG_SPL_DM and enable the driver model for serial by defining
an appropriate device in the board file for da850-lcdk.
Signed-off-by: Bartosz Golaszewski
---
board/davinci/da8xxevm/omapl138_lcdk.c | 16
configs/omapl138_lcdk_defconfig| 5 +
2 files changed, 21 insertions(+)
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c
b/board/davinci/da8xxevm/omapl138_lcdk.c
index 7f8c28b953..578d928443 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -14,6 +14,8 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -355,3 +357,17 @@ int board_mmc_init(bd_t *bis)
}
#endif
#endif
+
+#ifdef CONFIG_SPL_BUILD
+static const struct ns16550_platdata serial_pdata = {
+ .base = DAVINCI_UART2_BASE,
+ .reg_shift = 2,
+ .clock = 22800,
+ .fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(omapl138_uart) = {
+ .name = "ns16550_serial",
+ .platdata = &serial_pdata,
+};
+#endif
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index c4eebb3612..26b4950f8f 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -33,10 +33,13 @@ CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk"
+CONFIG_SPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
+CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_DM_MMC=y
@@ -51,6 +54,8 @@ CONFIG_SF_DEFAULT_SPEED=3000
CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_DRIVER_TI_EMAC=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_USE_TINY_PRINTF=y
+# CONFIG_SPL_OF_LIBFDT is not set
--
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[U-Boot] [RESEND PATCH v2 06/13] nand: davinci: add support for driver model
From: Bartosz Golaszewski
Extend the davinci NAND driver to support the driver model. For now this
doesn't add any device-tree parsing due to the fact that we can't access
the actual nand node on the device-tree - it's a subnode of the aemif
device and we don't have an aemif driver on davinci at the moment.
Signed-off-by: Bartosz Golaszewski
---
drivers/mtd/nand/raw/davinci_nand.c | 46 -
1 file changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c
b/drivers/mtd/nand/raw/davinci_nand.c
index e1c4498cb9..33c2f16be8 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -31,6 +31,7 @@
#include
#include
#include
+#include
#include
/* Definitions for 4-bit hardware ECC */
@@ -785,10 +786,53 @@ static void davinci_nand_init(struct nand_chip *nand)
nand->dev_ready = nand_davinci_dev_ready;
}
-int board_nand_init(struct nand_chip *chip) __attribute__((weak));
+#ifdef CONFIG_SYS_NAND_SELF_INIT
+static int davinci_nand_probe(struct udevice *dev)
+{
+ struct nand_chip *nand = dev_get_priv(dev);
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ int ret;
+
+ nand->IO_ADDR_R = (void __iomem *)CONFIG_SYS_NAND_BASE;
+ nand->IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
+
+ davinci_nand_init(nand);
+
+ ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
+ if (ret)
+ return ret;
+
+ return nand_register(0, mtd);
+}
+
+static const struct udevice_id davinci_nand_ids[] = {
+ { .compatible = "ti,davinci-nand" },
+ { }
+};
+
+U_BOOT_DRIVER(davinci_nand) = {
+ .name = "davinci-nand",
+ .id = UCLASS_MTD,
+ .of_match = davinci_nand_ids,
+ .probe = davinci_nand_probe,
+ .priv_auto_alloc_size = sizeof(struct nand_chip),
+};
+
+void board_nand_init(void)
+{
+ struct udevice *dev;
+ int ret;
+ ret = uclass_get_device_by_driver(UCLASS_MTD,
+ DM_GET_DRIVER(davinci_nand), &dev);
+ if (ret && ret != -ENODEV)
+ pr_err("Failed to initialize %s: %d\n", dev->name, ret);
+}
+#else
+int board_nand_init(struct nand_chip *chip) __attribute__((weak));
int board_nand_init(struct nand_chip *chip)
{
davinci_nand_init(chip);
return 0;
}
+#endif /* CONFIG_SYS_NAND_SELF_INIT */
--
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[U-Boot] [RESEND PATCH v2 07/13] davinci: omapl138-lcdk: enable driver model for NAND
From: Bartosz Golaszewski
Enable the driver-model on da850-lcdk. We need to add a dummy nand node
to the device tree, as the real nand node is a sub-node of the aemif
device.
On linux the aemif driver populates all its child nodes, but we can't do
it in u-boot currently.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/dts/da850-lcdk-u-boot.dtsi | 4
configs/omapl138_lcdk_defconfig | 1 +
include/configs/omapl138_lcdk.h | 4
3 files changed, 9 insertions(+)
diff --git a/arch/arm/dts/da850-lcdk-u-boot.dtsi
b/arch/arm/dts/da850-lcdk-u-boot.dtsi
index 80dda8ef58..541f4ca200 100644
--- a/arch/arm/dts/da850-lcdk-u-boot.dtsi
+++ b/arch/arm/dts/da850-lcdk-u-boot.dtsi
@@ -9,4 +9,8 @@
aliases {
i2c0 = &i2c0;
};
+
+ nand {
+ compatible = "ti,davinci-nand";
+ };
};
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 7752308564..fa4ce692ff 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_DM_MMC=y
+CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index db4a663c53..20fd7ff713 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -168,6 +168,10 @@
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_LOAD
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SYS_NAND_SELF_INIT
+#endif
#endif
#ifdef CONFIG_SYS_USE_NOR
--
2.21.0
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[U-Boot] [RESEND PATCH v2 10/13] davinci: omapl138-lcdk: enable CONFIG_USE_TINY_PRINTF
From: Bartosz Golaszewski We're working towards enabling the driver-model in SPL for da850-lcdk. Enable CONFIG_USE_TINY_PRINTF in defconfig to reduce SPL size. Signed-off-by: Bartosz Golaszewski --- configs/omapl138_lcdk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index bfb88e397a..c4eebb3612 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -53,3 +53,4 @@ CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_USE_TINY_PRINTF=y -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 13/13] configs: omapl138_lcdk: enable NAND self-init in SPL
From: Bartosz Golaszewski Now that we have enabled the driver-model in SPL, we can remove the code disabling NAND self-init in SPL from the config include for omapl138-lcdk. Signed-off-by: Bartosz Golaszewski --- include/configs/omapl138_lcdk.h | 4 1 file changed, 4 deletions(-) diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 20fd7ff713..db4a663c53 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -168,10 +168,6 @@ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_NAND_LOAD - -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_NAND_SELF_INIT -#endif #endif #ifdef CONFIG_SYS_USE_NOR -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RESEND PATCH v2 03/13] i2c: remove i2c driver-model compatibility layer
From: Bartosz Golaszewski
There are no more users of the compatibility layer for i2c. Remove the
driver and all references to it.
Signed-off-by: Bartosz Golaszewski
Acked-by: Heiko Schocher
---
Makefile| 7 --
drivers/i2c/Kconfig | 13 +---
drivers/i2c/Makefile| 1 -
drivers/i2c/i2c-uclass-compat.c | 128
include/_exports.h | 3 +-
include/exports.h | 3 +-
include/i2c.h | 80
7 files changed, 3 insertions(+), 232 deletions(-)
delete mode 100644 drivers/i2c/i2c-uclass-compat.c
diff --git a/Makefile b/Makefile
index 252525bf0a..bff5a402a7 100644
--- a/Makefile
+++ b/Makefile
@@ -936,13 +936,6 @@ ifneq ($(CONFIG_DM_SPI)$(CONFIG_OF_CONTROL),yy)
endif
endif
endif
-ifeq ($(CONFIG_DM_I2C_COMPAT),y)
- @echo >&2 "= WARNING =="
- @echo >&2 "This board uses CONFIG_DM_I2C_COMPAT. Please remove"
- @echo >&2 "(possibly in a subsequent patch in your series)"
- @echo >&2 "before sending patches to the mailing list."
- @echo >&2 ""
-endif
ifeq ($(CONFIG_MMC),y)
ifneq ($(CONFIG_DM_MMC)$(CONFIG_OF_CONTROL)$(CONFIG_BLK),yyy)
@echo >&2 "= WARNING =="
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 4772db3837..03d2fed341 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -12,18 +12,7 @@ config DM_I2C
write and speed, is implemented with the bus drivers operations,
which provide methods for bus setting and data transfer. Each chip
device (bus child) info is kept as parent platdata. The interface
- is defined in include/i2c.h. When i2c bus driver supports the i2c
- uclass, but the device drivers not, then DM_I2C_COMPAT config can
- be used as compatibility layer.
-
-config DM_I2C_COMPAT
- bool "Enable I2C compatibility layer"
- depends on DM
- help
- Enable old-style I2C functions for compatibility with existing code.
- This option can be enabled as a temporary measure to avoid needing
- to convert all code for a board in a single commit. It should not
- be enabled for any board in an official release.
+ is defined in include/i2c.h.
config I2C_CROS_EC_TUNNEL
tristate "Chrome OS EC tunnel I2C bus"
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index dc40055efb..c2f75d8755 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -3,7 +3,6 @@
# (C) Copyright 2000-2007
# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
obj-$(CONFIG_DM_I2C) += i2c-uclass.o
-obj-$(CONFIG_DM_I2C_COMPAT) += i2c-uclass-compat.o
obj-$(CONFIG_DM_I2C_GPIO) += i2c-gpio.o
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
diff --git a/drivers/i2c/i2c-uclass-compat.c b/drivers/i2c/i2c-uclass-compat.c
deleted file mode 100644
index b3ade88113..00
--- a/drivers/i2c/i2c-uclass-compat.c
+++ /dev/null
@@ -1,128 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2014 Google, Inc
- */
-
-#include
-#include
-#include
-#include
-
-static int cur_busnum __attribute__((section(".data")));
-
-static int i2c_compat_get_device(uint chip_addr, int alen,
-struct udevice **devp)
-{
- struct dm_i2c_chip *chip;
- int ret;
-
- ret = i2c_get_chip_for_busnum(cur_busnum, chip_addr, alen, devp);
- if (ret)
- return ret;
- chip = dev_get_parent_platdata(*devp);
- if (chip->offset_len != alen) {
- printf("I2C chip %x: requested alen %d does not match chip
offset_len %d\n",
- chip_addr, alen, chip->offset_len);
- return -EADDRNOTAVAIL;
- }
-
- return 0;
-}
-
-int i2c_probe(uint8_t chip_addr)
-{
- struct udevice *bus, *dev;
- int ret;
-
- ret = uclass_get_device_by_seq(UCLASS_I2C, cur_busnum, &bus);
- if (ret) {
- debug("Cannot find I2C bus %d: err=%d\n", cur_busnum, ret);
- return ret;
- }
-
- if (!bus)
- return -ENOENT;
-
- return dm_i2c_probe(bus, chip_addr, 0, &dev);
-}
-
-int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
-int len)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_compat_get_device(chip_addr, alen, &dev);
- if (ret)
- return ret;
-
- return dm_i2c_read(dev, addr, buffer, len);
-}
-
-int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
- int len)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_compat_get_device(chip_addr, alen, &dev);
- if (ret)
- return ret;
-
- return dm_i2c_wri
[U-Boot] Antwort: [PATCH v2] x86: ich-spi: Convert driver to spi-mem ops
Hello Bin,
> Von: "Bin Meng"
> An: "Simon Glass" , "Bernhard Messerklinger"
> , "Vignesh Raghavendra"
> , "U-Boot Mailing List"
> Kopie: "Bernhard Messerklinger"
> Datum: 07/28/2019 01:31 PM
> Betreff: [PATCH v2] x86: ich-spi: Convert driver to spi-mem ops
>
> From: Bernhard Messerklinger
>
> With the introduction of the new spi-mem model operations changed
> slightly. The new spi-mem operations make things a bit easier to
> handle for ich-spi flash interface. This patch converts the ich-spi
> driver by using spi-mem operations.
>
> Signed-off-by: Bernhard Messerklinger automation.com>
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
> [bmeng: make 2 routines static; update commit message a little bit]
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2:
> - make 2 routines static; update commit message a little bit
> +--
> + if (op->data.dir == SPI_MEM_DATA_OUT) {
> + if (op->addr.nbytes ||
> + (!op->addr.nbytes && op->data.nbytes == 3))
> + trans->type = SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS;
> + else
> + trans->type = SPI_OPCODE_TYPE_WRITE_NO_ADDRESS;
> + } else {
> + if (op->addr.nbytes)
> + trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS;
> + else
> + trans->type = SPI_OPCODE_TYPE_READ_NO_ADDRESS;
> + }
> +
> opcode_index = spi_setup_opcode(ctlr, trans, lock);
> if (opcode_index < 0)
>return -EINVAL;
> - with_address = spi_setup_offset(trans);
> - if (with_address < 0)
> - return -EINVAL;
> +
> + /* Handle special case for erase where address is stored in data */
> + if (op->addr.nbytes) {
> + trans->offset = op->addr.val;
> + with_address = 1;
> + } else if (op->data.nbytes == 3 && trans->bytesout) {
> + trans->offset = ((uint32_t)trans->out[0] << 16) |
> +((uint32_t)trans->out[1] << 8) |
> +((uint32_t)trans->out[2] << 0);
> + with_address = 1;
> + trans->bytesout = 0;
> + }
this patch is a bit out of sync with the latest master spi-nor driver.
Commit f909ddb3e1770a5ef18606b46000e0d3eaf63b2e changes the erase
behavior.
I allready fixed this so if desired I could send a v3 for review.
Regards,
Bernhard
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[U-Boot] [PATCH v2 1/3] spl: mmc: support uboot image offset on main partition
On Armada 38x platforms the ROM code loads SPL from offset 0 of eMMC
hardware boot partitions. When there are no boot partitions (i.e. SD
card) the ROM skips the first sector that usually contains the (logical)
partition table. Since the generated .kwb image contains the main U-Boot
image in a fixed location (0x140 sectors by default), we end up with the
main U-Boot image in offset of 1 sector. The current workaround is to
manually set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x141 to
compensate for that.
This patch uses the run-time detected boot partition to determine the
right offset of the main U-Boot partition. The generated .kwb image is
now compatible with both eMMC boot partition, and SD card main data
partition.
Signed-off-by: Baruch Siach
---
v2: Rebase on top of current master
---
common/spl/Kconfig | 12
common/spl/spl_mmc.c | 15 +--
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 5d6da5db89bc..e43eefe046bc 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -293,6 +293,18 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
Address on the MMC to load U-Boot from, when the MMC is being used
in raw mode. Units: MMC sectors (1 sector = 512 bytes).
+config SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET
+ hex "U-Boot main hardware partition image offset"
+ depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
+ default 0x0
+ help
+ On some platforms SPL location depends on hardware partition. The ROM
+ code skips the MBR sector when loading SPL from main hardware data
+ partition. This adds offset to the main U-Boot image. Set this symbol
+ to the number of skipped sectors.
+
+ If unsure, leave the default.
+
config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
bool "MMC Raw mode: by partition"
help
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index b3619889f794..72439c029f4a 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -49,6 +49,16 @@ static ulong h_spl_load_read(struct spl_load_info *load,
ulong sector,
return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf);
}
+static __maybe_unused unsigned long spl_mmc_raw_uboot_offset(int part)
+{
+#if IS_ENABLED(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR)
+ if (part == 0)
+ return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET;
+#endif
+
+ return 0;
+}
+
static __maybe_unused
int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
struct mmc *mmc, unsigned long sector)
@@ -312,7 +322,7 @@ int spl_mmc_load(struct spl_image_info *spl_image,
static struct mmc *mmc;
u32 boot_mode;
int err = 0;
- __maybe_unused int part;
+ __maybe_unused int part = 0;
/* Perform peripheral init only once */
if (!mmc) {
@@ -371,7 +381,8 @@ int spl_mmc_load(struct spl_image_info *spl_image,
return err;
#endif
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
- err = mmc_load_image_raw_sector(spl_image, mmc, raw_sect);
+ err = mmc_load_image_raw_sector(spl_image, mmc,
+ raw_sect + spl_mmc_raw_uboot_offset(part));
if (!err)
return err;
#endif
--
2.20.1
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[U-Boot] [PATCH v2 2/3] arm: mvebu: clearfog: set uboot image SD card offset
Armada 38x ROM skips the first SD card offset when loading SPL. This affects the location of the main U-Boot image. SPL MMC code now supports U-Boot image offset based on run-time detection of the boot partition. Use this feature to make the same generated image support both SD card and eMMC boot partition. Signed-off-by: Baruch Siach --- configs/clearfog_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index b7b886be4f7a..3609445c1e95 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -22,7 +22,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0x4030 -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1 CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -- 2.20.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] arm: mvebu: clearfog: update eMMC documentation
SPL now automatically selects the correct U-Boot image offset for both eMMC and SD card. No need to tweak CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR anymore. Signed-off-by: Baruch Siach --- board/solidrun/clearfog/README | 6 -- 1 file changed, 6 deletions(-) diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README index 6171ce66f4f8..9375be84957a 100644 --- a/board/solidrun/clearfog/README +++ b/board/solidrun/clearfog/README @@ -20,12 +20,6 @@ of "/dev/sdX" here! Install U-Boot on eMMC: --- -The ROM loads the bootloader from eMMC first boot partition at offset 0. This -is unlike load from SD card that is at offset 512. As a result, the offset of -the main U-Boot image on the eMMC boot partition changes. Set -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x140 for SPL to load U-Boot from -the correct location. - To make SPL load the main U-Boot image from the eMMC boot partition enable eMMC boot acknowledgement and boot partition with the following U-Boot command: -- 2.20.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2] x86: ich-spi: Convert driver to spi-mem ops
Hi Bernhard,
On Mon, Jul 29, 2019 at 3:08 PM Bernhard Messerklinger
wrote:
>
> Hello Bin,
>
> > Von: "Bin Meng"
> > An: "Simon Glass" , "Bernhard Messerklinger"
> > , "Vignesh Raghavendra"
> > , "U-Boot Mailing List"
> > Kopie: "Bernhard Messerklinger"
>
> > Datum: 07/28/2019 01:31 PM
> > Betreff: [PATCH v2] x86: ich-spi: Convert driver to spi-mem ops
> >
> > From: Bernhard Messerklinger
> >
> > With the introduction of the new spi-mem model operations changed
> > slightly. The new spi-mem operations make things a bit easier to
> > handle for ich-spi flash interface. This patch converts the ich-spi
> > driver by using spi-mem operations.
> >
> > Signed-off-by: Bernhard Messerklinger > automation.com>
> > Reviewed-by: Bin Meng
> > Tested-by: Bin Meng
> > [bmeng: make 2 routines static; update commit message a little bit]
> > Signed-off-by: Bin Meng
> >
> > ---
> >
> > Changes in v2:
> > - make 2 routines static; update commit message a little bit
> > +--
> > + if (op->data.dir == SPI_MEM_DATA_OUT) {
> > + if (op->addr.nbytes ||
> > + (!op->addr.nbytes && op->data.nbytes == 3))
> > + trans->type = SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS;
> > + else
> > + trans->type = SPI_OPCODE_TYPE_WRITE_NO_ADDRESS;
> > + } else {
> > + if (op->addr.nbytes)
> > + trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS;
> > + else
> > + trans->type = SPI_OPCODE_TYPE_READ_NO_ADDRESS;
> > + }
> > +
> > opcode_index = spi_setup_opcode(ctlr, trans, lock);
> > if (opcode_index < 0)
> >return -EINVAL;
> > - with_address = spi_setup_offset(trans);
> > - if (with_address < 0)
> > - return -EINVAL;
> > +
> > + /* Handle special case for erase where address is stored in data */
> > + if (op->addr.nbytes) {
> > + trans->offset = op->addr.val;
> > + with_address = 1;
> > + } else if (op->data.nbytes == 3 && trans->bytesout) {
> > + trans->offset = ((uint32_t)trans->out[0] << 16) |
> > +((uint32_t)trans->out[1] << 8) |
> > +((uint32_t)trans->out[2] << 0);
> > + with_address = 1;
> > + trans->bytesout = 0;
> > + }
>
> this patch is a bit out of sync with the latest master spi-nor driver.
> Commit f909ddb3e1770a5ef18606b46000e0d3eaf63b2e changes the erase
> behavior.
> I allready fixed this so if desired I could send a v3 for review.
>
Yes, please do so. Thanks!
Regards,
Bin
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[U-Boot] [PATCH] Drop linker-generated array creation when CONFIG_CMDLINE is disabled
From: Andrej Rosano
Linker generated array entry is not needed when the command line is
disabled. Remove this code in that case.
This is required as the commit 80a48dd47e3bf3ede676fae5a630cb6c80de3e69
breaks the linking stage when CONFIG_CMDLINE=n:
..
LDS u-boot.lds
LD u-boot
u-boot contains unexpected relocations: R_ARM_NONE
R_ARM_RELATIVE
make: *** [Makefile:1775: checkarmreloc] Error 1
Signed-off-by: Andrej Rosano
---
cmd/help.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/cmd/help.c b/cmd/help.c
index fa2010c67e..a1a0b99b6f 100644
--- a/cmd/help.c
+++ b/cmd/help.c
@@ -27,6 +27,7 @@ U_BOOT_CMD(
" - print detailed usage of 'command'"
);
+#ifdef CONFIG_CMDLINE
/* This does not use the U_BOOT_CMD macro as ? can't be used in symbol names */
ll_entry_declare(cmd_tbl_t, question_mark, cmd) = {
"?",CONFIG_SYS_MAXARGS, cmd_always_repeatable, do_help,
@@ -35,3 +36,4 @@ ll_entry_declare(cmd_tbl_t, question_mark, cmd) = {
""
#endif /* CONFIG_SYS_LONGHELP */
};
+#endif
--
2.22.0
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[U-Boot] Pull request: u-boot-rockchip u-boot-rockchip-20190729
Hi Tom, Please pull the rockchip update: - Clean up and migrate to use common rockchip spl board file - Clean up and migrate to use common rockchip board file - Increase rk3288 CONFIG_SYS_BOOTM_LEN to 16MB This patch has delayed for two days for I didn't get the correct buildman command locally and have to wait for the error report from Travis which cost a lot of time, I have fix all the error with correct buildman command now and Travis: https://travis-ci.org/keveryang/u-boot/builds/564781004 Thanks, - Kever The following changes since commit bfe9abe7119ce7cde9eb654d17302ebe124c2c84: gitlab-ci: Update Docker image to xenial-20190720-24Jul2019 tag (2019-07-24 16:26:15 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git tags/u-boot-rockchip-20190729 for you to fetch changes up to 26008cd42b590dc71ee9c1ca667a218542aab342: rockchip: rv1108: Migrate to use common board file (2019-07-29 10:27:48 +0800) Kever Yang (59): rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 rockchip: add CONFIG_IRAM_BASE for all SoCs rockchip: intruduce common BROM_BOOTSOURCE_ID_ADDR rockchip: declear boot_devices in bootrom.h rockchip: add common spl board file rockchip: rk3188: init CPU freq in clock driver rockchip: rk3188: move usb uart init into arch_cpu_init() rockchip: Migrate to use BOOTROM_SUPPORT driver rockchip: rk3188: move spl_board_init() into rk3188.c rockchip: rk3188: add boot_devices mapping to support 'same-as-spl' rockchip: rk3188: migrate to use common spl board file rockchip: rk322x: introduce arch_cpu_init() for SoC setting init rockchip: rk322x: migrate to use common spl board file rockchip: rk322x: add boot_devices mapping to support 'same-as-spl' rockchip: fit_spl_optee: rockchip: fix warning unit_address_vs_reg rockchip: rk3288: show SPL BANNER earlier in board_init_f() rockchip: rk3288: move setup_led() to firefly-rk3288 rockchip: rk3288-phycore: move phycore_init() to its own board file rockchip: rk3288: move dram_init_banksize() into soc file rockchip: rk3288: Migrate to use common spl board file rockchip: phycore: remove no use "u-boot, boot0" in dts rockchip: rk3288-veyron: Migrate "u-boot, boot0" to "u-boot, spl-boot-order" rockchip: rk3288: add boot_devices mapping to support 'same-as-spl' rockchip: rk3328: add STIMER_BASE definition rockchip: rk3328: migrate to use common spl board file rockchip: rk3328: add boot_devices mapping to support 'same-as-spl' rockchip: rk3368: migrate to use common spl board file rockchip: rk3368: add boot_devices mapping to support 'same-as-spl' rockchip: rk3399: move spl_perform_fixups() into soc file rockchip: rk3399: show SPL BANNER earlier in board_init_f() rockchip: rk3399: move SoC setting into arch_cpu_init() rockchip: rk3399; move spl_board_init() into soc file rockchip: rk3399: move boot_devices into soc file rockchip: rk3399: move chromebook bob specific flow to its board file rockchip: rk3399: Migrate to use common spl board file rockchip: rk3328: add board_debug_uart_init() rockchip: convert to use ROCKCHIP_BOOT_MODE_REG for fastboot tag rockchip: clean up board_usb_init() for all SoCs rockchip: add common board file for U-Boot proper rockchip: sdram_common: add common dram_init_banksize rockchip: rk3036: move dram_init() into soc file rockchip: rk3036: Migrate to use common board file rockchip: rk3128: Migrate to use common board file rockchip: rk322x: move SoC setting into arch_cpu_init() rockchip: rk322x: Migrate to use common board file rockchip: rk3188: Move SoC one time setting into arch_cpu_init() rockchip: rk3188: Migrate to use common board file rockchip: rk3288: move SOC setting into arch_cpu_init() rockchip: rk3288: move board_early_init_f() back to veyron rockchip: rk3288: Move veyron_init() back to veyron.c rockchip: rk3288: Move clock CMD to SoC file rockchip: rk3288: Move rk3288_detect_reset_reason to soc file rockchip: rk3288: Migrate to use common board file rockchip: rk3328: Migrate to use common board file rockchip: rk3368: Migrate to use common board file rockchip: rk3399: init vbus regulator in board_early_init_f() rockchip: rk3399: Migrate to use common board file rockchip: elgin-rv1108: use board_early_init_f for per-boar init rockchip: rv1108: Migrate to use common board file Shyam Saini (1): include: configs: Increase CONFIG_SYS_BOOTM_LEN to 16MB arch/arm/dts/rk3288-phycore-rdk.dts| 5 - arch/arm/dts/rk3288-veyron.dtsi
[U-Boot] [PATCH 00/15] rk3399: Add redundant boot support
Boot redundancy is one of the key criteria for switch recovery or golden partition based on the bootcount value, which indeed very much needed in production systems on the fields. This patchset support redundant boot on Rockchip rk3399. To make full functional redundancy below features would require from U-Boot level. - bootcount, for counting number reboots - altboot - watchdog support, if SPL or U-Boot reset because of WDT - add CPUINFO for more understanding about how SoC and reset reason. patch 0001 - 0005: cpu info, reset reason patch 0006 - 0009: designware watchdog driver, dm-conversion patch 0010: Add watchdog property available to SPL patch 0011: Add Kconfig option for dw_wdt.c patch 0012: Disable watchdog for TPL patch 0013: enable watchdog on rockpro64, overlay patch 0014: bootcount support patch 0015: enable bootcount on rockpro64, overlay I would like, not to merge watchdog and bootcount on Mainline devboards since these features will mostly required on production devices but any comments, please share. Any inputs? Jagan. Jagan Teki (15): arm: rockchip: Add common cru.h rockchip: Add cpu-info rockchip: rk3288: Print reset reason rockchip: Add common reset reason rockchip: rk3288/rk3399: Enable DISPLAY_CPUINFO wdt: designware: Simplify is_enabled function wdt: designware: Simplify enable function wdt: dw: Add driver-model support wdt: dw: Rename to dw_wdt.c rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for watchdog wdt: Kconfig: Add WDT_DW entry include: rk3399: Disable watchdog in TPL [DO NOT MERGE] rk3399: rockpro64: Enable watchdog rockchip: rk3399: Add bootcount support [DO NOT MERGE] rk3399: rockpro64: Enable bootcount arch/arm/dts/rk3399-u-boot.dtsi | 6 + arch/arm/include/asm/arch-rockchip/cru.h | 28 +++ .../include/asm/arch-rockchip/cru_rk3288.h| 14 +- arch/arm/mach-rockchip/Kconfig| 2 + arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/cpu-info.c | 65 +++ arch/arm/mach-rockchip/rk3288-board.c | 39 arch/arm/mach-rockchip/rk3288/clk_rk3288.c| 2 +- arch/arm/mach-rockchip/rk3399-board-spl.c | 2 +- arch/arm/mach-rockchip/rk3399/Kconfig | 10 + arch/arm/mach-rockchip/rk3399/clk_rk3399.c| 2 +- common/board_f.c | 2 +- configs/evb-rk3288_defconfig | 1 - configs/evb-rk3399_defconfig | 1 - configs/fennec-rk3288_defconfig | 1 - configs/ficus-rk3399_defconfig| 1 - configs/firefly-rk3288_defconfig | 1 - configs/firefly-rk3399_defconfig | 1 - configs/miqi-rk3288_defconfig | 1 - configs/nanopc-t4-rk3399_defconfig| 1 - configs/nanopi-m4-rk3399_defconfig| 1 - configs/nanopi-neo4-rk3399_defconfig | 1 - configs/orangepi-rk3399_defconfig | 1 - configs/phycore-rk3288_defconfig | 1 - configs/popmetal-rk3288_defconfig | 1 - configs/puma-rk3399_defconfig | 1 - configs/rock-pi-4-rk3399_defconfig| 1 - configs/rock960-rk3399_defconfig | 1 - configs/rockpro64-rk3399_defconfig| 4 +- configs/tinker-rk3288_defconfig | 1 - configs/vyasa-rk3288_defconfig| 1 - drivers/clk/rockchip/clk_rk3288.c | 2 +- drivers/clk/rockchip/clk_rk3399.c | 2 +- drivers/ram/rockchip/sdram_rk3288.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 2 +- drivers/video/rockchip/rk3288_mipi.c | 2 +- drivers/video/rockchip/rk3399_mipi.c | 2 +- drivers/video/rockchip/rk_mipi.c | 2 +- drivers/watchdog/Kconfig | 9 + drivers/watchdog/Makefile | 2 +- drivers/watchdog/designware_wdt.c | 73 --- drivers/watchdog/dw_wdt.c | 184 ++ include/configs/rk3399_common.h | 10 +- include/configs/socfpga_common.h | 2 +- include/configs/socfpga_stratix10_socdk.h | 2 +- scripts/config_whitelist.txt | 1 - 46 files changed, 332 insertions(+), 160 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/cru.h create mode 100644 arch/arm/mach-rockchip/cpu-info.c delete mode 100644 drivers/watchdog/designware_wdt.c create mode 100644 drivers/watchdog/dw_wdt.c -- 2.18.0.321.gffc6fa0e3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 01/15] arm: rockchip: Add common cru.h
Few of the rockchip family SoC atleast rk3288,
rk3399 are sharing some cru register bits so
adding common code between these SoC families
would require to include both cru include files
that indeed resulting function declarations error.
So, create a common cru include as cru.h then
include the arch cru include file and move the
common cru register bit definitions into it.
Signed-off-by: Jagan Teki
---
arch/arm/include/asm/arch-rockchip/cru.h | 16
arch/arm/mach-rockchip/rk3288-board.c | 2 +-
arch/arm/mach-rockchip/rk3288/clk_rk3288.c | 2 +-
arch/arm/mach-rockchip/rk3399-board-spl.c | 2 +-
arch/arm/mach-rockchip/rk3399/clk_rk3399.c | 2 +-
drivers/clk/rockchip/clk_rk3288.c | 2 +-
drivers/clk/rockchip/clk_rk3399.c | 2 +-
drivers/ram/rockchip/sdram_rk3288.c| 2 +-
drivers/ram/rockchip/sdram_rk3399.c| 2 +-
drivers/video/rockchip/rk3288_mipi.c | 2 +-
drivers/video/rockchip/rk3399_mipi.c | 2 +-
drivers/video/rockchip/rk_mipi.c | 2 +-
12 files changed, 27 insertions(+), 11 deletions(-)
create mode 100644 arch/arm/include/asm/arch-rockchip/cru.h
diff --git a/arch/arm/include/asm/arch-rockchip/cru.h
b/arch/arm/include/asm/arch-rockchip/cru.h
new file mode 100644
index 00..3b1a3bae71
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru.h
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2019 Amarula Solutions.
+ * Author: Jagan Teki
+ */
+
+#ifndef _ROCKCHIP_CLOCK_H
+#define _ROCKCHIP_CLOCK_H
+
+#if defined(CONFIG_ROCKCHIP_RK3288)
+# include
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+# include
+#endif
+
+#endif /* _ROCKCHIP_CLOCK_H */
diff --git a/arch/arm/mach-rockchip/rk3288-board.c
b/arch/arm/mach-rockchip/rk3288-board.c
index a250d50387..d3ec141fea 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -10,7 +10,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
index e64ee86f08..1730f12443 100644
--- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
@@ -8,7 +8,7 @@
#include
#include
#include
-#include
+#include
int rockchip_get_clk(struct udevice **devp)
{
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c
b/arch/arm/mach-rockchip/rk3399-board-spl.c
index 7154d8e5d0..5642c7f523 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -15,7 +15,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
index f0411c0a21..a80a46f1db 100644
--- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
@@ -8,7 +8,7 @@
#include
#include
#include
-#include
+#include
static int rockchip_get_cruclk(struct udevice **devp)
{
diff --git a/drivers/clk/rockchip/clk_rk3288.c
b/drivers/clk/rockchip/clk_rk3288.c
index 375d7f8acb..b05becd3d0 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -14,7 +14,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/clk/rockchip/clk_rk3399.c
b/drivers/clk/rockchip/clk_rk3399.c
index d9950c159b..37a82788c6 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -14,7 +14,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/ram/rockchip/sdram_rk3288.c
b/drivers/ram/rockchip/sdram_rk3288.c
index 6bb025a851..48b479d82b 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -16,7 +16,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/ram/rockchip/sdram_rk3399.c
b/drivers/ram/rockchip/sdram_rk3399.c
index 81fc71c051..0801faf7a1 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -14,7 +14,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/video/rockchip/rk3288_mipi.c
b/drivers/video/rockchip/rk3288_mipi.c
index 7c4a4cc53b..65891ce45c 100644
--- a/drivers/video/rockchip/rk3288_mipi.c
+++ b/drivers/video/rockchip/rk3288_mipi.c
@@ -18,7 +18,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/video/rockchip/rk3399_mipi.c
b/drivers/video/rockchip/rk3399_mipi.c
index a93b73400b..a5b7ba69a8 100644
--- a/drivers/video/rockchip/rk3399_mipi.c
+++ b/drivers/video/rockchip/rk3399_mipi.c
@@ -18,7 +18,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/video/roc
[U-Boot] [PATCH 04/15] rockchip: Add common reset reason
Right now the reset reason supported by rk3288
and which is printing on board late function.
Support the same reset reason for rk3399 as well,
since it is sharing same cru register mark the
code into common area.
Printing reset reason below SoC information would
really help instead of printing in board late call,
so support this as part of cpu_info.
Cc: Wadim Egorov
Signed-off-by: Jagan Teki
---
arch/arm/include/asm/arch-rockchip/cru.h | 12 ++
.../include/asm/arch-rockchip/cru_rk3288.h| 14 +--
arch/arm/mach-rockchip/cpu-info.c | 41 +++
arch/arm/mach-rockchip/rk3288-board.c | 39 --
4 files changed, 54 insertions(+), 52 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/cru.h
b/arch/arm/include/asm/arch-rockchip/cru.h
index 3b1a3bae71..b54e21d6f1 100644
--- a/arch/arm/include/asm/arch-rockchip/cru.h
+++ b/arch/arm/include/asm/arch-rockchip/cru.h
@@ -13,4 +13,16 @@
# include
#endif
+/* CRU_GLB_RST_ST */
+enum {
+ GLB_POR_RST,
+ FST_GLB_RST_ST = BIT(0),
+ SND_GLB_RST_ST = BIT(1),
+ FST_GLB_TSADC_RST_ST= BIT(2),
+ SND_GLB_TSADC_RST_ST= BIT(3),
+ FST_GLB_WDT_RST_ST = BIT(4),
+ SND_GLB_WDT_RST_ST = BIT(5),
+ GLB_RST_ST_MASK = GENMASK(5, 0),
+};
+
#endif /* _ROCKCHIP_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index e891f20b37..7acb1c7208 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -51,7 +51,7 @@ struct rk3288_cru {
u32 cru_glb_cnt_th;
u32 cru_glb_rst_con;
u32 reserved3;
- u32 cru_glb_rst_st;
+ u32 glb_rst_st;
u32 reserved4;
u32 cru_sdmmc_con[2];
u32 cru_sdio0_con[2];
@@ -227,16 +227,4 @@ enum {
CLKF_MASK = 0x1fff << CLKF_SHIFT,
};
-/* CRU_GLB_RST_ST */
-enum {
- GLB_POR_RST,
- FST_GLB_RST_ST = BIT(0),
- SND_GLB_RST_ST = BIT(1),
- FST_GLB_TSADC_RST_ST= BIT(2),
- SND_GLB_TSADC_RST_ST= BIT(3),
- FST_GLB_WDT_RST_ST = BIT(4),
- SND_GLB_WDT_RST_ST = BIT(5),
- GLB_RST_ST_MASK = GENMASK(5, 0),
-};
-
#endif
diff --git a/arch/arm/mach-rockchip/cpu-info.c
b/arch/arm/mach-rockchip/cpu-info.c
index 088fc806a6..8e56999b05 100644
--- a/arch/arm/mach-rockchip/cpu-info.c
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -5,6 +5,38 @@
*/
#include
+#include
+#include
+#include
+#include
+#include
+
+static char *rockchip_reset_reason(unsigned int glb_rst_st)
+{
+ char *reason;
+
+ switch (glb_rst_st) {
+ case GLB_POR_RST:
+ reason = "POR";
+ break;
+ case FST_GLB_RST_ST:
+ case SND_GLB_RST_ST:
+ reason = "RST";
+ break;
+ case FST_GLB_TSADC_RST_ST:
+ case SND_GLB_TSADC_RST_ST:
+ reason = "THERMAL";
+ break;
+ case FST_GLB_WDT_RST_ST:
+ case SND_GLB_WDT_RST_ST:
+ reason = "WDOG";
+ break;
+ default:
+ reason = "unknown reset";
+}
+
+ return reason;
+}
int print_cpuinfo(void)
{
@@ -13,12 +45,21 @@ int print_cpuinfo(void)
/* TODO print operating temparature and clock */
# ifdef CONFIG_ROCKCHIP_RK3288
puts("RK3288\n");
+ struct rk3288_cru *cru = rockchip_get_cru();
# elif CONFIG_ROCKCHIP_RK3399
puts("RK3399\n");
+ struct rk3399_cru *cru = rockchip_get_cru();
# else
# warning Please update cpu.c with correct CPU information
puts("Family\n");
# endif
+ if (IS_ERR(cru))
+ return -EINVAL;
+
+ printf("Reset cause: %s\n", rockchip_reset_reason(cru->glb_rst_st));
+
+ rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK);
+
return 0;
}
diff --git a/arch/arm/mach-rockchip/rk3288-board.c
b/arch/arm/mach-rockchip/rk3288-board.c
index 613264d7ee..3e5cd9bad9 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -10,7 +10,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -44,48 +43,10 @@ int rk3288_qos_init(void)
return 0;
}
-static void rk3288_detect_reset_reason(void)
-{
- struct rk3288_cru *cru = rockchip_get_cru();
- const char *reason;
-
- if (IS_ERR(cru))
- return;
-
- switch (cru->cru_glb_rst_st) {
- case GLB_POR_RST:
- reason = "POR";
- break;
- case FST_GLB_RST_ST:
- case SND_GLB_RST_ST:
- reason = "RST";
- break;
- case FST_GLB_TSADC_RST_ST:
- case SND_GLB_TSADC_RST_ST:
- reason = "THERMAL";
- break;
- case FST_GLB_WDT_RST_ST:
- case SND_GLB_WDT_RST_ST:
- reason = "WDOG";
-
[U-Boot] [PATCH 06/15] wdt: designware: Simplify is_enabled function
Right now the designware is_enabled function is using
numeric number to check whether watchdog is enabled or
not, so use register macro and check the same.
Cc: Chin Liang See
Cc: Andy Shevchenko
Signed-off-by: Jagan Teki
---
drivers/watchdog/designware_wdt.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/watchdog/designware_wdt.c
b/drivers/watchdog/designware_wdt.c
index c668567c66..bd858f0608 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -45,9 +45,7 @@ static void designware_wdt_enable(void)
static unsigned int designware_wdt_is_enabled(void)
{
- unsigned long val;
- val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR));
- return val & 0x1;
+ return readl(CONFIG_DW_WDT_BASE + DW_WDT_CR) & DW_WDT_CR_RMOD_OFFSET;
}
#if defined(CONFIG_HW_WATCHDOG)
--
2.18.0.321.gffc6fa0e3
___
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[U-Boot] [PATCH 12/15] include: rk3399: Disable watchdog in TPL
Disable watchdog for TPL, since there is no support it. Signed-off-by: Jagan Teki --- include/configs/rk3399_common.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 8df0180284..67b48e03ba 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -46,6 +46,11 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf800 +#ifdef CONFIG_TPL_BUILD +# undef CONFIG_WDT +# undef CONFIG_WATCHDOG +#endif + #ifndef CONFIG_SPL_BUILD #define ENV_MEM_LAYOUT_SETTINGS \ -- 2.18.0.321.gffc6fa0e3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 05/15] rockchip: rk3288/rk3399: Enable DISPLAY_CPUINFO
RK3288 and Rk3399 are now support cpu-info, so enable them by default. Signed-off-by: Jagan Teki --- configs/evb-rk3288_defconfig | 1 - configs/evb-rk3399_defconfig | 1 - configs/fennec-rk3288_defconfig | 1 - configs/ficus-rk3399_defconfig | 1 - configs/firefly-rk3288_defconfig | 1 - configs/firefly-rk3399_defconfig | 1 - configs/miqi-rk3288_defconfig| 1 - configs/nanopc-t4-rk3399_defconfig | 1 - configs/nanopi-m4-rk3399_defconfig | 1 - configs/nanopi-neo4-rk3399_defconfig | 1 - configs/orangepi-rk3399_defconfig| 1 - configs/phycore-rk3288_defconfig | 1 - configs/popmetal-rk3288_defconfig| 1 - configs/puma-rk3399_defconfig| 1 - configs/rock-pi-4-rk3399_defconfig | 1 - configs/rock960-rk3399_defconfig | 1 - configs/rockpro64-rk3399_defconfig | 1 - configs/tinker-rk3288_defconfig | 1 - configs/vyasa-rk3288_defconfig | 1 - 19 files changed, 19 deletions(-) diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index a6df143276..28b3e392ec 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -11,7 +11,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0 CONFIG_CMD_GPIO=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 764d32f259..3c48053480 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1 diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index 16d8fb155c..21ff5a0efc 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DEFAULT_FDT_FILE="rk3288-fennec.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index d1425dc3d0..a146b0ced0 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL_STACK_R_ADDR=0x8 CONFIG_DEBUG_UART_BASE=0xFF1A CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_DEBUG_UART=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_SPL_STACK_R=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 8abe8a648a..081744dc39 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 9f05f33ddd..71f8e56669 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1 diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index c9a35115fb..42f27b0ba8 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index bca4f08966..2d437f4d86 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1 diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index dd2065df5f..18cc9a4482 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A CONFIG_DEBUG_UART_CLOCK=2400 CON
[U-Boot] [PATCH 03/15] rockchip: rk3288: Print reset reason
Print the reason for reset instead of storing it into
env variable in rk3288.
This would help to find the reset reason directly
on U-Boot proper logs.
Cc: Wadim Egorov
Signed-off-by: Jagan Teki
---
arch/arm/mach-rockchip/rk3288-board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board.c
b/arch/arm/mach-rockchip/rk3288-board.c
index d3ec141fea..613264d7ee 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -72,7 +72,7 @@ static void rk3288_detect_reset_reason(void)
reason = "unknown reset";
}
- env_set("reset_reason", reason);
+ printf("Reset cause: %s\n", reason);
/*
* Clear cru_glb_rst_st, so we can determine the last reset cause
--
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[U-Boot] [PATCH 02/15] rockchip: Add cpu-info
Add cpu information for rockchip soc.
This would help to print the SoC family number, with
associated temparature, clock and reason for reset etc.
Signed-off-by: Jagan Teki
---
arch/arm/mach-rockchip/Makefile | 1 +
arch/arm/mach-rockchip/cpu-info.c | 24
2 files changed, 25 insertions(+)
create mode 100644 arch/arm/mach-rockchip/cpu-info.c
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index a12b8d4434..655b3e3e1a 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -25,6 +25,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
# we can have the preprocessor correctly recognise both 0x0 and 0
# meaning "turn it off".
obj-y += boot_mode.o
+obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
diff --git a/arch/arm/mach-rockchip/cpu-info.c
b/arch/arm/mach-rockchip/cpu-info.c
new file mode 100644
index 00..088fc806a6
--- /dev/null
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2019 Amarula Solutions.
+ * Author: Jagan Teki
+ */
+
+#include
+
+int print_cpuinfo(void)
+{
+ puts("SoC: Rockchip ");
+
+ /* TODO print operating temparature and clock */
+# ifdef CONFIG_ROCKCHIP_RK3288
+ puts("RK3288\n");
+# elif CONFIG_ROCKCHIP_RK3399
+ puts("RK3399\n");
+# else
+# warning Please update cpu.c with correct CPU information
+ puts("Family\n");
+# endif
+
+ return 0;
+}
--
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[U-Boot] [DO NOT MERGE] [PATCH 13/15] rk3399: rockpro64: Enable watchdog
Enable watchdog in SPL and U-Boot proper for Rockpro64. Signed-off-by: Jagan Teki --- configs/rockpro64-rk3399_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 32d8415b23..f604ccc1ec 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -55,3 +55,5 @@ CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USE_TINY_PRINTF=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y +CONFIG_WDT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y -- 2.18.0.321.gffc6fa0e3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 11/15] wdt: Kconfig: Add WDT_DW entry
Add Kconfig entry for CONFIG_WDT_DW, and it indeed depends on DM WDT. So, it can be avialable on particular board defconfig only if they switch to use DW driver model code. Signed-off-by: Jagan Teki --- drivers/watchdog/Kconfig | 9 + scripts/config_whitelist.txt | 1 - 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index ee0ddffe73..0b64298016 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -100,6 +100,15 @@ config WDT_CDNS Select this to enable Cadence watchdog timer, which can be found on some Xilinx Microzed Platform. +config WDT_DW + bool "Synopsys DesignWare watchdog" + depends on WDT + default y if ROCKCHIP_RK3399 + imply WATCHDOG + help + Say Y here if to include support for the Synopsys DesignWare + watchdog timer found in many chips. + config WDT_MPC8xx bool "MPC8xx watchdog timer support" depends on WDT && MPC8xx diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f2453728c6..47e42e680a 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -323,7 +323,6 @@ CONFIG_DEFAULT_IMMR CONFIG_DEF_HWCONFIG CONFIG_DELAY_ENVIRONMENT CONFIG_DESIGNWARE_ETH -CONFIG_WDT_DW CONFIG_DEVELOP CONFIG_DEVICE_TREE_LIST CONFIG_DFU_ALT -- 2.18.0.321.gffc6fa0e3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 09/15] wdt: dw: Rename to dw_wdt.c
- use dw instead of designware for driver file since
Linux following the same.
- add CONFIG macro start with CONFIG_WDT since the
driver mode wdt drivers follow this.
Cc: Dinh Nguyen
Cc: Chin-Liang See
Signed-off-by: Jagan Teki
---
common/board_f.c| 2 +-
drivers/watchdog/Makefile | 2 +-
drivers/watchdog/{designware_wdt.c => dw_wdt.c} | 0
include/configs/socfpga_common.h| 2 +-
include/configs/socfpga_stratix10_socdk.h | 2 +-
scripts/config_whitelist.txt| 2 +-
6 files changed, 5 insertions(+), 5 deletions(-)
rename drivers/watchdog/{designware_wdt.c => dw_wdt.c} (100%)
diff --git a/common/board_f.c b/common/board_f.c
index 4760d728f3..79efef0792 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -95,7 +95,7 @@ static int init_func_watchdog_init(void)
# if defined(CONFIG_HW_WATCHDOG) && \
(defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
defined(CONFIG_SH) || \
- defined(CONFIG_DESIGNWARE_WATCHDOG) || \
+ defined(CONFIG_WDT_DW) || \
defined(CONFIG_IMX_WATCHDOG))
hw_watchdog_init();
puts(" Watchdog enabled\n");
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 68c989aa0b..a14fdabf8d 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -13,7 +13,6 @@ endif
obj-$(CONFIG_S5P) += s5p_wdt.o
obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
-obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
obj-$(CONFIG_WDT) += wdt-uclass.o
obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
@@ -23,6 +22,7 @@ obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o
obj-$(CONFIG_BCM2835_WDT) += bcm2835_wdt.o
obj-$(CONFIG_WDT_ORION) += orion_wdt.o
obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
+obj-$(CONFIG_WDT_DW) += dw_wdt.o
obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
obj-$(CONFIG_WDT_MTK) += mtk_wdt.o
diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/dw_wdt.c
similarity index 100%
rename from drivers/watchdog/designware_wdt.c
rename to drivers/watchdog/dw_wdt.c
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index d1034ac280..65f02eca2e 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -105,7 +105,7 @@
* L4 Watchdog
*/
#ifdef CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_WDT_DW
#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
#define CONFIG_DW_WDT_CLOCK_KHZ25000
#define CONFIG_WATCHDOG_TIMEOUT_MSECS 3
diff --git a/include/configs/socfpga_stratix10_socdk.h
b/include/configs/socfpga_stratix10_socdk.h
index 8d2971c6e2..3582aec822 100644
--- a/include/configs/socfpga_stratix10_socdk.h
+++ b/include/configs/socfpga_stratix10_socdk.h
@@ -161,7 +161,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
*/
#ifdef CONFIG_SPL_BUILD
#define CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_WDT_DW
#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
#ifndef __ASSEMBLY__
unsigned int cm_get_l4_sys_free_clk_hz(void);
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index e616f7229b..f2453728c6 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -323,7 +323,7 @@ CONFIG_DEFAULT_IMMR
CONFIG_DEF_HWCONFIG
CONFIG_DELAY_ENVIRONMENT
CONFIG_DESIGNWARE_ETH
-CONFIG_DESIGNWARE_WATCHDOG
+CONFIG_WDT_DW
CONFIG_DEVELOP
CONFIG_DEVICE_TREE_LIST
CONFIG_DFU_ALT
--
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[U-Boot] [PATCH 14/15] rockchip: rk3399: Add bootcount support
Add bootcount support for Rockchip rk3399. The bootcount value is preserved in PMU_SYS_REG0 register, this would help to support redundent boot. Once the redundant boot triggers, the altboot command will look for extlinux-rollback.conf on particular bootable partition which supposed to be a recovery partition where redundant boot required. Signed-off-by: Jagan Teki --- arch/arm/mach-rockchip/Kconfig| 2 ++ arch/arm/mach-rockchip/rk3399/Kconfig | 10 ++ include/configs/rk3399_common.h | 5 - 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 17f31e89f3..dd5055ed69 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -184,6 +184,8 @@ config ROCKCHIP_RK3399 imply TPL_CLK imply TPL_TINY_MEMSET imply TPL_ROCKCHIP_COMMON_BOARD + imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT + imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT help The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53. diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 6660d05349..68ac913bcb 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -91,6 +91,16 @@ config TPL_STACK config TPL_TEXT_BASE default 0xff8c2000 +if BOOTCOUNT_LIMIT + +config BOOTCOUNT_BOOTLIMIT + default 3 + +config SYS_BOOTCOUNT_ADDR + default 0xff3100f0 # PMU_SYS_REG0 + +endif # BOOTCOUNT_LIMIT + source "board/rockchip/evb_rk3399/Kconfig" source "board/theobroma-systems/puma_rk3399/Kconfig" source "board/vamrs/rock960_rk3399/Kconfig" diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 67b48e03ba..ace82928d1 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -70,7 +70,10 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ ROCKCHIP_DEVICE_SETTINGS \ - BOOTENV + BOOTENV \ + "altbootcmd=" \ + "setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \ + "run distro_bootcmd\0" #endif -- 2.18.0.321.gffc6fa0e3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 07/15] wdt: designware: Simplify enable function
Simplify dw watchdog enable function by using
proper macro and drop unwanted macros.
Cc: Chin Liang See
Cc: Andy Shevchenko
Signed-off-by: Jagan Teki
---
drivers/watchdog/designware_wdt.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/watchdog/designware_wdt.c
b/drivers/watchdog/designware_wdt.c
index bd858f0608..2979fda44e 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -14,7 +14,6 @@
#define DW_WDT_CR_EN_OFFSET0x00
#define DW_WDT_CR_RMOD_OFFSET 0x01
-#define DW_WDT_CR_RMOD_VAL 0x00
#define DW_WDT_CRR_RESTART_VAL 0x76
/*
@@ -38,9 +37,11 @@ static int designware_wdt_settimeout(unsigned int timeout)
static void designware_wdt_enable(void)
{
- writel(((DW_WDT_CR_RMOD_VAL << DW_WDT_CR_RMOD_OFFSET) |
- (0x1 << DW_WDT_CR_EN_OFFSET)),
- (CONFIG_DW_WDT_BASE + DW_WDT_CR));
+ u32 val = readl(CONFIG_DW_WDT_BASE + DW_WDT_CR);
+
+ /* Enable watchdog */
+ val |= DW_WDT_CR_RMOD_OFFSET;
+ writel(val, CONFIG_DW_WDT_BASE + DW_WDT_CR);
}
static unsigned int designware_wdt_is_enabled(void)
--
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[U-Boot] [DO NOT MERGE] [PATCH 15/15] rk3399: rockpro64: Enable bootcount
Enable bootcount support for Rockpro64 boards, this would help to use it for redundent boot. Signed-off-by: Jagan Teki --- configs/rockpro64-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index f604ccc1ec..3f1cf21ca0 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -57,3 +57,4 @@ CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y CONFIG_WDT=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_BOOTCOUNT_LIMIT=y -- 2.18.0.321.gffc6fa0e3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 08/15] wdt: dw: Add driver-model support
Add driver-model code for designware watchdog.
Cc: Chin Liang See
Cc: Andy Shevchenko
Signed-off-by: Jagan Teki
---
drivers/watchdog/designware_wdt.c | 114 +-
1 file changed, 113 insertions(+), 1 deletion(-)
diff --git a/drivers/watchdog/designware_wdt.c
b/drivers/watchdog/designware_wdt.c
index 2979fda44e..4efbb25f86 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -4,7 +4,6 @@
*/
#include
-#include
#include
#include
@@ -16,6 +15,117 @@
#define DW_WDT_CR_RMOD_OFFSET 0x01
#define DW_WDT_CRR_RESTART_VAL 0x76
+#ifdef CONFIG_WDT
+
+#include
+#include
+#include
+
+struct dw_wdt {
+ void __iomem *regs;
+ unsigned long clk_rate;
+};
+
+static inline int dw_wdt_is_enabled(struct dw_wdt *dw)
+{
+ return readl(dw->regs + DW_WDT_CR) & DW_WDT_CR_RMOD_OFFSET;
+}
+
+/*
+ * Set the watchdog time interval.
+ * Counter is 32 bit.
+ */
+static int dw_wdt_set_timeout(struct dw_wdt *dw, unsigned int timeout)
+{
+ signed int i;
+
+ /* calculate the timeout range value */
+ i = (log_2_n_round_up(timeout * dw->clk_rate)) - 16;
+ if (i > 15)
+ i = 15;
+ if (i < 0)
+ i = 0;
+
+ writel((i | (i << 4)), dw->regs + DW_WDT_TORR);
+
+ return 0;
+}
+
+static void dw_wdt_enable(struct dw_wdt *dw)
+{
+ u32 val = readl(dw->regs + DW_WDT_CR);
+
+ /* Enable watchdog */
+ val |= DW_WDT_CR_RMOD_OFFSET;
+ writel(val, dw->regs + DW_WDT_CR);
+}
+
+static int dw_wdt_reset(struct udevice *dev)
+{
+ struct dw_wdt *dw = dev_get_priv(dev);
+
+ if (dw_wdt_is_enabled(dw))
+ writel(DW_WDT_CRR_RESTART_VAL, dw->regs + DW_WDT_CRR);
+ else
+ dw_wdt_enable(dw);
+
+ return 0;
+}
+
+static int dw_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+ struct dw_wdt *dw = dev_get_priv(dev);
+
+ dw_wdt_set_timeout(dw, timeout);
+ dw_wdt_enable(dw);
+
+ return 0;
+}
+
+static int dw_wdt_probe(struct udevice *dev)
+{
+ struct dw_wdt *dw = dev_get_priv(dev);
+ struct clk clk;
+ int ret;
+
+ dw->regs = dev_remap_addr(dev);
+ if (!dw->regs)
+ return -EINVAL;
+
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (!ret)
+ dw->clk_rate = clk_get_rate(&clk);
+ else
+ return -EINVAL;
+
+ dw_wdt_reset(dev);
+
+ return 0;
+}
+
+static const struct wdt_ops dw_wdt_ops = {
+ .reset = dw_wdt_reset,
+ .start = dw_wdt_start,
+};
+
+static const struct udevice_id dw_wdt_ids[] = {
+ { .compatible = "snps,dw-wdt" },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(dw_wdt) = {
+ .name = "dw_wdt",
+ .id = UCLASS_WDT,
+ .of_match = dw_wdt_ids,
+ .ops = &dw_wdt_ops,
+ .priv_auto_alloc_size = sizeof(struct dw_wdt),
+ .probe = dw_wdt_probe,
+};
+
+#else
+
+#include
+
/*
* Set the watchdog time interval.
* Counter is 32 bit.
@@ -70,3 +180,5 @@ void hw_watchdog_init(void)
hw_watchdog_reset();
}
#endif
+
+#endif /* CONFIG_WDT */
--
2.18.0.321.gffc6fa0e3
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[U-Boot] [PATCH 10/15] rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for watchdog
Add u-boot,dm-pre-reloc property for watchdog in rk3399-u-boot.dtsi
so-that SPL can access watchdog.
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3399-u-boot.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 2738a3889e..54286b585b 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -3,6 +3,12 @@
* Copyright (C) 2019 Jagan Teki
*/
+/ {
+ watchdog@ff848000 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
&pmu {
u-boot,dm-pre-reloc;
};
--
2.18.0.321.gffc6fa0e3
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[U-Boot] [PATCH 1/2] mtd: spi: Add SYS_SPI_BLOCK_SIZE to Kconfig
From: Tien Fong Chee Different SPI flash has different block erase size configuration, it can be configured as block erase size or sub-block erase size, so SYS_SPI_BLOCK_SIZE is created to provide UBI a consistent block reading. UBI block reading would be eventually translated to offset access into SPI regardless how the block erase size is configured on SPI. This would made the UBI transparent from SPI layer. Signed-off-by: Tien Fong Chee --- drivers/mtd/spi/Kconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index d3b007a731..ea3779c521 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -196,4 +196,11 @@ config SPI_FLASH_MTD If unsure, say N +config SYS_SPI_BLOCK_SIZE + hex "SPI chip eraseblock size for UBI reading" + depends on SPL_SPI_FLASH_SUPPORT + default 65536 + help + Number of data bytes in a physical eraseblock for UBI reading. + endmenu # menu "SPI Flash Support" -- 2.13.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/2] drivers: ubi: Adding UBI loader for SPI flash
From: Tien Fong Chee
Adding UBI support for SPI flash.
Signed-off-by: Tien Fong Chee
---
common/spl/spl_ubi.c| 11 ++-
drivers/mtd/spi/sf-uclass.c | 30 ++
include/spi_flash.h | 10 ++
3 files changed, 50 insertions(+), 1 deletion(-)
diff --git a/common/spl/spl_ubi.c b/common/spl/spl_ubi.c
index 0cb5080882..40a449b42b 100644
--- a/common/spl/spl_ubi.c
+++ b/common/spl/spl_ubi.c
@@ -9,6 +9,8 @@
#include
#include
#include
+#include
+#include
#include
int spl_ubi_load_image(struct spl_image_info *spl_image,
@@ -33,6 +35,12 @@ int spl_ubi_load_image(struct spl_image_info *spl_image,
info.peb_size = CONFIG_SYS_ONENAND_BLOCK_SIZE;
break;
#endif
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+ case BOOT_DEVICE_SPI:
+ info.read = spi_flash_read_block;
+ info.peb_size = CONFIG_SYS_SPI_BLOCK_SIZE;
+ break;
+#endif
default:
goto out;
}
@@ -82,6 +90,7 @@ out:
#endif
return ret;
}
-/* Use priorty 0 so that Ubi will override NAND and ONENAND methods */
+/* Use priorty 0 so that Ubi will override SPI, NAND and ONENAND methods */
+SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_SPI, spl_ubi_load_image);
SPL_LOAD_IMAGE_METHOD("NAND", 0, BOOT_DEVICE_NAND, spl_ubi_load_image);
SPL_LOAD_IMAGE_METHOD("OneNAND", 0, BOOT_DEVICE_ONENAND, spl_ubi_load_image);
diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c
index 719a2fd23a..45b6dd9e52 100644
--- a/drivers/mtd/spi/sf-uclass.c
+++ b/drivers/mtd/spi/sf-uclass.c
@@ -12,6 +12,36 @@
DECLARE_GLOBAL_DATA_PTR;
+/**
+ * spi_flash_read_block - Read data from physical eraseblock into a buffer
+ * @block: Number of the physical eraseblock
+ * @offset:Data offset from the start of @peb
+ * @len: Data size to read
+ * @buf: Address of the destination buffer
+ * @return 0 if OK, -ve on error
+ */
+int spi_flash_read_block(int block, int offset, int len, void *buf)
+{
+ struct udevice *dev;
+
+ int ret = spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS,
+CONFIG_SF_DEFAULT_CS,
+CONFIG_SF_DEFAULT_SPEED,
+CONFIG_SF_DEFAULT_MODE, &dev);
+ if (ret) {
+ printf("Failed to initialize SPI flash at ");
+ printf("%u:%u (error %d)\n",CONFIG_SF_DEFAULT_BUS,
+ CONFIG_SF_DEFAULT_CS, ret);
+ return ret;
+ }
+
+ dev_get_uclass_priv(dev);
+
+ return log_ret(sf_get_ops(dev)->read(dev,
+ CONFIG_SYS_SPI_BLOCK_SIZE *
+ block + offset, len, buf));
+}
+
int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf)
{
return log_ret(sf_get_ops(dev)->read(dev, offset, len, buf));
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 55b4721813..f6eefdc5c8 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -102,6 +102,16 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset,
size_t len);
*/
int spl_flash_get_sw_write_prot(struct udevice *dev);
+/**
+ * spi_flash_read_block - Read data from physical eraseblock into a buffer
+ * @block: Number of the physical eraseblock
+ * @offset:Data offset from the start of @peb
+ * @len: Data size to read
+ * @buf: Address of the destination buffer
+ * @return 0 if OK, -ve on error
+ */
+int spi_flash_read_block(int block, int offset, int len, void *dst);
+
int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode,
struct udevice **devp);
--
2.13.0
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Re: [U-Boot] [PATCH v2 01/11] fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL
On Sun, Jul 28, 2019 at 9:27 PM Lukas Auer
wrote:
>
> The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being
> used in U-Boot SPL. Change the logic to also make it available in U-Boot
> SPL.
>
> Signed-off-by: Lukas Auer
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
> ---
>
> Changes in v2: None
>
> include/fdtdec.h | 2 +-
> lib/fdtdec.c | 6 ++
> 2 files changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/include/fdtdec.h b/include/fdtdec.h
> index e6c22dd5cd..635f53083b 100644
> --- a/include/fdtdec.h
> +++ b/include/fdtdec.h
> @@ -54,7 +54,7 @@ struct bd_info;
> #define SPL_BUILD 0
> #endif
>
> -#if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
> +#ifdef CONFIG_OF_PRIOR_STAGE
> extern phys_addr_t prior_stage_fdt_address;
> #endif
>
> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index 3ee786b579..569ffd5987 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -1533,16 +1533,14 @@ int fdtdec_setup(void)
> puts("Failed to read control FDT\n");
> return -1;
> }
> +# elif defined(CONFIG_OF_PRIOR_STAGE)
> + gd->fdt_blob = (void *)prior_stage_fdt_address;
> # endif
> # ifndef CONFIG_SPL_BUILD
> /* Allow the early environment to override the fdt address */
> -# if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
> - gd->fdt_blob = (void *)prior_stage_fdt_address;
> -# else
> gd->fdt_blob = map_sysmem
> (env_get_ulong("fdtcontroladdr", 16,
>(unsigned long)map_to_sysmem(gd->fdt_blob)),
> 0);
> -# endif
> # endif
>
> # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
> --
> 2.21.0
>
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Re: [U-Boot] [PATCH v2 02/11] Makefile: support building SPL FIT images without device trees
On Sun, Jul 28, 2019 at 9:29 PM Lukas Auer wrote: > > When building a U-Boot FIT image, the device trees specified by the > board are unconditionally built for inclusion in the FIT image. However, > not all device tree providers, such as CONFIG_OF_PRIOR_STAGE, require a > device tree to be built and bundled with the U-Boot binary. They rely on > other mechanisms to provide the device tree to U-Boot. Compilation on > boards with these device tree providers fails, because they do not > specify a device tree. > > Change the makefile rules to conditionally build the device trees if > either CONFIG_OF_SEPARATE or CONFIG_OF_EMBED is selected as device tree > provider. > > Signed-off-by: Lukas Auer > Reviewed-by: Bin Meng > Tested-by: Bin Meng > --- > > Changes in v2: None > > Makefile | 8 ++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Makefile b/Makefile > index 704579bec1..84678b2c47 100644 > --- a/Makefile > +++ b/Makefile > @@ -1263,7 +1263,9 @@ MKIMAGEFLAGS_u-boot.pbl = -n > $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \ > -R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage > > u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \ > - $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin > dts/dt.dtb,u-boot.bin) FORCE > + $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin \ > + $(if > $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED),dts/dt.dtb) \ > + ,u-boot.bin) FORCE > $(call if_changed,mkimage) > $(BOARD_SIZE_CHECK) > > @@ -1273,7 +1275,9 @@ else > MKIMAGEFLAGS_u-boot.itb = -E > endif > > -u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE > +u-boot.itb: u-boot-nodtb.bin \ > + $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED),dts/dt.dtb) \ > + $(U_BOOT_ITS) FORCE > $(call if_changed,mkfitimage) > $(BOARD_SIZE_CHECK) > > -- > 2.21.0 > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot Reviewed-by: Anup Patel Regards, Anup ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 03/11] spl: fit: use U-Boot device tree when FIT image has no device tree
On Sun, Jul 28, 2019 at 9:28 PM Lukas Auer
wrote:
>
> As part of the SPL FIT boot flow, the device tree is appended to U-Boot
> proper. The device tree is used to record information on the loadables
> to make them available to the SPL framework and U-Boot proper. Depending
> on the U-Boot device tree provider, the FIT image might not include a
> device tree. Information on the loadables is missing in this case.
>
> When booting via firmware bundled with the FIT image, U-Boot SPL loads
> the firmware binary and U-Boot proper before starting the firmware. The
> firmware, in turn, is responsible for starting U-Boot proper.
> Information on the memory location of the U-Boot proper loadable must be
> available to the SPL framework so that it can be passed to the firmware
> binary. To support this use case when no device tree is found in the FIT
> image, fall back to the U-Boot device tree in this situation.
>
> At the same time, update the comment to remove the note that the
> destination address must be aligned to ARCH_DMA_MINALIGN. Alignment is
> only required as an intermediate step when reading external data. This
> is automatically handled by spl_fit_append_fdt(). After reading the
> external data, it is copied to the specified address, which does not
> have to be aligned to ARCH_DMA_MINALIGN.
>
> Signed-off-by: Lukas Auer
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
> ---
>
> Changes in v2: None
>
> common/spl/spl_fit.c | 37 -
> 1 file changed, 24 insertions(+), 13 deletions(-)
>
> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
> index 969f7775c1..0bfb91d686 100644
> --- a/common/spl/spl_fit.c
> +++ b/common/spl/spl_fit.c
> @@ -11,6 +11,8 @@
> #include
> #include
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> #ifndef CONFIG_SYS_BOOTM_LEN
> #define CONFIG_SYS_BOOTM_LEN (64 << 20)
> #endif
> @@ -278,25 +280,34 @@ static int spl_fit_append_fdt(struct spl_image_info
> *spl_image,
> void *fit, int images, ulong base_offset)
> {
> struct spl_image_info image_info;
> - int node, ret;
> + int node, ret = 0;
> +
> + /*
> +* Use the address following the image as target address for the
> +* device tree.
> +*/
> + image_info.load_addr = spl_image->load_addr + spl_image->size;
>
> /* Figure out which device tree the board wants to use */
> node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
> if (node < 0) {
> debug("%s: cannot find FDT node\n", __func__);
> - return node;
> - }
> -
> - /*
> -* Read the device tree and place it after the image.
> -* Align the destination address to ARCH_DMA_MINALIGN.
> -*/
> - image_info.load_addr = spl_image->load_addr + spl_image->size;
> - ret = spl_load_fit_image(info, sector, fit, base_offset, node,
> -&image_info);
>
> - if (ret < 0)
> - return ret;
> + /*
> +* U-Boot did not find a device tree inside the FIT image. Use
> +* the U-Boot device tree instead.
> +*/
> + if (gd->fdt_blob)
> + memcpy((void *)image_info.load_addr, gd->fdt_blob,
> + fdt_totalsize(gd->fdt_blob));
> + else
> + return node;
> + } else {
> + ret = spl_load_fit_image(info, sector, fit, base_offset, node,
> +&image_info);
> + if (ret < 0)
> + return ret;
> + }
>
> /* Make the load-address of the FDT available for the SPL framework */
> spl_image->fdt_addr = (void *)image_info.load_addr;
> --
> 2.21.0
>
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[U-Boot] [PATCH] doc: arch: sandbox: Replace all the instances of README.sandbox
commit 49116e6d236d ("doc: arch: Convert README.sandbox to reST")
Moves README.sandbox to doc/arch.
Replace all the existing instances to point to the right documentation
file.
Signed-off-by: Keerthy
---
README | 2 +-
arch/sandbox/include/asm/spi.h | 2 +-
doc/README.gpt | 2 +-
drivers/net/Kconfig| 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/README b/README
index 7e610a8ebd..d2f466e6f6 100644
--- a/README
+++ b/README
@@ -212,7 +212,7 @@ board. This allows feature development which is not board-
or architecture-
specific to be undertaken on a native platform. The sandbox is also used to
run some of U-Boot's tests.
-See board/sandbox/README.sandbox for more details.
+See doc/arch/index.rst for more details.
Board Initialisation Flow:
diff --git a/arch/sandbox/include/asm/spi.h b/arch/sandbox/include/asm/spi.h
index 9985e3c494..98e1826e2c 100644
--- a/arch/sandbox/include/asm/spi.h
+++ b/arch/sandbox/include/asm/spi.h
@@ -1,5 +1,5 @@
/*
- * Simulate a SPI port and clients (see README.sandbox for details)
+ * Simulate a SPI port and clients (see doc/arch/sandbox.rst for details)
*
* Copyright (c) 2011-2013 The Chromium OS Authors.
* See file CREDITS for list of people who contributed to this
diff --git a/doc/README.gpt b/doc/README.gpt
index 62013a3f89..facd7afc3a 100644
--- a/doc/README.gpt
+++ b/doc/README.gpt
@@ -229,7 +229,7 @@ U-BOOT> gpt rename mmc 0 1 primary
The GPT functionality may be tested with the 'sandbox' board by
creating a disk image as described under 'Block Device Emulation' in
-board/sandbox/README.sandbox:
+doc/arch/index.rst:
=>host bind 0 ./disk.raw
=> gpt read host 0
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 0a1d228a88..084e095229 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -196,7 +196,7 @@ config ETH_SANDBOX_RAW
This driver is a bridge from the bottom of the network stack
in U-Boot to the RAW AF_PACKET API in Linux. This allows real
network traffic to be tested from within sandbox. See
- board/sandbox/README.sandbox for more details.
+ doc/arch/index.rst for more details.
config ETH_DESIGNWARE
bool "Synopsys Designware Ethernet MAC"
--
2.17.1
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Re: [U-Boot] [PATCH v2 04/11] riscv: add run mode configuration for SPL
On Sun, Jul 28, 2019 at 9:32 PM Lukas Auer wrote: > > U-Boot SPL can be run in a different privilege mode from U-Boot proper. > Add new configuration entries for SPL to allow the run mode to be > configured independently of U-Boot proper. > > Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE > configuration symbols to also cover the SPL equivalents. Ensure that > files compatible with only one privilege mode are not included in builds > targeting an incompatible privilege mode. > > Signed-off-by: Lukas Auer > Reviewed-by: Bin Meng > Tested-by: Bin Meng > --- > > Changes in v2: None > > arch/riscv/Kconfig| 33 ++- > arch/riscv/cpu/ax25/Kconfig | 6 +++--- > arch/riscv/cpu/cpu.c | 6 +++--- > arch/riscv/cpu/generic/Kconfig| 2 +- > arch/riscv/cpu/start.S| 6 +++--- > arch/riscv/include/asm/encoding.h | 2 +- > arch/riscv/lib/Makefile | 7 +-- > 7 files changed, 44 insertions(+), 18 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 8cfc7d0faa..b8d01ba8e1 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -113,6 +113,23 @@ config RISCV_SMODE > > endchoice > > +choice > + prompt "SPL Run Mode" > + default SPL_RISCV_MMODE > + depends on SPL > + > +config SPL_RISCV_MMODE > + bool "Machine" > + help > + Choose this option to build U-Boot SPL for RISC-V M-Mode. > + > +config SPL_RISCV_SMODE > + bool "Supervisor" > + help > + Choose this option to build U-Boot SPL for RISC-V S-Mode. > + > +endchoice > + > config RISCV_ISA_C > bool "Emit compressed instructions" > default y > @@ -132,34 +149,40 @@ config 64BIT > > config SIFIVE_CLINT > bool > - depends on RISCV_MMODE > + depends on RISCV_MMODE || SPL_RISCV_MMODE > select REGMAP > select SYSCON > + select SPL_REGMAP if SPL > + select SPL_SYSCON if SPL > help > The SiFive CLINT block holds memory-mapped control and status > registers > associated with software and timer interrupts. > > config ANDES_PLIC > bool > - depends on RISCV_MMODE > + depends on RISCV_MMODE || SPL_RISCV_MMODE > select REGMAP > select SYSCON > + select SPL_REGMAP if SPL > + select SPL_SYSCON if SPL > help > The Andes PLIC block holds memory-mapped claim and pending registers > associated with software interrupt. > > config ANDES_PLMT > bool > - depends on RISCV_MMODE > + depends on RISCV_MMODE || SPL_RISCV_MMODE > select REGMAP > select SYSCON > + select SPL_REGMAP if SPL > + select SPL_SYSCON if SPL > help > The Andes PLMT block holds memory-mapped mtime register > associated with timer tick. > > config RISCV_RDTIME > bool > - default y if RISCV_SMODE > + default y if RISCV_SMODE || SPL_RISCV_SMODE > help > The provides the riscv_get_time() API that is implemented using the > standard rdtime instruction. This is the case for S-mode U-Boot, and > @@ -189,7 +212,7 @@ config NR_CPUS > > config SBI_IPI > bool > - default y if RISCV_SMODE > + default y if RISCV_SMODE || SPL_RISCV_SMODE > depends on SMP > > config XIP > diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig > index 6b4b92e692..f4b59cb71d 100644 > --- a/arch/riscv/cpu/ax25/Kconfig > +++ b/arch/riscv/cpu/ax25/Kconfig > @@ -4,8 +4,8 @@ config RISCV_NDS > imply CPU > imply CPU_RISCV > imply RISCV_TIMER > - imply ANDES_PLIC if RISCV_MMODE > - imply ANDES_PLMT if RISCV_MMODE > + imply ANDES_PLIC if (RISCV_MMODE || SPL_RISCV_MMODE) > + imply ANDES_PLMT if (RISCV_MMODE || SPL_RISCV_MMODE) > help > Run U-Boot on AndeStar V5 platforms and use some specific features > which are provided by Andes Technology AndeStar V5 families. > @@ -14,7 +14,7 @@ if RISCV_NDS > > config RISCV_NDS_CACHE > bool "AndeStar V5 families specific cache support" > - depends on RISCV_MMODE > + depends on RISCV_MMODE || SPL_RISCV_MMODE > help > Provide Andes Technology AndeStar V5 families specific cache > support. > > diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c > index e9a8b437ed..ecf682c290 100644 > --- a/arch/riscv/cpu/cpu.c > +++ b/arch/riscv/cpu/cpu.c > @@ -47,13 +47,13 @@ static inline bool supports_extension(char ext) > > return false; > #else /* !CONFIG_CPU */ > -#ifdef CONFIG_RISCV_MMODE > +#if CONFIG_IS_ENABLED(RISCV_MMODE) > return csr_read(misa) & (1 << (ext - 'a')); > -#else /* !CONFIG_RISCV_MMODE */ > +#else /* !CONFIG_IS_ENABLED(RISCV_MMODE) */ > #warning "There is no way to determine the available extensions in S-mode." > #warning "Please convert your bo
Re: [U-Boot] [PATCH 01/16] clk: introduce clk_dev_binded
Hi Lukasz,
> Subject: [PATCH 01/16] clk: introduce clk_dev_binded
Do you have time to review the patchset? Patches were delegated to you.
Thanks,
Peng.
>
> When support Clock Common Framework, U-Boot use dev for clk tree
> information, there is no clk->parent. When support composite clk, it contains
> mux/gate/divider, but the mux/gate/divider is not binded with device.
> So we could not use dev_get_uclass_priv to get the correct
> clk_mux/gate/divider. So add clk_dev_binded to let choose the correct
> method.
>
> Signed-off-by: Peng Fan
> ---
> drivers/clk/clk.c | 8
> include/clk.h | 9 +
> 2 files changed, 17 insertions(+)
>
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index
> 7d748c9fc7..39b3087067
> 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -55,3 +55,11 @@ const char *clk_hw_get_name(const struct clk *hw)
> {
> return hw->dev->name;
> }
> +
> +bool clk_dev_binded(struct clk *clk)
> +{
> + if (clk->dev && (clk->dev->flags & DM_FLAG_BOUND))
> + return true;
> +
> + return false;
> +}
> diff --git a/include/clk.h b/include/clk.h index f8f56d9cf0..2ebc905e04
> 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -356,4 +356,13 @@ static inline bool clk_valid(struct clk *clk)
> * @return zero on success, or -ENOENT on error
> */
> int clk_get_by_id(ulong id, struct clk **clkp);
> +
> +/**
> + * clk_dev_binded() - Check whether the clk has a device binded
> + *
> + * @clk A pointer to the clk
> + *
> + * @return true on binded, or false on no */ bool
> +clk_dev_binded(struct clk *clk);
> #endif
> --
> 2.16.4
___
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Re: [U-Boot] [PATCH v2 05/11] spl: support booting via RISC-V OpenSBI
On Sun, Jul 28, 2019 at 9:55 PM Lukas Auer
wrote:
>
> RISC-V OpenSBI is an open-source implementation of the RISC-V Supervisor
> Binary Interface (SBI) specification. It is required by Linux and U-Boot
> running in supervisor mode. This patch adds support for booting via the
> OpenSBI FW_DYNAMIC firmware.
>
> In this configuration, U-Boot SPL starts in machine mode. After loading
> OpenSBI and U-Boot proper, it will start OpenSBI. All necessary
> parameters are generated by U-Boot SPL and passed to OpenSBI. U-Boot
> proper is started in supervisor mode by OpenSBI. Support for OpenSBI is
> enabled with CONFIG_SPL_OPENSBI. An additional configuration entry,
> CONFIG_SPL_OPENSBI_LOAD_ADDR, is used to specify the load address of the
> OpenSBI firmware binary. It is not used directly in U-Boot and instead
> is intended to make the value available to scripts such as FIT
> configuration generators.
>
> The header file include/opensbi.h is based on header files from the
> OpenSBI project. They are recent, as of commit bae54f764570 ("firmware:
> Add fw_dynamic firmware").
Instead of OpenSBI commit, may be mention that we need OpenSBI v0.4
or higher.
>
> Signed-off-by: Lukas Auer
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
> ---
>
> Changes in v2: None
>
> common/image.c | 1 +
> common/spl/Kconfig | 17
> common/spl/Makefile | 1 +
> common/spl/spl.c | 6 +++
> common/spl/spl_opensbi.c | 85
> include/image.h | 1 +
> include/opensbi.h| 40 +++
> include/spl.h| 5 +++
> 8 files changed, 156 insertions(+)
> create mode 100644 common/spl/spl_opensbi.c
> create mode 100644 include/opensbi.h
>
> diff --git a/common/image.c b/common/image.c
> index 9f9538fac2..7c7353a989 100644
> --- a/common/image.c
> +++ b/common/image.c
> @@ -125,6 +125,7 @@ static const table_entry_t uimage_os[] = {
> #if defined(CONFIG_BOOTM_OPENRTOS) || defined(USE_HOSTCC)
> { IH_OS_OPENRTOS, "openrtos", "OpenRTOS", },
> #endif
> + { IH_OS_OPENSBI, "opensbi", "RISC-V OpenSBI", },
>
> { -1, "", "", },
> };
> diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> index 5d6da5db89..939c8517cd 100644
> --- a/common/spl/Kconfig
> +++ b/common/spl/Kconfig
> @@ -1126,6 +1126,23 @@ config SPL_OPTEE
> OP-TEE is an open source Trusted OS which is loaded by SPL.
> More detail at: https://github.com/OP-TEE/optee_os
>
> +config SPL_OPENSBI
> + bool "Support RISC-V OpenSBI"
> + depends on RISCV && SPL_RISCV_MMODE && RISCV_SMODE
> + help
> + OpenSBI is an open-source implementation of the RISC-V Supervisor
> Binary
> + Interface (SBI) specification. U-Boot supports the OpenSBI
> FW_DYNAMIC
> + firmware. It is loaded and started by U-Boot SPL.
> +
> + More details are available at https://github.com/riscv/opensbi and
> + https://github.com/riscv/riscv-sbi-doc
> +
> +config SPL_OPENSBI_LOAD_ADDR
> + hex "OpenSBI load address"
> + depends on SPL_OPENSBI
> + help
> + Load address of the OpenSBI binary.
> +
> config TPL
> bool
> depends on SUPPORT_TPL
> diff --git a/common/spl/Makefile b/common/spl/Makefile
> index d28de692dd..5ce6f4ae48 100644
> --- a/common/spl/Makefile
> +++ b/common/spl/Makefile
> @@ -22,6 +22,7 @@ obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
> obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
> obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
> obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
> +obj-$(CONFIG_$(SPL_TPL_)OPENSBI) += spl_opensbi.o
> obj-$(CONFIG_$(SPL_TPL_)USB_STORAGE) += spl_usb.o
> obj-$(CONFIG_$(SPL_TPL_)FS_FAT) += spl_fat.o
> obj-$(CONFIG_$(SPL_TPL_)FS_EXT4) += spl_ext.o
> diff --git a/common/spl/spl.c b/common/spl/spl.c
> index d5e3f680f4..1ed4741bdc 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -659,6 +659,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
> (void *)spl_image.entry_point);
> break;
> #endif
> +#if CONFIG_IS_ENABLED(OPENSBI)
Should this be "CONFIG_IS_ENABLED(SPL_OPENSBI)" ?
Am I missing something here ?
> + case IH_OS_OPENSBI:
> + debug("Jumping to U-Boot via RISC-V OpenSBI\n");
> + spl_invoke_opensbi(&spl_image);
> + break;
> +#endif
> #ifdef CONFIG_SPL_OS_BOOT
> case IH_OS_LINUX:
> debug("Jumping to Linux\n");
> diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c
> new file mode 100644
> index 00..a6b4480ed2
> --- /dev/null
> +++ b/common/spl/spl_opensbi.c
> @@ -0,0 +1,85 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Fraunhofer AISEC,
> + * Lukas Auer
> + *
> + * Based on common/spl/spl_atf.c
> + */
> +#include
> +#include
> +#include
> +#inclu
Re: [U-Boot] [PATCH v2 06/11] riscv: add SPL support
On Sun, Jul 28, 2019 at 9:31 PM Lukas Auer
wrote:
>
> U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
> jumping to the image and via OpenSBI firmware. In the first case, both
> U-Boot SPL and proper must be compiled to run in the same privilege
> mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
> mode and U-Boot proper for supervisor mode.
>
> To be able to use SPL, boards have to provide a supported SPL boot
> device.
>
> Signed-off-by: Lukas Auer
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
> ---
>
> Changes in v2: None
>
> arch/Kconfig | 6 +++
> arch/riscv/Kconfig | 3 ++
> arch/riscv/cpu/generic/Kconfig | 3 ++
> arch/riscv/cpu/start.S | 23 +-
> arch/riscv/cpu/u-boot-spl.lds | 82 ++
> arch/riscv/include/asm/spl.h | 31 +
> arch/riscv/lib/Makefile| 1 +
> arch/riscv/lib/spl.c | 48
> 8 files changed, 196 insertions(+), 1 deletion(-)
> create mode 100644 arch/riscv/cpu/u-boot-spl.lds
> create mode 100644 arch/riscv/include/asm/spl.h
> create mode 100644 arch/riscv/lib/spl.c
>
> diff --git a/arch/Kconfig b/arch/Kconfig
> index 949eb28dfa..8350d9b1ea 100644
> --- a/arch/Kconfig
> +++ b/arch/Kconfig
> @@ -76,6 +76,12 @@ config RISCV
> imply MTD
> imply TIMER
> imply CMD_DM
> + imply SPL_DM
> + imply SPL_OF_CONTROL
> + imply SPL_LIBCOMMON_SUPPORT
> + imply SPL_LIBGENERIC_SUPPORT
> + imply SPL_SERIAL_SUPPORT
> + imply SPL_TIMER
>
> config SANDBOX
> bool "Sandbox"
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index b8d01ba8e1..01975d7c60 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -226,4 +226,7 @@ config STACK_SIZE_SHIFT
> int
> default 13
>
> +config SPL_LDSCRIPT
> + default "arch/riscv/cpu/u-boot-spl.lds"
> +
> endmenu
> diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig
> index b7552f539f..b2cb155d6d 100644
> --- a/arch/riscv/cpu/generic/Kconfig
> +++ b/arch/riscv/cpu/generic/Kconfig
> @@ -10,3 +10,6 @@ config GENERIC_RISCV
> imply RISCV_TIMER
> imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE)
> imply CMD_CPU
> + imply SPL_CPU_SUPPORT
> + imply SPL_OPENSBI
> + imply SPL_LOAD_FIT
> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index 08b9812c4d..e053197645 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -76,7 +76,11 @@ _start:
> */
> call_board_init_f:
> li t0, -16
> +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
> + li t1, CONFIG_SPL_STACK
> +#else
> li t1, CONFIG_SYS_INIT_SP_ADDR
> +#endif
> and sp, t1, t0 /* force 16 byte alignment */
>
> call_board_init_f_0:
> @@ -160,7 +164,24 @@ wait_for_gd_init:
>
> mv a0, zero/* a0 <-- boot_flags = 0 */
> la t5, board_init_f
> - jr t5 /* jump to board_init_f() */
> + jalrt5 /* jump to board_init_f() */
> +
> +#ifdef CONFIG_SPL_BUILD
> +spl_clear_bss:
> + la t0, __bss_start
> + la t1, __bss_end
> + beq t0, t1, spl_call_board_init_r
> +
> +spl_clear_bss_loop:
> + SREGzero, 0(t0)
> + addit0, t0, REGBYTES
> + bne t0, t1, spl_clear_bss_loop
> +
> +spl_call_board_init_r:
> + mv a0, zero
> + mv a1, zero
> + jal board_init_r
> +#endif
>
> /*
> * void relocate_code (addr_sp, gd, addr_moni)
> diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds
> new file mode 100644
> index 00..32255d58de
> --- /dev/null
> +++ b/arch/riscv/cpu/u-boot-spl.lds
> @@ -0,0 +1,82 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Based on arch/riscv/cpu/u-boot.lds, which is
> + * Copyright (C) 2017 Andes Technology Corporation
> + * Rick Chen, Andes Technology Corporation
> + *
> + * and arch/mips/cpu/u-boot-spl.lds.
> + */
> +MEMORY { .spl_mem : ORIGIN = IMAGE_TEXT_BASE, LENGTH = IMAGE_MAX_SIZE }
> +MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
> + LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
> +
> +OUTPUT_ARCH("riscv")
> +ENTRY(_start)
> +
> +SECTIONS
> +{
> + . = ALIGN(4);
> + .text : {
> + arch/riscv/cpu/start.o (.text)
> + *(.text*)
> + } > .spl_mem
> +
> + . = ALIGN(4);
> + .rodata : {
> + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
> + } > .spl_mem
> +
> + . = ALIGN(4);
> + .data : {
> + *(.data*)
> + } > .spl_mem
> + . = ALIGN(4);
> +
> + .got : {
> + __got_start = .;
> + *(.got.plt) *(.got)
> + __got_end = .;
> + } > .spl_mem
> +
> + . = ALIGN(4);
> +
> +
Re: [U-Boot] [PATCH v2 07/11] riscv: support SPL stack and global data relocation
On Sun, Jul 28, 2019 at 9:27 PM Lukas Auer wrote: > > To support relocation of the stack and global data on RISC-V, the > secondary harts must be notified of the change using IPIs. We can reuse > the hart relocation code for this purpose. It uses global data to store > the new stack pointer and global data pointer for the secondary harts. > This means that we cannot update the global data pointer of the main > hart in spl_relocate_stack_gd(), because the secondary harts have not > yet been relocated at this point. It is updated after the secondary > harts have been notified. > > Signed-off-by: Lukas Auer > Reviewed-by: Bin Meng > Tested-by: Bin Meng > --- > > Changes in v2: None > > arch/riscv/cpu/start.S | 35 ++- > common/spl/spl.c | 2 +- > 2 files changed, 35 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S > index e053197645..e8c65c887a 100644 > --- a/arch/riscv/cpu/start.S > +++ b/arch/riscv/cpu/start.S > @@ -170,13 +170,46 @@ wait_for_gd_init: > spl_clear_bss: > la t0, __bss_start > la t1, __bss_end > - beq t0, t1, spl_call_board_init_r > + beq t0, t1, spl_stack_gd_setup > > spl_clear_bss_loop: > SREGzero, 0(t0) > addit0, t0, REGBYTES > bne t0, t1, spl_clear_bss_loop > > +spl_stack_gd_setup: > + jal spl_relocate_stack_gd > + > + /* skip setup if we did not relocate */ > + beqza0, spl_call_board_init_r > + mv s0, a0 > + > + /* setup stack on main hart */ > +#ifdef CONFIG_SMP > + /* tp: hart id */ > + sllit0, tp, CONFIG_STACK_SIZE_SHIFT > + sub sp, s0, t0 > +#else > + mv sp, s0 > +#endif > + > + /* set new stack and global data pointer on secondary harts */ > +spl_secondary_hart_stack_gd_setup: > + la a0, secondary_hart_relocate > + mv a1, s0 > + mv a2, s0 > + jal smp_call_function > + > + /* hang if relocation of secondary harts has failed */ > + beqza0, 1f > + mv a1, a0 > + la a0, secondary_harts_relocation_error > + jal printf > + jal hang > + > + /* set new global data pointer on main hart */ > +1: mv gp, s0 > + > spl_call_board_init_r: > mv a0, zero > mv a1, zero > diff --git a/common/spl/spl.c b/common/spl/spl.c > index 1ed4741bdc..834f39908b 100644 > --- a/common/spl/spl.c > +++ b/common/spl/spl.c > @@ -756,7 +756,7 @@ ulong spl_relocate_stack_gd(void) > #if CONFIG_IS_ENABLED(DM) > dm_fixup_for_gd_move(new_gd); > #endif > -#if !defined(CONFIG_ARM) > +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) > gd = new_gd; > #endif > return ptr; > -- > 2.21.0 > Reviewed-by: Anup Patel Regards, Anup ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 08/11] riscv: add a generic FIT generator script
On Sun, Jul 28, 2019 at 9:30 PM Lukas Auer
wrote:
>
> Add a generic FIT generator script for RISC-V to generate images
> containing U-Boot, OpenSBI FW_DYNAMIC firmware, and optionally one or
> more device trees. The location of the OpenSBI firmware binary can be
> specified with the OPENSBI environment variable. By default, it is
> assumed to be "fw_dynamic.bin" and located in the U-Boot top-level.
> Device trees are passed as arguments to the generator script. A separate
> configuration entry is created for each device tree.
>
> The load addresses of U-Boot and OpenSBI are parsed from the U-Boot
> configuration. They can be overwritten with the UBOOT_LOAD_ADDR and
> OPENSBI_LOAD_ADDR environment variables.
>
> The script is based on the i.MX (arch/arm/mach-imx/mkimage_fit_atf.sh)
> and Allwinner sunxi (board/sunxi/mksunxi_fit_atf.sh) FIT generator
> scripts.
>
> Signed-off-by: Lukas Auer
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
> ---
>
> Changes in v2: None
>
> arch/riscv/lib/mkimage_fit_opensbi.sh | 100 ++
> 1 file changed, 100 insertions(+)
> create mode 100755 arch/riscv/lib/mkimage_fit_opensbi.sh
>
> diff --git a/arch/riscv/lib/mkimage_fit_opensbi.sh
> b/arch/riscv/lib/mkimage_fit_opensbi.sh
> new file mode 100755
> index 00..d6f95e5bfd
> --- /dev/null
> +++ b/arch/riscv/lib/mkimage_fit_opensbi.sh
> @@ -0,0 +1,100 @@
> +#!/bin/sh
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# script to generate FIT image source for RISC-V boards with OpenSBI
> +# and, optionally, multiple device trees (given on the command line).
> +#
> +# usage: $0 [ [ +
> +[ -z "$OPENSBI" ] && OPENSBI="fw_dynamic.bin"
> +
> +if [ -z "$UBOOT_LOAD_ADDR" ]; then
> + UBOOT_LOAD_ADDR="$(grep "^CONFIG_SYS_TEXT_BASE=" .config | awk
> 'BEGIN{FS="="} {print $2}')"
> +fi
> +
> +if [ -z "$OPENSBI_LOAD_ADDR" ]; then
> + OPENSBI_LOAD_ADDR="$(grep "^CONFIG_SPL_OPENSBI_LOAD_ADDR=" .config |
> awk 'BEGIN{FS="="} {print $2}')"
> +fi
> +
> +if [ ! -f $OPENSBI ]; then
> + echo "WARNING: OpenSBI binary \"$OPENSBI\" not found, resulting
> binary is not functional." >&2
> + OPENSBI=/dev/null
> +fi
> +
> +cat << __HEADER_EOF
> +/dts-v1/;
> +
> +/ {
> + description = "Configuration to load OpenSBI before U-Boot";
> +
> + images {
> + uboot {
> + description = "U-Boot";
> + data = /incbin/("u-boot-nodtb.bin");
> + type = "standalone";
> + os = "U-Boot";
> + arch = "riscv";
> + compression = "none";
> + load = <$UBOOT_LOAD_ADDR>;
> + };
> + opensbi {
> + description = "RISC-V OpenSBI";
> + data = /incbin/("$OPENSBI");
> + type = "firmware";
> + os = "opensbi";
> + arch = "riscv";
> + compression = "none";
> + load = <$OPENSBI_LOAD_ADDR>;
> + entry = <$OPENSBI_LOAD_ADDR>;
> + };
> +__HEADER_EOF
> +
> +cnt=1
> +for dtname in $*
> +do
> + cat << __FDT_IMAGE_EOF
> + fdt_$cnt {
> + description = "$(basename $dtname .dtb)";
> + data = /incbin/("$dtname");
> + type = "flat_dt";
> + compression = "none";
> + };
> +__FDT_IMAGE_EOF
> +cnt=$((cnt+1))
> +done
> +
> +cat << __CONF_HEADER_EOF
> + };
> + configurations {
> + default = "config_1";
> +
> +__CONF_HEADER_EOF
> +
> +if [ $# -eq 0 ]; then
> +cat << __CONF_SECTION_EOF
> + config_1 {
> + description = "U-Boot FIT";
> + firmware = "opensbi";
> + loadables = "uboot";
> + };
> +__CONF_SECTION_EOF
> +else
> +cnt=1
> +for dtname in $*
> +do
> +cat << __CONF_SECTION_EOF
> + config_$cnt {
> + description = "$(basename $dtname .dtb)";
> + firmware = "opensbi";
> + loadables = "uboot";
> + fdt = "fdt_$cnt";
> + };
> +__CONF_SECTION_EOF
> +cnt=$((cnt+1))
> +done
> +fi
> +
> +cat << __ITS_EOF
> + };
> +};
> +__ITS_EOF
> --
> 2.21.0
>
> ___
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> https://lists.denx.de/listinfo/u-boot
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Regards,
Anup
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Re: [U-Boot] [PATCH v2 09/11] riscv: set default FIT generator script and build target for SPL builds
On Sun, Jul 28, 2019 at 9:30 PM Lukas Auer wrote: > > Now that we have a generic FIT generator script for RISC-V, set it as > the default. To also build the FIT image by default, set the default > build target to "u-boot.itb" if CONFIG_SPL_LOAD_FIT is enabled. > > Signed-off-by: Lukas Auer > Reviewed-by: Bin Meng > Tested-by: Bin Meng > --- > > Changes in v2: None > > Kconfig | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Kconfig b/Kconfig > index d2eb744e70..a78dd59a79 100644 > --- a/Kconfig > +++ b/Kconfig > @@ -250,7 +250,8 @@ config BUILD_TARGET > default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5 > default "u-boot-spl.kwb" if ARCH_MVEBU && SPL > default "u-boot-elf.srec" if RCAR_GEN3 > - default "u-boot.itb" if SPL_LOAD_FIT && (ROCKCHIP_RK3399 || > ARCH_SUNXI) > + default "u-boot.itb" if SPL_LOAD_FIT && (ROCKCHIP_RK3399 || \ > + ARCH_SUNXI || RISCV) > default "u-boot.kwb" if KIRKWOOD > default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT > help > @@ -463,6 +464,7 @@ config SPL_FIT_GENERATOR > depends on SPL_FIT > default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI > default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && > ARCH_ROCKCHIP > + default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && > RISCV > help > Specifies a (platform specific) script file to generate the FIT > source file used to build the U-Boot FIT image file. This gets > -- > 2.21.0 > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot Reviewed-by: Anup Patel Regards, Anup ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 10/11] riscv: qemu: add SPL configuration
On Sun, Jul 28, 2019 at 9:32 PM Lukas Auer
wrote:
>
> Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
> enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
> configurations are meant to help the development of SPL on RISC-V.
>
> The configurations enable RAM as the only SPL boot device. Images must
> be loaded at address 0x8020. In the default boot flow, U-Boot SPL
> starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
> proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
> then started in supervisor mode by OpenSBI.
>
> Signed-off-by: Lukas Auer
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
> ---
>
> Changes in v2: None
>
> board/emulation/qemu-riscv/Kconfig | 10 ++
> board/emulation/qemu-riscv/MAINTAINERS | 2 ++
> board/emulation/qemu-riscv/qemu-riscv.c | 17 +
> configs/qemu-riscv32_spl_defconfig | 11 +++
> configs/qemu-riscv64_spl_defconfig | 12
> include/configs/qemu-riscv.h| 14 ++
> 6 files changed, 66 insertions(+)
> create mode 100644 configs/qemu-riscv32_spl_defconfig
> create mode 100644 configs/qemu-riscv64_spl_defconfig
>
> diff --git a/board/emulation/qemu-riscv/Kconfig
> b/board/emulation/qemu-riscv/Kconfig
> index 6cc7c31dc6..1928d6dda0 100644
> --- a/board/emulation/qemu-riscv/Kconfig
> +++ b/board/emulation/qemu-riscv/Kconfig
> @@ -13,13 +13,21 @@ config SYS_CONFIG_NAME
> default "qemu-riscv"
>
> config SYS_TEXT_BASE
> + default 0x8120 if SPL
> default 0x8000 if !RISCV_SMODE
> default 0x8020 if RISCV_SMODE && ARCH_RV64I
> default 0x8040 if RISCV_SMODE && ARCH_RV32I
>
> +config SPL_TEXT_BASE
> + default 0x8000
> +
> +config SPL_OPENSBI_LOAD_ADDR
> + default 0x8100
> +
> config BOARD_SPECIFIC_OPTIONS # dummy
> def_bool y
> select GENERIC_RISCV
> + select SUPPORT_SPL
> imply SYS_NS16550
> imply VIRTIO_MMIO
> imply VIRTIO_NET
> @@ -43,5 +51,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply CMD_PCI
> imply E1000
> imply NVME
> + imply SPL_RAM_SUPPORT
> + imply SPL_RAM_DEVICE
>
> endif
> diff --git a/board/emulation/qemu-riscv/MAINTAINERS
> b/board/emulation/qemu-riscv/MAINTAINERS
> index c701c83d77..78969ed6bd 100644
> --- a/board/emulation/qemu-riscv/MAINTAINERS
> +++ b/board/emulation/qemu-riscv/MAINTAINERS
> @@ -5,5 +5,7 @@ F: board/emulation/qemu-riscv/
> F: include/configs/qemu-riscv.h
> F: configs/qemu-riscv32_defconfig
> F: configs/qemu-riscv32_smode_defconfig
> +F: configs/qemu-riscv32_spl_defconfig
> F: configs/qemu-riscv64_defconfig
> F: configs/qemu-riscv64_smode_defconfig
> +F: configs/qemu-riscv64_spl_defconfig
> diff --git a/board/emulation/qemu-riscv/qemu-riscv.c
> b/board/emulation/qemu-riscv/qemu-riscv.c
> index d6167aaef1..e04bd3001c 100644
> --- a/board/emulation/qemu-riscv/qemu-riscv.c
> +++ b/board/emulation/qemu-riscv/qemu-riscv.c
> @@ -6,6 +6,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
>
> @@ -87,3 +88,19 @@ int ft_board_setup(void *blob, bd_t *bd)
>
> return 0;
> }
> +
> +#ifdef CONFIG_SPL
> +u32 spl_boot_device(void)
> +{
> + /* RISC-V QEMU only supports RAM as SPL boot device */
> + return BOOT_DEVICE_RAM;
> +}
> +#endif
> +
> +#ifdef CONFIG_SPL_LOAD_FIT
> +int board_fit_config_name_match(const char *name)
> +{
> + /* boot using first FIT config */
> + return 0;
> +}
> +#endif
> diff --git a/configs/qemu-riscv32_spl_defconfig
> b/configs/qemu-riscv32_spl_defconfig
> new file mode 100644
> index 00..78e755b36a
> --- /dev/null
> +++ b/configs/qemu-riscv32_spl_defconfig
> @@ -0,0 +1,11 @@
> +CONFIG_RISCV=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_SPL=y
> +CONFIG_TARGET_QEMU_VIRT=y
> +CONFIG_RISCV_SMODE=y
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_FIT=y
> +CONFIG_DISPLAY_CPUINFO=y
> +CONFIG_DISPLAY_BOARDINFO=y
> +# CONFIG_CMD_MII is not set
> +CONFIG_OF_PRIOR_STAGE=y
> diff --git a/configs/qemu-riscv64_spl_defconfig
> b/configs/qemu-riscv64_spl_defconfig
> new file mode 100644
> index 00..a3f5e29d58
> --- /dev/null
> +++ b/configs/qemu-riscv64_spl_defconfig
> @@ -0,0 +1,12 @@
> +CONFIG_RISCV=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_SPL=y
> +CONFIG_TARGET_QEMU_VIRT=y
> +CONFIG_ARCH_RV64I=y
> +CONFIG_RISCV_SMODE=y
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_FIT=y
> +CONFIG_DISPLAY_CPUINFO=y
> +CONFIG_DISPLAY_BOARDINFO=y
> +# CONFIG_CMD_MII is not set
> +CONFIG_OF_PRIOR_STAGE=y
> diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
> index df22f780b0..69aa82d36a 100644
> --- a/include/configs/qemu-riscv.h
> +++ b/include/configs/qemu-riscv.h
> @@ -8,6 +8,18 @@
>
> #include
>
> +#ifdef CONFIG_SPL
> +
> +#define CONFIG_SPL_MAX_SIZE0x0010
> +#define CONFIG_SPL_BSS_START_ADDR 0x8400
> +#
Re: [U-Boot] [PATCH v2 11/11] doc: update QEMU RISC-V documentation
On Sun, Jul 28, 2019 at 9:29 PM Lukas Auer wrote: > > The available defconfigs for RISC-V QEMU have changed. We now have > configurations to compile U-Boot to run in supervisor mode and for > U-Boot SPL. Update the QEMU RISC-V documentation to reflect these > changes. > > Signed-off-by: Lukas Auer > Reviewed-by: Bin Meng > Tested-by: Bin Meng > --- > > Changes in v2: > - Rebase on master and format documentation as reStructuredText > > doc/board/emulation/qemu-riscv.rst | 60 +- > 1 file changed, 59 insertions(+), 1 deletion(-) > > diff --git a/doc/board/emulation/qemu-riscv.rst > b/doc/board/emulation/qemu-riscv.rst > index 214833496b..9472a6f812 100644 > --- a/doc/board/emulation/qemu-riscv.rst > +++ b/doc/board/emulation/qemu-riscv.rst > @@ -6,7 +6,8 @@ QEMU RISC-V > > QEMU for RISC-V supports a special 'virt' machine designed for emulation and > virtualization purposes. This document describes how to run U-Boot under it. > -Both 32-bit 64-bit targets are supported. > +Both 32-bit and 64-bit targets are supported, running in either machine or > +supervisor mode. > > The QEMU virt machine models a generic RISC-V virtual machine with support > for > the VirtIO standard networking and block storage devices. It has CLINT, PLIC, > @@ -28,6 +29,11 @@ Set the CROSS_COMPILE environment variable as usual, and > run: > make qemu-riscv64_defconfig > make > > +This will compile U-Boot for machine mode. To build supervisor mode binaries, > +use the configurations qemu-riscv32_smode_defconfig and > +qemu-riscv64_smode_defconfig instead. Note that U-Boot running in supervisor > +mode requires a supervisor binary interface (SBI), such as RISC-V OpenSBI. > + > Running U-Boot > -- > The minimal QEMU command line to get U-Boot up and running is: > @@ -46,4 +52,56 @@ parameter. For example, '-m 2G' creates 2GiB memory for > the target, > and the memory node in the embedded DTB created by QEMU reflects > the new setting. > > +For instructions on how to run U-Boot in supervisor mode on QEMU > +with OpenSBI, see the documentation available with OpenSBI: > +https://github.com/riscv/opensbi/blob/master/docs/platform/qemu_virt.md > + > These have been tested in QEMU 3.0.0. > + > +Running U-Boot SPL > +-- > +In the default SPL configuration, U-Boot SPL starts in machine mode. U-Boot > +proper and OpenSBI (FW_DYNAMIC firmware) are bundled as FIT image and made > +available to U-Boot SPL. Both are then loaded by U-Boot SPL and the location > +of U-Boot proper is passed to OpenSBI. After initialization, U-Boot proper is > +started in supervisor mode by OpenSBI. > + > +OpenSBI must be compiled before compiling U-Boot. Clone the OpenSBI > repository > +and run the following command. > + > +.. code-block:: console > + > +git clone https://github.com/riscv/opensbi.git > +cd opensbi > +make PLATFORM=qemu/virt > + > +See the OpenSBI documentation for full details: > +https://github.com/riscv/opensbi/blob/master/docs/platform/qemu_virt.md > + > +To make the FW_DYNAMIC binary > (build/platform/qemu/virt/firmware/fw_dynamic.bin) > +available to U-Boot, either copy it into the U-Boot root directory or specify > +its location with the OPENSBI environment variable. Afterwards, compile > U-Boot > +with the following commands. > + > +- For 32-bit RISC-V:: > + > +make qemu-riscv32_spl_defconfig > +make > + > +- For 64-bit RISC-V:: > + > +make qemu-riscv64_spl_defconfig > +make > + > +The minimal QEMU commands to run U-Boot SPL in both 32-bit and 64-bit > +configurations are: > + > +- For 32-bit RISC-V:: > + > +qemu-system-riscv32 -nographic -machine virt -kernel spl/u-boot-spl \ > +-device loader,file=u-boot.itb,addr=0x8020 > + > +- For 64-bit RISC-V:: > + > +qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ > +-device loader,file=u-boot.itb,addr=0x8020 > -- > 2.21.0 > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot Reviewed-by: Anup Patel Regards, Anup ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 01/16] clk: introduce clk_dev_binded
Hi Peng,
> Hi Lukasz,
>
> > Subject: [PATCH 01/16] clk: introduce clk_dev_binded
>
> Do you have time to review the patchset? Patches were delegated to
> you.
The i.MX related PR (with base CCF) has been pulled to mainline just
yesteday, so I'm going to rewiew and test your code on top of it (with
buildman) today.
I shall send PR for -clk tomorrow.
Thanks for your patches.
>
> Thanks,
> Peng.
>
> >
> > When support Clock Common Framework, U-Boot use dev for clk tree
> > information, there is no clk->parent. When support composite clk,
> > it contains mux/gate/divider, but the mux/gate/divider is not
> > binded with device. So we could not use dev_get_uclass_priv to get
> > the correct clk_mux/gate/divider. So add clk_dev_binded to let
> > choose the correct method.
> >
> > Signed-off-by: Peng Fan
> > ---
> > drivers/clk/clk.c | 8
> > include/clk.h | 9 +
> > 2 files changed, 17 insertions(+)
> >
> > diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index
> > 7d748c9fc7..39b3087067 100644
> > --- a/drivers/clk/clk.c
> > +++ b/drivers/clk/clk.c
> > @@ -55,3 +55,11 @@ const char *clk_hw_get_name(const struct clk *hw)
> > {
> > return hw->dev->name;
> > }
> > +
> > +bool clk_dev_binded(struct clk *clk)
> > +{
> > + if (clk->dev && (clk->dev->flags & DM_FLAG_BOUND))
> > + return true;
> > +
> > + return false;
> > +}
> > diff --git a/include/clk.h b/include/clk.h index
> > f8f56d9cf0..2ebc905e04 100644
> > --- a/include/clk.h
> > +++ b/include/clk.h
> > @@ -356,4 +356,13 @@ static inline bool clk_valid(struct clk *clk)
> > * @return zero on success, or -ENOENT on error
> > */
> > int clk_get_by_id(ulong id, struct clk **clkp);
> > +
> > +/**
> > + * clk_dev_binded() - Check whether the clk has a device binded
> > + *
> > + * @clkA pointer to the clk
> > + *
> > + * @return true on binded, or false on no */ bool
> > +clk_dev_binded(struct clk *clk);
> > #endif
> > --
> > 2.16.4
>
Best regards,
Lukasz Majewski
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de
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Re: [U-Boot] [PATCH 01/16] clk: introduce clk_dev_binded
> Subject: Re: [PATCH 01/16] clk: introduce clk_dev_binded
>
> Hi Peng,
>
> > Hi Lukasz,
> >
> > > Subject: [PATCH 01/16] clk: introduce clk_dev_binded
> >
> > Do you have time to review the patchset? Patches were delegated to
> > you.
>
> The i.MX related PR (with base CCF) has been pulled to mainline just yesteday,
> so I'm going to rewiew and test your code on top of it (with
> buildman) today.
Thanks very much.
Thanks,
Peng.
>
> I shall send PR for -clk tomorrow.
>
> Thanks for your patches.
>
> >
> > Thanks,
> > Peng.
> >
> > >
> > > When support Clock Common Framework, U-Boot use dev for clk tree
> > > information, there is no clk->parent. When support composite clk, it
> > > contains mux/gate/divider, but the mux/gate/divider is not binded
> > > with device. So we could not use dev_get_uclass_priv to get the
> > > correct clk_mux/gate/divider. So add clk_dev_binded to let choose
> > > the correct method.
> > >
> > > Signed-off-by: Peng Fan
> > > ---
> > > drivers/clk/clk.c | 8
> > > include/clk.h | 9 +
> > > 2 files changed, 17 insertions(+)
> > >
> > > diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index
> > > 7d748c9fc7..39b3087067 100644
> > > --- a/drivers/clk/clk.c
> > > +++ b/drivers/clk/clk.c
> > > @@ -55,3 +55,11 @@ const char *clk_hw_get_name(const struct clk
> *hw)
> > > {
> > > return hw->dev->name;
> > > }
> > > +
> > > +bool clk_dev_binded(struct clk *clk) {
> > > + if (clk->dev && (clk->dev->flags & DM_FLAG_BOUND))
> > > + return true;
> > > +
> > > + return false;
> > > +}
> > > diff --git a/include/clk.h b/include/clk.h index
> > > f8f56d9cf0..2ebc905e04 100644
> > > --- a/include/clk.h
> > > +++ b/include/clk.h
> > > @@ -356,4 +356,13 @@ static inline bool clk_valid(struct clk *clk)
> > > * @return zero on success, or -ENOENT on error
> > > */
> > > int clk_get_by_id(ulong id, struct clk **clkp);
> > > +
> > > +/**
> > > + * clk_dev_binded() - Check whether the clk has a device binded
> > > + *
> > > + * @clk A pointer to the clk
> > > + *
> > > + * @return true on binded, or false on no */ bool
> > > +clk_dev_binded(struct clk *clk);
> > > #endif
> > > --
> > > 2.16.4
> >
>
>
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> lu...@denx.de
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Re: [U-Boot] [PATCH v7 2/9] x86: lib: fsp: Use EFI_GUID and efi_guid_t
On Mon, Jul 29, 2019 at 7:35 AM Park, Aiden wrote:
>
> Use existing EFI_GUID and efi_guid_t instead of struct efi_guid.
> This is pre-work before making a common HOB library.
> - Change 'struct efi_guid' to efi_guit_t
> - Remove 'struct efi_guid'
> - Define GUIDs with EFI_GUID() macro
> - Use guidcmp() instead of compare_guid()
> - Remove compare_guid()
>
Reviewed-by: Andy Shevchenko
> Signed-off-by: Aiden Park
> ---
>
> Changes in v7:
> * Split HOB library into EFI_GUID pre-work and making a common library
>
> arch/x86/include/asm/fsp/fsp_ffs.h | 4 +-
> arch/x86/include/asm/fsp/fsp_fv.h | 4 +-
> arch/x86/include/asm/fsp/fsp_hob.h | 76 +
> arch/x86/include/asm/fsp/fsp_support.h | 6 +-
> arch/x86/include/asm/fsp/fsp_types.h | 8 ---
> arch/x86/lib/fsp/fsp_support.c | 78 ++
> cmd/x86/fsp.c | 10 ++--
> 7 files changed, 81 insertions(+), 105 deletions(-)
>
> diff --git a/arch/x86/include/asm/fsp/fsp_ffs.h
> b/arch/x86/include/asm/fsp/fsp_ffs.h
> index 61ce63c08e..b7558e5a17 100644
> --- a/arch/x86/include/asm/fsp/fsp_ffs.h
> +++ b/arch/x86/include/asm/fsp/fsp_ffs.h
> @@ -45,7 +45,7 @@ struct __packed ffs_file_header {
> * This GUID is the file name.
> * It is used to uniquely identify the file.
> */
> - struct efi_guid name;
> + efi_guid_t name;
> /* Used to verify the integrity of the file */
> union ffs_integrity integrity;
> /* Identifies the type of file */
> @@ -68,7 +68,7 @@ struct __packed ffs_file_header2 {
> * Name in any given firmware volume, except if the file type is
> * EFI_FV_FILE_TYPE_FFS_PAD.
> */
> - struct efi_guid name;
> + efi_guid_t name;
> /* Used to verify the integrity of the file */
> union ffs_integrity integrity;
> /* Identifies the type of file */
> diff --git a/arch/x86/include/asm/fsp/fsp_fv.h
> b/arch/x86/include/asm/fsp/fsp_fv.h
> index 190aedcf44..511dfb78b8 100644
> --- a/arch/x86/include/asm/fsp/fsp_fv.h
> +++ b/arch/x86/include/asm/fsp/fsp_fv.h
> @@ -80,7 +80,7 @@ struct fv_header {
> * Declares the file system with which the firmware volume
> * is formatted.
> */
> - struct efi_guid fs_guid;
> + efi_guid_t fs_guid;
> /*
> * Length in bytes of the complete firmware volume, including
> * the header.
> @@ -128,7 +128,7 @@ struct fv_header {
> /* Extension header pointed by ExtHeaderOffset of volume header */
> struct fv_ext_header {
> /* firmware volume name */
> - struct efi_guid fv_name;
> + efi_guid_t fv_name;
> /* Size of the rest of the extension header including this structure
> */
> u32 ext_hdr_size;
> };
> diff --git a/arch/x86/include/asm/fsp/fsp_hob.h
> b/arch/x86/include/asm/fsp/fsp_hob.h
> index 00657b62c7..843d7b513b 100644
> --- a/arch/x86/include/asm/fsp/fsp_hob.h
> +++ b/arch/x86/include/asm/fsp/fsp_hob.h
> @@ -8,6 +8,7 @@
> #define __FSP_HOB_H__
>
> #include
> +#include
>
> /* Type of HOB Header */
> #define HOB_TYPE_MEM_ALLOC 0x0002
> @@ -40,7 +41,7 @@ struct hob_mem_alloc {
> * present for the memory allocation HOB. Type efi_guid is defined in
> * InstallProtocolInterface() in the UEFI 2.0 specification.
> */
> - struct efi_guid name;
> + efi_guid_t name;
> /*
> * The base address of memory allocated by this HOB.
> * Type phys_addr_t is defined in AllocatePages() in the UEFI 2.0
> @@ -106,7 +107,7 @@ struct hob_res_desc {
> * used by HOB consumer phase components to correlate device
> * ownership of a resource.
> */
> - struct efi_guid owner;
> + efi_guid_t owner;
> u32 type;
> u32 attr;
> /* The physical start address of the resource region */
> @@ -122,7 +123,7 @@ struct hob_res_desc {
> struct hob_guid {
> struct hob_header hdr;
> /* A GUID that defines the contents of this HOB */
> - struct efi_guid name;
> + efi_guid_t name;
> /* GUID specific data goes here */
> };
>
> @@ -223,56 +224,57 @@ static inline u16 get_guid_hob_data_size(const struct
> hob_header *hdr)
> #define FSP_GUID_DATA4_6 0x3f
> #define FSP_GUID_DATA4_7 0x0c
>
> +#define FSP_GUID_BYTE0 0xbe
> +#define FSP_GUID_BYTE1 0x40
> +#define FSP_GUID_BYTE2 0x27
> +#define FSP_GUID_BYTE3 0x91
> +#define FSP_GUID_BYTE4 0x84
> +#define FSP_GUID_BYTE5 0x22
> +#define FSP_GUID_BYTE6 0x34
> +#define FSP_GUID_BYTE7 0x47
> +#define FSP_GUID_BYTE8 FSP_GUID_DATA4_0
> +#define FSP_GUID_BYT
Re: [U-Boot] [PATCH v7 3/9] x86: Add a common HOB library
On Mon, Jul 29, 2019 at 7:35 AM Park, Aiden wrote:
>
> FSP(CONFIG_HAVE_FSP) and Slim Bootloader(CONFIG_SYS_SLIMBOOTLOADER)
> consume HOB(CONFIG_USE_HOB) data from the each HOB list pointer.
> Add a common HOB library in lib/hob.c and include/asm/hob.h.
>
Reviewed-by: Andy Shevchenko
> Signed-off-by: Aiden Park
> ---
>
> Changes in v7:
> * Split HOB library into EFI_GUID pre-work and making a common library
>
> Changes in v6:
> * Use CONFIG_USE_HOB
> * Change struct efi_guid to efi_guid_t
> * Use EFI_GUID to define GUIDs
>
> Changes in v3:
> * Create a common HOB libary from fsp_hob and fsp_support
>
> arch/x86/include/asm/fsp/fsp_hob.h | 184 +---
> arch/x86/include/asm/fsp/fsp_support.h | 37 +---
> arch/x86/include/asm/hob.h | 229 +
> arch/x86/lib/Makefile | 1 +
> arch/x86/lib/fsp/fsp_support.c | 57 +-
> arch/x86/lib/hob.c | 84 +
> cmd/x86/Makefile | 1 +
> cmd/x86/fsp.c | 65 +--
> cmd/x86/hob.c | 78 +
> 9 files changed, 399 insertions(+), 337 deletions(-)
> create mode 100644 arch/x86/include/asm/hob.h
> create mode 100644 arch/x86/lib/hob.c
> create mode 100644 cmd/x86/hob.c
>
> diff --git a/arch/x86/include/asm/fsp/fsp_hob.h
> b/arch/x86/include/asm/fsp/fsp_hob.h
> index 843d7b513b..3bb79c4b67 100644
> --- a/arch/x86/include/asm/fsp/fsp_hob.h
> +++ b/arch/x86/include/asm/fsp/fsp_hob.h
> @@ -7,125 +7,7 @@
> #ifndef __FSP_HOB_H__
> #define __FSP_HOB_H__
>
> -#include
> -#include
> -
> -/* Type of HOB Header */
> -#define HOB_TYPE_MEM_ALLOC 0x0002
> -#define HOB_TYPE_RES_DESC 0x0003
> -#define HOB_TYPE_GUID_EXT 0x0004
> -#define HOB_TYPE_UNUSED0xFFFE
> -#define HOB_TYPE_EOH 0x
> -
> -/*
> - * Describes the format and size of the data inside the HOB.
> - * All HOBs must contain this generic HOB header.
> - */
> -struct hob_header {
> - u16 type; /* HOB type */
> - u16 len;/* HOB length */
> - u32 reserved; /* always zero */
> -};
> -
> -/*
> - * Describes all memory ranges used during the HOB producer phase that
> - * exist outside the HOB list. This HOB type describes how memory is used,
> - * not the physical attributes of memory.
> - */
> -struct hob_mem_alloc {
> - struct hob_header hdr;
> - /*
> -* A GUID that defines the memory allocation region's type and
> purpose,
> -* as well as other fields within the memory allocation HOB. This GUID
> -* is used to define the additional data within the HOB that may be
> -* present for the memory allocation HOB. Type efi_guid is defined in
> -* InstallProtocolInterface() in the UEFI 2.0 specification.
> -*/
> - efi_guid_t name;
> - /*
> -* The base address of memory allocated by this HOB.
> -* Type phys_addr_t is defined in AllocatePages() in the UEFI 2.0
> -* specification.
> -*/
> - phys_addr_t mem_base;
> - /* The length in bytes of memory allocated by this HOB */
> - phys_size_t mem_len;
> - /*
> -* Defines the type of memory allocated by this HOB.
> -* The memory type definition follows the EFI_MEMORY_TYPE definition.
> -* Type EFI_MEMORY_TYPE is defined in AllocatePages() in the UEFI 2.0
> -* specification.
> -*/
> - enum efi_mem_type mem_type;
> - /* padding */
> - u8 reserved[4];
> -};
> -
> -/* Value of ResourceType in HOB_RES_DESC */
> -#define RES_SYS_MEM0x
> -#define RES_MMAP_IO0x0001
> -#define RES_IO 0x0002
> -#define RES_FW_DEVICE 0x0003
> -#define RES_MMAP_IO_PORT 0x0004
> -#define RES_MEM_RESERVED 0x0005
> -#define RES_IO_RESERVED0x0006
> -#define RES_MAX_MEM_TYPE 0x0007
> -
> -/*
> - * These types can be ORed together as needed.
> - *
> - * The first three enumerations describe settings
> - * The rest of the settings describe capabilities
> - */
> -#define RES_ATTR_PRESENT 0x0001
> -#define RES_ATTR_INITIALIZED 0x0002
> -#define RES_ATTR_TESTED0x0004
> -#define RES_ATTR_SINGLE_BIT_ECC0x0008
> -#define RES_ATTR_MULTIPLE_BIT_ECC 0x0010
> -#define RES_ATTR_ECC_RESERVED_10x0020
> -#define RES_ATTR_ECC_RESERVED_20x0040
> -#define RES_ATTR_READ_PROTECTED0x0080
> -#define RES_ATTR_WRITE_PROTECTED 0x0100
> -#define RES_ATTR_EXECUTION_PROTECTED 0x0200
> -#define RES_ATTR_UNCACHEABLE 0x0400
Re: [U-Boot] [PATCH v7 4/9] x86: slimbootloader: Add memory configuration
On Mon, Jul 29, 2019 at 7:35 AM Park, Aiden wrote:
>
> Slim Bootloader provides memory map info thru its HOB list pointer.
> Configure memory size and relocation memory from the HOB data, and
> provide e820 entries as well.
> - Get memory size from the memory map info HOB
> - Set available top memory lower than 4GB for U-Boot relocation
> - Provide e820 entries from the memory map info HOB
>
Reviewed-by: Andy Shevchenko
> Signed-off-by: Aiden Park
> Reviewed-by: Bin Meng
> ---
>
> Changes in v7:
> * Use for_each macro instead of while_each
> * Move for_each macro before its first use
>
> Changes in v6:
> * Change dram.c to sdram.c
> * Use EFI_GUID
> * Use a macro to do reversed search in memory map entries
> * Apply code-review comments
>
> Changes in v3:
> * Use HOB function from the common HOB library
> * Add more description
>
> arch/x86/cpu/slimbootloader/Makefile | 2 +-
> arch/x86/cpu/slimbootloader/sdram.c | 149 ++
> .../asm/arch-slimbootloader/slimbootloader.h | 53 +++
> 3 files changed, 203 insertions(+), 1 deletion(-)
> create mode 100644 arch/x86/cpu/slimbootloader/sdram.c
> create mode 100644 arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
>
> diff --git a/arch/x86/cpu/slimbootloader/Makefile
> b/arch/x86/cpu/slimbootloader/Makefile
> index 627a721e8c..9e6822a6ec 100644
> --- a/arch/x86/cpu/slimbootloader/Makefile
> +++ b/arch/x86/cpu/slimbootloader/Makefile
> @@ -2,4 +2,4 @@
> #
> # Copyright (C) 2019 Intel Corporation
>
> -obj-y += car.o slimbootloader.o
> +obj-y += car.o slimbootloader.o sdram.o
> diff --git a/arch/x86/cpu/slimbootloader/sdram.c
> b/arch/x86/cpu/slimbootloader/sdram.c
> new file mode 100644
> index 00..16a3ec6d9e
> --- /dev/null
> +++ b/arch/x86/cpu/slimbootloader/sdram.c
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Intel Corporation
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/**
> + * This returns a data pointer of memory map info from the guid hob.
> + *
> + * @return: A data pointer of memory map info hob
> + */
> +static struct sbl_memory_map_info *get_memory_map_info(void)
> +{
> + struct sbl_memory_map_info *data;
> + const efi_guid_t guid = SBL_MEMORY_MAP_INFO_GUID;
> +
> + if (!gd->arch.hob_list)
> + return NULL;
> +
> + data = hob_get_guid_hob_data(gd->arch.hob_list, NULL, &guid);
> + if (!data)
> + panic("memory map info hob not found\n");
> + if (!data->count)
> + panic("invalid number of memory map entries\n");
> +
> + return data;
> +}
> +
> +#define for_each_memory_map_entry_reversed(iter, entries) \
> + for (iter = entries->count - 1; iter >= 0; iter--) \
> + if (entries->entry[iter].type != E820_RAM) {} else
> +
> +/**
> + * This is to give usable memory region information for u-boot relocation.
> + * so search usable memory region lower than 4GB.
> + * The memory map entries from Slim Bootloader hob are already sorted.
> + *
> + * @total_size: The memory size that u-boot occupies
> + * @return: The top available memory address lower than 4GB
> + */
> +ulong board_get_usable_ram_top(ulong total_size)
> +{
> + struct sbl_memory_map_info *data;
> + int i;
> + u64 addr_start;
> + u64 addr_end;
> + ulong ram_top;
> +
> + data = get_memory_map_info();
> +
> + /**
> +* sorted memory map entries from Slim Bootloader based on physical
> +* start memory address, from low to high. So do reversed search to
> +* get highest usable, suitable size, 4KB aligned available memory
> +* under 4GB.
> +*/
> + ram_top = 0;
> + for_each_memory_map_entry_reversed(i, data) {
> + addr_start = data->entry[i].addr;
> + addr_end = addr_start + data->entry[i].size;
> +
> + if (addr_start > SZ_4G)
> + continue;
> +
> + if (addr_end > SZ_4G)
> + addr_end = SZ_4G;
> +
> + if (addr_end < total_size)
> + continue;
> +
> + /* to relocate u-boot at 4K aligned memory */
> + addr_end = rounddown(addr_end - total_size, SZ_4K);
> + if (addr_end >= addr_start) {
> + ram_top = (ulong)addr_end + total_size;
> + break;
> + }
> + }
> +
> + if (!ram_top)
> + panic("failed to find available memory for relocation!");
> +
> + return ram_top;
> +}
> +
> +/**
> + * The memory initialization has already been done in previous Slim
> Bootloader
> + * stage thru FSP-M. Instead, this sets the ram_size from the memory map info
> + * hob.
> + */
> +int dram_init(void)
> +{
> + struct sbl_memory_map_info *data;
> + int i;
> + u64 ram_size;
> +
[U-Boot] Please pull u-boot-video
Hi Tom, please pull video patches for v2019.10. Travis CI: https://travis-ci.org/vdsao/u-boot-video/builds/564743256 Thanks, Anatolij The following changes since commit 75551c8bfc9545e31ec2ce238cac3857904007b8: Merge branch '2019-07-26-ti-imports' (2019-07-27 19:50:52 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-video.git tags/video-for-2019.10 for you to fetch changes up to 970baf16d1322d3930a57fc78ddfb15d594d690c: video: arm: rpi: Bail out early if querying video information fails (2019-07-29 10:14:04 +0200) - dcu and imx7 DM_VIDEO conversion - lb070wv8 compatible in simple_panel driver - bmp_logo improvements for DM_VIDEO - EDID updates to filter supported modes - meson_dw_hdmi: support EDID mode filtering - dw_hdmi: support ddc-i2c-bus phandle for external I2C masters - fix rpi crash when firmware doesn't report connected display Fabian Vogt (1): video: arm: rpi: Bail out early if querying video information fails Heiko Schocher (2): video, simple_panel: add lg,lb070wv8 display bmp_logo: support CONFIG_DM_VIDEO Igor Opaniuk (10): video: fsl_dcu_fb: refactor init functions video: fsl_dcu_fb: add DM_VIDEO support ARM: dts: colibri_vf: Add dcu0 node colibri_vf: enable DM_VIDEO video: mxsfb: fix mxsfb fbdev binding issues ARM: dts: colibri_imx7: Fix lcdif node definition configs: colibri_imx7: enable DM_VIDEO colibri-imx6ull: support building with DM_VIDEO=y ARM: dts: colibri-imx6ull: extend lcdif node configs: colibri-imx6ull: switch to DM_VIDEO Neil Armstrong (3): edid: add edid_get_timing_validate() variant to filter out edid modes video: display: use edid_get_timing_validate() variant to filter supported EDID modes video: meson: dw-hdmi: add EDID mode filtering to only select supported modes Niklas Schulze (1): video: dw_hdmi: Add support for ddc-i2c-bus property arch/arm/dts/imx6ull-colibri.dts | 32 + arch/arm/dts/imx7-colibri.dtsi| 47 arch/arm/dts/vf-colibri-u-boot.dtsi | 4 + arch/arm/dts/vf-colibri.dtsi | 5 + arch/arm/dts/vf.dtsi | 6 + arch/arm/mach-imx/mx6/soc.c | 2 +- board/freescale/ls1021aiot/dcu.c | 9 +- board/freescale/ls1021aqds/dcu.c | 6 +- board/freescale/ls1021atwr/dcu.c | 5 +- board/toradex/colibri_vf/colibri_vf.c | 4 +- board/toradex/colibri_vf/dcu.c| 6 +- common/edid.c | 22 +++- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx7_defconfig| 2 +- configs/colibri_vf_defconfig | 2 +- drivers/video/Kconfig | 2 +- drivers/video/bcm2835.c | 4 +- drivers/video/display-uclass.c| 15 ++- drivers/video/dw_hdmi.c | 13 +++ drivers/video/fsl_dcu_fb.c| 213 -- drivers/video/meson/meson_dw_hdmi.c | 10 ++ drivers/video/mxsfb.c | 74 ++-- drivers/video/rockchip/rk_hdmi.c | 3 + drivers/video/simple_panel.c | 1 + drivers/video/sunxi/sunxi_dw_hdmi.c | 3 + include/configs/colibri-imx6ull.h | 2 +- include/display.h | 10 ++ include/dw_hdmi.h | 1 + include/edid.h| 22 include/fsl_dcu_fb.h | 12 +- tools/Makefile| 6 + tools/bmp_logo.c | 42 +-- 32 files changed, 455 insertions(+), 132 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 08/15] wdt: dw: Add driver-model support
On Mon, Jul 29, 2019 at 10:56 AM Jagan Teki wrote:
>
> Add driver-model code for designware watchdog.
> +/*
> + * Set the watchdog time interval.
> + * Counter is 32 bit.
> + */
> +static int dw_wdt_set_timeout(struct dw_wdt *dw, unsigned int timeout)
> +{
> + signed int i;
> +
> + /* calculate the timeout range value */
> + i = (log_2_n_round_up(timeout * dw->clk_rate)) - 16;
Redundant parenthesis.
> + if (i > 15)
> + i = 15;
> + if (i < 0)
> + i = 0;
Use clamp_t().
> +
> + writel((i | (i << 4)), dw->regs + DW_WDT_TORR);
> +
> + return 0;
> +}
> + ret = clk_get_by_index(dev, 0, &clk);
> + if (!ret)
> + dw->clk_rate = clk_get_rate(&clk);
> + else
> + return -EINVAL;
Why not to use traditional pattern, i.e.
if (ret)
return -ERRNO;
--
With Best Regards,
Andy Shevchenko
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Re: [U-Boot] [PATCH v2 1/7] clk: add support for clk_is_match()
Hi Tom, On 27/07/19 7:18 AM, Tom Rini wrote: > On Mon, Jun 03, 2019 at 06:52:46PM +0530, Sekhar Nori wrote: > >> Add support for clk_is_match() which is required to >> know if two clock pointers point to the same exact >> physical clock. >> >> Also add a unit test for the new API. >> >> Reviewed-by: Lokesh Vutla >> Signed-off-by: Sekhar Nori >> Reviewed-by: Simon Glass >> --- >> drivers/clk/clk-uclass.c | 13 + >> include/clk.h| 13 + >> test/dm/clk.c| 1 + >> 3 files changed, 27 insertions(+) > > This test currently fails in sandbox, please address, thanks! Do you have this patch applied? https://patchwork.ozlabs.org/patch/1130714/ The test had passed for me when I submitted the patches. Later on I discovered the issue the patch above fixes (on actual hardware). This might be the same thing you are seeing on sandbox too. Thanks, Sekhar ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/4] video: fsl_dcu_fb: refactor init functions
On Thu, 25 Jul 2019 15:22:26 +0200 Anatolij Gustschin ag...@denx.de wrote: ... > Changes in v2: > > - fix build breakage with ls1021aiot and ls1021atwr board configs > > board/freescale/ls1021aiot/dcu.c | 9 +-- > board/freescale/ls1021aqds/dcu.c | 6 +- > board/freescale/ls1021atwr/dcu.c | 5 +- > board/toradex/colibri_vf/dcu.c | 6 +- > drivers/video/fsl_dcu_fb.c | 107 +-- > include/fsl_dcu_fb.h | 12 +++- > 6 files changed, 85 insertions(+), 60 deletions(-) Applied to u-boot-video/master, thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/2] rockchip: rk3328: enable DMA for MMCs at Rock64
DMA for MMCs can be enabled, since the previous patch fixes
the following issue in SPL:
Trying to boot from MMC1
spl: mmc init failed with error: -110
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Signed-off-by: Matwey V. Kornilov
---
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index b077436cbc..928911f6a6 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -25,10 +25,8 @@
&emmc {
u-boot,dm-pre-reloc;
- fifo-mode;
};
&sdmmc {
u-boot,dm-pre-reloc;
- fifo-mode;
};
--
2.16.4
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[U-Boot] [PATCH 1/2] rockchip: rk3328: set DDR as non-secure in SPL
From: Kever Yang
Set DDR as non-secure so that MMC DMA can access.
Signed-off-by: Kever Yang
[cherry picked from
https://github.com/rockchip-linux/u-boot/commit/bfe741ab9eb4f97371a4e6c24185419d57a3a75f
and
https://github.com/rockchip-linux/u-boot/commit/73d952acc8cc1ddad6652ba71895d9fe928c1e4b
with minor modifications]
Signed-off-by: Matwey V. Kornilov
---
arch/arm/mach-rockchip/rk3328/rk3328.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
b/arch/arm/mach-rockchip/rk3328/rk3328.c
index 592f287613..c2448d7273 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -16,6 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define CRU_BASE 0xFF44
#define GRF_BASE 0xFF10
#define UART2_BASE 0xFF13
+#define FW_DDR_CON_REG 0xFF7C0040
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "rksdmmc@ff52",
@@ -46,8 +47,12 @@ struct mm_region *mem_map = rk3328_mem_map;
int arch_cpu_init(void)
{
+#ifdef CONFIG_SPL_BUILD
/* We do some SoC one time setting here. */
+ /* Disable the ddr secure region setting to make it non-secure */
+ rk_setreg(FW_DDR_CON_REG, 0x200);
+#endif
return 0;
}
--
2.16.4
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Re: [U-Boot] [RFC 0/4] Convert fsl_dcu_fb to DM_VIDEO
On Mon, 10 Jun 2019 14:47:48 +0300 Igor Opaniuk igor.opan...@gmail.com wrote: ... > Also enables DM_VIDEO by default for Colibri VF. > > > Igor Opaniuk (4): > video: fsl_dcu_fb: refactor init functions > video: fsl_dcu_fb: add DM_VIDEO support > ARM: dts: colibri_vf: Add dcu0 node > colibri_vf: enable DM_VIDEO > > arch/arm/dts/vf-colibri-u-boot.dtsi | 4 + > arch/arm/dts/vf-colibri.dtsi | 5 + > arch/arm/dts/vf.dtsi | 6 + > board/freescale/ls1021aqds/dcu.c | 6 +- > board/toradex/colibri_vf/colibri_vf.c | 4 +- > board/toradex/colibri_vf/dcu.c| 6 +- > configs/colibri_vf_defconfig | 2 +- > drivers/video/Kconfig | 2 +- > drivers/video/fsl_dcu_fb.c| 213 ++ > include/fsl_dcu_fb.h | 12 +- > 10 files changed, 187 insertions(+), 73 deletions(-) Series applied to u-boot-video/master, thanks! Patch 1/4 replaced by [1]. [1] http://patchwork.ozlabs.org/patch/1136894 -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] video: arm: rpi: Bail out early if querying video information fails
On Thu, 11 Jul 2019 16:56:24 +0200 matthias@kernel.org matthias@kernel.org wrote: ... > drivers/video/bcm2835.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Applied to u-boot-video/master, thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] Enabled DM_VIDEO for Colibri iMX7 NAND/iMX6ULL
On Wed, 19 Jun 2019 11:47:04 +0300 Igor Opaniuk igor.opan...@gmail.com wrote: ... > Igor Opaniuk (6): > video: mxsfb: fix mxsfb fbdev binding issues > ARM: dts: colibri_imx7: Fix lcdif node definition > configs: colibri_imx7: enable DM_VIDEO > colibri-imx6ull: support building with DM_VIDEO=y > ARM: dts: colibri-imx6ull: extend lcdif node > configs: colibri-imx6ull: switch to DM_VIDEO > > arch/arm/dts/imx6ull-colibri.dts | 32 + > arch/arm/dts/imx7-colibri.dtsi| 47 +++- > arch/arm/mach-imx/mx6/soc.c | 2 +- > configs/colibri-imx6ull_defconfig | 2 +- > configs/colibri_imx7_defconfig| 2 +- > drivers/video/mxsfb.c | 74 ++- > include/configs/colibri-imx6ull.h | 2 +- > 7 files changed, 124 insertions(+), 37 deletions(-) Applied to u-boot-video/master, thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] Enabled DM_VIDEO for Colibri iMX7 NAND/iMX6ULL
Hi Igor, On Thu, 11 Jul 2019 13:59:35 +0300 Igor Opaniuk igor.opan...@gmail.com wrote: ... > Are there any objections from your side to get this patch-series applied? > Please let me know if you have any comments/suggestions. Sorry for delay, my build tests passed now. I've queued the series for v2019.10. Thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/1] video: dw_hdmi: Add support for ddc-i2c-bus property
On Sat, 27 Jul 2019 12:07:13 + Niklas Schulze m...@jns.io wrote: ... > drivers/video/dw_hdmi.c | 13 + > drivers/video/meson/meson_dw_hdmi.c | 3 +++ > drivers/video/rockchip/rk_hdmi.c| 3 +++ > drivers/video/sunxi/sunxi_dw_hdmi.c | 3 +++ > include/dw_hdmi.h | 1 + > 5 files changed, 23 insertions(+) Applied to u-boot-video/master, thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] video: add support for EDID timings validation
On Thu, 4 Jul 2019 15:52:05 +0200 Neil Armstrong narmstr...@baylibre.com wrote: ... > common/edid.c | 22 +++--- > drivers/video/display-uclass.c | 15 ++- > drivers/video/meson/meson_dw_hdmi.c | 7 +++ > include/display.h | 10 ++ > include/edid.h | 22 ++ > 5 files changed, 72 insertions(+), 4 deletions(-) Series applied to u-boot-video/master, thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] Enabled DM_VIDEO for Colibri iMX7 NAND/iMX6ULL
Hi Anatlolij, On Mon, Jul 29, 2019 at 12:27 PM Anatolij Gustschin wrote: > > Hi Igor, > > On Thu, 11 Jul 2019 13:59:35 +0300 > Igor Opaniuk igor.opan...@gmail.com wrote: > ... > > Are there any objections from your side to get this patch-series applied? > > Please let me know if you have any comments/suggestions. > > Sorry for delay, my build tests passed now. I've queued the series > for v2019.10. Thanks! > > -- > Anatolij No problem :), thanks a lot for looking into this and applying the series! -- Best regards - Freundliche Grüsse - Meilleures salutations Igor Opaniuk mailto: igor.opan...@gmail.com skype: igor.opanyuk +380 (93) 836 40 67 http://ua.linkedin.com/in/iopaniuk ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/5] nitrogen6x device tree migration
Hi Troy, On 29/07/19 02:59, Troy Kisky wrote: > On 7/27/2019 5:21 AM, Stefano Babic wrote: >> +++ >> arch/arm/dts/imx53-m53menlo-u-boot.dtsi |5 + >> arch/arm/dts/imx6dl-dhcom-pdk2.dts| 14 + >> arch/arm/dts/imx6q-dhcom-pdk2.dts | 141 +- >> arch/arm/dts/imx6q-display5-u-boot.dtsi | 44 +++ >> arch/arm/dts/imx6q-display5.dts | 352 >> +++ > > Any comment on this patchset dated June 28 ? > http://patchwork.ozlabs.org/patch/1123788/ > No, there is nothing wrong - just when I merge this set with some other patches, I had conflicts that I quickly solved, but I got travis' errors. https://travis-ci.org/sbabic/u-boot-imx/jobs/561080530 Mainly because something wrong in DTS' Makefile, it is a small thing. As I had to merge a lot of other pathces, I have just put yours aside and I wanted to check what was wrong by rebasing, but I got no time for it. > which is just a rebase of this one dated May 8th > > http://patchwork.ozlabs.org/patch/1097252/ > > > Should I rebase this to master branch ? If you do it, you make me a pleasure - thanks ! I will then apply them directly on top of -master. Thanks again, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] video: arm: rpi: Avoid crash without HDMI monitor connected
On Fri, 26 Jul 2019 13:54:30 +0100 Andre Przywara andre.przyw...@arm.com wrote: ... > I saw this on the RPi4 (with Andrei's v2 series), but it looks like this > would happen on the other boards as well. Thanks, but I've applied [1] instead of this patch. [1] http://patchwork.ozlabs.org/patch/1130837 -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3] x86: ich-spi: Convert driver to spi-mem ops
With the introduction of the new spi-mem model operations changed
slightly. The new spi-mem operations make things a bit easier to
handle for ich-spi flash interface. This patch converts the ich-spi
driver by using spi-mem operations.
---
Changes in v2:
- make 2 routines static; update commit message a little bit
Changes in v3:
- update erase op code handling to work with latest master
spi-nor driver
Signed-off-by: Bernhard Messerklinger
---
drivers/spi/ich.c | 267 +-
drivers/spi/ich.h | 9 +-
2 files changed, 100 insertions(+), 176 deletions(-)
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 03531a8c0c..179f801d42 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -14,6 +14,8 @@
#include
#include
#include
+#include
+#include
#include "ich.h"
@@ -171,18 +173,6 @@ static int ich_init_controller(struct udevice *dev,
return 0;
}
-static inline void spi_use_out(struct spi_trans *trans, unsigned bytes)
-{
- trans->out += bytes;
- trans->bytesout -= bytes;
-}
-
-static inline void spi_use_in(struct spi_trans *trans, unsigned bytes)
-{
- trans->in += bytes;
- trans->bytesin -= bytes;
-}
-
static void spi_lock_down(struct ich_spi_platdata *plat, void *sbase)
{
if (plat->ich_version == ICHV_7) {
@@ -213,47 +203,12 @@ static bool spi_lock_status(struct ich_spi_platdata
*plat, void *sbase)
return lock != 0;
}
-static void spi_setup_type(struct spi_trans *trans, int data_bytes)
-{
- trans->type = 0xFF;
-
- /* Try to guess spi type from read/write sizes */
- if (trans->bytesin == 0) {
- if (trans->bytesout + data_bytes > 4)
- /*
-* If bytesin = 0 and bytesout > 4, we presume this is
-* a write data operation, which is accompanied by an
-* address.
-*/
- trans->type = SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS;
- else
- trans->type = SPI_OPCODE_TYPE_WRITE_NO_ADDRESS;
- return;
- }
-
- if (trans->bytesout == 1) { /* and bytesin is > 0 */
- trans->type = SPI_OPCODE_TYPE_READ_NO_ADDRESS;
- return;
- }
-
- if (trans->bytesout == 4) /* and bytesin is > 0 */
- trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS;
-
- /* Fast read command is called with 5 bytes instead of 4 */
- if (trans->out[0] == SPI_OPCODE_FAST_READ && trans->bytesout == 5) {
- trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS;
- --trans->bytesout;
- }
-}
-
static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans,
bool lock)
{
uint16_t optypes;
uint8_t opmenu[ctlr->menubytes];
- trans->opcode = trans->out[0];
- spi_use_out(trans, 1);
if (!lock) {
/* The lock is off, so just use index 0. */
ich_writeb(ctlr, trans->opcode, ctlr->opmenu);
@@ -285,12 +240,7 @@ static int spi_setup_opcode(struct ich_spi_priv *ctlr,
struct spi_trans *trans,
optypes = ich_readw(ctlr, ctlr->optype);
optype = (optypes >> (opcode_index * 2)) & 0x3;
- if (trans->type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS &&
- optype == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS &&
- trans->bytesout >= 3) {
- /* We guessed wrong earlier. Fix it up. */
- trans->type = optype;
- }
+
if (optype != trans->type) {
printf("ICH SPI: Transaction doesn't fit type %d\n",
optype);
@@ -300,26 +250,6 @@ static int spi_setup_opcode(struct ich_spi_priv *ctlr,
struct spi_trans *trans,
}
}
-static int spi_setup_offset(struct spi_trans *trans)
-{
- /* Separate the SPI address and data */
- switch (trans->type) {
- case SPI_OPCODE_TYPE_READ_NO_ADDRESS:
- case SPI_OPCODE_TYPE_WRITE_NO_ADDRESS:
- return 0;
- case SPI_OPCODE_TYPE_READ_WITH_ADDRESS:
- case SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS:
- trans->offset = ((uint32_t)trans->out[0] << 16) |
- ((uint32_t)trans->out[1] << 8) |
- ((uint32_t)trans->out[2] << 0);
- spi_use_out(trans, 3);
- return 1;
- default:
- printf("Unrecognized SPI transaction type %#x\n", trans->type);
- return -EPROTO;
- }
-}
-
/*
* Wait for up to 6s til status register bit(s) turn 1 (in case wait_til_set
* below is true) or 0. In case the wait was for the bit(s) to set - write
@@ -350,7 +280,7 @@ static int ich_status_poll(struct ich_spi_priv *ctlr, u16
bitmask,
return -ETIMEDOUT;
}
-void ich_spi_config_opco
Re: [U-Boot] [PATCH] cmd: reset: add parameters to specify reboot_mode
Simon,
On Wed, Jul 10, 2019 at 8:50 PM Simon Goldschmidt
wrote:
>
> Simon,
>
> I know I've slept for a while before retriggering this, but...
>
> Am 04.05.2019 um 20:23 schrieb Simon Goldschmidt:
> > Am 03.05.2019 um 23:10 schrieb Simon Glass:
> >> Hi Simon,
> >>
> >> On Fri, 3 May 2019 at 14:43, Marek Vasut wrote:
> >>>
> >>> On 5/3/19 10:40 PM, Simon Goldschmidt wrote:
>
>
> On 03.05.19 22:37, Marek Vasut wrote:
> > On 5/3/19 10:33 PM, Simon Goldschmidt wrote:
> >>
> >>
> >> On 03.05.19 22:27, Marek Vasut wrote:
> >>> On 5/3/19 10:25 PM, Simon Goldschmidt wrote:
> This patch adds parameter support for the 'reset' command to specify
> the reboot mode (cold vs. warm).
>
> Checking these parameters is implemented in the DM implementation.
>
> Signed-off-by: Simon Goldschmidt
> ---
>
> cmd/boot.c | 4 ++--
> drivers/sysreset/sysreset-uclass.c | 17 -
> 2 files changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/cmd/boot.c b/cmd/boot.c
> index 9150fce80b..c3f33a9ca3 100644
> --- a/cmd/boot.c
> +++ b/cmd/boot.c
> @@ -56,9 +56,9 @@ U_BOOT_CMD(
> #endif
> U_BOOT_CMD(
> -reset, 1, 0,do_reset,
> +reset, 2, 0,do_reset,
> "Perform RESET of the CPU",
> -""
> +"[] - type of reboot"
> );
> #ifdef CONFIG_CMD_POWEROFF
> diff --git a/drivers/sysreset/sysreset-uclass.c
> b/drivers/sysreset/sysreset-uclass.c
> index ad831c703a..fbda3f44f2 100644
> --- a/drivers/sysreset/sysreset-uclass.c
> +++ b/drivers/sysreset/sysreset-uclass.c
> @@ -111,9 +111,24 @@ void reset_cpu(ulong addr)
> int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *
> const
> argv[])
> {
> +enum sysreset_t reboot_mode = SYSRESET_COLD;
> +
> +if (argc > 1 && argv[1]) {
> +switch (*argv[1]) {
> +case 'w':
> +reboot_mode = SYSRESET_WARM;
> +printf("warm ");
> +break;
> +case 'c':
> +reboot_mode = SYSRESET_COLD;
> +printf("cold ");
> +break;
> >>
> >> Please can we have a pytest for this command?
> >
> > There's 'test_sandbox_exit.py' that seems to test that the "reset"
> > command exits sandbox process. How would I test differing between "warm"
> > and "cold" exit?
>
> If this request for a test is what remains, can you please elaborate on
> what I should write to get this accepted?
Sorry, but I can't implement a test without you telling me what kind
of test you mean.
I'll be sending v2 (that removes the extra printf's from above) without
such a test and hope it can still be accepted.
Regards,
Simon
>
> Thanks,
> Simon
>
> >
> > Regards,
> > Simon
> >
> >>
> >> Regards,
> >> Simon
> >>
> >>>
> >>> This looks like a platform or driver specific stuff ?
> >>
> >> Ouch, I just saw the extra printf might have to be removed in a v2...
> >>
> >> Anyway, except for that, I don't think it's platform or driver
> >> specific.
> >> It's just a way to make the cmd 'reset' take arguments that map to enum
> >> sysreset_t.
> >
> > Cold vs. Warm reset is socfpga specific. The reset driver should
> > probably somehow register supported reset modes (warm/cold) with the
> > reset core code.
>
> But it's a thing the UCLASS_SYSRESET already exposes. I haven't added
> the enum values for that, I merely exposed them to the cmd "API". I
> can't see anything socfpga specific about it.
> >>>
> >>> Ah, then socfpga just maps to that "API" very well, nice. I wasn't aware
> >>> of it.
> >>>
> >>> --
> >>> Best regards,
> >>> Marek Vasut
> >
>
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[U-Boot] [PATCH] pinctrl: renesas: fix R-Car gpio0_00 operation fails with 'gpio -input' command
From: titron
Fix GPIO bank 0 pin 0 request/release off by one error. Without this
patch, it is not possible to request/release GPIO bank 0 pin 0.
Signed-off-by: Tiezhuang Dong
Signed-off-by: Marek Vasut
Cc: Eugeniu Rosca
Cc: Yoshihiro Shimoda
---
drivers/pinctrl/renesas/pfc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index d1271dad44..f2973bebef 100644
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -469,7 +469,7 @@ static int sh_pfc_gpio_request_enable(struct udevice *dev,
const struct sh_pfc_pin *pin = NULL;
int i, ret, idx;
- for (i = 1; i < pfc->info->nr_pins; i++) {
+ for (i = 0; i < pfc->info->nr_pins; i++) {
if (priv->pfc.info->pins[i].pin != pin_selector)
continue;
@@ -505,7 +505,7 @@ static int sh_pfc_gpio_disable_free(struct udevice *dev,
const struct sh_pfc_pin *pin = NULL;
int i, idx;
- for (i = 1; i < pfc->info->nr_pins; i++) {
+ for (i = 0; i < pfc->info->nr_pins; i++) {
if (priv->pfc.info->pins[i].pin != pin_selector)
continue;
--
2.20.1
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Re: [U-Boot] [PATCH v2 1/7] clk: add support for clk_is_match()
On Mon, Jul 29, 2019 at 02:43:13PM +0530, Sekhar Nori wrote: > Hi Tom, > > On 27/07/19 7:18 AM, Tom Rini wrote: > > On Mon, Jun 03, 2019 at 06:52:46PM +0530, Sekhar Nori wrote: > > > >> Add support for clk_is_match() which is required to > >> know if two clock pointers point to the same exact > >> physical clock. > >> > >> Also add a unit test for the new API. > >> > >> Reviewed-by: Lokesh Vutla > >> Signed-off-by: Sekhar Nori > >> Reviewed-by: Simon Glass > >> --- > >> drivers/clk/clk-uclass.c | 13 + > >> include/clk.h| 13 + > >> test/dm/clk.c| 1 + > >> 3 files changed, 27 insertions(+) > > > > This test currently fails in sandbox, please address, thanks! > > Do you have this patch applied? > > https://patchwork.ozlabs.org/patch/1130714/ > > The test had passed for me when I submitted the patches. Later on I > discovered the issue the patch above fixes (on actual hardware). > > This might be the same thing you are seeing on sandbox too. Yes, that patch is applied (I just re-checked), thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: ehci-omap: Add Support DM_USB and OF_CONTROL
On Sun, Jun 30, 2019 at 5:21 PM Adam Ford wrote:
>
> The omap3.dtsi file shows the usbhshost node with two sub-nodes
> for ohci and ehci. This patch file creates the usbhshost, and
> pulls the portX-mode information. It then locates the EHCI
> sub-node, and initializes the EHCI controller with the info
> pulled from the usbhshost node.
>
> There is still more to do since there isn't an actual link
> between the 'phys' reference and the corresponding phy driver,
> and there is no nop-xceiv driver yet.
>
> In the meantime, the older style reference to
> CONFIG_OMAP_EHCI_PHYx_RESET_GPIO is still needed to pull
> the phy out of reset until the phy driver is completed and the
> phandle reference is made.
>
> Signed-off-by: Adam Ford
>
Marek,
Some subsequent patches that were depending on this have been applied
already, but they cannot be really useful until this patch is applied.
Is there any chance it can be applied? It will give some of the OMAP3
boards the USB EHCI functionality which has been lost for a little
while.
thank you,
adam
> diff --git a/arch/arm/include/asm/ehci-omap.h
> b/arch/arm/include/asm/ehci-omap.h
> index 1549f7bf21..f970bba937 100644
> --- a/arch/arm/include/asm/ehci-omap.h
> +++ b/arch/arm/include/asm/ehci-omap.h
> @@ -123,6 +123,7 @@ struct omap_ehci {
> u32 insreg08; /* 0xb0 */
> };
>
> +#if !CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)
> /*
> * FIXME: forward declaration of this structs needed because omap got the
> * ehci implementation backwards. move out ehci_hcd_x from board files
> @@ -133,5 +134,6 @@ struct ehci_hcor;
> int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
>struct ehci_hccr **hccr, struct ehci_hcor **hcor);
> int omap_ehci_hcd_stop(void);
> +#endif
>
> #endif /* _OMAP_COMMON_EHCI_H_ */
> diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
> index ab459c8cc9..bf83a4adb3 100644
> --- a/drivers/usb/host/ehci-omap.c
> +++ b/drivers/usb/host/ehci-omap.c
> @@ -9,7 +9,6 @@
> * Shashi Ranjan
> *
> */
> -
> #include
> #include
> #include
> @@ -18,6 +17,10 @@
> #include
> #include
> #include
> +#include
> +#include
> +#include
> +#include
>
> #include "ehci.h"
>
> @@ -177,8 +180,13 @@ int omap_ehci_hcd_stop(void)
> * Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1
> * See there for additional Copyrights.
> */
> +#if !CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)
> +
> int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
>struct ehci_hccr **hccr, struct ehci_hcor **hcor)
> +#else
> +int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata)
> +#endif
> {
> int ret;
> unsigned int i, reg = 0, rev = 0;
> @@ -285,10 +293,130 @@ int omap_ehci_hcd_init(int index, struct
> omap_usbhs_board_data *usbhs_pdata,
> for (i = 0; i < OMAP_HS_USB_PORTS; i++)
> if (is_ehci_phy_mode(usbhs_pdata->port_mode[i]))
> omap_ehci_soft_phy_reset(i);
> -
> +#if !CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)
> *hccr = (struct ehci_hccr *)(OMAP_EHCI_BASE);
> *hcor = (struct ehci_hcor *)(OMAP_EHCI_BASE + 0x10);
> +#endif
>
> debug("OMAP EHCI init done\n");
> return 0;
> }
> +
> +#if CONFIG_IS_ENABLED(DM_USB)
> +
> +struct ehci_omap_priv_data {
> + struct ehci_ctrl ctrl;
> + struct omap_ehci *ehci;
> +#ifdef CONFIG_DM_REGULATOR
> + struct udevice *vbus_supply;
> +#endif
> + enum usb_init_type init_type;
> + int portnr;
> + struct phy phy[OMAP_HS_USB_PORTS];
> + int nports;
> +};
> +
> +static struct omap_usbhs_board_data usbhs_bdata = {
> + .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
> + .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
> + .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
> +};
> +
> +/* Match this order enums usbhs_omap_port_mode */
> +static char *phy_strings[] = {
> + "",
> + "ehci-phy",
> + "ehci-tll",
> + "ehci-hsic",
> +};
> +
> +static int find_phy_mode(const char *phy_type)
> +{
> + int i;
> +
> + for (i = 0; i < OMAP_HS_USB_PORTS; i++) {
> + if (!strcmp(phy_type, phy_strings[i]))
> + return i;
> + }
> + return 0;
> +}
> +
> +static const struct ehci_ops omap_ehci_ops = {
> +};
> +
> +static int ehci_usb_probe(struct udevice *dev)
> +{
> + struct usb_platdata *plat = dev_get_platdata(dev);
> + const void *fdt = gd->fdt_blob;
> + struct omap_ehci *ehci;
> + struct ehci_omap_priv_data *priv = dev_get_priv(dev);
> + struct ehci_hccr *hccr;
> + struct ehci_hcor *hcor;
> + ofnode node;
> + ofnode parent_node = dev->node;
> + int ret = -1;
> + int off, i;
> + const char *mode;
> + char prop[11];
> +
> + priv->ehci = (struct o
Re: [U-Boot] [PATCH] usb: ehci-omap: Add Support DM_USB and OF_CONTROL
On 7/29/19 2:16 PM, Adam Ford wrote: > On Sun, Jun 30, 2019 at 5:21 PM Adam Ford wrote: >> >> The omap3.dtsi file shows the usbhshost node with two sub-nodes >> for ohci and ehci. This patch file creates the usbhshost, and >> pulls the portX-mode information. It then locates the EHCI >> sub-node, and initializes the EHCI controller with the info >> pulled from the usbhshost node. >> >> There is still more to do since there isn't an actual link >> between the 'phys' reference and the corresponding phy driver, >> and there is no nop-xceiv driver yet. >> >> In the meantime, the older style reference to >> CONFIG_OMAP_EHCI_PHYx_RESET_GPIO is still needed to pull >> the phy out of reset until the phy driver is completed and the >> phandle reference is made. >> >> Signed-off-by: Adam Ford >> > > Marek, > > Some subsequent patches that were depending on this have been applied > already, but they cannot be really useful until this patch is applied. > Is there any chance it can be applied? It will give some of the OMAP3 > boards the USB EHCI functionality which has been lost for a little > while. Sure, I am kinda busy and don't have enough free time to cope with this. Moreover, u-boot-usb/master fails to build: https://travis-ci.org/marex/u-boot-usb/builds/563567738 Can you take a look whether it's this patchset that causes it ? ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PULL] u-boot-socfpga/master
The following changes since commit 0de815356474912ef5bef9a69f0327a5a93bb2c2: Merge branch '2019-07-17-master-imports' (2019-07-18 11:31:37 -0400) are available in the Git repository at: git://git.denx.de/u-boot-socfpga.git master for you to fetch changes up to a89c2adc3d2834a7c79c1685155a8b8952cf77f4: fpga: arria10: Fix error in fpga pin configuration (2019-07-21 12:47:13 +0200) Dalon Westergreen (1): fpga: arria10: Fix error in fpga pin configuration Simon Goldschmidt (7): arm: socfpga: fix 3 boards missing env var "socfpga_legacy_reset_compat" dm: ddr: socfpga: fix gen5 ddr driver to not use bss arm: socfpga: rst: add register definition for cold reset sysreset: socfpga: gen5: add sysreset driver sysreset: socfpga: stratix10: add sysreset driver sysreset: add support for socfpga sysreset spl: kconfig: separate sysreset and firmware drivers from misc MAINTAINERS|1 + arch/arm/Kconfig |4 + arch/arm/mach-socfpga/Makefile |1 - arch/arm/mach-socfpga/include/mach/reset_manager.h |1 + arch/arm/mach-socfpga/reset_manager.c | 41 - configs/evb-rk3036_defconfig |1 + configs/kylin-rk3036_defconfig |1 + configs/sandbox_spl_defconfig |1 + drivers/Makefile |6 +- drivers/ddr/altera/sequencer.c | 1346 +++ drivers/ddr/altera/sequencer.h | 36 +++- drivers/firmware/Kconfig |7 +- drivers/fpga/socfpga_arria10.c |9 +- drivers/reset/reset-socfpga.c | 19 ++ drivers/sysreset/Kconfig | 15 ++ drivers/sysreset/Makefile |2 + drivers/sysreset/sysreset_socfpga.c| 56 ++ drivers/sysreset/sysreset_socfpga_s10.c| 29 +++ include/configs/socfpga_dbm_soc1.h |3 +- include/configs/socfpga_stratix10_socdk.h |3 +- include/configs/socfpga_vining_fpga.h |1 + 21 files changed, 889 insertions(+), 694 deletions(-) delete mode 100644 arch/arm/mach-socfpga/reset_manager.c create mode 100644 drivers/sysreset/sysreset_socfpga.c create mode 100644 drivers/sysreset/sysreset_socfpga_s10.c ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] sifive: riscv: streamline HiFive Unleashed configuration infrastructure
This patch is intended to update the current configuration implementation of
HiFive
Unleashed board so that it is as per the guidelines provided in U-boot's
doc/README.kconfig.
The board has a FU540-C000 SoC built around U54-MC Core complex.
This patch is based on the commit 75551c8bfc95 ("Merge branch
'2019-07-26-ti-imports'")
in master branch of repo[1] and is tested with OpenSBI to use the dtb passed as
argument
in FW_PAYLOAD_FDT_PATH from the mainline kernel and boot's linux image over
tftp.
The patch is available for testing at dev/sagark/sifive_u540defconfig branch
here [2].
[1] http://git.denx.de/u-boot-riscv.git
[2] https://github.com/sagsifive/u-boot
Summary:
-Update TARGET in board select menu.
-Update SYS_CPU from generic to u54-mc.
-Added SYS_SOC.
-Update SYS_BOARD from fu540 to hifive_unleashed.
-Update SYS_CONFIG_NAME from sifive-u540 to hifive_unleashed .
-Update MAINTAINERS file with relevant entries corresponding to the above
changes.
This patch will conflict with few patches which are already submitted for
review,
it would be good if U-boot folks would suggest something accordingly.
Sagar Shrikant Kadam (1):
sifive: riscv: update Hifive Unleashed configuration infrastructure
arch/riscv/Kconfig | 6 +-
arch/riscv/cpu/generic/Kconfig | 12 ---
arch/riscv/cpu/generic/Makefile | 6 --
arch/riscv/cpu/generic/cpu.c | 35 ---
arch/riscv/cpu/generic/dram.c| 37 ---
arch/riscv/cpu/u54-mc/Kconfig| 12 +++
arch/riscv/cpu/u54-mc/Makefile | 6 ++
arch/riscv/cpu/u54-mc/cpu.c | 35 +++
arch/riscv/cpu/u54-mc/dram.c | 37 +++
arch/riscv/include/asm/arch-fu540-c000/clk.h | 14 +++
arch/riscv/include/asm/arch-generic/clk.h| 14 ---
board/sifive/fu540/Kconfig | 49 --
board/sifive/fu540/MAINTAINERS | 9 --
board/sifive/fu540/Makefile | 5 -
board/sifive/fu540/fu540.c | 139 ---
board/sifive/hifive_unleashed/Kconfig| 52 ++
board/sifive/hifive_unleashed/MAINTAINERS| 9 ++
board/sifive/hifive_unleashed/Makefile | 5 +
board/sifive/hifive_unleashed/fu540.c| 139 +++
configs/hifive_unleashed_defconfig | 11 +++
configs/sifive_fu540_defconfig | 11 ---
include/configs/hifive_unleashed.h | 47 +
include/configs/sifive-fu540.h | 47 -
23 files changed, 370 insertions(+), 367 deletions(-)
delete mode 100644 arch/riscv/cpu/generic/Kconfig
delete mode 100644 arch/riscv/cpu/generic/Makefile
delete mode 100644 arch/riscv/cpu/generic/cpu.c
delete mode 100644 arch/riscv/cpu/generic/dram.c
create mode 100644 arch/riscv/cpu/u54-mc/Kconfig
create mode 100644 arch/riscv/cpu/u54-mc/Makefile
create mode 100644 arch/riscv/cpu/u54-mc/cpu.c
create mode 100644 arch/riscv/cpu/u54-mc/dram.c
create mode 100644 arch/riscv/include/asm/arch-fu540-c000/clk.h
delete mode 100644 arch/riscv/include/asm/arch-generic/clk.h
delete mode 100644 board/sifive/fu540/Kconfig
delete mode 100644 board/sifive/fu540/MAINTAINERS
delete mode 100644 board/sifive/fu540/Makefile
delete mode 100644 board/sifive/fu540/fu540.c
create mode 100644 board/sifive/hifive_unleashed/Kconfig
create mode 100644 board/sifive/hifive_unleashed/MAINTAINERS
create mode 100644 board/sifive/hifive_unleashed/Makefile
create mode 100644 board/sifive/hifive_unleashed/fu540.c
create mode 100644 configs/hifive_unleashed_defconfig
delete mode 100644 configs/sifive_fu540_defconfig
create mode 100644 include/configs/hifive_unleashed.h
delete mode 100644 include/configs/sifive-fu540.h
--
2.7.4
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[U-Boot] [PATCH] sifive: riscv: update Hifive Unleashed configuration infrastructure
This patch aligns the current implementation of HiFive Unleashed
board configuration framework with the one described in doc/README.kconfig.
Signed-off-by: Sagar Shrikant Kadam
---
arch/riscv/Kconfig | 6 +-
arch/riscv/cpu/generic/Kconfig | 12 ---
arch/riscv/cpu/generic/Makefile | 6 --
arch/riscv/cpu/generic/cpu.c | 35 ---
arch/riscv/cpu/generic/dram.c| 37 ---
arch/riscv/cpu/u54-mc/Kconfig| 12 +++
arch/riscv/cpu/u54-mc/Makefile | 6 ++
arch/riscv/cpu/u54-mc/cpu.c | 35 +++
arch/riscv/cpu/u54-mc/dram.c | 37 +++
arch/riscv/include/asm/arch-fu540-c000/clk.h | 14 +++
arch/riscv/include/asm/arch-generic/clk.h| 14 ---
board/sifive/fu540/Kconfig | 49 --
board/sifive/fu540/MAINTAINERS | 9 --
board/sifive/fu540/Makefile | 5 -
board/sifive/fu540/fu540.c | 139 ---
board/sifive/hifive_unleashed/Kconfig| 52 ++
board/sifive/hifive_unleashed/MAINTAINERS| 9 ++
board/sifive/hifive_unleashed/Makefile | 5 +
board/sifive/hifive_unleashed/fu540.c| 139 +++
configs/hifive_unleashed_defconfig | 11 +++
configs/sifive_fu540_defconfig | 11 ---
include/configs/hifive_unleashed.h | 47 +
include/configs/sifive-fu540.h | 47 -
23 files changed, 370 insertions(+), 367 deletions(-)
delete mode 100644 arch/riscv/cpu/generic/Kconfig
delete mode 100644 arch/riscv/cpu/generic/Makefile
delete mode 100644 arch/riscv/cpu/generic/cpu.c
delete mode 100644 arch/riscv/cpu/generic/dram.c
create mode 100644 arch/riscv/cpu/u54-mc/Kconfig
create mode 100644 arch/riscv/cpu/u54-mc/Makefile
create mode 100644 arch/riscv/cpu/u54-mc/cpu.c
create mode 100644 arch/riscv/cpu/u54-mc/dram.c
create mode 100644 arch/riscv/include/asm/arch-fu540-c000/clk.h
delete mode 100644 arch/riscv/include/asm/arch-generic/clk.h
delete mode 100644 board/sifive/fu540/Kconfig
delete mode 100644 board/sifive/fu540/MAINTAINERS
delete mode 100644 board/sifive/fu540/Makefile
delete mode 100644 board/sifive/fu540/fu540.c
create mode 100644 board/sifive/hifive_unleashed/Kconfig
create mode 100644 board/sifive/hifive_unleashed/MAINTAINERS
create mode 100644 board/sifive/hifive_unleashed/Makefile
create mode 100644 board/sifive/hifive_unleashed/fu540.c
create mode 100644 configs/hifive_unleashed_defconfig
delete mode 100644 configs/sifive_fu540_defconfig
create mode 100644 include/configs/hifive_unleashed.h
delete mode 100644 include/configs/sifive-fu540.h
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 8cfc7d0..82891fd 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -17,7 +17,7 @@ config TARGET_MICROCHIP_ICICLE
config TARGET_QEMU_VIRT
bool "Support QEMU Virt Board"
-config TARGET_SIFIVE_FU540
+config TARGET_SIFIVE_HIFIVE_UNLEASHED
bool "Support SiFive FU540 Board"
endchoice
@@ -52,11 +52,11 @@ config SPL_SYS_DCACHE_OFF
source "board/AndesTech/ax25-ae350/Kconfig"
source "board/emulation/qemu-riscv/Kconfig"
source "board/microchip/mpfs_icicle/Kconfig"
-source "board/sifive/fu540/Kconfig"
+source "board/sifive/hifive_unleashed/Kconfig"
# platform-specific options below
source "arch/riscv/cpu/ax25/Kconfig"
-source "arch/riscv/cpu/generic/Kconfig"
+source "arch/riscv/cpu/u54-mc/Kconfig"
# architecture-specific options below
diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig
deleted file mode 100644
index 1d6ab50..000
--- a/arch/riscv/cpu/generic/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2018, Bin Meng
-
-config GENERIC_RISCV
- bool
- select ARCH_EARLY_INIT_R
- imply CPU
- imply CPU_RISCV
- imply RISCV_TIMER
- imply SIFIVE_CLINT if RISCV_MMODE
- imply CMD_CPU
diff --git a/arch/riscv/cpu/generic/Makefile b/arch/riscv/cpu/generic/Makefile
deleted file mode 100644
index 258e462..000
--- a/arch/riscv/cpu/generic/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2018, Bin Meng
-
-obj-y += dram.o
-obj-y += cpu.o
diff --git a/arch/riscv/cpu/generic/cpu.c b/arch/riscv/cpu/generic/cpu.c
deleted file mode 100644
index ad2950c..000
--- a/arch/riscv/cpu/generic/cpu.c
+++ /dev/null
@@ -1,35 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018, Bin Meng
- */
-
-#include
-#include
-
-/*
- * cleanup_before_linux() is called just before we call linux
- * it prepares the processor for linux
- *
- * we disable interrupt and caches.
- */
-int cleanup_before_linux(void)
-{
- disable_interrupts();
-
- cache_flush();
-
- return 0;
-}
-
-/* To enumerate devices on the /soc/ node, create a
Re: [U-Boot] [PATCH] Dockerfile: Build a copy of QEMU and install it under /opt
On Wed, Jul 24, 2019 at 03:51:14PM -0400, Tom Rini wrote: > In order to run our test.py suite on a number of platforms in CI we use > QEMU. Configure and build a copy here so that all our jobs can rely on > it as our code is under test and not QEMU. > > Signed-off-by: Tom Rini Applied to u-boot-gitlab-ci-runner/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] Dockerfile: add python3-sphinx
On Thu, Jul 25, 2019 at 10:34:28PM +0200, Heinrich Schuchardt wrote: > python3-sphinx is needed to build the htmldocs target. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Bin Meng Applied to u-boot-gitlab-ci-runner/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] Dockerfile: build GRUB UEFI targets
On Sat, Jul 27, 2019 at 10:43:37AM +0200, Heinrich Schuchardt wrote: > Build GRUB UEFI targets grubarm.efi and grubaa64.efi. These are needed for > running test_efi_grub_net(). > > Signed-off-by: Heinrich Schuchardt Next step, update the CI hook scripts to use these files, and copy them in the .gitlab-ci.yml file. Stephen has moved these to the DENX GitLab as well, btw. Applied to u-boot-gitlab-ci-runner/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: ehci-omap: Add Support DM_USB and OF_CONTROL
On Mon, Jul 29, 2019 at 7:30 AM Marek Vasut wrote: > > On 7/29/19 2:16 PM, Adam Ford wrote: > > On Sun, Jun 30, 2019 at 5:21 PM Adam Ford wrote: > >> > >> The omap3.dtsi file shows the usbhshost node with two sub-nodes > >> for ohci and ehci. This patch file creates the usbhshost, and > >> pulls the portX-mode information. It then locates the EHCI > >> sub-node, and initializes the EHCI controller with the info > >> pulled from the usbhshost node. > >> > >> There is still more to do since there isn't an actual link > >> between the 'phys' reference and the corresponding phy driver, > >> and there is no nop-xceiv driver yet. > >> > >> In the meantime, the older style reference to > >> CONFIG_OMAP_EHCI_PHYx_RESET_GPIO is still needed to pull > >> the phy out of reset until the phy driver is completed and the > >> phandle reference is made. > >> > >> Signed-off-by: Adam Ford > >> > > > > Marek, > > > > Some subsequent patches that were depending on this have been applied > > already, but they cannot be really useful until this patch is applied. > > Is there any chance it can be applied? It will give some of the OMAP3 > > boards the USB EHCI functionality which has been lost for a little > > while. > > Sure, I am kinda busy and don't have enough free time to cope with this. > Moreover, u-boot-usb/master fails to build: > https://travis-ci.org/marex/u-boot-usb/builds/563567738 > > Can you take a look whether it's this patchset that causes it ? Marek, I looked at the Travis logs, and it looks like the da850evm_nand and da850evm_direct_nor were failing, so I tried to clone git clone --depth=50 --branch=master https://github.com/marex/u-boot-usb.git marex/u-boot-usb based on line 846 of the Travis log. When I built da850evm_nand and da850evm_direct_nor, I could not replicate either the build error. The EHCI patch referenced above should not impact the da850 board because that driver isn't loaded and the IP isn't present on the da850evm. They are a different OMAP family. If you have some suggestions I how I can replicate this build error or what I might be doing wrong, please let me know. adam ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ARM: da850_am18xxevm: Remove config and references
This board has been abandonded for a while. I do not have this hardware and nobody has appeared to notice and/or care that it's orphaned. Since much of this code is inserted into the da850evm code base, removing it from support will make da850evm support easier going forward. This patch removes the da850_am18xxevm_defconfig, README references to this board and the reference to this board from the MAINTAINERS list. Signed-off-by: Adam Ford diff --git a/board/davinci/da8xxevm/MAINTAINERS b/board/davinci/da8xxevm/MAINTAINERS index b77a5f6622..42324a3f73 100644 --- a/board/davinci/da8xxevm/MAINTAINERS +++ b/board/davinci/da8xxevm/MAINTAINERS @@ -7,10 +7,6 @@ F: configs/da850evm_defconfig F: configs/da850evm_nand_defconfig F: configs/da850evm_direct_nor_defconfig -AM18XXEVM BOARD -S: Orphan -F: configs/da850_am18xxevm_defconfig - OMAPL138_LCDK BOARD M: Peter Howard S: Maintained diff --git a/board/davinci/da8xxevm/README.da850 b/board/davinci/da8xxevm/README.da850 index 5775b7d80f..8cebdcc1bb 100644 --- a/board/davinci/da8xxevm/README.da850 +++ b/board/davinci/da8xxevm/README.da850 @@ -29,9 +29,7 @@ Compilation === The exact build target you need will depend on the board you have. For Logic PD boards, or other boards which store the ethernet MAC address at -the end of SPI flash, run 'make da850evm'. For boards which store the -ethernet MAC address in the i2c EEPROM located at 0x50, run -'make da850_am18xxevm'. Once this build completes you will have a +the end of SPI flash, run 'make da850evm'. Once this build completes you will have a u-boot.ais file that needs to be written to the correct persistent storage. diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig deleted file mode 100644 index f7054b4a1e..00 --- a/configs/da850_am18xxevm_defconfig +++ /dev/null @@ -1,67 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_DAVINCI=y -CONFIG_SYS_TEXT_BASE=0xc108 -CONFIG_TARGET_DA850EVM=y -CONFIG_MAC_ADDR_IN_EEPROM=y -CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MALLOC_F_LEN=0x800 -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SPL=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50" -CONFIG_BOOTDELAY=3 -CONFIG_MISC_INIT_R=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_TEXT_BASE=0x8000 -CONFIG_SPL_SPI_LOAD=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="U-Boot > " -CONFIG_CRC32_VERIFY=y -# CONFIG_CMD_EEPROM is not set -# CONFIG_CMD_FLASH is not set -# CONFIG_CMD_GPIO is not set -# CONFIG_CMD_GPT is not set -# CONFIG_CMD_PART is not set -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_TIME is not set -# CONFIG_CMD_EXT4 is not set -# CONFIG_CMD_FS_GENERIC is not set -CONFIG_CMD_DIAG=y -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" -CONFIG_SPL_OF_PLATDATA=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_DM=y -CONFIG_SPL_DM=y -CONFIG_DA8XX_GPIO=y -CONFIG_DM_I2C=y -CONFIG_DM_I2C_COMPAT=y -CONFIG_SYS_I2C_DAVINCI=y -CONFIG_MTD_DEVICE=y -CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_DM_ETH=y -CONFIG_MII=y -CONFIG_DRIVER_TI_EMAC=y -CONFIG_DM_SERIAL=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_DAVINCI_SPI=y -CONFIG_USB=y -CONFIG_DM_USB=y -# CONFIG_SPL_DM_USB is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_DA8XX=y -CONFIG_USB_STORAGE=y -# CONFIG_FAT_WRITE is not set -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] edid: fix edid_get_timing_validate() mode_valid lookup
Add a condition to the break in the modes lookup, without this
when the first mode is not valid, then edid_get_timing_validate()
return an error instead of checking the next modes.
Fixes: 1c1ed441b0d1 ("edid: add edid_get_timing_validate() variant to filter
out edid modes")
Signed-off-by: Neil Armstrong
---
common/edid.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/common/edid.c b/common/edid.c
index f244d26e04..f99f42dc40 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -202,7 +202,9 @@ int edid_get_timing_validate(u8 *buf, int buf_size,
timing);
else
timing_done = true;
- break;
+
+ if (timing_done)
+ break;
}
}
if (!timing_done)
--
2.22.0
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Re: [U-Boot] [PATCH] sifive: riscv: update Hifive Unleashed configuration infrastructure
Hi, On Mon, Jul 29, 2019 at 8:42 PM Sagar Shrikant Kadam wrote: > > This patch aligns the current implementation of HiFive Unleashed > board configuration framework with the one described in doc/README.kconfig. > Can you please explain why these changes are needed? It looks that the changes are only to rename the "generic" cpu name to "u54-mc", and rename the board name "fu540" to "hifive_unleashed"? This breaks the QEMU virt boards. > Signed-off-by: Sagar Shrikant Kadam > --- > arch/riscv/Kconfig | 6 +- > arch/riscv/cpu/generic/Kconfig | 12 --- > arch/riscv/cpu/generic/Makefile | 6 -- > arch/riscv/cpu/generic/cpu.c | 35 --- > arch/riscv/cpu/generic/dram.c| 37 --- > arch/riscv/cpu/u54-mc/Kconfig| 12 +++ > arch/riscv/cpu/u54-mc/Makefile | 6 ++ > arch/riscv/cpu/u54-mc/cpu.c | 35 +++ > arch/riscv/cpu/u54-mc/dram.c | 37 +++ > arch/riscv/include/asm/arch-fu540-c000/clk.h | 14 +++ > arch/riscv/include/asm/arch-generic/clk.h| 14 --- > board/sifive/fu540/Kconfig | 49 -- > board/sifive/fu540/MAINTAINERS | 9 -- > board/sifive/fu540/Makefile | 5 - > board/sifive/fu540/fu540.c | 139 > --- > board/sifive/hifive_unleashed/Kconfig| 52 ++ > board/sifive/hifive_unleashed/MAINTAINERS| 9 ++ > board/sifive/hifive_unleashed/Makefile | 5 + > board/sifive/hifive_unleashed/fu540.c| 139 > +++ > configs/hifive_unleashed_defconfig | 11 +++ > configs/sifive_fu540_defconfig | 11 --- > include/configs/hifive_unleashed.h | 47 + > include/configs/sifive-fu540.h | 47 - > 23 files changed, 370 insertions(+), 367 deletions(-) > delete mode 100644 arch/riscv/cpu/generic/Kconfig > delete mode 100644 arch/riscv/cpu/generic/Makefile > delete mode 100644 arch/riscv/cpu/generic/cpu.c > delete mode 100644 arch/riscv/cpu/generic/dram.c It looks that you did not use "git mv" command. > create mode 100644 arch/riscv/cpu/u54-mc/Kconfig > create mode 100644 arch/riscv/cpu/u54-mc/Makefile > create mode 100644 arch/riscv/cpu/u54-mc/cpu.c > create mode 100644 arch/riscv/cpu/u54-mc/dram.c > create mode 100644 arch/riscv/include/asm/arch-fu540-c000/clk.h > delete mode 100644 arch/riscv/include/asm/arch-generic/clk.h > delete mode 100644 board/sifive/fu540/Kconfig > delete mode 100644 board/sifive/fu540/MAINTAINERS > delete mode 100644 board/sifive/fu540/Makefile > delete mode 100644 board/sifive/fu540/fu540.c > create mode 100644 board/sifive/hifive_unleashed/Kconfig > create mode 100644 board/sifive/hifive_unleashed/MAINTAINERS > create mode 100644 board/sifive/hifive_unleashed/Makefile > create mode 100644 board/sifive/hifive_unleashed/fu540.c > create mode 100644 configs/hifive_unleashed_defconfig > delete mode 100644 configs/sifive_fu540_defconfig > create mode 100644 include/configs/hifive_unleashed.h > delete mode 100644 include/configs/sifive-fu540.h > Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/3] amlogic: Add support for Odroid-N2
ODROID-N2 is a single board computer manufactured by Hardkernel Co. Ltd with the following specifications: - Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC - 4GB DDR4 SDRAM - Gigabit Ethernet - HDMI 2.1 4K/60Hz display - 40-pin GPIO header - 4 x USB 3.0 Host, 1 x USB OTG - eMMC, microSD - Infrared receiver This patchset : - adds the Odroid-N2 from Linux 5.3-rc1 - fixes 4GiB memory support - adds board support The board directory is W400, the name of the Amlogic Reference Design of Amlogic G12B with Gigabit boards, which will be used for similar boards. Changes since v1: - Fix typo in README.odroid-n2 Neil Armstrong (3): ARM: dts: add support for Odroid-N2 ARM: meson-g12a: Handle 4GiB DRAM size board: amlogic: add support for Odroid-N2 arch/arm/dts/Makefile | 3 +- arch/arm/dts/meson-g12b-odroid-n2.dts | 386 ++ arch/arm/dts/meson-g12b.dtsi | 82 arch/arm/mach-meson/board-g12a.c | 13 +- board/amlogic/w400/MAINTAINERS| 6 + board/amlogic/w400/Makefile | 6 + board/amlogic/w400/README.odroid-n2 | 130 ++ board/amlogic/w400/README.w400| 130 ++ board/amlogic/w400/w400.c | 18 + configs/odroid-n2_defconfig | 56 +++ .../dt-bindings/sound/meson-g12a-tohdmitx.h | 13 + 11 files changed, 836 insertions(+), 7 deletions(-) create mode 100644 arch/arm/dts/meson-g12b-odroid-n2.dts create mode 100644 arch/arm/dts/meson-g12b.dtsi create mode 100644 board/amlogic/w400/MAINTAINERS create mode 100644 board/amlogic/w400/Makefile create mode 100644 board/amlogic/w400/README.odroid-n2 create mode 100644 board/amlogic/w400/README.w400 create mode 100644 board/amlogic/w400/w400.c create mode 100644 configs/odroid-n2_defconfig create mode 100644 include/dt-bindings/sound/meson-g12a-tohdmitx.h -- 2.22.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/3] ARM: dts: add support for Odroid-N2
Import HardKernel Odroid-N2 DT from Linux 5.3-rc1, commit 5f9e832c1370
("Linus 5.3-rc1") based on an Amlogic G12B S922X SoC.
Signed-off-by: Neil Armstrong
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-g12b-odroid-n2.dts | 386 ++
arch/arm/dts/meson-g12b.dtsi | 82
.../dt-bindings/sound/meson-g12a-tohdmitx.h | 13 +
4 files changed, 483 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/meson-g12b-odroid-n2.dts
create mode 100644 arch/arm/dts/meson-g12b.dtsi
create mode 100644 include/dt-bindings/sound/meson-g12a-tohdmitx.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f5535078c7..2baa368215 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -135,7 +135,8 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxl-s905x-khadas-vim.dtb \
meson-gxm-khadas-vim2.dtb \
meson-axg-s400.dtb \
- meson-g12a-u200.dtb
+ meson-g12a-u200.dtb \
+ meson-g12b-odroid-n2.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts
b/arch/arm/dts/meson-g12b-odroid-n2.dts
new file mode 100644
index 00..81780ffcc7
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-odroid-n2.dts
@@ -0,0 +1,386 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong
+ */
+
+/dts-v1/;
+
+#include "meson-g12b.dtsi"
+#include
+#include
+#include
+
+/ {
+ compatible = "hardkernel,odroid-n2", "amlogic,g12b";
+ model = "Hardkernel ODROID-N2";
+
+ aliases {
+ serial0 = &uart_AO;
+ ethernet0 = ðmac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x4000>;
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ blue {
+ label = "n2:blue";
+ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ tflash_vdd: regulator-tflash_vdd {
+ compatible = "regulator-fixed";
+
+ regulator-name = "TFLASH_VDD";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+
+ gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ tf_io: gpio-regulator-tf_io {
+ compatible = "regulator-gpio";
+
+ regulator-name = "TF_IO";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+
+ gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+
+ states = <330 0
+ 180 1>;
+ };
+
+ flash_1v8: regulator-flash_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "FLASH_1V8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ main_12v: regulator-main_12v {
+ compatible = "regulator-fixed";
+ regulator-name = "12V";
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ regulator-always-on;
+ };
+
+ vcc_5v: regulator-vcc_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ vin-supply = <&main_12v>;
+ };
+
+ vcc_1v8: regulator-vcc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ /* FIXME: actually controlled by VDDCPU_B_EN */
+ };
+
+ hub_5v: regulator-hub_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "HUB_5V";
+ regulator-m
[U-Boot] [PATCH 2/3] ARM: meson-g12a: Handle 4GiB DRAM size
When configured with 4GiB DRAM size, only 3.8GiB is available, the
I/O beeing mapped in the last 256MiB of the first 4GiB physical memory/
First fixup the mm_region to handle the first 3.8GiB as memory and the
last 256MiB as I/O.
Then limit the real memory reported by the firmware to the available
physical space, 3.8GiB aligned with the mm_region memory zone size.
Signed-off-by: Neil Armstrong
---
arch/arm/mach-meson/board-g12a.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-meson/board-g12a.c b/arch/arm/mach-meson/board-g12a.c
index 1652970fbd..546b9f6039 100644
--- a/arch/arm/mach-meson/board-g12a.c
+++ b/arch/arm/mach-meson/board-g12a.c
@@ -62,21 +62,21 @@ void meson_init_reserved_memory(void *fdt)
phys_size_t get_effective_memsize(void)
{
/* Size is reported in MiB, convert it in bytes */
- return ((readl(G12A_AO_SEC_GP_CFG0) & G12A_AO_MEM_SIZE_MASK)
- >> G12A_AO_MEM_SIZE_SHIFT) * SZ_1M;
+ return min(((readl(G12A_AO_SEC_GP_CFG0) & G12A_AO_MEM_SIZE_MASK)
+ >> G12A_AO_MEM_SIZE_SHIFT) * SZ_1M, 0xf500);
}
static struct mm_region g12a_mem_map[] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
- .size = 0x8000UL,
+ .size = 0xf500UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
- .virt = 0xf000UL,
- .phys = 0xf000UL,
- .size = 0x1000UL,
+ .virt = 0xf500UL,
+ .phys = 0xf500UL,
+ .size = 0x0b00UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
@@ -129,6 +129,7 @@ void meson_eth_init(phy_interface_t mode, unsigned int
flags)
G12A_ETH_REG_0_TX_RATIO(4) |
G12A_ETH_REG_0_PHY_CLK_EN |
G12A_ETH_REG_0_CLK_EN);
+ g12a_enable_external_mdio();
break;
case PHY_INTERFACE_MODE_RMII:
--
2.22.0
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[U-Boot] [PATCH 3/3] board: amlogic: add support for Odroid-N2
ODROID-N2 is a single board computer manufactured by Hardkernel Co. Ltd with the following specifications: - Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC - 4GB DDR4 SDRAM - Gigabit Ethernet - HDMI 2.1 4K/60Hz display - 40-pin GPIO header - 4 x USB 3.0 Host, 1 x USB OTG - eMMC, microSD - Infrared receiver The board directory is W400, the name of the Amlogic Reference Design of Amlogic G12B with Gigabit boards, which will be used for similar boards. Signed-off-by: Neil Armstrong --- board/amlogic/w400/MAINTAINERS | 6 ++ board/amlogic/w400/Makefile | 6 ++ board/amlogic/w400/README.odroid-n2 | 130 board/amlogic/w400/README.w400 | 130 board/amlogic/w400/w400.c | 18 configs/odroid-n2_defconfig | 56 6 files changed, 346 insertions(+) create mode 100644 board/amlogic/w400/MAINTAINERS create mode 100644 board/amlogic/w400/Makefile create mode 100644 board/amlogic/w400/README.odroid-n2 create mode 100644 board/amlogic/w400/README.w400 create mode 100644 board/amlogic/w400/w400.c create mode 100644 configs/odroid-n2_defconfig diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS new file mode 100644 index 00..6e68fa73f7 --- /dev/null +++ b/board/amlogic/w400/MAINTAINERS @@ -0,0 +1,6 @@ +W400 +M: Neil Armstrong +S: Maintained +L: u-boot-amlo...@groups.io +F: board/amlogic/w400/ +F: configs/odroid-n2_defconfig diff --git a/board/amlogic/w400/Makefile b/board/amlogic/w400/Makefile new file mode 100644 index 00..fac4a73afa --- /dev/null +++ b/board/amlogic/w400/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2019 BayLibre, SAS +# Author: Neil Armstrong + +obj-y := w400.o diff --git a/board/amlogic/w400/README.odroid-n2 b/board/amlogic/w400/README.odroid-n2 new file mode 100644 index 00..a8f2c3d7da --- /dev/null +++ b/board/amlogic/w400/README.odroid-n2 @@ -0,0 +1,130 @@ +U-Boot for ODROID-N2 + + +ODROID-N2 is a single board computer manufactured by Hardkernel +Co. Ltd with the following specifications: + + - Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC + - 4GB DDR4 SDRAM + - Gigabit Ethernet + - HDMI 2.1 4K/60Hz display + - 40-pin GPIO header + - 4 x USB 3.0 Host, 1 x USB OTG + - eMMC, microSD + - Infrared receiver + +Schematics are available on the manufacturer website. + +Currently the u-boot port supports the following devices: + - serial + - eMMC, microSD + - Ethernet + - I2C + - Regulators + - Reset controller + - Clock controller + - ADC + +u-boot compilation +== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make odroid-n2_defconfig + > make + +Image creation +== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + + > DIR=odroid-n2 + > git clone --depth 1 \ + https://github.com/hardkernel/u-boot.git -b odroidn2-v2015.01 \ + $DIR + + > cd odroid-n2 + > make odroidn2_defconfig + > make + > export UBOOTDIR=$PWD + + Go back to mainline U-Boot source tree then : + > mkdir fip + + > wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh + > cp $UBOOTDIR/build/scp_task/bl301.bin fip/ + > cp $UBOOTDIR/build/board/hardkernel/odroidn2/firmware/acs.bin fip/ + > cp $UBOOTDIR/fip/g12b/bl2.bin fip/ + > cp $UBOOTDIR/fip/g12b/bl30.bin fip/ + > cp $UBOOTDIR/fip/g12b/bl31.img fip/ + > cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/ + > cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/ + > cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/ + > cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/ + > cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/ + > cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/ + > cp $UBOOTDIR/fip/g12b/piei.fw fip/ + > cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/ + > cp u-boot.bin fip/bl33.bin + + > sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $UBOOTDIR/fip/g12b/aml_encry
[U-Boot] [PATCH v2 1/2] arm: dts: rock960: Enable booting from eMMC when using SPL
This commits enables booting from eMMC when using SPL on 96Boards
Rock960 board by adding SDHCI to boot order. Since the SDHCI driver
already has the reloc flag, this works straightaway. While we are at it,
let's also include the common u-boot dtsi for rk3399.
Signed-off-by: Manivannan Sadhasivam
---
Changes in v2:
* Moved the change to -u-boot.dtsi as spotted by Peter.
arch/arm/dts/rk3399-rock960-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
index 5256f6d3f2..4850debdf0 100644
--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
@@ -3,4 +3,11 @@
* Copyright (C) 2019 Jagan Teki
*/
+#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr3-2GB-1600.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = &sdhci, &sdmmc;
+ };
+};
--
2.17.1
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[U-Boot] [PATCH v2 2/2] arm: dts: ficus: Enable booting from eMMC when using SPL
This commits enables booting from eMMC when using SPL on 96Boards
Ficus board by adding SDHCI to boot order. Since the SDHCI driver
already has the reloc flag, this works straightaway. While we are at it,
let's also include the common u-boot dtsi for rk3399.
Signed-off-by: Manivannan Sadhasivam
---
Changes in v2:
* Moved the change to -u-boot.dtsi as spotted by Peter.
arch/arm/dts/rk3399-ficus-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
index eab86bdb30..f3f7aa7c45 100644
--- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
@@ -3,4 +3,11 @@
* Copyright (C) 2019 Jagan Teki
*/
+#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1600.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = &sdhci, &sdmmc;
+ };
+};
--
2.17.1
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[U-Boot] [PATCH 0/5] amlogic: add support for the SEI Robotic SEI510
The SEI510 board is based on the Amlogic S905X2 SoC from the Amlogic G12A SoC family. The board has the following specifications : - Amlogic S905X2 ARM Cortex-A53 quad-core SoC - XGB DDR4 SDRAM - 10/100 Ethernet (Internal PHY) - 1 x USB 3.0 Host - eMMC - SDcard - Infrared receiver - SDIO WiFi Module The board default behaviour is for booting Android and triggers fastboot on recovery or reboot mode. Jerome Brunet (1): boards: meson: add g12a sei510 Neil Armstrong (4): ARM: dts: Import Amlogic G12A SEI510 DT from Linux 5.3-rc1 configs: meson64: permit redefining ENV_SIZE ARM: meson: Add support for fastboot_set_reboot_flag() configs: sei510: disable PSCI_RESET to support fastboot reboot_flag arch/arm/dts/Makefile| 1 + arch/arm/dts/meson-g12a-sei510.dts | 502 +++ arch/arm/include/asm/arch-meson/sm.h | 18 + arch/arm/mach-meson/board-common.c | 33 ++ arch/arm/mach-meson/sm.c | 155 + board/amlogic/sei510/MAINTAINERS | 5 + board/amlogic/sei510/Makefile| 6 + board/amlogic/sei510/README | 123 +++ board/amlogic/sei510/sei510.c| 26 ++ configs/sei510_defconfig | 75 include/configs/meson64.h| 2 + include/configs/sei510.h | 137 12 files changed, 1083 insertions(+) create mode 100644 arch/arm/dts/meson-g12a-sei510.dts create mode 100644 board/amlogic/sei510/MAINTAINERS create mode 100644 board/amlogic/sei510/Makefile create mode 100644 board/amlogic/sei510/README create mode 100644 board/amlogic/sei510/sei510.c create mode 100644 configs/sei510_defconfig create mode 100644 include/configs/sei510.h -- 2.22.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] ARM: dts: Import Amlogic G12A SEI510 DT from Linux 5.3-rc1
Import Linux 5.2-rc1 sei510 DT from 5f9e832c1370 ("Linus 5.3-rc1") for the
meson-g12a-sei510 board.
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/meson-g12a-sei510.dts | 502 +
2 files changed, 503 insertions(+)
create mode 100644 arch/arm/dts/meson-g12a-sei510.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2baa368215..fdb0d66e97 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxm-khadas-vim2.dtb \
meson-axg-s400.dtb \
meson-g12a-u200.dtb \
+ meson-g12a-sei510.dtb \
meson-g12b-odroid-n2.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
diff --git a/arch/arm/dts/meson-g12a-sei510.dts
b/arch/arm/dts/meson-g12a-sei510.dts
new file mode 100644
index 00..c7a8736885
--- /dev/null
+++ b/arch/arm/dts/meson-g12a-sei510.dts
@@ -0,0 +1,502 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "meson-g12a.dtsi"
+#include
+#include
+#include
+#include
+
+/ {
+ compatible = "seirobotics,sei510", "amlogic,g12a";
+ model = "SEI Robotics SEI510";
+
+ adc_keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <180>;
+
+ button-onoff {
+ label = "On/Off";
+ linux,code = ;
+ press-threshold-microvolt = <170>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart_AO;
+ ethernet0 = ðmac;
+ };
+
+ mono_dac: audio-codec-0 {
+ compatible = "maxim,max98357a";
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "U16";
+ sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
+ };
+
+ dmics: audio-codec-1 {
+ #sound-dai-cells = <0>;
+ compatible = "dmic-codec";
+ num-channels = <2>;
+ wakeup-delay-ms = <50>;
+ status = "okay";
+ sound-name-prefix = "MIC";
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cvbs-connector {
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x4000>;
+ };
+
+ ao_5v: regulator-ao_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "AO_5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <&dc_in>;
+ regulator-always-on;
+ };
+
+ dc_in: regulator-dc_in {
+ compatible = "regulator-fixed";
+ regulator-name = "DC_IN";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ };
+
+ emmc_1v8: regulator-emmc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "EMMC_1V8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <&dc_in>;
+ regulator-always-on;
+ };
+
+ vddao_3v3_t: regultor-vddao_3v3_t {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3_T";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <&vddao_3v3>;
+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
+ enable-active-high;
+ };
+
+ vddio_ao1v8: regulator-vddio_ao1v8 {
+ compatible = "regulator
[U-Boot] [PATCH 2/5] configs: meson64: permit redefining ENV_SIZE
Permit redefining ENV_SIZE for board specific configs. --- include/configs/meson64.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/meson64.h b/include/configs/meson64.h index d82a674270..e707a1893f 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -38,7 +38,9 @@ #define CONFIG_CPU_ARMV8 #define CONFIG_REMAKE_ELF +#ifndef CONFIG_ENV_SIZE #define CONFIG_ENV_SIZE0x2000 +#endif #define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 -- 2.22.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 5/5] configs: sei510: disable PSCI_RESET to support fastboot reboot_flag
Disable the PSCI_RESET reboot handler to permit handling the reboot flag and calling the PSCI handler with the flag in parameter. --- configs/sei510_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index 20534bd6b4..6c89d4a381 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -7,6 +7,7 @@ CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_IDENT_STRING=" sei510" +# CONFIG_PSCI_RESET is not set CONFIG_DEBUG_UART=y CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y -- 2.22.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/5] boards: meson: add g12a sei510
From: Jerome Brunet
The SEI510 board is based on the Amlogic S905X2 SoC
from the Amlogic G12A SoC family.
The board has the following specifications :
- Amlogic S905X2 ARM Cortex-A53 quad-core SoC
- XGB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
The board default behaviour is for booting Android and triggers
fastboot on recovery or reboot mode.
USB vendor ID (used by fastboot) is 0x18d1 (Google) for
default udev rules for existing android users work out of the box.
Signed-off-by: Kevin Hilman
Signed-off-by: Jerome Brunet
Signed-off-by: Guillaume La Roque
---
arch/arm/include/asm/arch-meson/sm.h | 18
arch/arm/mach-meson/sm.c | 155 +++
board/amlogic/sei510/MAINTAINERS | 5 +
board/amlogic/sei510/Makefile| 6 ++
board/amlogic/sei510/README | 123 +
board/amlogic/sei510/sei510.c| 26 +
configs/sei510_defconfig | 74 +
include/configs/sei510.h | 137 +++
8 files changed, 544 insertions(+)
create mode 100644 board/amlogic/sei510/MAINTAINERS
create mode 100644 board/amlogic/sei510/Makefile
create mode 100644 board/amlogic/sei510/README
create mode 100644 board/amlogic/sei510/sei510.c
create mode 100644 configs/sei510_defconfig
create mode 100644 include/configs/sei510.h
diff --git a/arch/arm/include/asm/arch-meson/sm.h
b/arch/arm/include/asm/arch-meson/sm.h
index 60d04ae228..6ae52cc584 100644
--- a/arch/arm/include/asm/arch-meson/sm.h
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -6,7 +6,25 @@
#ifndef __MESON_SM_H__
#define __MESON_SM_H__
+enum {
+ REBOOT_REASON_COLD = 0,
+ REBOOT_REASON_NORMAL = 1,
+ REBOOT_REASON_RECOVERY = 2,
+ REBOOT_REASON_UPDATE = 3,
+ REBOOT_REASON_FASTBOOT = 4,
+ REBOOT_REASON_SUSPEND_OFF = 5,
+ REBOOT_REASON_HIBERNATE = 6,
+ REBOOT_REASON_BOOTLOADER = 7,
+ REBOOT_REASON_SHUTDOWN_REBOOT = 8,
+ REBOOT_REASON_RPMBP = 9,
+ REBOOT_REASON_CRASH_DUMP = 11,
+ REBOOT_REASON_KERNEL_PANIC = 12,
+ REBOOT_REASON_WATCHDOG_REBOOT = 13,
+};
+
ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+int meson_sm_get_serial(void *buffer, size_t size);
+int meson_sm_get_reboot_reason(void);
#define SM_SERIAL_SIZE 12
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index 05b7f0bdf2..51a697df4a 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -8,6 +8,10 @@
#include
#include
#include
+#include
+#include
+#include
+#include
#define FN_GET_SHARE_MEM_INPUT_BASE0x8220
#define FN_GET_SHARE_MEM_OUTPUT_BASE 0x8221
@@ -77,3 +81,154 @@ int meson_sm_get_serial(void *buffer, size_t size)
return 0;
}
+
+#define AO_SEC_SD_CFG150xfc
+#define REBOOT_REASON_MASK GENMASK(15, 12)
+
+int meson_sm_get_reboot_reason(void)
+{
+ struct regmap *regmap;
+ int nodeoffset;
+ ofnode node;
+ unsigned int reason;
+
+ /* find the offset of compatible node */
+ nodeoffset = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
+
"amlogic,meson-gx-ao-secure");
+ if (nodeoffset < 0) {
+ printf("%s: failed to get amlogic,meson-gx-ao-secure\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ /* get regmap from the syscon node */
+ node = offset_to_ofnode(nodeoffset);
+ regmap = syscon_node_to_regmap(node);
+ if (IS_ERR(regmap)) {
+ printf("%s: failed to get regmap\n", __func__);
+ return -EINVAL;
+ }
+
+ regmap_read(regmap, AO_SEC_SD_CFG15, &reason);
+
+ /* The SMC call is not used, we directly use AO_SEC_SD_CFG15 */
+ return FIELD_GET(REBOOT_REASON_MASK, reason);
+}
+
+static int do_sm_serial(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong address;
+ int ret;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ address = simple_strtoul(argv[1], NULL, 0);
+
+ ret = meson_sm_get_serial((void *)address, SM_CHIP_ID_SIZE);
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ return CMD_RET_SUCCESS;
+}
+
+#define MAX_REBOOT_REASONS 14
+
+static const char *reboot_reasons[MAX_REBOOT_REASONS] = {
+ [REBOOT_REASON_COLD] = "cold_boot",
+ [REBOOT_REASON_NORMAL] = "normal",
+ [REBOOT_REASON_RECOVERY] = "recovery",
+ [REBOOT_REASON_UPDATE] = "update",
+ [REBOOT_REASON_FASTBOOT] = "fastboot",
+ [REBOOT_REASON_SUSPEND_OFF] = "suspend_off",
+ [REBOOT_REASON_HIBERNATE] = "hibernate",
+ [REBOOT_REASON_BOOTLOADER] = "bootloader",
+ [REBOOT_REASON_SHUTDOWN_REBOOT] = "shutdown_reboot",
+ [REBOOT_REASON_RPMBP] = "rpmbp",
+ [REBOOT_REASON_CRASH_DUMP] = "cr
[U-Boot] [PATCH 4/5] ARM: meson: Add support for fastboot_set_reboot_flag()
Add support for fastboot_set_reboot_flag() by storing the reboot
flag in the common code to be used by the custom PSCI reboot handler.
---
arch/arm/mach-meson/board-common.c | 33 ++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/mach-meson/board-common.c
b/arch/arm/mach-meson/board-common.c
index 18383f774e..c39643fc17 100644
--- a/arch/arm/mach-meson/board-common.c
+++ b/arch/arm/mach-meson/board-common.c
@@ -14,6 +14,11 @@
#include
#include
+#if CONFIG_IS_ENABLED(FASTBOOT)
+#include
+#include
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
__weak int board_init(void)
@@ -142,7 +147,35 @@ int board_late_init(void)
return meson_board_late_init();
}
+#if CONFIG_IS_ENABLED(FASTBOOT)
+static unsigned int reboot_reason = REBOOT_REASON_NORMAL;
+
+int fastboot_set_reboot_flag()
+{
+ reboot_reason = REBOOT_REASON_BOOTLOADER;
+
+ printf("Using reboot reason: 0x%x\n", reboot_reason);
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+ struct pt_regs regs;
+
+ regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
+ regs.regs[1] = reboot_reason;
+
+ printf("Rebooting with reason: 0x%lx\n", regs.regs[1]);
+
+ smc_call(®s);
+
+ while (1)
+ ;
+}
+#else
void reset_cpu(ulong addr)
{
psci_system_reset();
}
+#endif
--
2.22.0
___
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Re: [U-Boot] [PATCH 0/5] amlogic: add support for the SEI Robotic SEI510
On 29/07/2019 16:01, Neil Armstrong wrote: > The SEI510 board is based on the Amlogic S905X2 SoC > from the Amlogic G12A SoC family. > > The board has the following specifications : > - Amlogic S905X2 ARM Cortex-A53 quad-core SoC > - XGB DDR4 SDRAM > - 10/100 Ethernet (Internal PHY) > - 1 x USB 3.0 Host > - eMMC > - SDcard > - Infrared receiver > - SDIO WiFi Module > > The board default behaviour is for booting Android and triggers > fastboot on recovery or reboot mode. > > Jerome Brunet (1): > boards: meson: add g12a sei510 > > Neil Armstrong (4): > ARM: dts: Import Amlogic G12A SEI510 DT from Linux 5.3-rc1 > configs: meson64: permit redefining ENV_SIZE > ARM: meson: Add support for fastboot_set_reboot_flag() > configs: sei510: disable PSCI_RESET to support fastboot reboot_flag > > arch/arm/dts/Makefile| 1 + > arch/arm/dts/meson-g12a-sei510.dts | 502 +++ > arch/arm/include/asm/arch-meson/sm.h | 18 + > arch/arm/mach-meson/board-common.c | 33 ++ > arch/arm/mach-meson/sm.c | 155 + > board/amlogic/sei510/MAINTAINERS | 5 + > board/amlogic/sei510/Makefile| 6 + > board/amlogic/sei510/README | 123 +++ > board/amlogic/sei510/sei510.c| 26 ++ > configs/sei510_defconfig | 75 > include/configs/meson64.h| 2 + > include/configs/sei510.h | 137 > 12 files changed, 1083 insertions(+) > create mode 100644 arch/arm/dts/meson-g12a-sei510.dts > create mode 100644 board/amlogic/sei510/MAINTAINERS > create mode 100644 board/amlogic/sei510/Makefile > create mode 100644 board/amlogic/sei510/README > create mode 100644 board/amlogic/sei510/sei510.c > create mode 100644 configs/sei510_defconfig > create mode 100644 include/configs/sei510.h > Missing my Signed-off-by tags.. resending sorry for the noise. Neil ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
