Re: [U-Boot] [PATCH v2 6/9] mpc85xx, socrates: disable VIDEO

[Priyanka Jain]

>-Original Message-
>From: U-Boot  On Behalf Of Heiko Schocher
>Sent: Wednesday, October 16, 2019 9:26 AM
>To: U-Boot Mailing List 
>Subject: [U-Boot] [PATCH v2 6/9] mpc85xx, socrates: disable VIDEO
>
>disable video, as not really needed longer.
>
I see the video driver code is getting removed by this patch.
Please explain why video driver was required earlier and not now?

--priyankajain

[snip] 
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[U-Boot] [PATCH v2] nvme: use page-aligned buffer for identify command

[Patrick Wildt]

Change the stack-allocated buffer for the identification command
to explicitly allocate page-aligned buffers.  Even though the spec
seems to allow having admin queue commands on non page-aligned
buffers, it seems to not be possible on my i.MX8MQ board with a
a Silicon Power P34A80.  Since all of the NVMe drivers I have seen
always do admin commands on a page-aligned buffer, which does work
on my system, it makes sense for us to do that as well.

Signed-off-by: Patrick Wildt 
---
Changes for v2:
   - use dev->page_size instead of hardcoded value

 drivers/nvme/nvme.c | 24 ++--
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index ee6b581d9e..dee92b613d 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -580,14 +580,19 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
 
 static int nvme_get_info_from_identify(struct nvme_dev *dev)
 {
-   ALLOC_CACHE_ALIGN_BUFFER(char, buf, sizeof(struct nvme_id_ctrl));
-   struct nvme_id_ctrl *ctrl = (struct nvme_id_ctrl *)buf;
+   struct nvme_id_ctrl *ctrl;
int ret;
int shift = NVME_CAP_MPSMIN(dev->cap) + 12;
 
+   ctrl = memalign(dev->page_size, sizeof(struct nvme_id_ctrl));
+   if (!ctrl)
+   return -ENOMEM;
+
ret = nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl);
-   if (ret)
+   if (ret) {
+   free(ctrl);
return -EIO;
+   }
 
dev->nn = le32_to_cpu(ctrl->nn);
dev->vwc = ctrl->vwc;
@@ -618,6 +623,7 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev)
dev->max_transfer_shift = 20;
}
 
+   free(ctrl);
return 0;
 }
 
@@ -658,16 +664,21 @@ static int nvme_blk_probe(struct udevice *udev)
struct blk_desc *desc = dev_get_uclass_platdata(udev);
struct nvme_ns *ns = dev_get_priv(udev);
u8 flbas;
-   ALLOC_CACHE_ALIGN_BUFFER(char, buf, sizeof(struct nvme_id_ns));
-   struct nvme_id_ns *id = (struct nvme_id_ns *)buf;
struct pci_child_platdata *pplat;
+   struct nvme_id_ns *id;
+
+   id = memalign(ndev->page_size, sizeof(struct nvme_id_ns));
+   if (!id)
+   return -ENOMEM;
 
memset(ns, 0, sizeof(*ns));
ns->dev = ndev;
/* extract the namespace id from the block device name */
ns->ns_id = trailing_strtol(udev->name) + 1;
-   if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id))
+   if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) {
+   free(id);
return -EIO;
+   }
 
memcpy(&ns->eui64, &id->eui64, sizeof(id->eui64));
flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK;
@@ -686,6 +697,7 @@ static int nvme_blk_probe(struct udevice *udev)
memcpy(desc->product, ndev->serial, sizeof(ndev->serial));
memcpy(desc->revision, ndev->firmware_rev, sizeof(ndev->firmware_rev));
 
+   free(id);
return 0;
 }
 
-- 
2.23.0

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[U-Boot] problems with building u-boot-fit-dtb.bin

[Heiko Schocher]

Hello Tom,

I planned to send my patches which convert the imx6 based aristainetos
boards to support DM ... building U-Boot works fine on 2 different build
machines at home, also on 2 build machines in munich @ denx ...

So I startet as usual a travi build and I get:

https://travis-ci.org/hsdenx/u-boot-test/jobs/596917922


arm:  +   aristainetos2b
+make[2]: *** No rule to make target 'u-boot-fit-dtb.bin', needed by 
'u-boot-dtb.imx'.  Stop.
+make[1]: *** [u-boot-dtb.imx] Error 2
+make: *** [sub-make] Error 2

(for all aristainetos boards)

:-(

Unfortunately I cannot reproduce this on my machines...
(builds with "-j 64" or "-j 1" working fine)

I think it is a timing/sync issue, but how to debug ?

Checked make versions:

make on one of my build machines:

pollux:~ hs $ make --version
GNU Make 4.2.1
Gebaut für x86_64-redhat-linux-gnu
Copyright (C) 1988-2016 Free Software Foundation, Inc.
Lizenz GPLv3+: GNU GPL Version 3 oder später 
Dies ist freie Software: Sie können sie nach Belieben ändern und weiter 
verteilen.
Soweit es die Gesetze erlauben gibt es KEINE GARANTIE.
pollux:~ hs $ cd abb/mainlining/u-boot
pollux:u-boot

make on travis:

Tool chain test:  OK, arch='aarch64', priority 5
GNU Make 4.1
Built for x86_64-pc-linux-gnu
Copyright (C) 1988-2014 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later 
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.

Ok, for faster "debugging travis" I removed all other jobs from the
travis file and started build again:

https://travis-ci.org/hsdenx/u-boot-test/builds/597504777

The error for the aristainetos boards are gone  ?!?!?
(Ok, there are others, but not related to my changes)

I think it has to do with the config options:

CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2_4"
CONFIG_OF_LIST="imx6dl-aristainetos2_4 imx6dl-aristainetos2_7"
CONFIG_DTB_RESELECT=y
CONFIG_MULTI_DTB_FIT=y

and I can only find mips boards, which has this settings. Difference
for imx boards to mips Makefile is, imx has make target in 2 Makefiles:

Makefile
arch/arm/mach-imx/Makefile

So the "u-boot-fit-dtb.bin" target is definitely there ...

Any ideas?

bye,
Heiko
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Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de
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[U-Boot] [PATCH v2 6/9] mpc85xx, socrates: disable VIDEO

[Heiko Schocher]

disable video, as not really needed longer.

Signed-off-by: Heiko Schocher 
---

Changes in v2: None

 board/socrates/socrates.c  | 180 +
 configs/socrates_defconfig |   3 -
 include/configs/socrates.h |  15 
 3 files changed, 2 insertions(+), 196 deletions(-)

diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 8f9583360b..f51b0203f7 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -231,6 +231,7 @@ int ft_board_setup(void *blob, bd_t *bd)
val[i++] = gd->bd->bi_flashstart;
val[i++] = gd->bd->bi_flashsize;
 
+#if defined(CONFIG_VIDEO_MB862xx)
if (mb862xx.frameAdrs == CONFIG_SYS_LIME_BASE) {
/* Fixup LIME mapping */
val[i++] = 2;   /* chip select number */
@@ -238,6 +239,7 @@ int ft_board_setup(void *blob, bd_t *bd)
val[i++] = CONFIG_SYS_LIME_BASE;
val[i++] = CONFIG_SYS_LIME_SIZE;
}
+#endif
 
/* Fixup FPGA mapping */
val[i++] = 3;   /* chip select number */
@@ -255,184 +257,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 }
 #endif /* CONFIG_OF_BOARD_SETUP */
 
-#define DEFAULT_BRIGHTNESS 25
-#define BACKLIGHT_ENABLE   (1 << 31)
-
-static const gdc_regs init_regs [] =
-{
-   {0x0100, 0x00010f00},
-   {0x0020, 0x801901df},
-   {0x0024, 0x},
-   {0x0028, 0x},
-   {0x002c, 0x},
-   {0x0110, 0x},
-   {0x0114, 0x},
-   {0x0118, 0x01df0320},
-   {0x0004, 0x041f},
-   {0x0008, 0x031f031f},
-   {0x000c, 0x017f0349},
-   {0x0010, 0x020c},
-   {0x0014, 0x01df01e9},
-   {0x0018, 0x},
-   {0x001c, 0x01e00320},
-   {0x0100, 0x80010f00},
-   {0x0, 0x0}
-};
-
-const gdc_regs *board_get_regs (void)
-{
-   return init_regs;
-}
-
-int lime_probe(void)
-{
-   uint cfg_br2;
-   uint cfg_or2;
-   int type;
-
-   cfg_br2 = get_lbc_br(2);
-   cfg_or2 = get_lbc_or(2);
-
-   /* Configure GPCM for CS2 */
-   set_lbc_br(2, 0);
-   set_lbc_or(2, 0xfc000410);
-   set_lbc_br(2, (CONFIG_SYS_LIME_BASE) | 0x1901);
-
-   /* Get controller type */
-   type = mb862xx_probe(CONFIG_SYS_LIME_BASE);
-
-   /* Restore previous CS2 configuration */
-   set_lbc_br(2, 0);
-   set_lbc_or(2, cfg_or2);
-   set_lbc_br(2, cfg_br2);
-
-   return (type == MB862XX_TYPE_LIME) ? 1 : 0;
-}
-
-/* Returns Lime base address */
-unsigned int board_video_init (void)
-{
-   if (!lime_probe())
-   return 0;
-
-   mb862xx.winSizeX = 800;
-   mb862xx.winSizeY = 480;
-   mb862xx.gdfIndex = GDF_15BIT_555RGB;
-   mb862xx.gdfBytesPP = 2;
-
-   return CONFIG_SYS_LIME_BASE;
-}
-
-#define W83782D_REG_CFG0x40
-#define W83782D_REG_BANK_SEL   0x4e
-#define W83782D_REG_ADCCLK 0x4b
-#define W83782D_REG_BEEP_CTRL  0x4d
-#define W83782D_REG_BEEP_CTRL2 0x57
-#define W83782D_REG_PWMOUT10x5b
-#define W83782D_REG_VBAT   0x5d
-
-static int w83782d_hwmon_init(void)
-{
-   u8 buf;
-
-   if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 1, &buf, 1))
-   return -1;
-
-   i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 0x80);
-   i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BANK_SEL, 0);
-   i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_ADCCLK, 0x40);
-
-   buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL);
-   i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL,
- buf | 0x80);
-   i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL2, 0);
-   i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_PWMOUT1, 0x47);
-   i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_VBAT, 0x01);
-
-   buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG);
-   i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG,
- (buf & 0xf4) | 0x01);
-   return 0;
-}
-
-static void board_backlight_brightness(int br)
-{
-   u32 reg;
-   u8 buf;
-   u8 old_buf;
-
-   /* Select bank 0 */
-   if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &old_buf, 1))
-   goto err;
-   else
-   buf = old_buf & 0xf8;
-
-   if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &buf, 1))
-   goto err;
-
-   if (br > 0) {
-   /* PWMOUT1 duty cycle ctrl */
-   buf = 255 / (100 / br);
-   if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x5b, 1, &buf, 1))
-   goto err;
-
-   /* LEDs on */
-   reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c));
-   if (!(reg & BACKLIGHT_ENABLE))
-   out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c),
-reg | BACKLIGH

[U-Boot] [PATCH v2 8/9] mpc85xx, socrates: enable DM serial

[Heiko Schocher]

switch to DM_SERIAL support.

Signed-off-by: Heiko Schocher 
---

Changes in v2: None

 board/socrates/socrates.c  |  5 +
 configs/socrates_defconfig |  3 +++
 include/configs/socrates.h | 12 
 3 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index f51b0203f7..8549883508 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -271,3 +271,8 @@ void *board_fdt_blob_setup(void)
return fw_dtb;
 }
 #endif
+
+int get_serial_clock(void)
+{
+   return 0;
+}
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 80b5631d07..5bd60e0886 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -46,6 +46,9 @@ CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RX8025=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_DM_SERIAL=y
+CONFIG_SERIAL_SEARCH_ALL=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 425d758e1d..7adaa344bc 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -148,18 +148,6 @@
 #define CONFIG_SYS_BR2_PRELIM  0xc80018a1  /* UPMB, 32-bit */
 #define CONFIG_SYS_OR2_PRELIM  0xfc00  /* 64 MB*/
 
-/* Serial Port */
-
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE1
-#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-
-#define CONFIG_SYS_NS16550_COM1(CONFIG_SYS_CCSRBAR+0x4500)
-#define CONFIG_SYS_NS16550_COM2(CONFIG_SYS_CCSRBAR+0x4600)
-
-#define CONFIG_SYS_BAUDRATE_TABLE  \
-   {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
-
 #define CONFIG_SYS_SPD_BUS_NUM 0
 
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS  4
-- 
2.21.0

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[U-Boot] [PATCH v2 3/9] mpc85xx, dts, socrates: add u-boot specific dtsi

[Heiko Schocher]

add u-boot specific dtsi file for socrates board.

Signed-off-by: Heiko Schocher 
---

Changes in v2: None

 arch/powerpc/dts/socrates-u-boot.dtsi | 40 +++
 board/socrates/MAINTAINERS|  1 +
 2 files changed, 41 insertions(+)
 create mode 100644 arch/powerpc/dts/socrates-u-boot.dtsi

diff --git a/arch/powerpc/dts/socrates-u-boot.dtsi 
b/arch/powerpc/dts/socrates-u-boot.dtsi
new file mode 100644
index 00..14a7c245dc
--- /dev/null
+++ b/arch/powerpc/dts/socrates-u-boot.dtsi
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019
+ * Heiko Schocher, DENX Software Engineering, h...@denx.de
+ */
+/ {
+   binman {
+   filename = "u-boot-socrates.bin";
+   pad-byte = <0xff>;
+   // Place dtb one sector before u-boot-nodtb.bin
+   blob {
+   filename = "dts/dt.dtb";
+   };
+   u-boot-nodtb {
+   filename = "u-boot-nodtb.bin";
+   offset = <0x2>;
+   };
+   };
+
+   chosen {
+   stdout-path = &serial0;
+   };
+
+   soc8544@e000 {
+   i2c@3000 {
+   u-boot,dm-pre-reloc;
+   };
+   };
+};
+
+&pci0 {
+   clock-frequency = <3300>;
+   ranges = <0x0200 0x0 0x8000 0x8000 0x0 0x2000
+ 0x0100 0x0 0xe200 0xe200 0x0 0x0100>;
+};
+
+&serial0 {
+   u-boot,dm-pre-reloc;
+   clock-frequency = <0>;
+};
diff --git a/board/socrates/MAINTAINERS b/board/socrates/MAINTAINERS
index c5607fc342..2b27a73c18 100644
--- a/board/socrates/MAINTAINERS
+++ b/board/socrates/MAINTAINERS
@@ -5,3 +5,4 @@ F:  board/socrates/
 F: include/configs/socrates.h
 F: configs/socrates_defconfig
 F: arch/powerpc/dts/socrates.dts
+F: arch/powerpc/dts/socrates-u-boot.dtsi
-- 
2.21.0

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[U-Boot] [PATCH v2 7/9] mpc85xx, socrates: enable DM I2C

[Heiko Schocher]

enable DM I2C support for the socrates board.

Signed-off-by: Heiko Schocher 
---

Changes in v2: None

 configs/socrates_defconfig |  4 +++-
 include/configs/socrates.h | 18 +-
 2 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index be88cefe3e..80b5631d07 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -27,7 +27,6 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_SNTP=y
-CONFIG_CMD_DATE=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 # CONFIG_CMD_IRQ is not set
@@ -36,6 +35,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socrates"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_DM=y
 CONFIG_BLK=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_FSL=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
@@ -43,6 +44,7 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_RTC=y
 CONFIG_RTC_RX8025=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index c35e8aed77..425d758e1d 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -160,23 +160,7 @@
 #define CONFIG_SYS_BAUDRATE_TABLE  \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
 
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED   102124
-#define CONFIG_SYS_FSL_I2C_SLAVE   0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET  0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED  102124
-#define CONFIG_SYS_FSL_I2C2_SLAVE  0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
-
-/* I2C RTC */
-#define CONFIG_SYS_I2C_RTC_ADDR0x32/* at address 0x32  
*/
-
-/* I2C W83782G HW-Monitoring IC */
-#define CONFIG_SYS_I2C_W83782G_ADDR0x28/* W83782G address  
*/
+#define CONFIG_SYS_SPD_BUS_NUM 0
 
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS  4
 
-- 
2.21.0

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[U-Boot] [PATCH v2 5/9] mpc85xx, socrates: get rid of DM_USB warning

[Heiko Schocher]

add some defines and get rid of USB warning.

Signed-off-by: Heiko Schocher 
---

Changes in v2: None

 configs/socrates_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 1730d5793b..2c87ec5134 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0xfff8
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_SOCRATES=y
-# CONFIG_SYS_MALLOC_F is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -37,6 +36,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="socrates"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_DM=y
+CONFIG_BLK=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
@@ -47,6 +47,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_RTC_RX8025=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 # CONFIG_USB_EHCI_HCD is not set
 CONFIG_USB_STORAGE=y
 CONFIG_VIDEO=y
-- 
2.21.0

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[U-Boot] [PATCH v2 4/9] mpc85xx, socrates: add DM support

[Heiko Schocher]

enable CONFIG_DM for the socrates board.

Signed-off-by: Heiko Schocher 
---

Changes in v2: None

 board/socrates/socrates.c  | 15 +++
 configs/socrates_defconfig |  6 +-
 include/configs/socrates.h | 13 +++--
 3 files changed, 27 insertions(+), 7 deletions(-)

diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index da9ae5bebb..8f9583360b 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -432,3 +432,18 @@ void video_get_info_str (int line_number, char *info)
}
 }
 #endif
+
+#if defined(CONFIG_OF_SEPARATE)
+void *board_fdt_blob_setup(void)
+{
+   void *fw_dtb;
+
+   fw_dtb = (void *)(CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
+   if (fdt_magic(fw_dtb) != FDT_MAGIC) {
+   printf("DTB is not passed via %x\n", (u32)fw_dtb);
+   return NULL;
+   }
+
+   return fw_dtb;
+}
+#endif
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 58d135b907..1730d5793b 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xfff8
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_SOCRATES=y
+# CONFIG_SYS_MALLOC_F is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -15,6 +16,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_REGINFO=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_PCI=y
@@ -31,7 +33,10 @@ CONFIG_CMD_DATE=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 # CONFIG_CMD_IRQ is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="socrates"
 CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_DM=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
@@ -46,4 +51,3 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_VIDEO=y
 CONFIG_CONSOLE_EXTRA_INFO=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 4192148b52..4e10786ed8 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -238,9 +238,10 @@
  * Environment
  */
 #define CONFIG_ENV_SECT_SIZE   0x2 /* 128K(one sector) for env */
-#define CONFIG_ENV_ADDR(CONFIG_SYS_MONITOR_BASE - 
CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR(CONFIG_SYS_MONITOR_BASE - \
+   CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE0x4000
-#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
 
 #define CONFIG_LOADS_ECHO  1   /* echo on for serial download  */
@@ -280,7 +281,7 @@
"bootfile=/home/tftp/syscon3/uImage\0"  \
"fdt_file=/home/tftp/syscon3/socrates.dtb\0"\
"initrd_file=/home/tftp/syscon3/uinitrd.gz\0"   \
-   "uboot_addr=FFFA\0" \
+   "uboot_addr=FFF6\0" \
"kernel_addr=FE00\0"\
"fdt_addr=FE1E\0"   \
"ramdisk_addr=FE20\0"   \
@@ -303,9 +304,9 @@
"run nfsargs addip addcons;"\
"bootm ${kernel_addr_r} - ${fdt_addr_r}\0"  \
"update_uboot=tftp 10 ${uboot_file};"   \
-   "protect off fffa ;"\
-   "era fffa ;"\
-   "cp.b 10 fffa ${filesize};" \
+   "protect off fff6 ;"\
+   "era fff6 ;"\
+   "cp.b 10 fff6 ${filesize};" \
"setenv filesize;saveenv\0" \
"update_kernel=tftp 10 ${bootfile};"\
"era fe00 fe1d;"\
-- 
2.21.0

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[U-Boot] [PATCH v2 9/9] mpc85xx, socrates: add DM PCI support

[Heiko Schocher]

add DM PCI support on the socrates board.
use PCIE_FSL now.

Signed-off-by: Heiko Schocher 
---

Changes in v2:
- use separate PCI driver for mpc85xx as Z.q. Hou mentioned:
  and drop the patchseries:
  pci: pcie_fsl: add support for none PCIe devices
  http://patchwork.ozlabs.org/project/uboot/list/?series=134976
END

 board/socrates/law.c   |  2 --
 board/socrates/socrates.c  | 40 +-
 configs/socrates_defconfig |  7 +++
 include/configs/socrates.h |  9 -
 4 files changed, 12 insertions(+), 46 deletions(-)

diff --git a/board/socrates/law.c b/board/socrates/law.c
index 44703e8aca..840941b63e 100644
--- a/board/socrates/law.c
+++ b/board/socrates/law.c
@@ -31,9 +31,7 @@
 
 struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR),
-   SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
SET_LAW(CONFIG_SYS_LBC_FLASH_BASE, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
-   SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI),
 #if defined(CONFIG_SYS_FPGA_BASE)
SET_LAW(CONFIG_SYS_FPGA_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
 #endif
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 8549883508..5f58b4c21b 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -50,7 +50,7 @@ int checkboard (void)
}
putc('\n');
 
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) || defined(CONFIG_DM_PCI)
/* Check the PCI_clk sel bit */
if (in_be32(&gur->porpllsr) & (1<<15)) {
src = "SYSCLK";
@@ -126,6 +126,10 @@ int misc_init_r (void)
   &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
}
 
+#if defined(CONFIG_DM_PCI)
+   pci_init();
+#endif
+
return 0;
 }
 
@@ -168,40 +172,6 @@ void local_bus_init (void)
upmconfig (UPMB, (uint *)UPMTableB, sizeof(UPMTableB)/sizeof(int));
 }
 
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxads_config_table[] = {
-   {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-PCI_IDSEL_NUMBER, PCI_ANY_ID,
-pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
-PCI_ENET0_MEMADDR,
-PCI_COMMAND_MEMORY |
-PCI_COMMAND_MASTER}},
-   {}
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
-   config_table:pci_mpc85xxads_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-
-void pci_init_board (void)
-{
-#ifdef CONFIG_PCI
-   pci_mpc85xx_init (&hose);
-#endif /* CONFIG_PCI */
-}
-
 #ifdef CONFIG_BOARD_EARLY_INIT_R
 int board_early_init_r (void)
 {
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 5bd60e0886..1f4330d86b 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -14,6 +14,10 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_REGINFO=y
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
@@ -44,6 +48,8 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_MPC85XX=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RX8025=y
 CONFIG_SPECIFY_CONSOLE_INDEX=y
@@ -53,4 +59,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 # CONFIG_USB_EHCI_HCD is not set
+CONFIG_USB_OHCI_PCI=y
 CONFIG_USB_STORAGE=y
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 7adaa344bc..a03005902f 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -19,8 +19,6 @@
 /* High Level Configuration Options */
 #define CONFIG_SOCRATES1
 
-#define CONFIG_PCI_INDIRECT_BRIDGE
-
 /*
  * Only possible on E500 Version 2 or newer cores.
  */
@@ -156,7 +154,6 @@
  * General PCI
  * Memory space is mapped 1-1.
  */
-#define CONFIG_SYS_PCI_PHYS0x8000  /* 1G PCI TLB */
 
 /* PCI is clocked by the external source at 33 MHz */
 #define CONFIG_PCI_CLK_FREQ3300
@@ -167,10 +164,6 @@
 #define CONFIG_SYS_PCI1_IO_PHYSCONFIG_SYS_PCI1_IO_BASE
 #define CONFIG_SYS_PCI1_IO_SIZE0x0100  /* 16M  
*/
 
-#if defined(CONFIG_PCI)
-#undef CONFIG_PCI_SCAN_SHOW/* show pci devices on startup  */
-#endif /* CONFIG_PCI */
-
 #define CONFIG_TSEC1   1
 #define CONFIG_TSEC1_NAME  "TSEC0"
 #define CONFIG_TSEC3   1
@@ -292,8 +285,6 @@
 /* USB support */
 #define CONFIG_USB_OHCI_NEW1
 #define CONFIG_PCI_OHCI1
-#define CONFIG_PCI_OHCI_DEVNO  3 /* Number in PCI list */
-#define CONFIG_PCI_EHCI_DEVNO  (CONFIG_PCI_OHCI_DEVNO / 2)
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
 #define CONFIG_SYS_US

[U-Boot] [PATCH v2 2/9] mpc85xx: add socrates dts from linux

[Heiko Schocher]

add socrates device tree from linux:

commit 71ae5fc87c34 ("Merge tag 'linux-kselftest-5.2-rc1' of 
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest")

and added SPDX license identifier.
Did not fix checkpatch warnings:
arch/powerpc/dts/socrates.dts:235: check: Please don't use multiple blank lines
arch/powerpc/dts/socrates.dts:238: error: code indent should use tabs where 
possible

Also, add me as board maintainer.

Signed-off-by: Heiko Schocher 
---

Changes in v2: None

 arch/powerpc/dts/Makefile |   1 +
 arch/powerpc/dts/socrates.dts | 349 ++
 board/socrates/MAINTAINERS|   3 +-
 3 files changed, 352 insertions(+), 1 deletion(-)
 create mode 100644 arch/powerpc/dts/socrates.dts

diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 021c85f00f..3195351c9c 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb
 dtb-$(CONFIG_TARGET_P3041DS) += p3041ds.dtb
 dtb-$(CONFIG_TARGET_P4080DS) += p4080ds.dtb
 dtb-$(CONFIG_TARGET_P5040DS) += p5040ds.dtb
+dtb-$(CONFIG_TARGET_SOCRATES) += socrates.dtb
 dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
 dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
 dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
diff --git a/arch/powerpc/dts/socrates.dts b/arch/powerpc/dts/socrates.dts
new file mode 100644
index 00..452cf58b5e
--- /dev/null
+++ b/arch/powerpc/dts/socrates.dts
@@ -0,0 +1,349 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Device Tree Source for the Socrates board (MPC8544).
+ *
+ * Copyright (c) 2008 Emcraft Systems.
+ * Sergei Poselenov, 
+ *
+ */
+
+/dts-v1/;
+
+/ {
+   model = "abb,socrates";
+   compatible = "abb,socrates";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   aliases {
+   ethernet0 = &enet0;
+   ethernet1 = &enet1;
+   serial0 = &serial0;
+   serial1 = &serial1;
+   pci0 = &pci0;
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   PowerPC,8544@0 {
+   device_type = "cpu";
+   reg = <0>;
+   d-cache-line-size = <32>;
+   i-cache-line-size = <32>;
+   d-cache-size = <0x8000>;// L1, 32K
+   i-cache-size = <0x8000>;// L1, 32K
+   timebase-frequency = <0>;
+   bus-frequency = <0>;
+   clock-frequency = <0>;
+   next-level-cache = <&L2>;
+   };
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x 0x>;  // Filled in by U-Boot
+   };
+
+   soc8544@e000 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device_type = "soc";
+
+   ranges = <0x 0xe000 0x0010>;
+   bus-frequency = <0>;// Filled in by U-Boot
+   compatible = "fsl,mpc8544-immr", "simple-bus";
+
+   ecm-law@0 {
+   compatible = "fsl,ecm-law";
+   reg = <0x0 0x1000>;
+   fsl,num-laws = <10>;
+   };
+
+   ecm@1000 {
+   compatible = "fsl,mpc8544-ecm", "fsl,ecm";
+   reg = <0x1000 0x1000>;
+   interrupts = <17 2>;
+   interrupt-parent = <&mpic>;
+   };
+
+   memory-controller@2000 {
+   compatible = "fsl,mpc8544-memory-controller";
+   reg = <0x2000 0x1000>;
+   interrupt-parent = <&mpic>;
+   interrupts = <18 2>;
+   };
+
+   L2: l2-cache-controller@2 {
+   compatible = "fsl,mpc8544-l2-cache-controller";
+   reg = <0x2 0x1000>;
+   cache-line-size = <32>;
+   cache-size = <0x4>; // L2, 256K
+   interrupt-parent = <&mpic>;
+   interrupts = <16 2>;
+   };
+
+   i2c@3000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cell-index = <0>;
+   compatible = "fsl,mpc8544-i2c", "fsl-i2c";
+   reg = <0x3000 0x100>;
+   interrupts = <43 2>;
+   interrupt-parent = <&mpic>;
+   fsl,preserve-clocking;
+
+   dtt@28 {
+   compatible = "winbond,w83782d";
+   reg = <0x28>;
+   };
+   rtc@32 {
+   compatible = "epson,rx8025";
+   r

[U-Boot] [PATCH v2 0/9] powerpc: convert socrates board to DM

[Heiko Schocher]

convert the socrates board to use DM.

needed pending PCI patch
http://patchwork.ozlabs.org/patch/1176108/

fixes compiler warnings:
= WARNING ==
This board does not use CONFIG_DM. CONFIG_DM will be
compulsory starting with the v2020.01 release.
Failure to update may result in board removal.
See doc/driver-model/migration.rst for more info.

= WARNING ==
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.

= WARNING ==
This board does not use CONFIG_DM_PCI Please update
the board to use CONFIG_DM_PCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.

= WARNING ==
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


Travis build:
https://travis-ci.org/hsdenx/u-boot-test/builds/597488733

Changes in v2:
- use separate PCI driver for mpc85xx as Z.q. Hou mentioned:
  and drop the patchseries:
  pci: pcie_fsl: add support for none PCIe devices
  http://patchwork.ozlabs.org/project/uboot/list/?series=134976
END

Heiko Schocher (9):
  mpc85xx, socrates: suppress unknown flash warning
  mpc85xx: add socrates dts from linux
  mpc85xx, dts, socrates: add u-boot specific dtsi
  mpc85xx, socrates: add DM support
  mpc85xx, socrates: get rid of DM_USB warning
  mpc85xx, socrates: disable VIDEO
  mpc85xx, socrates: enable DM I2C
  mpc85xx, socrates: enable DM serial
  mpc85xx, socrates: add DM PCI support

 arch/powerpc/dts/Makefile |   1 +
 arch/powerpc/dts/socrates-u-boot.dtsi |  40 +++
 arch/powerpc/dts/socrates.dts | 349 ++
 board/socrates/MAINTAINERS|   4 +-
 board/socrates/law.c  |   2 -
 board/socrates/socrates.c | 222 ++--
 configs/socrates_defconfig|  24 +-
 include/configs/socrates.h|  68 +
 8 files changed, 439 insertions(+), 271 deletions(-)
 create mode 100644 arch/powerpc/dts/socrates-u-boot.dtsi
 create mode 100644 arch/powerpc/dts/socrates.dts

-- 
2.21.0

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[U-Boot] [PATCH v2 1/9] mpc85xx, socrates: suppress unknown flash warning

[Heiko Schocher]

suppress warning:
Flash: ## Unknown flash on Bank 1 - Size = 0x = 0 MB

Signed-off-by: Heiko Schocher 
---

Changes in v2: None

 include/configs/socrates.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index c7c30d367a..4192148b52 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -96,6 +96,7 @@
  */
 #define CONFIG_SYS_LBC_CACHE_BASE  0xf000  /* Localbus cacheable   
 */
 
+#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_SYS_FLASH0  0xFE00
 #define CONFIG_SYS_FLASH1  0xFC00
 #define CONFIG_SYS_FLASH_BANKS_LIST{ CONFIG_SYS_FLASH1, CONFIG_SYS_FLASH0 }
-- 
2.21.0

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Re: [U-Boot] [PATCH] ubi: env: fix redundand management

[Heiko Schocher]

Hello Philippe,

Am 14.10.2019 um 19:41 schrieb Philippe Reynes:

We check (with a #if defined()) the config ENV_UBI_VOLUME_REDUND
to know if there is a redundant env. But this config is a string
and is always defined with env is in ubi, so we always condider


typo.


that a redundand env is used.

To fix this issue, I've added a hidden flag ENV_UBI_IS_VOLUME_REDUND
that is true when ENV_UBI_VOLUME_REDUND is not "". Then, I check
this flag in the code, instead of the string ENV_UBI_VOLUME_REDUND.

Signed-off-by: Philippe Reynes 
---
  env/Kconfig| 6 ++
  include/env_internal.h | 2 +-
  2 files changed, 7 insertions(+), 1 deletion(-)


Thanks!

Reviewed-by: Heiko Schocher 

I fix the typo when applying this patch.

bye,
Heiko
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Re: [U-Boot] [PATCH 000/126] x86: Add initial support for apollolake

[Simon Glass]

Hi Bin,

On Thu, 10 Oct 2019 at 11:06, Simon Glass  wrote:
>
> Hi Bin,
>
> On Mon, 7 Oct 2019 at 08:31, Bin Meng  wrote:
> >
> > Hi Simon,
> >
> > On Wed, Oct 2, 2019 at 8:34 PM Bin Meng  wrote:
> > >
> > > Hi Simon,
> > >
> > > On Wed, Oct 2, 2019 at 10:15 AM Simon Glass  wrote:
> > > >
> > > > Hi Bin,
> > > >
> > > > On Wed, 25 Sep 2019 at 08:58, Simon Glass  wrote:
> > > > >
> > > > > Apollolake is an Intel SoC generation aimed at relatively low-end 
> > > > > embedded
> > > > > systems. It was released in 2016 but has become more popular recently 
> > > > > with
> > > > > some embedded boards using it.
> > > > >
> > > > > This series adds support for apollolake. As an example it adds an
> > > > > implementation of chromebook_coral (a large range of Chromebooks 
> > > > > released
> > > > > in 2017).
> > > > >
> > > > > The series provides only enough to boot to a prompt. It does not 
> > > > > include
> > > > > display, storage, USB, etc. But it does include the major part of the
> > > > > plumbing.
> > > > >
> > > > > Since this is the first time U-Boot has used FSP2 there is quite a 
> > > > > bit of
> > > > > refactoring needed. Some of this is in previous series, but much of 
> > > > > it is
> > > > > here.
> > > > >
> > > > > Some further clean-up is needed with this series and it needs more
> > > > > documentation, but it is ready for review.
> > > > >
> > > > > This series is available at u-boot-dm/coral-working
> > > >
> > > > Just a note on this series. I sent it out as it was already getting
> > > > huge and I don't like sitting on so many patches.
> > > >
> > > > I have since done a little more work and have more peripherals running
> > > > as well as FSP-S. In doing so I've found some clean-ups in the FSP
> > > > parts, moving apollolake-specific code out of the fsp/ directory where
> > > > it ended up, for example.
> > > >
> > > > This results in another 20 patches or so :-(
> > > >
> > > > The first 45 patches in *this* are not specific to x86 so I am
> > > > thinking of dealing with them separately.
> > > >
> > > > So my plan is:
> > > >
> > > > 1. Get the sandbox/dm patches reviewed and applied
> > > > 2. Tidy up the remaining series
> > > > 3. Add the new patches
> > > > 4. Resend
> > > >
> > >
> > > Sounds like a good plan.
> > >
> > > I will start reviewing the patches, and apply the patches as many as
> > > possible, to save some efforts of resending such a huge patch series.
> > >
> >
> > I've applied about half of current patches to u-boot-x86/next. I see
> > most of them are clean-ups, and preparation for FSP2, and suspect some
> > patches may have broader impacts other than sandbox or x86. Hence I am
> > going to send a PR soon for what I have for now once the new release
> > merge window is open, to leave more time for wider testing. I will
> > continue reviewing the remaining patches.
> >
> > > > I am on holiday for a week so will get to this on the 12th or so.
>
> Thanks for your effort on this. I really appreciate your clean-ups too
> and I'm sorry I wasn't able to get things into a better state in time.
>
> I'll take a look through the comments and do a respin. I suspect it
> will take me until the 21st but we will see.

Still on track for the 21st. I just need to sort out the SPI driver.

The WIP is at u-boot-dm/coral-working

Regards,
Simon
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Re: [U-Boot] [PATCH 050/126] x86: timer: Reduce timer code size in TPL on Intel CPUs

[Simon Glass]

Hi Bin,

On Sun, 13 Oct 2019 at 20:00, Bin Meng  wrote:
>
> Hi Simon,
>
> On Sun, Oct 13, 2019 at 1:55 AM Simon Glass  wrote:
> >
> > Hi Bin,
> >
> > On Fri, 11 Oct 2019 at 23:18, Bin Meng  wrote:
> > >
> > > Hi Simon,
> > >
> > > On Sat, Oct 12, 2019 at 11:38 AM Simon Glass  wrote:
> > > >
> > > > Hi Bin,
> > > >
> > > > On Fri, 11 Oct 2019 at 07:19, Bin Meng  wrote:
> > > > >
> > > > > Hi Simon,
> > > > >
> > > > > On Fri, Oct 11, 2019 at 1:06 AM Simon Glass  wrote:
> > > > > >
> > > > > > Hi Bin,
> > > > > >
> > > > > > On Sat, 5 Oct 2019 at 08:36, Bin Meng  wrote:
> > > > > > >
> > > > > > > Hi Simon,
> > > > > > >
> > > > > > > On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  
> > > > > > > wrote:
> > > > > > > >
> > > > > > > > Most of the timer-calibration methods are not needed on recent 
> > > > > > > > Intel CPUs
> > > > > > > > and just increase code size. Add an option to use the 
> > > > > > > > known-good way to
> > > > > > > > get the clock frequency in TPL. Size reduction is about 700 
> > > > > > > > bytes.
> > > > > > > >
> > > > > > > > Signed-off-by: Simon Glass 
> > > > > > > > ---
> > > > > > > >
> > > > > > > >  drivers/timer/Kconfig | 29 +++--
> > > > > > > >  drivers/timer/tsc_timer.c |  7 +--
> > > > > > > >  2 files changed, 24 insertions(+), 12 deletions(-)
> > > > > > > >
> > > > > > > > diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
> > > > > > > > index 5f4bc6edb67..90bc8ec7c53 100644
> > > > > > > > --- a/drivers/timer/Kconfig
> > > > > > > > +++ b/drivers/timer/Kconfig
> > > > > > > > @@ -117,16 +117,6 @@ config RENESAS_OSTM_TIMER
> > > > > > > >   Enables support for the Renesas OSTM Timer driver.
> > > > > > > >   This timer is present on Renesas RZ/A1 R7S72100 SoCs.
> > > > > > > >
> > > > > > > > -config X86_TSC_TIMER_EARLY_FREQ
> > > > > > > > -   int "x86 TSC timer frequency in MHz when used as the 
> > > > > > > > early timer"
> > > > > > > > -   depends on X86_TSC_TIMER
> > > > > > > > -   default 1000
> > > > > > > > -   help
> > > > > > > > - Sets the estimated CPU frequency in MHz when TSC is 
> > > > > > > > used as the
> > > > > > > > - early timer and the frequency can neither be 
> > > > > > > > calibrated via some
> > > > > > > > - hardware ways, nor got from device tree at the time 
> > > > > > > > when device
> > > > > > > > - tree is not available yet.
> > > > > > > > -
> > > > > > > >  config OMAP_TIMER
> > > > > > > > bool "Omap timer support"
> > > > > > > > depends on TIMER
> > > > > > > > @@ -174,6 +164,25 @@ config X86_TSC_TIMER
> > > > > > > > help
> > > > > > > >   Select this to enable Time-Stamp Counter (TSC) timer 
> > > > > > > > for x86.
> > > > > > > >
> > > > > > > > +config X86_TSC_TIMER_EARLY_FREQ
> > > > > > > > +   int "x86 TSC timer frequency in MHz when used as the 
> > > > > > > > early timer"
> > > > > > > > +   depends on X86_TSC_TIMER
> > > > > > > > +   default 1000
> > > > > > > > +   help
> > > > > > > > + Sets the estimated CPU frequency in MHz when TSC is 
> > > > > > > > used as the
> > > > > > > > + early timer and the frequency can neither be 
> > > > > > > > calibrated via some
> > > > > > > > + hardware ways, nor got from device tree at the time 
> > > > > > > > when device
> > > > > > > > + tree is not available yet.
> > > > > > > > +
> > > > > > > > +config TPL_X86_TSC_TIMER_NATIVE
> > > > > > > > +   bool "x86 TSC timer uses native calibration"
> > > > > > > > +   depends on TPL && X86_TSC_TIMER
> > > > > > > > +   help
> > > > > > > > + Selects native timer calibration for TPL and don't 
> > > > > > > > include the other
> > > > > > > > + methods in the code. This helps to reduce code size 
> > > > > > > > in TPL and works
> > > > > > > > + on fairly modern Intel chips. Code-size reductions is 
> > > > > > > > about 700
> > > > > > > > + bytes.
> > > > > > > > +
> > > > > > > >  config MTK_TIMER
> > > > > > > > bool "MediaTek timer support"
> > > > > > > > depends on TIMER
> > > > > > > > diff --git a/drivers/timer/tsc_timer.c 
> > > > > > > > b/drivers/timer/tsc_timer.c
> > > > > > > > index 919caba8a14..9630036bc7f 100644
> > > > > > > > --- a/drivers/timer/tsc_timer.c
> > > > > > > > +++ b/drivers/timer/tsc_timer.c
> > > > > > > > @@ -49,8 +49,7 @@ static unsigned long 
> > > > > > > > native_calibrate_tsc(void)
> > > > > > > > return 0;
> > > > > > > >
> > > > > > > > crystal_freq = tsc_info.ecx / 1000;
> > > > > > > > -
> > > > > > > > -   if (!crystal_freq) {
> > > > > > > > +   if (!CONFIG_IS_ENABLED(X86_TSC_TIMER_NATIVE) && 
> > > > > > > > !crystal_freq) {
> > > > > > > > switch (gd->arch.x86_model) {
> > > > > > > > case INTEL_FAM6_SKYLAKE_MOBILE:
> > > > > > > > case INTEL_FAM6_SKYLAKE_D

Re: [U-Boot] [PATCH 082/126] x86: Adjust mrccache_get_region() to use livetree

[Simon Glass]

Hi Bin,

On Thu, 10 Oct 2019 at 00:45, Bin Meng  wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:59 PM Simon Glass  wrote:
> >
> > Change the algorithm to first find the flash device then read the
> > properties using the livetree API. With this change the device is not
> > probed so this needs to be done in mrccache_save().
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >  arch/x86/lib/mrccache.c | 59 ++---
> >  1 file changed, 31 insertions(+), 28 deletions(-)
> >
> > diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c
> > index e286bdf1b30..296dd5e54f7 100644
> > --- a/arch/x86/lib/mrccache.c
> > +++ b/arch/x86/lib/mrccache.c
> > @@ -14,6 +14,8 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> > +#include 
> >
> >  DECLARE_GLOBAL_DATA_PTR;
> >
> > @@ -197,45 +199,43 @@ int mrccache_reserve(void)
> >
> >  int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
> >  {
> > -   const void *blob = gd->fdt_blob;
> > -   int node, mrc_node;
> > +   struct udevice *dev;
> > +   ofnode mrc_node;
> > +   ulong map_base;
> > +   size_t map_size;
> > +   u32 offset;
> > u32 reg[2];
> > int ret;
> >
> > /* Find the flash chip within the SPI controller node */
> > -   node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
> > -   if (node < 0) {
> > -   debug("%s: Cannot find SPI flash\n", __func__);
> > -   return -ENOENT;
> > -   }
> > -
> > -   if (fdtdec_get_int_array(blob, node, "memory-map", reg, 2)) {
> > -   debug("%s: Cannot find memory map\n", __func__);
> > -   return -EINVAL;
> > +   ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
> > +   if (ret)
> > +   return log_msg_ret("Cannot find SPI flash\n", ret);
> > +   ret = spi_flash_get_mmap(dev, &map_base, &map_size, &offset);
>
> This looks a separate patch, not related to livetree conversion.

Yes, will split this out.

>
> > +   if (!ret) {
> > +   entry->base = map_base;
> > +   } else {
> > +   ret = dev_read_u32_array(dev, "memory-map", reg, 2);
> > +   if (ret)
> > +   return log_msg_ret("Cannot find memory map\n", ret);
> > +   entry->base = reg[0];
> > }
> > -   entry->base = reg[0];
> >
> > /* Find the place where we put the MRC cache */
> > -   mrc_node = fdt_subnode_offset(blob, node, "rw-mrc-cache");
> > -   if (mrc_node < 0) {
> > -   debug("%s: Cannot find node\n", __func__);
> > -   return -EPERM;
> > -   }
> > +   mrc_node = dev_read_subnode(dev, "rw-mrc-cache");
> > +   if (!ofnode_valid(mrc_node))
> > +   return log_msg_ret("Cannot find node", -EPERM);
> >
> > -   if (fdtdec_get_int_array(blob, mrc_node, "reg", reg, 2)) {
> > -   debug("%s: Cannot find address\n", __func__);
> > -   return -EINVAL;
> > -   }
> > +   ret = ofnode_read_u32_array(mrc_node, "reg", reg, 2);
> > +   if (ret)
> > +   return log_msg_ret("Cannot find address", ret);
> > entry->offset = reg[0];
> > entry->length = reg[1];
> >
> > -   if (devp) {
> > -   ret = uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
> > -devp);
> > -   debug("ret = %d\n", ret);
> > -   if (ret)
> > -   return ret;
> > -   }
> > +   if (devp)
> > +   *devp = dev;
> > +   debug("MRC cache in '%s', offset %x, len %x, base %x\n",
> > + dev->name, entry->offset, entry->length, entry->base);
> >
> > return 0;
> >  }
> > @@ -253,6 +253,9 @@ int mrccache_save(void)
> >   gd->arch.mrc_output_len);
> >
> > ret = mrccache_get_region(&sf, &entry);
> > +   if (ret)
> > +   goto err_entry;
> > +   ret = device_probe(sf);
>
> Why we need manually probe spi flash here?

Probing it before calling the get_mmap() function seems to break it
and then causes the SPI flash to stop working. I'll add a larger
comment. Hopefully we can correct this.

>
> > if (ret)
> > goto err_entry;
> > data  = (struct mrc_data_container *)gd->arch.mrc_output;
> > --
>
> Regards,
> Bin

Regards,
Simon
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Re: [U-Boot] [PATCH 16/37] i2c: add support for offset overflow in to address

[Simon Glass]

Hi Robert,

On Tue, 15 Oct 2019 at 09:55, Robert Beckett  wrote:
>
> Some devices (2 wire eeproms for example) use some bits from the chip
> address to represent the high bits of the offset instead of or as well
> as using multiple bytes for the offset, effectively stealing chip
> addresses on the bus.
>
> Add a chip offset mask that can be set for any i2c chip which gets
> filled with the offset overflow during offset setup.
>
> Signed-off-by: Robert Beckett 
> Signed-off-by: Ian Ray 
> ---
>  drivers/i2c/i2c-uclass.c | 32 ++--
>  include/i2c.h| 24 
>  2 files changed, 50 insertions(+), 6 deletions(-)

Please can you update the i2c tests to cover this new feature?

>
> diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
> index e47abf1833..7580867dc1 100644
> --- a/drivers/i2c/i2c-uclass.c
> +++ b/drivers/i2c/i2c-uclass.c
> @@ -52,16 +52,19 @@ void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
>  static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
> uint8_t offset_buf[], struct i2c_msg *msg)
>  {
> -   int offset_len;
> +   int offset_len = chip->offset_len;
>
> msg->addr = chip->chip_addr;
> +   if (chip->chip_addr_offset_mask)
> +   msg->addr |= (offset >> (8 * offset_len)) &
> +   chip->chip_addr_offset_mask;
> msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
> msg->len = chip->offset_len;
> msg->buf = offset_buf;
> -   if (!chip->offset_len)
> +   if (!offset_len)
> return -EADDRNOTAVAIL;
> -   assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
> -   offset_len = chip->offset_len;
> +   assert(offset_len <= I2C_MAX_OFFSET_LEN);
> +
> while (offset_len--)
> *offset_buf++ = offset >> (8 * offset_len);
>
> @@ -83,7 +86,7 @@ static int i2c_read_bytewise(struct udevice *dev, uint 
> offset,
> if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
> return -EINVAL;
> ptr = msg + 1;
> -   ptr->addr = chip->chip_addr;
> +   ptr->addr = msg->addr;
> ptr->flags = msg->flags | I2C_M_RD;
> ptr->len = 1;
> ptr->buf = &buffer[i];
> @@ -132,6 +135,7 @@ int dm_i2c_read(struct udevice *dev, uint offset, uint8_t 
> *buffer, int len)
>
> if (!ops->xfer)
> return -ENOSYS;
> +

Unrelated change

> if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
> return i2c_read_bytewise(dev, offset, buffer, len);
> ptr = msg;
> @@ -139,7 +143,7 @@ int dm_i2c_read(struct udevice *dev, uint offset, uint8_t 
> *buffer, int len)
> ptr++;
>
> if (len) {
> -   ptr->addr = chip->chip_addr;
> +   ptr->addr = msg->addr;
> ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
> ptr->flags |= I2C_M_RD;
> ptr->len = len;
> @@ -465,6 +469,22 @@ int i2c_get_chip_offset_len(struct udevice *dev)
> return chip->offset_len;
>  }
>
> +int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask)
> +{
> +   struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
> +
> +   chip->chip_addr_offset_mask = mask;
> +
> +   return 0;
> +}
> +
> +uint i2c_get_chip_addr_offset_mask(struct udevice *dev)
> +{
> +   struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
> +
> +   return chip->chip_addr_offset_mask;
> +}
> +
>  #ifdef CONFIG_DM_GPIO
>  static void i2c_gpio_set_pin(struct gpio_desc *pin, int bit)
>  {
> diff --git a/include/i2c.h b/include/i2c.h
> index 33570f5404..3c927340da 100644
> --- a/include/i2c.h
> +++ b/include/i2c.h
> @@ -45,12 +45,17 @@ struct udevice;
>   * represent up to 256 bytes. A value larger than 1 may be
>   * needed for larger devices.
>   * @flags: Flags for this chip (dm_i2c_chip_flags)
> + * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
> + *devices which steal addresses as part of offset.
> + *If offset_len is zero, then the offset is encoded
> + *completely within the chip address itself.

Can you add an example value here, or point to some documentation on
this? There is not enough info here to figure out what is going on.


>   * @emul: Emulator for this chip address (only used for emulation)
>   */
>  struct dm_i2c_chip {
> uint chip_addr;
> uint offset_len;
> uint flags;
> +   uint chip_addr_offset_mask;
>  #ifdef CONFIG_SANDBOX
> struct udevice *emul;
> bool test_mode;
> @@ -261,6 +266,25 @@ int i2c_set_chip_offset_len(struct udevice *dev, uint 
> offset_len);
>   */
>  int i2c_get_chip_offset_len(struct udevice *dev);
>
> +/**
> + * i2c_set_chip_addr_offset_mask() - set mask of addre

Re: [U-Boot] [PATCH v2] spl: Introduce SPL_DM_GPIO Kconfig define

[Simon Glass]

Hi Lukasz,

On Mon, 14 Oct 2019 at 06:41, Lukasz Majewski  wrote:
>
> Hi Simon,
>
> > Hi Lukasz,
> >
> > On Wed, 9 Oct 2019 at 03:02, Lukasz Majewski  wrote:
> > >
> > > Dear Tom,
> > >
> > > > This define indicates if DM_GPIO shall be supported in SPL. This
> > > > allows proper operation of DM converted GPIO drivers in SPL,
> > > > which use boards.
> > > >
> > > > Signed-off-by: Lukasz Majewski 
> > > > ---
> > > >
> > > > Changes in v2:
> > > > - Add dependency on DM_GPIO
> > > >
> > >
> > > Tom, are there any issues preventing this patch from being applied
> > > to -master?
> >
> > This does not actually define DM_GPIO anywhere though, so this is
> > unused.
>
> The goal of this patch is to introduce in Kconfig a CONFIG_SPL_DM_GPIO.
> This define would be needed anyway, no matter if you perform the
> changes from [1].
>
> This Kconfig define is necessary for the XEA board (i.MX28 based one),
> which uses OF_PLATDATA in SPL excessively to fit into size constraints.
>
> To be more precise the mxs_gpio.c driver uses
> #if CONFIG_IS_ENABLED(DM_GPIO) to provide DM GPIO support in SPL with
> OF_PLATDATA.
>
>
> >
> > As it happens I sent a similar patch[1], but it doesn't work. I'll
> > try again.
>
> It would be great if we could have [1] not causing build breaks.
> However, for my used case it would be enough to have the Kconfig
> definition of CONFIG_SPL_DM_GPIO (as I'm using OF_PLATDATA) with it.
>
> Simon, if you don't have time to do the fix for [1] I would opt for
> pulling this patch (to just add proper Kconfig define).

I have had a crack at this here:

https://gitlab.denx.de/u-boot/custodians/u-boot-dm/commit/a6d15bbd9e4e7684dd47d21817df85915f28cbab

I expect to send this series along with this patch at the end of this week.

>
> >
> > >
> > > >  common/spl/Kconfig | 6 ++
> > > >  1 file changed, 6 insertions(+)
> > > >
> > > > diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> > > > index f467eca2be..e3df8efa7e 100644
> > > > --- a/common/spl/Kconfig
> > > > +++ b/common/spl/Kconfig
> > > > @@ -452,6 +452,12 @@ config SPL_DMA_SUPPORT
> > > > the CPU moving the data. Enable this option to build the
> > > > drivers in drivers/dma as part of an SPL build.
> > > >
> > > > +config SPL_DM_GPIO
> > > > + bool "Support Driver Model GPIO drivers"
> > > > + depends on SPL_GPIO_SUPPORT && DM_GPIO
> > > > + help
> > > > +   Enable support for Driver Model based GPIO drivers in SPL.
> > > > +
> > > >  config SPL_DRIVERS_MISC_SUPPORT
> > > >   bool "Support misc drivers"
> > > >   help
> > >
> >
> > Regards,
> > SImon
> >
> > [1] http://patchwork.ozlabs.org/patch/1167276/
>

Regards,
Simon
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Re: [U-Boot] [PATCH] nvme: use page-aligned buffer for identify command

[Bin Meng]

On Mon, Oct 14, 2019 at 7:10 PM Patrick Wildt  wrote:
>
> Change the stack-allocated buffer for the identification command
> to explicitly allocate page-aligned buffers.  Even though the spec
> seems to allow having admin queue commands on non page-aligned
> buffers, it seems to not be possible on my i.MX8MQ board with a
> a Silicon Power P34A80.  Since all of the NVMe drivers I have seen
> always do admin commands on a page-aligned buffer, which does work
> on my system, it makes sense for us to do that as well.
>
> Signed-off-by: Patrick Wildt 
> ---
>  drivers/nvme/nvme.c | 24 ++--
>  1 file changed, 18 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
> index ee6b581d9e..2444e0270f 100644
> --- a/drivers/nvme/nvme.c
> +++ b/drivers/nvme/nvme.c
> @@ -580,14 +580,19 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
>
>  static int nvme_get_info_from_identify(struct nvme_dev *dev)
>  {
> -   ALLOC_CACHE_ALIGN_BUFFER(char, buf, sizeof(struct nvme_id_ctrl));
> -   struct nvme_id_ctrl *ctrl = (struct nvme_id_ctrl *)buf;
> +   struct nvme_id_ctrl *ctrl;
> int ret;
> int shift = NVME_CAP_MPSMIN(dev->cap) + 12;
>
> +   ctrl = memalign(4096, sizeof(struct nvme_id_ctrl));

Please use ndev->page_size instead of 4096.

> +   if (!ctrl)
> +   return -ENOMEM;
> +
> ret = nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl);
> -   if (ret)
> +   if (ret) {
> +   free(ctrl);
> return -EIO;
> +   }
>
> dev->nn = le32_to_cpu(ctrl->nn);
> dev->vwc = ctrl->vwc;
> @@ -618,6 +623,7 @@ static int nvme_get_info_from_identify(struct nvme_dev 
> *dev)
> dev->max_transfer_shift = 20;
> }
>
> +   free(ctrl);
> return 0;
>  }
>
> @@ -658,16 +664,21 @@ static int nvme_blk_probe(struct udevice *udev)
> struct blk_desc *desc = dev_get_uclass_platdata(udev);
> struct nvme_ns *ns = dev_get_priv(udev);
> u8 flbas;
> -   ALLOC_CACHE_ALIGN_BUFFER(char, buf, sizeof(struct nvme_id_ns));
> -   struct nvme_id_ns *id = (struct nvme_id_ns *)buf;
> struct pci_child_platdata *pplat;
> +   struct nvme_id_ns *id;
> +
> +   id = memalign(4096, sizeof(struct nvme_id_ns));

ditto

> +   if (!id)
> +   return -ENOMEM;
>
> memset(ns, 0, sizeof(*ns));
> ns->dev = ndev;
> /* extract the namespace id from the block device name */
> ns->ns_id = trailing_strtol(udev->name) + 1;
> -   if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id))
> +   if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) {
> +   free(id);
> return -EIO;
> +   }
>
> memcpy(&ns->eui64, &id->eui64, sizeof(id->eui64));
> flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK;
> @@ -686,6 +697,7 @@ static int nvme_blk_probe(struct udevice *udev)
> memcpy(desc->product, ndev->serial, sizeof(ndev->serial));
> memcpy(desc->revision, ndev->firmware_rev, 
> sizeof(ndev->firmware_rev));
>
> +   free(id);
> return 0;
>  }
>

Regards,
Bin
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[U-Boot] [PATCH] imx: imx8m: fix boot when CONFIG_$(SPL_)CLK not defined

[Peng Fan]

When CONFIG_$(SPL_)CLK not defined, the clock controller device
not exist, so to avoid boot failure for platform not have
CONFIG_$(SPL_)CLK, add a check.

Reviewed-by: Patrick Wildt 
Tested-by: Patrick Wildt 
Signed-off-by: Peng Fan 
---

V1:
 Based on pull request https://github.com/MrVan/u-boot/tree/imx-master-10-15

 arch/arm/mach-imx/imx8m/soc.c | 14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index c46031dd12..3e73ca3cca 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -236,12 +236,14 @@ int arch_cpu_init_dm(void)
struct udevice *dev;
int ret;
 
-   ret = uclass_get_device_by_name(UCLASS_CLK,
-   "clock-controller@3038",
-   &dev);
-   if (ret < 0) {
-   printf("Failed to find clock node. Check device tree\n");
-   return ret;
+   if (CONFIG_IS_ENABLED(CLK)) {
+   ret = uclass_get_device_by_name(UCLASS_CLK,
+   "clock-controller@3038",
+   &dev);
+   if (ret < 0) {
+   printf("Failed to find clock node. Check device 
tree\n");
+   return ret;
+   }
}
 
return 0;
-- 
2.16.4

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Re: [U-Boot] [PATCH v4 1/6] dm: regulator: support regulator more state

[Kever Yang]

Hi Elaine,
    This patch can not pass the Travis test(pytest option), please help 
to update

this patch, you can leave other patches as is and update this patch only.

Thanks,
- Kever
On 2019/9/26 下午3:43, Elaine Zhang wrote:

From: Joseph Chen 

support parse regulator standard property:
regulator-off-in-suspend;
regulator-init-microvolt;
regulator-suspend-microvolt:
  regulator_get_suspend_enable
  regulator_set_suspend_enable
  regulator_get_suspend_value
  regulator_set_suspend_value

Signed-off-by: Joseph Chen 
Signed-off-by: Elaine Zhang 
Reviewed-by: Kever Yang
---
  doc/device-tree-bindings/regulator/regulator.txt | 27 +
  drivers/power/regulator/regulator-uclass.c   | 70 
  include/power/regulator.h| 64 ++
  test/dm/regulator.c  | 46 
  4 files changed, 207 insertions(+)

diff --git a/doc/device-tree-bindings/regulator/regulator.txt 
b/doc/device-tree-bindings/regulator/regulator.txt
index 4ba642b7c77f..6c9a02120fde 100644
--- a/doc/device-tree-bindings/regulator/regulator.txt
+++ b/doc/device-tree-bindings/regulator/regulator.txt
@@ -36,6 +36,28 @@ Optional properties:
  - regulator-always-on: regulator should never be disabled
  - regulator-boot-on: enabled by bootloader/firmware
  - regulator-ramp-delay: ramp delay for regulator (in uV/us)
+- regulator-init-microvolt: a init allowed Voltage value
+- regulator-state-(standby|mem|disk)
+  type: object
+  description:
+sub-nodes for regulator state in Standby, Suspend-to-RAM, and
+Suspend-to-DISK modes. Equivalent with standby, mem, and disk Linux
+sleep states.
+
+properties:
+  regulator-on-in-suspend:
+description: regulator should be on in suspend state.
+type: boolean
+
+  regulator-off-in-suspend:
+description: regulator should be off in suspend state.
+type: boolean
+
+  regulator-suspend-microvolt:
+description: the default voltage which regulator would be set in
+  suspend. This property is now deprecated, instead setting voltage
+  for suspend mode via the API which regulator driver provides is
+  recommended.
  
  Note

  The "regulator-name" constraint is used for setting the device's uclass
@@ -59,7 +81,12 @@ ldo0 {
regulator-max-microvolt = <180>;
regulator-min-microamp = <10>;
regulator-max-microamp = <10>;
+   regulator-init-microvolt = <180>;
regulator-always-on;
regulator-boot-on;
regulator-ramp-delay = <12000>;
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   regulator-suspend-microvolt = <180>;
+   };
  };
diff --git a/drivers/power/regulator/regulator-uclass.c 
b/drivers/power/regulator/regulator-uclass.c
index 76be95bcd159..b49c0829ed31 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -77,6 +77,33 @@ int regulator_set_value(struct udevice *dev, int uV)
return ret;
  }
  
+int regulator_set_suspend_value(struct udevice *dev, int uV)

+{
+   const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+   struct dm_regulator_uclass_platdata *uc_pdata;
+
+   uc_pdata = dev_get_uclass_platdata(dev);
+   if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV)
+   return -EINVAL;
+   if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV)
+   return -EINVAL;
+
+   if (!ops->set_suspend_value)
+   return -ENOSYS;
+
+   return ops->set_suspend_value(dev, uV);
+}
+
+int regulator_get_suspend_value(struct udevice *dev)
+{
+   const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+   if (!ops->get_suspend_value)
+   return -ENOSYS;
+
+   return ops->get_suspend_value(dev);
+}
+
  /*
   * To be called with at most caution as there is no check
   * before setting the actual voltage value.
@@ -170,6 +197,26 @@ int regulator_set_enable_if_allowed(struct udevice *dev, 
bool enable)
return ret;
  }
  
+int regulator_set_suspend_enable(struct udevice *dev, bool enable)

+{
+   const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+   if (!ops->set_suspend_enable)
+   return -ENOSYS;
+
+   return ops->set_suspend_enable(dev, enable);
+}
+
+int regulator_get_suspend_enable(struct udevice *dev)
+{
+   const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+   if (!ops->get_suspend_enable)
+   return -ENOSYS;
+
+   return ops->get_suspend_enable(dev);
+}
+
  int regulator_get_mode(struct udevice *dev)
  {
const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
@@ -235,6 +282,14 @@ int regulator_autoset(struct udevice *dev)
int ret = 0;
  
  	uc_pdata = dev_get_uclass_platdata(dev);

+
+   ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
+  

Re: [U-Boot] [PATCH v2 2/2] test: provide test for errno_str()

[Simon Glass]

On Tue, 15 Oct 2019 at 13:46, Heinrich Schuchardt  wrote:
>
> Provide a unit test for errno_str(). Test that known and unknown error
> numbers are handled correctly.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
> v2:
> Do no use constants for strings.
> ---
>  test/lib/Makefile |  1 +
>  test/lib/test_errno_str.c | 46 +++
>  2 files changed, 47 insertions(+)
>  create mode 100644 test/lib/test_errno_str.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] lib: time: Add microsecond timer

[Simon Glass]

Hi Marek,

On Tue, 15 Oct 2019 at 14:43, Marek Vasut  wrote:
>
> Add get_timer_us(), which is useful e.g. when we need higher
> precision timestamps.

Can we use timer_get_us()? It seems confusing to have two.

>
> Signed-off-by: Marek Vasut 
> Cc: Tom Rini 
> Cc: Simon Glass 
> ---
>  include/time.h |  1 +
>  lib/time.c | 14 ++
>  2 files changed, 15 insertions(+)

Regards,
Simon
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Re: [U-Boot] [PATCH] imx: update i.MX8MQ device trees

[Peng Fan]

> Subject: [PATCH] imx: update i.MX8MQ device trees
> 
> This updates the i.MX8MQ device trees and, necessarily, also the
> i.MX8MQ clock bindings.  These are taken verbatim from from the
> Linux kernel version v5.4-rc2, which three small changes which
> were already part of the previous device tree:
> 
>  * Keep the PSCI reserved memory range
>  * Keep the alias for ethernet, so that the MAC address can be set
>  * Keep the modified #include for the IOMUXC pins
> 
> Signed-off-by: Patrick Wildt 

Acked-by: Peng Fan 

> ---
>  arch/arm/dts/Makefile|5 +-
>  arch/arm/dts/fsl-imx8mq-evk.dts  |  414 
>  arch/arm/dts/fsl-imx8mq.dtsi |  462 -
>  arch/arm/dts/imx8mq-evk.dts  |  486 ++
>  arch/arm/dts/imx8mq.dtsi | 
> ++
>  configs/imx8mq_evk_defconfig |2 +-
>  include/configs/imx8mq_evk.h |2 +-
>  include/dt-bindings/clock/imx8mq-clock.h |  571 ---
>  8 files changed, 1785 insertions(+), 1268 deletions(-)
>  delete mode 100644 arch/arm/dts/fsl-imx8mq-evk.dts
>  delete mode 100644 arch/arm/dts/fsl-imx8mq.dtsi
>  create mode 100644 arch/arm/dts/imx8mq-evk.dts
>  create mode 100644 arch/arm/dts/imx8mq.dtsi
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 727da1a280..453d822ad7 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -645,8 +645,9 @@ dtb-$(CONFIG_ARCH_IMX8) += \
>   fsl-imx8qxp-colibri.dtb \
>   fsl-imx8qxp-mek.dtb
> 
> -dtb-$(CONFIG_ARCH_IMX8M) += fsl-imx8mq-evk.dtb \
> - imx8mm-evk.dtb
> +dtb-$(CONFIG_ARCH_IMX8M) += \
> + imx8mm-evk.dtb \
> + imx8mq-evk.dtb
> 
>  dtb-$(CONFIG_RCAR_GEN2) += \
>   r8a7790-lager-u-boot.dtb \
> diff --git a/arch/arm/dts/fsl-imx8mq-evk.dts
> b/arch/arm/dts/fsl-imx8mq-evk.dts
> deleted file mode 100644
> index 4a08099b3c..00
> --- a/arch/arm/dts/fsl-imx8mq-evk.dts
> +++ /dev/null
> @@ -1,414 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * Copyright 2018 NXP
> - */
> -
> -/dts-v1/;
> -
> -/* First 128KB is for PSCI ATF. */
> -/memreserve/ 0x4000 0x0002;
> -
> -#include "fsl-imx8mq.dtsi"
> -
> -/ {
> - model = "Freescale i.MX8MQ EVK";
> - compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
> -
> - chosen {
> - bootargs = "console=ttymxc0,115200
> earlycon=ec_imx6q,0x3086,115200";
> - };
> -
> - regulators {
> - compatible = "simple-bus";
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - reg_usdhc2_vmmc: usdhc2_vmmc {
> - compatible = "regulator-fixed";
> - regulator-name = "VSD_3V3";
> - regulator-min-microvolt = <330>;
> - regulator-max-microvolt = <330>;
> - gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> - enable-active-high;
> - };
> - };
> -
> - pwmleds {
> - compatible = "pwm-leds";
> -
> - ledpwm2 {
> - label = "PWM2";
> - pwms = <&pwm2 0 5>;
> - max-brightness = <255>;
> - };
> - };
> -};
> -
> -&iomuxc {
> - pinctrl-names = "default";
> -
> - imx8mq-evk {
> - pinctrl_fec1: fec1grp {
> - fsl,pins = <
> - MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
> - MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO   0x23
> - MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3   0x1f
> - MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2   0x1f
> - MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1   0x1f
> - MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0   0x1f
> - MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3   0x91
> - MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2   0x91
> - MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1   0x91
> - MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0   0x91
> - MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC   0x1f
> - MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC   0x91
> - MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL
>   0x91
> - MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL
>   0x1f
> - MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9   0x19
> - >;
> - };
> -
> - pinctrl_i2c1: i2c1grp {
> - fsl,pins = <
> - MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL  0x407f
> - MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA  0x407f
> - >;
> - };
> -
> - pinctrl_i2c2: i2c2grp {
> - fsl,pins = <
> - 

[U-Boot] [PATCH] lib: time: Add microsecond timer

[Marek Vasut]

Add get_timer_us(), which is useful e.g. when we need higher
precision timestamps.

Signed-off-by: Marek Vasut 
Cc: Tom Rini 
Cc: Simon Glass 
---
 include/time.h |  1 +
 lib/time.c | 14 ++
 2 files changed, 15 insertions(+)

diff --git a/include/time.h b/include/time.h
index 1e9b369be7..a1149522ed 100644
--- a/include/time.h
+++ b/include/time.h
@@ -13,6 +13,7 @@ unsigned long get_timer(unsigned long base);
  * Granularity may be larger than 1us if hardware does not support this.
  */
 unsigned long timer_get_us(void);
+uint64_t get_timer_us(uint64_t base);
 
 /*
  * timer_test_add_offset()
diff --git a/lib/time.c b/lib/time.c
index f5751ab162..f30fc05804 100644
--- a/lib/time.c
+++ b/lib/time.c
@@ -134,6 +134,20 @@ ulong __weak get_timer(ulong base)
return tick_to_time(get_ticks()) - base;
 }
 
+static uint64_t notrace tick_to_time_us(uint64_t tick)
+{
+   ulong div = get_tbclk() / 1000;
+
+   tick *= CONFIG_SYS_HZ;
+   do_div(tick, div);
+   return tick;
+}
+
+uint64_t __weak get_timer_us(uint64_t base)
+{
+   return tick_to_time_us(get_ticks()) - base;
+}
+
 unsigned long __weak notrace timer_get_us(void)
 {
return tick_to_time(get_ticks() * 1000);
-- 
2.23.0

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[U-Boot] [PATCH] ARM: rmobile: Enable CONFIG_ARCH_FIXUP_FDT_MEMORY on Gen3

[Marek Vasut]

Enable CONFIG_ARCH_FIXUP_FDT_MEMORY to let U-Boot patch the
Linux DT memory entries.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 configs/r8a7795_salvator-x_defconfig  | 1 -
 configs/r8a7795_ulcb_defconfig| 1 -
 configs/r8a77965_salvator-x_defconfig | 1 -
 configs/r8a77965_ulcb_defconfig   | 1 -
 configs/r8a7796_salvator-x_defconfig  | 1 -
 configs/r8a7796_ulcb_defconfig| 1 -
 configs/r8a77970_eagle_defconfig  | 1 -
 configs/r8a77990_ebisu_defconfig  | 1 -
 configs/r8a77995_draak_defconfig  | 1 -
 9 files changed, 9 deletions(-)

diff --git a/configs/r8a7795_salvator-x_defconfig 
b/configs/r8a7795_salvator-x_defconfig
index dc6ac02b7e..2ae24dc324 100644
--- a/configs/r8a7795_salvator-x_defconfig
+++ b/configs/r8a7795_salvator-x_defconfig
@@ -7,7 +7,6 @@ CONFIG_TARGET_SALVATOR_X=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6338000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 
ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/r8a7795_ulcb_defconfig b/configs/r8a7795_ulcb_defconfig
index ecd93cf80f..0229c6dbbb 100644
--- a/configs/r8a7795_ulcb_defconfig
+++ b/configs/r8a7795_ulcb_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_ULCB=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6338000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 
ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/r8a77965_salvator-x_defconfig 
b/configs/r8a77965_salvator-x_defconfig
index e620edad37..916f0f6b1b 100644
--- a/configs/r8a77965_salvator-x_defconfig
+++ b/configs/r8a77965_salvator-x_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_SALVATOR_X=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6338000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 
ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/r8a77965_ulcb_defconfig b/configs/r8a77965_ulcb_defconfig
index 6494842da3..2ffa232dd5 100644
--- a/configs/r8a77965_ulcb_defconfig
+++ b/configs/r8a77965_ulcb_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_ULCB=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6338000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 
ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/r8a7796_salvator-x_defconfig 
b/configs/r8a7796_salvator-x_defconfig
index 8089523700..ebbe123cfa 100644
--- a/configs/r8a7796_salvator-x_defconfig
+++ b/configs/r8a7796_salvator-x_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_SALVATOR_X=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6338000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 
ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/r8a7796_ulcb_defconfig b/configs/r8a7796_ulcb_defconfig
index 28795a7113..5843b65fe0 100644
--- a/configs/r8a7796_ulcb_defconfig
+++ b/configs/r8a7796_ulcb_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_ULCB=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6338000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 
ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index 9225771c11..15108c35ad 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_EAGLE=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6318000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 
ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig
index 093b64c9e0..1bdef3bc0f 100644
--- a/configs/r8a77990_ebisu_defconfig
+++ b/configs/r8a77990_ebisu_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_EBISU=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6318000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 
ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index c5acd684a0..d30185f96a 100644
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_DRAAK=y
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6318000
 CONFIG_FIT=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs 

[U-Boot] [RFC PATCH v2 04/18] timer: dw-apb: add reset handling

[Simon Goldschmidt]

To use this timer on socfpga as system tick, it needs to take itself out
of reset.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 drivers/timer/dw-apb-timer.c | 18 +-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index 86312b8dc7..fad22be8c9 100644
--- a/drivers/timer/dw-apb-timer.c
+++ b/drivers/timer/dw-apb-timer.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -18,7 +19,8 @@
 #define DW_APB_CTRL0x8
 
 struct dw_apb_timer_priv {
-   fdt_addr_t  regs;
+   fdt_addr_t regs;
+   struct reset_ctl_bulk resets;
 };
 
 static int dw_apb_timer_get_count(struct udevice *dev, u64 *count)
@@ -42,6 +44,12 @@ static int dw_apb_timer_probe(struct udevice *dev)
struct clk clk;
int ret;
 
+   ret = reset_get_bulk(dev, &priv->resets);
+   if (ret)
+   dev_warn(dev, "Can't get reset: %d\n", ret);
+   else
+   reset_deassert_bulk(&priv->resets);
+
ret = clk_get_by_index(dev, 0, &clk);
if (ret)
return ret;
@@ -67,6 +75,13 @@ static int dw_apb_timer_ofdata_to_platdata(struct udevice 
*dev)
return 0;
 }
 
+static int dw_apb_timer_remove(struct udevice *dev)
+{
+   struct dw_apb_timer_priv *priv = dev_get_priv(dev);
+
+   return reset_release_bulk(&priv->resets);
+}
+
 static const struct timer_ops dw_apb_timer_ops = {
.get_count  = dw_apb_timer_get_count,
 };
@@ -83,5 +98,6 @@ U_BOOT_DRIVER(dw_apb_timer) = {
.probe  = dw_apb_timer_probe,
.of_match   = dw_apb_timer_ids,
.ofdata_to_platdata = dw_apb_timer_ofdata_to_platdata,
+   .remove = dw_apb_timer_remove,
.priv_auto_alloc_size = sizeof(struct dw_apb_timer_priv),
 };
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 08/18] socfpga: gen5: add new tool to create handoff dtsi files

[Simon Goldschmidt]

This new tool converts handoff information from quartus to "*_handoff.dtsi"
devicetree files. This is in preparation to move from ad-hoc code in arch
that parses the 'qts' header files to drivers parsing the same information
from devicetree.

Converting existing U-Boot 'qts' files is also supported.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 arch/arm/mach-socfpga/create_handoff_gen5.c | 660 
 arch/arm/mach-socfpga/qts-to-handoff.sh |  83 +++
 2 files changed, 743 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/create_handoff_gen5.c
 create mode 100755 arch/arm/mach-socfpga/qts-to-handoff.sh

diff --git a/arch/arm/mach-socfpga/create_handoff_gen5.c 
b/arch/arm/mach-socfpga/create_handoff_gen5.c
new file mode 100644
index 00..6ec436719d
--- /dev/null
+++ b/arch/arm/mach-socfpga/create_handoff_gen5.c
@@ -0,0 +1,660 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * This is a host-tool that needs to be compiled per board and prints the
+ * handoff.dtsi to stdout.
+ */
+
+#include 
+#include 
+
+/* Define kernel types */
+typedef uint8_t u8;
+typedef uint32_t u32;
+
+#ifdef USE_QUARTUS_OUTPUT
+#ifdef ARRIA5
+#include "iocsr_config_arria5.c"
+#include "pinmux_config_arria5.c"
+#else
+#include "iocsr_config_cyclone5.c"
+#include "pinmux_config_cyclone5.c"
+#endif
+#include "pll_config.h"
+#include "sdram/sdram_config.h"
+#include "sequencer_auto.h"
+#include "sequencer_defines.h"
+#include "sequencer_auto_ac_init.c"
+#include "sequencer_auto_inst_init.c"
+#define RW_MGR(x) __RW_MGR_##x
+#else
+#define RW_MGR(x) RW_MGR_##x
+#include 
+#include 
+#include 
+#include 
+#endif
+
+#include "include/mach/clock_manager_gen5.h"
+#include "include/mach/sdram_gen5.h"
+
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0]))
+#endif
+
+const char handoff_dtsi_hdr[] =
+   "// SPDX-License-Identifier: GPL-2.0\n"
+   "/*\n"
+   " *\n"
+   " * This code was generated by a tool based on\n"
+   " * handoffs from both Qsys and Quartus.\n"
+   " *\n"
+   " * Changes to this file may be lost if\n"
+   " * the code is regenerated.\n"
+   " *\n"
+   " */\n";
+
+/* Wrap PLL config */
+
+#define MAIN_VCO_BASE (\
+   (CONFIG_HPS_MAINPLLGRP_VCO_DENOM << \
+   CLKMGR_MAINPLLGRP_VCO_DENOM_OFFSET) |   \
+   (CONFIG_HPS_MAINPLLGRP_VCO_NUMER << \
+   CLKMGR_MAINPLLGRP_VCO_NUMER_OFFSET) \
+   )
+
+#define PERI_VCO_BASE (\
+   (CONFIG_HPS_PERPLLGRP_VCO_PSRC <<   \
+   CLKMGR_PERPLLGRP_VCO_PSRC_OFFSET) | \
+   (CONFIG_HPS_PERPLLGRP_VCO_DENOM <<  \
+   CLKMGR_PERPLLGRP_VCO_DENOM_OFFSET) |\
+   (CONFIG_HPS_PERPLLGRP_VCO_NUMER <<  \
+   CLKMGR_PERPLLGRP_VCO_NUMER_OFFSET)  \
+   )
+
+#define SDR_VCO_BASE ( \
+   (CONFIG_HPS_SDRPLLGRP_VCO_SSRC <<   \
+   CLKMGR_SDRPLLGRP_VCO_SSRC_OFFSET) | \
+   (CONFIG_HPS_SDRPLLGRP_VCO_DENOM <<  \
+   CLKMGR_SDRPLLGRP_VCO_DENOM_OFFSET) |\
+   (CONFIG_HPS_SDRPLLGRP_VCO_NUMER <<  \
+   CLKMGR_SDRPLLGRP_VCO_NUMER_OFFSET)  \
+   )
+
+static const struct cm_config cm_default = {
+   /* main group */
+   MAIN_VCO_BASE,
+   (CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT <<
+   CLKMGR_MAINPLLGRP_MPUCLK_CNT_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT <<
+   CLKMGR_MAINPLLGRP_MAINCLK_CNT_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT <<
+   CLKMGR_MAINPLLGRP_DBGATCLK_CNT_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT <<
+   CLKMGR_MAINPLLGRP_MAINQSPICLK_CNT_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT <<
+   CLKMGR_PERPLLGRP_PERNANDSDMMCCLK_CNT_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT <<
+   CLKMGR_MAINPLLGRP_CFGS2FUSER0CLK_CNT_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK <<
+   CLKMGR_MAINPLLGRP_MAINDIV_L3MPCLK_OFFSET) |
+   (CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK <<
+   CLKMGR_MAINPLLGRP_MAINDIV_L3SPCLK_OFFSET) |
+   (CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK <<
+   CLKMGR_MAINPLLGRP_MAINDIV_L4MPCLK_OFFSET) |
+   (CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK <<
+   CLKMGR_MAINPLLGRP_MAINDIV_L4SPCLK_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK <<
+   CLKMGR_MAINPLLGRP_DBGDIV_DBGATCLK_OFFSET) |
+   (CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK <<
+   CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK <<
+   CLKMGR_MAINPLLGRP_TRACEDIV_TRACECLK_OFFSET),
+   (CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP <<
+   CLKMGR_MAINPLLGRP_L4SRC_L4MP_OFFSET) |
+   (CONFIG_HPS_M

[U-Boot] [RFC PATCH v2 09/18] sdram: socfpga: gen5: make config structs dts compatible

[Simon Goldschmidt]

In preparation of moving SDRAM config from 'qts' files to devicetree,
make the config structs compatible to devicetree by keeping all struct
members of the same type (u8 or u32). That way, these structs can be
stored to devicetree as simple array.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 .../mach-socfpga/include/mach/sdram_gen5.h|  8 +++-
 arch/arm/mach-socfpga/wrap_sdram_config.c |  8 +++-
 drivers/ddr/altera/sequencer.c| 39 +++
 3 files changed, 35 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/sdram_gen5.h 
b/arch/arm/mach-socfpga/include/mach/sdram_gen5.h
index c41208591a..7353b1c5e6 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram_gen5.h
@@ -180,7 +180,8 @@ struct socfpga_sdram_rw_mgr_config {
 };
 
 struct socfpga_sdram_io_config {
-   u16 delay_per_opa_tap;
+   u8  delay_per_opa_tap_lo;
+   u8  delay_per_opa_tap_hi;
u8  delay_per_dchain_tap;
u8  delay_per_dqs_en_dchain_tap;
u8  dll_chain_length;
@@ -198,7 +199,10 @@ struct socfpga_sdram_io_config {
 };
 
 struct socfpga_sdram_misc_config {
-   u32 reg_file_init_seq_signature;
+   u8  reg_file_init_seq_signature_ll;
+   u8  reg_file_init_seq_signature_lh;
+   u8  reg_file_init_seq_signature_hl;
+   u8  reg_file_init_seq_signature_hh;
u8  afi_rate_ratio;
u8  calib_lfifo_offset;
u8  calib_vfifo_offset;
diff --git a/arch/arm/mach-socfpga/wrap_sdram_config.c 
b/arch/arm/mach-socfpga/wrap_sdram_config.c
index 2b072cc65e..c43c2423a0 100644
--- a/arch/arm/mach-socfpga/wrap_sdram_config.c
+++ b/arch/arm/mach-socfpga/wrap_sdram_config.c
@@ -254,7 +254,8 @@ static const struct socfpga_sdram_rw_mgr_config 
rw_mgr_config = {
 static const struct socfpga_sdram_io_config io_config = {
.delay_per_dchain_tap   = IO_DELAY_PER_DCHAIN_TAP,
.delay_per_dqs_en_dchain_tap= IO_DELAY_PER_DQS_EN_DCHAIN_TAP,
-   .delay_per_opa_tap  = IO_DELAY_PER_OPA_TAP,
+   .delay_per_opa_tap_lo   = IO_DELAY_PER_OPA_TAP & 0xff,
+   .delay_per_opa_tap_hi   = (IO_DELAY_PER_OPA_TAP << 8) & 0xff,
.dll_chain_length   = IO_DLL_CHAIN_LENGTH,
.dqdqs_out_phase_max= IO_DQDQS_OUT_PHASE_MAX,
.dqs_en_delay_max   = IO_DQS_EN_DELAY_MAX,
@@ -276,7 +277,10 @@ static const struct socfpga_sdram_misc_config misc_config 
= {
.enable_super_quick_calibration = ENABLE_SUPER_QUICK_CALIBRATION,
.max_latency_count_width= MAX_LATENCY_COUNT_WIDTH,
.read_valid_fifo_size   = READ_VALID_FIFO_SIZE,
-   .reg_file_init_seq_signature= REG_FILE_INIT_SEQ_SIGNATURE,
+   .reg_file_init_seq_signature_ll = REG_FILE_INIT_SEQ_SIGNATURE & 0xff,
+   .reg_file_init_seq_signature_lh = (REG_FILE_INIT_SEQ_SIGNATURE >> 8) & 
0xff,
+   .reg_file_init_seq_signature_hl = (REG_FILE_INIT_SEQ_SIGNATURE >> 16) & 
0xff,
+   .reg_file_init_seq_signature_hh = (REG_FILE_INIT_SEQ_SIGNATURE >> 24) & 
0xff,
.tinit_cntr0_val= TINIT_CNTR0_VAL,
.tinit_cntr1_val= TINIT_CNTR1_VAL,
.tinit_cntr2_val= TINIT_CNTR2_VAL,
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index b85b56efe5..6c632227c2 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -30,6 +30,9 @@ static const struct socfpga_data_mgr *data_mgr =
 static const struct socfpga_sdr_ctrl *sdr_ctrl =
(struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS;
 
+#define delay_per_opa_tap(iocfg) ((iocfg)->delay_per_opa_tap_lo | \
+ ((iocfg)->delay_per_opa_tap_hi << 8))
+
 #define DELTA_D1
 
 /*
@@ -1623,7 +1626,7 @@ static int sdr_find_phase(struct socfpga_sdrseq *seq, int 
working,
*p = 0;
 
ret = sdr_find_phase_delay(seq, working, 0, grp, work,
-  seq->iocfg->delay_per_opa_tap, p);
+  delay_per_opa_tap(seq->iocfg), p);
if (!ret)
return 0;
 
@@ -1651,7 +1654,7 @@ static int sdr_find_phase(struct socfpga_sdrseq *seq, int 
working,
 static int sdr_working_phase(struct socfpga_sdrseq *seq, const u32 grp,
 u32 *work_bgn, u32 *d, u32 *p, u32 *i)
 {
-   const u32 dtaps_per_ptap = seq->iocfg->delay_per_opa_tap /
+   const u32 dtaps_per_ptap = delay_per_opa_tap(seq->iocfg) /
   seq->iocfg->delay_per_dqs_en_dchain_tap;
int ret;
 
@@ -1693,7 +1696,7 @@ static void sdr_backup_phase(struct socfpga_sdrseq *seq, 
const u32 grp,
} else {
(*p)--;
}
-   tmp_delay = *work_bgn - seq->iocfg->delay_per_opa_tap;
+   

[U-Boot] [RFC PATCH v2 15/18] arm: socfpga: gen5: load CLK config from devicetree

[Simon Goldschmidt]

Instead of using ad-hoc code in arch/arm, load clock config from devicetree.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 drivers/clk/altera/clk-gen5.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/altera/clk-gen5.c b/drivers/clk/altera/clk-gen5.c
index e8f435a798..a5425b7424 100644
--- a/drivers/clk/altera/clk-gen5.c
+++ b/drivers/clk/altera/clk-gen5.c
@@ -136,7 +136,13 @@ static int socfpga_gen5_clk_init(struct udevice *dev)
struct socfpga_gen5_clk_platdata *plat = dev_get_platdata(dev);
const struct socfpga_clock_manager *clock_manager_base =
(const struct socfpga_clock_manager *)plat->regs;
-   const struct cm_config *cfg = cm_get_default_config();
+   const struct cm_config *cfg = (const struct cm_config *)
+   dev_read_u8_array_ptr(dev, "altr,clk-mgr-cfg", sizeof(*cfg));
+
+   if (!cfg) {
+   dev_dbg(dev, "Failed to load CLK config\n");
+   return -EINVAL;
+   }
 
/* Start by being paranoid and gate all sw managed clocks */
 
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 16/18] spi: cadence_qspi: support DM_CLK

[Simon Goldschmidt]

Support loading clk speed via DM instead of requiring ad-hoc code.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 drivers/spi/cadence_qspi.c | 20 ++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index e2e54cd277..0b89115885 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -5,6 +5,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -22,12 +23,27 @@ static int cadence_spi_write_speed(struct udevice *bus, 
uint hz)
 {
struct cadence_spi_platdata *plat = bus->platdata;
struct cadence_spi_priv *priv = dev_get_priv(bus);
+   unsigned int ref_clk_hz;
+   struct clk clk;
+   int ret;
+
+   ret = clk_get_by_index(bus, 0, &clk);
+   if (ret) {
+#ifdef CONFIG_CQSPI_REF_CLK
+   ref_clk_hz = CONFIG_CQSPI_REF_CLK;
+#else
+   return ret;
+#endif
+   } else {
+   ref_clk_hz = clk_get_rate(&clk);
+   clk_free(&clk);
+   }
 
cadence_qspi_apb_config_baudrate_div(priv->regbase,
-CONFIG_CQSPI_REF_CLK, hz);
+ref_clk_hz, hz);
 
/* Reconfigure delay timing if speed is changed. */
-   cadence_qspi_apb_delay(priv->regbase, CONFIG_CQSPI_REF_CLK, hz,
+   cadence_qspi_apb_delay(priv->regbase, ref_clk_hz, hz,
   plat->tshsl_ns, plat->tsd2d_ns,
   plat->tchsh_ns, plat->tslch_ns);
 
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 17/18] arm: socfpga: gen5: parse qspi clock from devictree

[Simon Goldschmidt]

Remove the need for ad-hoc code for qspi speed.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 include/configs/socfpga_common.h | 5 -
 1 file changed, 5 deletions(-)

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index d1034ac280..e4a5dfc5ef 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -137,11 +137,6 @@
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_SPI_FLASH_MTD
 #endif
-/* QSPI reference clock */
-#ifndef __ASSEMBLY__
-unsigned int cm_get_qspi_controller_clk_hz(void);
-#define CONFIG_CQSPI_REF_CLK   cm_get_qspi_controller_clk_hz()
-#endif
 
 /*
  * USB
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 18/18] socfpga: gen5: move CLK and SDRAM to DM

[Simon Goldschmidt]

- removed wrapper files for sdram & pll
- fix freeze_controller to not depend on OSC1 speed
- remove unused function definitions
- add autogenerated handoff dtsi for socfpga_socrates

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 .../dts/socfpga_cyclone5_socrates-u-boot.dtsi |   1 +
 .../socfpga_cyclone5_socrates_handoff.dtsi| 290 
 arch/arm/mach-socfpga/Makefile|   4 -
 arch/arm/mach-socfpga/freeze_controller.c |  10 +-
 .../include/mach/clock_manager_gen5.h |   2 -
 .../mach-socfpga/include/mach/sdram_gen5.h|   8 -
 arch/arm/mach-socfpga/wrap_pll_config.c   | 146 
 arch/arm/mach-socfpga/wrap_sdram_config.c | 322 --
 8 files changed, 297 insertions(+), 486 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_cyclone5_socrates_handoff.dtsi
 delete mode 100644 arch/arm/mach-socfpga/wrap_pll_config.c
 delete mode 100644 arch/arm/mach-socfpga/wrap_sdram_config.c

diff --git a/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi 
b/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi
index 0a4d54e304..36ae10ab28 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi
@@ -7,6 +7,7 @@
  */
 
 #include "socfpga-common-u-boot.dtsi"
+#include "socfpga_cyclone5_socrates_handoff.dtsi"
 
 /{
aliases {
diff --git a/arch/arm/dts/socfpga_cyclone5_socrates_handoff.dtsi 
b/arch/arm/dts/socfpga_cyclone5_socrates_handoff.dtsi
new file mode 100644
index 00..4e750796be
--- /dev/null
+++ b/arch/arm/dts/socfpga_cyclone5_socrates_handoff.dtsi
@@ -0,0 +1,290 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *
+ * This code was generated by a tool based on
+ * handoffs from both Qsys and Quartus.
+ *
+ * Changes to this file may be lost if
+ * the code is regenerated.
+ *
+ */
+
+&osc1 {
+   clock-frequency = <2500>;
+};
+
+&osc2 {
+   clock-frequency = <2500>;
+};
+
+&f2s_periph_ref_clk {
+   clock-frequency = <0>;
+};
+
+&f2s_sdram_ref_clk {
+   clock-frequency = <0>;
+};
+
+&clkmgr {
+   altr,clk-mgr-cfg = <0xf801 0x 0x 0x
+   0x0300 0xff01 0x0f00 0x9500
+   0x0400 0x 0x0300 0x3801
+   0xff01 0x0300 0xff01 0x0400
+   0x0400 0xff01 0x4008 0x6918
+   0x1a00 0x78020200 0x0100 0x
+   0x0108 0x0500 0x0100>;
+};
+
+&scanmgr {
+   altr,pinmux-cfg = [00 02 02 02 02 02 02 02
+  02 00 02 02 02 02 00 00
+  00 00 00 00 03 00 03 03
+  00 00 00 00 00 03 03 03
+  00 01 01 01 01 00 00 01
+  01 03 03 03 03 02 02 01
+  01 01 01 00 00 00 00 00
+  00 00 00 00 00 00 00 00
+  02 02 02 02 02 02 02 02
+  02 02 02 02 02 02 00 03
+  03 03 03 03 03 00 00 00
+  00 00 00 00 00 00 00 00
+  00 00 00 00 00 00 00 00
+  00 00 00 00 00 00 00 00
+  00 00 00 00 00 01 01 01
+  01 01 01 01 01 01 01 01
+  01 01 01 01 01 01 01 01
+  01 01 01 01 01 01 01 01
+  01 01 01 01 01 01 01 01
+  01 01 01 01 01 01 01 01
+  01 01 01 01 01 01 01 01
+  01 01 01 01 01 01 01 01
+  01 01 01 01 01 01 01 01
+  01 01 01 01 00 00 00 00
+  00 00 00 00 00 00 00 00
+  00 00 00 00 00 00 00];
+   altr,iocsr-scan-chain0-table = <0x 0x 0xf00f 
0x00c0
+   0x3f00 0x0080 0x2448 
0x00902001
+   0x4082 0x04800100 0x 
0x0040
+   0x1224 0x00489000 0x2041 
0x0280
+   0x0409 0x0020 0x0912 
0x00244800
+   0x9020 0x0140 0x8204 
0x0010>;
+   altr,iocsr-scan-chain1-table = <0x4890 0x00204102 0xc0008004 
0x0900
+   0x1224 0x0080 0x2448 
0x00902001
+   0x4082 0x0400 0x0912 
0x0040
+   0x1224 0x00489000 0x2041 
0x0280
+   0x0409 0x0020 0x09120006 
0x00244800
+   0xfe01 0x00f8 0x0700 
0x00100080
+   

[U-Boot] [RFC PATCH v2 10/18] ddr: socfpga: gen5: fetch handoff information from 'of_to_platdata'

[Simon Goldschmidt]

In preparation to move handoff data from 'qts' files to devicetree, fetch
SDRAM config in 'of_to_platdata' DM callback. That way, this callback
can be changed to fetch the data from devicetree.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 drivers/ddr/altera/sdram_gen5.c | 45 +
 drivers/ddr/altera/sequencer.c  | 35 +++--
 drivers/ddr/altera/sequencer.h  |  9 ++-
 3 files changed, 64 insertions(+), 25 deletions(-)

diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index 8c8ea19eb9..91d9f6c0fc 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -25,6 +25,15 @@ struct altera_gen5_sdram_priv {
 
 struct altera_gen5_sdram_platdata {
struct socfpga_sdr *sdr;
+   /* Handoff config follows */
+   const struct socfpga_sdram_config *cfg;
+   const struct socfpga_sdram_rw_mgr_config *rwcfg;
+   const struct socfpga_sdram_io_config *iocfg;
+   const struct socfpga_sdram_misc_config *misccf;
+   const u32 *inst_rom_init;
+   unsigned int inst_rom_init_len;
+   const u32 *ac_rom_init;
+   unsigned int ac_rom_init_len;
 };
 
 struct sdram_prot_rule {
@@ -43,7 +52,9 @@ struct sdram_prot_rule {
 static struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
 
-static unsigned long sdram_calculate_size(struct socfpga_sdr_ctrl *sdr_ctrl);
+static unsigned long sdram_calculate_size(
+   struct socfpga_sdr_ctrl *sdr_ctrl,
+   const struct socfpga_sdram_config *cfg);
 
 /**
  * get_errata_rows() - Up the number of DRAM rows to cover entire address space
@@ -446,10 +457,10 @@ static void sdr_load_regs(struct socfpga_sdr_ctrl 
*sdr_ctrl,
  *
  * Initialize the SDRAM MMR.
  */
-int sdram_mmr_init_full(struct socfpga_sdr_ctrl *sdr_ctrl,
-   unsigned int sdr_phy_reg)
+static int sdram_mmr_init_full(struct socfpga_sdr_ctrl *sdr_ctrl,
+  unsigned int sdr_phy_reg,
+  const struct socfpga_sdram_config *cfg)
 {
-   const struct socfpga_sdram_config *cfg = socfpga_get_sdram_config();
const unsigned int rows =
(cfg->dram_addrw & SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK) >>
SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB;
@@ -481,7 +492,7 @@ int sdram_mmr_init_full(struct socfpga_sdr_ctrl *sdr_ctrl,
1 << SDR_CTRLGRP_STATICCFG_APPLYCFG_LSB);
 
sdram_set_protection_config(sdr_ctrl, 0,
-   sdram_calculate_size(sdr_ctrl) - 1);
+   sdram_calculate_size(sdr_ctrl, cfg) - 1);
 
sdram_dump_protection_config(sdr_ctrl);
 
@@ -494,11 +505,12 @@ int sdram_mmr_init_full(struct socfpga_sdr_ctrl *sdr_ctrl,
  * Calculate SDRAM device size based on SDRAM controller parameters.
  * Size is specified in bytes.
  */
-static unsigned long sdram_calculate_size(struct socfpga_sdr_ctrl *sdr_ctrl)
+static unsigned long sdram_calculate_size(
+   struct socfpga_sdr_ctrl *sdr_ctrl,
+   const struct socfpga_sdram_config *cfg)
 {
unsigned long temp;
unsigned long row, bank, col, cs, width;
-   const struct socfpga_sdram_config *cfg = socfpga_get_sdram_config();
const unsigned int csbits =
((cfg->dram_addrw & SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK) >>
SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB) + 1;
@@ -565,6 +577,16 @@ static int altera_gen5_sdram_ofdata_to_platdata(struct 
udevice *dev)
if (!plat->sdr)
return -ENODEV;
 
+   /* Get handoff config */
+   plat->cfg = socfpga_get_sdram_config();
+   plat->rwcfg = socfpga_get_sdram_rwmgr_config();
+   plat->iocfg = socfpga_get_sdram_io_config();
+   plat->misccf = socfpga_get_sdram_misc_config();
+
+   socfpga_get_seq_inst_init(&plat->inst_rom_init,
+ &plat->inst_rom_init_len);
+   socfpga_get_seq_ac_init(&plat->ac_rom_init, &plat->ac_rom_init_len);
+
return 0;
 }
 
@@ -584,19 +606,22 @@ static int altera_gen5_sdram_probe(struct udevice *dev)
}
reset_deassert_bulk(&resets);
 
-   if (sdram_mmr_init_full(sdr_ctrl, 0x) != 0) {
+   if (sdram_mmr_init_full(sdr_ctrl, 0x, plat->cfg) != 0) {
puts("SDRAM init failed.\n");
goto failed;
}
 
debug("SDRAM: Calibrating PHY\n");
/* SDRAM calibration */
-   if (sdram_calibration_full(plat->sdr) == 0) {
+   if (sdram_calibration_full(plat->sdr, plat->rwcfg, plat->iocfg,
+  plat->misccf, plat->inst_rom_init,
+  plat->inst_rom_init_len, plat->ac_rom_init,
+  plat->ac_rom_init_len) == 0) {
puts("SDRAM calibration failed.\n");
goto failed;
}
 
-   sdram_size = 

[U-Boot] [RFC PATCH v2 11/18] ddr: socfpga: gen5: read handoff information from devicetree

[Simon Goldschmidt]

Instead of reading SDRAM handoff data from 'qts' files, read it from
devicetree.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 drivers/ddr/altera/sdram_gen5.c | 61 -
 1 file changed, 53 insertions(+), 8 deletions(-)

diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index 91d9f6c0fc..09ee45026c 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -572,20 +572,65 @@ static unsigned long sdram_calculate_size(
 static int altera_gen5_sdram_ofdata_to_platdata(struct udevice *dev)
 {
struct altera_gen5_sdram_platdata *plat = dev->platdata;
+   int sz;
 
plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0);
if (!plat->sdr)
return -ENODEV;
 
/* Get handoff config */
-   plat->cfg = socfpga_get_sdram_config();
-   plat->rwcfg = socfpga_get_sdram_rwmgr_config();
-   plat->iocfg = socfpga_get_sdram_io_config();
-   plat->misccf = socfpga_get_sdram_misc_config();
-
-   socfpga_get_seq_inst_init(&plat->inst_rom_init,
- &plat->inst_rom_init_len);
-   socfpga_get_seq_ac_init(&plat->ac_rom_init, &plat->ac_rom_init_len);
+   plat->cfg = (const struct socfpga_sdram_config *)
+   dev_read_u8_array_ptr(dev, "altr,sdr-cfg", sizeof(*plat->cfg));
+   if (!plat->cfg) {
+   debug("Failed to parse altr,sdr-cfg\n");
+   return -EINVAL;
+   }
+   plat->rwcfg = (const struct socfpga_sdram_rw_mgr_config *)
+   dev_read_u8_array_ptr(dev, "altr,sdr-rw-mgr-cfg",
+ sizeof(*plat->rwcfg));
+   if (!plat->rwcfg) {
+   debug("Failed to parse altr,sdr-rw-mgr-cfg\n");
+   return -EINVAL;
+   }
+   plat->iocfg = (const struct socfpga_sdram_io_config *)
+   dev_read_u8_array_ptr(dev, "altr,sdr-io-cfg",
+ sizeof(*plat->iocfg));
+   if (!plat->iocfg) {
+   debug("Failed to parse altr,sdr-io-cfg\n");
+   return -EINVAL;
+   }
+   plat->misccf = (const struct socfpga_sdram_misc_config *)
+   dev_read_u8_array_ptr(dev, "altr,sdr-misc-cfg",
+ sizeof(*plat->misccf));
+   if (!plat->misccf) {
+   debug("Failed to parse altr,sdr-misc-cfg\n");
+   return -EINVAL;
+   }
+
+   sz = dev_read_size(dev, "altr,sdr-inst-rom-init");
+   if (sz <= 0) {
+   debug("Failed to read altr,sdr-inst-rom-init size\n");
+   return sz;
+   }
+   plat->inst_rom_init_len = sz / sizeof(u32);
+   plat->inst_rom_init = (const u32*)dev_read_u8_array_ptr(dev,
+   "altr,sdr-inst-rom-init", sz);
+   if (!plat->inst_rom_init) {
+   debug("Failed to parse altr,sdr-inst-rom-init\n");
+   return -EINVAL;
+   }
+   sz = dev_read_size(dev, "altr,sdr-ac-rom-init");
+   if (sz <= 0) {
+   debug("Failed to read altr,sdr-ac-rom-init size\n");
+   return sz;
+   }
+   plat->ac_rom_init_len = sz / sizeof(u32);
+   plat->ac_rom_init = (const u32*)dev_read_u8_array_ptr(dev,
+   "altr,sdr-ac-rom-init", sz);
+   if (!plat->ac_rom_init) {
+   debug("Failed to parse altr,sdr-ac-rom-init\n");
+   return -EINVAL;
+   }
 
return 0;
 }
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 07/18] arm: dts: socfpga: make clock nodes available in SPL

[Simon Goldschmidt]

The socfpga gen5 clock driver will need some of the clock nodes to be
preserved in the SPL devicetree. Mark them appropriately.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2:
- split this patch from v1 5/6

 arch/arm/dts/socfpga-common-u-boot.dtsi | 70 +
 1 file changed, 70 insertions(+)

diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi 
b/arch/arm/dts/socfpga-common-u-boot.dtsi
index aebe476e3f..7bc3b0021f 100644
--- a/arch/arm/dts/socfpga-common-u-boot.dtsi
+++ b/arch/arm/dts/socfpga-common-u-boot.dtsi
@@ -7,6 +7,12 @@
 /{
soc {
u-boot,dm-pre-reloc;
+   clkmgr@ffd04000 {
+   u-boot,dm-pre-reloc;
+   clocks {
+   u-boot,dm-pre-reloc;
+   };
+   };
};
 };
 
@@ -18,3 +24,67 @@
 &sdr {
u-boot,dm-pre-reloc;
 };
+
+&osc1 {
+   u-boot,dm-pre-reloc;
+};
+
+&osc2 {
+   u-boot,dm-pre-reloc;
+};
+
+&f2s_periph_ref_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&main_pll {
+   u-boot,dm-pre-reloc;
+};
+
+&mainclk {
+   u-boot,dm-pre-reloc;
+};
+
+&main_qspi_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&main_nand_sdmmc_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&periph_pll {
+   u-boot,dm-pre-reloc;
+};
+
+&per_qspi_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&per_nand_mmc_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&per_base_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&l4_mp_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&l4_sp_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&sdmmc_clk {
+   u-boot,dm-pre-reloc;
+};
+
+&sdmmc_clk_divided {
+   u-boot,dm-pre-reloc;
+};
+
+&qspi_clk {
+   u-boot,dm-pre-reloc;
+};
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 14/18] arm: socfpga: gen5: move clock initialization to CLK driver

[Simon Goldschmidt]

This moves setting initial clock values (as defined by Quartus handoff
files) from ad-hoc code in arch to CM_CLK driver.

TODO: CONFIG_CLOCKS and cmd 'clocks' must be fixed for dts access.
Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 arch/arm/mach-socfpga/Makefile|   1 -
 arch/arm/mach-socfpga/clock_manager.c |  31 +-
 arch/arm/mach-socfpga/clock_manager_gen5.c| 528 --
 .../mach-socfpga/include/mach/clock_manager.h |   2 +
 .../include/mach/clock_manager_gen5.h |  12 -
 arch/arm/mach-socfpga/spl_gen5.c  |   8 +-
 drivers/clk/altera/clk-gen5.c | 361 
 7 files changed, 388 insertions(+), 555 deletions(-)
 delete mode 100644 arch/arm/mach-socfpga/clock_manager_gen5.c

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index fc1181cb27..4b77990f74 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -10,7 +10,6 @@ obj-y += clock_manager.o
 obj-y  += misc.o
 
 ifdef CONFIG_TARGET_SOCFPGA_GEN5
-obj-y  += clock_manager_gen5.o
 obj-y  += misc_gen5.o
 obj-y  += reset_manager_gen5.o
 obj-y  += scan_manager.o
diff --git a/arch/arm/mach-socfpga/clock_manager.c 
b/arch/arm/mach-socfpga/clock_manager.c
index 9f3c643df8..16760c760f 100644
--- a/arch/arm/mach-socfpga/clock_manager.c
+++ b/arch/arm/mach-socfpga/clock_manager.c
@@ -10,6 +10,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_TARGET_SOCFPGA_GEN5
+
 static const struct socfpga_clock_manager *clock_manager_base =
(struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS;
 
@@ -18,11 +20,7 @@ void cm_wait_for_lock(u32 mask)
u32 inter_val;
u32 retry = 0;
do {
-#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
-   inter_val = readl(&clock_manager_base->inter) & mask;
-#else
inter_val = readl(&clock_manager_base->stat) & mask;
-#endif
/* Wait for stable lock */
if (inter_val == mask)
retry++;
@@ -40,14 +38,29 @@ int cm_wait_for_fsm(void)
 CLKMGR_STAT_BUSY, false, 2, false);
 }
 
-int set_cpu_clk_info(void)
+#endif
+
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
+static unsigned long cm_get_mpu_clk_hz(void)
 {
-#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
-   /* Calculate the clock frequencies required for drivers */
-   cm_get_l4_sp_clk_hz();
-   cm_get_mmc_controller_clk_hz();
+   return 0; // TODO: use devicetree
+}
+
+static unsigned long cm_get_sdram_clk_hz(void)
+{
+   return 0; // TODO: use devicetree
+}
+
+#ifndef CONFIG_SPL_BUILD
+static void cm_print_clock_quick_summary(void)
+{
+   // TODO: use devicetree
+}
+#endif
 #endif
 
+int set_cpu_clk_info(void)
+{
gd->bd->bi_arm_freq = cm_get_mpu_clk_hz() / 100;
gd->bd->bi_dsp_freq = 0;
 
diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c 
b/arch/arm/mach-socfpga/clock_manager_gen5.c
deleted file mode 100644
index 3a64600861..00
--- a/arch/arm/mach-socfpga/clock_manager_gen5.c
+++ /dev/null
@@ -1,528 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- *  Copyright (C) 2013-2017 Altera Corporation 
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-static const struct socfpga_clock_manager *clock_manager_base =
-   (struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS;
-
-/*
- * function to write the bypass register which requires a poll of the
- * busy bit
- */
-static void cm_write_bypass(u32 val)
-{
-   writel(val, &clock_manager_base->bypass);
-   cm_wait_for_fsm();
-}
-
-/* function to write the ctrl register which requires a poll of the busy bit */
-static void cm_write_ctrl(u32 val)
-{
-   writel(val, &clock_manager_base->ctrl);
-   cm_wait_for_fsm();
-}
-
-/* function to write a clock register that has phase information */
-static int cm_write_with_phase(u32 value, const void *reg_address, u32 mask)
-{
-   int ret;
-
-   /* poll until phase is zero */
-   ret = wait_for_bit_le32(reg_address, mask, false, 2, false);
-   if (ret)
-   return ret;
-
-   writel(value, reg_address);
-
-   return wait_for_bit_le32(reg_address, mask, false, 2, false);
-}
-
-/*
- * Setup clocks while making no assumptions about previous state of the clocks.
- *
- * Start by being paranoid and gate all sw managed clocks
- * Put all plls in bypass
- * Put all plls VCO registers back to reset value (bandgap power down).
- * Put peripheral and main pll src to reset value to avoid glitch.
- * Delay 5 us.
- * Deassert bandgap power down and set numerator and denominator
- * Start 7 us timer.
- * set internal dividers
- * Wait for 7 us timer.
- * Enable plls
- * Set external dividers while plls are locking
- * Wait for pll lock
- * Assert/deassert outreset all.
- * Take all pll's out of bypass
- * Clear safe mode
- * set source main and peripheral clocks
- * Ungate clocks
- */
-
-int cm_basic_init(const struct cm_config * 

[U-Boot] [RFC PATCH v2 05/18] arm: socfpga: gen5: move initial reset handling to reset driver

[Simon Goldschmidt]

This moves disabling all peripherals from ad-hoc code in arch/arm
to the socfpga reset driver.

To do this, DM initialization and UCLASS_RESET probing has to be done
earlier in the SPL. Also, the gen5 devicetrees need an added property
that tells the reset driver which bits to set and which need to be
left at 0 (L4WD0).

Signed-off-by: Simon Goldschmidt 
---

Changes in v2:
- add dts based reset handling (messed up in v1)

 arch/arm/dts/socfpga-common-u-boot.dtsi|  1 +
 arch/arm/mach-socfpga/reset_manager_gen5.c | 13 
 arch/arm/mach-socfpga/spl_gen5.c   | 21 ++--
 drivers/reset/reset-socfpga.c  | 37 --
 4 files changed, 45 insertions(+), 27 deletions(-)

diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi 
b/arch/arm/dts/socfpga-common-u-boot.dtsi
index 322c858c4b..aebe476e3f 100644
--- a/arch/arm/dts/socfpga-common-u-boot.dtsi
+++ b/arch/arm/dts/socfpga-common-u-boot.dtsi
@@ -12,6 +12,7 @@
 
 &rst {
u-boot,dm-pre-reloc;
+   altr,modrst-reset-val = <1 0xffbf 0x>;
 };
 
 &sdr {
diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c 
b/arch/arm/mach-socfpga/reset_manager_gen5.c
index 9a32f5abfe..34e59b852b 100644
--- a/arch/arm/mach-socfpga/reset_manager_gen5.c
+++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
@@ -48,19 +48,6 @@ void socfpga_per_reset(u32 reset, int set)
clrbits_le32(reg, 1 << RSTMGR_RESET(reset));
 }
 
-/*
- * Assert reset on every peripheral but L4WD0.
- * Watchdog must be kept intact to prevent glitches
- * and/or hangs.
- */
-void socfpga_per_reset_all(void)
-{
-   const u32 l4wd0 = 1 << RSTMGR_RESET(SOCFPGA_RESET(L4WD0));
-
-   writel(~l4wd0, &reset_manager_base->per_mod_reset);
-   writel(0x, &reset_manager_base->per2_mod_reset);
-}
-
 #define L3REGS_REMAP_LWHPS2FPGA_MASK   0x10
 #define L3REGS_REMAP_HPS2FPGA_MASK 0x08
 #define L3REGS_REMAP_OCRAM_MASK0x01
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c
index 87b76b47de..1ae8025746 100644
--- a/arch/arm/mach-socfpga/spl_gen5.c
+++ b/arch/arm/mach-socfpga/spl_gen5.c
@@ -84,12 +84,19 @@ void board_init_f(ulong dummy)
socfpga_sdram_remap_zero();
socfpga_pl310_clear();
 
+   ret = spl_early_init();
+   if (ret) {
+   debug("spl_early_init() failed: %d\n", ret);
+   hang();
+   }
+
debug("Freezing all I/O banks\n");
/* freeze all IO banks */
sys_mgr_frzctrl_freeze_req();
 
-   /* Put everything into reset but L4WD0. */
-   socfpga_per_reset_all();
+   ret = uclass_get_device(UCLASS_RESET, 0, &dev);
+   if (ret)
+   debug("Reset init failed: %d\n", ret);
 
if (!socfpga_is_booting_from_fpga()) {
/* Put FPGA bridges into reset too. */
@@ -130,16 +137,6 @@ void board_init_f(ulong dummy)
debug_uart_init();
 #endif
 
-   ret = spl_early_init();
-   if (ret) {
-   debug("spl_early_init() failed: %d\n", ret);
-   hang();
-   }
-
-   ret = uclass_get_device(UCLASS_RESET, 0, &dev);
-   if (ret)
-   debug("Reset init failed: %d\n", ret);
-
/* enable console uart printing */
preloader_console_init();
 
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
index 93ec9cfdb6..c5fd0679c7 100644
--- a/drivers/reset/reset-socfpga.c
+++ b/drivers/reset/reset-socfpga.c
@@ -106,6 +106,39 @@ static const struct reset_ops socfpga_reset_ops = {
.rst_deassert = socfpga_reset_deassert,
 };
 
+/*
+ * This function ensures that in SPL, all peripherals are reset at startup.
+ * It does this by reading reset values from the device tree.
+ */
+static int socfpga_reset_set_inital_reset_values(struct udevice *dev)
+{
+#ifdef CONFIG_SPL_BUILD
+   struct socfpga_reset_data *data = dev_get_priv(dev);
+   int ret;
+   u32 modrst_vals[5];
+   size_t i, sz, offset;
+
+   ret = dev_read_size(dev, "altr,modrst-reset-val");
+   if (ret >= sizeof(u32)) {
+   sz = min(ret/sizeof(u32), ARRAY_SIZE(modrst_vals));
+   ret = dev_read_u32_array(dev, "altr,modrst-reset-val",
+modrst_vals, sz);
+   if (ret) {
+   dev_warn(dev, "Failed to read modrst reset values\n");
+   return ret;
+   }
+   /* first item is register offset to start */
+   offset = modrst_vals[0] * 4;
+   for (i = 1; i < sz; i++) {
+   writel(modrst_vals[i], data->modrst_base + offset);
+   offset += 4;
+   }
+   }
+#endif
+
+   return 0;
+}
+
 static int socfpga_reset_probe(struct udevice *dev)
 {
struct socfpga_reset_data *data = dev_get_priv(dev);
@@ -117,7 +150,7 @@ static int socfpga_reset_probe(struct udevice *dev)
modrst_offset = dev_read_u32_default(dev, 

[U-Boot] [RFC PATCH v2 13/18] arm: socfpga: gen5: enable DM CLK

[Simon Goldschmidt]

Enable CLK and SPL_CLK so that the new readonly clock driver is used.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 arch/arm/mach-socfpga/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 9efdcd6f10..81052f27d5 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -53,7 +53,9 @@ config TARGET_SOCFPGA_CYCLONE5
 
 config TARGET_SOCFPGA_GEN5
bool
+   select CLK
select SPL_ALTERA_SDRAM
+   select SPL_CLK if SPL
imply FPGA_SOCFPGA
imply SPL_SIZE_LIMIT_SUBTRACT_GD
imply SPL_SIZE_LIMIT_SUBTRACT_MALLOC
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 06/18] arm: dts: socfpga: add settings for gen5 clk driver

[Simon Goldschmidt]

For some clocks, the socfpga gen5 clock driver in preparation needs a
source register, which is used to select the parent clock.

Add these to the socfpga gen5 base device tree.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2:
- split this patch from v1 5/6

 arch/arm/dts/socfpga.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index eda558f2fe..8ff3f211cb 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -332,6 +332,7 @@
compatible = 
"altr,socfpga-gate-clk";
clocks = <&mainclk>, 
<&per_base_clk>;
div-reg = <0x64 4 3>;
+   src-reg = <0x70 0 1>;
clk-gate = <0x60 2>;
};
 
@@ -340,6 +341,7 @@
compatible = 
"altr,socfpga-gate-clk";
clocks = <&mainclk>, 
<&per_base_clk>;
div-reg = <0x64 7 3>;
+   src-reg = <0x70 1 1>;
clk-gate = <0x60 3>;
};
 
@@ -453,6 +455,7 @@
#clock-cells = <0>;
compatible = 
"altr,socfpga-gate-clk";
clocks = <&f2s_periph_ref_clk>, 
<&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
+   src-reg = <0xac 0 2>;
clk-gate = <0xa0 8>;
clk-phase = <0 135>;
};
@@ -469,6 +472,7 @@
#clock-cells = <0>;
compatible = 
"altr,socfpga-gate-clk";
clocks = <&f2s_periph_ref_clk>, 
<&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
+   src-reg = <0xac 2 2>;
clk-gate = <0xa0 9>;
};
 
@@ -491,6 +495,7 @@
#clock-cells = <0>;
compatible = 
"altr,socfpga-gate-clk";
clocks = <&f2s_periph_ref_clk>, 
<&main_qspi_clk>, <&per_qspi_clk>;
+   src-reg = <0xac 4 2>;
clk-gate = <0xa0 11>;
};
 
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 02/18] dts: arm: socfpga: add label for clkmgr

[Simon Goldschmidt]

In preparation for moving socfpga gen5 clock handoff data to devicetree,
add a label to the base devicetree so that dts files including this base
tree can reference clkmgr by label.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 arch/arm/dts/socfpga.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index 51a6a51b53..eda558f2fe 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -114,7 +114,7 @@
status = "disabled";
};
 
-   clkmgr@ffd04000 {
+   clkmgr: clkmgr@ffd04000 {
compatible = "altr,clk-mgr";
reg = <0xffd04000 0x1000>;
 
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 12/18] arm: socfpga: gen5: add readonly clk driver

[Simon Goldschmidt]

This adds clk-gen5 as a readonly DM_CLK driver that can return clocks for
the peripherals.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 MAINTAINERS   |   1 +
 drivers/clk/altera/Makefile   |   1 +
 drivers/clk/altera/clk-gen5.c | 338 ++
 3 files changed, 340 insertions(+)
 create mode 100644 drivers/clk/altera/clk-gen5.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 74a1423f50..be8a38ea07 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -114,6 +114,7 @@ M:  Simon Goldschmidt 
 S: Maintainted
 T: git https://gitlab.denx.de/u-boot/custodians/u-boot-socfpga.git
 F: arch/arm/mach-socfpga/
+F: drivers/clk/altera/clk-gen5.c
 F: drivers/sysreset/sysreset_socfpga*
 
 ARM AMLOGIC SOC SUPPORT
diff --git a/drivers/clk/altera/Makefile b/drivers/clk/altera/Makefile
index a3ae8b24b0..d0664c6ad5 100644
--- a/drivers/clk/altera/Makefile
+++ b/drivers/clk/altera/Makefile
@@ -4,3 +4,4 @@
 #
 
 obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clk-arria10.o
+obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += clk-gen5.o
diff --git a/drivers/clk/altera/clk-gen5.c b/drivers/clk/altera/clk-gen5.c
new file mode 100644
index 00..4c197b81b0
--- /dev/null
+++ b/drivers/clk/altera/clk-gen5.c
@@ -0,0 +1,338 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Marek Vasut 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+enum socfpga_gen5_clk_type {
+   SOCFPGA_GEN5_CLK_MAIN_PLL,
+   SOCFPGA_GEN5_CLK_PER_PLL,
+   SOCFPGA_GEN5_CLK_PERIP_CLK,
+   SOCFPGA_GEN5_CLK_GATE_CLK,
+   SOCFPGA_GEN5_CLK_UNKNOWN_CLK,
+};
+
+struct socfpga_gen5_clk_platdata {
+   enum socfpga_gen5_clk_type type;
+   struct clk_bulk clks;
+   u32 regs;
+   /* Fixed divider */
+   u16 fix_div;
+   /* Control register */
+   u16 ctl_reg;
+   /* Divider register */
+   u16 div_reg;
+   u8  div_len;
+   u8  div_off;
+   /* Clock gating register */
+   u16 gate_reg;
+   u8  gate_bit;
+   /* Clock source register */
+   u16 src_reg;
+   u8  src_len;
+   u8  src_off;
+};
+
+static int socfpga_gen5_clk_get_upstream(struct clk *clk, struct clk **upclk)
+{
+   struct socfpga_gen5_clk_platdata *plat = dev_get_platdata(clk->dev);
+   u32 reg, maxval;
+
+   if (plat->clks.count == 0)
+   return 0;
+
+   if (plat->src_reg && plat->src_len) {
+   maxval = 1 << plat->src_len;
+   if (plat->clks.count <= maxval) {
+   reg = readl(plat->regs + plat->src_reg);
+   reg >>= plat->src_off;
+   reg &= (maxval - 1);
+   *upclk = &plat->clks.clks[reg];
+   return 0;
+   }
+   }
+
+   if (plat->clks.count == 1) {
+   *upclk = &plat->clks.clks[0];
+   return 0;
+   }
+
+   if (!plat->ctl_reg)
+   return -EINVAL;
+
+   reg = readl(plat->regs + plat->ctl_reg);
+
+   /* Assume PLLs are ON for now */
+   if (plat->type == SOCFPGA_GEN5_CLK_MAIN_PLL) {
+   reg = (reg >> 8) & 0x3;
+   maxval = 2;
+   } else if (plat->type == SOCFPGA_GEN5_CLK_PER_PLL) {
+   reg = (reg >> 8) & 0x3;
+   maxval = 3;
+   } else {
+   reg = (reg >> 16) & 0x7;
+   maxval = 4;
+   }
+
+   if (reg > maxval) {
+   dev_err(clk->dev, "Invalid clock source\n");
+   return -EINVAL;
+   }
+
+   *upclk = &plat->clks.clks[reg];
+   return 0;
+}
+
+static int socfpga_gen5_clk_endisable(struct clk *clk, bool enable)
+{
+   struct socfpga_gen5_clk_platdata *plat = dev_get_platdata(clk->dev);
+   struct clk *upclk = NULL;
+   int ret;
+
+   if (!enable && plat->gate_reg)
+   clrbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit));
+
+   ret = socfpga_gen5_clk_get_upstream(clk, &upclk);
+   if (ret)
+   return ret;
+
+   if (upclk) {
+   if (enable)
+   clk_enable(upclk);
+   else
+   clk_disable(upclk);
+   }
+
+   if (enable && plat->gate_reg)
+   setbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit));
+
+   return 0;
+}
+
+static int socfpga_gen5_clk_enable(struct clk *clk)
+{
+   return socfpga_gen5_clk_endisable(clk, true);
+}
+
+static int socfpga_gen5_clk_disable(struct clk *clk)
+{
+   return socfpga_gen5_clk_endisable(clk, false);
+}
+
+static ulong socfpga_gen5_clk_get_rate(struct clk *clk)
+{
+   struct socfpga_gen5_clk_platdata *plat = dev_get_platdata(clk->dev);
+   struct clk *upclk = NULL;
+   ulong rate, uprate, reg, numer, denom;
+   int ret;
+
+   ret = socfp

[U-Boot] [RFC PATCH v2 03/18] arm: socfpga: gen5: increase SPL_SYS_MALLOC_F_LEN

[Simon Goldschmidt]

In preparation to adding more DM based drivers, increase the SPL
pre-relocation heap just enough to allow those new drivers to run.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 arch/arm/mach-socfpga/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 1d914648e3..9efdcd6f10 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -13,7 +13,7 @@ config SPL_STACK_R_ADDR
default 0x0080 if TARGET_SOCFPGA_GEN5
 
 config SPL_SYS_MALLOC_F_LEN
-   default 0x800 if TARGET_SOCFPGA_GEN5
+   default 0x1100 if TARGET_SOCFPGA_GEN5
 
 config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
default 0xa2
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 01/18] ddr: socfpga: gen5: constify altera_gen5_sdram_ops

[Simon Goldschmidt]

Make the function pointer struct const, as it does not need to be
writable. This doesn't really change anything other than moving this
variable to a different section. No functional change.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2: None

 drivers/ddr/altera/sdram_gen5.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index fcd89b619d..8c8ea19eb9 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -626,7 +626,7 @@ static int altera_gen5_sdram_get_info(struct udevice *dev,
return 0;
 }
 
-static struct ram_ops altera_gen5_sdram_ops = {
+static const struct ram_ops altera_gen5_sdram_ops = {
.get_info = altera_gen5_sdram_get_info,
 };
 
-- 
2.20.1

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[U-Boot] [RFC PATCH v2 00/18] arm: socfpga: gen5: move to DM

[Simon Goldschmidt]

This is an RFC series with the target to move SPL code from arch to
DM drivers.

It is not finished, but I send this here for discussion mainly about
the devicetree format with the goal of keeping the various sub-
architectures (cyclone5, arria10, etc.) in the same style.

Patch 8 adds a C tool to convert existing gen5 qts handoff files to a
handoff dtsi. As an example, the last patch contains the handoff dtsi
for socfpga_socrates.

I have sent v1 some time ago, but this one has heavily changed and is
not finished, thus v2 but RFC. This series also is not edited to fix
patman warnings, yet.

Changes in v2:
- add dts based reset handling (messed up in v1)
- split this patch from v1 5/6
- split this patch from v1 5/6

Simon Goldschmidt (18):
  ddr: socfpga: gen5: constify altera_gen5_sdram_ops
  dts: arm: socfpga: add label for clkmgr
  arm: socfpga: gen5: increase SPL_SYS_MALLOC_F_LEN
  timer: dw-apb: add reset handling
  arm: socfpga: gen5: move initial reset handling to reset driver
  arm: dts: socfpga: add settings for gen5 clk driver
  arm: dts: socfpga: make clock nodes available in SPL
  socfpga: gen5: add new tool to create handoff dtsi files
  sdram: socfpga: gen5: make config structs dts compatible
  ddr: socfpga: gen5: fetch handoff information from 'of_to_platdata'
  ddr: socfpga: gen5: read handoff information from devicetree
  arm: socfpga: gen5: add readonly clk driver
  arm: socfpga: gen5: enable DM CLK
  arm: socfpga: gen5: move clock initialization to CLK driver
  arm: socfpga: gen5: load CLK config from devicetree
  spi: cadence_qspi: support DM_CLK
  arm: socfpga: gen5: parse qspi clock from devictree
  socfpga: gen5: move CLK and SDRAM to DM

 MAINTAINERS   |   1 +
 arch/arm/dts/socfpga-common-u-boot.dtsi   |  71 ++
 arch/arm/dts/socfpga.dtsi |   7 +-
 .../dts/socfpga_cyclone5_socrates-u-boot.dtsi |   1 +
 .../socfpga_cyclone5_socrates_handoff.dtsi| 290 +++
 arch/arm/mach-socfpga/Kconfig |   4 +-
 arch/arm/mach-socfpga/Makefile|   5 -
 arch/arm/mach-socfpga/clock_manager.c |  31 +-
 arch/arm/mach-socfpga/clock_manager_gen5.c| 528 -
 arch/arm/mach-socfpga/create_handoff_gen5.c   | 660 
 arch/arm/mach-socfpga/freeze_controller.c |  10 +-
 .../mach-socfpga/include/mach/clock_manager.h |   2 +
 .../include/mach/clock_manager_gen5.h |  14 -
 .../mach-socfpga/include/mach/sdram_gen5.h|  16 +-
 arch/arm/mach-socfpga/qts-to-handoff.sh   |  83 +++
 arch/arm/mach-socfpga/reset_manager_gen5.c|  13 -
 arch/arm/mach-socfpga/spl_gen5.c  |  29 +-
 arch/arm/mach-socfpga/wrap_pll_config.c   | 146 
 arch/arm/mach-socfpga/wrap_sdram_config.c | 318 
 drivers/clk/altera/Makefile   |   1 +
 drivers/clk/altera/clk-gen5.c | 705 ++
 drivers/ddr/altera/sdram_gen5.c   |  92 ++-
 drivers/ddr/altera/sequencer.c|  74 +-
 drivers/ddr/altera/sequencer.h|   9 +-
 drivers/reset/reset-socfpga.c |  37 +-
 drivers/spi/cadence_qspi.c|  20 +-
 drivers/timer/dw-apb-timer.c  |  18 +-
 include/configs/socfpga_common.h  |   5 -
 28 files changed, 2072 insertions(+), 1118 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_cyclone5_socrates_handoff.dtsi
 delete mode 100644 arch/arm/mach-socfpga/clock_manager_gen5.c
 create mode 100644 arch/arm/mach-socfpga/create_handoff_gen5.c
 create mode 100755 arch/arm/mach-socfpga/qts-to-handoff.sh
 delete mode 100644 arch/arm/mach-socfpga/wrap_pll_config.c
 delete mode 100644 arch/arm/mach-socfpga/wrap_sdram_config.c
 create mode 100644 drivers/clk/altera/clk-gen5.c

-- 
2.20.1

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[U-Boot] [PATCH v2 2/2] test: provide test for errno_str()

[Heinrich Schuchardt]

Provide a unit test for errno_str(). Test that known and unknown error
numbers are handled correctly.

Signed-off-by: Heinrich Schuchardt 
---
v2:
Do no use constants for strings.
---
 test/lib/Makefile |  1 +
 test/lib/test_errno_str.c | 46 +++
 2 files changed, 47 insertions(+)
 create mode 100644 test/lib/test_errno_str.c

diff --git a/test/lib/Makefile b/test/lib/Makefile
index 308c61708e..b13aaca7ce 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -6,3 +6,4 @@ obj-y += cmd_ut_lib.o
 obj-y += hexdump.o
 obj-y += lmb.o
 obj-y += string.o
+obj-$(CONFIG_ERRNO_STR) += test_errno_str.o
diff --git a/test/lib/test_errno_str.c b/test/lib/test_errno_str.c
new file mode 100644
index 00..8a9f1fd980
--- /dev/null
+++ b/test/lib/test_errno_str.c
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019 Heinrich Schuchardt 
+ *
+ * Unit tests for memory functions
+ *
+ * The architecture dependent implementations run through different lines of
+ * code depending on the alignment and length of memory regions copied or set.
+ * This has to be considered in testing.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * lib_errno_str() - unit test for errno_str()
+ *
+ * Test errno_str() with varied alignment and length of the copied buffer.
+ *
+ * @uts:   unit test state
+ * Return: 0 = success, 1 = failure
+ */
+static int lib_errno_str(struct unit_test_state *uts)
+{
+   const char *msg;
+
+   msg = errno_str(1);
+   ut_asserteq_str("Success", msg);
+
+   msg = errno_str(0);
+   ut_asserteq_str("Success", msg);
+
+   msg = errno_str(-ENOMEM);
+   ut_asserteq_str("Out of memory", msg);
+
+   msg = errno_str(-9);
+   ut_asserteq_str("Unknown error", msg);
+
+   return 0;
+}
+
+LIB_TEST(lib_errno_str, 0);
--
2.23.0

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[U-Boot] [PATCH v2 0/2] lib: errno: check for unsupported error number

[Heinrich Schuchardt]

errno_str() should not return a random pointer for unknown error codes.

Provide a unit test for errno_str().

v2:
Do not use constants for error messages in unit test.

Heinrich Schuchardt (2):
  lib: errno: check for unsupported error number
  test: provide test for errno_str()

 lib/errno_str.c   |  8 ++-
 test/lib/Makefile |  1 +
 test/lib/test_errno_str.c | 46 +++
 3 files changed, 54 insertions(+), 1 deletion(-)
 create mode 100644 test/lib/test_errno_str.c

--
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[U-Boot] [PATCH v2 1/2] lib: errno: check for unsupported error number

[Heinrich Schuchardt]

If errno_str() is called with an unsupported error number, do not return a
random pointer but a reasonable text.

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Simon Glass 
---
v2:
no change
---
 lib/errno_str.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/lib/errno_str.c b/lib/errno_str.c
index 0ba950e970..bb8f9fbeb3 100644
--- a/lib/errno_str.c
+++ b/lib/errno_str.c
@@ -136,6 +136,8 @@ static const char * const errno_message[] = {
ERRNO_MSG(EDQUOT, "Quota exceeded"),
ERRNO_MSG(ENOMEDIUM, "No medium found"),
ERRNO_MSG(EMEDIUMTYPE, "Wrong medium type"),
+   /* Message for unsupported error numbers */
+   ERRNO_MSG(0, "Unknown error"),
 };

 const char *errno_str(int errno)
@@ -143,5 +145,9 @@ const char *errno_str(int errno)
if (errno >= 0)
return errno_message[0];

-   return errno_message[abs(errno)];
+   errno = -errno;
+   if (errno >= ARRAY_SIZE(errno_message))
+   errno = ARRAY_SIZE(errno_message) - 1;
+
+   return errno_message[errno];
 }
--
2.23.0

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Re: [U-Boot] [BUG] cmd : 'env exists envvar' does not display the existence of environment variable

[Wolfgang Denk]

Dear Adarsh,

In message  
you wrote:
>
> Could you *please clarify* couple of my queries* regarding posting
> questions* to the mailing list.

I can try...

> + Most of the postings in the mailing list are observed to be code patches.
> Could we also post our observations/opinions on the code/commands/issues on
> a particular u-boot release and
> discuss with other u-boot contributors??

Of course you can also just ask questions.  But as you probably see,
this is a pretty high volume mailing list, so there is always a
chance that such messages may be missed.

> If yes, is there any specific string (similar to [PATCH] for a patch or a
> [BUG] for a bug etc) to be mentioned in the subject line??

No, there is no such tag.  But it is always a good idea to add the
custodian for the affected sub-system on Cc: ; normally you can find
such information in the MAINTAINERS file, or try using the
scripts/get_maintainer.pl tool.  in case of environment code you
just have bad luck, as the entry for MAINTAINERS has not been added
yet to mainline (but it was seen on the mailing list).

> 1.[U-Boot] cmd: clarification on 'env ask' command execution
> 2.Unable to delete the hush shell local variables
>
> Both of them were not forwarded by the moderator (not sure what was wrong ).

I can see 1. at https://lists.denx.de/pipermail/u-boot/2019-October/386682.html

> I re-sent the second query yesterday to the mailing list with subject line
> "*[U-Boot] [BUG] cmd : Local Hush Variable Could not be deleted* "
> and it got forwarded.

You can avoid that your messages need a maintainer's attention by
subscribing to the mailing list.  there is tons of spam messages
that need to get manually cleaned up, and it's easy to miss a
regular posting, especially if the subject line is not clear enough.

> So, any specific guidelines to post queries/observations/bugs for
> discussion will be definitely helpful
> and keep us going.
>
> + For newbies, could you  suggest any pre-requisites, initial documents or
> guidelines to follow while they
> explore u-boot ( from user/tester/developer perspective ).

I found it always useful to read and remember the recommendations
posted in [1].

[1] http://www.catb.org/%7eesr/faqs/smart-questions.html

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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[U-Boot] [PATCH 1/1] disk: part_dos: correctly detect DOS PBR

[Heinrich Schuchardt]

The signature 0x55 0xAA in bytes 510 and 511 of the first sector can either
indicate a DOS partition table of the first sector of a FAT file system.

The current code tries to check if the partition table is valid by looking
at the boot indicator of the partition entries. But first of all it does
not count from 0 to 3 but only from 0 to 2. And second it misses to
increment the pointer for the partition entry.

If it is a FAT file system can be discovered by looking for the text 'FAT'
at offset 0x36 or 'FAT32' at offset 0x52. In a DOS PBR there are no
partition entries, so those bytes are undefined. Don't require the byte at
offset 0x1BE to differ from 0x00 and 0x80.

With the patch the logic is changed as follows:

If the partition table has either an invalid boot flag for any partition or
has no partition at all, check if the first sector is a DOS PBR by looking
at the FAT* signature.

Signed-off-by: Heinrich Schuchardt 
---
 disk/part_dos.c | 39 +--
 1 file changed, 25 insertions(+), 14 deletions(-)

diff --git a/disk/part_dos.c b/disk/part_dos.c
index 8ddc13b50c..83ff40d310 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -67,28 +67,39 @@ static int test_block_type(unsigned char *buffer)
 {
int slot;
struct dos_partition *p;
+   int part_count = 0;

if((buffer[DOS_PART_MAGIC_OFFSET + 0] != 0x55) ||
(buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) ) {
return (-1);
} /* no DOS Signature at all */
p = (struct dos_partition *)&buffer[DOS_PART_TBL_OFFSET];
-   for (slot = 0; slot < 3; slot++) {
-   if (p->boot_ind != 0 && p->boot_ind != 0x80) {
-   if (!slot &&
-   (strncmp((char *)&buffer[DOS_PBR_FSTYPE_OFFSET],
-"FAT", 3) == 0 ||
-strncmp((char *)&buffer[DOS_PBR32_FSTYPE_OFFSET],
-"FAT32", 5) == 0)) {
-   return DOS_PBR; /* is PBR */
-   } else {
-   return -1;
-   }
-   }
+
+   /* Check that the boot indicators are valid and count the partitions. */
+   for (slot = 0; slot < 4; ++slot, ++p) {
+   if (p->boot_ind != 0 && p->boot_ind != 0x80)
+   break;
+   if (p->sys_ind)
+   ++part_count;
}
-   return DOS_MBR; /* Is MBR */
-}

+   /*
+* If the partition table is invalid or empty,
+* check if this is a DOS PBR
+*/
+   if (slot != 4 || !part_count) {
+   if (!strncmp((char *)&buffer[DOS_PBR_FSTYPE_OFFSET],
+"FAT", 3) ||
+   !strncmp((char *)&buffer[DOS_PBR32_FSTYPE_OFFSET],
+"FAT32", 5))
+   return DOS_PBR; /* This is a DOS PBR and not an MBR */
+   }
+   if (slot == 4)
+   return DOS_MBR; /* This is an DOS MBR */
+
+   /* This is neither a DOS MBR nor a DOS PBR */
+   return -1;
+}

 static int part_test_dos(struct blk_desc *dev_desc)
 {
--
2.23.0

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Re: [U-Boot] [PULL] u-boot-usb/master

[Marek Vasut]

On 10/15/19 6:59 PM, Jean-Jacques Hiblot wrote:
> 
> On 15/10/2019 11:36, Jean-Jacques Hiblot wrote:
>> Hi Marek,
>>
>> On 15/10/2019 03:01, Marek Vasut wrote:
>>> On 10/15/19 2:59 AM, Tom Rini wrote:
 On Tue, Oct 15, 2019 at 01:34:57AM +0200, Marek Vasut wrote:

> The following changes since commit
> 44fb0d6c9f5147a41c710032869e5e01b3c9e310:
>
>    Merge tag 'xilinx-for-v2020.01' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze (2019-10-09
> 16:22:03 -0400)
>
> are available in the Git repository at:
>
>    git://git.denx.de/u-boot-usb.git master
>
> for you to fetch changes up to
> 3cf0f7a8d485e4bf969628f5658e075084b2f013:
>
>    usb: ehci-mx6: Fix bus enumeration for iMX7 SoCs (2019-10-12
> 13:07:32
> +0200)
>
 NAK.  From: https://gitlab.denx.de/u-boot/u-boot/-/jobs/19870
 sei510 rock64-rk3328 u200 odroid-n2 fail due to:
 +drivers/usb/gadget/udc/built-in.o: In function
 `usb_gadget_register_driver':
 +drivers/usb/gadget/udc/udc-core.c:325: multiple definition of
 `usb_gadget_register_driver'
 +drivers/usb/gadget/built-in.o:drivers/usb/gadget/dwc2_udc_otg.c:238: first
 defined here
 +drivers/usb/gadget/udc/built-in.o: In function
 `usb_gadget_unregister_driver':
 +drivers/usb/gadget/udc/udc-core.c:334: multiple definition of
 `usb_gadget_unregister_driver'
 +drivers/usb/gadget/built-in.o:drivers/usb/gadget/dwc2_udc_otg.c:287: first
 defined here
>>> Sigh, +CC Jean.
>>
>> Looks like v3 has been merged instead of the latest v4 which has the
>> changes in defconfig to prevent this.
>>
>> v4: https://patchwork.ozlabs.org/project/uboot/list/?series=130132
>>
>> v3:
>> https://patchwork.ozlabs.org/project/uboot/list/?series=116460&state=*
>>
>> Changes in v4:
>> - removed patches already merged (DWC3 fixes)
>> - update more defconfigs (u200, sei510, rock64-rk332 and odroid-n2)
>> - Fix the test of the USB_DWC3_GADGET option. IS_ENABLED() requires the
>>   whole option name including the 'CONFIG_' prefix
>>
>> JJ
> 
> 
> Travis build with v4 rebased on top of u-boot-usb/master (minus the v3
> patches): https://travis-ci.org/jjhiblot/u-boot/jobs/598065745

I loaded the V4 into travis too, thanks.
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Re: [U-Boot] [PULL] u-boot-usb/master

[Jean-Jacques Hiblot]

On 15/10/2019 11:36, Jean-Jacques Hiblot wrote:

Hi Marek,

On 15/10/2019 03:01, Marek Vasut wrote:

On 10/15/19 2:59 AM, Tom Rini wrote:

On Tue, Oct 15, 2019 at 01:34:57AM +0200, Marek Vasut wrote:

The following changes since commit 
44fb0d6c9f5147a41c710032869e5e01b3c9e310:


   Merge tag 'xilinx-for-v2020.01' of
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze (2019-10-09
16:22:03 -0400)

are available in the Git repository at:

   git://git.denx.de/u-boot-usb.git master

for you to fetch changes up to 
3cf0f7a8d485e4bf969628f5658e075084b2f013:


   usb: ehci-mx6: Fix bus enumeration for iMX7 SoCs (2019-10-12 
13:07:32

+0200)


NAK.  From: https://gitlab.denx.de/u-boot/u-boot/-/jobs/19870
sei510 rock64-rk3328 u200 odroid-n2 fail due to:
+drivers/usb/gadget/udc/built-in.o: In function 
`usb_gadget_register_driver':
+drivers/usb/gadget/udc/udc-core.c:325: multiple definition of 
`usb_gadget_register_driver'
+drivers/usb/gadget/built-in.o:drivers/usb/gadget/dwc2_udc_otg.c:238: 
first defined here
+drivers/usb/gadget/udc/built-in.o: In function 
`usb_gadget_unregister_driver':
+drivers/usb/gadget/udc/udc-core.c:334: multiple definition of 
`usb_gadget_unregister_driver'
+drivers/usb/gadget/built-in.o:drivers/usb/gadget/dwc2_udc_otg.c:287: 
first defined here

Sigh, +CC Jean.


Looks like v3 has been merged instead of the latest v4 which has the 
changes in defconfig to prevent this.


v4: https://patchwork.ozlabs.org/project/uboot/list/?series=130132

v3: https://patchwork.ozlabs.org/project/uboot/list/?series=116460&state=*

Changes in v4:
- removed patches already merged (DWC3 fixes)
- update more defconfigs (u200, sei510, rock64-rk332 and odroid-n2)
- Fix the test of the USB_DWC3_GADGET option. IS_ENABLED() requires the
  whole option name including the 'CONFIG_' prefix

JJ



Travis build with v4 rebased on top of u-boot-usb/master (minus the v3 
patches): https://travis-ci.org/jjhiblot/u-boot/jobs/598065745







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[U-Boot] [PATCH] arm: mxs: Increase VDDD voltage to match specification

[Marek Vasut]

According to IMX28CEC rev. 4, 10/2018, Table 15. Recommended Operating
Conditions, page 16, the VDDD should be set to 1.55V when the CPU is
operating at 454MHz. This is the case in U-Boot, hence increase the
VDDD voltage. This fixes instability when performing TFTP transfers.
Increase the brownout threshold to 1.4V. The documentation recommends
1.45V setting for the brownout, however, this triggers failure during
power block init, so keep the brownout slightly lower.

Signed-off-by: Marek Vasut 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c 
b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index a5c528a18d..7a1b39844e 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -1254,8 +1254,8 @@ void mxs_power_init(void)
debug("SPL: Setting VDDIO to 3V3 (brownout @ 3v15)\n");
mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150);
 
-   debug("SPL: Setting VDDD to 1V5 (brownout @ 1v315)\n");
-   mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1315);
+   debug("SPL: Setting VDDD to 1V55 (brownout @ 1v400)\n");
+   mxs_power_set_vddx(&mxs_vddd_cfg, 1550, 1400);
 #ifdef CONFIG_MX23
debug("SPL: Setting mx23 VDDMEM to 2V5 (brownout @ 1v7)\n");
mxs_power_set_vddx(&mxs_vddmem_cfg, 2500, 1700);
-- 
2.23.0

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Re: [U-Boot] [BUG] cmd : 'env exists envvar' does not display the existence of environment variable

[Adarsh Babu Kalepalli]

  Hello Wolfgang Denk,

It's my mistake to tag this observation as a bug.
I will take care such thing does not repeat .

Could you *please clarify* couple of my queries* regarding posting
questions* to the mailing list.

+ Most of the postings in the mailing list are observed to be code patches.
Could we also post our observations/opinions on the code/commands/issues on
a particular u-boot release and
discuss with other u-boot contributors??
If yes, is there any specific string (similar to [PATCH] for a patch or a
[BUG] for a bug etc) to be mentioned in the subject line??

I posted the below two queries earlier (first one yesterday and second one
during last month)

1.[U-Boot] cmd: clarification on 'env ask' command execution
2.Unable to delete the hush shell local variables

Both of them were not forwarded by the moderator (not sure what was wrong ).
I re-sent the second query yesterday to the mailing list with subject line
"*[U-Boot] [BUG] cmd : Local Hush Variable Could not be deleted* "
and it got forwarded.

So, any specific guidelines to post queries/observations/bugs for
discussion will be definitely helpful
and keep us going.

+ For newbies, could you  suggest any pre-requisites, initial documents or
guidelines to follow while they
explore u-boot ( from user/tester/developer perspective ).

Regards,
Adarsh




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<#m_6203331441722922600_m_-6344178679015369129_m_4688685467448139936_DAB4FAD8-2DD7-40BB-A1B8-4E2AA1F9FDF2>

On Mon, Oct 14, 2019 at 4:06 PM Wolfgang Denk  wrote:

> Dear Adarsh Babu Kalepalli,
>
> you should not flag your postings with a BUG marker if you simply
> domn't understand how to use the tools.  Please do this only when
> you are really sure there is a misbehaviour.
>
> In message  n...@mail.gmail.com> you wrote:
> >
> > 'env exists env_varName' does not display the existance
> > status of 'env_varName' environment variable.
>
> Which part of the documention states that it should _display_ such a
> status?
>
> > env exists name - tests for existence of variable
>
> This says it "tests", but it does say nothing obout outputting any
> such information.  The command to output such information is "env
> print".
>
> > => printenv ver
> > ver=U-Boot 2019.10 (Oct 14 2019 - 00:47:50 -0700)
> > => env exists ver
> > =>
> > -
> >
> > What is the expected Output and where is the result updated??
>
> Above behaviour is absolutely correct.  The command returns a
> proper status which can be used in conditionals etc., for example:
>
> U-Boot> env exists foo ; echo RC=$?
> RC=1
> U-Boot> if env exists bootdelay ; then echo BOOTDELAY exists ; else echo
> BOOTDELAY does not exist ; fi
> BOOTDELAY exists
> U-Boot> if env exists bootdelay ; then echo BOOTDELAZ exists ; else echo
> BOOTDELAZ does not exist ; fi
> BOOTDELAZ exists
> U-Boot> env exists bootdelay && printenv bootdelay
> bootdelay=3
>
>
> There is no bug.
>
> Best regards,
>
> Wolfgang Denk
>
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
> You don't need a weatherman to know which way the wind blows.
>   - Bob Dylan
>


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Re: [U-Boot] [PATCH 26/34] binman: Correct symbol calculation with non-zero image base

[Stephen Warren]

On 10/15/19 8:07 AM, Simon Glass wrote:

Hi Stephen,

On Mon, 14 Oct 2019 at 09:49, Stephen Warren  wrote:


On 9/26/19 6:38 PM, s...@google.com wrote:

At present binman adds the image base address to the symbol value before
it writes it to the binary. This is not correct since the symbol value
itself (e.g. image position) has no relationship to the image base.

Fix this and update the tests to cover this case.

Signed-off-by: Simon Glass 
---

   tools/binman/elf.py  | 4 +---
   tools/binman/test/u_boot_binman_syms.lds | 2 +-
   2 files changed, 2 insertions(+), 4 deletions(-)

Applied to u-boot-dm, thanks!


This seems to have only just been pushed. This patch breaks boot on
Jetson TK1; u-boot-dm.git master hangs in SPL or before the main U-Boot
prints anything, whereas after reverting this patch solves the issue.

With this patch applied, all I get is:

U-Boot SPL 2019.10-00490-g4f035abcde98 (Oct 14 2019 - 09:48:30 -0600)
Trying to boot from RAM


Yes, just pushed as I had to wait for u-boot-dm/testing to pass, and
it has some flaky runs and then I went on holiday.

This is unfortunate. It looks like we were missing test coverage. I'll
see if I can look at it later in the week, but for now I think I might
drop this patch.


Thanks. The latest push to u-boot-dm/master solves/removes this issue.
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[U-Boot] [PATCH 15/37] board: ge: convert vpd to use i2c eeprom

[Robert Beckett]

convert vpd reader to use DM i2c eeprom driver.
remove old VPD definitions.

Signed-off-by: Robert Beckett 
---
 board/ge/bx50v3/Kconfig  |  2 --
 board/ge/common/Kconfig  | 14 --
 board/ge/common/vpd_reader.c | 37 ++--
 board/ge/mx53ppd/Kconfig |  2 --
 configs/ge_bx50v3_defconfig  |  5 ++---
 configs/mx53ppd_defconfig|  3 ---
 6 files changed, 25 insertions(+), 38 deletions(-)
 delete mode 100644 board/ge/common/Kconfig

diff --git a/board/ge/bx50v3/Kconfig b/board/ge/bx50v3/Kconfig
index 05938560ab..993b055930 100644
--- a/board/ge/bx50v3/Kconfig
+++ b/board/ge/bx50v3/Kconfig
@@ -15,6 +15,4 @@ config SYS_SOC
 config SYS_CONFIG_NAME
default "ge_bx50v3"
 
-source "board/ge/common/Kconfig"
-
 endif
diff --git a/board/ge/common/Kconfig b/board/ge/common/Kconfig
deleted file mode 100644
index 637b264954..00
--- a/board/ge/common/Kconfig
+++ /dev/null
@@ -1,14 +0,0 @@
-config SYS_VPD_EEPROM_I2C_ADDR
-   hex "I2C address of the EEPROM device used for VPD"
-   help
- VPD = Vital Product Data
-
-config SYS_VPD_EEPROM_I2C_BUS
-   int "I2C bus of the EEPROM device used for VPD."
-
-config SYS_VPD_EEPROM_SIZE
-   int "Size in bytes of the EEPROM device used for VPD"
-
-config SYS_VPD_EEPROM_I2C_ADDR_LEN
-   int "Number of bytes to use for VPD EEPROM address"
-   default 1
diff --git a/board/ge/common/vpd_reader.c b/board/ge/common/vpd_reader.c
index 12410d9b71..4df411cf10 100644
--- a/board/ge/common/vpd_reader.c
+++ b/board/ge/common/vpd_reader.c
@@ -8,6 +8,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 /* BCH configuration */
 
@@ -200,28 +203,34 @@ int read_vpd(struct vpd_cache *cache,
 int (*process_block)(struct vpd_cache *, u8 id, u8 version,
  u8 type, size_t size, u8 const *data))
 {
-   static const size_t size = CONFIG_SYS_VPD_EEPROM_SIZE;
-
-   int res;
+   struct udevice *dev;
+   int ret;
u8 *data;
-   unsigned int current_i2c_bus = i2c_get_bus_num();
+   int size;
+
+   ret = uclass_get_device_by_name(UCLASS_I2C_EEPROM, "vpd", &dev);
+   if (ret)
+   return ret;
 
-   res = i2c_set_bus_num(CONFIG_SYS_VPD_EEPROM_I2C_BUS);
-   if (res < 0)
-   return res;
+   size = i2c_eeprom_size(dev);
+   if (size < 0) {
+   printf("Unable to get size of eeprom: %d\n", ret);
+   return ret;
+   }
 
data = malloc(size);
if (!data)
return -ENOMEM;
 
-   res = i2c_read(CONFIG_SYS_VPD_EEPROM_I2C_ADDR, 0,
-  CONFIG_SYS_VPD_EEPROM_I2C_ADDR_LEN,
-  data, size);
-   if (res == 0)
-   res = vpd_reader(size, data, cache, process_block);
+   ret = i2c_eeprom_read(dev, 0, data, size);
+   if (ret) {
+   free(data);
+   return ret;
+   }
+
+   ret = vpd_reader(size, data, cache, process_block);
 
free(data);
 
-   i2c_set_bus_num(current_i2c_bus);
-   return res;
+   return ret;
 }
diff --git a/board/ge/mx53ppd/Kconfig b/board/ge/mx53ppd/Kconfig
index bebb2fab01..6dc3818cb7 100644
--- a/board/ge/mx53ppd/Kconfig
+++ b/board/ge/mx53ppd/Kconfig
@@ -13,6 +13,4 @@ config SYS_SOC
 config SYS_CONFIG_NAME
default "mx53ppd"
 
-source "board/ge/common/Kconfig"
-
 endif
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index ff16b2c4f0..937b6af9fa 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -1,9 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x1780
-CONFIG_SYS_VPD_EEPROM_I2C_ADDR=0x50
-CONFIG_SYS_VPD_EEPROM_I2C_BUS=4
-CONFIG_SYS_VPD_EEPROM_SIZE=1024
 CONFIG_TARGET_GE_BX50V3=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
@@ -46,6 +43,8 @@ CONFIG_DM_I2C_COMPAT=y
 CONFIG_SYS_I2C_MXC=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
 CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index b8cb599491..1de43b7126 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -2,9 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x7780
 CONFIG_TARGET_MX53PPD=y
-CONFIG_SYS_VPD_EEPROM_I2C_ADDR=0x50
-CONFIG_SYS_VPD_EEPROM_I2C_BUS=2
-CONFIG_SYS_VPD_EEPROM_SIZE=1024
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
 CONFIG_FIT=y
-- 
2.20.1

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[U-Boot] [PATCH 17/37] misc: i2c_eeprom: set offset len and chip addr offset mask

[Robert Beckett]

Set the correct offset length and chip address offset mask for each
device to allow correct access to total capacity of the devices.

Signed-off-by: Robert Beckett 
---
 drivers/misc/i2c_eeprom.c | 35 +++
 1 file changed, 35 insertions(+)

diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index c948ed937a..9ce4757b30 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -14,6 +14,8 @@
 struct i2c_eeprom_drv_data {
u32 size; /* size in bytes */
u32 pagewidth; /* pagesize = 2^pagewidth */
+   u32 addr_offset_mask; /* bits in addr used for offset overflow */
+   u32 offset_len; /* size in bytes of offset */
 };
 
 int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, int size)
@@ -139,6 +141,11 @@ static int i2c_eeprom_std_probe(struct udevice *dev)
 {
u8 test_byte;
int ret;
+   struct i2c_eeprom_drv_data *data =
+   (struct i2c_eeprom_drv_data *)dev_get_driver_data(dev);
+
+   i2c_set_chip_offset_len(dev, data->offset_len);
+   i2c_set_chip_addr_offset_mask(dev, data->addr_offset_mask);
 
/* Verify that the chip is functional */
ret = i2c_eeprom_read(dev, 0, &test_byte, 1);
@@ -151,71 +158,99 @@ static int i2c_eeprom_std_probe(struct udevice *dev)
 static const struct i2c_eeprom_drv_data eeprom_data = {
.size = 0,
.pagewidth = 0,
+   .addr_offset_mask = 0,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data mc24aa02e48_data = {
.size = 256,
.pagewidth = 3,
+   .addr_offset_mask = 0,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c01a_data = {
.size = 128,
.pagewidth = 3,
+   .addr_offset_mask = 0,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c02_data = {
.size = 256,
.pagewidth = 3,
+   .addr_offset_mask = 0,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c04_data = {
.size = 512,
.pagewidth = 4,
+   .addr_offset_mask = 0x1,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c08_data = {
.size = 1024,
.pagewidth = 4,
+   .addr_offset_mask = 0x3,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c08a_data = {
.size = 1024,
.pagewidth = 4,
+   .addr_offset_mask = 0x3,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c16a_data = {
.size = 2048,
.pagewidth = 4,
+   .addr_offset_mask = 0x7,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24mac402_data = {
.size = 256,
.pagewidth = 4,
+   .addr_offset_mask = 0,
+   .offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c32_data = {
.size = 4096,
.pagewidth = 5,
+   .addr_offset_mask = 0,
+   .offset_len = 2,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c64_data = {
.size = 8192,
.pagewidth = 5,
+   .addr_offset_mask = 0,
+   .offset_len = 2,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c128_data = {
.size = 16384,
.pagewidth = 6,
+   .addr_offset_mask = 0,
+   .offset_len = 2,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c256_data = {
.size = 32768,
.pagewidth = 6,
+   .addr_offset_mask = 0,
+   .offset_len = 2,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c512_data = {
.size = 65536,
.pagewidth = 6,
+   .addr_offset_mask = 0,
+   .offset_len = 2,
 };
 
 static const struct udevice_id i2c_eeprom_std_ids[] = {
-- 
2.20.1

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[U-Boot] [PATCH 19/37] board: ge: bx50v3: add i2c eeprom bootcount storage

[Robert Beckett]

Add bootcount node, linking to i2c eeprom "bootcount" partitions for
storage.
Enable i2c eeprom bootcount backend storage.
Enable bootcount command and use it for failbootcmd.

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx6q-bx50v3.dts | 7 ++-
 configs/ge_bx50v3_defconfig   | 6 +++---
 include/configs/ge_bx50v3.h   | 4 +---
 3 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index 4dd2ce3038..4d40980254 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -18,6 +18,11 @@
ethernet0 = &fec;
};
 
+   bootcount {
+   compatible = "u-boot,bootcount-i2c-eeprom";
+   i2c-eeprom = <&bootcount_eeprom>;
+   };
+
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog1>;
@@ -250,7 +255,7 @@
size = <1022>;
};
 
-   bootcount {
+   bootcount_eeprom: bootcount {
offset = <1022>;
size = <2>;
};
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 937b6af9fa..519b3e1bb1 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x1780
 CONFIG_TARGET_GE_BX50V3=y
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
@@ -23,6 +22,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_SF=y
 # CONFIG_CMD_NFS is not set
+CONFIG_CMD_BOOTCOUNT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
@@ -34,9 +34,9 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM=y
 CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_BOOTCOUNT_EXT=y
+CONFIG_DM_BOOTCOUNT=y
+CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=10
-CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_DM_I2C_COMPAT=y
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index f5e11aa465..b2c114409d 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -109,9 +109,7 @@
"setcurs 5 4; " \
"lcdputs \"Monitor failed to start. " \
"Try again, or contact GE Service for support.\"; " \
-   "mw.b 0x7000A000 0xbc; " \
-   "mw.b 0x7000A001 0x00; " \
-   "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
+   "bootcount reset; \0" \
"altbootcmd=" \
"run doquiet; " \
"setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
-- 
2.20.1

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[U-Boot] [PATCH 23/37] board: ge: bx50v3: use DM i2c for PMIC initialization

[Robert Beckett]

Use DM i2c for PMIC dc-dc buck converter initialization.

Signed-off-by: Robert Beckett 
---
 board/ge/bx50v3/bx50v3.c | 40 ++--
 1 file changed, 26 insertions(+), 14 deletions(-)

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index dce76808d7..c1a71e1c9a 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -488,7 +488,6 @@ static const struct boot_mode board_boot_modes[] = {
 
 void pmic_init(void)
 {
-#define I2C_PMIC0x2
 #define DA9063_I2C_ADDR 0x58
 #define DA9063_REG_BCORE2_CFG   0x9D
 #define DA9063_REG_BCORE1_CFG   0x9E
@@ -503,38 +502,51 @@ void pmic_init(void)
 #define DA9063_BUCK_MODE_AUTO   0xC0
 
uchar val;
+   struct udevice *dev, *bus;
+   int ret;
+
+   // TODO: Add a da9063 DM PMIC driver and use that.
+   ret = uclass_get_device_by_name(UCLASS_I2C, "i2c@21a8000", &bus);
+   if (ret) {
+   printf("%s: Unable to get I2C bus: %d\n", __func__, ret);
+   return;
+   }
 
-   i2c_set_bus_num(I2C_PMIC);
+   ret = dm_i2c_probe(bus, DA9063_I2C_ADDR, 0, &dev);
+   if (ret) {
+   printf("%s: Unable to get PMIC device: %d\n", __func__, ret);
+   return;
+   }
 
-   i2c_read(DA9063_I2C_ADDR, DA9063_REG_BCORE2_CFG, 1, &val, 1);
+   dm_i2c_read(dev, DA9063_REG_BCORE2_CFG, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
-   i2c_write(DA9063_I2C_ADDR, DA9063_REG_BCORE2_CFG, 1, &val, 1);
+   dm_i2c_write(dev, DA9063_REG_BCORE2_CFG, &val, 1);
 
-   i2c_read(DA9063_I2C_ADDR, DA9063_REG_BCORE1_CFG, 1, &val, 1);
+   dm_i2c_read(dev, DA9063_REG_BCORE1_CFG, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
-   i2c_write(DA9063_I2C_ADDR, DA9063_REG_BCORE1_CFG, 1, &val, 1);
+   dm_i2c_write(dev, DA9063_REG_BCORE1_CFG, &val, 1);
 
-   i2c_read(DA9063_I2C_ADDR, DA9063_REG_BPRO_CFG, 1, &val, 1);
+   dm_i2c_read(dev, DA9063_REG_BPRO_CFG, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
-   i2c_write(DA9063_I2C_ADDR, DA9063_REG_BPRO_CFG, 1, &val, 1);
+   dm_i2c_write(dev, DA9063_REG_BPRO_CFG, &val, 1);
 
-   i2c_read(DA9063_I2C_ADDR, DA9063_REG_BIO_CFG, 1, &val, 1);
+   dm_i2c_read(dev, DA9063_REG_BIO_CFG, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
-   i2c_write(DA9063_I2C_ADDR, DA9063_REG_BIO_CFG, 1, &val, 1);
+   dm_i2c_write(dev, DA9063_REG_BIO_CFG, &val, 1);
 
-   i2c_read(DA9063_I2C_ADDR, DA9063_REG_BMEM_CFG, 1, &val, 1);
+   dm_i2c_read(dev, DA9063_REG_BMEM_CFG, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
-   i2c_write(DA9063_I2C_ADDR, DA9063_REG_BMEM_CFG, 1, &val, 1);
+   dm_i2c_write(dev, DA9063_REG_BMEM_CFG, &val, 1);
 
-   i2c_read(DA9063_I2C_ADDR, DA9063_REG_BPERI_CFG, 1, &val, 1);
+   dm_i2c_read(dev, DA9063_REG_BPERI_CFG, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
-   i2c_write(DA9063_I2C_ADDR, DA9063_REG_BPERI_CFG, 1, &val, 1);
+   dm_i2c_write(dev, DA9063_REG_BPERI_CFG, &val, 1);
 }
 
 int board_late_init(void)
-- 
2.20.1

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[U-Boot] [PATCH 26/37] board: ge: mx53ppd: move uart initialisation to own function

[Robert Beckett]

From: Ian Ray 

Move UART initialisation to a stand-alone function for consistency with
other boards.

Drop PPD_UART_PAD_CTRL since it matches defaults.

Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 board/ge/mx53ppd/mx53ppd.c  | 11 +++
 board/ge/mx53ppd/ppd_gpio.h |  6 --
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index c923478809..2586daddf3 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -81,6 +81,16 @@ int dram_init_banksize(void)
return 0;
 }
 
+static void setup_iomux_uart(void)
+{
+   static const iomux_v3_cfg_t uart_pads[] = {
+   MX53_PAD_PATA_DMACK__UART1_RXD_MUX,
+   MX53_PAD_PATA_DIOW__UART1_TXD_MUX,
+   };
+
+   imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
+}
+
 u32 get_board_rev(void)
 {
return get_cpu_rev() & ~(0xF << 8);
@@ -161,6 +171,7 @@ void ppd_gpio_init(void)
 
 int board_early_init_f(void)
 {
+   setup_iomux_uart();
setup_iomux_fec();
setup_iomux_lcd();
ppd_gpio_init();
diff --git a/board/ge/mx53ppd/ppd_gpio.h b/board/ge/mx53ppd/ppd_gpio.h
index ba2d1baf37..12bb389629 100644
--- a/board/ge/mx53ppd/ppd_gpio.h
+++ b/board/ge/mx53ppd/ppd_gpio.h
@@ -9,15 +9,9 @@
 #include 
 #include 
 
-#define PPD_UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH |\
-  PAD_CTL_PUS_100K_UP)
-
 static const iomux_v3_cfg_t ppd_pads[] = {
/* FEC */
MX53_PAD_EIM_A22__GPIO2_16,
-   /* UART */
-   NEW_PAD_CTRL(MX53_PAD_PATA_DMACK__UART1_RXD_MUX, PPD_UART_PAD_CTRL),
-   NEW_PAD_CTRL(MX53_PAD_PATA_DIOW__UART1_TXD_MUX, PPD_UART_PAD_CTRL),
/* Video */
MX53_PAD_CSI0_DATA_EN__GPIO5_20, /* LR_SCAN_CTRL */
MX53_PAD_CSI0_VSYNC__GPIO5_21,   /* UD_SCAN_CTRL */
-- 
2.20.1

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[U-Boot] [PATCH 27/37] board: ge: mx53ppd: enable DM_VIDEO

[Robert Beckett]

From: Ian Ray 

Enable DM_VIDEO for mx53ppd.  This also requires DM_REGULATOR_FIXED and
DM_PWM for the backlight, and `failbootcmd' is changed to use lcdputs.

Remove unused MX53PPD_LCD_POWER.

Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx53-ppd.dts   | 70 +++
 board/ge/mx53ppd/Makefile|  2 +-
 board/ge/mx53ppd/mx53ppd.c   |  2 -
 board/ge/mx53ppd/mx53ppd_video.c | 96 ++--
 board/ge/mx53ppd/ppd_gpio.h  |  2 -
 configs/mx53ppd_defconfig|  5 +-
 include/configs/mx53ppd.h| 11 ++--
 7 files changed, 133 insertions(+), 55 deletions(-)

diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts
index 3a3192d5e8..947d75b05d 100644
--- a/arch/arm/dts/imx53-ppd.dts
+++ b/arch/arm/dts/imx53-ppd.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "imx53.dtsi"
+#include 
 
 / {
model = "General Electric CS ONE";
@@ -21,6 +22,69 @@
compatible = "u-boot,bootcount-i2c-eeprom";
i2c-eeprom = <&bootcount_eeprom>;
};
+
+   reg_3v3: regulator-3v3 {
+   /* TPS54320 */
+   compatible = "regulator-fixed";
+   regulator-name = "3V3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   };
+
+   reg_3v3_lcd: regulator-3v3-lcd {
+   /* MIC2009 */
+   compatible = "regulator-fixed";
+   regulator-name = "LCD_3V3";
+   vin-supply = <®_3v3>;
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   };
+
+   pwm_bl: backlight {
+   compatible = "pwm-backlight";
+   pwms = <&pwm2 0 5>;
+   brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35
+38 40 43 45 48 51 53 56 58 61 63 66 68 71
+73 76 79 81 84 86 89 91 94 96 99 102 104
+107 109 112 114 117 119 122 124 127 130
+132 135 137 140 142 145 147 150 153 155
+158 160 163 165 168 170 173 175 178 181
+183 186 188 191 193 196 198 201 204 206
+209 211 214 216 219 221 224 226 229 232
+234 237 239 242 244 247 249 252 255>;
+   default-brightness-level = <0>;
+   enable-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
+   power-supply = <®_3v3_lcd>;
+   };
+
+   panel-lvds0 {
+   compatible = "simple-panel";
+   backlight = <&pwm_bl>;
+   power-supply = <®_3v3_lcd>;
+
+   port {
+   panel_in_lvds0: endpoint {
+   remote-endpoint = <&lvds0_out>;
+   };
+   };
+   };
+};
+
+&ldb {
+   status = "okay";
+
+   lvds0: lvds-channel@0 {
+   status = "okay";
+
+   port@2 {
+   reg = <2>;
+   lvds0_out: endpoint {
+   remote-endpoint = <&panel_in_lvds0>;
+   };
+   };
+   };
 };
 
 &iomuxc {
@@ -41,6 +105,12 @@
>;
};
 
+   pinctrl_pwm2: pwm2grp {
+   fsl,pins = <
+   MX53_PAD_DISP0_DAT9__PWM2_PWMO  0x5
+   >;
+   };
+
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX53_PAD_EIM_D21__I2C1_SCL  0x41e4
diff --git a/board/ge/mx53ppd/Makefile b/board/ge/mx53ppd/Makefile
index 9fae414399..f423e80cae 100644
--- a/board/ge/mx53ppd/Makefile
+++ b/board/ge/mx53ppd/Makefile
@@ -7,4 +7,4 @@
 # Jason Liu 
 
 obj-y  += mx53ppd.o
-obj-$(CONFIG_VIDEO)+= mx53ppd_video.o
+obj-$(CONFIG_DM_VIDEO) += mx53ppd_video.o
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index 2586daddf3..17ba3a87dd 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -38,8 +38,6 @@
 #include "../../ge/common/ge_common.h"
 #include "../../ge/common/vpd_reader.h"
 
-#define MX53PPD_LCD_POWER  IMX_GPIO_NR(3, 24)
-
 DECLARE_GLOBAL_DATA_PTR;
 
 static u32 mx53_dram_size[2];
diff --git a/board/ge/mx53ppd/mx53ppd_video.c b/board/ge/mx53ppd/mx53ppd_video.c
index 9dd9f0c98d..c386dc29de 100644
--- a/board/ge/mx53ppd/mx53ppd_video.c
+++ b/board/ge/mx53ppd/mx53ppd_video.c
@@ -9,35 +9,49 @@
  */
 
 #include 
+#include 
 #include 
-#include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
-#include 
-#include "ppd_gpio.h"
-
-#define MX53PPD_LCD_POWER  IMX_GPIO_NR(3, 24)
-
-static struct fb_videomode const nv_spwg = {
-   .name   = "NV-SPWGRGB8

[U-Boot] [PATCH 37/37] board: ge: bx50v3: use DM PMIC driver

[Robert Beckett]

Convert the generic i2c PMIC init code to use the new da9063 driver.

Signed-off-by: Robert Beckett 
---
 board/ge/bx50v3/bx50v3.c| 81 ++---
 configs/ge_bx50v3_defconfig |  3 ++
 2 files changed, 24 insertions(+), 60 deletions(-)

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index aa4a3598c6..69057ede19 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -13,7 +13,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -26,7 +25,8 @@
 #include 
 #include 
 #include 
-#include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -460,65 +460,26 @@ static const struct boot_mode board_boot_modes[] = {
 
 void pmic_init(void)
 {
-#define DA9063_I2C_ADDR 0x58
-#define DA9063_REG_BCORE2_CFG   0x9D
-#define DA9063_REG_BCORE1_CFG   0x9E
-#define DA9063_REG_BPRO_CFG 0x9F
-#define DA9063_REG_BIO_CFG  0xA0
-#define DA9063_REG_BMEM_CFG 0xA1
-#define DA9063_REG_BPERI_CFG0xA2
-#define DA9063_BUCK_MODE_MASK   0xC0
-#define DA9063_BUCK_MODE_MANUAL 0x00
-#define DA9063_BUCK_MODE_SLEEP  0x40
-#define DA9063_BUCK_MODE_SYNC   0x80
-#define DA9063_BUCK_MODE_AUTO   0xC0
-
-   uchar val;
-   struct udevice *dev, *bus;
-   int ret;
-
-   // TODO: Add a da9063 DM PMIC driver and use that.
-   ret = uclass_get_device_by_name(UCLASS_I2C, "i2c@21a8000", &bus);
-   if (ret) {
-   printf("%s: Unable to get I2C bus: %d\n", __func__, ret);
-   return;
-   }
-
-   ret = dm_i2c_probe(bus, DA9063_I2C_ADDR, 0, &dev);
-   if (ret) {
-   printf("%s: Unable to get PMIC device: %d\n", __func__, ret);
-   return;
+   struct udevice *reg;
+   int ret, i;
+   static const char * const bucks[] = {
+   "bcore1",
+   "bcore2",
+   "bpro",
+   "bmem",
+   "bio",
+   "bperi",
+   };
+
+   for (i = 0; i < ARRAY_SIZE(bucks); i++) {
+   ret = regulator_get_by_devname(bucks[i], ®);
+   if (reg < 0) {
+   printf("%s(): Unable to get regulator %s: %d\n",
+  __func__, bucks[i], ret);
+   continue;
+   }
+   regulator_set_mode(reg, DA9063_OPMODE_SYNC);
}
-
-   dm_i2c_read(dev, DA9063_REG_BCORE2_CFG, &val, 1);
-   val &= ~DA9063_BUCK_MODE_MASK;
-   val |= DA9063_BUCK_MODE_SYNC;
-   dm_i2c_write(dev, DA9063_REG_BCORE2_CFG, &val, 1);
-
-   dm_i2c_read(dev, DA9063_REG_BCORE1_CFG, &val, 1);
-   val &= ~DA9063_BUCK_MODE_MASK;
-   val |= DA9063_BUCK_MODE_SYNC;
-   dm_i2c_write(dev, DA9063_REG_BCORE1_CFG, &val, 1);
-
-   dm_i2c_read(dev, DA9063_REG_BPRO_CFG, &val, 1);
-   val &= ~DA9063_BUCK_MODE_MASK;
-   val |= DA9063_BUCK_MODE_SYNC;
-   dm_i2c_write(dev, DA9063_REG_BPRO_CFG, &val, 1);
-
-   dm_i2c_read(dev, DA9063_REG_BIO_CFG, &val, 1);
-   val &= ~DA9063_BUCK_MODE_MASK;
-   val |= DA9063_BUCK_MODE_SYNC;
-   dm_i2c_write(dev, DA9063_REG_BIO_CFG, &val, 1);
-
-   dm_i2c_read(dev, DA9063_REG_BMEM_CFG, &val, 1);
-   val &= ~DA9063_BUCK_MODE_MASK;
-   val |= DA9063_BUCK_MODE_SYNC;
-   dm_i2c_write(dev, DA9063_REG_BMEM_CFG, &val, 1);
-
-   dm_i2c_read(dev, DA9063_REG_BPERI_CFG, &val, 1);
-   val &= ~DA9063_BUCK_MODE_MASK;
-   val |= DA9063_BUCK_MODE_SYNC;
-   dm_i2c_write(dev, DA9063_REG_BPERI_CFG, &val, 1);
 }
 
 int board_late_init(void)
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 8acb41c046..e9ef2de24f 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -61,8 +61,11 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_PWM_IMX=y
 CONFIG_DM_PWM=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_DA9063=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_DA9063=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RX8010SJ=y
 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
-- 
2.20.1

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[U-Boot] [PATCH 32/37] board: ge: mx53ppd: Use DM for ethernet

[Robert Beckett]

Add fec ethernet and pinctrl DT config.
Remove legacy iomux setup for fec.
Enable phylib and DM fec.
Use Kconfig for enabling fec.

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx53-ppd.dts | 24 
 board/ge/mx53ppd/mx53ppd.c | 26 --
 configs/mx53ppd_defconfig  |  3 +++
 include/configs/mx53ppd.h  |  8 
 4 files changed, 27 insertions(+), 34 deletions(-)

diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts
index 484447af10..d308abc09c 100644
--- a/arch/arm/dts/imx53-ppd.dts
+++ b/arch/arm/dts/imx53-ppd.dts
@@ -152,6 +152,21 @@
MX53_PAD_EIM_D17__GPIO3_17  0x1e4
>;
};
+
+   pinctrl_fec: fecgrp {
+   fsl,pins = <
+   MX53_PAD_FEC_MDC__FEC_MDC   0x0
+   MX53_PAD_FEC_MDIO__FEC_MDIO 0x0
+   MX53_PAD_FEC_REF_CLK__FEC_TX_CLK0x0
+   MX53_PAD_FEC_RX_ER__FEC_RX_ER   0x0
+   MX53_PAD_FEC_CRS_DV__FEC_RX_DV  0x0
+   MX53_PAD_FEC_RXD1__FEC_RDATA_1  0x0
+   MX53_PAD_FEC_RXD0__FEC_RDATA_0  0x0
+   MX53_PAD_FEC_TX_EN__FEC_TX_EN   0x0
+   MX53_PAD_FEC_TXD1__FEC_TDATA_1  0x0
+   MX53_PAD_FEC_TXD0__FEC_TDATA_0  0x0
+   >;
+   };
 };
 
 /* eMMC */
@@ -317,3 +332,12 @@
 &gpio5 {
u-boot,dm-pre-reloc;
 };
+
+&fec {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_fec>;
+   phy-supply = <®_3v3>;
+   phy-mode = "rmii";
+   phy-reset-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
+   status = "okay";
+};
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index 57bf03f659..486ef6d374 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -107,31 +107,6 @@ int board_ehci_hcd_init(int port)
 }
 #endif
 
-static void setup_iomux_fec(void)
-{
-   static const iomux_v3_cfg_t fec_pads[] = {
-   NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS |
-PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP |
-PAD_CTL_ODE),
-   NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH),
-   NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1,
-PAD_CTL_HYS | PAD_CTL_PKE),
-   NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0,
-PAD_CTL_HYS | PAD_CTL_PKE),
-   NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH),
-   NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH),
-   NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH),
-   NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
-PAD_CTL_HYS | PAD_CTL_PKE),
-   NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER,
-PAD_CTL_HYS | PAD_CTL_PKE),
-   NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
-PAD_CTL_HYS | PAD_CTL_PKE),
-   };
-
-   imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
-}
-
 static int clock_1GHz(void)
 {
int ret;
@@ -170,7 +145,6 @@ void ppd_gpio_init(void)
 int board_early_init_f(void)
 {
setup_iomux_uart();
-   setup_iomux_fec();
ppd_gpio_init();
 
return 0;
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 2094e74c7d..1fa9715850 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -45,6 +45,9 @@ CONFIG_MISC=y
 CONFIG_I2C_EEPROM=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC_IMX=y
+CONFIG_PHYLIB=y
+CONFIG_DM_ETH=y
+CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX5=y
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index 3b1615338c..5b1c467554 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -28,12 +28,6 @@
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE   UART1_BASE
 
-/* Eth Configs */
-
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE   FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
-
 /* USB Configs */
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
@@ -49,8 +43,6 @@
 
 /* Command definition */
 
-#define CONFIG_ETHPRIME"FEC0"
-
 #define CONFIG_LOADADDR0x7200  /* loadaddr env var */
 
 #define PPD_CONFIG_NFS \
-- 
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Re: [U-Boot] Using MinGW gcc cross-compiling host tools for Windows broken

[Vladimir Yakovlev]

I had used native mkenvimage for board deployment, but since it was
replaced by python script. We had some bugs with cross compiled tools,
which was not present in native linux tools.

Python script like this to make unique mac addresses.

ENV_SIZE = 131072
d = env_template % mac_address
d = d.replace("\n", "\0")
for i in range(ENV_SIZE - len(d) - 4 - 1):
d += "\xff"
crc = binascii.crc32(d) % (1<<32)
f = open("out.env", "wb+")
crc_buf = struct.pack("I", crc)
f.write(crc_buf)
f.write("\x01")
f.write(d)
f.close()

вт, 15 окт. 2019 г. в 10:54, Bin Meng :

> Hi Peter,
>
> On Tue, Oct 15, 2019 at 10:44 AM Peter Tyser  wrote:
> >
> > Hi Bin,
> >
> > - Original Message -
> > > From: "Bin Meng" 
> > > To: "ptyser" , "Vladimir Yakovlev" ,
> "Mike Frysinger" , "Remy
> > > Bohmer" , "U-Boot Mailing List" <
> u-boot@lists.denx.de>
> > > Cc: "Tom Rini" 
> > > Sent: Monday, October 14, 2019 4:46:16 AM
> > > Subject: Using MinGW gcc cross-compiling host tools for Windows broken
> >
> > > Hi Peter,
> > >
> > > I noticed that you were the first one that added support to build
> > > native Win32 tools using MinGW GCC via:
> > >
> > > commit 2f8d396b9302eddcd8d552648e101a46b7a80acd
> > > Author: Peter Tyser 
> > > Date:   Fri Mar 13 18:54:51 2009 -0500
> > >
> > >Add support for building native win32 tools
> > >
> > >Add support for compiling the host tools in the tools directory
> using
> > >the MinGW toolchain.  This produces executables which can be used on
> > >standard Windows computers without requiring cygwin.
> > >
> > >One must specify the MinGW compiler and strip utilities as if they
> > >were the host toolchain in order to build win32 executables, eg:
> > >
> > >make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip
> tools
> > >
> > >Signed-off-by: Peter Tyser 
> > >
> > > There are also several follow-up commits that fixed the build errors
> > > from time to time:
> > >
> > > commit 8b6a4952e6064dc558cb7d5d375990b17491f26f
> > > Author: Vladimir Yakovlev 
> > > Date:   Sat Jul 7 10:05:06 2012 +
> > >
> > >tools: Fix mingw tools build
> > >
> > >mkenvimage does not build due to missed os_support.o and unsupported
> > >file modes S_IRGRP S_IWGRP.
> > >Tested with mingw 4.2.1 on ubuntu 12.04.
> > >
> > >Signed-off-by: Vladimir Yakovlev 
> > >
> > > commit b050c72d52c4e30d5b978ab6758f8dcdbe5c690c
> > > Author: Mike Frysinger 
> > > Date:   Tue Apr 20 05:49:30 2010 -0400
> > >
> > >compiler.h: add uint typedef
> > >
> > >Recent crc changes started using the "uint" type in headers that
> are used
> > >on the build system.  This subsequently broke mingw targets as they
> do not
> > >provide such a type.  So add this basic typedef to compiler.h so
> that we
> > >do not have to worry about this breaking again in the future.
> > >
> > >Signed-off-by: Mike Frysinger 
> > >
> > > commit faf36c1437c95e4a86835633d9801c5f6396a3c7
> > > Author: Remy Bohmer 
> > > Date:   Wed Oct 28 22:13:36 2009 +0100
> > >
> > >Fix mingw tools build
> > >
> > >mkimage does not build due to missing strtok_r() and getline()
> > > implementation
> > >
> > >Signed-off-by: Remy Bohmer 
> > >
> > > Today I tried to build the Windows tools by following the README, and
> > > got build errors.
> > >
> > > $ make HOSTCC=/usr/bin/x86_64-w64-mingw32-gcc tools
> > >
> > > note: I am running this from Linux. It's not clear to me whether we
> > > should run this from Windows natively or cross-compile on Linux.
> >
> > It was intended to be cross-compiled on a Linux box.
> >
> > > It seems that this MinGW Windows build has been broken for quite a
> long time.
> > >
> > > Will you address this? Thanks!
> >
> > I had a quick look at getting compilation working, and my vote is to
> remove
> > support for the MinGW compilation.
>
> Thanks for looking at this.
>
> > - It can't be too popular since the compilation issues haven't been
> > flagged for a long time.
> >
> > - The motivation 10 years ago was to support customers that used Windows
> as
> > their OS development environment, mostly for VxWorks.  Development under
> a
> > 100% Windows environment seems a lot less common nowadays.  Virtual
> machines
> > and Windows Subsystem for Linux also make it much easier to run Linux
> apps
> > in a Windows development environment.  My company hasn't been
> distributing
> > the MinGW binary for a number of years now as a data point.
>
> Ah, I was going to investigate building a complete Windows U-Boot host
> tools for VxWorks as well :-)
>
> >
> > - The feature set of some of the U-Boot tools has increased quite a bit
> > which makes it non-trivial to support with MinGW.  For example mkimage
> links
> > with libssl and libcrypto.
> >
> > I'm guessing more duct tape on the make system would be needed to get
> > MinGW working, and my thought is that ugliness isn't worth the benefit
> > anymore.
> >
>
> The reason I was looking at MinGW first is because I

[U-Boot] [PATCH 11/37] misc: i2c_eeprom: add fixed partitions support

[Robert Beckett]

Add ability to partition eeprom via devicetree bindings

Signed-off-by: Robert Beckett 
---
 drivers/misc/i2c_eeprom.c | 98 +++
 1 file changed, 98 insertions(+)

diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index 8f2349ad5a..7add8fcc0f 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -82,6 +83,29 @@ static int i2c_eeprom_std_ofdata_to_platdata(struct udevice 
*dev)
return 0;
 }
 
+static int i2c_eeprom_std_bind(struct udevice *dev)
+{
+   ofnode partitions = ofnode_find_subnode(dev_ofnode(dev), "partitions");
+   ofnode partition;
+   const char *name;
+
+   if (!ofnode_valid(partitions))
+   return 0;
+   if (!ofnode_device_is_compatible(partitions, "fixed-partitions"))
+   return -ENOTSUPP;
+
+   ofnode_for_each_subnode(partition, partitions) {
+   name = ofnode_get_name(partition);
+   if (!name)
+   continue;
+
+   device_bind_ofnode(dev, DM_GET_DRIVER(i2c_eeprom_partition),
+  name, NULL, partition, NULL);
+   }
+
+   return 0;
+}
+
 static int i2c_eeprom_std_probe(struct udevice *dev)
 {
u8 test_byte;
@@ -117,12 +141,86 @@ U_BOOT_DRIVER(i2c_eeprom_std) = {
.name   = "i2c_eeprom",
.id = UCLASS_I2C_EEPROM,
.of_match   = i2c_eeprom_std_ids,
+   .bind   = i2c_eeprom_std_bind,
.probe  = i2c_eeprom_std_probe,
.ofdata_to_platdata = i2c_eeprom_std_ofdata_to_platdata,
.priv_auto_alloc_size   = sizeof(struct i2c_eeprom),
.ops= &i2c_eeprom_std_ops,
 };
 
+struct i2c_eeprom_partition {
+   u32 offset;
+   u32 size;
+};
+
+static int i2c_eeprom_partition_probe(struct udevice *dev)
+{
+   return 0;
+}
+
+static int i2c_eeprom_partition_ofdata_to_platdata(struct udevice *dev)
+{
+   struct i2c_eeprom_partition *priv = dev_get_priv(dev);
+   u32 offset, size;
+   int ret;
+
+   ret = dev_read_u32(dev, "offset", &offset);
+   if (ret)
+   return ret;
+
+   ret = dev_read_u32(dev, "size", &size);
+   if (ret)
+   return ret;
+
+   priv->offset = offset;
+   priv->size = size;
+
+   return 0;
+}
+
+static int i2c_eeprom_partition_read(struct udevice *dev, int offset,
+u8 *buf, int size)
+{
+   struct i2c_eeprom_partition *priv = dev_get_priv(dev);
+   struct udevice *parent = dev_get_parent(dev);
+
+   if (!parent)
+   return -ENODEV;
+   if (offset + size > priv->size)
+   return -EINVAL;
+
+   return i2c_eeprom_read(parent, offset + priv->offset, buf, size);
+}
+
+static int i2c_eeprom_partition_write(struct udevice *dev, int offset,
+ const u8 *buf, int size)
+{
+   struct i2c_eeprom_partition *priv = dev_get_priv(dev);
+   struct udevice *parent = dev_get_parent(dev);
+
+   if (!parent)
+   return -ENODEV;
+   if (offset + size > priv->size)
+   return -EINVAL;
+
+   return i2c_eeprom_write(parent, offset + priv->offset, (uint8_t *)buf,
+   size);
+}
+
+static const struct i2c_eeprom_ops i2c_eeprom_partition_ops = {
+   .read   = i2c_eeprom_partition_read,
+   .write  = i2c_eeprom_partition_write,
+};
+
+U_BOOT_DRIVER(i2c_eeprom_partition) = {
+   .name   = "i2c_eeprom_partition",
+   .id = UCLASS_I2C_EEPROM,
+   .probe  = i2c_eeprom_partition_probe,
+   .ofdata_to_platdata = i2c_eeprom_partition_ofdata_to_platdata,
+   .priv_auto_alloc_size   = sizeof(struct i2c_eeprom_partition),
+   .ops= &i2c_eeprom_partition_ops,
+};
+
 UCLASS_DRIVER(i2c_eeprom) = {
.id = UCLASS_I2C_EEPROM,
.name   = "i2c_eeprom",
-- 
2.20.1

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[U-Boot] [PATCH 36/37] dm: pmic: add da9063 PMIC driver and regulators

[Robert Beckett]

Add DM driver to support Dialog DA9063.
Currently it support binding regulator children.

Signed-off-by: Robert Beckett 
---
 drivers/power/pmic/Kconfig   |   8 +
 drivers/power/pmic/Makefile  |   1 +
 drivers/power/pmic/da9063.c  | 270 ++
 drivers/power/regulator/Kconfig  |   7 +
 drivers/power/regulator/Makefile |   1 +
 drivers/power/regulator/da9063.c | 320 +++
 include/power/da9063_pmic.h  | 303 +
 7 files changed, 910 insertions(+)
 create mode 100644 drivers/power/pmic/da9063.c
 create mode 100644 drivers/power/regulator/da9063.c
 create mode 100644 include/power/da9063_pmic.h

diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 586772fdec..6dd7b1bf76 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -267,3 +267,11 @@ config SPL_PMIC_LP87565
help
The LP87565 is a PMIC containing a bunch of SMPS.
This driver binds the pmic children in SPL.
+
+config DM_PMIC_DA9063
+   bool "Enable support for Dialog DA9063 PMIC"
+   depends on DM_PMIC && (DM_I2C || DM_SPI)
+   help
+   The DA9063 is a PMIC providing 6 BUCK converters and 11 LDO regulators.
+   It can be accessed via I2C or SPI.
+   This driver binds the pmic children.
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index 888dbb2857..9be9d5d9a0 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_$(SPL_)PMIC_PALMAS) += palmas.o
 obj-$(CONFIG_$(SPL_)PMIC_LP873X) += lp873x.o
 obj-$(CONFIG_$(SPL_)PMIC_LP87565) += lp87565.o
 obj-$(CONFIG_PMIC_STPMIC1) += stpmic1.o
+obj-$(CONFIG_DM_PMIC_DA9063) += da9063.o
 
 obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o
 obj-$(CONFIG_POWER_MAX77696) += pmic_max77696.o
diff --git a/drivers/power/pmic/da9063.c b/drivers/power/pmic/da9063.c
new file mode 100644
index 00..81a7803b09
--- /dev/null
+++ b/drivers/power/pmic/da9063.c
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Collabora
+ * (C) Copyright 2019 GE
+ */
+
+#define DEBUG 1
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static const struct pmic_child_info pmic_children_info[] = {
+   { .prefix = "bcore", .driver = DA9063_BUCK_DRIVER },
+   { .prefix = "bpro", .driver = DA9063_BUCK_DRIVER },
+   { .prefix = "bmem", .driver = DA9063_BUCK_DRIVER },
+   { .prefix = "bio", .driver = DA9063_BUCK_DRIVER },
+   { .prefix = "bperi", .driver = DA9063_BUCK_DRIVER },
+   { .prefix = "ldo", .driver = DA9063_LDO_DRIVER },
+   { },
+};
+
+static int da9063_reg_count(struct udevice *dev)
+{
+   return DA9063_NUM_OF_REGS;
+}
+
+#if defined(CONFIG_DM_I2C)
+static int da9063_i2c_read(struct udevice *dev, uint reg, uint8_t *buff,
+  int len)
+{
+   int ret;
+
+   /* only support single reg accesses */
+   if (len != 1)
+   return -EINVAL;
+
+   ret = dm_i2c_read(dev, reg, buff, len);
+   if (ret) {
+   pr_err("%s: unable to read reg %#x: %d\n", __func__, reg, ret);
+   return ret;
+   }
+
+   return 0;
+}
+
+static int da9063_i2c_write(struct udevice *dev, uint reg, const uint8_t *buff,
+   int len)
+{
+   int ret;
+
+   /* only support single reg accesses */
+   if (len != 1)
+   return -EINVAL;
+
+   ret = dm_i2c_write(dev, reg, buff, len);
+   if (ret) {
+   pr_err("%s: unable to write reg %#x: %d\n", __func__, reg, ret);
+   return ret;
+   }
+
+   return 0;
+}
+#endif
+
+#if defined(CONFIG_DM_SPI)
+static int da9063_spi_read(struct udevice *dev, uint reg, uint8_t *buff,
+  int len)
+{
+   u8 page;
+   u8 data[2];
+   int ret;
+
+   /* only support single reg accesses */
+   if (len != 1)
+   return -EINVAL;
+
+   page = FIELD_GET(DA9063_REG_PAGE_MASK, reg);
+   reg = FIELD_GET(DA9063_REG_ADDR_MASK, reg);
+
+   ret = dm_spi_claim_bus(dev);
+   if (ret)
+   return ret;
+   /* set page */
+   data[0] = FIELD_PREP(DA9063_PROTO_ADDR_MASK, DA9063_PAGE_CON) |
+ FIELD_PREP(DA9063_PROTO_RW_MASK, DA9063_PROTO_WRITE);
+   data[1] = FIELD_PREP(DA9063_PAGE_CON_PAGE, page);
+   ret = dm_spi_xfer(dev, DA9063_PROTO_LEN, data, NULL, SPI_XFER_ONCE);
+   if (ret) {
+   pr_err("%s: unable to set page: %d\n", __func__, ret);
+   goto err_page;
+   }
+
+   /* set target reg */
+   data[0] = FIELD_PREP(DA9063_PROTO_ADDR_MASK, reg) |
+ FIELD_PREP(DA9063_PROTO_RW_MASK, DA9063_PROTO_READ);
+   data[1] = 0;
+   ret = dm_spi_xfer(dev, DA9063_PROTO_LEN, data, data, SPI_XFER_ONCE);
+   if (ret) {
+   pr_err("%s: unable to read reg %#x: %d\n"

[U-Boot] [PATCH 24/37] board: ge: mx53ppd: remove redundant power config

[Robert Beckett]

Remove unused power configuration.
The code never calls pmic_init, so this was not being used, and stops
the build if left enabled when CONFIG_DM_I2C_COMPAT is diabled.

Signed-off-by: Robert Beckett 
---
 include/configs/mx53ppd.h | 9 -
 1 file changed, 9 deletions(-)

diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index 65b8a56f7a..941b8c00cc 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -43,15 +43,6 @@
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
 
-/* PMIC Controller */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_DIALOG_POWER
-#define CONFIG_POWER_FSL
-#define CONFIG_POWER_FSL_MC13892
-#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR0x48
-#define CONFIG_SYS_FSL_PMIC_I2C_ADDR   0x8
-
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_BAUDRATE115200
-- 
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[U-Boot] [PATCH 18/37] bootcount: add a DM i2c eeprom backing store for bootcount

[Robert Beckett]

This driver allows the use of i2c eeprom device or partition as backing
store for boot counter values with DM enabled.

Signed-off-by: Robert Beckett 
---
 drivers/bootcount/Kconfig  | 10 
 drivers/bootcount/Makefile |  1 +
 drivers/bootcount/i2c-eeprom.c | 95 ++
 3 files changed, 106 insertions(+)
 create mode 100644 drivers/bootcount/i2c-eeprom.c

diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig
index b7c29f2fd3..0e506c9ea2 100644
--- a/drivers/bootcount/Kconfig
+++ b/drivers/bootcount/Kconfig
@@ -96,6 +96,16 @@ config DM_BOOTCOUNT_RTC
  Accesses to the backing store are performed using the write16
  and read16 ops of DM RTC devices.
 
+config DM_BOOTCOUNT_I2C_EEPROM
+   bool "Support i2c eeprom devices as a backing store for bootcount"
+   depends on I2C_EEPROM
+   help
+ Enabled reading/writing the bootcount in a DM i2c eeprom device.
+ The wrapper device is to be specified with the compatible string
+ 'u-boot,bootcount-i2c-eeprom' and the 'i2c-eeprom'-property (a phandle
+ pointing to the underlying i2c eeprom device) and an optional 'offset'
+ property are supported.
+
 endmenu
 
 endif
diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile
index f9841d8615..73ccfb5a08 100644
--- a/drivers/bootcount/Makefile
+++ b/drivers/bootcount/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_BOOTCOUNT_EXT)   += bootcount_ext.o
 
 obj-$(CONFIG_DM_BOOTCOUNT)  += bootcount-uclass.o
 obj-$(CONFIG_DM_BOOTCOUNT_RTC)  += rtc.o
+obj-$(CONFIG_DM_BOOTCOUNT_I2C_EEPROM)  += i2c-eeprom.o
diff --git a/drivers/bootcount/i2c-eeprom.c b/drivers/bootcount/i2c-eeprom.c
new file mode 100644
index 00..ee760a2742
--- /dev/null
+++ b/drivers/bootcount/i2c-eeprom.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Collabora
+ * (C) Copyright 2019 GE
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static const u8 bootcount_magic = 0xbc;
+
+struct bootcount_i2c_eeprom_priv {
+   struct udevice *i2c_eeprom;
+   u32 offset;
+};
+
+static int bootcount_i2c_eeprom_set(struct udevice *dev, const u32 a)
+{
+   struct bootcount_i2c_eeprom_priv *priv = dev_get_priv(dev);
+   const u16 val = bootcount_magic << 8 | (a & 0xff);
+
+   if (i2c_eeprom_write(priv->i2c_eeprom, priv->offset,
+(uint8_t *)&val, 2) < 0) {
+   debug("%s: write failed\n", __func__);
+   return -EIO;
+   }
+
+   return 0;
+}
+
+static int bootcount_i2c_eeprom_get(struct udevice *dev, u32 *a)
+{
+   struct bootcount_i2c_eeprom_priv *priv = dev_get_priv(dev);
+   u16 val;
+
+   if (i2c_eeprom_read(priv->i2c_eeprom, priv->offset,
+   (uint8_t *)&val, 2) < 0) {
+   debug("%s: read failed\n", __func__);
+   return -EIO;
+   }
+
+   if (val >> 8 == bootcount_magic) {
+   *a = val & 0xff;
+   return 0;
+   }
+
+   debug("%s: bootcount magic does not match on %04x\n", __func__, val);
+   return -EIO;
+}
+
+static int bootcount_i2c_eeprom_probe(struct udevice *dev)
+{
+   struct ofnode_phandle_args phandle_args;
+   struct bootcount_i2c_eeprom_priv *priv = dev_get_priv(dev);
+   struct udevice *i2c_eeprom;
+
+   if (dev_read_phandle_with_args(dev, "i2c-eeprom", NULL, 0, 0,
+  &phandle_args)) {
+   debug("%s: i2c-eeprom backing device not specified\n",
+ dev->name);
+   return -ENOENT;
+   }
+
+   if (uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, phandle_args.node,
+   &i2c_eeprom)) {
+   debug("%s: could not get backing device\n", dev->name);
+   return -ENODEV;
+   }
+
+   priv->i2c_eeprom = i2c_eeprom;
+   priv->offset = dev_read_u32_default(dev, "offset", 0);
+
+   return 0;
+}
+
+static const struct bootcount_ops bootcount_i2c_eeprom_ops = {
+   .get = bootcount_i2c_eeprom_get,
+   .set = bootcount_i2c_eeprom_set,
+};
+
+static const struct udevice_id bootcount_i2c_eeprom_ids[] = {
+   { .compatible = "u-boot,bootcount-i2c-eeprom" },
+   { }
+};
+
+U_BOOT_DRIVER(bootcount_spi_flash) = {
+   .name   = "bootcount-i2c-eeprom",
+   .id = UCLASS_BOOTCOUNT,
+   .priv_auto_alloc_size = sizeof(struct bootcount_i2c_eeprom_priv),
+   .probe  = bootcount_i2c_eeprom_probe,
+   .of_match = bootcount_i2c_eeprom_ids,
+   .ops= &bootcount_i2c_eeprom_ops,
+};
-- 
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[U-Boot] [PATCH 03/37] board: ge: bx50v3: Fix message output to video console

[Robert Beckett]

From: Ian Ray 

Use vidconsole for output to the LCD, now that DM_VIDEO is used.  Write
white text on a black background, like before migrating to DM_VIDEO.

Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 board/ge/bx50v3/bx50v3.c| 21 ++---
 configs/ge_bx50v3_defconfig |  1 +
 include/configs/ge_bx50v3.h |  9 -
 3 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 499dcb3a61..55fbcbcc81 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -217,13 +217,6 @@ static void do_enable_hdmi(struct display_info_t const 
*dev)
imx_enable_hdmi_phy();
 }
 
-int board_cfb_skip(void)
-{
-   gpio_direction_output(LVDS_POWER_GP, 1);
-
-   return 0;
-}
-
 static int is_b850v3(void)
 {
return confidx == 3;
@@ -703,8 +696,14 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 static int do_backlight_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 {
+#if CONFIG_IS_ENABLED(DM_VIDEO)
+   int ret;
+   struct udevice *dev;
+
 #ifdef CONFIG_VIDEO_IPUV3
if (!is_b850v3()) {
+   gpio_direction_output(LVDS_POWER_GP, 1);
+
/* We need at least 200ms between power on and backlight on
 * as per specifications from CHI MEI
 */
@@ -723,6 +722,14 @@ static int do_backlight_enable(cmd_tbl_t *cmdtp, int flag, 
int argc, char * cons
}
 #endif
 
+   /* Probe, to find a video device to be used to show a message on
+* the vidconsole.
+*/
+   ret = uclass_get_device(UCLASS_VIDEO, 0, &dev);
+   if (ret)
+   return ret;
+#endif
+
return 0;
 }
 
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 7e9da38f20..0b45105134 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -65,3 +65,4 @@ CONFIG_WATCHDOG_TIMEOUT_MSECS=6000
 CONFIG_IMX_WATCHDOG=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 6de5119d7f..92a927bb82 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -114,12 +114,11 @@
"swappartitions=" \
"setexpr partnum 3 - ${partnum}\0" \
"failbootcmd=" \
+   "echo reached failbootcmd; " \
"bx50_backlight_enable; " \
-   "msg=\"Monitor failed to start.  Try again, or contact GE 
Service for support.\"; " \
-   "echo $msg; " \
-   "setenv stdout vga; " \
-   "echo \"\n\n\n\n\" $msg; " \
-   "setenv stdout serial; " \
+   "setcurs 5 4; " \
+   "lcdputs \"Monitor failed to start. " \
+   "Try again, or contact GE Service for support.\"; " \
"mw.b 0x7000A000 0xbc; " \
"mw.b 0x7000A001 0x00; " \
"ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
-- 
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[U-Boot] [PATCH 08/37] board: ge: mx53ppd: use imx wdt

[Robert Beckett]

Enable DM imx WDT
Enable SYSRESET_WATCHDOG to maintain WDT based reset ability

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx53-ppd.dts | 5 +
 board/ge/mx53ppd/mx53ppd.c | 1 -
 configs/mx53ppd_defconfig  | 3 +++
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts
index f89d6f4672..909a76731b 100644
--- a/arch/arm/dts/imx53-ppd.dts
+++ b/arch/arm/dts/imx53-ppd.dts
@@ -11,6 +11,11 @@
 / {
model = "General Electric CS ONE";
compatible = "ge,imx53-cpuvo", "fsl,imx53";
+
+   wdt-reboot {
+   compatible = "wdt-reboot";
+   wdt = <&wdog1>;
+   };
 };
 
 &iomuxc {
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index b4d08a11ee..ad37995624 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -296,7 +296,6 @@ int board_late_init(void)
return res;
 
print_cpuinfo();
-   hw_watchdog_init();
 
check_time();
 
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index e1992e91ad..8822b74864 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -52,5 +52,8 @@ CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
 CONFIG_IMX_WATCHDOG=y
+CONFIG_WDT=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_USB=y
-- 
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[U-Boot] [PATCH 13/37] board: ge: bx50v3: use DM I2C

[Robert Beckett]

Remove old (pre-DM) i2c setup code.
Enable DM i2c.
Enable compat i2c api while we migrate other i2c devices to DM i2c.

Signed-off-by: Robert Beckett 
---
 board/ge/bx50v3/bx50v3.c| 43 -
 configs/ge_bx50v3_defconfig |  5 +
 include/configs/ge_bx50v3.h | 23 
 3 files changed, 5 insertions(+), 66 deletions(-)

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index c29ac5b611..dce76808d7 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -83,45 +83,6 @@ static iomux_v3_cfg_t const uart4_pads[] = {
MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-static struct i2c_pads_info i2c_pad_info1 = {
-   .scl = {
-   .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | I2C_PAD,
-   .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | I2C_PAD,
-   .gp = IMX_GPIO_NR(5, 27)
-   },
-   .sda = {
-   .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | I2C_PAD,
-   .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | I2C_PAD,
-   .gp = IMX_GPIO_NR(5, 26)
-   }
-};
-
-static struct i2c_pads_info i2c_pad_info2 = {
-   .scl = {
-   .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
-   .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
-   .gp = IMX_GPIO_NR(4, 12)
-   },
-   .sda = {
-   .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
-   .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
-   .gp = IMX_GPIO_NR(4, 13)
-   }
-};
-
-static struct i2c_pads_info i2c_pad_info3 = {
-   .scl = {
-   .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | I2C_PAD,
-   .gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | I2C_PAD,
-   .gp = IMX_GPIO_NR(1, 3)
-   },
-   .sda = {
-   .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | I2C_PAD,
-   .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | I2C_PAD,
-   .gp = IMX_GPIO_NR(1, 6)
-   }
-};
-
 static void setup_iomux_uart(void)
 {
imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
@@ -489,10 +450,6 @@ static void set_confidx(const struct vpd_cache* vpd)
 
 int board_init(void)
 {
-   setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-   setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
-   setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
-
if (!read_vpd(&vpd, vpd_callback)) {
vpd.is_read = true;
set_confidx(&vpd);
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index cddc558484..ff16b2c4f0 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -41,6 +41,11 @@ CONFIG_BOOTCOUNT_EXT=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=10
 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
 CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 7c26608aa7..f5e11aa465 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -196,29 +196,6 @@
 #define CONFIG_SYS_RTC_BUS_NUM 2
 #define CONFIG_SYS_I2C_RTC_ADDR0x32
 
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_SPEED 10
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-
-#define CONFIG_SYS_NUM_I2C_BUSES11
-#define CONFIG_SYS_I2C_MAX_HOPS 1
-#define CONFIG_SYS_I2C_BUSES   {   {0, {I2C_NULL_HOP} }, \
-   {1, {I2C_NULL_HOP} }, \
-   {2, {I2C_NULL_HOP} }, \
-   {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
-   {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
-   {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
-   {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
-   {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
-   {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
-   {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
-   {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
-   }
-
 #define CONFIG_BCH
 
 #endif /* __GE_BX50V3_CONFIG_H */
-- 
2.20.1

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[U-Boot] [PATCH 33/37] board: ge: bx50v3: use DM for uart

[Robert Beckett]

Set chosen stdout-path in DT
Add uart3 and associated pinctrl definitions in DT
Remove legacy uart pad and iomux code
Enable DM serial and mxc uart

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx6q-bx50v3.dts | 20 
 board/ge/bx50v3/bx50v3.c  | 24 
 configs/ge_bx50v3_defconfig   |  3 +++
 include/configs/ge_bx50v3.h   | 10 ++
 4 files changed, 25 insertions(+), 32 deletions(-)

diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index e9aaca4a78..7b5fe3b5de 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -14,6 +14,10 @@
model = "General Electric Bx50v3";
compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q";
 
+   chosen {
+   stdout-path = &uart3;
+   };
+
aliases {
ethernet0 = &fec;
};
@@ -236,6 +240,15 @@
MX6QDL_PAD_SD1_DAT3__PWM1_OUT   0x1b0b1
>;
};
+
+   pinctrl_uart3: uart3grp {
+   fsl,pins = <
+   MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+   MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+   MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b1
+   MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b1
+   >;
+   };
 };
 
 &usdhc1 {
@@ -596,3 +609,10 @@
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
};
 };
+
+&uart3 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_uart3>;
+   uart-has-rtscts;
+   status = "okay";
+};
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 2e11697af0..aa4a3598c6 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -46,10 +46,6 @@ static struct vpd_cache vpd;
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
PAD_CTL_HYS)
 
-#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |  \
-   PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
-   PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
 #define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE |\
PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST)
 
@@ -72,24 +68,6 @@ int dram_init(void)
return 0;
 }
 
-static iomux_v3_cfg_t const uart3_pads[] = {
-   MX6_PAD_EIM_D31__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
-   MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
-   MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-   MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const uart4_pads[] = {
-   MX6_PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-   MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
-   imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
-   imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
-}
-
 static int mx6_rgmii_rework(struct phy_device *phydev)
 {
/* Configure AR8033 to ouput a 125MHz clk from CLK_25M */
@@ -423,8 +401,6 @@ int board_early_init_f(void)
imx_iomux_v3_setup_multiple_pads(misc_pads,
 ARRAY_SIZE(misc_pads));
 
-   setup_iomux_uart();
-
 #if defined(CONFIG_VIDEO_IPUV3)
/* Set LDB clock to Video PLL */
select_ldb_di_clock_source(MXC_PLL5_CLK);
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 977aac41f6..8acb41c046 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -65,6 +65,9 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RX8010SJ=y
+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 6ca43c3cf7..d59a965792 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -16,9 +16,6 @@
 
 #define CONFIG_BOARD_NAME  "General Electric Bx50v3"
 
-#define CONFIG_MXC_UART_BASE   UART3_BASE
-#define CONSOLE_DEV"ttymxc2"
-
 #include "mx6_common.h"
 #include 
 
@@ -28,8 +25,6 @@
 #define CONFIG_REVISION_TAG
 #define CONFIG_SYS_MALLOC_LEN  (10 * SZ_1M)
 
-#define CONFIG_MXC_UART
-
 /* SATA Configs */
 #ifdef CONFIG_CMD_SATA
 #define CONFIG_SYS_SATA_MAX_DEVICE 1
@@ -64,7 +59,7 @@
 "setenv netmask 255.255.255.0; setenv ethaddr 
ca:fe:de:ca:f0:11; " \
 "setenv bootargs root=/dev/nfs 
nfsroot=${nfsserver}:/srv/nfs/,v3,tcp rw rootwait" \
 "setenv bootargs $bootargs 
ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off " \
-"setenv bootargs $bootargs cma=128M bootcause=POR 
console=${console} ${videoargs} " \
+"setenv bootargs $bootargs cma=128M bootcause=POR ${videoargs} 
" \
 "setenv bootargs $bootargs 
sys

[U-Boot] [PATCH 35/37] board: ge: mx53ppd: use DM for uart

[Robert Beckett]

Set chose stdout-path in DT
Add uart1 and associated pinctrl definitions in DT
Remove legacy uart pad and iomux code
Enable DM serial and mxc uart

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx53-ppd.dts | 17 +
 board/ge/mx53ppd/mx53ppd.c | 14 --
 configs/mx53ppd_defconfig  |  3 +++
 include/configs/mx53ppd.h  |  9 +
 4 files changed, 21 insertions(+), 22 deletions(-)

diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts
index d308abc09c..681bc89331 100644
--- a/arch/arm/dts/imx53-ppd.dts
+++ b/arch/arm/dts/imx53-ppd.dts
@@ -13,6 +13,10 @@
model = "General Electric CS ONE";
compatible = "ge,imx53-cpuvo", "fsl,imx53";
 
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog1>;
@@ -167,6 +171,13 @@
MX53_PAD_FEC_TXD0__FEC_TDATA_0  0x0
>;
};
+
+   pinctrl_uart1: uart1grp {
+   fsl,pins = <
+   MX53_PAD_PATA_DIOW__UART1_TXD_MUX   0x1e4
+   MX53_PAD_PATA_DMACK__UART1_RXD_MUX  0x1e4
+   >;
+   };
 };
 
 /* eMMC */
@@ -341,3 +352,9 @@
phy-reset-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
status = "okay";
 };
+
+&uart1 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_uart1>;
+   status = "okay";
+};
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index 486ef6d374..a8d4bf363e 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -79,24 +79,11 @@ int dram_init_banksize(void)
return 0;
 }
 
-static void setup_iomux_uart(void)
-{
-   static const iomux_v3_cfg_t uart_pads[] = {
-   MX53_PAD_PATA_DMACK__UART1_RXD_MUX,
-   MX53_PAD_PATA_DIOW__UART1_TXD_MUX,
-   };
-
-   imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-}
-
 u32 get_board_rev(void)
 {
return get_cpu_rev() & ~(0xF << 8);
 }
 
-#define UART_PAD_CTRL  (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
-PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
-
 #ifdef CONFIG_USB_EHCI_MX5
 int board_ehci_hcd_init(int port)
 {
@@ -144,7 +131,6 @@ void ppd_gpio_init(void)
 
 int board_early_init_f(void)
 {
-   setup_iomux_uart();
ppd_gpio_init();
 
return 0;
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 1fa9715850..ac1b701e69 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -54,6 +54,9 @@ CONFIG_PINCTRL_IMX5=y
 CONFIG_PWM_IMX=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_S35392A=y
+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_MX5=y
 CONFIG_VIDEO_IPUV3=y
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index 5b1c467554..7bbb0f8dfd 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -11,8 +11,6 @@
 
 #include 
 
-#define CONSOLE_DEV"ttymxc0"
-
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
@@ -25,9 +23,6 @@
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_REVISION_TAG
 
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE   UART1_BASE
-
 /* USB Configs */
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
@@ -70,11 +65,9 @@
"devnum=2\0" \
"rootdev=mmcblk0p\0" \
"quiet=quiet loglevel=0\0" \
-   "console=" CONSOLE_DEV "\0" \
"lvds=ldb\0" \
"setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
-   "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
-   "console=${console}\0" \
+   "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet}\0" \
"bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
"rootwait ${bootargs}\0" \
"doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
-- 
2.20.1

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[U-Boot] [PATCH 12/37] misc: i2c_eeprom: add size query

[Robert Beckett]

Add ability to query size of eeprom device and partitions

Signed-off-by: Robert Beckett 
---
 drivers/misc/i2c_eeprom.c | 145 +-
 include/i2c_eeprom.h  |  12 
 2 files changed, 138 insertions(+), 19 deletions(-)

diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index 7add8fcc0f..c948ed937a 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -11,6 +11,11 @@
 #include 
 #include 
 
+struct i2c_eeprom_drv_data {
+   u32 size; /* size in bytes */
+   u32 pagewidth; /* pagesize = 2^pagewidth */
+};
+
 int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, int size)
 {
const struct i2c_eeprom_ops *ops = device_get_ops(dev);
@@ -31,6 +36,16 @@ int i2c_eeprom_write(struct udevice *dev, int offset, 
uint8_t *buf, int size)
return ops->write(dev, offset, buf, size);
 }
 
+int i2c_eeprom_size(struct udevice *dev)
+{
+   const struct i2c_eeprom_ops *ops = device_get_ops(dev);
+
+   if (!ops->size)
+   return -ENOSYS;
+
+   return ops->size(dev);
+}
+
 static int i2c_eeprom_std_read(struct udevice *dev, int offset, uint8_t *buf,
   int size)
 {
@@ -60,25 +75,39 @@ static int i2c_eeprom_std_write(struct udevice *dev, int 
offset,
return 0;
 }
 
+static int i2c_eeprom_std_size(struct udevice *dev)
+{
+   struct i2c_eeprom *priv = dev_get_priv(dev);
+
+   return priv->size;
+}
+
 static const struct i2c_eeprom_ops i2c_eeprom_std_ops = {
.read   = i2c_eeprom_std_read,
.write  = i2c_eeprom_std_write,
+   .size   = i2c_eeprom_std_size,
 };
 
 static int i2c_eeprom_std_ofdata_to_platdata(struct udevice *dev)
 {
struct i2c_eeprom *priv = dev_get_priv(dev);
-   u64 data = dev_get_driver_data(dev);
+   struct i2c_eeprom_drv_data *data =
+   (struct i2c_eeprom_drv_data *)dev_get_driver_data(dev);
u32 pagesize;
+   u32 size;
 
if (dev_read_u32(dev, "pagesize", &pagesize) == 0) {
priv->pagesize = pagesize;
-   return 0;
+   } else {
+   /* 6 bit -> page size of up to 2^63 (should be sufficient) */
+   priv->pagewidth = data->pagewidth;
+   priv->pagesize = (1 << priv->pagewidth);
}
 
-   /* 6 bit -> page size of up to 2^63 (should be sufficient) */
-   priv->pagewidth = data & 0x3F;
-   priv->pagesize = (1 << priv->pagewidth);
+   if (dev_read_u32(dev, "size", &size) == 0)
+   priv->size = size;
+   else
+   priv->size = data->size;
 
return 0;
 }
@@ -119,21 +148,91 @@ static int i2c_eeprom_std_probe(struct udevice *dev)
return 0;
 }
 
+static const struct i2c_eeprom_drv_data eeprom_data = {
+   .size = 0,
+   .pagewidth = 0,
+};
+
+static const struct i2c_eeprom_drv_data mc24aa02e48_data = {
+   .size = 256,
+   .pagewidth = 3,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c01a_data = {
+   .size = 128,
+   .pagewidth = 3,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c02_data = {
+   .size = 256,
+   .pagewidth = 3,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c04_data = {
+   .size = 512,
+   .pagewidth = 4,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c08_data = {
+   .size = 1024,
+   .pagewidth = 4,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c08a_data = {
+   .size = 1024,
+   .pagewidth = 4,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c16a_data = {
+   .size = 2048,
+   .pagewidth = 4,
+};
+
+static const struct i2c_eeprom_drv_data atmel24mac402_data = {
+   .size = 256,
+   .pagewidth = 4,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c32_data = {
+   .size = 4096,
+   .pagewidth = 5,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c64_data = {
+   .size = 8192,
+   .pagewidth = 5,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c128_data = {
+   .size = 16384,
+   .pagewidth = 6,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c256_data = {
+   .size = 32768,
+   .pagewidth = 6,
+};
+
+static const struct i2c_eeprom_drv_data atmel24c512_data = {
+   .size = 65536,
+   .pagewidth = 6,
+};
+
 static const struct udevice_id i2c_eeprom_std_ids[] = {
-   { .compatible = "i2c-eeprom", .data = 0 },
-   { .compatible = "microchip,24aa02e48", .data = 3 },
-   { .compatible = "atmel,24c01a", .data = 3 },
-   { .compatible = "atmel,24c02", .data = 3 },
-   { .compatible = "atmel,24c04", .data = 4 },
-   { .compatible = "atmel,24c08", .data = 4 },
-   { .compatible = "atmel,24c08a", .data = 4 },
-   { .compatible = "atmel,24c16a", .data = 4 },
-   { .compatible = "atmel,24mac402", .data = 4 },
-   { .compatible = "atmel,24c32", .data = 5 },
-   { .compatible = "atmel,24c64", .data = 5 },
-   { .compatible = "atme

[U-Boot] [PATCH 20/37] board: ge: mx53ppd: add i2c eeprom bootcount storage

[Robert Beckett]

Add bootcount node, linking to i2c eeprom "bootcount" partitions for
storage.
Enable i2c eeprom bootcount backend storage.
Enable bootcount command and use it for failbootcmd.

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx53-ppd.dts | 5 +
 configs/mx53ppd_defconfig  | 8 +---
 include/configs/mx53ppd.h  | 4 +---
 3 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts
index 18022796e7..3a3192d5e8 100644
--- a/arch/arm/dts/imx53-ppd.dts
+++ b/arch/arm/dts/imx53-ppd.dts
@@ -16,6 +16,11 @@
compatible = "wdt-reboot";
wdt = <&wdog1>;
};
+
+   bootcount {
+   compatible = "u-boot,bootcount-i2c-eeprom";
+   i2c-eeprom = <&bootcount_eeprom>;
+   };
 };
 
 &iomuxc {
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 1de43b7126..db00481266 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x7780
 CONFIG_TARGET_MX53PPD=y
 CONFIG_NR_DRAM_BANKS=2
-CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ge/mx53ppd/imximage.cfg"
@@ -20,6 +19,7 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
+CONFIG_CMD_BOOTCOUNT=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
@@ -32,15 +32,17 @@ CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_BOOTCOUNT_EXT=y
+CONFIG_DM_BOOTCOUNT=y
+CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=10
-CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5"
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_DM_I2C_COMPAT=y
 CONFIG_SYS_I2C_MXC=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC_IMX=y
 CONFIG_MII=y
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index be4336e3a9..b21235dd57 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -110,9 +110,7 @@
"setenv stdout vga; " \
"echo \"\n\n\n\n\" $msg; " \
"setenv stdout serial; " \
-   "mw.b 0x7000A000 0xbc; " \
-   "mw.b 0x7000A001 0x00; " \
-   "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
+   "bootcount reset; \0" \
"altbootcmd=" \
"run doquiet; " \
"setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
-- 
2.20.1

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[U-Boot] [PATCH 34/37] serial: mxc: add imx53 and imx21 compatible string

[Robert Beckett]

Add compatible string for imx53 and imx21.

Signed-off-by: Robert Beckett 
---
 drivers/serial/serial_mxc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index 42abb96a26..8e19a89151 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -348,6 +348,8 @@ static const struct udevice_id mxc_serial_ids[] = {
{ .compatible = "fsl,imx6ul-uart" },
{ .compatible = "fsl,imx7d-uart" },
{ .compatible = "fsl,imx6q-uart" },
+   { .compatible = "fsl,imx53-uart" },
+   { .compatible = "fsl,imx21-uart" },
{ }
 };
 #endif
-- 
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[U-Boot] [PATCH 28/37] rtc: s35392a: encode command correctly

[Robert Beckett]

From: Ian Ray 

The 3-bit "command", or register, is encoded within the device address.
Configure the device accordingly, and pass command in DM I2C read/write
calls correctly.

Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 drivers/rtc/s35392a.c | 27 ---
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/rtc/s35392a.c b/drivers/rtc/s35392a.c
index 844f1b72c7..53cd590e69 100644
--- a/drivers/rtc/s35392a.c
+++ b/drivers/rtc/s35392a.c
@@ -24,11 +24,13 @@
 #include 
 #include 
 
-#define S35390A_CMD_STATUS10x30
-#define S35390A_CMD_STATUS20x31
-#define S35390A_CMD_TIME1  0x32
-#define S35390A_CMD_TIME2  0x33
-#define S35390A_CMD_INT2_REG1  0x35
+#define S35390A_CHIP_ADDR  0x30
+
+#define S35390A_CMD_STATUS10x0
+#define S35390A_CMD_STATUS20x1
+#define S35390A_CMD_TIME1  0x2
+#define S35390A_CMD_TIME2  0x3
+#define S35390A_CMD_INT2_REG1  0x5
 
 #define S35390A_BYTE_YEAR  0
 #define S35390A_BYTE_MONTH 1
@@ -85,11 +87,10 @@ static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, 
int len)
int ret;
 
 #ifdef CONFIG_DM_RTC
-   /* TODO: we need to tweak the chip address to reg */
-   ret = dm_i2c_read(dev, 0, buf, len);
+   ret = dm_i2c_read(dev, reg, buf, len);
 #else
(void)dev;
-   ret = i2c_read(reg, 0, -1, buf, len);
+   ret = i2c_read(S35390A_CHIP_ADDR | reg, 0, -1, buf, len);
 #endif
 
return ret;
@@ -100,11 +101,10 @@ static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 
*buf, int len)
int ret;
 
 #ifdef CONFIG_DM_RTC
-   /* TODO: we need to tweak the chip address to reg */
-   ret = dm_i2c_write(dev, 0, buf, 1);
+   ret = dm_i2c_write(dev, reg, buf, len);
 #else
(void)dev;
-   ret = i2c_write(reg, 0, 0, buf, len);
+   ret = i2c_write(S35390A_CHIP_ADDR | reg, 0, 0, buf, len);
 #endif
 
return ret;
@@ -336,6 +336,11 @@ void rtc_init(void)
 
 static int s35392a_probe(struct udevice *dev)
 {
+   /* 3-bit "command", or register, is encoded within the device address.
+*/
+   i2c_set_chip_offset_len(dev, 0);
+   i2c_set_chip_addr_offset_mask(dev, 0x7);
+
s35392a_rtc_init(dev);
return 0;
 }
-- 
2.20.1

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[U-Boot] [PATCH 31/37] board: ge: mx53ppd: clean up DM PWM video and backlight

[Robert Beckett]

Remove old (incorrect) setup_iomux_lcd.
Enable backlight via display enable handler.
Use cls command to initiate display in HW agnostic manner.

Signed-off-by: Robert Beckett 
---
 board/ge/mx53ppd/mx53ppd.c   |   1 -
 board/ge/mx53ppd/mx53ppd_video.c | 118 +--
 configs/mx53ppd_defconfig|   1 +
 include/configs/mx53ppd.h|   2 +-
 4 files changed, 36 insertions(+), 86 deletions(-)

diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index 17ba3a87dd..57bf03f659 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -171,7 +171,6 @@ int board_early_init_f(void)
 {
setup_iomux_uart();
setup_iomux_fec();
-   setup_iomux_lcd();
ppd_gpio_init();
 
return 0;
diff --git a/board/ge/mx53ppd/mx53ppd_video.c b/board/ge/mx53ppd/mx53ppd_video.c
index c386dc29de..3240ed62ae 100644
--- a/board/ge/mx53ppd/mx53ppd_video.c
+++ b/board/ge/mx53ppd/mx53ppd_video.c
@@ -25,69 +25,6 @@ static int detect_lcd(struct display_info_t const *dev)
return 1;
 }
 
-struct display_info_t const displays[] = {
-   {
-   .bus= -1,
-   .addr   = -1,
-   .pixfmt = IPU_PIX_FMT_RGB24,
-   .detect = detect_lcd,
-   .enable = NULL,
-   .mode = {
-   .name   = "NV-SPWGRGB888",
-   .refresh= 60,
-   .xres   = 800,
-   .yres   = 480,
-   .pixclock   = 15384,
-   .left_margin= 16,
-   .right_margin   = 210,
-   .upper_margin   = 10,
-   .lower_margin   = 22,
-   .hsync_len  = 30,
-   .vsync_len  = 13,
-   .sync   = FB_SYNC_EXT,
-   .vmode  = FB_VMODE_NONINTERLACED
-   }
-   }
-};
-
-size_t display_count = ARRAY_SIZE(displays);
-
-void setup_iomux_lcd(void)
-{
-   static const iomux_v3_cfg_t lcd_pads[] = {
-   MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK,
-   MX53_PAD_DI0_PIN15__IPU_DI0_PIN15,
-   MX53_PAD_DI0_PIN2__IPU_DI0_PIN2,
-   MX53_PAD_DI0_PIN3__IPU_DI0_PIN3,
-   MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0,
-   MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1,
-   MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2,
-   MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3,
-   MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4,
-   MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5,
-   MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6,
-   MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7,
-   MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8,
-   MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9,
-   MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10,
-   MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11,
-   MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12,
-   MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13,
-   MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14,
-   MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15,
-   MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16,
-   MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17,
-   MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18,
-   MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19,
-   MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20,
-   MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21,
-   MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22,
-   MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23,
-   };
-
-   imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
-}
-
 static void lcd_enable(void)
 {
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -112,34 +49,47 @@ static void lcd_enable(void)
&iomux->gpr[2]);
 }
 
-static int do_lcd_enable(cmd_tbl_t *cmdtp, int flag, int argc,
-char * const argv[])
+static void do_enable_backlight(struct display_info_t const *dev)
 {
-   lcd_enable();
-
-   int ret;
struct udevice *panel;
-   struct udevice *dev;
+   int ret;
+
+   lcd_enable();
 
ret = uclass_get_device(UCLASS_PANEL, 0, &panel);
-   if (ret)
-   return ret;
+   if (ret) {
+   printf("Could not find panel: %d\n", ret);
+   return;
+   }
 
panel_set_backlight(panel, 100);
panel_enable_backlight(panel);
+}
 
-   /* Probe, to find a video device to be used to show a message on
-* the vidconsole.
-*/
-   ret = uclass_get_device(UCLASS_VIDEO, 0, &dev);
-   if (ret)
-   return ret;
+struct display_info_t const displays[] = {
+   {
+   .bus= -1,
+   .addr   = -1,
+   .pixfmt = IPU_PIX_FMT_RGB24,
+   .detect = detect_lcd,
+ 

[U-Boot] [PATCH 29/37] board: ge: mx53ppd: fix RTC compatible definition

[Robert Beckett]

From: Ian Ray 

Fix RTC compatible definition.

Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx53-ppd.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts
index 947d75b05d..484447af10 100644
--- a/arch/arm/dts/imx53-ppd.dts
+++ b/arch/arm/dts/imx53-ppd.dts
@@ -192,7 +192,7 @@
reg = <1>;
 
rtc@30 {
-  compatible = "sii,s35390a";
+  compatible = "sii,s35392a-rtc";
   reg = <0x30>;
};
 
-- 
2.20.1

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[U-Boot] [PATCH 21/37] rtc: rx8010sj: fix DM initialization

[Robert Beckett]

pass the udevice by reference instead of double ref

Signed-off-by: Robert Beckett 
---
 drivers/rtc/rx8010sj.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/rtc/rx8010sj.c b/drivers/rtc/rx8010sj.c
index 81560e16ce..2876692a37 100644
--- a/drivers/rtc/rx8010sj.c
+++ b/drivers/rtc/rx8010sj.c
@@ -349,7 +349,7 @@ void rtc_init(void)
 
 static int rx8010sj_probe(struct udevice *dev)
 {
-   rx8010sj_rtc_init(&dev);
+   rx8010sj_rtc_init(dev);
 
return 0;
 }
-- 
2.20.1

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[U-Boot] [PATCH 25/37] board: ge: bx50v3, mx53ppd: disable I2C compatibility API

[Robert Beckett]

Now that all i2c drivers are using DM i2c, we can disable the
compatibility api.

Signed-off-by: Robert Beckett 
---
 configs/ge_bx50v3_defconfig | 1 -
 configs/mx53ppd_defconfig   | 1 -
 2 files changed, 2 deletions(-)

diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 5768757573..769e093261 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -39,7 +39,6 @@ CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=10
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
-CONFIG_DM_I2C_COMPAT=y
 CONFIG_SYS_I2C_MXC=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 9fd6280825..51d79f602a 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -37,7 +37,6 @@ CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=10
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
-CONFIG_DM_I2C_COMPAT=y
 CONFIG_SYS_I2C_MXC=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
-- 
2.20.1

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[U-Boot] [PATCH 16/37] i2c: add support for offset overflow in to address

[Robert Beckett]

Some devices (2 wire eeproms for example) use some bits from the chip
address to represent the high bits of the offset instead of or as well
as using multiple bytes for the offset, effectively stealing chip
addresses on the bus.

Add a chip offset mask that can be set for any i2c chip which gets
filled with the offset overflow during offset setup.

Signed-off-by: Robert Beckett 
Signed-off-by: Ian Ray 
---
 drivers/i2c/i2c-uclass.c | 32 ++--
 include/i2c.h| 24 
 2 files changed, 50 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index e47abf1833..7580867dc1 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -52,16 +52,19 @@ void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
 static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
uint8_t offset_buf[], struct i2c_msg *msg)
 {
-   int offset_len;
+   int offset_len = chip->offset_len;
 
msg->addr = chip->chip_addr;
+   if (chip->chip_addr_offset_mask)
+   msg->addr |= (offset >> (8 * offset_len)) &
+   chip->chip_addr_offset_mask;
msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
msg->len = chip->offset_len;
msg->buf = offset_buf;
-   if (!chip->offset_len)
+   if (!offset_len)
return -EADDRNOTAVAIL;
-   assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
-   offset_len = chip->offset_len;
+   assert(offset_len <= I2C_MAX_OFFSET_LEN);
+
while (offset_len--)
*offset_buf++ = offset >> (8 * offset_len);
 
@@ -83,7 +86,7 @@ static int i2c_read_bytewise(struct udevice *dev, uint offset,
if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
return -EINVAL;
ptr = msg + 1;
-   ptr->addr = chip->chip_addr;
+   ptr->addr = msg->addr;
ptr->flags = msg->flags | I2C_M_RD;
ptr->len = 1;
ptr->buf = &buffer[i];
@@ -132,6 +135,7 @@ int dm_i2c_read(struct udevice *dev, uint offset, uint8_t 
*buffer, int len)
 
if (!ops->xfer)
return -ENOSYS;
+
if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
return i2c_read_bytewise(dev, offset, buffer, len);
ptr = msg;
@@ -139,7 +143,7 @@ int dm_i2c_read(struct udevice *dev, uint offset, uint8_t 
*buffer, int len)
ptr++;
 
if (len) {
-   ptr->addr = chip->chip_addr;
+   ptr->addr = msg->addr;
ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
ptr->flags |= I2C_M_RD;
ptr->len = len;
@@ -465,6 +469,22 @@ int i2c_get_chip_offset_len(struct udevice *dev)
return chip->offset_len;
 }
 
+int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask)
+{
+   struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+   chip->chip_addr_offset_mask = mask;
+
+   return 0;
+}
+
+uint i2c_get_chip_addr_offset_mask(struct udevice *dev)
+{
+   struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+   return chip->chip_addr_offset_mask;
+}
+
 #ifdef CONFIG_DM_GPIO
 static void i2c_gpio_set_pin(struct gpio_desc *pin, int bit)
 {
diff --git a/include/i2c.h b/include/i2c.h
index 33570f5404..3c927340da 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -45,12 +45,17 @@ struct udevice;
  * represent up to 256 bytes. A value larger than 1 may be
  * needed for larger devices.
  * @flags: Flags for this chip (dm_i2c_chip_flags)
+ * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
+ *devices which steal addresses as part of offset.
+ *If offset_len is zero, then the offset is encoded
+ *completely within the chip address itself.
  * @emul: Emulator for this chip address (only used for emulation)
  */
 struct dm_i2c_chip {
uint chip_addr;
uint offset_len;
uint flags;
+   uint chip_addr_offset_mask;
 #ifdef CONFIG_SANDBOX
struct udevice *emul;
bool test_mode;
@@ -261,6 +266,25 @@ int i2c_set_chip_offset_len(struct udevice *dev, uint 
offset_len);
  */
 int i2c_get_chip_offset_len(struct udevice *dev);
 
+/**
+ * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
+ *
+ * Some devices listen on multiple chip addresses to achieve larger offsets
+ * than their single or multiple byte offsets would allow for. You can use this
+ * function to set the bits that are valid to be used for offset overflow.
+ *
+ * @mask: The mask to be used for high offset bits within address
+ * @return 0 if OK, other -ve value on error
+ */
+int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
+
+/*
+ * i2c_get_chip_addr_offset_mask() - get mask of address bits usa

[U-Boot] [PATCH 06/37] board: ge: pass rtc_status via device tree

[Robert Beckett]

From: Ian Ray 

Pass rtc_status via the device tree, instead of on kernel command line.
Additionally, the 2038 mitigation is reported, if applied successfully.

Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 board/ge/bx50v3/bx50v3.c|  7 ++-
 board/ge/common/ge_common.c | 20 +---
 board/ge/mx53ppd/mx53ppd.c  |  7 ++-
 include/configs/ge_bx50v3.h |  2 +-
 include/configs/mx53ppd.h   |  2 +-
 5 files changed, 27 insertions(+), 11 deletions(-)

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 87e34cf1c9..c29ac5b611 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -639,8 +639,13 @@ int checkboard(void)
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
+   char *rtc_status = env_get("rtc_status");
+
fdt_setprop(blob, 0, "ge,boot-ver", version_string,
-   strlen(version_string) + 1);
+   strlen(version_string) + 1);
+
+   fdt_setprop(blob, 0, "ge,rtc-status", rtc_status,
+   strlen(rtc_status) + 1);
return 0;
 }
 #endif
diff --git a/board/ge/common/ge_common.c b/board/ge/common/ge_common.c
index 501c8b2daf..d7e21deca7 100644
--- a/board/ge/common/ge_common.c
+++ b/board/ge/common/ge_common.c
@@ -17,8 +17,10 @@ void check_time(void)
unsigned int current_i2c_bus = i2c_get_bus_num();
 
ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
-   if (ret < 0)
+   if (ret < 0) {
+   env_set("rtc_status", "FAIL");
return;
+   }
 
rtc_init();
 
@@ -28,10 +30,7 @@ void check_time(void)
break;
}
 
-   if (ret < 0)
-   env_set("rtc_status", "RTC_ERROR");
-
-   if (tm.tm_year > 2037) {
+   if (!ret && tm.tm_year > 2037) {
tm.tm_sec  = 0;
tm.tm_min  = 0;
tm.tm_hour = 0;
@@ -46,10 +45,17 @@ void check_time(void)
break;
}
 
-   if (ret < 0)
-   env_set("rtc_status", "RTC_ERROR");
+   if (ret >= 0)
+   ret = 2038;
}
 
+   if (ret < 0)
+   env_set("rtc_status", "FAIL");
+   else if (ret == 2038)
+   env_set("rtc_status", "2038");
+   else
+   env_set("rtc_status", "OK");
+
i2c_set_bus_num(current_i2c_bus);
 }
 
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index 5448567298..b4d08a11ee 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -313,8 +313,13 @@ int checkboard(void)
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
+   char *rtc_status = env_get("rtc_status");
+
fdt_setprop(blob, 0, "ge,boot-ver", version_string,
-   strlen(version_string) + 1);
+   strlen(version_string) + 1);
+
+   fdt_setprop(blob, 0, "ge,rtc-status", rtc_status,
+   strlen(rtc_status) + 1);
return 0;
 }
 #endif
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index d572424831..7c26608aa7 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -93,7 +93,7 @@
"setargs=setenv bootargs root=/dev/${rootdev}${partnum} " \
"ro rootwait cma=128M " \
"bootcause=${bootcause} " \
-   "${quiet} console=${console} ${rtc_status} " \
+   "${quiet} console=${console} " \
"${videoargs}" "\0" \
"doquiet=" \
"if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index 59988efc9b..26e4b729bb 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -101,7 +101,7 @@
"lvds=ldb\0" \
"setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
"vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
-   "console=${console} ${rtc_status}\0" \
+   "console=${console}\0" \
"bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
"rootwait ${bootargs}\0" \
"doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
-- 
2.20.1

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[U-Boot] [PATCH 30/37] board: ge: bx50v3: Enable DM PWM for backlight

[Robert Beckett]

Add backlight and panel devicetree definitions
Use UCLASS_PANEL to enable backlight via display enable handler
Remove old explicit gpio code for handling backlight
Use cls command to initiate display in HW agnostic manner
Enable DM regulator and pwm

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx6q-bx50v3.dts | 95 +++
 board/ge/bx50v3/bx50v3.c  | 81 ++---
 configs/ge_bx50v3_defconfig   |  4 ++
 include/configs/ge_bx50v3.h   |  2 +-
 4 files changed, 116 insertions(+), 66 deletions(-)

diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index 0f27c32db6..e9aaca4a78 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -27,6 +27,84 @@
compatible = "wdt-reboot";
wdt = <&wdog1>;
};
+
+   backlight_lvds: backlight {
+   compatible = "pwm-backlight";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_display>;
+   pwms = <&pwm1 0 500>;
+   brightness-levels = <  0   1   2   3   4   5   6   7   8   9
+ 10  11  12  13  14  15  16  17  18  19
+ 20  21  22  23  24  25  26  27  28  29
+ 30  31  32  33  34  35  36  37  38  39
+ 40  41  42  43  44  45  46  47  48  49
+ 50  51  52  53  54  55  56  57  58  59
+ 60  61  62  63  64  65  66  67  68  69
+ 70  71  72  73  74  75  76  77  78  79
+ 80  81  82  83  84  85  86  87  88  89
+ 90  91  92  93  94  95  96  97  98  99
+100 101 102 103 104 105 106 107 108 109
+110 111 112 113 114 115 116 117 118 119
+120 121 122 123 124 125 126 127 128 129
+130 131 132 133 134 135 136 137 138 139
+140 141 142 143 144 145 146 147 148 149
+150 151 152 153 154 155 156 157 158 159
+160 161 162 163 164 165 166 167 168 169
+170 171 172 173 174 175 176 177 178 179
+180 181 182 183 184 185 186 187 188 189
+190 191 192 193 194 195 196 197 198 199
+200 201 202 203 204 205 206 207 208 209
+210 211 212 213 214 215 216 217 218 219
+220 221 222 223 224 225 226 227 228 229
+230 231 232 233 234 235 236 237 238 239
+240 241 242 243 244 245 246 247 248 249
+250 251 252 253 254 255>;
+   default-brightness-level = <255>;
+   enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+   };
+
+   reg_lvds: regulator-lvds {
+   compatible = "regulator-fixed";
+   regulator-name = "lvds_ppen";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-boot-on;
+   gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
+
+   panel-lvds0 {
+   compatible = "simple-panel";
+   backlight = <&backlight_lvds>;
+   power-supply = <®_lvds>;
+
+   port {
+   panel_in_lvds0: endpoint {
+   remote-endpoint = <&lvds0_out>;
+   };
+   };
+   };
+};
+
+&ldb {
+   status = "okay";
+
+   lvds0: lvds-channel@0 {
+   status = "okay";
+
+   port@2 {
+   reg = <2>;
+   lvds0_out: endpoint {
+   remote-endpoint = <&panel_in_lvds0>;
+   };
+   };
+   };
+};
+
+&pwm1 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_pwm1>;
+   status = "okay";
 };
 
 &iomuxc {
@@ -141,6 +219,23 @@
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
>;
};
+
+   pinctrl_display: dispgrp {
+   fsl,pins = <
+   /* Backlight enable for LVDS display */
+   MX6QDL_PAD_GPIO_0__GPIO1_IO000x1b0b0
+   /* Power for LVDS Display */
+   MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x1b0b0
+   /* backlight PWM brightness control */
+   MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b0b0
+   >;
+   };
+
+   pinctrl_pwm1: pwm1grp {
+  

[U-Boot] [PATCH 05/37] board: ge: bx50v3: Enable DM for PCI and ethernet

[Robert Beckett]

From: Denis Zalevskiy 

DM for PCI pulls DM for ethernet that also needs other changes described
below to build u-boot and keep existing functionality - ability to update
MAC addresses of FEC ethernet adapter and I210 adapter connected to the
Marvell switch.

- fec_mxc driver with DM needs PHYLIB;

- configuration items are moved from ge_bx50v3.h to ge_bx50v3_defconfig;

- FEC is marked as eth0 because it is always present, so indices changed:
  I210 are still probed in the same order;

- board_eth_init() was used by legacy ethernet, setup for enet iomux and
  pcie is moved to the board_late_init();

- pci_init() is called from the board_late_init() to initiate PCI bus
  probing, so I210 devices are propagated to the device tree;

Signed-off-by: Denis Zalevskiy 
[Describe PHY reset in device tree]
Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx6q-bx50v3.dts | 54 +
 board/ge/bx50v3/bx50v3.c  | 75 ++-
 configs/ge_bx50v3_defconfig   |  8 
 include/configs/ge_bx50v3.h   | 12 --
 4 files changed, 75 insertions(+), 74 deletions(-)

diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index deaec63509..28a35394f0 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -13,6 +13,11 @@
 / {
model = "General Electric Bx50v3";
compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q";
+
+   aliases {
+   ethernet0 = &fec;
+   };
+
 };
 
 &iomuxc {
@@ -48,6 +53,30 @@
MX6QDL_PAD_SD3_RST__SD3_RESET   0x170F9
>;
};
+
+   pinctrl_enet: enetgrp {
+   fsl,pins = <
+   MX6QDL_PAD_ENET_MDIO__ENET_MDIO   0x100b0
+   MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
+   MX6QDL_PAD_RGMII_TXC__RGMII_TXC   0x10030
+   MX6QDL_PAD_RGMII_TD0__RGMII_TD0   0x10030
+   MX6QDL_PAD_RGMII_TD1__RGMII_TD1   0x10030
+   MX6QDL_PAD_RGMII_TD2__RGMII_TD2   0x10030
+   MX6QDL_PAD_RGMII_TD3__RGMII_TD3   0x10030
+   MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
+   MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x100b0
+   MX6QDL_PAD_RGMII_RXC__RGMII_RXC   0x1b030
+   MX6QDL_PAD_RGMII_RD0__RGMII_RD0   0x1b030
+   MX6QDL_PAD_RGMII_RD1__RGMII_RD1   0x1b030
+   MX6QDL_PAD_RGMII_RD2__RGMII_RD2   0x1b030
+   MX6QDL_PAD_RGMII_RD3__RGMII_RD3   0x1b030
+   MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
+   /* FEC Reset */
+   MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
+   /* AR8033 Interrupt */
+   MX6QDL_PAD_GPIO_19__GPIO4_IO050x1b0b0
+   >;
+   };
 };
 
 &usdhc1 {
@@ -87,3 +116,28 @@
reg = <0>;
};
 };
+
+&fec {
+   reg = <0x02188000 0x4000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_enet>;
+   phy-mode = "rgmii";
+   status = "okay";
+   phy-reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
+   phy-reset-duration = <10>;
+   phy-reset-post-delay = <1>;
+
+   mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   ethphy0: ethernet-phy@4 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <4>;
+   };
+   };
+};
+
+&pcie {
+   status = "okay";
+};
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 55fbcbcc81..87e34cf1c9 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -34,6 +34,8 @@
 #include "../common/ge_common.h"
 #include "../common/vpd_reader.h"
 #include "../../../drivers/net/e1000.h"
+#include 
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static int confidx = 3;  /* Default to b850v3. */
@@ -81,38 +83,6 @@ static iomux_v3_cfg_t const uart4_pads[] = {
MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-static iomux_v3_cfg_t const enet_pads[] = {
-   MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   MX6_PAD_ENET_MDC__ENET_MDC   | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   MX6_PAD_ENET_REF_CLK__ENET_TX_CLK  | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
-   MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
-   MX6_P

[U-Boot] [PATCH 14/37] board: ge: mx53ppd: use DM I2C

[Robert Beckett]

Remove old (pre-DM) i2c setup code. The old iomux setup was setting up
the wrong pins.
Enable DM i2c.
Enable MXC DM i2c driver.
Enable compat i2c api while we migrate other i2c devices to DM i2c.
Define CONFIG_SYS_MALLOC_F_LEN so that DM is available in pre-reloc.
Make GPIO banks available during preloc, since initialisation is done
in board_early_init_f().
Add gpio_request() calls to satisfy the DM_GPIO compatibility API.

Signed-off-by: Robert Beckett 
Signed-off-by: Ian Ray 
---
 arch/arm/dts/imx53-ppd.dts   | 20 ++
 board/ge/mx53ppd/mx53ppd.c   | 35 +++-
 board/ge/mx53ppd/mx53ppd_video.c |  1 +
 configs/mx53ppd_defconfig|  7 +++
 include/configs/mx53ppd.h| 23 -
 5 files changed, 31 insertions(+), 55 deletions(-)

diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts
index 84b20cdc55..18022796e7 100644
--- a/arch/arm/dts/imx53-ppd.dts
+++ b/arch/arm/dts/imx53-ppd.dts
@@ -222,3 +222,23 @@
scl-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
status = "okay";
 };
+
+&gpio1 {
+   u-boot,dm-pre-reloc;
+};
+
+&gpio2 {
+   u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+   u-boot,dm-pre-reloc;
+};
+
+&gpio4 {
+   u-boot,dm-pre-reloc;
+};
+
+&gpio5 {
+   u-boot,dm-pre-reloc;
+};
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index ad37995624..c923478809 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -124,34 +124,6 @@ static void setup_iomux_fec(void)
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
 }
 
-#define I2C_PAD_CTRL   (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
-PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
-
-static void setup_iomux_i2c(void)
-{
-   static const iomux_v3_cfg_t i2c1_pads[] = {
-   NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL),
-   NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL),
-   };
-
-   imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
-}
-
-#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-static struct i2c_pads_info i2c_pad_info1 = {
-   .scl = {
-   .i2c_mode = MX53_PAD_EIM_D21__I2C1_SCL | I2C_PAD,
-   .gpio_mode = MX53_PAD_EIM_D28__GPIO3_28 | I2C_PAD,
-   .gp = IMX_GPIO_NR(3, 28)
-   },
-   .sda = {
-   .i2c_mode = MX53_PAD_EIM_D28__I2C1_SDA | I2C_PAD,
-   .gpio_mode = MX53_PAD_EIM_D21__GPIO3_21 | I2C_PAD,
-   .gp = IMX_GPIO_NR(3, 21)
-   }
-};
-
 static int clock_1GHz(void)
 {
int ret;
@@ -181,8 +153,10 @@ void ppd_gpio_init(void)
int i;
 
imx_iomux_v3_setup_multiple_pads(ppd_pads, ARRAY_SIZE(ppd_pads));
-   for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i)
+   for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i) {
+   gpio_request(ppd_gpios[i].gpio, "request");
gpio_direction_output(ppd_gpios[i].gpio, ppd_gpios[i].value);
+   }
 }
 
 int board_early_init_f(void)
@@ -255,9 +229,6 @@ int board_init(void)
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 
mxc_set_sata_internal_clock();
-   setup_iomux_i2c();
-
-   setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
 
return 0;
 }
diff --git a/board/ge/mx53ppd/mx53ppd_video.c b/board/ge/mx53ppd/mx53ppd_video.c
index 394dcd6801..9dd9f0c98d 100644
--- a/board/ge/mx53ppd/mx53ppd_video.c
+++ b/board/ge/mx53ppd/mx53ppd_video.c
@@ -104,6 +104,7 @@ static void lcd_enable(void)
pwm_config(1, 500, 500);
 
/* Backlight Power */
+   gpio_request(BACKLIGHT_ENABLE, "BACKLIGHT_ENABLE");
gpio_direction_output(BACKLIGHT_ENABLE, 1);
 
pwm_enable(1);
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 8822b74864..b8cb599491 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -38,6 +38,12 @@ CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_BOOTCOUNT_EXT=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=10
 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5"
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC_IMX=y
 CONFIG_MII=y
@@ -57,3 +63,4 @@ CONFIG_SYSRESET=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_USB=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index 26e4b729bb..be4336e3a9 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -46,13 +46,6 @@
 #define CONFIG_SYS_RTC_BUS_NUM 2
 #define CONFIG_SYS_I2C_RTC_ADDR0x30
 
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1/* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2/* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3/* enable I2C bus 3 */
-
 /* PMIC Controller */
 #define CONFIG_POWER
 #defi

[U-Boot] [PATCH 22/37] board: ge: bx50v3, mx53ppd: use DM rtc

[Robert Beckett]

Convert common code to use DM rtc.
Remove old (pre-DM) rtc defines and config.
Add uboot specific devicetree binding name for bx50v3 rtc

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx6q-bx50v3.dts |  2 +-
 board/ge/common/ge_common.c   | 17 ++---
 configs/ge_bx50v3_defconfig   |  2 ++
 configs/mx53ppd_defconfig |  1 +
 include/configs/ge_bx50v3.h   |  4 
 include/configs/mx53ppd.h |  3 ---
 6 files changed, 10 insertions(+), 19 deletions(-)

diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index 4d40980254..0f27c32db6 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -493,7 +493,7 @@
};
 
rtc@32 {
-   compatible = "epson,rx8010";
+   compatible = "epson,rx8010sj-rtc", "epson,rx8010";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc>;
reg = <0x32>;
diff --git a/board/ge/common/ge_common.c b/board/ge/common/ge_common.c
index d7e21deca7..48c3778046 100644
--- a/board/ge/common/ge_common.c
+++ b/board/ge/common/ge_common.c
@@ -5,27 +5,24 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 void check_time(void)
 {
+   struct udevice *dev;
int ret, i;
struct rtc_time tm;
u8 retry = 3;
 
-   unsigned int current_i2c_bus = i2c_get_bus_num();
-
-   ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
-   if (ret < 0) {
+   ret = uclass_get_device(UCLASS_RTC, 0, &dev);
+   if (ret) {
env_set("rtc_status", "FAIL");
return;
}
 
-   rtc_init();
-
for (i = 0; i < retry; i++) {
-   ret = rtc_get(&tm);
+   ret = dm_rtc_get(dev, &tm);
if (!ret || ret == -EINVAL)
break;
}
@@ -40,7 +37,7 @@ void check_time(void)
tm.tm_year = 2036;
 
for (i = 0; i < retry; i++) {
-   ret = rtc_set(&tm);
+   ret = dm_rtc_set(dev, &tm);
if (!ret)
break;
}
@@ -55,7 +52,5 @@ void check_time(void)
env_set("rtc_status", "2038");
else
env_set("rtc_status", "OK");
-
-   i2c_set_bus_num(current_i2c_bus);
 }
 
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 519b3e1bb1..5768757573 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -60,6 +60,8 @@ CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_PWM_IMX=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_RX8010SJ=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index db00481266..9fd6280825 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -49,6 +49,7 @@ CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX5=y
 CONFIG_PWM_IMX=y
+CONFIG_DM_RTC=y
 CONFIG_RTC_S35392A=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_MX5=y
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index b2c114409d..fd23cbe507 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -190,10 +190,6 @@
 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
 
-#define CONFIG_RTC_RX8010SJ
-#define CONFIG_SYS_RTC_BUS_NUM 2
-#define CONFIG_SYS_I2C_RTC_ADDR0x32
-
 #define CONFIG_BCH
 
 #endif /* __GE_BX50V3_CONFIG_H */
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index b21235dd57..65b8a56f7a 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -43,9 +43,6 @@
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
 
-#define CONFIG_SYS_RTC_BUS_NUM 2
-#define CONFIG_SYS_I2C_RTC_ADDR0x30
-
 /* PMIC Controller */
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
-- 
2.20.1

___
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[U-Boot] [PATCH 10/37] board: ge: mx53ppd: Add i2c bus descritpion

[Robert Beckett]

Add i2c bus devicetree description

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx53-ppd.dts | 176 +
 1 file changed, 176 insertions(+)

diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts
index 909a76731b..84b20cdc55 100644
--- a/arch/arm/dts/imx53-ppd.dts
+++ b/arch/arm/dts/imx53-ppd.dts
@@ -35,6 +35,48 @@
MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
>;
};
+
+   pinctrl_i2c1: i2c1grp {
+   fsl,pins = <
+   MX53_PAD_EIM_D21__I2C1_SCL  0x41e4
+   MX53_PAD_EIM_D28__I2C1_SDA  0x41e4
+   >;
+   };
+
+   pinctrl_i2c1_gpio: i2c1gpiogrp {
+   fsl,pins = <
+   MX53_PAD_EIM_D28__GPIO3_28  0x1e4
+   MX53_PAD_EIM_D21__GPIO3_21  0x1e4
+   >;
+   };
+
+   pinctrl_i2c2: i2c2grp {
+   fsl,pins = <
+   MX53_PAD_EIM_EB2__I2C2_SCL  0x41e4
+   MX53_PAD_EIM_D16__I2C2_SDA  0x41e4
+   >;
+   };
+
+   pinctrl_i2c2_gpio: i2c2gpiogrp {
+   fsl,pins = <
+   MX53_PAD_EIM_D16__GPIO3_16  0x1e4
+   MX53_PAD_EIM_EB2__GPIO2_30  0x1e4
+   >;
+   };
+
+   pinctrl_i2c3: i2c3grp {
+   fsl,pins = <
+   MX53_PAD_EIM_D17__I2C3_SCL  0x41e4
+   MX53_PAD_EIM_D18__I2C3_SDA  0x41e4
+   >;
+   };
+
+   pinctrl_i2c3_gpio: i2c3gpiogrp {
+   fsl,pins = <
+   MX53_PAD_EIM_D18__GPIO3_18  0x1e4
+   MX53_PAD_EIM_D17__GPIO3_17  0x1e4
+   >;
+   };
 };
 
 /* eMMC */
@@ -46,3 +88,137 @@
non-removable;
status = "okay";
 };
+
+/* I2C */
+&i2c1 {
+   pinctrl-names = "default", "gpio";
+   pinctrl-0 = <&pinctrl_i2c1>;
+   pinctrl-1 = <&pinctrl_i2c1_gpio>;
+   sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
+   scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+   status = "okay";
+
+   i2c-switch@70 {
+   compatible = "nxp,pca9547";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x70>;
+   reset-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
+
+   i2c4: i2c@0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0>;
+   };
+
+   i2c5: i2c@1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+
+   rtc@30 {
+  compatible = "sii,s35390a";
+  reg = <0x30>;
+   };
+
+   temp@48 {
+   compatible = "ti,tmp112";
+   reg = <0x48>;
+   };
+
+   mma8453q: accelerometer@1c {
+   compatible = "fsl,mma8453";
+   reg = <0x1c>;
+   interrupt-parent = <&gpio1>;
+   interrupts = <6 IRQ_TYPE_NONE>;
+   interrupt-names = "INT1";
+   };
+
+   mpl3115: pressure-sensor@60 {
+   compatible = "fsl,mpl3115";
+   reg = <0x60>;
+   };
+
+   eeprom: eeprom@50 {
+   compatible = "atmel,24c08";
+   reg = <0x50>;
+
+   partitions {
+   compatible = "fixed-partitions";
+
+   vpd {
+   offset = <0>;
+   size = <1022>;
+   };
+
+   bootcount_eeprom: bootcount {
+   offset = <1022>;
+   size = <2>;
+   };
+   };
+   };
+   };
+
+   i2c6: i2c@2 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <2>;
+   };
+
+   i2c7: i2c@3 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <3>;
+   };
+
+   i2c8: i2c@4 {
+   #address-cells = <1>;
+  

[U-Boot] [PATCH 09/37] board: ge: bx50v3: Add i2c bus description

[Robert Beckett]

Add i2c bus devicetree description

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx6q-bx50v3.dts | 351 ++
 1 file changed, 351 insertions(+)

diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index 2e2e3bbc24..4dd2ce3038 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -81,6 +81,61 @@
MX6QDL_PAD_GPIO_19__GPIO4_IO050x1b0b0
>;
};
+
+   pinctrl_i2c1: i2c1grp {
+   fsl,pins = <
+   MX6QDL_PAD_CSI0_DAT8__I2C1_SDA  0x4001b8b1
+   MX6QDL_PAD_CSI0_DAT9__I2C1_SCL  0x4001b8b1
+   >;
+   };
+
+   pinctrl_i2c2: i2c2grp {
+   fsl,pins = <
+   MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b8b1
+   MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b8b1
+   >;
+   };
+
+   pinctrl_i2c3: i2c3grp {
+   fsl,pins = <
+   MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+   MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+   >;
+   };
+   pinctrl_i2c1_gpio: i2c1gpiogrp {
+   fsl,pins = <
+   MX6QDL_PAD_CSI0_DAT8__GPIO5_IO260x1b0b0
+   MX6QDL_PAD_CSI0_DAT9__GPIO5_IO270x1b0b0
+   >;
+   };
+
+   pinctrl_i2c2_gpio: i2c2gpiogrp {
+   fsl,pins = <
+   MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
+   MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
+   >;
+   };
+
+   pinctrl_i2c3_gpio: i2c3gpiogrp {
+   fsl,pins = <
+   MX6QDL_PAD_GPIO_3__GPIO1_IO03   0x1b0b0
+   MX6QDL_PAD_GPIO_6__GPIO1_IO06   0x1b0b0
+   >;
+   };
+
+   pinctrl_pmic: pmicgrp {
+   fsl,pins = <
+   /* PMIC Interrupt */
+   MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b0b0
+   >;
+   };
+
+   pinctrl_rtc: rtcgrp {
+   fsl,pins = <
+   /* RTC_INT */
+   MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
+   >;
+   };
 };
 
 &usdhc1 {
@@ -145,3 +200,299 @@
 &pcie {
status = "okay";
 };
+
+/* I2C */
+&i2c1 {
+   clock-frequency = <10>;
+   pinctrl-names = "default", "gpio";
+   pinctrl-0 = <&pinctrl_i2c1>;
+   pinctrl-1 = <&pinctrl_i2c1_gpio>;
+   sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
+   scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
+   status = "okay";
+
+   pca9547: mux@70 {
+   compatible = "nxp,pca9547";
+   reg = <0x70>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mux1_i2c1: i2c@0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0>;
+
+   ads7830: ads7830@48 {
+   compatible = "ti,ads7830";
+   reg = <0x48>;
+   };
+
+   mma8453: mma8453@1c {
+   compatible = "fsl,mma8453";
+   reg = <0x1c>;
+   };
+   };
+
+   mux1_i2c2: i2c@1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x1>;
+
+   eeprom: eeprom@50 {
+   compatible = "atmel,24c08";
+   reg = <0x50>;
+
+   partitions {
+   compatible = "fixed-partitions";
+
+   vpd {
+   offset = <0>;
+   size = <1022>;
+   };
+
+   bootcount {
+   offset = <1022>;
+   size = <2>;
+   };
+   };
+   };
+
+   mpl3115: mpl3115@60 {
+   compatible = "fsl,mpl3115";
+   reg = <0x60>;
+   };
+   };
+
+   mux1_i2c3: i2c@2 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x2>;
+   };
+
+   mux1_i2c4: i2c@3 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x3>;
+
+   };
+
+   mux1_i2c5: i2c@4 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+  

[U-Boot] [PATCH 04/37] configs: ppd: DM for USB and regulators PPD

[Robert Beckett]

From: Denis Zalevskiy 

DM should be used for USB since 2019.07, it also requires DM for
regulators.

Signed-off-by: Denis Zalevskiy 
Signed-off-by: Robert Beckett 
---
 configs/mx53ppd_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 7f293c8e9a..e1992e91ad 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -52,3 +52,5 @@ CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
 CONFIG_IMX_WATCHDOG=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_USB=y
-- 
2.20.1

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[U-Boot] [PATCH 07/37] board: ge: bx50v3: use imx wdt

[Robert Beckett]

Enable DM imx WDT
Enable SYSRESET_WATCHDOG to maintain WDT based reset ability

Signed-off-by: Robert Beckett 
---
 arch/arm/dts/imx6q-bx50v3.dts | 4 
 configs/ge_bx50v3_defconfig   | 3 +++
 2 files changed, 7 insertions(+)

diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index 28a35394f0..2e2e3bbc24 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -18,6 +18,10 @@
ethernet0 = &fec;
};
 
+   wdt-reboot {
+   compatible = "wdt-reboot";
+   wdt = <&wdog1>;
+   };
 };
 
 &iomuxc {
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index cd0bf5bab5..cddc558484 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -63,6 +63,9 @@ CONFIG_DM_VIDEO=y
 CONFIG_VIDEO_IPUV3=y
 CONFIG_WATCHDOG_TIMEOUT_MSECS=6000
 CONFIG_IMX_WATCHDOG=y
+CONFIG_WDT=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SYS_WHITE_ON_BLACK=y
-- 
2.20.1

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[U-Boot] [PATCH 01/37] configs: bx50v3: Fix boot hang with video

[Robert Beckett]

From: Ian Ray 

Fixes commit: 0b09f7b15052bb419e318e38da453be46e5a13e5, which converted
to DM_VIDEO, but requires more memory.

[Inspired by 9002e735e71754a90adbb9676c0ffb1964dbc288]

Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 configs/ge_bx50v3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 75fdbf7e72..7e9da38f20 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -64,3 +64,4 @@ CONFIG_VIDEO_IPUV3=y
 CONFIG_WATCHDOG_TIMEOUT_MSECS=6000
 CONFIG_IMX_WATCHDOG=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_SYS_MALLOC_F_LEN=0x4000
-- 
2.20.1

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[U-Boot] [PATCH 02/37] board: ge: bx50v3: Fix run-time warning

[Robert Beckett]

From: Ian Ray 

Fix GPIO reservation warning on code paths that do not need LVDS power.

Signed-off-by: Ian Ray 
Signed-off-by: Robert Beckett 
---
 board/ge/bx50v3/bx50v3.c | 23 +--
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 917ecc4c18..499dcb3a61 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -704,20 +704,23 @@ int ft_board_setup(void *blob, bd_t *bd)
 static int do_backlight_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 {
 #ifdef CONFIG_VIDEO_IPUV3
-   /* We need at least 200ms between power on and backlight on
-* as per specifications from CHI MEI */
-   mdelay(250);
+   if (!is_b850v3()) {
+   /* We need at least 200ms between power on and backlight on
+* as per specifications from CHI MEI
+*/
+   mdelay(250);
 
-   /* enable backlight PWM 1 */
-   pwm_init(0, 0, 0);
+   /* enable backlight PWM 1 */
+   pwm_init(0, 0, 0);
 
-   /* duty cycle 500ns, period: 500ns */
-   pwm_config(0, 500, 500);
+   /* duty cycle 500ns, period: 500ns */
+   pwm_config(0, 500, 500);
 
-   /* Backlight Power */
-   gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
+   /* Backlight Power */
+   gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
 
-   pwm_enable(0);
+   pwm_enable(0);
+   }
 #endif
 
return 0;
-- 
2.20.1

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[U-Boot] [PATCH 00/37] convert GE boards to DM

[Robert Beckett]

This patch series converts GE boards to use DM features.
Most of the patches are GE board specific to modify the board code to
use the DM drivers, or modify the device tree.

There are a few new features:

patch 11 & 12: Add i2c_eeprom partitioning via device tree

patch 16 & 17: Add an i2c chip addr offset overflow mask to allow offsets to
effectively steal chip addresses. This handles a common i2c addressing
mode used on various devices.

patch 18: Add i2c eeprom bootcount driver

patch 36 & 37: add da9063 pmic and regulators

Denis Zalevskiy (2):
  configs: ppd: DM for USB and regulators PPD
  board: ge: bx50v3: Enable DM for PCI and ethernet

Ian Ray (8):
  configs: bx50v3: Fix boot hang with video
  board: ge: bx50v3: Fix run-time warning
  board: ge: bx50v3: Fix message output to video console
  board: ge: pass rtc_status via device tree
  board: ge: mx53ppd: move uart initialisation to own function
  board: ge: mx53ppd: enable DM_VIDEO
  rtc: s35392a: encode command correctly
  board: ge: mx53ppd: fix RTC compatible definition

Robert Beckett (27):
  board: ge: bx50v3: use imx wdt
  board: ge: mx53ppd: use imx wdt
  board: ge: bx50v3: Add i2c bus description
  board: ge: mx53ppd: Add i2c bus descritpion
  misc: i2c_eeprom: add fixed partitions support
  misc: i2c_eeprom: add size query
  board: ge: bx50v3: use DM I2C
  board: ge: mx53ppd: use DM I2C
  board: ge: convert vpd to use i2c eeprom
  i2c: add support for offset overflow in to address
  misc: i2c_eeprom: set offset len and chip addr offset mask
  bootcount: add a DM i2c eeprom backing store for bootcount
  board: ge: bx50v3: add i2c eeprom bootcount storage
  board: ge: mx53ppd: add i2c eeprom bootcount storage
  rtc: rx8010sj: fix DM initialization
  board: ge: bx50v3, mx53ppd: use DM rtc
  board: ge: bx50v3: use DM i2c for PMIC initialization
  board: ge: mx53ppd: remove redundant power config
  board: ge: bx50v3, mx53ppd: disable I2C compatibility API
  board: ge: bx50v3: Enable DM PWM for backlight
  board: ge: mx53ppd: clean up DM PWM video and backlight
  board: ge: mx53ppd: Use DM for ethernet
  board: ge: bx50v3: use DM for uart
  serial: mxc: add imx53 and imx21 compatible string
  board: ge: mx53ppd: use DM for uart
  dm: pmic: add da9063 PMIC driver and regulators
  board: ge: bx50v3: use DM PMIC driver

 arch/arm/dts/imx53-ppd.dts   | 317 ++
 arch/arm/dts/imx6q-bx50v3.dts| 529 +++
 board/ge/bx50v3/Kconfig  |   2 -
 board/ge/bx50v3/bx50v3.c | 291 -
 board/ge/common/Kconfig  |  14 -
 board/ge/common/ge_common.c  |  33 +-
 board/ge/common/vpd_reader.c |  37 ++-
 board/ge/mx53ppd/Kconfig |   2 -
 board/ge/mx53ppd/Makefile|   2 +-
 board/ge/mx53ppd/mx53ppd.c   |  75 +
 board/ge/mx53ppd/mx53ppd_video.c | 125 +++-
 board/ge/mx53ppd/ppd_gpio.h  |   8 -
 configs/ge_bx50v3_defconfig  |  40 ++-
 configs/mx53ppd_defconfig|  35 +-
 drivers/bootcount/Kconfig|  10 +
 drivers/bootcount/Makefile   |   1 +
 drivers/bootcount/i2c-eeprom.c   |  95 ++
 drivers/i2c/i2c-uclass.c |  32 +-
 drivers/misc/i2c_eeprom.c| 278 ++--
 drivers/power/pmic/Kconfig   |   8 +
 drivers/power/pmic/Makefile  |   1 +
 drivers/power/pmic/da9063.c  | 270 
 drivers/power/regulator/Kconfig  |   7 +
 drivers/power/regulator/Makefile |   1 +
 drivers/power/regulator/da9063.c | 320 +++
 drivers/rtc/rx8010sj.c   |   2 +-
 drivers/rtc/s35392a.c|  27 +-
 drivers/serial/serial_mxc.c  |   2 +
 include/configs/ge_bx50v3.h  |  64 +---
 include/configs/mx53ppd.h|  69 +---
 include/i2c.h|  24 ++
 include/i2c_eeprom.h |  12 +
 include/power/da9063_pmic.h  | 303 ++
 33 files changed, 2430 insertions(+), 606 deletions(-)
 delete mode 100644 board/ge/common/Kconfig
 create mode 100644 drivers/bootcount/i2c-eeprom.c
 create mode 100644 drivers/power/pmic/da9063.c
 create mode 100644 drivers/power/regulator/da9063.c
 create mode 100644 include/power/da9063_pmic.h

-- 
2.20.1

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Re: [U-Boot] [PATCH] imx: update i.MX8MQ device trees

[Patrick Wildt]

On Tue, Oct 15, 2019 at 06:18:27AM +, Peng Fan wrote:
> > Subject: [PATCH] imx: update i.MX8MQ device trees
> > 
> > This updates the i.MX8MQ device trees and, necessarily, also the
> > i.MX8MQ clock bindings.  These are taken verbatim from from the
> > Linux kernel version v5.4-rc2, which three small changes which
> > were already part of the previous device tree:
> > 
> >  * Keep the PSCI reserved memory range
> >  * Keep the alias for ethernet, so that the MAC address can be set
> >  * Keep the modified #include for the IOMUXC pins
> 
> Thanks for updating the device tree. Have you been test this on
> a i.MX8MQ EVK board?
> 
> Thanks,
> Peng.

Yes, I have.  No noticable regressions between before the diff
and after.

Thanks,
Patrick
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[U-Boot] Please pull u-boot-dm

[Simon Glass]

Hi Tom,

https://gitlab.denx.de/u-boot/custodians/u-boot-dm/pipelines/950


The following changes since commit 6891152a4596d38ac25d2fe1238e3b6a938554b8:

  Merge branch 'master' of git://git.denx.de/u-boot-socfpga
(2019-10-14 21:00:10 -0400)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-dm.git tags/dm-pull-15oct19

for you to fetch changes up to d11ef4d54cab0e740efbceb9c6b5697a41770eea:

  sandbox: fix build error due to missing struct udevice definition
(2019-10-15 08:40:03 -0600)


binman enhancements:
- Dropping some test Elf files and building them from source instead
- Refactoring of x86 16-bit entries
- Support for SPL symbols within sections
- Handle the 'notes' sections and hidden symbols in recent binutils
- Improved error reporting with a tool fails

libfdt and documentation fixes
vboot required-key test
driver model power-domain controls
patman Message-Id enhancement


AKASHI Takahiro (2):
  sandbox: fix cpu property in test.dts for pytest
  sandbox: fix build error due to missing struct udevice definition

Anatolij Gustschin (1):
  dm: core: device: switch off power domain after device removal

Daniele Alessandrelli (1):
  rsa: Return immediately if required-key verification fails

Douglas Anderson (1):
  patman: Use the Change-Id, version, and prefix in the Message-Id

Giulio Benetti (1):
  libfdt: fix typo on comment

Jean-Jacques Hiblot (1):
  dm: device: Fix typo in the non-DEVRES version of devm_kmalloc_array()

Kayla Theil (1):
  tpm2: Don't assume active low reset value

Lokesh Vutla (3):
  dm: core: Allow for not controlling the power-domain by DM framework
  remoteproc: k3_arm64: Enable DM_FLAG_DEFAULT_PD_CTRL_OFF
  power: domain: Introduce dev_power_domain_off

Matthias Brugger (4):
  libfdt: fdt_address_cells() and fdt_size_cells()
  libfdt: return correct value if #size-cells property is not present
  libfdt: Allow #size-cells of 0
  dm: Fix default address cells return value

Michael Trimarchi (1):
  dm: pinctrl: Skip not associated gpio phandle and rise a warning message

Patrick Delaunay (3):
  dm: pinctrl: introduce PINCONF_RECURSIVE option
  dm: pinctrl: introduce PINCONF_RECURSIVE option
  dm: Tidy up dump output when there are many devices

Peng Fan (2):
  power: domain: add dev_power_domain_on
  core: device: use dev_power_domain_on

Philippe Reynes (4):
  pytest: vboot: add a test for required key
  sandbox: enable command aes
  sandbox64: enable command aes
  cmd: aes: use map_sysmem when accessing memory

Ralph Siemsen (1):
  doc: add full path to patman README

Simon Glass (33):
  patman: Drop binary parameter
  patman: Update command.Run() to handle failure better
  binman: Use cls instead of self for class methods
  binman: Allow use of help and entry-docs without libfdt
  binman: Drop .note section from ELF
  binman: Handle hidden symbols in ELF files
  binman: Correct use of 'replace' in IFWI tests
  binman: Add support for an x86 'reset' section
  binman: x86: Separate out 16-bit reset and init code
  binman: Add support for Intel FIT
  binman: Fix IFWI output when using an Intel FIT image
  binman: Use tools.Run() to run objdump
  binman: Use the Makefile to build ELF test files
  binman: Use the Makefile for u_boot_ucode_ptr
  binman: Use the Makefile for u_boot_no_ucode_ptr
  binman: Use the Makefile for u_boot_binman_syms
  binman: Use the Makefile for u_boot_binman_syms_size
  binman: Use the Makefile for u_boot_binman_syms_bad
  binman: Clean up unnecessary code related to ELF test files
  binman: Allow symbols to be resolved inside sections
  binman: Use underscore in test filenames
  binman: Rename some two-digit test files
  binman: Avoid needing the section size in advance
  binman: Increase size of TPL and SPL test data
  binman: Allow support for writing a size symbol to binaries
  binman: Add support for Intel FSP meminit
  binman: Fix entry comment for Intel descriptor
  binman: Update IFWI entry to read entries outside constructor
  binman: Update IFWI entry to support updates
  binman: Support writing symbols into entries within an IFWI
  binman: Write symbol info before image inclusion
  binman: Add logging for the number of pack passes
  binman: Drop comment-out code in testUpdateFdtOutput()

Thomas Fitzsimmons (2):
  dm: device: Request next sequence number
  dm: spi: Do not assume first SPI bus

 Makefile
 |  10 +-
 arch/sandbox/dts/test.dts
 |  24 ++--
 arch/sandbox/include/asm/u-boot-sandbox.h
 |   2 +
 arch/x86/dts/u-boot.dtsi
 |   9 ++
 cmd/aes.c
 |  14 ++-
 configs/sandbox

Re: [U-Boot] [PATCHv3 3/3] travis: Split and rename xilinx ARM in to two jobs

[Michal Simek]

On 15. 10. 19 15:53, Tom Rini wrote:
> Split the ARMv7 and AArch64 platforms into separate jobs, to avoid them
> taking too long to build overall.  Also rename them from "Xilinx" to
> "Zynq*" to reflect slightly better what is being built and to pull in a
> few more board matches.
> 
> Cc: Michal Simek 
> Signed-off-by: Tom Rini 
> ---
>  .travis.yml | 11 +++
>  1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/.travis.yml b/.travis.yml
> index ced44deb1b69..b0ef0545f11a 100644
> --- a/.travis.yml
> +++ b/.travis.yml
> @@ -248,7 +248,7 @@ matrix:
>  - BUILDMAN="sun50i"
>  - name: "buildman catch-all ARM"
>env:
> -- BUILDMAN="arm -x 
> arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,k3,xilinx"
> +- BUILDMAN="arm -x 
> arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,k3,zynq"
>  - name: "buildman sandbox x86"
>env:
>  - BUILDMAN="sandbox x86"
> @@ -322,7 +322,7 @@ matrix:
>  - BUILDMAN="uniphier"
>  - name: "buildman catch-all AArch64"
>env:
> -- BUILDMAN="aarch64 -x 
> bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,xilinx"
> +- BUILDMAN="aarch64 -x 
> bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,versal,zynq"
>  - name: "buildman rockchip"
>env:
>  - BUILDMAN="rockchip"
> @@ -330,9 +330,12 @@ matrix:
>env:
>  - BUILDMAN="sh -x arm"
>TOOLCHAIN="sh"
> -- name: "buildman Xilinx (ARM)"
> +- name: "buildman Zynq* (ARMv7)"
>env:
> -- BUILDMAN="xilinx -x microblaze"
> +- BUILDMAN="zynq&armv7"
> +- name: "buildman ZynqMP and Versal"
> +  env:
> +- BUILDMAN="versal|zynqmp&aarch64"
>  - name: "buildman xtensa"
>env:
>  - BUILDMAN="xtensa"
> 

Looks good.

Reviewed-by: Michal Simek 

Thanks,
Michal

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Re: [U-Boot] [PATCH 3/3] board: tbs2910: Convert eth to driver model

[Soeren Moch]

On 14.10.19 14:40, sba...@denx.de wrote:
>> So we can remove lots of legacy config code.
>> Signed-off-by: Soeren Moch 
> Applied to u-boot-imx, master, thanks !
>
Thanks, Stefano.

The build system still complaints about missing DM_VIDEO conversion for
this board. Are there any examples available, where i.MX6Q boards with
HDMI output are converted to DM_VIDEO?

Thanks,
Soeren
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Re: [U-Boot] [PATCH 26/34] binman: Correct symbol calculation with non-zero image base

[Simon Glass]

Hi Stephen,

On Mon, 14 Oct 2019 at 09:49, Stephen Warren  wrote:
>
> On 9/26/19 6:38 PM, s...@google.com wrote:
> > At present binman adds the image base address to the symbol value before
> > it writes it to the binary. This is not correct since the symbol value
> > itself (e.g. image position) has no relationship to the image base.
> >
> > Fix this and update the tests to cover this case.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >   tools/binman/elf.py  | 4 +---
> >   tools/binman/test/u_boot_binman_syms.lds | 2 +-
> >   2 files changed, 2 insertions(+), 4 deletions(-)
> >
> > Applied to u-boot-dm, thanks!
>
> This seems to have only just been pushed. This patch breaks boot on
> Jetson TK1; u-boot-dm.git master hangs in SPL or before the main U-Boot
> prints anything, whereas after reverting this patch solves the issue.
>
> With this patch applied, all I get is:
>
> U-Boot SPL 2019.10-00490-g4f035abcde98 (Oct 14 2019 - 09:48:30 -0600)
> Trying to boot from RAM

Yes, just pushed as I had to wait for u-boot-dm/testing to pass, and
it has some flaky runs and then I went on holiday.

This is unfortunate. It looks like we were missing test coverage. I'll
see if I can look at it later in the week, but for now I think I might
drop this patch.

Regards,
Simon
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