Re: [PATCH v4 02/31] lib: Add a function to convert a string to upper case
Am April 8, 2020 2:20:47 PM UTC schrieb Simon Glass :
>Hi Heinrich,
>
>On Tue, 7 Apr 2020 at 22:41, Heinrich Schuchardt
>wrote:
>>
>> Am April 8, 2020 4:18:12 AM UTC schrieb Heinrich Schuchardt
>:
>> >Am April 8, 2020 3:00:38 AM UTC schrieb Simon Glass
>:
>> >>Add a helper function for this operation. Update the strtoul()
>tests
>> >to
>> >>check upper case as well.
>> >>
>> >>Update FAT writing to use this new function.
>> >>
>> >>Signed-off-by: Simon Glass
>> >>---
>> >>
>> >>Changes in v4:
>> >>- Add a new patch to convert a string to upper case
>> >>
>> >>Changes in v3: None
>> >>Changes in v2: None
>> >>
>> >> fs/fat/fat_write.c | 13 ++---
>> >> include/vsprintf.h | 12
>> >> lib/strto.c| 8 +
>> >> test/str_ut.c | 73
>> >++
>> >> 4 files changed, 77 insertions(+), 29 deletions(-)
>> >>
>> >>diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
>> >>index 4f96699e363..472c206f64c 100644
>> >>--- a/fs/fat/fat_write.c
>> >>+++ b/fs/fat/fat_write.c
>> >>@@ -10,6 +10,7 @@
>> >> #include
>> >> #include
>> >> #include
>> >>+#include
>> >> #include
>> >> #include
>> >> #include
>> >>@@ -17,16 +18,6 @@
>> >> #include
>> >> #include "fat.c"
>> >>
>> >>-static void uppercase(char *str, int len)
>> >>-{
>> >>- int i;
>> >>-
>> >>- for (i = 0; i < len; i++) {
>> >>- *str = toupper(*str);
>> >>- str++;
>> >>- }
>> >>-}
>>
>> We should not use toupper() here. We have to consider the FAT charset
>defined by CONFIG_FAT_DEFAULT_CODEPAGE.
>
>It seems to match the existing code. Is there a pending patch
>somewhere for changing it?
This is an open TODO. We have capitalization.h which contains the relevant
codepoints, e.g. in CP437_CAPITALIZATION_TABLE.
Best regards
Heinrich
>
>Regards,
>Simon
Re: [RFC PATCH] powerpc, qe: add DTS support for parallel I/O ports
Hello Priyanka, Am 18.02.2020 um 10:05 schrieb Heiko Schocher: add DM support for parallel I/O ports on QUICC Engine Block Signed-off-by: Heiko Schocher --- Travis build: https://travis-ci.org/hsdenx/u-boot-test/builds/651400509 Open questions / discussion: - may we should move this part to drivers/pinctrl ? - I let the old none DM based implementation in code so boards should work with old implementation. This should be removed if all boards are converted to DM/DTS. - Unfortunately linux DTS does not use "pinctrl-" properties, instead "pio-handle" properties. Even worser old U-Boot code initializes all pins defined in "const qe_iop_conf_t qe_iop_conf_tab[]" table in board code. As linux does the same I decided to also scan through all subnodes containing "pio-map" property and initialize them too. The proper solution would be to check for "pio-handle" when a device is probed. arch/powerpc/cpu/mpc83xx/cpu_init.c | 8 ++ arch/powerpc/cpu/mpc83xx/qe_io.c| 193 +++- include/fsl_qe.h| 3 + 3 files changed, 201 insertions(+), 3 deletions(-) Any comments? Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [RFC PATCH] net, qe: add DM support for QE UEC ethernet
Hello Priyanka, Am 18.02.2020 um 10:05 schrieb Heiko Schocher: add DM/DTS suppor for the UEC ethernet on QUICC Engine Block. Signed-off-by: Heiko Schocher --- Travis build: https://travis-ci.org/hsdenx/u-boot-test/builds/651400509 - I let the old none DM based implementation in code so boards should work with old implementation. This Code should be removed if all boards are converted to DM/DTS. - add the DM based qe uec driver under drivers/net/qe - Therefore copied the files uccf.c uccf.h uec.h from drivers/qe. So there are a lot of Codingstyle problems currently. I fix them in next version if this RFC patch is OK or it needs some changes. - The dm based driver code is now under drivers/net/qe/dm_qe_uec.c Used a lot of functions from drivers/qe/uec.c - seperated the PHY specific code into seperate file drivers/net/qe/dm_qe_uec_phy.c drivers/net/Kconfig|2 + drivers/net/Makefile |1 + drivers/net/qe/Kconfig |9 + drivers/net/qe/Makefile|5 + drivers/net/qe/dm_qe_uec.c | 1161 drivers/net/qe/dm_qe_uec.h | 22 + drivers/net/qe/dm_qe_uec_phy.c | 161 + drivers/net/qe/uccf.c | 388 +++ drivers/net/qe/uccf.h | 117 drivers/net/qe/uec.h | 742 drivers/qe/uccf.c |2 + drivers/qe/uec.c |2 + drivers/qe/uec_phy.c |3 + 13 files changed, 2615 insertions(+) create mode 100644 drivers/net/qe/Kconfig create mode 100644 drivers/net/qe/Makefile create mode 100644 drivers/net/qe/dm_qe_uec.c create mode 100644 drivers/net/qe/dm_qe_uec.h create mode 100644 drivers/net/qe/dm_qe_uec_phy.c create mode 100644 drivers/net/qe/uccf.c create mode 100644 drivers/net/qe/uccf.h create mode 100644 drivers/net/qe/uec.h Any comments? Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH] bdinfo: Show information about fdt blob via bdinfo
Hello Tom, Am 19.02.2020 um 06:19 schrieb Heiko Schocher: PowerPC target supports OF booting, so print the fdt address and size in bdinfo. Signed-off-by: Heiko Schocher --- Travis build: https://travis-ci.org/hsdenx/u-boot-test/builds/651885430 cmd/bdinfo.c | 3 +++ 1 file changed, 3 insertions(+) Any issues with this patch, or do you plan to apply it after release? Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH] mpc83xx, abb: remove suvd3 board
Hello Mario, Am 18.02.2020 um 18:03 schrieb Heiko Schocher: the mpc83xxx suvd3 variant is not longer used, so remove it. Signed-off-by: Holger Brunck Signed-off-by: Heiko Schocher --- Travis build: https://travis-ci.org/hsdenx/u-boot-test/builds/651885101 arch/powerpc/cpu/mpc83xx/Kconfig | 4 - board/keymile/km83xx/Kconfig | 19 board/keymile/km83xx/MAINTAINERS | 2 - board/keymile/km83xx/km83xx.c| 32 -- configs/suvd3_defconfig | 184 --- include/configs/suvd3.h | 34 -- scripts/config_whitelist.txt | 1 - 7 files changed, 276 deletions(-) delete mode 100644 configs/suvd3_defconfig delete mode 100644 include/configs/suvd3.h Any issues with this patch, or do you plan to apply it after release? Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [RFC PATCH v2 04/13] i2c: add nexell driver
Hello Stefan,
Am 08.04.2020 um 19:57 schrieb Stefan B.:
Hi Heiko,
I assume that patchwork does get the patch-series automatically when I send it to
u-boot@lists.denx.de, or am I wrong? Perhaps it is in some pipeline?
normally, yes, patchwork gets the patch automatically...
At least the patch-series appeared in U-Boot Digest ("[RFC PATCH v2 04/13] i2c: add nexell driver"
is in Vol 142, Issue 58).
bye,
Heiko
Regards
Stefan
Am 08.04.20 um 06:08 schrieb Heiko Schocher:
Hello Stefan,
Am 28.03.2020 um 10:43 schrieb Stefan Bosch:
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- i2c/nx_i2c.c: Some adaptions mainly because of changes in
"struct udevice".
- several Bugfixes in nx_i2c.c.
- the driver has been for s5p6818 only. Code extended appropriately
in order s5p4418 is also working.
- "probe_chip" added.
Signed-off-by: Stefan Bosch
---
Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
into separate commits for gpio, i2c, mmc, pwm.
- several Bugfixes in nx_i2c.c.
- the i2c-driver has been for s5p6818 only. Code extended approriately
in order s5p4418 is also working.
- "probe_chip" added to the i2c-driver.
- doc/device-tree-bindings/i2c/nx_i2c.txt added.
doc/device-tree-bindings/i2c/nx_i2c.txt | 28 ++
drivers/i2c/Kconfig | 9 +
drivers/i2c/Makefile | 1 +
drivers/i2c/nx_i2c.c | 649
4 files changed, 687 insertions(+)
create mode 100644 doc/device-tree-bindings/i2c/nx_i2c.txt
create mode 100644 drivers/i2c/nx_i2c.c
I do not find this patch in patchwork ...
Thanks for splitting the big patch into several patches.
Reviewed-by: Heiko Schocher
bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH v3 1/1] drivers: usb: host: Add BRCM xHCI driver
On Wed, Apr 8, 2020 at 7:16 PM Marek Vasut wrote:
>
> On 4/8/20 7:48 AM, Rayagonda Kokatanur wrote:
> > On Wed, Apr 8, 2020 at 9:56 AM Marek Vasut wrote:
> >>
> >> On 4/8/20 5:35 AM, Rayagonda Kokatanur wrote:
> >> [...]
> >>> +struct brcm_xhci_platdata {
> >>> + unsigned int arcache;
> >>> + unsigned int awcache;
> >>> + uintptr_t hc_base;
> >>
> >> This could be struct xhci_hccr * instead , and then you can remove the
> >> cast ...
> >
> > If we make it struct xhci_hccr * then I think we need to type cast in
> > readl and writel function.
> > Please let me know ?
>
> Ah yes, that's right, then I think you want void __iomem * ?
Done, declared as void __iomem * , thank you.
[PATCH v4 1/1] drivers: usb: host: Add BRCM xHCI driver
Base driver for Broadcom xHCI controllers
Signed-off-by: Bharat Kumar Reddy Gooty
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Vladimir Olovyannikov
---
Changes from v3:
-Address review comments from Marek Vasut,
Declare hc_base as void __iomem * instead of uintptr_t.
Changes from v2:
-Address review comments from Marek Vasut,
Cache hc_base in private data instead of always reading it from DT,
Follow reverse xmas tree for variable declaration.
Changes from v1:
-Address review comments from Marek Vasut,
Use comman macro name for read and write register,
Rename the macro names.
drivers/usb/host/Kconfig | 8 +++
drivers/usb/host/Makefile| 1 +
drivers/usb/host/xhci-brcm.c | 98
3 files changed, 107 insertions(+)
create mode 100644 drivers/usb/host/xhci-brcm.c
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0987ff25b1..94ac969058 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -88,6 +88,14 @@ config USB_XHCI_FSL
depends on !SPL_NO_USB
help
Enables support for the on-chip xHCI controller on NXP Layerscape
SoCs.
+
+config USB_XHCI_BRCM
+ bool "Broadcom USB3 Host XHCI controller"
+ depends on DM_USB
+ help
+ USB controller based on the Broadcom USB3 IP Core.
+ Supports USB2/3 functionality.
+
endif # USB_XHCI_HCD
config USB_EHCI_HCD
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 7feeff679c..b62f346094 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
# xhci
+obj-$(CONFIG_USB_XHCI_BRCM) += xhci-brcm.o
obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c
new file mode 100644
index 00..ee65f51c5d
--- /dev/null
+++ b/drivers/usb/host/xhci-brcm.c
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Broadcom.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRD2U3H_XHC_REGS_AXIWRA0xC08
+#define DRD2U3H_XHC_REGS_AXIRDA0xC0C
+
+#define USBAXI_CACHE 0xF
+#define USBAXI_PROT0x8
+#define USBAXI_SA_MASK 0x1FF
+#define USBAXI_UA_MASK (0x1FF << 16)
+#define USBAXI_SA_VAL ((USBAXI_CACHE << 4) | USBAXI_PROT)
+#define USBAXI_UA_VAL (USBAXI_SA_VAL << 16)
+#define USBAXI_SA_UA_MASK (USBAXI_UA_MASK | USBAXI_SA_MASK)
+#define USBAXI_SA_UA_VAL (USBAXI_UA_VAL | USBAXI_SA_VAL)
+
+struct brcm_xhci_platdata {
+ unsigned int arcache;
+ unsigned int awcache;
+ void __iomem *hc_base;
+};
+
+static int xhci_brcm_probe(struct udevice *dev)
+{
+ struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
+ struct xhci_hcor *hcor;
+ struct xhci_hccr *hcd;
+ int len, ret = 0;
+
+ if (!plat) {
+ dev_err(dev, "Can't get xHCI Plat data\n");
+ return -ENOMEM;
+ }
+
+ hcd = dev_read_addr_ptr(dev);
+ if (!hcd) {
+ dev_err(dev, "Can't get the xHCI register base address\n");
+ return -ENXIO;
+ }
+
+ plat->hc_base = hcd;
+ len = HC_LENGTH(xhci_readl(>cr_capbase));
+ hcor = (struct xhci_hcor *)(plat->hc_base + len);
+
+ /* Save the default values of AXI read and write attributes */
+ plat->awcache = readl(plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA);
+ plat->arcache = readl(plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA);
+
+ /* Enable AXI write attributes */
+ clrsetbits_le32(plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA,
+ USBAXI_SA_UA_MASK, USBAXI_SA_UA_VAL);
+
+ /* Enable AXI read attributes */
+ clrsetbits_le32(plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA,
+ USBAXI_SA_UA_MASK, USBAXI_SA_UA_VAL);
+
+ ret = xhci_register(dev, hcd, hcor);
+ if (ret)
+ dev_err(dev, "Failed to register xHCI\n");
+
+ return ret;
+}
+
+static int xhci_brcm_deregister(struct udevice *dev)
+{
+ struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
+
+ /* Restore the default values for AXI read and write attributes */
+ writel(plat->awcache, plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA);
+ writel(plat->arcache, plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA);
+
+ return xhci_deregister(dev);
+}
+
+static const struct udevice_id xhci_brcm_ids[] = {
+ { .compatible = "brcm,generic-xhci" },
+ { }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+ .name = "xhci_brcm",
+ .id = UCLASS_USB,
+ .probe = xhci_brcm_probe,
+ .remove =
Re: [PATCH v4 00/31] dm: Add programmatic generation of ACPI tables (part A)
Hi Andy, On Wed, 8 Apr 2020 at 11:02, Andy Shevchenko wrote: > > On Tue, Apr 07, 2020 at 09:00:36PM -0600, Simon Glass wrote: > > This is split from the original series in an attempt to get things applied > > in chunks. > > > > The first 20 or so patches here have been reviewed and the changes here > > incorporate those comments. > > You sent patches without settlement on the previous version, so, this has same > problems. I think I did the best I could based on the feedback I got. If something needs to be changed let's talk about it on the individual patches. Regards, Simon
Re: [PATCH v4 00/31] dm: Add programmatic generation of ACPI tables (part A)
On Tue, Apr 07, 2020 at 09:00:36PM -0600, Simon Glass wrote: > This is split from the original series in an attempt to get things applied > in chunks. > > The first 20 or so patches here have been reviewed and the changes here > incorporate those comments. You sent patches without settlement on the previous version, so, this has same problems. > Changes in v4: > - Add a new patch with some string tests > - Add a new patch to convert a string to upper case > - Fix indentation of unused > - Calculate the padding > - Put 'interrupts-extended' property on one line > - Rename acpi-probed to linux,probed > - Note that linux,probed is an out-of-tree feature > - Move ACPI makefile line outside the ifdef CONFIG_SPL_BUILD > - Add a comment about the MADT table version > - Add SPCR > - Update comment to include tables defined or reserved by ACPI > - Separate out the log newline > - Update comment in acpi_inc_align() to show the alignment > - Put back cast on table_compute_checksum() > - Rename list_fact() to list_fadt() > - Add a comment to dump_hdr() > > Changes in v3: > Drop acpi,name in example > - Fix indenting error mentioned by Andy Shevchenko > - Fix stray #endif > - Drop 'Intel' from 'Intel ACPI' > - Reword commit message to drop the bit about ACPI being complicated > - Compute ACPI_NAME_MAX from ACPI_NAME_LEN > - Rename acpi_return_name() to acpi_copy_name() > - Use strncpy() instead of strcpy() in acpi_copy_name() > - Split out hid-over-i2c into its own patch > - Drop mention of PRIC > - Rename acpi,desc to acpi,ddn > - Correct description of acpi,probed > - Drop hid-descr-addr > - Just add the device.txt binding file in this patch > - Change the example to ELAN > - Add a pointer to information about acpi,compatible > - Add new patch to move acpi_s3.h to include/acpi/ > - Update commit message to say that we move most of its contents > - Move acpi_table.h to include/acpi > - Add forward declarations for the functions > - Fix file comment for acpi_table.c > - Fix a few typos > - Make use of BIT() > - Fix DMA_ typo > - Add missing error check in acpi_create_dmar() > - Drop duplicate assert > - Drop ASL_REVISION > - Add new patch to add hexdump.h to the unit test header > - Rename acpi_align_large() to acpi_align64() > - Fix 'RSDP' typo > - Fix 'XDST' typo > - Move acpi_align_large() out of dm_test_acpi_setup_base_tables() > - Beef up the comment explaining how the unaligned address is used > > Changes in v2: > - Don't bracket the definitions with DM_SPI > - Add trailing commas to enum > - Drop the other comment change since it is already applied > - Drop the Chrome OS pieces > - Rename the 'coreboot' console to 'U-Boot' > - Move LOGC_ACPI definition to this patch > - Fix definition of HID > - Infer hid-over-i2c CID value > - Add the hid-over-i2c binding document > - Add in the acpi_table.h header file to this patch > - Move the sandbox acpi_table.h header file to an earlier patch > - Use #defines for MADT and MCFG version numbers > - Drop two unnecessary __packed > - Move __packed to after struct > - Drop definition of ACPI_TABLE_CREATOR > - Make _acpi_write_dev_tables() static and switch argument order > - Generalise the ACPI function recursion with acpi_recurse_method() > > Simon Glass (31): > test: Add the beginnings of some string tests > lib: Add a function to convert a string to upper case > cpu: Support querying the address width > spi: Add SPI mode enums > tpm: cr50: Release locality on exit > tpm: cr50: Add a comment for cr50_priv > tpm: cr50: Use the correct GPIO binding > tpm: Don't cleanup unless an error happens > dm: pci: Allow disabling auto-config for a device > x86: Correct wording of coreboot source code > x86: apl: Move p2sb ofdata reading to the correct method > pci: Adjust dm_pci_read_bar32() to return errors correctly > x86: apl: Add Global NVS table header > dm: core: Add basic ACPI support > dts: Add a binding for hid-over-i2c > acpi: Add a binding for ACPI settings in the device tree > acpi: Add a simple sandbox test > x86: Move acpi_s3.h to include/acpi/ > x86: Move acpi_table header to main include/ directory > acpi: Add an __ACPI__ preprocessor symbol > acpi: Add a central location for table version numbers > acpi: Add support for DMAR > test: Add hexdump.h to the unit test header > acpi: Add a method to write tables for a device > acpi: Convert part of acpi_table to use acpi_ctx > x86: Allow devices to write ACPI tables > acpi: Drop code for missing XSDT from acpi_write_rsdp() > acpi: Move acpi_add_table() to generic code > acpi: Put table-setup code in its own function > acpi: Move the xsdt pointer to acpi_ctx > acpi: Add an acpi command > > arch/sandbox/dts/test.dts | 8 + > arch/sandbox/include/asm/acpi_table.h | 9 + > arch/sandbox/include/asm/global_data.h| 1 + > arch/x86/cpu/apollolake/cpu_spl.c | 2 +- > arch/x86/cpu/apollolake/fsp_s.c
[PATCH] Series-to: u-boot Cover-letter: Fix Typo error in Makefile
This patch fixes the typo error in Makefile where -I$(srctree)/arch/$(ARCH)/thumb1/include is not picked up in the compiler flag when compiling for thumb2. END Signed-off-by: Sicris --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 8de5ff6d94..503b30392d 100644 --- a/Makefile +++ b/Makefile @@ -704,7 +704,7 @@ UBOOTINCLUDE:= \ -Iinclude \ $(if $(KBUILD_SRC), -I$(srctree)/include) \ $(if $(CONFIG_$(SPL_)SYS_THUMB_BUILD), \ - $(if $(CONFIG_HAS_THUMB2),, \ + $(if $(CONFIG_HAS_THUMB2), \ -I$(srctree)/arch/$(ARCH)/thumb1/include),) \ -I$(srctree)/arch/$(ARCH)/include \ -include $(srctree)/include/linux/kconfig.h -- 2.17.1
[PATCH 1/1] net: fm: fix build error when not using nand
If CONFIG_CMD_NAND is disabled, get_nand_dev_by_index() is not
accessible.
This fix allows the build to succeed in this case.
Signed-off-by: Francois Gervais
---
drivers/net/fm/fm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 926cf81a07..7a081b9d03 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -360,6 +360,7 @@ int fm_init_common(int index, struct ccsr_fman *reg)
if (src == BOOT_SOURCE_IFC_NOR) {
addr = (void *)(CONFIG_SYS_FMAN_FW_ADDR +
CONFIG_SYS_FSL_IFC_BASE);
+#ifdef CONFIG_CMD_NAND
} else if (src == BOOT_SOURCE_IFC_NAND) {
size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
@@ -372,6 +373,7 @@ int fm_init_common(int index, struct ccsr_fman *reg)
printf("NAND read of FMAN firmware at offset 0x%x
failed %d\n",
CONFIG_SYS_FMAN_FW_ADDR, rc);
}
+#endif
} else if (src == BOOT_SOURCE_QSPI_NOR) {
struct spi_flash *ucode_flash;
--
2.17.1
[PATCH v5 26/29] acpi: Move acpi_add_table() to generic code
Move this code to a generic location so that we can test it with sandbox.
This requires adding a few new fields to acpi_ctx, so drop the local
variables used in the original code.
Also use mapmem to avoid pointer-to-address casts which don't work on
sandbox.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix 'RSDP' typo
Changes in v2: None
arch/x86/lib/acpi_table.c | 83 +--
include/acpi/acpi_table.h | 9 +
include/dm/acpi.h | 5 +++
lib/acpi/acpi_table.c | 61
test/dm/acpi.c| 4 ++
5 files changed, 89 insertions(+), 73 deletions(-)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index e8f0bb18fc5..d4af56eabf4 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -83,67 +83,6 @@ static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
sizeof(struct acpi_xsdt));
}
-/**
- * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
- * and checksum.
- */
-static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
-{
- int i, entries_num;
- struct acpi_rsdt *rsdt;
- struct acpi_xsdt *xsdt;
-
- /* The RSDT is mandatory while the XSDT is not */
- rsdt = (struct acpi_rsdt *)rsdp->rsdt_address;
-
- /* This should always be MAX_ACPI_TABLES */
- entries_num = ARRAY_SIZE(rsdt->entry);
-
- for (i = 0; i < entries_num; i++) {
- if (rsdt->entry[i] == 0)
- break;
- }
-
- if (i >= entries_num) {
- debug("ACPI: Error: too many tables\n");
- return;
- }
-
- /* Add table to the RSDT */
- rsdt->entry[i] = (u32)table;
-
- /* Fix RSDT length or the kernel will assume invalid entries */
- rsdt->header.length = sizeof(struct acpi_table_header) +
- sizeof(u32) * (i + 1);
-
- /* Re-calculate checksum */
- rsdt->header.checksum = 0;
- rsdt->header.checksum = table_compute_checksum((u8 *)rsdt,
- rsdt->header.length);
-
- /* The RSDT is mandatory while the XSDT is not */
- if (!rsdp->xsdt_address)
- return;
-
- /*
-* And now the same thing for the XSDT. We use the same index as for
-* now we want the XSDT and RSDT to always be in sync in U-Boot
-*/
- xsdt = (struct acpi_xsdt *)((u32)rsdp->xsdt_address);
-
- /* Add table to the XSDT */
- xsdt->entry[i] = (u64)(u32)table;
-
- /* Fix XSDT length */
- xsdt->header.length = sizeof(struct acpi_table_header) +
- sizeof(u64) * (i + 1);
-
- /* Re-calculate checksum */
- xsdt->header.checksum = 0;
- xsdt->header.checksum = table_compute_checksum((u8 *)xsdt,
- xsdt->header.length);
-}
-
static void acpi_create_facs(struct acpi_facs *facs)
{
memset((void *)facs, 0, sizeof(struct acpi_facs));
@@ -463,8 +402,6 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
ulong write_acpi_tables(ulong start_addr)
{
struct acpi_ctx sctx, *ctx =
- struct acpi_rsdp *rsdp;
- struct acpi_rsdt *rsdt;
struct acpi_xsdt *xsdt;
struct acpi_facs *facs;
struct acpi_table_header *dsdt;
@@ -486,9 +423,9 @@ ulong write_acpi_tables(ulong start_addr)
debug("ACPI: Writing ACPI tables at %lx\n", start_addr);
/* We need at least an RSDP and an RSDT Table */
- rsdp = ctx->current;
+ ctx->rsdp = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_rsdp));
- rsdt = ctx->current;
+ ctx->rsdt = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_rsdt));
xsdt = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_xsdt));
@@ -501,8 +438,8 @@ ulong write_acpi_tables(ulong start_addr)
/* clear all table memory */
memset((void *)start, 0, ctx->current - start);
- acpi_write_rsdp(rsdp, rsdt, xsdt);
- acpi_write_rsdt(rsdt);
+ acpi_write_rsdp(ctx->rsdp, ctx->rsdt, xsdt);
+ acpi_write_rsdt(ctx->rsdt);
acpi_write_xsdt(xsdt);
debug("ACPI:* FACS\n");
@@ -544,38 +481,38 @@ ulong write_acpi_tables(ulong start_addr)
fadt = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_fadt));
acpi_create_fadt(fadt, facs, dsdt);
- acpi_add_table(rsdp, fadt);
+ acpi_add_table(ctx, fadt);
debug("ACPI:* MADT\n");
madt = ctx->current;
acpi_create_madt(madt);
acpi_inc_align(ctx, madt->header.length);
- acpi_add_table(rsdp, madt);
+ acpi_add_table(ctx, madt);
debug("ACPI:* MCFG\n");
mcfg = ctx->current;
acpi_create_mcfg(mcfg);
acpi_inc_align(ctx, mcfg->header.length);
- acpi_add_table(rsdp, mcfg);
+
[PATCH v5 27/29] acpi: Put table-setup code in its own function
We always write three basic tables to ACPI at the start. Move this into
its own function, along with acpi_fill_header(), so we can write a test
for this code.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4:
- Put back cast on table_compute_checksum()
Changes in v3:
- Fix 'XDST' typo
- Move acpi_align_large() out of dm_test_acpi_setup_base_tables()
- Beef up the comment explaining how the unaligned address is used
Changes in v2: None
arch/x86/lib/acpi_table.c | 72 +---
include/acpi/acpi_table.h | 10 +
lib/acpi/acpi_table.c | 77 +++
test/dm/acpi.c| 58 -
4 files changed, 144 insertions(+), 73 deletions(-)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index d4af56eabf4..4a7b0739394 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -31,58 +31,6 @@ extern const unsigned char AmlCode[];
/* ACPI RSDP address to be used in boot parameters */
static ulong acpi_rsdp_addr;
-static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
- struct acpi_xsdt *xsdt)
-{
- memset(rsdp, 0, sizeof(struct acpi_rsdp));
-
- memcpy(rsdp->signature, RSDP_SIG, 8);
- memcpy(rsdp->oem_id, OEM_ID, 6);
-
- rsdp->length = sizeof(struct acpi_rsdp);
- rsdp->rsdt_address = (u32)rsdt;
-
- rsdp->xsdt_address = (u64)(u32)xsdt;
- rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
-
- /* Calculate checksums */
- rsdp->checksum = table_compute_checksum((void *)rsdp, 20);
- rsdp->ext_checksum = table_compute_checksum((void *)rsdp,
- sizeof(struct acpi_rsdp));
-}
-
-static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
-{
- struct acpi_table_header *header = &(rsdt->header);
-
- /* Fill out header fields */
- acpi_fill_header(header, "RSDT");
- header->length = sizeof(struct acpi_rsdt);
- header->revision = 1;
-
- /* Entries are filled in later, we come with an empty set */
-
- /* Fix checksum */
- header->checksum = table_compute_checksum((void *)rsdt,
- sizeof(struct acpi_rsdt));
-}
-
-static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
-{
- struct acpi_table_header *header = &(xsdt->header);
-
- /* Fill out header fields */
- acpi_fill_header(header, "XSDT");
- header->length = sizeof(struct acpi_xsdt);
- header->revision = 1;
-
- /* Entries are filled in later, we come with an empty set */
-
- /* Fix checksum */
- header->checksum = table_compute_checksum((void *)xsdt,
- sizeof(struct acpi_xsdt));
-}
-
static void acpi_create_facs(struct acpi_facs *facs)
{
memset((void *)facs, 0, sizeof(struct acpi_facs));
@@ -402,7 +350,6 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
ulong write_acpi_tables(ulong start_addr)
{
struct acpi_ctx sctx, *ctx =
- struct acpi_xsdt *xsdt;
struct acpi_facs *facs;
struct acpi_table_header *dsdt;
struct acpi_fadt *fadt;
@@ -415,33 +362,16 @@ ulong write_acpi_tables(ulong start_addr)
int i;
start = map_sysmem(start_addr, 0);
- ctx->current = start;
-
- /* Align ACPI tables to 16 byte */
- acpi_align(ctx);
debug("ACPI: Writing ACPI tables at %lx\n", start_addr);
- /* We need at least an RSDP and an RSDT Table */
- ctx->rsdp = ctx->current;
- acpi_inc_align(ctx, sizeof(struct acpi_rsdp));
- ctx->rsdt = ctx->current;
- acpi_inc_align(ctx, sizeof(struct acpi_rsdt));
- xsdt = ctx->current;
- acpi_inc_align(ctx, sizeof(struct acpi_xsdt));
+ acpi_setup_base_tables(ctx, start);
/*
* Per ACPI spec, the FACS table address must be aligned to a 64 byte
* boundary (Windows checks this, but Linux does not).
*/
acpi_align64(ctx);
- /* clear all table memory */
- memset((void *)start, 0, ctx->current - start);
-
- acpi_write_rsdp(ctx->rsdp, ctx->rsdt, xsdt);
- acpi_write_rsdt(ctx->rsdt);
- acpi_write_xsdt(xsdt);
-
debug("ACPI:* FACS\n");
facs = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_facs));
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index 55349c0bb63..3681c5c8ed9 100644
--- a/include/acpi/acpi_table.h
+++ b/include/acpi/acpi_table.h
@@ -560,6 +560,16 @@ void acpi_inc_align(struct acpi_ctx *ctx, uint amount);
*/
int acpi_add_table(struct acpi_ctx *ctx, void *table);
+/**
+ * acpi_setup_base_tables() - Set up context along with RSDP, RSDT and XSDT
+ *
+ * Set up the context with the given start position. Some basic tables are
+ * always needed, so set them up as well.
+ *
+ * @ctx: Context to set up
+ */
+void acpi_setup_base_tables(struct acpi_ctx *ctx, void *start);
+
#endif /* !__ACPI__*/
#include
[PATCH v5 29/29] acpi: Add an acpi command
It is useful to dump ACPI tables in U-Boot to see what has been generated.
Add a command to handle this.
To allow the command to find the tables, add a position into the global
data.
Support subcommands to list and dump the tables.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4:
- Rename list_fact() to list_fadt()
- Add a comment to dump_hdr()
Changes in v3: None
Changes in v2: None
arch/sandbox/include/asm/global_data.h | 1 +
arch/x86/include/asm/global_data.h | 1 +
cmd/Kconfig| 14 ++
cmd/Makefile | 1 +
cmd/acpi.c | 186 +
lib/acpi/acpi_table.c | 1 +
test/dm/acpi.c | 73 ++
7 files changed, 277 insertions(+)
create mode 100644 cmd/acpi.c
diff --git a/arch/sandbox/include/asm/global_data.h
b/arch/sandbox/include/asm/global_data.h
index f4ce72d5660..f95ddb058a2 100644
--- a/arch/sandbox/include/asm/global_data.h
+++ b/arch/sandbox/include/asm/global_data.h
@@ -13,6 +13,7 @@
struct arch_global_data {
uint8_t *ram_buf; /* emulated RAM buffer */
void*text_base; /* pointer to base of text region */
+ ulong acpi_start; /* Start address of ACPI tables */
};
#include
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index f4c1839104e..4aee2f3e8c4 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -123,6 +123,7 @@ struct arch_global_data {
#ifdef CONFIG_FSP_VERSION2
struct fsp_header *fsp_s_hdr; /* Pointer to FSP-S header */
#endif
+ ulong acpi_start; /* Start address of ACPI tables */
};
#endif
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6403bc45a5e..2d3bfe0ab91 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -190,6 +190,20 @@ comment "Commands"
menu "Info commands"
+config CMD_ACPI
+ bool "acpi"
+ default y if ACPIGEN
+ help
+ List and dump ACPI tables. ACPI (Advanced Configuration and Power
+ Interface) is used mostly on x86 for providing information to the
+ Operating System about devices in the system. The tables are set up
+ by the firmware, typically U-Boot but possibly an earlier firmware
+ module, if U-Boot is chain-loaded from something else. ACPI tables
+ can also include code, to perform hardware-specific tasks required
+ by the Operating Systems. This allows some amount of separation
+ between the firmware and OS, and is particularly useful when you
+ want to make hardware changes without the OS needing to be adjusted.
+
config CMD_BDI
bool "bdinfo"
default y
diff --git a/cmd/Makefile b/cmd/Makefile
index f1dd513a4b4..15a9693ed0e 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -11,6 +11,7 @@ obj-y += help.o
obj-y += version.o
# command
+obj-$(CONFIG_CMD_ACPI) += acpi.o
obj-$(CONFIG_CMD_AES) += aes.o
obj-$(CONFIG_CMD_AB_SELECT) += ab_select.o
obj-$(CONFIG_CMD_ADC) += adc.o
diff --git a/cmd/acpi.c b/cmd/acpi.c
new file mode 100644
index 000..203bd93bd5d
--- /dev/null
+++ b/cmd/acpi.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Google LLC
+ * Written by Simon Glass
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * dump_hdr() - Dump an ACPI header
+ *
+ * If the header is for FACS then it shows the revision information as well
+ *
+ * @hdr: ACPI header to dump
+ */
+static void dump_hdr(struct acpi_table_header *hdr)
+{
+ bool has_hdr = memcmp(hdr->signature, "FACS", ACPI_NAME_LEN);
+
+ printf("%.*s %08lx %06x", ACPI_NAME_LEN, hdr->signature,
+ (ulong)map_to_sysmem(hdr), hdr->length);
+ if (has_hdr) {
+ printf(" (v%02d %.6s %.8s %u %.4s %d)\n", hdr->revision,
+ hdr->oem_id, hdr->oem_table_id, hdr->oem_revision,
+ hdr->aslc_id, hdr->aslc_revision);
+ } else {
+ printf("\n");
+ }
+}
+
+/**
+ * find_table() - Look up an ACPI table
+ *
+ * @sig: Signature of table (4 characters, upper case)
+ * @return pointer to table header, or NULL if not found
+ */
+struct acpi_table_header *find_table(const char *sig)
+{
+ struct acpi_rsdp *rsdp;
+ struct acpi_rsdt *rsdt;
+ int len, i, count;
+
+ rsdp = map_sysmem(gd->arch.acpi_start, 0);
+ if (!rsdp)
+ return NULL;
+ rsdt = map_sysmem(rsdp->rsdt_address, 0);
+ len = rsdt->header.length - sizeof(rsdt->header);
+ count = len / sizeof(u32);
+ for (i = 0; i < count; i++) {
+ struct acpi_table_header *hdr;
+
+ hdr = map_sysmem(rsdt->entry[i], 0);
+ if (!memcmp(hdr->signature, sig, ACPI_NAME_LEN))
+ return
[PATCH v5 28/29] acpi: Move the xsdt pointer to acpi_ctx
Put this in the context along with the other important pointers.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
include/dm/acpi.h | 2 ++
lib/acpi/acpi_table.c | 10 --
test/dm/acpi.c| 5 +
3 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/dm/acpi.h b/include/dm/acpi.h
index c6c63b81839..7563a4c60a7 100644
--- a/include/dm/acpi.h
+++ b/include/dm/acpi.h
@@ -33,11 +33,13 @@
* @rsdp: Pointer to the Root System Description Pointer, typically used when
* adding a new table. The RSDP holds pointers to the RSDT and XSDT.
* @rsdt: Pointer to the Root System Description Table
+ * @xsdt: Pointer to the Extended System Description Table
*/
struct acpi_ctx {
void *current;
struct acpi_rsdp *rsdp;
struct acpi_rsdt *rsdt;
+ struct acpi_xsdt *xsdt;
};
/**
diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
index 85193c49e45..9d2b49f8ba5 100644
--- a/lib/acpi/acpi_table.c
+++ b/lib/acpi/acpi_table.c
@@ -165,7 +165,7 @@ int acpi_add_table(struct acpi_ctx *ctx, void *table)
* And now the same thing for the XSDT. We use the same index as for
* now we want the XSDT and RSDT to always be in sync in U-Boot
*/
- xsdt = (struct acpi_xsdt *)((uintptr_t)ctx->rsdp->xsdt_address);
+ xsdt = ctx->xsdt;
/* Add table to the XSDT */
xsdt->entry[i] = map_to_sysmem(table);
@@ -236,8 +236,6 @@ static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
void acpi_setup_base_tables(struct acpi_ctx *ctx, void *start)
{
- struct acpi_xsdt *xsdt;
-
ctx->current = start;
/* Align ACPI tables to 16 byte */
@@ -248,13 +246,13 @@ void acpi_setup_base_tables(struct acpi_ctx *ctx, void
*start)
acpi_inc_align(ctx, sizeof(struct acpi_rsdp));
ctx->rsdt = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_rsdt));
- xsdt = ctx->current;
+ ctx->xsdt = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_xsdt));
/* clear all table memory */
memset((void *)start, '\0', ctx->current - start);
- acpi_write_rsdp(ctx->rsdp, ctx->rsdt, xsdt);
+ acpi_write_rsdp(ctx->rsdp, ctx->rsdt, ctx->xsdt);
acpi_write_rsdt(ctx->rsdt);
- acpi_write_xsdt(xsdt);
+ acpi_write_xsdt(ctx->xsdt);
}
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index beb1b6da737..a29c3cab3e0 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -160,6 +160,10 @@ static int dm_test_acpi_write_tables(struct
unit_test_state *uts)
ut_asserteq(map_to_sysmem(dmar + 1), ctx.rsdt->entry[1]);
ut_asserteq(0, ctx.rsdt->entry[2]);
+ ut_asserteq(map_to_sysmem(dmar), ctx.xsdt->entry[0]);
+ ut_asserteq(map_to_sysmem(dmar + 1), ctx.xsdt->entry[1]);
+ ut_asserteq(0, ctx.xsdt->entry[2]);
+
return 0;
}
DM_TEST(dm_test_acpi_write_tables, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
@@ -223,6 +227,7 @@ static int dm_test_acpi_setup_base_tables(struct
unit_test_state *uts)
ut_assertok(table_compute_checksum(rsdt, sizeof(*rsdt)));
xsdt = PTR_ALIGN((void *)rsdt + sizeof(*rsdt), 16);
+ ut_asserteq_ptr(xsdt, ctx.xsdt);
ut_assertok(memcmp("XSDT", xsdt->header.signature, ACPI_NAME_LEN));
ut_asserteq(sizeof(*xsdt), xsdt->header.length);
ut_assertok(table_compute_checksum(xsdt, sizeof(*xsdt)));
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 24/29] x86: Allow devices to write ACPI tables
Call the new core function to permit devices to write their own ACPI
tables. These tables will appear after all other tables.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/x86/lib/acpi_table.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 484cf66bf4e..99523473a17 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -581,6 +581,8 @@ ulong write_acpi_tables(ulong start_addr)
acpi_inc_align(ctx, spcr->header.length);
acpi_add_table(rsdp, spcr);
+ acpi_write_dev_tables(ctx);
+
addr = map_to_sysmem(ctx->current);
debug("current = %lx\n", addr);
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 25/29] acpi: Drop code for missing XSDT from acpi_write_rsdp()
We don't actually support tables without an XSDT so we can drop this dead
code.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/x86/lib/acpi_table.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 99523473a17..e8f0bb18fc5 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -42,19 +42,8 @@ static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct
acpi_rsdt *rsdt,
rsdp->length = sizeof(struct acpi_rsdp);
rsdp->rsdt_address = (u32)rsdt;
- /*
-* Revision: ACPI 1.0: 0, ACPI 2.0/3.0/4.0: 2
-*
-* Some OSes expect an XSDT to be present for RSD PTR revisions >= 2.
-* If we don't have an ACPI XSDT, force ACPI 1.0 (and thus RSD PTR
-* revision 0)
-*/
- if (xsdt == NULL) {
- rsdp->revision = ACPI_RSDP_REV_ACPI_1_0;
- } else {
- rsdp->xsdt_address = (u64)(u32)xsdt;
- rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
- }
+ rsdp->xsdt_address = (u64)(u32)xsdt;
+ rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
/* Calculate checksums */
rsdp->checksum = table_compute_checksum((void *)rsdp, 20);
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 22/29] acpi: Add a method to write tables for a device
A device may want to write out ACPI tables to describe itself to Linux.
Add a method to permit this.
Reviewed-by: Wolfgang Wallner
Signed-off-by: Simon Glass
---
Changes in v5:
- Drop bisectability changes
Changes in v4:
- Separate out the log newline
Changes in v3: None
Changes in v2:
- Drop definition of ACPI_TABLE_CREATOR
- Make _acpi_write_dev_tables() static and switch argument order
- Generalise the ACPI function recursion with acpi_recurse_method()
arch/sandbox/dts/test.dts | 4 +++
arch/x86/lib/acpi_table.c | 9 -
drivers/core/acpi.c | 62
include/acpi/acpi_table.h | 10 ++
include/dm/acpi.h | 30
lib/acpi/acpi_table.c | 13 +--
test/dm/acpi.c| 74 +--
7 files changed, 187 insertions(+), 15 deletions(-)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 5fa951ad4b6..1204c14b079 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -210,6 +210,10 @@
compatible = "denx,u-boot-acpi-test";
};
+ acpi-test2 {
+ compatible = "denx,u-boot-acpi-test";
+ };
+
clocks {
clk_fixed: clk-fixed {
compatible = "fixed-clock";
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 4832364f3ca..98f97208339 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -60,15 +60,6 @@ static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct
acpi_rsdt *rsdt,
sizeof(struct acpi_rsdp));
}
-void acpi_fill_header(struct acpi_table_header *header, char *signature)
-{
- memcpy(header->signature, signature, 4);
- memcpy(header->oem_id, OEM_ID, 6);
- memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
- header->oem_revision = U_BOOT_BUILD_DATE;
- memcpy(header->aslc_id, ASLC_ID, 4);
-}
-
static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
{
struct acpi_table_header *header = &(rsdt->header);
diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
index 0e64c21bf5b..8a6570c3b95 100644
--- a/drivers/core/acpi.c
+++ b/drivers/core/acpi.c
@@ -11,8 +11,17 @@
#include
#include
#include
+#include
#include
+/* Type of method to call */
+enum method_t {
+ METHOD_WRITE_TABLES,
+};
+
+/* Prototype for all methods */
+typedef int (*acpi_method)(const struct udevice *dev, struct acpi_ctx *ctx);
+
int acpi_copy_name(char *out_name, const char *name)
{
strncpy(out_name, name, ACPI_NAME_MAX);
@@ -31,3 +40,56 @@ int acpi_get_name(const struct udevice *dev, char *out_name)
return -ENOSYS;
}
+
+acpi_method acpi_get_method(struct udevice *dev, enum method_t method)
+{
+ struct acpi_ops *aops;
+
+ aops = device_get_acpi_ops(dev);
+ if (aops) {
+ switch (method) {
+ case METHOD_WRITE_TABLES:
+ return aops->write_tables;
+ }
+ }
+
+ return NULL;
+}
+
+int acpi_recurse_method(struct acpi_ctx *ctx, struct udevice *parent,
+ enum method_t method)
+{
+ struct udevice *dev;
+ acpi_method func;
+ int ret;
+
+ func = acpi_get_method(parent, method);
+ if (func) {
+ log_debug("\n");
+ log_debug("- %s %p\n", parent->name, func);
+ ret = device_ofdata_to_platdata(parent);
+ if (ret)
+ return log_msg_ret("ofdata", ret);
+ ret = func(parent, ctx);
+ if (ret)
+ return log_msg_ret("func", ret);
+ }
+ device_foreach_child(dev, parent) {
+ ret = acpi_recurse_method(ctx, dev, method);
+ if (ret)
+ return log_msg_ret("recurse", ret);
+ }
+
+ return 0;
+}
+
+int acpi_write_dev_tables(struct acpi_ctx *ctx)
+{
+ int ret;
+
+ log_debug("Writing device tables\n");
+ ret = acpi_recurse_method(ctx, dm_root(), METHOD_WRITE_TABLES);
+ log_debug("Writing finished, err=%d\n", ret);
+
+ return ret;
+}
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index 194be9aa589..a2bd929c920 100644
--- a/include/acpi/acpi_table.h
+++ b/include/acpi/acpi_table.h
@@ -505,6 +505,16 @@ int acpi_get_table_revision(enum acpi_tables table);
*/
int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags);
+/**
+ * acpi_fill_header() - Set up a new table header
+ *
+ * This sets all fields except length, revision, checksum and aslc_revision
+ *
+ * @header: ACPI header to update
+ * @signature: Table signature to use (4 characters)
+ */
+void acpi_fill_header(struct acpi_table_header *header, char *signature);
+
#endif /* !__ACPI__*/
#include
diff --git a/include/dm/acpi.h b/include/dm/acpi.h
index 49257914ffd..69d69d7f423 100644
--- a/include/dm/acpi.h
+++ b/include/dm/acpi.h
@@ -24,6
[PATCH v5 23/29] acpi: Convert part of acpi_table to use acpi_ctx
The current code uses an address but a pointer would result in fewer
casts. Also it repeats the alignment code in a lot of places so this would
be better done in a helper function.
Update write_acpi_tables() to make use of the new acpi_ctx structure,
adding a few helpers to clean things up.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4:
- Update comment in acpi_inc_align() to show the alignment
Changes in v3:
- Rename acpi_align_large() to acpi_align64()
Changes in v2: None
arch/x86/lib/acpi_table.c | 88 +++
include/acpi/acpi_table.h | 36
lib/acpi/acpi_table.c | 24 ++-
test/dm/acpi.c| 28 +
4 files changed, 130 insertions(+), 46 deletions(-)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 98f97208339..484cf66bf4e 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -19,6 +20,7 @@
#include
#include
#include
+#include
/*
* IASL compiles the dsdt entries and writes the hex values
@@ -469,9 +471,9 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
/*
* QEMU's version of write_acpi_tables is defined in drivers/misc/qfw.c
*/
-ulong write_acpi_tables(ulong start)
+ulong write_acpi_tables(ulong start_addr)
{
- u32 current;
+ struct acpi_ctx sctx, *ctx =
struct acpi_rsdp *rsdp;
struct acpi_rsdt *rsdt;
struct acpi_xsdt *xsdt;
@@ -482,60 +484,61 @@ ulong write_acpi_tables(ulong start)
struct acpi_madt *madt;
struct acpi_csrt *csrt;
struct acpi_spcr *spcr;
+ void *start;
+ ulong addr;
int i;
- current = start;
+ start = map_sysmem(start_addr, 0);
+ ctx->current = start;
/* Align ACPI tables to 16 byte */
- current = ALIGN(current, 16);
+ acpi_align(ctx);
- debug("ACPI: Writing ACPI tables at %lx\n", start);
+ debug("ACPI: Writing ACPI tables at %lx\n", start_addr);
/* We need at least an RSDP and an RSDT Table */
- rsdp = (struct acpi_rsdp *)current;
- current += sizeof(struct acpi_rsdp);
- current = ALIGN(current, 16);
- rsdt = (struct acpi_rsdt *)current;
- current += sizeof(struct acpi_rsdt);
- current = ALIGN(current, 16);
- xsdt = (struct acpi_xsdt *)current;
- current += sizeof(struct acpi_xsdt);
+ rsdp = ctx->current;
+ acpi_inc_align(ctx, sizeof(struct acpi_rsdp));
+ rsdt = ctx->current;
+ acpi_inc_align(ctx, sizeof(struct acpi_rsdt));
+ xsdt = ctx->current;
+ acpi_inc_align(ctx, sizeof(struct acpi_xsdt));
/*
* Per ACPI spec, the FACS table address must be aligned to a 64 byte
* boundary (Windows checks this, but Linux does not).
*/
- current = ALIGN(current, 64);
+ acpi_align64(ctx);
/* clear all table memory */
- memset((void *)start, 0, current - start);
+ memset((void *)start, 0, ctx->current - start);
acpi_write_rsdp(rsdp, rsdt, xsdt);
acpi_write_rsdt(rsdt);
acpi_write_xsdt(xsdt);
debug("ACPI:* FACS\n");
- facs = (struct acpi_facs *)current;
- current += sizeof(struct acpi_facs);
- current = ALIGN(current, 16);
+ facs = ctx->current;
+ acpi_inc_align(ctx, sizeof(struct acpi_facs));
acpi_create_facs(facs);
debug("ACPI:* DSDT\n");
- dsdt = (struct acpi_table_header *)current;
+ dsdt = ctx->current;
memcpy(dsdt, , sizeof(struct acpi_table_header));
- current += sizeof(struct acpi_table_header);
- memcpy((char *)current,
+ acpi_inc(ctx, sizeof(struct acpi_table_header));
+ memcpy(ctx->current,
(char *) + sizeof(struct acpi_table_header),
dsdt->length - sizeof(struct acpi_table_header));
- current += dsdt->length - sizeof(struct acpi_table_header);
- current = ALIGN(current, 16);
+ acpi_inc_align(ctx, dsdt->length - sizeof(struct acpi_table_header));
/* Pack GNVS into the ACPI table area */
for (i = 0; i < dsdt->length; i++) {
u32 *gnvs = (u32 *)((u32)dsdt + i);
if (*gnvs == ACPI_GNVS_ADDR) {
- debug("Fix up global NVS in DSDT to 0x%08x\n", current);
- *gnvs = current;
+ ulong addr = (ulong)map_to_sysmem(ctx->current);
+
+ debug("Fix up global NVS in DSDT to %#08lx\n", addr);
+ *gnvs = addr;
break;
}
}
@@ -545,51 +548,46 @@ ulong write_acpi_tables(ulong start)
dsdt->checksum = table_compute_checksum((void *)dsdt, dsdt->length);
/* Fill in platform-specific global NVS variables */
-
[PATCH v5 21/29] test: Add hexdump.h to the unit test header
Since ut_asserteq_mem() uses bin2hex() we should include this header in ut.h to avoid errors. Add it. Signed-off-by: Simon Glass Reviewed-by: Wolfgang Wallner --- Changes in v5: None Changes in v4: None Changes in v3: - Add new patch to add hexdump.h to the unit test header Changes in v2: None include/test/ut.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/test/ut.h b/include/test/ut.h index 04df8ba3af3..39d15953ed3 100644 --- a/include/test/ut.h +++ b/include/test/ut.h @@ -8,6 +8,7 @@ #ifndef __TEST_UT_H #define __TEST_UT_H +#include #include struct unit_test_state; -- 2.26.0.292.g33ef6b2f38-goog
[PATCH v5 17/29] x86: Move acpi_table header to main include/ directory
This file is potentially useful to other architectures saddled with ACPI
so move most of its contents to a common location.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Update commit message to say that we move most of its contents
- Move acpi_table.h to include/acpi
- Add forward declarations for the functions
Changes in v2: None
arch/x86/cpu/baytrail/acpi.c | 2 +-
arch/x86/cpu/cpu.c| 2 +-
arch/x86/cpu/quark/acpi.c | 2 +-
arch/x86/cpu/tangier/acpi.c | 4 +-
arch/x86/include/asm/acpi_table.h | 381 +
arch/x86/lib/acpi.c | 2 +-
arch/x86/lib/acpi_s3.c| 2 +-
arch/x86/lib/acpi_table.c | 2 +-
arch/x86/lib/tables.c | 2 +-
arch/x86/lib/zimage.c | 2 +-
include/acpi/acpi_table.h | 394 ++
lib/efi_loader/efi_acpi.c | 2 +-
12 files changed, 412 insertions(+), 385 deletions(-)
create mode 100644 include/acpi/acpi_table.h
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index 3c27391873c..57723109796 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -7,7 +7,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 604915580d3..8526e856d7d 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -27,8 +27,8 @@
#include
#include
#include
+#include
#include
-#include
#include
#include
#include
diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c
index 7b6fc2f4a53..26cda3b3376 100644
--- a/arch/x86/cpu/quark/acpi.c
+++ b/arch/x86/cpu/quark/acpi.c
@@ -4,7 +4,7 @@
*/
#include
-#include
+#include
#include
#include
#include
diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c
index 8b128138b0d..4ec8fdd6f89 100644
--- a/arch/x86/cpu/tangier/acpi.c
+++ b/arch/x86/cpu/tangier/acpi.c
@@ -8,13 +8,13 @@
#include
#include
#include
-#include
-#include
+#include
#include
#include
#include
#include
#include
+#include
void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
void *dsdt)
diff --git a/arch/x86/include/asm/acpi_table.h
b/arch/x86/include/asm/acpi_table.h
index 7588913f937..928475cef4e 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -9,381 +9,14 @@
#ifndef __ASM_ACPI_TABLE_H__
#define __ASM_ACPI_TABLE_H__
-#define RSDP_SIG "RSD PTR " /* RSDP pointer signature */
-#define OEM_ID "U-BOOT"/* U-Boot */
-#define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */
-#define ASLC_ID"INTL" /* Intel ASL Compiler */
-
-#define ACPI_RSDP_REV_ACPI_1_0 0
-#define ACPI_RSDP_REV_ACPI_2_0 2
-
-/*
- * RSDP (Root System Description Pointer)
- * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
- */
-struct acpi_rsdp {
- char signature[8]; /* RSDP signature */
- u8 checksum;/* Checksum of the first 20 bytes */
- char oem_id[6]; /* OEM ID */
- u8 revision;/* 0 for ACPI 1.0, others 2 */
- u32 rsdt_address; /* Physical address of RSDT (32 bits) */
- u32 length; /* Total RSDP length (incl. extended part) */
- u64 xsdt_address; /* Physical address of XSDT (64 bits) */
- u8 ext_checksum;/* Checksum of the whole table */
- u8 reserved[3];
-};
-
-/* Generic ACPI header, provided by (almost) all tables */
-struct __packed acpi_table_header {
- char signature[4]; /* ACPI signature (4 ASCII characters) */
- u32 length; /* Table length in bytes (incl. header) */
- u8 revision;/* Table version (not ACPI version!) */
- volatile u8 checksum; /* To make sum of entire table == 0 */
- char oem_id[6]; /* OEM identification */
- char oem_table_id[8]; /* OEM table identification */
- u32 oem_revision; /* OEM revision number */
- char aslc_id[4];/* ASL compiler vendor ID */
- u32 aslc_revision; /* ASL compiler revision number */
-};
-
-/* A maximum number of 32 ACPI tables ought to be enough for now */
-#define MAX_ACPI_TABLES32
-
-/* RSDT (Root System Description Table) */
-struct acpi_rsdt {
- struct acpi_table_header header;
- u32 entry[MAX_ACPI_TABLES];
-};
-
-/* XSDT (Extended System Description Table) */
-struct acpi_xsdt {
- struct acpi_table_header header;
- u64 entry[MAX_ACPI_TABLES];
-};
-
-/* FADT Preferred Power Management Profile */
-enum acpi_pm_profile {
- ACPI_PM_UNSPECIFIED = 0,
- ACPI_PM_DESKTOP,
- ACPI_PM_MOBILE,
- ACPI_PM_WORKSTATION,
-
[PATCH v5 18/29] acpi: Add an __ACPI__ preprocessor symbol
The ASL compiler cannot handle C structures and the like so needs some
sort of header guard around these.
We already have an __ASSEMBLY__ #define but it seems best to create a new
one for ACPI since the rules may be different.
Add the check to a few files that ACPI always includes.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
include/acpi/acpi_table.h | 4
include/dm/acpi.h | 4
scripts/Makefile.lib | 4 ++--
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index b4404a632c0..dd748958136 100644
--- a/include/acpi/acpi_table.h
+++ b/include/acpi/acpi_table.h
@@ -21,6 +21,8 @@
#define ACPI_RSDP_REV_ACPI_1_0 0
#define ACPI_RSDP_REV_ACPI_2_0 2
+#if !defined(__ACPI__)
+
/*
* RSDP (Root System Description Pointer)
* Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
@@ -389,6 +391,8 @@ struct __packed acpi_spcr {
u32 reserved2;
};
+#endif /* !__ACPI__*/
+
#include
#endif /* __ACPI_TABLE_H__ */
diff --git a/include/dm/acpi.h b/include/dm/acpi.h
index ba0813fa21c..49257914ffd 100644
--- a/include/dm/acpi.h
+++ b/include/dm/acpi.h
@@ -22,6 +22,8 @@
/* Length of an ACPI name string including nul terminator */
#define ACPI_NAME_MAX (ACPI_NAME_LEN + 1)
+#if !defined(__ACPI__)
+
/**
* struct acpi_ops - ACPI operations supported by driver model
*/
@@ -70,4 +72,6 @@ int acpi_get_name(const struct udevice *dev, char *out_name);
*/
int acpi_copy_name(char *out_name, const char *name);
+#endif /* __ACPI__ */
+
#endif
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 30f392fdfb0..aebdb38d0d2 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -413,8 +413,8 @@ ASL_TMP = $(patsubst %.c,%.asl.tmp,$@)
quiet_cmd_acpi_c_asl= ASL $<
cmd_acpi_c_asl= \
- $(CPP) -x assembler-with-cpp -D__ASSEMBLY__ -P $(UBOOTINCLUDE) \
- -o $(ASL_TMP) $< && \
+ $(CPP) -x assembler-with-cpp -D__ASSEMBLY__ -D__ACPI__ \
+ -P $(UBOOTINCLUDE) -o $(ASL_TMP) $< && \
iasl -p $@ -tc $(ASL_TMP) $(if $(KBUILD_VERBOSE:1=), >/dev/null) && \
mv $(patsubst %.c,%.hex,$@) $@
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 15/29] acpi: Add a simple sandbox test
Add a sandbox test for the basic ACPI functionality we have so far.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in v5:
- Capitalise ACPI_OPS_PTR since it includes a comma
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add in the acpi_table.h header file to this patch
arch/sandbox/dts/test.dts | 4 ++
arch/sandbox/include/asm/acpi_table.h | 9 +
include/dm/uclass-id.h| 1 +
test/dm/Makefile | 1 +
test/dm/acpi.c| 55 +++
5 files changed, 70 insertions(+)
create mode 100644 arch/sandbox/include/asm/acpi_table.h
create mode 100644 test/dm/acpi.c
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 4a277934a71..5fa951ad4b6 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -206,6 +206,10 @@
compatible = "denx,u-boot-devres-test";
};
+ acpi-test {
+ compatible = "denx,u-boot-acpi-test";
+ };
+
clocks {
clk_fixed: clk-fixed {
compatible = "fixed-clock";
diff --git a/arch/sandbox/include/asm/acpi_table.h
b/arch/sandbox/include/asm/acpi_table.h
new file mode 100644
index 000..921c7f4201d
--- /dev/null
+++ b/arch/sandbox/include/asm/acpi_table.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 Google LLC
+ */
+
+#ifndef __ASM_ACPI_TABLE_H__
+#define __ASM_ACPI_TABLE_H__
+
+#endif /* __ASM_ACPI_TABLE_H__ */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 598f65ea7a3..37ada51f9f7 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -20,6 +20,7 @@ enum uclass_id {
UCLASS_TEST_PROBE,
UCLASS_TEST_DUMMY,
UCLASS_TEST_DEVRES,
+ UCLASS_TEST_ACPI,
UCLASS_SPI_EMUL,/* sandbox SPI device emulator */
UCLASS_I2C_EMUL,/* sandbox I2C device emulator */
UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */
diff --git a/test/dm/Makefile b/test/dm/Makefile
index dd1ceff86c0..3daf8a544ea 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_UT_DM) += test-uclass.o
# subsystem you must add sandbox tests here.
obj-$(CONFIG_UT_DM) += core.o
ifneq ($(CONFIG_SANDBOX),)
+obj-$(CONFIG_ACPIGEN) += acpi.o
obj-$(CONFIG_SOUND) += audio.o
obj-$(CONFIG_BLK) += blk.o
obj-$(CONFIG_BOARD) += board.o
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
new file mode 100644
index 000..3677cdd0cc5
--- /dev/null
+++ b/test/dm/acpi.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Tests for ACPI table generation
+ *
+ * Copyright 2019 Google LLC
+ * Written by Simon Glass
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define ACPI_TEST_DEV_NAME "ABCD"
+
+static int testacpi_get_name(const struct udevice *dev, char *out_name)
+{
+ return acpi_copy_name(out_name, ACPI_TEST_DEV_NAME);
+}
+
+struct acpi_ops testacpi_ops = {
+ .get_name = testacpi_get_name,
+};
+
+static const struct udevice_id testacpi_ids[] = {
+ { .compatible = "denx,u-boot-acpi-test" },
+ { }
+};
+
+U_BOOT_DRIVER(testacpi_drv) = {
+ .name = "testacpi_drv",
+ .of_match = testacpi_ids,
+ .id = UCLASS_TEST_ACPI,
+ ACPI_OPS_PTR(_ops)
+};
+
+UCLASS_DRIVER(testacpi) = {
+ .name = "testacpi",
+ .id = UCLASS_TEST_ACPI,
+};
+
+/* Test ACPI get_name() */
+static int dm_test_acpi_get_name(struct unit_test_state *uts)
+{
+ char name[ACPI_NAME_MAX];
+ struct udevice *dev;
+
+ ut_assertok(uclass_first_device_err(UCLASS_TEST_ACPI, ));
+ ut_assertok(acpi_get_name(dev, name));
+ ut_asserteq_str(ACPI_TEST_DEV_NAME, name);
+
+ return 0;
+}
+DM_TEST(dm_test_acpi_get_name, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 19/29] acpi: Add a central location for table version numbers
Each ACPI table has its own version number. Add the version numbers in a
single function so we can keep them consistent and easily see what
versions are supported.
Start a new acpi_table file in a generic directory to house this function.
We can move things over to this file from x86 as needed.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v5:
- Mess with the table ordering a little more
Changes in v4:
- Move ACPI makefile line outside the ifdef CONFIG_SPL_BUILD
- Add a comment about the MADT table version
- Add SPCR
- Update comment to include tables defined or reserved by ACPI
Changes in v3:
- Fix file comment for acpi_table.c
- Fix a few typos
Changes in v2:
- Move the sandbox acpi_table.h header file to an earlier patch
- Use #defines for MADT and MCFG version numbers
include/acpi/acpi_table.h | 60 +
lib/Makefile | 1 +
lib/acpi/Makefile | 4 +++
lib/acpi/acpi_table.c | 62 +++
test/dm/acpi.c| 14 +
5 files changed, 141 insertions(+)
create mode 100644 lib/acpi/Makefile
create mode 100644 lib/acpi/acpi_table.c
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index dd748958136..fdd7682c897 100644
--- a/include/acpi/acpi_table.h
+++ b/include/acpi/acpi_table.h
@@ -202,6 +202,26 @@ struct __packed acpi_fadt {
struct acpi_gen_regaddr x_gpe1_blk;
};
+/* FADT TABLE Revision values - note these do not match the ACPI revision */
+#define ACPI_FADT_REV_ACPI_1_0 1
+#define ACPI_FADT_REV_ACPI_2_0 3
+#define ACPI_FADT_REV_ACPI_3_0 4
+#define ACPI_FADT_REV_ACPI_4_0 4
+#define ACPI_FADT_REV_ACPI_5_0 5
+#define ACPI_FADT_REV_ACPI_6_0 6
+
+/* MADT TABLE Revision values - note these do not match the ACPI revision */
+#define ACPI_MADT_REV_ACPI_3_0 2
+#define ACPI_MADT_REV_ACPI_4_0 3
+#define ACPI_MADT_REV_ACPI_5_0 3
+#define ACPI_MADT_REV_ACPI_6_0 5
+
+#define ACPI_MCFG_REV_ACPI_3_0 1
+
+/* IVRS Revision Field */
+#define IVRS_FORMAT_FIXED 0x01/* Type 10h & 11h only */
+#define IVRS_FORMAT_MIXED 0x02/* Type 10h, 11h, & 40h */
+
/* FACS flags */
#define ACPI_FACS_S4BIOS_F BIT(0)
#define ACPI_FACS_64BIT_WAKE_F BIT(1)
@@ -391,6 +411,46 @@ struct __packed acpi_spcr {
u32 reserved2;
};
+/* Tables defined/reserved by ACPI and generated by U-Boot */
+enum acpi_tables {
+ ACPITAB_BERT,
+ ACPITAB_DBG2,
+ ACPITAB_DMAR,
+ ACPITAB_DSDT,
+ ACPITAB_ECDT,
+ ACPITAB_FACS,
+ ACPITAB_FADT,
+ ACPITAB_HEST,
+ ACPITAB_HPET,
+ ACPITAB_IVRS,
+ ACPITAB_MADT,
+ ACPITAB_MCFG,
+ ACPITAB_NHLT,
+ ACPITAB_RSDP,
+ ACPITAB_RSDT,
+ ACPITAB_SLIT,
+ ACPITAB_SPCR,
+ ACPITAB_SPMI,
+ ACPITAB_SRAT,
+ ACPITAB_SSDT,
+ ACPITAB_TCPA,
+ ACPITAB_TPM2,
+ ACPITAB_VFCT,
+ ACPITAB_XSDT,
+
+ ACPITAB_COUNT,
+};
+
+/**
+ * acpi_get_table_revision() - Get the revision number generated for a table
+ *
+ * This keeps the version-number information in one place
+ *
+ * @table: ACPI table to check
+ * @return version number that U-Boot generates
+ */
+int acpi_get_table_revision(enum acpi_tables table);
+
#endif /* !__ACPI__*/
#include
diff --git a/lib/Makefile b/lib/Makefile
index 15259d0473c..5bd6f57482e 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -58,6 +58,7 @@ obj-$(CONFIG_TPM_V1) += tpm-v1.o
obj-$(CONFIG_TPM_V2) += tpm-v2.o
endif
+obj-$(CONFIG_$(SPL_)ACPIGEN) += acpi/
obj-$(CONFIG_$(SPL_)RSA) += rsa/
obj-$(CONFIG_SHA1) += sha1.o
obj-$(CONFIG_SHA256) += sha256.o
diff --git a/lib/acpi/Makefile b/lib/acpi/Makefile
new file mode 100644
index 000..660491ef711
--- /dev/null
+++ b/lib/acpi/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += acpi_table.o
diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
new file mode 100644
index 000..3268430cd1e
--- /dev/null
+++ b/lib/acpi/acpi_table.c
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Generic code used to generate ACPI tables
+ *
+ * Copyright 2019 Google LLC
+ */
+
+#include
+#include
+
+int acpi_get_table_revision(enum acpi_tables table)
+{
+ switch (table) {
+ case ACPITAB_FADT:
+ return ACPI_FADT_REV_ACPI_3_0;
+ case ACPITAB_MADT:
+ return ACPI_MADT_REV_ACPI_3_0;
+ case ACPITAB_MCFG:
+ return ACPI_MCFG_REV_ACPI_3_0;
+ case ACPITAB_TCPA:
+ /* This version and the rest are open-coded */
+ return 2;
+ case ACPITAB_TPM2:
+ return 4;
+ case ACPITAB_SSDT: /* ACPI 3.0 upto 6.3: 2 */
+ return 2;
+ case ACPITAB_SRAT: /* ACPI 2.0: 1, ACPI 3.0: 2, ACPI 4.0 to 6.3: 3 */
+ return 1; /* TODO Should probably be upgraded to 2 */
+
[PATCH v5 20/29] acpi: Add support for DMAR
The DMA Remapping Reporting (DMAR) table contains information about DMA
remapping.
Add a version simple version of this table with only the minimum fields
filled out. i.e. no entries.
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Signed-off-by: Simon Glass
---
Changes in v5:
- Add #ifndef CONFIG_SANDBOX to maintain bisectability without merging patches
Changes in v4:
- Drop ASL_REVISION
Changes in v3:
- Make use of BIT()
- Fix DMA_ typo
- Add missing error check in acpi_create_dmar()
- Drop duplicate assert
Changes in v2:
- Drop two unnecessary __packed
- Move __packed to after struct
include/acpi/acpi_table.h | 54 +++
lib/acpi/acpi_table.c | 31 ++
test/dm/acpi.c| 16
3 files changed, 101 insertions(+)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index fdd7682c897..194be9aa589 100644
--- a/include/acpi/acpi_table.h
+++ b/include/acpi/acpi_table.h
@@ -360,6 +360,51 @@ struct acpi_csrt_shared_info {
u32 max_block_size;
};
+enum dmar_type {
+ DMAR_DRHD = 0,
+ DMAR_RMRR = 1,
+ DMAR_ATSR = 2,
+ DMAR_RHSA = 3,
+ DMAR_ANDD = 4
+};
+
+enum {
+ DRHD_INCLUDE_PCI_ALL = BIT(0)
+};
+
+enum dmar_flags {
+ DMAR_INTR_REMAP = BIT(0),
+ DMAR_X2APIC_OPT_OUT = BIT(1),
+ DMAR_CTRL_PLATFORM_OPT_IN_FLAG = BIT(2),
+};
+
+struct dmar_entry {
+ u16 type;
+ u16 length;
+ u8 flags;
+ u8 reserved;
+ u16 segment;
+ u64 bar;
+};
+
+struct dmar_rmrr_entry {
+ u16 type;
+ u16 length;
+ u16 reserved;
+ u16 segment;
+ u64 bar;
+ u64 limit;
+};
+
+/* DMAR (DMA Remapping Reporting Structure) */
+struct __packed acpi_dmar {
+ struct acpi_table_header header;
+ u8 host_address_width;
+ u8 flags;
+ u8 reserved[10];
+ struct dmar_entry structure[0];
+};
+
/* DBG2 definitions are partially used for SPCR interface_type */
/* Types for port_type field */
@@ -451,6 +496,15 @@ enum acpi_tables {
*/
int acpi_get_table_revision(enum acpi_tables table);
+/**
+ * acpi_create_dmar() - Create a DMA Remapping Reporting (DMAR) table
+ *
+ * @dmar: Place to put the table
+ * @flags: DMAR flags to use
+ * @return 0 if OK, -ve on error
+ */
+int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags);
+
#endif /* !__ACPI__*/
#include
diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
index 3268430cd1e..4633dcb9488 100644
--- a/lib/acpi/acpi_table.c
+++ b/lib/acpi/acpi_table.c
@@ -7,6 +7,37 @@
#include
#include
+#include
+#include
+
+/* Temporary change to ensure bisectability */
+#ifndef CONFIG_SANDBOX
+int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags)
+{
+ struct acpi_table_header *header = >header;
+ struct cpu_info info;
+ struct udevice *cpu;
+ int ret;
+
+ ret = uclass_first_device(UCLASS_CPU, );
+ if (ret)
+ return log_msg_ret("cpu", ret);
+ ret = cpu_get_info(cpu, );
+ if (ret)
+ return log_msg_ret("info", ret);
+ memset((void *)dmar, 0, sizeof(struct acpi_dmar));
+
+ /* Fill out header fields. */
+ acpi_fill_header(>header, "DMAR");
+ header->length = sizeof(struct acpi_dmar);
+ header->revision = acpi_get_table_revision(ACPITAB_DMAR);
+
+ dmar->host_address_width = info.address_width - 1;
+ dmar->flags = flags;
+
+ return 0;
+}
+#endif
int acpi_get_table_revision(enum acpi_tables table)
{
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index 85c846b0d7f..e7b8abd5569 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -67,3 +67,19 @@ static int dm_test_acpi_get_table_revision(struct
unit_test_state *uts)
}
DM_TEST(dm_test_acpi_get_table_revision,
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Temporary change to ensure bisectability */
+#ifndef CONFIG_SANDBOX
+/* Test acpi_create_dmar() */
+static int dm_test_acpi_create_dmar(struct unit_test_state *uts)
+{
+ struct acpi_dmar dmar;
+
+ ut_assertok(acpi_create_dmar(, DMAR_INTR_REMAP));
+ ut_asserteq(DMAR_INTR_REMAP, dmar.flags);
+ ut_asserteq(32 - 1, dmar.host_address_width);
+
+ return 0;
+}
+DM_TEST(dm_test_acpi_create_dmar, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+#endif
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 16/29] x86: Move acpi_s3.h to include/acpi/
This header relates to ACPI and we are about to add some more ACPI
headers. Move this one into a new directory so they are together.
The header inclusion in pci_rom.c is not specific to x86 anymore, so drop
the #ifdef CONFIG_X86.
Signed-off-by: Simon Glass
Reviewed-by: Andy Shevchenko
---
Changes in v5:
- Update commit message to mention dropping the #ifdef CONFIG_X86
Changes in v4: None
Changes in v3:
- Add new patch to move acpi_s3.h to include/acpi/
Changes in v2: None
arch/x86/cpu/apollolake/cpu_spl.c| 2 +-
arch/x86/cpu/apollolake/fsp_s.c | 2 +-
arch/x86/cpu/apollolake/pmc.c| 2 +-
arch/x86/cpu/baytrail/acpi.c | 4 ++--
arch/x86/cpu/cpu.c | 2 +-
arch/x86/cpu/wakeup.S| 2 +-
arch/x86/lib/acpi_s3.c | 2 +-
arch/x86/lib/coreboot_table.c| 2 +-
arch/x86/lib/fsp/fsp_common.c| 2 +-
arch/x86/lib/fsp1/fsp_common.c | 2 +-
arch/x86/lib/fsp2/fsp_dram.c | 2 +-
drivers/pci/pci_rom.c| 4 +---
drivers/power/acpi_pmc/acpi-pmc-uclass.c | 2 +-
drivers/sysreset/sysreset_x86.c | 2 +-
include/{ => acpi}/acpi_s3.h | 0
15 files changed, 15 insertions(+), 17 deletions(-)
rename include/{ => acpi}/acpi_s3.h (100%)
diff --git a/arch/x86/cpu/apollolake/cpu_spl.c
b/arch/x86/cpu/apollolake/cpu_spl.c
index 8a39c3128e0..e2509e391fa 100644
--- a/arch/x86/cpu/apollolake/cpu_spl.c
+++ b/arch/x86/cpu/apollolake/cpu_spl.c
@@ -6,13 +6,13 @@
*/
#include
-#include
#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 5d252b6..7ef169b147f 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -5,11 +5,11 @@
*/
#include
-#include
#include
#include
#include
#include
+#include
#include
#include
#include
diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c
index aec0c8394c2..4ea7c7447bc 100644
--- a/arch/x86/cpu/apollolake/pmc.c
+++ b/arch/x86/cpu/apollolake/pmc.c
@@ -9,10 +9,10 @@
#define LOG_CATEGORY UCLASS_ACPI_PMC
#include
-#include
#include
#include
#include
+#include
#include
#include
#include
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index f44228e6939..3c27391873c 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -4,15 +4,15 @@
*/
#include
-#include
#include
#include
-#include
+#include
#include
#include
#include
#include
#include
+#include
void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
void *dsdt)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 3db035c2c0e..604915580d3 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -19,7 +19,6 @@
*/
#include
-#include
#include
#include
#include
@@ -27,6 +26,7 @@
#include
#include
#include
+#include
#include
#include
#include
diff --git a/arch/x86/cpu/wakeup.S b/arch/x86/cpu/wakeup.S
index 244ca1276af..093bf3bcc5c 100644
--- a/arch/x86/cpu/wakeup.S
+++ b/arch/x86/cpu/wakeup.S
@@ -5,7 +5,7 @@
* From coreboot src/arch/x86/wakeup.S
*/
-#include
+#include
#include
#include
diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c
index 197636c4b50..c3759ec8492 100644
--- a/arch/x86/lib/acpi_s3.c
+++ b/arch/x86/lib/acpi_s3.c
@@ -4,7 +4,7 @@
*/
#include
-#include
+#include
#include
#include
#include
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
index 2943e11d2a4..c996fc588df 100644
--- a/arch/x86/lib/coreboot_table.c
+++ b/arch/x86/lib/coreboot_table.c
@@ -4,9 +4,9 @@
*/
#include
-#include
#include
#include
+#include
#include
#include
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 5eff0f99aad..267527eb344 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -4,11 +4,11 @@
*/
#include
-#include
#include
#include
#include
#include
+#include
#include
#include
#include
diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c
index aee2a05044f..0a726807c2b 100644
--- a/arch/x86/lib/fsp1/fsp_common.c
+++ b/arch/x86/lib/fsp1/fsp_common.c
@@ -4,11 +4,11 @@
*/
#include
-#include
#include
#include
#include
#include
+#include
#include
#include
#include
diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c
index 74835eebcea..3869c53c5f9 100644
--- a/arch/x86/lib/fsp2/fsp_dram.c
+++ b/arch/x86/lib/fsp2/fsp_dram.c
@@ -5,9 +5,9 @@
*/
#include
-#include
#include
#include
+#include
#include
#include
#include
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 90f224b0452..6b17f18bc07 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@
[PATCH v5 14/29] acpi: Add a binding for ACPI settings in the device tree
Devices need to report various identifiers in the ACPI tables. Rather than
hard-coding these in drivers it is typically better to put them in the
device tree.
Add a binding file to describe this.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4:
- Put 'interrupts-extended' property on one line
- Rename acpi-probed to linux,probed
- Note that linux,probed is an out-of-tree feature
Changes in v3:
- Drop mention of PRIC
- Rename acpi,desc to acpi,ddn
- Correct description of acpi,probed
- Drop hid-descr-addr
- Just add the device.txt binding file in this patch
- Change the example to ELAN
- Add a pointer to information about acpi,compatible
Changes in v2:
- Fix definition of HID
- Infer hid-over-i2c CID value
- Add the hid-over-i2c binding document
doc/device-tree-bindings/device.txt | 36 +
1 file changed, 36 insertions(+)
create mode 100644 doc/device-tree-bindings/device.txt
diff --git a/doc/device-tree-bindings/device.txt
b/doc/device-tree-bindings/device.txt
new file mode 100644
index 000..27bd3978d98
--- /dev/null
+++ b/doc/device-tree-bindings/device.txt
@@ -0,0 +1,36 @@
+Devices
+===
+
+Device bindings are described by their own individual binding files.
+
+U-Boot provides for some optional properties which are documented here. See
+also hid-over-i2c.txt which describes HID devices. See also
+Documentation/firmware-guide/acpi/enumeration.rst in the Linux kernel for
+the acpi,compatible property.
+
+ - acpi,has-power-resource : (boolean) true if this device has a power
resource.
+This causes an ACPI PowerResource to be written containing the properties
+provided by this binding, to describe how to handle powering the device up
+and down using GPIOs
+ - acpi,compatible : compatible string to report
+ - acpi,ddn : Contains the string to use as the _DDN (DOS (Disk Operating
+System) Device Name)
+ - acpi,hid : Contains the string to use as the HID (Hardware ID)
+identifier _HID
+ - acpi,uid : _UID value for device
+ - linux,probed : Tells U-Boot to add 'linux,probed' to the ACPI tables so that
+Linux will only load the driver if the device can be detected (e.g. on I2C
+bus). Note that this is an out-of-tree Linux feature.
+
+
+Example
+---
+
+elan_touchscreen: elan-touchscreen@10 {
+ compatible = "i2c-chip";
+ reg = <0x10>;
+ acpi,hid = "ELAN0001";
+ acpi,ddn = "ELAN Touchscreen";
+ interrupts-extended = <_gpe GPIO_21_IRQ IRQ_TYPE_EDGE_FALLING>;
+ linux,probed;
+};
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 11/29] x86: apl: Add Global NVS table header
Add the C version of this header. It includes a few Chrome OS bits which
are disabled for a normal build.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v5:
- Tweak unused naming and comments
Changes in v4:
- Fix indentation of unused
- Calculate the padding
Changes in v3:
- Fix stray #endif
Changes in v2:
- Drop the Chrome OS pieces
- Rename the 'coreboot' console to 'U-Boot'
.../include/asm/arch-apollolake/global_nvs.h | 36 +++
1 file changed, 36 insertions(+)
create mode 100644 arch/x86/include/asm/arch-apollolake/global_nvs.h
diff --git a/arch/x86/include/asm/arch-apollolake/global_nvs.h
b/arch/x86/include/asm/arch-apollolake/global_nvs.h
new file mode 100644
index 000..fe62194b02e
--- /dev/null
+++ b/arch/x86/include/asm/arch-apollolake/global_nvs.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2015-2017 Intel Corp.
+ * (Written by Lance Zhao for Intel Corp.)
+ * Copyright Google LLC 2019
+ *
+ * Modified from coreboot apollolake/include/soc/nvs.h
+ */
+
+#ifndef _GLOBAL_NVS_H_
+#define _GLOBAL_NVS_H_
+
+struct __packed acpi_global_nvs {
+ /* Miscellaneous */
+ u8 pcnt; /* 0x00 - Processor Count */
+ u8 ppcm; /* 0x01 - Max PPC State */
+ u8 lids; /* 0x02 - LID State */
+ u8 pwrs; /* 0x03 - AC Power State */
+ u8 dpte; /* 0x04 - Enable DPTF */
+ u32 cbmc; /* 0x05 - 0x08 - U-Boot Console */
+ u64 pm1i; /* 0x09 - 0x10 - System Wake Source - PM1 Index */
+ u64 gpei; /* 0x11 - 0x18 - GPE Wake Source */
+ u64 nhla; /* 0x19 - 0x20 - NHLT Address */
+ u32 nhll; /* 0x21 - 0x24 - NHLT Length */
+ u32 prt0; /* 0x25 - 0x28 - PERST_0 Address */
+ u8 scdp; /* 0x29 - SD_CD GPIO portid */
+ u8 scdo; /* 0x2a - GPIO pad offset relative to the community */
+ u8 uior; /* 0x2b - UART debug controller init on S3 resume */
+ u8 ecps; /* 0x2c - SGX Enabled status */
+ u64 emna; /* 0x2d - 0x34 EPC base address */
+ u64 elng; /* 0x35 - 0x3c EPC Length */
+ u8 unused1[0x100 - 0x3d]; /* Pad out to 256 bytes */
+ u8 unused2[0x1000 - 0x100];/* Pad out to 4096 bytes */
+};
+
+#endif /* _GLOBAL_NVS_H_ */
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 13/29] dts: Add a binding for hid-over-i2c
Add this binding from Linux v5.4.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Split out hid-over-i2c into its own patch
Changes in v2: None
.../input/hid-over-i2c.txt| 44 +++
1 file changed, 44 insertions(+)
create mode 100644 doc/device-tree-bindings/input/hid-over-i2c.txt
diff --git a/doc/device-tree-bindings/input/hid-over-i2c.txt
b/doc/device-tree-bindings/input/hid-over-i2c.txt
new file mode 100644
index 000..c76bafaf98d
--- /dev/null
+++ b/doc/device-tree-bindings/input/hid-over-i2c.txt
@@ -0,0 +1,44 @@
+* HID over I2C Device-Tree bindings
+
+HID over I2C provides support for various Human Interface Devices over the
+I2C bus. These devices can be for example touchpads, keyboards, touch screens
+or sensors.
+
+The specification has been written by Microsoft and is currently available
here:
+http://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx
+
+If this binding is used, the kernel module i2c-hid will handle the
communication
+with the device and the generic hid core layer will handle the protocol.
+
+Required properties:
+- compatible: must be "hid-over-i2c"
+- reg: i2c slave address
+- hid-descr-addr: HID descriptor address
+- interrupts: interrupt line
+
+Additional optional properties:
+
+Some devices may support additional optional properties to help with, e.g.,
+power sequencing. The following properties can be supported by one or more
+device-specific compatible properties, which should be used in addition to the
+"hid-over-i2c" string.
+
+- compatible:
+ * "wacom,w9013" (Wacom W9013 digitizer). Supports:
+- vdd-supply (3.3V)
+- vddl-supply (1.8V)
+- post-power-on-delay-ms
+
+- vdd-supply: phandle of the regulator that provides the supply voltage.
+- post-power-on-delay-ms: time required by the device after enabling its
regulators
+ or powering it on, before it is ready for communication.
+
+Example:
+
+ i2c-hid-dev@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+ hid-descr-addr = <0x0020>;
+ interrupt-parent = <>;
+ interrupts = <3 2>;
+ };
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 12/29] dm: core: Add basic ACPI support
ACPI (Advanced Configuration and Power Interface) is a standard for
specifying information about a platform. It is a little like device
tree but the bindings are part of the specification and it supports an
interpreted bytecode language.
Driver model does not use ACPI for U-Boot's configuration, but it is
convenient to have it support generation of ACPI tables for passing to
Linux, etc.
As a starting point, add an optional set of ACPI operations to each
device. Initially only a single operation is available, to obtain the
ACPI name for the device. More operations are added later.
Enable ACPI for sandbox to ensure build coverage and so that we can add
tests.
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Signed-off-by: Simon Glass
---
Changes in v5:
- Capitalise ACPI_OPS_PTR since it includes a comma
Changes in v4: None
Changes in v3:
- Drop 'Intel' from 'Intel ACPI'
- Reword commit message to drop the bit about ACPI being complicated
- Compute ACPI_NAME_MAX from ACPI_NAME_LEN
- Rename acpi_return_name() to acpi_copy_name()
- Use strncpy() instead of strcpy() in acpi_copy_name()
Changes in v2:
- Move LOGC_ACPI definition to this patch
configs/tools-only_defconfig | 1 +
drivers/core/Kconfig | 9 +
drivers/core/Makefile| 1 +
drivers/core/acpi.c | 33
include/dm/acpi.h| 73
include/dm/device.h | 5 +++
include/log.h| 2 +
7 files changed, 124 insertions(+)
create mode 100644 drivers/core/acpi.c
create mode 100644 include/dm/acpi.h
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index 6ca50dc5fd3..2811b2cd37d 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -26,3 +26,4 @@ CONFIG_SYSRESET=y
# CONFIG_VIRTIO_PCI is not set
# CONFIG_VIRTIO_SANDBOX is not set
# CONFIG_EFI_LOADER is not set
+# CONFIG_ACPIGEN is not set
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 3b95b5387b9..a3b03993423 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -261,4 +261,13 @@ config DM_DEV_READ_INLINE
bool
default y if !OF_LIVE
+config ACPIGEN
+ bool "Support ACPI table generation in driver model"
+ default y if SANDBOX || GENERATE_ACPI_TABLE
+ help
+ This option enables generation of ACPI tables using driver-model
+ devices. It adds a new operation struct to each driver, to support
+ things like generating device-specific tables and returning the ACPI
+ name of a device.
+
endmenu
diff --git a/drivers/core/Makefile b/drivers/core/Makefile
index bce7467da1d..c707026a3a0 100644
--- a/drivers/core/Makefile
+++ b/drivers/core/Makefile
@@ -3,6 +3,7 @@
# Copyright (c) 2013 Google, Inc
obj-y += device.o fdtaddr.o lists.o root.o uclass.o util.o
+obj-$(CONFIG_$(SPL_TPL_)ACPIGEN) += acpi.o
obj-$(CONFIG_DEVRES) += devres.o
obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE) += device-remove.o
obj-$(CONFIG_$(SPL_)SIMPLE_BUS)+= simple-bus.o
diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
new file mode 100644
index 000..0e64c21bf5b
--- /dev/null
+++ b/drivers/core/acpi.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Core driver model support for ACPI table generation
+ *
+ * Copyright 2019 Google LLC
+ * Written by Simon Glass
+ */
+
+#define LOG_CATEOGRY LOGC_ACPI
+
+#include
+#include
+#include
+#include
+
+int acpi_copy_name(char *out_name, const char *name)
+{
+ strncpy(out_name, name, ACPI_NAME_MAX);
+ out_name[ACPI_NAME_LEN] = '\0';
+
+ return 0;
+}
+
+int acpi_get_name(const struct udevice *dev, char *out_name)
+{
+ struct acpi_ops *aops;
+
+ aops = device_get_acpi_ops(dev);
+ if (aops && aops->get_name)
+ return aops->get_name(dev, out_name);
+
+ return -ENOSYS;
+}
diff --git a/include/dm/acpi.h b/include/dm/acpi.h
new file mode 100644
index 000..ba0813fa21c
--- /dev/null
+++ b/include/dm/acpi.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Core ACPI (Advanced Configuration and Power Interface) support
+ *
+ * Copyright 2019 Google LLC
+ * Written by Simon Glass
+ */
+
+#ifndef __DM_ACPI_H__
+#define __DM_ACPI_H__
+
+/* Allow operations to be optional for ACPI */
+#if CONFIG_IS_ENABLED(ACPIGEN)
+#define ACPI_OPS_PTR(_ptr) .acpi_ops = _ptr,
+#else
+#define ACPI_OPS_PTR(_ptr)
+#endif
+
+/* Length of an ACPI name string, excluding nul terminator */
+#define ACPI_NAME_LEN 4
+
+/* Length of an ACPI name string including nul terminator */
+#define ACPI_NAME_MAX (ACPI_NAME_LEN + 1)
+
+/**
+ * struct acpi_ops - ACPI operations supported by driver model
+ */
+struct acpi_ops {
+ /**
+* get_name() - Obtain the ACPI name of a device
+*
+* @dev: Device to check
+* @out_name: Place to put the name, must hold at least ACPI_NAME_MAX
+* bytes
+* @return 0 if OK,
[PATCH v5 10/29] pci: Adjust dm_pci_read_bar32() to return errors correctly
At present if reading a BAR returns 0x (e.g. the device is not present) then the value is masked and a different value is returned. This makes it harder to detect the problem when debugging. Update the function to avoid masking in this case. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Wolfgang Wallner --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/pci/pci-uclass.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 213381da6bd..7f46e901fb2 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -1213,7 +1213,14 @@ u32 dm_pci_read_bar32(const struct udevice *dev, int barnum) bar = PCI_BASE_ADDRESS_0 + barnum * 4; dm_pci_read_config32(dev, bar, ); - if (addr & PCI_BASE_ADDRESS_SPACE_IO) + + /* +* If we get an invalid address, return this so that comparisons with +* FDT_ADDR_T_NONE work correctly +*/ + if (addr == 0x) + return addr; + else if (addr & PCI_BASE_ADDRESS_SPACE_IO) return addr & PCI_BASE_ADDRESS_IO_MASK; else return addr & PCI_BASE_ADDRESS_MEM_MASK; -- 2.26.0.292.g33ef6b2f38-goog
[PATCH v5 05/29] tpm: cr50: Use the correct GPIO binding
This device should use ready-gpios rather than ready-gpio. Fix it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/x86/dts/chromebook_coral.dts | 2 +-
doc/device-tree-bindings/gpio/intel,apl-gpio.txt| 2 +-
.../interrupt-controller/intel,acpi-gpe.txt | 2 +-
drivers/tpm/cr50_i2c.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/dts/chromebook_coral.dts
b/arch/x86/dts/chromebook_coral.dts
index af52e11c89a..d48ef3573ec 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -292,7 +292,7 @@
reg = <0x50>;
compatible = "google,cr50";
u-boot,i2c-offset-len = <0>;
- ready-gpio = <_n 28 GPIO_ACTIVE_LOW>;
+ ready-gpios = <_n 28 GPIO_ACTIVE_LOW>;
interrupts-extended = <_gpe 0x3c 0>;
};
};
diff --git a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
index cf0659b70ec..8422ff63abd 100644
--- a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
+++ b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
@@ -47,7 +47,7 @@ Example:
reg = <0x50>;
compatible = "google,cr50";
u-boot,i2c-offset-len = <0>;
- ready-gpio = <_n GPIO_28 GPIO_ACTIVE_LOW>;
+ ready-gpios = <_n GPIO_28 GPIO_ACTIVE_LOW>;
};
};
diff --git a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
index d9252bf29f7..2fe02d8a227 100644
--- a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
+++ b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
@@ -25,6 +25,6 @@ Example:
tpm@50 {
reg = <0x50>;
compatible = "google,cr50";
- ready-gpio = <_n 0x1c GPIO_ACTIVE_LOW>;
+ ready-gpios = <_n 0x1c GPIO_ACTIVE_LOW>;
interrupts-extended = <_gpe 0x3c 0>;
};
diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
index c1d2d2fa381..b67051af26a 100644
--- a/drivers/tpm/cr50_i2c.c
+++ b/drivers/tpm/cr50_i2c.c
@@ -607,7 +607,7 @@ static int cr50_i2c_ofdata_to_platdata(struct udevice *dev)
priv->irq = irq;
priv->use_irq = true;
} else {
- ret = gpio_request_by_name(dev, "ready-gpio", 0,
+ ret = gpio_request_by_name(dev, "ready-gpios", 0,
>ready_gpio, GPIOD_IS_IN);
if (ret) {
log_warning("Cr50 does not have an ready GPIO/interrupt
(err=%d)\n",
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 09/29] x86: apl: Move p2sb ofdata reading to the correct method
With P2SB the initial BAR (base-address register) is set up by TPL and
this is used unchanged right through U-Boot.
At present the reading of this address is split between the ofdata() and
probe() methods. There are a few problems that are unique to the p2sb.
One is that its children need to call pcr_read32(), etc. which needs to
have the p2sb address correct. Also some of its children are pinctrl
devices and pinctrl is used when any device is probed. So p2sb really
needs to get its base address set up in ofdata_to_platdata(), before it is
probed.
Another point is that reading the p2sb BAR will not work if the p2sb is
hidden. The FSP-S seems to hide it, presumably to avoid confusing PCI
enumeration.
Reading ofdata in ofdata_to_platdata() is the correct place anyway, so
this is easy to fix.
Move the code into one place and use the early-regs property in all cases
for simplicity and to avoid needing to probe any PCI devices just to read
the BAR.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Tested-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix indenting error mentioned by Andy Shevchenko
Changes in v2: None
arch/x86/cpu/intel_common/p2sb.c | 33 +++-
1 file changed, 11 insertions(+), 22 deletions(-)
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index d5b4846e0a2..6f3c4416186 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -92,46 +92,35 @@ int p2sb_ofdata_to_platdata(struct udevice *dev)
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
int ret;
+ u32 base[2];
+ ret = dev_read_u32_array(dev, "early-regs", base, ARRAY_SIZE(base));
+ if (ret)
+ return log_msg_ret("Missing/short early-regs", ret);
+ plat->mmio_base = base[0];
+ /* TPL sets up the initial BAR */
if (spl_phase() == PHASE_TPL) {
- u32 base[2];
-
- /* TPL sets up the initial BAR */
- ret = dev_read_u32_array(dev, "early-regs", base,
-ARRAY_SIZE(base));
- if (ret)
- return log_msg_ret("Missing/short early-regs", ret);
- plat->mmio_base = base[0];
plat->bdf = pci_get_devfn(dev);
if (plat->bdf < 0)
return log_msg_ret("Cannot get p2sb PCI address",
plat->bdf);
}
+ upriv->mmio_base = plat->mmio_base;
#else
plat->mmio_base = plat->dtplat.early_regs[0];
plat->bdf = pci_ofplat_get_devfn(plat->dtplat.reg[0]);
-#endif
upriv->mmio_base = plat->mmio_base;
- debug("p2sb: mmio_base=%x\n", (uint)plat->mmio_base);
+#endif
return 0;
}
static int p2sb_probe(struct udevice *dev)
{
- if (spl_phase() == PHASE_TPL) {
+ if (spl_phase() == PHASE_TPL)
return p2sb_early_init(dev);
- } else {
- struct p2sb_platdata *plat = dev_get_platdata(dev);
-
- plat->mmio_base = dev_read_addr_pci(dev);
- /* Don't set BDF since it should not be used */
- if (!plat->mmio_base || plat->mmio_base == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- if (spl_phase() == PHASE_SPL)
- return p2sb_spl_init(dev);
- }
+ else if (spl_phase() == PHASE_SPL)
+ return p2sb_spl_init(dev);
return 0;
}
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 08/29] x86: Correct wording of coreboot source code
Some files are taken or modified from coreboot, but the files are no-longer part of the coreboot project. Fix the wording in a few places. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Wolfgang Wallner --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/x86/cpu/coreboot/timestamp.c | 4 ++-- arch/x86/include/asm/arch-coreboot/timestamp.h | 4 ++-- arch/x86/include/asm/intel_pinctrl_defs.h | 2 -- 3 files changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c index e698200d704..e8ccaf22129 100644 --- a/arch/x86/cpu/coreboot/timestamp.c +++ b/arch/x86/cpu/coreboot/timestamp.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * This file is part of the coreboot project. - * * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * Modified from the coreboot version */ #include diff --git a/arch/x86/include/asm/arch-coreboot/timestamp.h b/arch/x86/include/asm/arch-coreboot/timestamp.h index 9320afba561..85d42c02c46 100644 --- a/arch/x86/include/asm/arch-coreboot/timestamp.h +++ b/arch/x86/include/asm/arch-coreboot/timestamp.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * This file is part of the coreboot project. - * * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * Taken from the coreboot version */ #ifndef __COREBOOT_TIMESTAMP_H__ diff --git a/arch/x86/include/asm/intel_pinctrl_defs.h b/arch/x86/include/asm/intel_pinctrl_defs.h index 6da06bb52b4..1ea141f082f 100644 --- a/arch/x86/include/asm/intel_pinctrl_defs.h +++ b/arch/x86/include/asm/intel_pinctrl_defs.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * This file is part of the coreboot project. - * * Copyright (C) 2015-2016 Intel Corp. * Copyright 2019 Google LLC * -- 2.26.0.292.g33ef6b2f38-goog
[PATCH v5 07/29] dm: pci: Allow disabling auto-config for a device
Add a means to avoid configuring a device when needed. Add an explanation
of why this is useful to the binding file.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v5: None
Changes in v4: None
Changes in v3:
Drop acpi,name in example
Changes in v2: None
doc/device-tree-bindings/pci/x86-pci.txt | 23 +++
drivers/pci/pci-uclass.c | 2 ++
2 files changed, 25 insertions(+)
diff --git a/doc/device-tree-bindings/pci/x86-pci.txt
b/doc/device-tree-bindings/pci/x86-pci.txt
index 3aa5bd9a46c..95e370b3e72 100644
--- a/doc/device-tree-bindings/pci/x86-pci.txt
+++ b/doc/device-tree-bindings/pci/x86-pci.txt
@@ -10,6 +10,17 @@ Optional properties:
configuration in TPL/SPL to reduce code size and boot time, since these
phases only know about a small subset of PCI devices.
+For PCI devices the following optional property is available:
+
+- pci,no-autoconfig : Don't automatically configure this PCI device at all.
+ This is used when the device is statically configured and must maintain
+ this same config throughout the boot process. An example is a serial
+ UART being used to debug PCI configuration, since reconfiguring it stops
+ the UART from working until the driver is re-probed, and this can cause
+ output to be lost. This should not generally be used in production code,
+ although it is often harmless.
+
+
Example:
pci {
@@ -21,4 +32,16 @@ pci {
0x4200 0x0 0xb000 0xb000 0 0x1000
0x0100 0x0 0x1000 0x1000 0 0xefff>;
u-boot,skip-auto-config-until-reloc;
+
+
+ serial: serial@18,2 {
+ reg = <0x0200c210 0 0 0 0>;
+ u-boot,dm-pre-reloc;
+ compatible = "intel,apl-ns16550";
+ early-regs = <0xde00 0x20>;
+ reg-shift = <2>;
+ clock-frequency = <1843200>;
+ current-speed = <115200>;
+ pci,no-autoconfig;
+ };
};
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 94733662b12..213381da6bd 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -536,6 +536,8 @@ int pci_auto_config_devices(struct udevice *bus)
int ret;
debug("%s: device %s\n", __func__, dev->name);
+ if (dev_read_bool(dev, "pci,no-autoconfig"))
+ continue;
ret = dm_pciauto_config_device(dev);
if (ret < 0)
return ret;
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 06/29] tpm: Don't cleanup unless an error happens
At present the cleanup() method is called on every transfer. It should
only be called on failing transfers. Fix this and tidy up the error
handling a little.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/tpm/tpm-uclass.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c
index 1b11c93194d..71d58070062 100644
--- a/drivers/tpm/tpm-uclass.c
+++ b/drivers/tpm/tpm-uclass.c
@@ -72,7 +72,7 @@ int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf,
size_t send_size,
struct tpm_ops *ops = tpm_get_ops(dev);
ulong start, stop;
uint count, ordinal;
- int ret, ret2;
+ int ret, ret2 = 0;
if (ops->xfer)
return ops->xfer(dev, sendbuf, send_size, recvbuf, recv_size);
@@ -120,9 +120,16 @@ int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf,
size_t send_size,
}
} while (ret);
- ret2 = ops->cleanup ? ops->cleanup(dev) : 0;
+ if (ret) {
+ if (ops->cleanup) {
+ ret2 = ops->cleanup(dev);
+ if (ret2)
+ return log_msg_ret("cleanup", ret2);
+ }
+ return log_msg_ret("xfer", ret);
+ }
- return ret2 ? ret2 : ret;
+ return 0;
}
UCLASS_DRIVER(tpm) = {
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 01/29] cpu: Support querying the address width
Different CPUs may support different address widths, meaning the amount of
memory they can address. Add a property for this to the cpu_info struct.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/cpu/cpu_sandbox.c | 1 +
include/cpu.h | 2 ++
test/dm/cpu.c | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c
index ff87e8adca3..05b384f6a45 100644
--- a/drivers/cpu/cpu_sandbox.c
+++ b/drivers/cpu/cpu_sandbox.c
@@ -19,6 +19,7 @@ int cpu_sandbox_get_info(struct udevice *dev, struct cpu_info
*info)
{
info->cpu_freq = 42 * 42 * 42 * 42 * 42;
info->features = 0x42424242;
+ info->address_width = IS_ENABLED(CONFIG_PHYS_64BIT) ? 64 : 32;
return 0;
}
diff --git a/include/cpu.h b/include/cpu.h
index 28dd48feb8f..6b1b6b37b3b 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -44,10 +44,12 @@ enum {
*
* @cpu_freq: Current CPU frequency in Hz
* @features: Flags for supported CPU features
+ * @address_width: Width of the CPU address space in bits (e.g. 32)
*/
struct cpu_info {
ulong cpu_freq;
ulong features;
+ uint address_width;
};
struct cpu_ops {
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index f5f1caef716..e6dc576ea3c 100644
--- a/test/dm/cpu.c
+++ b/test/dm/cpu.c
@@ -33,6 +33,7 @@ static int dm_test_cpu(struct unit_test_state *uts)
ut_assertok(cpu_get_info(dev, ));
ut_asserteq(info.cpu_freq, 42 * 42 * 42 * 42 * 42);
ut_asserteq(info.features, 0x42424242);
+ ut_asserteq(info.address_width, 32);
ut_asserteq(cpu_get_count(dev), 42);
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 00/29] dm: Add programmatic generation of ACPI tables (part A)
This is split from the original series in an attempt to get things applied in chunks. The first 20 or so patches here have been reviewed and the changes here incorporate those comments. Changes in v5: - Tweak unused naming and comments - Capitalise ACPI_OPS_PTR since it includes a comma - Capitalise ACPI_OPS_PTR since it includes a comma - Update commit message to mention dropping the #ifdef CONFIG_X86 - Mess with the table ordering a little more - Add #ifndef CONFIG_SANDBOX to maintain bisectability without merging patches - Drop bisectability changes Changes in v4: - Fix indentation of unused - Calculate the padding - Put 'interrupts-extended' property on one line - Rename acpi-probed to linux,probed - Note that linux,probed is an out-of-tree feature - Move ACPI makefile line outside the ifdef CONFIG_SPL_BUILD - Add a comment about the MADT table version - Add SPCR - Update comment to include tables defined or reserved by ACPI - Drop ASL_REVISION - Separate out the log newline - Update comment in acpi_inc_align() to show the alignment - Put back cast on table_compute_checksum() - Rename list_fact() to list_fadt() - Add a comment to dump_hdr() Changes in v3: Drop acpi,name in example - Fix indenting error mentioned by Andy Shevchenko - Fix stray #endif - Drop 'Intel' from 'Intel ACPI' - Reword commit message to drop the bit about ACPI being complicated - Compute ACPI_NAME_MAX from ACPI_NAME_LEN - Rename acpi_return_name() to acpi_copy_name() - Use strncpy() instead of strcpy() in acpi_copy_name() - Split out hid-over-i2c into its own patch - Drop mention of PRIC - Rename acpi,desc to acpi,ddn - Correct description of acpi,probed - Drop hid-descr-addr - Just add the device.txt binding file in this patch - Change the example to ELAN - Add a pointer to information about acpi,compatible - Add new patch to move acpi_s3.h to include/acpi/ - Update commit message to say that we move most of its contents - Move acpi_table.h to include/acpi - Add forward declarations for the functions - Fix file comment for acpi_table.c - Fix a few typos - Make use of BIT() - Fix DMA_ typo - Add missing error check in acpi_create_dmar() - Drop duplicate assert - Add new patch to add hexdump.h to the unit test header - Rename acpi_align_large() to acpi_align64() - Fix 'RSDP' typo - Fix 'XDST' typo - Move acpi_align_large() out of dm_test_acpi_setup_base_tables() - Beef up the comment explaining how the unaligned address is used Changes in v2: - Don't bracket the definitions with DM_SPI - Add trailing commas to enum - Drop the other comment change since it is already applied - Drop the Chrome OS pieces - Rename the 'coreboot' console to 'U-Boot' - Move LOGC_ACPI definition to this patch - Fix definition of HID - Infer hid-over-i2c CID value - Add the hid-over-i2c binding document - Add in the acpi_table.h header file to this patch - Move the sandbox acpi_table.h header file to an earlier patch - Use #defines for MADT and MCFG version numbers - Drop two unnecessary __packed - Move __packed to after struct - Drop definition of ACPI_TABLE_CREATOR - Make _acpi_write_dev_tables() static and switch argument order - Generalise the ACPI function recursion with acpi_recurse_method() Simon Glass (29): cpu: Support querying the address width spi: Add SPI mode enums tpm: cr50: Release locality on exit tpm: cr50: Add a comment for cr50_priv tpm: cr50: Use the correct GPIO binding tpm: Don't cleanup unless an error happens dm: pci: Allow disabling auto-config for a device x86: Correct wording of coreboot source code x86: apl: Move p2sb ofdata reading to the correct method pci: Adjust dm_pci_read_bar32() to return errors correctly x86: apl: Add Global NVS table header dm: core: Add basic ACPI support dts: Add a binding for hid-over-i2c acpi: Add a binding for ACPI settings in the device tree acpi: Add a simple sandbox test x86: Move acpi_s3.h to include/acpi/ x86: Move acpi_table header to main include/ directory acpi: Add an __ACPI__ preprocessor symbol acpi: Add a central location for table version numbers acpi: Add support for DMAR test: Add hexdump.h to the unit test header acpi: Add a method to write tables for a device acpi: Convert part of acpi_table to use acpi_ctx x86: Allow devices to write ACPI tables acpi: Drop code for missing XSDT from acpi_write_rsdp() acpi: Move acpi_add_table() to generic code acpi: Put table-setup code in its own function acpi: Move the xsdt pointer to acpi_ctx acpi: Add an acpi command arch/sandbox/dts/test.dts | 8 + arch/sandbox/include/asm/acpi_table.h | 9 + arch/sandbox/include/asm/global_data.h| 1 + arch/x86/cpu/apollolake/cpu_spl.c | 2 +- arch/x86/cpu/apollolake/fsp_s.c | 2 +- arch/x86/cpu/apollolake/pmc.c | 2 +- arch/x86/cpu/baytrail/acpi.c | 6 +- arch/x86/cpu/coreboot/timestamp.c | 4 +- arch/x86/cpu/cpu.c
[PATCH v5 03/29] tpm: cr50: Release locality on exit
At present the cr50 driver claims the locality and does not release it for
Linux. This causes problems. Fix this by tracking what is claimed, and
adding a 'remove' method.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/tpm/cr50_i2c.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
index b904a7d426e..b30f55b40d3 100644
--- a/drivers/tpm/cr50_i2c.c
+++ b/drivers/tpm/cr50_i2c.c
@@ -206,7 +206,7 @@ static int release_locality(struct udevice *dev, int force)
cr50_i2c_write(dev, addr, , 1);
}
- priv->locality = 0;
+ priv->locality = -1;
return 0;
}
@@ -499,6 +499,7 @@ static int process_reset(struct udevice *dev)
static int claim_locality(struct udevice *dev, int loc)
{
const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
+ struct cr50_priv *priv = dev_get_priv(dev);
u8 access;
int ret;
@@ -525,6 +526,7 @@ static int claim_locality(struct udevice *dev, int loc)
return -EPERM;
}
log_info("Claimed locality %d\n", loc);
+ priv->locality = loc;
return 0;
}
@@ -559,7 +561,11 @@ static int cr50_i2c_open(struct udevice *dev)
static int cr50_i2c_cleanup(struct udevice *dev)
{
- release_locality(dev, 1);
+ struct cr50_priv *priv = dev_get_priv(dev);
+
+ printf("%s: cleanup %d\n", __func__, priv->locality);
+ if (priv->locality != -1)
+ release_locality(dev, 1);
return 0;
}
@@ -631,6 +637,7 @@ static int cr50_i2c_probe(struct udevice *dev)
return log_msg_ret("vendor-id", -EXDEV);
}
priv->vendor = vendor;
+ priv->locality = -1;
return 0;
}
@@ -655,5 +662,7 @@ U_BOOT_DRIVER(cr50_i2c) = {
.ops= _i2c_ops,
.ofdata_to_platdata = cr50_i2c_ofdata_to_platdata,
.probe = cr50_i2c_probe,
+ .remove = cr50_i2c_cleanup,
.priv_auto_alloc_size = sizeof(struct cr50_priv),
+ .flags = DM_FLAG_OS_PREPARE,
};
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 02/29] spi: Add SPI mode enums
With ACPI we need to describe the settings of the SPI bus. Add enums to
handle this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Don't bracket the definitions with DM_SPI
- Add trailing commas to enum
include/spi.h | 33 +
1 file changed, 33 insertions(+)
diff --git a/include/spi.h b/include/spi.h
index 852f570eaa8..2b4929fc79d 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -66,6 +66,39 @@ struct dm_spi_slave_platdata {
#endif /* CONFIG_DM_SPI */
+/**
+ * enum spi_clock_phase - indicates the clock phase to use for SPI (CPHA)
+ *
+ * @SPI_CLOCK_PHASE_FIRST: Data sampled on the first phase
+ * @SPI_CLOCK_PHASE_SECOND: Data sampled on the second phase
+ */
+enum spi_clock_phase {
+ SPI_CLOCK_PHASE_FIRST,
+ SPI_CLOCK_PHASE_SECOND,
+};
+
+/**
+ * enum spi_wire_mode - indicates the number of wires used for SPI
+ *
+ * @SPI_4_WIRE_MODE: Normal bidirectional mode with MOSI and MISO
+ * @SPI_3_WIRE_MODE: Unidirectional version with a single data line SISO
+ */
+enum spi_wire_mode {
+ SPI_4_WIRE_MODE,
+ SPI_3_WIRE_MODE,
+};
+
+/**
+ * enum spi_polarity - indicates the polarity of the SPI bus (CPOL)
+ *
+ * @SPI_POLARITY_LOW: Clock is low in idle state
+ * @SPI_POLARITY_HIGH: Clock is high in idle state
+ */
+enum spi_polarity {
+ SPI_POLARITY_LOW,
+ SPI_POLARITY_HIGH,
+};
+
/**
* struct spi_slave - Representation of a SPI slave
*
--
2.26.0.292.g33ef6b2f38-goog
[PATCH v5 04/29] tpm: cr50: Add a comment for cr50_priv
Add a comment for the private structure
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Drop the other comment change since it is already applied
drivers/tpm/cr50_i2c.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
index b30f55b40d3..c1d2d2fa381 100644
--- a/drivers/tpm/cr50_i2c.c
+++ b/drivers/tpm/cr50_i2c.c
@@ -34,6 +34,15 @@ enum {
CR50_MAX_BUF_SIZE = 63,
};
+/**
+ * struct cr50_priv - Private driver data
+ *
+ * @ready_gpio: GPIO to use to check if the TPM is ready
+ * @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio)
+ * @locality: Currenttly claimed locality (-1 if none)
+ * @vendor: vendor: Vendor ID for TPM
+ * @use_irq: true to use @irq, false to use @ready if available
+ */
struct cr50_priv {
struct gpio_desc ready_gpio;
struct irq irq;
--
2.26.0.292.g33ef6b2f38-goog
Re: [PATCH v3 17/29] x86: Move acpi_table header to main include/ directory
Hi Andy, On Wed, 8 Apr 2020 at 11:05, Andy Shevchenko wrote: > > On Tue, Apr 07, 2020 at 08:57:27PM -0600, Simon Glass wrote: > > On Fri, 3 Apr 2020 at 06:58, Andy Shevchenko > > wrote: > > > > > > On Mon, Mar 30, 2020 at 05:12:53PM -0600, Simon Glass wrote: > > > > This file is potentially useful to other architectures saddled with ACPI > > > > so move most of its contents to a common location. > > > > > > It's not just potentially, it's definitely useful. > > > But this makes me think, why we don't incorporate ACPICA headers as is? > > > > Due to code style and the vast amount of unused code. > > So, it will be interesting journey over the same problems then. > But it's your problem to maintain this :-) If Intel is interested in maintaining this in U-Boot let us know. So long as the code style is right as we don't add dead code it should be fine. Regards, Simon
Re: [PATCH] Series-to: u-boot Cover-letter: Fix Typo error in Makefile
Hi, On Wed, 8 Apr 2020 at 09:39, Sicris wrote: > > This patch fixes the typo error in Makefile where > -I$(srctree)/arch/$(ARCH)/thumb1/include is not picked up > in the compiler flag when compiling for thumb2. > END > > Signed-off-by: Sicris > --- > Somehow your patman tags have come through in the header. They should each be on a separate line in the commit. > Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Regards, Simon
Re: [PATCH v3 12/29] dm: core: Add basic ACPI support
Hi Andy, On Wed, 8 Apr 2020 at 11:02, Andy Shevchenko wrote: > > On Tue, Apr 07, 2020 at 08:57:24PM -0600, Simon Glass wrote: > > On Fri, 3 Apr 2020 at 05:35, Andy Shevchenko > > wrote: > > > On Mon, Mar 30, 2020 at 05:12:48PM -0600, Simon Glass wrote: > > ... > > > > > + strncpy(out_name, name, ACPI_NAME_MAX); > > > > > > memcpy()? > > > > strcpy() seems better since it doesn't rely on the correct string in name. > > Definitely not. It has no boundary checks. > > > > > + out_name[ACPI_NAME_LEN] = '\0'; > > > > > > I dunno if compiler is clever enough to catch this and avoid any warnings. > > > > I don't see any warnings. > > strncpy() fine then. > > > > Also it seems above should also have _LEN, and not _MAX. > > > > Do you mean for the strncpy()? I could do that but I still want to set > > the terminator to nul so that the string is definitely terminated. > > Terminator can be not present. > I should be > > strncpy(out_name, name, ACPI_NAME_LEN); > out_name[ACPI_NAME_LEN] = '\0'; Why? The code I have seems to work just fine? Regards, Simon
Re: [PATCH v3 10/29] pci: Adjust dm_pci_read_bar32() to return errors correctly
HI Andy,
On Wed, 8 Apr 2020 at 10:58, Andy Shevchenko
wrote:
>
> On Tue, Apr 07, 2020 at 08:57:20PM -0600, Simon Glass wrote:
> > Hi Andy,
> >
> > On Fri, 3 Apr 2020 at 05:22, Andy Shevchenko
> > wrote:
> > >
> > > On Mon, Mar 30, 2020 at 05:12:46PM -0600, Simon Glass wrote:
> > > > At present if reading a BAR returns 0x (e.g. the device is not
> > > > present) then the value is masked and a different value is returned.
> > > > This makes it harder to detect the problem when debugging.
> > >
> > > The above ('the device is not present') is actually not correct.
> > > BAR is not mandatory register and detection is described in PCI spec.
> >
> > What change are you suggesting here? I suggest 'not present' as an
> > example of why this might happen.
>
> I suggest to follow PCI spec.
> Thus, the code below is fragile and working by luck.
I don't know what you are suggesting. This allows an error to be
reported in the common case and helps people discover mistakes in the
driver flow. What is your suggestion?
Rgards,
SImon
>
> > > To get device presence one may have check Vendor ID / Device ID pair
> > > rather
> > > then BAR.
> > >
> > > > Update the function to avoid masking in this case.
> > > >
> > > > Signed-off-by: Simon Glass
> > > > Reviewed-by: Bin Meng
> > > > Reviewed-by: Wolfgang Wallner
> > > > ---
> > > >
> > > > Changes in v3: None
> > > > Changes in v2: None
> > > >
> > > > drivers/pci/pci-uclass.c | 9 -
> > > > 1 file changed, 8 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> > > > index ceb64517047..d2e10d6868a 100644
> > > > --- a/drivers/pci/pci-uclass.c
> > > > +++ b/drivers/pci/pci-uclass.c
> > > > @@ -1213,7 +1213,14 @@ u32 dm_pci_read_bar32(const struct udevice *dev,
> > > > int barnum)
> > > >
> > > > bar = PCI_BASE_ADDRESS_0 + barnum * 4;
> > > > dm_pci_read_config32(dev, bar, );
> > > > - if (addr & PCI_BASE_ADDRESS_SPACE_IO)
> > > > +
> > > > + /*
> > > > + * If we get an invalid address, return this so that comparisons
> > > > with
> > > > + * FDT_ADDR_T_NONE work correctly
> > > > + */
> > > > + if (addr == 0x)
> > > > + return addr;
> > > > + else if (addr & PCI_BASE_ADDRESS_SPACE_IO)
> > > > return addr & PCI_BASE_ADDRESS_IO_MASK;
> > > > else
> > > > return addr & PCI_BASE_ADDRESS_MEM_MASK;
> > > > --
> > > > 2.26.0.rc2.310.g2932bb562d-goog
> > > >
> > >
> > > --
> > > With Best Regards,
> > > Andy Shevchenko
> > >
> > >
> >
> > Regards,
> > Simon
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
Re: [PATCH V2] mmc: zynq: parse dt when probing
On 4/7/20 11:15 PM, Benedikt Grassl wrote:
> Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
> is not evaluated. This results in the bus width staying at its default
> value (4 bit in HS200 mode).
> Fix this by calling mmc_of_parse. This function also checks for the
> "no-1-8-v" and "max-frequency" entries. Remove the handling of those
> nodes from this driver.
>
> Signed-off-by: Benedikt Grassl
> ---
> drivers/mmc/sdhci.c | 3 +--
> drivers/mmc/zynq_sdhci.c | 15 ++-
> include/sdhci.h | 1 -
> 3 files changed, 7 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index 520c9f9feb..372dc0a820 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -839,8 +839,7 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct
> sdhci_host *host,
> cfg->host_caps &= ~MMC_MODE_HS_52MHz;
> }
>
> - if (!(cfg->voltages & MMC_VDD_165_195) ||
> - (host->quirks & SDHCI_QUIRK_NO_1_8_V))
> + if (!(cfg->voltages & MMC_VDD_165_195))
> caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
> SDHCI_SUPPORT_DDR50);
>
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index da3ff53da1..cfa61af265 100644
> --- a/drivers/mmc/zynq_sdhci.c
> +++ b/drivers/mmc/zynq_sdhci.c
> @@ -22,14 +22,12 @@ DECLARE_GLOBAL_DATA_PTR;
> struct arasan_sdhci_plat {
> struct mmc_config cfg;
> struct mmc mmc;
> - unsigned int f_max;
> };
>
> struct arasan_sdhci_priv {
> struct sdhci_host *host;
> u8 deviceid;
> u8 bank;
> - u8 no_1p8;
> };
>
> #if defined(CONFIG_ARCH_ZYNQMP)
> @@ -238,8 +236,9 @@ static int arasan_sdhci_probe(struct udevice *dev)
> host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE;
> #endif
>
> - if (priv->no_1p8)
> - host->quirks |= SDHCI_QUIRK_NO_1_8_V;
> + ret = mmc_of_parse(dev, >cfg);
> + if (ret)
> + return ret;
>
> host->max_clk = clock;
>
> @@ -247,10 +246,12 @@ static int arasan_sdhci_probe(struct udevice *dev)
> host->mmc->dev = dev;
> host->mmc->priv = host;
>
> - ret = sdhci_setup_cfg(>cfg, host, plat->f_max,
> + ret = sdhci_setup_cfg(>cfg, host,
> + CONFIG_ZYNQ_SDHCI_MAX_FREQ,
> CONFIG_ZYNQ_SDHCI_MIN_FREQ);
you have removed the parsing "max-frequency" from below code, because it's
parsed from mmc_of_parse().
But It's passing to CONFIG_ZYNQ_SDHCI_MAX_FREQ again. Is it correct?
Could you check one more?
Best Regards,
Jaehoon Chung
> if (ret)
> return ret;
> +
> upriv->mmc = host->mmc;
>
> return sdhci_probe(dev);
> @@ -258,7 +259,6 @@ static int arasan_sdhci_probe(struct udevice *dev)
>
> static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
> {
> - struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
> struct arasan_sdhci_priv *priv = dev_get_priv(dev);
>
> priv->host = calloc(1, sizeof(struct sdhci_host));
> @@ -277,10 +277,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct
> udevice *dev)
>
> priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1);
> priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1);
> - priv->no_1p8 = dev_read_bool(dev, "no-1-8-v");
>
> - plat->f_max = dev_read_u32_default(dev, "max-frequency",
> -CONFIG_ZYNQ_SDHCI_MAX_FREQ);
> return 0;
> }
>
> diff --git a/include/sdhci.h b/include/sdhci.h
> index aa4378fd57..0ef8c2ed62 100644
> --- a/include/sdhci.h
> +++ b/include/sdhci.h
> @@ -243,7 +243,6 @@
> #define SDHCI_QUIRK_BROKEN_HISPD_MODEBIT(5)
> #define SDHCI_QUIRK_WAIT_SEND_CMD(1 << 6)
> #define SDHCI_QUIRK_USE_WIDE8(1 << 8)
> -#define SDHCI_QUIRK_NO_1_8_V (1 << 9)
>
> /* to make gcc happy */
> struct sdhci_host;
>
Re: [PATCH] mmc: zynq: parse dt when probing
On 4/8/20 3:41 PM, Michal Simek wrote: > On 08. 04. 20 0:38, Jaehoon Chung wrote: >> On 4/6/20 11:35 PM, Benedikt Grassl wrote: >>> Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes >>> is not evaluated. This results in the bus width staying at its default >>> value (4 bit in HS200 mode). >>> Fix this by parsing the device tree while probing. >>> >>> Signed-off-by: Benedikt Grassl >> >> Reviewed-by: Jaehoon Chung > > just FYI. v2 was sent because of some missing parts. Thanks. I found it. > > M > >
Re: [GIT PULL] Pull request: u-boot-imx u-boot-imx-20200408
On Wed, Apr 08, 2020 at 10:18:51AM +0200, Stefano Babic wrote: > Hi Tom, > > fixes requested by Igor + environment fix for mx7sabresd. > > > The following changes since commit 0965d2ac93db3900ae20ff0b2e176baf672b63cc: > > Prepare v2020.04-rc5 (2020-04-06 17:44:14 -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git > tags/u-boot-imx-20200408 > > for you to fetch changes up to c94f405ce993ce57d9577bca43cebe54689f4f8a: > > mx7dsabre: Fix ramdisk_addr* for distro boot (2020-04-07 10:43:25 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: Re: [PATCH v3 13/29] dts: Add a binding for hid-over-i2c
On Wed, Apr 8, 2020 at 11:40 PM Andy Shevchenko wrote: > On Wed, Apr 8, 2020 at 10:39 PM Wolfgang Wallner > wrote: > > > On Tue, Apr 07, 2020 at 08:58:13PM -0600, Simon Glass wrote: > > > > On Tue, 31 Mar 2020 at 13:25, Wolfgang Wallner > > > > wrote: > > > > > >An: u-boot@lists.denx.de > > > > > >Von: "Simon Glass" > > > > > >Datum: 31.03.2020 01:14 > > > > > >Kopie: "Andy Shevchenko" , > > > > > >"Wolfgang Wallner" , "Leif > > > > > >Lindholm" , "Simon Glass" > > > > > >Betreff: [PATCH v3 14/29] acpi: Add a binding for ACPI settings in > > > > > >the device tree > > > > > > > > The _DSD-method for "PRP0001"-devices in ACPI allows to use Devicetree > > > > > properties inside ACPI, especially it allows to re-use Devicetree's > > > > > "compatible"-property. But this is for a different use case (using > > > > > Devicetree > > > > > properties inside ACPI, not add ACPI properties in Devicetree). > > > > > > Before we are going further with this here is a BIG CAVEAT. > > > > > > PRP0001 MUST NOT be used in production devices. > > > > > > This has been derived solely for debugging / pre-production testing / etc > > > purposes. The real devices must have an official ACPI _HID. > > > > Thanks for pointing this out! I was not aware of this. > > I have tried to understand how the PRP0001 is meant to be used, but could > > not > > find sufficient documentation. The best document I could find is > > Documentation/firmware-guide/acpi/enumeration.rst in the Linux kernel, and > > as far as I can tell the constraint that you mention is also not described > > there. > > > > Do you know any other resources regarding PRP0001, e.g. some kind of > > speficiation? > > I guess the best one is to ask somebody from UEFI Forum / ASWG. PRP is > a PNP ID for UEFI Forum. Basically last message in [3] from Rafael mentions his view on PRP0001. I guess there is still no document, although as I noticed the PRP prefix become official in a mean time. > > If PRP0001 is only for debugging, then I must also have misunderstood the > > Linux "device-property" API (define in include/linux/property.h). > > Not exactly. > > > There are some presentations available on the internet, e.g. [1], that I > > understand like PRP0001 + "device-property" API provide a way do access data > > from either Devicetree or ACPI, depending on what kind of platform you are > > on. > > No, these are not hard linked to each other (the relation is that > PRP0001 is a way to enumerate devices, which don't have dedicated ACPI > _HID, by using compatible property [1]). The _DSD per se (i.o.w. > device properties implementation in ACPI) is a different story [2]. > > And I put [3] here, interesting to read. However, at that time I was > quite far from this topic. > > [1]: > https://www.kernel.org/doc/html/latest/firmware-guide/acpi/enumeration.html#device-tree-namespace-link-device-id > [2]: > https://uefi.org/sites/default/files/resources/_DSD-implementation-guide-toplevel-1_2-3.htm. > [3]: https://patchwork.kernel.org/patch/7004241/ > > > [1] > > https://elinux.org/images/2/2d/Device_tree_acpi_compatibility-david_woodhouse-kernel_recipes_2015.pdf > > -- > With Best Regards, > Andy Shevchenko -- With Best Regards, Andy Shevchenko
Re: Re: [PATCH v3 13/29] dts: Add a binding for hid-over-i2c
On Wed, Apr 8, 2020 at 10:39 PM Wolfgang Wallner wrote: > > On Tue, Apr 07, 2020 at 08:58:13PM -0600, Simon Glass wrote: > > > On Tue, 31 Mar 2020 at 13:25, Wolfgang Wallner > > > wrote: > > > > >An: u-boot@lists.denx.de > > > > >Von: "Simon Glass" > > > > >Datum: 31.03.2020 01:14 > > > > >Kopie: "Andy Shevchenko" , > > > > >"Wolfgang Wallner" , "Leif > > > > >Lindholm" , "Simon Glass" > > > > >Betreff: [PATCH v3 14/29] acpi: Add a binding for ACPI settings in > > > > >the device tree > > > > > > The _DSD-method for "PRP0001"-devices in ACPI allows to use Devicetree > > > > properties inside ACPI, especially it allows to re-use Devicetree's > > > > "compatible"-property. But this is for a different use case (using > > > > Devicetree > > > > properties inside ACPI, not add ACPI properties in Devicetree). > > > > Before we are going further with this here is a BIG CAVEAT. > > > > PRP0001 MUST NOT be used in production devices. > > > > This has been derived solely for debugging / pre-production testing / etc > > purposes. The real devices must have an official ACPI _HID. > > Thanks for pointing this out! I was not aware of this. > I have tried to understand how the PRP0001 is meant to be used, but could not > find sufficient documentation. The best document I could find is > Documentation/firmware-guide/acpi/enumeration.rst in the Linux kernel, and > as far as I can tell the constraint that you mention is also not described > there. > > Do you know any other resources regarding PRP0001, e.g. some kind of > speficiation? I guess the best one is to ask somebody from UEFI Forum / ASWG. PRP is a PNP ID for UEFI Forum. > If PRP0001 is only for debugging, then I must also have misunderstood the > Linux "device-property" API (define in include/linux/property.h). Not exactly. > There are some presentations available on the internet, e.g. [1], that I > understand like PRP0001 + "device-property" API provide a way do access data > from either Devicetree or ACPI, depending on what kind of platform you are on. No, these are not hard linked to each other (the relation is that PRP0001 is a way to enumerate devices, which don't have dedicated ACPI _HID, by using compatible property [1]). The _DSD per se (i.o.w. device properties implementation in ACPI) is a different story [2]. And I put [3] here, interesting to read. However, at that time I was quite far from this topic. [1]: https://www.kernel.org/doc/html/latest/firmware-guide/acpi/enumeration.html#device-tree-namespace-link-device-id [2]: https://uefi.org/sites/default/files/resources/_DSD-implementation-guide-toplevel-1_2-3.htm. [3]: https://patchwork.kernel.org/patch/7004241/ > [1] > https://elinux.org/images/2/2d/Device_tree_acpi_compatibility-david_woodhouse-kernel_recipes_2015.pdf -- With Best Regards, Andy Shevchenko
Antwort: Re: [PATCH v3 13/29] dts: Add a binding for hid-over-i2c
Hi Andy, -"Andy Shevchenko" schrieb: - > > Betreff: Re: [PATCH v3 13/29] dts: Add a binding for hid-over-i2c > > On Tue, Apr 07, 2020 at 08:58:13PM -0600, Simon Glass wrote: > > On Tue, 31 Mar 2020 at 13:25, Wolfgang Wallner > > wrote: > > > >An: u-boot@lists.denx.de > > > >Von: "Simon Glass" > > > >Datum: 31.03.2020 01:14 > > > >Kopie: "Andy Shevchenko" , > > > >"Wolfgang Wallner" , "Leif > > > >Lindholm" , "Simon Glass" > > > >Betreff: [PATCH v3 14/29] acpi: Add a binding for ACPI settings in > > > >the device tree > > > > The _DSD-method for "PRP0001"-devices in ACPI allows to use Devicetree > > > properties inside ACPI, especially it allows to re-use Devicetree's > > > "compatible"-property. But this is for a different use case (using > > > Devicetree > > > properties inside ACPI, not add ACPI properties in Devicetree). > > Before we are going further with this here is a BIG CAVEAT. > > PRP0001 MUST NOT be used in production devices. > > This has been derived solely for debugging / pre-production testing / etc > purposes. The real devices must have an official ACPI _HID. Thanks for pointing this out! I was not aware of this. I have tried to understand how the PRP0001 is meant to be used, but could not find sufficient documentation. The best document I could find is Documentation/firmware-guide/acpi/enumeration.rst in the Linux kernel, and as far as I can tell the constraint that you mention is also not described there. Do you know any other resources regarding PRP0001, e.g. some kind of speficiation? If PRP0001 is only for debugging, then I must also have misunderstood the Linux "device-property" API (define in include/linux/property.h). There are some presentations available on the internet, e.g. [1], that I understand like PRP0001 + "device-property" API provide a way do access data from either Devicetree or ACPI, depending on what kind of platform you are on. regards, Wolfgang [1] https://elinux.org/images/2/2d/Device_tree_acpi_compatibility-david_woodhouse-kernel_recipes_2015.pdf
Re: [PATCH v3 27/29] acpi: Put table-setup code in its own function
Hi Andy, On Wed, 8 Apr 2020 at 11:11, Andy Shevchenko wrote: > > On Tue, Apr 07, 2020 at 08:57:52PM -0600, Simon Glass wrote: > > On Fri, 3 Apr 2020 at 07:32, Andy Shevchenko > > wrote: > > > > > > On Mon, Mar 30, 2020 at 05:13:03PM -0600, Simon Glass wrote: > > > > We always write three basic tables to ACPI at the start. Move this into > > > > its own function, along with acpi_fill_header(), so we can write a test > > > > for this code. > > > > > > ... > > > > > > > /* Re-calculate checksum */ > > > > rsdt->header.checksum = 0; > > > > - rsdt->header.checksum = table_compute_checksum((u8 *)rsdt, > > > > + rsdt->header.checksum = table_compute_checksum(rsdt, > > > > > > > > rsdt->header.length); > > > > Please can you keep the filenames / functions in your response? > > Fragments make it harder to find the code. > > I thought, obviously mistakenly, that git users know about git grep ... Well I'd appreciate it if you could keep them in. It is customary, and it avoids grepping as you say. > > > > Why suddenly casting is not needed in this patch? > > > Same question to the rest. > > > > > > (If it's a valid change, it should be in a separate patch) > > > > It was never needed. See the prototype for table_compute_checksum(). > > > > But I can put it back in. > > Depends on your preferences, but it's definitely not a material for this > change. Separate one? It isn't worth worrying about as a later commit drops it. Let's just leave it as you had it, with the cast. Regards, Simon
Re: [PATCH v4 21/31] acpi: Add a central location for table version numbers
Hi Andy,
On Wed, 8 Apr 2020 at 11:20, Andy Shevchenko
wrote:
>
> On Tue, Apr 07, 2020 at 09:00:57PM -0600, Simon Glass wrote:
> > Each ACPI table has its own version number. Add the version numbers in a
> > single function so we can keep them consistent and easily see what
> > versions are supported.
> >
> > Start a new acpi_table file in a generic directory to house this function.
> > We can move things over to this file from x86 as needed.
>
> ...
>
> > +/* FADT TABLE Revision values */
>
> Same comment?
>From below? OK
>
> > +#define ACPI_FADT_REV_ACPI_1_0 1
> > +#define ACPI_FADT_REV_ACPI_2_0 3
> > +#define ACPI_FADT_REV_ACPI_3_0 4
> > +#define ACPI_FADT_REV_ACPI_4_0 4
> > +#define ACPI_FADT_REV_ACPI_5_0 5
> > +#define ACPI_FADT_REV_ACPI_6_0 6
> > +
> > +/* MADT TABLE Revision values - note these do not match the ACPI revision
> > */
> > +#define ACPI_MADT_REV_ACPI_3_0 2
> > +#define ACPI_MADT_REV_ACPI_4_0 3
> > +#define ACPI_MADT_REV_ACPI_5_0 3
> > +#define ACPI_MADT_REV_ACPI_6_0 5
> > +
>
> /* MCFG TABLE Revision values */
>
> > +#define ACPI_MCFG_REV_ACPI_3_0 1
>
> ...
>
> > +enum acpi_tables {
> > + ACPITAB_BERT,
> > + ACPITAB_DBG2,
> > + ACPITAB_DMAR,
> > + ACPITAB_DSDT,
> > + ACPITAB_ECDT,
> > + ACPITAB_FACS,
> > + ACPITAB_FADT,
> > + ACPITAB_HEST,
> > + ACPITAB_HPET,
> > + ACPITAB_IVRS,
> > + ACPITAB_MADT,
> > + ACPITAB_MCFG,
> > + ACPITAB_RSDP,
> > + ACPITAB_RSDT,
> > + ACPITAB_SLIT,
> > + ACPITAB_SPCR,
> > + ACPITAB_SRAT,
> > + ACPITAB_SSDT,
> > + ACPITAB_TCPA,
> > + ACPITAB_TPM2,
> > + ACPITAB_XSDT,
> > +
> > + /* Additional proprietary tables */
>
> > + ACPITAB_NHLT,
>
> I didn't get the division. What proprietary means? For example NHLT spec is
> public now AFAIK. But SPCR, for instance, is an extension by Microsoft.
>
> Perhaps the division can be
> 1st group: ACPI spec defined
> 2nd: PCI SIG defined
> 3rd: UEFI ACPI extensions
>
This seems silly. Let's just have them in alpha order.
> ?
>
> > + ACPITAB_SPMI,
> > + ACPITAB_VFCT,
> > +
>
> > + ACPITAB_COUNT,
>
> Comma at the end, if it is a terminator line, is redundant.
Indeed, but it is the typical style in U-Boot. I can change it.
Regards,
Simon
Re: [PATCH 2/3] arm: caches: add DCACHE_DEFAULT_OPTION
On 4/8/20 9:07 PM, Patrick DELAUNAY wrote: > Hi > >> From: Marek Vasut >> Sent: mercredi 8 avril 2020 20:18 >> >> On 4/8/20 8:16 PM, Patrick DELAUNAY wrote: >>> Dear Marek, >>> From: Marek Vasut Sent: vendredi 3 avril 2020 23:29 On 4/3/20 10:28 AM, Patrick Delaunay wrote: > Add the new flags DCACHE_DEFAULT_OPTION to define the default option > to use according the compilation flags > CONFIG_SYS_ARM_CACHE_WRITETHROUGH or CONFIG_SYS_ARM_CACHE_WRITEALLOC. Can't you unify these macros into a single Kconfig "select" statement instead , and then just select the matching cache configuration in Kconfig ? >>> >>> Yes I will try, with 2 steps >>> - migrate existing CONFIG_SYS_ARM_CACHE_ in Kconfig >>> - add new option CONFIG_SYS_ARM_CACHE_OPTION >>> Or better yet, can't you extract this info from DT ? >>> >>> I don't think it is called before device tree parsing >>> >> >> The FDT access should be set up as one of the first things during U-Boot's >> boot_init_f , so it should be possible. > > But I try to activate de dcache to speed-up the device tree parsing > So the MMU function is now called really early, in arch init. > > Or I miss something. Ah, oops, please forget what I said.
RE: [PATCH 2/3] arm: caches: add DCACHE_DEFAULT_OPTION
Hi > From: Marek Vasut > Sent: mercredi 8 avril 2020 20:18 > > On 4/8/20 8:16 PM, Patrick DELAUNAY wrote: > > Dear Marek, > > > >> From: Marek Vasut > >> Sent: vendredi 3 avril 2020 23:29 > >> > >> On 4/3/20 10:28 AM, Patrick Delaunay wrote: > >>> Add the new flags DCACHE_DEFAULT_OPTION to define the default option > >>> to use according the compilation flags > >>> CONFIG_SYS_ARM_CACHE_WRITETHROUGH or > >> CONFIG_SYS_ARM_CACHE_WRITEALLOC. > >> > >> Can't you unify these macros into a single Kconfig "select" statement > >> instead , and then just select the matching cache configuration in Kconfig > >> ? > > > > Yes I will try, with 2 steps > > - migrate existing CONFIG_SYS_ARM_CACHE_ in Kconfig > > - add new option CONFIG_SYS_ARM_CACHE_OPTION > > > >> Or better yet, can't you extract this info from DT ? > > > > I don't think it is called before device tree parsing > > > > The FDT access should be set up as one of the first things during U-Boot's > boot_init_f , so it should be possible. But I try to activate de dcache to speed-up the device tree parsing So the MMU function is now called really early, in arch init. Or I miss something. Patrick
[RESEND PATCH v3 6/7] x86: Add a way to detect running from coreboot
If U-Boot is running from coreboot we need to skip low-level init. Add
an way to detect this and to set the gd flag.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to detect running from coreboot
Changes in v2: None
arch/x86/cpu/i386/cpu.c | 15 +++
arch/x86/include/asm/u-boot-x86.h | 7 +++
2 files changed, 22 insertions(+)
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index c8da7f10e9b..e43444c090b 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -447,10 +447,25 @@ int x86_cpu_init_f(void)
return 0;
}
+bool x86_detect_coreboot(void)
+{
+ u32 *ptr, *end;
+
+ /* We look for LBIO in the first 4K of RAM */
+ for (ptr = NULL, end = ptr + 0x400; ptr < end; ptr += 4) {
+ if (*ptr == 0x4f49424c) /* "LBIO" */
+ return true;
+ }
+
+ return false;
+}
+
int x86_cpu_reinit_f(void)
{
setup_identity();
setup_pci_ram_top();
+ if (x86_detect_coreboot())
+ gd->flags |= GD_FLG_NO_LL_INIT;
return 0;
}
diff --git a/arch/x86/include/asm/u-boot-x86.h
b/arch/x86/include/asm/u-boot-x86.h
index 3e5d56d0757..654880f91cb 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -43,6 +43,13 @@ int x86_cpu_reinit_f(void);
*/
int x86_cpu_init_tpl(void);
+/**
+ * x86_detect_coreboot() - See if U-Boot is being started from coreboot
+ *
+ * @return true if coreboot is running, false if U-Boot is running 'bare-metal'
+ */
+bool x86_detect_coreboot(void);
+
int cpu_init_f(void);
void setup_gdt(struct global_data *id, u64 *gdt_addr);
/*
--
2.26.0.292.g33ef6b2f38-goog
[RESEND PATCH v3 4/7] pci: Avoid auto-config when chain loading
When U-Boot is not the first-stage bootloader we don't want to
re-configure the PCI devices, since this has already been done. Add a
check to avoid this.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Drop patch 'dm: Avoid initing built-in devices when chain loading'
drivers/pci/pci-uclass.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index e2882e3b634..94733662b12 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1007,7 +1007,7 @@ static int pci_uclass_post_probe(struct udevice *bus)
if (ret)
return ret;
- if (CONFIG_IS_ENABLED(PCI_PNP) &&
+ if (CONFIG_IS_ENABLED(PCI_PNP) && ll_boot_init() &&
(!hose->skip_auto_config_until_reloc ||
(gd->flags & GD_FLG_RELOC))) {
ret = pci_auto_config_devices(bus);
@@ -1029,7 +1029,7 @@ static int pci_uclass_post_probe(struct udevice *bus)
* Note we only call this 1) after U-Boot is relocated, and 2)
* root bus has finished probing.
*/
- if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0)) {
+ if ((gd->flags & GD_FLG_RELOC) && bus->seq == 0 && ll_boot_init()) {
ret = fsp_init_phase_pci();
if (ret)
return ret;
--
2.26.0.292.g33ef6b2f38-goog
[RESEND PATCH v3 5/7] board: Add a gd flag for chain loading
When U-Boot is run from another boot loader, much of the low-level init
needs to be skipped.
Add a flag for this and adjust ll_boot_init() to use it.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add a new patch with a gd flag for chain loading
Changes in v2: None
include/asm-generic/global_data.h | 1 +
include/init.h| 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index 5d027329fe0..3dc51e49ef7 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -166,5 +166,6 @@ typedef struct global_data {
#define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */
#define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */
#define GD_FLG_WDT_READY 0x1 /* Watchdog is ready for use */
+#define GD_FLG_NO_LL_INIT 0x2 /* Don't perform low-level init*/
#endif /* __ASM_GENERIC_GBL_DATA_H */
diff --git a/include/init.h b/include/init.h
index 2a33a3fd1e4..64fdf124916 100644
--- a/include/init.h
+++ b/include/init.h
@@ -20,7 +20,7 @@ struct global_data;
#ifdef CONFIG_EFI_STUB
#define ll_boot_init() false
#else
-#define ll_boot_init() true
+#define ll_boot_init() (!(gd->flags & GD_FLG_NO_LL_INIT))
#endif
/*
--
2.26.0.292.g33ef6b2f38-goog
[RESEND PATCH v3 2/7] x86: apl: Skip init code when chain loading
When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/cpu/apollolake/fsp_s.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c index 1f22c1ea3c6..5d252b6 100644 --- a/arch/x86/cpu/apollolake/fsp_s.c +++ b/arch/x86/cpu/apollolake/fsp_s.c @@ -566,6 +566,8 @@ int arch_fsp_init_r(void) struct udevice *dev, *itss; int ret; + if (!ll_boot_init()) + return 0; /* * This must be called before any devices are probed. Put any probing * into arch_fsps_preinit() above. -- 2.26.0.292.g33ef6b2f38-goog
[RESEND PATCH v3 7/7] x86: Use the existing stack when chain-loading
With chromebook_coral we normally run TPL->SPL->U-Boot. This is the 'bare metal' case. When running from coreboot we put u-boot.bin in the RW_LEGACY portion of the image, e.g. with: cbfstool image-coral.serial.bin add-flat-binary -r RW_LEGACY \ -f /tmp/b/chromebook_coral/u-boot.bin -n altfw/u-boot \ -c lzma -l 0x111 -e 0x111 In this case U-Boot is run from coreboot (actually Depthcharge, its payload) so we cannot access CAR. Use the existing stack instead. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/cpu/start_from_spl.S | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/x86/cpu/start_from_spl.S b/arch/x86/cpu/start_from_spl.S index 22cab2dd6ce..75c328fd7a8 100644 --- a/arch/x86/cpu/start_from_spl.S +++ b/arch/x86/cpu/start_from_spl.S @@ -14,18 +14,30 @@ .globl _start .type _start, @function _start: - /* Set up memory using the existing stack */ + /* +* If running from coreboot, CAR is no-longer available. Use the +* existing stack, which is large enough. +*/ + callx86_detect_coreboot + cmp $0, %eax + jne use_existing_stack + movl$(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %eax #ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE subl$CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %eax #endif + jmp 2f /* -* We don't subject CONFIG_DCACHE_RAM_MRC_VAR_SIZE since memory is +* We don't subtract CONFIG_DCACHE_RAM_MRC_VAR_SIZE since memory is * already set up. This has the happy side-effect of putting gd in a * new place separate from SPL, so the memset() in * board_init_f_init_reserve() does not cause any problems (otherwise * it would zero out the gd and crash) */ + /* Set up memory using the existing stack */ +use_existing_stack: + mov %esp, %eax +2: callboard_init_f_alloc_reserve mov %eax, %esp -- 2.26.0.292.g33ef6b2f38-goog
[RESEND PATCH v3 1/7] x86: fsp: Allow skipping init code when chain loading
It is useful to be able to boot the same x86 image on a device with or
without a first-stage bootloader. For example, with chromebook_coral, it
is helpful for testing to be able to boot the same U-Boot (complete with
FSP) on bare metal and from coreboot. It allows checking of things like
CPU speed, comparing registers, ACPI tables and the like.
When U-Boot is not the first-stage bootloader much of this code is not
needed and can break booting. Add checks for this to the FSP code.
Rather than checking for the amount of available SDRAM, just use 1GB in
this situation, which should be safe. Using 2GB may run into a memory
hole on some SoCs.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/lib/fsp/fsp_dram.c | 8
arch/x86/lib/fsp/fsp_graphics.c | 3 +++
arch/x86/lib/fsp2/fsp_dram.c| 10 ++
arch/x86/lib/fsp2/fsp_init.c| 2 +-
4 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 9ce0ddf0d3d..15e82de2fe1 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -44,6 +44,14 @@ int dram_init_banksize(void)
phys_addr_t low_end;
uint bank;
+ if (!ll_boot_init()) {
+ gd->bd->bi_dram[0].start = 0;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+
+ mtrr_add_request(MTRR_TYPE_WRBACK, 0, gd->ram_size);
+ return 0;
+ }
+
low_end = 0;
for (bank = 1, hdr = gd->arch.hob_list;
bank < CONFIG_NR_DRAM_BANKS && !end_of_hob(hdr);
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c
index 226c7e66b3f..98b762209f9 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp/fsp_graphics.c
@@ -78,6 +78,9 @@ static int fsp_video_probe(struct udevice *dev)
struct vesa_mode_info *vesa = _info.vesa;
int ret;
+ if (!ll_boot_init())
+ return 0;
+
printf("Video: ");
/* Initialize vesa_mode_info structure */
diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c
index 90a238a2245..74835eebcea 100644
--- a/arch/x86/lib/fsp2/fsp_dram.c
+++ b/arch/x86/lib/fsp2/fsp_dram.c
@@ -12,11 +12,18 @@
#include
#include
#include
+#include
int dram_init(void)
{
int ret;
+ if (!ll_boot_init()) {
+ /* Use a small and safe amount of 1GB */
+ gd->ram_size = SZ_1G;
+
+ return 0;
+ }
if (spl_phase() == PHASE_SPL) {
#ifdef CONFIG_HAVE_ACPI_RESUME
bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
@@ -68,6 +75,9 @@ int dram_init(void)
ulong board_get_usable_ram_top(ulong total_size)
{
+ if (!ll_boot_init())
+ return gd->ram_size;
+
#if CONFIG_IS_ENABLED(HANDOFF)
struct spl_handoff *ho = gd->spl_handoff;
diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c
index da9bd6b45cf..c7dc2ea2578 100644
--- a/arch/x86/lib/fsp2/fsp_init.c
+++ b/arch/x86/lib/fsp2/fsp_init.c
@@ -23,7 +23,7 @@ int arch_cpu_init_dm(void)
int ret;
/* Make sure pads are set up early in U-Boot */
- if (spl_phase() != PHASE_BOARD_F)
+ if (!ll_boot_init() || spl_phase() != PHASE_BOARD_F)
return 0;
/* Probe all pinctrl devices to set up the pads */
--
2.26.0.292.g33ef6b2f38-goog
[RESEND PATCH v3 3/7] x86: cpu: Skip init code when chain loading
When U-Boot is not the first-stage bootloader the interrupt and cache init
must be skipped, as well as init for various peripherals. Update the code
to add checks for this.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Drop the other check in interrupt_init() which is not needed now
arch/x86/cpu/cpu.c| 4 +++-
arch/x86/cpu/i386/interrupt.c | 6 --
arch/x86/lib/init_helpers.c | 3 +++
3 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index dae06949cc6..3db035c2c0e 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -239,8 +239,10 @@ int cpu_init_r(void)
struct udevice *dev;
int ret;
- if (!ll_boot_init())
+ if (!ll_boot_init()) {
+ uclass_first_device(UCLASS_PCI, );
return 0;
+ }
ret = x86_init_cpus();
if (ret)
diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c
index 4c7e9ea2151..e67a116ac1a 100644
--- a/arch/x86/cpu/i386/interrupt.c
+++ b/arch/x86/cpu/i386/interrupt.c
@@ -264,6 +264,9 @@ int interrupt_init(void)
struct udevice *dev;
int ret;
+ if (!ll_boot_init())
+ return 0;
+
/* Try to set up the interrupt router, but don't require one */
ret = irq_first_device_type(X86_IRQT_BASE, );
if (ret && ret != -ENODEV)
@@ -295,8 +298,7 @@ int interrupt_init(void)
* TODO(s...@chromium.org): But we don't handle these correctly when
* booted from EFI.
*/
- if (ll_boot_init())
- enable_interrupts();
+ enable_interrupts();
#endif
return 0;
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index 5bb55e256fb..d906b528b35 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -30,6 +30,9 @@ int init_cache_f_r(void)
return ret;
}
+ if (!ll_boot_init())
+ return 0;
+
/* Initialise the CPU cache(s) */
return init_cache();
}
--
2.26.0.292.g33ef6b2f38-goog
[RESEND PATCH v3 0/7] x86: Improve support for chain-loading U-Boot
This little series adds a few checks into the code to allow better operation when booting a build from a previous-state loader such as coreboot. At present we have a 'coreboot' target but this runs very different code from the bare-metal targets, such as coral. There is very little in common between them. It is useful to be able to boot the same U-Boot on a device, with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. This series allows U-Boot to detect that it ran from coreboot and automatically do the right thing. This series makes the most important changes to allow the same u-boot.bin for coral to boot after coreboot (by itself) or bare metal (via TPL->SPL). Changes in v3: - Add a new patch with a gd flag for chain loading - Add new patch to detect running from coreboot Changes in v2: - Drop the other check in interrupt_init() which is not needed now - Drop patch 'dm: Avoid initing built-in devices when chain loading' Simon Glass (7): x86: fsp: Allow skipping init code when chain loading x86: apl: Skip init code when chain loading x86: cpu: Skip init code when chain loading pci: Avoid auto-config when chain loading board: Add a gd flag for chain loading x86: Add a way to detect running from coreboot x86: Use the existing stack when chain-loading arch/x86/cpu/apollolake/fsp_s.c | 2 ++ arch/x86/cpu/cpu.c| 4 +++- arch/x86/cpu/i386/cpu.c | 15 +++ arch/x86/cpu/i386/interrupt.c | 6 -- arch/x86/cpu/start_from_spl.S | 16 ++-- arch/x86/include/asm/u-boot-x86.h | 7 +++ arch/x86/lib/fsp/fsp_dram.c | 8 arch/x86/lib/fsp/fsp_graphics.c | 3 +++ arch/x86/lib/fsp2/fsp_dram.c | 10 ++ arch/x86/lib/fsp2/fsp_init.c | 2 +- arch/x86/lib/init_helpers.c | 3 +++ drivers/pci/pci-uclass.c | 4 ++-- include/asm-generic/global_data.h | 1 + include/init.h| 2 +- 14 files changed, 74 insertions(+), 9 deletions(-) -- 2.26.0.292.g33ef6b2f38-goog
Re: [PATCH 2/3] arm: caches: add DCACHE_DEFAULT_OPTION
On 4/8/20 8:16 PM, Patrick DELAUNAY wrote: > Dear Marek, > >> From: Marek Vasut >> Sent: vendredi 3 avril 2020 23:29 >> >> On 4/3/20 10:28 AM, Patrick Delaunay wrote: >>> Add the new flags DCACHE_DEFAULT_OPTION to define the default option >>> to use according the compilation flags >>> CONFIG_SYS_ARM_CACHE_WRITETHROUGH or >> CONFIG_SYS_ARM_CACHE_WRITEALLOC. >> >> Can't you unify these macros into a single Kconfig "select" statement >> instead , >> and then just select the matching cache configuration in Kconfig ? > > Yes I will try, with 2 steps > - migrate existing CONFIG_SYS_ARM_CACHE_ in Kconfig > - add new option CONFIG_SYS_ARM_CACHE_OPTION > >> Or better yet, can't you extract this info from DT ? > > I don't think it is called before device tree parsing > The FDT access should be set up as one of the first things during U-Boot's boot_init_f , so it should be possible.
Re: [PATCH v5 2/6] lib: Add a function to convert a string to upper case
On 2020-04-08 16:32, Simon Glass wrote:
> Add a helper function for this operation. Update the strtoul() tests to
> check upper case as well.
>
>
> Signed-off-by: Simon Glass
Reviewed-by: Heinrich Schuchardt
> ---
>
> Changes in v5:
> - Drop change to FAT
> - Add new tests for copying an empty string
> - Use size_t instead of int, require caller to use SIZE_MAX
> - Update the algorithm to avoid dealing with -1
>
> Changes in v4:
> - Add a new patch to convert a string to upper case
>
> include/vsprintf.h | 12 +++
> lib/strto.c| 8 +
> test/str_ut.c | 78 +-
> 3 files changed, 83 insertions(+), 15 deletions(-)
>
> diff --git a/include/vsprintf.h b/include/vsprintf.h
> index 56844dd2de8..d9fb68add0c 100644
> --- a/include/vsprintf.h
> +++ b/include/vsprintf.h
> @@ -222,4 +222,16 @@ bool str2long(const char *p, ulong *num);
> * @hz: Value to convert
> */
> char *strmhz(char *buf, unsigned long hz);
> +
> +/**
> + * str_to_upper() - Convert a string to upper case
> + *
> + * This simply uses toupper() on each character of the string.
> + *
> + * @in: String to convert (must be large enough to hold the output string)
> + * @out: Buffer to put converted string
> + * @len: Number of bytes available in @out (SIZE_MAX for all)
> + */
> +void str_to_upper(const char *in, char *out, size_t len);
> +
> #endif
> diff --git a/lib/strto.c b/lib/strto.c
> index 55ff9f7437d..c00bb5895df 100644
> --- a/lib/strto.c
> +++ b/lib/strto.c
> @@ -163,3 +163,11 @@ long trailing_strtol(const char *str)
> {
> return trailing_strtoln(str, NULL);
> }
> +
> +void str_to_upper(const char *in, char *out, size_t len)
> +{
> + for (; len > 0 && *in; len--)
> + *out++ = toupper(*in++);
> + if (len)
> + *out = '\0';
> +}
> diff --git a/test/str_ut.c b/test/str_ut.c
> index fab8de595cb..7c8015050ad 100644
> --- a/test/str_ut.c
> +++ b/test/str_ut.c
> @@ -19,36 +19,84 @@ static const char str3[] = "0xbI'm sorry you're alive.";
> /* Declare a new str test */
> #define STR_TEST(_name, _flags) UNIT_TEST(_name, _flags,
> str_test)
>
> +static int str_test_upper(struct unit_test_state *uts)
> +{
> + char out[TEST_STR_SIZE];
> +
> + /* Make sure it adds a terminator */
> + out[strlen(str1)] = 'a';
> + str_to_upper(str1, out, SIZE_MAX);
> + ut_asserteq_str("I'M SORRY I'M LATE.", out);
> +
> + /* In-place operation */
> + strcpy(out, str2);
> + str_to_upper(out, out, SIZE_MAX);
> + ut_asserteq_str("1099ABNO, DON'T BOTHER APOLOGISING.", out);
> +
> + /* Limited length */
> + str_to_upper(str1, out, 7);
> + ut_asserteq_str("I'M SORO, DON'T BOTHER APOLOGISING.", out);
> +
> + /* In-place with limited length */
> + strcpy(out, str2);
> + str_to_upper(out, out, 7);
> + ut_asserteq_str("1099ABNo, don't bother apologising.", out);
> +
> + /* Copy an empty string to a buffer with space*/
> + out[1] = 0x7f;
> + str_to_upper("", out, SIZE_MAX);
> + ut_asserteq('\0', *out);
> + ut_asserteq(0x7f, out[1]);
> +
> + /* Copy an empty string to a buffer with no space*/
> + out[0] = 0x7f;
> + str_to_upper("", out, 0);
> + ut_asserteq(0x7f, out[0]);
> +
> + return 0;
> +}
> +STR_TEST(str_test_upper, 0);
> +
> static int run_strtoul(struct unit_test_state *uts, const char *str, int
> base,
> -ulong expect_val, int expect_endp_offset)
> +ulong expect_val, int expect_endp_offset, bool upper)
> {
> + char out[TEST_STR_SIZE];
> char *endp;
> ulong val;
>
> - val = simple_strtoul(str, , base);
> + strcpy(out, str);
> + if (upper)
> + str_to_upper(out, out, -1);
> +
> + val = simple_strtoul(out, , base);
> ut_asserteq(expect_val, val);
> - ut_asserteq(expect_endp_offset, endp - str);
> + ut_asserteq(expect_endp_offset, endp - out);
>
> return 0;
> }
>
> static int str_simple_strtoul(struct unit_test_state *uts)
> {
> - /* Base 10 and base 16 */
> - ut_assertok(run_strtoul(uts, str2, 10, 1099, 4));
> - ut_assertok(run_strtoul(uts, str2, 16, 0x1099ab, 6));
> + int upper;
> +
> + /* Check that it is case-insentive */
> + for (upper = 0; upper < 2; upper++) {
> + /* Base 10 and base 16 */
> + ut_assertok(run_strtoul(uts, str2, 10, 1099, 4, upper));
> + ut_assertok(run_strtoul(uts, str2, 16, 0x1099ab, 6, upper));
>
> - /* Invalid string */
> - ut_assertok(run_strtoul(uts, str1, 10, 0, 0));
> + /* Invalid string */
> + ut_assertok(run_strtoul(uts, str1, 10, 0, 0, upper));
>
> - /* Base 0 */
> - ut_assertok(run_strtoul(uts, str1, 0, 0, 0));
> - ut_assertok(run_strtoul(uts, str2, 0, 1099, 4));
> - ut_assertok(run_strtoul(uts, str3, 0, 0xb, 3));
> + /* Base 0 */
> + ut_assertok(run_strtoul(uts, str1, 0, 0, 0,
RE: [PATCH 2/3] arm: caches: add DCACHE_DEFAULT_OPTION
Dear Marek, > From: Marek Vasut > Sent: vendredi 3 avril 2020 23:29 > > On 4/3/20 10:28 AM, Patrick Delaunay wrote: > > Add the new flags DCACHE_DEFAULT_OPTION to define the default option > > to use according the compilation flags > > CONFIG_SYS_ARM_CACHE_WRITETHROUGH or > CONFIG_SYS_ARM_CACHE_WRITEALLOC. > > Can't you unify these macros into a single Kconfig "select" statement instead > , > and then just select the matching cache configuration in Kconfig ? Yes I will try, with 2 steps - migrate existing CONFIG_SYS_ARM_CACHE_ in Kconfig - add new option CONFIG_SYS_ARM_CACHE_OPTION > Or better yet, can't you extract this info from DT ? I don't think it is called before device tree parsing Patrick
Re: [PATCH 1/3] arm: caches: protect dram_bank_mmu_setup access to bi_dram
On 4/8/20 7:54 PM, Patrick DELAUNAY wrote: > Dear Marek, > >> From: Marek Vasut >> Sent: vendredi 3 avril 2020 23:27 >> >> On 4/3/20 10:28 AM, Patrick Delaunay wrote: >>> Add protection in dram_bank_mmu_setup() to avoid access to bd->bi_dram >>> before relocation. >>> >>> This patch allow to use the generic weak function dram_bank_mmu_setup >>> to activate the MMU and the data cache in SPL or in U-Boot before >>> relocation, when bd->bi_dram is not yet initialized. >>> >>> In this cases, the MMU must be initialized explicitly with >>> mmu_set_region_dcache_behaviour function. >>> >>> Signed-off-by: Patrick Delaunay >>> --- >>> >>> arch/arm/lib/cache-cp15.c | 4 >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c >>> index f8d20960da..54509f11c3 100644 >>> --- a/arch/arm/lib/cache-cp15.c >>> +++ b/arch/arm/lib/cache-cp15.c >>> @@ -91,6 +91,10 @@ __weak void dram_bank_mmu_setup(int bank) >>> bd_t *bd = gd->bd; >>> int i; >>> >>> + /* bd->bi_dram is available only after relocation */ >>> + if ((gd->flags & GD_FLG_RELOC) == 0) >>> + return; >> >> Why not just set the bd->bi_dram correctly before this is called ? > > Just set "bd->bi_dram" seens as a hack. > > For me the bd struct can be updated only in common/board_f.c > after reserve_board() for U-Boot > Or other spl_set_bd() called in board_init_r() for SPL. > > And that can cause issue if CONFIG_NR_DRAM_BANKS > 1 > (even it is not the case today for STM32MP1). > > But if this kind of protection is not correct here I prefer come back > to overidde of the weak fucntio dram_bank_mmu_setup in stm32mp arch > (it is the reason this weak definition) I'd say, let's wait for feedback from the others. I would be inclined to set bd->bi_dram, but maybe others have other opinions.
Re: [RFC PATCH v2 04/13] i2c: add nexell driver
Hi Heiko,
I assume that patchwork does get the patch-series automatically when I
send it to u-boot@lists.denx.de, or am I wrong? Perhaps it is in some
pipeline?
At least the patch-series appeared in U-Boot Digest ("[RFC PATCH v2
04/13] i2c: add nexell driver" is in Vol 142, Issue 58).
Regards
Stefan
Am 08.04.20 um 06:08 schrieb Heiko Schocher:
Hello Stefan,
Am 28.03.2020 um 10:43 schrieb Stefan Bosch:
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- i2c/nx_i2c.c: Some adaptions mainly because of changes in
"struct udevice".
- several Bugfixes in nx_i2c.c.
- the driver has been for s5p6818 only. Code extended appropriately
in order s5p4418 is also working.
- "probe_chip" added.
Signed-off-by: Stefan Bosch
---
Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
into separate commits for gpio, i2c, mmc, pwm.
- several Bugfixes in nx_i2c.c.
- the i2c-driver has been for s5p6818 only. Code extended approriately
in order s5p4418 is also working.
- "probe_chip" added to the i2c-driver.
- doc/device-tree-bindings/i2c/nx_i2c.txt added.
doc/device-tree-bindings/i2c/nx_i2c.txt | 28 ++
drivers/i2c/Kconfig | 9 +
drivers/i2c/Makefile | 1 +
drivers/i2c/nx_i2c.c | 649
4 files changed, 687 insertions(+)
create mode 100644 doc/device-tree-bindings/i2c/nx_i2c.txt
create mode 100644 drivers/i2c/nx_i2c.c
I do not find this patch in patchwork ...
Thanks for splitting the big patch into several patches.
Reviewed-by: Heiko Schocher
bye,
Heiko
RE: [PATCH 1/3] arm: caches: protect dram_bank_mmu_setup access to bi_dram
Dear Marek, > From: Marek Vasut > Sent: vendredi 3 avril 2020 23:27 > > On 4/3/20 10:28 AM, Patrick Delaunay wrote: > > Add protection in dram_bank_mmu_setup() to avoid access to bd->bi_dram > > before relocation. > > > > This patch allow to use the generic weak function dram_bank_mmu_setup > > to activate the MMU and the data cache in SPL or in U-Boot before > > relocation, when bd->bi_dram is not yet initialized. > > > > In this cases, the MMU must be initialized explicitly with > > mmu_set_region_dcache_behaviour function. > > > > Signed-off-by: Patrick Delaunay > > --- > > > > arch/arm/lib/cache-cp15.c | 4 > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c > > index f8d20960da..54509f11c3 100644 > > --- a/arch/arm/lib/cache-cp15.c > > +++ b/arch/arm/lib/cache-cp15.c > > @@ -91,6 +91,10 @@ __weak void dram_bank_mmu_setup(int bank) > > bd_t *bd = gd->bd; > > int i; > > > > + /* bd->bi_dram is available only after relocation */ > > + if ((gd->flags & GD_FLG_RELOC) == 0) > > + return; > > Why not just set the bd->bi_dram correctly before this is called ? Just set "bd->bi_dram" seens as a hack. For me the bd struct can be updated only in common/board_f.c after reserve_board() for U-Boot Or other spl_set_bd() called in board_init_r() for SPL. And that can cause issue if CONFIG_NR_DRAM_BANKS > 1 (even it is not the case today for STM32MP1). But if this kind of protection is not correct here I prefer come back to overidde of the weak fucntio dram_bank_mmu_setup in stm32mp arch (it is the reason this weak definition) Patrick
Re: [PATCH v5 1/6] test: Add the beginnings of some string tests
On 2020-04-08 16:32, Simon Glass wrote:
> There are quite a few string functions in U-Boot with no tests. Make a
> start by adding a test for strtoul().
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v5: None
> Changes in v4:
> - Add a new patch with some string tests
>
> include/test/suites.h | 1 +
> test/Makefile | 1 +
> test/cmd_ut.c | 5
> test/str_ut.c | 67 +++
> 4 files changed, 74 insertions(+)
> create mode 100644 test/str_ut.c
>
> diff --git a/include/test/suites.h b/include/test/suites.h
> index 0748185eaf7..6d4270fa33b 100644
> --- a/include/test/suites.h
> +++ b/include/test/suites.h
> @@ -32,6 +32,7 @@ int do_ut_env(cmd_tbl_t *cmdtp, int flag, int argc, char *
> const argv[]);
> int do_ut_lib(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
> int do_ut_optee(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
> int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
> +int do_ut_str(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
> int do_ut_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
> int do_ut_unicode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
>
> diff --git a/test/Makefile b/test/Makefile
> index 2fe41f489c3..917e54a3fcc 100644
> --- a/test/Makefile
> +++ b/test/Makefile
> @@ -8,6 +8,7 @@ obj-$(CONFIG_UNIT_TEST) += ut.o
> obj-$(CONFIG_SANDBOX) += command_ut.o
> obj-$(CONFIG_SANDBOX) += compression.o
> obj-$(CONFIG_SANDBOX) += print_ut.o
> +obj-$(CONFIG_SANDBOX) += str_ut.o
Why should this test suite be restricted to the sandbox?
It runs fine on qemu_arm64_defconfig if enabled.
Best regards
Heinrich
> obj-$(CONFIG_UT_TIME) += time_ut.o
> obj-$(CONFIG_UT_UNICODE) += unicode_ut.o
> obj-$(CONFIG_$(SPL_)LOG) += log/
> diff --git a/test/cmd_ut.c b/test/cmd_ut.c
> index a3a9d49f7ec..b342c35e68e 100644
> --- a/test/cmd_ut.c
> +++ b/test/cmd_ut.c
> @@ -71,6 +71,8 @@ static cmd_tbl_t cmd_ut_sub[] = {
>"", ""),
> U_BOOT_CMD_MKENT(bloblist, CONFIG_SYS_MAXARGS, 1, do_ut_bloblist,
>"", ""),
> + U_BOOT_CMD_MKENT(str, CONFIG_SYS_MAXARGS, 1, do_ut_str,
> + "", ""),
> #endif
> };
>
> @@ -131,6 +133,9 @@ static char ut_help_text[] =
> #ifdef CONFIG_UT_OVERLAY
> "ut overlay [test-name]\n"
> #endif
> +#ifdef CONFIG_SANDBOX
> + "ut str - Basic test of string functions\n"
> +#endif
> #ifdef CONFIG_UT_TIME
> "ut time - Very basic test of time functions\n"
> #endif
> diff --git a/test/str_ut.c b/test/str_ut.c
> new file mode 100644
> index 000..fab8de595cb
> --- /dev/null
> +++ b/test/str_ut.c
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2020 Google LLC
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +/* This is large enough for any of the test strings */
> +#define TEST_STR_SIZE200
> +
> +static const char str1[] = "I'm sorry I'm late.";
> +static const char str2[] = "1099abNo, don't bother apologising.";
> +static const char str3[] = "0xbI'm sorry you're alive.";
> +
> +/* Declare a new str test */
> +#define STR_TEST(_name, _flags) UNIT_TEST(_name, _flags,
> str_test)
> +
> +static int run_strtoul(struct unit_test_state *uts, const char *str, int
> base,
> +ulong expect_val, int expect_endp_offset)
> +{
> + char *endp;
> + ulong val;
> +
> + val = simple_strtoul(str, , base);
> + ut_asserteq(expect_val, val);
> + ut_asserteq(expect_endp_offset, endp - str);
> +
> + return 0;
> +}
> +
> +static int str_simple_strtoul(struct unit_test_state *uts)
> +{
> + /* Base 10 and base 16 */
> + ut_assertok(run_strtoul(uts, str2, 10, 1099, 4));
> + ut_assertok(run_strtoul(uts, str2, 16, 0x1099ab, 6));
> +
> + /* Invalid string */
> + ut_assertok(run_strtoul(uts, str1, 10, 0, 0));
> +
> + /* Base 0 */
> + ut_assertok(run_strtoul(uts, str1, 0, 0, 0));
> + ut_assertok(run_strtoul(uts, str2, 0, 1099, 4));
> + ut_assertok(run_strtoul(uts, str3, 0, 0xb, 3));
> +
> + /* Base 2 */
> + ut_assertok(run_strtoul(uts, str1, 2, 0, 0));
> + ut_assertok(run_strtoul(uts, str2, 2, 2, 2));
> +
> + /* Check endp being NULL */
> + ut_asserteq(1099, simple_strtoul(str2, NULL, 0));
> +
> + return 0;
> +}
> +STR_TEST(str_simple_strtoul, 0);
> +
> +int do_ut_str(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
> +{
> + struct unit_test *tests = ll_entry_start(struct unit_test,
> + str_test);
> + const int n_ents = ll_entry_count(struct unit_test, str_test);
> +
> + return cmd_ut_category("str", "str_", tests, n_ents, argc, argv);
> +}
>
[PATCH v1 u-boot-marvell 3/5] arm: mvebu: turris_mox: support devices with RAM > 1 GB
In order to support MOX boards with 2 GB or 4 GB RAM, we use the new
Armada-3700 generic code for memory information structures. This is done
by removing dram_init and dram_init_banksize from turris_mox.c, in order
for the generic, weak definitions to be used.
Also for boards with 4 GB RAM it is needed to increase
CONFIG_NR_DRAM_BANKS to 2 in turris_mox_defconfig.
Signed-off-by: Marek Behún
---
board/CZ.NIC/turris_mox/turris_mox.c | 16
configs/turris_mox_defconfig | 2 +-
2 files changed, 1 insertion(+), 17 deletions(-)
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c
b/board/CZ.NIC/turris_mox/turris_mox.c
index 5bb53b1260..8e4c023103 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -43,22 +43,6 @@
DECLARE_GLOBAL_DATA_PTR;
-int dram_init(void)
-{
- gd->ram_base = 0;
- gd->ram_size = (phys_size_t)get_ram_size(0, 0x4000);
-
- return 0;
-}
-
-int dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = (phys_addr_t)0;
- gd->bd->bi_dram[0].size = gd->ram_size;
-
- return 0;
-}
-
#if defined(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index 3bc69cda4d..d786255d1d 100644
--- a/configs/turris_mox_defconfig
+++ b/configs/turris_mox_defconfig
@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x1
CONFIG_ENV_SECT_SIZE=0x1
CONFIG_ENV_OFFSET=0x18
CONFIG_DM_GPIO=y
-CONFIG_NR_DRAM_BANKS=1
+CONFIG_NR_DRAM_BANKS=2
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=25804800
CONFIG_DEBUG_UART=y
--
2.24.1
[PATCH v1 u-boot-marvell 5/5] arm: mvebu: turris_mox: fix PCIe ranges in device tree
Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that
MOX boards with 4 GB RAM are fully supported.
Signed-off-by: Marek Behún
---
board/CZ.NIC/turris_mox/turris_mox.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c
b/board/CZ.NIC/turris_mox/turris_mox.c
index 8e4c023103..470ea32f9c 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
#include
@@ -104,6 +105,11 @@ int board_fix_fdt(void *blob)
return 0;
}
+ if (a3700_fdt_fix_pcie_regions(blob) < 0) {
+ printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
+ return 0;
+ }
+
return 0;
}
#endif
@@ -708,6 +714,11 @@ int ft_board_setup(void *blob, bd_t *bd)
res = fdt_setprop_string(blob, node, "status", "okay");
if (res < 0)
return res;
+
+ /* Fix PCIe regions for devices with 4 GB RAM */
+ res = a3700_fdt_fix_pcie_regions(blob);
+ if (res < 0)
+ return res;
}
/*
--
2.24.1
[PATCH v1 u-boot-marvell 0/5] MVEBU ARM64 improvments + another Turris Mox patch
Hi, sorry for not sending these patches together with the others for Turris Mox, but these make changes to generic arm64 mvebu code, so I thought it would be better. Currently U-Boot on Turris Mox discovers RAM size by calling get_ram_size on the first gigabyte of memory. This is insufficient for new prototypes with 2 GB and 4 GB RAM. For the 2 GB variant it would be sufficient to simply call get_ram_size on the first 2 GB of memory, but the 4 GB variant is more problematic, because in order to support maximum usable RAM possible, ARM Trusted Firmware can change the default address of PCIe regions and also the DRAM memory windows are not consecutive. This series adds code that looks at how ATF configured CPU Address Decoder windows and accordingly changes mem_map regions for U-Boot's virtual memory, and accordingly reports RAM size in dram_init and RAM banks information in dram_init_banksize functions. The first patch moves Armada-8k specific code into Armada-8k specific directory. The second patch adds that looks at the configuration of CPU Address Decoder windows and does the above mentioned things. The third patch removes dram_init and dram_init_banksize in Turris Mox code so that the generic one which now works is used. The fourth patch adds a function which fixes the PCIe ranges property in the device-tree binary so that the driver will work even if ATF changed the address of PCIe window. The fifth patch calls this function on Turris Mox. It would be nice if someone tested these on other A3700 boards, like EspressoBIN. Marek Marek Behún (5): arm64: mvebu: armada-8k: move dram init code arm64: mvebu: a37xx: improve code determining memory info structures arm: mvebu: turris_mox: support devices with RAM > 1 GB arm64: mvebu: a37xx: add device-tree fixer for PCIe regions arm: mvebu: turris_mox: fix PCIe ranges in device tree arch/arm/mach-mvebu/arm64-common.c | 51 + arch/arm/mach-mvebu/armada3700/cpu.c | 304 ++--- arch/arm/mach-mvebu/armada8k/Makefile | 3 +- arch/arm/mach-mvebu/armada8k/dram.c| 52 + arch/arm/mach-mvebu/include/mach/cpu.h | 11 + board/CZ.NIC/turris_mox/turris_mox.c | 27 +-- configs/turris_mox_defconfig | 2 +- 7 files changed, 361 insertions(+), 89 deletions(-) create mode 100644 arch/arm/mach-mvebu/armada8k/dram.c -- 2.24.1
[PATCH v1 u-boot-marvell 4/5] arm64: mvebu: a37xx: add device-tree fixer for PCIe regions
In case when ARM Trusted Firmware changes the default address of PCIe
regions (which can be done for devices with 4 GB RAM to maximize the
amount of RAM the device can use) we add code that looks at how ATF
changed the PCIe windows in the CPU Address Decoder and changes given
device-tree blob accordingly.
Signed-off-by: Marek Behún
---
arch/arm/mach-mvebu/armada3700/cpu.c | 52 ++
arch/arm/mach-mvebu/include/mach/cpu.h | 3 ++
2 files changed, 55 insertions(+)
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c
b/arch/arm/mach-mvebu/armada3700/cpu.c
index 959a909d8a..17d2d43bab 100644
--- a/arch/arm/mach-mvebu/armada3700/cpu.c
+++ b/arch/arm/mach-mvebu/armada3700/cpu.c
@@ -50,6 +50,8 @@
#define A3700_PTE_BLOCK_DEVICE \
(PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE)
+#define PCIE_PATH "/soc/pcie@d007"
+
DECLARE_GLOBAL_DATA_PTR;
static struct mm_region mvebu_mem_map[MAX_MEM_MAP_REGIONS] = {
@@ -259,6 +261,56 @@ int a3700_dram_init_banksize(void)
return 0;
}
+static u32 find_pcie_window_base(void)
+{
+ int win;
+
+ for (win = 0; win < MVEBU_CPU_DEC_WINS; ++win) {
+ u32 base, tgt;
+
+ /* skip disabled windows */
+ if (get_cpu_dec_win(win, , , NULL))
+ continue;
+
+ if (tgt == MVEBU_CPU_DEC_WIN_CTRL_TGT_PCIE)
+ return base;
+ }
+
+ return -1;
+}
+
+int a3700_fdt_fix_pcie_regions(void *blob)
+{
+ u32 new_ranges[14], base;
+ const u32 *ranges;
+ int node, len;
+
+ node = fdt_path_offset(blob, PCIE_PATH);
+ if (node < 0)
+ return node;
+
+ ranges = fdt_getprop(blob, node, "ranges", );
+ if (!ranges)
+ return -ENOENT;
+
+ if (len != sizeof(new_ranges))
+ return -EINVAL;
+
+ memcpy(new_ranges, ranges, len);
+
+ base = find_pcie_window_base();
+ if (base == -1)
+ return -ENOENT;
+
+ new_ranges[2] = cpu_to_fdt32(base);
+ new_ranges[4] = new_ranges[2];
+
+ new_ranges[9] = cpu_to_fdt32(base + 0x100);
+ new_ranges[11] = new_ranges[9];
+
+ return fdt_setprop_inplace(blob, node, "ranges", new_ranges, len);
+}
+
void reset_cpu(ulong ignored)
{
/*
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h
b/arch/arm/mach-mvebu/include/mach/cpu.h
index 2a53329420..1d619c4e49 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -178,6 +178,9 @@ int a8k_dram_init_banksize(void);
int a3700_dram_init(void);
int a3700_dram_init_banksize(void);
+/* A3700 PCIe regions fixer for device tree */
+int a3700_fdt_fix_pcie_regions(void *blob);
+
/*
* get_ref_clk
*
--
2.24.1
[PATCH v1 u-boot-marvell 1/5] arm64: mvebu: armada-8k: move dram init code
Move Armada-8k specific DRAM init code into armada-8k specific
directory.
Signed-off-by: Marek Behún
---
arch/arm/mach-mvebu/arm64-common.c | 46 +--
arch/arm/mach-mvebu/armada8k/Makefile | 3 +-
arch/arm/mach-mvebu/armada8k/dram.c| 52 ++
arch/arm/mach-mvebu/include/mach/cpu.h | 4 ++
4 files changed, 59 insertions(+), 46 deletions(-)
create mode 100644 arch/arm/mach-mvebu/armada8k/dram.c
diff --git a/arch/arm/mach-mvebu/arm64-common.c
b/arch/arm/mach-mvebu/arm64-common.c
index 40b98dbf08..244ea49d8a 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -45,54 +45,12 @@ const struct mbus_dram_target_info
*mvebu_mbus_dram_info(void)
return NULL;
}
-/* DRAM init code ... */
-
-#define MV_SIP_DRAM_SIZE 0x8210
-
-static u64 a8k_dram_scan_ap_sz(void)
-{
- struct pt_regs pregs;
-
- pregs.regs[0] = MV_SIP_DRAM_SIZE;
- pregs.regs[1] = SOC_REGS_PHY_BASE;
- smc_call();
-
- return pregs.regs[0];
-}
-
-static void a8k_dram_init_banksize(void)
-{
- /*
-* The firmware (ATF) leaves a 1G whole above the 3G mark for IO
-* devices. Higher RAM is mapped at 4G.
-*
-* Config 2 DRAM banks:
-* Bank 0 - max size 4G - 1G
-* Bank 1 - ram size - 4G + 1G
-*/
- phys_size_t max_bank0_size = SZ_4G - SZ_1G;
-
- gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
- if (gd->ram_size <= max_bank0_size) {
- gd->bd->bi_dram[0].size = gd->ram_size;
- return;
- }
-
- gd->bd->bi_dram[0].size = max_bank0_size;
- if (CONFIG_NR_DRAM_BANKS > 1) {
- gd->bd->bi_dram[1].start = SZ_4G;
- gd->bd->bi_dram[1].size = gd->ram_size - max_bank0_size;
- }
-}
-
__weak int dram_init_banksize(void)
{
if (CONFIG_IS_ENABLED(ARMADA_8K))
- a8k_dram_init_banksize();
+ return a8k_dram_init_banksize();
else
- fdtdec_setup_memory_banksize();
-
- return 0;
+ return fdtdec_setup_memory_banksize();
}
__weak int dram_init(void)
diff --git a/arch/arm/mach-mvebu/armada8k/Makefile
b/arch/arm/mach-mvebu/armada8k/Makefile
index 82cb25b417..0a4756717a 100644
--- a/arch/arm/mach-mvebu/armada8k/Makefile
+++ b/arch/arm/mach-mvebu/armada8k/Makefile
@@ -2,5 +2,4 @@
#
# Copyright (C) 2016 Stefan Roese
-obj-y = cpu.o
-obj-y += cache_llc.o
+obj-y = cpu.o cache_llc.o dram.o
diff --git a/arch/arm/mach-mvebu/armada8k/dram.c
b/arch/arm/mach-mvebu/armada8k/dram.c
new file mode 100644
index 00..265a8b0ae8
--- /dev/null
+++ b/arch/arm/mach-mvebu/armada8k/dram.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016 Stefan Roese
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MV_SIP_DRAM_SIZE 0x8210
+
+u64 a8k_dram_scan_ap_sz(void)
+{
+ struct pt_regs pregs;
+
+ pregs.regs[0] = MV_SIP_DRAM_SIZE;
+ pregs.regs[1] = SOC_REGS_PHY_BASE;
+ smc_call();
+
+ return pregs.regs[0];
+}
+
+int a8k_dram_init_banksize(void)
+{
+ /*
+* The firmware (ATF) leaves a 1G whole above the 3G mark for IO
+* devices. Higher RAM is mapped at 4G.
+*
+* Config 2 DRAM banks:
+* Bank 0 - max size 4G - 1G
+* Bank 1 - ram size - 4G + 1G
+*/
+ phys_size_t max_bank0_size = SZ_4G - SZ_1G;
+
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ if (gd->ram_size <= max_bank0_size) {
+ gd->bd->bi_dram[0].size = gd->ram_size;
+ return 0;
+ }
+
+ gd->bd->bi_dram[0].size = max_bank0_size;
+ if (CONFIG_NR_DRAM_BANKS > 1) {
+ gd->bd->bi_dram[1].start = SZ_4G;
+ gd->bd->bi_dram[1].size = gd->ram_size - max_bank0_size;
+ }
+
+ return 0;
+}
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h
b/arch/arm/mach-mvebu/include/mach/cpu.h
index 2e2d72aac8..7af8e5d09f 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -170,6 +170,10 @@ void mv_avs_init(void);
static inline void mv_avs_init(void) {}
#endif
+/* A8K dram functions */
+u64 a8k_dram_scan_ap_sz(void);
+int a8k_dram_init_banksize(void);
+
/*
* get_ref_clk
*
--
2.24.1
[PATCH v1 u-boot-marvell 2/5] arm64: mvebu: a37xx: improve code determining memory info structures
Currently on Armada-37xx the mem_map structure is statically defined to
map first 2 GB of memory as RAM region, and system registers and PCIe
region device region.
This is insufficient for when there is more RAM or when for example the
PCIe windows is mapped to another address by the CPU Address Decoder.
In the case when the board has 4 GB RAM, on some boards the ARM Trusted
Firmware can move the PCIe window to another address, in order to
maximize possible usable RAM.
Also the dram_init and dram_init_banksize looks for information in
device-tree, and therefore different device trees are needed for boards
with different RAM sizes.
Therefore we add code that looks at how the ARM Trusted Firmware has
configured the CPU Address Decoder windows, and then we update the
mem_map structure and compute gd->ram_size and gd->bd->bi_dram bank
base addresses and sizes accordingly.
Signed-off-by: Marek Behún
---
arch/arm/mach-mvebu/arm64-common.c | 5 +
arch/arm/mach-mvebu/armada3700/cpu.c | 252 ++---
arch/arm/mach-mvebu/include/mach/cpu.h | 4 +
3 files changed, 235 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-mvebu/arm64-common.c
b/arch/arm/mach-mvebu/arm64-common.c
index 244ea49d8a..34cc0479a8 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -49,6 +49,8 @@ __weak int dram_init_banksize(void)
{
if (CONFIG_IS_ENABLED(ARMADA_8K))
return a8k_dram_init_banksize();
+ else if (CONFIG_IS_ENABLED(ARMADA_3700))
+ return a3700_dram_init_banksize();
else
return fdtdec_setup_memory_banksize();
}
@@ -61,6 +63,9 @@ __weak int dram_init(void)
return 0;
}
+ if (CONFIG_IS_ENABLED(ARMADA_3700))
+ return a3700_dram_init();
+
if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c
b/arch/arm/mach-mvebu/armada3700/cpu.c
index c83268181b..959a909d8a 100644
--- a/arch/arm/mach-mvebu/armada3700/cpu.c
+++ b/arch/arm/mach-mvebu/armada3700/cpu.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Stefan Roese
+ * Copyright (C) 2020 Marek Behun
*/
#include
@@ -13,6 +14,7 @@
#include
#include
#include
+#include
/* Armada 3700 */
#define MVEBU_GPIO_NB_REG_BASE (MVEBU_REGISTER(0x13800))
@@ -26,39 +28,237 @@
#define MVEBU_NB_WARM_RST_REG (MVEBU_GPIO_NB_REG_BASE + 0x40)
#define MVEBU_NB_WARM_RST_MAGIC_NUM0x1d1e
-static struct mm_region mvebu_mem_map[] = {
- {
- /* RAM */
- .phys = 0x0UL,
- .virt = 0x0UL,
- .size = 0x8000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-PTE_BLOCK_INNER_SHARE
- },
+/* Armada 3700 CPU Address Decoder registers */
+#define MVEBU_CPU_DEC_WIN_REG_BASE (size_t)(MVEBU_REGISTER(0xcf00))
+#define MVEBU_CPU_DEC_WIN_CTRL(w) \
+ (MVEBU_CPU_DEC_WIN_REG_BASE + ((w) << 4))
+#define MVEBU_CPU_DEC_WIN_CTRL_EN BIT(0)
+#define MVEBU_CPU_DEC_WIN_CTRL_TGT_MASK0xf
+#define MVEBU_CPU_DEC_WIN_CTRL_TGT_OFFS4
+#define MVEBU_CPU_DEC_WIN_CTRL_TGT_DRAM0
+#define MVEBU_CPU_DEC_WIN_CTRL_TGT_PCIE2
+#define MVEBU_CPU_DEC_WIN_SIZE(w) (MVEBU_CPU_DEC_WIN_CTRL(w) + 0x4)
+#define MVEBU_CPU_DEC_WIN_BASE(w) (MVEBU_CPU_DEC_WIN_CTRL(w) + 0x8)
+#define MVEBU_CPU_DEC_WIN_REMAP(w) (MVEBU_CPU_DEC_WIN_CTRL(w) + 0xc)
+#define MVEBU_CPU_DEC_WIN_GRANULARITY 16
+#define MVEBU_CPU_DEC_WINS 5
+
+#define MAX_MEM_MAP_REGIONS(MVEBU_CPU_DEC_WINS + 2)
+
+#define A3700_PTE_BLOCK_NORMAL \
+ (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE)
+#define A3700_PTE_BLOCK_DEVICE \
+ (PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct mm_region mvebu_mem_map[MAX_MEM_MAP_REGIONS] = {
{
- /* SRAM, MMIO regions */
- .phys = 0xd000UL,
- .virt = 0xd000UL,
+ /*
+* SRAM, MMIO regions
+* Don't remove this, a3700_build_mem_map needs it.
+*/
+ .phys = SOC_REGS_PHY_BASE,
+ .virt = SOC_REGS_PHY_BASE,
.size = 0x0200UL, /* 32MiB internal registers */
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-PTE_BLOCK_NON_SHARE
- },
- {
- /* PCI regions */
- .phys = 0xe800UL,
- .virt = 0xe800UL,
- .size = 0x0200UL, /* 32MiB master PCI space */
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-PTE_BLOCK_NON_SHARE
+ .attrs = A3700_PTE_BLOCK_DEVICE
},
- {
- /* List terminator */
- 0,
- }
};
struct
Re: [PATCH v4 21/31] acpi: Add a central location for table version numbers
On Tue, Apr 07, 2020 at 09:00:57PM -0600, Simon Glass wrote:
> Each ACPI table has its own version number. Add the version numbers in a
> single function so we can keep them consistent and easily see what
> versions are supported.
>
> Start a new acpi_table file in a generic directory to house this function.
> We can move things over to this file from x86 as needed.
...
> +/* FADT TABLE Revision values */
Same comment?
> +#define ACPI_FADT_REV_ACPI_1_0 1
> +#define ACPI_FADT_REV_ACPI_2_0 3
> +#define ACPI_FADT_REV_ACPI_3_0 4
> +#define ACPI_FADT_REV_ACPI_4_0 4
> +#define ACPI_FADT_REV_ACPI_5_0 5
> +#define ACPI_FADT_REV_ACPI_6_0 6
> +
> +/* MADT TABLE Revision values - note these do not match the ACPI revision */
> +#define ACPI_MADT_REV_ACPI_3_0 2
> +#define ACPI_MADT_REV_ACPI_4_0 3
> +#define ACPI_MADT_REV_ACPI_5_0 3
> +#define ACPI_MADT_REV_ACPI_6_0 5
> +
/* MCFG TABLE Revision values */
> +#define ACPI_MCFG_REV_ACPI_3_0 1
...
> +enum acpi_tables {
> + ACPITAB_BERT,
> + ACPITAB_DBG2,
> + ACPITAB_DMAR,
> + ACPITAB_DSDT,
> + ACPITAB_ECDT,
> + ACPITAB_FACS,
> + ACPITAB_FADT,
> + ACPITAB_HEST,
> + ACPITAB_HPET,
> + ACPITAB_IVRS,
> + ACPITAB_MADT,
> + ACPITAB_MCFG,
> + ACPITAB_RSDP,
> + ACPITAB_RSDT,
> + ACPITAB_SLIT,
> + ACPITAB_SPCR,
> + ACPITAB_SRAT,
> + ACPITAB_SSDT,
> + ACPITAB_TCPA,
> + ACPITAB_TPM2,
> + ACPITAB_XSDT,
> +
> + /* Additional proprietary tables */
> + ACPITAB_NHLT,
I didn't get the division. What proprietary means? For example NHLT spec is
public now AFAIK. But SPCR, for instance, is an extension by Microsoft.
Perhaps the division can be
1st group: ACPI spec defined
2nd: PCI SIG defined
3rd: UEFI ACPI extensions
?
> + ACPITAB_SPMI,
> + ACPITAB_VFCT,
> +
> + ACPITAB_COUNT,
Comma at the end, if it is a terminator line, is redundant.
> +};
--
With Best Regards,
Andy Shevchenko
Re: [PATCH v3 27/29] acpi: Put table-setup code in its own function
On Tue, Apr 07, 2020 at 08:57:52PM -0600, Simon Glass wrote: > On Fri, 3 Apr 2020 at 07:32, Andy Shevchenko > wrote: > > > > On Mon, Mar 30, 2020 at 05:13:03PM -0600, Simon Glass wrote: > > > We always write three basic tables to ACPI at the start. Move this into > > > its own function, along with acpi_fill_header(), so we can write a test > > > for this code. > > > > ... > > > > > /* Re-calculate checksum */ > > > rsdt->header.checksum = 0; > > > - rsdt->header.checksum = table_compute_checksum((u8 *)rsdt, > > > + rsdt->header.checksum = table_compute_checksum(rsdt, > > > rsdt->header.length); > > Please can you keep the filenames / functions in your response? > Fragments make it harder to find the code. I thought, obviously mistakenly, that git users know about git grep ... > > Why suddenly casting is not needed in this patch? > > Same question to the rest. > > > > (If it's a valid change, it should be in a separate patch) > > It was never needed. See the prototype for table_compute_checksum(). > > But I can put it back in. Depends on your preferences, but it's definitely not a material for this change. Separate one? -- With Best Regards, Andy Shevchenko
Re: [PATCH v4 13/31] x86: apl: Add Global NVS table header
On Tue, Apr 07, 2020 at 09:00:49PM -0600, Simon Glass wrote: > Add the C version of this header. It includes a few Chrome OS bits which > are disabled for a normal build. > + u8 unused[0x100 - 0x3d]; /* Pad out to 0x100 */ > + u8 unused2[0x1000 - 0x100];/* Pad out to 4KB */ Inconsistent size representation in the comment: 256 bytes, 4096 bytes? Also I would rather name unused1 and unused2. -- With Best Regards, Andy Shevchenko
Re: [PATCH v3 13/29] dts: Add a binding for hid-over-i2c
On Tue, Apr 07, 2020 at 08:58:13PM -0600, Simon Glass wrote: > On Tue, 31 Mar 2020 at 13:25, Wolfgang Wallner > wrote: > > >An: u-boot@lists.denx.de > > >Von: "Simon Glass" > > >Datum: 31.03.2020 01:14 > > >Kopie: "Andy Shevchenko" , > > >"Wolfgang Wallner" , "Leif > > >Lindholm" , "Simon Glass" > > >Betreff: [PATCH v3 14/29] acpi: Add a binding for ACPI settings in > > >the device tree > > The _DSD-method for "PRP0001"-devices in ACPI allows to use Devicetree > > properties inside ACPI, especially it allows to re-use Devicetree's > > "compatible"-property. But this is for a different use case (using > > Devicetree > > properties inside ACPI, not add ACPI properties in Devicetree). Before we are going further with this here is a BIG CAVEAT. PRP0001 MUST NOT be used in production devices. This has been derived solely for debugging / pre-production testing / etc purposes. The real devices must have an official ACPI _HID. -- With Best Regards, Andy Shevchenko
Re: [PATCH v3 17/29] x86: Move acpi_table header to main include/ directory
On Tue, Apr 07, 2020 at 08:57:27PM -0600, Simon Glass wrote: > On Fri, 3 Apr 2020 at 06:58, Andy Shevchenko > wrote: > > > > On Mon, Mar 30, 2020 at 05:12:53PM -0600, Simon Glass wrote: > > > This file is potentially useful to other architectures saddled with ACPI > > > so move most of its contents to a common location. > > > > It's not just potentially, it's definitely useful. > > But this makes me think, why we don't incorporate ACPICA headers as is? > > Due to code style and the vast amount of unused code. So, it will be interesting journey over the same problems then. But it's your problem to maintain this :-) -- With Best Regards, Andy Shevchenko
Re: [PATCH v3 16/29] x86: Move acpi_s3.h to include/acpi/
On Tue, Apr 07, 2020 at 08:57:25PM -0600, Simon Glass wrote: > On Fri, 3 Apr 2020 at 06:53, Andy Shevchenko > wrote: > > On Mon, Mar 30, 2020 at 05:12:52PM -0600, Simon Glass wrote: > > > This header relates to ACPI and we are about to add some more ACPI > > > headers. Move this one into a new directory so they are together. > > > > > > > FWIW, > > Reviewed-by: Andy Shevchenko > > > > One nit below. > > > -#ifdef CONFIG_X86 > > > > There is nothing in commit message about this change. Is it safe? Don't you > > get > > new compiler warnings (like defined-but-not-used)? > > Not that I can see. Since it isn't specific to x86 anymore it seems > like a good idea to remove this #ifdef Please mention in commit message. -- With Best Regards, Andy Shevchenko
Re: [PATCH v3 12/29] dm: core: Add basic ACPI support
On Tue, Apr 07, 2020 at 08:57:24PM -0600, Simon Glass wrote: > On Fri, 3 Apr 2020 at 05:35, Andy Shevchenko > wrote: > > On Mon, Mar 30, 2020 at 05:12:48PM -0600, Simon Glass wrote: ... > > > + strncpy(out_name, name, ACPI_NAME_MAX); > > > > memcpy()? > > strcpy() seems better since it doesn't rely on the correct string in name. Definitely not. It has no boundary checks. > > > + out_name[ACPI_NAME_LEN] = '\0'; > > > > I dunno if compiler is clever enough to catch this and avoid any warnings. > > I don't see any warnings. strncpy() fine then. > > Also it seems above should also have _LEN, and not _MAX. > > Do you mean for the strncpy()? I could do that but I still want to set > the terminator to nul so that the string is definitely terminated. Terminator can be not present. I should be strncpy(out_name, name, ACPI_NAME_LEN); out_name[ACPI_NAME_LEN] = '\0'; -- With Best Regards, Andy Shevchenko
Re: [PATCH v3 10/29] pci: Adjust dm_pci_read_bar32() to return errors correctly
On Tue, Apr 07, 2020 at 08:57:20PM -0600, Simon Glass wrote:
> Hi Andy,
>
> On Fri, 3 Apr 2020 at 05:22, Andy Shevchenko
> wrote:
> >
> > On Mon, Mar 30, 2020 at 05:12:46PM -0600, Simon Glass wrote:
> > > At present if reading a BAR returns 0x (e.g. the device is not
> > > present) then the value is masked and a different value is returned.
> > > This makes it harder to detect the problem when debugging.
> >
> > The above ('the device is not present') is actually not correct.
> > BAR is not mandatory register and detection is described in PCI spec.
>
> What change are you suggesting here? I suggest 'not present' as an
> example of why this might happen.
I suggest to follow PCI spec.
Thus, the code below is fragile and working by luck.
> > To get device presence one may have check Vendor ID / Device ID pair rather
> > then BAR.
> >
> > > Update the function to avoid masking in this case.
> > >
> > > Signed-off-by: Simon Glass
> > > Reviewed-by: Bin Meng
> > > Reviewed-by: Wolfgang Wallner
> > > ---
> > >
> > > Changes in v3: None
> > > Changes in v2: None
> > >
> > > drivers/pci/pci-uclass.c | 9 -
> > > 1 file changed, 8 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> > > index ceb64517047..d2e10d6868a 100644
> > > --- a/drivers/pci/pci-uclass.c
> > > +++ b/drivers/pci/pci-uclass.c
> > > @@ -1213,7 +1213,14 @@ u32 dm_pci_read_bar32(const struct udevice *dev,
> > > int barnum)
> > >
> > > bar = PCI_BASE_ADDRESS_0 + barnum * 4;
> > > dm_pci_read_config32(dev, bar, );
> > > - if (addr & PCI_BASE_ADDRESS_SPACE_IO)
> > > +
> > > + /*
> > > + * If we get an invalid address, return this so that comparisons
> > > with
> > > + * FDT_ADDR_T_NONE work correctly
> > > + */
> > > + if (addr == 0x)
> > > + return addr;
> > > + else if (addr & PCI_BASE_ADDRESS_SPACE_IO)
> > > return addr & PCI_BASE_ADDRESS_IO_MASK;
> > > else
> > > return addr & PCI_BASE_ADDRESS_MEM_MASK;
> > > --
> > > 2.26.0.rc2.310.g2932bb562d-goog
> > >
> >
> > --
> > With Best Regards,
> > Andy Shevchenko
> >
> >
>
> Regards,
> Simon
--
With Best Regards,
Andy Shevchenko
Re: [PATCH v3 15/29] acpi: Add a simple sandbox test
On Tue, Apr 07, 2020 at 08:57:19PM -0600, Simon Glass wrote:
> Hi Andy,
>
> On Fri, 3 Apr 2020 at 06:51, Andy Shevchenko
> wrote:
> >
> > On Mon, Mar 30, 2020 at 05:12:51PM -0600, Simon Glass wrote:
> > > Add a sandbox test for the basic ACPI functionality we have so far.
> >
> > > +U_BOOT_DRIVER(testacpi_drv) = {
> > > + .name = "testacpi_drv",
> > > + .of_match = testacpi_ids,
> > > + .id = UCLASS_TEST_ACPI,
> >
> > > + acpi_ops_ptr(_ops)
> >
> > I have noticed that this is not obvious why no comma here.
> > Perhaps, since apci_ops_ptr is a macro, you should upper case it.
>
> This is a bit like of_match_ptr() which is a macro used by Linux.
For ACPI there is capitalized, but...
> Putting them in upper case makes them very hard to read. Admittedly
> the lack of a comma is odd though. It is because the field doesn't
> exist until ACPI is enabled (which it is not in SPL, for example).
...and this puts them to different categories, like PM ops in Linux kernel,
where they are also capitalized, exactly to be used in struct definitions.
--
With Best Regards,
Andy Shevchenko
Re: [PULL u-boot] Please pull u-boot-amlogic-20200406
On Mon, Apr 06, 2020 at 02:16:06PM +0200, Neil Armstrong wrote: > Hi Tom, > > This PR adds support for Libre Computer AML-S905D-PC and AML-S912-PC while > doing a full sync of Linux v5.6 DT plus fixups on MMC clocks and typos. > > The CI job is at > https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic/pipelines/2631 > > Thanks, > Neil > > The following changes since commit 74bf17db394d49c7041ee01a277fcf8d99b9a514: > > Merge branch 'master' of git://git.denx.de/u-boot-sh (2020-04-04 19:20:45 > -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git > tags/u-boot-amlogic-20200406 > > for you to fetch changes up to e13e7c9daec54f387468098aa1f857e99a1333ec: > > arm64: dts: meson: add libretech-pc support (2020-04-06 09:56:35 +0200) > Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: iMX8MM USB support?
On Wed, Apr 8, 2020 at 12:35 AM Schrempf Frieder
wrote:
>
> Hi Tim,
>
> On 07.04.20 19:06, Tim Harvey wrote:
> > On Mon, Apr 6, 2020 at 2:43 AM Schrempf Frieder
> > wrote:
> >>
> >> Hi Tim,
> >>
> >> On 01.04.20 19:55, Tim Harvey wrote:
> >>> Peng,
> >>>
> >>> It looks like IMX8MM USB support hasn't made it upstream yet. Is this
> >>> something your working on?
> >>>
> >>> I'm interested in booting an IMX8MM via SDP.
> >>
> >> If I remember correctly, the main issue is that the ci_udc driver is
> >> missing DM support. See here: [1].
> >>
> >> I have pulled some patches/hacks into our tree to make SDP work, at
> >> least without DM [2].
> >>
> >> If someone could come up with a proper solution for upstream that would
> >> be great and I would be happy to review/test.
> >>
> >> [1]
> >> https://eur04.safelinks.protection.outlook.com/?url=http%3A%2F%2Fu-boot.10912.n7.nabble.com%2FDM-for-ci-udc-td368249.html%23a370228data=02%7C01%7Cfrieder.schrempf%40kontron.de%7Cb62b33f13a5546ece4d508d7db16044c%7C8c9d3c973fd941c8a2b1646f3942daf1%7C0%7C0%7C637218759927463384sdata=cSQl5z%2FRjvX4IKPWs71wOUhcc3ivvrq%2BObr7EeFbwCU%3Dreserved=0
> >> [2]
> >> https://eur04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kontron-electronics.de%2Flinux%2Fu-boot%2F-%2Fcommits%2Fv2020.01-ktndata=02%7C01%7Cfrieder.schrempf%40kontron.de%7Cb62b33f13a5546ece4d508d7db16044c%7C8c9d3c973fd941c8a2b1646f3942daf1%7C0%7C0%7C637218759927463384sdata=pgoX%2Bh0E%2FiY49ebT16RD3y8hKuzO0NtmdKvrXHjBnuA%3Dreserved=0
> >>
> >
> > Frieder,
> >
> > Thanks - this was very helpful! After applying the patches adding
> > IMX8MM USB I can boot the EVK SPL via SDP and get it to transition
> > over to providing a gadget at 0525:c4a4 but when I try to load
> > u-boot.img to that it fails with a header not found error:
> >
> > sudo ../imx_usb_loader/imx_usb u-boot.imx; sleep 2; sudo
> > ../imx_usb_loader/imx_usb u-boot.img
> > config file <../imx_usb_loader//imx_usb.conf>
> > ...
> > vid=0x1fc9 pid=0x0134 file_name=mx8mm_usb_work.conf
> > ...
> > config file <../imx_usb_loader//mx8mm_usb_work.conf>
> > parse ../imx_usb_loader//mx8mm_usb_work.conf
> > Trying to open device vid=0x1fc9 pid=0x0134
> > Interface 0 claimed
> > HAB security state: development mode (0x56787856)
> > == work item
> > filename u-boot.imx
> > load_size 0 bytes
> > load_addr 0x
> > dcd 1
> > clear_dcd 0
> > plug 1
> > jump_mode 3
> > jump_addr 0x
> > == end work item
> > No DCD table
> >
> > loading binary file(u-boot.imx) to 007e0fc0, skip=0, fsize=37600 type=aa
> >
> > <<<226816, 226816 bytes>>>
> > succeeded (security 0x56787856, status 0x)
> > jumping to 0x007e0fc0
> > config file <../imx_usb_loader//imx_usb.conf>
> > ...
> > config file <../imx_usb_loader//mx8mm_usb_sdp_spl.conf>
> > parse ../imx_usb_loader//mx8mm_usb_sdp_spl.conf
> > Trying to open device vid=0x0525 pid=0xc4a4
> > Interface 0 claimed
> > HAB security state: development mode (0x56787856)
> > == work item
> > filename u-boot.img
> > load_size 0 bytes
> > load_addr 0x
> > dcd 1
> > clear_dcd 0
> > plug 1
> > jump_mode 3
> > jump_addr 0x
> > == end work item
> > header not found 8400:91000694, 4000
> > do_download failed, err=-22
> > HAB security state: development mode (0x56787856)
> >
> > Note I had to add a line to imx_usb.conf to map 0525:c4a4 to
> > mx8mm_usb_sdp_spl.conf:
> > diff --git a/imx_usb.conf b/imx_usb.conf
> > index c7c00f6..4d89230 100644
> > --- a/imx_usb.conf
> > +++ b/imx_usb.conf
> > @@ -17,6 +17,7 @@
> > 0x066f:0x37ff, linux_gadget.conf
> > 0x1b67:0x4fff, mx6_usb_sdp_spl.conf
> > 0x0525:0xb4a4, mx6_usb_sdp_spl.conf
> > +0x0525:0xc4a4, mx8mm_usb_sdp_spl.conf
> > 0x1fc9:0x012b, mx8mq_usb_work.conf
> > 0x1fc9:0x0134, mx8mm_usb_work.conf
> > 0x1fc9:0x013e, mx8mn_usb_work.conf
> >
> > Do you know what's missing from u-boot.img?
>
> In my case I'm loading a FIT image, so things are a bit different.
> Where are you loading the image to?
>
> I have the following line in mx8mm_usb_sdp_spl.conf to load my FIT image
> to DDR and jump to it:
>
> /path/to/image/u-boot.itb:load 0x4020, jump_direct 0x4020
>
Frieder,
I was trying to load u-boot.img
The SPL boots fine:
U-Boot SPL 2020.01-00029-g5ad7797 (Apr 08 2020 - 08:16:53 -0700)
read error from device: 9310b8 register: x!Normal Boot
Trying to boot from USB SDP
SDP: initialize...
SDP: handle requests..
But when I 'imx_usb u-boot.img' it complains there is no header on
u-boot.img. I enabled FIT generation and attempted to 'imx_usb
u-boot.itb' but imx_usb still complains about no header found.
My mx8mm_usb_sdp_spl.conf loooks like this:
mx8mm_spl_sdp
#hid/bulk,[old_header,]max packet size, {ram start, ram size}(repeat
valid ram areas)
#In SPL, we typically load u-boot.img which has a U-boot header...
hid,1024,0x91,0x4000,1G,0x0090,0x4
#0x6 - 0x8400 = 0x57c00, +0x3000=5ac00 (FIT image)
../u-boot-imx6/u-boot.bin:load 0x4020
../u-boot-imx6/bl31-iMX8MM.bin:load
Re: [PATCH v2] imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon mode
On 4/8/20 4:09 PM, Harald Seiler wrote:
> Hello Marek,
Hi,
> On Wed, 2020-04-08 at 15:45 +0200, Marek Vasut wrote:
>> On 4/8/20 2:42 PM, Harald Seiler wrote:
>>> Hello,
>>
>> Hi,
>>
>>> On Mon, 2019-09-09 at 15:32 +0200, Lukasz Majewski wrote:
This change tries to fix the following problem:
- The board boots (to be more precise - ROM loads SPL) from a slow SPI-NOR
memory.
As a result the spl_boot_device() will return SPI-NOR as a boot device
(which is correct).
- The problem is that in 'falcon boot' the eMMC is used as a boot medium to
load kernel from its partition.
Calling spl_boot_device() will break things as it returns SPI-NOR device.
To fix this issue the new CONFIG_SPL_FORCE_MMC_BOOT Kconfig flag is
introduced to handle this special use case. By default it is not defined,
so there is no change in the legacy code flow.
>>>
>>> I want to pick up this discussion (and the previous discussion about
>>> Anatolij's rejected patch [1]) again, because this
>>
>> Can you define "this" ? What is not correct, that the patch was rejected
>> or this patch ?
>
> Right, sorry. I'm talking about the use of spl_boot_device() in the
> switch-statement of spl_boot_mode(). That means, I think rejecting
> Anatolij's original patch was wrong and this patch should not have been
> necessary as what now would be CONFIG_SPL_FORCE_MMC_BOOT=y is the only
> correct behavior (but it is not the default).
Right, you want to be able to override -- at board level -- the boot
device used for the next stage. So Anatolij's patch was indeed OK and we
shouldn't add extra config options for that.
>>> does not seem correct
>>> to me. Also, through the addition of imx8 support, the state has worsened
>>> further and I'd like to have this become more consistent again.
>>>
>>> Digging deep into the history, the `boot_device` parameter to
>>> `spl_boot_mode` was introduced by Marek in commit 2b1cdafa9fdd ("common:
>>> Pass the boot device into spl_boot_mode()"). The intention was to fix
>>> exactly the problem which Anatolij encountered. For reference:
>>>
>>> common: Pass the boot device into spl_boot_mode()
>>>
>>> The SPL code already knows which boot device it calls the
>>> spl_boot_mode()
>>> on, so pass that information into the function. This allows the code of
>>> spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets
>>> board_boot_order() correctly alter the behavior of the boot process.
>>>
>>> The later one is important, since in certain cases, it is desired that
>>> spl_boot_device() return value be overriden using board_boot_order().
>>
>> Note that the entire madness above was needed for 8997de292a8b to work.
>>
>> ARM: at91: ma5d4: Boot from MMC2 when using SAM-BA
>>
>> Continue loading U-Boot from MMC2 when the SPL was loaded using SAM-BA
>> loader. This allows the board to boot system from the removable media
>> instead of the eMMC, which is useful for commissioning purposes. When
>> booting from the eMMC, always boot from it as it is not possible to
>> boot from the SD interface directly.
>
> I see. Well, and trying to do the same thing on an IMX would not work at
> the moment, because of the issue I am trying to describe.
Yep, just adding some extra context here.
>>> It seems to me that using spl_boot_device() instead of the `boot_device`
>>> parameter cannot be correct here (If I am wrong about the following,
>>> please correct me!):
>>>
>>> spl_boot_mode() is essentially a lookup function which is used by the SPL
>>> MMC driver (here [2]) to find out the 'mode' of the currently attempted
>>> MMC device. That is, for each MMC device, it should tell the driver
>>> whether this device has a FAT/ext4 filesystem (MMCSD_MODE_FS), is using an
>>> eMMC boot-partition (MMCSD_MODE_EMMCBOOT), or should be accessed directly
>>> (MMCSD_MODE_RAW).
>>
>> Yes
>>
>>> spl_boot_device() returns the device which SPL was booted from.
>>
>> Yes
>>
>>> Now because in most cases U-Boot Proper is loaded from the same MMC device
>>> which the SPL was originally loaded from, the current code often
>>> mistakenly does the right thing. But when this is not the case (e.g.
>>> because a board_boot_order() was defined), it is obviously not correct to
>>> return the mode of the MMC device which SPL was loaded from instead of the
>>> mode of the device which the MMC driver is currently attempting to access.
>>>
>>> So, I think the function should in all circumstances use its `boot_device`
>>> parameter to behave correctly (and all other implementations do this, from
>>> what I can tell). It might make sense to rename it, though. It is not
>>> really about the 'spl boot mode', but much more about 'mmc device mode'.
>>>
>>> I'd send a patch-series but first I'd like some input whether I am correct
>>> about this ...
>>>
>>> [1]: https://patchwork.ozlabs.org/patch/796237/
>>> [2]:
>>>
[PATCH v3 18/19] configs: imxrt1050-evk: enable video support/console
Enable DM_VIDEO subsystem and its BACKLIGHT_GPIO. Then enable SYS_WHITE_ON_BLACK to have classic black background on display. Need also to enable CONFIG_SYS_CONSOLE_ENV_OVERWRITE to retrieve stdin/stdout/stderr from CONFIG_EXTRA_ENV_SETTINGS. Signed-off-by: Giulio Benetti --- configs/imxrt1050-evk_defconfig | 4 1 file changed, 4 insertions(+) diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 71970552c0..810f391fdc 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x20209000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set @@ -62,6 +63,9 @@ CONFIG_IMXRT_SDRAM=y CONFIG_FSL_LPUART=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y +CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_SHA1=y CONFIG_SHA256=y CONFIG_HEXDUMP=y -- 2.20.1
[PATCH v3 17/19] arch: arm: dts: imxrt1050-evk: add lcdif node
Add lcdif node and its pinctrl.
Signed-off-by: Giulio Benetti
---
arch/arm/dts/imxrt1050-evk.dts | 60 ++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts
index 56b75986e2..b5e781275e 100644
--- a/arch/arm/dts/imxrt1050-evk.dts
+++ b/arch/arm/dts/imxrt1050-evk.dts
@@ -185,6 +185,33 @@
0x17061
>;
};
+
+ pinctrl_lcdif: lcdifgrp {
+ u-boot,dm-spl;
+ fsl,pins = <
+ MXRT1050_IOMUXC_GPIO_B0_00_LCD_CLK
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_01_LCD_ENABLE
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_02_LCD_HSYNC
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_03_LCD_VSYNC
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_04_LCD_DATA00
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_05_LCD_DATA01
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_06_LCD_DATA02
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_07_LCD_DATA03
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_08_LCD_DATA04
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_09_LCD_DATA05
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_10_LCD_DATA06
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_11_LCD_DATA07
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_12_LCD_DATA08
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_13_LCD_DATA09
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_14_LCD_DATA10
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B0_15_LCD_DATA11
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B1_01_LCD_DATA13
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B1_02_LCD_DATA14
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B1_03_LCD_DATA15
0x1b0b1
+ MXRT1050_IOMUXC_GPIO_B1_15_GPIO2_IO31
0x0b069
+ MXRT1050_IOMUXC_GPIO_AD_B0_02_GPIO1_IO02
0x0b069
+ >;
+ };
};
};
@@ -198,3 +225,36 @@
cd-gpios = < 28 GPIO_ACTIVE_LOW>;
};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lcdif>;
+ display = <>;
+ status = "okay";
+
+ assigned-clocks = < IMXRT1050_CLK_LCDIF_SEL>;
+ assigned-clock-parents = < IMXRT1050_CLK_PLL5_VIDEO>;
+
+ display0: display0 {
+ bits-per-pixel = <16>;
+ bus-width = <16>;
+
+ display-timings {
+ timing0: timing0 {
+ clock-frequency = <930>;
+ hactive = <480>;
+ vactive = <272>;
+ hback-porch = <4>;
+ hfront-porch = <8>;
+ vback-porch = <4>;
+ vfront-porch = <8>;
+ hsync-len = <41>;
+ vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ };
+ };
+ };
+};
--
2.20.1
[PATCH v3 16/19] ARM: dts: imxrt1050: allow this dtsi file to be compiled in Linux
Linux doesn't provide skeleton.dtsi file so let's remove its include and
provide #address-cells/size-cells = <1> that were defined in
skeleton.dtsi before.
Signed-off-by: Giulio Benetti
---
arch/arm/dts/imxrt1050.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi
index 0123f4788c..7cfe5f5c95 100644
--- a/arch/arm/dts/imxrt1050.dtsi
+++ b/arch/arm/dts/imxrt1050.dtsi
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti
*/
-#include "skeleton.dtsi"
#include "armv7-m.dtsi"
#include
#include
@@ -12,6 +11,9 @@
#include
/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
aliases {
display0 =
gpio0 =
--
2.20.1
[PATCH v3 19/19] configs: imxrt1050-evk: temporary disable DCACHE
mxsfb needs a dcache function not implemented in cortex-M7, so for the moment let's keep dcache not enabled. Signed-off-by: Giulio Benetti --- configs/imxrt1050-evk_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 810f391fdc..25d0ba191c 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y +# CONFIG_SPL_SYS_DCACHE_OFF is not set CONFIG_ARCH_IMXRT=y CONFIG_SYS_TEXT_BASE=0x80002000 CONFIG_SPL_GPIO_SUPPORT=y -- 2.20.1
[PATCH v3 14/19] imxrt1050_evk: add 16bpp video support if video layer enabled
i.MXRT1050 provides mxsfb compatible lcd controller, so let's enable video mxsfb driver with 16bpp depth if CONFIG_DM_VIDEO is selected since board has 16bpp only connection. Signed-off-by: Giulio Benetti --- include/configs/imxrt1050-evk.h | 15 +++ 1 file changed, 15 insertions(+) diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index cdec657fb0..3a6b972d9a 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -30,6 +30,21 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ +#ifdef CONFIG_DM_VIDEO +#define CONFIG_VIDEO_MXS +#define CONFIG_VIDEO_LOGO +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_BMP_LOGO + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "stdin=serial\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" +#endif + /* * Configuration of the external SDRAM memory */ -- 2.20.1
[PATCH v3 13/19] video: mxsfb: enable setting ENABLE negative polarity
ENABLE signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti --- drivers/video/mxsfb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 648e1c22fe..8a5a61c9fb 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -131,6 +131,9 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, vdctrl0 |= LCDIF_VDCTRL0_VSYNC_POL; if(flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) vdctrl0 |= LCDIF_VDCTRL0_DOTCLK_POL; + if(flags & DISPLAY_FLAGS_DE_HIGH) + vdctrl0 |= LCDIF_VDCTRL0_ENABLE_POL; + writel(vdctrl0, >hw_lcdif_vdctrl0); writel(timings->vback_porch.typ + timings->vfront_porch.typ + timings->vsync_len.typ + timings->vactive.typ, -- 2.20.1
[PATCH v3 15/19] ARM: dts: i.mxrt1050: add lcdif node
Add lcdif node to SoC.
Signed-off-by: Giulio Benetti
---
arch/arm/dts/imxrt1050.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi
index b1d98e6feb..0123f4788c 100644
--- a/arch/arm/dts/imxrt1050.dtsi
+++ b/arch/arm/dts/imxrt1050.dtsi
@@ -13,6 +13,7 @@
/ {
aliases {
+ display0 =
gpio0 =
gpio1 =
gpio2 =
@@ -142,5 +143,14 @@
interrupt-controller;
#interrupt-cells = <2>;
};
+
+ lcdif: lcdif@402b8000 {
+ compatible = "fsl,imxrt-lcdif";
+ reg = <0x402b8000 0x1>;
+ interrupts = ;
+ clocks = < IMXRT1050_CLK_LCDIF>;
+ clock-names = "per";
+ status = "disabled";
+ };
};
};
--
2.20.1
[PATCH v3 10/19] video: mxsfb: enable setting HSYNC negative polarity
HSYNC signal can now be flipped according to display_flags bitmaks by
writing its bitmask on vdctrl0 register.
Signed-off-by: Giulio Benetti
---
drivers/video/mxsfb.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index cdd6dfaced..9912cf3d82 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -57,8 +57,10 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr,
struct display_timing *timings, int bpp)
{
struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
+ const enum display_flags flags = timings->flags;
uint32_t word_len = 0, bus_width = 0;
uint8_t valid_data = 0;
+ uint32_t vdctrl0;
#if CONFIG_IS_ENABLED(CLK)
struct clk per_clk;
@@ -118,10 +120,14 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr,
writel((timings->vactive.typ << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) |
timings->hactive.typ, >hw_lcdif_transfer_count);
- writel(LCDIF_VDCTRL0_ENABLE_PRESENT | LCDIF_VDCTRL0_ENABLE_POL |
- LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
- LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
- timings->vsync_len.typ, >hw_lcdif_vdctrl0);
+ vdctrl0 = LCDIF_VDCTRL0_ENABLE_PRESENT | LCDIF_VDCTRL0_ENABLE_POL |
+ LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
+ LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
+ timings->vsync_len.typ;
+
+ if(flags & DISPLAY_FLAGS_HSYNC_HIGH)
+ vdctrl0 |= LCDIF_VDCTRL0_HSYNC_POL;
+ writel(vdctrl0, >hw_lcdif_vdctrl0);
writel(timings->vback_porch.typ + timings->vfront_porch.typ +
timings->vsync_len.typ + timings->vactive.typ,
>hw_lcdif_vdctrl1);
--
2.20.1
[PATCH v3 12/19] video: mxsfb: enable setting PIXDATA on negative edge
DOTCLK signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti --- drivers/video/mxsfb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 4d33e24e1a..648e1c22fe 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -129,6 +129,8 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, vdctrl0 |= LCDIF_VDCTRL0_HSYNC_POL; if(flags & DISPLAY_FLAGS_VSYNC_HIGH) vdctrl0 |= LCDIF_VDCTRL0_VSYNC_POL; + if(flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) + vdctrl0 |= LCDIF_VDCTRL0_DOTCLK_POL; writel(vdctrl0, >hw_lcdif_vdctrl0); writel(timings->vback_porch.typ + timings->vfront_porch.typ + timings->vsync_len.typ + timings->vactive.typ, -- 2.20.1
[PATCH v3 11/19] video: mxsfb: enable setting VSYNC negative polarity
VSYNC signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti --- drivers/video/mxsfb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 9912cf3d82..4d33e24e1a 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -127,6 +127,8 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, if(flags & DISPLAY_FLAGS_HSYNC_HIGH) vdctrl0 |= LCDIF_VDCTRL0_HSYNC_POL; + if(flags & DISPLAY_FLAGS_VSYNC_HIGH) + vdctrl0 |= LCDIF_VDCTRL0_VSYNC_POL; writel(vdctrl0, >hw_lcdif_vdctrl0); writel(timings->vback_porch.typ + timings->vfront_porch.typ + timings->vsync_len.typ + timings->vactive.typ, -- 2.20.1
[PATCH v3 08/19] video: mxsfb: add support for i.MXRT
Add support for i.MXRT by adding CONFIG_IMXRT in register structure and
adding .compatible = "fsl,imxrt-lcdif".
Signed-off-by: Giulio Benetti
---
arch/arm/include/asm/arch-imxrt/imx-regs.h | 6 ++
arch/arm/include/asm/mach-imx/regs-lcdif.h | 6 +++---
drivers/video/mxsfb.c | 1 +
3 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-imxrt/imx-regs.h
b/arch/arm/include/asm/arch-imxrt/imx-regs.h
index 4f1d439f6f..44c95dcd11 100644
--- a/arch/arm/include/asm/arch-imxrt/imx-regs.h
+++ b/arch/arm/include/asm/arch-imxrt/imx-regs.h
@@ -17,4 +17,10 @@
#define ANATOP_BASE_ADDR 0x400d8000
+#define MXS_LCDIF_BASE 0x402b8000
+
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+#include
+#endif
+
#endif /* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/mach-imx/regs-lcdif.h
b/arch/arm/include/asm/mach-imx/regs-lcdif.h
index b4c430a35c..5874638796 100644
--- a/arch/arm/include/asm/mach-imx/regs-lcdif.h
+++ b/arch/arm/include/asm/mach-imx/regs-lcdif.h
@@ -22,7 +22,7 @@ struct mxs_lcdif_regs {
defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \
- defined(CONFIG_IMX8M)
+ defined(CONFIG_IMX8M) || defined(CONFIG_IMXRT)
mxs_reg_32(hw_lcdif_ctrl2) /* 0x20 */
#endif
mxs_reg_32(hw_lcdif_transfer_count) /* 0x20/0x30 */
@@ -49,7 +49,7 @@ struct mxs_lcdif_regs {
mxs_reg_32(hw_lcdif_csc_coeffctrl2) /* 0x130 */
mxs_reg_32(hw_lcdif_csc_coeffctrl3) /* 0x140 */
mxs_reg_32(hw_lcdif_csc_coeffctrl4) /* 0x150 */
- mxs_reg_32(hw_lcdif_csc_offset) /* 0x160 */
+ mxs_reg_32(hw_lcdif_csc_offset) /* 0x160 */
mxs_reg_32(hw_lcdif_csc_limit) /* 0x170 */
#if defined(CONFIG_MX23)
@@ -61,7 +61,7 @@ struct mxs_lcdif_regs {
defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \
- defined(CONFIG_IMX8M)
+ defined(CONFIG_IMX8M) || defined(CONFIG_IMXRT)
mxs_reg_32(hw_lcdif_crc_stat) /* 0x1a0 */
#endif
mxs_reg_32(hw_lcdif_lcdif_stat) /* 0x1d0/0x1b0 */
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index f21f8247d9..6826ba3d1b 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -440,6 +440,7 @@ static const struct udevice_id mxs_video_ids[] = {
{ .compatible = "fsl,imx23-lcdif" },
{ .compatible = "fsl,imx28-lcdif" },
{ .compatible = "fsl,imx7ulp-lcdif" },
+ { .compatible = "fsl,imxrt-lcdif" },
{ /* sentinel */ }
};
--
2.20.1
