RE: [PATCH] riscv: timer: Add support for an early timer

[Pragnesh Patel]

Hi Rick,

>-Original Message-
>From: Rick Chen 
>Sent: 24 November 2020 13:08
>To: Pragnesh Patel 
>Cc: U-Boot Mailing List ; Atish Patra
>; Bin Meng ; Paul Walmsley (
>Sifive) ; Anup Patel ; Sagar
>Kadam ; Palmer Dabbelt ;
>Simon Glass ; rick ; Alan Kao
>; Leo Liang 
>Subject: Re: [PATCH] riscv: timer: Add support for an early timer
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>Hi Pragnesh,
>
>> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
>> Sent: Tuesday, November 17, 2020 7:05 PM
>> To: u-boot@lists.denx.de
>> Cc: atish.pa...@wdc.com; palmerdabb...@google.com;
>bmeng...@gmail.com;
>> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com;
>> Rick Jian-Zhi Chen(陳建志); Pragnesh Patel; Palmer Dabbelt; Sean
>> Anderson; Simon Glass; Bin Meng
>> Subject: [PATCH] riscv: timer: Add support for an early timer
>>
>> Added support for timer_early_get_count() and timer_early_get_rate()
>> This is mostly useful in tracing.
>>
>> Signed-off-by: Pragnesh Patel 
>> ---
>>  drivers/timer/andes_plmt_timer.c   | 21 -
>>  drivers/timer/riscv_timer.c| 21 -
>>  drivers/timer/sifive_clint_timer.c | 21 -
>>  include/configs/ax25-ae350.h   |  5 +
>>  include/configs/sifive-fu540.h |  5 +
>>  5 files changed, 70 insertions(+), 3 deletions(-)
>>
>
>I verify with ae350_rv64_defconfig
>
>make FTRACE=1 ae350_rv64_defconfig
>make FTRACE=1
>
>and it boot fail as below:
>
>U-Boot 2021.01-rc2-00140-geb42715 (Nov 24 2020 - 15:02:18 +0800)
>
>DRAM:  1 GiB
>trace: enabled
>
>DO you have any suggestions ?

Please enable CONFIG_TIMER_EARLY=y in ae350_rv64_defconfig

Actually in v2, I will make TRACE to select TIMER_EARLY like below,

--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -210,6 +210,7 @@ config BITREVERSE
 config TRACE
bool "Support for tracing of function calls and timing"
imply CMD_TRACE
+   select TIMER_EARLY

Let me know if you have any suggestion.

>
>Thanks,
>Rick
>
>> diff --git a/drivers/timer/andes_plmt_timer.c
>> b/drivers/timer/andes_plmt_timer.c
>> index cec86718c7..74b795c97a 100644
>> --- a/drivers/timer/andes_plmt_timer.c
>> +++ b/drivers/timer/andes_plmt_timer.c
>> @@ -17,11 +17,30 @@
>>  /* mtime register */
>>  #define MTIME_REG(base)((ulong)(base))
>>
>> -static u64 andes_plmt_get_count(struct udevice *dev)
>> +static u64 notrace andes_plmt_get_count(struct udevice *dev)
>>  {
>> return readq((void __iomem *)MTIME_REG(dev->priv));  }
>>
>> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
>> +/**
>> + * timer_early_get_rate() - Get the timer rate before driver model
>> +*/ unsigned long notrace timer_early_get_rate(void) {
>> +   return RISCV_MMODE_TIMER_FREQ; }
>> +
>> +/**
>> + * timer_early_get_count() - Get the timer count before driver model
>> + *
>> + */
>> +u64 notrace timer_early_get_count(void) {
>> +   return readq((void __iomem
>> +*)MTIME_REG(RISCV_MMODE_TIMERBASE));
>> +}
>> +#endif
>> +
>>  static const struct timer_ops andes_plmt_ops = {
>> .get_count = andes_plmt_get_count,  }; diff --git
>> a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c index
>> 21ae184057..a0f71ca897 100644
>> --- a/drivers/timer/riscv_timer.c
>> +++ b/drivers/timer/riscv_timer.c
>> @@ -16,7 +16,7 @@
>>  #include 
>>  #include 
>>
>> -static u64 riscv_timer_get_count(struct udevice *dev)
>> +static u64 notrace riscv_timer_get_count(struct udevice *dev)
>>  {
>> __maybe_unused u32 hi, lo;
>>
>> @@ -31,6 +31,25 @@ static u64 riscv_timer_get_count(struct udevice *dev)
>> return ((u64)hi << 32) | lo;
>>  }
>>
>> +#if CONFIG_IS_ENABLED(RISCV_SMODE)
>> +/**
>> + * timer_early_get_rate() - Get the timer rate before driver model
>> +*/ unsigned long notrace timer_early_get_rate(void) {
>> +   return RISCV_SMODE_TIMER_FREQ; }
>> +
>> +/**
>> + * timer_early_get_count() - Get the timer count before driver model
>> + *
>> + */
>> +u64 notrace timer_early_get_count(void) {
>> +   return riscv_timer_get_count(NULL); } #endif
>> +
>>  static int riscv_timer_probe(struct udevice *dev)  {
>> struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
>> diff --git a/drivers/timer/sifive_clint_timer.c
>> b/drivers/timer/sifive_clint_timer.c
>> index 00ce0f08d6..9ae05a0e7e 100644
>> --- a/drivers/timer/sifive_clint_timer.c
>> +++ b/drivers/timer/sifive_clint_timer.c
>> @@ -14,11 +14,30 @@
>>  /* mtime register */
>>  #define MTIME_REG(base)((ulong)(base) + 0xbff8)
>>
>> -static u64 sifive_clint_get_count(struct udevice *dev)
>> +static u64 notrace sifive_clint_get_count(struct udevice *dev)
>>  {
>> return readq((void __iomem *)MTIME_REG(dev->priv));  }
>>
>> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
>> +/**
>> + * timer_early_get_rate() - Get the timer rate before driver model
>> +*/ unsigned long notrace timer_early_get_rate(void) {
>> +  

Re: [PATCH v9 04/11] efi_loader: capsule: support firmware update

[Sughosh Ganu]

Takahiro,

On Tue, 24 Nov 2020 at 11:21, AKASHI Takahiro 
wrote:

> Sughosh,
>
> On Sat, Nov 21, 2020 at 11:32:43PM +0530, Sughosh Ganu wrote:
> > hi Takahiro,
> >
> > On Tue, 17 Nov 2020 at 05:58, AKASHI Takahiro <
> takahiro.aka...@linaro.org>
> > wrote:
> >
> > > A capsule tagged with the guid,
> EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID,
> > > is handled as a firmware update object.
> > > What efi_update_capsule() basically does is to load any firmware
> management
> > > protocol (or fmp) drivers contained in a capsule, find out an
> appropriate
> > > fmp driver and then invoke its set_image() interface against each
> binary
> > > in a capsule.
> > > In this commit, however, loading drivers is not supported.
> > >
> > > The result of applying a capsule is set to be stored in "Capsule"
> > > variable, but its implementation is deferred to a fmp driver.
> > >
> > > Signed-off-by: AKASHI Takahiro 
> > > ---
> > >  include/efi_api.h| 129 +++
> > >  include/efi_loader.h |   2 +
> > >  lib/efi_loader/Kconfig   |   8 ++
> > >  lib/efi_loader/efi_capsule.c | 238 ++-
> > >  lib/efi_loader/efi_setup.c   |   4 +
> > >  5 files changed, 380 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/include/efi_api.h b/include/efi_api.h
> > > index 7a2a087c60ed..966bc6e590bf 100644
> > > --- a/include/efi_api.h
> > > +++ b/include/efi_api.h
> > > @@ -217,6 +217,9 @@ enum efi_reset_type {
> > >  #define CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE0x0002
> > >  #define CAPSULE_FLAGS_INITIATE_RESET   0x0004
> > >
> > > +#define CAPSULE_SUPPORT_AUTHENTICATION 0x0001
> > > +#define CAPSULE_SUPPORT_DEPENDENCY 0x0002
> > > +
> > >  #define EFI_CAPSULE_REPORT_GUID \
> > > EFI_GUID(0x39b68c46, 0xf7fb, 0x441b, 0xb6, 0xec, \
> > >  0x16, 0xb0, 0xf6, 0x98, 0x21, 0xf3)
> > > @@ -225,6 +228,10 @@ enum efi_reset_type {
> > > EFI_GUID(0xde9f0ec, 0x88b6, 0x428f, 0x97, 0x7a, \
> > >  0x25, 0x8f, 0x1d, 0xe, 0x5e, 0x72)
> > >
> > > +#define EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID \
> > > +   EFI_GUID(0x6dcbd5ed, 0xe82d, 0x4c44, 0xbd, 0xa1, \
> > > +0x71, 0x94, 0x19, 0x9a, 0xd9, 0x2a)
> > > +
> > >  struct efi_capsule_header {
> > > efi_guid_t capsule_guid;
> > > u32 header_size;
> > > @@ -253,6 +260,33 @@ struct efi_memory_range_capsule {
> > > struct efi_memory_range memory_ranges[];
> > >  } __packed;
> > >
> > > +struct efi_firmware_management_capsule_header {
> > > +   u32 version;
> > > +   u16 embedded_driver_count;
> > > +   u16 payload_item_count;
> > > +   u64 item_offset_list[];
> > > +} __packed;
> > > +
> > > +struct efi_firmware_management_capsule_image_header {
> > > +   u32 version;
> > > +   efi_guid_t update_image_type_id;
> > > +   u8 update_image_index;
> > > +   u8 reserved[3];
> > > +   u32 update_image_size;
> > > +   u32 update_vendor_code_size;
> > > +   u64 update_hardware_instance;
> > > +   u64 image_capsule_support;
> > > +} __packed;
> > > +
> > > +struct efi_capsule_result_variable_fmp {
> > > +   u16 version;
> > > +   u8 payload_index;
> > > +   u8 update_image_index;
> > > +   efi_guid_t update_image_type_id;
> > > +   // u16 capsule_file_name[];
> > > +   // u16 capsule_target[];
> > > +} __packed;
> > > +
> > >
> >
> > 
> >
> >
> > > +/**
> > > + * efi_capsule_update_firmware - update firmware from capsule
> > > + * @capsule_data:  Capsule
> > > + *
> > > + * Update firmware, using a capsule, @capsule_data. Loading any FMP
> > > + * drivers embedded in a capsule is not supported.
> > > + *
> > > + * Return: status code
> > > + */
> > > +static efi_status_t efi_capsule_update_firmware(
> > > +   struct efi_capsule_header *capsule_data)
> > > +{
> > > +   struct efi_firmware_management_capsule_header *capsule;
> > > +   struct efi_firmware_management_capsule_image_header *image;
> > > +   size_t capsule_size;
> > > +   void *image_binary, *vendor_code;
> > > +   efi_handle_t *handles;
> > > +   efi_uintn_t no_handles;
> > > +   int item;
> > > +   struct efi_firmware_management_protocol *fmp;
> > > +   u16 *abort_reason;
> > > +   efi_status_t ret = EFI_SUCCESS;
> > > +
> > > +   /* sanity check */
> > > +   if (capsule_data->header_size < sizeof(*capsule) ||
> > > +   capsule_data->header_size >=
> capsule_data->capsule_image_size)
> > > +   return EFI_INVALID_PARAMETER;
> > > +
> > > +   capsule = (void *)capsule_data + capsule_data->header_size;
> > > +   capsule_size = capsule_data->capsule_image_size
> > > +   - capsule_data->header_size;
> > > +
> > > +   if (capsule->version != 0x0001)
> > > +   return EFI_INVALID_PARAMETER;
> > > +
> > > +   /* Drivers */
> > > +

Re: [PATCH] riscv: timer: Add support for an early timer

[Rick Chen]

Hi Pragnesh,

> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Tuesday, November 17, 2020 7:05 PM
> To: u-boot@lists.denx.de
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com; 
> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick 
> Jian-Zhi Chen(陳建志); Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Simon 
> Glass; Bin Meng
> Subject: [PATCH] riscv: timer: Add support for an early timer
>
> Added support for timer_early_get_count() and timer_early_get_rate()
> This is mostly useful in tracing.
>
> Signed-off-by: Pragnesh Patel 
> ---
>  drivers/timer/andes_plmt_timer.c   | 21 -
>  drivers/timer/riscv_timer.c| 21 -
>  drivers/timer/sifive_clint_timer.c | 21 -
>  include/configs/ax25-ae350.h   |  5 +
>  include/configs/sifive-fu540.h |  5 +
>  5 files changed, 70 insertions(+), 3 deletions(-)
>

I verify with ae350_rv64_defconfig

make FTRACE=1 ae350_rv64_defconfig
make FTRACE=1

and it boot fail as below:

U-Boot 2021.01-rc2-00140-geb42715 (Nov 24 2020 - 15:02:18 +0800)

DRAM:  1 GiB
trace: enabled

DO you have any suggestions ?

Thanks,
Rick

> diff --git a/drivers/timer/andes_plmt_timer.c 
> b/drivers/timer/andes_plmt_timer.c
> index cec86718c7..74b795c97a 100644
> --- a/drivers/timer/andes_plmt_timer.c
> +++ b/drivers/timer/andes_plmt_timer.c
> @@ -17,11 +17,30 @@
>  /* mtime register */
>  #define MTIME_REG(base)((ulong)(base))
>
> -static u64 andes_plmt_get_count(struct udevice *dev)
> +static u64 notrace andes_plmt_get_count(struct udevice *dev)
>  {
> return readq((void __iomem *)MTIME_REG(dev->priv));
>  }
>
> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
> +/**
> + * timer_early_get_rate() - Get the timer rate before driver model
> + */
> +unsigned long notrace timer_early_get_rate(void)
> +{
> +   return RISCV_MMODE_TIMER_FREQ;
> +}
> +
> +/**
> + * timer_early_get_count() - Get the timer count before driver model
> + *
> + */
> +u64 notrace timer_early_get_count(void)
> +{
> +   return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
> +}
> +#endif
> +
>  static const struct timer_ops andes_plmt_ops = {
> .get_count = andes_plmt_get_count,
>  };
> diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
> index 21ae184057..a0f71ca897 100644
> --- a/drivers/timer/riscv_timer.c
> +++ b/drivers/timer/riscv_timer.c
> @@ -16,7 +16,7 @@
>  #include 
>  #include 
>
> -static u64 riscv_timer_get_count(struct udevice *dev)
> +static u64 notrace riscv_timer_get_count(struct udevice *dev)
>  {
> __maybe_unused u32 hi, lo;
>
> @@ -31,6 +31,25 @@ static u64 riscv_timer_get_count(struct udevice *dev)
> return ((u64)hi << 32) | lo;
>  }
>
> +#if CONFIG_IS_ENABLED(RISCV_SMODE)
> +/**
> + * timer_early_get_rate() - Get the timer rate before driver model
> + */
> +unsigned long notrace timer_early_get_rate(void)
> +{
> +   return RISCV_SMODE_TIMER_FREQ;
> +}
> +
> +/**
> + * timer_early_get_count() - Get the timer count before driver model
> + *
> + */
> +u64 notrace timer_early_get_count(void)
> +{
> +   return riscv_timer_get_count(NULL);
> +}
> +#endif
> +
>  static int riscv_timer_probe(struct udevice *dev)
>  {
> struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
> diff --git a/drivers/timer/sifive_clint_timer.c 
> b/drivers/timer/sifive_clint_timer.c
> index 00ce0f08d6..9ae05a0e7e 100644
> --- a/drivers/timer/sifive_clint_timer.c
> +++ b/drivers/timer/sifive_clint_timer.c
> @@ -14,11 +14,30 @@
>  /* mtime register */
>  #define MTIME_REG(base)((ulong)(base) + 0xbff8)
>
> -static u64 sifive_clint_get_count(struct udevice *dev)
> +static u64 notrace sifive_clint_get_count(struct udevice *dev)
>  {
> return readq((void __iomem *)MTIME_REG(dev->priv));
>  }
>
> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
> +/**
> + * timer_early_get_rate() - Get the timer rate before driver model
> + */
> +unsigned long notrace timer_early_get_rate(void)
> +{
> +   return RISCV_MMODE_TIMER_FREQ;
> +}
> +
> +/**
> + * timer_early_get_count() - Get the timer count before driver model
> + *
> + */
> +u64 notrace timer_early_get_count(void)
> +{
> +   return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
> +}
> +#endif
> +
>  static const struct timer_ops sifive_clint_ops = {
> .get_count = sifive_clint_get_count,
>  };
> diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
> index b2606e794d..bd9c371f83 100644
> --- a/include/configs/ax25-ae350.h
> +++ b/include/configs/ax25-ae350.h
> @@ -17,6 +17,11 @@
>  #endif
>  #endif
>
> +#define RISCV_MMODE_TIMERBASE   0xe600
> +#define RISCV_MMODE_TIMER_FREQ  6000
> +
> +#define RISCV_SMODE_TIMER_FREQ  6000
> +
>  /*
>   * CPU and Board Configuration Options
>   */
> diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h
> 

RE: [v1 1/5] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 3:05 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [v1 1/5] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
> 
> Vendor Authorized Boot is a security feature for authenticating the images
> such as U-Boot, ARM trusted Firmware, Linux kernel, device tree blob and
> etc loaded from FIT. After those images are loaded from FIT, the VAB
> certificate and signature block appended at the end of each image are sent
> to Secure Device Manager (SDM) for authentication. U-Boot will validate the
> SHA384 of the image against the SHA384 hash stored in the VAB certificate
> before sending the image to SDM for authentication.
> 
> Signed-off-by: Siew Chin Lim 
> ---
>  arch/arm/mach-socfpga/Kconfig|  15 ++
>  arch/arm/mach-socfpga/Makefile   |   2 +
>  arch/arm/mach-socfpga/include/mach/mailbox_s10.h |   1 +
>  arch/arm/mach-socfpga/include/mach/secure_vab.h  |  63 
>  arch/arm/mach-socfpga/secure_vab.c   | 188
> +++
>  common/Kconfig.boot  |   2 +-
>  6 files changed, 270 insertions(+), 1 deletion(-)  create mode 100644
> arch/arm/mach-socfpga/include/mach/secure_vab.h
>  create mode 100644 arch/arm/mach-socfpga/secure_vab.c
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-
> socfpga/Kconfig index 5dee193b31..1dfe08ec86 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -6,6 +6,21 @@ config ERR_PTR_OFFSET
>  config NR_DRAM_BANKS
>   default 1
> 
> +config SECURE_VAB_AUTH
Add prefix SOCFPGA_ for socfpga config, same for config below.

> + bool "Enable boot image authentication with Secure Device
> Manager"
> + depends on TARGET_SOCFPGA_AGILEX || TARGET_SOCFPGA_DM
> + select FIT_IMAGE_POST_PROCESS
> + select SHA512_ALGO
> + select SHA384
Sort alphanumeric order

> + select SPL_FIT_IMAGE_POST_PROCESS
> + help
> +  All images loaded from FIT will be authenticated by Secure Device
> +  Manager.
> +
> +config SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE
> + bool "Allow non-FIT VAB signed images"
> + depends on SECURE_VAB_AUTH
> +
>  config SPL_SIZE_LIMIT
>   default 0x1 if TARGET_SOCFPGA_GEN5
> 
[...]



> +/*
> + * struct fcs_hps_vab_certificate_header
> + * @cert_magic_num: Certificate Magic Word (0x25D04E7F)
> + * @cert_data_sz: size of this certificate header (0x80)
> + *   Includes magic number all the way to the certificate
> + *  signing keychain (excludes cert. signing keychain)
> + * @cert_ver: Certificate Version
> + * @cert_type: Certificate Type
> + * @data: VAB HPS Image Certificate data  */ struct
> +fcs_hps_vab_certificate_header {
> + u32 cert_magic_num; /* offset 0 */
> + u32 cert_data_sz;
> + u32 cert_ver;
> + u32 cert_type;
> + struct fcs_hps_vab_certificate_data d;  /* offset 0x10 */
> + /* keychain starts at offset 0x50 */
> +};
> +
> +#define VAB_CERT_HEADER_SIZE sizeof(struct
> fcs_hps_vab_certificate_header)
> +#define VAB_CERT_MAGIC_OFFSEToffsetof \
> + (struct fcs_hps_vab_certificate_header, d)
> +#define VAB_CERT_FIT_SHA384_OFFSET   offsetof \
> + (struct fcs_hps_vab_certificate_data,
> \
> +  fcs_sha384[0])
> +
> +int socfpga_vendor_authentication(void **p_image, size_t *p_size);
> +
> +#endif /* _SECURE_VAB_H_ */
> diff --git a/arch/arm/mach-socfpga/secure_vab.c b/arch/arm/mach-
> socfpga/secure_vab.c
> new file mode 100644
> index 00..3dd4de127b
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/secure_vab.c
> @@ -0,0 +1,188 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 Intel Corporation 
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
Sort alphanumeric order
> +
> +#define CHUNKSZ_PER_WD_RESET (256 * 1024)
SZ_1K for 1024
> + /* We need to use the 4 bytes before the certificate for T */
What is "T"?


> + backup_word = *(u32 *)mbox_data_addr;
> + /* T = 0 */
> + *(u32 *)mbox_data_addr = 0;
> +
> + do {
> +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF)
> + /* Invoke SMC call to ATF to send the VAB certificate to SDM
> */
> + ret  = smc_send_mailbox(MBOX_VAB_SRC_CERT,
> mbox_data_sz,
> + (u32 *)mbox_data_addr, 0,
> &resp_len,
> + &resp);
> +#else
> + /* Send the VAB certficate to SDM for authentication */
> + ret = mbox_send_cmd(MBOX_ID_UBOOT,
> MBOX_VAB_SRC_CERT,
> + 

Re: [PATCH v9 04/11] efi_loader: capsule: support firmware update

[AKASHI Takahiro]

Sughosh,

On Sat, Nov 21, 2020 at 11:32:43PM +0530, Sughosh Ganu wrote:
> hi Takahiro,
> 
> On Tue, 17 Nov 2020 at 05:58, AKASHI Takahiro 
> wrote:
> 
> > A capsule tagged with the guid, EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID,
> > is handled as a firmware update object.
> > What efi_update_capsule() basically does is to load any firmware management
> > protocol (or fmp) drivers contained in a capsule, find out an appropriate
> > fmp driver and then invoke its set_image() interface against each binary
> > in a capsule.
> > In this commit, however, loading drivers is not supported.
> >
> > The result of applying a capsule is set to be stored in "Capsule"
> > variable, but its implementation is deferred to a fmp driver.
> >
> > Signed-off-by: AKASHI Takahiro 
> > ---
> >  include/efi_api.h| 129 +++
> >  include/efi_loader.h |   2 +
> >  lib/efi_loader/Kconfig   |   8 ++
> >  lib/efi_loader/efi_capsule.c | 238 ++-
> >  lib/efi_loader/efi_setup.c   |   4 +
> >  5 files changed, 380 insertions(+), 1 deletion(-)
> >
> > diff --git a/include/efi_api.h b/include/efi_api.h
> > index 7a2a087c60ed..966bc6e590bf 100644
> > --- a/include/efi_api.h
> > +++ b/include/efi_api.h
> > @@ -217,6 +217,9 @@ enum efi_reset_type {
> >  #define CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE0x0002
> >  #define CAPSULE_FLAGS_INITIATE_RESET   0x0004
> >
> > +#define CAPSULE_SUPPORT_AUTHENTICATION 0x0001
> > +#define CAPSULE_SUPPORT_DEPENDENCY 0x0002
> > +
> >  #define EFI_CAPSULE_REPORT_GUID \
> > EFI_GUID(0x39b68c46, 0xf7fb, 0x441b, 0xb6, 0xec, \
> >  0x16, 0xb0, 0xf6, 0x98, 0x21, 0xf3)
> > @@ -225,6 +228,10 @@ enum efi_reset_type {
> > EFI_GUID(0xde9f0ec, 0x88b6, 0x428f, 0x97, 0x7a, \
> >  0x25, 0x8f, 0x1d, 0xe, 0x5e, 0x72)
> >
> > +#define EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID \
> > +   EFI_GUID(0x6dcbd5ed, 0xe82d, 0x4c44, 0xbd, 0xa1, \
> > +0x71, 0x94, 0x19, 0x9a, 0xd9, 0x2a)
> > +
> >  struct efi_capsule_header {
> > efi_guid_t capsule_guid;
> > u32 header_size;
> > @@ -253,6 +260,33 @@ struct efi_memory_range_capsule {
> > struct efi_memory_range memory_ranges[];
> >  } __packed;
> >
> > +struct efi_firmware_management_capsule_header {
> > +   u32 version;
> > +   u16 embedded_driver_count;
> > +   u16 payload_item_count;
> > +   u64 item_offset_list[];
> > +} __packed;
> > +
> > +struct efi_firmware_management_capsule_image_header {
> > +   u32 version;
> > +   efi_guid_t update_image_type_id;
> > +   u8 update_image_index;
> > +   u8 reserved[3];
> > +   u32 update_image_size;
> > +   u32 update_vendor_code_size;
> > +   u64 update_hardware_instance;
> > +   u64 image_capsule_support;
> > +} __packed;
> > +
> > +struct efi_capsule_result_variable_fmp {
> > +   u16 version;
> > +   u8 payload_index;
> > +   u8 update_image_index;
> > +   efi_guid_t update_image_type_id;
> > +   // u16 capsule_file_name[];
> > +   // u16 capsule_target[];
> > +} __packed;
> > +
> >
> 
> 
> 
> 
> > +/**
> > + * efi_capsule_update_firmware - update firmware from capsule
> > + * @capsule_data:  Capsule
> > + *
> > + * Update firmware, using a capsule, @capsule_data. Loading any FMP
> > + * drivers embedded in a capsule is not supported.
> > + *
> > + * Return: status code
> > + */
> > +static efi_status_t efi_capsule_update_firmware(
> > +   struct efi_capsule_header *capsule_data)
> > +{
> > +   struct efi_firmware_management_capsule_header *capsule;
> > +   struct efi_firmware_management_capsule_image_header *image;
> > +   size_t capsule_size;
> > +   void *image_binary, *vendor_code;
> > +   efi_handle_t *handles;
> > +   efi_uintn_t no_handles;
> > +   int item;
> > +   struct efi_firmware_management_protocol *fmp;
> > +   u16 *abort_reason;
> > +   efi_status_t ret = EFI_SUCCESS;
> > +
> > +   /* sanity check */
> > +   if (capsule_data->header_size < sizeof(*capsule) ||
> > +   capsule_data->header_size >= capsule_data->capsule_image_size)
> > +   return EFI_INVALID_PARAMETER;
> > +
> > +   capsule = (void *)capsule_data + capsule_data->header_size;
> > +   capsule_size = capsule_data->capsule_image_size
> > +   - capsule_data->header_size;
> > +
> > +   if (capsule->version != 0x0001)
> > +   return EFI_INVALID_PARAMETER;
> > +
> > +   /* Drivers */
> > +   /* TODO: support loading drivers */
> > +
> > +   handles = NULL;
> > +   ret = EFI_CALL(efi_locate_handle_buffer(
> > +   BY_PROTOCOL,
> > +   &efi_guid_firmware_management_protocol,
> > +   NULL, &no_handles, (efi_handle_t **)&handles));
> > +   if (ret != EFI_SUCCESS)
> > + 

[PATCH 2/2] dt-bindings: usb: mtk-xhci: add optional properies to disable ports

[Chunfeng Yun]

Add optional properies to disable usb2 or usb3 ports, they are used
when provided ports are not used on some special platforms.

Signed-off-by: Chunfeng Yun 
---
 doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt 
b/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt
index 0447468a2d..2a298f7b16 100644
--- a/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt
+++ b/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt
@@ -25,6 +25,10 @@ Required properties:
 
 Optional properties:
  - vbus-supply : reference to the VBUS regulator;
+ - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
+   bit1 for u3port1, ... etc;
+ - mediatek,u2p-dis-msk : mask to disable u2ports, bit0 for u2port0,
+   bit1 for u2port1, ... etc;
 
 Example:
 xhci: usb@1a0c {
-- 
2.18.0

[PATCH 1/2] usb: xhci-mtk: support option to disable ports

[Chunfeng Yun]

Add support to disable specific ports, it's useful for some
scenarios:
1. usb3 PHY is shared whith PCIe or SATA, the corresponding
   usb3 port can be disabled;
2. some usb2 or usb3 ports are not used on special platforms,
   they should be disabled to save power.

Signed-off-by: Chunfeng Yun 
---
 drivers/usb/host/xhci-mtk.c | 23 ---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index f62e232d21..ebda80f2af 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -61,10 +61,13 @@ struct mtk_xhci {
struct phy_bulk phys;
int num_u2ports;
int num_u3ports;
+   u32 u3p_dis_msk;
+   u32 u2p_dis_msk;
 };
 
 static int xhci_mtk_host_enable(struct mtk_xhci *mtk)
 {
+   int u3_ports_disabed = 0;
u32 value;
u32 check_val;
int ret;
@@ -73,15 +76,23 @@ static int xhci_mtk_host_enable(struct mtk_xhci *mtk)
/* power on host ip */
clrbits_le32(mtk->ippc + IPPC_IP_PW_CTRL1, CTRL1_IP_HOST_PDN);
 
-   /* power on and enable all u3 ports */
+   /* power on and enable u3 ports except skipped ones */
for (i = 0; i < mtk->num_u3ports; i++) {
+   if (BIT(i) & mtk->u3p_dis_msk) {
+   u3_ports_disabed++;
+   continue;
+   }
+
clrsetbits_le32(mtk->ippc + IPPC_U3_CTRL(i),
CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS,
CTRL_U3_PORT_HOST_SEL);
}
 
-   /* power on and enable all u2 ports */
+   /* power on and enable u2 ports except skipped ones */
for (i = 0; i < mtk->num_u2ports; i++) {
+   if (BIT(i) & mtk->u2p_dis_msk)
+   continue;
+
clrsetbits_le32(mtk->ippc + IPPC_U2_CTRL(i),
CTRL_U2_PORT_PDN | CTRL_U2_PORT_DIS,
CTRL_U2_PORT_HOST_SEL);
@@ -94,7 +105,7 @@ static int xhci_mtk_host_enable(struct mtk_xhci *mtk)
check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
STS1_SYS125_RST | STS1_XHCI_RST;
 
-   if (mtk->num_u3ports)
+   if (mtk->num_u3ports > u3_ports_disabed)
check_val |= STS1_U3_MAC_RST;
 
ret = readl_poll_timeout(mtk->ippc + IPPC_IP_PW_STS1, value,
@@ -176,6 +187,12 @@ static int xhci_mtk_ofdata_get(struct mtk_xhci *mtk)
if (ret)
debug("can't get vbus regulator %d!\n", ret);
 
+   /* optional properties to disable ports, ignore the error */
+   dev_read_u32(dev, "mediatek,u3p-dis-msk", &mtk->u3p_dis_msk);
+   dev_read_u32(dev, "mediatek,u2p-dis-msk", &mtk->u2p_dis_msk);
+   dev_info(dev, "ports disabled mask: u3p-0x%x, u2p-0x%x\n",
+mtk->u3p_dis_msk, mtk->u2p_dis_msk);
+
return 0;
 }
 
-- 
2.18.0

Re: early stage debugging on a real product

[Andy Shevchenko]

On Mon, Nov 23, 2020 at 9:18 PM Andy Shevchenko
 wrote:
> On Mon, Nov 23, 2020 at 9:08 PM Simon Glass  wrote:
> > On Mon, 23 Nov 2020 at 07:04, Andy Shevchenko  
> > wrote:

> > Make sure that start.S puts the top of memory in a sensible place. If
> > something has set up RAM already then you probably want it to be the
> > top of RAM, below 2GB.

This makes me go much further, thanks. It appears that the default
method to calculate RAM top is not correct.


-- 
With Best Regards,
Andy Shevchenko

Re: early stage debugging on a real product

[Andy Shevchenko]

On Mon, Nov 23, 2020 at 9:08 PM Simon Glass  wrote:
> On Mon, 23 Nov 2020 at 07:04, Andy Shevchenko  
> wrote:

Thanks! My comments below.

> > I have been debugging U-Boot on a product (Android-based) device (*)
> > which is not yet supported by U-Boot. It's x86 based.
> >
> > I have stumbled over the couple of things:
> > 1/ it required me to enable TIMER_EARLY and by code analysing I can
> > tell that DM loop fails by some reason
> > 2/ it hangs
> >reserve_uboot,
> >reserve_malloc,
> >reserve_board,
> >...here...
> >
> > My suspicion that fastboot does bad things to it (overwritten memory)
> > or something I have missed. Any ideas what to try / where to look into
> > besides the above which I'm on?
>
> #define DEBUG at the top of board_f.c - you might need DEBUG_UART
>
> Make sure that start.S puts the top of memory in a sensible place. If
> something has set up RAM already then you probably want it to be the
> top of RAM, below 2GB.

I wasn't clear, there is no means to debug (See * below).
There is no output except vibra, perhaps I may have (charger) led, but
former I got working, maybe I need to implement morse code.

> > (*) Only I can get is just an approximate place where the code is
> > stuck / hangs. And it's time consuming...
> >
>
> Use a Dediprog SPI emulator and an Intel debugger.

Not sure how it is possible... The only connector I have is micro-B.

-- 
With Best Regards,
Andy Shevchenko

Re: early stage debugging on a real product

[Simon Glass]

Hi Andy,

On Mon, 23 Nov 2020 at 07:04, Andy Shevchenko  wrote:
>
> Hi!
>
> I have been debugging U-Boot on a product (Android-based) device (*)
> which is not yet supported by U-Boot. It's x86 based.
>
> I have stumbled over the couple of things:
> 1/ it required me to enable TIMER_EARLY and by code analysing I can
> tell that DM loop fails by some reason
> 2/ it hangs
>reserve_uboot,
>reserve_malloc,
>reserve_board,
>...here...
>
> My suspicion that fastboot does bad things to it (overwritten memory)
> or something I have missed. Any ideas what to try / where to look into
> besides the above which I'm on?

#define DEBUG at the top of board_f.c - you might need DEBUG_UART

Make sure that start.S puts the top of memory in a sensible place. If
something has set up RAM already then you probably want it to be the
top of RAM, below 2GB.

>
> (*) Only I can get is just an approximate place where the code is
> stuck / hangs. And it's time consuming...
>

Use a Dediprog SPI emulator and an Intel debugger.

Regards,
Simon

Re: Uboot SPI uclass - question

[Simon Glass]

Hi,

On Mon, 23 Nov 2020 at 00:22, Rasmus Villemoes
 wrote:
>
> On 02/11/2020 19.14, Moshe, Yaniv wrote:
> > Hi Simon,
> > Hope you're doing good.
> >
> > My name is Yaniv, and I have a question regarding an old commit in U-boot:
> > commit 60e2809a848bccd3a8090d3f2237964670f2780c
> > Author: Simon Glass mailto:s...@chromium.org>>
> > Date:   Tue Feb 17 15:29:35 2015 -0700
> >
> > dm: spi: Avoid setting the speed with every transfer
> >
> > Only set the speed if it has changed from last time. Since the speed 
> > will
> > be 0 when the device is probed it will always be changed on the first
> > transfer after the device is probed.
> >
> > Signed-off-by: Simon Glass s...@chromium.org
> >
> >
> > As far as I understand it, each SPI slave has its own struct. So, when we 
> > will use the device for the first time, we will set the speed.
> > But, if we're jumping between different slaves, the slaves structs were 
> > already configured at the first time, and since then there won't be any 
> > future speed setting.
> >
> > e.g:
> > access flash with max-freq = X - > speed set
> > access TPM with max-freq =Y -> speed set
> > access flash again, slave struct already configured, no change between 
> > speed and slave->speed, -> speed stay the same as for TPM.
> >
> > Did I got it wrong? I'm trying to understand what am I missing...
>
> No, you're reading it the same way I did:
>
> https://lists.denx.de/pipermail/u-boot/2019-December/393854.html
>
> I never followed up because I didn't actually have two different spi
> devices in play on the board I was working on at the time. But it's
> something that really should be fixed.

It is easy enough to add a sandbox test for this I think.

Regards,
Simon

Re: early stage debugging on a real product

[Andy Shevchenko]

On Mon, Nov 23, 2020 at 4:05 PM Andy Shevchenko
 wrote:
>
> Hi!
>
> I have been debugging U-Boot on a product (Android-based) device (*)
> which is not yet supported by U-Boot. It's x86 based.
>
> I have stumbled over the couple of things:
> 1/ it required me to enable TIMER_EARLY and by code analysing I can
> tell that DM loop fails by some reason
> 2/ it hangs
>reserve_uboot,
>reserve_malloc,
>reserve_board,
>...here...

Basically this line in reserve_board() makes it hangs (likely page fault)
  memset(gd->bd, '\0', sizeof(struct bd_info));

I run U-Boot as a chainloader.

> My suspicion that fastboot does bad things to it (overwritten memory)
> or something I have missed. Any ideas what to try / where to look into
> besides the above which I'm on?

boot.img has the following memory map:

vmlinuz: 0x10008000
initrd: 0x1100
u-boot: 0x01101000
Net
The working android kernel shows this:
<6>[0.00] e820: BIOS-provided physical RAM map:
<6>[0.00] BIOS-e820: [mem 0x-0x00097fff] usable
<6>[0.00] BIOS-e820: [mem 0x0010-0x03ff] usable
<6>[0.00] BIOS-e820: [mem
0x0400-0x051f] reserved
<6>[0.00] BIOS-e820: [mem 0x0520-0x05bf] usable
<6>[0.00] BIOS-e820: [mem
0x05c0-0x05ff] reserved
<6>[0.00] BIOS-e820: [mem 0x0600-0x7f5f] usable
<6>[0.00] BIOS-e820: [mem
0x7f60-0xfec033ff] reserved
<6>[0.00] BIOS-e820: [mem
0xfec04000-0xfefff3ff] reserved
<6>[0.00] BIOS-e820: [mem
0xff00-0x] reserved
<6>[0.00] BIOS-e820: [mem 0x0001-0x00017fff] usable

> (*) Only I can get is just an approximate place where the code is
> stuck / hangs. And it's time consuming...

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH V3] dm: core: Add late driver remove option

[Tom Rini]

On Sun, Nov 22, 2020 at 03:13:15AM +0100, Marek Vasut wrote:
> On 11/22/20 12:07 AM, Simon Glass wrote:
> [...]
> 
> > > > > > That way we are describing the property of the device rather than 
> > > > > > what
> > > > > > we want to do with it.
> > > > > 
> > > > > The device is not critical or vital, it just needs to be torn down 
> > > > > late.
> > > > 
> > > > What is it about the device that requires it to be torn down 'late'?
> > > 
> > > I think perhaps the problem isn't that it needs to be "late", it's that
> > > it has perhaps not obviously described children.  Which gets back to
> > > what you just said as well about "later" and "fairly late".  It's an
> > > ordering problem.
> > 
> > Yes it is.
> > 
> > We currently don't record devices that depend on others. It would be
> > possible to add a refcount to DM to cope with this and implement it
> > for clocks. I wonder if that might be better than what we have here?
> 
> This is still a bootloader, not a general-purpose OS, so I would argue we
> should not complicate this more than is necessary. The DM already adds a lot
> of bloat to U-Boot, no need to make that worse unless there is a real good
> reason for that. Also, in V1 of this patch, Simon did suggest that a simple
> approach is OK if I recall correctly.

Perhaps now that it's clear to everyone what "late" means in this
context, we can just solve it with a flag + documentation that
...whatever the name is... means that it's for ensuring that we have
unwound the other parts of the system which require this to be enabled
first.

-- 
Tom


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Re: [PATCH 0/3] Complete Optional Header fields in EFI header

[Atish Patra]

On Tue, Nov 17, 2020 at 12:03 AM Leo Liang  wrote:
>
> Date: Tue, 17 Nov 2020 15:36:27 +0800
> From: Leo Yu-Chi Liang 
> Subject: [PATCH 0/3] Complete Optional Header fields in EFI header
>
> These three patches complete the optional header fields in efi header.
> Atish's patch was drawn in because CI test would fail at "86. test/py 
> qemu-riscv32 --> test_efi_selftest" with this patch alone.
>
>
> Atish Patra (1):
>   riscv: Fix efi header for RV32
>
> Leo Yu-Chi Liang (2):
>   riscv: Fix efi header size for RV32

For some reason, this patch didn't land in my inbox. I do see it in
the mailing list though.
https://patchwork.ozlabs.org/project/uboot/patch/20201117080559.ga9...@andestech.com/

Reviewed-by: Atish Patra 

>   riscv: Complete efi header for RV32/64
>
>  arch/riscv/lib/crt0_riscv_efi.S | 28 +++-
>  1 file changed, 27 insertions(+), 1 deletion(-)
>
> --
> 2.17.0



-- 
Regards,
Atish

Re: [PATCH 3/3] riscv: Complete efi header for RV32/64

[Atish Patra]

On Tue, Nov 17, 2020 at 12:07 AM Leo Liang  wrote:
>
> Date: Mon, 16 Nov 2020 17:07:41 +0800
> From: Leo Yu-Chi Liang 
> Subject: [PATCH 3/3] riscv: Complete efi header for RV32/64
>
> This patch depends on Atish's patch.
> (https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.pa...@wdc.com/)
>
> Add fields to complete Optional Header "Data Directories" specified in the 
> document.
> (https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)
>
> Signed-off-by: Leo Yu-Chi Liang 
> Cc: r...@andestech.com
> Cc: alan...@andestech.com
> Cc: atish.pa...@wdc.com
> Cc: xypron.g...@gmx.de
> Cc: bmeng...@gmail.com
> ---
>  arch/riscv/lib/crt0_riscv_efi.S | 10 ++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S
> index 48ff89553b..e7c4d99c21 100644
> --- a/arch/riscv/lib/crt0_riscv_efi.S
> +++ b/arch/riscv/lib/crt0_riscv_efi.S
> @@ -107,6 +107,16 @@ extra_header_fields:
> .quad   0   /* ExceptionTable */
> .quad   0   /* CertificationTable */
> .quad   0   /* BaseRelocationTable */
> +   .quad   0   /* Debug */
> +   .quad   0   /* Architecture */
> +   .quad   0   /* Global Ptr */
> +   .quad   0   /* TLS Table */
> +   .quad   0   /* Load Config Table */
> +   .quad   0   /* Bound Import */
> +   .quad   0   /* IAT */
> +   .quad   0   /* Delay Import Descriptor */
> +   .quad   0   /* CLR Runtime Header */
> +   .quad   0   /* Reserved */
>
> /* Section table */
>  section_table:
> --
> 2.17.0


Reviewed-by: Atish Patra 

-- 
Regards,
Atish

Re: [PATCH] cmd: Add a pwm command

[Tom Rini]

On Mon, Nov 23, 2020 at 01:38:41PM +0530, Pragnesh Patel wrote:

> Add the command "pwm" for controlling the pwm channels. This
> command provides pwm invert/config/enable/disable functionalities
> via PWM uclass drivers
> 
> Signed-off-by: Pragnesh Patel 
> ---
>  cmd/Kconfig  |   6 +++
>  cmd/Makefile |   1 +
>  cmd/pwm.c| 119 +++
>  3 files changed, 126 insertions(+)
>  create mode 100644 cmd/pwm.c

Can you please add some tests and dt fragments to sandbox for this?
Thanks.

-- 
Tom


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Re: [PULL] u-boot-usb/master

[Tom Rini]

On Sun, Nov 22, 2020 at 04:07:04PM +0100, Marek Vasut wrote:

> The following changes since commit 12e396303c487c9f0fdf8d36d31a97cd2dada643:
> 
>   Merge tag 'efi-2021-01-rc3-2' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-11-21 08:04:39
> -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-usb.git master
> 
> for you to fetch changes up to 05dac23261284578ff17952e11340f41127923ac:
> 
>   usb: gadget: dwc2_udc_otg: return zero when reset property is not present
> (2020-11-22 13:18:20 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PULL] u-boot-sh/master

[Tom Rini]

On Sun, Nov 22, 2020 at 04:06:43PM +0100, Marek Vasut wrote:

> The following changes since commit 12e396303c487c9f0fdf8d36d31a97cd2dada643:
> 
>   Merge tag 'efi-2021-01-rc3-2' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-11-21 08:04:39
> -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-sh.git master
> 
> for you to fetch changes up to 46f3282b281ce222bcedd4e158629c5a97882933:
> 
>   pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrl
> (2020-11-22 12:49:22 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [RFC] regarding Uboot AUTOBOOT_STOP_STR_SHA256

[Harm Berntsen]

Hi Joel,

Regarding 2, In my implementation I have the following:

bootcmd=run bootcmd2 || reset

In case bootcmd2 fails, the board will reset instead of dropping to a
prompt. Maybe this is also sufficient for you :).

Kind regards,
Harm Berntsen

-Original Message-
From: Joel Peshkin 
To: Stefan Roese , u-boot@lists.denx.de

Subject: [RFC] regarding Uboot AUTOBOOT_STOP_STR_SHA256
Date: Fri, 20 Nov 2020 11:16:03 -0800

Hi Stefan,

    I have a patch (
https://patchwork.ozlabs.org/project/uboot/patch/20201120180524.30251-1-jp933...@xl-irv-13.lvn.broadcom.net/
) under review that adds optional SALT to AUTOBOOT_STOP_STR_SHA256
without
breaking backward compatibility.  As I see that you were involved with
the
original requirements, I want to bring that patch to your attention and
ask
you about several others that I plan to follow with.   I presume I
should
explicitly add you to the CC on those.

   Do you have any concerns about the following changes??

1) Prior to entering the autoboot.c, it is possible that there would
already be characters in the UART receive buffer that are not part of
the
password.  For my application, it is preferable to swallow any existing
characters before starting to accept characters into the password.   Is
this something that would be a problem for anyone who might rely on
beginning to type the password before the device gets to the prompt? 
Would
I need to make this a config option?

2) If the password is not given, autoboot will not permit CLI access
before
bootcmd.  However, if bootcmd returns (most likely fails), the current
implementation permits access without a password.  My requirements
would
require the password even if the boot fails.  Is this something that
should
be configurable or should I make the change to autoboot so that, if the
boot fails, the password is required again and the device will require
reset if the password is not given then?

3) The passwords themselves may be relatively long and we do not want
to
have a long timeout increasing boot time.  My current implementation
treats
the timeout as the time to BEGIN typing the password and adds one
second
for every character typed.  So, I can have a 5 second timeout and, if
the
password is 10 characters long, then the user doesn't time out as long
as
they start typing within the 5 seconds and average one character per
second.   Would this be something that needs to be configurable in
Kconfig
or would it be OK to specify the added 1 second time in a #define ??

Thank You,

Joel Peshkin

early stage debugging on a real product

[Andy Shevchenko]

Hi!

I have been debugging U-Boot on a product (Android-based) device (*)
which is not yet supported by U-Boot. It's x86 based.

I have stumbled over the couple of things:
1/ it required me to enable TIMER_EARLY and by code analysing I can
tell that DM loop fails by some reason
2/ it hangs
   reserve_uboot,
   reserve_malloc,
   reserve_board,
   ...here...

My suspicion that fastboot does bad things to it (overwritten memory)
or something I have missed. Any ideas what to try / where to look into
besides the above which I'm on?

(*) Only I can get is just an approximate place where the code is
stuck / hangs. And it's time consuming...

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 1/2] dm: core: add function uclass_probe_all() to probe all devices

[Sean Anderson]

On 11/23/20 3:06 AM, Vabhav Sharma (OSS) wrote:




-Original Message-
From: Sean Anderson 
Sent: Thursday, November 19, 2020 9:05 AM
To: Vabhav Sharma (OSS) ;
s...@chromium.org; s...@denx.de
Cc: u-boot@lists.denx.de; Varun Sethi ;
andre.przyw...@arm.com; Vabhav Sharma 
Subject: Re: [PATCH v4 1/2] dm: core: add function uclass_probe_all() to
probe all devices

On 11/17/20 10:00 AM, Vabhav Sharma wrote:

From: Vabhav Sharma 

Support a common method to probe all devices associated with uclass.

This includes data structures and code for finding the first device
and looping for remaining devices associated with uclasses (groups of
devices with the same purpose, e.g. all SERIAL ports will be in the same

uclass).


An example is SBSA compliant PL011 UART IP, where firmware does the
serial port initialization and prepare uart device to let the kernel
use it for sending and reveiving the characters.SERIAL uclass will use
this function to initialize PL011 UART ports.

The feature is enabled with CONFIG_DM.

Signed-off-by: Vabhav Sharma 
Reviewed-by: Stefan Roese 
Reviewed-by: Simon Glass 
--
   v4:
   Incorporated review comments of Simon
   Removed if (dev)..  conditional check

   v3:
   Incorporated review comments of Stephan,Simon
   Related discussion
https://patchwork.ozlabs.org/project/uboot/patch/1601400
385-11854-1-git-send-email-vabhav.sha...@oss.nxp.com/
---
  drivers/core/uclass.c | 16 
  include/dm/uclass.h   | 12 
  2 files changed, 28 insertions(+)

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index
c3f1b73..a1dc8bb 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -792,6 +792,22 @@ int uclass_pre_remove_device(struct udevice

*dev)

}  #endif

+int uclass_probe_all(enum uclass_id id) {
+   struct udevice *dev;
+   int ret;
+
+   ret = uclass_first_device(id, &dev);
+   if (ret || !dev)
+   return ret;
+
+   /* Scanning uclass to probe all devices */
+   for (; dev; uclass_next_device(&dev))


You must check the return value of this function.

Error check is done for first device before passing the device to 
uclass_next_device(),
I think of other implementation is to combine the first device check and 
iterating through device list of u-class as
for (ret = uclass_first_device(id, &dev); dev && !ret;  ret = 
uclass_next_device(&dev))
;
But iteration is not required if first device is not found and current changes 
seems to be ok
Please share valuable feedback



If the second (or any device after the first) fails to init, then the
error will be silently ignored.



Also, I would suggest using a while loop instead of an empty for loop.

Please elaborate, Found for loop best suitable to use here


In terms of original functionality,

while (dev)
uclass_next_device(&dev)

However, I suggest

while (dev) {
ret = uclass_next_device(&dev)
if (ret)
return ret;
}

So that errors are handled properly.




+   ;
+
+   return 0;
+}
+
  UCLASS_DRIVER(nop) = {
.id = UCLASS_NOP,
.name   = "nop",
diff --git a/include/dm/uclass.h b/include/dm/uclass.h index
7188304..7ac0aaa 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -381,6 +381,18 @@ int uclass_first_device_drvdata(enum uclass_id
id, ulong driver_data,  int uclass_resolve_seq(struct udevice *dev);

  /**
+ * uclass_probe_all() - Probe all devices based on an uclass ID
+ *
+ * Every uclass is identified by an ID, a number from 0 to n-1 where
+ n is
+ * the number of uclasses. This function probe all devices asocciated
+ with


nit: probes associated

Ok



+ * a uclass by looking its ID.


nit: for its

Sure


AFAICT uclass_find_next_device walks the linked-list of devices in a uclass,
and does not care about the ID. So this documentation is incorrect.

This documentation is for new function uclass_probe_all() and understand each 
Uclass is identified by enum ID e.g. UCLASS_SERIAL for serial devices.
According used the statement  "Every uclass is identified by an ID"

Please suggest.


Ok, this documentation is confusing because the idea of uclasses being
identified by their UCLASS_XXX id is a very common idea in U-Boot
already. On my first reading, I thought you were instead referring to
udevices being identified by id, when instead you were using
udevice_get_next to get the device. I suggest documenting the method
used to initialize device, and refrain from (re)documenting the method
used to identify the uclass. If someone is confused about that, they
need only refer to the definition of enum uclass_id.




+ *
+ * @id: uclass ID to look up
+ * @return 0 if OK, other -ve on error  */ int uclass_probe_all(enum
+uclass_id id);
+
+/**
   * uclass_id_foreach_dev() - Helper function to iteration through devices
   *
   * This creates a for() loop which works through the available
devices in

Q: EFI_SPI support

[Michael Lawnick]

Hi,

before starting to walk the troublesome way on my own:
Is there any development for EFI_SPI, EFI_I2C and/or EFI_PCI ongoing?
I will have to write an EFI application that needs access to devices on
these buses. So I try to find the path with lowest harm.

KR
Michael Lawnick

[PATCH v3 10/18] common: board_r: Drop initr_pci wrapper

[Ovidiu Panait]

Add a return value to pci_init and use it directly in the post-relocation
init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- add reviewed-by tag

v2 updates:
- add function comment

 common/board_r.c | 18 --
 drivers/pci/pci-uclass.c |  4 +++-
 drivers/pci/pci.c|  6 --
 include/init.h   | 13 -
 4 files changed, 23 insertions(+), 18 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index d86ff0cb5e..414b6272c5 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -214,16 +214,6 @@ static int initr_unlock_ram_in_cache(void)
 }
 #endif
 
-#ifdef CONFIG_PCI
-static int initr_pci(void)
-{
-   if (IS_ENABLED(CONFIG_PCI_INIT_R))
-   pci_init();
-
-   return 0;
-}
-#endif
-
 static int initr_barrier(void)
 {
 #ifdef CONFIG_PPC
@@ -732,12 +722,12 @@ static init_fnc_t init_sequence_r[] = {
post_output_backlog,
 #endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
+#if defined(CONFIG_PCI_INIT_R) && defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
 * Do early PCI configuration _before_ the flash gets initialised,
 * because PCU resources are crucial for flash access on some boards.
 */
-   initr_pci,
+   pci_init,
 #endif
 #ifdef CONFIG_ARCH_EARLY_INIT_R
arch_early_init_r,
@@ -776,11 +766,11 @@ static init_fnc_t init_sequence_r[] = {
mac_read_from_eeprom,
 #endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
+#if defined(CONFIG_PCI_INIT_R) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
 * Do pci configuration
 */
-   initr_pci,
+   pci_init,
 #endif
stdio_add_devices,
initr_jumptable,
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index eb07d25301..7e9b5cf0fa 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1834,7 +1834,7 @@ U_BOOT_DRIVER(pci_generic_drv) = {
.of_match   = pci_generic_ids,
 };
 
-void pci_init(void)
+int pci_init(void)
 {
struct udevice *bus;
 
@@ -1847,4 +1847,6 @@ void pci_init(void)
 uclass_next_device_check(&bus)) {
;
}
+
+   return 0;
 }
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 664e8379eb..a7453e5755 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -454,16 +454,18 @@ int pci_hose_scan(struct pci_controller *hose)
return pci_hose_scan_bus(hose, hose->current_busno);
 }
 
-void pci_init(void)
+int pci_init(void)
 {
hose_head = NULL;
 
/* allow env to disable pci init/enum */
if (env_get("pcidisable") != NULL)
-   return;
+   return 0;
 
/* now call board specific pci_init()... */
pci_init_board();
+
+   return 0;
 }
 
 /* Returns the address of the requested capability structure within the
diff --git a/include/init.h b/include/init.h
index c6c5f34b55..dded1cb871 100644
--- a/include/init.h
+++ b/include/init.h
@@ -186,6 +186,18 @@ int cpu_secondary_init_r(void);
  */
 int pci_ep_init(void);
 
+/**
+ * pci_init() - Enumerate pci devices
+ *
+ * It is called during the generic post-relocation init sequence to enumerate
+ * pci buses. This is needed, for instance, in the case of DM PCI-based
+ * Ethernet devices, which will not be detected without having the enumeration
+ * performed earlier.
+ *
+ * Return: 0 if OK
+ */
+int pci_init(void);
+
 /**
  * init_cache_f_r() - Turn on the cache in preparation for relocation
  *
@@ -257,7 +269,6 @@ int mac_read_from_eeprom(void);
 int set_cpu_clk_info(void);
 int update_flash_size(int flash_size);
 int arch_early_init_r(void);
-void pci_init(void);
 int misc_init_r(void);
 #if defined(CONFIG_VID)
 int init_func_vid(void);
-- 
2.17.1

[PATCH v3 09/18] common: board_r: Drop initr_pci_ep wrapper

[Ovidiu Panait]

Add a return value to pci_ep_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- add reviewed-by tag

v2 updates:
- add function comment

 common/board_r.c | 11 +--
 drivers/pci_endpoint/pci_ep-uclass.c |  4 +++-
 include/init.h   | 10 +-
 3 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index 7a06627ba9..d86ff0cb5e 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -214,15 +214,6 @@ static int initr_unlock_ram_in_cache(void)
 }
 #endif
 
-#ifdef CONFIG_PCI_ENDPOINT
-static int initr_pci_ep(void)
-{
-   pci_ep_init();
-
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_PCI
 static int initr_pci(void)
 {
@@ -836,7 +827,7 @@ static init_fnc_t init_sequence_r[] = {
initr_bbmii,
 #endif
 #ifdef CONFIG_PCI_ENDPOINT
-   initr_pci_ep,
+   pci_ep_init,
 #endif
 #ifdef CONFIG_CMD_NET
INIT_FUNC_WATCHDOG_RESET
diff --git a/drivers/pci_endpoint/pci_ep-uclass.c 
b/drivers/pci_endpoint/pci_ep-uclass.c
index 38a5f08376..aa89701de8 100644
--- a/drivers/pci_endpoint/pci_ep-uclass.c
+++ b/drivers/pci_endpoint/pci_ep-uclass.c
@@ -210,7 +210,7 @@ UCLASS_DRIVER(pci_ep) = {
.flags  = DM_UC_FLAG_SEQ_ALIAS,
 };
 
-void pci_ep_init(void)
+int pci_ep_init(void)
 {
struct udevice *dev;
 
@@ -219,4 +219,6 @@ void pci_ep_init(void)
 uclass_next_device_check(&dev)) {
;
}
+
+   return 0;
 }
diff --git a/include/init.h b/include/init.h
index 7cdc47cff1..c6c5f34b55 100644
--- a/include/init.h
+++ b/include/init.h
@@ -177,6 +177,15 @@ int setup_bdinfo(void);
  */
 int cpu_secondary_init_r(void);
 
+/**
+ * pci_ep_init() - Initialize pci endpoint devices
+ *
+ * It is called during the generic post-relocation init sequence.
+ *
+ * Return: 0 if OK
+ */
+int pci_ep_init(void);
+
 /**
  * init_cache_f_r() - Turn on the cache in preparation for relocation
  *
@@ -249,7 +258,6 @@ int set_cpu_clk_info(void);
 int update_flash_size(int flash_size);
 int arch_early_init_r(void);
 void pci_init(void);
-void pci_ep_init(void);
 int misc_init_r(void);
 #if defined(CONFIG_VID)
 int init_func_vid(void);
-- 
2.17.1

[PATCH v3 11/18] common: board_r: Drop initr_noncached wrapper

[Ovidiu Panait]

Add a return value to noncached_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- add reviewed-by tag

v2 updates:
- add function comment

 arch/arm/include/asm/system.h | 13 -
 arch/arm/lib/cache.c  |  4 +++-
 common/board_r.c  | 10 +-
 3 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index ce552944b7..5fe83699f4 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -628,7 +628,18 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, 
size_t size,
 enum dcache_option option);
 
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
-void noncached_init(void);
+/**
+ * noncached_init() - Initialize non-cached memory region
+ *
+ * Initialize non-cached memory area. This memory region will be typically
+ * located right below the malloc() area and mapped uncached in the MMU.
+ *
+ * It is called during the generic post-relocation init sequence.
+ *
+ * Return: 0 if OK
+ */
+int noncached_init(void);
+
 phys_addr_t noncached_alloc(size_t size, size_t align);
 #endif /* CONFIG_SYS_NONCACHED_MEMORY */
 
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index ee7d14b2d3..bdde9cdad5 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -86,7 +86,7 @@ void noncached_set_region(void)
 #endif
 }
 
-void noncached_init(void)
+int noncached_init(void)
 {
phys_addr_t start, end;
size_t size;
@@ -103,6 +103,8 @@ void noncached_init(void)
noncached_next = start;
 
noncached_set_region();
+
+   return 0;
 }
 
 phys_addr_t noncached_alloc(size_t size, size_t align)
diff --git a/common/board_r.c b/common/board_r.c
index 414b6272c5..48e898b586 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -242,14 +242,6 @@ static int initr_malloc(void)
return 0;
 }
 
-#ifdef CONFIG_SYS_NONCACHED_MEMORY
-static int initr_noncached(void)
-{
-   noncached_init();
-   return 0;
-}
-#endif
-
 static int initr_of_live(void)
 {
if (CONFIG_IS_ENABLED(OF_LIVE)) {
@@ -668,7 +660,7 @@ static init_fnc_t init_sequence_r[] = {
console_record_init,
 #endif
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
-   initr_noncached,
+   noncached_init,
 #endif
initr_of_live,
 #ifdef CONFIG_DM
-- 
2.17.1

[PATCH v3 14/18] common: board_r: Drop initr_api wrapper

[Ovidiu Panait]

Add a return value to api_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- add reviewed-by tag

v2 updates:
- add function comment

 api/api.c |  6 --
 api/api_private.h |  2 +-
 common/board_r.c  | 11 +--
 include/api.h | 10 +-
 4 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/api/api.c b/api/api.c
index 493b77f809..89003c161c 100644
--- a/api/api.c
+++ b/api/api.c
@@ -642,7 +642,7 @@ int syscall(int call, int *retval, ...)
return 1;
 }
 
-void api_init(void)
+int api_init(void)
 {
struct api_signature *sig;
 
@@ -679,7 +679,7 @@ void api_init(void)
sig = malloc(sizeof(struct api_signature));
if (sig == NULL) {
printf("API: could not allocate memory for the signature!\n");
-   return;
+   return -ENOMEM;
}
 
env_set_hex("api_address", (unsigned long)sig);
@@ -691,6 +691,8 @@ void api_init(void)
sig->checksum = crc32(0, (unsigned char *)sig,
  sizeof(struct api_signature));
debugf("syscall entry: 0x%lX\n", (unsigned long)sig->syscall);
+
+   return 0;
 }
 
 void platform_set_mr(struct sys_info *si, unsigned long start, unsigned long 
size,
diff --git a/api/api_private.h b/api/api_private.h
index 07fd50ad3a..bb23821c2c 100644
--- a/api/api_private.h
+++ b/api/api_private.h
@@ -8,7 +8,7 @@
 #ifndef _API_PRIVATE_H_
 #define _API_PRIVATE_H_
 
-void   api_init(void);
+intapi_init(void);
 void   platform_set_mr(struct sys_info *, unsigned long, unsigned long, int);
 intplatform_sys_info(struct sys_info *);
 
diff --git a/common/board_r.c b/common/board_r.c
index 32ad40d372..500457b080 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -490,15 +490,6 @@ static int initr_malloc_bootparams(void)
 }
 #endif
 
-#if defined(CONFIG_API)
-static int initr_api(void)
-{
-   /* Initialize API */
-   api_init();
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_CMD_NET
 static int initr_ethaddr(void)
 {
@@ -753,7 +744,7 @@ static init_fnc_t init_sequence_r[] = {
stdio_add_devices,
jumptable_init,
 #ifdef CONFIG_API
-   initr_api,
+   api_init,
 #endif
console_init_r, /* fully init console as a device */
 #ifdef CONFIG_DISPLAY_BOARDINFO_LATE
diff --git a/include/api.h b/include/api.h
index 84d81dc817..83412a7c87 100644
--- a/include/api.h
+++ b/include/api.h
@@ -7,6 +7,14 @@
 #ifndef __API_H
 #define __API_H
 
-void api_init(void);
+/**
+ * api_init() - Initialize API for external applications
+ *
+ * Initialize API for external (standalone) applications running on top of
+ * U-Boot. It is called during the generic post-relocation init sequence.
+ *
+ * Return: 0 if OK
+ */
+int api_init(void);
 
 #endif
-- 
2.17.1

[PATCH v3 06/18] common: board_r: Drop initr_console_record wrapper

[Ovidiu Panait]

Drop initr_console_record wrapper and call console_record_init directly.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- none

v2 updates:
- add reviewed-by tag

 common/board_r.c | 13 +++--
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index 29dd7d26d9..07c0ad363e 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -282,15 +282,6 @@ static int initr_malloc(void)
return 0;
 }
 
-static int initr_console_record(void)
-{
-#if defined(CONFIG_CONSOLE_RECORD)
-   return console_record_init();
-#else
-   return 0;
-#endif
-}
-
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
 static int initr_noncached(void)
 {
@@ -713,7 +704,9 @@ static init_fnc_t init_sequence_r[] = {
initr_malloc,
log_init,
initr_bootstage,/* Needs malloc() but has its own timer */
-   initr_console_record,
+#if defined(CONFIG_CONSOLE_RECORD)
+   console_record_init,
+#endif
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
initr_noncached,
 #endif
-- 
2.17.1

[PATCH v3 07/18] common: board_r: Drop initr_secondary_cpu wrapper

[Ovidiu Panait]

Add a return value to cpu_secondary_init_r and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
---
v3 updates:
-none

v2 updates:
- add function comment

 arch/powerpc/cpu/mpc85xx/cpu_init.c |  4 +++-
 common/board_r.c| 17 ++---
 include/init.h  | 14 ++
 3 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index e0f0f7ecda..e920e01b25 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -1028,7 +1028,7 @@ void arch_preboot_os(void)
mtmsr(msr);
 }
 
-void cpu_secondary_init_r(void)
+int cpu_secondary_init_r(void)
 {
 #ifdef CONFIG_QE
 #ifdef CONFIG_U_QE
@@ -1040,6 +1040,8 @@ void cpu_secondary_init_r(void)
qe_init(qe_base);
qe_reset();
 #endif
+
+   return 0;
 }
 
 #ifdef CONFIG_BOARD_LATE_INIT
diff --git a/common/board_r.c b/common/board_r.c
index 07c0ad363e..a291543d74 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -91,21 +91,8 @@ __weak int board_flash_wp_on(void)
return 0;
 }
 
-__weak void cpu_secondary_init_r(void)
+__weak int cpu_secondary_init_r(void)
 {
-}
-
-static int initr_secondary_cpu(void)
-{
-   /*
-* after non-volatile devices & environment is setup and cpu code have
-* another round to deal with any initialization that might require
-* full access to the environment or loading of some image (firmware)
-* from a non-volatile device
-*/
-   /* TODO: maybe define this for all archs? */
-   cpu_secondary_init_r();
-
return 0;
 }
 
@@ -801,7 +788,7 @@ static init_fnc_t init_sequence_r[] = {
initr_malloc_bootparams,
 #endif
INIT_FUNC_WATCHDOG_RESET
-   initr_secondary_cpu,
+   cpu_secondary_init_r,
 #if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
mac_read_from_eeprom,
 #endif
diff --git a/include/init.h b/include/init.h
index 0f48ccb57a..7cdc47cff1 100644
--- a/include/init.h
+++ b/include/init.h
@@ -163,6 +163,20 @@ int arch_setup_bdinfo(void);
  */
 int setup_bdinfo(void);
 
+/**
+ * cpu_secondary_init_r() - CPU-specific secondary initialization
+ *
+ * After non-volatile devices, environment and cpu code are setup, have
+ * another round to deal with any initialization that might require
+ * full access to the environment or loading of some image (firmware)
+ * from a non-volatile device.
+ *
+ * It is called during the generic post-relocation init sequence.
+ *
+ * Return: 0 if OK
+ */
+int cpu_secondary_init_r(void);
+
 /**
  * init_cache_f_r() - Turn on the cache in preparation for relocation
  *
-- 
2.17.1

[PATCH v3 18/18] global_data: Enable spl_handoff only if CONFIG_HANDOFF is set

[Ovidiu Panait]

spl_handoff should only be enabled when CONFIG_HANDOFF is set. Drop the
nested ifdefs and check for CONFIG_HANDOFF instead.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- none

v2 updates:
- add reviewed-by tag

 include/asm-generic/global_data.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/asm-generic/global_data.h 
b/include/asm-generic/global_data.h
index 87d827d0f4..5b1a7f1131 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -400,12 +400,12 @@ struct global_data {
 * @new_bloblist: relocated blob list information
 */
struct bloblist_hdr *new_bloblist;
-# ifdef CONFIG_SPL
+#endif
+#if CONFIG_IS_ENABLED(HANDOFF)
/**
 * @spl_handoff: SPL hand-off information
 */
struct spl_handoff *spl_handoff;
-# endif
 #endif
 #if defined(CONFIG_TRANSLATION_OFFSET)
/**
-- 
2.17.1

[PATCH v3 17/18] spl: Kconfig: Add SPL dependency to CONFIG_HANDOFF

[Ovidiu Panait]

CONFIG_HANDOFF is used in u-boot proper to locate handoff info from SPL
during pre-relocation init (in setup_spl_handoff). Add explicit dependency
on CONFIG_SPL, to fix the following build error when CONFIG_HANDOFF &&
!CONFIG_SPL:

common/board_f.c: In function ‘setup_spl_handoff’:
common/board_f.c:283:4: error: ‘gd_t {aka struct global_data}’
has no member named ‘spl_handoff’
  gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
^~

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- none

v2 updates:
- add reviewed-by tag

 common/spl/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index d8086bd9e8..cd980e96b8 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -117,7 +117,7 @@ endmenu
 
 config HANDOFF
bool "Pass hand-off information from SPL to U-Boot proper"
-   depends on BLOBLIST
+   depends on SPL && BLOBLIST
help
  It is useful to be able to pass information from SPL to U-Boot
  proper to preserve state that is known in SPL and is needed in U-Boot.
-- 
2.17.1

[PATCH v3 08/18] common: board_r: Drop initr_post_backlog wrapper

[Ovidiu Panait]

Add a return value to post_output_backlog and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- add reviewed-by tag

v2 updates:
- add function comment

 common/board_r.c | 10 +-
 include/post.h   | 11 ++-
 post/post.c  |  4 +++-
 3 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index a291543d74..7a06627ba9 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -206,14 +206,6 @@ static int initr_addr_map(void)
 }
 #endif
 
-#ifdef CONFIG_POST
-static int initr_post_backlog(void)
-{
-   post_output_backlog();
-   return 0;
-}
-#endif
-
 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
 static int initr_unlock_ram_in_cache(void)
 {
@@ -746,7 +738,7 @@ static init_fnc_t init_sequence_r[] = {
 #endif
INIT_FUNC_WATCHDOG_RESET
 #ifdef CONFIG_POST
-   initr_post_backlog,
+   post_output_backlog,
 #endif
INIT_FUNC_WATCHDOG_RESET
 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
diff --git a/include/post.h b/include/post.h
index eb218acde5..5695e2b533 100644
--- a/include/post.h
+++ b/include/post.h
@@ -107,7 +107,6 @@ int post_init_f (void);
 void post_bootmode_init (void);
 int post_bootmode_get (unsigned int * last_test);
 void post_bootmode_clear (void);
-void post_output_backlog ( void );
 int post_run (char *name, int flags);
 int post_info (char *name);
 int post_log (char *format, ...);
@@ -116,6 +115,16 @@ void post_reloc (void);
 #endif
 unsigned long post_time_ms (unsigned long base);
 
+/**
+ * post_output_backlog() - Print POST results
+ *
+ * Print POST results during the generic board init sequence, after
+ * relocation.
+ *
+ * Return: 0 if OK
+ */
+int post_output_backlog(void);
+
 extern struct post_test post_list[];
 extern unsigned int post_list_size;
 extern int post_hotkeys_pressed(void);
diff --git a/post/post.c b/post/post.c
index 0f1fe8d905..7d6a647312 100644
--- a/post/post.c
+++ b/post/post.c
@@ -128,7 +128,7 @@ static void post_log_mark_succ(unsigned long testid)
 }
 
 /* ... and the messages are output once we are relocated */
-void post_output_backlog(void)
+int post_output_backlog(void)
 {
int j;
 
@@ -143,6 +143,8 @@ void post_output_backlog(void)
}
}
}
+
+   return 0;
 }
 
 static void post_bootmode_test_on(unsigned int last_test)
-- 
2.17.1

[PATCH v3 01/18] common: Kconfig: Introduce CONFIG_CONSOLE_RECORD_INIT_F

[Ovidiu Panait]

Currently, the following #ifdef construct is used to check whether to run
console_record_init() during pre-relocation init:
 defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)

Introduce CONFIG_CONSOLE_RECORD_INIT_F Kconfig option to get rid of the
complex ifdef check. Also, use IS_ENABLED() instead of #ifdef.

Signed-off-by: Ovidiu Panait 
---
v3 updates:
- use only "default y" for CONSOLE_RECORD_INIT_F

v2 updates:
- new patch

 common/Kconfig   | 8 
 common/board_f.c | 7 +++
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/common/Kconfig b/common/Kconfig
index 2bce8c9ba1..d8982ba377 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -17,6 +17,14 @@ config CONSOLE_RECORD
  To enable console recording, call console_record_reset_enable()
  from your code.
 
+config CONSOLE_RECORD_INIT_F
+   bool "Enable console recording during pre-relocation init"
+   depends on CONSOLE_RECORD && SYS_MALLOC_F
+   default y
+   help
+ This option enables console recording during pre-relocation init.
+ CONFIG_SYS_MALLOC_F must be enabled to use this feature.
+
 config CONSOLE_RECORD_OUT_SIZE
hex "Output buffer size"
depends on CONSOLE_RECORD
diff --git a/common/board_f.c b/common/board_f.c
index 9f441c44f1..e5e69ff0fa 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -767,11 +767,10 @@ static int initf_bootstage(void)
 
 static int initf_console_record(void)
 {
-#if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
-   return console_record_init();
-#else
+   if (IS_ENABLED(CONFIG_CONSOLE_RECORD_INIT_F))
+   return console_record_init();
+
return 0;
-#endif
 }
 
 static int initf_dm(void)
-- 
2.17.1

[PATCH v3 05/18] common: board_f: Use IS_ENABLED(CONFIG_OF_EMBED) in reserve_fdt, reloc_fdt

[Ovidiu Panait]

Use IS_ENABLED(CONFIG_OF_EMBED) in instead of #ifdefs in reserve_fdt,
reloc_fdt functions.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- none

v2 updates:
- add reviewed-by tag

 common/board_f.c | 41 +
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index fbf622e0f0..ae3001bed1 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -514,21 +514,21 @@ static int reserve_global_data(void)
 
 static int reserve_fdt(void)
 {
-#ifndef CONFIG_OF_EMBED
-   /*
-* If the device tree is sitting immediately above our image then we
-* must relocate it. If it is embedded in the data section, then it
-* will be relocated with other data.
-*/
-   if (gd->fdt_blob) {
-   gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
+   if (!IS_ENABLED(CONFIG_OF_EMBED)) {
+   /*
+* If the device tree is sitting immediately above our image
+* then we must relocate it. If it is embedded in the data
+* section, then it will be relocated with other data.
+*/
+   if (gd->fdt_blob) {
+   gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
 
-   gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
-   gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
-   debug("Reserving %lu Bytes for FDT at: %08lx\n",
- gd->fdt_size, gd->start_addr_sp);
+   gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
+   gd->new_fdt = map_sysmem(gd->start_addr_sp, 
gd->fdt_size);
+   debug("Reserving %lu Bytes for FDT at: %08lx\n",
+ gd->fdt_size, gd->start_addr_sp);
+   }
}
-#endif
 
return 0;
 }
@@ -616,14 +616,15 @@ static int init_post(void)
 
 static int reloc_fdt(void)
 {
-#ifndef CONFIG_OF_EMBED
-   if (gd->flags & GD_FLG_SKIP_RELOC)
-   return 0;
-   if (gd->new_fdt) {
-   memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob));
-   gd->fdt_blob = gd->new_fdt;
+   if (!IS_ENABLED(CONFIG_OF_EMBED)) {
+   if (gd->flags & GD_FLG_SKIP_RELOC)
+   return 0;
+   if (gd->new_fdt) {
+   memcpy(gd->new_fdt, gd->fdt_blob,
+  fdt_totalsize(gd->fdt_blob));
+   gd->fdt_blob = gd->new_fdt;
+   }
}
-#endif
 
return 0;
 }
-- 
2.17.1

[PATCH v3 15/18] common: board_r: Drop initr_bbmii wrapper

[Ovidiu Panait]

Add a return value to bb_miiphy_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- add reviewed-by tag

v2 updates:
- add function comment

 common/board_r.c   | 10 +-
 drivers/net/phy/miiphybb.c |  4 +++-
 include/miiphy.h   | 10 +-
 3 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index 500457b080..c083eb0a03 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -534,14 +534,6 @@ static int initr_scsi(void)
 }
 #endif
 
-#ifdef CONFIG_BITBANGMII
-static int initr_bbmii(void)
-{
-   bb_miiphy_init();
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_CMD_NET
 static int initr_net(void)
 {
@@ -783,7 +775,7 @@ static init_fnc_t init_sequence_r[] = {
initr_scsi,
 #endif
 #ifdef CONFIG_BITBANGMII
-   initr_bbmii,
+   bb_miiphy_init,
 #endif
 #ifdef CONFIG_PCI_ENDPOINT
pci_ep_init,
diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c
index ba97a54c06..59a32c4913 100644
--- a/drivers/net/phy/miiphybb.c
+++ b/drivers/net/phy/miiphybb.c
@@ -105,7 +105,7 @@ int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
  sizeof(bb_miiphy_buses[0]);
 #endif
 
-void bb_miiphy_init(void)
+int bb_miiphy_init(void)
 {
int i;
 
@@ -124,6 +124,8 @@ void bb_miiphy_init(void)
bb_miiphy_buses[i].init(&bb_miiphy_buses[i]);
}
}
+
+   return 0;
 }
 
 static inline struct bb_miiphy_bus *bb_miiphy_getbus(const char *devname)
diff --git a/include/miiphy.h b/include/miiphy.h
index 61c136b114..8b77bac01e 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -81,7 +81,15 @@ struct bb_miiphy_bus {
 extern struct bb_miiphy_bus bb_miiphy_buses[];
 extern int bb_miiphy_buses_num;
 
-void bb_miiphy_init(void);
+/**
+ * bb_miiphy_init() - Initialize bit-banged MII bus driver
+ *
+ * It is called during the generic post-relocation init sequence.
+ *
+ * Return: 0 if OK
+ */
+int bb_miiphy_init(void);
+
 int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg);
 int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
u16 value);
-- 
2.17.1

[PATCH v3 02/18] common: board_f: Drop initf_console_record wrapper

[Ovidiu Panait]

Drop initf_console_record wrapper and call console_record_init directly.

Signed-off-by: Ovidiu Panait 
---
v3 updates:
- none

v2 updates:
- check defined(CONFIG_CONSOLE_RECORD_INIT_F) in ifdef condition

 common/board_f.c | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index e5e69ff0fa..552552e328 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -765,14 +765,6 @@ static int initf_bootstage(void)
return 0;
 }
 
-static int initf_console_record(void)
-{
-   if (IS_ENABLED(CONFIG_CONSOLE_RECORD_INIT_F))
-   return console_record_init();
-
-   return 0;
-}
-
 static int initf_dm(void)
 {
 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
@@ -829,7 +821,9 @@ static const init_fnc_t init_sequence_f[] = {
bloblist_init,
 #endif
setup_spl_handoff,
-   initf_console_record,
+#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
+   console_record_init,
+#endif
 #if defined(CONFIG_HAVE_FSP)
arch_fsp_init,
 #endif
-- 
2.17.1

[PATCH v3 16/18] common: board_r: Drop arch-specific ifdefs around initr_trap

[Ovidiu Panait]

In order to remove the arch-specific ifdefs around initr_trap, introduce
arch_initr_trap weak initcall. Implementations for ppc/m68k/mips have
been moved to arch//lib/traps.c

Default implementation is a nop stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- none

v2 updates:
- add reviewed-by tag

 arch/m68k/lib/traps.c |  7 +++
 arch/mips/lib/traps.c |  7 +++
 arch/powerpc/lib/Makefile |  1 +
 arch/powerpc/lib/traps.c  | 17 +
 common/board_r.c  | 16 ++--
 include/init.h|  9 +
 6 files changed, 43 insertions(+), 14 deletions(-)
 create mode 100644 arch/powerpc/lib/traps.c

diff --git a/arch/m68k/lib/traps.c b/arch/m68k/lib/traps.c
index c49141f376..a9b055cedf 100644
--- a/arch/m68k/lib/traps.c
+++ b/arch/m68k/lib/traps.c
@@ -59,3 +59,10 @@ void trap_init(ulong value) {
 
setvbr(value);  /* set vector base register to new table */
 }
+
+int arch_initr_trap(void)
+{
+   trap_init(CONFIG_SYS_SDRAM_BASE);
+
+   return 0;
+}
diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
index df8b63f383..4f2efd6115 100644
--- a/arch/mips/lib/traps.c
+++ b/arch/mips/lib/traps.c
@@ -131,3 +131,10 @@ void trap_restore(void)
clear_c0_status(ST0_BEV);
execution_hazard_barrier();
 }
+
+int arch_initr_trap(void)
+{
+   trap_init(CONFIG_SYS_SDRAM_BASE);
+
+   return 0;
+}
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index f61809ab05..2782740bf5 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -40,6 +40,7 @@ obj-y += interrupts.o
 obj-$(CONFIG_CMD_KGDB) += kgdb.o
 obj-y  += stack.o
 obj-y  += time.o
+obj-y  += traps.o
 endif # not minimal
 
 ifdef CONFIG_SPL_BUILD
diff --git a/arch/powerpc/lib/traps.c b/arch/powerpc/lib/traps.c
new file mode 100644
index 00..80822a006a
--- /dev/null
+++ b/arch/powerpc/lib/traps.c
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ */
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int arch_initr_trap(void)
+{
+   trap_init(gd->relocaddr);
+
+   return 0;
+}
diff --git a/common/board_r.c b/common/board_r.c
index c083eb0a03..9fa4d4b42e 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -182,20 +182,10 @@ static int initr_reloc_global_data(void)
return 0;
 }
 
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
-static int initr_trap(void)
+__weak int arch_initr_trap(void)
 {
-   /*
-* Setup trap handlers
-*/
-#if defined(CONFIG_PPC)
-   trap_init(gd->relocaddr);
-#else
-   trap_init(CONFIG_SYS_SDRAM_BASE);
-#endif
return 0;
 }
-#endif
 
 #ifdef CONFIG_ADDR_MAP
 static int initr_addr_map(void)
@@ -669,9 +659,7 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
initr_manual_reloc_cmdtable,
 #endif
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
-   initr_trap,
-#endif
+   arch_initr_trap,
 #ifdef CONFIG_ADDR_MAP
initr_addr_map,
 #endif
diff --git a/include/init.h b/include/init.h
index dded1cb871..bc1854f0e5 100644
--- a/include/init.h
+++ b/include/init.h
@@ -300,6 +300,15 @@ int board_early_init_r(void);
 /* TODO(s...@chromium.org): Drop this when DM_PCI migration is completed */
 void pci_init_board(void);
 
+/**
+ * arch_initr_trap() - Init traps
+ *
+ * Arch specific routine for initializing traps. It is called during the
+ * generic board init sequence, after relocation.
+ *
+ * Return: 0 if OK
+ */
+int arch_initr_trap(void);
 void trap_init(unsigned long reloc_addr);
 
 /**
-- 
2.17.1

[PATCH v3 03/18] common: board_f: Use IS_ENABLED(CONFIG_TIMER_EARLY) in initf_dm

[Ovidiu Panait]

Use IS_ENABLED(CONFIG_TIMER_EARLY) instead of #ifdef in initf_dm. Also,
move timer code to the main ifdef, so that ret is defined.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- none

v2 updates:
- add reviewed-by tag

 common/board_f.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index 552552e328..3c4437341a 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -775,11 +775,12 @@ static int initf_dm(void)
bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
if (ret)
return ret;
-#endif
-#ifdef CONFIG_TIMER_EARLY
-   ret = dm_timer_init();
-   if (ret)
-   return ret;
+
+   if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
+   ret = dm_timer_init();
+   if (ret)
+   return ret;
+   }
 #endif
 
return 0;
-- 
2.17.1

[PATCH v3 04/18] common: board_f: Move setup_machine code to setup_bdinfo

[Ovidiu Panait]

setup_bdinfo is used to populate various bdinfo fields, so move
setup_machine code there, as all it does is setting
gd->bd->bi_arch_number.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- none

v2 updates:
- add reviewed-by tag

 common/board_f.c | 13 -
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index 3c4437341a..fbf622e0f0 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -503,14 +503,6 @@ static int reserve_board(void)
return 0;
 }
 
-static int setup_machine(void)
-{
-#ifdef CONFIG_MACH_TYPE
-   gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
-#endif
-   return 0;
-}
-
 static int reserve_global_data(void)
 {
gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
@@ -605,6 +597,10 @@ int setup_bdinfo(void)
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;  /* size  of SRAM */
}
 
+#ifdef CONFIG_MACH_TYPE
+   bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
+#endif
+
return arch_setup_bdinfo();
 }
 
@@ -916,7 +912,6 @@ static const init_fnc_t init_sequence_f[] = {
reserve_uboot,
reserve_malloc,
reserve_board,
-   setup_machine,
reserve_global_data,
reserve_fdt,
reserve_bootstage,
-- 
2.17.1

[PATCH v3 12/18] common: board_r: Drop initr_xen wrapper

[Ovidiu Panait]

Add a return value to xen_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- none

v2 updates:
- add reviewed-by tag

 common/board_r.c | 10 +-
 drivers/xen/hypervisor.c |  4 +++-
 include/xen.h|  2 +-
 3 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index 48e898b586..a5cbbcc343 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -428,14 +428,6 @@ static int initr_mmc(void)
 }
 #endif
 
-#ifdef CONFIG_XEN
-static int initr_xen(void)
-{
-   xen_init();
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_PVBLOCK
 static int initr_pvblock(void)
 {
@@ -743,7 +735,7 @@ static init_fnc_t init_sequence_r[] = {
initr_mmc,
 #endif
 #ifdef CONFIG_XEN
-   initr_xen,
+   xen_init,
 #endif
 #ifdef CONFIG_PVBLOCK
initr_pvblock,
diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c
index 178c206f5b..2560894832 100644
--- a/drivers/xen/hypervisor.c
+++ b/drivers/xen/hypervisor.c
@@ -232,7 +232,7 @@ void clear_evtchn(uint32_t port)
synch_clear_bit(port, &s->evtchn_pending[0]);
 }
 
-void xen_init(void)
+int xen_init(void)
 {
debug("%s\n", __func__);
 
@@ -240,6 +240,8 @@ void xen_init(void)
init_events();
init_xenbus();
init_gnttab();
+
+   return 0;
 }
 
 void xen_fini(void)
diff --git a/include/xen.h b/include/xen.h
index a952a2c84b..868132156e 100644
--- a/include/xen.h
+++ b/include/xen.h
@@ -11,7 +11,7 @@
  * Map Xen memory pages, initialize event handler and xenbus,
  * setup the grant table.
  */
-void xen_init(void);
+int xen_init(void);
 
 /**
  * xen_fini() - Board cleanup before Linux kernel start
-- 
2.17.1

[PATCH v3 13/18] common: board_r: Drop initr_jumptable wrapper

[Ovidiu Panait]

Add a return value to jumptable_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait 
Reviewed-by: Simon Glass 
---
v3 updates:
- add reviewed-by tag

v2 updates:
- add function comment

 common/board_r.c  |  8 +---
 common/exports.c  |  4 +++-
 include/exports.h | 10 --
 3 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index a5cbbcc343..32ad40d372 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -490,12 +490,6 @@ static int initr_malloc_bootparams(void)
 }
 #endif
 
-static int initr_jumptable(void)
-{
-   jumptable_init();
-   return 0;
-}
-
 #if defined(CONFIG_API)
 static int initr_api(void)
 {
@@ -757,7 +751,7 @@ static init_fnc_t init_sequence_r[] = {
pci_init,
 #endif
stdio_add_devices,
-   initr_jumptable,
+   jumptable_init,
 #ifdef CONFIG_API
initr_api,
 #endif
diff --git a/common/exports.c b/common/exports.c
index 6253b55694..4578f07021 100644
--- a/common/exports.c
+++ b/common/exports.c
@@ -25,8 +25,10 @@ unsigned long get_version(void)
 # define miiphy_set_current_devdummy
 #endif
 
-void jumptable_init(void)
+int jumptable_init(void)
 {
gd->jt = malloc(sizeof(struct jt_funcs));
 #include <_exports.h>
+
+   return 0;
 }
diff --git a/include/exports.h b/include/exports.h
index b300554091..faf0f59244 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -15,8 +15,14 @@
 struct cmd_tbl;
 struct spi_slave;
 
-/* Set up the jump table for use by the API */
-void jumptable_init(void);
+/**
+ * jumptable_init() - Set up the jump table for use by the API
+ *
+ * It is called during the generic post-relocation init sequence.
+ *
+ * Return: 0 if OK
+ */
+int jumptable_init(void);
 
 /* These are declarations of exported functions available in C code */
 unsigned long get_version(void);
-- 
2.17.1

[PATCH v3 00/18] Minor board_f/board_r cleanups

[Ovidiu Panait]

v3:
* Use only "default y" for CONFIG_CONSOLE_RECORD_INIT_F Kconfig option
* Add reviewed-by tags

v2:
* Introduce CONFIG_CONSOLE_RECORD_INIT_F Kconfig to eliminate complex ifdef
  around console_record_init in board_f.c
* Add function comments to all routines that get their signatures changed
* Add reviewed-by tags

v1:
* Use IS_ENABLED() instead of #ifdef where possible
* Add int return values to various functions so we can drop multiple initr_*
  stub wrappers
* Clean some arch-specific ifdefs
* Minor CONFIG_HANDOFF patches

Ovidiu Panait (18):
  common: Kconfig: Introduce CONFIG_CONSOLE_RECORD_INIT_F
  common: board_f: Drop initf_console_record wrapper
  common: board_f: Use IS_ENABLED(CONFIG_TIMER_EARLY) in initf_dm
  common: board_f: Move setup_machine code to setup_bdinfo
  common: board_f: Use IS_ENABLED(CONFIG_OF_EMBED) in
reserve_fdt,reloc_fdt
  common: board_r: Drop initr_console_record wrapper
  common: board_r: Drop initr_secondary_cpu wrapper
  common: board_r: Drop initr_post_backlog wrapper
  common: board_r: Drop initr_pci_ep wrapper
  common: board_r: Drop initr_pci wrapper
  common: board_r: Drop initr_noncached wrapper
  common: board_r: Drop initr_xen wrapper
  common: board_r: Drop initr_jumptable wrapper
  common: board_r: Drop initr_api wrapper
  common: board_r: Drop initr_bbmii wrapper
  common: board_r: Drop arch-specific ifdefs around initr_trap
  spl: Kconfig: Add SPL dependency to CONFIG_HANDOFF
  global_data: Enable spl_handoff only if CONFIG_HANDOFF is set

 api/api.c|   6 +-
 api/api_private.h|   2 +-
 arch/arm/include/asm/system.h|  13 ++-
 arch/arm/lib/cache.c |   4 +-
 arch/m68k/lib/traps.c|   7 ++
 arch/mips/lib/traps.c|   7 ++
 arch/powerpc/cpu/mpc85xx/cpu_init.c  |   4 +-
 arch/powerpc/lib/Makefile|   1 +
 arch/powerpc/lib/traps.c |  17 
 common/Kconfig   |   8 ++
 common/board_f.c |  78 +++-
 common/board_r.c | 134 ---
 common/exports.c |   4 +-
 common/spl/Kconfig   |   2 +-
 drivers/net/phy/miiphybb.c   |   4 +-
 drivers/pci/pci-uclass.c |   4 +-
 drivers/pci/pci.c|   6 +-
 drivers/pci_endpoint/pci_ep-uclass.c |   4 +-
 drivers/xen/hypervisor.c |   4 +-
 include/api.h|  10 +-
 include/asm-generic/global_data.h|   4 +-
 include/exports.h|  10 +-
 include/init.h   |  46 -
 include/miiphy.h |  10 +-
 include/post.h   |  11 ++-
 include/xen.h|   2 +-
 post/post.c  |   4 +-
 27 files changed, 221 insertions(+), 185 deletions(-)
 create mode 100644 arch/powerpc/lib/traps.c

-- 
2.17.1

[PATCH] Fix squashfs failing to load sparse files

[Campbell Suter]

SquashFS supports sprase blocks in files - that is, if a given block is
composed only of zeros, it's not written to the output file to save
space and it's on-disk length field is set to zero to indicate that.

Previously the squashfs driver did not recognise that, and would attempt
to read and decompress a zero-sized block, which obviously failed.

The following command may be used to create a file for testing:

cat <(dd if=/dev/urandom of=/dev/stdout bs=1M count=1) \
<(dd if=/dev/zero of=/dev/stdout bs=1M count=1) \
<(dd if=/dev/urandom of=/dev/stdout bs=1k count=200) >test_file

Signed-off-by: Campbell Suter 
---

 fs/squashfs/sqfs.c | 54 ++
 1 file changed, 35 insertions(+), 19 deletions(-)

diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 608a2bb454..2516d920f8 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -1309,7 +1309,7 @@ int sqfs_read(const char *filename, void *buf, loff_t 
offset, loff_t len,
 {
char *dir = NULL, *fragment_block, *datablock = NULL, *data_buffer = 
NULL;
char *fragment = NULL, *file = NULL, *resolved, *data;
-   u64 start, n_blks, table_size, data_offset, table_offset;
+   u64 start, n_blks, table_size, data_offset, table_offset, sparse_size;
int ret, j, i_number, datablk_count = 0;
struct squashfs_super_block *sblk = ctxt.sblk;
struct squashfs_fragment_block_entry frag_entry;
@@ -1443,28 +1443,43 @@ int sqfs_read(const char *filename, void *buf, loff_t 
offset, loff_t len,
n_blks = DIV_ROUND_UP(table_size + table_offset,
  ctxt.cur_dev->blksz);
 
-   data_buffer = malloc_cache_aligned(n_blks * 
ctxt.cur_dev->blksz);
+   /* Don't load any data for sparse blocks */
+   if (finfo.blk_sizes[j] == 0) {
+   n_blks = 0;
+   table_offset = 0;
+   data_buffer = NULL;
+   data = NULL;
+   } else {
+   data_buffer = malloc_cache_aligned(n_blks * 
ctxt.cur_dev->blksz);
 
-   if (!data_buffer) {
-   ret = -ENOMEM;
-   goto out;
-   }
+   if (!data_buffer) {
+   ret = -ENOMEM;
+   goto out;
+   }
 
-   ret = sqfs_disk_read(start, n_blks, data_buffer);
-   if (ret < 0) {
-   /*
-* Possible causes: too many data blocks or too large
-* SquashFS block size. Tip: re-compile the SquashFS
-* image with mksquashfs's -b  option.
-*/
-   printf("Error: too many data blocks to be read.\n");
-   goto out;
-   }
+   ret = sqfs_disk_read(start, n_blks, data_buffer);
+   if (ret < 0) {
+   /*
+* Possible causes: too many data blocks or too 
large
+* SquashFS block size. Tip: re-compile the 
SquashFS
+* image with mksquashfs's -b  
option.
+*/
+   printf("Error: too many data blocks to be 
read.\n");
+   goto out;
+   }
 
-   data = data_buffer + table_offset;
+   data = data_buffer + table_offset;
+   }
 
/* Load the data */
-   if (SQFS_COMPRESSED_BLOCK(finfo.blk_sizes[j])) {
+   if (finfo.blk_sizes[j] == 0) {
+   /* This is a sparse block */
+   sparse_size = get_unaligned_le32(&sblk->block_size);
+   if ((*actread + sparse_size) > len)
+   sparse_size = len - *actread;
+   memset(buf + *actread, 0, sparse_size);
+   *actread += sparse_size;
+   } else if (SQFS_COMPRESSED_BLOCK(finfo.blk_sizes[j])) {
dest_len = get_unaligned_le32(&sblk->block_size);
ret = sqfs_decompress(&ctxt, datablock, &dest_len,
  data, table_size);
@@ -1483,7 +1498,8 @@ int sqfs_read(const char *filename, void *buf, loff_t 
offset, loff_t len,
}
 
data_offset += table_size;
-   free(data_buffer);
+   if (data_buffer)
+   free(data_buffer);
data_buffer = NULL;
if (*actread >= len)
break;
-- 
2.28.0

[PATCH] Fix a squashfs crash when reading large directories

[Campbell Suter]

SquashFS encodes directories with more than 256 entries, with xattrs or
a few other things with a different type of inode than most directories.

This type of directory entry has an indexing feature to increase the
performance of filename lookups. When U-Boot's squashfs driver
calculates the length of such an inode, it incorrectly adds one to the
number of indexes which causes the length to be miscalculated, causing a
synchronous abort when reading the next inode.

This occurs for directories that satisfy all the following conditions:

* They have at least 257 entries, the size of their inodes add to >8K,
or they have extended attributes. 
* They are not the root directory (as there is no subsequent inode to
read), and are not the last child of the root directory.
* The length of the names of all the child files sum to a sufficent
value (I think this is the point where the child entries span multiple
metadata blocks, but I haven't confirmed it)

The following script generates a squashfs that was crashing when listed:

mkdir -p files/{a,b,c} 
pad=a
for i in {1..257}; do touch files/b/file-$(printf '%03d' $i)-$pad done
mksquashfs files result.squashfs
  
Signed-off-by: Campbell Suter 
---
  
 fs/squashfs/sqfs_inode.c | 4 ++-- 
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/squashfs/sqfs_inode.c b/fs/squashfs/sqfs_inode.c
index 14d70cf678..e76ec7cbdf 100644
--- a/fs/squashfs/sqfs_inode.c
+++ b/fs/squashfs/sqfs_inode.c
@@ -49,7 +49,7 @@ int sqfs_inode_size(struct squashfs_base_inode *inode, u32 
blk_size)
return sizeof(*ldir);
 
di = ldir->index;
-   while (l < i_count + 1) {
+   while (l < i_count) {   
sz = get_unaligned_le32(&di->size) + 1;
index_list_size += sz;  
di = (void *)di + sizeof(*di) + sz;
@@ -57,7 +57,7 @@ int sqfs_inode_size(struct squashfs_base_inode *inode, u32 
blk_size)
}
 
return sizeof(*ldir) + index_list_size +
-   (i_count + 1) * SQFS_DIR_INDEX_BASE_LENGTH;
+   i_count * SQFS_DIR_INDEX_BASE_LENGTH;
}
 
case SQFS_LREG_TYPE: {
-- 
2.28.0

Re: [PATCH v3 1/5] i2c: mediatek: add basic driver support

[Heiko Schocher]

Hello mingming lee,

Am 16.10.20 um 05:27 schrieb mingming lee:
> From: Mingming Lee 
> 
> Add MediaTek I2C basic driver
> 
> Reviewed-by: Heiko Schocher 
> Signed-off-by: Mingming Lee 
> ---
> Changes for v3:
>- fixed code veriew note in v2
>- optimize the dma read/write flow in mtk_i2c_do_transfer()
> 
> Changes for v2:
>- using error number defined in include/linux/errno.h
> ---
>  drivers/i2c/Kconfig  |   8 +
>  drivers/i2c/Makefile |   1 +
>  drivers/i2c/mt_i2c.c | 713 
> +++
>  3 files changed, 722 insertions(+)
>  create mode 100644 drivers/i2c/mt_i2c.c

Applied your changes to my testtree at:

https://github.com/hsdenx/u-boot-i2c/commits/work

and for this travis build fails with:

https://travis-ci.org/github/hsdenx/u-boot-i2c/jobs/745329353#L1350

   aarch64:  +   mt8512_bm1_emmc
+drivers/i2c/mt_i2c.c: In function 'mtk_i2c_do_transfer':
+drivers/i2c/mt_i2c.c:453:10: error: initialization of 'u32' {aka 'unsigned 
int'} from 'u8 *' {aka
'unsigned char *'} makes integer from pointer without a cast 
[-Werror=int-conversion]
+  453 |   writel(msgs->buf, priv->pdmabase + REG_RX_MEM_ADDR);
+  |  ^~~~
+arch/arm/include/asm/io.h:122:34: note: in definition of macro 'writel'
+  122 | #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); 
__v; })
+  |  ^
+drivers/i2c/mt_i2c.c:463:10: error: initialization of 'u32' {aka 'unsigned 
int'} from 'u8 *' {aka
'unsigned char *'} makes integer from pointer without a cast 
[-Werror=int-conversion]
+  463 |   writel(msgs->buf, priv->pdmabase + REG_TX_MEM_ADDR);
+drivers/i2c/mt_i2c.c:474:10: error: initialization of 'u32' {aka 'unsigned 
int'} from 'u8 *' {aka
'unsigned char *'} makes integer from pointer without a cast 
[-Werror=int-conversion]
+  474 |   writel(msgs->buf, priv->pdmabase + REG_TX_MEM_ADDR);
+drivers/i2c/mt_i2c.c:476:10: error: initialization of 'u32' {aka 'unsigned 
int'} from 'u8 *' {aka
'unsigned char *'} makes integer from pointer without a cast 
[-Werror=int-conversion]
+  476 |   writel((msgs + 1)->buf, priv->pdmabase + REG_RX_MEM_ADDR);
+  |  ^
+cc1: all warnings being treated as errors
+make[2]: *** [drivers/i2c/mt_i2c.o] Error 1
+make[1]: *** [drivers/i2c] Error 2
+make: *** [sub-make] Error 2

Could you please take a look and send an update?

Thanks!

bye,
Heiko
-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de

RE: [RESEND v2 22/22] arm: socfpga: dm: Enable Intel Diamond Mesa build

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 22/22] arm: socfpga: dm: Enable Intel Diamond Mesa
> build
> 
> Add defconfig for Diamond Mesa to support both legacy boot flow and ATF
> boot flow.
> 
> Legacy boot:
> SPL -> U-Boot proper -> OS (Linux)
> 
> ATF boot flow:
> SPL -> ATF(BL31) -> U-Boot proper -> OS (Linux)
> 
> Signed-off-by: Siew Chin Lim 
> ---
>  arch/arm/mach-socfpga/Kconfig| 19 ++
>  arch/arm/mach-socfpga/Makefile   | 18 ++
>  configs/socfpga_dm_atf_defconfig | 76
> 
>  configs/socfpga_dm_defconfig | 69
> 
>  4 files changed, 182 insertions(+)
>  create mode 100644 configs/socfpga_dm_atf_defconfig  create mode
> 100644 configs/socfpga_dm_defconfig
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-
> socfpga/Kconfig index 4d061a9d0d..5dee193b31 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -66,6 +66,22 @@ config TARGET_SOCFPGA_CYCLONE5
>   bool
>   select TARGET_SOCFPGA_GEN5
> 
> +config TARGET_SOCFPGA_DM
> + bool
> + select TARGET_SOCFPGA_SOC64
> + select ARMV8_MULTIENTRY
> + select ARMV8_SET_SMPEN
> + select CLK
> + select FPGA_INTEL_SDM_MAILBOX
> + select NCORE_CACHE
> + select SPL_ALTERA_SDRAM
> + select SPL_CLK if SPL
> + select BINMAN
Sort in alphanumerical order.


Regards
Ley Foon

RE: [RESEND v2 21/22] configs: dm: Add Diamond Mesa CONFIGs

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 21/22] configs: dm: Add Diamond Mesa CONFIGs
> 
> Add CONFIGs for Diamond Mesa.
> 
> Signed-off-by: Siew Chin Lim 
> ---
>  include/configs/socfpga_dm_socdk.h | 46
> ++
>  1 file changed, 46 insertions(+)
>  create mode 100644 include/configs/socfpga_dm_socdk.h
> 
> diff --git a/include/configs/socfpga_dm_socdk.h
> b/include/configs/socfpga_dm_socdk.h
> new file mode 100644
> index 00..f0082b8d1d
> --- /dev/null
> +++ b/include/configs/socfpga_dm_socdk.h
> @@ -0,0 +1,46 @@
> +/* SPDX-License-Identifier: GPL-2.0
> + *
> + * Copyright (C) 2020 Intel Corporation 
> + *
> + */
> +
> +#ifndef __CONFIG_SOCFGPA_DM_H__
> +#define __CONFIG_SOCFGPA_DM_H__
> +
> +#include 
> +
> +#undef CONFIG_BOOTARGS
> +#define CONFIG_BOOTARGS "earlycon panic=-1 earlyprintk=ttyS0,4800"
> +
> +#undef CONFIG_EXTRA_ENV_SETTINGS
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
> + "bootfile=Image\0" \
> + "fdt_addr=110\0" \
> + "fdtimage=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
> + "mmcroot=/dev/mmcblk0p2\0" \
> + "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
> + " root=${mmcroot} rw rootwait;" \
> + "booti ${loadaddr} - ${fdt_addr}\0" \
> + "mmcload=mmc rescan;" \
> + "load mmc 0:1 ${loadaddr} ${bootfile};" \
> + "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
> + "mmcvabboot=setenv bootargs " CONFIG_BOOTARGS \
> + " root=${mmcroot} rw rootwait;" \
> + "bootm ${loadaddr}\0" \
> + "mmcvabload=mmc rescan;" \
> + "load mmc 0:1 ${loadaddr} ${bootfile}\0" \
VAB related shouldn't in this patchset?



Regards
Ley Foon

RE: [RESEND v2 20/22] arm: dts: dm: Add base dtsi and devkit dts for Diamond Mesa

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 20/22] arm: dts: dm: Add base dtsi and devkit dts for
> Diamond Mesa
> 
> Add device tree for Diamond Mesa.
> 
> Signed-off-by: Siew Chin Lim 
> Signed-off-by: Tien Fong Chee 
> ---
>  arch/arm/dts/Makefile |   1 +
>  arch/arm/dts/socfpga_dm-u-boot.dtsi   | 102 +
>  arch/arm/dts/socfpga_dm.dtsi  | 640
> ++
>  arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi |  50 +++
>  arch/arm/dts/socfpga_dm_socdk.dts | 144 +++
>  5 files changed, 937 insertions(+)
>  create mode 100644 arch/arm/dts/socfpga_dm-u-boot.dtsi
>  create mode 100644 arch/arm/dts/socfpga_dm.dtsi  create mode 100644
> arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi
>  create mode 100644 arch/arm/dts/socfpga_dm_socdk.dts
> 
> diff --git a/arch/arm/dts/socfpga_dm.dtsi b/arch/arm/dts/socfpga_dm.dtsi
Make sure sync latest from Linux.


[...]

> + };
> + gmac0: ethernet@ff80 {
Add new line before gmac0.

[...]


> diff --git a/arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi
> b/arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi
> new file mode 100644
> index 00..9dbcaf2eb0
> --- /dev/null
> +++ b/arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi
> @@ -0,0 +1,50 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * U-Boot additions
> + *
> + * Copyright (C) 2020 Intel Corporation   */
> +
> +#include "socfpga_dm-u-boot.dtsi"
> +
> +/{
> + aliases {
> + spi0 = &qspi;
> + i2c0 = &i2c1;
> + };
> +
> + memory {
> + /* 8GB */
> + reg = <0 0x 0 0x8000>,
> +   <2 0x8000 1 0x8000>;
> + };
> +};
> +
> +&flash0 {
> + compatible = "jedec,spi-nor";
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + u-boot,dm-pre-reloc;
> +};
> +
> +&i2c1 {
> + status = "okay";
> +};
> +
> +&nand {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&mmc {
> + drvsel = <3>;
> + smplsel = <0>;
> + u-boot,dm-pre-reloc;
> +};
> +
> +&qspi {
> + status = "okay";
> +};
socfpga_dm_socdk.dts already set this.


Regards
Ley Foon

RE: [RESEND v2 19/22] board: intel: dm: Add socdk board support for Diamond Mesa

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 19/22] board: intel: dm: Add socdk board support for
> Diamond Mesa
> 
> Add Diamond Mesa SoC devkit board.
> 
> Signed-off-by: Siew Chin Lim 
> ---
>  board/intel/dm-socdk/MAINTAINERS | 7 +++
>  board/intel/dm-socdk/Makefile| 7 +++
>  board/intel/dm-socdk/socfpga.c   | 7 +++
>  3 files changed, 21 insertions(+)
>  create mode 100644 board/intel/dm-socdk/MAINTAINERS  create mode
> 100644 board/intel/dm-socdk/Makefile  create mode 100644
> board/intel/dm-socdk/socfpga.c
> 

Reviewed-by: Ley Foon Tan 

RE: [RESEND v2 18/22] arm: socfpga: dm: Add SPL for Diamond Mesa

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 18/22] arm: socfpga: dm: Add SPL for Diamond Mesa
> 
> Signed-off-by: Siew Chin Lim 
> ---
>  arch/arm/mach-socfpga/spl_dm.c | 93
> ++
>  1 file changed, 93 insertions(+)
>  create mode 100644 arch/arm/mach-socfpga/spl_dm.c
> 
> diff --git a/arch/arm/mach-socfpga/spl_dm.c b/arch/arm/mach-
> socfpga/spl_dm.c new file mode 100644 index 00..ef664f4426
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/spl_dm.c
> @@ -0,0 +1,93 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 Intel Corporation 
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
Sort alphanumerical order.


Regards
Ley Foon

RE: [RESEND v2 17/22] arm: socfpga: Move Stratix10 and Agilex SPL common code

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 17/22] arm: socfpga: Move Stratix10 and Agilex SPL
> common code
> 
> Move Stratix10 and Agilex SPL common code to spl_soc64.c
> 
> Signed-off-by: Siew Chin Lim 
> ---
>  arch/arm/mach-socfpga/Makefile |  2 ++
>  arch/arm/mach-socfpga/spl_agilex.c | 16 
>  arch/arm/mach-socfpga/spl_s10.c| 17 -
>  arch/arm/mach-socfpga/spl_soc64.c  | 26 ++
>  4 files changed, 28 insertions(+), 33 deletions(-)  create mode 100644
> arch/arm/mach-socfpga/spl_soc64.c
> 

Reviewed-by: Ley Foon Tan 

RE: [RESEND v2 16/22] ddr: altera: dm: Add SDRAM driver for Diamond Mesa

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 16/22] ddr: altera: dm: Add SDRAM driver for Diamond
> Mesa
> 
> The DDR subsystem in Diamond Mesa is consisted of controller, PHY,
> memory reset manager and memory clock manager.
> 
> Configuration settings of controller, PHY and  memory reset manager is
> come from DDR handoff data in bitstream, which contain the register base
> addresses and user settings from Quartus.
> 
> Configuration settings of memory clock manager is come from the HPS
> handoff data in bitstream, however the register base address is defined in
> device tree.
> 
> The calibration is fully done in HPS, which requires IMEM and DMEM binaries
> loading to PHY SRAM for running this calibration, both IMEM and DMEM
> binaries are also part of bitstream, this bitstream would be loaded to OCRAM
> by SDM, and configured by DDR driver.
> 
> Signed-off-by: Siew Chin Lim 
> Signed-off-by: Tien Fong Chee 
> ---
>  arch/arm/mach-socfpga/include/mach/firewall.h  |1 +
>  .../include/mach/system_manager_soc64.h|4 +
>  drivers/ddr/altera/Makefile|1 +
>  drivers/ddr/altera/sdram_dm.c  | 1294 
> 
>  drivers/ddr/altera/sdram_soc64.c   |6 +
>  5 files changed, 1306 insertions(+)
>  create mode 100644 drivers/ddr/altera/sdram_dm.c
> 
[...]

> 
>  /* Firewall MPFE SCR Registers */
>  #define FW_MPFE_SCR_HMC  0x00
> diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> index 1e2289e5f8..4fc1a158b7 100644
> --- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> +++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> @@ -94,6 +94,10 @@ void populate_sysmgr_pinmux(void);
>   * storing qspi ref clock(kHz)
>   */
>  #define SYSMGR_SCRATCH_REG_0_QSPI_REFCLK_MASK
>   GENMASK(27, 0)
> +#define SYSMGR_SCRATCH_REG_0_DDR_RETENTION_MASK
>   BIT(31)
> +#define SYSMGR_SCRATCH_REG_0_DDR_SHA_MASKBIT(30)
> +#define SYSMGR_SCRATCH_REG_0_DDR_RESET_TYPE_MASK (BIT(29) |
> BIT(28))
Change the order, from bit-28 to 31.

> +#define SYSMGR_SCRATCH_REG_0_DDR_RESET_TYPE_SHIFT28
> 
>  #define SYSMGR_SDMMC
>   SYSMGR_SOC64_SDMMC
> 
[...]

> +#define TIMEOUT_200MS 200
> +#define TIMEOUT_5000MS5000
> +
> +/* DDR4 umctl2 */
> +#define DDR4_STAT_OFFSET 0x4
Change to 0x04.

> +#define DDR4_STAT_SELFREF_TYPE   (BIT(5) | BIT(4))
> +#define DDR4_STAT_SELFREF_TYPE_SHIFT 4
> +#define DDR4_STAT_OPERATING_MODE (BIT(2) | BIT(1) | BIT(0))
> +
> +#define DDR4_MRCTRL0_OFFSET  0x10
> +#define DDR4_MRCTRL0_MR_TYPE BIT(0)
> +#define DDR4_MRCTRL0_MPR_EN  BIT(1)
> +#define DDR4_MRCTRL0_MR_RANK (BIT(5) | BIT(4))
> +#define DDR4_MRCTRL0_MR_RANK_SHIFT   4
> +#define DDR4_MRCTRL0_MR_ADDR (BIT(15) | BIT(14) | BIT(13) |
> BIT(12))
> +#define DDR4_MRCTRL0_MR_ADDR_SHIFT   12
> +#define DDR4_MRCTRL0_MR_WR   BIT(31)
> +
> +#define DDR4_MRCTRL1_OFFSET  0x14
> +#define DDR4_MRCTRL1_MR_DATA 0x3
Follow other drivers use small letter for hex value.
Check all in this file.

> +
> +#define DDR4_MRSTAT_OFFSET   0x18
> +#define DDR4_MRSTAT_MR_WR_BUSY   BIT(0)
> +
> +#define DDR4_MRCTRL2_OFFSET  0x1C
> +
> +#define DDR4_PWRCTL_OFFSET   0x30
> +#define DDR4_PWRCTL_SELFREF_EN   BIT(0)
> +#define DDR4_PWRCTL_POWERDOWN_EN BIT(1)
> +#define DDR4_PWRCTL_EN_DFI_DRAM_CLK_DISABLE  BIT(3)
> +#define DDR4_PWRCTL_SELFREF_SW   BIT(5)
> +
> +#define DDR4_PWRTMG_OFFSET   0x34
> +#define DDR4_HWLPCTL_OFFSET  0x38
> +#define DDR4_RFSHCTL0_OFFSET 0x50
> +#define DDR4_RFSHCTL1_OFFSET 0x54
> +
> +#define DDR4_RFSHCTL3_OFFSET 0x60
> +#define DDR4_RFSHCTL3_DIS_AUTO_REFRESH   BIT(0)
> +#define DDR4_RFSHCTL3_REFRESH_MODE   (BIT(6) | BIT(5) |
> BIT(4))
> +#define DDR4_RFSHCTL3_REFRESH_MODE_SHIFT 4
> +
> +#define DDR4_ECCCFG0_OFFSET  0x70
> +#define DDR4_ECC_MODE(BIT(2) | BIT(1) | BIT(0))
> +#define DDR4_DIS_SCRUB   BIT(4)
> +
> +#define DDR4_CRCPARCTL1_OFFSET   0x04
> +#define DDR4_CRCPARCTL1_CRC_PARITY_RETRY_ENABLE  BIT(8)
> +#define DDR4_CRCPARCTL1_ALERT_WAIT_FOR_SWBIT(9)
> +
> +#define DDR4_CRCPARCTL0_OFFSET   0xC0
> +#define DDR4_CRCPARCTL0_DFI_ALERT_ERR_INIT_CLR   BIT(1)
> +
> +#define DDR4_CRCPARSTAT_OFFSET   0xCC
> +#define DDR4_CRCPARSTAT_DFI_ALERT_ERR_IN

Re: [PATCH] riscv: fix the wrong swap value register

[Rick Chen]

> From: Brad Kim [mailto:brad@semifive.com]
> Sent: Friday, November 13, 2020 7:48 PM
> To: Rick Jian-Zhi Chen(陳建志); lukas.a...@aisec.fraunhofer.de
> Cc: bmeng...@gmail.com; sean...@gmail.com; u-boot@lists.denx.de; Brad Kim
> Subject: [PATCH] riscv: fix the wrong swap value register
>
> Not s2 register, t1 register is correct
> Fortunately, it works because t1 register has a garbage value
>
> Signed-off-by: Brad Kim 
> ---
>  arch/riscv/cpu/start.S | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Rick Chen 

> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index bbc737ed9a..8589509e01 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -123,7 +123,7 @@ call_board_init_f_0:
>  * wait for initialization to complete.
>  */
> la  t0, hart_lottery
> -   li  s2, 1
> +   li  t1, 1
> amoswap.w s2, t1, 0(t0)
> bnezs2, wait_for_gd_init
>  #else
> --
> 2.17.1
>

RE: [RESEND v2 15/22] arm: socfpga: dm: Add clock manager for Diamond Mesa

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 15/22] arm: socfpga: dm: Add clock manager for
> Diamond Mesa
> 
> Add clock manager for Diamond Mesa.
> 
> Signed-off-by: Siew Chin Lim 
> ---
>  arch/arm/mach-socfpga/clock_manager_dm.c   | 79
> ++
>  arch/arm/mach-socfpga/include/mach/clock_manager.h |  2 +
>  .../mach-socfpga/include/mach/clock_manager_dm.h   | 14 
>  3 files changed, 95 insertions(+)
>  create mode 100644 arch/arm/mach-socfpga/clock_manager_dm.c
>  create mode 100644 arch/arm/mach-
> socfpga/include/mach/clock_manager_dm.h
> 
> diff --git a/arch/arm/mach-socfpga/clock_manager_dm.c
> b/arch/arm/mach-socfpga/clock_manager_dm.c
> new file mode 100644
> index 00..cdf096cd8b
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/clock_manager_dm.c
> @@ -0,0 +1,79 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 Intel Corporation 
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
Try to sort alphanumerical order.


[...]

> diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h
> b/arch/arm/mach-socfpga/include/mach/clock_manager.h
> index 0f0cb230fa..a164f47bda 100644
> --- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
> +++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
> @@ -26,6 +26,8 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>  #include   #elif
> defined(CONFIG_TARGET_SOCFPGA_AGILEX)
>  #include 
> +#elif defined(CONFIG_TARGET_SOCFPGA_DM) #include
> +
>  #endif
> 
>  #endif /* _CLOCK_MANAGER_H_ */
> diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_dm.h
> b/arch/arm/mach-socfpga/include/mach/clock_manager_dm.h
> new file mode 100644
> index 00..a355fda692
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_dm.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2020 Intel Corporation   */
> +
> +#ifndef _CLOCK_MANAGER_DM_
> +#define _CLOCK_MANAGER_DM_
> +
> +unsigned long cm_get_mpu_clk_hz(void);
This can move to clock_manager.h, since all devices have this.


Regards
Ley Foon

RE: [RESEND v2 14/22] arm: socfpga: Changed to store QSPI reference clock in kHz

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Lim, Elly Siew Chin
> 
> Subject: [RESEND v2 14/22] arm: socfpga: Changed to store QSPI reference
> clock in kHz
> 
> Changed to store QSPI reference clock in kHz instead of Hz in boot scratch
> cold0 register for Stratix10 and Agilex.
> 
> This patch is in preparation for Diamond Mesa SDRAM driver support.
> Reserved 4 bits for Diamond Mesa SDRAM driver, and there will be 28 bits to
> store QSPI reference clock.
> Due to limited bits, QSPI reference clock frequency is converted to kHz from
> Hz.
> 
> Signed-off-by: Siew Chin Lim 
> Signed-off-by: Tien Fong Chee 
> ---
>  arch/arm/mach-socfpga/clock_manager.c  |  5 ++--
>  .../include/mach/system_manager_soc64.h| 12 +-
>  arch/arm/mach-socfpga/mailbox_s10.c| 28
> +++---
>  3 files changed, 39 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-
> socfpga/clock_manager.c
> index 2d0cc19f7a..8299d0956d 100644
> --- a/arch/arm/mach-socfpga/clock_manager.c
> +++ b/arch/arm/mach-socfpga/clock_manager.c
> @@ -66,8 +66,9 @@ int set_cpu_clk_info(void)  #if
> defined(CONFIG_TARGET_SOCFPGA_SOC64)
>  unsigned int cm_get_qspi_controller_clk_hz(void)
>  {
> - return readl(socfpga_get_sysmgr_addr() +
> -  SYSMGR_SOC64_BOOT_SCRATCH_COLD0);
> + return (readl(socfpga_get_sysmgr_addr() +
> +  SYSMGR_SOC64_BOOT_SCRATCH_COLD0) &
> +  SYSMGR_SCRATCH_REG_0_QSPI_REFCLK_MASK) * 1000;
>  }
> 
>  #endif
> diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> index 1eb8e7a904..1e2289e5f8 100644
> --- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> +++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> @@ -42,7 +42,10 @@ void populate_sysmgr_pinmux(void);
>  #define SYSMGR_SOC64_GPO 0xe4
>  #define SYSMGR_SOC64_GPI 0xe8
>  #define SYSMGR_SOC64_MPU 0xf0
> -/* store qspi ref clock */
> +/*
> + * Bits[31:28] reserved for DM DDR retention, bits[27:0] reserved for
> +SOC 64-bit
> + * storing qspi ref clock(kHz)
Space after "(".

> + */
>  #define SYSMGR_SOC64_BOOT_SCRATCH_COLD0  0x200
>  /* store osc1 clock freq */
>  #define SYSMGR_SOC64_BOOT_SCRATCH_COLD1  0x204
> @@ -85,6 +88,13 @@ void populate_sysmgr_pinmux(void);
>  #define SYSMGR_SOC64_HPS_OSC_CLK 0x1358
>  #define SYSMGR_SOC64_IODELAY00x1400
> 
> +/*
> + * Bits for SYSMGR_SOC64_BOOT_SCRATCH_COLD0
> + * Bits[31:28] reserved for DM DDR retention, bits[27:0] reserved for
> +SOC 64-bit
> + * storing qspi ref clock(kHz)
> + */
> +#define SYSMGR_SCRATCH_REG_0_QSPI_REFCLK_MASK
>   GENMASK(27, 0)
> +
>  #define SYSMGR_SDMMC
>   SYSMGR_SOC64_SDMMC
> 
>  #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX  BIT(0)
> diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-
> socfpga/mailbox_s10.c
> index 429444f069..2e43131c5d 100644
> --- a/arch/arm/mach-socfpga/mailbox_s10.c
> +++ b/arch/arm/mach-socfpga/mailbox_s10.c
> @@ -359,7 +359,7 @@ int mbox_qspi_open(void)  {
>   int ret;
>   u32 resp_buf[1];
> - u32 resp_buf_len;
> + u32 resp_buf_len, temp;
> 
>   ret = mbox_send_cmd(MBOX_ID_UBOOT, MBOX_QSPI_OPEN,
> MBOX_CMD_DIRECT,
>   0, NULL, 0, 0, NULL);
> @@ -384,8 +384,30 @@ int mbox_qspi_open(void)
>   goto error;
> 
>   /* We are getting QSPI ref clock and set into sysmgr boot register */
> - printf("QSPI: Reference clock at %d Hz\n", resp_buf[0]);
> - writel(resp_buf[0],
> + /*
> +  * Only clock freq in kHz degree is accepted due to limited bits[27:0]
> +  * is reserved for storing the QSPI clock freq into boot scratch cold0
> +  * register
> +  */
> + if (resp_buf[0] < 1000) {
> + ret = -EINVAL;
> + goto error;
> + } else {
> + resp_buf[0] /= 1000;
> + }
> +
> + printf("QSPI: Reference clock at %d kHz\n", resp_buf[0]);
> +
> + /*
> +  * DDR retention bit, SHA comparison bit and reset type bits sharing
> the
> +  * same scratch register in DM, ensure the content inside register is
> +  * not overwritten by QSPI ref clock(kHz)
> +  */
> + temp = readl(socfpga_get_sysmgr_addr() +
> + SYSMGR_SOC64_BOOT_SCRATCH_COLD0) &
> + ~(SYSMGR_SCRATCH_REG_0_QSPI_REFCLK_MASK);
> +
> + writel((resp_buf[0] &
Can help helper function to read and write boot scratch register.


Regards
Ley Foon

Re: [PATCH 0/3] usb: am654: Add support for host mode to the USB port on overlay board

[Roger Quadros]

Hi,

On 20/11/2020 17:48, Aswath Govindraju wrote:

The following series of patches
  - adds support for host mode to USB3SS0 controller
  - adds aliases for USB subsystems
  - adds a workaround to use USB0 in USB 2.0 only mode

Aswath Govindraju (3):
   board: ti: am65x: Set SERDES0 mux to PCIe to use USB 2.0 interface
   dts: am654-base-board-uboot: Set USB0 dr_mode to host
   dts: am654-base-board-uboot: Add aliases for USB subsystems


For all patches,

Acked-by: Roger Quadros 



  arch/arm/dts/k3-am654-base-board-u-boot.dtsi |  4 +++-
  board/ti/am65x/evm.c | 16 
  2 files changed, 19 insertions(+), 1 deletion(-)



cheers,
-roger
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Re: [PATCH v2] ARM: stm32: Use firmware property instead of loadables

[Michal Simek]

Hi Marek,

st 21. 10. 2020 v 14:31 odesílatel Marek Vasut  napsal:
>
> On 10/21/20 2:05 PM, Patrice CHOTARD wrote:
> > Hi Patrick
> >
> > On 10/5/20 11:37 AM, Michal Simek wrote:
> >> There shouldn't be a need to use loadables propertyn because u-boot can be
> >> pointed by firmware property. This change should also speedup boot process
> >> because loadables property is list of strings which code is going through.
> >> On the other hand firmware can just point to one image.
>
> Note that this patch currently cannot be tested because SPL fitImage
> loading is broken on arm32, see [PATCH] Revert "Fix data abort caused by
> mis-aligning FIT data" .

Is this fixed now?

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

[PATCH] cmd: Add a pwm command

[Pragnesh Patel]

Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers

Signed-off-by: Pragnesh Patel 
---
 cmd/Kconfig  |   6 +++
 cmd/Makefile |   1 +
 cmd/pwm.c| 119 +++
 3 files changed, 126 insertions(+)
 create mode 100644 cmd/pwm.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 1595de999b..4f3a70b1d5 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -918,6 +918,12 @@ config CMD_GPIO
help
  GPIO support.
 
+config CMD_PWM
+   bool "pwm"
+   depends on DM_PWM
+   help
+ PWM support.
+
 config CMD_GPT
bool "GPT (GUID Partition Table) command"
select EFI_PARTITION
diff --git a/cmd/Makefile b/cmd/Makefile
index dd86675bf2..75df3c136c 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -120,6 +120,7 @@ endif
 obj-$(CONFIG_CMD_PINMUX) += pinmux.o
 obj-$(CONFIG_CMD_PMC) += pmc.o
 obj-$(CONFIG_CMD_PSTORE) += pstore.o
+obj-$(CONFIG_CMD_PWM) += pwm.o
 obj-$(CONFIG_CMD_PXE) += pxe.o pxe_utils.o
 obj-$(CONFIG_CMD_WOL) += wol.o
 obj-$(CONFIG_CMD_QFW) += qfw.o
diff --git a/cmd/pwm.c b/cmd/pwm.c
new file mode 100644
index 00..f82f7789cd
--- /dev/null
+++ b/cmd/pwm.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Control PWM channels
+ *
+ * Copyright (c) 2020 SiFive, Inc
+ * author: Pragnesh Patel 
+ */
+
+#include 
+#include 
+#include 
+
+enum pwm_cmd {
+   PWM_SET_INVERT,
+   PWM_SET_CONFIG,
+   PWM_SET_ENABLE,
+   PWM_SET_DISABLE,
+};
+
+static int do_pwm(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+   const char *str_cmd, *str_channel = NULL, *str_enable = NULL;
+   const char *str_pwm = NULL, *str_period = NULL, *str_duty = NULL;
+   enum pwm_cmd sub_cmd;
+   struct udevice *dev;
+   u32 channel, pwm_enable, period_ns = 0, duty_ns = 0;
+   int ret;
+
+   if (argc < 4)
+ show_usage:
+   return CMD_RET_USAGE;
+
+   str_cmd = argv[1];
+   argc -= 2;
+   argv += 2;
+
+   if (argc > 0) {
+   str_pwm = *argv;
+   argc--;
+   argv++;
+   }
+
+   if (!str_pwm)
+   goto show_usage;
+
+   switch (*str_cmd) {
+   case 'i':
+   sub_cmd = PWM_SET_INVERT;
+   break;
+   case 'c':
+   sub_cmd = PWM_SET_CONFIG;
+   break;
+   case 'e':
+   sub_cmd = PWM_SET_ENABLE;
+   break;
+   case 'd':
+   sub_cmd = PWM_SET_DISABLE;
+   break;
+   default:
+   goto show_usage;
+   }
+
+   if (IS_ENABLED(CONFIG_DM_PWM)) {
+   ret = uclass_get_device_by_name(UCLASS_PWM, str_pwm, &dev);
+   if (ret) {
+   printf("PWM: '%s' not found\n", str_pwm);
+   return cmd_process_error(cmdtp, ret);
+   }
+   }
+
+   if (argc > 0) {
+   str_channel = *argv;
+   channel = simple_strtoul(str_channel, NULL, 10);
+   argc--;
+   argv++;
+   } else {
+   goto show_usage;
+   }
+
+   if (sub_cmd == PWM_SET_INVERT && argc > 0) {
+   str_enable = *argv;
+   pwm_enable = simple_strtoul(str_enable, NULL, 10);
+   ret = pwm_set_invert(dev, channel, pwm_enable);
+   } else if (sub_cmd == PWM_SET_CONFIG && argc == 2) {
+   str_period = *argv;
+   argc--;
+   argv++;
+   period_ns = simple_strtoul(str_period, NULL, 10);
+
+   if (argc > 0) {
+   str_duty = *argv;
+   duty_ns = simple_strtoul(str_duty, NULL, 10);
+   }
+
+   ret = pwm_set_config(dev, channel, period_ns, duty_ns);
+   } else if (sub_cmd == PWM_SET_ENABLE) {
+   ret = pwm_set_enable(dev, channel, 1);
+   } else if (sub_cmd == PWM_SET_DISABLE) {
+   ret = pwm_set_enable(dev, channel, 0);
+   } else {
+   printf("PWM arguments missing\n");
+   return CMD_RET_FAILURE;
+   }
+
+   if (ret) {
+   printf("error!\n");
+   return CMD_RET_FAILURE;
+   }
+
+   printf("success!\n");
+   return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(pwm, 6, 0, do_pwm,
+  "control pwm channels",
+  "pwm\n"
+  "pwm \n"
+  "pwm   ");
-- 
2.17.1

[PATCH] binman: Remove additional backslash

[Michal Simek]

The origin patch didn't have this change and it was caused by manual
resolution where additional backslash was added.

Fixes: 6723b4c6ca7b ("binman: Call helper function binman_set_rom_offset() to 
fill offset")
Signed-off-by: Michal Simek 
---

 lib/binman.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/binman.c b/lib/binman.c
index d395b1cf70b2..f027d1b30422 100644
--- a/lib/binman.c
+++ b/lib/binman.c
@@ -104,6 +104,6 @@ int binman_init(void)
binman->image = node;
}
binman_set_rom_offset(ROM_OFFSET_NONE);
-\
+
return 0;
 }
-- 
2.29.2

RE: [PATCH v4 1/2] dm: core: add function uclass_probe_all() to probe all devices

[Vabhav Sharma (OSS)]

> -Original Message-
> From: Sean Anderson 
> Sent: Thursday, November 19, 2020 9:05 AM
> To: Vabhav Sharma (OSS) ;
> s...@chromium.org; s...@denx.de
> Cc: u-boot@lists.denx.de; Varun Sethi ;
> andre.przyw...@arm.com; Vabhav Sharma 
> Subject: Re: [PATCH v4 1/2] dm: core: add function uclass_probe_all() to
> probe all devices
> 
> On 11/17/20 10:00 AM, Vabhav Sharma wrote:
> > From: Vabhav Sharma 
> >
> > Support a common method to probe all devices associated with uclass.
> >
> > This includes data structures and code for finding the first device
> > and looping for remaining devices associated with uclasses (groups of
> > devices with the same purpose, e.g. all SERIAL ports will be in the same
> uclass).
> >
> > An example is SBSA compliant PL011 UART IP, where firmware does the
> > serial port initialization and prepare uart device to let the kernel
> > use it for sending and reveiving the characters.SERIAL uclass will use
> > this function to initialize PL011 UART ports.
> >
> > The feature is enabled with CONFIG_DM.
> >
> > Signed-off-by: Vabhav Sharma 
> > Reviewed-by: Stefan Roese 
> > Reviewed-by: Simon Glass 
> > --
> >   v4:
> >   Incorporated review comments of Simon
> >   Removed if (dev)..  conditional check
> >
> >   v3:
> >   Incorporated review comments of Stephan,Simon
> >   Related discussion
> > https://patchwork.ozlabs.org/project/uboot/patch/1601400
> > 385-11854-1-git-send-email-vabhav.sha...@oss.nxp.com/
> > ---
> >  drivers/core/uclass.c | 16 
> >  include/dm/uclass.h   | 12 
> >  2 files changed, 28 insertions(+)
> >
> > diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index
> > c3f1b73..a1dc8bb 100644
> > --- a/drivers/core/uclass.c
> > +++ b/drivers/core/uclass.c
> > @@ -792,6 +792,22 @@ int uclass_pre_remove_device(struct udevice
> *dev)
> > }  #endif
> >
> > +int uclass_probe_all(enum uclass_id id) {
> > +   struct udevice *dev;
> > +   int ret;
> > +
> > +   ret = uclass_first_device(id, &dev);
> > +   if (ret || !dev)
> > +   return ret;
> > +
> > +   /* Scanning uclass to probe all devices */
> > +   for (; dev; uclass_next_device(&dev))
> 
> You must check the return value of this function.
Error check is done for first device before passing the device to 
uclass_next_device(),
I think of other implementation is to combine the first device check and 
iterating through device list of u-class as 
for (ret = uclass_first_device(id, &dev); dev && !ret;  ret = 
uclass_next_device(&dev))
;
But iteration is not required if first device is not found and current changes 
seems to be ok
Please share valuable feedback
> 
> Also, I would suggest using a while loop instead of an empty for loop.
Please elaborate, Found for loop best suitable to use here
> 
> > +   ;
> > +
> > +   return 0;
> > +}
> > +
> >  UCLASS_DRIVER(nop) = {
> > .id = UCLASS_NOP,
> > .name   = "nop",
> > diff --git a/include/dm/uclass.h b/include/dm/uclass.h index
> > 7188304..7ac0aaa 100644
> > --- a/include/dm/uclass.h
> > +++ b/include/dm/uclass.h
> > @@ -381,6 +381,18 @@ int uclass_first_device_drvdata(enum uclass_id
> > id, ulong driver_data,  int uclass_resolve_seq(struct udevice *dev);
> >
> >  /**
> > + * uclass_probe_all() - Probe all devices based on an uclass ID
> > + *
> > + * Every uclass is identified by an ID, a number from 0 to n-1 where
> > + n is
> > + * the number of uclasses. This function probe all devices asocciated
> > + with
> 
> nit: probes associated
Ok
> 
> > + * a uclass by looking its ID.
> 
> nit: for its
Sure
> 
> AFAICT uclass_find_next_device walks the linked-list of devices in a uclass,
> and does not care about the ID. So this documentation is incorrect.
This documentation is for new function uclass_probe_all() and understand each 
Uclass is identified by enum ID e.g. UCLASS_SERIAL for serial devices.
According used the statement  "Every uclass is identified by an ID"

Please suggest.
> 
> > + *
> > + * @id: uclass ID to look up
> > + * @return 0 if OK, other -ve on error  */ int uclass_probe_all(enum
> > +uclass_id id);
> > +
> > +/**
> >   * uclass_id_foreach_dev() - Helper function to iteration through devices
> >   *
> >   * This creates a for() loop which works through the available
> > devices in
> >