[PATCH] env: sf: single function env_sf_save()
Instead of implementing redundant environments in two very similar
functions env_sf_save(), handle redundancy in one function, placing the
few differences in appropriate pre-compiler sections depending on config
option CONFIG_ENV_OFFSET_REDUND.
Additionally, several checkpatch complaints were addressed.
This patch is in preparation for adding support for env erase.
Signed-off-by: Harry Waschkeit
---
env/sf.c | 132 ++-
1 file changed, 43 insertions(+), 89 deletions(-)
diff --git a/env/sf.c b/env/sf.c
index 937778aa37..c60bd1deed 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -66,13 +66,16 @@ static int setup_flash_device(void)
return 0;
}
-#if defined(CONFIG_ENV_OFFSET_REDUND)
static int env_sf_save(void)
{
env_t env_new;
- char*saved_buffer = NULL, flag = ENV_REDUND_OBSOLETE;
+ char*saved_buffer = NULL;
u32 saved_size, saved_offset, sector;
+ ulong offset;
int ret;
+#if CONFIG_IS_ENABLED(SYS_REDUNDAND_ENVIRONMENT)
+ charflag = ENV_REDUND_OBSOLETE;
+#endif
ret = setup_flash_device();
if (ret)
@@ -81,27 +84,33 @@ static int env_sf_save(void)
ret = env_export(&env_new);
if (ret)
return -EIO;
- env_new.flags = ENV_REDUND_ACTIVE;
- if (gd->env_valid == ENV_VALID) {
- env_new_offset = CONFIG_ENV_OFFSET_REDUND;
- env_offset = CONFIG_ENV_OFFSET;
- } else {
- env_new_offset = CONFIG_ENV_OFFSET;
- env_offset = CONFIG_ENV_OFFSET_REDUND;
- }
+#if CONFIG_IS_ENABLED(SYS_REDUNDAND_ENVIRONMENT)
+ env_new.flags = ENV_REDUND_ACTIVE;
+
+ if (gd->env_valid == ENV_VALID) {
+ env_new_offset = CONFIG_ENV_OFFSET_REDUND;
+ env_offset = CONFIG_ENV_OFFSET;
+ } else {
+ env_new_offset = CONFIG_ENV_OFFSET;
+ env_offset = CONFIG_ENV_OFFSET_REDUND;
+ }
+ offset = env_new_offset;
+#else
+ offset = CONFIG_ENV_OFFSET;
+#endif
/* Is the sector larger than the env (i.e. embedded) */
if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
saved_size = CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SIZE;
- saved_offset = env_new_offset + CONFIG_ENV_SIZE;
+ saved_offset = offset + CONFIG_ENV_SIZE;
saved_buffer = memalign(ARCH_DMA_MINALIGN, saved_size);
if (!saved_buffer) {
ret = -ENOMEM;
goto done;
}
- ret = spi_flash_read(env_flash, saved_offset,
- saved_size, saved_buffer);
+ ret = spi_flash_read(env_flash, saved_offset, saved_size,
+saved_buffer);
if (ret)
goto done;
}
@@ -109,35 +118,39 @@ static int env_sf_save(void)
sector = DIV_ROUND_UP(CONFIG_ENV_SIZE, CONFIG_ENV_SECT_SIZE);
puts("Erasing SPI flash...");
- ret = spi_flash_erase(env_flash, env_new_offset,
- sector * CONFIG_ENV_SECT_SIZE);
+ ret = spi_flash_erase(env_flash, offset,
+ sector * CONFIG_ENV_SECT_SIZE);
if (ret)
goto done;
puts("Writing to SPI flash...");
- ret = spi_flash_write(env_flash, env_new_offset,
- CONFIG_ENV_SIZE, &env_new);
+ ret = spi_flash_write(env_flash, offset,
+ CONFIG_ENV_SIZE, &env_new);
if (ret)
goto done;
if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
- ret = spi_flash_write(env_flash, saved_offset,
- saved_size, saved_buffer);
+ ret = spi_flash_write(env_flash, saved_offset, saved_size,
+ saved_buffer);
if (ret)
goto done;
}
- ret = spi_flash_write(env_flash, env_offset + offsetof(env_t, flags),
- sizeof(env_new.flags), &flag);
- if (ret)
- goto done;
+#if CONFIG_IS_ENABLED(SYS_REDUNDAND_ENVIRONMENT)
+ ret = spi_flash_write(env_flash, env_offset + offsetof(env_t,
flags),
+ sizeof(env_new.flags), &flag);
+ if (ret)
+ goto done;
- puts("done\n");
+ puts("done\n");
- gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID :
ENV_REDUND;
- printf("Valid environment: %d\n", (int)gd->env_valid);
+ printf("Valid environment: %d\n", (int)gd->env_valid);
+#else
+ puts("done\n");
+#endif
done:
[PATCH v4 9/9] mtd: spi-nor-tiny: Add fixups for Cypress s25hl-t/s25hs-t
From: Takahiro Kuwano
Fixes mode clocks for SPINOR_OP_READ_FAST_4B and volatile QE bit in tiny.
The volatile QE bit function, spansion_quad_enable_volatile() supports
dual/quad die package parts, by taking 'die_size' parameter that is used
to iterate register update for all dies in the device.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-tiny.c | 89 ++
1 file changed, 89 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c
index 5cc2b7d996..66680df5a9 100644
--- a/drivers/mtd/spi/spi-nor-tiny.c
+++ b/drivers/mtd/spi/spi-nor-tiny.c
@@ -555,6 +555,85 @@ static int spansion_read_cr_quad_enable(struct spi_nor
*nor)
}
#endif /* CONFIG_SPI_FLASH_SPANSION */
+#ifdef CONFIG_SPI_FLASH_SPANSION
+/**
+ * spansion_quad_enable_volatile() - enable Quad I/O mode in volatile register.
+ * @nor: pointer to a 'struct spi_nor'
+ * @die_size: maximum number of bytes per die ('mtd.size' > 'die_size' in
+ * multi die package parts).
+ * @dummy: number of dummy cycles for register read
+ *
+ * It is recommended to update volatile registers in the field application due
+ * to a risk of the non-volatile registers corruption by power interrupt. This
+ * function sets Quad Enable bit in CFR1 volatile.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spansion_quad_enable_volatile(struct spi_nor *nor, u32 die_size,
+u8 dummy)
+{
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(0, 1),
+ SPI_MEM_OP_ADDR(4, 0, 1),
+ SPI_MEM_OP_DUMMY(0, 1),
+ SPI_MEM_OP_DATA_IN(1, NULL, 1));
+ u32 addr;
+ u8 cr;
+ int ret;
+
+ /* Use 4-byte address for RDAR/WRAR */
+ ret = spi_nor_write_reg(nor, SPINOR_OP_EN4B, NULL, 0);
+ if (ret < 0) {
+ dev_dbg(nor->dev,
+ "error while enabling 4-byte address\n");
+ return ret;
+ }
+
+ for (addr = 0; addr < nor->mtd.size; addr += die_size) {
+ op.addr.val = addr + SPINOR_REG_ADDR_CFR1V;
+
+ /* Check current Quad Enable bit value. */
+ op.cmd.opcode = SPINOR_OP_RDAR;
+ op.dummy.nbytes = dummy / 8;
+ op.data.dir = SPI_MEM_DATA_IN;
+ ret = spi_nor_read_write_reg(nor, &op, &cr);
+ if (ret < 0) {
+ dev_dbg(nor->dev,
+ "error while reading configuration register\n");
+ return -EINVAL;
+ }
+
+ if (cr & CR_QUAD_EN_SPAN)
+ return 0;
+
+ /* Write new value. */
+ cr |= CR_QUAD_EN_SPAN;
+ op.cmd.opcode = SPINOR_OP_WRAR;
+ op.dummy.nbytes = 0;
+ op.data.dir = SPI_MEM_DATA_OUT;
+ write_enable(nor);
+ ret = spi_nor_read_write_reg(nor, &op, &cr);
+ if (ret < 0) {
+ dev_dbg(nor->dev,
+ "error while writing configuration register\n");
+ return -EINVAL;
+ }
+
+ /* Read back and check it. */
+ op.cmd.opcode = SPINOR_OP_RDAR;
+ op.dummy.nbytes = dummy / 8;
+ op.data.dir = SPI_MEM_DATA_IN;
+ ret = spi_nor_read_write_reg(nor, &op, &cr);
+ if (ret || !(cr & CR_QUAD_EN_SPAN)) {
+ dev_dbg(nor->dev, "Spansion Quad bit not set\n");
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+#endif
+
static void
spi_nor_set_read_settings(struct spi_nor_read_command *read,
u8 num_mode_clocks,
@@ -583,6 +662,11 @@ static int spi_nor_init_params(struct spi_nor *nor,
spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_FAST],
0, 8, SPINOR_OP_READ_FAST,
SNOR_PROTO_1_1_1);
+#ifdef CONFIG_SPI_FLASH_SPANSION
+ if (JEDEC_MFR(info) == SNOR_MFR_CYPRESS &&
+ (info->id[1] == 0x2a || info->id[1] == 0x2b))
+ params->reads[SNOR_CMD_READ_FAST].num_mode_clocks = 8;
+#endif
}
if (info->flags & SPI_NOR_QUAD_READ) {
@@ -659,6 +743,11 @@ static int spi_nor_setup(struct spi_nor *nor, const struct
flash_info *info,
case SNOR_MFR_MACRONIX:
err = macronix_quad_enable(nor);
break;
+#endif
+#ifdef CONFIG_SPI_FLASH_SPANSION
+ case SNOR_MFR_CYPRESS:
+ err = spansion_quad_enable_volatile(nor, SZ_128M, 0);
+ break;
#endif
case SNOR_MFR_ST:
case SNOR_MFR_MICRON:
--
2.25.1
[PATCH v4 8/9] mtd: spi-nor-core: Add fixups for Cypress s25hl-t/s25hs-t
From: Takahiro Kuwano
Add nor->setup() and fixup hooks to overwrite:
- volatile QE bit
- the ->ready() hook for dual/quad die package parts
- overlaid erase
- spi_nor_flash_parameter
- mtd_info
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 108 +
1 file changed, 108 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index ef49328a28..3d8cb9c333 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2648,8 +2648,116 @@ static int spi_nor_init(struct spi_nor *nor)
return 0;
}
+#ifdef CONFIG_SPI_FLASH_SPANSION
+static int s25hx_t_mdp_ready(struct spi_nor *nor)
+{
+ u32 addr;
+ int ret;
+
+ for (addr = 0; addr < nor->mtd.size; addr += SZ_128M) {
+ ret = spansion_sr_ready(nor, addr, 0);
+ if (ret != 1)
+ return ret;
+ }
+
+ return 1;
+}
+
+static int s25hx_t_quad_enable(struct spi_nor *nor)
+{
+ u32 addr;
+ int ret;
+
+ for (addr = 0; addr < nor->mtd.size; addr += SZ_128M) {
+ ret = spansion_quad_enable_volatile(nor, addr, 0);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int s25hx_t_setup(struct spi_nor *nor, const struct flash_info *info,
+const struct spi_nor_flash_parameter *params,
+const struct spi_nor_hwcaps *hwcaps)
+{
+#ifdef CONFIG_SPI_FLASH_BAR
+ return -ENOTSUPP; /* Bank Address Register is not supported */
+#endif
+ /*
+* The Cypress Semper family has transparent ECC. To preserve
+* ECC enabled, multi-pass programming within the same 16-byte
+* ECC data unit needs to be avoided. Set writesize to the page
+* size and remove the MTD_BIT_WRITEABLE flag in mtd_info to
+* prevent multi-pass programming.
+*/
+ nor->mtd.writesize = params->page_size;
+ nor->mtd.flags &= ~MTD_BIT_WRITEABLE;
+
+ /* Emulate uniform sector architecure by this erase hook*/
+ nor->mtd._erase = spansion_overlaid_erase;
+
+ /* For 2Gb (dual die) and 4Gb (quad die) parts */
+ if (nor->mtd.size > SZ_128M)
+ nor->ready = s25hx_t_mdp_ready;
+
+ /* Enter 4-byte addressing mode for WRAR used in quad_enable */
+ set_4byte(nor, info, true);
+
+ return spi_nor_default_setup(nor, info, params, hwcaps);
+}
+
+static void s25hx_t_default_init(struct spi_nor *nor)
+{
+ nor->setup = s25hx_t_setup;
+}
+
+static int s25hx_t_post_bfpt_fixup(struct spi_nor *nor,
+ const struct sfdp_parameter_header *header,
+ const struct sfdp_bfpt *bfpt,
+ struct spi_nor_flash_parameter *params)
+{
+ /* Default page size is 256-byte, but BFPT reports 512-byte */
+ params->page_size = 256;
+ /* Reset erase size in case it is set to 4K from BFPT */
+ nor->mtd.erasesize = 0;
+
+ return 0;
+}
+
+static void s25hx_t_post_sfdp_fixup(struct spi_nor *nor,
+ struct spi_nor_flash_parameter *params)
+{
+ /* READ_FAST_4B (0Ch) requires mode cycles*/
+ params->reads[SNOR_CMD_READ_FAST].num_mode_clocks = 8;
+ /* PP_1_1_4 is not supported */
+ params->hwcaps.mask &= ~SNOR_HWCAPS_PP_1_1_4;
+ /* Use volatile register to enable quad */
+ params->quad_enable = s25hx_t_quad_enable;
+}
+
+static struct spi_nor_fixups s25hx_t_fixups = {
+ .default_init = s25hx_t_default_init,
+ .post_bfpt = s25hx_t_post_bfpt_fixup,
+ .post_sfdp = s25hx_t_post_sfdp_fixup,
+};
+#endif
+
static void spi_nor_set_fixups(struct spi_nor *nor)
{
+#ifdef CONFIG_SPI_FLASH_SPANSION
+ if (JEDEC_MFR(nor->info) == SNOR_MFR_CYPRESS) {
+ switch (nor->info->id[1]) {
+ case 0x2a: /* S25HL (QSPI, 3.3V) */
+ case 0x2b: /* S25HS (QSPI, 1.8V) */
+ nor->fixups = &s25hx_t_fixups;
+ break;
+
+ default:
+ break;
+ }
+ }
+#endif
}
int spi_nor_scan(struct spi_nor *nor)
--
2.25.1
[PATCH v4 7/9] mtd: spi-nor-core: Add Cypress manufacturer ID in set_4byte
From: Takahiro Kuwano Cypress chips support SPINOR_OP_EN4B(B7h)/SPINOR_OP_EX4B(E9h) to enable/disable 4-byte addressing mode. Signed-off-by: Takahiro Kuwano --- drivers/mtd/spi/spi-nor-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 70da0081b6..ef49328a28 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -492,6 +492,7 @@ static int set_4byte(struct spi_nor *nor, const struct flash_info *info, case SNOR_MFR_ISSI: case SNOR_MFR_MACRONIX: case SNOR_MFR_WINBOND: + case SNOR_MFR_CYPRESS: if (need_wren) write_enable(nor); -- 2.25.1
[PATCH v4 6/9] mtd: spi-nor-core: Add overlaid sector erase feature
From: Takahiro Kuwano
Some of Spansion/Cypress chips have overlaid 4KB sectors at top and/or
bottom, depending on the device configuration, while U-Boot supports
uniform sector layout only. This patch adds an erase hook that emulates
uniform sector layout.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 48 ++
1 file changed, 48 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 1c0ba5abf9..70da0081b6 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -788,6 +788,54 @@ erase_err:
return ret;
}
+#ifdef CONFIG_SPI_FLASH_SPANSION
+/*
+ * Erase for Spansion/Cypress Flash devices that has overlaid 4KB sectors at
+ * the top and/or bottom.
+ */
+static int spansion_overlaid_erase(struct mtd_info *mtd,
+ struct erase_info *instr)
+{
+ struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ struct erase_info instr_4k;
+ u8 opcode;
+ u32 erasesize;
+ int ret;
+
+ /* Perform default erase operation (non-overlaid portion is erased) */
+ ret = spi_nor_erase(mtd, instr);
+ if (ret)
+ return ret;
+
+ /* Backup default erase opcode and size */
+ opcode = nor->erase_opcode;
+ erasesize = mtd->erasesize;
+
+ /*
+* Erase 4KB sectors. Use the possible max length of 4KB sector region.
+* The Flash just ignores the command if the address is not configured
+* as 4KB sector and reports ready status immediately.
+*/
+ instr_4k.len = SZ_128K;
+ nor->erase_opcode = SPINOR_OP_BE_4K_4B;
+ mtd->erasesize = SZ_4K;
+ if (instr->addr == 0) {
+ instr_4k.addr = 0;
+ ret = spi_nor_erase(mtd, &instr_4k);
+ }
+ if (!ret && instr->addr + instr->len == mtd->size) {
+ instr_4k.addr = mtd->size - instr_4k.len;
+ ret = spi_nor_erase(mtd, &instr_4k);
+ }
+
+ /* Restore erase opcode and size */
+ nor->erase_opcode = opcode;
+ mtd->erasesize = erasesize;
+
+ return ret;
+}
+#endif
+
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
/* Write status register and ensure bits in mask match written values */
static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask)
--
2.25.1
[PATCH v4 5/9] mtd: spi-nor-core: Add the ->ready() hook
From: Takahiro Kuwano
For dual/quad die package devices from Spansion/Cypress, the device's
status needs to be checked by reading status registers in all dies, by
using Read Any Register command. To support this, a Flash specific hook
that can overwrite the legacy status check is needed.
The spansion_sr_ready() reads status register 1 by Read Any Register
commnad. This function is called from Flash specific hook with die address
and dummy cycles.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 32
include/linux/mtd/spi-nor.h| 4 +++-
2 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 624e730524..1c0ba5abf9 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -522,6 +522,35 @@ static int set_4byte(struct spi_nor *nor, const struct
flash_info *info,
}
}
+#ifdef CONFIG_SPI_FLASH_SPANSION
+/*
+ * Read status register 1 by using Read Any Register command to support multi
+ * die package parts.
+ */
+static int spansion_sr_ready(struct spi_nor *nor, u32 addr_base, u8 dummy)
+{
+ u32 reg_addr = addr_base + SPINOR_REG_ADDR_STR1V;
+ u8 sr;
+ int ret;
+
+ ret = spansion_read_any_reg(nor, reg_addr, dummy, &sr);
+ if (ret < 0)
+ return ret;
+
+ if (sr & (SR_E_ERR | SR_P_ERR)) {
+ if (sr & SR_E_ERR)
+ dev_dbg(nor->dev, "Erase Error occurred\n");
+ else
+ dev_dbg(nor->dev, "Programming Error occurred\n");
+
+ nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
+ return -EIO;
+ }
+
+ return !(sr & SR_WIP);
+}
+#endif
+
static int spi_nor_sr_ready(struct spi_nor *nor)
{
int sr = read_sr(nor);
@@ -570,6 +599,9 @@ static int spi_nor_ready(struct spi_nor *nor)
{
int sr, fsr;
+ if (nor->ready)
+ return nor->ready(nor);
+
sr = spi_nor_sr_ready(nor);
if (sr < 0)
return sr;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index e31073eb24..25234177de 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -434,8 +434,9 @@ struct flash_info;
* @flash_lock:[FLASH-SPECIFIC] lock a region of the SPI NOR
* @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR
* @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
- * @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
* completely locked
+ * @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
+ * @ready: [FLASH-SPECIFIC] check if the flash is ready
* @priv: the private data
*/
struct spi_nor {
@@ -481,6 +482,7 @@ struct spi_nor {
int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
int (*quad_enable)(struct spi_nor *nor);
+ int (*ready)(struct spi_nor *nor);
void *priv;
/* Compatibility for spi_flash, remove once sf layer is merged with mtd */
--
2.25.1
[PATCH v4 4/9] mtd: spi-nor-core: Add support for volatile QE bit
From: Takahiro Kuwano
Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad Enable bit in CFR1
volatile.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 53 ++
1 file changed, 53 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 2803536ed5..624e730524 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -1576,6 +1576,59 @@ static int spansion_read_cr_quad_enable(struct spi_nor
*nor)
return 0;
}
+/**
+ * spansion_quad_enable_volatile() - enable Quad I/O mode in volatile register.
+ * @nor: pointer to a 'struct spi_nor'
+ * @addr_base: base address of register (can be >0 in multi-die parts)
+ * @dummy: number of dummy cycles for register read
+ *
+ * It is recommended to update volatile registers in the field application due
+ * to a risk of the non-volatile registers corruption by power interrupt. This
+ * function sets Quad Enable bit in CFR1 volatile.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spansion_quad_enable_volatile(struct spi_nor *nor, u32 addr_base,
+u8 dummy)
+{
+ u32 addr = addr_base | SPINOR_REG_ADDR_CFR1V;
+
+ u8 cr;
+ int ret;
+
+ /* Check current Quad Enable bit value. */
+ ret = spansion_read_any_reg(nor, addr, dummy, &cr);
+ if (ret < 0) {
+ dev_dbg(nor->dev,
+ "error while reading configuration register\n");
+ return -EINVAL;
+ }
+
+ if (cr & CR_QUAD_EN_SPAN)
+ return 0;
+
+ cr |= CR_QUAD_EN_SPAN;
+
+ write_enable(nor);
+
+ ret = spansion_write_any_reg(nor, addr, cr);
+
+ if (ret < 0) {
+ dev_dbg(nor->dev,
+ "error while writing configuration register\n");
+ return -EINVAL;
+ }
+
+ /* Read back and check it. */
+ ret = spansion_read_any_reg(nor, addr, dummy, &cr);
+ if (ret || !(cr & CR_QUAD_EN_SPAN)) {
+ dev_dbg(nor->dev, "Spansion Quad bit not set\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
#if CONFIG_IS_ENABLED(SPI_FLASH_SFDP_SUPPORT)
/**
* spansion_no_read_cr_quad_enable() - set QE bit in Configuration Register.
--
2.25.1
[PATCH v4 3/9] mtd: spi-nor-core: Add support for Read/Write Any Register
From: Takahiro Kuwano
Some of Spansion/Cypress chips support Read/Write Any Register commands.
These commands are mainly used to write volatile registers and access to
the registers in second and subsequent die for multi-die package parts.
The Read Any Register instruction (65h) is followed by register address
and dummy cycles, then the selected register byte is returned.
The Write Any Register instruction (71h) is followed by register address
and register byte to write.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 25 +
include/linux/mtd/spi-nor.h| 4
2 files changed, 29 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 34c15f1561..2803536ed5 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -211,6 +211,31 @@ static int spi_nor_write_reg(struct spi_nor *nor, u8
opcode, u8 *buf, int len)
return spi_nor_read_write_reg(nor, &op, buf);
}
+#ifdef CONFIG_SPI_FLASH_SPANSION
+static int spansion_read_any_reg(struct spi_nor *nor, u32 addr, u8 dummy,
+u8 *val)
+{
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDAR, 1),
+ SPI_MEM_OP_ADDR(nor->addr_width, addr, 1),
+ SPI_MEM_OP_DUMMY(dummy / 8, 1),
+ SPI_MEM_OP_DATA_IN(1, NULL, 1));
+
+ return spi_nor_read_write_reg(nor, &op, val);
+}
+
+static int spansion_write_any_reg(struct spi_nor *nor, u32 addr, u8 val)
+{
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRAR, 1),
+ SPI_MEM_OP_ADDR(nor->addr_width, addr, 1),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(1, NULL, 1));
+
+ return spi_nor_read_write_reg(nor, &op, &val);
+}
+#endif
+
static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
u_char *buf)
{
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 89e7a4fdcd..e31073eb24 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -121,6 +121,10 @@
#define SPINOR_OP_BRWR 0x17/* Bank register write */
#define SPINOR_OP_BRRD 0x16/* Bank register read */
#define SPINOR_OP_CLSR 0x30/* Clear status register 1 */
+#define SPINOR_OP_RDAR 0x65/* Read any register */
+#define SPINOR_OP_WRAR 0x71/* Write any register */
+#define SPINOR_REG_ADDR_STR1V 0x0080
+#define SPINOR_REG_ADDR_CFR1V 0x0082
/* Used for Micron flashes only. */
#define SPINOR_OP_RD_EVCR 0x65/* Read EVCR register */
--
2.25.1
[PATCH v4 2/9] mtd: spi-nor-ids: Add Cypress s25hl-t/s25hs-t
From: Takahiro Kuwano
The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
The datasheets can be found in the following links.
https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad die)
Tested 512Mb/1Gb/2Gb parts on Xilinx Zynq-7000 FPGA board.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-ids.c | 36 +++
1 file changed, 36 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 5bd5dd3003..b78d13e980 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -217,6 +217,42 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("s25fl208k", 0x014014, 0, 64 * 1024, 16, SECT_4K |
SPI_NOR_DUAL_READ) },
{ INFO("s25fl064l", 0x016017, 0, 64 * 1024, 128, SECT_4K |
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ INFO("s25fl128l", 0x016018, 0, 64 * 1024, 256, SECT_4K |
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+
+ /* S25HL/HS-T (Semper Flash with Quad SPI) Family has overlaid 4KB
+* sectors at top and/or bottom, depending on the device configuration.
+* To support this, an erase hook makes overlaid sectors appear as
+* uniform sectors.
+*/
+ { INFO6("s25hl256t", 0x342a19, 0x0f0390, 256 * 1024, 128,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hl512t", 0x342a1a, 0x0f0390, 256 * 1024, 256,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hl01gt", 0x342a1b, 0x0f0390, 256 * 1024, 512,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hl02gt", 0x342a1c, 0x0f0090, 256 * 1024, 1024,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hl04gt", 0x342a1d, 0x0f0090, 256 * 1024, 2048,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hs256t", 0x342b19, 0x0f0390, 256 * 1024, 128,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hs512t", 0x342b1a, 0x0f0390, 256 * 1024, 256,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hs01gt", 0x342b1b, 0x0f0390, 256 * 1024, 512,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hs02gt", 0x342b1c, 0x0f0090, 256 * 1024, 1024,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
+ { INFO6("s25hs04gt", 0x342b1d, 0x0f0090, 256 * 1024, 2048,
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ USE_CLSR) },
#endif
#ifdef CONFIG_SPI_FLASH_SST/* SST */
/* SST -- large erase sizes are "overlays", "sectors" are 4K */
--
2.25.1
[PATCH v4 1/9] mtd: spi-nor: Add Cypress manufacturer ID
From: Takahiro Kuwano This patch adds Cypress manufacturer ID (34h) definition. Signed-off-by: Takahiro Kuwano --- include/linux/mtd/spi-nor.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 5842e9d6ee..89e7a4fdcd 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -27,6 +27,7 @@ #define SNOR_MFR_SPANSION CFI_MFR_AMD #define SNOR_MFR_SST CFI_MFR_SST #define SNOR_MFR_WINBOND 0xef /* Also used by some Spansion */ +#define SNOR_MFR_CYPRESS 0x34 /* * Note on opcode nomenclature: some opcodes have a format like -- 2.25.1
[PATCH v4 0/9] mtd: spi-nor: Add support for Cypress s25hl-t/s25hs-t
From: Takahiro Kuwano The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI. The datasheets can be found in the following links. https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die) https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad die) Tested on Xilinx Zynq-7000 FPGA board. Takahiro Kuwano (9): mtd: spi-nor: Add Cypress manufacturer ID mtd: spi-nor-ids: Add Cypress s25hl-t/s25hs-t mtd: spi-nor-core: Add support for Read/Write Any Register mtd: spi-nor-core: Add support for volatile QE bit mtd: spi-nor-core: Add the ->ready() hook mtd: spi-nor-core: Add overlaid sector erase feature mtd: spi-nor-core: Add Cypress manufacturer ID in set_4byte mtd: spi-nor-core: Add fixups for Cypress s25hl-t/s25hs-t mtd: spi-nor-tiny: Add fixups for Cypress s25hl-t/s25hs-t drivers/mtd/spi/spi-nor-core.c | 267 + drivers/mtd/spi/spi-nor-ids.c | 36 + drivers/mtd/spi/spi-nor-tiny.c | 89 +++ include/linux/mtd/spi-nor.h| 9 +- 4 files changed, 400 insertions(+), 1 deletion(-) --- Changes since v4: - Added Read/Write Any Register support - Added the ->ready() hook to support multi-die package parts - Added S25HL02GT/S25HL04GT/S25HS02GT/S25HS04GT support Changes since v3: - Split into multiple patches Changes since v2: - Fixed typo in comment for spansion_overlaid_erase() - Fixed expressions for addr and len check in spansion_overlaid_erase() - Added device ID check to make the changes effective for S25 only - Added nor->setup() and fixup hooks based on the following patches https://patchwork.ozlabs.org/project/uboot/patch/20200904153500.3569-7-p.ya...@ti.com/ https://patchwork.ozlabs.org/project/uboot/patch/20200904153500.3569-8-p.ya...@ti.com/ https://patchwork.ozlabs.org/project/uboot/patch/20200904153500.3569-9-p.ya...@ti.com/ -- 2.25.1
[PATCH V2] cmd: mem: fix to display wrong memory information
When run meminfo command, it's displayed wrong memory information.
Because some boards are that gd->ram_size is reassigned to other value
in board file.
Additionally, display a memory bank information.
On 4G RPI4 target
- Before
U-Boot> meminfo
DRAM: 948MiB
- After
U-Boot> meminfo
Bank #0: 0 948 MiB
Bank #1: 4000 2.9 GiB
Bank #2: 0 0 Bytes
Bank #3: 0 0 Bytes
DRAM: 3.9GiB
Signed-off-by: Jaehoon Chung
---
Changes in v2:
- Change patch subject prefix from "common: board_f" to "cmd: mem"
- Update commit-msg
- Revert common/board_f.c modification. Instead, add codes in mem.c
---
cmd/mem.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/cmd/mem.c b/cmd/mem.c
index 1d4f2bab2f9a..86f48a6e121a 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -1387,8 +1387,22 @@ U_BOOT_CMD(
static int do_mem_info(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
+ unsigned long long size;
+
+#ifdef CONFIG_NR_DRAM_BANKS
+ int i;
+
+ for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ size += gd->bd->bi_dram[i].size;
+ printf("Bank #%d: %llx ", i,
+ (unsigned long long)(gd->bd->bi_dram[i].start));
+ print_size(gd->bd->bi_dram[i].size, "\n");
+ }
+#else
+ size = gd->ram_size;
+#endif
puts("DRAM: ");
- print_size(gd->ram_size, "\n");
+ print_size(size, "\n");
return 0;
}
--
2.29.0
Re: [PATCH v4 2/6] lib/rsa: Make fdt_add_bignum() available outside of RSA code
On Fri, Jan 08, 2021 at 01:17:33PM -0600, Alexandru Gagniuc wrote: > fdt_add_bignum() is useful for algorithms other than just RSA. To > allow its use for ECDSA, move it to a common file under lib/. > > The new file is suffixed with '-libcrypto' because it has a direct > dependency on openssl. This is due to the use of the "BIGNUM *" type. > > Signed-off-by: Alexandru Gagniuc This makes a large number of platform tools fail to build such as j7200_evm_a72. -- Tom signature.asc Description: PGP signature
Re: [PATCH v8] Add support for stack-protector
On Thu, Jan 14, 2021 at 12:35:35PM -0800, Joel Peshkin wrote: > Add support for stack protector for UBOOT, SPL, and TPL > as well as new pytest for stackprotector > > Signed-off-by: Joel Peshkin > Reviewed-by: Heinrich Schuchardt Oddly enough this cases a number of the TPM2 tests to fail on sandbox: https://dev.azure.com/u-boot/u-boot/_build/results?buildId=1706&view=logs&j=50449d1b-398e-53ae-48fa-6bf338edeb51&t=97605dd2-f5a5-5dd7-2118-315ffdc8bcd6&l=755 -- Tom signature.asc Description: PGP signature
[PATCH v2] common: Kconfig.boot: Add FIT_PRINT config option
Config allows to disable printing contents of fitImage to optimize boottime.
Signed-off-by: Ravik Hasija
Reviewed-by: Simon Glass
---
Changes for v2:
- updated macro to check for CONFIG
- fixed comment to reflect correct condition check
---
common/Kconfig.boot | 6 ++
common/image-fit.c | 4 ++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index 4525a12ab4..5eaabdfc27 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -140,6 +140,12 @@ config FIT_IMAGE_POST_PROCESS
injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
+config FIT_PRINT
+bool "Support FIT printing"
+default y
+help
+ Support printing the content of the fitImage in a verbose manner.
+
if SPL
config SPL_FIT
diff --git a/common/image-fit.c b/common/image-fit.c
index 21c44bdf69..4726051483 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -147,7 +147,7 @@ int fit_get_subimage_count(const void *fit, int
images_noffset)
return count;
}
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FIT_PRINT)
+#if CONFIG_IS_ENABLED(FIT_PRINT) || CONFIG_IS_ENABLED(SPL_FIT_PRINT)
/**
* fit_image_print_data() - prints out the hash node details
* @fit: pointer to the FIT format image header
@@ -555,7 +555,7 @@ void fit_image_print(const void *fit, int image_noffset,
const char *p)
#else
void fit_print_contents(const void *fit) { }
void fit_image_print(const void *fit, int image_noffset, const char *p) { }
-#endif /* !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FIT_PRINT) */
+#endif /* CONFIG_IS_ENABLED(FIR_PRINT) || CONFIG_IS_ENABLED(SPL_FIT_PRINT) */
/**
* fit_get_desc - get node description property
--
2.17.1
[PATCH v2] common: Kconfig.boot: Add FIT_PRINT config option
Config allows to disable printing contents of fitImage to optimize boottime.
Signed-off-by: Ravik Hasija
Reviewed-by: Simon Glass
---
Changes for v2:
- updated macro to check for CONFIG
- fixed comment to reflect correct condition check
---
common/Kconfig.boot | 6 ++
common/image-fit.c | 4 ++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index 4525a12ab4..5eaabdfc27 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -140,6 +140,12 @@ config FIT_IMAGE_POST_PROCESS
injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
+config FIT_PRINT
+bool "Support FIT printing"
+default y
+help
+ Support printing the content of the fitImage in a verbose manner.
+
if SPL
config SPL_FIT
diff --git a/common/image-fit.c b/common/image-fit.c
index 21c44bdf69..4726051483 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -147,7 +147,7 @@ int fit_get_subimage_count(const void *fit, int
images_noffset)
return count;
}
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FIT_PRINT)
+#if CONFIG_IS_ENABLED(FIT_PRINT) || CONFIG_IS_ENABLED(SPL_FIT_PRINT)
/**
* fit_image_print_data() - prints out the hash node details
* @fit: pointer to the FIT format image header
@@ -555,7 +555,7 @@ void fit_image_print(const void *fit, int image_noffset,
const char *p)
#else
void fit_print_contents(const void *fit) { }
void fit_image_print(const void *fit, int image_noffset, const char *p) { }
-#endif /* !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FIT_PRINT) */
+#endif /* CONFIG_IS_ENABLED(FIR_PRINT) || CONFIG_IS_ENABLED(SPL_FIT_PRINT) */
/**
* fit_get_desc - get node description property
--
2.17.1
Re: Contributor meeting notes 19-Jan-21
Hi Stefano, Thank you for the offer! What are the advantages of hosting the meeting on a private server? Regards, Simon On Thu, 21 Jan 2021 at 01:14, Stefano Babic wrote: > > Hi Simon, Tom, > > On 20.01.21 16:05, Marek Vasut wrote: > > On 1/20/21 12:44 AM, Simon Glass wrote: > >> Hi Marek, > > > > Hi, > > > > [...] > > > >>> On 1/19/21 7:54 PM, Simon Glass wrote: > Hi, > >>> > >>> Hi, > >>> > Thank you for attending! > > Full notes at [1] > > Tuesday 19 January 2021 > > Present: Daniel Schwierzeck, Heinrich Schuchardt, Michal Simek, Sean > Anderson, Simon Glass, Walter Lozano > > Notes: > [all] Introductions > [all] Timing of call > - Current time is the best across US, Europe, India. But not any good > for East Asia > - Simon might send out survey > - Send invitation to maintainer group - DONE > [Simon] New sequence numbers > [Heinrich] Online docs > - https://u-boot.readthedocs.io/ > - Accept a merge request only with docs included? > > Next meeting Tuesday 2 Feb. > > [1] > https://docs.google.com/document/d/1YBOMsbM19uSFyoJWnt7-PsOLBaevzQUgV-hiR88a5-o/edit# > > >>> > >>> - Can we use e.g. jitsi meet next time , or even better IRC ? > >> > >> We already IRC a lot. This is partly about getting to know each other. > >> > >> What is the benefit of jitsi? I believe I am permitted to use it, > > > > It seems Alex covered this part already pretty well. > > > > Indeed - DENX has already set a server with Jitsi for videoconference, > and we are actively using to communicate with customers. DENX can offer > to host the meeting for U-Boot (Wolfgang has already agreed) - we have > all advantages reported by Marek and Alex. Simon, Tom: is it this > suitable for you ? We can switch to Jitsi since next meeting. > > Best regards, > Stefano > > -- > = > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de > =
Re: Contributor meeting notes 19-Jan-21
Hi, I have updated the invitation to include a jitsi call. We can try that and fall back to Google Meet if something goes wrong. I have also added a call in Asia timezone. Please see the notes[1] for details. Regards, Simon [1] https://docs.google.com/document/d/1YBOMsbM19uSFyoJWnt7-PsOLBaevzQUgV-hiR88a5-o/edit# On Wed, 20 Jan 2021 at 08:05, Marek Vasut wrote: > > On 1/20/21 12:44 AM, Simon Glass wrote: > > Hi Marek, > > Hi, > > [...] > > >> On 1/19/21 7:54 PM, Simon Glass wrote: > >>> Hi, > >> > >> Hi, > >> > >>> Thank you for attending! > >>> > >>> Full notes at [1] > >>> > >>> Tuesday 19 January 2021 > >>> > >>> Present: Daniel Schwierzeck, Heinrich Schuchardt, Michal Simek, Sean > >>> Anderson, Simon Glass, Walter Lozano > >>> > >>> Notes: > >>> [all] Introductions > >>> [all] Timing of call > >>> - Current time is the best across US, Europe, India. But not any good > >>> for East Asia > >>> - Simon might send out survey > >>> - Send invitation to maintainer group - DONE > >>> [Simon] New sequence numbers > >>> [Heinrich] Online docs > >>> - https://u-boot.readthedocs.io/ > >>> - Accept a merge request only with docs included? > >>> > >>> Next meeting Tuesday 2 Feb. > >>> > >>> [1] > >>> https://docs.google.com/document/d/1YBOMsbM19uSFyoJWnt7-PsOLBaevzQUgV-hiR88a5-o/edit# > >> > >> - Can we use e.g. jitsi meet next time , or even better IRC ? > > > > We already IRC a lot. This is partly about getting to know each other. > > > > What is the benefit of jitsi? I believe I am permitted to use it, > > It seems Alex covered this part already pretty well. > > >> - Does this have to be every two weeks ? Why two weeks ? > > > > Do you mean it should be more frequent or less? > > I think we should agree on what is best in a discussion. > > In my opinion, once a month is enough.
Re: [PATCH] disk: part_dos: update partition table entries after write
On 1/27/21 9:19 PM, Gary Bisson wrote: Fixes issues when switching from GPT to MBR partition tables. This does not catch all cases of changing the MBR. See function write_mbr_partitions() with writes both the MBR and EBRs (if applicable). Android devices typically have more than 4 partitions. Why does fastboot not update the extended boot records? Best regards Heinrich Signed-off-by: Gary Bisson --- Hi, Sending this patch as a follow-up to the other one [1] doing the same thing for GPT write. Let me know if you have any questions. Regards, Gary [1] https://lists.denx.de/pipermail/u-boot/2021-January/438764.html --- disk/part_dos.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/disk/part_dos.c b/disk/part_dos.c index f431925745..470886f4bb 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -499,6 +499,9 @@ int write_mbr_sector(struct blk_desc *dev_desc, void *buf) return 1; } + /* Update the partition table entries*/ + part_init(dev_desc); + return 0; }
[PATCH 1/1] cmd: load, emit error message for invalid block device
The load command should not silently return to the console prompt if an
invalid block device is specified and no file is loaded.
Signed-off-by: Heinrich Schuchardt
---
fs/fs.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/fs/fs.c b/fs/fs.c
index 68a15553cc..0c8f577a79 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -710,8 +710,10 @@ int do_load(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[],
if (argc > 7)
return CMD_RET_USAGE;
- if (fs_set_blk_dev(argv[1], (argc >= 3) ? argv[2] : NULL, fstype))
+ if (fs_set_blk_dev(argv[1], (argc >= 3) ? argv[2] : NULL, fstype)) {
+ log_err("Can't set block device\n");
return 1;
+ }
if (argc >= 4) {
addr = simple_strtoul(argv[3], &ep, 16);
--
2.29.2
[PATCH 1/1] doc: return value exception command
If the exception cannot be raised, the command returns. Currently the return values are not all the same. Remove the sub-chapter 'Return value' Signed-off-by: Heinrich Schuchardt --- doc/usage/exception.rst | 5 - 1 file changed, 5 deletions(-) diff --git a/doc/usage/exception.rst b/doc/usage/exception.rst index 412a03ba0f..db1490f005 100644 --- a/doc/usage/exception.rst +++ b/doc/usage/exception.rst @@ -61,8 +61,3 @@ Examples pc = 0x56076dd1a0f9, pc_reloc = 0x540f9 resetting ... - -Return value - - -The return value $? is always set to 0 (true). -- 2.29.2
[PATCH] disk: part_dos: update partition table entries after write
Fixes issues when switching from GPT to MBR partition tables. Signed-off-by: Gary Bisson --- Hi, Sending this patch as a follow-up to the other one [1] doing the same thing for GPT write. Let me know if you have any questions. Regards, Gary [1] https://lists.denx.de/pipermail/u-boot/2021-January/438764.html --- disk/part_dos.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/disk/part_dos.c b/disk/part_dos.c index f431925745..470886f4bb 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -499,6 +499,9 @@ int write_mbr_sector(struct blk_desc *dev_desc, void *buf) return 1; } + /* Update the partition table entries*/ + part_init(dev_desc); + return 0; } -- 2.29.2
Re: [PATCH 1/2] stdio: Introduce stdio_valid()
On Mon, Jan 25, 2021 at 05:34:05PM +0100, Nicolas Saenz Julienne wrote:
> On Sat, 2021-01-23 at 19:03 -0700, Simon Glass wrote:
> > Hi Nicolas,
> >
> > On Wed, 20 Jan 2021 at 07:05, Nicolas Saenz Julienne
> > wrote:
> > >
> > > stdio_valid() will confirm that a struct stdio_dev pointer is indeed
> > > valid.
> > >
> > > Signed-off-by: Nicolas Saenz Julienne
> > > ---
> > > common/stdio.c | 11 +++
> > > include/stdio_dev.h | 1 +
> > > 2 files changed, 12 insertions(+)
> > >
> > > diff --git a/common/stdio.c b/common/stdio.c
> > > index abf9b1e915..69b7d2692d 100644
> > > --- a/common/stdio.c
> > > +++ b/common/stdio.c
> > > @@ -157,6 +157,17 @@ static int stdio_probe_device(const char *name, enum
> > > uclass_id id,
> > > return 0;
> > > }
> > >
> > > +bool stdio_valid(struct stdio_dev *dev)
> > > +{
> > > + struct stdio_dev *sdev;
> > > +
> > > + list_for_each_entry(sdev, &devs.list, list)
> > > + if (sdev == dev)
> > > + return true;
> > > +
> > > + return false;
> > > +}
> > > +
> > > struct stdio_dev *stdio_get_by_name(const char *name)
> > > {
> > > struct list_head *pos;
> > > diff --git a/include/stdio_dev.h b/include/stdio_dev.h
> > > index 48871a6a22..f341439b03 100644
> > > --- a/include/stdio_dev.h
> > > +++ b/include/stdio_dev.h
> > > @@ -97,6 +97,7 @@ int stdio_deregister_dev(struct stdio_dev *dev, int
> > > force);
> > > struct list_head *stdio_get_list(void);
> > > struct stdio_dev *stdio_get_by_name(const char *name);
> > > struct stdio_dev *stdio_clone(struct stdio_dev *dev);
> > > +bool stdio_valid(struct stdio_dev *dev);
> >
> > Please add a full function comment and explain what valid means.
>
> As discussed with Andy, this is a workaround that doesn't address the
> underlying issue. If it's good enough for the time being I'll be happy to send
> a v2.
>
> I'll leave a comment stating that it's something to fix.
Please do, thanks.
--
Tom
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Description: PGP signature
[PATCH 1/1] doc: describe load command
Man-page for load command.
Signed-off-by: Heinrich Schuchardt
---
doc/usage/index.rst | 1 +
doc/usage/load.rst | 74 +
2 files changed, 75 insertions(+)
create mode 100644 doc/usage/load.rst
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 83cfbafd90..5754958d7e 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -23,6 +23,7 @@ Shell commands
exit
false
for
+ load
loady
mbr
pstore
diff --git a/doc/usage/load.rst b/doc/usage/load.rst
new file mode 100644
index 00..1efee77317
--- /dev/null
+++ b/doc/usage/load.rst
@@ -0,0 +1,74 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+load command
+
+
+Synopsis
+
+
+::
+
+load [ [ [ [bytes [pos]
+
+Description
+---
+
+The load command is used to read a file from a filesystem into memory.
+
+The number of transferred bytes is saved in the environment variable filesize.
+The load address is saved in the environment variable fileaddr.
+
+interface
+interface for accessing the block device (mmc, sata, scsi, usb, )
+
+dev
+device number
+
+part
+partition number, defaults to 0 (whole device)
+
+addr
+load address, defaults to environment variable loadaddr or if loadaddr is
+not set to configuration variable CONFIG_SYS_LOAD_ADDR
+
+filename
+path to file, defaults to environment variable bootfile
+
+bytes
+maximum number of bytes to load
+
+pos
+number of bytes to skip
+
+addr, bytes, pos are hexadecimal numbers.
+
+Example
+---
+
+::
+
+=> load mmc 0:1 ${kernel_addr_r} snp.efi
+149280 bytes read in 11 ms (12.9 MiB/s)
+=>
+=> load mmc 0:1 ${kernel_addr_r} snp.efi 100
+149280 bytes read in 9 ms (15.8 MiB/s)
+=>
+=> load mmc 0:1 ${kernel_addr_r} snp.efi 100 100
+149024 bytes read in 10 ms (14.2 MiB/s)
+=>
+=> load mmc 0:1 ${kernel_addr_r} snp.efi 10
+16 bytes read in 1 ms (15.6 KiB/s)
+=>
+
+Configuration
+-
+
+The load command is only available if CONFIG_CMD_FS_GENERIC=y.
+
+Return value
+
+
+The return value $? is set to 0 (true) if the file was successfully loaded
+even if the number of bytes is less then the specified length.
+
+If an error occurs, the return value $? is set to 1 (false).
--
2.29.2
Re: Please pull u-boot-marvell/master
On Wed, Jan 27, 2021 at 05:02:15PM +0100, Stefan Roese wrote: > Hi Tom, > > please pull the first batch of Marvell MVEBU related patches. Here the > summary log: > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: Pull request for documentation tag doc-2021-04-rc1-3
On Wed, Jan 27, 2021 at 02:42:39PM +0100, Heinrich Schuchardt wrote: > Dear Tom, > > The following changes since commit e262b2973e22174da666038514d17f0f7171466b: > > Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi > (2021-01-25 19:46:02 -0500) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git > tags/doc-2021-04-rc1-3 > > for you to fetch changes up to 25be4d336fa994a17070f5a810f4dd6219b2c993: > > doc: exception command (2021-01-27 12:52:57 +0100) > > No problems were reported by Azure and Gitlab: > > https://gitlab.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/6096 > https://dev.azure.com/u-boot/u-boot/_build/results?buildId=1698 > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3] cmd: pxe: add support for FDT overlays
On Wed, Jan 20, 2021 at 09:54:53AM +0100, Neil Armstrong wrote: > This adds support for specifying FDT overlays in an extlinux/pxelinux > configuration file. > > Without this, there is no simple way to apply overlays when the kernel > and fdt is loaded by the pxe command. > > This change adds the 'fdtoverlays' keyword for a label, supporting multiple > overlay files to be applied on top of the fdt specified in the 'fdt' or > 'devicetree' keyword. > > Example: > label linux > kernel /Image > fdt /soc-board.dtb > fdtoverlays /soc-board-function.dtbo > append console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait > > This code makes usage of a new variable called fdtoverlay_addr_r used to load > the overlay files without overwritting anything important. > > Cc: Tom Rini > Cc: Andre Heider > Cc: Jernej Škrabec > Cc: Jonas Karlman > Tested-by: Jernej Škrabec > Reviewed-by: Jernej Škrabec > Signed-off-by: Neil Armstrong Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] net: phy: micrel: Try default PHY ofnode first
On Sun, Jan 17, 2021 at 12:16:16AM +0100, Marek Vasut wrote: > The phydev structure has a PHY OF node pointer in it, use that OF node > first when looking up PHY OF node properties, since that is likely the > correct PHY OF node pointer. If the pointer is not valid, which is the > case e.g. on legacy DTs, fall back to parsing MAC ethernet-phy subnode. > > Signed-off-by: Marek Vasut > Cc: Joe Hershberger > Cc: Ramon Fried Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 3/3] board: presidio-asic: Add CAxxxx Ethernet support
On Thu, Jan 14, 2021 at 01:34:13PM -0800, Alex Nemirovsky wrote: > Add CA Ethernet support for the Cortina Access > Presidio Engineering Board > > Signed-off-by: Alex Nemirovsky > CC: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/3] net: phy: ca_phy: Add driver for CAxxxx SoCs
On Thu, Jan 14, 2021 at 01:34:12PM -0800, Alex Nemirovsky wrote: > From: Abbie Chang > > Add phy driver support for MACs embedded inside Cortina Access SoCs > > Signed-off-by: Abbie Chang > Signed-off-by: Alex Nemirovsky > > CC: Joe Hershberger > CC: Tom Rini > CC: Aaron Tseng > > Moved out PHY specific code out of Cortina NI Ethernet driver > and into a Cortina Access PHY interface driver Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 1/3] net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCs
On Thu, Jan 14, 2021 at 01:34:11PM -0800, Alex Nemirovsky wrote: > From: Aaron Tseng > > Add Cortina Access Ethernet device driver for CA SoCs. > This driver supports both legacy and DM_ETH network models. > > Signed-off-by: Aaron Tseng > Signed-off-by: Alex Nemirovsky > Signed-off-by: Abbie Chang > > CC: Joe Hershberger > CC: Abbie Chang > CC: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] net: fix ping in netconsole
On Mon, Dec 21, 2020 at 02:44:39PM +1100, Yang Liu wrote: > Should not init eth device when doing ping in netconsole. > > Signed-off-by: Yang Liu > Cc: Joe Hershberger Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] net: e1000: Add missing address translations
On Mon, Nov 16, 2020 at 06:02:30PM +0100, Stefan Roese wrote: > Add some missing address translations from virtual address in local DRAM > to physical address, which is needed for the DMA transactions to work > correctly. > > This issue was detected while testing the e1000 driver on the MIPS > Octeon III platform, which needs address translation. > > Signed-off-by: Stefan Roese > Cc: Joe Hershberger > Cc: Aaron Williams > Cc: Chandrakala Chavva Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] net: e1000: Use virt_to_phys() instead of pci_virt_to_mem()
On Mon, Nov 16, 2020 at 06:02:29PM +0100, Stefan Roese wrote: > Using (dm_)pci_virt_to_mem() is incorrect to translate the virtual > address in local DRAM to a physical address. The correct macro here > is virt_to_phys() so switch to using this macro. > > As virt_to_bus() is now not used any more, this patch also removes > both definitions (DM and non-DM). > > This issue was detected while testing the e1000 driver on the MIPS > Octeon III platform, which needs address translation. > > Signed-off-by: Stefan Roese > Cc: Joe Hershberger > Cc: Aaron Williams > Cc: Chandrakala Chavva Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] net: e1000: Remove unused bus_to_phys() macro
On Mon, Nov 16, 2020 at 06:02:28PM +0100, Stefan Roese wrote: > bus_to_phys() is defined but not referenced at all. This patch removes > it completely. > > Signed-off-by: Stefan Roese > Cc: Joe Hershberger > Cc: Aaron Williams > Cc: Chandrakala Chavva Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 2/6] lib/rsa: Make fdt_add_bignum() available outside of RSA code
Hi, On 1/8/21 8:17 PM, Alexandru Gagniuc wrote: fdt_add_bignum() is useful for algorithms other than just RSA. To allow its use for ECDSA, move it to a common file under lib/. The new file is suffixed with '-libcrypto' because it has a direct dependency on openssl. This is due to the use of the "BIGNUM *" type. Signed-off-by: Alexandru Gagniuc --- include/u-boot/fdt-libcrypto.h | 27 + lib/fdt-libcrypto.c| 72 ++ lib/rsa/rsa-sign.c | 65 +- tools/Makefile | 1 + 4 files changed, 101 insertions(+), 64 deletions(-) create mode 100644 include/u-boot/fdt-libcrypto.h create mode 100644 lib/fdt-libcrypto.c (...) diff --git a/tools/Makefile b/tools/Makefile index b1595ad814..af7698fd01 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -106,6 +106,7 @@ dumpimage-mkimage-objs := aisimage.o \ socfpgaimage.o \ lib/crc16.o \ lib/hash-checksum.o \ + lib/fdt-libcrypto.o \ lib/sha1.o \ lib/sha256.o \ lib/sha512.o \ This part cause compilation issue when CONFIG_FIT_SIGNATURE is not defined / when openssl is not used fdt-libcrypto.c:(.text+0x2f): undefined reference to `BN_new' fdt-libcrypto.c:(.text+0x37): undefined reference to `BN_new' fdt-libcrypto.c:(.text+0x44): undefined reference to `BN_new' fdt-libcrypto.c:(.text+0x51): undefined reference to `BN_new' fdt-libcrypto.c:(.text+0x7d): undefined reference to `BN_CTX_new' fdt-libcrypto.c:(.text+0x9d): undefined reference to `BN_set_word' fdt-libcrypto.c:(.text+0xaf): undefined reference to `BN_set_word' fdt-libcrypto.c:(.text+0xc5): undefined reference to `BN_exp' fdt-libcrypto.c:(.text+0x135): undefined reference to `BN_div' fdt-libcrypto.c:(.text+0x13d): undefined reference to `BN_get_word' fdt-libcrypto.c:(.text+0x172): undefined reference to `BN_rshift' fdt-libcrypto.c:(.text+0x1a9): undefined reference to `BN_free' fdt-libcrypto.c:(.text+0x1b3): undefined reference to `BN_free' fdt-libcrypto.c:(.text+0x1bd): undefined reference to `BN_free' fdt-libcrypto.c:(.text+0x1c5): undefined reference to `BN_free' libssl not always include in mkimage, see the lines: # MXSImage needs LibSSL ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X)$(CONFIG_FIT_SIGNATURE)$(CONFIG_FIT_CIPHER),) HOSTCFLAGS_kwbimage.o += \ $(shell pkg-config --cflags libssl libcrypto 2> /dev/null || echo "") HOSTLDLIBS_mkimage += \ $(shell pkg-config --libs libssl libcrypto 2> /dev/null || echo "-lssl -lcrypto") => I propose to add the added lib only when CONFIG_FIT_SIGNATURE is activated by removing dumpimage-mkimage-objs udpate and with: - FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o common/image-fit-sig.o + FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o common/image-fit-sig.o lib/fdt-libcrypto.o Regards Patrick
Re: [PATCH v4 1/6] lib: Rename rsa-checksum.c to hash-checksum.c
Hi,
On 1/8/21 8:17 PM, Alexandru Gagniuc wrote:
rsa-checksum.c sontains the hash_calculate() implementations. Despite
the "rsa-" file prefix, this function is useful for other algorithms.
To prevent confusion, move this file to lib/crypto, and rename it to
Today the file is moved in lib and not in lib/crypto...
change the comment or the file location.
hash-checksum.c, to give it a more "generic" feel.
Signed-off-by: Alexandru Gagniuc
---
common/image-fit-sig.c | 2 +-
common/image-sig.c | 2 +-
include/image.h| 2 +-
include/u-boot/{rsa-checksum.h => hash-checksum.h} | 0
lib/Makefile | 1 +
lib/crypto/pkcs7_verify.c | 2 +-
lib/crypto/x509_public_key.c | 2 +-
lib/{rsa/rsa-checksum.c => hash-checksum.c}| 3 ++-
lib/rsa/Makefile | 2 +-
tools/Makefile | 3 ++-
10 files changed, 11 insertions(+), 8 deletions(-)
rename include/u-boot/{rsa-checksum.h => hash-checksum.h} (100%)
rename lib/{rsa/rsa-checksum.c => hash-checksum.c} (96%)
diff --git a/common/image-fit-sig.c b/common/image-fit-sig.c
index 5401d9411b..7fcbb47235 100644
--- a/common/image-fit-sig.c
+++ b/common/image-fit-sig.c
@@ -15,7 +15,7 @@ DECLARE_GLOBAL_DATA_PTR;
#include
#include
#include
-#include
+#include
#define IMAGE_MAX_HASHED_NODES 100
diff --git a/common/image-sig.c b/common/image-sig.c
index f3c209ae8b..21dafe6b91 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
#endif /* !USE_HOSTCC*/
#include
#include
-#include
+#include
#define IMAGE_MAX_HASHED_NODES 100
diff --git a/include/image.h b/include/image.h
index 41473dbb9c..a55b11b3ae 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1258,7 +1258,7 @@ struct image_region {
};
#if IMAGE_ENABLE_VERIFY
-# include
+# include
#endif
struct checksum_algo {
const char *name;
diff --git a/include/u-boot/rsa-checksum.h b/include/u-boot/hash-checksum.h
similarity index 100%
rename from include/u-boot/rsa-checksum.h
rename to include/u-boot/hash-checksum.h
diff --git a/lib/Makefile b/lib/Makefile
index 851a80ef3b..cf64188ba5 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -60,6 +60,7 @@ endif
obj-$(CONFIG_$(SPL_)ACPIGEN) += acpi/
obj-$(CONFIG_$(SPL_)MD5) += md5.o
obj-$(CONFIG_$(SPL_)RSA) += rsa/
+obj-$(CONFIG_FIT_SIGNATURE) += hash-checksum.o
compiled if CONFIG_FIT_SIGNATURE = y
but after used in mkimage even if CONFIG_FIT_SIGNATURE is not used...
(see after dumpimage-mkimage-objs)
it could be more simple to have :
obj-y += hash-checksum.o
or add a new config CONFIG_HASH (but we need to managed dependancy in Kconfig /
Makefile)
(...)
diff --git a/tools/Makefile b/tools/Makefile
index 253a6b9706..b1595ad814 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -67,7 +67,7 @@ LIBFDT_OBJS := $(addprefix libfdt/, fdt.o fdt_ro.o fdt_wip.o
fdt_sw.o fdt_rw.o \
fdt_strerror.o fdt_empty_tree.o fdt_addresses.o fdt_overlay.o)
RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
- rsa-sign.o rsa-verify.o rsa-checksum.o \
+ rsa-sign.o rsa-verify.o \
rsa-mod-exp.o)
AES_OBJS-$(CONFIG_FIT_CIPHER) := $(addprefix lib/aes/, \
@@ -105,6 +105,7 @@ dumpimage-mkimage-objs := aisimage.o \
$(ROCKCHIP_OBS) \
socfpgaimage.o \
lib/crc16.o \
+ lib/hash-checksum.o \
lib/sha1.o \
lib/sha256.o \
lib/sha512.o \
lib/hash-checksum.o is required here...
Regards
Patrick
Re: [PATCH] disk: part_efi: update partition table entries after write
On 1/27/21 7:33 AM, AKASHI Takahiro wrote: On Tue, Jan 26, 2021 at 04:08:13PM +0100, Heinrich Schuchardt wrote: On 26.01.21 14:56, Gary Bisson wrote: Fixes fastboot issues when switching from mbr to gpt partition tables. Signed-off-by: Gary Bisson --- Hi, I hesitated calling this a RFC as I'm not sure everyone will like the idea. Basically the issue encountered was the following: - Device with its storage flashed with a MBR partition table - Run fastboot to flash a new OS (and new partition table) - After flashing a GPT partition table, U-Boot couldn't find any of the partition names from the GPT -> reason is that the partition table entries aren't updated -> so U-Boot still believes it's a MBR table inside and so its parsing fails This commit adds an update of the table entries inside the write_mbr_and_gpt_partitions() function. At first I thought maybe this should be added in fastboot file (fb_mmc.c) but couldn't think of a good reason why this shouldn't happened in part_efi directly. Let me know if you have any questions. Regards, Gary --- disk/part_efi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/disk/part_efi.c b/disk/part_efi.c index 2f922662e6e..7a24e33d189 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -867,6 +867,9 @@ int write_mbr_and_gpt_partitions(struct blk_desc *dev_desc, void *buf) return 1; } + /* Update the partition table entries*/ + part_init(dev_desc); + return 0; } #endif This change is for GPT only. Don't we need the same for MBR partition tables (write_mbr_partitions())? @Simon: Essentially this reflashing is similar to changing media. What I am missing in part_init() is setting a field with a counter to indicate the media change. The EFI_BLOCK_IO_PROTOCOL has a u32 field media_id. Would struct blk_desc be the right place to add such a field. As far as "efi_loader" is concerned, none of partitions on the media, either in case of repartitioning or changing media, will no longer be recognized as a "efi disk" after efi subsystem is initialized. All we can and have to do is to just reboot the system. I think we should take one step further to fixing the issue along with this patch. I have posted a couple of proposals in the past, for example, see [1]. [1] https://lists.denx.de/pipermail/u-boot/2019-January/356499.html We have a deficiency in the UEFI sub-system with adding and removing block devices. But this is not a problem of Gary's patch. So from my side: Reviewed-by: Heinrich Schuchardt
RE: [PATCH 2/4] arch: arm: update Kconfig to select IRQ when GIC_V3_ITS is enabled
Vladimir, > -Original Message- > From: Vladimir Oltean > Sent: Wednesday, January 27, 2021 9:20 PM > To: Wasim Khan (OSS) > Cc: u-boot@lists.denx.de; s...@chromium.org; bmeng...@gmail.com; > mario@gdsys.cc; bharat.go...@broadcom.com; > rayagonda.kokata...@broadcom.com; t-kri...@ti.com; Varun Sethi > ; Wasim Khan > Subject: Re: [PATCH 2/4] arch: arm: update Kconfig to select IRQ when > GIC_V3_ITS is enabled > > Wasim, > > On Tue, Jan 12, 2021 at 10:05:07AM +0100, Wasim Khan wrote: > > From: Wasim Khan > > > > GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select > > IRQ when GIC_V3_ITS is enabled. > > > > Signed-off-by: Wasim Khan > > --- > > While this fixes my U-Boot booting issue on NXP LS1028A-RDB (thank you for > that): > > I'm thinking it would be unwise to apply the patches as-is, since now, > the GIC-v3 ITS driver does bind, but when Linux boots, apparently it now > sees some IRQ storms and dies very quickly in the boot process. Did you > try to boot Linux after these patches? > > On the other hand, the board works just fine with CONFIG_GIC_V3_ITS > disabled. The kontron_sl28_defconfig doesn't even have it. What do we > use the GIC ITS for in U-Boot? > > One boot attempt: > > [1.940732] 000: Unable to handle kernel NULL pointer dereference at > virtual > address Thanks for reporting this. Yes, I tested LX2162aqds and did not face any issue in the limited trials I performed. I agree with you to hold on this series until crash you reported is fixed.
[PATCH 1/2] dt-bindings: pinctrl: at91-pio4: add slew-rate
Document slew-rate DT binding for SAMA7G5. Signed-off-by: Claudiu Beznea --- doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt index 9252dc154e99..6e936a08b6ca 100644 --- a/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt +++ b/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt @@ -25,9 +25,10 @@ ioset settings. Use the macros from boot/dts/-pinfunc.h file to get the right representation of the pin. Optional properties: -- GENERIC_PINCONFIG: generic pinconfig options to use, bias-disable, -bias-pull-down, bias-pull-up, drive-open-drain, input-schmitt-enable, -input-debounce. +- GENERIC_PINCONFIG: generic pinconfig options to use: + - bias-disable, bias-pull-down, bias-pull-up, drive-open-drain, + input-schmitt-enable, input-debounce + - slew-rate: 0 - disabled, 1 - enabled (default) - atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for high drive. The default value is low drive. -- 2.7.4
[PATCH 0/2] pinctrl: at91-pio4: add support for slew-rate
Hi, This series adds support for slew rate on AT91 PIO4 driver. The support is enabled on SAMA7G5. Thank you, Claudiu Beznea Claudiu Beznea (2): dt-bindings: pinctrl: at91-pio4: add slew-rate pinctrl: at91-pio4: add support for slew-rate arch/arm/mach-at91/include/mach/atmel_pio4.h | 1 + .../pinctrl/atmel,at91-pio4-pinctrl.txt| 7 +++--- drivers/pinctrl/pinctrl-at91-pio4.c| 26 +++--- 3 files changed, 28 insertions(+), 6 deletions(-) -- 2.7.4
[PATCH 2/2] pinctrl: at91-pio4: add support for slew-rate
SAMA7G5 supports slew rate configuration. Adapt the driver for this.
For switching frequencies lower than 50MHz the slew rate needs to
be enabled. Since most of the pins on SAMA7G5 fall into this category
enabled the slew rate by default.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/include/mach/atmel_pio4.h | 1 +
drivers/pinctrl/pinctrl-at91-pio4.c | 26 +++---
2 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/atmel_pio4.h
b/arch/arm/mach-at91/include/mach/atmel_pio4.h
index 35ac7b2d40e1..c3bd9140dfef 100644
--- a/arch/arm/mach-at91/include/mach/atmel_pio4.h
+++ b/arch/arm/mach-at91/include/mach/atmel_pio4.h
@@ -44,6 +44,7 @@ struct atmel_pio4_port {
#define ATMEL_PIO_DIR_MASK BIT(8)
#define ATMEL_PIO_PUEN_MASKBIT(9)
#define ATMEL_PIO_PDEN_MASKBIT(10)
+#define ATMEL_PIO_SR BIT(11)
#define ATMEL_PIO_IFEN_MASKBIT(12)
#define ATMEL_PIO_IFSCEN_MASK BIT(13)
#define ATMEL_PIO_OPD_MASK BIT(14)
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c
b/drivers/pinctrl/pinctrl-at91-pio4.c
index 3a5143adc381..5c6ece745ab0 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -24,6 +24,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct atmel_pio4_plat {
struct atmel_pio4_port *reg_base;
+ unsigned int slew_rate_support;
};
static const struct pinconf_param conf_params[] = {
@@ -35,9 +36,11 @@ static const struct pinconf_param conf_params[] = {
{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
{ "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
{ "atmel,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
+ { "slew-rate", PIN_CONFIG_SLEW_RATE, 0},
};
-static u32 atmel_pinctrl_get_pinconf(struct udevice *config)
+static u32 atmel_pinctrl_get_pinconf(struct udevice *config,
+struct atmel_pio4_plat *plat)
{
const struct pinconf_param *params;
u32 param, arg, conf = 0;
@@ -52,6 +55,10 @@ static u32 atmel_pinctrl_get_pinconf(struct udevice *config)
param = params->param;
arg = params->default_value;
+ /* Keep slew rate enabled by default. */
+ if (plat->slew_rate_support)
+ conf |= ATMEL_PIO_SR;
+
switch (param) {
case PIN_CONFIG_BIAS_DISABLE:
conf &= (~ATMEL_PIO_PUEN_MASK);
@@ -90,6 +97,15 @@ static u32 atmel_pinctrl_get_pinconf(struct udevice *config)
conf |= (val << ATMEL_PIO_DRVSTR_OFFSET)
& ATMEL_PIO_DRVSTR_MASK;
break;
+ case PIN_CONFIG_SLEW_RATE:
+ if (!plat->slew_rate_support)
+ break;
+
+ dev_read_u32(config, params->property, &val);
+ /* And disable it if requested. */
+ if (val == 0)
+ conf &= ~ATMEL_PIO_SR;
+ break;
default:
printf("%s: Unsupported configuration parameter: %u\n",
__func__, param);
@@ -115,6 +131,7 @@ static inline struct atmel_pio4_port
*atmel_pio4_bank_base(struct udevice *dev,
static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)
{
+ struct atmel_pio4_plat *plat = dev_get_plat(dev);
struct atmel_pio4_port *bank_base;
const void *blob = gd->fdt_blob;
int node = dev_of_offset(config);
@@ -123,7 +140,7 @@ static int atmel_pinctrl_set_state(struct udevice *dev,
struct udevice *config)
u32 i, conf;
int count;
- conf = atmel_pinctrl_get_pinconf(config);
+ conf = atmel_pinctrl_get_pinconf(config, plat);
count = fdtdec_get_int_array_count(blob, node, "pinmux",
cells, ARRAY_SIZE(cells));
@@ -163,6 +180,7 @@ const struct pinctrl_ops atmel_pinctrl_ops = {
static int atmel_pinctrl_probe(struct udevice *dev)
{
struct atmel_pio4_plat *plat = dev_get_plat(dev);
+ ulong priv = dev_get_driver_data(dev);
fdt_addr_t addr_base;
dev = dev_get_parent(dev);
@@ -171,13 +189,15 @@ static int atmel_pinctrl_probe(struct udevice *dev)
return -EINVAL;
plat->reg_base = (struct atmel_pio4_port *)addr_base;
+ plat->slew_rate_support = priv;
return 0;
}
static const struct udevice_id atmel_pinctrl_match[] = {
{ .compatible = "atmel,sama5d2-pinctrl" },
- { .compatible = "microchip,sama7g5-pinctrl" },
+ { .compatible = "microchip,sama7g5-pinctrl",
+ .data = (ulong)1, },
{}
};
--
2.7.4
Re: [PATCH v2 0/4] fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT
Hi Patrick,
I believe that the first two patches in this series can be replicated
with [1]. For example, if you currently use FASTBOOT_MMC_BOOT_SUPPORT
with FASTBOOT_MMC_BOOT1_NAME set to "mmc0boot1", leading to commands
like
$ fastboot erase mmc0boot1
You could instead do
$ fastboot erase 0.1:0
And the first behavior could be emulated by setting the environmental
variable "fastboot_partition_alias_mmc0boot1" to "0.1:0".
I would like to work towards deprecating Kconfigs for achieving this
particular use case. This is because everything is set at compile-time,
but we have existing tools which make this easy to do at run-time.
Favoring run-time configuration makes it easier to use one U-Boot for
different boards, and also makes it easier for users to modify U-Boot.
For the latter two patches, I think there are two existing solutions.
First, there is the patch to add "ucmd" support to fastboot. This allows
running arbitrary commands on the U-Boot side. However, this may be
unsuitable for systems which need to maintain a chain of trust (since
allowing arbitrary commands would allow arbitrary software to run).
With this in mind, FIT images allow for script sections. For example,
one could create an image tree source file like
/dts-v1/;
/ {
description = "Configuration script";
#address-cells = <1>;
images {
default = "script-1";
script-1 {
data = /incbin/("mmc.scr");
type = "script";
compression = "none";
signature {
algo = "sha1,rsa2048";
key-name-hint = "dev";
};
};
};
};
(or something similar; I haven't tested this). This would create a fit
with containing "mmc.scr". On the U-Boot side, running
fastboot 0
source
Would source any script contained within the FIT image (if it was
downloaded e.g. with "fastboot boot mmc.itb". I think this process would
work well for "run once" scripts like setting the mmc boot partitions.
Please let me know if any of the above suggestions would achieve the
functionality you need.
--Sean
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=223198
[2]
https://patchwork.ozlabs.org/project/uboot/patch/2021001919.228555-1...@denx.de/
On 1/27/21 8:46 AM, Patrick Delaunay wrote:
Hi,
It is a rebased V2 version of the serie [1].
This serie adds a lot of new #if and doesn't respect the last
U-Boot coding rules with 14 warnings detected by checkpatch:
warning: Use 'if (IS_ENABLED(CONFIG...))'
instead of '#if or #ifdef' where possible
But I chose to copy the existing code of the fastboot files
fb_command.c to a have an easier review.
So I prefer sent a patch (if it is required) to remove all the
#ifdef in this file when the serie will be accepted.
I check compilation of the added features on stm32mp1 platform
with the serie [2].
The compilation for modified boards (with already activated config
CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT) is verified with buildman:
tools/buildman/buildman mt8512_bm1_emmc mt8518_ap1_emmc pumpkin
Building current source for 3 boards (3 threads, 4 jobs per thread)
aarch64: w+ pumpkin
+= WARNING ==
+This board does not use CONFIG_DM_ETH (Driver Model
+for Ethernet drivers). Please update the board to use
+CONFIG_DM_ETH before the v2020.07 release. Failure to
+update by the deadline may result in board removal.
+See doc/driver-model/migration.rst for more info.
+
aarch64: w+ mt8518_ap1_emmc
+= WARNING ==
+This board does not use CONFIG_DM_ETH (Driver Model
+for Ethernet drivers). Please update the board to use
+CONFIG_DM_ETH before the v2020.07 release. Failure to
+update by the deadline may result in board removal.
+See doc/driver-model/migration.rst for more info.
+
aarch64: w+ mt8512_bm1_emmc
+= WARNING ==
+This board does not use CONFIG_DM_ETH (Driver Model
+for Ethernet drivers). Please update the board to use
+CONFIG_DM_ETH before the v2020.07 release. Failure to
+update by the deadline may result in board removal.
+See doc/driver-model/migration.rst for more info.
+
030 /3 0:00:07 : mt8512_bm1_emmc
Completed: 3 total built, duration 0:00:23, rate 0.13
[1] "fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT"
http://patchwork.ozlabs.org/project/uboot/list/?series=200509&state=*
[2] "configs: stm32mp1: enable fastboot support of eMMC boot partition"
http://patchwork.ozlabs.org/project/uboot/list/?series=200510
Regards
Patrick
Changes in v2:
- rebase on master branch
- new impact on pumpkin_defconfig and mt8512_bm1_emmc_
[PATCH] arm: mvebu: Espressobin: Set the maximum slave SPI speed to 40MHz
From: Konstantin Porotchkin While the SPI controller speed is defined by DTS, the maximum slave speed (connected devices) is limited by the pre-defined configuration value CONFIG_SF_DEFAULT_SPEED to 1MHz This patch increases this maximum SPI slave device speed to 40MHz Change-Id: I0d1239bd8a2061c66725c2c227c1e1f49c92c29e Signed-off-by: Konstantin Porotchkin Reviewed-on: http://vgitil04.il.marvell.com:8080/59516 Tested-by: iSoC Platform CI Reviewed-by: Igal Liberman [pali: Set CONFIG_SF_DEFAULT_SPEED via defconfig] Signed-off-by: Pali Rohár --- configs/mvebu_espressobin-88f3720_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 8a859cba2e..4956199ccd 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -54,6 +54,7 @@ CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_XENON=y CONFIG_MTD=y CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=4000 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y -- 2.20.1
Please pull u-boot-marvell/master
Hi Tom, please pull the first batch of Marvell MVEBU related patches. Here the summary log: - Espressobin: Disable slot when emmc is not present (Pali) - DS414; config header cleanup (Phil) - PCI: auto-config enhancement (Phil) - pci_mvebu: Also map IO region (Phil) - serial: a3720: Implement pending method for output direction (Pali) - turris_mox: Enable a few commands (Marek) - helios4 & ClearFog changes (Dennis) - Plus some minor misc changes Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=68&view=results Thanks, Stefan The following changes since commit e262b2973e22174da666038514d17f0f7171466b: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi (2021-01-25 19:46:02 -0500) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to 177cecdc4edcda5881cf217e21568d921b630bf5: arm: mvebu: turris_mox: enable setexpr command in defconfig (2021-01-27 13:12:51 +0100) Dennis Gilmore (4): ARM: Distro boot: document the need for fdtfile variable to be set ARM: mvebu: helios4 adjust env sizes to enable SPI to work ARM: mvebu: helios4 dts changes to enable SPI ARM: mvebu: ClearFog make sure that SATA and UART images are buildable Harm Berntsen (1): gpio: Add support for DM GPIO for Kirkwood Marek Behún (2): arm: mvebu: turris_mox: enable wdt command in defconfig arm: mvebu: turris_mox: enable setexpr command in defconfig Pali Rohár (3): arm: mvebu: Espressobin: Disable slot when emmc is not present serial: a3720: Implement pending method for output direction arm64: a37xx: pci: Fix printing debug messages Phil Sutter (3): arm: mvebu: ds414: Config header mini-review pci: Make auto-config code a little more robust pci: pci_mvebu: Define an IO region as well arch/arm/dts/armada-388-helios4-u-boot.dtsi | 23 +-- arch/arm/dts/armada-388-helios4.dts | 14 +- arch/arm/mach-mvebu/Kconfig | 1 + board/Marvell/mvebu_armada-37xx/board.c | 15 --- board/kobol/helios4/Kconfig | 24 board/solidrun/clearfog/Kconfig | 4 ++-- configs/helios4_defconfig | 2 -- configs/turris_mox_defconfig| 3 ++- doc/README.distro | 11 +++ drivers/gpio/Kconfig| 2 +- drivers/mmc/xenon_sdhci.c | 19 +++ drivers/pci/pci-aardvark.c | 5 ++--- drivers/pci/pci_auto.c | 9 + drivers/pci/pci_mvebu.c | 28 +++- drivers/serial/serial_mvebu_a3700.c | 10 -- include/configs/ds414.h | 21 +++-- 16 files changed, 143 insertions(+), 48 deletions(-) create mode 100644 board/kobol/helios4/Kconfig
[PATCH] spi: imx: Implement set_speed
The set_speed() callback should configure the bus speed, make it so.
Signed-off-by: Marek Vasut
Cc: Jagan Teki
Cc: Stefano Babic
---
drivers/spi/mxc_spi.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 553a0315df5..47100d89aef 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -661,7 +661,10 @@ static int mxc_spi_release_bus(struct udevice *dev)
static int mxc_spi_set_speed(struct udevice *bus, uint speed)
{
- /* Nothing to do */
+ struct mxc_spi_slave *mxcs = dev_get_platdata(bus);
+
+ mxcs->max_hz = speed;
+
return 0;
}
--
2.29.2
[PATCH] version: Move version_string[] from version.h to version_string.h
More C files do not use compile time timestamp macros and do not have to be
recompiled every time when SOURCE_DATE_EPOCH changes.
This patch moves version_string[] from version.h to version_string.h and
updates other C files which only needs version_string[] string to include
version_string.h instead of version.h. After applying this patch these
files are not recompiled every time when SOURCE_DATE_EPOCH changes.
Signed-off-by: Pali Rohár
---
board/ge/b1x5v2/b1x5v2.c| 2 +-
board/ge/bx50v3/bx50v3.c| 2 +-
board/ge/mx53ppd/mx53ppd.c | 2 +-
cmd/version.c | 1 +
common/main.c | 2 +-
drivers/video/cfb_console.c | 3 +--
include/version.h | 3 ---
include/version_string.h| 8
lib/display_options.c | 2 +-
test/print_ut.c | 2 +-
10 files changed, 16 insertions(+), 11 deletions(-)
create mode 100644 include/version_string.h
diff --git a/board/ge/b1x5v2/b1x5v2.c b/board/ge/b1x5v2/b1x5v2.c
index 1cb347fd9e..18ba5c9e71 100644
--- a/board/ge/b1x5v2/b1x5v2.c
+++ b/board/ge/b1x5v2/b1x5v2.c
@@ -29,7 +29,7 @@
#include
#include
#include
-#include
+#include
#include "../common/vpd_reader.h"
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 3ea9425fd1..faad9cef72 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -32,7 +32,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include "../common/ge_rtc.h"
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index ef689733c4..9a76cdc388 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -32,7 +32,7 @@
#include
#include
#include
-#include
+#include
#include
#include "ppd_gpio.h"
#include
diff --git a/cmd/version.c b/cmd/version.c
index 3686b87332..b183cc8b63 100644
--- a/cmd/version.c
+++ b/cmd/version.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_SYS_COREBOOT
#include
diff --git a/common/main.c b/common/main.c
index ae5bcdb32f..3f5214fd44 100644
--- a/common/main.c
+++ b/common/main.c
@@ -15,7 +15,7 @@
#include
#include
#include
-#include
+#include
#include
static void run_preboot_environment_command(void)
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 3f07f4eb29..1a471ce07b 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -71,7 +71,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
@@ -121,7 +121,6 @@
* Console device
*/
-#include
#include
#include
#include
diff --git a/include/version.h b/include/version.h
index 2d24451569..0a3b29adb8 100644
--- a/include/version.h
+++ b/include/version.h
@@ -16,7 +16,4 @@
#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
-#ifndef __ASSEMBLY__
-extern const char version_string[];
-#endif /* __ASSEMBLY__ */
#endif /* __VERSION_H__ */
diff --git a/include/version_string.h b/include/version_string.h
new file mode 100644
index 00..a89a6e4370
--- /dev/null
+++ b/include/version_string.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef__VERSION_STRING_H__
+#define__VERSION_STRING_H__
+
+extern const char version_string[];
+
+#endif /* __VERSION_STRING_H__ */
diff --git a/lib/display_options.c b/lib/display_options.c
index b2025eeb5c..1b069761f8 100644
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -8,7 +8,7 @@
#include
#include
#include
-#include
+#include
#include
#include
diff --git a/test/print_ut.c b/test/print_ut.c
index a456a449ef..ae1cf85f1c 100644
--- a/test/print_ut.c
+++ b/test/print_ut.c
@@ -12,7 +12,7 @@
#endif
#include
#include
-#include
+#include
#define FAKE_BUILD_TAG "jenkins-u-boot-denx_uboot_dm-master-build-aarch64" \
"and a lot more text to come"
--
2.20.1
Re: [PATCH 2/4] arch: arm: update Kconfig to select IRQ when GIC_V3_ITS is enabled
Wasim, On Tue, Jan 12, 2021 at 10:05:07AM +0100, Wasim Khan wrote: > From: Wasim Khan > > GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select > IRQ when GIC_V3_ITS is enabled. > > Signed-off-by: Wasim Khan > --- While this fixes my U-Boot booting issue on NXP LS1028A-RDB (thank you for that): U-Boot 2021.01 (Jan 27 2021 - 17:40:36 +0200) SoC: LS1028AE Rev1.0 (0x870b0010) Clock Configuration: CPU0(A72):1300 MHz CPU1(A72):1300 MHz Bus: 400 MHz DDR: 1600 MT/s Reset Configuration Word (RCW): : 34004010 0030 0010: 00b9 0030c000 0020: 01e03150 2580 3296 0030: 0008 0040: 0050: 0060: 200e705a 0070: bb58 Model: NXP Layerscape 1028a RDB Board Board: LS1028AE Rev1.0-RDB, Version: A, boot from SD FPGA: v8 (RDB) SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz DRAM: 3.9 GiB DDR3.9 GiB (DDR4, 32-bit, CL=11, ECC on) Error binding driver 'gic-v3': -96 Some drivers failed to bind initcall sequence fbdcc328 failed at call 8201a174 (err=-96) ### ERROR ### Please RESET the board ### I'm thinking it would be unwise to apply the patches as-is, since now, the GIC-v3 ITS driver does bind, but when Linux boots, apparently it now sees some IRQ storms and dies very quickly in the boot process. Did you try to boot Linux after these patches? On the other hand, the board works just fine with CONFIG_GIC_V3_ITS disabled. The kontron_sl28_defconfig doesn't even have it. What do we use the GIC ITS for in U-Boot? One boot attempt: [1.940732] 000: Unable to handle kernel NULL pointer dereference at virtual address [1.949998] 000: Mem abort info: [1.953229] 000: ESR = 0x8604 [1.956726] 000: EC = 0x21: IABT (current EL), IL = 32 bits [1.962490] 000: SET = 0, FnV = 0 [1.965987] 000: EA = 0, S1PTW = 0 [1.969567] 000: [] user address but active_mm is swapper [1.976377] 000: Internal error: Oops: 8604 [#1] PREEMPT_RT SMP [1.982662] 000: Modules linked in: [1.986154] 000: [1.988078] 000: CPU: 0 PID: 156 Comm: irq/121-ptp_qor Not tainted 5.4.3-rt1-00870-g12d35e436edf #126 [1.997330] 000: Hardware name: LS1028A RDB Board (DT) [2.002479] 000: pstate: 4005 (nZcv daif -PAN -UAO) [2.007716] 000: pc : 0x0 [2.010339] 000: lr : ptp_qoriq_isr+0x48/0x1c0 [2.014799] 000: sp : 800010aebd60 [2.018554] 000: x29: 800010aebd60 [2.022396] 000: x28: [2.026237] 000: [2.028160] 000: x27: 0020799bb6b0 [2.032001] 000: x26: d45f45338000 [2.035842] 000: [2.037765] 000: x25: d45f47369000 [2.041605] 000: x24: 0004 [2.045445] 000: [2.047368] 000: x23: 0020799bb228 [2.051208] 000: x22: 0020799bb600 [2.055048] 000: [2.056970] 000: x21: d45f47369000 [2.060811] 000: x20: 0020799bb600 [2.064651] 000: [2.066573] 000: x19: 0020799bb200 [2.070414] 000: x18: [2.074254] 000: [2.076176] 000: x17: 0007 [2.080017] 000: x16: 0001 [2.083858] 000: [2.085779] 000: x15: d45f47369948 [2.089621] 000: x14: [2.093462] 000: [2.095384] 000: x13: 0004 [2.099225] 000: x12: 0004 [2.103066] 000: [2.104988] 000: x11: 0001 [2.108830] 000: x10: [2.112671] 000: [2.114593] 000: x9 : 00207a978e00 [2.118435] 000: x8 : [2.122276] 000: [2.124198] 000: x7 : [2.128040] 000: x6 : [2.131880] 000: [2.133802] 000: x5 : 0001 [2.137643] 000: x4 : [2.141484] 000: [2.143406] 000: x3 : 0020799bb240 [2.147248] 000: x2 : [2.151088] 000: [2.153010] 000: x1 : [2.156852] 000: x0 : 0004 [2.160691] 000: [2.162614] 000: Call trace: [2.165497] 000: 0x0 [2.167769] 000: irq_forced_thread_fn+0x38/0xb8 [2.172404] 000: irq_thread+0x14c/0x248 [2.176333] 000: kthread+0x118/0x120 [2.180003] 000: ret_from_fork+0x10/0x18 [2.184024] 000: Code: bad PC value [2.187518] 000: ---[ end trace 0001 ]--- [2.192591] 000: genirq: exiting task "irq/121-ptp_qor" (156) is an active IRQ thread (irq 121) [2.201366] 000: ptp_qoriq: device tree node missing required elements, try automatic configuration [2.210630] 000: pps pps0: new PPS source ptp0 [2.215470] 000: hclge is initializing [2.219241] 000: hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version [2.226928] 000: hns3: Copyright (c) 2017 Huawei
[PATCH] fastboot: reinit partition after storing GPT or MBR
In case MMC has MBR system and fastboot writes GPT,
MMC is still recognized as MBR.
Invoke part_init() to purge cached data and update
information about partition table type.
Signed-off-by: Roman Stratiienko
---
CC: Lukasz Majewski ,
CC: Patrick Delaunay ,
CC: Fabien Parent ,
CC: Filip Brozovic ,
CC: Lokesh Vutla ,
CC: Marek Szyprowski ,
CC: Mingming lee ,
CC: Roman Kovalivskyi ,
CC: Sam Protsenko ,
CC: Simon Glass ,
---
drivers/fastboot/fb_mmc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c
index 4e26cef9417..0ad11600ef6 100644
--- a/drivers/fastboot/fb_mmc.c
+++ b/drivers/fastboot/fb_mmc.c
@@ -493,6 +493,7 @@ void fastboot_mmc_flash_write(const char *cmd, void
*download_buffer,
response);
return;
}
+ part_init(dev_desc);
printf(" success\n");
fastboot_okay(NULL, response);
return;
@@ -514,6 +515,7 @@ void fastboot_mmc_flash_write(const char *cmd, void
*download_buffer,
response);
return;
}
+ part_init(dev_desc);
printf(" success\n");
fastboot_okay(NULL, response);
return;
--
2.27.0
Re: [PATCH 2/4] arch: arm: update Kconfig to select IRQ when GIC_V3_ITS is enabled
On Tue, Jan 12, 2021 at 10:05:07AM +0100, Wasim Khan wrote: > From: Wasim Khan > > GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select > IRQ when GIC_V3_ITS is enabled. > > Signed-off-by: Wasim Khan > --- Tested-by: Vladimir Oltean
Re: [PATCH 1/4] misc: make CONFIG_IRQ selectable for all platforms
On Tue, Jan 12, 2021 at 10:05:06AM +0100, Wasim Khan wrote: > From: Wasim Khan > > UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ > selectable for all platfroms. > > Signed-off-by: Wasim Khan > --- Tested-by: Vladimir Oltean
[PATCH] tools: Remove #include
Header file version.h includes also autogenerated file timestamp.h which is recompiled on every time when SOURCE_DATE_EPOCH change. Tools do not use build time therefore they do not have to include timestamp.h file. This change prevents recompiling tools every time when SOURCE_DATE_EPOCH changes. Signed-off-by: Pali Rohár --- tools/dumpimage.c | 2 +- tools/mkenvimage.c | 2 +- tools/mkimage.c| 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/dumpimage.c b/tools/dumpimage.c index e5481435a7..54c2517c9e 100644 --- a/tools/dumpimage.c +++ b/tools/dumpimage.c @@ -7,7 +7,7 @@ #include "dumpimage.h" #include -#include +#include "generated/version_autogenerated.h" static void usage(void); diff --git a/tools/mkenvimage.c b/tools/mkenvimage.c index b05f83415f..6482ca6ee9 100644 --- a/tools/mkenvimage.c +++ b/tools/mkenvimage.c @@ -23,7 +23,7 @@ #include "compiler.h" #include -#include +#include "generated/version_autogenerated.h" #define CRC_SIZE sizeof(uint32_t) diff --git a/tools/mkimage.c b/tools/mkimage.c index 68d5206cb4..d5e274c504 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -11,7 +11,7 @@ #include "mkimage.h" #include "imximage.h" #include -#include +#include "generated/version_autogenerated.h" static void copy_file(int, const char *, int); -- 2.20.1
[PATCH] arm: Remove #include from armv8/fwcall.c
No version information is used in armv8/fwcall.c therefore do not include version.h header file. This change prevents recompiling fwcall.o when SOURCE_DATE_EPOCH changes. Signed-off-by: Pali Rohár --- arch/arm/cpu/armv8/fwcall.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c index b29bc30fc2..16914dc1ee 100644 --- a/arch/arm/cpu/armv8/fwcall.c +++ b/arch/arm/cpu/armv8/fwcall.c @@ -7,7 +7,6 @@ #include #include -#include #include #include #include -- 2.20.1
Re: [Uboot-stm32] [PATCH 4/4] mtd: spinand: Add WATCHDOG_RESET() in spinand_mtd_read/write()
Hi,
On 1/20/21 2:42 PM, Patrice Chotard wrote:
In case of big area read/write on spi nand, watchdog timeout may occurs.
To fix that, add WATCHDOG_RESET() in spinand_mtd_read() and
spinand_mtd_write() to ensure that watchdog is reset.
Signed-off-by: Patrice Chotard
---
drivers/mtd/nand/spi/core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index cb8ffa3fa9..7f54422c93 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
#include
#endif
@@ -574,6 +575,7 @@ static int spinand_mtd_read(struct mtd_info *mtd, loff_t from,
#endif
nanddev_io_for_each_page(nand, from, ops, &iter) {
+ WATCHDOG_RESET();
ret = spinand_select_target(spinand, iter.req.pos.target);
if (ret)
break;
@@ -625,6 +627,7 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t
to,
#endif
nanddev_io_for_each_page(nand, to, ops, &iter) {
+ WATCHDOG_RESET();
ret = spinand_select_target(spinand, iter.req.pos.target);
if (ret)
break;
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH v2 27/28] fs/squashfs: sqfs_read: fragmented files are not supported
Hi Joao, On Wed, 25 Nov 2020 at 01:58, Richard Genoud wrote: > > Hi, > > Le 20/11/2020 à 02:35, Tom Rini a écrit : > > On Tue, Nov 03, 2020 at 12:11:25PM +0100, Richard Genoud wrote: > > > >> The code for reading a fragmented file is not functionnal. > >> It's better to signal this to the user. > >> > >> Signed-off-by: Richard Genoud > > > > This change causes the test.py squashfs tests to fail. I am unsure if > > the problem is with the tests or this exposing further problems in the > > code. > Actually, reading a fragmented file doesn't work. > The test only check if the file is read, but not it's content. > > With this following patch, we'll see that the file content is not the same : > > > From 68f87301c059aaae8e90e42fbec9b560aee0c6eb Mon Sep 17 00:00:00 2001 > From: Richard Genoud > Date: Tue, 24 Nov 2020 17:45:07 +0100 > Subject: [PATCH] test/py: SquashFS: Check if loaded file is corrupted > > After loading the file in memory, its content should be checked for > errors. > > Signed-off-by: Richard Genoud > --- > test/py/tests/test_fs/test_squashfs/sqfs_common.py| 5 - > test/py/tests/test_fs/test_squashfs/test_sqfs_load.py | 6 +- > 2 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/test/py/tests/test_fs/test_squashfs/sqfs_common.py > b/test/py/tests/test_fs/test_squashfs/sqfs_common.py > index c96f92c1d8f..a7673c73762 100644 > --- a/test/py/tests/test_fs/test_squashfs/sqfs_common.py > +++ b/test/py/tests/test_fs/test_squashfs/sqfs_common.py This test works the first time I run it but fails the second time, since the directory already exists. This makes it necessary to disable the test for development. It also uses the wrong quoting style - we have settled on a single quote by default in U-Boot. Finally, the tests and some functions need comments about what they do and what the arguments are. Please can you take a look? Thanks, Simon
Re: [Uboot-stm32] [PATCH 3/4] mtd: nand: Add WATCHDOG_RESET() in nanddev_mtd_erase()
Hi Patrice,
On 1/20/21 2:42 PM, Patrice Chotard wrote:
In case of big area erased on nand, watchdog timeout may occurs.
To fix that, add WATCHDOG_RESET() in nanddev_mtd_erase() to ensure that
watchdog is reset.
Signed-off-by: Patrice Chotard
---
drivers/mtd/nand/core.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c
index 3abaef23c5..ec11bf44f8 100644
--- a/drivers/mtd/nand/core.c
+++ b/drivers/mtd/nand/core.c
@@ -10,6 +10,7 @@
#define pr_fmt(fmt) "nand: " fmt
#include
+#include
#ifndef __UBOOT__
#include
#endif
@@ -162,6 +163,7 @@ int nanddev_mtd_erase(struct mtd_info *mtd, struct
erase_info *einfo)
nanddev_offs_to_pos(nand, einfo->addr, &pos);
nanddev_offs_to_pos(nand, einfo->addr + einfo->len - 1, &last);
while (nanddev_pos_cmp(&pos, &last) <= 0) {
+ WATCHDOG_RESET();
ret = nanddev_erase(nand, &pos);
if (ret) {
einfo->fail_addr = nanddev_pos_to_offs(nand, &pos);
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [Uboot-stm32] [PATCH 2/4] spi: stm32_qspi: Add WATCHDOG_RESET in _stm32_qspi_read_fifo()
Hi Patrice
On 1/20/21 2:42 PM, Patrice Chotard wrote:
In case of reading large area and memory-map mode is misconfigured
(memory-map size declared lower than the real size of the memory chip)
watchdog can be triggered.
Add WATCHDOG_RESET() in _stm32_qspi_read_fifo to fix it.
Issue reproduced with stm32mp157c-ev1 board and memory map size set to
1, with following command:
sf read 0xC000 0 0x400
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 958c394a1a..c3da17f991 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -163,6 +164,7 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv
*priv,
static void _stm32_qspi_read_fifo(u8 *val, void __iomem *addr)
{
*val = readb(addr);
+ WATCHDOG_RESET();
}
static void _stm32_qspi_write_fifo(u8 *val, void __iomem *addr)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [Uboot-stm32] [PATCH 1/4] mtd: spi-nor: Add WATCHDOG_RESET() in spi_nor_core callbacks
Hi Patrice,
On 1/20/21 2:42 PM, Patrice Chotard wrote:
In case of big area write/erase on spi nor, watchdog timeout may occurs.
Issue reproduced on stm32mp157c-ev1 with following commands:
sf write 0xC000 0 0x300
or
sf erase 0 0x100
Signed-off-by: Patrice Chotard
---
drivers/mtd/spi/spi-nor-core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index eb49a6c11c..51e0613d4c 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -10,6 +10,7 @@
*/
#include
+#include
#include
#include
#include
@@ -557,6 +558,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct
erase_info *instr)
len = instr->len;
while (len) {
+ WATCHDOG_RESET();
#ifdef CONFIG_SPI_FLASH_BAR
ret = write_bar(nor, addr);
if (ret < 0)
@@ -1235,6 +1237,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to,
size_t len,
for (i = 0; i < len; ) {
ssize_t written;
loff_t addr = to + i;
+ WATCHDOG_RESET();
/*
* If page_size is a power of two, the offset can be quickly
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH] cmd: fdt: skip board specific fixup using env variable
On Wed, Jan 27, 2021 at 02:09:48PM +0100, Wasim Khan wrote: > From: Wasim Khan > > Sometimes it is useful to boot OS with already fixed-up > device tree. Check for env variable 'skip_board_fixup' > before calling ft_board_setup(). > Current behaviour is unchanged, additionally user can > set skip_board_fixup to 1 to skip the fixup. > > Signed-off-by: Wasim Khan > --- > common/image-fdt.c | 17 - > 1 file changed, 12 insertions(+), 5 deletions(-) Can you provide a specific example or two here? Thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/2] pinctrl: stmfx: Use PINNAME_SIZE for pin's name size
Hi Patrice, On 1/20/21 1:43 PM, Patrice Chotard wrote: Instead of redefining a pin's name size, use PINNAME_SIZE defined in include/dm/pinctrl.h Signed-off-by: Patrice Chotard --- drivers/pinctrl/pinctrl-stmfx.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH 1/2] pinctrl: stmfx: Fix pin configuration issue
Hi Patrice,
On 1/20/21 1:43 PM, Patrice Chotard wrote:
pin-controller pin's name must be equal to pin's name used in device
tree with "pins" DT property.
Issue detected on stm32mp157c-ev1 board with goodix touchscreen.
In DT, the goodix's pin is declared in DT with the node:
goodix_pins: goodix {
pins = "gpio14";
bias-pull-down;
};
Whereas in stmfx pin-controller driver, pin's name are equal to
"stmfx_gpioxx" where xx is the pin number.
This lead to not configure stmfx's pins at probe because pins is
identified by its name (see pinctrl_pin_name_to_selector() in
pinctrl-generic.c) and stmfx pin "gpio14" can't be found.
To fix this issue, come back to the original stmfx pin's name.
Revert "pinctrl: stmfx: update pin name"
This reverts commit 38d30cdcd65c73eeefac5efa328ad444a53b77dd.
Signed-off-by: Patrice Chotard
Tested-by: Patrick DELAUNAY
---
drivers/pinctrl/pinctrl-stmfx.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH] fs: btrfs: Select SHA256 in Kconfig
On Wed, 27 Jan 2021 14:47:58 +0100 David Sterba wrote: > If it's a series then please mention u-boot in the cover letter, no need > to change the patches, I'll go check CC if I'm too confused about the > patch. I would suggest using subject prefix [PATCH u-boot]
Re: [PATCH] fs: btrfs: Select SHA256 in Kconfig
On Wed, Jan 27, 2021 at 08:14:31PM +0800, Qu Wenruo wrote:
>
>
> On 2021/1/27 下午8:01, David Sterba wrote:
> > On Wed, Jan 27, 2021 at 10:42:30AM +0100, matthias@kernel.org wrote:
> >> From: Matthias Brugger
> >>
> >> Since commit 565a4147d17a ("fs: btrfs: Add more checksum algorithms")
> >> btrfs uses the sha256 checksum algorithm. But Kconfig lacks to select
> >> it. This leads to compilation errors:
> >> fs/built-in.o: In function `hash_sha256':
> >> fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts'
> >> fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update'
> >> fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish'
> >>
> >> Signed-off-by: Matthias Brugger
> >
> > So this is a fix for u-boot, got me confused and not for the first time
> > as there's Kconfig and the same fs/btrfs/ directory structure.
> >
> Well, sometimes too unified file structure/code base can also be a problem.
>
> Considering I'm also going to continue cross-porting more code to
> U-boot, any recommendation on this?
> Using different prefix?
If it's a series then please mention u-boot in the cover letter, no need
to change the patches, I'll go check CC if I'm too confused about the
patch.
[PATCH v2 2/4] fastboot: mmc: extend flash/erase for both emmc hwpart 1 and 2
Update the code and the configs for eMMC boot and userdata
partitions acces
- FASTBOOT_MMC_BOOT_SUPPORT: boot partition 1 and 2 (erase/write)
- FASTBOOT_MMC_BOOT1_NAME: boot partition 1, default name="mmc0boot0"
- FASTBOOT_MMC_BOOT2_NAME: boot partition 2, default name="mmc0boot1"
This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.
Signed-off-by: Patrick Delaunay
---
Changes in v2:
- new impact on pumpkin_defconfig and mt8512_bm1_emmc_defconfig
configs/mt8512_bm1_emmc_defconfig | 2 +-
configs/mt8518_ap1_emmc_defconfig | 2 +-
configs/pumpkin_defconfig | 2 +-
drivers/fastboot/Kconfig | 26 -
drivers/fastboot/fb_mmc.c | 47 ---
5 files changed, 52 insertions(+), 27 deletions(-)
diff --git a/configs/mt8512_bm1_emmc_defconfig
b/configs/mt8512_bm1_emmc_defconfig
index 1bda45c5d2..d8e0e86c10 100644
--- a/configs/mt8512_bm1_emmc_defconfig
+++ b/configs/mt8512_bm1_emmc_defconfig
@@ -28,7 +28,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x5600
CONFIG_FASTBOOT_BUF_SIZE=0x1e0
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT=y
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
CONFIG_DM_MMC=y
CONFIG_MMC_HS200_SUPPORT=y
diff --git a/configs/mt8518_ap1_emmc_defconfig
b/configs/mt8518_ap1_emmc_defconfig
index d5fb0ccd48..2c760c1591 100644
--- a/configs/mt8518_ap1_emmc_defconfig
+++ b/configs/mt8518_ap1_emmc_defconfig
@@ -24,7 +24,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x5600
CONFIG_FASTBOOT_BUF_SIZE=0x1E0
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT=y
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
CONFIG_DM_MMC=y
CONFIG_MMC_HS200_SUPPORT=y
diff --git a/configs/pumpkin_defconfig b/configs/pumpkin_defconfig
index a9655f5abb..5270ec28cb 100644
--- a/configs/pumpkin_defconfig
+++ b/configs/pumpkin_defconfig
@@ -52,7 +52,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x4d00
CONFIG_FASTBOOT_BUF_SIZE=0x400
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT=y
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
# CONFIG_INPUT is not set
CONFIG_DM_MMC=y
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index cb8425685f..ef57290876 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -104,18 +104,19 @@ config FASTBOOT_FLASH_NAND_TRIMFFS
When flashing NAND enable the DROP_FFS flag to drop trailing all-0xff
pages.
-config FASTBOOT_MMC_BOOT1_SUPPORT
- bool "Enable EMMC_BOOT1 flash/erase"
- depends on FASTBOOT_FLASH_MMC && EFI_PARTITION && ARCH_MEDIATEK
+config FASTBOOT_MMC_BOOT_SUPPORT
+ bool "Enable EMMC_BOOT flash/erase"
+ depends on FASTBOOT_FLASH_MMC
help
The fastboot "flash" and "erase" commands normally does operations
- on EMMC userdata. Define this to enable the special commands to
- flash/erase EMMC_BOOT1.
- The default target name for updating EMMC_BOOT1 is "mmc0boot0".
+ on eMMC userdata. Define this to enable the special commands to
+ flash/erase eMMC boot partition.
+ The default target name for updating eMMC boot partition 1/2 is
+ CONFIG_FASTBOOT_MMC_BOOT1_NAME/CONFIG_FASTBOOT_MMC_BOOT2_NAME.
config FASTBOOT_MMC_BOOT1_NAME
string "Target name for updating EMMC_BOOT1"
- depends on FASTBOOT_MMC_BOOT1_SUPPORT
+ depends on FASTBOOT_MMC_BOOT_SUPPORT
default "mmc0boot0"
help
The fastboot "flash" and "erase" commands support operations on
@@ -124,6 +125,17 @@ config FASTBOOT_MMC_BOOT1_NAME
defined here.
The default target name for updating EMMC_BOOT1 is "mmc0boot0".
+config FASTBOOT_MMC_BOOT2_NAME
+ string "Target name for updating EMMC_BOOT2"
+ depends on FASTBOOT_MMC_BOOT_SUPPORT
+ default "mmc0boot1"
+ help
+ The fastboot "flash" and "erase" commands support operations on
+ EMMC_BOOT2. This occurs when the specified "EMMC_BOOT2 name" on
+ the "fastboot flash" and "fastboot erase" commands match the value
+ defined here.
+ The default target name for updating EMMC_BOOT2 is "mmc0boot1".
+
config FASTBOOT_MMC_USER_SUPPORT
bool "Enable eMMC userdata partition flash/erase"
depends on FASTBOOT_FLASH_MMC
diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c
index b5d4c90bfc..611074a3e4 100644
--- a/drivers/fastboot/fb_mmc.c
+++ b/drivers/fastboot/fb_mmc.c
@@ -174,7 +174,7 @@ static void write_raw_image(struct blk_desc *dev_desc,
fastboot_okay(NULL, response);
}
-#if defined(CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT) || \
+#if defined(CONFIG_FASTBOOT_MMC_BOOT_SUPPORT) || \
defined(CONFIG_FASTBOOT_MMC_USER_SUPPORT)
static int fb_mmc_erase_mmc_hwpart(struct blk_desc *dev_desc)
{
@@ -196,16 +196,16 @@ s
[PATCH v2 1/4] fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT
Split userdata and boot partition support for eMMC update
and correct the description (update is supported).
The new configuration CONFIG_FASTBOOT_MMC_USER_SUPPORT
allows to activate support of userdata partition update,
based on target name=CONFIG_FASTBOOT_MMC_USER_NAME
This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.
Signed-off-by: Patrick Delaunay
---
Changes in v2:
- rebase on master branch
- new impact on pumpkin_defconfig and mt8512_bm1_emmc_defconfig
configs/mt8512_bm1_emmc_defconfig | 1 +
configs/mt8518_ap1_emmc_defconfig | 1 +
configs/pumpkin_defconfig | 1 +
drivers/fastboot/Kconfig | 22 +-
drivers/fastboot/fb_mmc.c | 9 ++---
5 files changed, 26 insertions(+), 8 deletions(-)
diff --git a/configs/mt8512_bm1_emmc_defconfig
b/configs/mt8512_bm1_emmc_defconfig
index c6b3ee484b..1bda45c5d2 100644
--- a/configs/mt8512_bm1_emmc_defconfig
+++ b/configs/mt8512_bm1_emmc_defconfig
@@ -29,6 +29,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x1e0
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT=y
+CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
CONFIG_DM_MMC=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_MTK=y
diff --git a/configs/mt8518_ap1_emmc_defconfig
b/configs/mt8518_ap1_emmc_defconfig
index b95d2c683a..d5fb0ccd48 100644
--- a/configs/mt8518_ap1_emmc_defconfig
+++ b/configs/mt8518_ap1_emmc_defconfig
@@ -25,6 +25,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x1E0
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT=y
+CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
CONFIG_DM_MMC=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_MTK=y
diff --git a/configs/pumpkin_defconfig b/configs/pumpkin_defconfig
index cd77889eea..a9655f5abb 100644
--- a/configs/pumpkin_defconfig
+++ b/configs/pumpkin_defconfig
@@ -53,6 +53,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x400
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT=y
+CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
# CONFIG_INPUT is not set
CONFIG_DM_MMC=y
# CONFIG_MMC_QUIRKS is not set
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index 4352ba67a7..cb8425685f 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -124,14 +124,26 @@ config FASTBOOT_MMC_BOOT1_NAME
defined here.
The default target name for updating EMMC_BOOT1 is "mmc0boot0".
+config FASTBOOT_MMC_USER_SUPPORT
+ bool "Enable eMMC userdata partition flash/erase"
+ depends on FASTBOOT_FLASH_MMC
+ help
+ Define this to enable the support "flash" and "erase" command on
+ eMMC userdata. The "flash" command only update the MBR and GPT
+ header when CONFIG_EFI_PARTITION is supported.
+ The "erase" command erase all the userdata.
+ This occurs when the specified "partition name" on the
+ fastboot command line matches the value CONFIG_FASTBOOT_MMC_USER_NAME.
+
config FASTBOOT_MMC_USER_NAME
- string "Target name for erasing EMMC_USER"
- depends on FASTBOOT_FLASH_MMC && EFI_PARTITION && ARCH_MEDIATEK
+ string "Target name for updating EMMC_USER"
+ depends on FASTBOOT_MMC_USER_SUPPORT
default "mmc0"
help
- The fastboot "erase" command supports erasing EMMC_USER. This occurs
- when the specified "EMMC_USER name" on the "fastboot erase" commands
- match the value defined here.
+ The fastboot "flash" and "erase" command supports EMMC_USER.
+ This occurs when the specified "EMMC_USER name" on the
+ "fastboot flash" and the "fastboot erase" commands match the value
+ defined here.
The default target name for erasing EMMC_USER is "mmc0".
config FASTBOOT_GPT_NAME
diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c
index 4e26cef941..b5d4c90bfc 100644
--- a/drivers/fastboot/fb_mmc.c
+++ b/drivers/fastboot/fb_mmc.c
@@ -174,7 +174,8 @@ static void write_raw_image(struct blk_desc *dev_desc,
fastboot_okay(NULL, response);
}
-#ifdef CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT
+#if defined(CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT) || \
+ defined(CONFIG_FASTBOOT_MMC_USER_SUPPORT)
static int fb_mmc_erase_mmc_hwpart(struct blk_desc *dev_desc)
{
lbaint_t blks;
@@ -193,7 +194,9 @@ static int fb_mmc_erase_mmc_hwpart(struct blk_desc
*dev_desc)
return 0;
}
+#endif
+#ifdef CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT
static void fb_mmc_boot1_ops(struct blk_desc *dev_desc, void *buffer,
u32 buff_sz, char *response)
{
@@ -473,7 +476,7 @@ void fastboot_mmc_flash_write(const char *cmd, void
*download_buffer,
#endif
#if CONFIG_IS_ENABLED(EFI_PARTITION)
-#ifndef CONFIG_FASTBOOT_MMC_USER_NAME
+#ifndef CONFIG_FASTBOOT_MMC_USER_SUPPORT
if (strcmp(cmd, CONFIG_FASTBOOT_GPT_NAME) == 0) {
#else
if (strcmp(cmd, CONFIG_FASTBOOT_GPT_NAME) == 0 ||
@@ -603,7 +606,7 @@ void fastboot_mmc_erase
[PATCH v2 0/4] fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT
Hi, It is a rebased V2 version of the serie [1]. This serie adds a lot of new #if and doesn't respect the last U-Boot coding rules with 14 warnings detected by checkpatch: warning: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible But I chose to copy the existing code of the fastboot files fb_command.c to a have an easier review. So I prefer sent a patch (if it is required) to remove all the #ifdef in this file when the serie will be accepted. I check compilation of the added features on stm32mp1 platform with the serie [2]. The compilation for modified boards (with already activated config CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT) is verified with buildman: tools/buildman/buildman mt8512_bm1_emmc mt8518_ap1_emmc pumpkin Building current source for 3 boards (3 threads, 4 jobs per thread) aarch64: w+ pumpkin += WARNING == +This board does not use CONFIG_DM_ETH (Driver Model +for Ethernet drivers). Please update the board to use +CONFIG_DM_ETH before the v2020.07 release. Failure to +update by the deadline may result in board removal. +See doc/driver-model/migration.rst for more info. + aarch64: w+ mt8518_ap1_emmc += WARNING == +This board does not use CONFIG_DM_ETH (Driver Model +for Ethernet drivers). Please update the board to use +CONFIG_DM_ETH before the v2020.07 release. Failure to +update by the deadline may result in board removal. +See doc/driver-model/migration.rst for more info. + aarch64: w+ mt8512_bm1_emmc += WARNING == +This board does not use CONFIG_DM_ETH (Driver Model +for Ethernet drivers). Please update the board to use +CONFIG_DM_ETH before the v2020.07 release. Failure to +update by the deadline may result in board removal. +See doc/driver-model/migration.rst for more info. + 030 /3 0:00:07 : mt8512_bm1_emmc Completed: 3 total built, duration 0:00:23, rate 0.13 [1] "fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT" http://patchwork.ozlabs.org/project/uboot/list/?series=200509&state=* [2] "configs: stm32mp1: enable fastboot support of eMMC boot partition" http://patchwork.ozlabs.org/project/uboot/list/?series=200510 Regards Patrick Changes in v2: - rebase on master branch - new impact on pumpkin_defconfig and mt8512_bm1_emmc_defconfig - new impact on pumpkin_defconfig and mt8512_bm1_emmc_defconfig Patrick Delaunay (4): fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT fastboot: mmc: extend flash/erase for both emmc hwpart 1 and 2 fastboot: add command to select the default emmc hwpart for boot fastboot: add command to select the eMMC boot configuration configs/mt8512_bm1_emmc_defconfig | 3 +- configs/mt8518_ap1_emmc_defconfig | 3 +- configs/pumpkin_defconfig | 3 +- doc/android/fastboot.rst | 3 ++ drivers/fastboot/Kconfig | 62 -- drivers/fastboot/fb_command.c | 72 +++ drivers/fastboot/fb_mmc.c | 52 ++ include/fastboot.h| 6 +++ 8 files changed, 171 insertions(+), 33 deletions(-) -- 2.17.1
[PATCH v2 4/4] fastboot: add command to select the eMMC boot configuration
Add command oem bootbus which executes the command
``mmc bootbus `` on the current fastboot mmc device
( = CONFIG_FASTBOOT_FLASH_MMC_DEV) to set the eMMC boot
configuration on first update, with
= boot_bus_width reset_boot_bus_width boot_mode
$> fastboot oem bootbus:
Signed-off-by: Patrick Delaunay
---
(no changes since v1)
doc/android/fastboot.rst | 1 +
drivers/fastboot/Kconfig | 7 +++
drivers/fastboot/fb_command.c | 36 +++
include/fastboot.h| 3 +++
4 files changed, 47 insertions(+)
diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
index d8cb64261c..16b11399b3 100644
--- a/doc/android/fastboot.rst
+++ b/doc/android/fastboot.rst
@@ -25,6 +25,7 @@ The following OEM commands are supported (if enabled):
- ``oem format`` - this executes ``gpt write mmc %x $partitions``
- ``oem partconf`` - this executes ``mmc partconf %x 0`` to configure
eMMC
with = boot_ack boot_partition
+- ``oem bootbus`` - this executes ``mmc bootbus %x %s`` to configure eMMC
Support for both eMMC and NAND devices is included.
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index 9bd5597253..5f2e109759 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -196,6 +196,13 @@ config FASTBOOT_CMD_OEM_PARTCONF
Add support for the "oem partconf" command from a client. This set
the mmc boot-partition for the selecting eMMC device.
+config FASTBOOT_CMD_OEM_BOOTBUS
+ bool "Enable the 'oem bootbus' command"
+ depends on FASTBOOT_FLASH_MMC && SUPPORT_EMMC_BOOT
+ help
+ Add support for the "oem bootbus" command from a client. This set
+ the mmc boot configuration for the selecting eMMC device.
+
config FASTBOOT_USE_BCB_SET_REBOOT_FLAG
bool "Use BCB by fastboot to set boot reason"
depends on CMD_BCB && !ARCH_MESON && !ARCH_ROCKCHIP && !TARGET_KC1 && \
diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c
index ae4a7dc7fb..41fc8d7904 100644
--- a/drivers/fastboot/fb_command.c
+++ b/drivers/fastboot/fb_command.c
@@ -45,6 +45,9 @@ static void oem_format(char *, char *);
#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_PARTCONF)
static void oem_partconf(char *, char *);
#endif
+#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_BOOTBUS)
+static void oem_bootbus(char *, char *);
+#endif
static const struct {
const char *command;
@@ -108,6 +111,12 @@ static const struct {
.dispatch = oem_partconf,
},
#endif
+#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_BOOTBUS)
+ [FASTBOOT_COMMAND_OEM_BOOTBUS] = {
+ .command = "oem bootbus",
+ .dispatch = oem_bootbus,
+ },
+#endif
};
/**
@@ -410,3 +419,30 @@ static void oem_partconf(char *cmd_parameter, char
*response)
fastboot_okay(NULL, response);
}
#endif
+
+#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_BOOTBUS)
+/**
+ * oem_bootbus() - Execute the OEM bootbus command
+ *
+ * @cmd_parameter: Pointer to command parameter
+ * @response: Pointer to fastboot response buffer
+ */
+static void oem_bootbus(char *cmd_parameter, char *response)
+{
+ char cmdbuf[32];
+
+ if (!cmd_parameter) {
+ fastboot_fail("Expected command parameter", response);
+ return;
+ }
+
+ /* execute 'mmc bootbus' command with cmd_parameter arguments*/
+ snprintf(cmdbuf, sizeof(cmdbuf), "mmc bootbus %x %s",
+CONFIG_FASTBOOT_FLASH_MMC_DEV, cmd_parameter);
+ printf("Execute: %s\n", cmdbuf);
+ if (run_command(cmdbuf, 0))
+ fastboot_fail("Cannot set oem bootbus", response);
+ else
+ fastboot_okay(NULL, response);
+}
+#endif
diff --git a/include/fastboot.h b/include/fastboot.h
index 86559d1595..3df7e6b81f 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -41,6 +41,9 @@ enum {
#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_PARTCONF)
FASTBOOT_COMMAND_OEM_PARTCONF,
#endif
+#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_BOOTBUS)
+ FASTBOOT_COMMAND_OEM_BOOTBUS,
+#endif
FASTBOOT_COMMAND_COUNT
};
--
2.17.1
[PATCH v2 3/4] fastboot: add command to select the default emmc hwpart for boot
Add fastboot command oem partconf which executes the command
``mmc partconf 0`` on the current mmc device
to configure the eMMC boot partition with
: boot_ack boot_partition, so the command is:
$> fastboot oem partconf:
The partition_access argument is forced to 0 (userdata)
Signed-off-by: Patrick Delaunay
---
(no changes since v1)
doc/android/fastboot.rst | 2 ++
drivers/fastboot/Kconfig | 7 +++
drivers/fastboot/fb_command.c | 36 +++
include/fastboot.h| 3 +++
4 files changed, 48 insertions(+)
diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
index 2877c3cbaa..d8cb64261c 100644
--- a/doc/android/fastboot.rst
+++ b/doc/android/fastboot.rst
@@ -23,6 +23,8 @@ The current implementation supports the following standard
commands:
The following OEM commands are supported (if enabled):
- ``oem format`` - this executes ``gpt write mmc %x $partitions``
+- ``oem partconf`` - this executes ``mmc partconf %x 0`` to configure
eMMC
+ with = boot_ack boot_partition
Support for both eMMC and NAND devices is included.
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index ef57290876..9bd5597253 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -189,6 +189,13 @@ config FASTBOOT_CMD_OEM_FORMAT
relies on the env variable partitions to contain the list of
partitions as required by the gpt command.
+config FASTBOOT_CMD_OEM_PARTCONF
+ bool "Enable the 'oem partconf' command"
+ depends on FASTBOOT_FLASH_MMC && SUPPORT_EMMC_BOOT
+ help
+ Add support for the "oem partconf" command from a client. This set
+ the mmc boot-partition for the selecting eMMC device.
+
config FASTBOOT_USE_BCB_SET_REBOOT_FLAG
bool "Use BCB by fastboot to set boot reason"
depends on CMD_BCB && !ARCH_MESON && !ARCH_ROCKCHIP && !TARGET_KC1 && \
diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c
index d3c578672d..ae4a7dc7fb 100644
--- a/drivers/fastboot/fb_command.c
+++ b/drivers/fastboot/fb_command.c
@@ -42,6 +42,9 @@ static void reboot_recovery(char *, char *);
#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_FORMAT)
static void oem_format(char *, char *);
#endif
+#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_PARTCONF)
+static void oem_partconf(char *, char *);
+#endif
static const struct {
const char *command;
@@ -99,6 +102,12 @@ static const struct {
.dispatch = oem_format,
},
#endif
+#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_PARTCONF)
+ [FASTBOOT_COMMAND_OEM_PARTCONF] = {
+ .command = "oem partconf",
+ .dispatch = oem_partconf,
+ },
+#endif
};
/**
@@ -374,3 +383,30 @@ static void oem_format(char *cmd_parameter, char *response)
}
}
#endif
+
+#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_PARTCONF)
+/**
+ * oem_partconf() - Execute the OEM partconf command
+ *
+ * @cmd_parameter: Pointer to command parameter
+ * @response: Pointer to fastboot response buffer
+ */
+static void oem_partconf(char *cmd_parameter, char *response)
+{
+ char cmdbuf[32];
+
+ if (!cmd_parameter) {
+ fastboot_fail("Expected command parameter", response);
+ return;
+ }
+
+ /* execute 'mmc partconfg' command with cmd_parameter arguments*/
+ snprintf(cmdbuf, sizeof(cmdbuf), "mmc partconf %x %s 0",
+CONFIG_FASTBOOT_FLASH_MMC_DEV, cmd_parameter);
+ printf("Execute: %s\n", cmdbuf);
+ if (run_command(cmdbuf, 0))
+ fastboot_fail("Cannot set oem partconf", response);
+ else
+ fastboot_okay(NULL, response);
+}
+#endif
diff --git a/include/fastboot.h b/include/fastboot.h
index 8e9ee80907..86559d1595 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -38,6 +38,9 @@ enum {
#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_FORMAT)
FASTBOOT_COMMAND_OEM_FORMAT,
#endif
+#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_PARTCONF)
+ FASTBOOT_COMMAND_OEM_PARTCONF,
+#endif
FASTBOOT_COMMAND_COUNT
};
--
2.17.1
Pull request for documentation tag doc-2021-04-rc1-3
Dear Tom, The following changes since commit e262b2973e22174da666038514d17f0f7171466b: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi (2021-01-25 19:46:02 -0500) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git tags/doc-2021-04-rc1-3 for you to fetch changes up to 25be4d336fa994a17070f5a810f4dd6219b2c993: doc: exception command (2021-01-27 12:52:57 +0100) No problems were reported by Azure and Gitlab: https://gitlab.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/6096 https://dev.azure.com/u-boot/u-boot/_build/results?buildId=1698 Pull request for documentation tag doc-2021-04-rc1-3 Update the build system for the HTML documentation to allow using Sphinx 3. Man-page for exception command. Heinrich Schuchardt (5): doc: board: fix Microchip MPFS Icicle Kit doc doc: fix doc/develop/logging.rst .gitlab-ci: install doc/sphinx/requirements.txt doc: update Kernel documentation build system doc: exception command .azure-pipelines.yml| 6 +- .gitlab-ci.yml | 3 + doc/api/index.rst | 1 + doc/api/logging.rst | 6 + doc/board/microchip/mpfs_icicle.rst | 51 ++-- doc/conf.py | 141 --- doc/develop/logging.rst | 13 +- doc/sphinx/automarkup.py| 290 +++ doc/sphinx/cdomain.py | 93 +++- doc/sphinx/kernel_abi.py| 194 doc/sphinx/kernel_feat.py | 169 ++ doc/sphinx/kerneldoc.py | 15 +- doc/sphinx/kernellog.py | 6 +- doc/sphinx/kfigure.py | 6 +- doc/sphinx/load_config.py | 27 ++- doc/sphinx/maintainers_include.py | 197 doc/sphinx/parallel-wrapper.sh | 33 +++ doc/sphinx/parse-headers.pl | 6 +- doc/sphinx/requirements.txt | 5 +- doc/usage/exception.rst | 68 ++ doc/usage/index.rst | 1 + scripts/kernel-doc | 450 ++-- 22 files changed, 1596 insertions(+), 185 deletions(-) create mode 100644 doc/api/logging.rst create mode 100644 doc/sphinx/automarkup.py create mode 100644 doc/sphinx/kernel_abi.py create mode 100644 doc/sphinx/kernel_feat.py create mode 100755 doc/sphinx/maintainers_include.py create mode 100644 doc/sphinx/parallel-wrapper.sh create mode 100644 doc/usage/exception.rst
[PATCH] cmd: fdt: skip board specific fixup using env variable
From: Wasim Khan
Sometimes it is useful to boot OS with already fixed-up
device tree. Check for env variable 'skip_board_fixup'
before calling ft_board_setup().
Current behaviour is unchanged, additionally user can
set skip_board_fixup to 1 to skip the fixup.
Signed-off-by: Wasim Khan
---
common/image-fdt.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 327a8c4c39..0435176863 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -572,11 +572,18 @@ int image_setup_libfdt(bootm_headers_t *images, void
*blob,
fdt_fixup_pstore(blob);
#endif
if (IMAGE_OF_BOARD_SETUP) {
- fdt_ret = ft_board_setup(blob, gd->bd);
- if (fdt_ret) {
- printf("ERROR: board-specific fdt fixup failed: %s\n",
- fdt_strerror(fdt_ret));
- goto err;
+ const char *skip_board_fixup;
+
+ skip_board_fixup = env_get("skip_board_fixup");
+ if (skip_board_fixup && ((int)simple_strtol(skip_board_fixup,
NULL, 10) == 1)) {
+ printf("skip board fdt fixup\n");
+ } else {
+ fdt_ret = ft_board_setup(blob, gd->bd);
+ if (fdt_ret) {
+ printf("ERROR: board-specific fdt fixup failed:
%s\n",
+ fdt_strerror(fdt_ret));
+ goto err;
+ }
}
}
if (IMAGE_OF_SYSTEM_SETUP) {
--
2.25.1
Re: [PATCH] cmd: pxe_utils: fix ipappend ip config empty vars
On Thu, Jan 21, 2021 at 03:44:35PM +0800, Artem Lapkin wrote:
> PROBLEM: If ipaddr, serverip, gatewayip or netmask variable undefined
> we can have for example ip=192.168.2.33::192.168.2.1:255.255.255.0
> yes its works same for linux kernel, but im think no need print
>
> SUGGESTED SOLUTION:
> if some variable was undefined we need just print empty place like this
> ip=192.168.2.33::192.168.2.1:255.255.255.0
>
> Signed-off-by: Artem Lapkin
>
> ---
> cmd/pxe_utils.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/cmd/pxe_utils.c b/cmd/pxe_utils.c
> index 8716e782..2049c0f3 100644
> --- a/cmd/pxe_utils.c
> +++ b/cmd/pxe_utils.c
> @@ -395,9 +395,12 @@ static int label_boot(struct cmd_tbl *cmdtp, struct
> pxe_label *label)
> }
>
> if (label->ipappend & 0x1) {
> + char *a = env_get("ipaddr");
> + char *b = env_get("serverip");
> + char *c = env_get("gatewayip");
> + char *d = env_get("netmask");
> sprintf(ip_str, " ip=%s:%s:%s:%s",
> - env_get("ipaddr"), env_get("serverip"),
> - env_get("gatewayip"), env_get("netmask"));
> + a ? a : "", b ? b : "", c ? c : "", d ? d : "");
> }
>
> #ifdef CONFIG_CMD_NET
If Linux is happily parsing this, I'm not sure it's worth changing.
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH 1/4] Respect that some compression algos can be enabled separately for SPL
On 27.01.21 08:57, Frieder Schrempf wrote: > On 26.01.21 18:53, Tim Harvey wrote: >> On Sat, Jan 23, 2021 at 4:39 AM Stefano Babic wrote: >>> >>> Hi Tim, >>> >>> there is a weird side effect with this patch, breaking m68k >>> architecture. For some reason, image.c is not compiled clean because gd >>> is not declared anymore. >>> >>> In file included from tools/common/image.c:1: >>> ./tools/../common/image.c: In function ‘get_table_entry_id’: >>> ./tools/../common/image.c:982:41: error: ‘gd’ undeclared (first use in >>> this function) >>> 982 | if (t->sname && strcasecmp(t->sname + gd->reloc_off, name) >>> == 0) >>> | ^~ >>> ./tools/../common/image.c:982:41: note: each undeclared identifier is >>> reported only once for each functi >>> >>> Can you take a look ? Thanks ! >>> >> >> Stefano, >> >> I have no idea what could cause this... must be something to do with >> including kconfig.h? >> >> What board/target would I build to reproduce this? >> >> Frieder, do you have any ideas? > > I can't remember if I did a full test on all platforms when I wrote this > patch. Probably not. > > And I have no idea what is causing this, nor do I currently have the > time to have a closer look, sorry. > > BTW, this is a very good example for what I said earlier: > > "I failed to do upstreaming work for U-Boot for quite some time. Mainly > because whenever I try to, I end up fixing/cleaning some weird U-Boot > code/behavior and spending way more time than I actually have available." True, but...we cannot even break other boards, too. I have also get a short look at the issue, but I could not find myself the reason, too. I plan to get a deeper look in the week end. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH] fs: btrfs: Select SHA256 in Kconfig
On 2021/1/27 下午8:01, David Sterba wrote:
On Wed, Jan 27, 2021 at 10:42:30AM +0100, matthias@kernel.org wrote:
From: Matthias Brugger
Since commit 565a4147d17a ("fs: btrfs: Add more checksum algorithms")
btrfs uses the sha256 checksum algorithm. But Kconfig lacks to select
it. This leads to compilation errors:
fs/built-in.o: In function `hash_sha256':
fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts'
fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update'
fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish'
Signed-off-by: Matthias Brugger
So this is a fix for u-boot, got me confused and not for the first time
as there's Kconfig and the same fs/btrfs/ directory structure.
Well, sometimes too unified file structure/code base can also be a problem.
Considering I'm also going to continue cross-porting more code to
U-boot, any recommendation on this?
Using different prefix?
Thanks,
Qu
Re: [PATCH] fs: btrfs: Select SHA256 in Kconfig
On Wed, Jan 27, 2021 at 10:42:30AM +0100, matthias@kernel.org wrote:
> From: Matthias Brugger
>
> Since commit 565a4147d17a ("fs: btrfs: Add more checksum algorithms")
> btrfs uses the sha256 checksum algorithm. But Kconfig lacks to select
> it. This leads to compilation errors:
> fs/built-in.o: In function `hash_sha256':
> fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts'
> fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update'
> fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish'
>
> Signed-off-by: Matthias Brugger
So this is a fix for u-boot, got me confused and not for the first time
as there's Kconfig and the same fs/btrfs/ directory structure.
[PATCH 1/1] test: pr_cont_test.o depends on CONFIG_LOG=y
Compiling wandboard_defconfig with CONFIG_UT_LOG=y leads to a build error:
test/log/pr_cont_test.c: In function ‘log_test_pr_cont’:
test/log/pr_cont_test.c:28:14: error:
‘gd_t’ {aka ‘volatile struct global_data’} has no member named ‘log_fmt’
log_fmt = gd->log_fmt;
We do not want to let CONFIG_UT_LOG depend on CONFIG_LOG=y because we have
tests for logging functions called with CONFIG_LOG=n.
Fix the build dependency.
Reported-by: Kever Yang
Signed-off-by: Heinrich Schuchardt
---
test/log/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/test/log/Makefile b/test/log/Makefile
index afdafa502a..3f09deb644 100644
--- a/test/log/Makefile
+++ b/test/log/Makefile
@@ -8,7 +8,6 @@ obj-$(CONFIG_CMD_LOG) += log_filter.o
ifdef CONFIG_UT_LOG
obj-y += test-main.o
-obj-y += pr_cont_test.o
ifdef CONFIG_SANDBOX
obj-$(CONFIG_LOG_SYSLOG) += syslog_test.o
@@ -16,6 +15,7 @@ obj-$(CONFIG_LOG_SYSLOG) += syslog_test_ndebug.o
endif
ifdef CONFIG_LOG
+obj-y += pr_cont_test.o
obj-$(CONFIG_CONSOLE_RECORD) += cont_test.o
else
obj-$(CONFIG_CONSOLE_RECORD) += nolog_test.o
--
2.29.2
[RFC PATCH] arm: dts: ls1028a: define QDS networking protocol combinations
From: Alex Marginean
Includes DT definition for the following serdes protocols using various
PHY cards: 85xx, 13xx, 65xx, , .
Note that the default device tree for QDS now uses 85xx.
Enabling any of the others requires patching the fsl-ls1028a-qds.dtsi
file (the includes at the bottom of the file).
The phy-handle is specified as a path rather than a label because it is
possible to use the #include multiple times (meaning that more than one
PHY riser card of one type is inserted), and therefore, there would be
duplicate labels with the same name.
LBRW means that the board needs lane B rework before using this dtsi.
Signed-off-by: Alex Marginean
Signed-off-by: Vladimir Oltean
---
The reason for posting as RFC is that this depends on the Felix switch
driver and device tree bindings which were submitted here:
https://patchwork.ozlabs.org/project/uboot/cover/20210125122357.414742-1-olte...@gmail.com/
.../dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi | 20 ++
.../dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi | 19 ++
.../dts/fsl-ls1028a-qds--sch-30841.dtsi | 49 +++
.../dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi | 26
.../dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi | 19 ++
.../fsl-ls1028a-qds--sch-24801-LBRW.dtsi | 63 +++
.../dts/fsl-ls1028a-qds--sch-24801.dtsi | 48 ++
.../fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi | 48 ++
.../fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi | 42 +
.../dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi | 20 ++
.../dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi | 20 ++
arch/arm/dts/fsl-ls1028a-qds.dtsi | 3 +
arch/arm/dts/fsl-sch-24801.dtsi | 28 +
arch/arm/dts/fsl-sch-28021.dtsi | 29 +
arch/arm/dts/fsl-sch-30841.dtsi | 38 +++
arch/arm/dts/fsl-sch-30842.dtsi | 18 ++
16 files changed, 490 insertions(+)
create mode 100644 arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds--sch-30841.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds--sch-24801-LBRW.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds--sch-24801.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
create mode 100644 arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
create mode 100644 arch/arm/dts/fsl-sch-24801.dtsi
create mode 100644 arch/arm/dts/fsl-sch-28021.dtsi
create mode 100644 arch/arm/dts/fsl-sch-30841.dtsi
create mode 100644 arch/arm/dts/fsl-sch-30842.dtsi
diff --git a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
new file mode 100644
index ..23816da8eeba
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1028A-QDS device tree fragment for RCW 1xxx
+ *
+ * Copyright 2019-2021 NXP Semiconductors
+ */
+
+/*
+ * This setup is using a SCH-30842 card with AQR112 PHY in slot 1 for ENETC
+ * port 0 USXGMII.
+ */
+&slot1 {
+ #include "fsl-sch-30842.dtsi"
+};
+
+&enetc0 {
+ status = "okay";
+ phy-mode = "usxgmii";
+ phy-handle = <&{/i2c@200/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
new file mode 100644
index ..c6558ae2e07b
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1028A-QDS device tree fragment for RCW 6xxx
+ *
+ * Copyright 2019-2021 NXP Semiconductors
+ */
+
+/*
+ * This setup is using SCH-30842 cards with AQR112 PHY.
+ */
+&slot1 {
+ #include "fsl-sch-30842.dtsi"
+};
+
+&enetc0 {
+ status = "okay";
+ phy-mode = "sgmii-2500";
+ phy-handle = <&{/i2c@200/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+};
diff --git a/arch/arm/dts/fsl-ls1028a-qds--sch-30841.dtsi
b/arch/arm/dts/fsl-ls1028a-qds--sch-30841.dtsi
new file mode 100644
index ..fb1836a8aef3
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1028a-qds--sch-30841.dtsi
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1028A-QDS device tree fragment for RCW
+ *
+ * Copyright 2019-2021 NXP Semiconductors
+ */
+
+/*
+ * This setup is using a SCH-30841 card with AQR412 10G quad PHY.
+ *
+ * Switch ports are mapped 1:1 to AQR412 card ports seated in slot 1.
+ * Bottom port is port 0.
+ * Note that this is only usable for:
+ * - QDS boards WITHOUT lane B rewo
[PATCH] mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output
From: Haibo Chen
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these
are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the
card clock output.
After commit b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support"),
we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because
the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during
voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON,
after CMD11, hardware will gate off the card clock automatically, so card do
not detect the clock off/on behavior, so will draw the data0 line low until
next command.
Fixes: b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support")
Signed-off-by: Haibo Chen
---
drivers/mmc/fsl_esdhc_imx.c | 29 +
include/fsl_esdhc_imx.h | 2 ++
2 files changed, 23 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 8ac859797f..da33ee8253 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -653,7 +653,10 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct
mmc *mmc, uint clock)
clk = (pre_div << 8) | (div << 4);
#ifdef CONFIG_FSL_USDHC
- esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);
+ esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
+ ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp &
PRSSTAT_SDOFF, 100);
+ if (ret)
+ pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n");
#else
esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
#endif
@@ -665,7 +668,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct
mmc *mmc, uint clock)
pr_warn("fsl_esdhc_imx: Internal clock never stabilised.\n");
#ifdef CONFIG_FSL_USDHC
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN);
+ esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
#else
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
#endif
@@ -720,8 +723,14 @@ static void esdhc_set_strobe_dll(struct mmc *mmc)
struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
struct fsl_esdhc *regs = priv->esdhc_regs;
u32 val;
+ u32 tmp;
+ int ret;
if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) {
+ esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
+ ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp
& PRSSTAT_SDOFF, 100);
+ if (ret)
+ pr_warn("fsl_esdhc_imx: Internal clock never gate
off.\n");
esdhc_write32(®s->strobe_dllctrl,
ESDHC_STROBE_DLL_CTRL_RESET);
/*
@@ -739,6 +748,7 @@ static void esdhc_set_strobe_dll(struct mmc *mmc)
pr_warn("HS400 strobe DLL status REF not lock!\n");
if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK))
pr_warn("HS400 strobe DLL status SLV not lock!\n");
+ esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
}
}
@@ -962,14 +972,18 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv
*priv, struct mmc *mmc)
#ifdef MMC_SUPPORTS_TUNING
if (mmc->clk_disable) {
#ifdef CONFIG_FSL_USDHC
- esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);
+ u32 tmp;
+
+ esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
+ ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp
& PRSSTAT_SDOFF, 100);
+ if (ret)
+ pr_warn("fsl_esdhc_imx: Internal clock never gate
off.\n");
#else
esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
#endif
} else {
#ifdef CONFIG_FSL_USDHC
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
- VENDORSPEC_CKEN);
+ esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
#else
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
#endif
@@ -1045,7 +1059,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv,
struct mmc *mmc)
#ifndef CONFIG_FSL_USDHC
esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
#else
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN | VENDORSPEC_IPGEN);
+ esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
#endif
/* Set the initial clock speed */
@@ -1183,8 +1197,7 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
esdhc_write32(®s->autoc12err, 0);
esdhc_write32(®s->clktunectrlstatus, 0);
#else
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
- VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN);
+ esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
#endif
if (priv->vs18_enable)
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h
index 45ed635a77..b092034464 100644
--- a/inc
[PATCH] cmd: mvebu/bubt: Fix default options in help
Default options depends on compile time defines. Signed-off-by: Pali Rohár --- cmd/mvebu/bubt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index 4c58fd3c2e..b64996320c 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -874,9 +874,9 @@ U_BOOT_CMD( bubt, 4, 0, do_bubt_cmd, "Burn a u-boot image to flash", "[file-name] [destination [source]]\n" - "\t-file-name The image file name to burn. Default = flash-image.bin\n" - "\t-destination Flash to burn to [spi, nand, mmc]. Default = active boot device\n" - "\t-sourceThe source to load image from [tftp, usb, mmc]. Default = tftp\n" + "\t-file-name The image file name to burn. Default = " CONFIG_MVEBU_UBOOT_DFLT_NAME "\n" + "\t-destination Flash to burn to [spi, nand, mmc]. Default = " DEFAULT_BUBT_DST "\n" + "\t-sourceThe source to load image from [tftp, usb, mmc]. Default = " DEFAULT_BUBT_SRC "\n" "Examples:\n" "\tbubt - Burn flash-image.bin from tftp to active boot device\n" "\tbubt flash-image-new.bin nand - Burn flash-image-new.bin from tftp to NAND flash\n" -- 2.20.1
Re: FW: [PATCH 1/4] fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT
On 1/26/21 4:48 PM, Patrick DELAUNAY wrote: From: Lukasz Majewski Sent: samedi 23 janvier 2021 13:16 Hi Patrick, Hi Lukasz, From: Patrick DELAUNAY Sent: mercredi 9 septembre 2020 15:23 To: u-boot@lists.denx.de Cc: Patrick DELAUNAY ; Jagan Teki ; Kever Yang ; Mingming lee ; Miquel Raynal ; Peng Fan ; Simon Glass ; U-Boot STM32 Subject: [PATCH 1/4] fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT Importance: High Split userdata and boot partition support for eMMC update and correct the description (update is supported). The new configuration CONFIG_FASTBOOT_MMC_USER_SUPPORT allows to activate support of userdata partition update, based on target name=CONFIG_FASTBOOT_MMC_USER_NAME This patch also removes the unnecessary dependency with ARCH_MEDIATEK and EFI_PARTITION. Signed-off-by: Patrick Delaunay --- configs/mt8518_ap1_emmc_defconfig | 1 + drivers/fastboot/Kconfig | 22 +- drivers/fastboot/fb_mmc.c | 9 ++--- 3 files changed, 24 insertions(+), 8 deletions(-) Gentle reminder, Any comments on this serie [1] [1] http://patchwork.ozlabs.org/project/uboot/list/?series=200509 Patrick Could you rebase this on top of current -master (after I do send the PR) and resend. There are now build / application errors on this series. Thanks in advance and please find my apologize for very late reply (covid19 + personal matters). I wil rebase the serie. And I understand and accept your apologies; anyway the serie wasn't blocking for me. Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de Regards PAtrick
Re: [PATCH] fastboot: add UUU command UCmd and ACmd support
Hello Roman,
Am 27.01.21 um 10:34 schrieb Roman Stratiienko:
> Hello Heiko,
>
> Looks like these commands will provide full access to any u-boot
> commands, including working with memory.
> It can be used to read/set any registers/data which is not in the
> trust zone, thus opening a huge backdoor.
>
> This command could be useful for debug/CI purposes, but do you really
> want this in release builds?
Hmm.. indeed.
I set the default to no not to yes, so you need
to enable it, and add a comment in Kconfig.
Thanks!
bye,
Heiko
>
> Best regards,
> Roman
>
> пн, 11 янв. 2021 г. в 12:19, Heiko Schocher :
>>
>> add support for the UUU commands ACmd and UCmd.
>>
>> Enable them through the Kconfig option
>> CONFIG_FASTBOOT_UUU_SUPPORT
>>
>> base was commit in NXP kernel
>> 9b149c2a2882: ("MLK-18591-3 android: Add FSL android fastboot support")
>>
>> and ported it to current mainline. Tested this patch
>> on imx6ul based board.
>>
>> Signed-off-by: Heiko Schocher
>> ---
>> azure build:
>> https://dev.azure.com/hs0298/hs/_build/results?buildId=57&view=results
>>
>> version uuu tool used for tests:
>> commit 3870fb781b35: ("fastboot: default to logical-block-size 4096")
>>
>> doc/android/fastboot-protocol.rst | 5 +++
>> doc/android/fastboot.rst | 2 +
>> drivers/fastboot/Kconfig | 7
>> drivers/fastboot/fb_command.c | 62 +++
>> drivers/usb/gadget/f_fastboot.c | 17 +
>> include/fastboot.h| 7
>> 6 files changed, 100 insertions(+)
>>
>> diff --git a/doc/android/fastboot-protocol.rst
>> b/doc/android/fastboot-protocol.rst
>> index e723659e49c..e8cbd7f24ea 100644
>> --- a/doc/android/fastboot-protocol.rst
>> +++ b/doc/android/fastboot-protocol.rst
>> @@ -144,6 +144,11 @@ Command Reference
>>
>>"powerdown" Power off the device.
>>
>> + "ucmd" execute any bootloader command and wait until it
>> + finishs.
>> +
>> + "acmd" execute any bootloader command, do not wait.
>> +
>> Client Variables
>>
>>
>> diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
>> index 2877c3cbaaa..b58d1b5b31a 100644
>> --- a/doc/android/fastboot.rst
>> +++ b/doc/android/fastboot.rst
>> @@ -19,6 +19,8 @@ The current implementation supports the following standard
>> commands:
>> - ``reboot``
>> - ``reboot-bootloader``
>> - ``set_active`` (only a stub implementation which always succeeds)
>> +- ``ucmd`` (if enabled)
>> +- ``acmd`` (if enabled)
>>
>> The following OEM commands are supported (if enabled):
>>
>> diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
>> index 4352ba67a71..b1f8cd74a15 100644
>> --- a/drivers/fastboot/Kconfig
>> +++ b/drivers/fastboot/Kconfig
>> @@ -72,6 +72,13 @@ config FASTBOOT_FLASH
>> the downloaded image to a non-volatile storage device. Define
>> this to enable the "fastboot flash" command.
>>
>> +config FASTBOOT_UUU_SUPPORT
>> + bool "Enable FASTBOOT i.MX UUU special command"
>> + default y if ARCH_MX7 || ARCH_MX6 || ARCH_IMX8 || ARCH_IMX8M ||
>> ARCH_MX7ULP
>> + select FSL_FASTBOOT
>> + help
>> + The fastboot protocol includes "UCmd" command and "ACmd" command
>> +
>> choice
>> prompt "Flash provider for FASTBOOT"
>> depends on FASTBOOT_FLASH
>> diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c
>> index d3c578672dc..31a47e46386 100644
>> --- a/drivers/fastboot/fb_command.c
>> +++ b/drivers/fastboot/fb_command.c
>> @@ -43,6 +43,11 @@ static void reboot_recovery(char *, char *);
>> static void oem_format(char *, char *);
>> #endif
>>
>> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
>> +static void run_ucmd(char *, char *);
>> +static void run_acmd(char *, char *);
>> +#endif
>> +
>> static const struct {
>> const char *command;
>> void (*dispatch)(char *cmd_parameter, char *response);
>> @@ -99,6 +104,16 @@ static const struct {
>> .dispatch = oem_format,
>> },
>> #endif
>> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
>> + [FASTBOOT_COMMAND_UCMD] = {
>> + .command = "UCmd",
>> + .dispatch = run_ucmd,
>> + },
>> + [FASTBOOT_COMMAND_ACMD] = {
>> + .command = "ACmd",
>> + .dispatch = run_acmd,
>> + },
>> +#endif
>> };
>>
>> /**
>> @@ -309,6 +324,53 @@ static void erase(char *cmd_parameter, char *response)
>> }
>> #endif
>>
>> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
>> +/**
>> + * run_ucmd() - Execute the UCmd command
>> + *
>> + * @cmd_parameter: Pointer to command parameter
>> + * @response: Pointer to fastboot response buffer
>> + */
>> +static void run_ucmd(char *cmd_parameter, char *response)
>> +{
>> + if (!cmd_parameter) {
>> + pr_err("missing slot suffix\n");
>> + fastboot_fail("missing command", response);
>> + return;
>> + }
Re: [PATCH] fs: btrfs: Select SHA256 in Kconfig
On 2021/1/27 下午5:42, matthias@kernel.org wrote:
From: Matthias Brugger
Since commit 565a4147d17a ("fs: btrfs: Add more checksum algorithms")
btrfs uses the sha256 checksum algorithm. But Kconfig lacks to select
it. This leads to compilation errors:
fs/built-in.o: In function `hash_sha256':
fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts'
fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update'
fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish'
Signed-off-by: Matthias Brugger
Oh, forgot to select sha256.
Thanks for the fix.
Reviewed-by: Qu Wenruo
Thanks,
Qu
---
fs/btrfs/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/btrfs/Kconfig b/fs/btrfs/Kconfig
index f302b1fbef..2a32f42ad1 100644
--- a/fs/btrfs/Kconfig
+++ b/fs/btrfs/Kconfig
@@ -4,6 +4,7 @@ config FS_BTRFS
select LZO
select ZSTD
select RBTREE
+ select SHA256
help
This provides a single-device read-only BTRFS support. BTRFS is a
next-generation Linux file system based on the copy-on-write
[PATCH] fs: btrfs: Select SHA256 in Kconfig
From: Matthias Brugger
Since commit 565a4147d17a ("fs: btrfs: Add more checksum algorithms")
btrfs uses the sha256 checksum algorithm. But Kconfig lacks to select
it. This leads to compilation errors:
fs/built-in.o: In function `hash_sha256':
fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts'
fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update'
fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish'
Signed-off-by: Matthias Brugger
---
fs/btrfs/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/btrfs/Kconfig b/fs/btrfs/Kconfig
index f302b1fbef..2a32f42ad1 100644
--- a/fs/btrfs/Kconfig
+++ b/fs/btrfs/Kconfig
@@ -4,6 +4,7 @@ config FS_BTRFS
select LZO
select ZSTD
select RBTREE
+ select SHA256
help
This provides a single-device read-only BTRFS support. BTRFS is a
next-generation Linux file system based on the copy-on-write
--
2.30.0
Re: [PATCH] fastboot: add UUU command UCmd and ACmd support
Hello Heiko,
Looks like these commands will provide full access to any u-boot
commands, including working with memory.
It can be used to read/set any registers/data which is not in the
trust zone, thus opening a huge backdoor.
This command could be useful for debug/CI purposes, but do you really
want this in release builds?
Best regards,
Roman
пн, 11 янв. 2021 г. в 12:19, Heiko Schocher :
>
> add support for the UUU commands ACmd and UCmd.
>
> Enable them through the Kconfig option
> CONFIG_FASTBOOT_UUU_SUPPORT
>
> base was commit in NXP kernel
> 9b149c2a2882: ("MLK-18591-3 android: Add FSL android fastboot support")
>
> and ported it to current mainline. Tested this patch
> on imx6ul based board.
>
> Signed-off-by: Heiko Schocher
> ---
> azure build:
> https://dev.azure.com/hs0298/hs/_build/results?buildId=57&view=results
>
> version uuu tool used for tests:
> commit 3870fb781b35: ("fastboot: default to logical-block-size 4096")
>
> doc/android/fastboot-protocol.rst | 5 +++
> doc/android/fastboot.rst | 2 +
> drivers/fastboot/Kconfig | 7
> drivers/fastboot/fb_command.c | 62 +++
> drivers/usb/gadget/f_fastboot.c | 17 +
> include/fastboot.h| 7
> 6 files changed, 100 insertions(+)
>
> diff --git a/doc/android/fastboot-protocol.rst
> b/doc/android/fastboot-protocol.rst
> index e723659e49c..e8cbd7f24ea 100644
> --- a/doc/android/fastboot-protocol.rst
> +++ b/doc/android/fastboot-protocol.rst
> @@ -144,6 +144,11 @@ Command Reference
>
>"powerdown" Power off the device.
>
> + "ucmd" execute any bootloader command and wait until it
> + finishs.
> +
> + "acmd" execute any bootloader command, do not wait.
> +
> Client Variables
>
>
> diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
> index 2877c3cbaaa..b58d1b5b31a 100644
> --- a/doc/android/fastboot.rst
> +++ b/doc/android/fastboot.rst
> @@ -19,6 +19,8 @@ The current implementation supports the following standard
> commands:
> - ``reboot``
> - ``reboot-bootloader``
> - ``set_active`` (only a stub implementation which always succeeds)
> +- ``ucmd`` (if enabled)
> +- ``acmd`` (if enabled)
>
> The following OEM commands are supported (if enabled):
>
> diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
> index 4352ba67a71..b1f8cd74a15 100644
> --- a/drivers/fastboot/Kconfig
> +++ b/drivers/fastboot/Kconfig
> @@ -72,6 +72,13 @@ config FASTBOOT_FLASH
> the downloaded image to a non-volatile storage device. Define
> this to enable the "fastboot flash" command.
>
> +config FASTBOOT_UUU_SUPPORT
> + bool "Enable FASTBOOT i.MX UUU special command"
> + default y if ARCH_MX7 || ARCH_MX6 || ARCH_IMX8 || ARCH_IMX8M ||
> ARCH_MX7ULP
> + select FSL_FASTBOOT
> + help
> + The fastboot protocol includes "UCmd" command and "ACmd" command
> +
> choice
> prompt "Flash provider for FASTBOOT"
> depends on FASTBOOT_FLASH
> diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c
> index d3c578672dc..31a47e46386 100644
> --- a/drivers/fastboot/fb_command.c
> +++ b/drivers/fastboot/fb_command.c
> @@ -43,6 +43,11 @@ static void reboot_recovery(char *, char *);
> static void oem_format(char *, char *);
> #endif
>
> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
> +static void run_ucmd(char *, char *);
> +static void run_acmd(char *, char *);
> +#endif
> +
> static const struct {
> const char *command;
> void (*dispatch)(char *cmd_parameter, char *response);
> @@ -99,6 +104,16 @@ static const struct {
> .dispatch = oem_format,
> },
> #endif
> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
> + [FASTBOOT_COMMAND_UCMD] = {
> + .command = "UCmd",
> + .dispatch = run_ucmd,
> + },
> + [FASTBOOT_COMMAND_ACMD] = {
> + .command = "ACmd",
> + .dispatch = run_acmd,
> + },
> +#endif
> };
>
> /**
> @@ -309,6 +324,53 @@ static void erase(char *cmd_parameter, char *response)
> }
> #endif
>
> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
> +/**
> + * run_ucmd() - Execute the UCmd command
> + *
> + * @cmd_parameter: Pointer to command parameter
> + * @response: Pointer to fastboot response buffer
> + */
> +static void run_ucmd(char *cmd_parameter, char *response)
> +{
> + if (!cmd_parameter) {
> + pr_err("missing slot suffix\n");
> + fastboot_fail("missing command", response);
> + return;
> + }
> +
> + if (run_command(cmd_parameter, 0))
> + fastboot_fail("", response);
> + else
> + fastboot_okay(NULL, response);
> +}
> +
> +static char g_a_cmd_buff[64];
> +
> +void fastboot_acmd_complete(void)
> +{
> + run_command(g_a_cmd_buff, 0);
> +}
> +
> +/**
> + * run_acmd() - Execute the ACmd command
Re: [PATCH 03/11] pinctrl: single: fix debug messages formatting
On 26/01/21 12:20PM, Dario Binacchi wrote:
> Hi Pratyush,
>
> > Il 25/01/2021 18:09 Pratyush Yadav ha scritto:
> >
> >
> > Hi Dario,
> >
> > On 23/01/21 07:27PM, Dario Binacchi wrote:
> > > The printf '%pa' format specifier appends the '0x' prefix to the
> > > displayed address. Furthermore, the offset variable is displayed with
> > > the '%x' format specifier instead of '%pa'.
> >
> > I agree with Simon that the commit message does not explain why this
> > change is needed.
> >
> > > Signed-off-by: Dario Binacchi
> > > ---
> > >
> > > drivers/pinctrl/pinctrl-single.c | 28
> > > 1 file changed, 16 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/drivers/pinctrl/pinctrl-single.c
> > > b/drivers/pinctrl/pinctrl-single.c
> > > index 49ed15211d..cec00e289c 100644
> > > --- a/drivers/pinctrl/pinctrl-single.c
> > > +++ b/drivers/pinctrl/pinctrl-single.c
> > > @@ -77,15 +77,17 @@ static int single_configure_pins(struct udevice *dev,
> > > struct single_pdata *pdata = dev_get_plat(dev);
> > > int n, count = size / sizeof(struct single_fdt_pin_cfg);
> > > phys_addr_t reg;
> > > - u32 val;
> > > + u32 offset, val;
> > >
> > > for (n = 0; n < count; n++, pins++) {
> > > - reg = fdt32_to_cpu(pins->reg);
> > > - if ((reg < 0) || (reg > pdata->offset)) {
> > > - dev_dbg(dev, " invalid register offset 0x%pa\n", ®);
> > > + offset = fdt32_to_cpu(pins->reg);
> > > + if (offset < 0 || offset > pdata->offset) {
> > > + dev_dbg(dev, " invalid register offset 0x%x\n",
> > > + offset);
> >
> > You are not just fixing "debug messages formatting" here. You have made
> > other changes to the structure of the code here. While these changes
> > might all be correct, they don't belong in a commit that claims to fix
> > message formatting.
> >
> > For example, this dev_dbg() statement in the pre-image prints "®" as
> > the offset. This would be the address of the variable reg on the stack.
> > This looks like it is a bug. The offset is stored in "reg", not in
> > "®". The post-image fixes this bug. A person reading this diff might
> > not look so closely at this because you only claim to change formatting.
> > And some important discussion/context on this bug might be skipped over.
> >
> > Please re-word the commit subject and message to clearly explain why you
> > are making these structural changes and separate them from the
> > formatting changes (which also warrant an explanation on their own).
> >
> > > continue;
> > > }
> > > - reg += pdata->base;
> > > +
> > > + reg = pdata->base + offset;
> > > val = fdt32_to_cpu(pins->val) & pdata->mask;
> > > switch (pdata->width) {
> > > case 16:
> > > @@ -99,7 +101,7 @@ static int single_configure_pins(struct udevice *dev,
> > >pdata->width);
> > > continue;
> > > }
> > > - dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", ®, val);
> > > + dev_dbg(dev, " reg/val %pa/0x%08x\n", ®, val);
> >
> > In a similar fashion as above, shouldn't "®" be replaced with "reg"?
> > I am not too familiar with the code to say for sure. Same for the
> > changes below.
> >
>
> Also I would have expected reg instead of ® but at the link
> https://www.kernel.org/doc/html/latest/core-api/printk-formats.html is
> explained:
> ...
> "Phys_addr_t Physical Address Types"
>
> %pa [p] 0x01234567 or 0x0123456789abcdef
> For printing a phys_addr_t type (and its derivatives, such as
> resource_size_t)
> which can vary based on build options, regardless of the width of the CPU
> data path.
>
> Passed by reference.
> ...
>
> I also did some tests on the board:
> dev_dbg(dev, " reg/val %pa/0x%08x\n", ®, val); --> reg/val
> 0x44e10940/0x0030
> dev_dbg(dev, " reg/val %p/0x%08x\n", reg, val); --> reg/val
> 44e10940/0x0030
>
> I'll continue to use the first one, which is documented.
Makes sense. Thanks for the explanation.
My comments about commit message and splitting out changes still hold.
If you think these changes should be in the same commit then please
explain why in the commit message.
> > > }
> > > return 0;
> > > }
> > > @@ -111,15 +113,17 @@ static int single_configure_bits(struct udevice
> > > *dev,
> > > struct single_pdata *pdata = dev_get_plat(dev);
> > > int n, count = size / sizeof(struct single_fdt_bits_cfg);
> > > phys_addr_t reg;
> > > - u32 val, mask;
> > > + u32 offset, val, mask;
> > >
> > > for (n = 0; n < count; n++, pins++) {
> > > - reg = fdt32_to_cpu(pins->reg);
> > > - if ((reg < 0) || (reg > pdata->offset)) {
> > > - dev_dbg(dev, " invalid register offset 0x%pa\n", ®);
> > > + offset = fdt32_to_cpu(pins->reg);
> > > + if (offset < 0 || offset > pdata->offset) {
> > > + dev_dbg(dev, " inva
Re: [PATCH] fastboot: add UUU command UCmd and ACmd support
Hi Heiko,
> Hello Tom,
>
> Am 26.01.21 um 12:46 schrieb Tom Rini:
> > On Tue, Jan 26, 2021 at 06:23:24AM +0100, Heiko Schocher wrote:
> >
> >> Hello Tom,
> >>
> >> this patch is assigned to you ... any issues with it, or can
> >> it go into master?
> >
> > As Lukasz is back and reviewing code and making PRs, he should take
> > it. Thanks.
>
> Ok, so I moved the patch in patchwork to Lukasz.
>
> Thanks!
>
> bye,
> Heiko
>
>
> >
> >>
> >> Thanks!
> >>
> >> bye,
> >> Heiko
> >>
> >> Am 11.01.21 um 11:19 schrieb Heiko Schocher:
> >>> add support for the UUU commands ACmd and UCmd.
> >>>
> >>> Enable them through the Kconfig option
> >>> CONFIG_FASTBOOT_UUU_SUPPORT
> >>>
> >>> base was commit in NXP kernel
> >>> 9b149c2a2882: ("MLK-18591-3 android: Add FSL android fastboot
> >>> support")
> >>>
> >>> and ported it to current mainline. Tested this patch
> >>> on imx6ul based board.
> >>>
> >>> Signed-off-by: Heiko Schocher
> >>> ---
> >>> azure build:
> >>> https://dev.azure.com/hs0298/hs/_build/results?buildId=57&view=results
> >>>
> >>> version uuu tool used for tests:
> >>> commit 3870fb781b35: ("fastboot: default to logical-block-size
> >>> 4096")
> >>>
> >>> doc/android/fastboot-protocol.rst | 5 +++
> >>> doc/android/fastboot.rst | 2 +
> >>> drivers/fastboot/Kconfig | 7
> >>> drivers/fastboot/fb_command.c | 62
> >>> +++ drivers/usb/gadget/f_fastboot.c
> >>> | 17 + include/fastboot.h| 7
> >>> 6 files changed, 100 insertions(+)
> >>>
> >>> diff --git a/doc/android/fastboot-protocol.rst
> >>> b/doc/android/fastboot-protocol.rst index
> >>> e723659e49c..e8cbd7f24ea 100644 ---
> >>> a/doc/android/fastboot-protocol.rst +++
> >>> b/doc/android/fastboot-protocol.rst @@ -144,6 +144,11 @@ Command
> >>> Reference
> >>>"powerdown" Power off the device.
> >>>
> >>> + "ucmd" execute any bootloader command and wait
> >>> until it
> >>> + finishs.
> >>> +
> >>> + "acmd" execute any bootloader command, do not
> >>> wait. +
> >>> Client Variables
> >>>
> >>>
> >>> diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
> >>> index 2877c3cbaaa..b58d1b5b31a 100644
> >>> --- a/doc/android/fastboot.rst
> >>> +++ b/doc/android/fastboot.rst
> >>> @@ -19,6 +19,8 @@ The current implementation supports the
> >>> following standard commands:
> >>> - ``reboot``
> >>> - ``reboot-bootloader``
> >>> - ``set_active`` (only a stub implementation which always
> >>> succeeds) +- ``ucmd`` (if enabled)
> >>> +- ``acmd`` (if enabled)
> >>>
> >>> The following OEM commands are supported (if enabled):
> >>>
> >>> diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
> >>> index 4352ba67a71..b1f8cd74a15 100644
> >>> --- a/drivers/fastboot/Kconfig
> >>> +++ b/drivers/fastboot/Kconfig
> >>> @@ -72,6 +72,13 @@ config FASTBOOT_FLASH
> >>> the downloaded image to a non-volatile storage device.
> >>> Define this to enable the "fastboot flash" command.
> >>>
> >>> +config FASTBOOT_UUU_SUPPORT
> >>> + bool "Enable FASTBOOT i.MX UUU special command"
> >>> + default y if ARCH_MX7 || ARCH_MX6 || ARCH_IMX8 ||
> >>> ARCH_IMX8M || ARCH_MX7ULP
> >>> + select FSL_FASTBOOT
> >>> + help
> >>> + The fastboot protocol includes "UCmd" command and
> >>> "ACmd" command +
> >>> choice
> >>> prompt "Flash provider for FASTBOOT"
> >>> depends on FASTBOOT_FLASH
> >>> diff --git a/drivers/fastboot/fb_command.c
> >>> b/drivers/fastboot/fb_command.c index d3c578672dc..31a47e46386
> >>> 100644 --- a/drivers/fastboot/fb_command.c
> >>> +++ b/drivers/fastboot/fb_command.c
> >>> @@ -43,6 +43,11 @@ static void reboot_recovery(char *, char *);
> >>> static void oem_format(char *, char *);
> >>> #endif
> >>>
> >>> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
> >>> +static void run_ucmd(char *, char *);
> >>> +static void run_acmd(char *, char *);
> >>> +#endif
> >>> +
> >>> static const struct {
> >>> const char *command;
> >>> void (*dispatch)(char *cmd_parameter, char *response);
> >>> @@ -99,6 +104,16 @@ static const struct {
> >>> .dispatch = oem_format,
> >>> },
> >>> #endif
> >>> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
> >>> + [FASTBOOT_COMMAND_UCMD] = {
> >>> + .command = "UCmd",
> >>> + .dispatch = run_ucmd,
> >>> + },
> >>> + [FASTBOOT_COMMAND_ACMD] = {
> >>> + .command = "ACmd",
> >>> + .dispatch = run_acmd,
> >>> + },
> >>> +#endif
> >>> };
> >>>
> >>> /**
> >>> @@ -309,6 +324,53 @@ static void erase(char *cmd_parameter, char
> >>> *response) }
> >>> #endif
> >>>
> >>> +#if CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT)
> >>> +/**
> >>> + * run_ucmd() - Execute the UCmd command
> >>> + *
> >>> + * @cmd_parameter: Pointer to command parameter
> >>> + * @response: Pointer to fastboot response buffer
> >>> + */
> >>> +static void run_ucmd(char *cmd_parameter, char *response)
> >>
RE: [PATCH v4 2/7] net: phy: introduce fixed_phy_create for DSA CPU ports
>-Original Message-
>From: Vladimir Oltean
>Sent: Monday, January 25, 2021 2:24 PM
>To: Tom Rini ; Joe Hershberger
>; Simon Glass ; Bin Meng
>; u-boot@lists.denx.de
>Cc: Michael Walle ; Alexandru Marginean
>; Claudiu Manoil
>
>Subject: [PATCH v4 2/7] net: phy: introduce fixed_phy_create for DSA CPU
>ports
>
>From: Vladimir Oltean
>
>The DSA (Distributed Switch Architecture) implementation has made a
>design decision when it got introduced to the Linux kernel in 2008.
>That was to hide away from the user the CPU-facing Ethernet MAC, since
>it does not make sense to register it as a struct net_device (UCLASS_ETH
>udevice for U-Boot), because that would never be beneficial for a user:
>they would not be able to use it for traffic, since conceptually, a
>packet delivered to the CPU port should loop back into the system.
>
>Nonetheless, DSA has had numerous growing pains due to the lack of a
>struct net_device for the CPU port, but so far it has overcome them.
>It is unlikely at this stage of maturity that this aspect of it will
>change.
>
>We would like U-Boot to present the same information as Linux, to be at
>parity in terms of number of interfaces, so that ethNaddr environment
>variables could directly be associated between U-Boot and Linux.
>Therefore, we would implicitly like U-Boot to hide the CPU port from the
>user as well.
>
>But the paradox is that DSA still needs a struct phy_device to inform
>the driver of the parameters of the link that it should configure the
>CPU port to. The problem is that the phy_device is typically returned
>via a call to phy_connect, which needs an udevice to attach the PHY to,
>and to search its ofnode for the 'fixed-link' property. But we don't
>have an udevice to present for the CPU port.
>
>Since 99% of DSA setups are MAC-to-MAC connections between the switch
>and the host Ethernet controller, the struct phy_device is going to be a
>fixed PHY. This simplifies things quite a bit. In U-Boot, a fixed PHY
>does not need an MDIO bus, and does not need an attached dev either.
>Basically, the phy_connect call doesn't do any connection, it just
>creates the fixed PHY.
>
>The proposal of this patch is to introduce a new fixed_phy_create
>function which will take a single argument: the ofnode that holds this:
>
> port@4 {
> reg = <4>;
> phy-mode = "internal";
>
> fixed-link {
> speed = <2500>;
> full-duplex;
> };
> };
>
>and probe a fixed PHY driver using the information from this ofnode.
>DSA will probably be the only user of this function.
>
>Signed-off-by: Vladimir Oltean
Reviewed-by: Claudiu Manoil
RE: [PATCH v4 1/7] net: phy: fixed: support speeds of 2500 and 10000
>-Original Message- >From: Vladimir Oltean >Sent: Monday, January 25, 2021 2:24 PM >To: Tom Rini ; Joe Hershberger >; Simon Glass ; Bin Meng >; u-boot@lists.denx.de >Cc: Michael Walle ; Alexandru Marginean >; Claudiu Manoil > >Subject: [PATCH v4 1/7] net: phy: fixed: support speeds of 2500 and 1 > >From: Vladimir Oltean > >Unlike the Linux fixed PHY driver, the one in U-Boot does not attempt to >emulate the clause 22 register set of a gigabit copper PHY driver >through the swphy framework. Therefore, the limitation of being unable >to support speeds higher than gigabit in fixed-link does not apply to >the U-Boot fixed PHY driver. This makes the fixed-link U-Boot >implementation more similar to the one from phylink, which can work with >any valid link speed. > >Signed-off-by: Vladimir Oltean Reviewed-by: Claudiu Manoil
