Re: Pull request for efi-2021-10-rc1-3
On Sat, Jul 24, 2021 at 12:04:34PM +0200, Heinrich Schuchardt wrote: > Dear Tom, > > The following changes since commit edecc15eb9593b94dcd6a5f4f5ea5f134125b6a0: > > Merge branch '2021-07-23-reboot-mode-and-cryptfs-passwd-support' > (2021-07-23 14:50:43 -0400) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-efi.git > tags/efi-2021-10-rc1-3 > > for you to fetch changes up to d75f48a83dc4998a49a4c35e80a9eab91566df30: > > MAINTAINERS: correct the path of UEFI docs (2021-07-24 10:49:51 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: using binman fails boot
Hi Tim,
On Fri, 23 Jul 2021 at 16:52, Tim Harvey wrote:
>
> On Fri, Jul 23, 2021 at 2:41 PM Simon Glass wrote:
> >
> > Hi Tim,
> >
> > On Fri, 23 Jul 2021 at 15:06, Tim Harvey wrote:
> > >
> > > On Thu, Jul 22, 2021 at 8:07 PM Simon Glass wrote:
> > > >
> > > > Hi Tim,
> > > >
> > > > On Mon, 19 Jul 2021 at 17:23, Tim Harvey wrote:
> > > > >
> > > > > On Sat, Jul 17, 2021 at 7:22 PM Simon Glass wrote:
> > > > > >
> > > >
> > > > [..]
> > > >
> > > > > > > But isn't blob-ext@4 a correct name? I can't use 'blob-ext-4' as
> > > > > > > that's an unknown entry type.
> > > > > >
> > > > > > Well you can use any name and specify the type:
> > > > > >
> > > > > > my-name {
> > > > > >type = "blob-ext";
> > > > > > };
> > > > > >
> > > > >
> > > > > Ok - I understand.
> > > > >
> > > > > > >
> > > > > > > >
> > > > > > > > If you can push your tree somewhere (with this problem) I'll
> > > > > > > > see if I
> > > > > > > > can figure out why.
> > > > > > > >
> > > > > > >
> > > > > > > Sure, I pushed it to
> > > > > > > https://github.com/Gateworks/uboot-venice/tree/WIP-venice-binman
> > > > > > > make imx8mm_venice_defconfig
> > > > > > > make
> > > > > >
> > > > > > OK
> > > > > >
> > > > > > >
> > > > > > > > >
> > > > > > > > > BINMAN_VERBOSE=4 indeed prints out a tone of stuff but I'm
> > > > > > > > > not seeing
> > > > > > > > > anything for 'blob' below that would seem to indicate one
> > > > > > > > > node name vs
> > > > > > > > > another:
> > > > > > > >
> > > > > > > > Oops you need BINMAN_VERBOSE=5 - see elf.py
> > > > > > > > LookupAndWriteSymbols()
> > > > > > > > which has tout.Debug() which is level 5.
> > > > > > > >
> > > > > > >
> > > > > > > LookupAndWriteSymbols ends up doing nothing because
> > > > > > > syms.get('__image_copy_start') returns None.
> > > > > >
> > > > > > Well that is likely the problem.
> > > >
> > > > I sent a patch to make binman report this as an error.
> > > >
> > > > I pushed the resulting tree to:
> > > >
> > > > https://github.com/sjg20/u-boot/tree/try-tim
> > > >
> > > > Now the error is:
> > > >
> > > > binman: Section '/binman/u-boot-spl-ddr': Symbol
> > > > '_binman_u_boot_any_prop_image_pos'
> > > >
> > > >in entry '/binman/u-boot-spl-ddr/u-boot-spl/u-boot-spl-nodtb':
> > > > Entry 'u-boot-any' not found in list
> > > > (u-boot-spl-nodtb,u-boot-spl-dtb,u-boot-spl,blob-ext@1,blob-ext@2,blob-ext@3,blob-ext@4,main-section)
> > > >
> > > > The problem seems to be that you are asking binman to generate three
> > > > independent images. U-Boot is in a FIT which is not in the same image
> > > > as SPL. So it is not possible to locate the flash offset of U-Boot
> > > > (with in the FIT).
> > > >
> > > > Can you give me a bit more info about your intent here? Is it to load
> > > > U-Boot from the FIT? I so, I suppose it is possible to make binman
> > > > access an independent image, if it is told where it starts.
> > > >
> > > > But why is everything not in one image?
> > > >
> > >
> > > Simon,
> > >
> > > I would rather have 1 image. I was going off of the imx8mm_evk switch
> > > to binman which creates the separate images.
> >
> > Well at present you are loading a FIT into RAM, I think? Is it coming
> > from flash?
> >
> > If you load a FIT containing U-Boot then you don't need the binman
> > symbol stuff, since SPL looks in the FIT for the location of U-Boot.
> > There isn't much benefit in having binman point to U-Boot within the
> > FIT, since we already have code to find it. It might save a few bytes
> > of code, but it would be confusing...I'm not sure if that is worth the
> > hassle.
> >
> > If you want a single image, then you might not want FIT at all...just
> > use binman.
> >
> > It really depends what you want.
>
> Maybe my terminology is all wrong or I'm not making myself clear. I'm
> trying to access data inside the SPL binary in board_init_f() 'before'
> the SPL has done anything at all with FIT.
>
> I'm using FIT because I have multiple board models (ie multiple DTB's)
> supported by a single U-Boot 'board'.
OK I see.
Well in that case the problem is the use of
CONFIG_SPL_RAW_IMAGE_SUPPORT which causes spl_set_header_raw_uboot()
to try to find U-Boot's binman symbol, which doesn't exist.
Also the naming of your sections need a tweak, as mentioned.
I've pushed a new trree to:
https://github.com/sjg20/u-boot/tree/try-tim
>
> So my boot goes like this:
> IMX8M BOOT ROM fetches flash.bin (SPL) from eMMC into OCRAM
> SPL configures PMIC and DRAM based on runtime detection of board model
> - at this point in time SPL is using a generic imx8mm-venice.dts
> that just supports i2c/uart2/emmc which are common to all venice
> boards
> - pmic config is done without dm because we don't have the
> board-specific dtb yet which defines the pmic
> - DRAM config is done based on eeprom bytes that specify the DRAM
> size/density/etc
> - DRAM config includes loading the 'blobs' to the M4 CPU - these are
> the blobs I want to locate in the
Re: [PATCH 1/2] GPIO: fxl6408: Add support for FXL6408 GPIO expander
Hi Oleksandr,
On Wed, 21 Jul 2021 at 06:21, Oleksandr Suvorov
wrote:
>
> Initial support for Fairchild's 8 bit I2C gpio expander FXL6408.
> The CONFIG_FXL6408_GPIO define enables support for such devices.
>
> Based on: https://patchwork.kernel.org/patch/9148419/
>
> Signed-off-by: Oleksandr Suvorov
> ---
>
> drivers/gpio/Kconfig| 7 +
> drivers/gpio/Makefile | 1 +
> drivers/gpio/gpio-fxl6408.c | 371
> 3 files changed, 379 insertions(+)
> create mode 100644 drivers/gpio/gpio-fxl6408.c
Reviewed-by: Simon Glass
Lots of nits below
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index 0817b12c5f..5883582a7f 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -123,6 +123,13 @@ config DA8XX_GPIO
> help
> This driver supports the DA8xx GPIO controller
>
> +config FXL6408_GPIO
> + bool "FXL6408 I2C GPIO driver"
> + depends on DM_GPIO && DM_I2C
> + help
> + Support for Fairchild Semiconductor FXL6408 I2C 8-bit GPIO
> + expander.
Please add some more details here.
[..]
> diff --git a/drivers/gpio/gpio-fxl6408.c b/drivers/gpio/gpio-fxl6408.c
> new file mode 100644
> index 00..282ec0a69c
> --- /dev/null
> +++ b/drivers/gpio/gpio-fxl6408.c
> @@ -0,0 +1,371 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2021 Toradex
> + * Copyright (C) 2016 Broadcom
> + */
> +
> +/**
> + * DOC: FXL6408 I2C to GPIO expander.
> + *
> + * This chip has 8 GPIO lines out of it, and is controlled by an I2C
> + * bus (a pair of lines), providing 4x expansion of GPIO lines. It
> + * also provides an interrupt line out for notifying of state changes.
> + *
> + * Any preconfigured state will be left in place until the GPIO lines
> + * get activated. At power on, everything is treated as an input,
> + * default input is HIGH and pulled-up, all interrupts are masked.
> + *
> + * Documentation can be found at:
> + * https://www.fairchildsemi.com/datasheets/FX/FXL6408.pdf
> + *
> + * This driver bases on:
> + * - the original driver by Eric Anholt :
> + * https://patchwork.kernel.org/patch/9148419/
> + * - the Toradex version by Max Krummenacher :
> + *
> http://git.toradex.com/cgit/linux-toradex.git/tree/drivers/gpio/gpio-fxl6408.c?h=toradex_5.4-2.3.x-imx
> + * - the U-boot PCA953x driver by Peng Fan :
> + * drivers/gpio/pca953x_gpio.c
> + *
> + * TODO: Add interrupts support
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define FXL6408_DEVID_CTRL 0x01
Do you need the FXL6408 prefix?
> +# define FXL6408_SW_RSTBIT(0)
> +# define FXL6408_RST_INT BIT(1)
> +
> +/* 3-bit manufacturer ID */
> +# define FXL6408_MF_MASK GENMASK(7, 5)
> +# define FXL6408_MF_ID(devid) (((devid) & FXL6408_MF_MASK) >> 5)
> +/* 0b101 is for Fairchild assigned by Nokia */
> +# define FXL6408_FAIRCHILD_MF 5
> +
> +/* 3-bit firmware revision */
> +# define FXL6408_FW_MASK GENMASK(4, 2)
> +# define FXL6408_FW_REV(devid) (((devid) & FXL6408_FW_MASK) >> 2)
This is only used once, so why not include that code inline below?
> +
> +/*
> + * Bits set here indicate that the GPIO is an output.
single-line comment style is /* ... */
> + */
> +#define FXL6408_DIRECTION 0x03
Then call it DIR_MASK ?
> +
> +enum {
> + FXL6408_DIRECTION_IN,
> + FXL6408_DIRECTION_OUT,
> +};
> +
> +/*
> + * Bits set here, when the corresponding bit of IO_DIR is set, drive
> + * the output high instead of low.
> + */
> +#define FXL6408_OUTPUT 0x05
> +
> +/*
> + * Bits here make the output High-Z, instead of the OUTPUT value.
> + */
> +#define FXL6408_OUTPUT_HIGH_Z 0x07
> +
> +/*
> + * Bits here define the expected input state of the GPIO.
> + * INTERRUPT_STATUS bits will be set when the INPUT transitions away
> + * from this value.
> + */
> +#define FXL6408_INPUT_DEF_STATE0x09
> +
> +/*
> + * Bits here enable either pull up or pull down according to
> + * INPUT_PULL_STATE.
> + */
> +#define FXL6408_INPUT_PULL_ENABLE 0x0b
> +
> +/*
> + * Bits set here selects a pull-up/pull-down state of pin, which
> + * is configured as Input and the corresponding PULL_ENABLE bit is
> + * set.
> + */
> +#define FXL6408_INPUT_PULL_STATE 0x0d
> +
> +/*
> + * Returns the current status (1 = HIGH) of the input pins.
> + */
> +#define FXL6408_INPUT 0x0f
> +
> +/*
> + * Mask of pins which can generate interrupts.
> + */
> +#define FXL6408_INTERRUPT_MASK 0x11
> +/*
> + * Mask of pins which have generated an interrupt.
> + * Cleared on read.
> + */
> +#define FXL6408_INTERRUPT_STATUS 0x13
> +
> +/*
> + * struct fxl6408_info - Data for fxl6408
> + *
> + * @dev: udevice structure for the device
> + * @addr: i2c slave address
Please check; these don't match the struct.
> + * @reg_output: hold the
[PATCH] sandbox: Reduce keyed autoboot delay
The autoboot tests are a recent addition to U-Boot, providing much-needed
coverage in this area.
A side effect of the keyed autoboot test is that this feature is enabled
in sandbox always. This changes the autoboot prompt and confuses the
pytests. Some tests become slower, for example the vboot tests take about
27s now instead of 3s.
We don't actually need this feature enabled to be able to run the tests.
Add a switch to allow sandbox to turn it on and off as needed. Use this
in the one test that needs it.
Add a command-line flag in case this is desired in normal use.
Signed-off-by: Simon Glass
Fixes: 25c8b9f298e ("test: add first autoboot unit tests")
---
arch/sandbox/cpu/start.c | 9
arch/sandbox/cpu/state.c | 18
arch/sandbox/include/asm/state.h | 1 +
common/autoboot.c| 6 +++---
include/autoboot.h | 36
test/common/test_autoboot.c | 6 ++
6 files changed, 73 insertions(+), 3 deletions(-)
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index 777db4e9522..a74f5ec7ba0 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -400,6 +400,15 @@ static int sandbox_cmdline_cb_signals(struct sandbox_state
*state,
SANDBOX_CMDLINE_OPT_SHORT(signals, 'S', 0,
"Handle signals (such as SIGSEGV) in sandbox");
+static int sandbox_cmdline_cb_autoboot_keyed(struct sandbox_state *state,
+const char *arg)
+{
+ state->autoboot_keyed = true;
+
+ return 0;
+}
+SANDBOX_CMDLINE_OPT(autoboot_keyed, 0, "Allow keyed autoboot");
+
static void setup_ram_buf(struct sandbox_state *state)
{
/* Zero the RAM buffer if we didn't read it, to keep valgrind happy */
diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c
index a4d99bade41..4e822538baf 100644
--- a/arch/sandbox/cpu/state.c
+++ b/arch/sandbox/cpu/state.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
#include
@@ -378,6 +379,23 @@ void state_reset_for_test(struct sandbox_state *state)
state->next_tag = state->ram_size;
}
+bool autoboot_keyed(void)
+{
+ struct sandbox_state *state = state_get_current();
+
+ return IS_ENABLED(CONFIG_AUTOBOOT_KEYED) && state->autoboot_keyed;
+}
+
+bool autoboot_set_keyed(bool autoboot_keyed)
+{
+ struct sandbox_state *state = state_get_current();
+ bool old_val = state->autoboot_keyed;
+
+ state->autoboot_keyed = autoboot_keyed;
+
+ return old_val;
+}
+
int state_init(void)
{
state = _state;
diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h
index 1c4c571e28d..10352a587e4 100644
--- a/arch/sandbox/include/asm/state.h
+++ b/arch/sandbox/include/asm/state.h
@@ -94,6 +94,7 @@ struct sandbox_state {
bool run_unittests; /* Run unit tests */
const char *select_unittests; /* Unit test to run */
bool handle_signals;/* Handle signals within sandbox */
+ bool autoboot_keyed;/* Use keyed-autoboot feature */
/* Pointer to information for each SPI bus/cs */
struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS]
diff --git a/common/autoboot.c b/common/autoboot.c
index 8b9e9aa8785..5bb2e190895 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -406,7 +406,7 @@ static int abortboot(int bootdelay)
int abort = 0;
if (bootdelay >= 0) {
- if (IS_ENABLED(CONFIG_AUTOBOOT_KEYED))
+ if (autoboot_keyed())
abort = abortboot_key_sequence(bootdelay);
else
abort = abortboot_single_key(bootdelay);
@@ -481,7 +481,7 @@ void autoboot_command(const char *s)
bool lock;
int prev;
- lock = IS_ENABLED(CONFIG_AUTOBOOT_KEYED) &&
+ lock = autoboot_keyed() &&
!IS_ENABLED(CONFIG_AUTOBOOT_KEYED_CTRLC);
if (lock)
prev = disable_ctrlc(1); /* disable Ctrl-C checking */
@@ -498,4 +498,4 @@ void autoboot_command(const char *s)
if (s)
run_command_list(s, -1, 0);
}
-}
\ No newline at end of file
+}
diff --git a/include/autoboot.h b/include/autoboot.h
index ac8157e5704..d6915dd0cc6 100644
--- a/include/autoboot.h
+++ b/include/autoboot.h
@@ -11,6 +11,42 @@
#ifndef __AUTOBOOT_H
#define __AUTOBOOT_H
+#include
+
+#ifdef CONFIG_SANDBOX
+
+/**
+ * autoboot_keyed() - check whether keyed autoboot should be used
+ *
+ * This is only implemented for sandbox since other platforms don't have a way
+ * of controlling the feature at runtime.
+ *
+ * @return true if enabled, false if not
+ */
+bool autoboot_keyed(void);
+
+/**
+ * autoboot_set_keyed() - set whether keyed autoboot should be used
+ *
+ * @autoboot_keyed: true to enable the feature, false to disable
+ *
Re: [PATCH v2 04/10] sandbox: tpm: Correct handling of get-capability
This function current handles the kernel case incorrectly. Fix it, and use the shorter TPM_HDR_LEN while we are here. Signed-off-by: Simon Glass --- (no changes since v1) drivers/tpm/tpm_tis_sandbox.c | 14 -- 1 file changed, 4 insertions(+), 10 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 02/10] sandbox: tpm: Tidy up reading and writing of device state
At present this code assumes that the TPM data has been read but this may not be the case. Refactor the code to use a separate pointer so we know the current state of the data. Add error checking for the data size. Signed-off-by: Simon Glass --- (no changes since v1) drivers/tpm/tpm_tis_sandbox.c | 35 --- 1 file changed, 24 insertions(+), 11 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 06/10] sandbox: tpm: Track whether the state is valid
Add checking as to whether the current TPM state is valid, so we can implement reading/writing the state. Signed-off-by: Simon Glass --- (no changes since v1) drivers/tpm/tpm2_tis_sandbox.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 01/10] sandbox: tpm: Split out common nvdata code
We want to support nvdata in TPM2 as well. To avoid code duplicating the associated code, move it into a common file. Drop the special-case logic for the kernel space. This can be handled by the higher-level code now, i.e. in vboot itself. Signed-off-by: Simon Glass --- (no changes since v1) drivers/tpm/Makefile | 4 +- drivers/tpm/sandbox_common.c | 66 drivers/tpm/sandbox_common.h | 96 + drivers/tpm/tpm_tis_sandbox.c | 111 +++--- 4 files changed, 172 insertions(+), 105 deletions(-) create mode 100644 drivers/tpm/sandbox_common.c create mode 100644 drivers/tpm/sandbox_common.h Applied to u-boot-dm, thanks!
Re: [PATCH] common: board_r: print error if binman_init fails
Hi Tim, On Fri, 16 Jul 2021 at 16:44, Tim Harvey wrote: > > Display an error if binman_init fails. > > Signed-off-by: Tim Harvey > --- > common/board_r.c | 8 +++- > 1 file changed, 7 insertions(+), 1 deletion(-) > Applied to u-boot-dm, thanks!
Re: [PATCH v2 08/10] sandbox: tpm: Support storing device state in tpm2
At present the tpm2 emulator does not support storing the device state. Add this so we can handle the normal vboot flow through the sandbox executables (VPL->SPL etc.) with the TPM contents staying in place. Note: sandbox has not yet been converted to use livetree for the state information, since livetree does not yet support writing to the tree. Signed-off-by: Simon Glass --- (no changes since v1) drivers/tpm/tpm2_tis_sandbox.c | 139 + 1 file changed, 139 insertions(+) Applied to u-boot-dm, thanks!
Re: [PATCH v2 03/10] sandbox: tpm: Support the define-space command
Add support for this command, moving away from the previous approach of hard-coding the initial data in the driver, now that the kernel-space data has to be set up by the higher-level vboot code. Signed-off-by: Simon Glass --- (no changes since v1) drivers/tpm/sandbox_common.c | 11 +++ drivers/tpm/sandbox_common.h | 12 drivers/tpm/tpm_tis_sandbox.c | 11 +++ 3 files changed, 34 insertions(+) Applied to u-boot-dm, thanks!
Re: [PATCH v2 07/10] sandbox: tpm: Support nvdata in TPM2
Add support for this feature in the TPM2 emulator, to support Chromium OS vboot. Signed-off-by: Simon Glass --- (no changes since v1) drivers/tpm/tpm2_tis_sandbox.c | 68 ++ include/tpm-v2.h | 2 + 2 files changed, 70 insertions(+) Applied to u-boot-dm, thanks!
Re: [PATCH v2 05/10] sandbox: tpm: Finish comments for struct sandbox_tpm2
Tidy up the missing comments for this struct. Signed-off-by: Simon Glass --- (no changes since v1) drivers/tpm/tpm2_tis_sandbox.c | 20 1 file changed, 16 insertions(+), 4 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH 1/2] fdt: Tidy up the code a bit with fdt addr
Clean up the code a little before changing it. Signed-off-by: Simon Glass --- cmd/fdt.c | 37 + 1 file changed, 13 insertions(+), 24 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 10/10] sandbox: tpm: Support extending a PCR multiple times
It is fairly easy to handle this case and it makes the emulator more useful, since PCRs are commonly extended several times. Add support for this, using U-Boot's sha256 support. For now sandbox only supports a single PCR, but that is enough for the tests that currently exist. Signed-off-by: Simon Glass --- Changes in v2: - Drop the constant sandbox_extended_once_pcr since we can calculate it - Update the commit message to explain that there is only one PCR drivers/tpm/tpm2_tis_sandbox.c | 24 ++-- test/py/tests/test_tpm2.py | 18 +- 2 files changed, 27 insertions(+), 15 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 09/10] sandbox: tpm: Correct handling of SANDBOX_TPM_PCR_NB
This is the number of PCRs, so the current check is off by one. Also the map itself should not be checked, just the resulting pcr_index, to avoid confusing people who read the code. Fix these problems. Signed-off-by: Simon Glass --- Changes in v2: - Add new patch to correct handling of SANDBOX_TPM_PCR_NB drivers/tpm/tpm2_tis_sandbox.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH 2/2] fdt: Show the type of devicetree with fdt addr
It seems useful to show whether the address of the Control or Working devicetree is being shown. Add support for this. Drop the confusing 0x prefix since the command itself only accepts hex. Signed-off-by: Simon Glass --- cmd/fdt.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2] patman: add warning for invalid tag
On Thu, 22 Jul 2021 at 08:51, Patrick Delaunay wrote: > > Add a error in patman tool when the commit message contents an invalid > tag "Serie-.*" instead of "Series-.*". > > Signed-off-by: Patrick Delaunay > > --- > I create this patch to avoid my frequent mistake: > using "Serie-" tag instead of "Series-" as it is done in [1]. > > RE_INV_TAG can be extended to other frequent errors. > > Any "Serie-" tag is refused with the patch, for example: > > ValueError: Line 28: Invalid tag = >'Serie-cc: Marek Behún ' > > [1] > http://patchwork.ozlabs.org/project/uboot/patch/20210720203353.1.I550b95f6d12d59aeef5b744d837dbb360037d39e@changeid/ > > > Changes in v2: > - add patman test testInvalidTag > > tools/patman/func_test.py | 11 +++ > tools/patman/patchstream.py | 9 + > 2 files changed, 20 insertions(+) > Reviewed-by: Simon Glass Applied to u-boot-dm, thanks!
Re: [PATCH] command: Fix SMC and HVC maximum number of arguments
On Thu, Jul 15, 2021 at 12:38:54PM +0800, Siew Chin Lim wrote: > smc and hvc commands take upto 8 user input arguments, the maximum > number of arguments of the U_BOOT_CMD macro should set to 9. > > Besides, fix the typo (arg7 -> arg6) in hvc command's help message. > > Signed-off-by: Siew Chin Lim > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] serial: serial_msm: Delay initialization to let pins stabilize
On Wed, Jul 14, 2021 at 10:56:26AM +0200, Stephan Gerhold wrote: > For some reason, the DragonBoard 410c aborts autoboot immediately if > U-Boot is started without LK. It looks like it picks up a single broken > character via serial and therefore believes a key was pressed to abort > autoboot. > > After some debugging, it seems like adding some delay after pinctrl > setup but before UART initialization fixes the issue. It's also worth > mentioning that unlike when booting from LK, the pinctrl setup is > actually necessary when booting U-Boot without LK since UART is broken > if the pinctrl line is removed. > > I suspect that reconfiguring the pins might take some time to stabilize > and if the UART controller is enabled too quickly it will pick up some > random noise. Adding a few milliseconds of delay fixes the issue and > shouldn't have any other negative side effects. > > 3ms seems to be the minimum delay required in my tests, use 5ms instead > just to be sure. > > Signed-off-by: Stephan Gerhold Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] board: dragonboard410c: Fix PHYS_SDRAM_1_SIZE
On Wed, Jul 14, 2021 at 10:56:24AM +0200, Stephan Gerhold wrote:
> The DragonBoard 410c has proprietary firmware from Qualcomm that
> reserves 8 MiB of memory for tz/smem/hyp/rmtfs/rfsa from 0x8600
> to 0x8680. I'm not aware of any ATF (ARM Trusted Firmware) port
> for DB410c that would reserve 30 MiB of memory at the end of RAM.
> I suspect the comment might have been copied from hikey.h which has
> a very similar comment (and which actually does have an ATF port).
>
> Reducing the memory size just prevents U-Boot from using the end of
> the RAM, not the reserved region inbetween. Therefore we might as well
> display the correct DRAM size (1 GiB) instead of strange 986 MiB.
>
> Fixes: 626f048bbc14 ("board: Add Qualcomm Dragonboard 410C support")
> Signed-off-by: Stephan Gerhold
> Reviewed-by: Ramon Fried
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH v2] serial: pl011: Resend the character if FIFO is full in debug uart
On Mon, Jul 19, 2021 at 03:36:04PM +0800, Chen Baozi wrote: > pl01x_putc() might return -EAGAIN if there was no space in FIFO. In that > case, high-level caller should wait until there is space and resend the > character. > > Signed-off-by: Chen Baozi > Reviewed-by: Stefan Roese > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] reset: ast2600: Fix missing reference operator
On Tue, Jul 20, 2021 at 03:01:36PM +0800, Chia-Wei Wang wrote: > Fix missing reference operator '&' to correctly get > HW register addresses for writel(). > > Signed-off-by: Chia-Wei Wang Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3] serial: pl011: Enable DEBUG_UART_PL011 in SPL
On Wed, Jul 21, 2021 at 02:11:26PM +0800, Chen Baozi wrote:
> Commit b81406db51a6 ("arm: serial: Add debug UART capability to the
> pl01x driver") add supports to use pl01x as a debug UART. However,
> due to CONFIG_IS_ENABLED macro requires CONFIG_SPL_* prefix, the
> _debug_uart_init() would not choose TYPE_PL011 in SPL build. This
> patch fixes the bug by judging CONFIG_DEBUG_UART_PL011 explicitly.
>
> Signed-off-by: Chen Baozi
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH 2/3] board: dragonboard410c: Fix fastboot
On Wed, Jul 14, 2021 at 10:56:25AM +0200, Stephan Gerhold wrote:
> At the moment pressing the volume down key does not actually launch
> fastboot. This is because setting "bootdelay" to "-1" actually
> disables autoboot and drops to the U-Boot console. It does not execute
> the "bootcmd".
>
> The correct value for "bootdelay" here would be "-2", which disables
> the delay and key checking and would immediately execute the "bootcmd".
>
> However, even better in this case is using "preboot" to trigger Fastboot.
> The advantage is that running "fastboot continue" will actually continue
> the autoboot process instead of ending up in the U-Boot shell.
>
> Also make sure to unset "preboot" again immediately in case the user
> saves the environment after triggering fastboot.
>
> Cc: Ramon Fried
> Fixes: aa043ee91a47 ("db410c: automatically launch fastboot")
> Signed-off-by: Stephan Gerhold
> Reviewed-by: Ramon Fried
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] armv8: Initialize CNTFRQ if at highest exception level
On Mon, Jul 12, 2021 at 03:04:21PM +0100, Peter Hoyes wrote: > From: Peter Hoyes > > CNTFRQ_EL0 is only writable from the highest supported exception > level on the platform. For Armv8-A, this is typically EL3, but > technically EL2 and EL3 are optional so it may need to be > initialized at EL2 or EL1. For Armv8-R, the highest exception > level is always EL2. > > This patch moves the initialization outside of the switch_el > block and uses a new macro branch_if_not_highest_el which > dynamically detects whether it is at the highest supported > exception level. > > Linux's docs state that CNTFRQ_EL0 should be initialized by the > bootloader. If not set, the the U-Boot prompt countdown hangs. > > Signed-off-by: Peter Hoyes Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 8/8] configs: synquacer: Ignore OsIndications on DeveloperBox
On Mon, Jul 12, 2021 at 07:36:49PM +0900, Masami Hiramatsu wrote: > Since we can not set OsIndications from Runtime Services > SetVariables at this moment, it is better to ignore the > OsIndications if there is any capsule file in the > correct place. > > Signed-off-by: Masami Hiramatsu Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 7/8] configs: synquacer: Use RAW capsule image instead of FIT
On Mon, Jul 12, 2021 at 07:36:39PM +0900, Masami Hiramatsu wrote:
> Since the recent commit;
>
> commit b891ff18f899 ("efi_loader: Force a single FMP instance per hardware
> store")
>
> forces a single FMP instances for a storage, we can not
> enable both RAW and FIT capsule image support at once.
> Since RAW capsule image support is simpler than FIT,
> enable RAW capsule image instead of FIT by default.
>
> Signed-off-by: Masami Hiramatsu
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH v3 6/8] configs: synquacer: Enable UEFI secure boot
On Mon, Jul 12, 2021 at 07:36:30PM +0900, Masami Hiramatsu wrote: > Enable UEFI secure boot on synquacer. Note that unless user > setup their keys, the secure boot will not work. > > Signed-off-by: Masami Hiramatsu Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 5/8] configs: synquacer: Drop Ext2/4 support by default
On Mon, Jul 12, 2021 at 07:36:21PM +0900, Masami Hiramatsu wrote: > Since the U-Boot for the SynQuacer DeveloperBox is designed for > compatible with EDK2 boot, we don't need to support Ext2/4 fs > support by default. Drop it. > > Signed-off-by: Masami Hiramatsu Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 4/8] configs: synquacer: Remove mtdparts settings and update DFU setting
On Mon, Jul 12, 2021 at 07:36:12PM +0900, Masami Hiramatsu wrote: > Since MTD partitions are based on the devicetree name, > remove unneeded mtdparts settings and update DFU setting. > > Signed-off-by: Masami Hiramatsu Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 3/8] dts: synquacer: Add partition information to the spi-nor
On Mon, Jul 12, 2021 at 07:36:03PM +0900, Masami Hiramatsu wrote: > Add partition information to the spi-nor flash. > This is required for accessing NOR flash via mtdparts. > > Signed-off-by: Masami Hiramatsu > Reviewed-by: Marek Behún Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 2/8] configs: synquacer: Make U-Boot binary position independent
On Mon, Jul 12, 2021 at 07:35:54PM +0900, Masami Hiramatsu wrote: > Make the U-Boot binary for SynQuacer position independent so > that the previous bootloader (SCP firmware or BL2) can load > the U-Boot anywhere. > > Signed-off-by: Masami Hiramatsu Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 1/8] board: synquacer: Initialize SCBM SMMU at board_init()
On Mon, Jul 12, 2021 at 07:35:44PM +0900, Masami Hiramatsu wrote: > Since the SCBM SMMU is not only connected to the NETSEC > but also shared with the F_SDH30 (eMMC controller), that > should be initialized at board level instead of NETSEC. > > Move the SMMU initialization code into board support > and call it from board_init(). > > Without this fix, if the NETSEC is disabled, the Linux > eMMC ADMA cause an error because SMMU is not initialized. > > Signed-off-by: Masami Hiramatsu Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] board: dragonboard410c: Load U-Boot directly without LK
On Wed, Jul 07, 2021 at 11:06:02AM +0200, Stephan Gerhold wrote: > At the moment the U-Boot port for the DragonBoard 410c is designed > to be loaded as an Android boot image after Qualcomm's Little Kernel (LK) > bootloader. This is simple to set up but LK is redundant in this case, > since everything done by LK can be also done directly by U-Boot. > > Dropping LK entirely has at least the following advantages: > - Easier installation/board code (no need for Android boot images) > - (Slightly) faster boot > - Boot directly in 64-bit without a round trip to 32-bit for LK > > So far this was not possible yet because of unsolved problems: > > 1. Signing tool: The firmware expects a "signed" ELF image with extra > (Qualcomm-specific) ELF headers, usually used for secure boot. > The DragonBoard 410c does not have secure boot by default but the > extra ELF headers are still required. > > 2. PSCI bug: There seems to be a bug in the PSCI implementation > (part of the TrustZone/tz firmware) that causes all other CPU cores > to be started in 32-bit mode if LK is missing in the boot chain. > This causes Linux to hang early during boot. > > There is a solution for both problems now: > > 1. qtestsign (https://github.com/msm8916-mainline/qtestsign) > can be used as a "signing" tool for U-Boot and other firmware. > > 2. A workaround for the "PSCI bug" is to execute the TZ syscall when > entering U-Boot. That way PSCI is made aware of the 64-bit switch > and starts all other CPU cores in 64-bit mode as well. > > Simplify the dragonboard410c board by removing all the extra code that > is only used to build an Android boot image that can be loaded by LK. > This allows dropping the custom linker script, special image magic, > as well as most of the special build/installation instructions. > > CONFIG_REMAKE_ELF is used to build a new ELF image that has both U-Boot > and the appended DTB combined. The resulting u-boot.elf can then be > passed to the "signing" tool (e.g. qtestsign). > > The PSCI workaround is placed in the "boot0" hook that is enabled > with CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK. The extra check for EL1 allows > compatibility with custom firmware that enters U-Boot in EL2 or EL3, > e.g. qhypstub (https://github.com/msm8916-mainline/qhypstub). > > As a first step these changes apply only to DragonBoard410c. > Similar changes could likely also work for the DragonBoard 820c. > > Note that removing LK wouldn't be possible that easily without a lot of > work already done three years ago by Ramon Fried. A lot of missing > initialization, pinctrl etc was already added back then even though > it was not strictly needed yet. > > Cc: Ramon Fried > Signed-off-by: Stephan Gerhold Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] Revert "spi: spi-uclass: Add support to manually relocate spi memory ops"
On Sat, Jul 24, 2021 at 11:03 AM Tom Rini wrote: > > On Fri, Jul 23, 2021 at 10:49:39PM -0500, Dennis Gilmore wrote: > > On Fri, Jul 23, 2021 at 10:25 PM Tom Rini wrote: > > > > > > On Fri, Jul 23, 2021 at 09:46:44PM -0500, Dennis Gilmore wrote: > > > > > > > removing the header is not sufficient to have the boards booting from > > > > SPI. > > > > > > > > U-Boot TPL 2021.07-00768-g49373a3334-dirty (Jul 23 2021 - 20:42:57) > > > > Channel 0: LPDDR4, 50MHz > > > > BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB > > > > Channel 1: LPDDR4, 50MHz > > > > BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB > > > > 256B stride > > > > lpddr4_set_rate: change freq to 4 mhz 0, 1 > > > > lpddr4_set_rate: change freq to 8 mhz 1, 0 > > > > Trying to boot from BOOTROM > > > > Returning to boot ROM... > > > > > > > > U-Boot SPL 2021.07-00768-g49373a3334-dirty (Jul 23 2021 - 20:42:57 > > > > -0500) > > > > Trying to boot from SPI > > > > > > > > At this point u-boot hangs, with the patch reverted I get the following > > > > U-Boot TPL 2021.07-00769-g4af8bd872c-dirty (Jul 23 2021 - 21:20:51) > > > > Channel 0: LPDDR4, 50MHz > > > > BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB > > > > Channel 1: LPDDR4, 50MHz > > > > BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB > > > > 256B stride > > > > lpddr4_set_rate: change freq to 4 mhz 0, 1 > > > > lpddr4_set_rate: change freq to 8 mhz 1, 0 > > > > Trying to boot from BOOTROM > > > > Returning to boot ROM... > > > > > > > > U-Boot SPL 2021.07-00769-g4af8bd872c-dirty (Jul 23 2021 - 21:20:51 > > > > -0500) > > > > Trying to boot from SPI > > > > > > > > > > > > U-Boot 2021.07-00769-g4af8bd872c-dirty (Jul 23 2021 - 21:20:51 -0500) > > > > > > > > SoC: Rockchip rk3399 > > > > Reset cause: RST > > > > Model: Kobol Helios64 > > > > Revision: 0.0 - Unknown > > > > DRAM: 3.9 GiB > > > > PMIC: RK808 > > > > MMC: mmc@fe32: 1, mmc@fe33: 0 > > > > Loading Environment from SPIFlash... SF: Detected w25q128 with page > > > > size 256 Bytes, erase size 4 KiB, total 16 MiB > > > > *** Warning - bad CRC, using default environment > > > > > > > > In:serial@ff1a > > > > Out: serial@ff1a > > > > Err: serial@ff1a > > > > Model: Kobol Helios64 > > > > Revision: UNKNOWN > > > > Net: dw_dm_mdio_init: mdio node is missing, registering legacy mdio > > > > busNo ethernet found. > > > > > > > > starting USB... > > > > Bus usb@fe90: usb maximum-speed not found > > > > Register 2000140 NbrPorts 2 > > > > Starting the controller > > > > USB XHCI 1.10 > > > > scanning bus usb@fe90 for devices... 2 USB Device(s) found > > > >scanning usb for storage devices... 0 Storage Device(s) found > > > > Hit any key to stop autoboot: 0 > > > > switch to partitions #0, OK > > > > mmc0(part 0) is current device > > > > ** No partition table - mmc 0 ** > > > > Couldn't find partition mmc 0:1 > > > > switch to partitions #0, OK > > > > mmc1 is current device > > > > Scanning mmc 1:1... > > > > Scanning disk m...@fe32.blk... > > > > Scanning disk m...@fe33.blk... > > > > ** Unrecognized filesystem type ** > > > > Found 5 disks > > > > dw_dm_mdio_init: mdio node is missing, registering legacy mdio > > > > busdw_dm_mdio_init: mdio node is missing, registering legacy mdio > > > > busLoading Boot 'Fedora' failed > > > > EFI boot manager: Cannot load any image > > > > Found EFI removable media binary efi/boot/bootaa64.efi > > > > > > Is LTO on, on these platforms? That code in question really should not > > > be enabled, at all. Like, if you toss an #error in that section of > > > code, it should still build. It does, right? > > > > It does still build if I put a #error in the middle of it > > > > $ grep LTO .config > > CONFIG_ARCH_SUPPORTS_LTO=y > > # CONFIG_LTO is not set > > > > > > LTO is not on > > OK, so progress. What toolchain are you using here? And can you easily > re-test with one of the kernel.org ones, or if using one already 9.2.0 > (or 11.1.0) ? I have been using gcc 10.2.1, I will test with 11.1.1 Dennis > -- > Tom
[RESEND PATCH 11/16] imx: ventana: use dt for hwmon
Use dt-bindings for GSC hwmon devices.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/gsc.c | 172 ---
1 file changed, 113 insertions(+), 59 deletions(-)
diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index ffed6b5fc8..443ecea572 100644
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -15,10 +15,13 @@
#include
#include
+#include
#include "ventana_eeprom.h"
#include "gsc.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* The Gateworks System Controller will fail to ACK a master transaction if
* it is busy, which can occur during its 1HZ timer tick while reading ADC's.
@@ -65,24 +68,116 @@ int gsc_i2c_write(uchar chip, uint addr, int alen, uchar
*buf, int len)
return ret;
}
-static void read_hwmon(const char *name, uint reg, uint size)
+int gsc_get_board_temp(void)
{
- unsigned char buf[3];
- uint ui;
+ const void *fdt = gd->fdt_blob;
+ int node, reg, mode, val;
+ const char *label;
+ u8 buf[2];
+ int ret;
- printf("%-8s:", name);
- memset(buf, 0, sizeof(buf));
- if (gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, size)) {
- puts("fRD\n");
- } else {
- ui = buf[0] | (buf[1]<<8) | (buf[2]<<16);
- if (size == 2 && ui > 0x8000)
- ui -= 0x;
- if (ui == 0xff)
- puts("invalid\n");
- else
- printf("%d\n", ui);
+ node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
+ if (node <= 0)
+ return node;
+ i2c_set_bus_num(0);
+
+ /* iterate over hwmon nodes */
+ node = fdt_first_subnode(fdt, node);
+ while (node > 0) {
+ reg = fdtdec_get_int(fdt, node, "reg", -1);
+ mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
+ label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
+
+ if ((reg == -1) || (mode == -1) || !label) {
+ printf("invalid dt:%s\n", fdt_get_name(fdt, node,
NULL));
+ continue;
+ }
+
+ if ((mode != 0) || strcmp(label, "temp"))
+ continue;
+
+ memset(buf, 0, sizeof(buf));
+ ret = gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, sizeof(buf));
+ val = buf[0] | buf[1] << 8;
+ if (val >= 0) {
+ if (val > 0x8000)
+ val -= 0x;
+ return val;
+ }
+ node = fdt_next_subnode(fdt, node);
}
+
+ return 0;
+}
+
+/* display hardware monitor ADC channels */
+int gsc_hwmon(void)
+{
+ const void *fdt = gd->fdt_blob;
+ int node, reg, mode, len, val, offset;
+ const char *label;
+ u8 buf[2];
+ int ret;
+
+ node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
+ if (node <= 0)
+ return node;
+ i2c_set_bus_num(0);
+
+ /* iterate over hwmon nodes */
+ node = fdt_first_subnode(fdt, node);
+ while (node > 0) {
+ reg = fdtdec_get_int(fdt, node, "reg", -1);
+ mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
+ offset = fdtdec_get_int(fdt, node,
"gw,voltage-offset-microvolt", 0);
+ label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
+
+ if ((reg == -1) || (mode == -1) || !label)
+ printf("invalid dt:%s\n", fdt_get_name(fdt, node,
NULL));
+
+ memset(buf, 0, sizeof(buf));
+ ret = gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, sizeof(buf));
+ val = buf[0] | buf[1] << 8;
+ if (val >= 0) {
+ const u32 *div;
+ int r[2];
+
+ switch (mode) {
+ case 0: /* temperature (C*10) */
+ if (val > 0x8000)
+ val -= 0x;
+ printf("%-8s: %d.%ldC\n", label, val / 10,
abs(val % 10));
+ break;
+ case 1: /* prescaled voltage */
+ if (val != 0x)
+ printf("%-8s: %d.%03dV\n", label, val /
1000, val % 1000);
+ break;
+ case 2: /* scaled based on ref volt and resolution */
+ val *= 2500;
+ val /= 1 << 12;
+
+ /* apply pre-scaler voltage divider */
+ div = fdt_getprop(fdt, node,
"gw,voltage-divider-ohms", );
+ if (div && (len == sizeof(uint32_t) * 2)) {
+ r[0] = fdt32_to_cpu(div[0]);
+
[RESEND PATCH 16/16] imx: ventana: add support for GW54xx-G revision
The GW54xx-G revision has the foolowing changes:
- replaces the EOL GbE PHY with an updated part (requires an enable pin)
- replaces the EOL analog video decoder with an updated part
(requires dt prop)
- add power control to miniPCIe socket
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index 65e4de1dee..9e53765ef5 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -256,6 +256,10 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
+ /* J7_PWREN */
+ IOMUX_PADS(PAD_EIM_DA15__GPIO3_IO15 | DIO_PAD_CFG),
+ /* PCIEGBE_EN */
+ IOMUX_PADS(PAD_EIM_DA14__GPIO3_IO14 | DIO_PAD_CFG),
};
static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
@@ -1236,6 +1240,12 @@ void setup_iomux_gpio(int board, struct
ventana_board_info *info)
gpio_request(IMX_GPIO_NR(3, 14), "gbe_en");
gpio_direction_output(IMX_GPIO_NR(3, 14), 1);
break;
+ case GW54xx:
+ gpio_request(IMX_GPIO_NR(3, 15), "j7_pwren");
+ gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
+ gpio_request(IMX_GPIO_NR(3, 14), "gbe_en");
+ gpio_direction_output(IMX_GPIO_NR(3, 14), 1);
+ break;
case GW560x:
gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
@@ -1677,6 +1687,15 @@ void ft_early_fixup(void *blob, int board_type)
/* GW54xx-E adds WDOG2_B external reset */
if (rev < 'E')
ft_board_wdog_fixup(blob, WDOG2_ADDR);
+
+ /* GW54xx-G has an adv7280 instead of an adv7180 */
+ else if (rev > 'F') {
+ i = fdt_node_offset_by_compatible(blob, -1,
"adi,adv7180");
+ if (i) {
+ fdt_setprop_string(blob, i, "compatible",
"adi,adv7280");
+ fdt_setprop_empty(blob, i, "adv,force-bt656-4");
+ }
+ }
break;
case GW551x:
--
2.17.1
[RESEND PATCH 14/16] imx: ventana: add GW5913 support
The GW5913 is a Single Board Computer based on the NXP i.MX6Q/DL SoC
with the following features:
- DDR3 DRAM
- NAND FLASH (256MiB or 2048MiB)
- Gateworks System Periperhal Controller
- front panel LED's
- front panel pushbutton
- Digital I/O connector (I2C/GPIO/UART)
- u-blox Zoe-M8Q GPS
- 1x RJ45 GbE
- 1x MiniPCIe socket with PCIe USB 2.0 and nanoSIM socket
- Passive PoE and wide-range DC power supply
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 54 +
board/gateworks/gw_ventana/eeprom.c | 2 +
board/gateworks/gw_ventana/ventana_eeprom.h | 1 +
3 files changed, 57 insertions(+)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index 3a0b18672f..a4c2f5549f 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -843,6 +843,51 @@ struct dio_cfg gw5906_dio[] = {
},
};
+struct dio_cfg gw5913_dio[] = {
+ {
+ { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+ IMX_GPIO_NR(1, 16),
+ { 0, 0 },
+ 0
+ },
+ {
+ { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+ IMX_GPIO_NR(1, 19),
+ { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+ 2
+ },
+ {
+ { IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+ IMX_GPIO_NR(1, 17),
+ { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+ 3
+ },
+ {
+ { IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) },
+ IMX_GPIO_NR(1, 18),
+ { IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) },
+ 4
+ },
+ {
+ { IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15) },
+ IMX_GPIO_NR(1, 15),
+ { 0, 0 },
+ 0
+ },
+ {
+ { IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14) },
+ IMX_GPIO_NR(1, 14),
+ { 0, 0 },
+ 0
+ },
+ {
+ { IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05) },
+ IMX_GPIO_NR(4, 5),
+ { 0, 0 },
+ 0
+ },
+};
+
/*
* Board Specific GPIO
*/
@@ -1082,6 +1127,15 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.vsel_pin = IMX_GPIO_NR(6, 14),
.mmc_cd = IMX_GPIO_NR(7, 0),
},
+
+ /* GW5913 */
+ {
+ .gpio_pads = gw5912_gpio_pads,
+ .num_pads = ARRAY_SIZE(gw5912_gpio_pads) / 2,
+ .dio_cfg = gw5913_dio,
+ .dio_num = ARRAY_SIZE(gw5913_dio),
+ .wdis = IMX_GPIO_NR(1, 0),
+ },
};
#define SETUP_GPIO_OUTPUT(gpio, name, level) \
diff --git a/board/gateworks/gw_ventana/eeprom.c
b/board/gateworks/gw_ventana/eeprom.c
index a4f3065c7d..d21aa3c38f 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -128,6 +128,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
type = GW5910;
else if (info->model[4] == '1' && info->model[5] == '2')
type = GW5912;
+ else if (info->model[4] == '1' && info->model[5] == '3')
+ type = GW5913;
break;
default:
printf("EEPROM: Unknown model in EEPROM: %s\n", info->model);
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h
b/board/gateworks/gw_ventana/ventana_eeprom.h
index 9cac4a769c..2d5c27261e 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -123,6 +123,7 @@ enum {
GW5909,
GW5910,
GW5912,
+ GW5913,
GW_UNKNOWN,
GW_BADCRC,
};
--
2.17.1
[RESEND PATCH 12/16] imx: ventana: add GW5910 support
The GW5910 is a Single Board Computer based on the NXP i.MX6Q/DL SoC
with the following features:
- DDR3 DRAM
- NAND FLASH (256MiB or 2048MiB)
- microSD socket
- Gateworks System Periperhal Controller
- front panel LED's
- front panel pushbutton
- RS232 connector (2x UARTs)
- Digital I/O connector (I2C/GPIO)
- SPI connector
- u-blox Zoe-M8Q GPS
- LIS2DE12 Accellerometer
- TI CC1352 ARM Cortex-M4 multiprotocol sub-1GHz / 2.4GHz wireless MCU
- On-board brcmfmac WiFi and BT module
- RGMII RJ45 GbE
- 1x MiniPCIe socket with PCIe/USB 2.0
- 1x MiniPCIe socket with USB 2.0 and nanoSIM socket
- Passive PoE and wide-range DC power supply
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 47 +
board/gateworks/gw_ventana/eeprom.c | 2 +
board/gateworks/gw_ventana/ventana_eeprom.h | 1 +
3 files changed, 50 insertions(+)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index f7819f841c..270c4cf3a3 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
#include "common.h"
@@ -420,6 +421,19 @@ static iomux_v3_cfg_t const gw5905_gpio_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
};
+static iomux_v3_cfg_t const gw5910_gpio_pads[] = {
+ /* SD3_VSELECT */
+ IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
+ /* RS232_EN# */
+ IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
+ /* RF_RESET# */
+ IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
+ /* RF_BOOT */
+ IOMUX_PADS(PAD_GPIO_8__GPIO1_IO08 | DIO_PAD_CFG),
+ /* PCIESKT_WDIS# */
+ IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+};
+
/* Digital I/O */
struct dio_cfg gw51xx_dio[] = {
{
@@ -1029,6 +1043,18 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.mezz_pwren = IMX_GPIO_NR(2, 19),
.mezz_irq = IMX_GPIO_NR(2, 18),
},
+
+ /* GW5910 */
+ {
+ .gpio_pads = gw5910_gpio_pads,
+ .num_pads = ARRAY_SIZE(gw5910_gpio_pads) / 2,
+ .dio_cfg = gw52xx_dio,
+ .dio_num = ARRAY_SIZE(gw52xx_dio),
+ .wdis = IMX_GPIO_NR(7, 12),
+ .rs232_en = GP_RS232_EN,
+ .vsel_pin = IMX_GPIO_NR(6, 14),
+ .mmc_cd = IMX_GPIO_NR(7, 0),
+ },
};
#define SETUP_GPIO_OUTPUT(gpio, name, level) \
@@ -1181,6 +1207,11 @@ void setup_iomux_gpio(int board, struct
ventana_board_info *info)
*/
SETUP_GPIO_OUTPUT(IMX_GPIO_NR(4, 8), "touch_rst", 1);
break;
+ case GW5910:
+ /* CC1352 */
+ SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 7), "rf_reset#", 1);
+ SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 8), "rf_boot", 1);
+ break;
}
}
@@ -1423,6 +1454,21 @@ void setup_pmic(void)
pmic_reg_write(p, LTC3676_BUCK3, 0xc0);
pmic_reg_write(p, LTC3676_BUCK4, 0xc0);
}
+
+ /* configure MP5416 PMIC */
+ else if (!i2c_probe(0x69)) {
+ puts("PMIC: MP5416\n");
+ switch (board) {
+ case GW5910:
+ /* SW1: VDD_ARM 1.2V -> (1.275 to 1.475) */
+ reg = MP5416_VSET_EN | MP5416_VSET_SW1_SVAL(1475000);
+ i2c_write(0x69, MP5416_VSET_SW1, 1, (uint8_t *), 1);
+ /* SW4: VDD_SOC 1.2V -> (1.350 to 1.475) */
+ reg = MP5416_VSET_EN | MP5416_VSET_SW4_SVAL(1475000);
+ i2c_write(0x69, MP5416_VSET_SW4, 1, (uint8_t *), 1);
+ break;
+ }
+ }
}
#include
@@ -1570,6 +1616,7 @@ int board_mmc_init(struct bd_info *bis)
case GW53xx:
case GW54xx:
case GW553x:
+ case GW5910:
/* usdhc3: 4bit microSD */
SETUP_IOMUX_PADS(usdhc3_pads);
usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
diff --git a/board/gateworks/gw_ventana/eeprom.c
b/board/gateworks/gw_ventana/eeprom.c
index b9862c7dfc..1e48141160 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -124,6 +124,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
type = GW5908;
else if (info->model[4] == '0' && info->model[5] == '9')
type = GW5909;
+ else if (info->model[4] == '1' && info->model[5] == '0')
+ type = GW5910;
break;
default:
printf("EEPROM: Unknown model in EEPROM: %s\n", info->model);
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h
b/board/gateworks/gw_ventana/ventana_eeprom.h
index 4fa085b320..7c01e9edb4 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++
[RESEND PATCH 13/16] imx: ventana: add GW5912 support
The GW5912 is a Single Board Computer based on the NXP i.MX6Q/DL SoC
with the following features:
- DDR3 DRAM
- NAND FLASH (256MiB or 2048MiB)
- microSD socket
- Gateworks System Periperhal Controller
- front panel LED's
- front panel pushbutton
- RS232 connector (2x UARTs)
- CAN/RS485 connector
- Digital I/O connector (I2C/GPIO)
- SPI connector
- u-blox Zoe-M8Q GPS
- LIS2DE12 Accellerometer
- 1x FEC GbE RJ45 with 802.3at Active PoE
- 1x PCI GbE RJ45 with Passive PoE
- 5x MiniPCIe socket with PCIe/USB 2.0
- 1x MiniPCIe socket with PCIe/USB 2.0 and SIM socket
- Aux power input with wide-range DC power supply
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 30 -
board/gateworks/gw_ventana/eeprom.c | 2 ++
board/gateworks/gw_ventana/ventana_eeprom.h | 1 +
3 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index 270c4cf3a3..3a0b18672f 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -434,6 +434,15 @@ static iomux_v3_cfg_t const gw5910_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
+static iomux_v3_cfg_t const gw5912_gpio_pads[] = {
+ /* SD3_VSELECT */
+ IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
+ /* RS232_EN# */
+ IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
+ /* PCIESKT_WDIS# */
+ IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+};
+
/* Digital I/O */
struct dio_cfg gw51xx_dio[] = {
{
@@ -850,6 +859,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.dioi2c_en = IMX_GPIO_NR(4, 5),
.pcie_sson = IMX_GPIO_NR(1, 20),
.mmc_cd = IMX_GPIO_NR(7, 0),
+ .wdis = -1,
},
/* GW51xx */
@@ -964,6 +974,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.gpio_pads = gw5901_gpio_pads,
.num_pads = ARRAY_SIZE(gw5901_gpio_pads)/2,
.dio_cfg = gw5901_dio,
+ .wdis = -1,
},
/* GW5902 */
@@ -972,6 +983,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.num_pads = ARRAY_SIZE(gw5902_gpio_pads)/2,
.dio_cfg = gw5902_dio,
.rs232_en = GP_RS232_EN,
+ .wdis = -1,
},
/* GW5903 */
@@ -981,6 +993,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.dio_cfg = gw5903_dio,
.dio_num = ARRAY_SIZE(gw5903_dio),
.mmc_cd = IMX_GPIO_NR(6, 11),
+ .wdis = -1,
},
/* GW5904 */
@@ -991,6 +1004,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.dio_num = ARRAY_SIZE(gw5904_dio),
.mezz_pwren = IMX_GPIO_NR(2, 19),
.mezz_irq = IMX_GPIO_NR(2, 18),
+ .wdis = -1,
},
/* GW5905 */
@@ -1042,6 +1056,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.dio_num = ARRAY_SIZE(gw5904_dio),
.mezz_pwren = IMX_GPIO_NR(2, 19),
.mezz_irq = IMX_GPIO_NR(2, 18),
+ .wdis = -1,
},
/* GW5910 */
@@ -1055,6 +1070,18 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.vsel_pin = IMX_GPIO_NR(6, 14),
.mmc_cd = IMX_GPIO_NR(7, 0),
},
+
+ /* GW5912 */
+ {
+ .gpio_pads = gw5912_gpio_pads,
+ .num_pads = ARRAY_SIZE(gw5912_gpio_pads) / 2,
+ .dio_cfg = gw54xx_dio,
+ .dio_num = ARRAY_SIZE(gw54xx_dio),
+ .wdis = IMX_GPIO_NR(1, 0),
+ .rs232_en = GP_RS232_EN,
+ .vsel_pin = IMX_GPIO_NR(6, 14),
+ .mmc_cd = IMX_GPIO_NR(7, 0),
+ },
};
#define SETUP_GPIO_OUTPUT(gpio, name, level) \
@@ -1125,7 +1152,7 @@ void setup_iomux_gpio(int board, struct
ventana_board_info *info)
}
/* PCISKT_WDIS# (Wireless disable GPIO to miniPCIe sockets) */
- if (gpio_cfg[board].wdis) {
+ if (gpio_cfg[board].wdis != -1) {
gpio_request(gpio_cfg[board].wdis, "wlan_dis");
gpio_direction_output(gpio_cfg[board].wdis, 1);
}
@@ -1617,6 +1644,7 @@ int board_mmc_init(struct bd_info *bis)
case GW54xx:
case GW553x:
case GW5910:
+ case GW5912:
/* usdhc3: 4bit microSD */
SETUP_IOMUX_PADS(usdhc3_pads);
usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
diff --git a/board/gateworks/gw_ventana/eeprom.c
b/board/gateworks/gw_ventana/eeprom.c
index 1e48141160..a4f3065c7d 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -126,6 +126,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
type = GW5909;
else if (info->model[4] == '1' && info->model[5] == '0')
type = GW5910;
+ else if
[RESEND PATCH 15/16] imx: ventana: add support for GW53xx-G revision
The GW53xx-G revision has the foolowing changes:
- replaces the EOL GbE PHY with an updated part (requires an enable pin)
- replaces the EOL analog video decoder with an updated part
(requires dt prop)
- add power control to miniPCIe socket
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index a4c2f5549f..65e4de1dee 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -229,6 +229,10 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+ /* J6_PWREN */
+ IOMUX_PADS(PAD_EIM_DA15__GPIO3_IO15 | DIO_PAD_CFG),
+ /* PCIEGBE_EN */
+ IOMUX_PADS(PAD_EIM_DA14__GPIO3_IO14 | DIO_PAD_CFG),
};
static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
@@ -1226,6 +1230,12 @@ void setup_iomux_gpio(int board, struct
ventana_board_info *info)
/* Anything else board specific */
switch(board) {
+ case GW53xx:
+ gpio_request(IMX_GPIO_NR(3, 15), "j6_pwren");
+ gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
+ gpio_request(IMX_GPIO_NR(3, 14), "gbe_en");
+ gpio_direction_output(IMX_GPIO_NR(3, 14), 1);
+ break;
case GW560x:
gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
@@ -1645,6 +1655,15 @@ void ft_early_fixup(void *blob, int board_type)
/* GW53xx-E adds WDOG1_B external reset */
if (rev < 'E')
ft_board_wdog_fixup(blob, WDOG1_ADDR);
+
+ /* GW53xx-G has an adv7280 instead of an adv7180 */
+ else if (rev > 'F') {
+ i = fdt_node_offset_by_compatible(blob, -1,
"adi,adv7180");
+ if (i) {
+ fdt_setprop_string(blob, i, "compatible",
"adi,adv7280");
+ fdt_setprop_empty(blob, i, "adv,force-bt656-4");
+ }
+ }
break;
case GW54xx:
--
2.17.1
[RESEND PATCH 07/16] imx: ventana: remove hard-coded PCI reset
PCIe reset configuration is handled via dt now.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 49 -
board/gateworks/gw_ventana/common.h | 1 -
board/gateworks/gw_ventana/gw_ventana.c | 12 --
3 files changed, 62 deletions(-)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index 3f85fc6915..c1a4f8d277 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -187,8 +187,6 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* VID_PWR */
IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
@@ -212,10 +210,6 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* VID_PWR */
IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
- /* PCI_RST# (GW522x) */
- IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
@@ -241,8 +235,6 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
/* VID_EN */
IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
@@ -268,8 +260,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
/* DIOI2C_DIS# */
IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* VID_EN */
IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
/* RS485_EN */
@@ -281,8 +271,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
@@ -292,8 +280,6 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
/* USBOTG_SEL */
IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* MX6_DIO[4:9] */
IOMUX_PADS(PAD_CSI0_PIXCLK__GPIO5_IO18 | DIO_PAD_CFG),
IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
@@ -314,8 +300,6 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
/* VID_PWR */
IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
@@ -333,8 +317,6 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
/* VID_EN */
IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_DISP0_DAT10__GPIO4_IO31 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
@@ -350,8 +332,6 @@ static iomux_v3_cfg_t const gw5901_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | DIO_PAD_CFG),
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* PMIC reset */
IOMUX_PADS(PAD_DISP0_DAT8__WDOG1_B | DIO_PAD_CFG),
/* COM_CFGA/B/C/D */
@@ -374,8 +354,6 @@ static iomux_v3_cfg_t const gw5902_gpio_pads[] = {
IOMUX_PADS(PAD_SD3_CLK__GPIO7_IO03 | DIO_PAD_CFG),
/* UART1_EN# */
IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
/* 5V_UVLO */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
/* ETI_IRQ# */
@@ -455,8 +433,6 @@ static iomux_v3_cfg_t const gw5905_gpio_pads[] = {
IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | DIO_PAD_CFG),
/* USBEHCI_SEL */
IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
- /* PCI_RST# */
- IOMUX_PADS(PAD_GPIO_16__GPIO7_IO11 | DIO_PAD_CFG),
/* LVDS_BKLEN # */
[RESEND PATCH 10/16] imx: ventana: remove hard-coded flexcan standby pin
Flexcan pinmux is configured in kernel dt.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 21 -
1 file changed, 21 deletions(-)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index 719357f128..f7819f841c 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -199,8 +199,6 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
- /* CAN_STBY */
- IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* GPS_SHDN */
IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
/* USBOTG_SEL */
@@ -218,8 +216,6 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
/* MSATA_EN */
IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
- /* CAN_STBY */
- IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
@@ -241,8 +237,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
/* MSATA_EN */
IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
- /* CAN_STBY */
- IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* MIPI_DIO */
IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | DIO_PAD_CFG),
/* RS485_EN */
@@ -260,8 +254,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
};
static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
- /* CAN_STBY */
- IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
@@ -296,8 +288,6 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
/* RS232_EN# */
IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
- /* CAN_STBY */
- IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
@@ -315,8 +305,6 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
static iomux_v3_cfg_t const gw5901_gpio_pads[] = {
/* ETH1_EN */
IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | DIO_PAD_CFG),
- /* CAN_STBY */
- IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* PMIC reset */
IOMUX_PADS(PAD_DISP0_DAT8__WDOG1_B | DIO_PAD_CFG),
/* COM_CFGA/B/C/D */
@@ -333,10 +321,6 @@ static iomux_v3_cfg_t const gw5901_gpio_pads[] = {
};
static iomux_v3_cfg_t const gw5902_gpio_pads[] = {
- /* CAN1_STBY */
- IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
- /* CAN2_STBY */
- IOMUX_PADS(PAD_SD3_CLK__GPIO7_IO03 | DIO_PAD_CFG),
/* UART1_EN# */
IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
/* 5V_UVLO */
@@ -1139,12 +1123,7 @@ void setup_iomux_gpio(int board, struct
ventana_board_info *info)
gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
break;
- case GW5901:
- SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 2), "can_stby", 0);
- break;
case GW5902:
- SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 2), "can1_stby", 0);
- SETUP_GPIO_OUTPUT(IMX_GPIO_NR(7, 3), "can2_stby", 0);
SETUP_GPIO_OUTPUT(IMX_GPIO_NR(7, 12), "5P0V_EN", 1);
break;
case GW5903:
--
2.17.1
[RESEND PATCH 09/16] imx: ventana: remove hard-coded analog video codec enable
Analog video codec enable is configured in kernel dt.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 25 -
board/gateworks/gw_ventana/common.h | 1 -
2 files changed, 26 deletions(-)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index 1dead66517..719357f128 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -184,8 +184,6 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
/* GPS_SHDN */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
- /* VID_PWR */
- IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
@@ -207,8 +205,6 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
/* USBOTG_SEL */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
- /* VID_PWR */
- IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
@@ -232,8 +228,6 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
/* GPS_SHDN */
IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
- /* VID_EN */
- IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
@@ -259,8 +253,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
/* DIOI2C_DIS# */
IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
- /* VID_EN */
- IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
@@ -297,8 +289,6 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
/* SD3_VSELECT */
IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
- /* VID_PWR */
- IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
@@ -314,8 +304,6 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
/* DIOI2C_DIS# */
IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
- /* VID_EN */
- IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
@@ -875,7 +863,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.mezz_pwren = IMX_GPIO_NR(2, 19),
.mezz_irq = IMX_GPIO_NR(2, 18),
.gps_shdn = IMX_GPIO_NR(1, 2),
- .vidin_en = IMX_GPIO_NR(5, 20),
.wdis = IMX_GPIO_NR(7, 12),
},
@@ -888,7 +875,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.mezz_pwren = IMX_GPIO_NR(2, 19),
.mezz_irq = IMX_GPIO_NR(2, 18),
.gps_shdn = IMX_GPIO_NR(1, 27),
- .vidin_en = IMX_GPIO_NR(3, 31),
.usb_sel = IMX_GPIO_NR(1, 2),
.wdis = IMX_GPIO_NR(7, 12),
.msata_en = GP_MSATA_SEL,
@@ -906,7 +892,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.mezz_pwren = IMX_GPIO_NR(2, 19),
.mezz_irq = IMX_GPIO_NR(2, 18),
.gps_shdn = IMX_GPIO_NR(1, 27),
- .vidin_en = IMX_GPIO_NR(3, 31),
.wdis = IMX_GPIO_NR(7, 12),
.msata_en = GP_MSATA_SEL,
.rs232_en = GP_RS232_EN,
@@ -923,7 +908,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.mezz_pwren = IMX_GPIO_NR(2, 19),
.mezz_irq = IMX_GPIO_NR(2, 18),
.rs485en = IMX_GPIO_NR(7, 1),
- .vidin_en = IMX_GPIO_NR(3, 31),
.dioi2c_en = IMX_GPIO_NR(4, 5),
.pcie_sson = IMX_GPIO_NR(1, 20),
.wdis = IMX_GPIO_NR(5, 17),
@@ -959,7 +943,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.num_pads = ARRAY_SIZE(gw553x_gpio_pads)/2,
.dio_cfg = gw553x_dio,
.dio_num = ARRAY_SIZE(gw553x_dio),
- .vidin_en = IMX_GPIO_NR(5, 20),
.wdis = IMX_GPIO_NR(7, 12),
.vsel_pin = IMX_GPIO_NR(6, 14),
.mmc_cd = IMX_GPIO_NR(7, 0),
@@ -974,7 +957,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.mezz_pwren = IMX_GPIO_NR(2, 19),
.mezz_irq = IMX_GPIO_NR(2, 18),
.rs232_en = GP_RS232_EN,
- .vidin_en = IMX_GPIO_NR(3, 31),
[RESEND PATCH 08/16] imx: ventana: remove hard-coded USB OTG pinmux
pinmux is now done via dt. Add missing OTG_OC pinmux for boards that
use it.
Signed-off-by: Tim Harvey
---
arch/arm/dts/imx6qdl-gw51xx.dtsi| 1 +
arch/arm/dts/imx6qdl-gw52xx.dtsi| 1 +
arch/arm/dts/imx6qdl-gw54xx.dtsi| 1 +
arch/arm/dts/imx6qdl-gw553x.dtsi| 1 +
board/gateworks/gw_ventana/common.c | 7 ---
5 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/imx6qdl-gw51xx.dtsi b/arch/arm/dts/imx6qdl-gw51xx.dtsi
index 76a41d563c..812acf7ab8 100644
--- a/arch/arm/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/dts/imx6qdl-gw51xx.dtsi
@@ -629,6 +629,7 @@
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /*
OTG_PWR_EN */
+ MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
>;
};
diff --git a/arch/arm/dts/imx6qdl-gw52xx.dtsi b/arch/arm/dts/imx6qdl-gw52xx.dtsi
index 31a059f26b..81a9ce38b9 100644
--- a/arch/arm/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/dts/imx6qdl-gw52xx.dtsi
@@ -734,6 +734,7 @@
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
+ MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
>;
};
diff --git a/arch/arm/dts/imx6qdl-gw54xx.dtsi b/arch/arm/dts/imx6qdl-gw54xx.dtsi
index 95939cf277..ffed4fb550 100644
--- a/arch/arm/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/dts/imx6qdl-gw54xx.dtsi
@@ -819,6 +819,7 @@
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /*
PWR_EN */
+ MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
>;
};
diff --git a/arch/arm/dts/imx6qdl-gw553x.dtsi b/arch/arm/dts/imx6qdl-gw553x.dtsi
index e21f068bec..b15c281852 100644
--- a/arch/arm/dts/imx6qdl-gw553x.dtsi
+++ b/arch/arm/dts/imx6qdl-gw553x.dtsi
@@ -688,6 +688,7 @@
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /*
OTG_PWR_EN */
+ MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
>;
};
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index c1a4f8d277..1dead66517 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -182,7 +182,6 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
-
/* GPS_SHDN */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* VID_PWR */
@@ -321,8 +320,6 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
- /* USBH2_PEN (OTG) */
- IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* 12V0_PWR_EN */
IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
};
@@ -360,8 +357,6 @@ static iomux_v3_cfg_t const gw5902_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_5__GPIO1_IO05 | DIO_PAD_CFG),
/* DIO_IRQ# */
IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
- /* USBOTG_PEN */
- IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | DIO_PAD_CFG),
};
static iomux_v3_cfg_t const gw5903_gpio_pads[] = {
@@ -375,8 +370,6 @@ static iomux_v3_cfg_t const gw5903_gpio_pads[] = {
IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04 | DIO_PAD_CFG),
/* USBH1_PEN (EHCI) */
IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
- /* USBH2_PEN (OTG) */
- IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* USBDPC_PEN */
IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
/* TOUCH_RST */
--
2.17.1
[RESEND PATCH 06/16] imx: ventana: fix UMS support
The Gateworks Ventana boards have always had usb0=usbh1 and usb1=usbotg
because OTG is often subloaded on these boards and a bit in the EEPROM
which flagging that OTG is subloaded is used to remove the dt node via the
alias.
U-Boot DM_USB UMS requires the usb0 alias be assigned to the usbotg
so fix the usb0 alias in order for UMS to work.
Fixes 72c46327f03f: ("imx: ventana: enable dm support for USB")
Signed-off-by: Tim Harvey
---
arch/arm/dts/imx6qdl-gw51xx.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw52xx.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw53xx.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw54xx.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw551x.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw552x.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw553x.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw560x.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw5904.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw5907.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw5912.dtsi | 4 ++--
arch/arm/dts/imx6qdl-gw5913.dtsi | 4 ++--
12 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm/dts/imx6qdl-gw51xx.dtsi b/arch/arm/dts/imx6qdl-gw51xx.dtsi
index 7e28463084..76a41d563c 100644
--- a/arch/arm/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/dts/imx6qdl-gw51xx.dtsi
@@ -13,8 +13,8 @@
led0 =
led1 =
nand =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw52xx.dtsi b/arch/arm/dts/imx6qdl-gw52xx.dtsi
index f1d9ba1fac..31a059f26b 100644
--- a/arch/arm/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/dts/imx6qdl-gw52xx.dtsi
@@ -16,8 +16,8 @@
mmc0 =
nand =
ssi0 =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw53xx.dtsi b/arch/arm/dts/imx6qdl-gw53xx.dtsi
index 172a45ba17..904b228306 100644
--- a/arch/arm/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/dts/imx6qdl-gw53xx.dtsi
@@ -16,8 +16,8 @@
mmc0 =
nand =
ssi0 =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw54xx.dtsi b/arch/arm/dts/imx6qdl-gw54xx.dtsi
index e09fad6068..95939cf277 100644
--- a/arch/arm/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/dts/imx6qdl-gw54xx.dtsi
@@ -17,8 +17,8 @@
mmc0 =
nand =
ssi0 =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw551x.dtsi b/arch/arm/dts/imx6qdl-gw551x.dtsi
index 1bb586cbd5..c0ffea16d8 100644
--- a/arch/arm/dts/imx6qdl-gw551x.dtsi
+++ b/arch/arm/dts/imx6qdl-gw551x.dtsi
@@ -57,8 +57,8 @@
led0 =
nand =
ssi0 =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw552x.dtsi b/arch/arm/dts/imx6qdl-gw552x.dtsi
index 7935b10eab..f6742e5131 100644
--- a/arch/arm/dts/imx6qdl-gw552x.dtsi
+++ b/arch/arm/dts/imx6qdl-gw552x.dtsi
@@ -14,8 +14,8 @@
led1 =
led2 =
nand =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw553x.dtsi b/arch/arm/dts/imx6qdl-gw553x.dtsi
index b6965f25da..e21f068bec 100644
--- a/arch/arm/dts/imx6qdl-gw553x.dtsi
+++ b/arch/arm/dts/imx6qdl-gw553x.dtsi
@@ -55,8 +55,8 @@
led0 =
led1 =
nand =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw560x.dtsi b/arch/arm/dts/imx6qdl-gw560x.dtsi
index bfe65fd3c0..5da19756e0 100644
--- a/arch/arm/dts/imx6qdl-gw560x.dtsi
+++ b/arch/arm/dts/imx6qdl-gw560x.dtsi
@@ -58,8 +58,8 @@
mmc0 =
mmc1 =
ssi0 =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw5904.dtsi b/arch/arm/dts/imx6qdl-gw5904.dtsi
index 9adbd728dc..b5ed2d83c1 100644
--- a/arch/arm/dts/imx6qdl-gw5904.dtsi
+++ b/arch/arm/dts/imx6qdl-gw5904.dtsi
@@ -56,8 +56,8 @@
led1 =
led2 =
mmc0 =
- usb0 =
- usb1 =
+ usb0 =
+ usb1 =
};
chosen {
diff --git a/arch/arm/dts/imx6qdl-gw5907.dtsi b/arch/arm/dts/imx6qdl-gw5907.dtsi
index 58f73a141e..a36b6e7048 100644
--- a/arch/arm/dts/imx6qdl-gw5907.dtsi
+++ b/arch/arm/dts/imx6qdl-gw5907.dtsi
@@ -13,8 +13,8 @@
led0 =
led1 =
nand =
-
[RESEND PATCH 04/16] imx: ventana: replace hard-coded LED config with dt based config
Use device-tree LED config instead of hard-coded board-specific config.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 149
board/gateworks/gw_ventana/common.h | 1 -
configs/gwventana_emmc_defconfig| 3 +
configs/gwventana_gw5904_defconfig | 3 +
configs/gwventana_nand_defconfig| 3 +
5 files changed, 9 insertions(+), 150 deletions(-)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index 328fdd3b29..729f612f81 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -178,10 +178,6 @@ void setup_ventana_i2c(int i2c)
* Baseboard specific GPIO
*/
static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
- /* PANLEDG# */
- IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
- /* PANLEDR# */
- IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
@@ -204,18 +200,12 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
/* MSATA_EN */
IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
- /* PANLEDG# */
- IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
- /* PANLEDR# */
- IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
- /* MX6_LOCLED# */
- IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* GPS_SHDN */
IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
/* USBOTG_SEL */
@@ -243,12 +233,6 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* USB_HUBRST# */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
- /* PANLEDG# */
- IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
- /* PANLEDR# */
- IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
- /* MX6_LOCLED# */
- IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
@@ -276,12 +260,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
- /* PANLEDG# */
- IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
- /* PANLEDR# */
- IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
- /* MX6_LOCLED# */
- IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* USB_HUBRST# */
IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG),
/* MIPI_DIO */
@@ -307,8 +285,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
- /* PANLED# */
- IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
/* PCI_RST# */
IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
@@ -322,12 +298,6 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
/* USB_HUBRST# */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
- /* PANLEDG# */
- IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
- /* PANLEDR# */
- IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
- /* MX6_LOCLED# */
- IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* PCI_RST# */
IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* MX6_DIO[4:9] */
@@ -348,10 +318,6 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
/* SD3_VSELECT */
IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
- /* PANLEDG# */
- IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
- /* PANLEDR# */
- IOMUX_PADS(PAD_KEY_ROW2__GPIO4_IO11 | DIO_PAD_CFG),
/* VID_PWR */
IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
/* PCI_RST# */
@@ -367,12 +333,6 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* USB_HUBRST# */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
- /* PANLEDG# */
- IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
- /* PANLEDR# */
- IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
- /* MX6_LOCLED# */
- IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
[RESEND PATCH 05/16] imx: ventana: remove hard-coded USB HUBRST# gpio config
The USB HUB reset is handled via dt now.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index 729f612f81..3f85fc6915 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -231,8 +231,6 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
- /* USB_HUBRST# */
- IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
@@ -260,8 +258,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
- /* USB_HUBRST# */
- IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG),
/* MIPI_DIO */
IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | DIO_PAD_CFG),
/* RS485_EN */
@@ -296,8 +292,6 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
/* USBOTG_SEL */
IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
- /* USB_HUBRST# */
- IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* PCI_RST# */
IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* MX6_DIO[4:9] */
@@ -331,8 +325,6 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
- /* USB_HUBRST# */
- IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
@@ -426,8 +418,6 @@ static iomux_v3_cfg_t const gw5903_gpio_pads[] = {
};
static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
- /* USB_HUBRST# */
- IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
--
2.17.1
[RESEND PATCH 03/16] imx: ventana: remove nand field from common ventana struct
NAND fdt fixups can be performed without knowing if NAND is present.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 11 ---
board/gateworks/gw_ventana/common.h | 1 -
board/gateworks/gw_ventana/gw_ventana.c | 10 --
3 files changed, 4 insertions(+), 18 deletions(-)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index f9ee167458..328fdd3b29 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -989,7 +989,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.gps_shdn = IMX_GPIO_NR(1, 2),
.vidin_en = IMX_GPIO_NR(5, 20),
.wdis = IMX_GPIO_NR(7, 12),
- .nand = true,
},
/* GW52xx */
@@ -1014,7 +1013,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.rs232_en = GP_RS232_EN,
.vsel_pin = IMX_GPIO_NR(6, 14),
.mmc_cd = IMX_GPIO_NR(7, 0),
- .nand = true,
},
/* GW53xx */
@@ -1038,7 +1036,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.rs232_en = GP_RS232_EN,
.vsel_pin = IMX_GPIO_NR(6, 14),
.mmc_cd = IMX_GPIO_NR(7, 0),
- .nand = true,
},
/* GW54xx */
@@ -1064,7 +1061,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.rs232_en = GP_RS232_EN,
.vsel_pin = IMX_GPIO_NR(6, 14),
.mmc_cd = IMX_GPIO_NR(7, 0),
- .nand = true,
},
/* GW551x */
@@ -1078,7 +1074,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
},
.pcie_rst = IMX_GPIO_NR(1, 0),
.wdis = IMX_GPIO_NR(7, 12),
- .nand = true,
},
/* GW552x */
@@ -1096,7 +1091,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.usb_sel = IMX_GPIO_NR(1, 7),
.wdis = IMX_GPIO_NR(7, 12),
.msata_en = GP_MSATA_SEL,
- .nand = true,
},
/* GW553x */
@@ -1114,7 +1108,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.wdis = IMX_GPIO_NR(7, 12),
.vsel_pin = IMX_GPIO_NR(6, 14),
.mmc_cd = IMX_GPIO_NR(7, 0),
- .nand = true,
},
/* GW560x */
@@ -1146,7 +1139,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
IMX_GPIO_NR(4, 15),
},
.pcie_rst = IMX_GPIO_NR(1, 29),
- .nand = true,
},
/* GW5902 */
@@ -1159,7 +1151,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
},
.pcie_rst = IMX_GPIO_NR(1, 0),
.rs232_en = GP_RS232_EN,
- .nand = true,
},
/* GW5903 */
@@ -1216,7 +1207,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.usb_sel = IMX_GPIO_NR(1, 7),
.wdis = IMX_GPIO_NR(7, 12),
.msata_en = GP_MSATA_SEL,
- .nand = true,
},
/* GW5907 */
@@ -1231,7 +1221,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
},
.pcie_rst = IMX_GPIO_NR(1, 0),
.wdis = IMX_GPIO_NR(7, 12),
- .nand = true,
},
/* GW5908 */
diff --git a/board/gateworks/gw_ventana/common.h
b/board/gateworks/gw_ventana/common.h
index 8f226d109b..4b2aaf0fda 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -78,7 +78,6 @@ struct ventana {
int mmc_cd;
/* various features */
bool usd_vsel;
- bool nand;
};
extern struct ventana gpio_cfg[GW_UNKNOWN];
diff --git a/board/gateworks/gw_ventana/gw_ventana.c
b/board/gateworks/gw_ventana/gw_ventana.c
index 7f43e1b620..77a2f2ca4b 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -981,7 +981,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
{
struct ventana_board_info *info = _info;
struct ventana_eeprom_config *cfg;
- static const struct node_info nodes[] = {
+ static const struct node_info nand_nodes[] = {
{ "sst,w25q256", MTD_DEV_TYPE_NOR, }, /* SPI flash */
{ "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
};
@@ -1003,11 +1003,9 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
- if (gpio_cfg[board_type].nand) {
- /* Update partition nodes using info from mtdparts env var */
- puts(" Updating MTD partitions...\n");
- fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
- }
+ /* Update MTD partition nodes using info from mtdparts env var */
+ puts(" Updating MTD partitions...\n");
+ fdt_fixup_mtdparts(blob, nand_nodes, ARRAY_SIZE(nand_nodes));
/* Update display timings from display env var */
if (display) {
--
2.17.1
[RESEND PATCH 02/16] imx: ventana: move wdog/uhs-i board/revision dt fixups
Move board/revision specific dt fixups for WDOG and UHS-I features
so that we can call them early for U-Boot control dt as well.
Additionally drop a deprected non-mainline dt-prop fixup regarding
HDMI input format.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/common.c | 131
board/gateworks/gw_ventana/common.h | 2 +
board/gateworks/gw_ventana/gw_ventana.c | 158 +---
board/gateworks/gw_ventana/gw_ventana_spl.c | 7 +-
4 files changed, 141 insertions(+), 157 deletions(-)
diff --git a/board/gateworks/gw_ventana/common.c
b/board/gateworks/gw_ventana/common.c
index c07eb627a2..f9ee167458 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -1697,6 +1697,137 @@ void setup_pmic(void)
}
}
+#include
+#define WDOG1_ADDR 0x20bc000
+#define WDOG2_ADDR 0x20c
+#define GPIO3_ADDR 0x20a4000
+#define USDHC3_ADDR 0x2198000
+
+static void ft_board_wdog_fixup(void *blob, phys_addr_t addr)
+{
+ int off = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", addr);
+
+ if (off) {
+ fdt_delprop(blob, off, "ext-reset-output");
+ fdt_delprop(blob, off, "fsl,ext-reset-output");
+ }
+}
+
+void ft_early_fixup(void *blob, int board_type)
+{
+ struct ventana_board_info *info = _info;
+ char rev = 0;
+ int i;
+
+ /* determine board revision */
+ for (i = sizeof(ventana_info.model) - 1; i > 0; i--) {
+ if (ventana_info.model[i] >= 'A') {
+ rev = ventana_info.model[i];
+ break;
+ }
+ }
+
+ /*
+* Board model specific fixups
+*/
+ switch (board_type) {
+ case GW51xx:
+ /*
+* disable wdog node for GW51xx-A/B to work around
+* errata causing wdog timer to be unreliable.
+*/
+ if (rev >= 'A' && rev < 'C') {
+ i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt",
+ WDOG1_ADDR);
+ if (i)
+ fdt_status_disabled(blob, i);
+ }
+
+ /* GW51xx-E adds WDOG1_B external reset */
+ if (rev < 'E')
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
+ break;
+
+ case GW52xx:
+ /* GW522x Uses GPIO3_IO23 instead of GPIO1_IO29 */
+ if (info->model[4] == '2') {
+ u32 handle = 0;
+ u32 *range = NULL;
+
+ i = fdt_node_offset_by_compatible(blob, -1,
+ "fsl,imx6q-pcie");
+ if (i)
+ range = (u32 *)fdt_getprop(blob, i,
+ "reset-gpio", NULL);
+
+ if (range) {
+ i = fdt_node_offset_by_compat_reg(blob,
+ "fsl,imx6q-gpio", GPIO3_ADDR);
+ if (i)
+ handle = fdt_get_phandle(blob, i);
+ if (handle) {
+ range[0] = cpu_to_fdt32(handle);
+ range[1] = cpu_to_fdt32(23);
+ }
+ }
+
+ /* these have broken usd_vsel */
+ if (strstr((const char *)info->model, "SP318-B") ||
+ strstr((const char *)info->model, "SP331-B"))
+ gpio_cfg[board_type].usd_vsel = 0;
+
+ /* GW522x-B adds WDOG1_B external reset */
+ if (rev < 'B')
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
+ }
+
+ /* GW520x-E adds WDOG1_B external reset */
+ else if (info->model[4] == '0' && rev < 'E')
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
+ break;
+
+ case GW53xx:
+ /* GW53xx-E adds WDOG1_B external reset */
+ if (rev < 'E')
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
+ break;
+
+ case GW54xx:
+ /*
+* disable serial2 node for GW54xx for compatibility with older
+* 3.10.x kernel that improperly had this node enabled in the DT
+*/
+ fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED,
+ 0);
+
+ /* GW54xx-E adds WDOG2_B external reset */
+ if (rev < 'E')
+ ft_board_wdog_fixup(blob, WDOG2_ADDR);
+ break;
+
+ case GW551x:
+ /* GW551x-C
[RESEND PATCH 01/16] imx: ventana: ignore EEPROM config when checking for NAND support
EEPROM bits no longer indicate support for NAND so instead use
hard-coded value from board config struct.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/gw_ventana.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/gateworks/gw_ventana/gw_ventana.c
b/board/gateworks/gw_ventana/gw_ventana.c
index 468fb093b7..dc3300f7b7 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -1017,7 +1017,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
- if (test_bit(EECONFIG_NAND, info->config)) {
+ if (gpio_cfg[board_type].nand) {
/* Update partition nodes using info from mtdparts env var */
puts(" Updating MTD partitions...\n");
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
--
2.17.1
Re: [PATCH v3 03/14] crypto: aspeed: Add AST2600 HACE support
Hi ChiaWei, On Fri, 23 Jul 2021 at 00:30, ChiaWei Wang wrote: > > Hi Simon, > > > -Original Message- > > From: Simon Glass > > Sent: Wednesday, July 21, 2021 2:33 AM > > > > Hi Chia-Wei, > > > > On Tue, 20 Jul 2021 at 00:38, Chia-Wei Wang > > wrote: > > > > > > From: Joel Stanley > > > > > > Hash and Crypto Engine (HACE) is designed to accelerate the throughput > > > of hash data digest, and symmetric-key encryption. > > > > > > Signed-off-by: Joel Stanley > > > Signed-off-by: Chia-Wei Wang > > > --- > > > drivers/crypto/Kconfig | 2 + > > > drivers/crypto/Makefile | 1 + > > > drivers/crypto/aspeed/Kconfig | 12 ++ > > > drivers/crypto/aspeed/Makefile | 1 + > > > drivers/crypto/aspeed/aspeed_hace.c | 308 > > > > > > 5 files changed, 324 insertions(+) > > > create mode 100644 drivers/crypto/aspeed/Kconfig create mode 100644 > > > drivers/crypto/aspeed/Makefile create mode 100644 > > > drivers/crypto/aspeed/aspeed_hace.c > > > > This hash interface is wonky. > > > > There should be a hash uclass and this driver should be in that uclass. The > > existing hw_... functions should be dropped. > > > > Please let me know if you need further guidance, but basically, we need a > > proper uclass and driver. > > I am thinking to take the UCLASS_MOD_EXP as an example to create UCLASS_HASH. > This UCLASS_HASH should provide .ops callback like UCLASS_MOD_EXP do to > support both SW and HW implemented HSAH. > Is this a right direction to start with? Yes I think so. You can have API like those in struct hash_algo and hopefully remove that struct. Then there is a software driver to write. Then people can add hardware drivers as needed. The hash uclass needs provide a way to call the first driver it finds. We can either make it add a software driver or have it call the software functions directly if there is no (hardware) driver. I'm not sure which is best... - having a s/w driver requires binding it at runtime - not having a s/w driver makes the uclass a bit odd > > In addition, adding UCLASS_HASH may involve lots of common code modification. > Should we make it part of the current patch series? Or a new patch series > after this one? I would prefer a series before this one since it needs to be done before this. Or patches in the same series if you prefer. The problem has been created already, unfortunately, so this is a clean-up. Regards, Simon
Re: [PATCH v4 01/21] drivers: reset: Add devm_to_reset() to return dummy "struct reset_ctl"
Hi Kishon,
On Wed, 21 Jul 2021 at 06:16, Kishon Vijay Abraham I wrote:
>
> Hi Simon,
>
> On 21/07/21 12:02 am, Simon Glass wrote:
> > Hi Kishon,
> >
> > On Mon, 12 Jul 2021 at 00:20, Kishon Vijay Abraham I wrote:
> >>
> >> Add devm_to_reset() to return dummy "struct reset_ctl", useful for
> >> invoking reset APIs which doesn't have a valid "struct reset_ctl".
> >>
> >> Suggested-by: Simon Glass
> >> Signed-off-by: Kishon Vijay Abraham I
> >> ---
> >> drivers/reset/reset-uclass.c | 16
> >> drivers/reset/sandbox-reset-test.c | 4 +++-
> >> include/reset.h| 17 +
> >> 3 files changed, 36 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
> >> index 8caa616ed9..9f2eeb4fe4 100644
> >> --- a/drivers/reset/reset-uclass.c
> >> +++ b/drivers/reset/reset-uclass.c
> >> @@ -15,6 +15,8 @@
> >> #include
> >> #include
> >>
> >> +static struct reset_ctl devm_no_reset;
> >> +
> >> static inline struct reset_ops *reset_dev_ops(struct udevice *dev)
> >> {
> >> return (struct reset_ops *)dev->driver->ops;
> >> @@ -256,6 +258,20 @@ int reset_release_all(struct reset_ctl *reset_ctl,
> >> int count)
> >> return 0;
> >> }
> >>
> >> +int devm_to_reset(struct reset_ctl *in, struct reset_ctl **outp)
> >> +{
> >> + if (IS_ERR_OR_NULL(in)) {
> >> + *outp = _no_reset;
> >
> > This var ends up in BSS so won't work in early SPL / pre-relocation in
> > U-Boot. Please add a priv_auto struct in the UCLASS_DRIVER() and put
> > this value in there.
>
> Sure.
> >
> >> + if (!in)
> >> + return -ENOENT;
> >> + else
> >> + return PTR_ERR(in);
> >> + }
> >> + *outp = in;
> >> +
> >> + return 0;
> >> +}
> >> +
> >> static void devm_reset_release(struct udevice *dev, void *res)
> >> {
> >> reset_free(res);
> >> diff --git a/drivers/reset/sandbox-reset-test.c
> >> b/drivers/reset/sandbox-reset-test.c
> >> index 51b79810c8..4389bde5e7 100644
> >> --- a/drivers/reset/sandbox-reset-test.c
> >> +++ b/drivers/reset/sandbox-reset-test.c
> >> @@ -32,13 +32,15 @@ int sandbox_reset_test_get_devm(struct udevice *dev)
> >
> > Can this function move into the test itself? It seems strange for it to be
> > here.
>
> You mean merge drivers/reset/sandbox-reset-test.c to test/dm/reset.c?
Just the sandbox_reset_test_get_devm() function. It doesn't seem to
need to be in the driver, but I may be wrong.
> >
> >> {
> >> struct sandbox_reset_test *sbrt = dev_get_priv(dev);
> >> struct reset_ctl *r;
> >> + int ret;
> >>
> >> r = devm_reset_control_get(dev, "not-a-valid-reset-ctl");
> >> if (!IS_ERR(r))
> >> return -EINVAL;
> >>
> >> r = devm_reset_control_get_optional(dev, "not-a-valid-reset-ctl");
> >> - if (r)
> >> + ret = devm_to_reset(r, );
> >> + if (reset_valid(r))
> >> return -EINVAL;
> >
> > Can you not do:
> >
> > if (ret)
> > return ret;
> >
> > ?
>
> For a reset that doesn't exist (where we return devm_no_reset), the
> return value is still going to be a negative value. We should probably
> change the check to
>
> if (ret && reset_valid(r))
> return -EINVAL;
Well when you add comments about the return value to devm_to_reset() I
will understand this better :-)
But ret must be zero if the reset is valid and non-zero if not, right?
So why return a different error from the one that occured? That will
make it harder for people to figure out.
Also, I suggest using
return log_msg_ret("something", ret)
so we can get logging to show where the error was originated.
> >
> >>
> >> sbrt->ctlp = devm_reset_control_get(dev, "test");
> >> diff --git a/include/reset.h b/include/reset.h
> >> index cde2c4b4a8..21affc1455 100644
> >> --- a/include/reset.h
> >> +++ b/include/reset.h
> >> @@ -341,6 +341,18 @@ int reset_status(struct reset_ctl *reset_ctl);
> >> */
> >> int reset_release_all(struct reset_ctl *reset_ctl, int count);
> >>
> >> +/**
> >> + * devm_to_reset - Provide a dummy reset_ctl for invalid reset_ctl
> >
> > Returns the reset_ctl to use for a devm reset?
> >
> >> + *
> >> + * Provide a dummy reset_ctl for invalid reset_ctl or give the same
> >> + * input reset_ctl
> >> + *
> >> + * @in:Input reset_ctl returned by devm_reset_control_get()
> >> + * @outp: Dummy reset_ctl for invalid reset_ctl or Input reset_ctl
> >
> > Put the positive case first.
> >
> > Returns @in if valid. If not valid, returns a dummy reset_ctl for
> > which reset_valid() will always return false.
> >
> >> + * @return 0 if OK, or a negative error code.
> >
> > Please document what specific errors this returns as this is important.
> >
> >> + */
> >> +int devm_to_reset(struct reset_ctl *in, struct reset_ctl **outp);
> >> +
> >> /**
> >> * reset_release_bulk - Assert/Free an array of
Re: [PATCH] Revert "spi: spi-uclass: Add support to manually relocate spi memory ops"
On Fri, Jul 23, 2021 at 10:49:39PM -0500, Dennis Gilmore wrote: > On Fri, Jul 23, 2021 at 10:25 PM Tom Rini wrote: > > > > On Fri, Jul 23, 2021 at 09:46:44PM -0500, Dennis Gilmore wrote: > > > > > removing the header is not sufficient to have the boards booting from SPI. > > > > > > U-Boot TPL 2021.07-00768-g49373a3334-dirty (Jul 23 2021 - 20:42:57) > > > Channel 0: LPDDR4, 50MHz > > > BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB > > > Channel 1: LPDDR4, 50MHz > > > BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB > > > 256B stride > > > lpddr4_set_rate: change freq to 4 mhz 0, 1 > > > lpddr4_set_rate: change freq to 8 mhz 1, 0 > > > Trying to boot from BOOTROM > > > Returning to boot ROM... > > > > > > U-Boot SPL 2021.07-00768-g49373a3334-dirty (Jul 23 2021 - 20:42:57 -0500) > > > Trying to boot from SPI > > > > > > At this point u-boot hangs, with the patch reverted I get the following > > > U-Boot TPL 2021.07-00769-g4af8bd872c-dirty (Jul 23 2021 - 21:20:51) > > > Channel 0: LPDDR4, 50MHz > > > BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB > > > Channel 1: LPDDR4, 50MHz > > > BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB > > > 256B stride > > > lpddr4_set_rate: change freq to 4 mhz 0, 1 > > > lpddr4_set_rate: change freq to 8 mhz 1, 0 > > > Trying to boot from BOOTROM > > > Returning to boot ROM... > > > > > > U-Boot SPL 2021.07-00769-g4af8bd872c-dirty (Jul 23 2021 - 21:20:51 -0500) > > > Trying to boot from SPI > > > > > > > > > U-Boot 2021.07-00769-g4af8bd872c-dirty (Jul 23 2021 - 21:20:51 -0500) > > > > > > SoC: Rockchip rk3399 > > > Reset cause: RST > > > Model: Kobol Helios64 > > > Revision: 0.0 - Unknown > > > DRAM: 3.9 GiB > > > PMIC: RK808 > > > MMC: mmc@fe32: 1, mmc@fe33: 0 > > > Loading Environment from SPIFlash... SF: Detected w25q128 with page > > > size 256 Bytes, erase size 4 KiB, total 16 MiB > > > *** Warning - bad CRC, using default environment > > > > > > In:serial@ff1a > > > Out: serial@ff1a > > > Err: serial@ff1a > > > Model: Kobol Helios64 > > > Revision: UNKNOWN > > > Net: dw_dm_mdio_init: mdio node is missing, registering legacy mdio > > > busNo ethernet found. > > > > > > starting USB... > > > Bus usb@fe90: usb maximum-speed not found > > > Register 2000140 NbrPorts 2 > > > Starting the controller > > > USB XHCI 1.10 > > > scanning bus usb@fe90 for devices... 2 USB Device(s) found > > >scanning usb for storage devices... 0 Storage Device(s) found > > > Hit any key to stop autoboot: 0 > > > switch to partitions #0, OK > > > mmc0(part 0) is current device > > > ** No partition table - mmc 0 ** > > > Couldn't find partition mmc 0:1 > > > switch to partitions #0, OK > > > mmc1 is current device > > > Scanning mmc 1:1... > > > Scanning disk m...@fe32.blk... > > > Scanning disk m...@fe33.blk... > > > ** Unrecognized filesystem type ** > > > Found 5 disks > > > dw_dm_mdio_init: mdio node is missing, registering legacy mdio > > > busdw_dm_mdio_init: mdio node is missing, registering legacy mdio > > > busLoading Boot 'Fedora' failed > > > EFI boot manager: Cannot load any image > > > Found EFI removable media binary efi/boot/bootaa64.efi > > > > Is LTO on, on these platforms? That code in question really should not > > be enabled, at all. Like, if you toss an #error in that section of > > code, it should still build. It does, right? > > It does still build if I put a #error in the middle of it > > $ grep LTO .config > CONFIG_ARCH_SUPPORTS_LTO=y > # CONFIG_LTO is not set > > > LTO is not on OK, so progress. What toolchain are you using here? And can you easily re-test with one of the kernel.org ones, or if using one already 9.2.0 (or 11.1.0) ? -- Tom signature.asc Description: PGP signature
[PATCH 1/1] lib: disable CONFIG_SPL_HEXDUMP by default
CONFIG_HEXDUMP is needed to display UEFI variables using 'printenv -e'. Enabling CONFIG_SPL_HEXDUMP only makes sense for debugging purposes. Hence CONFIG_SPL_HEXDUMP should not be enabled by default. The following boards currently have CONFIG_SPL_HEXDUMP=y: axm_defconfig imx8mm-cl-iot-gate_defconfig imx8mm_venice_defconfig imxrt1020-evk_defconfig imxrt1050-evk_defconfig kontron_sl28_defconfig kp_imx53_defconfig lx2160ardb_tfa_stmm_defconfig mt7622_rfb_defconfig octeon_ebb7304_defconfig octeon_nic23_defconfig qemu_arm64_defconfig qemu_arm_defconfig qemu-riscv32_defconfig qemu-riscv32_smode_defconfig qemu-riscv64_defconfig qemu-riscv64_smode_defconfig qemu-x86_64_defconfig qemu-x86_defconfig sandbox64_defconfig sandbox_defconfig stm32mp15_basic_defconfig stm32mp15_trusted_defconfig synquacer_developerbox_defconfig taurus_defconfig xilinx_versal_virt_defconfig The patch only keeps it enabled on sandbox64_defconfig sandbox_defconfig Signed-off-by: Heinrich Schuchardt --- configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + lib/Kconfig | 1 - 3 files changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 5fb1da49e4..9e3c2d5e41 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -233,6 +233,7 @@ CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y +CONFIG_SPL_HEXDUMP=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index a1e77a511d..7e8694100c 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -281,6 +281,7 @@ CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y +CONFIG_SPL_HEXDUMP=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y diff --git a/lib/Kconfig b/lib/Kconfig index ad4d75e0a4..b0ea4cf91c 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -559,7 +559,6 @@ config HEXDUMP config SPL_HEXDUMP bool "Enable hexdump in SPL" depends on HEXDUMP - default y help This enables functions for printing dumps of binary data in SPL. -- 2.30.2
[PATCH v2 14/14] RFC: Change simple_strtoul() et al to default to hex
Most U-Boot commands use hex for numeric values. However there are quite a few places where a base of '0' is given, meaning to use the default. At present the default input base is actually decimal, which seems confusing. Change this to hex. NOTE: This is a breaking change, for discussion only. It needs more thought and careful checking of each use. Do not apply. Also there is no documentation update here, since it is not yet clear what to say. Signed-off-by: Simon Glass --- (no changes since v1) include/vsprintf.h | 4 ++-- lib/strto.c| 4 ++-- test/str_ut.c | 13 +++-- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git a/include/vsprintf.h b/include/vsprintf.h index 85879e7a9e0..bc2e2f6f483 100644 --- a/include/vsprintf.h +++ b/include/vsprintf.h @@ -34,7 +34,7 @@ * implemented since it is rarely used. See the 'setexpr' command for more * options. * - * If @base is 0 it defaults to decimal (10). + * If @base is 0 it defaults to hex (16). */ ulong simple_strtoul(const char *cp, char **endp, unsigned int base); @@ -95,7 +95,7 @@ unsigned long dectoul(const char *cp, char **endp); * options. * * - * If @base is 0 it defaults to decimal (10). + * If @base is 0 it defaults to hex (16). * * Copied this function from Linux 2.6.38 commit ID: * 521cb40b0c44418a4fd36dc633f575813d59a43d diff --git a/lib/strto.c b/lib/strto.c index 2168d717b25..9126724e129 100644 --- a/lib/strto.c +++ b/lib/strto.c @@ -29,9 +29,9 @@ static const char *_parse_integer_fixup_radix(const char *s, uint *basep) s -= 2; /* odd, nothing found */ } - /* Use decimal by default */ + /* Use hex by default */ if (!*basep) - *basep = 10; + *basep = 16; return s; } diff --git a/test/str_ut.c b/test/str_ut.c index 26fc0864dec..4d22bdd24fd 100644 --- a/test/str_ut.c +++ b/test/str_ut.c @@ -94,19 +94,20 @@ static int str_simple_strtoul(struct unit_test_state *uts) /* Base 0 */ ut_assertok(run_strtoul(uts, str1, 0, 0, 0, upper)); - ut_assertok(run_strtoul(uts, str2, 0, 1099, 4, upper)); + ut_assertok(run_strtoul(uts, str2, 0, 0x1099ab, 6, upper)); ut_assertok(run_strtoul(uts, str3, 0, 0xb, 3, upper)); /* Base 2 */ ut_assertok(run_strtoul(uts, str1, 2, 0, 0, upper)); ut_assertok(run_strtoul(uts, str2, 2, 2, 2, upper)); + ut_assertok(run_strtoul(uts, str3, 2, 0xb, 3, upper)); } /* Check endp being NULL */ - ut_asserteq(1099, simple_strtoul(str2, NULL, 0)); + ut_asserteq(0x1099ab, simple_strtoul(str2, NULL, 0)); /* check decimal */ - ut_assertok(run_strtoul(uts, "123fg", 0, 123, 3, false)); + ut_assertok(run_strtoul(uts, "123fg", 0, 0x123f, 4, false)); ut_assertok(run_strtoul(uts, "123a", 10, 123, 3, false)); ut_assertok(run_strtoul(uts, "0x123fg", 0, 0x123f, 6, false)); ut_assertok(run_strtoul(uts, "0n123a", 16, 123, 5, false)); @@ -159,7 +160,7 @@ static int str_simple_strtoull(struct unit_test_state *uts) /* Base 0 */ ut_assertok(run_strtoull(uts, str1, 0, 0, 0, upper)); - ut_assertok(run_strtoull(uts, str2, 0, 1099, 4, upper)); + ut_assertok(run_strtoull(uts, str2, 0, 0x1099ab, 6, upper)); ut_assertok(run_strtoull(uts, str3, 0, 0xb, 3, upper)); /* Base 2 */ @@ -168,10 +169,10 @@ static int str_simple_strtoull(struct unit_test_state *uts) } /* Check endp being NULL */ - ut_asserteq(1099, simple_strtoull(str2, NULL, 0)); + ut_asserteq(0x1099ab, simple_strtoull(str2, NULL, 0)); /* check decimal */ - ut_assertok(run_strtoull(uts, "123fg", 0, 123, 3, false)); + ut_assertok(run_strtoull(uts, "123fg", 0, 0x123f, 4, false)); ut_assertok(run_strtoull(uts, "123a", 10, 123, 3, false)); ut_assertok(run_strtoull(uts, "0x123fg", 0, 0x123f, 6, false)); ut_assertok(run_strtoull(uts, "0n123a", 16, 123, 5, false)); -- 2.32.0.432.gabb21c7263-goog
[PATCH v2 13/14] lib: Drop octal support
At present if no expected base is provided, a 0 prefix indicates that the
value is octal, so that 077 is interpreted as octal 77 (hex 3f).
If hex is expected, this is interpreted as hex 77 (hex 4d).
This is a little confusing. We could add a 0t or 0o prefix, but since
octal is so rarely used, drop this feature altogether.
Signed-off-by: Simon Glass
Suggested-by: Wolfgang Denk
Fixes: 153d511e369 ("Initial revision")
---
Changes in v2:
- Drop 0o feature and octal support
doc/usage/cmdline.rst | 9 -
include/vsprintf.h | 25 +++--
lib/strto.c| 13 +
test/py/tests/test_hush_if_test.py | 11 ---
test/str_ut.c | 10 --
5 files changed, 24 insertions(+), 44 deletions(-)
diff --git a/doc/usage/cmdline.rst b/doc/usage/cmdline.rst
index ff0f8b77f1c..0184c8f9676 100644
--- a/doc/usage/cmdline.rst
+++ b/doc/usage/cmdline.rst
@@ -84,15 +84,6 @@ Some commands use decimal where it is more natural::
=> i2c speed 10
Setting bus speed to 10 Hz
-In some cases the default is decimal but it is possible to use octal if that is
-useful::
-
- pmic dev pmic@41
- dev: 1 @ pmic@41
- => pmic write 2 0177
- => pmic read 2
- 0x02: 0x7f
-
It is possible to use a `0x` prefix to use a hex value if that is more
convenient::
diff --git a/include/vsprintf.h b/include/vsprintf.h
index 1ff9562c41b..85879e7a9e0 100644
--- a/include/vsprintf.h
+++ b/include/vsprintf.h
@@ -26,9 +26,15 @@
* If found, the base is set to hex (16). Similarly a decimal prefix (e.g.
0n12)
* causes the base to be set to decimal (10).
*
- * If @base is 0:
- *- an octal '0' prefix (e.g. 0777) sets the base to octal (8).
- *- otherwise the base defaults to decimal (10).
+ * Note that the '0' prefix is not supported for octal. So when @base is 10,
+ * "0123" is interpreted as decimal 123, not octal. This is to avoid confusion
+ * with hex values which can start with 0.
+ *
+ * It would be possible to add a 0o prefix for octal, but this is not
+ * implemented since it is rarely used. See the 'setexpr' command for more
+ * options.
+ *
+ * If @base is 0 it defaults to decimal (10).
*/
ulong simple_strtoul(const char *cp, char **endp, unsigned int base);
@@ -80,9 +86,16 @@ unsigned long dectoul(const char *cp, char **endp);
* If found, the base is set to hex (16). Similarly a decimal prefix (e.g.
0n12)
* causes the base to be set to decimal (10).
*
- * If @base is 0:
- *- an octal '0' prefix (e.g. 0777) sets the base to octal (8).
- *- otherwise the base defaults to decimal (10).
+ * Note that the '0' prefix is not supported for octal. So when @base is 10,
+ * "0123" is interpreted as decimal 123, not octal. This is to avoid confusion
+ * with hex values which can start with 0.
+ *
+ * It would be possible to add a 0o prefix for octal, but this is not
+ * implemented since it is rarely used. See the 'setexpr' command for more
+ * options.
+ *
+ *
+ * If @base is 0 it defaults to decimal (10).
*
* Copied this function from Linux 2.6.38 commit ID:
* 521cb40b0c44418a4fd36dc633f575813d59a43d
diff --git a/lib/strto.c b/lib/strto.c
index 0fdc3d68b90..2168d717b25 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -20,16 +20,13 @@ static const char *_parse_integer_fixup_radix(const char
*s, uint *basep)
if (s[0] == '0') {
int ch = tolower(s[1]);
- if (ch == 'x') {
+ s += 2;
+ if (ch == 'x')
*basep = 16;
- s += 2;
- } else if (ch == 'n') {
+ else if (ch == 'n')
*basep = 10;
- s += 2;
- } else if (!*basep) {
- /* Only select octal if we don't have a base */
- *basep = 8;
- }
+ else
+ s -= 2; /* odd, nothing found */
}
/* Use decimal by default */
diff --git a/test/py/tests/test_hush_if_test.py
b/test/py/tests/test_hush_if_test.py
index d117921a6ac..b7b7785863f 100644
--- a/test/py/tests/test_hush_if_test.py
+++ b/test/py/tests/test_hush_if_test.py
@@ -56,14 +56,6 @@ subtests = (
('test 123 -ge 123', True),
('test 123 -ge 456', False),
-# Octal tests
-
-('test 010 -eq 010', True),
-('test 010 -eq 011', False),
-
-('test 010 -ne 011', True),
-('test 010 -ne 010', False),
-
# Hexadecimal tests
('test 0x200 -gt 0x201', False),
@@ -72,10 +64,7 @@ subtests = (
# Mixed tests
-('test 010 -eq 10', False),
-('test 010 -ne 10', True),
('test 0xa -eq 10', True),
-('test 0xa -eq 012', True),
('test 200 -gt 0x1ff', False),
('test 0x200 -gt 1ff', True),
diff --git a/test/str_ut.c b/test/str_ut.c
index c3b797b027a..26fc0864dec 100644
--- a/test/str_ut.c
+++ b/test/str_ut.c
@@ -17,8
[PATCH v2 12/14] lib: Support a decimal prefix 0n
U-Boot mostly uses hex for value input, largely because addresses are much
easier to understand in hex.
However sometimes it is useful to be able to supply a decimal value when a
hex value is expected.
Add this functionality, for increased flexibility.
Signed-off-by: Simon Glass
---
Changes in v2:
- Use 0n instead for the decimal prefix
doc/usage/cmdline.rst | 7 +++
include/vsprintf.h| 6 --
lib/strto.c | 3 +++
test/str_ut.c | 12
4 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/doc/usage/cmdline.rst b/doc/usage/cmdline.rst
index 88f18c974c8..ff0f8b77f1c 100644
--- a/doc/usage/cmdline.rst
+++ b/doc/usage/cmdline.rst
@@ -65,6 +65,13 @@ use of addresses, for example::
1000: 2c786f62 00697073 0300 0c00 box,spi.
1010: 6702 ...g
+In these cases it is possible to use a `0n` prefix to use a decimal value if
+that is more convenient. For example, this shows 19 bytes (0x13)::
+
+ => md.b 1000 0n19
+ 1000: 62 6f 78 2c 73 70 69 00 00 00 00 03 00 00 00 0c box,spi.
+ 1010: 00 00 02 ...
+
There is no need to add a `0x` prefix to the arguments and the output is shown
in hex also, without any prefixes. This helps to avoid clutter.
diff --git a/include/vsprintf.h b/include/vsprintf.h
index 604963dad61..1ff9562c41b 100644
--- a/include/vsprintf.h
+++ b/include/vsprintf.h
@@ -23,7 +23,8 @@
* 0 is returned
*
* A hex prefix is supported (e.g. 0x123) regardless of the value of @base.
- * If found, the base is set to hex (16).
+ * If found, the base is set to hex (16). Similarly a decimal prefix (e.g.
0n12)
+ * causes the base to be set to decimal (10).
*
* If @base is 0:
*- an octal '0' prefix (e.g. 0777) sets the base to octal (8).
@@ -76,7 +77,8 @@ unsigned long dectoul(const char *cp, char **endp);
* echo will append a newline to the tail.
*
* A hex prefix is supported (e.g. 0x123) regardless of the value of @base.
- * If found, the base is set to hex (16).
+ * If found, the base is set to hex (16). Similarly a decimal prefix (e.g.
0n12)
+ * causes the base to be set to decimal (10).
*
* If @base is 0:
*- an octal '0' prefix (e.g. 0777) sets the base to octal (8).
diff --git a/lib/strto.c b/lib/strto.c
index 54ee3e81f6a..0fdc3d68b90 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -23,6 +23,9 @@ static const char *_parse_integer_fixup_radix(const char *s,
uint *basep)
if (ch == 'x') {
*basep = 16;
s += 2;
+ } else if (ch == 'n') {
+ *basep = 10;
+ s += 2;
} else if (!*basep) {
/* Only select octal if we don't have a base */
*basep = 8;
diff --git a/test/str_ut.c b/test/str_ut.c
index d2840d51524..c3b797b027a 100644
--- a/test/str_ut.c
+++ b/test/str_ut.c
@@ -111,6 +111,12 @@ static int str_simple_strtoul(struct unit_test_state *uts)
/* Check endp being NULL */
ut_asserteq(1099, simple_strtoul(str2, NULL, 0));
+ /* check decimal */
+ ut_assertok(run_strtoul(uts, "123fg", 0, 123, 3, false));
+ ut_assertok(run_strtoul(uts, "123a", 10, 123, 3, false));
+ ut_assertok(run_strtoul(uts, "0x123fg", 0, 0x123f, 6, false));
+ ut_assertok(run_strtoul(uts, "0n123a", 16, 123, 5, false));
+
return 0;
}
STR_TEST(str_simple_strtoul, 0);
@@ -174,6 +180,12 @@ static int str_simple_strtoull(struct unit_test_state *uts)
/* Check endp being NULL */
ut_asserteq(1099, simple_strtoull(str2, NULL, 0));
+ /* check decimal */
+ ut_assertok(run_strtoull(uts, "123fg", 0, 123, 3, false));
+ ut_assertok(run_strtoull(uts, "123a", 10, 123, 3, false));
+ ut_assertok(run_strtoull(uts, "0x123fg", 0, 0x123f, 6, false));
+ ut_assertok(run_strtoull(uts, "0n123a", 16, 123, 5, false));
+
return 0;
}
STR_TEST(str_simple_strtoull, 0);
--
2.32.0.432.gabb21c7263-goog
[PATCH v2 11/14] lib: Allow using 0x when a decimal value is requested
U-Boot mostly uses hex for value input, largely because addresses are much
easier to understand in hex.
But in some cases a decimal value is requested, such as where the value is
small or hex does not make sense in the context. In these cases it is
sometimes useful to be able to provide a hex value in any case, if only to
resolve any ambiguity.
Add this functionality, for increased flexibility.
Signed-off-by: Simon Glass
---
(no changes since v1)
doc/usage/cmdline.rst | 6 ++
include/vsprintf.h| 16
lib/strto.c | 28 +---
test/str_ut.c | 4 ++--
4 files changed, 37 insertions(+), 17 deletions(-)
diff --git a/doc/usage/cmdline.rst b/doc/usage/cmdline.rst
index 2d5127c9554..88f18c974c8 100644
--- a/doc/usage/cmdline.rst
+++ b/doc/usage/cmdline.rst
@@ -85,3 +85,9 @@ useful::
=> pmic write 2 0177
=> pmic read 2
0x02: 0x7f
+
+It is possible to use a `0x` prefix to use a hex value if that is more
+convenient::
+
+ => i2c speed 0x3
+ Setting bus speed to 196608 Hz
diff --git a/include/vsprintf.h b/include/vsprintf.h
index 0e112b5d5ba..604963dad61 100644
--- a/include/vsprintf.h
+++ b/include/vsprintf.h
@@ -22,8 +22,12 @@
* the end these are ignored. In the worst case, if all characters are invalid,
* 0 is returned
*
- * If @base is 0, octal or hex prefixes are supported (e.g. 0777, 0x123) to
- * select a particular base. By default decimal is used.
+ * A hex prefix is supported (e.g. 0x123) regardless of the value of @base.
+ * If found, the base is set to hex (16).
+ *
+ * If @base is 0:
+ *- an octal '0' prefix (e.g. 0777) sets the base to octal (8).
+ *- otherwise the base defaults to decimal (10).
*/
ulong simple_strtoul(const char *cp, char **endp, unsigned int base);
@@ -71,8 +75,12 @@ unsigned long dectoul(const char *cp, char **endp);
*
* echo will append a newline to the tail.
*
- * If @base is 0, octal or hex prefixes are supported (e.g. 0777, 0x123) to
- * select a particular base. By default decimal is used.
+ * A hex prefix is supported (e.g. 0x123) regardless of the value of @base.
+ * If found, the base is set to hex (16).
+ *
+ * If @base is 0:
+ *- an octal '0' prefix (e.g. 0777) sets the base to octal (8).
+ *- otherwise the base defaults to decimal (10).
*
* Copied this function from Linux 2.6.38 commit ID:
* 521cb40b0c44418a4fd36dc633f575813d59a43d
diff --git a/lib/strto.c b/lib/strto.c
index c3f0f8e8c6c..54ee3e81f6a 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -14,19 +14,25 @@
#include
/* from lib/kstrtox.c */
-static const char *_parse_integer_fixup_radix(const char *s, unsigned int
*base)
+static const char *_parse_integer_fixup_radix(const char *s, uint *basep)
{
- if (*base == 0) {
- if (s[0] == '0') {
- if (tolower(s[1]) == 'x')
- *base = 16;
- else
- *base = 8;
- } else
- *base = 10;
+ /* Look for a 0x prefix */
+ if (s[0] == '0') {
+ int ch = tolower(s[1]);
+
+ if (ch == 'x') {
+ *basep = 16;
+ s += 2;
+ } else if (!*basep) {
+ /* Only select octal if we don't have a base */
+ *basep = 8;
+ }
}
- if (*base == 16 && s[0] == '0' && tolower(s[1]) == 'x')
- s += 2;
+
+ /* Use decimal by default */
+ if (!*basep)
+ *basep = 10;
+
return s;
}
diff --git a/test/str_ut.c b/test/str_ut.c
index 0d1bf398099..d2840d51524 100644
--- a/test/str_ut.c
+++ b/test/str_ut.c
@@ -89,7 +89,7 @@ static int str_simple_strtoul(struct unit_test_state *uts)
ut_assertok(run_strtoul(uts, str2, 10, 1099, 4, upper));
ut_assertok(run_strtoul(uts, str2, 16, 0x1099ab, 6, upper));
ut_assertok(run_strtoul(uts, str3, 16, 0xb, 3, upper));
- ut_assertok(run_strtoul(uts, str3, 10, 0, 1, upper));
+ ut_assertok(run_strtoul(uts, str3, 10, 0xb, 3, upper));
/* Octal */
ut_assertok(run_strtoul(uts, str6, 0, 63, 3, upper));
@@ -144,7 +144,7 @@ static int str_simple_strtoull(struct unit_test_state *uts)
ut_assertok(run_strtoull(uts, str2, 10, 1099, 4, upper));
ut_assertok(run_strtoull(uts, str2, 16, 0x1099ab, 6, upper));
ut_assertok(run_strtoull(uts, str3, 16, 0xb, 3, upper));
- ut_assertok(run_strtoull(uts, str3, 10, 0, 1, upper));
+ ut_assertok(run_strtoull(uts, str3, 10, 0xb, 3, upper));
/* Octal */
ut_assertok(run_strtoull(uts, str6, 0, 63, 3, upper));
--
2.32.0.432.gabb21c7263-goog
[PATCH v2 10/14] doc: Add a note about number representation
Mention the default base of U-Boot in the command-line section. Add examples for decimal and octal. Signed-off-by: Simon Glass --- (no changes since v1) doc/usage/cmdline.rst | 31 +++ 1 file changed, 31 insertions(+) diff --git a/doc/usage/cmdline.rst b/doc/usage/cmdline.rst index b3dbdb8b230..2d5127c9554 100644 --- a/doc/usage/cmdline.rst +++ b/doc/usage/cmdline.rst @@ -54,3 +54,34 @@ General rules calling run with a list of variables as arguments), any failing command will cause "run" to terminate, i. e. the remaining variables are not executed. + +Representing numbers + + +Most U-Boot commands use hexadecimal (hex) as the default base, for convenient +use of addresses, for example:: + + => md 1000 6 + 1000: 2c786f62 00697073 0300 0c00 box,spi. + 1010: 6702 ...g + +There is no need to add a `0x` prefix to the arguments and the output is shown +in hex also, without any prefixes. This helps to avoid clutter. + +Some commands use decimal where it is more natural:: + + => i2c dev 0 + Setting bus to 0 + => i2c speed + Current bus speed=40 + => i2c speed 10 + Setting bus speed to 10 Hz + +In some cases the default is decimal but it is possible to use octal if that is +useful:: + + pmic dev pmic@41 + dev: 1 @ pmic@41 + => pmic write 2 0177 + => pmic read 2 + 0x02: 0x7f -- 2.32.0.432.gabb21c7263-goog
[PATCH v2 09/14] doc: Convert command-line info to rST
Take this part of the README and put it into rST format.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add an SPDX header to the file too
README| 41 ---
doc/usage/cmdline.rst | 56 +++
doc/usage/index.rst | 1 +
3 files changed, 57 insertions(+), 41 deletions(-)
create mode 100644 doc/usage/cmdline.rst
diff --git a/README b/README
index 1472b40bc45..fbb8895dbbb 100644
--- a/README
+++ b/README
@@ -3507,47 +3507,6 @@ The signature of the callback functions is:
The return value is 0 if the variable change is accepted and 1 otherwise.
-Command Line Parsing:
-=
-
-There are two different command line parsers available with U-Boot:
-the old "simple" one, and the much more powerful "hush" shell:
-
-Old, simple command line parser:
-
-
-- supports environment variables (through setenv / saveenv commands)
-- several commands on one line, separated by ';'
-- variable substitution using "... ${name} ..." syntax
-- special characters ('$', ';') can be escaped by prefixing with '\',
- for example:
- setenv bootcmd bootm \${address}
-- You can also escape text by enclosing in single apostrophes, for example:
- setenv addip 'setenv bootargs $bootargs
ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
-
-Hush shell:
-
-- similar to Bourne shell, with control structures like
- if...then...else...fi, for...do...done; while...do...done,
- until...do...done, ...
-- supports environment ("global") variables (through setenv / saveenv
- commands) and local shell variables (through standard shell syntax
- "name=value"); only environment variables can be used with "run"
- command
-
-General rules:
---
-
-(1) If a command line (or an environment variable executed by a "run"
-command) contains several commands separated by semicolon, and
-one of these commands fails, then the remaining commands will be
-executed anyway.
-
-(2) If you execute several variables with one call to run (i. e.
-calling run with a list of variables as arguments), any failing
-command will cause "run" to terminate, i. e. the remaining
-variables are not executed.
Note for Redundant Ethernet Interfaces:
===
diff --git a/doc/usage/cmdline.rst b/doc/usage/cmdline.rst
new file mode 100644
index 000..b3dbdb8b230
--- /dev/null
+++ b/doc/usage/cmdline.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Command-line Parsing
+
+
+The command line is available in U-Boot proper, enabled by CONFIG_CMDLINE which
+is on by default. It is not enabled in SPL.
+
+There are two different command-line parsers available with U-Boot:
+the old "simple" one, and the much more powerful "hush" shell:
+
+Simple command-line parser
+--
+
+This takes very little code space and offers only basic features:
+
+- supports environment variables (through setenv / saveenv commands)
+- several commands on one line, separated by ';'
+- variable substitution using "... ${name} ..." syntax
+- special characters ('$', ';') can be escaped by prefixing with '\',
+ for example::
+
+setenv bootcmd bootm \${address}
+
+- You can also escape text by enclosing in single apostrophes, for example::
+
+setenv addip 'setenv bootargs $bootargs
ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
+
+Hush shell
+--
+
+This is similar to Bourne shell, with control structures like:
+
+- `if`... `then` ... `else`... `fi`
+- `for`... `do` ... `done`
+- `while` ... `do` ... `done`
+- `until` ... `do` ... `done`
+
+Hush supports environment ("global") variables (through setenv / saveenv
+commands) and local shell variables (through standard shell syntax
+`name=value`); only environment variables can be used with the "run" command
+
+The Hush shell is enabled with `CONFIG_HUSH_PARSER`.
+
+General rules
+-
+
+#. If a command line (or an environment variable executed by a "run"
+ command) contains several commands separated by semicolon, and
+ one of these commands fails, then the remaining commands will be
+ executed anyway.
+
+#. If you execute several variables with one call to run (i. e.
+ calling run with a list of variables as arguments), any failing
+ command will cause "run" to terminate, i. e. the remaining
+ variables are not executed.
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 40b796a3a91..2d2e8486e67 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -9,6 +9,7 @@ Use U-Boot
fit
netconsole
partitions
+ cmdline
Shell commands
--
--
2.32.0.432.gabb21c7263-goog
[PATCH v2 07/14] lib: Add octal tests for simple_strtoul/l()
This function support decoding octal but no tests are included yet. Add some. Signed-off-by: Simon Glass --- (no changes since v1) test/str_ut.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/test/str_ut.c b/test/str_ut.c index 880cc928ec8..0d1bf398099 100644 --- a/test/str_ut.c +++ b/test/str_ut.c @@ -17,6 +17,8 @@ static const char str2[] = "1099abNo, don't bother apologising."; static const char str3[] = "0xbI'm sorry you're alive."; static const char str4[] = "1234567890123 I lost closer friends"; static const char str5[] = "0x9876543210the last time I was deloused"; +static const char str6[] = "0778octal is seldom used"; +static const char str7[] = "707it is a piece of computing history"; /* Declare a new str test */ #define STR_TEST(_name, _flags)UNIT_TEST(_name, _flags, str_test) @@ -89,6 +91,10 @@ static int str_simple_strtoul(struct unit_test_state *uts) ut_assertok(run_strtoul(uts, str3, 16, 0xb, 3, upper)); ut_assertok(run_strtoul(uts, str3, 10, 0, 1, upper)); + /* Octal */ + ut_assertok(run_strtoul(uts, str6, 0, 63, 3, upper)); + ut_assertok(run_strtoul(uts, str7, 8, 0x1c7, 3, upper)); + /* Invalid string */ ut_assertok(run_strtoul(uts, str1, 10, 0, 0, upper)); @@ -140,6 +146,10 @@ static int str_simple_strtoull(struct unit_test_state *uts) ut_assertok(run_strtoull(uts, str3, 16, 0xb, 3, upper)); ut_assertok(run_strtoull(uts, str3, 10, 0, 1, upper)); + /* Octal */ + ut_assertok(run_strtoull(uts, str6, 0, 63, 3, upper)); + ut_assertok(run_strtoull(uts, str7, 8, 0x1c7, 3, upper)); + /* Large values */ ut_assertok(run_strtoull(uts, str4, 10, 1234567890123, 13, upper)); -- 2.32.0.432.gabb21c7263-goog
[PATCH v2 06/14] lib: Add tests for simple_strtoull()
Add some tests that check the behaviour of this function. These are the
same as for simple_strtoul() but with a few longer values.
Signed-off-by: Simon Glass
---
(no changes since v1)
test/str_ut.c | 61 +++
1 file changed, 61 insertions(+)
diff --git a/test/str_ut.c b/test/str_ut.c
index 8133b213bfa..880cc928ec8 100644
--- a/test/str_ut.c
+++ b/test/str_ut.c
@@ -15,6 +15,8 @@
static const char str1[] = "I'm sorry I'm late.";
static const char str2[] = "1099abNo, don't bother apologising.";
static const char str3[] = "0xbI'm sorry you're alive.";
+static const char str4[] = "1234567890123 I lost closer friends";
+static const char str5[] = "0x9876543210the last time I was deloused";
/* Declare a new str test */
#define STR_TEST(_name, _flags)UNIT_TEST(_name, _flags,
str_test)
@@ -107,6 +109,65 @@ static int str_simple_strtoul(struct unit_test_state *uts)
}
STR_TEST(str_simple_strtoul, 0);
+static int run_strtoull(struct unit_test_state *uts, const char *str, int base,
+ unsigned long long expect_val, int expect_endp_offset,
+ bool upper)
+{
+ char out[TEST_STR_SIZE];
+ char *endp;
+ unsigned long long val;
+
+ strcpy(out, str);
+ if (upper)
+ str_to_upper(out, out, -1);
+
+ val = simple_strtoull(out, , base);
+ ut_asserteq(expect_val, val);
+ ut_asserteq(expect_endp_offset, endp - out);
+
+ return 0;
+}
+
+static int str_simple_strtoull(struct unit_test_state *uts)
+{
+ int upper;
+
+ /* Check that it is case-insentive */
+ for (upper = 0; upper < 2; upper++) {
+ /* Base 10 and base 16 */
+ ut_assertok(run_strtoull(uts, str2, 10, 1099, 4, upper));
+ ut_assertok(run_strtoull(uts, str2, 16, 0x1099ab, 6, upper));
+ ut_assertok(run_strtoull(uts, str3, 16, 0xb, 3, upper));
+ ut_assertok(run_strtoull(uts, str3, 10, 0, 1, upper));
+
+ /* Large values */
+ ut_assertok(run_strtoull(uts, str4, 10, 1234567890123, 13,
+upper));
+ ut_assertok(run_strtoull(uts, str4, 16, 0x1234567890123, 13,
+upper));
+ ut_assertok(run_strtoull(uts, str5, 0, 0x9876543210, 12,
+upper));
+
+ /* Invalid string */
+ ut_assertok(run_strtoull(uts, str1, 10, 0, 0, upper));
+
+ /* Base 0 */
+ ut_assertok(run_strtoull(uts, str1, 0, 0, 0, upper));
+ ut_assertok(run_strtoull(uts, str2, 0, 1099, 4, upper));
+ ut_assertok(run_strtoull(uts, str3, 0, 0xb, 3, upper));
+
+ /* Base 2 */
+ ut_assertok(run_strtoull(uts, str1, 2, 0, 0, upper));
+ ut_assertok(run_strtoull(uts, str2, 2, 2, 2, upper));
+ }
+
+ /* Check endp being NULL */
+ ut_asserteq(1099, simple_strtoull(str2, NULL, 0));
+
+ return 0;
+}
+STR_TEST(str_simple_strtoull, 0);
+
static int str_hextoul(struct unit_test_state *uts)
{
char *endp;
--
2.32.0.432.gabb21c7263-goog
[PATCH v2 03/14] global: Convert simple_strtoul() with decimal to dectoul()
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass --- (no changes since v1) arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +- arch/arm/mach-imx/cmd_dek.c | 2 +- arch/arm/mach-imx/cmd_mfgprot.c | 2 +- arch/arm/mach-imx/imx8/snvs_security_sc.c | 2 +- arch/arm/mach-keystone/cmd_clock.c| 10 ++--- arch/arm/mach-kirkwood/cpu.c | 2 +- arch/arm/mach-nexell/clock.c | 2 +- .../cmd_stm32prog/cmd_stm32prog.c | 2 +- .../mach-stm32mp/cmd_stm32prog/stm32prog.c| 2 +- arch/powerpc/cpu/mpc83xx/ecc.c| 4 +- board/Arcturus/ucp1020/ucp1020.c | 2 +- board/BuS/eb_cpu5282/eb_cpu5282.c | 8 ++-- board/atmel/common/board.c| 2 +- board/cavium/thunderx/atf.c | 24 +-- board/compulab/common/eeprom.c| 2 +- board/compulab/common/omap3_display.c | 2 +- board/davinci/da8xxevm/da850evm.c | 2 +- board/freescale/common/pixis.c| 8 ++-- board/freescale/common/sys_eeprom.c | 2 +- board/gateworks/gw_ventana/gsc.c | 4 +- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/gateworks/venice/gsc.c | 2 +- board/gdsys/common/cmd_ioloop.c | 16 board/samsung/common/exynos5-dt.c | 2 +- board/samsung/odroid/odroid.c | 2 +- board/siemens/taurus/taurus.c | 5 +-- .../unmatched/hifive-platform-i2c-eeprom.c| 6 +-- board/synopsys/hsdk/env-lib.c | 2 +- board/toradex/common/tdx-cfg-block.c | 14 +++ board/varisys/common/sys_eeprom.c | 2 +- .../work_92105/work_92105_display.c | 3 +- cmd/avb.c | 2 +- cmd/axi.c | 8 ++-- cmd/bind.c| 4 +- cmd/binop.c | 2 +- cmd/blk_common.c | 4 +- cmd/bmp.c | 4 +- cmd/clk.c | 2 +- cmd/clone.c | 2 +- cmd/cros_ec.c | 4 +- cmd/demo.c| 2 +- cmd/exit.c| 2 +- cmd/flash.c | 6 +-- cmd/gpio.c| 4 +- cmd/gpt.c | 2 +- cmd/i2c.c | 8 ++-- cmd/led.c | 2 +- cmd/legacy_led.c | 2 +- cmd/load.c| 6 +-- cmd/log.c | 4 +- cmd/mbr.c | 2 +- cmd/mem.c | 4 +- cmd/mmc.c | 40 +-- cmd/mp.c | 2 +- cmd/nand.c| 2 +- cmd/nvedit.c | 2 +- cmd/optee_rpmb.c | 2 +- cmd/osd.c | 4 +- cmd/pcap.c| 2 +- cmd/pstore.c | 2 +- cmd/pwm.c | 10 ++--- cmd/remoteproc.c | 6 +-- cmd/rtc.c | 2 +- cmd/sata.c| 2 +- cmd/sleep.c | 2 +- cmd/sound.c | 4 +- cmd/spi.c | 10 ++--- cmd/ti/pd.c | 4 +- cmd/tpm-common.c | 2 +- cmd/ufs.c | 2 +- cmd/usb.c | 6 +-- cmd/w1.c | 8 ++-- common/bedbug.c | 2 +- common/lcd_console.c | 4 +- disk/part_amiga.c | 4 +- drivers/dfu/dfu_mmc.c | 2 +- drivers/dfu/dfu_mtd.c | 2 +- drivers/dfu/dfu_nand.c| 4 +- drivers/dfu/dfu_sf.c | 4 +- drivers/dfu/dfu_virt.c| 2 +- drivers/gpio/gpio-uclass.c| 2 +- drivers/gpio/mxs_gpio.c | 4 +- drivers/gpio/tca642x.c| 4 +- drivers/net/e1000.c | 2 +- drivers/net/fsl-mc/mc.c | 2 +- drivers/net/netconsole.c | 6 +--
[PATCH v2 08/14] lib: Move common digit-parsing code into a function
The code to convert a character into a digit is repeated twice in this
file. Factor it out into a separate function. This also makes the code a
little easier to read.
Signed-off-by: Simon Glass
---
(no changes since v1)
lib/strto.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/lib/strto.c b/lib/strto.c
index ab6867a963f..c3f0f8e8c6c 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -30,16 +30,33 @@ static const char *_parse_integer_fixup_radix(const char
*s, unsigned int *base)
return s;
}
+/**
+ * decode_digit() - Decode a single character into its numeric digit value
+ *
+ * This ignore case
+ *
+ * @ch: Character to convert (expects '0'..'9', 'a'..'f' or 'A'..'F')
+ * @return value of digit (0..0xf) or 255 if the character is invalid
+ */
+static uint decode_digit(int ch)
+{
+ if (!isxdigit(ch))
+ return 256;
+
+ ch = tolower(ch);
+
+ return ch <= '9' ? ch - '0' : ch - 'a' + 0xa;
+}
+
ulong simple_strtoul(const char *cp, char **endp, uint base)
{
ulong result = 0;
- ulong value;
+ uint value;
cp = _parse_integer_fixup_radix(cp, );
- while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
- ? toupper(*cp) : *cp)-'A'+10) < base) {
- result = result*base + value;
+ while (value = decode_digit(*cp), value < base) {
+ result = result * base + value;
cp++;
}
@@ -136,12 +153,12 @@ unsigned long long ustrtoull(const char *cp, char **endp,
unsigned int base)
unsigned long long simple_strtoull(const char *cp, char **endp,
unsigned int base)
{
- unsigned long long result = 0, value;
+ unsigned long long result = 0;
+ uint value;
cp = _parse_integer_fixup_radix(cp, );
- while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp - '0'
- : (islower(*cp) ? toupper(*cp) : *cp) - 'A' + 10) < base) {
+ while (value = decode_digit(*cp), value < base) {
result = result * base + value;
cp++;
}
--
2.32.0.432.gabb21c7263-goog
[PATCH v2 05/14] lib: Drop unnecessary check for hex digit
If we see 0x then we can assume this is the start of a hex value. It
does not seem necessary to check for a hex digit after that since it will
happen when parsing the value anyway.
Drop this check to simplify the code and reduce size. Add a few more test
cases for when a 0x prefix is used.
Signed-off-by: Simon Glass
---
(no changes since v1)
lib/strto.c | 2 +-
test/str_ut.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/lib/strto.c b/lib/strto.c
index f4fb3faf2fa..ab6867a963f 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -18,7 +18,7 @@ static const char *_parse_integer_fixup_radix(const char *s,
unsigned int *base)
{
if (*base == 0) {
if (s[0] == '0') {
- if (tolower(s[1]) == 'x' && isxdigit(s[2]))
+ if (tolower(s[1]) == 'x')
*base = 16;
else
*base = 8;
diff --git a/test/str_ut.c b/test/str_ut.c
index 19f2c127135..8133b213bfa 100644
--- a/test/str_ut.c
+++ b/test/str_ut.c
@@ -84,6 +84,8 @@ static int str_simple_strtoul(struct unit_test_state *uts)
/* Base 10 and base 16 */
ut_assertok(run_strtoul(uts, str2, 10, 1099, 4, upper));
ut_assertok(run_strtoul(uts, str2, 16, 0x1099ab, 6, upper));
+ ut_assertok(run_strtoul(uts, str3, 16, 0xb, 3, upper));
+ ut_assertok(run_strtoul(uts, str3, 10, 0, 1, upper));
/* Invalid string */
ut_assertok(run_strtoul(uts, str1, 10, 0, 0, upper));
--
2.32.0.432.gabb21c7263-goog
[PATCH v2 04/14] lib: Comment the base parameter with simple_strtoul/l()
This parameter is not documented properly since it does not cover the meaning when the base is 0. Update this in both functions. Signed-off-by: Simon Glass --- (no changes since v1) include/vsprintf.h | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/include/vsprintf.h b/include/vsprintf.h index 2b0e15f84a3..0e112b5d5ba 100644 --- a/include/vsprintf.h +++ b/include/vsprintf.h @@ -15,12 +15,15 @@ * * @param cp The string to be converted * @param endp Updated to point to the first character not converted - * @param base The number base to use + * @param base The number base to use (0 for the default) * @return value decoded from string (0 if invalid) * * Converts a string to an unsigned long. If there are invalid characters at * the end these are ignored. In the worst case, if all characters are invalid, * 0 is returned + * + * If @base is 0, octal or hex prefixes are supported (e.g. 0777, 0x123) to + * select a particular base. By default decimal is used. */ ulong simple_strtoul(const char *cp, char **endp, unsigned int base); @@ -53,7 +56,7 @@ unsigned long dectoul(const char *cp, char **endp); /** * strict_strtoul - convert a string to an unsigned long strictly * @param cp The string to be converted - * @param base The number base to use + * @param base The number base to use (0 for the default) * @param res The converted result value * @return 0 if conversion is successful and *res is set to the converted * value, otherwise it returns -EINVAL and *res is set to 0. @@ -68,6 +71,9 @@ unsigned long dectoul(const char *cp, char **endp); * * echo will append a newline to the tail. * + * If @base is 0, octal or hex prefixes are supported (e.g. 0777, 0x123) to + * select a particular base. By default decimal is used. + * * Copied this function from Linux 2.6.38 commit ID: * 521cb40b0c44418a4fd36dc633f575813d59a43d * -- 2.32.0.432.gabb21c7263-goog
[PATCH v2 01/14] hash: Ensure verification hex pairs are terminated
This function seems to assume that the chr[] variable contains zeros at
the start, which is not always true. Use strlcpy() to be safe.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/hash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/hash.c b/common/hash.c
index 90cf46bcba5..059d381e231 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -396,7 +396,7 @@ int hash_parse_string(const char *algo_name, const char
*str, uint8_t *result)
for (i = 0; i < algo->digest_size; i++) {
char chr[3];
- strncpy(chr, [i * 2], 2);
+ strlcpy(chr, [i * 2], 3);
result[i] = simple_strtoul(chr, NULL, 16);
}
--
2.32.0.432.gabb21c7263-goog
[PATCH v2 00/14] lib: Add support for a decimal 0t prefix for numbers
U-Boot mostly uses hex for value input, largely because addresses are much easier to understand in hex. But in some cases a hex value is requested, but it is more convenient to provide a decimal value. This may be because the value comes from another source, where its base cannot be controlled. This series adds support for a 0m prefix to indicate a decimal number. The letter 'n' is chosen because: - 'n' (Number) is easier to read than 'm' and is currently the first search on Google for '0t prefix' (Microsoft masm) - cannot use a-f since they indicate a hex value (e.g. 0d would be ambiguous) - 'l' is harder to read since 1 and l look similar (0l123) - 't' (as in ten) seems a bit obscure and the 't could be 'octal' which may be a better idea that 'o' for ocTal since 0o123 looks odd. Having said that, netbsd uses it in its ddb command - 'm' as in deciMal is a little hard to read and 'm' is a bit hard to associate with decimal At present, base prefixes are only accepted when no specific base is provided to the simple_strtoul() function, i.e. base is 0. This is not very flexible, so this series updates the code to always allow a base prefix. So when decimal is requested, it is possible to provide 0x123 to get a hex value. A final patch is included for discussion only. This is intended to change the default to hex consistently through U-Boot, although it does not quite accomplish that. If this goal is desirable, then we should also consider: - dropping the base argument, since callers can now hextoul() and dectoul() when a specific base is requested - converting these calls (with base == 0) to hextoul() since that is what would mean Changes in v2: - Add an SPDX header to the file too - Use 0n instead for the decimal prefix - Drop 0o feature and octal support Simon Glass (14): hash: Ensure verification hex pairs are terminated global: Convert simple_strtoul() with hex to hextoul() global: Convert simple_strtoul() with decimal to dectoul() lib: Comment the base parameter with simple_strtoul/l() lib: Drop unnecessary check for hex digit lib: Add tests for simple_strtoull() lib: Add octal tests for simple_strtoul/l() lib: Move common digit-parsing code into a function doc: Convert command-line info to rST doc: Add a note about number representation lib: Allow using 0x when a decimal value is requested lib: Support a decimal prefix 0n lib: Drop octal support RFC: Change simple_strtoul() et al to default to hex README| 41 --- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 12 +- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +- arch/arm/lib/semihosting.c| 2 +- arch/arm/mach-imx/cmd_dek.c | 6 +- arch/arm/mach-imx/cmd_mfgprot.c | 4 +- arch/arm/mach-imx/cmd_nandbcb.c | 10 +- arch/arm/mach-imx/hab.c | 6 +- arch/arm/mach-imx/imx8/ahab.c | 2 +- arch/arm/mach-imx/imx8/snvs_security_sc.c | 56 +- arch/arm/mach-imx/imx_bootaux.c | 2 +- arch/arm/mach-imx/mx6/mp.c| 2 +- arch/arm/mach-keystone/cmd_clock.c| 10 +- arch/arm/mach-keystone/cmd_mon.c | 8 +- arch/arm/mach-kirkwood/cpu.c | 2 +- arch/arm/mach-nexell/clock.c | 2 +- arch/arm/mach-snapdragon/misc.c | 2 +- arch/arm/mach-socfpga/misc.c | 2 +- arch/arm/mach-socfpga/vab.c | 4 +- arch/arm/mach-stm32mp/cmd_stm32key.c | 4 +- .../cmd_stm32prog/cmd_stm32prog.c | 6 +- .../mach-stm32mp/cmd_stm32prog/stm32prog.c| 2 +- arch/arm/mach-uniphier/board_late_init.c | 2 +- arch/arm/mach-zynqmp/mp.c | 2 +- arch/mips/mach-octeon/bootoctlinux.c | 5 +- arch/nds32/lib/bootm.c| 2 +- arch/nios2/lib/bootm.c| 2 +- arch/powerpc/cpu/mpc83xx/ecc.c| 18 +-- arch/powerpc/cpu/mpc85xx/mp.c | 2 +- arch/sh/lib/zimageboot.c | 5 +- arch/x86/lib/zimage.c | 14 +-- board/Arcturus/ucp1020/ucp1020.c | 2 +- board/BuS/eb_cpu5282/eb_cpu5282.c | 10 +- board/Marvell/octeontx2/board.c | 2 +- board/amlogic/beelink-s922x/beelink-s922x.c | 2 +- board/amlogic/odroid-n2/odroid-n2.c | 2 +- board/amlogic/vim3/vim3.c | 2 +- board/atmel/common/board.c| 2 +- board/bluewater/gurnard/gurnard.c | 2 +- board/cavium/thunderx/atf.c | 32 +++--- board/compulab/common/eeprom.c| 2 +- board/compulab/common/omap3_display.c | 2 +- board/davinci/da8xxevm/da850evm.c | 2 +- board/esd/meesc/meesc.c
Re: [PATCH 13/15] RFC: lib: Support a binary prefix 0y
Dear Simon, In message you wrote: > > > > There are quite a few places where simple_strtoul() is called with a > > > base of 0. In that case, if the string starts with 0 it is interpreted > > > as octal. > > > > That's a bug, then. > > If so it is a 19-year-old bug: (was lib_generic/vsprintc.c) > > 153d511e369 Initial revision Mea culpa. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The trouble with our times is that the future is not what it used to be. - Paul Valery
Re: [PATCH v3 06/14] common: fit: Use hash.c to call CRC/SHA function
On Tue, Jul 20, 2021 at 02:38:31PM +0800, Chia-Wei Wang wrote: > From: Joel Stanley > > Currently the FIT verification calls directly into > SW implemented functions to get a CRC/SHA/MD5 hash. > > This patch removes duplcated algorithm lookup and use > hash_lookup_algo to get the hashing function with HW > accelearation supported if configured. > > The MD5 direct call remains as it is not included in > the hash lookup table of hash.c. > > Signed-off-by: Joel Stanley > Signed-off-by: Chia-Wei Wang While this is a good idea, there's some required prep work. At least the following platforms don't compile due to this patch: ls1046ardb_qspi imx8mm_beacon imx8mn_beacon imx8mn_beacon_2g imx8mm-icore-mx8mm-ctouch2 imx8mm-icore-mx8mm-edimm2.2 imx8mm_evk imx8mn_ddr4_evk imx8mn_evk imx8mp_evk imx8mq_evk imx8mm_venice imx8mq_phanbell phycore-imx8mm phycore-imx8mp pico-imx8mq verdin-imx8mm mt8183_pumpkin mt8516_pumpkin mscc_jr2 mscc_luton mscc_ocelot mscc_serval mscc_servalt mt7620_mt7530_rfb mt7620_rfb mt7628_rfb Which is likely due to cases where HASH or SPL_HASH_SUPPORT are not being selected as it was not previously required. -- Tom signature.asc Description: PGP signature
Pull request for efi-2021-10-rc1-3
Dear Tom, The following changes since commit edecc15eb9593b94dcd6a5f4f5ea5f134125b6a0: Merge branch '2021-07-23-reboot-mode-and-cryptfs-passwd-support' (2021-07-23 14:50:43 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2021-10-rc1-3 for you to fetch changes up to d75f48a83dc4998a49a4c35e80a9eab91566df30: MAINTAINERS: correct the path of UEFI docs (2021-07-24 10:49:51 +0200) Pull request for efi-2021-10-rc1-3 Documentation: provide Makefile documentation SMBIOS: generate BIOS release date based on UEFI version improve error handling in SMBIOS table generation UEFI: correct handling of signed capsule if authentication if off AKASHI Takahiro (5): efi_loader: capsule: remove unused guid efi_loader: capsule: remove authentication data efi_loader: remove asm/setjmp.h from efi_api.h test/py: efi_capsule: align with efidebug syntax changes MAINTAINERS: correct the path of UEFI docs Heinrich Schuchardt (3): doc: remove qemu_capsule_update from index doc: fix board/openpiton/riscv64.rst smbios: error handling for invalid addresses Pali Rohár (1): smbios: Fix calculating BIOS Release Date Simon Glass (1): doc: Bring in Makefile documentation MAINTAINERS|2 +- Makefile |2 - arch/x86/lib/tables.c | 13 +- doc/board/emulation/index.rst |1 - doc/board/openpiton/riscv64.rst| 19 +- doc/develop/index.rst |1 + doc/develop/makefiles.rst | 1675 doc/develop/version.rst|1 - include/efi_api.h |4 - include/efi_loader.h |1 + include/smbios.h |7 +- lib/efi_loader/efi_boottime.c |1 + lib/efi_loader/efi_capsule.c | 73 +- lib/efi_loader/efi_smbios.c| 15 +- lib/smbios.c | 27 +- .../test_efi_capsule/test_capsule_firmware.py |6 +- 16 files changed, 1798 insertions(+), 50 deletions(-) create mode 100644 doc/develop/makefiles.rst
Re: [PATCH 1/1] doc: fix board/openpiton/riscv64.rst
Hi Heinrich, Many thanks for the patches. I've tested them and they fix the previous errors. Reviewed-by: Tianrui Wei Heinrich Schuchardt writes: * remove duplicate heading to avoid build error with 'make htmldocs' * length of underlines must match header * use appropriate header levels * fix type %s/linux/Linux/ Signed-off-by: Heinrich Schuchardt --- doc/board/openpiton/riscv64.rst | 19 +-- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/doc/board/openpiton/riscv64.rst b/doc/board/openpiton/riscv64.rst index 253b37c41c..3a97793f07 100644 --- a/doc/board/openpiton/riscv64.rst +++ b/doc/board/openpiton/riscv64.rst @@ -3,8 +3,6 @@ Openpiton RISC-V SoC -OpenPiton RISC-V SoC - OpenPiton is an open source, manycore processor and research platform. It is a tiled manycore framework scalable from one to 1/2 billion cores. It supports a number of ISAs including RISC-V with its P-Mesh cache coherence protocol and @@ -14,21 +12,23 @@ running full-stack Debian linux. RISC-V Standard Bootflow - + Currently, OpenPiton implements RISC-V standard bootflow in the following steps mover.S -> u-boot-spl -> opensbi -> u-boot -> Linux This board supports S-mode u-boot as well as M-mode SPL Building OpenPition - + If you'd like to build OpenPiton, please go to OpenPiton github repo (at https://github.com/PrincetonUniversity/openpiton) to build from the latest changes Building Images +--- SPL +~~~ 1. Add the RISC-V toolchain to your PATH. 2. Setup ARCH & cross compilation environment variable: @@ -42,7 +42,7 @@ SPL 4. make U-Boot --- +~~ 1. Add the RISC-V toolchain to your PATH. 2. Setup ARCH & cross compilation environment variable: @@ -55,9 +55,8 @@ U-Boot 3. make openpiton_riscv64_defconfig 4. make - opensbi +~~~ 1. Add the RISC-V toolchain to your PATH. 2. Setup ARCH & cross compilation environment variable: @@ -70,9 +69,9 @@ opensbi 3. Go to OpenSBI directory 4. make PLATFORM=fpga/openpiton FW_PAYLOAD_PATH= u-boot-nodtb.bin> +Using fw_payload.bin with Linux +~~~ -Using fw_payload.bin with linux Put the generated fw_payload.bin into the /boot directory on the root filesystem, plug in the SD card, then flash the bitstream. Linux will boot automatically. @@ -81,7 +80,7 @@ Booting Once you plugin the sdcard and power up, you should see the U-Boot prompt. Sample Dual-core Debian boot log from OpenPiton +~~~ .. code-block:: none --
[PATCH 1/1] doc: fix board/openpiton/riscv64.rst
* remove duplicate heading to avoid build error with 'make htmldocs' * length of underlines must match header * use appropriate header levels * fix type %s/linux/Linux/ Signed-off-by: Heinrich Schuchardt --- doc/board/openpiton/riscv64.rst | 19 +-- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/doc/board/openpiton/riscv64.rst b/doc/board/openpiton/riscv64.rst index 253b37c41c..3a97793f07 100644 --- a/doc/board/openpiton/riscv64.rst +++ b/doc/board/openpiton/riscv64.rst @@ -3,8 +3,6 @@ Openpiton RISC-V SoC -OpenPiton RISC-V SoC - OpenPiton is an open source, manycore processor and research platform. It is a tiled manycore framework scalable from one to 1/2 billion cores. It supports a number of ISAs including RISC-V with its P-Mesh cache coherence protocol and @@ -14,21 +12,23 @@ running full-stack Debian linux. RISC-V Standard Bootflow - + Currently, OpenPiton implements RISC-V standard bootflow in the following steps mover.S -> u-boot-spl -> opensbi -> u-boot -> Linux This board supports S-mode u-boot as well as M-mode SPL Building OpenPition - + If you'd like to build OpenPiton, please go to OpenPiton github repo (at https://github.com/PrincetonUniversity/openpiton) to build from the latest changes Building Images +--- SPL +~~~ 1. Add the RISC-V toolchain to your PATH. 2. Setup ARCH & cross compilation environment variable: @@ -42,7 +42,7 @@ SPL 4. make U-Boot --- +~~ 1. Add the RISC-V toolchain to your PATH. 2. Setup ARCH & cross compilation environment variable: @@ -55,9 +55,8 @@ U-Boot 3. make openpiton_riscv64_defconfig 4. make - opensbi +~~~ 1. Add the RISC-V toolchain to your PATH. 2. Setup ARCH & cross compilation environment variable: @@ -70,9 +69,9 @@ opensbi 3. Go to OpenSBI directory 4. make PLATFORM=fpga/openpiton FW_PAYLOAD_PATH= +Using fw_payload.bin with Linux +~~~ -Using fw_payload.bin with linux Put the generated fw_payload.bin into the /boot directory on the root filesystem, plug in the SD card, then flash the bitstream. Linux will boot automatically. @@ -81,7 +80,7 @@ Booting Once you plugin the sdcard and power up, you should see the U-Boot prompt. Sample Dual-core Debian boot log from OpenPiton +~~~ .. code-block:: none -- 2.30.2
Re: [PATCH 1/1] doc: remove qemu_capsule_update from index
Acked-by Ilias Apalodimas
On Sat, 24 Jul 2021, 11:36 Heinrich Schuchardt, wrote:
> Commit 316ab801c0d9 ("doc: Update CapsuleUpdate READMEs") deleted file
> doc/board/emulation/qemu_capsule_update.rst. Update the index. this avoids
>
> doc/board/emulation/index.rst:6: WARNING:
> toctree contains reference to nonexisting document
> 'board/emulation/qemu_capsule_update'
>
> Fixes: 316ab801c0d9 ("doc: Update CapsuleUpdate READMEs")
> Signed-off-by: Heinrich Schuchardt
> ---
> doc/board/emulation/index.rst | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/doc/board/emulation/index.rst b/doc/board/emulation/index.rst
> index be66b6bb67..b5b6c3fa0d 100644
> --- a/doc/board/emulation/index.rst
> +++ b/doc/board/emulation/index.rst
> @@ -11,4 +11,3 @@ Emulation
> qemu-ppce500
> qemu-riscv
> qemu-x86
> - qemu_capsule_update
> --
> 2.30.2
>
>
[PATCH 1/1] doc: remove qemu_capsule_update from index
Commit 316ab801c0d9 ("doc: Update CapsuleUpdate READMEs") deleted file
doc/board/emulation/qemu_capsule_update.rst. Update the index. this avoids
doc/board/emulation/index.rst:6: WARNING:
toctree contains reference to nonexisting document
'board/emulation/qemu_capsule_update'
Fixes: 316ab801c0d9 ("doc: Update CapsuleUpdate READMEs")
Signed-off-by: Heinrich Schuchardt
---
doc/board/emulation/index.rst | 1 -
1 file changed, 1 deletion(-)
diff --git a/doc/board/emulation/index.rst b/doc/board/emulation/index.rst
index be66b6bb67..b5b6c3fa0d 100644
--- a/doc/board/emulation/index.rst
+++ b/doc/board/emulation/index.rst
@@ -11,4 +11,3 @@ Emulation
qemu-ppce500
qemu-riscv
qemu-x86
- qemu_capsule_update
--
2.30.2
Re: [PATCH v2] efi_loader: capsule: remove unused guid
On 7/20/21 7:53 AM, AKASHI Takahiro wrote:
efi_guid_capsule_root_cert_guid is never used.
Just remove it.
Signed-off-by: AKASHI Takahiro
Reviewed-by: Heinrich Schuchardt
---
v2:
correct the commit message
---
lib/efi_loader/efi_capsule.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
index f9b0ef591cc8..3c029378de0a 100644
--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
@@ -220,9 +220,6 @@ skip:
#if defined(CONFIG_EFI_CAPSULE_AUTHENTICATE)
-const efi_guid_t efi_guid_capsule_root_cert_guid =
- EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID;
-
static int efi_get_public_key_data(void **pkey, efi_uintn_t *pkey_len)
{
const void *blob = __efi_capsule_sig_begin;
[PATCH 5/7] mmc: zynq_sdhci: Change variable deviceid to node_id
Change deviceid to node_id in arasan_zynqmp_dll_reset() and also in
tapdelay related static inline functions to reflect proper name and
for consistency.
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 97caca51e2..8ffa8c1269 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -75,17 +75,17 @@ static const u8 mode2timing[] = {
[MMC_HS_200] = MMC_TIMING_MMC_HS200,
};
-static inline int arasan_zynqmp_set_in_tapdelay(u8 deviceid, u32 type,
+static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 type,
u32 itap_delay)
{
- return xilinx_pm_request(PM_IOCTL, (u32)deviceid, IOCTL_SET_SD_TAPDELAY,
+ return xilinx_pm_request(PM_IOCTL, (u32)node_id, IOCTL_SET_SD_TAPDELAY,
type, itap_delay, NULL);
}
-static inline int arasan_zynqmp_set_out_tapdelay(u8 deviceid, u32 type,
+static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 type,
u32 otap_delay)
{
- return xilinx_pm_request(PM_IOCTL, (u32)deviceid, IOCTL_SET_SD_TAPDELAY,
+ return xilinx_pm_request(PM_IOCTL, (u32)node_id, IOCTL_SET_SD_TAPDELAY,
type, otap_delay, NULL);
}
@@ -95,7 +95,7 @@ static inline int zynqmp_pm_sd_dll_reset(u8 node_id, u32 type)
type, 0, NULL);
}
-static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 deviceid)
+static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 node_id)
{
struct mmc *mmc = (struct mmc *)host->mmc;
struct udevice *dev = mmc->dev;
@@ -108,14 +108,14 @@ static int arasan_zynqmp_dll_reset(struct sdhci_host
*host, u8 deviceid)
sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
/* Issue DLL Reset */
- ret = zynqmp_pm_sd_dll_reset(deviceid, PM_DLL_RESET_ASSERT);
+ ret = zynqmp_pm_sd_dll_reset(node_id, PM_DLL_RESET_ASSERT);
if (ret) {
dev_err(dev, "dll_reset assert failed with err: %d\n", ret);
return ret;
}
mdelay(1);
- ret = zynqmp_pm_sd_dll_reset(deviceid, PM_DLL_RESET_RELEASE);
+ ret = zynqmp_pm_sd_dll_reset(node_id, PM_DLL_RESET_RELEASE);
if (ret) {
dev_err(dev, "dll_reset release failed with err: %d\n", ret);
return ret;
--
2.17.1
[PATCH 4/7] mmc: zynq_sdhci: Move setting tapdelay code to driver
tap_delays.c just has calls to xilinx_pm_request() for setting tapdelays.
Simply move these calls to zynq_sdhci.c and make them static inline.
Similarly zynqmp_tap_delay.h also has call to xilinx_pm_request() for
dll reset. Do the same for this file as well.
Remove tap_delays.c and zynqmp_tap_delay.h files.
Signed-off-by: Ashok Reddy Soma
---
board/xilinx/zynqmp/Makefile | 2 --
board/xilinx/zynqmp/tap_delays.c | 26
drivers/mmc/zynq_sdhci.c | 21 +++-
include/zynqmp_tap_delay.h | 34
4 files changed, 20 insertions(+), 63 deletions(-)
delete mode 100644 board/xilinx/zynqmp/tap_delays.c
delete mode 100644 include/zynqmp_tap_delay.h
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 7d8277ca40..a914028753 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -44,8 +44,6 @@ $(obj)/pm_cfg_obj.o: $(shell cd $(srctree); readlink -f
$(CONFIG_ZYNQMP_SPL_PM_C
endif
endif
-obj-$(CONFIG_MMC_SDHCI_ZYNQ) += tap_delays.o
-
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_CMD_ZYNQMP) += cmds.o
endif
diff --git a/board/xilinx/zynqmp/tap_delays.c b/board/xilinx/zynqmp/tap_delays.c
deleted file mode 100644
index 4ce2244060..00
--- a/board/xilinx/zynqmp/tap_delays.c
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Xilinx ZynqMP SoC Tap Delay Programming
- *
- * Copyright (C) 2018 Xilinx, Inc.
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-
-int arasan_zynqmp_set_in_tapdelay(u8 deviceid, u32 type, u32 itap_delay)
-{
-
- return xilinx_pm_request(PM_IOCTL, (u32)deviceid, IOCTL_SET_SD_TAPDELAY,
- type, itap_delay, NULL);
-}
-
-int arasan_zynqmp_set_out_tapdelay(u8 deviceid, u32 type, u32 otap_delay)
-{
- return xilinx_pm_request(PM_IOCTL, (u32)deviceid, IOCTL_SET_SD_TAPDELAY,
- type, otap_delay, NULL);
-}
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 4dafd47b57..97caca51e2 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -17,7 +17,6 @@
#include
#include
#include
-#include
#include
#define SDHCI_ARASAN_ITAPDLY_REGISTER 0xF0F8
@@ -76,6 +75,26 @@ static const u8 mode2timing[] = {
[MMC_HS_200] = MMC_TIMING_MMC_HS200,
};
+static inline int arasan_zynqmp_set_in_tapdelay(u8 deviceid, u32 type,
+ u32 itap_delay)
+{
+ return xilinx_pm_request(PM_IOCTL, (u32)deviceid, IOCTL_SET_SD_TAPDELAY,
+type, itap_delay, NULL);
+}
+
+static inline int arasan_zynqmp_set_out_tapdelay(u8 deviceid, u32 type,
+u32 otap_delay)
+{
+ return xilinx_pm_request(PM_IOCTL, (u32)deviceid, IOCTL_SET_SD_TAPDELAY,
+type, otap_delay, NULL);
+}
+
+static inline int zynqmp_pm_sd_dll_reset(u8 node_id, u32 type)
+{
+ return xilinx_pm_request(PM_IOCTL, (u32)node_id, IOCTL_SD_DLL_RESET,
+type, 0, NULL);
+}
+
static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 deviceid)
{
struct mmc *mmc = (struct mmc *)host->mmc;
diff --git a/include/zynqmp_tap_delay.h b/include/zynqmp_tap_delay.h
deleted file mode 100644
index 7e4d4e4a9a..00
--- a/include/zynqmp_tap_delay.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Xilinx ZynqMP SoC Tap Delay Programming
- *
- * Copyright (C) 2018 Xilinx, Inc.
- */
-
-#ifndef __ZYNQMP_TAP_DELAY_H__
-#define __ZYNQMP_TAP_DELAY_H__
-
-#include
-
-#ifdef CONFIG_ARCH_ZYNQMP
-int arasan_zynqmp_set_in_tapdelay(u8 device_id, u32 type, u32 itap_delay);
-int arasan_zynqmp_set_out_tapdelay(u8 device_id, u32 type, u32 otap_delay);
-#else
-inline int arasan_zynqmp_set_in_tapdelay(u8 device_id, u32 type, u32
itap_delay)
-{
- return 0;
-}
-
-int arasan_zynqmp_set_out_tapdelay(u8 device_id, u32 type, u32 otap_delay)
-{
- return 0;
-}
-#endif
-
-static inline int zynqmp_pm_sd_dll_reset(u8 node_id, u32 type)
-{
- return xilinx_pm_request(PM_IOCTL, (u32)node_id, IOCTL_SD_DLL_RESET,
-type, 0, NULL);
-}
-
-#endif
--
2.17.1
[PATCH 1/7] mmc: sdhci: Return error in case of failure
From: T Karthik Reddy
set_delay() function is from sdhci host ops, which does not return
any error due to void return type. Get return values from input and
output set clock phase functions inside arasan_sdhci_set_tapdelay()
and return the errors.
Change return type to int for arasan_sdhci_set_tapdelay() and also for
set_delay() in sdhci_ops structure.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/sdhci.c | 8 ++--
drivers/mmc/zynq_sdhci.c | 21 -
include/sdhci.h | 2 +-
3 files changed, 23 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index d9ab6a0a83..f144602eec 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -366,6 +366,7 @@ int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
{
struct sdhci_host *host = mmc->priv;
unsigned int div, clk = 0, timeout;
+ int ret;
/* Wait max 20 ms */
timeout = 200;
@@ -386,8 +387,11 @@ int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
if (clock == 0)
return 0;
- if (host->ops && host->ops->set_delay)
- host->ops->set_delay(host);
+ if (host->ops && host->ops->set_delay) {
+ ret = host->ops->set_delay(host);
+ if (ret)
+ return ret;
+ }
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
/*
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index ba87ee8dd5..9fb3603c7e 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -422,7 +422,7 @@ static int sdhci_versal_sampleclk_set_phase(struct
sdhci_host *host,
return 0;
}
-static void arasan_sdhci_set_tapdelay(struct sdhci_host *host)
+static int arasan_sdhci_set_tapdelay(struct sdhci_host *host)
{
struct arasan_sdhci_priv *priv = dev_get_priv(host->mmc->dev);
struct arasan_sdhci_clk_data *clk_data = >clk_data;
@@ -431,18 +431,29 @@ static void arasan_sdhci_set_tapdelay(struct sdhci_host
*host)
u8 timing = mode2timing[mmc->selected_mode];
u32 iclk_phase = clk_data->clk_phase_in[timing];
u32 oclk_phase = clk_data->clk_phase_out[timing];
+ int ret;
dev_dbg(dev, "%s, host:%s, mode:%d\n", __func__, host->name, timing);
if (IS_ENABLED(CONFIG_ARCH_ZYNQMP) &&
device_is_compatible(dev, "xlnx,zynqmp-8.9a")) {
- sdhci_zynqmp_sampleclk_set_phase(host, iclk_phase);
- sdhci_zynqmp_sdcardclk_set_phase(host, oclk_phase);
+ ret = sdhci_zynqmp_sampleclk_set_phase(host, iclk_phase);
+ if (ret)
+ return ret;
+ ret = sdhci_zynqmp_sdcardclk_set_phase(host, oclk_phase);
+ if (ret)
+ return ret;
} else if (IS_ENABLED(CONFIG_ARCH_VERSAL) &&
device_is_compatible(dev, "xlnx,versal-8.9a")) {
- sdhci_versal_sampleclk_set_phase(host, iclk_phase);
- sdhci_versal_sdcardclk_set_phase(host, oclk_phase);
+ ret = sdhci_versal_sampleclk_set_phase(host, iclk_phase);
+ if (ret)
+ return ret;
+ ret = sdhci_versal_sdcardclk_set_phase(host, oclk_phase);
+ if (ret)
+ return ret;
}
+
+ return 0;
}
static void arasan_dt_read_clk_phase(struct udevice *dev, unsigned char timing,
diff --git a/include/sdhci.h b/include/sdhci.h
index 0ae9471ad7..44a0d84e5a 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -268,7 +268,7 @@ struct sdhci_ops {
int (*set_ios_post)(struct sdhci_host *host);
void(*set_clock)(struct sdhci_host *host, u32 div);
int (*platform_execute_tuning)(struct mmc *host, u8 opcode);
- void (*set_delay)(struct sdhci_host *host);
+ int (*set_delay)(struct sdhci_host *host);
int (*deferred_probe)(struct sdhci_host *host);
};
--
2.17.1
[PATCH 6/7] mmc: zynq_sdhci: Wait till sd card detect state is stable
From: T Karthik Reddy
As per SD spec when SD host controller is reset, it takes 1000msec
to detect the card state. In case, if we enable the sd bus voltage &
card detect state is not stable, then host controller will disable
the sd bus voltage.
In case of warm/subsystem reboot, due to unstable card detect state
host controller is disabling the sd bus voltage to sd card causing
sd card timeout error. So we wait for a maximum of 1000msec to get
the card detect state stable before we enable the sd bus voltage.
This current fix is workaround for now, this needs to be analysed
further. Zynqmp platform should behave the same as Versal, but we
did not encounter this issue as of now. So we are fixing it for
Versal only.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 8ffa8c1269..a192f60320 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -686,6 +686,23 @@ static int arasan_sdhci_probe(struct udevice *dev)
return ret;
upriv->mmc = host->mmc;
+ /*
+* Wait for 1000msec till the card detect state gets stable
+* else host controller will set sd power bus voltage to 0.
+*/
+ if (IS_ENABLED(CONFIG_ARCH_VERSAL)) {
+ u32 timeout = 1000;
+
+ while (((sdhci_readl(host, SDHCI_PRESENT_STATE) &
+SDHCI_CARD_STATE_STABLE) == 0) && timeout--) {
+ mdelay(1);
+ }
+ if (!timeout) {
+ dev_err(dev, "Sdhci card detect state not stable\n");
+ return -EIO;
+ }
+ }
+
return sdhci_probe(dev);
}
--
2.17.1
[PATCH 2/7] zynqmp_firmware: Add zynqmp firmware related enums
From: T Karthik Reddy
Add enums for pm node id's, pm ioctl id's, tapdelay types, dll reset types
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
include/zynqmp_firmware.h | 127 ++
1 file changed, 127 insertions(+)
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index f6f82bf882..c559ee7d3c 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -62,6 +62,99 @@ enum pm_api_id {
PM_API_MAX,
};
+enum pm_node_id {
+ NODE_UNKNOWN = 0,
+ NODE_APU = 1,
+ NODE_APU_0 = 2,
+ NODE_APU_1 = 3,
+ NODE_APU_2 = 4,
+ NODE_APU_3 = 5,
+ NODE_RPU = 6,
+ NODE_RPU_0 = 7,
+ NODE_RPU_1 = 8,
+ NODE_PLD = 9,
+ NODE_FPD = 10,
+ NODE_OCM_BANK_0 = 11,
+ NODE_OCM_BANK_1 = 12,
+ NODE_OCM_BANK_2 = 13,
+ NODE_OCM_BANK_3 = 14,
+ NODE_TCM_0_A = 15,
+ NODE_TCM_0_B = 16,
+ NODE_TCM_1_A = 17,
+ NODE_TCM_1_B = 18,
+ NODE_L2 = 19,
+ NODE_GPU_PP_0 = 20,
+ NODE_GPU_PP_1 = 21,
+ NODE_USB_0 = 22,
+ NODE_USB_1 = 23,
+ NODE_TTC_0 = 24,
+ NODE_TTC_1 = 25,
+ NODE_TTC_2 = 26,
+ NODE_TTC_3 = 27,
+ NODE_SATA = 28,
+ NODE_ETH_0 = 29,
+ NODE_ETH_1 = 30,
+ NODE_ETH_2 = 31,
+ NODE_ETH_3 = 32,
+ NODE_UART_0 = 33,
+ NODE_UART_1 = 34,
+ NODE_SPI_0 = 35,
+ NODE_SPI_1 = 36,
+ NODE_I2C_0 = 37,
+ NODE_I2C_1 = 38,
+ NODE_SD_0 = 39,
+ NODE_SD_1 = 40,
+ NODE_DP = 41,
+ NODE_GDMA = 42,
+ NODE_ADMA = 43,
+ NODE_NAND = 44,
+ NODE_QSPI = 45,
+ NODE_GPIO = 46,
+ NODE_CAN_0 = 47,
+ NODE_CAN_1 = 48,
+ NODE_EXTERN = 49,
+ NODE_APLL = 50,
+ NODE_VPLL = 51,
+ NODE_DPLL = 52,
+ NODE_RPLL = 53,
+ NODE_IOPLL = 54,
+ NODE_DDR = 55,
+ NODE_IPI_APU = 56,
+ NODE_IPI_RPU_0 = 57,
+ NODE_GPU = 58,
+ NODE_PCIE = 59,
+ NODE_PCAP = 60,
+ NODE_RTC = 61,
+ NODE_LPD = 62,
+ NODE_VCU = 63,
+ NODE_IPI_RPU_1 = 64,
+ NODE_IPI_PL_0 = 65,
+ NODE_IPI_PL_1 = 66,
+ NODE_IPI_PL_2 = 67,
+ NODE_IPI_PL_3 = 68,
+ NODE_PL = 69,
+ NODE_GEM_TSU = 70,
+ NODE_SWDT_0 = 71,
+ NODE_SWDT_1 = 72,
+ NODE_CSU = 73,
+ NODE_PJTAG = 74,
+ NODE_TRACE = 75,
+ NODE_TESTSCAN = 76,
+ NODE_PMU = 77,
+ NODE_MAX = 78,
+};
+
+enum tap_delay_type {
+ PM_TAPDELAY_INPUT = 0,
+ PM_TAPDELAY_OUTPUT = 1,
+};
+
+enum dll_reset_type {
+ PM_DLL_RESET_ASSERT = 0,
+ PM_DLL_RESET_RELEASE = 1,
+ PM_DLL_RESET_PULSE = 2,
+};
+
enum pm_query_id {
PM_QID_INVALID = 0,
PM_QID_CLOCK_GET_NAME = 1,
@@ -79,6 +172,40 @@ enum pm_query_id {
PM_QID_CLOCK_GET_MAX_DIVISOR = 13,
};
+enum pm_ioctl_id {
+ IOCTL_GET_RPU_OPER_MODE,
+ IOCTL_SET_RPU_OPER_MODE,
+ IOCTL_RPU_BOOT_ADDR_CONFIG,
+ IOCTL_TCM_COMB_CONFIG,
+ IOCTL_SET_TAPDELAY_BYPASS,
+ IOCTL_SET_SGMII_MODE,
+ IOCTL_SD_DLL_RESET,
+ IOCTL_SET_SD_TAPDELAY,
+ IOCTL_SET_PLL_FRAC_MODE,
+ IOCTL_GET_PLL_FRAC_MODE,
+ IOCTL_SET_PLL_FRAC_DATA,
+ IOCTL_GET_PLL_FRAC_DATA,
+ IOCTL_WRITE_GGS,
+ IOCTL_READ_GGS,
+ IOCTL_WRITE_PGGS,
+ IOCTL_READ_PGGS,
+ /* IOCTL for ULPI reset */
+ IOCTL_ULPI_RESET,
+ /* Set healthy bit value*/
+ IOCTL_SET_BOOT_HEALTH_STATUS,
+ IOCTL_AFI,
+ /* Probe counter read/write */
+ IOCTL_PROBE_COUNTER_READ,
+ IOCTL_PROBE_COUNTER_WRITE,
+ IOCTL_OSPI_MUX_SELECT,
+ /* IOCTL for USB power request */
+ IOCTL_USB_SET_STATE,
+ /* IOCTL to get last reset reason */
+ IOCTL_GET_LAST_RESET_REASON,
+ /* AIE ISR Clear */
+ IOCTL_AIE_ISR_CLEAR,
+};
+
#define PM_SIP_SVC 0xc200
#define ZYNQMP_PM_VERSION_MAJOR 1
--
2.17.1
[PATCH 7/7] mmc: zynq_sdhci: Use set_control_reg from sdhci.c
Since set_control_reg is available in sdhci.c, use it and remove
arasan_sdhci_set_control_reg().
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index a192f60320..93d453a284 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -600,29 +600,10 @@ static void arasan_dt_parse_clk_phases(struct udevice
*dev)
"clk-phase-mmc-hs400");
}
-static void arasan_sdhci_set_control_reg(struct sdhci_host *host)
-{
- struct mmc *mmc = (struct mmc *)host->mmc;
- u32 reg;
-
- if (!IS_SD(mmc))
- return;
-
- if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
- reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
- reg |= SDHCI_CTRL_VDD_180;
- sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
- }
-
- if (mmc->selected_mode > SD_HS &&
- mmc->selected_mode <= MMC_HS_200)
- sdhci_set_uhs_timing(host);
-}
-
static const struct sdhci_ops arasan_ops = {
.platform_execute_tuning= _sdhci_execute_tuning,
.set_delay = _sdhci_set_tapdelay,
- .set_control_reg = _sdhci_set_control_reg,
+ .set_control_reg = _set_control_reg,
};
#endif
--
2.17.1
[PATCH 3/7] mmc: zynq_sdhci: Use xilinx pm request instead of mmio_write
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set
tapdelay values. Use xilinx_pm_request() using appropriate arguments
to set input/output tapdelays for zynqmp. Where tapdelay setting is
done by firmware. Host driver should explicitly request DLL reset
before ITAP (assert DLL) and after OTAP (release DLL) to avoid issues
in some cases. Also handle error return where possible.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
board/xilinx/zynqmp/tap_delays.c | 89 +++-
drivers/mmc/zynq_sdhci.c | 72 +-
include/zynqmp_tap_delay.h | 25 ++---
3 files changed, 84 insertions(+), 102 deletions(-)
diff --git a/board/xilinx/zynqmp/tap_delays.c b/board/xilinx/zynqmp/tap_delays.c
index d16bbb8eff..4ce2244060 100644
--- a/board/xilinx/zynqmp/tap_delays.c
+++ b/board/xilinx/zynqmp/tap_delays.c
@@ -10,92 +10,17 @@
#include
#include
#include
+#include
-#define SD_DLL_CTRL0xFF180358
-#define SD_ITAP_DLY0xFF180314
-#define SD_OTAP_DLY0xFF180318
-#define SD0_DLL_RST_MASK 0x0004
-#define SD0_DLL_RST0x0004
-#define SD1_DLL_RST_MASK 0x0004
-#define SD1_DLL_RST0x0004
-#define SD0_ITAPCHGWIN_MASK0x0200
-#define SD0_ITAPCHGWIN 0x0200
-#define SD1_ITAPCHGWIN_MASK0x0200
-#define SD1_ITAPCHGWIN 0x0200
-#define SD0_ITAPDLYENA_MASK0x0100
-#define SD0_ITAPDLYENA 0x0100
-#define SD1_ITAPDLYENA_MASK0x0100
-#define SD1_ITAPDLYENA 0x0100
-#define SD0_ITAPDLYSEL_MASK0x00FF
-#define SD1_ITAPDLYSEL_MASK0x00FF
-#define SD0_OTAPDLYSEL_MASK0x003F
-#define SD1_OTAPDLYSEL_MASK0x003F
-
-void zynqmp_dll_reset(u8 deviceid)
+int arasan_zynqmp_set_in_tapdelay(u8 deviceid, u32 type, u32 itap_delay)
{
- /* Issue DLL Reset */
- if (deviceid == 0)
- zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK,
- SD0_DLL_RST);
- else
- zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK,
- SD1_DLL_RST);
-
- mdelay(1);
- /* Release DLL Reset */
- if (deviceid == 0)
- zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0);
- else
- zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0);
+ return xilinx_pm_request(PM_IOCTL, (u32)deviceid, IOCTL_SET_SD_TAPDELAY,
+ type, itap_delay, NULL);
}
-void arasan_zynqmp_set_in_tapdelay(u8 deviceid, u32 itap_delay)
+int arasan_zynqmp_set_out_tapdelay(u8 deviceid, u32 type, u32 otap_delay)
{
- if (deviceid == 0) {
- zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, SD0_DLL_RST);
-
- /* Program ITAP delay */
- zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK,
- SD0_ITAPCHGWIN);
- zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYENA_MASK,
- SD0_ITAPDLYENA);
- zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYSEL_MASK, itap_delay);
- zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0);
-
- zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0);
- } else {
- zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, SD1_DLL_RST);
-
- /* Program ITAP delay */
- zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK,
- SD1_ITAPCHGWIN);
- zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYENA_MASK,
- SD1_ITAPDLYENA);
- zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYSEL_MASK,
- (itap_delay << 16));
- zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, 0x0);
-
- zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0);
- }
-}
-
-void arasan_zynqmp_set_out_tapdelay(u8 deviceid, u32 otap_delay)
-{
- if (deviceid == 0) {
- zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, SD0_DLL_RST);
-
- /* Program OTAP delay */
- zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK, otap_delay);
-
- zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0);
- } else {
- zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, SD1_DLL_RST);
-
- /* Program OTAP delay */
- zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK,
- (otap_delay << 16));
-
- zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0);
- }
+ return xilinx_pm_request(PM_IOCTL, (u32)deviceid, IOCTL_SET_SD_TAPDELAY,
+ type, otap_delay, NULL);
}
[PATCH 0/7] Arasan sdhci driver updates
This patch series updates/fixes below things: - Handle errors from tapdelay functions and return to set_delay() - Add ZynqMP firmware related enums which are used in sdhci driver - Replace mmio_write() with firmware call xilinx_pm_request() - Move tapdelay setting code from tap_delays.c to driver and remove tap_dealy.c and zynqmp_tap_delay.h - Change variable name from deviceid to node_id in couple of functions for consistancy - Add a workaround for sd card detect stable issue for Versal platforms - Use set_control_reg from sdhci.c Ashok Reddy Soma (4): mmc: zynq_sdhci: Use xilinx pm request instead of mmio_write mmc: zynq_sdhci: Move setting tapdelay code to driver mmc: zynq_sdhci: Change variable deviceid to node_id mmc: zynq_sdhci: Use set_control_reg from sdhci.c T Karthik Reddy (3): mmc: sdhci: Return error in case of failure zynqmp_firmware: Add zynqmp firmware related enums mmc: zynq_sdhci: Wait till sd card detect state is stable board/xilinx/zynqmp/Makefile | 2 - board/xilinx/zynqmp/tap_delays.c | 101 drivers/mmc/sdhci.c | 8 +- drivers/mmc/zynq_sdhci.c | 152 +++ include/sdhci.h | 2 +- include/zynqmp_firmware.h| 127 ++ include/zynqmp_tap_delay.h | 21 - 7 files changed, 246 insertions(+), 167 deletions(-) delete mode 100644 board/xilinx/zynqmp/tap_delays.c delete mode 100644 include/zynqmp_tap_delay.h -- 2.17.1
